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ath10k: deduplicate wmi_channel code
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
5e3dd157
KV		 20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
25#include "mac.h"
43d2a30f 26#include "testmode.h"
5e3dd157 27
ce42870e
BM		 28/* MAIN WMI cmd track */
29static struct wmi_cmd_map wmi_cmd_map = {
30 .init_cmdid = WMI_INIT_CMDID,
31 .start_scan_cmdid = WMI_START_SCAN_CMDID,
32 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
33 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
34 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
35 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
36 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
37 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
38 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
39 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
40 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
41 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
42 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
43 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
44 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
45 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
46 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
47 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
48 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
49 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
50 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
51 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
52 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
53 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
54 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
55 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
56 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
57 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
58 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
59 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
60 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
61 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
62 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
63 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
64 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
65 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
66 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
67 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
68 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
69 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
70 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
71 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
72 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
73 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
74 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
75 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
76 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
77 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
78 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
79 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
80 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
81 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
82 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
83 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
84 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
85 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
86 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
87 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
88 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
89 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
90 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
91 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
92 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
93 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
94 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
95 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
96 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
97 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
98 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
99 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
100 .wlan_profile_set_hist_intvl_cmdid =
101 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
102 .wlan_profile_get_profile_data_cmdid =
103 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
104 .wlan_profile_enable_profile_id_cmdid =
105 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
106 .wlan_profile_list_profile_id_cmdid =
107 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
108 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
109 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
110 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
111 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
112 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
113 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
114 .wow_enable_disable_wake_event_cmdid =
115 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
116 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
117 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
118 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
119 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
120 .vdev_spectral_scan_configure_cmdid =
121 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
122 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
123 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
124 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
125 .network_list_offload_config_cmdid =
126 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
127 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
128 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
129 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
130 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
131 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
132 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
133 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
134 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
135 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
136 .echo_cmdid = WMI_ECHO_CMDID,
137 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
138 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
139 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
140 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
141 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
142 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
143 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
144 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
145 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
146};
147
b7e3adf9
BM		 148/* 10.X WMI cmd track */
149static struct wmi_cmd_map wmi_10x_cmd_map = {
150 .init_cmdid = WMI_10X_INIT_CMDID,
151 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
152 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
153 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 154 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 155 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
156 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
157 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
158 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
159 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
160 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
161 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
162 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
163 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
164 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
165 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
166 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
167 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
168 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
169 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
170 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
171 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
172 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
173 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
174 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
175 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
176 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
177 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
178 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
179 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
180 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
181 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
182 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
183 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
184 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
185 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
186 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 187 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 188 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
189 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
190 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 191 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 192 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
193 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
194 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
195 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
196 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
197 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
198 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
199 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
200 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
201 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
202 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
203 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
204 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
205 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
206 .roam_scan_rssi_change_threshold =
207 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
208 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
209 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
210 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
211 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
212 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
213 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
214 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
215 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 216 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 217 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 218 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 219 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
220 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
221 .wlan_profile_set_hist_intvl_cmdid =
222 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
223 .wlan_profile_get_profile_data_cmdid =
224 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
225 .wlan_profile_enable_profile_id_cmdid =
226 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
227 .wlan_profile_list_profile_id_cmdid =
228 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
229 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
230 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
231 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
232 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
233 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
234 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
235 .wow_enable_disable_wake_event_cmdid =
236 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
237 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
238 .wow_hostwakeup_from_sleep_cmdid =
239 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
240 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
241 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
242 .vdev_spectral_scan_configure_cmdid =
243 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
244 .vdev_spectral_scan_enable_cmdid =
245 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
246 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
34957b25
BM		 247 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
248 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
249 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
250 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
251 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
252 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
253 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
254 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
255 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
256 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
257 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 258 .echo_cmdid = WMI_10X_ECHO_CMDID,
259 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
260 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
261 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
34957b25
BM		 262 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
263 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
264 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
265 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 266 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
267 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
268};
ce42870e 269
6d1506e7
BM		 270/* MAIN WMI VDEV param map */
271static struct wmi_vdev_param_map wmi_vdev_param_map = {
272 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
273 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
274 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
275 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
276 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
277 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
278 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
279 .preamble = WMI_VDEV_PARAM_PREAMBLE,
280 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
281 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
282 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
283 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
284 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
285 .wmi_vdev_oc_scheduler_air_time_limit =
286 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
287 .wds = WMI_VDEV_PARAM_WDS,
288 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
289 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
290 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
291 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
292 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
293 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
294 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
295 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
296 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
297 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
298 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
299 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
300 .sgi = WMI_VDEV_PARAM_SGI,
301 .ldpc = WMI_VDEV_PARAM_LDPC,
302 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
303 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
304 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
305 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
306 .nss = WMI_VDEV_PARAM_NSS,
307 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
308 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
309 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
310 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
311 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
312 .ap_keepalive_min_idle_inactive_time_secs =
313 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
314 .ap_keepalive_max_idle_inactive_time_secs =
315 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
316 .ap_keepalive_max_unresponsive_time_secs =
317 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
318 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
319 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
320 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
321 .txbf = WMI_VDEV_PARAM_TXBF,
322 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
323 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
324 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
325 .ap_detect_out_of_sync_sleeping_sta_time_secs =
326 WMI_VDEV_PARAM_UNSUPPORTED,
327};
328
329/* 10.X WMI VDEV param map */
330static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
331 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
332 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
333 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
334 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
335 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
336 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
337 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
338 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
339 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
340 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
341 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
342 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
343 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
344 .wmi_vdev_oc_scheduler_air_time_limit =
345 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
346 .wds = WMI_10X_VDEV_PARAM_WDS,
347 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
348 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
349 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
350 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
351 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
352 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
353 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
354 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
355 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
356 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
357 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
358 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
359 .sgi = WMI_10X_VDEV_PARAM_SGI,
360 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
361 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
362 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
363 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
364 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
365 .nss = WMI_10X_VDEV_PARAM_NSS,
366 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
367 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
368 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
369 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
370 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
371 .ap_keepalive_min_idle_inactive_time_secs =
372 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
373 .ap_keepalive_max_idle_inactive_time_secs =
374 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
375 .ap_keepalive_max_unresponsive_time_secs =
376 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
377 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
378 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
379 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
380 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
381 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
382 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
383 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
384 .ap_detect_out_of_sync_sleeping_sta_time_secs =
385 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
386};
387
226a339b
BM		 388static struct wmi_pdev_param_map wmi_pdev_param_map = {
389 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
390 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
391 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
392 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
393 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
394 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
395 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
396 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
397 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
398 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
399 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
400 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
401 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
402 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
403 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
404 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
405 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
406 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
407 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
408 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
409 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
410 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
411 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
412 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
413 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
414 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
415 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
416 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
417 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
418 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
419 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
420 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
421 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
422 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
423 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
226a339b
BM		 424 .dcs = WMI_PDEV_PARAM_DCS,
425 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
426 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
427 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
428 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
429 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
430 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
431 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
432 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
433 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
434 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
435 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
436 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
437};
438
439static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
440 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
441 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
442 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
443 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
444 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
445 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
446 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
447 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
448 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
449 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
450 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
451 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
452 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
453 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
454 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
455 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
456 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
457 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
458 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
459 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
460 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
461 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
462 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
463 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
464 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
465 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
466 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
467 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
468 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
469 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
470 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
471 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
472 .bcnflt_stats_update_period =
473 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
474 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
ab6258ed 475 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
226a339b
BM		 476 .dcs = WMI_10X_PDEV_PARAM_DCS,
477 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
478 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
479 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
480 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
481 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
482 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
483 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
484 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
485 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
486 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
487 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
488 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
489};
490
24c88f78
MK		 491/* firmware 10.2 specific mappings */
492static struct wmi_cmd_map wmi_10_2_cmd_map = {
493 .init_cmdid = WMI_10_2_INIT_CMDID,
494 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
495 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
496 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
497 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
498 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
499 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
500 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
501 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
502 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
503 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
504 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
505 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
506 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
507 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
508 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
509 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
510 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
511 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
512 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
513 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
514 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
515 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
516 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
517 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
518 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
519 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
520 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
521 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
522 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
523 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
524 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
525 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
526 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
527 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
528 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
529 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
530 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
531 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
532 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
533 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
534 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
535 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
536 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
537 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
538 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
539 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
540 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
541 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
542 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
543 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
544 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
545 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
546 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
547 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
548 .roam_scan_rssi_change_threshold =
549 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
550 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
551 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
552 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
553 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
554 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
555 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
556 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
557 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
558 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
559 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
560 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
561 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
562 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
563 .wlan_profile_set_hist_intvl_cmdid =
564 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
565 .wlan_profile_get_profile_data_cmdid =
566 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
567 .wlan_profile_enable_profile_id_cmdid =
568 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
569 .wlan_profile_list_profile_id_cmdid =
570 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
571 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
572 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
573 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
574 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
575 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
576 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
577 .wow_enable_disable_wake_event_cmdid =
578 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
579 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
580 .wow_hostwakeup_from_sleep_cmdid =
581 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
582 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
583 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
584 .vdev_spectral_scan_configure_cmdid =
585 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
586 .vdev_spectral_scan_enable_cmdid =
587 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
588 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
589 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
590 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
591 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
592 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
593 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
594 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
595 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
596 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
597 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
598 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
599 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
600 .echo_cmdid = WMI_10_2_ECHO_CMDID,
601 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
602 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
603 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
604 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
605 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
606 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
607 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
608 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
609 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
610};
611
2d66721c
MK		 612static void
613ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
614 const struct wmi_channel_arg *arg)
615{
616 u32 flags = 0;
617
618 memset(ch, 0, sizeof(*ch));
619
620 if (arg->passive)
621 flags |= WMI_CHAN_FLAG_PASSIVE;
622 if (arg->allow_ibss)
623 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
624 if (arg->allow_ht)
625 flags |= WMI_CHAN_FLAG_ALLOW_HT;
626 if (arg->allow_vht)
627 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
628 if (arg->ht40plus)
629 flags |= WMI_CHAN_FLAG_HT40_PLUS;
630 if (arg->chan_radar)
631 flags |= WMI_CHAN_FLAG_DFS;
632
633 ch->mhz = __cpu_to_le32(arg->freq);
634 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
635 ch->band_center_freq2 = 0;
636 ch->min_power = arg->min_power;
637 ch->max_power = arg->max_power;
638 ch->reg_power = arg->max_reg_power;
639 ch->antenna_max = arg->max_antenna_gain;
640
641 /* mode & flags share storage */
642 ch->mode = arg->mode;
643 ch->flags |= __cpu_to_le32(flags);
644}
645
5e3dd157
KV		 646int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
647{
648 int ret;
af762c0b 649
5e3dd157
KV		 650 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
651 WMI_SERVICE_READY_TIMEOUT_HZ);
652 return ret;
653}
654
655int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
656{
657 int ret;
af762c0b 658
5e3dd157
KV		 659 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
660 WMI_UNIFIED_READY_TIMEOUT_HZ);
661 return ret;
662}
663
666a73f3 664struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
5e3dd157
KV		 665{
666 struct sk_buff *skb;
667 u32 round_len = roundup(len, 4);
668
7aa7a72a 669 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
5e3dd157
KV		 670 if (!skb)
671 return NULL;
672
673 skb_reserve(skb, WMI_SKB_HEADROOM);
674 if (!IS_ALIGNED((unsigned long)skb->data, 4))
7aa7a72a 675 ath10k_warn(ar, "Unaligned WMI skb\n");
5e3dd157
KV		 676
677 skb_put(skb, round_len);
678 memset(skb->data, 0, round_len);
679
680 return skb;
681}
682
683static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
684{
685 dev_kfree_skb(skb);
5e3dd157
KV		 686}
687
be8b3943 688static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
ce42870e 689 u32 cmd_id)
5e3dd157
KV		 690{
691 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
692 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 693 int ret;
5e3dd157
KV		 694 u32 cmd = 0;
695
696 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
697 return -ENOMEM;
698
699 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
700
701 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
702 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
703
5e3dd157 704 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943 705 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
d35a6c18 706 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
5e3dd157 707
be8b3943
MK		 708 if (ret)
709 goto err_pull;
5e3dd157 710
be8b3943
MK		 711 return 0;
712
713err_pull:
714 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
715 return ret;
716}
717
ed54388a
MK		 718static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
719{
ed54388a
MK		 720 int ret;
721
722 lockdep_assert_held(&arvif->ar->data_lock);
723
724 if (arvif->beacon == NULL)
725 return;
726
748afc47
MK		 727 if (arvif->beacon_sent)
728 return;
ed54388a 729
748afc47 730 ret = ath10k_wmi_beacon_send_ref_nowait(arvif);
ed54388a
MK		 731 if (ret)
732 return;
733
748afc47
MK		 734 /* We need to retain the arvif->beacon reference for DMA unmapping and
735 * freeing the skbuff later. */
736 arvif->beacon_sent = true;
ed54388a
MK		 737}
738
739static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
740 struct ieee80211_vif *vif)
741{
742 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
743
744 ath10k_wmi_tx_beacon_nowait(arvif);
745}
746
747static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
748{
749 spin_lock_bh(&ar->data_lock);
750 ieee80211_iterate_active_interfaces_atomic(ar->hw,
751 IEEE80211_IFACE_ITER_NORMAL,
752 ath10k_wmi_tx_beacons_iter,
753 NULL);
754 spin_unlock_bh(&ar->data_lock);
755}
756
12acbc43 757static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 758{
ed54388a
MK		 759 /* try to send pending beacons first. they take priority */
760 ath10k_wmi_tx_beacons_nowait(ar);
761
be8b3943
MK		 762 wake_up(&ar->wmi.tx_credits_wq);
763}
764
666a73f3 765int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
be8b3943 766{
34957b25 767 int ret = -EOPNOTSUPP;
be8b3943 768
56b84287
KV		 769 might_sleep();
770
34957b25 771 if (cmd_id == WMI_CMD_UNSUPPORTED) {
7aa7a72a 772 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
55321559
BM		 773 cmd_id);
774 return ret;
775 }
be8b3943
MK		 776
777 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK		 778 /* try to send pending beacons first. they take priority */
779 ath10k_wmi_tx_beacons_nowait(ar);
780
be8b3943
MK		 781 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
782 (ret != -EAGAIN);
783 }), 3*HZ);
784
785 if (ret)
5e3dd157 786 dev_kfree_skb_any(skb);
5e3dd157 787
be8b3943 788 return ret;
5e3dd157
KV		 789}
790
5e00d31a
BM		 791int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
792{
793 int ret = 0;
794 struct wmi_mgmt_tx_cmd *cmd;
795 struct ieee80211_hdr *hdr;
796 struct sk_buff *wmi_skb;
797 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
798 int len;
eeab266c 799 u32 buf_len = skb->len;
5e00d31a
BM		 800 u16 fc;
801
802 hdr = (struct ieee80211_hdr *)skb->data;
803 fc = le16_to_cpu(hdr->frame_control);
804
805 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
806 return -EINVAL;
807
808 len = sizeof(cmd->hdr) + skb->len;
eeab266c
MK		 809
810 if ((ieee80211_is_action(hdr->frame_control) ||
811 ieee80211_is_deauth(hdr->frame_control) ||
812 ieee80211_is_disassoc(hdr->frame_control)) &&
813 ieee80211_has_protected(hdr->frame_control)) {
814 len += IEEE80211_CCMP_MIC_LEN;
815 buf_len += IEEE80211_CCMP_MIC_LEN;
816 }
817
5e00d31a
BM		 818 len = round_up(len, 4);
819
7aa7a72a 820 wmi_skb = ath10k_wmi_alloc_skb(ar, len);
5e00d31a
BM		 821 if (!wmi_skb)
822 return -ENOMEM;
823
824 cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
825
826 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
827 cmd->hdr.tx_rate = 0;
828 cmd->hdr.tx_power = 0;
eeab266c 829 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
5e00d31a 830
b25f32cb 831 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
5e00d31a
BM		 832 memcpy(cmd->buf, skb->data, skb->len);
833
7aa7a72a 834 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
5e00d31a
BM		 835 wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
836 fc & IEEE80211_FCTL_STYPE);
837
838 /* Send the management frame buffer to the target */
839 ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
5fb5e41f 840 if (ret)
5e00d31a 841 return ret;
5e00d31a
BM		 842
843 /* TODO: report tx status to mac80211 - temporary just ACK */
844 info->flags |= IEEE80211_TX_STAT_ACK;
845 ieee80211_tx_status_irqsafe(ar->hw, skb);
846
847 return ret;
848}
849
5c81c7fd
MK		 850static void ath10k_wmi_event_scan_started(struct ath10k *ar)
851{
852 lockdep_assert_held(&ar->data_lock);
853
854 switch (ar->scan.state) {
855 case ATH10K_SCAN_IDLE:
856 case ATH10K_SCAN_RUNNING:
857 case ATH10K_SCAN_ABORTING:
7aa7a72a 858 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 859 ath10k_scan_state_str(ar->scan.state),
860 ar->scan.state);
861 break;
862 case ATH10K_SCAN_STARTING:
863 ar->scan.state = ATH10K_SCAN_RUNNING;
864
865 if (ar->scan.is_roc)
866 ieee80211_ready_on_channel(ar->hw);
867
868 complete(&ar->scan.started);
869 break;
870 }
871}
872
873static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
874{
875 lockdep_assert_held(&ar->data_lock);
876
877 switch (ar->scan.state) {
878 case ATH10K_SCAN_IDLE:
879 case ATH10K_SCAN_STARTING:
880 /* One suspected reason scan can be completed while starting is
881 * if firmware fails to deliver all scan events to the host,
882 * e.g. when transport pipe is full. This has been observed
883 * with spectral scan phyerr events starving wmi transport
884 * pipe. In such case the "scan completed" event should be (and
885 * is) ignored by the host as it may be just firmware's scan
886 * state machine recovering.
887 */
7aa7a72a 888 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 889 ath10k_scan_state_str(ar->scan.state),
890 ar->scan.state);
891 break;
892 case ATH10K_SCAN_RUNNING:
893 case ATH10K_SCAN_ABORTING:
894 __ath10k_scan_finish(ar);
895 break;
896 }
897}
898
899static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
900{
901 lockdep_assert_held(&ar->data_lock);
902
903 switch (ar->scan.state) {
904 case ATH10K_SCAN_IDLE:
905 case ATH10K_SCAN_STARTING:
7aa7a72a 906 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 907 ath10k_scan_state_str(ar->scan.state),
908 ar->scan.state);
909 break;
910 case ATH10K_SCAN_RUNNING:
911 case ATH10K_SCAN_ABORTING:
912 ar->scan_channel = NULL;
913 break;
914 }
915}
916
917static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
918{
919 lockdep_assert_held(&ar->data_lock);
920
921 switch (ar->scan.state) {
922 case ATH10K_SCAN_IDLE:
923 case ATH10K_SCAN_STARTING:
7aa7a72a 924 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 925 ath10k_scan_state_str(ar->scan.state),
926 ar->scan.state);
927 break;
928 case ATH10K_SCAN_RUNNING:
929 case ATH10K_SCAN_ABORTING:
930 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
931
932 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
933 complete(&ar->scan.on_channel);
934 break;
935 }
936}
937
9ff8b724
MK		 938static const char *
939ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
940 enum wmi_scan_completion_reason reason)
941{
942 switch (type) {
943 case WMI_SCAN_EVENT_STARTED:
944 return "started";
945 case WMI_SCAN_EVENT_COMPLETED:
946 switch (reason) {
947 case WMI_SCAN_REASON_COMPLETED:
948 return "completed";
949 case WMI_SCAN_REASON_CANCELLED:
950 return "completed [cancelled]";
951 case WMI_SCAN_REASON_PREEMPTED:
952 return "completed [preempted]";
953 case WMI_SCAN_REASON_TIMEDOUT:
954 return "completed [timedout]";
955 case WMI_SCAN_REASON_MAX:
956 break;
957 }
958 return "completed [unknown]";
959 case WMI_SCAN_EVENT_BSS_CHANNEL:
960 return "bss channel";
961 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
962 return "foreign channel";
963 case WMI_SCAN_EVENT_DEQUEUED:
964 return "dequeued";
965 case WMI_SCAN_EVENT_PREEMPTED:
966 return "preempted";
967 case WMI_SCAN_EVENT_START_FAILED:
968 return "start failed";
969 default:
970 return "unknown";
971 }
972}
973
5e3dd157
KV		 974static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
975{
976 struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
977 enum wmi_scan_event_type event_type;
978 enum wmi_scan_completion_reason reason;
979 u32 freq;
980 u32 req_id;
981 u32 scan_id;
982 u32 vdev_id;
983
984 event_type = __le32_to_cpu(event->event_type);
985 reason = __le32_to_cpu(event->reason);
986 freq = __le32_to_cpu(event->channel_freq);
987 req_id = __le32_to_cpu(event->scan_req_id);
988 scan_id = __le32_to_cpu(event->scan_id);
989 vdev_id = __le32_to_cpu(event->vdev_id);
990
5c81c7fd
MK		 991 spin_lock_bh(&ar->data_lock);
992
7aa7a72a 993 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c81c7fd 994 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
9ff8b724 995 ath10k_wmi_event_scan_type_str(event_type, reason),
5c81c7fd
MK		 996 event_type, reason, freq, req_id, scan_id, vdev_id,
997 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
5e3dd157
KV		 998
999 switch (event_type) {
1000 case WMI_SCAN_EVENT_STARTED:
5c81c7fd 1001 ath10k_wmi_event_scan_started(ar);
5e3dd157
KV		 1002 break;
1003 case WMI_SCAN_EVENT_COMPLETED:
5c81c7fd 1004 ath10k_wmi_event_scan_completed(ar);
5e3dd157
KV		 1005 break;
1006 case WMI_SCAN_EVENT_BSS_CHANNEL:
5c81c7fd 1007 ath10k_wmi_event_scan_bss_chan(ar);
5e3dd157
KV		 1008 break;
1009 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
5c81c7fd
MK		 1010 ath10k_wmi_event_scan_foreign_chan(ar, freq);
1011 break;
1012 case WMI_SCAN_EVENT_START_FAILED:
7aa7a72a 1013 ath10k_warn(ar, "received scan start failure event\n");
5e3dd157
KV		 1014 break;
1015 case WMI_SCAN_EVENT_DEQUEUED:
5e3dd157 1016 case WMI_SCAN_EVENT_PREEMPTED:
5e3dd157
KV		 1017 default:
1018 break;
1019 }
1020
1021 spin_unlock_bh(&ar->data_lock);
1022 return 0;
1023}
1024
1025static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
1026{
1027 enum ieee80211_band band;
1028
1029 switch (phy_mode) {
1030 case MODE_11A:
1031 case MODE_11NA_HT20:
1032 case MODE_11NA_HT40:
1033 case MODE_11AC_VHT20:
1034 case MODE_11AC_VHT40:
1035 case MODE_11AC_VHT80:
1036 band = IEEE80211_BAND_5GHZ;
1037 break;
1038 case MODE_11G:
1039 case MODE_11B:
1040 case MODE_11GONLY:
1041 case MODE_11NG_HT20:
1042 case MODE_11NG_HT40:
1043 case MODE_11AC_VHT20_2G:
1044 case MODE_11AC_VHT40_2G:
1045 case MODE_11AC_VHT80_2G:
1046 default:
1047 band = IEEE80211_BAND_2GHZ;
1048 }
1049
1050 return band;
1051}
1052
1053static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
1054{
1055 u8 rate_idx = 0;
1056
1057 /* rate in Kbps */
1058 switch (rate) {
1059 case 1000:
1060 rate_idx = 0;
1061 break;
1062 case 2000:
1063 rate_idx = 1;
1064 break;
1065 case 5500:
1066 rate_idx = 2;
1067 break;
1068 case 11000:
1069 rate_idx = 3;
1070 break;
1071 case 6000:
1072 rate_idx = 4;
1073 break;
1074 case 9000:
1075 rate_idx = 5;
1076 break;
1077 case 12000:
1078 rate_idx = 6;
1079 break;
1080 case 18000:
1081 rate_idx = 7;
1082 break;
1083 case 24000:
1084 rate_idx = 8;
1085 break;
1086 case 36000:
1087 rate_idx = 9;
1088 break;
1089 case 48000:
1090 rate_idx = 10;
1091 break;
1092 case 54000:
1093 rate_idx = 11;
1094 break;
1095 default:
1096 break;
1097 }
1098
1099 if (band == IEEE80211_BAND_5GHZ) {
1100 if (rate_idx > 3)
1101 /* Omit CCK rates */
1102 rate_idx -= 4;
1103 else
1104 rate_idx = 0;
1105 }
1106
1107 return rate_idx;
1108}
1109
1110static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
1111{
0d9b0438
MK		 1112 struct wmi_mgmt_rx_event_v1 *ev_v1;
1113 struct wmi_mgmt_rx_event_v2 *ev_v2;
1114 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
5e3dd157 1115 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
453cdb61 1116 struct ieee80211_channel *ch;
5e3dd157
KV		 1117 struct ieee80211_hdr *hdr;
1118 u32 rx_status;
1119 u32 channel;
1120 u32 phy_mode;
1121 u32 snr;
1122 u32 rate;
1123 u32 buf_len;
1124 u16 fc;
0d9b0438
MK		 1125 int pull_len;
1126
1127 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
1128 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
1129 ev_hdr = &ev_v2->hdr.v1;
1130 pull_len = sizeof(*ev_v2);
1131 } else {
1132 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
1133 ev_hdr = &ev_v1->hdr;
1134 pull_len = sizeof(*ev_v1);
1135 }
5e3dd157 1136
0d9b0438
MK		 1137 channel = __le32_to_cpu(ev_hdr->channel);
1138 buf_len = __le32_to_cpu(ev_hdr->buf_len);
1139 rx_status = __le32_to_cpu(ev_hdr->status);
1140 snr = __le32_to_cpu(ev_hdr->snr);
1141 phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
1142 rate = __le32_to_cpu(ev_hdr->rate);
5e3dd157
KV		 1143
1144 memset(status, 0, sizeof(*status));
1145
7aa7a72a 1146 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1147 "event mgmt rx status %08x\n", rx_status);
1148
e8a50f8b
MP		 1149 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1150 dev_kfree_skb(skb);
1151 return 0;
1152 }
1153
5e3dd157
KV		 1154 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
1155 dev_kfree_skb(skb);
1156 return 0;
1157 }
1158
1159 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
1160 dev_kfree_skb(skb);
1161 return 0;
1162 }
1163
1164 if (rx_status & WMI_RX_STATUS_ERR_CRC)
1165 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1166 if (rx_status & WMI_RX_STATUS_ERR_MIC)
1167 status->flag |= RX_FLAG_MMIC_ERROR;
1168
453cdb61
MK		 1169 /* HW can Rx CCK rates on 5GHz. In that case phy_mode is set to
1170 * MODE_11B. This means phy_mode is not a reliable source for the band
1171 * of mgmt rx. */
1172
1173 ch = ar->scan_channel;
1174 if (!ch)
1175 ch = ar->rx_channel;
1176
1177 if (ch) {
1178 status->band = ch->band;
1179
1180 if (phy_mode == MODE_11B &&
1181 status->band == IEEE80211_BAND_5GHZ)
7aa7a72a 1182 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
453cdb61 1183 } else {
7aa7a72a 1184 ath10k_warn(ar, "using (unreliable) phy_mode to extract band for mgmt rx\n");
453cdb61
MK		 1185 status->band = phy_mode_to_band(phy_mode);
1186 }
1187
5e3dd157
KV		 1188 status->freq = ieee80211_channel_to_frequency(channel, status->band);
1189 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
1190 status->rate_idx = get_rate_idx(rate, status->band);
1191
0d9b0438 1192 skb_pull(skb, pull_len);
5e3dd157
KV		 1193
1194 hdr = (struct ieee80211_hdr *)skb->data;
1195 fc = le16_to_cpu(hdr->frame_control);
1196
2b6a6a90
MK		 1197 /* FW delivers WEP Shared Auth frame with Protected Bit set and
1198 * encrypted payload. However in case of PMF it delivers decrypted
1199 * frames with Protected Bit set. */
1200 if (ieee80211_has_protected(hdr->frame_control) &&
1201 !ieee80211_is_auth(hdr->frame_control)) {
eeab266c
MK		 1202 status->flag |= RX_FLAG_DECRYPTED;
1203
1204 if (!ieee80211_is_action(hdr->frame_control) &&
1205 !ieee80211_is_deauth(hdr->frame_control) &&
1206 !ieee80211_is_disassoc(hdr->frame_control)) {
1207 status->flag |= RX_FLAG_IV_STRIPPED |
1208 RX_FLAG_MMIC_STRIPPED;
1209 hdr->frame_control = __cpu_to_le16(fc &
5e3dd157 1210 ~IEEE80211_FCTL_PROTECTED);
eeab266c 1211 }
5e3dd157
KV		 1212 }
1213
7aa7a72a 1214 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1215 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
1216 skb, skb->len,
1217 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
1218
7aa7a72a 1219 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1220 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
1221 status->freq, status->band, status->signal,
1222 status->rate_idx);
1223
1224 /*
1225 * packets from HTC come aligned to 4byte boundaries
1226 * because they can originally come in along with a trailer
1227 */
1228 skb_trim(skb, buf_len);
1229
1230 ieee80211_rx(ar->hw, skb);
1231 return 0;
1232}
1233
2e1dea40
MK		 1234static int freq_to_idx(struct ath10k *ar, int freq)
1235{
1236 struct ieee80211_supported_band *sband;
1237 int band, ch, idx = 0;
1238
1239 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
1240 sband = ar->hw->wiphy->bands[band];
1241 if (!sband)
1242 continue;
1243
1244 for (ch = 0; ch < sband->n_channels; ch++, idx++)
1245 if (sband->channels[ch].center_freq == freq)
1246 goto exit;
1247 }
1248
1249exit:
1250 return idx;
1251}
1252
5e3dd157
KV		 1253static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1254{
2e1dea40
MK		 1255 struct wmi_chan_info_event *ev;
1256 struct survey_info *survey;
1257 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1258 int idx;
1259
1260 ev = (struct wmi_chan_info_event *)skb->data;
1261
1262 err_code = __le32_to_cpu(ev->err_code);
1263 freq = __le32_to_cpu(ev->freq);
1264 cmd_flags = __le32_to_cpu(ev->cmd_flags);
1265 noise_floor = __le32_to_cpu(ev->noise_floor);
1266 rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
1267 cycle_count = __le32_to_cpu(ev->cycle_count);
1268
7aa7a72a 1269 ath10k_dbg(ar, ATH10K_DBG_WMI,
2e1dea40
MK		 1270 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1271 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1272 cycle_count);
1273
1274 spin_lock_bh(&ar->data_lock);
1275
5c81c7fd
MK		 1276 switch (ar->scan.state) {
1277 case ATH10K_SCAN_IDLE:
1278 case ATH10K_SCAN_STARTING:
7aa7a72a 1279 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
2e1dea40 1280 goto exit;
5c81c7fd
MK		 1281 case ATH10K_SCAN_RUNNING:
1282 case ATH10K_SCAN_ABORTING:
1283 break;
2e1dea40
MK		 1284 }
1285
1286 idx = freq_to_idx(ar, freq);
1287 if (idx >= ARRAY_SIZE(ar->survey)) {
7aa7a72a 1288 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2e1dea40
MK		 1289 freq, idx);
1290 goto exit;
1291 }
1292
1293 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1294 /* During scanning chan info is reported twice for each
1295 * visited channel. The reported cycle count is global
1296 * and per-channel cycle count must be calculated */
1297
1298 cycle_count -= ar->survey_last_cycle_count;
1299 rx_clear_count -= ar->survey_last_rx_clear_count;
1300
1301 survey = &ar->survey[idx];
1302 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
1303 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1304 survey->noise = noise_floor;
1305 survey->filled = SURVEY_INFO_CHANNEL_TIME |
1306 SURVEY_INFO_CHANNEL_TIME_RX |
1307 SURVEY_INFO_NOISE_DBM;
1308 }
1309
1310 ar->survey_last_rx_clear_count = rx_clear_count;
1311 ar->survey_last_cycle_count = cycle_count;
1312
1313exit:
1314 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1315}
1316
1317static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1318{
7aa7a72a 1319 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
5e3dd157
KV		 1320}
1321
869526b9 1322static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 1323{
7aa7a72a 1324 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
869526b9
KV		 1325 skb->len);
1326
d35a6c18 1327 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
869526b9
KV		 1328
1329 return 0;
5e3dd157
KV		 1330}
1331
1332static void ath10k_wmi_event_update_stats(struct ath10k *ar,
1333 struct sk_buff *skb)
1334{
1335 struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
1336
7aa7a72a 1337 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
5e3dd157
KV		 1338
1339 ath10k_debug_read_target_stats(ar, ev);
1340}
1341
1342static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
1343 struct sk_buff *skb)
1344{
1345 struct wmi_vdev_start_response_event *ev;
1346
7aa7a72a 1347 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
5e3dd157
KV		 1348
1349 ev = (struct wmi_vdev_start_response_event *)skb->data;
1350
1351 if (WARN_ON(__le32_to_cpu(ev->status)))
1352 return;
1353
1354 complete(&ar->vdev_setup_done);
1355}
1356
1357static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
1358 struct sk_buff *skb)
1359{
7aa7a72a 1360 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
5e3dd157
KV		 1361 complete(&ar->vdev_setup_done);
1362}
1363
1364static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
1365 struct sk_buff *skb)
1366{
5a13e76e
KV		 1367 struct wmi_peer_sta_kickout_event *ev;
1368 struct ieee80211_sta *sta;
1369
1370 ev = (struct wmi_peer_sta_kickout_event *)skb->data;
1371
7aa7a72a 1372 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
5a13e76e
KV		 1373 ev->peer_macaddr.addr);
1374
1375 rcu_read_lock();
1376
1377 sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL);
1378 if (!sta) {
7aa7a72a 1379 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
5a13e76e
KV		 1380 ev->peer_macaddr.addr);
1381 goto exit;
1382 }
1383
1384 ieee80211_report_low_ack(sta, 10);
1385
1386exit:
1387 rcu_read_unlock();
5e3dd157
KV		 1388}
1389
1390/*
1391 * FIXME
1392 *
1393 * We don't report to mac80211 sleep state of connected
1394 * stations. Due to this mac80211 can't fill in TIM IE
1395 * correctly.
1396 *
1397 * I know of no way of getting nullfunc frames that contain
1398 * sleep transition from connected stations - these do not
1399 * seem to be sent from the target to the host. There also
1400 * doesn't seem to be a dedicated event for that. So the
1401 * only way left to do this would be to read tim_bitmap
1402 * during SWBA.
1403 *
1404 * We could probably try using tim_bitmap from SWBA to tell
1405 * mac80211 which stations are asleep and which are not. The
1406 * problem here is calling mac80211 functions so many times
1407 * could take too long and make us miss the time to submit
1408 * the beacon to the target.
1409 *
1410 * So as a workaround we try to extend the TIM IE if there
1411 * is unicast buffered for stations with aid > 7 and fill it
1412 * in ourselves.
1413 */
1414static void ath10k_wmi_update_tim(struct ath10k *ar,
1415 struct ath10k_vif *arvif,
1416 struct sk_buff *bcn,
1417 struct wmi_bcn_info *bcn_info)
1418{
1419 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
1420 struct ieee80211_tim_ie *tim;
1421 u8 *ies, *ie;
1422 u8 ie_len, pvm_len;
af762c0b
KV		 1423 __le32 t;
1424 u32 v;
5e3dd157
KV		 1425
1426 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
1427 * we must copy the bitmap upon change and reuse it later */
1428 if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
1429 int i;
1430
1431 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
1432 sizeof(bcn_info->tim_info.tim_bitmap));
1433
1434 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
af762c0b
KV		 1435 t = bcn_info->tim_info.tim_bitmap[i / 4];
1436 v = __le32_to_cpu(t);
5e3dd157
KV		 1437 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
1438 }
1439
1440 /* FW reports either length 0 or 16
1441 * so we calculate this on our own */
1442 arvif->u.ap.tim_len = 0;
1443 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
1444 if (arvif->u.ap.tim_bitmap[i])
1445 arvif->u.ap.tim_len = i;
1446
1447 arvif->u.ap.tim_len++;
1448 }
1449
1450 ies = bcn->data;
1451 ies += ieee80211_hdrlen(hdr->frame_control);
1452 ies += 12; /* fixed parameters */
1453
1454 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
1455 (u8 *)skb_tail_pointer(bcn) - ies);
1456 if (!ie) {
09af8f85 1457 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
7aa7a72a 1458 ath10k_warn(ar, "no tim ie found;\n");
5e3dd157
KV		 1459 return;
1460 }
1461
1462 tim = (void *)ie + 2;
1463 ie_len = ie[1];
1464 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
1465
1466 if (pvm_len < arvif->u.ap.tim_len) {
1467 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
1468 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
1469 void *next_ie = ie + 2 + ie_len;
1470
1471 if (skb_put(bcn, expand_size)) {
1472 memmove(next_ie + expand_size, next_ie, move_size);
1473
1474 ie[1] += expand_size;
1475 ie_len += expand_size;
1476 pvm_len += expand_size;
1477 } else {
7aa7a72a 1478 ath10k_warn(ar, "tim expansion failed\n");
5e3dd157
KV		 1479 }
1480 }
1481
1482 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
7aa7a72a 1483 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
5e3dd157
KV		 1484 return;
1485 }
1486
1487 tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
1488 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
1489
748afc47
MK		 1490 if (tim->dtim_count == 0) {
1491 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
1492
1493 if (__le32_to_cpu(bcn_info->tim_info.tim_mcast) == 1)
1494 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
1495 }
1496
7aa7a72a 1497 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
5e3dd157
KV		 1498 tim->dtim_count, tim->dtim_period,
1499 tim->bitmap_ctrl, pvm_len);
1500}
1501
1502static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
1503 struct wmi_p2p_noa_info *noa)
1504{
1505 struct ieee80211_p2p_noa_attr *noa_attr;
1506 u8 ctwindow_oppps = noa->ctwindow_oppps;
1507 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
1508 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
1509 __le16 *noa_attr_len;
1510 u16 attr_len;
1511 u8 noa_descriptors = noa->num_descriptors;
1512 int i;
1513
1514 /* P2P IE */
1515 data[0] = WLAN_EID_VENDOR_SPECIFIC;
1516 data[1] = len - 2;
1517 data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
1518 data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
1519 data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
1520 data[5] = WLAN_OUI_TYPE_WFA_P2P;
1521
1522 /* NOA ATTR */
1523 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
1524 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
1525 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
1526
1527 noa_attr->index = noa->index;
1528 noa_attr->oppps_ctwindow = ctwindow;
1529 if (oppps)
1530 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
1531
1532 for (i = 0; i < noa_descriptors; i++) {
1533 noa_attr->desc[i].count =
1534 __le32_to_cpu(noa->descriptors[i].type_count);
1535 noa_attr->desc[i].duration = noa->descriptors[i].duration;
1536 noa_attr->desc[i].interval = noa->descriptors[i].interval;
1537 noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
1538 }
1539
1540 attr_len = 2; /* index + oppps_ctwindow */
1541 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1542 *noa_attr_len = __cpu_to_le16(attr_len);
1543}
1544
1545static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
1546{
1547 u32 len = 0;
1548 u8 noa_descriptors = noa->num_descriptors;
1549 u8 opp_ps_info = noa->ctwindow_oppps;
1550 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
1551
5e3dd157
KV		 1552 if (!noa_descriptors && !opps_enabled)
1553 return len;
1554
1555 len += 1 + 1 + 4; /* EID + len + OUI */
1556 len += 1 + 2; /* noa attr + attr len */
1557 len += 1 + 1; /* index + oppps_ctwindow */
1558 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1559
1560 return len;
1561}
1562
1563static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
1564 struct sk_buff *bcn,
1565 struct wmi_bcn_info *bcn_info)
1566{
1567 struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
1568 u8 *new_data, *old_data = arvif->u.ap.noa_data;
1569 u32 new_len;
1570
1571 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
1572 return;
1573
7aa7a72a 1574 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
5e3dd157
KV		 1575 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
1576 new_len = ath10k_p2p_calc_noa_ie_len(noa);
1577 if (!new_len)
1578 goto cleanup;
1579
1580 new_data = kmalloc(new_len, GFP_ATOMIC);
1581 if (!new_data)
1582 goto cleanup;
1583
1584 ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
1585
1586 spin_lock_bh(&ar->data_lock);
1587 arvif->u.ap.noa_data = new_data;
1588 arvif->u.ap.noa_len = new_len;
1589 spin_unlock_bh(&ar->data_lock);
1590 kfree(old_data);
1591 }
1592
1593 if (arvif->u.ap.noa_data)
1594 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
1595 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
1596 arvif->u.ap.noa_data,
1597 arvif->u.ap.noa_len);
1598 return;
1599
1600cleanup:
1601 spin_lock_bh(&ar->data_lock);
1602 arvif->u.ap.noa_data = NULL;
1603 arvif->u.ap.noa_len = 0;
1604 spin_unlock_bh(&ar->data_lock);
1605 kfree(old_data);
1606}
1607
5e3dd157
KV		 1608static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
1609{
1610 struct wmi_host_swba_event *ev;
1611 u32 map;
1612 int i = -1;
1613 struct wmi_bcn_info *bcn_info;
1614 struct ath10k_vif *arvif;
5e3dd157 1615 struct sk_buff *bcn;
64badcb6 1616 dma_addr_t paddr;
767d34fc 1617 int ret, vdev_id = 0;
5e3dd157 1618
5e3dd157
KV		 1619 ev = (struct wmi_host_swba_event *)skb->data;
1620 map = __le32_to_cpu(ev->vdev_map);
1621
7aa7a72a 1622 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
5e3dd157
KV		 1623 ev->vdev_map);
1624
1625 for (; map; map >>= 1, vdev_id++) {
1626 if (!(map & 0x1))
1627 continue;
1628
1629 i++;
1630
1631 if (i >= WMI_MAX_AP_VDEV) {
7aa7a72a 1632 ath10k_warn(ar, "swba has corrupted vdev map\n");
5e3dd157
KV		 1633 break;
1634 }
1635
1636 bcn_info = &ev->bcn_info[i];
1637
7aa7a72a 1638 ath10k_dbg(ar, ATH10K_DBG_MGMT,
7a8a396b 1639 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
5e3dd157
KV		 1640 i,
1641 __le32_to_cpu(bcn_info->tim_info.tim_len),
1642 __le32_to_cpu(bcn_info->tim_info.tim_mcast),
1643 __le32_to_cpu(bcn_info->tim_info.tim_changed),
1644 __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
1645 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
1646 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
1647 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
1648 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
1649
1650 arvif = ath10k_get_arvif(ar, vdev_id);
1651 if (arvif == NULL) {
7aa7a72a
MK		 1652 ath10k_warn(ar, "no vif for vdev_id %d found\n",
1653 vdev_id);
5e3dd157
KV		 1654 continue;
1655 }
1656
c2df44b3
MK		 1657 /* There are no completions for beacons so wait for next SWBA
1658 * before telling mac80211 to decrement CSA counter
1659 *
1660 * Once CSA counter is completed stop sending beacons until
1661 * actual channel switch is done */
1662 if (arvif->vif->csa_active &&
1663 ieee80211_csa_is_complete(arvif->vif)) {
1664 ieee80211_csa_finish(arvif->vif);
1665 continue;
1666 }
1667
5e3dd157
KV		 1668 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
1669 if (!bcn) {
7aa7a72a 1670 ath10k_warn(ar, "could not get mac80211 beacon\n");
5e3dd157
KV		 1671 continue;
1672 }
1673
4b604558 1674 ath10k_tx_h_seq_no(arvif->vif, bcn);
5e3dd157
KV		 1675 ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
1676 ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
1677
ed54388a 1678 spin_lock_bh(&ar->data_lock);
748afc47 1679
ed54388a 1680 if (arvif->beacon) {
748afc47 1681 if (!arvif->beacon_sent)
7aa7a72a 1682 ath10k_warn(ar, "SWBA overrun on vdev %d\n",
748afc47
MK		 1683 arvif->vdev_id);
1684
64badcb6 1685 ath10k_mac_vif_beacon_free(arvif);
ed54388a 1686 }
5e3dd157 1687
64badcb6
MK		 1688 if (!arvif->beacon_buf) {
1689 paddr = dma_map_single(arvif->ar->dev, bcn->data,
1690 bcn->len, DMA_TO_DEVICE);
1691 ret = dma_mapping_error(arvif->ar->dev, paddr);
1692 if (ret) {
1693 ath10k_warn(ar, "failed to map beacon: %d\n",
1694 ret);
1695 dev_kfree_skb_any(bcn);
1696 goto skip;
1697 }
1698
1699 ATH10K_SKB_CB(bcn)->paddr = paddr;
1700 } else {
1701 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
1702 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
1703 bcn->len, IEEE80211_MAX_FRAME_LEN);
1704 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
1705 }
1706 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
1707 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
767d34fc 1708 }
748afc47 1709
ed54388a 1710 arvif->beacon = bcn;
748afc47 1711 arvif->beacon_sent = false;
5e3dd157 1712
ed54388a 1713 ath10k_wmi_tx_beacon_nowait(arvif);
767d34fc 1714skip:
ed54388a 1715 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1716 }
1717}
1718
1719static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
1720 struct sk_buff *skb)
1721{
7aa7a72a 1722 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
5e3dd157
KV		 1723}
1724
9702c686
JD		 1725static void ath10k_dfs_radar_report(struct ath10k *ar,
1726 struct wmi_single_phyerr_rx_event *event,
1727 struct phyerr_radar_report *rr,
1728 u64 tsf)
1729{
1730 u32 reg0, reg1, tsf32l;
1731 struct pulse_event pe;
1732 u64 tsf64;
1733 u8 rssi, width;
1734
1735 reg0 = __le32_to_cpu(rr->reg0);
1736 reg1 = __le32_to_cpu(rr->reg1);
1737
7aa7a72a 1738 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1739 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
1740 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
1741 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
1742 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
1743 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
7aa7a72a 1744 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1745 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
1746 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
1747 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
1748 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
1749 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
1750 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
7aa7a72a 1751 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1752 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
1753 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
1754 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
1755
1756 if (!ar->dfs_detector)
1757 return;
1758
1759 /* report event to DFS pattern detector */
1760 tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
1761 tsf64 = tsf & (~0xFFFFFFFFULL);
1762 tsf64 |= tsf32l;
1763
1764 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
1765 rssi = event->hdr.rssi_combined;
1766
1767 /* hardware store this as 8 bit signed value,
1768 * set to zero if negative number
1769 */
1770 if (rssi & 0x80)
1771 rssi = 0;
1772
1773 pe.ts = tsf64;
1774 pe.freq = ar->hw->conf.chandef.chan->center_freq;
1775 pe.width = width;
1776 pe.rssi = rssi;
1777
7aa7a72a 1778 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1779 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
1780 pe.freq, pe.width, pe.rssi, pe.ts);
1781
1782 ATH10K_DFS_STAT_INC(ar, pulses_detected);
1783
1784 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
7aa7a72a 1785 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1786 "dfs no pulse pattern detected, yet\n");
1787 return;
1788 }
1789
7aa7a72a 1790 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
9702c686 1791 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP		 1792
1793 /* Control radar events reporting in debugfs file
1794 dfs_block_radar_events */
1795 if (ar->dfs_block_radar_events) {
7aa7a72a 1796 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
7d9b40b4
MP		 1797 return;
1798 }
1799
9702c686
JD		 1800 ieee80211_radar_detected(ar->hw);
1801}
1802
1803static int ath10k_dfs_fft_report(struct ath10k *ar,
1804 struct wmi_single_phyerr_rx_event *event,
1805 struct phyerr_fft_report *fftr,
1806 u64 tsf)
1807{
1808 u32 reg0, reg1;
1809 u8 rssi, peak_mag;
1810
1811 reg0 = __le32_to_cpu(fftr->reg0);
1812 reg1 = __le32_to_cpu(fftr->reg1);
1813 rssi = event->hdr.rssi_combined;
1814
7aa7a72a 1815 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1816 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
1817 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
1818 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
1819 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
1820 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
7aa7a72a 1821 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1822 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
1823 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
1824 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
1825 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
1826 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
1827
1828 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
1829
1830 /* false event detection */
1831 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
1832 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
7aa7a72a 1833 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
9702c686
JD		 1834 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
1835 return -EINVAL;
1836 }
1837
1838 return 0;
1839}
1840
1841static void ath10k_wmi_event_dfs(struct ath10k *ar,
1842 struct wmi_single_phyerr_rx_event *event,
1843 u64 tsf)
1844{
1845 int buf_len, tlv_len, res, i = 0;
1846 struct phyerr_tlv *tlv;
1847 struct phyerr_radar_report *rr;
1848 struct phyerr_fft_report *fftr;
1849 u8 *tlv_buf;
1850
1851 buf_len = __le32_to_cpu(event->hdr.buf_len);
7aa7a72a 1852 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1853 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
1854 event->hdr.phy_err_code, event->hdr.rssi_combined,
1855 __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
1856
1857 /* Skip event if DFS disabled */
1858 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
1859 return;
1860
1861 ATH10K_DFS_STAT_INC(ar, pulses_total);
1862
1863 while (i < buf_len) {
1864 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a
MK		 1865 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
1866 i);
9702c686
JD		 1867 return;
1868 }
1869
1870 tlv = (struct phyerr_tlv *)&event->bufp[i];
1871 tlv_len = __le16_to_cpu(tlv->len);
1872 tlv_buf = &event->bufp[i + sizeof(*tlv)];
7aa7a72a 1873 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1874 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
1875 tlv_len, tlv->tag, tlv->sig);
1876
1877 switch (tlv->tag) {
1878 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
1879 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
7aa7a72a 1880 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
9702c686
JD		 1881 i);
1882 return;
1883 }
1884
1885 rr = (struct phyerr_radar_report *)tlv_buf;
1886 ath10k_dfs_radar_report(ar, event, rr, tsf);
1887 break;
1888 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1889 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
7aa7a72a
MK		 1890 ath10k_warn(ar, "too short fft report (%d)\n",
1891 i);
9702c686
JD		 1892 return;
1893 }
1894
1895 fftr = (struct phyerr_fft_report *)tlv_buf;
1896 res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
1897 if (res)
1898 return;
1899 break;
1900 }
1901
1902 i += sizeof(*tlv) + tlv_len;
1903 }
1904}
1905
5b07e07f
KV		 1906static void
1907ath10k_wmi_event_spectral_scan(struct ath10k *ar,
1908 struct wmi_single_phyerr_rx_event *event,
1909 u64 tsf)
9702c686 1910{
855aed12
SW		 1911 int buf_len, tlv_len, res, i = 0;
1912 struct phyerr_tlv *tlv;
1913 u8 *tlv_buf;
1914 struct phyerr_fft_report *fftr;
1915 size_t fftr_len;
1916
1917 buf_len = __le32_to_cpu(event->hdr.buf_len);
1918
1919 while (i < buf_len) {
1920 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a 1921 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
855aed12
SW		 1922 i);
1923 return;
1924 }
1925
1926 tlv = (struct phyerr_tlv *)&event->bufp[i];
1927 tlv_len = __le16_to_cpu(tlv->len);
1928 tlv_buf = &event->bufp[i + sizeof(*tlv)];
1929
1930 if (i + sizeof(*tlv) + tlv_len > buf_len) {
7aa7a72a 1931 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
855aed12
SW		 1932 i);
1933 return;
1934 }
1935
1936 switch (tlv->tag) {
1937 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1938 if (sizeof(*fftr) > tlv_len) {
7aa7a72a 1939 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
855aed12
SW		 1940 i);
1941 return;
1942 }
1943
1944 fftr_len = tlv_len - sizeof(*fftr);
1945 fftr = (struct phyerr_fft_report *)tlv_buf;
1946 res = ath10k_spectral_process_fft(ar, event,
1947 fftr, fftr_len,
1948 tsf);
1949 if (res < 0) {
7aa7a72a 1950 ath10k_warn(ar, "failed to process fft report: %d\n",
855aed12
SW		 1951 res);
1952 return;
1953 }
1954 break;
1955 }
1956
1957 i += sizeof(*tlv) + tlv_len;
1958 }
9702c686
JD		 1959}
1960
5e3dd157
KV		 1961static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
1962{
9702c686
JD		 1963 struct wmi_comb_phyerr_rx_event *comb_event;
1964 struct wmi_single_phyerr_rx_event *event;
1965 u32 count, i, buf_len, phy_err_code;
1966 u64 tsf;
1967 int left_len = skb->len;
1968
1969 ATH10K_DFS_STAT_INC(ar, phy_errors);
1970
1971 /* Check if combined event available */
1972 if (left_len < sizeof(*comb_event)) {
7aa7a72a 1973 ath10k_warn(ar, "wmi phyerr combined event wrong len\n");
9702c686
JD		 1974 return;
1975 }
1976
1977 left_len -= sizeof(*comb_event);
1978
1979 /* Check number of included events */
1980 comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
1981 count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
1982
1983 tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
1984 tsf <<= 32;
1985 tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
1986
7aa7a72a 1987 ath10k_dbg(ar, ATH10K_DBG_WMI,
9702c686
JD		 1988 "wmi event phyerr count %d tsf64 0x%llX\n",
1989 count, tsf);
1990
1991 event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
1992 for (i = 0; i < count; i++) {
1993 /* Check if we can read event header */
1994 if (left_len < sizeof(*event)) {
7aa7a72a
MK		 1995 ath10k_warn(ar, "single event (%d) wrong head len\n",
1996 i);
9702c686
JD		 1997 return;
1998 }
1999
2000 left_len -= sizeof(*event);
2001
2002 buf_len = __le32_to_cpu(event->hdr.buf_len);
2003 phy_err_code = event->hdr.phy_err_code;
2004
2005 if (left_len < buf_len) {
7aa7a72a 2006 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
9702c686
JD		 2007 return;
2008 }
2009
2010 left_len -= buf_len;
2011
2012 switch (phy_err_code) {
2013 case PHY_ERROR_RADAR:
2014 ath10k_wmi_event_dfs(ar, event, tsf);
2015 break;
2016 case PHY_ERROR_SPECTRAL_SCAN:
2017 ath10k_wmi_event_spectral_scan(ar, event, tsf);
2018 break;
2019 case PHY_ERROR_FALSE_RADAR_EXT:
2020 ath10k_wmi_event_dfs(ar, event, tsf);
2021 ath10k_wmi_event_spectral_scan(ar, event, tsf);
2022 break;
2023 default:
2024 break;
2025 }
2026
2027 event += sizeof(*event) + buf_len;
2028 }
5e3dd157
KV		 2029}
2030
2031static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
2032{
7aa7a72a 2033 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
5e3dd157
KV		 2034}
2035
2036static void ath10k_wmi_event_profile_match(struct ath10k *ar,
5b07e07f 2037 struct sk_buff *skb)
5e3dd157 2038{
7aa7a72a 2039 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
5e3dd157
KV		 2040}
2041
2042static void ath10k_wmi_event_debug_print(struct ath10k *ar,
2fe5288c 2043 struct sk_buff *skb)
5e3dd157 2044{
2fe5288c
KV		 2045 char buf[101], c;
2046 int i;
2047
2048 for (i = 0; i < sizeof(buf) - 1; i++) {
2049 if (i >= skb->len)
2050 break;
2051
2052 c = skb->data[i];
2053
2054 if (c == '\0')
2055 break;
2056
2057 if (isascii(c) && isprint(c))
2058 buf[i] = c;
2059 else
2060 buf[i] = '.';
2061 }
2062
2063 if (i == sizeof(buf) - 1)
7aa7a72a 2064 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2fe5288c
KV		 2065
2066 /* for some reason the debug prints end with \n, remove that */
2067 if (skb->data[i - 1] == '\n')
2068 i--;
2069
2070 /* the last byte is always reserved for the null character */
2071 buf[i] = '\0';
2072
7aa7a72a 2073 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf);
5e3dd157
KV		 2074}
2075
2076static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
2077{
7aa7a72a 2078 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
5e3dd157
KV		 2079}
2080
2081static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
2082 struct sk_buff *skb)
2083{
7aa7a72a 2084 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
5e3dd157
KV		 2085}
2086
2087static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
5b07e07f 2088 struct sk_buff *skb)
5e3dd157 2089{
7aa7a72a 2090 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 2091}
2092
2093static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
5b07e07f 2094 struct sk_buff *skb)
5e3dd157 2095{
7aa7a72a 2096 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 2097}
2098
2099static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
2100 struct sk_buff *skb)
2101{
7aa7a72a 2102 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
5e3dd157
KV		 2103}
2104
2105static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
2106 struct sk_buff *skb)
2107{
7aa7a72a 2108 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
5e3dd157
KV		 2109}
2110
2111static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
2112 struct sk_buff *skb)
2113{
7aa7a72a 2114 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
5e3dd157
KV		 2115}
2116
2117static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
2118 struct sk_buff *skb)
2119{
7aa7a72a 2120 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
5e3dd157
KV		 2121}
2122
2123static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
2124 struct sk_buff *skb)
2125{
7aa7a72a 2126 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5e3dd157
KV		 2127}
2128
2129static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
5b07e07f 2130 struct sk_buff *skb)
5e3dd157 2131{
7aa7a72a 2132 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5e3dd157
KV		 2133}
2134
2135static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
2136 struct sk_buff *skb)
2137{
7aa7a72a 2138 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5e3dd157
KV		 2139}
2140
2141static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
2142 struct sk_buff *skb)
2143{
7aa7a72a 2144 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 2145}
2146
2147static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
2148 struct sk_buff *skb)
2149{
7aa7a72a 2150 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 2151}
2152
2153static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
5b07e07f 2154 struct sk_buff *skb)
5e3dd157 2155{
7aa7a72a 2156 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5e3dd157
KV		 2157}
2158
8a6618b0
BM		 2159static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
2160 struct sk_buff *skb)
2161{
7aa7a72a 2162 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
8a6618b0
BM		 2163}
2164
2165static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
2166 struct sk_buff *skb)
2167{
7aa7a72a 2168 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
8a6618b0
BM		 2169}
2170
2171static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
2172 struct sk_buff *skb)
2173{
7aa7a72a 2174 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
8a6618b0
BM		 2175}
2176
b3effe61 2177static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
5b07e07f 2178 u32 num_units, u32 unit_len)
b3effe61
BM		 2179{
2180 dma_addr_t paddr;
2181 u32 pool_size;
2182 int idx = ar->wmi.num_mem_chunks;
2183
2184 pool_size = num_units * round_up(unit_len, 4);
2185
2186 if (!pool_size)
2187 return -EINVAL;
2188
2189 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
2190 pool_size,
2191 &paddr,
2192 GFP_ATOMIC);
2193 if (!ar->wmi.mem_chunks[idx].vaddr) {
7aa7a72a 2194 ath10k_warn(ar, "failed to allocate memory chunk\n");
b3effe61
BM		 2195 return -ENOMEM;
2196 }
2197
2198 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
2199
2200 ar->wmi.mem_chunks[idx].paddr = paddr;
2201 ar->wmi.mem_chunks[idx].len = pool_size;
2202 ar->wmi.mem_chunks[idx].req_id = req_id;
2203 ar->wmi.num_mem_chunks++;
2204
2205 return 0;
2206}
2207
5e3dd157
KV		 2208static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
2209 struct sk_buff *skb)
2210{
2211 struct wmi_service_ready_event *ev = (void *)skb->data;
c4f8c836 2212 DECLARE_BITMAP(svc_bmap, WMI_SERVICE_MAX) = {};
5e3dd157
KV		 2213
2214 if (skb->len < sizeof(*ev)) {
7aa7a72a 2215 ath10k_warn(ar, "Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
5e3dd157
KV		 2216 skb->len, sizeof(*ev));
2217 return;
2218 }
2219
2220 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
2221 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
2222 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
2223 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
2224 ar->fw_version_major =
2225 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
2226 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
2227 ar->fw_version_release =
2228 (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
2229 ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
2230 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
8865bee4
MK		 2231 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
2232
1a222435
KV		 2233 /* only manually set fw features when not using FW IE format */
2234 if (ar->fw_api == 1 && ar->fw_version_build > 636)
0d9b0438
MK		 2235 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
2236
8865bee4 2237 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
7aa7a72a 2238 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
8865bee4
MK		 2239 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
2240 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
2241 }
5e3dd157 2242
fdb959c7
MK		 2243 ar->supp_tx_chainmask = (1 << ar->num_rf_chains) - 1;
2244 ar->supp_rx_chainmask = (1 << ar->num_rf_chains) - 1;
2245
5e3dd157
KV		 2246 ar->ath_common.regulatory.current_rd =
2247 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
2248
7a7b3732 2249 wmi_main_svc_map(ev->wmi_service_bitmap, svc_bmap);
cff990ce 2250 ath10k_debug_read_service_map(ar, svc_bmap, sizeof(svc_bmap));
7aa7a72a 2251 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
cff990ce 2252 ev->wmi_service_bitmap, sizeof(ev->wmi_service_bitmap));
5e3dd157
KV		 2253
2254 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2255 snprintf(ar->hw->wiphy->fw_version,
2256 sizeof(ar->hw->wiphy->fw_version),
2257 "%u.%u.%u.%u",
2258 ar->fw_version_major,
2259 ar->fw_version_minor,
2260 ar->fw_version_release,
2261 ar->fw_version_build);
2262 }
2263
2264 /* FIXME: it probably should be better to support this */
2265 if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
7aa7a72a 2266 ath10k_warn(ar, "target requested %d memory chunks; ignoring\n",
5e3dd157
KV		 2267 __le32_to_cpu(ev->num_mem_reqs));
2268 }
2269
7aa7a72a 2270 ath10k_dbg(ar, ATH10K_DBG_WMI,
8865bee4 2271 "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
5e3dd157
KV		 2272 __le32_to_cpu(ev->sw_version),
2273 __le32_to_cpu(ev->sw_version_1),
2274 __le32_to_cpu(ev->abi_version),
2275 __le32_to_cpu(ev->phy_capability),
2276 __le32_to_cpu(ev->ht_cap_info),
2277 __le32_to_cpu(ev->vht_cap_info),
2278 __le32_to_cpu(ev->vht_supp_mcs),
2279 __le32_to_cpu(ev->sys_cap_info),
8865bee4
MK		 2280 __le32_to_cpu(ev->num_mem_reqs),
2281 __le32_to_cpu(ev->num_rf_chains));
5e3dd157
KV		 2282
2283 complete(&ar->wmi.service_ready);
2284}
2285
6f97d256
BM		 2286static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar,
2287 struct sk_buff *skb)
2288{
b3effe61
BM		 2289 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
2290 int ret;
6f97d256 2291 struct wmi_service_ready_event_10x *ev = (void *)skb->data;
c4f8c836 2292 DECLARE_BITMAP(svc_bmap, WMI_SERVICE_MAX) = {};
6f97d256
BM		 2293
2294 if (skb->len < sizeof(*ev)) {
7aa7a72a 2295 ath10k_warn(ar, "Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
6f97d256
BM		 2296 skb->len, sizeof(*ev));
2297 return;
2298 }
2299
2300 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
2301 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
2302 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
2303 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
2304 ar->fw_version_major =
2305 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
2306 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
2307 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
2308 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
2309
2310 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
7aa7a72a 2311 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
6f97d256
BM		 2312 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
2313 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
2314 }
2315
fdb959c7
MK		 2316 ar->supp_tx_chainmask = (1 << ar->num_rf_chains) - 1;
2317 ar->supp_rx_chainmask = (1 << ar->num_rf_chains) - 1;
2318
6f97d256
BM		 2319 ar->ath_common.regulatory.current_rd =
2320 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
2321
7a7b3732 2322 wmi_10x_svc_map(ev->wmi_service_bitmap, svc_bmap);
cff990ce 2323 ath10k_debug_read_service_map(ar, svc_bmap, sizeof(svc_bmap));
7aa7a72a 2324 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
cff990ce 2325 ev->wmi_service_bitmap, sizeof(ev->wmi_service_bitmap));
6f97d256
BM		 2326
2327 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2328 snprintf(ar->hw->wiphy->fw_version,
2329 sizeof(ar->hw->wiphy->fw_version),
2330 "%u.%u",
2331 ar->fw_version_major,
2332 ar->fw_version_minor);
2333 }
2334
b3effe61
BM		 2335 num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs);
2336
2337 if (num_mem_reqs > ATH10K_MAX_MEM_REQS) {
7aa7a72a 2338 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
b3effe61
BM		 2339 num_mem_reqs);
2340 return;
6f97d256
BM		 2341 }
2342
b3effe61
BM		 2343 if (!num_mem_reqs)
2344 goto exit;
2345
7aa7a72a 2346 ath10k_dbg(ar, ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n",
b3effe61
BM		 2347 num_mem_reqs);
2348
2349 for (i = 0; i < num_mem_reqs; ++i) {
2350 req_id = __le32_to_cpu(ev->mem_reqs[i].req_id);
2351 num_units = __le32_to_cpu(ev->mem_reqs[i].num_units);
2352 unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size);
2353 num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info);
2354
2355 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
2356 /* number of units to allocate is number of
2357 * peers, 1 extra for self peer on target */
2358 /* this needs to be tied, host and target
2359 * can get out of sync */
ec6a73f0 2360 num_units = TARGET_10X_NUM_PEERS + 1;
b3effe61 2361 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
ec6a73f0 2362 num_units = TARGET_10X_NUM_VDEVS + 1;
b3effe61 2363
7aa7a72a 2364 ath10k_dbg(ar, ATH10K_DBG_WMI,
b3effe61
BM		 2365 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
2366 req_id,
2367 __le32_to_cpu(ev->mem_reqs[i].num_units),
2368 num_unit_info,
2369 unit_size,
2370 num_units);
2371
2372 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
2373 unit_size);
2374 if (ret)
2375 return;
2376 }
2377
2378exit:
7aa7a72a 2379 ath10k_dbg(ar, ATH10K_DBG_WMI,
6f97d256
BM		 2380 "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
2381 __le32_to_cpu(ev->sw_version),
2382 __le32_to_cpu(ev->abi_version),
2383 __le32_to_cpu(ev->phy_capability),
2384 __le32_to_cpu(ev->ht_cap_info),
2385 __le32_to_cpu(ev->vht_cap_info),
2386 __le32_to_cpu(ev->vht_supp_mcs),
2387 __le32_to_cpu(ev->sys_cap_info),
2388 __le32_to_cpu(ev->num_mem_reqs),
2389 __le32_to_cpu(ev->num_rf_chains));
2390
2391 complete(&ar->wmi.service_ready);
2392}
2393
5e3dd157
KV		 2394static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
2395{
2396 struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
2397
2398 if (WARN_ON(skb->len < sizeof(*ev)))
2399 return -EINVAL;
2400
b25f32cb 2401 ether_addr_copy(ar->mac_addr, ev->mac_addr.addr);
5e3dd157 2402
7aa7a72a 2403 ath10k_dbg(ar, ATH10K_DBG_WMI,
2c34752a 2404 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d skb->len %i ev-sz %zu\n",
5e3dd157
KV		 2405 __le32_to_cpu(ev->sw_version),
2406 __le32_to_cpu(ev->abi_version),
2407 ev->mac_addr.addr,
2c34752a 2408 __le32_to_cpu(ev->status), skb->len, sizeof(*ev));
5e3dd157
KV		 2409
2410 complete(&ar->wmi.unified_ready);
2411 return 0;
2412}
2413
ce42870e 2414static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 2415{
2416 struct wmi_cmd_hdr *cmd_hdr;
2417 enum wmi_event_id id;
5e3dd157
KV		 2418
2419 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2420 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2421
2422 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2423 return;
2424
d35a6c18 2425 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5e3dd157
KV		 2426
2427 switch (id) {
2428 case WMI_MGMT_RX_EVENTID:
2429 ath10k_wmi_event_mgmt_rx(ar, skb);
2430 /* mgmt_rx() owns the skb now! */
2431 return;
2432 case WMI_SCAN_EVENTID:
2433 ath10k_wmi_event_scan(ar, skb);
2434 break;
2435 case WMI_CHAN_INFO_EVENTID:
2436 ath10k_wmi_event_chan_info(ar, skb);
2437 break;
2438 case WMI_ECHO_EVENTID:
2439 ath10k_wmi_event_echo(ar, skb);
2440 break;
2441 case WMI_DEBUG_MESG_EVENTID:
2442 ath10k_wmi_event_debug_mesg(ar, skb);
2443 break;
2444 case WMI_UPDATE_STATS_EVENTID:
2445 ath10k_wmi_event_update_stats(ar, skb);
2446 break;
2447 case WMI_VDEV_START_RESP_EVENTID:
2448 ath10k_wmi_event_vdev_start_resp(ar, skb);
2449 break;
2450 case WMI_VDEV_STOPPED_EVENTID:
2451 ath10k_wmi_event_vdev_stopped(ar, skb);
2452 break;
2453 case WMI_PEER_STA_KICKOUT_EVENTID:
2454 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2455 break;
2456 case WMI_HOST_SWBA_EVENTID:
2457 ath10k_wmi_event_host_swba(ar, skb);
2458 break;
2459 case WMI_TBTTOFFSET_UPDATE_EVENTID:
2460 ath10k_wmi_event_tbttoffset_update(ar, skb);
2461 break;
2462 case WMI_PHYERR_EVENTID:
2463 ath10k_wmi_event_phyerr(ar, skb);
2464 break;
2465 case WMI_ROAM_EVENTID:
2466 ath10k_wmi_event_roam(ar, skb);
2467 break;
2468 case WMI_PROFILE_MATCH:
2469 ath10k_wmi_event_profile_match(ar, skb);
2470 break;
2471 case WMI_DEBUG_PRINT_EVENTID:
2472 ath10k_wmi_event_debug_print(ar, skb);
2473 break;
2474 case WMI_PDEV_QVIT_EVENTID:
2475 ath10k_wmi_event_pdev_qvit(ar, skb);
2476 break;
2477 case WMI_WLAN_PROFILE_DATA_EVENTID:
2478 ath10k_wmi_event_wlan_profile_data(ar, skb);
2479 break;
2480 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
2481 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2482 break;
2483 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
2484 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2485 break;
2486 case WMI_RTT_ERROR_REPORT_EVENTID:
2487 ath10k_wmi_event_rtt_error_report(ar, skb);
2488 break;
2489 case WMI_WOW_WAKEUP_HOST_EVENTID:
2490 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2491 break;
2492 case WMI_DCS_INTERFERENCE_EVENTID:
2493 ath10k_wmi_event_dcs_interference(ar, skb);
2494 break;
2495 case WMI_PDEV_TPC_CONFIG_EVENTID:
2496 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2497 break;
2498 case WMI_PDEV_FTM_INTG_EVENTID:
2499 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
2500 break;
2501 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
2502 ath10k_wmi_event_gtk_offload_status(ar, skb);
2503 break;
2504 case WMI_GTK_REKEY_FAIL_EVENTID:
2505 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
2506 break;
2507 case WMI_TX_DELBA_COMPLETE_EVENTID:
2508 ath10k_wmi_event_delba_complete(ar, skb);
2509 break;
2510 case WMI_TX_ADDBA_COMPLETE_EVENTID:
2511 ath10k_wmi_event_addba_complete(ar, skb);
2512 break;
2513 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
2514 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
2515 break;
2516 case WMI_SERVICE_READY_EVENTID:
2517 ath10k_wmi_service_ready_event_rx(ar, skb);
2518 break;
2519 case WMI_READY_EVENTID:
2520 ath10k_wmi_ready_event_rx(ar, skb);
2521 break;
2522 default:
7aa7a72a 2523 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5e3dd157
KV		 2524 break;
2525 }
2526
2527 dev_kfree_skb(skb);
2528}
2529
8a6618b0
BM		 2530static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
2531{
2532 struct wmi_cmd_hdr *cmd_hdr;
2533 enum wmi_10x_event_id id;
43d2a30f 2534 bool consumed;
8a6618b0
BM		 2535
2536 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2537 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2538
2539 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2540 return;
2541
d35a6c18 2542 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
8a6618b0 2543
43d2a30f
KV		 2544 consumed = ath10k_tm_event_wmi(ar, id, skb);
2545
2546 /* Ready event must be handled normally also in UTF mode so that we
2547 * know the UTF firmware has booted, others we are just bypass WMI
2548 * events to testmode.
2549 */
2550 if (consumed && id != WMI_10X_READY_EVENTID) {
2551 ath10k_dbg(ar, ATH10K_DBG_WMI,
2552 "wmi testmode consumed 0x%x\n", id);
2553 goto out;
2554 }
2555
8a6618b0
BM		 2556 switch (id) {
2557 case WMI_10X_MGMT_RX_EVENTID:
2558 ath10k_wmi_event_mgmt_rx(ar, skb);
2559 /* mgmt_rx() owns the skb now! */
2560 return;
2561 case WMI_10X_SCAN_EVENTID:
2562 ath10k_wmi_event_scan(ar, skb);
2563 break;
2564 case WMI_10X_CHAN_INFO_EVENTID:
2565 ath10k_wmi_event_chan_info(ar, skb);
2566 break;
2567 case WMI_10X_ECHO_EVENTID:
2568 ath10k_wmi_event_echo(ar, skb);
2569 break;
2570 case WMI_10X_DEBUG_MESG_EVENTID:
2571 ath10k_wmi_event_debug_mesg(ar, skb);
2572 break;
2573 case WMI_10X_UPDATE_STATS_EVENTID:
2574 ath10k_wmi_event_update_stats(ar, skb);
2575 break;
2576 case WMI_10X_VDEV_START_RESP_EVENTID:
2577 ath10k_wmi_event_vdev_start_resp(ar, skb);
2578 break;
2579 case WMI_10X_VDEV_STOPPED_EVENTID:
2580 ath10k_wmi_event_vdev_stopped(ar, skb);
2581 break;
2582 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
2583 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2584 break;
2585 case WMI_10X_HOST_SWBA_EVENTID:
2586 ath10k_wmi_event_host_swba(ar, skb);
2587 break;
2588 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
2589 ath10k_wmi_event_tbttoffset_update(ar, skb);
2590 break;
2591 case WMI_10X_PHYERR_EVENTID:
2592 ath10k_wmi_event_phyerr(ar, skb);
2593 break;
2594 case WMI_10X_ROAM_EVENTID:
2595 ath10k_wmi_event_roam(ar, skb);
2596 break;
2597 case WMI_10X_PROFILE_MATCH:
2598 ath10k_wmi_event_profile_match(ar, skb);
2599 break;
2600 case WMI_10X_DEBUG_PRINT_EVENTID:
2601 ath10k_wmi_event_debug_print(ar, skb);
2602 break;
2603 case WMI_10X_PDEV_QVIT_EVENTID:
2604 ath10k_wmi_event_pdev_qvit(ar, skb);
2605 break;
2606 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
2607 ath10k_wmi_event_wlan_profile_data(ar, skb);
2608 break;
2609 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
2610 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2611 break;
2612 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
2613 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2614 break;
2615 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
2616 ath10k_wmi_event_rtt_error_report(ar, skb);
2617 break;
2618 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
2619 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2620 break;
2621 case WMI_10X_DCS_INTERFERENCE_EVENTID:
2622 ath10k_wmi_event_dcs_interference(ar, skb);
2623 break;
2624 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
2625 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2626 break;
2627 case WMI_10X_INST_RSSI_STATS_EVENTID:
2628 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2629 break;
2630 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
2631 ath10k_wmi_event_vdev_standby_req(ar, skb);
2632 break;
2633 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
2634 ath10k_wmi_event_vdev_resume_req(ar, skb);
2635 break;
2636 case WMI_10X_SERVICE_READY_EVENTID:
6f97d256 2637 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
8a6618b0
BM		 2638 break;
2639 case WMI_10X_READY_EVENTID:
2640 ath10k_wmi_ready_event_rx(ar, skb);
2641 break;
43d2a30f
KV		 2642 case WMI_10X_PDEV_UTF_EVENTID:
2643 /* ignore utf events */
2644 break;
8a6618b0 2645 default:
7aa7a72a 2646 ath10k_warn(ar, "Unknown eventid: %d\n", id);
8a6618b0
BM		 2647 break;
2648 }
2649
43d2a30f 2650out:
8a6618b0
BM		 2651 dev_kfree_skb(skb);
2652}
2653
24c88f78
MK		 2654static void ath10k_wmi_10_2_process_rx(struct ath10k *ar, struct sk_buff *skb)
2655{
2656 struct wmi_cmd_hdr *cmd_hdr;
2657 enum wmi_10_2_event_id id;
2658
2659 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2660 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2661
2662 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2663 return;
2664
d35a6c18 2665 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
24c88f78
MK		 2666
2667 switch (id) {
2668 case WMI_10_2_MGMT_RX_EVENTID:
2669 ath10k_wmi_event_mgmt_rx(ar, skb);
2670 /* mgmt_rx() owns the skb now! */
2671 return;
2672 case WMI_10_2_SCAN_EVENTID:
2673 ath10k_wmi_event_scan(ar, skb);
2674 break;
2675 case WMI_10_2_CHAN_INFO_EVENTID:
2676 ath10k_wmi_event_chan_info(ar, skb);
2677 break;
2678 case WMI_10_2_ECHO_EVENTID:
2679 ath10k_wmi_event_echo(ar, skb);
2680 break;
2681 case WMI_10_2_DEBUG_MESG_EVENTID:
2682 ath10k_wmi_event_debug_mesg(ar, skb);
2683 break;
2684 case WMI_10_2_UPDATE_STATS_EVENTID:
2685 ath10k_wmi_event_update_stats(ar, skb);
2686 break;
2687 case WMI_10_2_VDEV_START_RESP_EVENTID:
2688 ath10k_wmi_event_vdev_start_resp(ar, skb);
2689 break;
2690 case WMI_10_2_VDEV_STOPPED_EVENTID:
2691 ath10k_wmi_event_vdev_stopped(ar, skb);
2692 break;
2693 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
2694 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2695 break;
2696 case WMI_10_2_HOST_SWBA_EVENTID:
2697 ath10k_wmi_event_host_swba(ar, skb);
2698 break;
2699 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
2700 ath10k_wmi_event_tbttoffset_update(ar, skb);
2701 break;
2702 case WMI_10_2_PHYERR_EVENTID:
2703 ath10k_wmi_event_phyerr(ar, skb);
2704 break;
2705 case WMI_10_2_ROAM_EVENTID:
2706 ath10k_wmi_event_roam(ar, skb);
2707 break;
2708 case WMI_10_2_PROFILE_MATCH:
2709 ath10k_wmi_event_profile_match(ar, skb);
2710 break;
2711 case WMI_10_2_DEBUG_PRINT_EVENTID:
2712 ath10k_wmi_event_debug_print(ar, skb);
2713 break;
2714 case WMI_10_2_PDEV_QVIT_EVENTID:
2715 ath10k_wmi_event_pdev_qvit(ar, skb);
2716 break;
2717 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
2718 ath10k_wmi_event_wlan_profile_data(ar, skb);
2719 break;
2720 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
2721 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2722 break;
2723 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
2724 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2725 break;
2726 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
2727 ath10k_wmi_event_rtt_error_report(ar, skb);
2728 break;
2729 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
2730 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2731 break;
2732 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
2733 ath10k_wmi_event_dcs_interference(ar, skb);
2734 break;
2735 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
2736 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2737 break;
2738 case WMI_10_2_INST_RSSI_STATS_EVENTID:
2739 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2740 break;
2741 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
2742 ath10k_wmi_event_vdev_standby_req(ar, skb);
2743 break;
2744 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
2745 ath10k_wmi_event_vdev_resume_req(ar, skb);
2746 break;
2747 case WMI_10_2_SERVICE_READY_EVENTID:
2748 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
2749 break;
2750 case WMI_10_2_READY_EVENTID:
2751 ath10k_wmi_ready_event_rx(ar, skb);
2752 break;
2753 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
2754 case WMI_10_2_GPIO_INPUT_EVENTID:
2755 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
2756 case WMI_10_2_GENERIC_BUFFER_EVENTID:
2757 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
2758 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
2759 case WMI_10_2_WDS_PEER_EVENTID:
7aa7a72a 2760 ath10k_dbg(ar, ATH10K_DBG_WMI,
24c88f78
MK		 2761 "received event id %d not implemented\n", id);
2762 break;
2763 default:
7aa7a72a 2764 ath10k_warn(ar, "Unknown eventid: %d\n", id);
24c88f78
MK		 2765 break;
2766 }
2767
2768 dev_kfree_skb(skb);
2769}
8a6618b0 2770
ce42870e
BM		 2771static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
2772{
24c88f78
MK		 2773 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
2774 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
2775 ath10k_wmi_10_2_process_rx(ar, skb);
2776 else
2777 ath10k_wmi_10x_process_rx(ar, skb);
2778 } else {
ce42870e 2779 ath10k_wmi_main_process_rx(ar, skb);
24c88f78 2780 }
ce42870e
BM		 2781}
2782
5e3dd157
KV		 2783/* WMI Initialization functions */
2784int ath10k_wmi_attach(struct ath10k *ar)
2785{
ce42870e 2786 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
24c88f78
MK		 2787 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
2788 ar->wmi.cmd = &wmi_10_2_cmd_map;
2789 else
2790 ar->wmi.cmd = &wmi_10x_cmd_map;
2791
6d1506e7 2792 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
226a339b 2793 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
ce42870e
BM		 2794 } else {
2795 ar->wmi.cmd = &wmi_cmd_map;
6d1506e7 2796 ar->wmi.vdev_param = &wmi_vdev_param_map;
226a339b 2797 ar->wmi.pdev_param = &wmi_pdev_param_map;
ce42870e
BM		 2798 }
2799
5e3dd157
KV		 2800 init_completion(&ar->wmi.service_ready);
2801 init_completion(&ar->wmi.unified_ready);
be8b3943 2802 init_waitqueue_head(&ar->wmi.tx_credits_wq);
5e3dd157
KV		 2803
2804 return 0;
2805}
2806
2807void ath10k_wmi_detach(struct ath10k *ar)
2808{
b3effe61
BM		 2809 int i;
2810
2811 /* free the host memory chunks requested by firmware */
2812 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2813 dma_free_coherent(ar->dev,
2814 ar->wmi.mem_chunks[i].len,
2815 ar->wmi.mem_chunks[i].vaddr,
2816 ar->wmi.mem_chunks[i].paddr);
2817 }
2818
2819 ar->wmi.num_mem_chunks = 0;
5e3dd157
KV		 2820}
2821
95bf21f9 2822int ath10k_wmi_connect(struct ath10k *ar)
5e3dd157
KV		 2823{
2824 int status;
2825 struct ath10k_htc_svc_conn_req conn_req;
2826 struct ath10k_htc_svc_conn_resp conn_resp;
2827
2828 memset(&conn_req, 0, sizeof(conn_req));
2829 memset(&conn_resp, 0, sizeof(conn_resp));
2830
2831 /* these fields are the same for all service endpoints */
2832 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
2833 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 2834 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV		 2835
2836 /* connect to control service */
2837 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
2838
cd003fad 2839 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157 2840 if (status) {
7aa7a72a 2841 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
5e3dd157
KV		 2842 status);
2843 return status;
2844 }
2845
2846 ar->wmi.eid = conn_resp.eid;
2847 return 0;
2848}
2849
821af6ae
MP		 2850static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2851 u16 rd2g, u16 rd5g, u16 ctl2g,
2852 u16 ctl5g)
5e3dd157
KV		 2853{
2854 struct wmi_pdev_set_regdomain_cmd *cmd;
2855 struct sk_buff *skb;
2856
7aa7a72a 2857 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 2858 if (!skb)
2859 return -ENOMEM;
2860
2861 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
2862 cmd->reg_domain = __cpu_to_le32(rd);
2863 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2864 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2865 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2866 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2867
7aa7a72a 2868 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 2869 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
2870 rd, rd2g, rd5g, ctl2g, ctl5g);
2871
ce42870e
BM		 2872 return ath10k_wmi_cmd_send(ar, skb,
2873 ar->wmi.cmd->pdev_set_regdomain_cmdid);
5e3dd157
KV		 2874}
2875
821af6ae
MP		 2876static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2877 u16 rd2g, u16 rd5g,
2878 u16 ctl2g, u16 ctl5g,
2879 enum wmi_dfs_region dfs_reg)
2880{
2881 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
2882 struct sk_buff *skb;
2883
7aa7a72a 2884 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
821af6ae
MP		 2885 if (!skb)
2886 return -ENOMEM;
2887
2888 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
2889 cmd->reg_domain = __cpu_to_le32(rd);
2890 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2891 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2892 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2893 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2894 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
2895
7aa7a72a 2896 ath10k_dbg(ar, ATH10K_DBG_WMI,
821af6ae
MP		 2897 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
2898 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
2899
2900 return ath10k_wmi_cmd_send(ar, skb,
2901 ar->wmi.cmd->pdev_set_regdomain_cmdid);
2902}
2903
2904int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
2905 u16 rd5g, u16 ctl2g, u16 ctl5g,
2906 enum wmi_dfs_region dfs_reg)
2907{
2908 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2909 return ath10k_wmi_10x_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2910 ctl2g, ctl5g, dfs_reg);
2911 else
2912 return ath10k_wmi_main_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2913 ctl2g, ctl5g);
2914}
2915
00f5482b 2916int ath10k_wmi_pdev_suspend_target(struct ath10k *ar, u32 suspend_opt)
5e3dd157
KV		 2917{
2918 struct wmi_pdev_suspend_cmd *cmd;
2919 struct sk_buff *skb;
2920
7aa7a72a 2921 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 2922 if (!skb)
2923 return -ENOMEM;
2924
2925 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
00f5482b 2926 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
5e3dd157 2927
ce42870e 2928 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
5e3dd157
KV		 2929}
2930
2931int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
2932{
2933 struct sk_buff *skb;
2934
7aa7a72a 2935 skb = ath10k_wmi_alloc_skb(ar, 0);
5e3dd157
KV		 2936 if (skb == NULL)
2937 return -ENOMEM;
2938
ce42870e 2939 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
5e3dd157
KV		 2940}
2941
226a339b 2942int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV		 2943{
2944 struct wmi_pdev_set_param_cmd *cmd;
2945 struct sk_buff *skb;
2946
226a339b 2947 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
7aa7a72a
MK		 2948 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
2949 id);
d544943a 2950 return -EOPNOTSUPP;
226a339b
BM		 2951 }
2952
7aa7a72a 2953 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 2954 if (!skb)
2955 return -ENOMEM;
2956
2957 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
2958 cmd->param_id = __cpu_to_le32(id);
2959 cmd->param_value = __cpu_to_le32(value);
2960
7aa7a72a 2961 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
5e3dd157 2962 id, value);
ce42870e 2963 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
5e3dd157
KV		 2964}
2965
12b2b9e3 2966static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
5e3dd157
KV		 2967{
2968 struct wmi_init_cmd *cmd;
2969 struct sk_buff *buf;
2970 struct wmi_resource_config config = {};
b3effe61
BM		 2971 u32 len, val;
2972 int i;
5e3dd157
KV		 2973
2974 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
2975 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
2976 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
2977
2978 config.num_offload_reorder_bufs =
2979 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
2980
2981 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
2982 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
2983 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
2984 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
2985 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
2986 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2987 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2988 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2989 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
2990 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
2991
2992 config.scan_max_pending_reqs =
2993 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
2994
2995 config.bmiss_offload_max_vdev =
2996 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
2997
2998 config.roam_offload_max_vdev =
2999 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
3000
3001 config.roam_offload_max_ap_profiles =
3002 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
3003
3004 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
3005 config.num_mcast_table_elems =
3006 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
3007
3008 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
3009 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
3010 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
3011 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
3012 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
3013
3014 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3015 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3016
3017 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
3018
3019 config.gtk_offload_max_vdev =
3020 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
3021
3022 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
3023 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
3024
b3effe61
BM		 3025 len = sizeof(*cmd) +
3026 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3027
7aa7a72a 3028 buf = ath10k_wmi_alloc_skb(ar, len);
5e3dd157
KV		 3029 if (!buf)
3030 return -ENOMEM;
3031
3032 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61
BM		 3033
3034 if (ar->wmi.num_mem_chunks == 0) {
3035 cmd->num_host_mem_chunks = 0;
3036 goto out;
3037 }
3038
7aa7a72a 3039 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
5c54a7bf 3040 ar->wmi.num_mem_chunks);
b3effe61
BM		 3041
3042 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
3043
3044 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3045 cmd->host_mem_chunks[i].ptr =
3046 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3047 cmd->host_mem_chunks[i].size =
3048 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3049 cmd->host_mem_chunks[i].req_id =
3050 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3051
7aa7a72a 3052 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c54a7bf 3053 "wmi chunk %d len %d requested, addr 0x%llx\n",
b3effe61 3054 i,
5c54a7bf
MK		 3055 ar->wmi.mem_chunks[i].len,
3056 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
b3effe61
BM		 3057 }
3058out:
5e3dd157
KV		 3059 memcpy(&cmd->resource_config, &config, sizeof(config));
3060
7aa7a72a 3061 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
ce42870e 3062 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
5e3dd157
KV		 3063}
3064
12b2b9e3
BM		 3065static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
3066{
3067 struct wmi_init_cmd_10x *cmd;
3068 struct sk_buff *buf;
3069 struct wmi_resource_config_10x config = {};
3070 u32 len, val;
3071 int i;
3072
ec6a73f0
BM		 3073 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3074 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3075 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3076 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3077 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3078 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3079 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3080 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3081 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3082 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3083 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3084 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
12b2b9e3
BM		 3085
3086 config.scan_max_pending_reqs =
ec6a73f0 3087 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM		 3088
3089 config.bmiss_offload_max_vdev =
ec6a73f0 3090 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 3091
3092 config.roam_offload_max_vdev =
ec6a73f0 3093 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 3094
3095 config.roam_offload_max_ap_profiles =
ec6a73f0 3096 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 3097
ec6a73f0 3098 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 3099 config.num_mcast_table_elems =
ec6a73f0 3100 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 3101
ec6a73f0
BM		 3102 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3103 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3104 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3105 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3106 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 3107
ec6a73f0 3108 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM		 3109 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3110
ec6a73f0 3111 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 3112
ec6a73f0
BM		 3113 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3114 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM		 3115
3116 len = sizeof(*cmd) +
3117 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3118
7aa7a72a 3119 buf = ath10k_wmi_alloc_skb(ar, len);
12b2b9e3
BM		 3120 if (!buf)
3121 return -ENOMEM;
3122
3123 cmd = (struct wmi_init_cmd_10x *)buf->data;
3124
3125 if (ar->wmi.num_mem_chunks == 0) {
3126 cmd->num_host_mem_chunks = 0;
3127 goto out;
3128 }
3129
7aa7a72a 3130 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
5c54a7bf 3131 ar->wmi.num_mem_chunks);
12b2b9e3
BM		 3132
3133 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
3134
3135 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3136 cmd->host_mem_chunks[i].ptr =
3137 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3138 cmd->host_mem_chunks[i].size =
3139 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3140 cmd->host_mem_chunks[i].req_id =
3141 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3142
7aa7a72a 3143 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c54a7bf 3144 "wmi chunk %d len %d requested, addr 0x%llx\n",
12b2b9e3 3145 i,
5c54a7bf
MK		 3146 ar->wmi.mem_chunks[i].len,
3147 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
12b2b9e3
BM		 3148 }
3149out:
3150 memcpy(&cmd->resource_config, &config, sizeof(config));
3151
7aa7a72a 3152 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
12b2b9e3
BM		 3153 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
3154}
3155
24c88f78
MK		 3156static int ath10k_wmi_10_2_cmd_init(struct ath10k *ar)
3157{
3158 struct wmi_init_cmd_10_2 *cmd;
3159 struct sk_buff *buf;
3160 struct wmi_resource_config_10x config = {};
3161 u32 len, val;
3162 int i;
3163
3164 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3165 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3166 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3167 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3168 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3169 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3170 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3171 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3172 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3173 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3174 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3175 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
3176
3177 config.scan_max_pending_reqs =
3178 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
3179
3180 config.bmiss_offload_max_vdev =
3181 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
3182
3183 config.roam_offload_max_vdev =
3184 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
3185
3186 config.roam_offload_max_ap_profiles =
3187 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
3188
3189 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
3190 config.num_mcast_table_elems =
3191 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
3192
3193 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3194 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3195 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3196 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3197 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
3198
3199 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3200 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3201
3202 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
3203
3204 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3205 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
3206
3207 len = sizeof(*cmd) +
3208 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3209
7aa7a72a 3210 buf = ath10k_wmi_alloc_skb(ar, len);
24c88f78
MK		 3211 if (!buf)
3212 return -ENOMEM;
3213
3214 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
3215
3216 if (ar->wmi.num_mem_chunks == 0) {
3217 cmd->num_host_mem_chunks = 0;
3218 goto out;
3219 }
3220
7aa7a72a 3221 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
24c88f78
MK		 3222 ar->wmi.num_mem_chunks);
3223
3224 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
3225
3226 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3227 cmd->host_mem_chunks[i].ptr =
3228 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3229 cmd->host_mem_chunks[i].size =
3230 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3231 cmd->host_mem_chunks[i].req_id =
3232 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3233
7aa7a72a 3234 ath10k_dbg(ar, ATH10K_DBG_WMI,
24c88f78
MK		 3235 "wmi chunk %d len %d requested, addr 0x%llx\n",
3236 i,
3237 ar->wmi.mem_chunks[i].len,
3238 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
3239 }
3240out:
3241 memcpy(&cmd->resource_config.common, &config, sizeof(config));
3242
7aa7a72a 3243 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
24c88f78
MK		 3244 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
3245}
3246
12b2b9e3
BM		 3247int ath10k_wmi_cmd_init(struct ath10k *ar)
3248{
3249 int ret;
3250
24c88f78
MK		 3251 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
3252 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
3253 ret = ath10k_wmi_10_2_cmd_init(ar);
3254 else
3255 ret = ath10k_wmi_10x_cmd_init(ar);
3256 } else {
12b2b9e3 3257 ret = ath10k_wmi_main_cmd_init(ar);
24c88f78 3258 }
12b2b9e3
BM		 3259
3260 return ret;
5e3dd157
KV		 3261}
3262
89b7e766
BM		 3263static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar,
3264 const struct wmi_start_scan_arg *arg)
5e3dd157
KV		 3265{
3266 int len;
3267
89b7e766
BM		 3268 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
3269 len = sizeof(struct wmi_start_scan_cmd_10x);
3270 else
3271 len = sizeof(struct wmi_start_scan_cmd);
5e3dd157
KV		 3272
3273 if (arg->ie_len) {
3274 if (!arg->ie)
3275 return -EINVAL;
3276 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
3277 return -EINVAL;
3278
3279 len += sizeof(struct wmi_ie_data);
3280 len += roundup(arg->ie_len, 4);
3281 }
3282
3283 if (arg->n_channels) {
3284 if (!arg->channels)
3285 return -EINVAL;
3286 if (arg->n_channels > ARRAY_SIZE(arg->channels))
3287 return -EINVAL;
3288
3289 len += sizeof(struct wmi_chan_list);
3290 len += sizeof(__le32) * arg->n_channels;
3291 }
3292
3293 if (arg->n_ssids) {
3294 if (!arg->ssids)
3295 return -EINVAL;
3296 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
3297 return -EINVAL;
3298
3299 len += sizeof(struct wmi_ssid_list);
3300 len += sizeof(struct wmi_ssid) * arg->n_ssids;
3301 }
3302
3303 if (arg->n_bssids) {
3304 if (!arg->bssids)
3305 return -EINVAL;
3306 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
3307 return -EINVAL;
3308
3309 len += sizeof(struct wmi_bssid_list);
3310 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
3311 }
3312
3313 return len;
3314}
3315
3316int ath10k_wmi_start_scan(struct ath10k *ar,
3317 const struct wmi_start_scan_arg *arg)
3318{
3319 struct wmi_start_scan_cmd *cmd;
3320 struct sk_buff *skb;
3321 struct wmi_ie_data *ie;
3322 struct wmi_chan_list *channels;
3323 struct wmi_ssid_list *ssids;
3324 struct wmi_bssid_list *bssids;
3325 u32 scan_id;
3326 u32 scan_req_id;
3327 int off;
3328 int len = 0;
3329 int i;
3330
89b7e766 3331 len = ath10k_wmi_start_scan_calc_len(ar, arg);
5e3dd157
KV		 3332 if (len < 0)
3333 return len; /* len contains error code here */
3334
7aa7a72a 3335 skb = ath10k_wmi_alloc_skb(ar, len);
5e3dd157
KV		 3336 if (!skb)
3337 return -ENOMEM;
3338
3339 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
3340 scan_id |= arg->scan_id;
3341
3342 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
3343 scan_req_id |= arg->scan_req_id;
3344
3345 cmd = (struct wmi_start_scan_cmd *)skb->data;
3346 cmd->scan_id = __cpu_to_le32(scan_id);
3347 cmd->scan_req_id = __cpu_to_le32(scan_req_id);
3348 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3349 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
3350 cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
3351 cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
3352 cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
3353 cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
3354 cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
3355 cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
3356 cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
3357 cmd->idle_time = __cpu_to_le32(arg->idle_time);
3358 cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
3359 cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
3360 cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
3361
3362 /* TLV list starts after fields included in the struct */
89b7e766
BM		 3363 /* There's just one filed that differes the two start_scan
3364 * structures - burst_duration, which we are not using btw,
3365 no point to make the split here, just shift the buffer to fit with
3366 given FW */
3367 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
3368 off = sizeof(struct wmi_start_scan_cmd_10x);
3369 else
3370 off = sizeof(struct wmi_start_scan_cmd);
5e3dd157
KV		 3371
3372 if (arg->n_channels) {
3373 channels = (void *)skb->data + off;
3374 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
3375 channels->num_chan = __cpu_to_le32(arg->n_channels);
3376
3377 for (i = 0; i < arg->n_channels; i++)
24c88f78
MK		 3378 channels->channel_list[i].freq =
3379 __cpu_to_le16(arg->channels[i]);
5e3dd157
KV		 3380
3381 off += sizeof(*channels);
3382 off += sizeof(__le32) * arg->n_channels;
3383 }
3384
3385 if (arg->n_ssids) {
3386 ssids = (void *)skb->data + off;
3387 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
3388 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
3389
3390 for (i = 0; i < arg->n_ssids; i++) {
3391 ssids->ssids[i].ssid_len =
3392 __cpu_to_le32(arg->ssids[i].len);
3393 memcpy(&ssids->ssids[i].ssid,
3394 arg->ssids[i].ssid,
3395 arg->ssids[i].len);
3396 }
3397
3398 off += sizeof(*ssids);
3399 off += sizeof(struct wmi_ssid) * arg->n_ssids;
3400 }
3401
3402 if (arg->n_bssids) {
3403 bssids = (void *)skb->data + off;
3404 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
3405 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
3406
3407 for (i = 0; i < arg->n_bssids; i++)
3408 memcpy(&bssids->bssid_list[i],
3409 arg->bssids[i].bssid,
3410 ETH_ALEN);
3411
3412 off += sizeof(*bssids);
3413 off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
3414 }
3415
3416 if (arg->ie_len) {
3417 ie = (void *)skb->data + off;
3418 ie->tag = __cpu_to_le32(WMI_IE_TAG);
3419 ie->ie_len = __cpu_to_le32(arg->ie_len);
3420 memcpy(ie->ie_data, arg->ie, arg->ie_len);
3421
3422 off += sizeof(*ie);
3423 off += roundup(arg->ie_len, 4);
3424 }
3425
3426 if (off != skb->len) {
3427 dev_kfree_skb(skb);
3428 return -EINVAL;
3429 }
3430
7aa7a72a 3431 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
ce42870e 3432 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
5e3dd157
KV		 3433}
3434
3435void ath10k_wmi_start_scan_init(struct ath10k *ar,
3436 struct wmi_start_scan_arg *arg)
3437{
3438 /* setup commonly used values */
3439 arg->scan_req_id = 1;
3440 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
3441 arg->dwell_time_active = 50;
3442 arg->dwell_time_passive = 150;
3443 arg->min_rest_time = 50;
3444 arg->max_rest_time = 500;
3445 arg->repeat_probe_time = 0;
3446 arg->probe_spacing_time = 0;
3447 arg->idle_time = 0;
c322892f 3448 arg->max_scan_time = 20000;
5e3dd157
KV		 3449 arg->probe_delay = 5;
3450 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
3451 | WMI_SCAN_EVENT_COMPLETED
3452 | WMI_SCAN_EVENT_BSS_CHANNEL
3453 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
3454 | WMI_SCAN_EVENT_DEQUEUED;
3455 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
3456 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
3457 arg->n_bssids = 1;
3458 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
3459}
3460
3461int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
3462{
3463 struct wmi_stop_scan_cmd *cmd;
3464 struct sk_buff *skb;
3465 u32 scan_id;
3466 u32 req_id;
3467
3468 if (arg->req_id > 0xFFF)
3469 return -EINVAL;
3470 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
3471 return -EINVAL;
3472
7aa7a72a 3473 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3474 if (!skb)
3475 return -ENOMEM;
3476
3477 scan_id = arg->u.scan_id;
3478 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
3479
3480 req_id = arg->req_id;
3481 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
3482
3483 cmd = (struct wmi_stop_scan_cmd *)skb->data;
3484 cmd->req_type = __cpu_to_le32(arg->req_type);
3485 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
3486 cmd->scan_id = __cpu_to_le32(scan_id);
3487 cmd->scan_req_id = __cpu_to_le32(req_id);
3488
7aa7a72a 3489 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3490 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
3491 arg->req_id, arg->req_type, arg->u.scan_id);
ce42870e 3492 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
5e3dd157
KV		 3493}
3494
3495int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
3496 enum wmi_vdev_type type,
3497 enum wmi_vdev_subtype subtype,
3498 const u8 macaddr[ETH_ALEN])
3499{
3500 struct wmi_vdev_create_cmd *cmd;
3501 struct sk_buff *skb;
3502
7aa7a72a 3503 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3504 if (!skb)
3505 return -ENOMEM;
3506
3507 cmd = (struct wmi_vdev_create_cmd *)skb->data;
3508 cmd->vdev_id = __cpu_to_le32(vdev_id);
3509 cmd->vdev_type = __cpu_to_le32(type);
3510 cmd->vdev_subtype = __cpu_to_le32(subtype);
b25f32cb 3511 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
5e3dd157 3512
7aa7a72a 3513 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3514 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
3515 vdev_id, type, subtype, macaddr);
3516
ce42870e 3517 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
5e3dd157
KV		 3518}
3519
3520int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
3521{
3522 struct wmi_vdev_delete_cmd *cmd;
3523 struct sk_buff *skb;
3524
7aa7a72a 3525 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3526 if (!skb)
3527 return -ENOMEM;
3528
3529 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
3530 cmd->vdev_id = __cpu_to_le32(vdev_id);
3531
7aa7a72a 3532 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3533 "WMI vdev delete id %d\n", vdev_id);
3534
ce42870e 3535 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
5e3dd157
KV		 3536}
3537
5b07e07f
KV		 3538static int
3539ath10k_wmi_vdev_start_restart(struct ath10k *ar,
3540 const struct wmi_vdev_start_request_arg *arg,
3541 u32 cmd_id)
5e3dd157
KV		 3542{
3543 struct wmi_vdev_start_request_cmd *cmd;
3544 struct sk_buff *skb;
3545 const char *cmdname;
3546 u32 flags = 0;
3547
ce42870e
BM		 3548 if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
3549 cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 3550 return -EINVAL;
3551 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
3552 return -EINVAL;
3553 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
3554 return -EINVAL;
3555 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
3556 return -EINVAL;
3557
ce42870e 3558 if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
5e3dd157 3559 cmdname = "start";
ce42870e 3560 else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 3561 cmdname = "restart";
3562 else
3563 return -EINVAL; /* should not happen, we already check cmd_id */
3564
7aa7a72a 3565 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3566 if (!skb)
3567 return -ENOMEM;
3568
3569 if (arg->hidden_ssid)
3570 flags |= WMI_VDEV_START_HIDDEN_SSID;
3571 if (arg->pmf_enabled)
3572 flags |= WMI_VDEV_START_PMF_ENABLED;
3573
3574 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
3575 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3576 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
3577 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
3578 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
3579 cmd->flags = __cpu_to_le32(flags);
3580 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
3581 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
3582
3583 if (arg->ssid) {
3584 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
3585 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
3586 }
3587
2d66721c 3588 ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
5e3dd157 3589
7aa7a72a 3590 ath10k_dbg(ar, ATH10K_DBG_WMI,
8cc7f26c
KV		 3591 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
3592 cmdname, arg->vdev_id,
e8a50f8b
MP		 3593 flags, arg->channel.freq, arg->channel.mode,
3594 cmd->chan.flags, arg->channel.max_power);
5e3dd157
KV		 3595
3596 return ath10k_wmi_cmd_send(ar, skb, cmd_id);
3597}
3598
3599int ath10k_wmi_vdev_start(struct ath10k *ar,
3600 const struct wmi_vdev_start_request_arg *arg)
3601{
ce42870e
BM		 3602 u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
3603
3604 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3605}
3606
3607int ath10k_wmi_vdev_restart(struct ath10k *ar,
5b07e07f 3608 const struct wmi_vdev_start_request_arg *arg)
5e3dd157 3609{
ce42870e
BM		 3610 u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
3611
3612 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3613}
3614
3615int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
3616{
3617 struct wmi_vdev_stop_cmd *cmd;
3618 struct sk_buff *skb;
3619
7aa7a72a 3620 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3621 if (!skb)
3622 return -ENOMEM;
3623
3624 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
3625 cmd->vdev_id = __cpu_to_le32(vdev_id);
3626
7aa7a72a 3627 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
5e3dd157 3628
ce42870e 3629 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
5e3dd157
KV		 3630}
3631
3632int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
3633{
3634 struct wmi_vdev_up_cmd *cmd;
3635 struct sk_buff *skb;
3636
7aa7a72a 3637 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3638 if (!skb)
3639 return -ENOMEM;
3640
3641 cmd = (struct wmi_vdev_up_cmd *)skb->data;
3642 cmd->vdev_id = __cpu_to_le32(vdev_id);
3643 cmd->vdev_assoc_id = __cpu_to_le32(aid);
b25f32cb 3644 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
5e3dd157 3645
7aa7a72a 3646 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3647 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
3648 vdev_id, aid, bssid);
3649
ce42870e 3650 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
5e3dd157
KV		 3651}
3652
3653int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
3654{
3655 struct wmi_vdev_down_cmd *cmd;
3656 struct sk_buff *skb;
3657
7aa7a72a 3658 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3659 if (!skb)
3660 return -ENOMEM;
3661
3662 cmd = (struct wmi_vdev_down_cmd *)skb->data;
3663 cmd->vdev_id = __cpu_to_le32(vdev_id);
3664
7aa7a72a 3665 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3666 "wmi mgmt vdev down id 0x%x\n", vdev_id);
3667
ce42870e 3668 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
5e3dd157
KV		 3669}
3670
3671int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
6d1506e7 3672 u32 param_id, u32 param_value)
5e3dd157
KV		 3673{
3674 struct wmi_vdev_set_param_cmd *cmd;
3675 struct sk_buff *skb;
3676
6d1506e7 3677 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7aa7a72a 3678 ath10k_dbg(ar, ATH10K_DBG_WMI,
6d1506e7
BM		 3679 "vdev param %d not supported by firmware\n",
3680 param_id);
ebc9abdd 3681 return -EOPNOTSUPP;
6d1506e7
BM		 3682 }
3683
7aa7a72a 3684 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3685 if (!skb)
3686 return -ENOMEM;
3687
3688 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
3689 cmd->vdev_id = __cpu_to_le32(vdev_id);
3690 cmd->param_id = __cpu_to_le32(param_id);
3691 cmd->param_value = __cpu_to_le32(param_value);
3692
7aa7a72a 3693 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3694 "wmi vdev id 0x%x set param %d value %d\n",
3695 vdev_id, param_id, param_value);
3696
ce42870e 3697 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
5e3dd157
KV		 3698}
3699
3700int ath10k_wmi_vdev_install_key(struct ath10k *ar,
3701 const struct wmi_vdev_install_key_arg *arg)
3702{
3703 struct wmi_vdev_install_key_cmd *cmd;
3704 struct sk_buff *skb;
3705
3706 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
3707 return -EINVAL;
3708 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
3709 return -EINVAL;
3710
7aa7a72a 3711 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
5e3dd157
KV		 3712 if (!skb)
3713 return -ENOMEM;
3714
3715 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
3716 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3717 cmd->key_idx = __cpu_to_le32(arg->key_idx);
3718 cmd->key_flags = __cpu_to_le32(arg->key_flags);
3719 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
3720 cmd->key_len = __cpu_to_le32(arg->key_len);
3721 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
3722 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
3723
3724 if (arg->macaddr)
b25f32cb 3725 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
5e3dd157
KV		 3726 if (arg->key_data)
3727 memcpy(cmd->key_data, arg->key_data, arg->key_len);
3728
7aa7a72a 3729 ath10k_dbg(ar, ATH10K_DBG_WMI,
e0c508ab
MK		 3730 "wmi vdev install key idx %d cipher %d len %d\n",
3731 arg->key_idx, arg->key_cipher, arg->key_len);
ce42870e
BM		 3732 return ath10k_wmi_cmd_send(ar, skb,
3733 ar->wmi.cmd->vdev_install_key_cmdid);
5e3dd157
KV		 3734}
3735
855aed12
SW		 3736int ath10k_wmi_vdev_spectral_conf(struct ath10k *ar,
3737 const struct wmi_vdev_spectral_conf_arg *arg)
3738{
3739 struct wmi_vdev_spectral_conf_cmd *cmd;
3740 struct sk_buff *skb;
3741 u32 cmdid;
3742
7aa7a72a 3743 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12
SW		 3744 if (!skb)
3745 return -ENOMEM;
3746
3747 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
3748 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3749 cmd->scan_count = __cpu_to_le32(arg->scan_count);
3750 cmd->scan_period = __cpu_to_le32(arg->scan_period);
3751 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
3752 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
3753 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
3754 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
3755 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
3756 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
3757 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
3758 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
3759 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
3760 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
3761 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
3762 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
3763 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
3764 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
3765 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
3766 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
3767
3768 cmdid = ar->wmi.cmd->vdev_spectral_scan_configure_cmdid;
3769 return ath10k_wmi_cmd_send(ar, skb, cmdid);
3770}
3771
3772int ath10k_wmi_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, u32 trigger,
3773 u32 enable)
3774{
3775 struct wmi_vdev_spectral_enable_cmd *cmd;
3776 struct sk_buff *skb;
3777 u32 cmdid;
3778
7aa7a72a 3779 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12
SW		 3780 if (!skb)
3781 return -ENOMEM;
3782
3783 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
3784 cmd->vdev_id = __cpu_to_le32(vdev_id);
3785 cmd->trigger_cmd = __cpu_to_le32(trigger);
3786 cmd->enable_cmd = __cpu_to_le32(enable);
3787
3788 cmdid = ar->wmi.cmd->vdev_spectral_scan_enable_cmdid;
3789 return ath10k_wmi_cmd_send(ar, skb, cmdid);
3790}
3791
5e3dd157
KV		 3792int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
3793 const u8 peer_addr[ETH_ALEN])
3794{
3795 struct wmi_peer_create_cmd *cmd;
3796 struct sk_buff *skb;
3797
7aa7a72a 3798 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3799 if (!skb)
3800 return -ENOMEM;
3801
3802 cmd = (struct wmi_peer_create_cmd *)skb->data;
3803 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 3804 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3805
7aa7a72a 3806 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3807 "wmi peer create vdev_id %d peer_addr %pM\n",
3808 vdev_id, peer_addr);
ce42870e 3809 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
5e3dd157
KV		 3810}
3811
3812int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
3813 const u8 peer_addr[ETH_ALEN])
3814{
3815 struct wmi_peer_delete_cmd *cmd;
3816 struct sk_buff *skb;
3817
7aa7a72a 3818 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3819 if (!skb)
3820 return -ENOMEM;
3821
3822 cmd = (struct wmi_peer_delete_cmd *)skb->data;
3823 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 3824 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3825
7aa7a72a 3826 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3827 "wmi peer delete vdev_id %d peer_addr %pM\n",
3828 vdev_id, peer_addr);
ce42870e 3829 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
5e3dd157
KV		 3830}
3831
3832int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
3833 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
3834{
3835 struct wmi_peer_flush_tids_cmd *cmd;
3836 struct sk_buff *skb;
3837
7aa7a72a 3838 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3839 if (!skb)
3840 return -ENOMEM;
3841
3842 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
3843 cmd->vdev_id = __cpu_to_le32(vdev_id);
3844 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
b25f32cb 3845 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3846
7aa7a72a 3847 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3848 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
3849 vdev_id, peer_addr, tid_bitmap);
ce42870e 3850 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
5e3dd157
KV		 3851}
3852
3853int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
3854 const u8 *peer_addr, enum wmi_peer_param param_id,
3855 u32 param_value)
3856{
3857 struct wmi_peer_set_param_cmd *cmd;
3858 struct sk_buff *skb;
3859
7aa7a72a 3860 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3861 if (!skb)
3862 return -ENOMEM;
3863
3864 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
3865 cmd->vdev_id = __cpu_to_le32(vdev_id);
3866 cmd->param_id = __cpu_to_le32(param_id);
3867 cmd->param_value = __cpu_to_le32(param_value);
b25f32cb 3868 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3869
7aa7a72a 3870 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3871 "wmi vdev %d peer 0x%pM set param %d value %d\n",
3872 vdev_id, peer_addr, param_id, param_value);
3873
ce42870e 3874 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
5e3dd157
KV		 3875}
3876
3877int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
3878 enum wmi_sta_ps_mode psmode)
3879{
3880 struct wmi_sta_powersave_mode_cmd *cmd;
3881 struct sk_buff *skb;
3882
7aa7a72a 3883 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3884 if (!skb)
3885 return -ENOMEM;
3886
3887 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
3888 cmd->vdev_id = __cpu_to_le32(vdev_id);
3889 cmd->sta_ps_mode = __cpu_to_le32(psmode);
3890
7aa7a72a 3891 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3892 "wmi set powersave id 0x%x mode %d\n",
3893 vdev_id, psmode);
3894
ce42870e
BM		 3895 return ath10k_wmi_cmd_send(ar, skb,
3896 ar->wmi.cmd->sta_powersave_mode_cmdid);
5e3dd157
KV		 3897}
3898
3899int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
3900 enum wmi_sta_powersave_param param_id,
3901 u32 value)
3902{
3903 struct wmi_sta_powersave_param_cmd *cmd;
3904 struct sk_buff *skb;
3905
7aa7a72a 3906 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3907 if (!skb)
3908 return -ENOMEM;
3909
3910 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
3911 cmd->vdev_id = __cpu_to_le32(vdev_id);
3912 cmd->param_id = __cpu_to_le32(param_id);
3913 cmd->param_value = __cpu_to_le32(value);
3914
7aa7a72a 3915 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3916 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
3917 vdev_id, param_id, value);
ce42870e
BM		 3918 return ath10k_wmi_cmd_send(ar, skb,
3919 ar->wmi.cmd->sta_powersave_param_cmdid);
5e3dd157
KV		 3920}
3921
3922int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
3923 enum wmi_ap_ps_peer_param param_id, u32 value)
3924{
3925 struct wmi_ap_ps_peer_cmd *cmd;
3926 struct sk_buff *skb;
3927
3928 if (!mac)
3929 return -EINVAL;
3930
7aa7a72a 3931 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3932 if (!skb)
3933 return -ENOMEM;
3934
3935 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
3936 cmd->vdev_id = __cpu_to_le32(vdev_id);
3937 cmd->param_id = __cpu_to_le32(param_id);
3938 cmd->param_value = __cpu_to_le32(value);
b25f32cb 3939 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5e3dd157 3940
7aa7a72a 3941 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3942 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
3943 vdev_id, param_id, value, mac);
3944
ce42870e
BM		 3945 return ath10k_wmi_cmd_send(ar, skb,
3946 ar->wmi.cmd->ap_ps_peer_param_cmdid);
5e3dd157
KV		 3947}
3948
3949int ath10k_wmi_scan_chan_list(struct ath10k *ar,
3950 const struct wmi_scan_chan_list_arg *arg)
3951{
3952 struct wmi_scan_chan_list_cmd *cmd;
3953 struct sk_buff *skb;
3954 struct wmi_channel_arg *ch;
3955 struct wmi_channel *ci;
3956 int len;
3957 int i;
3958
3959 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
3960
7aa7a72a 3961 skb = ath10k_wmi_alloc_skb(ar, len);
5e3dd157
KV		 3962 if (!skb)
3963 return -EINVAL;
3964
3965 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
3966 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
3967
3968 for (i = 0; i < arg->n_channels; i++) {
5e3dd157
KV		 3969 ch = &arg->channels[i];
3970 ci = &cmd->chan_info[i];
3971
2d66721c 3972 ath10k_wmi_put_wmi_channel(ci, ch);
5e3dd157
KV		 3973 }
3974
ce42870e 3975 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
5e3dd157
KV		 3976}
3977
24c88f78
MK		 3978static void
3979ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
3980 const struct wmi_peer_assoc_complete_arg *arg)
5e3dd157 3981{
24c88f78 3982 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
5e3dd157 3983
5e3dd157
KV		 3984 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3985 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
3986 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
3987 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
3988 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
3989 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
3990 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
3991 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
3992 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
3993 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
3994 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
3995 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
3996 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
3997
b25f32cb 3998 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
5e3dd157
KV		 3999
4000 cmd->peer_legacy_rates.num_rates =
4001 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
4002 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
4003 arg->peer_legacy_rates.num_rates);
4004
4005 cmd->peer_ht_rates.num_rates =
4006 __cpu_to_le32(arg->peer_ht_rates.num_rates);
4007 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
4008 arg->peer_ht_rates.num_rates);
4009
4010 cmd->peer_vht_rates.rx_max_rate =
4011 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
4012 cmd->peer_vht_rates.rx_mcs_set =
4013 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
4014 cmd->peer_vht_rates.tx_max_rate =
4015 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
4016 cmd->peer_vht_rates.tx_mcs_set =
4017 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
24c88f78
MK		 4018}
4019
4020static void
4021ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
4022 const struct wmi_peer_assoc_complete_arg *arg)
4023{
4024 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
4025
4026 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4027 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
4028}
4029
4030static void
4031ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
4032 const struct wmi_peer_assoc_complete_arg *arg)
4033{
4034 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4035}
4036
4037static void
4038ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
4039 const struct wmi_peer_assoc_complete_arg *arg)
4040{
4041 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
4042 int max_mcs, max_nss;
4043 u32 info0;
4044
4045 /* TODO: Is using max values okay with firmware? */
4046 max_mcs = 0xf;
4047 max_nss = 0xf;
4048
4049 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
4050 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
4051
4052 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4053 cmd->info0 = __cpu_to_le32(info0);
4054}
4055
4056int ath10k_wmi_peer_assoc(struct ath10k *ar,
4057 const struct wmi_peer_assoc_complete_arg *arg)
4058{
4059 struct sk_buff *skb;
4060 int len;
4061
4062 if (arg->peer_mpdu_density > 16)
4063 return -EINVAL;
4064 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
4065 return -EINVAL;
4066 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
4067 return -EINVAL;
4068
4069 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4070 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
4071 len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
4072 else
4073 len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
4074 } else {
4075 len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
4076 }
4077
7aa7a72a 4078 skb = ath10k_wmi_alloc_skb(ar, len);
24c88f78
MK		 4079 if (!skb)
4080 return -ENOMEM;
4081
4082 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4083 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
4084 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
4085 else
4086 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
4087 } else {
4088 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
4089 }
5e3dd157 4090
7aa7a72a 4091 ath10k_dbg(ar, ATH10K_DBG_WMI,
44d6fa90
CYY		 4092 "wmi peer assoc vdev %d addr %pM (%s)\n",
4093 arg->vdev_id, arg->addr,
4094 arg->peer_reassoc ? "reassociate" : "new");
ce42870e 4095 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
5e3dd157
KV		 4096}
4097
748afc47
MK		 4098/* This function assumes the beacon is already DMA mapped */
4099int ath10k_wmi_beacon_send_ref_nowait(struct ath10k_vif *arvif)
5e3dd157 4100{
748afc47 4101 struct wmi_bcn_tx_ref_cmd *cmd;
5e3dd157 4102 struct sk_buff *skb;
748afc47
MK		 4103 struct sk_buff *beacon = arvif->beacon;
4104 struct ath10k *ar = arvif->ar;
4105 struct ieee80211_hdr *hdr;
e2045481 4106 int ret;
748afc47 4107 u16 fc;
5e3dd157 4108
7aa7a72a 4109 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4110 if (!skb)
4111 return -ENOMEM;
4112
748afc47
MK		 4113 hdr = (struct ieee80211_hdr *)beacon->data;
4114 fc = le16_to_cpu(hdr->frame_control);
4115
4116 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
4117 cmd->vdev_id = __cpu_to_le32(arvif->vdev_id);
4118 cmd->data_len = __cpu_to_le32(beacon->len);
4119 cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr);
4120 cmd->msdu_id = 0;
4121 cmd->frame_control = __cpu_to_le32(fc);
4122 cmd->flags = 0;
24c88f78 4123 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
748afc47
MK		 4124
4125 if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero)
4126 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
4127
4128 if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab)
4129 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
4130
4131 ret = ath10k_wmi_cmd_send_nowait(ar, skb,
4132 ar->wmi.cmd->pdev_send_bcn_cmdid);
5e3dd157 4133
e2045481
MK		 4134 if (ret)
4135 dev_kfree_skb(skb);
4136
4137 return ret;
5e3dd157
KV		 4138}
4139
4140static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
4141 const struct wmi_wmm_params_arg *arg)
4142{
4143 params->cwmin = __cpu_to_le32(arg->cwmin);
4144 params->cwmax = __cpu_to_le32(arg->cwmax);
4145 params->aifs = __cpu_to_le32(arg->aifs);
4146 params->txop = __cpu_to_le32(arg->txop);
4147 params->acm = __cpu_to_le32(arg->acm);
4148 params->no_ack = __cpu_to_le32(arg->no_ack);
4149}
4150
4151int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
5b07e07f 4152 const struct wmi_pdev_set_wmm_params_arg *arg)
5e3dd157
KV		 4153{
4154 struct wmi_pdev_set_wmm_params *cmd;
4155 struct sk_buff *skb;
4156
7aa7a72a 4157 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4158 if (!skb)
4159 return -ENOMEM;
4160
4161 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
4162 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
4163 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
4164 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
4165 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
4166
7aa7a72a 4167 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
ce42870e
BM		 4168 return ath10k_wmi_cmd_send(ar, skb,
4169 ar->wmi.cmd->pdev_set_wmm_params_cmdid);
5e3dd157
KV		 4170}
4171
4172int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
4173{
4174 struct wmi_request_stats_cmd *cmd;
4175 struct sk_buff *skb;
4176
7aa7a72a 4177 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4178 if (!skb)
4179 return -ENOMEM;
4180
4181 cmd = (struct wmi_request_stats_cmd *)skb->data;
4182 cmd->stats_id = __cpu_to_le32(stats_id);
4183
7aa7a72a 4184 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
ce42870e 4185 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
5e3dd157 4186}
9cfbce75
MK		 4187
4188int ath10k_wmi_force_fw_hang(struct ath10k *ar,
4189 enum wmi_force_fw_hang_type type, u32 delay_ms)
4190{
4191 struct wmi_force_fw_hang_cmd *cmd;
4192 struct sk_buff *skb;
4193
7aa7a72a 4194 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9cfbce75
MK		 4195 if (!skb)
4196 return -ENOMEM;
4197
4198 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
4199 cmd->type = __cpu_to_le32(type);
4200 cmd->delay_ms = __cpu_to_le32(delay_ms);
4201
7aa7a72a 4202 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
9cfbce75 4203 type, delay_ms);
ce42870e 4204 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
9cfbce75 4205}
f118a3e5
KV		 4206
4207int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable)
4208{
4209 struct wmi_dbglog_cfg_cmd *cmd;
4210 struct sk_buff *skb;
4211 u32 cfg;
4212
7aa7a72a 4213 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
f118a3e5
KV		 4214 if (!skb)
4215 return -ENOMEM;
4216
4217 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
4218
4219 if (module_enable) {
4220 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
4221 ATH10K_DBGLOG_CFG_LOG_LVL);
4222 } else {
4223 /* set back defaults, all modules with WARN level */
4224 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
4225 ATH10K_DBGLOG_CFG_LOG_LVL);
4226 module_enable = ~0;
4227 }
4228
4229 cmd->module_enable = __cpu_to_le32(module_enable);
4230 cmd->module_valid = __cpu_to_le32(~0);
4231 cmd->config_enable = __cpu_to_le32(cfg);
4232 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
4233
7aa7a72a 4234 ath10k_dbg(ar, ATH10K_DBG_WMI,
f118a3e5
KV		 4235 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
4236 __le32_to_cpu(cmd->module_enable),
4237 __le32_to_cpu(cmd->module_valid),
4238 __le32_to_cpu(cmd->config_enable),
4239 __le32_to_cpu(cmd->config_valid));
4240
4241 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid);
4242}
Linux kernel - Deliverables
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