projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 5e3dd157 KV |
1 | /* |
| 2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
| 3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
| 4 | * | |
| 5 | * Permission to use, copy, modify, and/or distribute this software for any | |
| 6 | * purpose with or without fee is hereby granted, provided that the above | |
| 7 | * copyright notice and this permission notice appear in all copies. | |
| 8 | * | |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
| 10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
| 11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
| 12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
| 13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
| 14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
| 15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
| 16 | */ | |
| 17 | ||
| 18 | #include <linux/skbuff.h> | |
| 2fe5288c | 19 | #include <linux/ctype.h> |
| 5e3dd157 KV |
20 | |
| 21 | #include "core.h" | |
| 22 | #include "htc.h" | |
| 23 | #include "debug.h" | |
| 24 | #include "wmi.h" | |
| ca996ec5 | 25 | #include "wmi-tlv.h" |
| 5e3dd157 | 26 | #include "mac.h" |
| 43d2a30f | 27 | #include "testmode.h" |
| d7579d12 | 28 | #include "wmi-ops.h" |
| 6a94888f | 29 | #include "p2p.h" |
| 587f7031 | 30 | #include "hw.h" |
| 5e3dd157 | 31 | |
| ce42870e BM |
32 | /* MAIN WMI cmd track */ |
| 33 | static struct wmi_cmd_map wmi_cmd_map = { | |
| 34 | .init_cmdid = WMI_INIT_CMDID, | |
| 35 | .start_scan_cmdid = WMI_START_SCAN_CMDID, | |
| 36 | .stop_scan_cmdid = WMI_STOP_SCAN_CMDID, | |
| 37 | .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID, | |
| 38 | .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID, | |
| 39 | .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID, | |
| 40 | .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID, | |
| 41 | .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID, | |
| 42 | .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID, | |
| 43 | .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID, | |
| 44 | .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID, | |
| 45 | .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID, | |
| 46 | .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID, | |
| 47 | .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID, | |
| 48 | .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID, | |
| 49 | .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
| 50 | .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID, | |
| 51 | .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID, | |
| 52 | .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID, | |
| 53 | .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID, | |
| 54 | .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID, | |
| 55 | .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID, | |
| 56 | .vdev_up_cmdid = WMI_VDEV_UP_CMDID, | |
| 57 | .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID, | |
| 58 | .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID, | |
| 59 | .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID, | |
| 60 | .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID, | |
| 61 | .peer_create_cmdid = WMI_PEER_CREATE_CMDID, | |
| 62 | .peer_delete_cmdid = WMI_PEER_DELETE_CMDID, | |
| 63 | .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID, | |
| 64 | .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID, | |
| 65 | .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID, | |
| 66 | .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID, | |
| 67 | .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID, | |
| 68 | .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID, | |
| 69 | .bcn_tx_cmdid = WMI_BCN_TX_CMDID, | |
| 70 | .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID, | |
| 71 | .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID, | |
| 72 | .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID, | |
| 73 | .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID, | |
| 74 | .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID, | |
| 75 | .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID, | |
| 76 | .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID, | |
| 77 | .addba_send_cmdid = WMI_ADDBA_SEND_CMDID, | |
| 78 | .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID, | |
| 79 | .delba_send_cmdid = WMI_DELBA_SEND_CMDID, | |
| 80 | .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID, | |
| 81 | .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID, | |
| 82 | .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID, | |
| 83 | .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID, | |
| 84 | .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID, | |
| 85 | .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID, | |
| 86 | .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID, | |
| 87 | .roam_scan_mode = WMI_ROAM_SCAN_MODE, | |
| 88 | .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD, | |
| 89 | .roam_scan_period = WMI_ROAM_SCAN_PERIOD, | |
| 90 | .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
| 91 | .roam_ap_profile = WMI_ROAM_AP_PROFILE, | |
| 92 | .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE, | |
| 93 | .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE, | |
| 94 | .ofl_scan_period = WMI_OFL_SCAN_PERIOD, | |
| 95 | .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO, | |
| 96 | .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY, | |
| 97 | .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE, | |
| 98 | .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE, | |
| 99 | .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID, | |
| 100 | .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID, | |
| 101 | .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID, | |
| 102 | .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID, | |
| 103 | .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID, | |
| 104 | .wlan_profile_set_hist_intvl_cmdid = | |
| 105 | WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
| 106 | .wlan_profile_get_profile_data_cmdid = | |
| 107 | WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
| 108 | .wlan_profile_enable_profile_id_cmdid = | |
| 109 | WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
| 110 | .wlan_profile_list_profile_id_cmdid = | |
| 111 | WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
| 112 | .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID, | |
| 113 | .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID, | |
| 114 | .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID, | |
| 115 | .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID, | |
| 116 | .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID, | |
| 117 | .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID, | |
| 118 | .wow_enable_disable_wake_event_cmdid = | |
| 119 | WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
| 120 | .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID, | |
| 121 | .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
| 122 | .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID, | |
| 123 | .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID, | |
| 124 | .vdev_spectral_scan_configure_cmdid = | |
| 125 | WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
| 126 | .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
| 127 | .request_stats_cmdid = WMI_REQUEST_STATS_CMDID, | |
| 128 | .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID, | |
| 129 | .network_list_offload_config_cmdid = | |
| 130 | WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID, | |
| 131 | .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID, | |
| 132 | .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID, | |
| 133 | .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, | |
| 134 | .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID, | |
| 135 | .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID, | |
| 136 | .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID, | |
| 137 | .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID, | |
| 138 | .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID, | |
| 139 | .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD, | |
| 140 | .echo_cmdid = WMI_ECHO_CMDID, | |
| 141 | .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID, | |
| 142 | .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID, | |
| 143 | .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID, | |
| 144 | .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID, | |
| 145 | .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID, | |
| 146 | .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID, | |
| 147 | .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID, | |
| 148 | .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID, | |
| 149 | .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID, | |
| a57a6a27 | 150 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
| 62f77f09 | 151 | .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, |
| 772b4aee RM |
152 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
| 153 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 154 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 155 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 156 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 157 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 158 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 159 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 160 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 161 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 162 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
| 163 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
| 164 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
| 165 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 166 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 167 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 168 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 169 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 170 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
| 171 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 172 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 173 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 174 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 175 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 176 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
| 177 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
| 178 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
| 179 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 180 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 181 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 182 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 183 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 184 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
| 185 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
| 186 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 187 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
| 188 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 189 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 190 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
| 191 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
| 192 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
| 193 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| ce42870e BM |
194 | }; |
| 195 | ||
| b7e3adf9 BM |
196 | /* 10.X WMI cmd track */ |
| 197 | static struct wmi_cmd_map wmi_10x_cmd_map = { | |
| 198 | .init_cmdid = WMI_10X_INIT_CMDID, | |
| 199 | .start_scan_cmdid = WMI_10X_START_SCAN_CMDID, | |
| 200 | .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID, | |
| 201 | .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID, | |
| 34957b25 | 202 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, |
| b7e3adf9 BM |
203 | .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID, |
| 204 | .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID, | |
| 205 | .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID, | |
| 206 | .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID, | |
| 207 | .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID, | |
| 208 | .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID, | |
| 209 | .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID, | |
| 210 | .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID, | |
| 211 | .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID, | |
| 212 | .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID, | |
| 213 | .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
| 214 | .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID, | |
| 215 | .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID, | |
| 216 | .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID, | |
| 217 | .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID, | |
| 218 | .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID, | |
| 219 | .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID, | |
| 220 | .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID, | |
| 221 | .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID, | |
| 222 | .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID, | |
| 223 | .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID, | |
| 224 | .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID, | |
| 225 | .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID, | |
| 226 | .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID, | |
| 227 | .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID, | |
| 228 | .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID, | |
| 229 | .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID, | |
| 230 | .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID, | |
| 231 | .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID, | |
| 232 | .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID, | |
| 233 | .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID, | |
| 234 | .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID, | |
| 34957b25 | 235 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, |
| b7e3adf9 BM |
236 | .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID, |
| 237 | .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID, | |
| 238 | .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID, | |
| 34957b25 | 239 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, |
| b7e3adf9 BM |
240 | .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID, |
| 241 | .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID, | |
| 242 | .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID, | |
| 243 | .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID, | |
| 244 | .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID, | |
| 245 | .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID, | |
| 246 | .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID, | |
| 247 | .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID, | |
| 248 | .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID, | |
| 249 | .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID, | |
| 250 | .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID, | |
| 251 | .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE, | |
| 252 | .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD, | |
| 253 | .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD, | |
| 254 | .roam_scan_rssi_change_threshold = | |
| 255 | WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
| 256 | .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE, | |
| 257 | .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE, | |
| 258 | .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE, | |
| 259 | .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD, | |
| 260 | .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO, | |
| 261 | .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY, | |
| 262 | .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE, | |
| 263 | .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE, | |
| 34957b25 | 264 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, |
| 542fb174 | 265 | .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID, |
| 34957b25 | 266 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, |
| b7e3adf9 BM |
267 | .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID, |
| 268 | .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID, | |
| 269 | .wlan_profile_set_hist_intvl_cmdid = | |
| 270 | WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
| 271 | .wlan_profile_get_profile_data_cmdid = | |
| 272 | WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
| 273 | .wlan_profile_enable_profile_id_cmdid = | |
| 274 | WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
| 275 | .wlan_profile_list_profile_id_cmdid = | |
| 276 | WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
| 277 | .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID, | |
| 278 | .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID, | |
| 279 | .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID, | |
| 280 | .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID, | |
| 281 | .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID, | |
| 282 | .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID, | |
| 283 | .wow_enable_disable_wake_event_cmdid = | |
| 284 | WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
| 285 | .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID, | |
| 286 | .wow_hostwakeup_from_sleep_cmdid = | |
| 287 | WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
| 288 | .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID, | |
| 289 | .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID, | |
| 290 | .vdev_spectral_scan_configure_cmdid = | |
| 291 | WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
| 292 | .vdev_spectral_scan_enable_cmdid = | |
| 293 | WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
| 294 | .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID, | |
| 34957b25 BM |
295 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, |
| 296 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 297 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 298 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 299 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
| 300 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
| 301 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 302 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 303 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
| 304 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
| 305 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
| b7e3adf9 BM |
306 | .echo_cmdid = WMI_10X_ECHO_CMDID, |
| 307 | .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID, | |
| 308 | .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID, | |
| 309 | .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID, | |
| 34957b25 BM |
310 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, |
| 311 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 312 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 313 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
| b7e3adf9 BM |
314 | .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID, |
| 315 | .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID, | |
| a57a6a27 | 316 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
| 62f77f09 | 317 | .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, |
| 772b4aee RM |
318 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
| 319 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 320 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 321 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 322 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 323 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 324 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 325 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 326 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 327 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 328 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
| 329 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
| 330 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
| 331 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 332 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 333 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 334 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 335 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 336 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
| 337 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 338 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 339 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 340 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 341 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 342 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
| 343 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
| 344 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
| 345 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 346 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 347 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 348 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 349 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 350 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
| 351 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
| 352 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 353 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
| 354 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 355 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 356 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
| 357 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
| 358 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
| 359 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| b7e3adf9 | 360 | }; |
| ce42870e | 361 | |
| 4a16fbec RM |
362 | /* 10.2.4 WMI cmd track */ |
| 363 | static struct wmi_cmd_map wmi_10_2_4_cmd_map = { | |
| 364 | .init_cmdid = WMI_10_2_INIT_CMDID, | |
| 365 | .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, | |
| 366 | .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, | |
| 367 | .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, | |
| 368 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 369 | .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, | |
| 370 | .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, | |
| 371 | .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, | |
| 372 | .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, | |
| 373 | .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, | |
| 374 | .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, | |
| 375 | .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, | |
| 376 | .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, | |
| 377 | .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, | |
| 378 | .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
| 379 | .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, | |
| 380 | .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, | |
| 381 | .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, | |
| 382 | .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, | |
| 383 | .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, | |
| 384 | .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, | |
| 385 | .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, | |
| 386 | .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, | |
| 387 | .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, | |
| 388 | .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, | |
| 389 | .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, | |
| 390 | .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, | |
| 391 | .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, | |
| 392 | .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, | |
| 393 | .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, | |
| 394 | .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, | |
| 395 | .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, | |
| 396 | .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, | |
| 397 | .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, | |
| 398 | .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, | |
| 399 | .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, | |
| 400 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 401 | .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, | |
| 402 | .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, | |
| 403 | .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, | |
| 404 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 405 | .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, | |
| 406 | .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, | |
| 407 | .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, | |
| 408 | .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, | |
| 409 | .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, | |
| 410 | .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, | |
| 411 | .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, | |
| 412 | .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, | |
| 413 | .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, | |
| 414 | .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, | |
| 415 | .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, | |
| 416 | .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, | |
| 417 | .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, | |
| 418 | .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, | |
| 419 | .roam_scan_rssi_change_threshold = | |
| 420 | WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
| 421 | .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, | |
| 422 | .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, | |
| 423 | .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, | |
| 424 | .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, | |
| 425 | .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, | |
| 426 | .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, | |
| 427 | .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, | |
| 428 | .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, | |
| 429 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, | |
| 430 | .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, | |
| 431 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, | |
| 432 | .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, | |
| 433 | .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, | |
| 434 | .wlan_profile_set_hist_intvl_cmdid = | |
| 435 | WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
| 436 | .wlan_profile_get_profile_data_cmdid = | |
| 437 | WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
| 438 | .wlan_profile_enable_profile_id_cmdid = | |
| 439 | WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
| 440 | .wlan_profile_list_profile_id_cmdid = | |
| 441 | WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
| 442 | .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, | |
| 443 | .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, | |
| 444 | .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, | |
| 445 | .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, | |
| 446 | .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, | |
| 447 | .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, | |
| 448 | .wow_enable_disable_wake_event_cmdid = | |
| 449 | WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
| 450 | .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, | |
| 451 | .wow_hostwakeup_from_sleep_cmdid = | |
| 452 | WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
| 453 | .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, | |
| 454 | .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, | |
| 455 | .vdev_spectral_scan_configure_cmdid = | |
| 456 | WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
| 457 | .vdev_spectral_scan_enable_cmdid = | |
| 458 | WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
| 459 | .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, | |
| 460 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 461 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 462 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 463 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 464 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
| 465 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
| 466 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 467 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 468 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
| 469 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
| 470 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
| 471 | .echo_cmdid = WMI_10_2_ECHO_CMDID, | |
| 472 | .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, | |
| 473 | .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, | |
| 474 | .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, | |
| 475 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 476 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 477 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 478 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
| 479 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, | |
| 480 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, | |
| a57a6a27 | 481 | .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, |
| 62f77f09 | 482 | .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS, |
| 772b4aee RM |
483 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
| 484 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 485 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 486 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 487 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 488 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 489 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 490 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 491 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 492 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 493 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
| 494 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
| 495 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
| 496 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 497 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 498 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 499 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 500 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 501 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
| 502 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 503 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 504 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 505 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 506 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 507 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
| 508 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
| 509 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
| 510 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 511 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 512 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 513 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 514 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 515 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
| 516 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
| 517 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 518 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
| 519 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 520 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 521 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
| 522 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
| 523 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
| 524 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 4a16fbec RM |
525 | }; |
| 526 | ||
| 2d491e69 RM |
527 | /* 10.4 WMI cmd track */ |
| 528 | static struct wmi_cmd_map wmi_10_4_cmd_map = { | |
| 529 | .init_cmdid = WMI_10_4_INIT_CMDID, | |
| 530 | .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID, | |
| 531 | .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID, | |
| 532 | .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID, | |
| 533 | .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID, | |
| 534 | .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID, | |
| 535 | .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID, | |
| 536 | .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID, | |
| 537 | .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID, | |
| 538 | .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID, | |
| 539 | .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID, | |
| 540 | .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID, | |
| 541 | .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID, | |
| 542 | .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID, | |
| 543 | .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID, | |
| 544 | .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
| 545 | .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID, | |
| 546 | .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID, | |
| 547 | .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID, | |
| 548 | .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID, | |
| 549 | .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID, | |
| 550 | .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID, | |
| 551 | .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID, | |
| 552 | .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID, | |
| 553 | .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID, | |
| 554 | .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID, | |
| 555 | .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID, | |
| 556 | .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID, | |
| 557 | .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID, | |
| 558 | .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID, | |
| 559 | .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID, | |
| 560 | .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID, | |
| 561 | .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID, | |
| 562 | .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID, | |
| 563 | .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID, | |
| 564 | .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID, | |
| 565 | .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID, | |
| 566 | .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID, | |
| 567 | .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID, | |
| 568 | .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID, | |
| 569 | .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID, | |
| 570 | .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID, | |
| 571 | .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID, | |
| 572 | .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID, | |
| 573 | .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID, | |
| 574 | .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID, | |
| 575 | .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID, | |
| 576 | .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID, | |
| 577 | .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID, | |
| 578 | .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID, | |
| 579 | .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID, | |
| 580 | .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID, | |
| 581 | .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID, | |
| 582 | .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE, | |
| 583 | .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD, | |
| 584 | .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD, | |
| 585 | .roam_scan_rssi_change_threshold = | |
| 586 | WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
| 587 | .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE, | |
| 588 | .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE, | |
| 589 | .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE, | |
| 590 | .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD, | |
| 591 | .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO, | |
| 592 | .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY, | |
| 593 | .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE, | |
| 594 | .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE, | |
| 595 | .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID, | |
| 596 | .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID, | |
| 597 | .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID, | |
| 598 | .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID, | |
| 599 | .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID, | |
| 600 | .wlan_profile_set_hist_intvl_cmdid = | |
| 601 | WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
| 602 | .wlan_profile_get_profile_data_cmdid = | |
| 603 | WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
| 604 | .wlan_profile_enable_profile_id_cmdid = | |
| 605 | WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
| 606 | .wlan_profile_list_profile_id_cmdid = | |
| 607 | WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
| 608 | .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID, | |
| 609 | .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID, | |
| 610 | .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID, | |
| 611 | .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID, | |
| 612 | .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID, | |
| 613 | .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID, | |
| 614 | .wow_enable_disable_wake_event_cmdid = | |
| 615 | WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
| 616 | .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID, | |
| 617 | .wow_hostwakeup_from_sleep_cmdid = | |
| 618 | WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
| 619 | .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID, | |
| 620 | .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID, | |
| 621 | .vdev_spectral_scan_configure_cmdid = | |
| 622 | WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
| 623 | .vdev_spectral_scan_enable_cmdid = | |
| 624 | WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
| 625 | .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID, | |
| 626 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 627 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 628 | .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID, | |
| 629 | .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID, | |
| 630 | .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID, | |
| 631 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
| 632 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 633 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 634 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
| 635 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
| 636 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
| 637 | .echo_cmdid = WMI_10_4_ECHO_CMDID, | |
| 638 | .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID, | |
| 639 | .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID, | |
| 640 | .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID, | |
| 641 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 642 | .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID, | |
| 643 | .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID, | |
| 644 | .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID, | |
| 645 | .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID, | |
| 646 | .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID, | |
| 647 | .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID, | |
| 648 | .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED, | |
| 649 | .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED, | |
| 650 | .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED, | |
| 651 | .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED, | |
| 652 | .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID, | |
| 653 | .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID, | |
| 654 | .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID, | |
| 655 | .wlan_peer_caching_add_peer_cmdid = | |
| 656 | WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID, | |
| 657 | .wlan_peer_caching_evict_peer_cmdid = | |
| 658 | WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID, | |
| 659 | .wlan_peer_caching_restore_peer_cmdid = | |
| 660 | WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID, | |
| 661 | .wlan_peer_caching_print_all_peers_info_cmdid = | |
| 662 | WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID, | |
| 663 | .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID, | |
| 664 | .peer_add_proxy_sta_entry_cmdid = | |
| 665 | WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID, | |
| 666 | .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID, | |
| 667 | .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID, | |
| 668 | .nan_cmdid = WMI_10_4_NAN_CMDID, | |
| 669 | .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID, | |
| 670 | .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID, | |
| 671 | .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID, | |
| 672 | .pdev_smart_ant_set_rx_antenna_cmdid = | |
| 673 | WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, | |
| 674 | .peer_smart_ant_set_tx_antenna_cmdid = | |
| 675 | WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, | |
| 676 | .peer_smart_ant_set_train_info_cmdid = | |
| 677 | WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, | |
| 678 | .peer_smart_ant_set_node_config_ops_cmdid = | |
| 679 | WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, | |
| 680 | .pdev_set_antenna_switch_table_cmdid = | |
| 681 | WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, | |
| 682 | .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID, | |
| 683 | .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID, | |
| 684 | .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID, | |
| 685 | .pdev_ratepwr_chainmsk_table_cmdid = | |
| 686 | WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID, | |
| 687 | .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID, | |
| 688 | .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID, | |
| 689 | .fwtest_cmdid = WMI_10_4_FWTEST_CMDID, | |
| 690 | .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID, | |
| 691 | .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID, | |
| 692 | .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID, | |
| 693 | .pdev_get_ani_ofdm_config_cmdid = | |
| 694 | WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID, | |
| 695 | .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID, | |
| 696 | .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID, | |
| 697 | .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID, | |
| 698 | .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID, | |
| 699 | .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID, | |
| 700 | .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID, | |
| 701 | .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID, | |
| 702 | .vdev_filter_neighbor_rx_packets_cmdid = | |
| 703 | WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, | |
| 704 | .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID, | |
| 705 | .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID, | |
| 706 | .pdev_bss_chan_info_request_cmdid = | |
| 707 | WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, | |
| 47771902 | 708 | .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID, |
| 2d491e69 RM |
709 | }; |
| 710 | ||
| 6d1506e7 BM |
711 | /* MAIN WMI VDEV param map */ |
| 712 | static struct wmi_vdev_param_map wmi_vdev_param_map = { | |
| 713 | .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD, | |
| 714 | .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
| 715 | .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL, | |
| 716 | .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL, | |
| 717 | .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE, | |
| 718 | .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE, | |
| 719 | .slot_time = WMI_VDEV_PARAM_SLOT_TIME, | |
| 720 | .preamble = WMI_VDEV_PARAM_PREAMBLE, | |
| 721 | .swba_time = WMI_VDEV_PARAM_SWBA_TIME, | |
| 722 | .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD, | |
| 723 | .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME, | |
| 724 | .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL, | |
| 725 | .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD, | |
| 726 | .wmi_vdev_oc_scheduler_air_time_limit = | |
| 727 | WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
| 728 | .wds = WMI_VDEV_PARAM_WDS, | |
| 729 | .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW, | |
| 730 | .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX, | |
| 731 | .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT, | |
| 732 | .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT, | |
| 733 | .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM, | |
| 734 | .chwidth = WMI_VDEV_PARAM_CHWIDTH, | |
| 735 | .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET, | |
| 736 | .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION, | |
| 737 | .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT, | |
| 738 | .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE, | |
| 739 | .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE, | |
| 740 | .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE, | |
| 741 | .sgi = WMI_VDEV_PARAM_SGI, | |
| 742 | .ldpc = WMI_VDEV_PARAM_LDPC, | |
| 743 | .tx_stbc = WMI_VDEV_PARAM_TX_STBC, | |
| 744 | .rx_stbc = WMI_VDEV_PARAM_RX_STBC, | |
| 745 | .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD, | |
| 746 | .def_keyid = WMI_VDEV_PARAM_DEF_KEYID, | |
| 747 | .nss = WMI_VDEV_PARAM_NSS, | |
| 748 | .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE, | |
| 749 | .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE, | |
| 750 | .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE, | |
| 751 | .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE, | |
| 752 | .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
| 753 | .ap_keepalive_min_idle_inactive_time_secs = | |
| 754 | WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
| 755 | .ap_keepalive_max_idle_inactive_time_secs = | |
| 756 | WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
| 757 | .ap_keepalive_max_unresponsive_time_secs = | |
| 758 | WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
| 759 | .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS, | |
| 760 | .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 761 | .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS, | |
| 762 | .txbf = WMI_VDEV_PARAM_TXBF, | |
| 763 | .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE, | |
| 764 | .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY, | |
| 765 | .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE, | |
| 766 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
| 767 | WMI_VDEV_PARAM_UNSUPPORTED, | |
| 93841a15 RM |
768 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
| 769 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 770 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 771 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 772 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 773 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 774 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 775 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 776 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 777 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 778 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 779 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 780 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 781 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 782 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 783 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 6d1506e7 BM |
784 | }; |
| 785 | ||
| 786 | /* 10.X WMI VDEV param map */ | |
| 787 | static struct wmi_vdev_param_map wmi_10x_vdev_param_map = { | |
| 788 | .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, | |
| 789 | .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
| 790 | .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, | |
| 791 | .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, | |
| 792 | .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, | |
| 793 | .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, | |
| 794 | .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, | |
| 795 | .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, | |
| 796 | .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, | |
| 797 | .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, | |
| 798 | .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, | |
| 799 | .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, | |
| 800 | .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, | |
| 801 | .wmi_vdev_oc_scheduler_air_time_limit = | |
| 802 | WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
| 803 | .wds = WMI_10X_VDEV_PARAM_WDS, | |
| 804 | .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, | |
| 805 | .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, | |
| 806 | .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 807 | .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 808 | .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, | |
| 809 | .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, | |
| 810 | .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, | |
| 811 | .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, | |
| 812 | .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, | |
| 813 | .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, | |
| 814 | .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, | |
| 815 | .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, | |
| 816 | .sgi = WMI_10X_VDEV_PARAM_SGI, | |
| 817 | .ldpc = WMI_10X_VDEV_PARAM_LDPC, | |
| 818 | .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, | |
| 819 | .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, | |
| 820 | .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, | |
| 821 | .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, | |
| 822 | .nss = WMI_10X_VDEV_PARAM_NSS, | |
| 823 | .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, | |
| 824 | .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, | |
| 825 | .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, | |
| 826 | .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, | |
| 827 | .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
| 828 | .ap_keepalive_min_idle_inactive_time_secs = | |
| 829 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
| 830 | .ap_keepalive_max_idle_inactive_time_secs = | |
| 831 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
| 832 | .ap_keepalive_max_unresponsive_time_secs = | |
| 833 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
| 834 | .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, | |
| 835 | .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, | |
| 836 | .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, | |
| 837 | .txbf = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 838 | .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 839 | .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 840 | .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 841 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
| 842 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
| 93841a15 RM |
843 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
| 844 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 845 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 846 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 847 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 848 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 849 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 850 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 851 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 852 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 853 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 854 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 855 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 856 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 857 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 858 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 6d1506e7 BM |
859 | }; |
| 860 | ||
| 4a16fbec RM |
861 | static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = { |
| 862 | .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, | |
| 863 | .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
| 864 | .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, | |
| 865 | .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, | |
| 866 | .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, | |
| 867 | .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, | |
| 868 | .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, | |
| 869 | .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, | |
| 870 | .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, | |
| 871 | .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, | |
| 872 | .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, | |
| 873 | .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, | |
| 874 | .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, | |
| 875 | .wmi_vdev_oc_scheduler_air_time_limit = | |
| 876 | WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
| 877 | .wds = WMI_10X_VDEV_PARAM_WDS, | |
| 878 | .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, | |
| 879 | .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, | |
| 880 | .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 881 | .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 882 | .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, | |
| 883 | .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, | |
| 884 | .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, | |
| 885 | .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, | |
| 886 | .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, | |
| 887 | .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, | |
| 888 | .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, | |
| 889 | .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, | |
| 890 | .sgi = WMI_10X_VDEV_PARAM_SGI, | |
| 891 | .ldpc = WMI_10X_VDEV_PARAM_LDPC, | |
| 892 | .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, | |
| 893 | .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, | |
| 894 | .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, | |
| 895 | .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, | |
| 896 | .nss = WMI_10X_VDEV_PARAM_NSS, | |
| 897 | .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, | |
| 898 | .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, | |
| 899 | .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, | |
| 900 | .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, | |
| 901 | .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
| 902 | .ap_keepalive_min_idle_inactive_time_secs = | |
| 903 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
| 904 | .ap_keepalive_max_idle_inactive_time_secs = | |
| 905 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
| 906 | .ap_keepalive_max_unresponsive_time_secs = | |
| 907 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
| 908 | .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, | |
| 909 | .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, | |
| 910 | .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, | |
| 911 | .txbf = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 912 | .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 913 | .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 914 | .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 915 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
| 916 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
| 93841a15 RM |
917 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
| 918 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 919 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 920 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 921 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 922 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 923 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 924 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 925 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 926 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 927 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 928 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 929 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 930 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 931 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 932 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 933 | }; | |
| 934 | ||
| 935 | static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = { | |
| 936 | .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD, | |
| 937 | .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
| 938 | .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL, | |
| 939 | .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL, | |
| 940 | .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE, | |
| 941 | .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE, | |
| 942 | .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME, | |
| 943 | .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE, | |
| 944 | .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME, | |
| 945 | .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD, | |
| 946 | .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME, | |
| 947 | .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL, | |
| 948 | .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD, | |
| 949 | .wmi_vdev_oc_scheduler_air_time_limit = | |
| 950 | WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
| 951 | .wds = WMI_10_4_VDEV_PARAM_WDS, | |
| 952 | .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW, | |
| 953 | .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX, | |
| 954 | .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT, | |
| 955 | .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT, | |
| 956 | .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM, | |
| 957 | .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH, | |
| 958 | .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET, | |
| 959 | .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION, | |
| 960 | .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT, | |
| 961 | .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE, | |
| 962 | .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE, | |
| 963 | .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE, | |
| 964 | .sgi = WMI_10_4_VDEV_PARAM_SGI, | |
| 965 | .ldpc = WMI_10_4_VDEV_PARAM_LDPC, | |
| 966 | .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC, | |
| 967 | .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC, | |
| 968 | .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD, | |
| 969 | .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID, | |
| 970 | .nss = WMI_10_4_VDEV_PARAM_NSS, | |
| 971 | .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE, | |
| 972 | .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE, | |
| 973 | .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE, | |
| 974 | .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE, | |
| 975 | .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
| 976 | .ap_keepalive_min_idle_inactive_time_secs = | |
| 977 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
| 978 | .ap_keepalive_max_idle_inactive_time_secs = | |
| 979 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
| 980 | .ap_keepalive_max_unresponsive_time_secs = | |
| 981 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
| 982 | .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS, | |
| 983 | .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET, | |
| 984 | .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS, | |
| 985 | .txbf = WMI_10_4_VDEV_PARAM_TXBF, | |
| 986 | .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE, | |
| 987 | .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY, | |
| 988 | .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE, | |
| 989 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
| 990 | WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
| 991 | .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES, | |
| 992 | .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR, | |
| 993 | .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET, | |
| 994 | .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE, | |
| 995 | .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK, | |
| 996 | .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK, | |
| 997 | .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, | |
| 998 | .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, | |
| 999 | .early_rx_bmiss_sample_cycle = | |
| 1000 | WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, | |
| 1001 | .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP, | |
| 1002 | .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP, | |
| 1003 | .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, | |
| 1004 | .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA, | |
| 1005 | .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC, | |
| 1006 | .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE, | |
| 1007 | .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK, | |
| 4a16fbec RM |
1008 | }; |
| 1009 | ||
| 226a339b BM |
1010 | static struct wmi_pdev_param_map wmi_pdev_param_map = { |
| 1011 | .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK, | |
| 1012 | .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK, | |
| 1013 | .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G, | |
| 1014 | .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G, | |
| 1015 | .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE, | |
| 1016 | .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE, | |
| 1017 | .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE, | |
| 1018 | .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
| 1019 | .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE, | |
| 1020 | .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW, | |
| 1021 | .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
| 1022 | .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH, | |
| 1023 | .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH, | |
| 1024 | .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
| 1025 | .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE, | |
| 1026 | .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
| 1027 | .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
| 1028 | .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
| 1029 | .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
| 1030 | .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
| 1031 | .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
| 1032 | .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE, | |
| 1033 | .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
| 1034 | .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE, | |
| 1035 | .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE, | |
| 1036 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, | |
| 1037 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
| 1038 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
| 1039 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, | |
| 1040 | .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
| 1041 | .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
| 1042 | .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
| 1043 | .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
| 1044 | .pmf_qos = WMI_PDEV_PARAM_PMF_QOS, | |
| 1045 | .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE, | |
| 226a339b BM |
1046 | .dcs = WMI_PDEV_PARAM_DCS, |
| 1047 | .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE, | |
| 1048 | .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD, | |
| 1049 | .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
| 1050 | .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL, | |
| 1051 | .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL, | |
| 1052 | .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN, | |
| 1053 | .proxy_sta = WMI_PDEV_PARAM_PROXY_STA, | |
| 1054 | .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG, | |
| 1055 | .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP, | |
| 1056 | .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1057 | .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1058 | .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| a7bd3e99 | 1059 | .cal_period = WMI_PDEV_PARAM_UNSUPPORTED, |
| d86561ff RM |
1060 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
| 1061 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1062 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1063 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1064 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1065 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1066 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1067 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1068 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1069 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1070 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1071 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1072 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1073 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1074 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1075 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1076 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1077 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1078 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1079 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1080 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1081 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1082 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1083 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1084 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1085 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1086 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1087 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1088 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1089 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1090 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1091 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1092 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1093 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1094 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1095 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1096 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1097 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1098 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1099 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1100 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1101 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 226a339b BM |
1102 | }; |
| 1103 | ||
| 1104 | static struct wmi_pdev_param_map wmi_10x_pdev_param_map = { | |
| 1105 | .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, | |
| 1106 | .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, | |
| 1107 | .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, | |
| 1108 | .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, | |
| 1109 | .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, | |
| 1110 | .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, | |
| 1111 | .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, | |
| 1112 | .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
| 1113 | .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, | |
| 1114 | .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, | |
| 1115 | .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
| 1116 | .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, | |
| 1117 | .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, | |
| 1118 | .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
| 1119 | .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, | |
| 1120 | .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
| 1121 | .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
| 1122 | .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
| 1123 | .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
| 1124 | .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
| 1125 | .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
| 1126 | .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, | |
| 1127 | .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
| 1128 | .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, | |
| 1129 | .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, | |
| 1130 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1131 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1132 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1133 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1134 | .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
| 1135 | .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
| 1136 | .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
| 1137 | .bcnflt_stats_update_period = | |
| 1138 | WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
| 1139 | .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, | |
| ab6258ed | 1140 | .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, |
| 226a339b BM |
1141 | .dcs = WMI_10X_PDEV_PARAM_DCS, |
| 1142 | .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, | |
| 1143 | .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, | |
| 1144 | .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
| 1145 | .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, | |
| 1146 | .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, | |
| 1147 | .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, | |
| 1148 | .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1149 | .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1150 | .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1151 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, | |
| 1152 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, | |
| 1153 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, | |
| a7bd3e99 | 1154 | .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, |
| d86561ff RM |
1155 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
| 1156 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1157 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1158 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1159 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1160 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1161 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1162 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1163 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1164 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1165 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1166 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1167 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1168 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1169 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1170 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1171 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1172 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1173 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1174 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1175 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1176 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1177 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1178 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1179 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1180 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1181 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1182 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1183 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1184 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1185 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1186 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1187 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1188 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1189 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1190 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1191 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1192 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1193 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1194 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1195 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1196 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 226a339b BM |
1197 | }; |
| 1198 | ||
| 4a16fbec RM |
1199 | static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = { |
| 1200 | .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, | |
| 1201 | .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, | |
| 1202 | .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, | |
| 1203 | .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, | |
| 1204 | .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, | |
| 1205 | .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, | |
| 1206 | .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, | |
| 1207 | .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
| 1208 | .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, | |
| 1209 | .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, | |
| 1210 | .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
| 1211 | .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, | |
| 1212 | .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, | |
| 1213 | .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
| 1214 | .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, | |
| 1215 | .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
| 1216 | .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
| 1217 | .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
| 1218 | .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
| 1219 | .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
| 1220 | .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
| 1221 | .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, | |
| 1222 | .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
| 1223 | .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, | |
| 1224 | .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, | |
| 1225 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1226 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1227 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1228 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1229 | .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
| 1230 | .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
| 1231 | .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
| 1232 | .bcnflt_stats_update_period = | |
| 1233 | WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
| 1234 | .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, | |
| 1235 | .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, | |
| 1236 | .dcs = WMI_10X_PDEV_PARAM_DCS, | |
| 1237 | .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, | |
| 1238 | .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, | |
| 1239 | .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
| 1240 | .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, | |
| 1241 | .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, | |
| 1242 | .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, | |
| 1243 | .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1244 | .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1245 | .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1246 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, | |
| 1247 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, | |
| 1248 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, | |
| 1249 | .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, | |
| d86561ff RM |
1250 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
| 1251 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1252 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1253 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1254 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1255 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1256 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1257 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1258 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1259 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1260 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1261 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1262 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1263 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1264 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1265 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1266 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1267 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1268 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1269 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1270 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1271 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1272 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1273 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1274 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1275 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1276 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1277 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1278 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1279 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1280 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1281 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1282 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1283 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1284 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1285 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1286 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1287 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1288 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1289 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1290 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1291 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 4a16fbec RM |
1292 | }; |
| 1293 | ||
| 24c88f78 MK |
1294 | /* firmware 10.2 specific mappings */ |
| 1295 | static struct wmi_cmd_map wmi_10_2_cmd_map = { | |
| 1296 | .init_cmdid = WMI_10_2_INIT_CMDID, | |
| 1297 | .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, | |
| 1298 | .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, | |
| 1299 | .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, | |
| 1300 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1301 | .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, | |
| 1302 | .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, | |
| 1303 | .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, | |
| 1304 | .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, | |
| 1305 | .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, | |
| 1306 | .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, | |
| 1307 | .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, | |
| 1308 | .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, | |
| 1309 | .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, | |
| 1310 | .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
| 1311 | .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, | |
| 1312 | .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, | |
| 1313 | .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, | |
| 1314 | .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, | |
| 1315 | .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, | |
| 1316 | .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, | |
| 1317 | .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, | |
| 1318 | .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, | |
| 1319 | .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, | |
| 1320 | .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, | |
| 1321 | .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, | |
| 1322 | .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, | |
| 1323 | .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, | |
| 1324 | .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, | |
| 1325 | .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, | |
| 1326 | .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, | |
| 1327 | .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, | |
| 1328 | .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, | |
| 1329 | .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, | |
| 1330 | .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, | |
| 1331 | .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, | |
| 1332 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1333 | .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, | |
| 1334 | .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, | |
| 1335 | .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, | |
| 1336 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1337 | .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, | |
| 1338 | .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, | |
| 1339 | .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, | |
| 1340 | .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, | |
| 1341 | .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, | |
| 1342 | .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, | |
| 1343 | .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, | |
| 1344 | .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, | |
| 1345 | .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, | |
| 1346 | .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, | |
| 1347 | .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, | |
| 1348 | .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, | |
| 1349 | .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, | |
| 1350 | .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, | |
| 1351 | .roam_scan_rssi_change_threshold = | |
| 1352 | WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
| 1353 | .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, | |
| 1354 | .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, | |
| 1355 | .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, | |
| 1356 | .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, | |
| 1357 | .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, | |
| 1358 | .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, | |
| 1359 | .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, | |
| 1360 | .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, | |
| 1361 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1362 | .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, | |
| 1363 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1364 | .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, | |
| 1365 | .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, | |
| 1366 | .wlan_profile_set_hist_intvl_cmdid = | |
| 1367 | WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
| 1368 | .wlan_profile_get_profile_data_cmdid = | |
| 1369 | WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
| 1370 | .wlan_profile_enable_profile_id_cmdid = | |
| 1371 | WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
| 1372 | .wlan_profile_list_profile_id_cmdid = | |
| 1373 | WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
| 1374 | .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, | |
| 1375 | .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, | |
| 1376 | .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, | |
| 1377 | .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, | |
| 1378 | .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, | |
| 1379 | .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, | |
| 1380 | .wow_enable_disable_wake_event_cmdid = | |
| 1381 | WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
| 1382 | .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, | |
| 1383 | .wow_hostwakeup_from_sleep_cmdid = | |
| 1384 | WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
| 1385 | .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, | |
| 1386 | .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, | |
| 1387 | .vdev_spectral_scan_configure_cmdid = | |
| 1388 | WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
| 1389 | .vdev_spectral_scan_enable_cmdid = | |
| 1390 | WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
| 1391 | .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, | |
| 1392 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1393 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1394 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1395 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1396 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1397 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1398 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1399 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1400 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1401 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1402 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
| 1403 | .echo_cmdid = WMI_10_2_ECHO_CMDID, | |
| 1404 | .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, | |
| 1405 | .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, | |
| 1406 | .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, | |
| 1407 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1408 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1409 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1410 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1411 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, | |
| 1412 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, | |
| a57a6a27 | 1413 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
| 62f77f09 | 1414 | .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, |
| 772b4aee RM |
1415 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
| 1416 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1417 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1418 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1419 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1420 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1421 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1422 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1423 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1424 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1425 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1426 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1427 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1428 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1429 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1430 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1431 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1432 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1433 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1434 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1435 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1436 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1437 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1438 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1439 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1440 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1441 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1442 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1443 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1444 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1445 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1446 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 24c88f78 MK |
1447 | }; |
| 1448 | ||
| d86561ff RM |
1449 | static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = { |
| 1450 | .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK, | |
| 1451 | .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK, | |
| 1452 | .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G, | |
| 1453 | .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G, | |
| 1454 | .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE, | |
| 1455 | .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE, | |
| 1456 | .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE, | |
| 1457 | .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
| 1458 | .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE, | |
| 1459 | .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW, | |
| 1460 | .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
| 1461 | .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH, | |
| 1462 | .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH, | |
| 1463 | .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
| 1464 | .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE, | |
| 1465 | .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
| 1466 | .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
| 1467 | .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
| 1468 | .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
| 1469 | .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
| 1470 | .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
| 1471 | .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE, | |
| 1472 | .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
| 1473 | .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE, | |
| 1474 | .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE, | |
| 1475 | .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH, | |
| 1476 | .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, | |
| 1477 | .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
| 1478 | .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, | |
| 1479 | .pdev_stats_update_period = | |
| 1480 | WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
| 1481 | .vdev_stats_update_period = | |
| 1482 | WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
| 1483 | .peer_stats_update_period = | |
| 1484 | WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
| 1485 | .bcnflt_stats_update_period = | |
| 1486 | WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
| 1487 | .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS, | |
| 1488 | .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE, | |
| 1489 | .dcs = WMI_10_4_PDEV_PARAM_DCS, | |
| 1490 | .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE, | |
| 1491 | .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD, | |
| 1492 | .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
| 1493 | .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL, | |
| 1494 | .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL, | |
| 1495 | .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN, | |
| 1496 | .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA, | |
| 1497 | .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG, | |
| 1498 | .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP, | |
| 1499 | .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET, | |
| 1500 | .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR, | |
| 1501 | .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE, | |
| 1502 | .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD, | |
| 1503 | .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST, | |
| 1504 | .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE, | |
| 1505 | .smart_antenna_default_antenna = | |
| 1506 | WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, | |
| 1507 | .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE, | |
| 1508 | .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID, | |
| 1509 | .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN, | |
| 1510 | .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER, | |
| 1511 | .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID, | |
| 1512 | .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE, | |
| 1513 | .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE, | |
| 1514 | .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, | |
| 1515 | .remove_mcast2ucast_buffer = | |
| 1516 | WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, | |
| 1517 | .peer_sta_ps_statechg_enable = | |
| 1518 | WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE, | |
| 1519 | .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, | |
| 1520 | .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS, | |
| 1521 | .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID, | |
| 1522 | .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID, | |
| 1523 | .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID, | |
| 1524 | .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, | |
| 1525 | .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID, | |
| 1526 | .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID, | |
| 1527 | .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS, | |
| 1528 | .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY, | |
| 1529 | .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION, | |
| 1530 | .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD, | |
| 1531 | .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE, | |
| 1532 | .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO, | |
| 1533 | .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH, | |
| 1534 | .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION, | |
| 1535 | .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN, | |
| 1536 | .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT, | |
| 1537 | .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL, | |
| 1538 | .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G, | |
| 1539 | .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G, | |
| 1540 | .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU, | |
| 1541 | .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU, | |
| 1542 | .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD, | |
| 1543 | .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE, | |
| 1544 | .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET, | |
| 1545 | .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET, | |
| 1546 | .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR, | |
| 1547 | .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR, | |
| 1548 | }; | |
| 1549 | ||
| 3fab30f7 T |
1550 | static const struct wmi_peer_flags_map wmi_peer_flags_map = { |
| 1551 | .auth = WMI_PEER_AUTH, | |
| 1552 | .qos = WMI_PEER_QOS, | |
| 1553 | .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY, | |
| 1554 | .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY, | |
| 1555 | .apsd = WMI_PEER_APSD, | |
| 1556 | .ht = WMI_PEER_HT, | |
| 1557 | .bw40 = WMI_PEER_40MHZ, | |
| 1558 | .stbc = WMI_PEER_STBC, | |
| 1559 | .ldbc = WMI_PEER_LDPC, | |
| 1560 | .dyn_mimops = WMI_PEER_DYN_MIMOPS, | |
| 1561 | .static_mimops = WMI_PEER_STATIC_MIMOPS, | |
| 1562 | .spatial_mux = WMI_PEER_SPATIAL_MUX, | |
| 1563 | .vht = WMI_PEER_VHT, | |
| 1564 | .bw80 = WMI_PEER_80MHZ, | |
| 1565 | .vht_2g = WMI_PEER_VHT_2G, | |
| 1566 | .pmf = WMI_PEER_PMF, | |
| 1567 | }; | |
| 1568 | ||
| 1569 | static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = { | |
| 1570 | .auth = WMI_10X_PEER_AUTH, | |
| 1571 | .qos = WMI_10X_PEER_QOS, | |
| 1572 | .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY, | |
| 1573 | .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY, | |
| 1574 | .apsd = WMI_10X_PEER_APSD, | |
| 1575 | .ht = WMI_10X_PEER_HT, | |
| 1576 | .bw40 = WMI_10X_PEER_40MHZ, | |
| 1577 | .stbc = WMI_10X_PEER_STBC, | |
| 1578 | .ldbc = WMI_10X_PEER_LDPC, | |
| 1579 | .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS, | |
| 1580 | .static_mimops = WMI_10X_PEER_STATIC_MIMOPS, | |
| 1581 | .spatial_mux = WMI_10X_PEER_SPATIAL_MUX, | |
| 1582 | .vht = WMI_10X_PEER_VHT, | |
| 1583 | .bw80 = WMI_10X_PEER_80MHZ, | |
| 1584 | }; | |
| 1585 | ||
| 1586 | static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = { | |
| 1587 | .auth = WMI_10_2_PEER_AUTH, | |
| 1588 | .qos = WMI_10_2_PEER_QOS, | |
| 1589 | .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY, | |
| 1590 | .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY, | |
| 1591 | .apsd = WMI_10_2_PEER_APSD, | |
| 1592 | .ht = WMI_10_2_PEER_HT, | |
| 1593 | .bw40 = WMI_10_2_PEER_40MHZ, | |
| 1594 | .stbc = WMI_10_2_PEER_STBC, | |
| 1595 | .ldbc = WMI_10_2_PEER_LDPC, | |
| 1596 | .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS, | |
| 1597 | .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS, | |
| 1598 | .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX, | |
| 1599 | .vht = WMI_10_2_PEER_VHT, | |
| 1600 | .bw80 = WMI_10_2_PEER_80MHZ, | |
| 1601 | .vht_2g = WMI_10_2_PEER_VHT_2G, | |
| 1602 | .pmf = WMI_10_2_PEER_PMF, | |
| 1603 | }; | |
| 1604 | ||
| 0226d602 MK |
1605 | void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, |
| 1606 | const struct wmi_channel_arg *arg) | |
| 2d66721c MK |
1607 | { |
| 1608 | u32 flags = 0; | |
| 1609 | ||
| 1610 | memset(ch, 0, sizeof(*ch)); | |
| 1611 | ||
| 1612 | if (arg->passive) | |
| 1613 | flags |= WMI_CHAN_FLAG_PASSIVE; | |
| 1614 | if (arg->allow_ibss) | |
| 1615 | flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED; | |
| 1616 | if (arg->allow_ht) | |
| 1617 | flags |= WMI_CHAN_FLAG_ALLOW_HT; | |
| 1618 | if (arg->allow_vht) | |
| 1619 | flags |= WMI_CHAN_FLAG_ALLOW_VHT; | |
| 1620 | if (arg->ht40plus) | |
| 1621 | flags |= WMI_CHAN_FLAG_HT40_PLUS; | |
| 1622 | if (arg->chan_radar) | |
| 1623 | flags |= WMI_CHAN_FLAG_DFS; | |
| 1624 | ||
| 1625 | ch->mhz = __cpu_to_le32(arg->freq); | |
| 1626 | ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1); | |
| 1627 | ch->band_center_freq2 = 0; | |
| 1628 | ch->min_power = arg->min_power; | |
| 1629 | ch->max_power = arg->max_power; | |
| 1630 | ch->reg_power = arg->max_reg_power; | |
| 1631 | ch->antenna_max = arg->max_antenna_gain; | |
| 1632 | ||
| 1633 | /* mode & flags share storage */ | |
| 1634 | ch->mode = arg->mode; | |
| 1635 | ch->flags |= __cpu_to_le32(flags); | |
| 1636 | } | |
| 1637 | ||
| 5e3dd157 KV |
1638 | int ath10k_wmi_wait_for_service_ready(struct ath10k *ar) |
| 1639 | { | |
| 9eea5689 | 1640 | unsigned long time_left; |
| af762c0b | 1641 | |
| 9eea5689 NMG |
1642 | time_left = wait_for_completion_timeout(&ar->wmi.service_ready, |
| 1643 | WMI_SERVICE_READY_TIMEOUT_HZ); | |
| 1644 | if (!time_left) | |
| 1645 | return -ETIMEDOUT; | |
| 1646 | return 0; | |
| 5e3dd157 KV |
1647 | } |
| 1648 | ||
| 1649 | int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar) | |
| 1650 | { | |
| 9eea5689 | 1651 | unsigned long time_left; |
| af762c0b | 1652 | |
| 9eea5689 NMG |
1653 | time_left = wait_for_completion_timeout(&ar->wmi.unified_ready, |
| 1654 | WMI_UNIFIED_READY_TIMEOUT_HZ); | |
| 1655 | if (!time_left) | |
| 1656 | return -ETIMEDOUT; | |
| 1657 | return 0; | |
| 5e3dd157 KV |
1658 | } |
| 1659 | ||
| 666a73f3 | 1660 | struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len) |
| 5e3dd157 KV |
1661 | { |
| 1662 | struct sk_buff *skb; | |
| 1663 | u32 round_len = roundup(len, 4); | |
| 1664 | ||
| 7aa7a72a | 1665 | skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len); |
| 5e3dd157 KV |
1666 | if (!skb) |
| 1667 | return NULL; | |
| 1668 | ||
| 1669 | skb_reserve(skb, WMI_SKB_HEADROOM); | |
| 1670 | if (!IS_ALIGNED((unsigned long)skb->data, 4)) | |
| 7aa7a72a | 1671 | ath10k_warn(ar, "Unaligned WMI skb\n"); |
| 5e3dd157 KV |
1672 | |
| 1673 | skb_put(skb, round_len); | |
| 1674 | memset(skb->data, 0, round_len); | |
| 1675 | ||
| 1676 | return skb; | |
| 1677 | } | |
| 1678 | ||
| 1679 | static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb) | |
| 1680 | { | |
| 1681 | dev_kfree_skb(skb); | |
| 5e3dd157 KV |
1682 | } |
| 1683 | ||
| d7579d12 MK |
1684 | int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, |
| 1685 | u32 cmd_id) | |
| 5e3dd157 KV |
1686 | { |
| 1687 | struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb); | |
| 1688 | struct wmi_cmd_hdr *cmd_hdr; | |
| be8b3943 | 1689 | int ret; |
| 5e3dd157 KV |
1690 | u32 cmd = 0; |
| 1691 | ||
| 1692 | if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
| 1693 | return -ENOMEM; | |
| 1694 | ||
| 1695 | cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID); | |
| 1696 | ||
| 1697 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
| 1698 | cmd_hdr->cmd_id = __cpu_to_le32(cmd); | |
| 1699 | ||
| 5e3dd157 | 1700 | memset(skb_cb, 0, sizeof(*skb_cb)); |
| be8b3943 | 1701 | ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb); |
| d35a6c18 | 1702 | trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret); |
| 5e3dd157 | 1703 | |
| be8b3943 MK |
1704 | if (ret) |
| 1705 | goto err_pull; | |
| 5e3dd157 | 1706 | |
| be8b3943 MK |
1707 | return 0; |
| 1708 | ||
| 1709 | err_pull: | |
| 1710 | skb_pull(skb, sizeof(struct wmi_cmd_hdr)); | |
| 1711 | return ret; | |
| 1712 | } | |
| 1713 | ||
| ed54388a MK |
1714 | static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif) |
| 1715 | { | |
| af21319f | 1716 | struct ath10k *ar = arvif->ar; |
| 9ad50182 | 1717 | struct ath10k_skb_cb *cb; |
| af21319f | 1718 | struct sk_buff *bcn; |
| 66b8a010 MK |
1719 | bool dtim_zero; |
| 1720 | bool deliver_cab; | |
| ed54388a MK |
1721 | int ret; |
| 1722 | ||
| af21319f | 1723 | spin_lock_bh(&ar->data_lock); |
| ed54388a | 1724 | |
| af21319f | 1725 | bcn = arvif->beacon; |
| ed54388a | 1726 | |
| af21319f MK |
1727 | if (!bcn) |
| 1728 | goto unlock; | |
| ed54388a | 1729 | |
| 9ad50182 | 1730 | cb = ATH10K_SKB_CB(bcn); |
| ed54388a | 1731 | |
| af21319f MK |
1732 | switch (arvif->beacon_state) { |
| 1733 | case ATH10K_BEACON_SENDING: | |
| 1734 | case ATH10K_BEACON_SENT: | |
| 1735 | break; | |
| 1736 | case ATH10K_BEACON_SCHEDULED: | |
| 1737 | arvif->beacon_state = ATH10K_BEACON_SENDING; | |
| 1738 | spin_unlock_bh(&ar->data_lock); | |
| 1739 | ||
| 66b8a010 MK |
1740 | dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO); |
| 1741 | deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB); | |
| af21319f MK |
1742 | ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar, |
| 1743 | arvif->vdev_id, | |
| 1744 | bcn->data, bcn->len, | |
| 1745 | cb->paddr, | |
| 66b8a010 MK |
1746 | dtim_zero, |
| 1747 | deliver_cab); | |
| af21319f MK |
1748 | |
| 1749 | spin_lock_bh(&ar->data_lock); | |
| 1750 | ||
| 1751 | if (ret == 0) | |
| 1752 | arvif->beacon_state = ATH10K_BEACON_SENT; | |
| 1753 | else | |
| 1754 | arvif->beacon_state = ATH10K_BEACON_SCHEDULED; | |
| 1755 | } | |
| ed54388a | 1756 | |
| af21319f MK |
1757 | unlock: |
| 1758 | spin_unlock_bh(&ar->data_lock); | |
| ed54388a MK |
1759 | } |
| 1760 | ||
| 1761 | static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac, | |
| 1762 | struct ieee80211_vif *vif) | |
| 1763 | { | |
| 1764 | struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif); | |
| 1765 | ||
| 1766 | ath10k_wmi_tx_beacon_nowait(arvif); | |
| 1767 | } | |
| 1768 | ||
| 1769 | static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar) | |
| 1770 | { | |
| ed54388a MK |
1771 | ieee80211_iterate_active_interfaces_atomic(ar->hw, |
| 1772 | IEEE80211_IFACE_ITER_NORMAL, | |
| 1773 | ath10k_wmi_tx_beacons_iter, | |
| 1774 | NULL); | |
| ed54388a MK |
1775 | } |
| 1776 | ||
| 12acbc43 | 1777 | static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar) |
| be8b3943 | 1778 | { |
| ed54388a MK |
1779 | /* try to send pending beacons first. they take priority */ |
| 1780 | ath10k_wmi_tx_beacons_nowait(ar); | |
| 1781 | ||
| be8b3943 MK |
1782 | wake_up(&ar->wmi.tx_credits_wq); |
| 1783 | } | |
| 1784 | ||
| 666a73f3 | 1785 | int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id) |
| be8b3943 | 1786 | { |
| 34957b25 | 1787 | int ret = -EOPNOTSUPP; |
| be8b3943 | 1788 | |
| 56b84287 KV |
1789 | might_sleep(); |
| 1790 | ||
| 34957b25 | 1791 | if (cmd_id == WMI_CMD_UNSUPPORTED) { |
| 7aa7a72a | 1792 | ath10k_warn(ar, "wmi command %d is not supported by firmware\n", |
| 55321559 BM |
1793 | cmd_id); |
| 1794 | return ret; | |
| 1795 | } | |
| be8b3943 MK |
1796 | |
| 1797 | wait_event_timeout(ar->wmi.tx_credits_wq, ({ | |
| ed54388a MK |
1798 | /* try to send pending beacons first. they take priority */ |
| 1799 | ath10k_wmi_tx_beacons_nowait(ar); | |
| 1800 | ||
| be8b3943 | 1801 | ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id); |
| 7962b0d8 MK |
1802 | |
| 1803 | if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags)) | |
| 1804 | ret = -ESHUTDOWN; | |
| 1805 | ||
| be8b3943 MK |
1806 | (ret != -EAGAIN); |
| 1807 | }), 3*HZ); | |
| 1808 | ||
| 1809 | if (ret) | |
| 5e3dd157 | 1810 | dev_kfree_skb_any(skb); |
| 5e3dd157 | 1811 | |
| be8b3943 | 1812 | return ret; |
| 5e3dd157 KV |
1813 | } |
| 1814 | ||
| d7579d12 MK |
1815 | static struct sk_buff * |
| 1816 | ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu) | |
| 5e00d31a | 1817 | { |
| 609db229 MK |
1818 | struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu); |
| 1819 | struct ath10k_vif *arvif = (void *)cb->vif->drv_priv; | |
| 5e00d31a BM |
1820 | struct wmi_mgmt_tx_cmd *cmd; |
| 1821 | struct ieee80211_hdr *hdr; | |
| d7579d12 | 1822 | struct sk_buff *skb; |
| 5e00d31a | 1823 | int len; |
| 609db229 | 1824 | u32 vdev_id; |
| d7579d12 | 1825 | u32 buf_len = msdu->len; |
| 5e00d31a BM |
1826 | u16 fc; |
| 1827 | ||
| d7579d12 | 1828 | hdr = (struct ieee80211_hdr *)msdu->data; |
| 5e00d31a BM |
1829 | fc = le16_to_cpu(hdr->frame_control); |
| 1830 | ||
| 609db229 MK |
1831 | if (cb->vif) |
| 1832 | vdev_id = arvif->vdev_id; | |
| 1833 | else | |
| 1834 | vdev_id = 0; | |
| 1835 | ||
| 5e00d31a | 1836 | if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control))) |
| d7579d12 | 1837 | return ERR_PTR(-EINVAL); |
| 5e00d31a | 1838 | |
| d7579d12 | 1839 | len = sizeof(cmd->hdr) + msdu->len; |
| eeab266c MK |
1840 | |
| 1841 | if ((ieee80211_is_action(hdr->frame_control) || | |
| 1842 | ieee80211_is_deauth(hdr->frame_control) || | |
| 1843 | ieee80211_is_disassoc(hdr->frame_control)) && | |
| 1844 | ieee80211_has_protected(hdr->frame_control)) { | |
| 1845 | len += IEEE80211_CCMP_MIC_LEN; | |
| 1846 | buf_len += IEEE80211_CCMP_MIC_LEN; | |
| 1847 | } | |
| 1848 | ||
| 5e00d31a BM |
1849 | len = round_up(len, 4); |
| 1850 | ||
| d7579d12 MK |
1851 | skb = ath10k_wmi_alloc_skb(ar, len); |
| 1852 | if (!skb) | |
| 1853 | return ERR_PTR(-ENOMEM); | |
| 5e00d31a | 1854 | |
| d7579d12 | 1855 | cmd = (struct wmi_mgmt_tx_cmd *)skb->data; |
| 5e00d31a | 1856 | |
| 609db229 | 1857 | cmd->hdr.vdev_id = __cpu_to_le32(vdev_id); |
| 5e00d31a BM |
1858 | cmd->hdr.tx_rate = 0; |
| 1859 | cmd->hdr.tx_power = 0; | |
| eeab266c | 1860 | cmd->hdr.buf_len = __cpu_to_le32(buf_len); |
| 5e00d31a | 1861 | |
| b25f32cb | 1862 | ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr)); |
| d7579d12 | 1863 | memcpy(cmd->buf, msdu->data, msdu->len); |
| 5e00d31a | 1864 | |
| 7aa7a72a | 1865 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n", |
| d7579d12 | 1866 | msdu, skb->len, fc & IEEE80211_FCTL_FTYPE, |
| 5e00d31a | 1867 | fc & IEEE80211_FCTL_STYPE); |
| 5ce8e7fd RM |
1868 | trace_ath10k_tx_hdr(ar, skb->data, skb->len); |
| 1869 | trace_ath10k_tx_payload(ar, skb->data, skb->len); | |
| 5e00d31a | 1870 | |
| d7579d12 | 1871 | return skb; |
| 5e00d31a BM |
1872 | } |
| 1873 | ||
| 5c81c7fd MK |
1874 | static void ath10k_wmi_event_scan_started(struct ath10k *ar) |
| 1875 | { | |
| 1876 | lockdep_assert_held(&ar->data_lock); | |
| 1877 | ||
| 1878 | switch (ar->scan.state) { | |
| 1879 | case ATH10K_SCAN_IDLE: | |
| 1880 | case ATH10K_SCAN_RUNNING: | |
| 1881 | case ATH10K_SCAN_ABORTING: | |
| 7aa7a72a | 1882 | ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n", |
| 5c81c7fd MK |
1883 | ath10k_scan_state_str(ar->scan.state), |
| 1884 | ar->scan.state); | |
| 1885 | break; | |
| 1886 | case ATH10K_SCAN_STARTING: | |
| 1887 | ar->scan.state = ATH10K_SCAN_RUNNING; | |
| 1888 | ||
| 1889 | if (ar->scan.is_roc) | |
| 1890 | ieee80211_ready_on_channel(ar->hw); | |
| 1891 | ||
| 1892 | complete(&ar->scan.started); | |
| 1893 | break; | |
| 1894 | } | |
| 1895 | } | |
| 1896 | ||
| 2f9eec0b BG |
1897 | static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar) |
| 1898 | { | |
| 1899 | lockdep_assert_held(&ar->data_lock); | |
| 1900 | ||
| 1901 | switch (ar->scan.state) { | |
| 1902 | case ATH10K_SCAN_IDLE: | |
| 1903 | case ATH10K_SCAN_RUNNING: | |
| 1904 | case ATH10K_SCAN_ABORTING: | |
| 1905 | ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n", | |
| 1906 | ath10k_scan_state_str(ar->scan.state), | |
| 1907 | ar->scan.state); | |
| 1908 | break; | |
| 1909 | case ATH10K_SCAN_STARTING: | |
| 1910 | complete(&ar->scan.started); | |
| 1911 | __ath10k_scan_finish(ar); | |
| 1912 | break; | |
| 1913 | } | |
| 1914 | } | |
| 1915 | ||
| 5c81c7fd MK |
1916 | static void ath10k_wmi_event_scan_completed(struct ath10k *ar) |
| 1917 | { | |
| 1918 | lockdep_assert_held(&ar->data_lock); | |
| 1919 | ||
| 1920 | switch (ar->scan.state) { | |
| 1921 | case ATH10K_SCAN_IDLE: | |
| 1922 | case ATH10K_SCAN_STARTING: | |
| 1923 | /* One suspected reason scan can be completed while starting is | |
| 1924 | * if firmware fails to deliver all scan events to the host, | |
| 1925 | * e.g. when transport pipe is full. This has been observed | |
| 1926 | * with spectral scan phyerr events starving wmi transport | |
| 1927 | * pipe. In such case the "scan completed" event should be (and | |
| 1928 | * is) ignored by the host as it may be just firmware's scan | |
| 1929 | * state machine recovering. | |
| 1930 | */ | |
| 7aa7a72a | 1931 | ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n", |
| 5c81c7fd MK |
1932 | ath10k_scan_state_str(ar->scan.state), |
| 1933 | ar->scan.state); | |
| 1934 | break; | |
| 1935 | case ATH10K_SCAN_RUNNING: | |
| 1936 | case ATH10K_SCAN_ABORTING: | |
| 1937 | __ath10k_scan_finish(ar); | |
| 1938 | break; | |
| 1939 | } | |
| 1940 | } | |
| 1941 | ||
| 1942 | static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar) | |
| 1943 | { | |
| 1944 | lockdep_assert_held(&ar->data_lock); | |
| 1945 | ||
| 1946 | switch (ar->scan.state) { | |
| 1947 | case ATH10K_SCAN_IDLE: | |
| 1948 | case ATH10K_SCAN_STARTING: | |
| 7aa7a72a | 1949 | ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n", |
| 5c81c7fd MK |
1950 | ath10k_scan_state_str(ar->scan.state), |
| 1951 | ar->scan.state); | |
| 1952 | break; | |
| 1953 | case ATH10K_SCAN_RUNNING: | |
| 1954 | case ATH10K_SCAN_ABORTING: | |
| 1955 | ar->scan_channel = NULL; | |
| 1956 | break; | |
| 1957 | } | |
| 1958 | } | |
| 1959 | ||
| 1960 | static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq) | |
| 1961 | { | |
| 1962 | lockdep_assert_held(&ar->data_lock); | |
| 1963 | ||
| 1964 | switch (ar->scan.state) { | |
| 1965 | case ATH10K_SCAN_IDLE: | |
| 1966 | case ATH10K_SCAN_STARTING: | |
| 7aa7a72a | 1967 | ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n", |
| 5c81c7fd MK |
1968 | ath10k_scan_state_str(ar->scan.state), |
| 1969 | ar->scan.state); | |
| 1970 | break; | |
| 1971 | case ATH10K_SCAN_RUNNING: | |
| 1972 | case ATH10K_SCAN_ABORTING: | |
| 1973 | ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); | |
| 1974 | ||
| 1975 | if (ar->scan.is_roc && ar->scan.roc_freq == freq) | |
| 1976 | complete(&ar->scan.on_channel); | |
| 1977 | break; | |
| 1978 | } | |
| 1979 | } | |
| 1980 | ||
| 9ff8b724 MK |
1981 | static const char * |
| 1982 | ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type, | |
| 1983 | enum wmi_scan_completion_reason reason) | |
| 1984 | { | |
| 1985 | switch (type) { | |
| 1986 | case WMI_SCAN_EVENT_STARTED: | |
| 1987 | return "started"; | |
| 1988 | case WMI_SCAN_EVENT_COMPLETED: | |
| 1989 | switch (reason) { | |
| 1990 | case WMI_SCAN_REASON_COMPLETED: | |
| 1991 | return "completed"; | |
| 1992 | case WMI_SCAN_REASON_CANCELLED: | |
| 1993 | return "completed [cancelled]"; | |
| 1994 | case WMI_SCAN_REASON_PREEMPTED: | |
| 1995 | return "completed [preempted]"; | |
| 1996 | case WMI_SCAN_REASON_TIMEDOUT: | |
| 1997 | return "completed [timedout]"; | |
| b2297baa RM |
1998 | case WMI_SCAN_REASON_INTERNAL_FAILURE: |
| 1999 | return "completed [internal err]"; | |
| 9ff8b724 MK |
2000 | case WMI_SCAN_REASON_MAX: |
| 2001 | break; | |
| 2002 | } | |
| 2003 | return "completed [unknown]"; | |
| 2004 | case WMI_SCAN_EVENT_BSS_CHANNEL: | |
| 2005 | return "bss channel"; | |
| 2006 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL: | |
| 2007 | return "foreign channel"; | |
| 2008 | case WMI_SCAN_EVENT_DEQUEUED: | |
| 2009 | return "dequeued"; | |
| 2010 | case WMI_SCAN_EVENT_PREEMPTED: | |
| 2011 | return "preempted"; | |
| 2012 | case WMI_SCAN_EVENT_START_FAILED: | |
| 2013 | return "start failed"; | |
| b2297baa RM |
2014 | case WMI_SCAN_EVENT_RESTARTED: |
| 2015 | return "restarted"; | |
| 2016 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT: | |
| 2017 | return "foreign channel exit"; | |
| 9ff8b724 MK |
2018 | default: |
| 2019 | return "unknown"; | |
| 2020 | } | |
| 2021 | } | |
| 2022 | ||
| d7579d12 MK |
2023 | static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb, |
| 2024 | struct wmi_scan_ev_arg *arg) | |
| 32653cf1 MK |
2025 | { |
| 2026 | struct wmi_scan_event *ev = (void *)skb->data; | |
| 2027 | ||
| 2028 | if (skb->len < sizeof(*ev)) | |
| 2029 | return -EPROTO; | |
| 2030 | ||
| 2031 | skb_pull(skb, sizeof(*ev)); | |
| 2032 | arg->event_type = ev->event_type; | |
| 2033 | arg->reason = ev->reason; | |
| 2034 | arg->channel_freq = ev->channel_freq; | |
| 2035 | arg->scan_req_id = ev->scan_req_id; | |
| 2036 | arg->scan_id = ev->scan_id; | |
| 2037 | arg->vdev_id = ev->vdev_id; | |
| 2038 | ||
| 2039 | return 0; | |
| 2040 | } | |
| 2041 | ||
| 0226d602 | 2042 | int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2043 | { |
| 32653cf1 | 2044 | struct wmi_scan_ev_arg arg = {}; |
| 5e3dd157 KV |
2045 | enum wmi_scan_event_type event_type; |
| 2046 | enum wmi_scan_completion_reason reason; | |
| 2047 | u32 freq; | |
| 2048 | u32 req_id; | |
| 2049 | u32 scan_id; | |
| 2050 | u32 vdev_id; | |
| 32653cf1 | 2051 | int ret; |
| 5e3dd157 | 2052 | |
| d7579d12 | 2053 | ret = ath10k_wmi_pull_scan(ar, skb, &arg); |
| 32653cf1 MK |
2054 | if (ret) { |
| 2055 | ath10k_warn(ar, "failed to parse scan event: %d\n", ret); | |
| 2056 | return ret; | |
| 2057 | } | |
| 2058 | ||
| 2059 | event_type = __le32_to_cpu(arg.event_type); | |
| 2060 | reason = __le32_to_cpu(arg.reason); | |
| 2061 | freq = __le32_to_cpu(arg.channel_freq); | |
| 2062 | req_id = __le32_to_cpu(arg.scan_req_id); | |
| 2063 | scan_id = __le32_to_cpu(arg.scan_id); | |
| 2064 | vdev_id = __le32_to_cpu(arg.vdev_id); | |
| 5e3dd157 | 2065 | |
| 5c81c7fd MK |
2066 | spin_lock_bh(&ar->data_lock); |
| 2067 | ||
| 7aa7a72a | 2068 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5c81c7fd | 2069 | "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", |
| 9ff8b724 | 2070 | ath10k_wmi_event_scan_type_str(event_type, reason), |
| 5c81c7fd MK |
2071 | event_type, reason, freq, req_id, scan_id, vdev_id, |
| 2072 | ath10k_scan_state_str(ar->scan.state), ar->scan.state); | |
| 5e3dd157 KV |
2073 | |
| 2074 | switch (event_type) { | |
| 2075 | case WMI_SCAN_EVENT_STARTED: | |
| 5c81c7fd | 2076 | ath10k_wmi_event_scan_started(ar); |
| 5e3dd157 KV |
2077 | break; |
| 2078 | case WMI_SCAN_EVENT_COMPLETED: | |
| 5c81c7fd | 2079 | ath10k_wmi_event_scan_completed(ar); |
| 5e3dd157 KV |
2080 | break; |
| 2081 | case WMI_SCAN_EVENT_BSS_CHANNEL: | |
| 5c81c7fd | 2082 | ath10k_wmi_event_scan_bss_chan(ar); |
| 5e3dd157 KV |
2083 | break; |
| 2084 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL: | |
| 5c81c7fd MK |
2085 | ath10k_wmi_event_scan_foreign_chan(ar, freq); |
| 2086 | break; | |
| 2087 | case WMI_SCAN_EVENT_START_FAILED: | |
| 7aa7a72a | 2088 | ath10k_warn(ar, "received scan start failure event\n"); |
| 2f9eec0b | 2089 | ath10k_wmi_event_scan_start_failed(ar); |
| 5e3dd157 KV |
2090 | break; |
| 2091 | case WMI_SCAN_EVENT_DEQUEUED: | |
| 5e3dd157 | 2092 | case WMI_SCAN_EVENT_PREEMPTED: |
| b2297baa RM |
2093 | case WMI_SCAN_EVENT_RESTARTED: |
| 2094 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT: | |
| 5e3dd157 KV |
2095 | default: |
| 2096 | break; | |
| 2097 | } | |
| 2098 | ||
| 2099 | spin_unlock_bh(&ar->data_lock); | |
| 2100 | return 0; | |
| 2101 | } | |
| 2102 | ||
| 504f6cdf SM |
2103 | /* If keys are configured, HW decrypts all frames |
| 2104 | * with protected bit set. Mark such frames as decrypted. | |
| 2105 | */ | |
| 2106 | static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar, | |
| 2107 | struct sk_buff *skb, | |
| 2108 | struct ieee80211_rx_status *status) | |
| 2109 | { | |
| 2110 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
| 2111 | unsigned int hdrlen; | |
| 2112 | bool peer_key; | |
| 2113 | u8 *addr, keyidx; | |
| 2114 | ||
| 2115 | if (!ieee80211_is_auth(hdr->frame_control) || | |
| 2116 | !ieee80211_has_protected(hdr->frame_control)) | |
| 2117 | return; | |
| 2118 | ||
| 2119 | hdrlen = ieee80211_hdrlen(hdr->frame_control); | |
| 2120 | if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN)) | |
| 2121 | return; | |
| 2122 | ||
| 2123 | keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT; | |
| 2124 | addr = ieee80211_get_SA(hdr); | |
| 2125 | ||
| 2126 | spin_lock_bh(&ar->data_lock); | |
| 2127 | peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx); | |
| 2128 | spin_unlock_bh(&ar->data_lock); | |
| 2129 | ||
| 2130 | if (peer_key) { | |
| 2131 | ath10k_dbg(ar, ATH10K_DBG_MAC, | |
| 2132 | "mac wep key present for peer %pM\n", addr); | |
| 2133 | status->flag |= RX_FLAG_DECRYPTED; | |
| 2134 | } | |
| 2135 | } | |
| 2136 | ||
| d7579d12 MK |
2137 | static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb, |
| 2138 | struct wmi_mgmt_rx_ev_arg *arg) | |
| 5e3dd157 | 2139 | { |
| 0d9b0438 MK |
2140 | struct wmi_mgmt_rx_event_v1 *ev_v1; |
| 2141 | struct wmi_mgmt_rx_event_v2 *ev_v2; | |
| 2142 | struct wmi_mgmt_rx_hdr_v1 *ev_hdr; | |
| 8d130963 | 2143 | struct wmi_mgmt_rx_ext_info *ext_info; |
| 32653cf1 MK |
2144 | size_t pull_len; |
| 2145 | u32 msdu_len; | |
| 8d130963 | 2146 | u32 len; |
| 32653cf1 MK |
2147 | |
| 2148 | if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) { | |
| 2149 | ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data; | |
| 2150 | ev_hdr = &ev_v2->hdr.v1; | |
| 2151 | pull_len = sizeof(*ev_v2); | |
| 2152 | } else { | |
| 2153 | ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data; | |
| 2154 | ev_hdr = &ev_v1->hdr; | |
| 2155 | pull_len = sizeof(*ev_v1); | |
| 2156 | } | |
| 2157 | ||
| 2158 | if (skb->len < pull_len) | |
| 2159 | return -EPROTO; | |
| 2160 | ||
| 2161 | skb_pull(skb, pull_len); | |
| 2162 | arg->channel = ev_hdr->channel; | |
| 2163 | arg->buf_len = ev_hdr->buf_len; | |
| 2164 | arg->status = ev_hdr->status; | |
| 2165 | arg->snr = ev_hdr->snr; | |
| 2166 | arg->phy_mode = ev_hdr->phy_mode; | |
| 2167 | arg->rate = ev_hdr->rate; | |
| 2168 | ||
| 2169 | msdu_len = __le32_to_cpu(arg->buf_len); | |
| 2170 | if (skb->len < msdu_len) | |
| 2171 | return -EPROTO; | |
| 2172 | ||
| 8d130963 PO |
2173 | if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) { |
| 2174 | len = ALIGN(le32_to_cpu(arg->buf_len), 4); | |
| 2175 | ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len); | |
| 2176 | memcpy(&arg->ext_info, ext_info, | |
| 2177 | sizeof(struct wmi_mgmt_rx_ext_info)); | |
| 2178 | } | |
| 32653cf1 MK |
2179 | /* the WMI buffer might've ended up being padded to 4 bytes due to HTC |
| 2180 | * trailer with credit update. Trim the excess garbage. | |
| 2181 | */ | |
| 2182 | skb_trim(skb, msdu_len); | |
| 2183 | ||
| 2184 | return 0; | |
| 2185 | } | |
| 2186 | ||
| 1c092961 RM |
2187 | static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar, |
| 2188 | struct sk_buff *skb, | |
| 2189 | struct wmi_mgmt_rx_ev_arg *arg) | |
| 2190 | { | |
| 2191 | struct wmi_10_4_mgmt_rx_event *ev; | |
| 2192 | struct wmi_10_4_mgmt_rx_hdr *ev_hdr; | |
| 2193 | size_t pull_len; | |
| 2194 | u32 msdu_len; | |
| 7d5efd08 PO |
2195 | struct wmi_mgmt_rx_ext_info *ext_info; |
| 2196 | u32 len; | |
| 1c092961 RM |
2197 | |
| 2198 | ev = (struct wmi_10_4_mgmt_rx_event *)skb->data; | |
| 2199 | ev_hdr = &ev->hdr; | |
| 2200 | pull_len = sizeof(*ev); | |
| 2201 | ||
| 2202 | if (skb->len < pull_len) | |
| 2203 | return -EPROTO; | |
| 2204 | ||
| 2205 | skb_pull(skb, pull_len); | |
| 2206 | arg->channel = ev_hdr->channel; | |
| 2207 | arg->buf_len = ev_hdr->buf_len; | |
| 2208 | arg->status = ev_hdr->status; | |
| 2209 | arg->snr = ev_hdr->snr; | |
| 2210 | arg->phy_mode = ev_hdr->phy_mode; | |
| 2211 | arg->rate = ev_hdr->rate; | |
| 2212 | ||
| 2213 | msdu_len = __le32_to_cpu(arg->buf_len); | |
| 2214 | if (skb->len < msdu_len) | |
| 2215 | return -EPROTO; | |
| 2216 | ||
| 7d5efd08 PO |
2217 | if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) { |
| 2218 | len = ALIGN(le32_to_cpu(arg->buf_len), 4); | |
| 2219 | ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len); | |
| 2220 | memcpy(&arg->ext_info, ext_info, | |
| 2221 | sizeof(struct wmi_mgmt_rx_ext_info)); | |
| 2222 | } | |
| 2223 | ||
| 1c092961 RM |
2224 | /* Make sure bytes added for padding are removed. */ |
| 2225 | skb_trim(skb, msdu_len); | |
| 2226 | ||
| 2227 | return 0; | |
| 2228 | } | |
| 2229 | ||
| 0226d602 | 2230 | int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) |
| 32653cf1 MK |
2231 | { |
| 2232 | struct wmi_mgmt_rx_ev_arg arg = {}; | |
| 5e3dd157 KV |
2233 | struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); |
| 2234 | struct ieee80211_hdr *hdr; | |
| 01cebe1c | 2235 | struct ieee80211_supported_band *sband; |
| 5e3dd157 KV |
2236 | u32 rx_status; |
| 2237 | u32 channel; | |
| 2238 | u32 phy_mode; | |
| 2239 | u32 snr; | |
| 2240 | u32 rate; | |
| 2241 | u32 buf_len; | |
| 2242 | u16 fc; | |
| 32653cf1 | 2243 | int ret; |
| 0d9b0438 | 2244 | |
| d7579d12 | 2245 | ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg); |
| 32653cf1 MK |
2246 | if (ret) { |
| 2247 | ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret); | |
| 08603f2e | 2248 | dev_kfree_skb(skb); |
| 32653cf1 | 2249 | return ret; |
| 0d9b0438 | 2250 | } |
| 5e3dd157 | 2251 | |
| 32653cf1 MK |
2252 | channel = __le32_to_cpu(arg.channel); |
| 2253 | buf_len = __le32_to_cpu(arg.buf_len); | |
| 2254 | rx_status = __le32_to_cpu(arg.status); | |
| 2255 | snr = __le32_to_cpu(arg.snr); | |
| 2256 | phy_mode = __le32_to_cpu(arg.phy_mode); | |
| 2257 | rate = __le32_to_cpu(arg.rate); | |
| 5e3dd157 KV |
2258 | |
| 2259 | memset(status, 0, sizeof(*status)); | |
| 2260 | ||
| 7aa7a72a | 2261 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
| 5e3dd157 KV |
2262 | "event mgmt rx status %08x\n", rx_status); |
| 2263 | ||
| 2c9bcece MP |
2264 | if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) || |
| 2265 | (rx_status & (WMI_RX_STATUS_ERR_DECRYPT | | |
| 2266 | WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) { | |
| d67d0a02 MK |
2267 | dev_kfree_skb(skb); |
| 2268 | return 0; | |
| 2269 | } | |
| 2270 | ||
| 5e3dd157 KV |
2271 | if (rx_status & WMI_RX_STATUS_ERR_MIC) |
| 2272 | status->flag |= RX_FLAG_MMIC_ERROR; | |
| 2273 | ||
| 8d130963 PO |
2274 | if (rx_status & WMI_RX_STATUS_EXT_INFO) { |
| 2275 | status->mactime = | |
| 2276 | __le64_to_cpu(arg.ext_info.rx_mac_timestamp); | |
| 2277 | status->flag |= RX_FLAG_MACTIME_END; | |
| 2278 | } | |
| 21040bf9 | 2279 | /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to |
| 453cdb61 | 2280 | * MODE_11B. This means phy_mode is not a reliable source for the band |
| 21040bf9 MK |
2281 | * of mgmt rx. |
| 2282 | */ | |
| 2283 | if (channel >= 1 && channel <= 14) { | |
| 2284 | status->band = IEEE80211_BAND_2GHZ; | |
| 2285 | } else if (channel >= 36 && channel <= 165) { | |
| 2286 | status->band = IEEE80211_BAND_5GHZ; | |
| 453cdb61 | 2287 | } else { |
| 21040bf9 MK |
2288 | /* Shouldn't happen unless list of advertised channels to |
| 2289 | * mac80211 has been changed. | |
| 2290 | */ | |
| 2291 | WARN_ON_ONCE(1); | |
| 2292 | dev_kfree_skb(skb); | |
| 2293 | return 0; | |
| 453cdb61 MK |
2294 | } |
| 2295 | ||
| 21040bf9 MK |
2296 | if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ) |
| 2297 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n"); | |
| 2298 | ||
| 01cebe1c MK |
2299 | sband = &ar->mac.sbands[status->band]; |
| 2300 | ||
| 5e3dd157 KV |
2301 | status->freq = ieee80211_channel_to_frequency(channel, status->band); |
| 2302 | status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR; | |
| 01cebe1c | 2303 | status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100); |
| 5e3dd157 | 2304 | |
| 5e3dd157 KV |
2305 | hdr = (struct ieee80211_hdr *)skb->data; |
| 2306 | fc = le16_to_cpu(hdr->frame_control); | |
| 2307 | ||
| 60549cab GB |
2308 | /* Firmware is guaranteed to report all essential management frames via |
| 2309 | * WMI while it can deliver some extra via HTT. Since there can be | |
| 2310 | * duplicates split the reporting wrt monitor/sniffing. | |
| 2311 | */ | |
| 2312 | status->flag |= RX_FLAG_SKIP_MONITOR; | |
| 2313 | ||
| 504f6cdf SM |
2314 | ath10k_wmi_handle_wep_reauth(ar, skb, status); |
| 2315 | ||
| 2b6a6a90 MK |
2316 | /* FW delivers WEP Shared Auth frame with Protected Bit set and |
| 2317 | * encrypted payload. However in case of PMF it delivers decrypted | |
| 2318 | * frames with Protected Bit set. */ | |
| 2319 | if (ieee80211_has_protected(hdr->frame_control) && | |
| 2320 | !ieee80211_is_auth(hdr->frame_control)) { | |
| eeab266c MK |
2321 | status->flag |= RX_FLAG_DECRYPTED; |
| 2322 | ||
| 2323 | if (!ieee80211_is_action(hdr->frame_control) && | |
| 2324 | !ieee80211_is_deauth(hdr->frame_control) && | |
| 2325 | !ieee80211_is_disassoc(hdr->frame_control)) { | |
| 2326 | status->flag |= RX_FLAG_IV_STRIPPED | | |
| 2327 | RX_FLAG_MMIC_STRIPPED; | |
| 2328 | hdr->frame_control = __cpu_to_le16(fc & | |
| 5e3dd157 | 2329 | ~IEEE80211_FCTL_PROTECTED); |
| eeab266c | 2330 | } |
| 5e3dd157 KV |
2331 | } |
| 2332 | ||
| cc9904e6 MK |
2333 | if (ieee80211_is_beacon(hdr->frame_control)) |
| 2334 | ath10k_mac_handle_beacon(ar, skb); | |
| 2335 | ||
| 7aa7a72a | 2336 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
| 5e3dd157 KV |
2337 | "event mgmt rx skb %p len %d ftype %02x stype %02x\n", |
| 2338 | skb, skb->len, | |
| 2339 | fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); | |
| 2340 | ||
| 7aa7a72a | 2341 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
| 5e3dd157 KV |
2342 | "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", |
| 2343 | status->freq, status->band, status->signal, | |
| 2344 | status->rate_idx); | |
| 2345 | ||
| 5e3dd157 KV |
2346 | ieee80211_rx(ar->hw, skb); |
| 2347 | return 0; | |
| 2348 | } | |
| 2349 | ||
| 2e1dea40 MK |
2350 | static int freq_to_idx(struct ath10k *ar, int freq) |
| 2351 | { | |
| 2352 | struct ieee80211_supported_band *sband; | |
| 2353 | int band, ch, idx = 0; | |
| 2354 | ||
| 2355 | for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) { | |
| 2356 | sband = ar->hw->wiphy->bands[band]; | |
| 2357 | if (!sband) | |
| 2358 | continue; | |
| 2359 | ||
| 2360 | for (ch = 0; ch < sband->n_channels; ch++, idx++) | |
| 2361 | if (sband->channels[ch].center_freq == freq) | |
| 2362 | goto exit; | |
| 2363 | } | |
| 2364 | ||
| 2365 | exit: | |
| 2366 | return idx; | |
| 2367 | } | |
| 2368 | ||
| d7579d12 MK |
2369 | static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb, |
| 2370 | struct wmi_ch_info_ev_arg *arg) | |
| 32653cf1 MK |
2371 | { |
| 2372 | struct wmi_chan_info_event *ev = (void *)skb->data; | |
| 2373 | ||
| 2374 | if (skb->len < sizeof(*ev)) | |
| 2375 | return -EPROTO; | |
| 2376 | ||
| 2377 | skb_pull(skb, sizeof(*ev)); | |
| 2378 | arg->err_code = ev->err_code; | |
| 2379 | arg->freq = ev->freq; | |
| 2380 | arg->cmd_flags = ev->cmd_flags; | |
| 2381 | arg->noise_floor = ev->noise_floor; | |
| 2382 | arg->rx_clear_count = ev->rx_clear_count; | |
| 2383 | arg->cycle_count = ev->cycle_count; | |
| 2384 | ||
| 2385 | return 0; | |
| 2386 | } | |
| 2387 | ||
| b2297baa RM |
2388 | static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar, |
| 2389 | struct sk_buff *skb, | |
| 2390 | struct wmi_ch_info_ev_arg *arg) | |
| 2391 | { | |
| 2392 | struct wmi_10_4_chan_info_event *ev = (void *)skb->data; | |
| 2393 | ||
| 2394 | if (skb->len < sizeof(*ev)) | |
| 2395 | return -EPROTO; | |
| 2396 | ||
| 2397 | skb_pull(skb, sizeof(*ev)); | |
| 2398 | arg->err_code = ev->err_code; | |
| 2399 | arg->freq = ev->freq; | |
| 2400 | arg->cmd_flags = ev->cmd_flags; | |
| 2401 | arg->noise_floor = ev->noise_floor; | |
| 2402 | arg->rx_clear_count = ev->rx_clear_count; | |
| 2403 | arg->cycle_count = ev->cycle_count; | |
| 2404 | arg->chan_tx_pwr_range = ev->chan_tx_pwr_range; | |
| 2405 | arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; | |
| 2406 | arg->rx_frame_count = ev->rx_frame_count; | |
| 2407 | ||
| 2408 | return 0; | |
| 2409 | } | |
| 2410 | ||
| 0226d602 | 2411 | void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2412 | { |
| 32653cf1 | 2413 | struct wmi_ch_info_ev_arg arg = {}; |
| 2e1dea40 MK |
2414 | struct survey_info *survey; |
| 2415 | u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count; | |
| 32653cf1 | 2416 | int idx, ret; |
| 2e1dea40 | 2417 | |
| d7579d12 | 2418 | ret = ath10k_wmi_pull_ch_info(ar, skb, &arg); |
| 32653cf1 MK |
2419 | if (ret) { |
| 2420 | ath10k_warn(ar, "failed to parse chan info event: %d\n", ret); | |
| 2421 | return; | |
| 2422 | } | |
| 2e1dea40 | 2423 | |
| 32653cf1 MK |
2424 | err_code = __le32_to_cpu(arg.err_code); |
| 2425 | freq = __le32_to_cpu(arg.freq); | |
| 2426 | cmd_flags = __le32_to_cpu(arg.cmd_flags); | |
| 2427 | noise_floor = __le32_to_cpu(arg.noise_floor); | |
| 2428 | rx_clear_count = __le32_to_cpu(arg.rx_clear_count); | |
| 2429 | cycle_count = __le32_to_cpu(arg.cycle_count); | |
| 2e1dea40 | 2430 | |
| 7aa7a72a | 2431 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 2e1dea40 MK |
2432 | "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n", |
| 2433 | err_code, freq, cmd_flags, noise_floor, rx_clear_count, | |
| 2434 | cycle_count); | |
| 2435 | ||
| 2436 | spin_lock_bh(&ar->data_lock); | |
| 2437 | ||
| 5c81c7fd MK |
2438 | switch (ar->scan.state) { |
| 2439 | case ATH10K_SCAN_IDLE: | |
| 2440 | case ATH10K_SCAN_STARTING: | |
| 7aa7a72a | 2441 | ath10k_warn(ar, "received chan info event without a scan request, ignoring\n"); |
| 2e1dea40 | 2442 | goto exit; |
| 5c81c7fd MK |
2443 | case ATH10K_SCAN_RUNNING: |
| 2444 | case ATH10K_SCAN_ABORTING: | |
| 2445 | break; | |
| 2e1dea40 MK |
2446 | } |
| 2447 | ||
| 2448 | idx = freq_to_idx(ar, freq); | |
| 2449 | if (idx >= ARRAY_SIZE(ar->survey)) { | |
| 7aa7a72a | 2450 | ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n", |
| 2e1dea40 MK |
2451 | freq, idx); |
| 2452 | goto exit; | |
| 2453 | } | |
| 2454 | ||
| 2455 | if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) { | |
| 44b7d483 MK |
2456 | if (ar->ch_info_can_report_survey) { |
| 2457 | survey = &ar->survey[idx]; | |
| 2458 | survey->noise = noise_floor; | |
| 2459 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
| 2460 | ||
| 2461 | ath10k_hw_fill_survey_time(ar, | |
| 2462 | survey, | |
| 2463 | cycle_count, | |
| 2464 | rx_clear_count, | |
| 2465 | ar->survey_last_cycle_count, | |
| 2466 | ar->survey_last_rx_clear_count); | |
| 2467 | } | |
| 2468 | ||
| 2469 | ar->ch_info_can_report_survey = false; | |
| 2470 | } else { | |
| 2471 | ar->ch_info_can_report_survey = true; | |
| 2e1dea40 MK |
2472 | } |
| 2473 | ||
| 3d2a2e29 VT |
2474 | if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) { |
| 2475 | ar->survey_last_rx_clear_count = rx_clear_count; | |
| 2476 | ar->survey_last_cycle_count = cycle_count; | |
| 2477 | } | |
| 2e1dea40 MK |
2478 | |
| 2479 | exit: | |
| 2480 | spin_unlock_bh(&ar->data_lock); | |
| 5e3dd157 KV |
2481 | } |
| 2482 | ||
| 0226d602 | 2483 | void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2484 | { |
| 7aa7a72a | 2485 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n"); |
| 5e3dd157 KV |
2486 | } |
| 2487 | ||
| 0226d602 | 2488 | int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2489 | { |
| 7aa7a72a | 2490 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n", |
| 869526b9 KV |
2491 | skb->len); |
| 2492 | ||
| d35a6c18 | 2493 | trace_ath10k_wmi_dbglog(ar, skb->data, skb->len); |
| 869526b9 KV |
2494 | |
| 2495 | return 0; | |
| 5e3dd157 KV |
2496 | } |
| 2497 | ||
| b91251fb MK |
2498 | void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src, |
| 2499 | struct ath10k_fw_stats_pdev *dst) | |
| d15fb520 | 2500 | { |
| d15fb520 MK |
2501 | dst->ch_noise_floor = __le32_to_cpu(src->chan_nf); |
| 2502 | dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); | |
| 2503 | dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); | |
| 2504 | dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count); | |
| 2505 | dst->cycle_count = __le32_to_cpu(src->cycle_count); | |
| 2506 | dst->phy_err_count = __le32_to_cpu(src->phy_err_count); | |
| 2507 | dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); | |
| b91251fb | 2508 | } |
| d15fb520 | 2509 | |
| b91251fb MK |
2510 | void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src, |
| 2511 | struct ath10k_fw_stats_pdev *dst) | |
| 2512 | { | |
| 2513 | dst->comp_queued = __le32_to_cpu(src->comp_queued); | |
| 2514 | dst->comp_delivered = __le32_to_cpu(src->comp_delivered); | |
| 2515 | dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); | |
| 2516 | dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); | |
| 2517 | dst->wmm_drop = __le32_to_cpu(src->wmm_drop); | |
| 2518 | dst->local_enqued = __le32_to_cpu(src->local_enqued); | |
| 2519 | dst->local_freed = __le32_to_cpu(src->local_freed); | |
| 2520 | dst->hw_queued = __le32_to_cpu(src->hw_queued); | |
| 2521 | dst->hw_reaped = __le32_to_cpu(src->hw_reaped); | |
| 2522 | dst->underrun = __le32_to_cpu(src->underrun); | |
| 2523 | dst->tx_abort = __le32_to_cpu(src->tx_abort); | |
| 2524 | dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); | |
| 2525 | dst->tx_ko = __le32_to_cpu(src->tx_ko); | |
| 2526 | dst->data_rc = __le32_to_cpu(src->data_rc); | |
| 2527 | dst->self_triggers = __le32_to_cpu(src->self_triggers); | |
| 2528 | dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); | |
| 2529 | dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); | |
| 2530 | dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); | |
| 2531 | dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); | |
| 2532 | dst->pdev_resets = __le32_to_cpu(src->pdev_resets); | |
| 2533 | dst->phy_underrun = __le32_to_cpu(src->phy_underrun); | |
| 2534 | dst->txop_ovf = __le32_to_cpu(src->txop_ovf); | |
| 2535 | } | |
| d15fb520 | 2536 | |
| 98dd2b92 MP |
2537 | static void |
| 2538 | ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src, | |
| 2539 | struct ath10k_fw_stats_pdev *dst) | |
| 2540 | { | |
| 2541 | dst->comp_queued = __le32_to_cpu(src->comp_queued); | |
| 2542 | dst->comp_delivered = __le32_to_cpu(src->comp_delivered); | |
| 2543 | dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); | |
| 2544 | dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); | |
| 2545 | dst->wmm_drop = __le32_to_cpu(src->wmm_drop); | |
| 2546 | dst->local_enqued = __le32_to_cpu(src->local_enqued); | |
| 2547 | dst->local_freed = __le32_to_cpu(src->local_freed); | |
| 2548 | dst->hw_queued = __le32_to_cpu(src->hw_queued); | |
| 2549 | dst->hw_reaped = __le32_to_cpu(src->hw_reaped); | |
| 2550 | dst->underrun = __le32_to_cpu(src->underrun); | |
| 2551 | dst->tx_abort = __le32_to_cpu(src->tx_abort); | |
| 2552 | dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); | |
| 2553 | dst->tx_ko = __le32_to_cpu(src->tx_ko); | |
| 2554 | dst->data_rc = __le32_to_cpu(src->data_rc); | |
| 2555 | dst->self_triggers = __le32_to_cpu(src->self_triggers); | |
| 2556 | dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); | |
| 2557 | dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); | |
| 2558 | dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); | |
| 2559 | dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); | |
| 2560 | dst->pdev_resets = __le32_to_cpu(src->pdev_resets); | |
| 2561 | dst->phy_underrun = __le32_to_cpu(src->phy_underrun); | |
| 2562 | dst->txop_ovf = __le32_to_cpu(src->txop_ovf); | |
| 2563 | dst->hw_paused = __le32_to_cpu(src->hw_paused); | |
| 2564 | dst->seq_posted = __le32_to_cpu(src->seq_posted); | |
| 2565 | dst->seq_failed_queueing = | |
| 2566 | __le32_to_cpu(src->seq_failed_queueing); | |
| 2567 | dst->seq_completed = __le32_to_cpu(src->seq_completed); | |
| 2568 | dst->seq_restarted = __le32_to_cpu(src->seq_restarted); | |
| 2569 | dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted); | |
| 2570 | dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush); | |
| 2571 | dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter); | |
| 2572 | dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated); | |
| 2573 | dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed); | |
| 2574 | dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter); | |
| 2575 | dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired); | |
| 2576 | } | |
| 2577 | ||
| b91251fb MK |
2578 | void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src, |
| 2579 | struct ath10k_fw_stats_pdev *dst) | |
| 2580 | { | |
| 2581 | dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change); | |
| 2582 | dst->status_rcvd = __le32_to_cpu(src->status_rcvd); | |
| 2583 | dst->r0_frags = __le32_to_cpu(src->r0_frags); | |
| 2584 | dst->r1_frags = __le32_to_cpu(src->r1_frags); | |
| 2585 | dst->r2_frags = __le32_to_cpu(src->r2_frags); | |
| 2586 | dst->r3_frags = __le32_to_cpu(src->r3_frags); | |
| 2587 | dst->htt_msdus = __le32_to_cpu(src->htt_msdus); | |
| 2588 | dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus); | |
| 2589 | dst->loc_msdus = __le32_to_cpu(src->loc_msdus); | |
| 2590 | dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus); | |
| 2591 | dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu); | |
| 2592 | dst->phy_errs = __le32_to_cpu(src->phy_errs); | |
| 2593 | dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop); | |
| 2594 | dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs); | |
| 2595 | } | |
| 2596 | ||
| 2597 | void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src, | |
| 2598 | struct ath10k_fw_stats_pdev *dst) | |
| 2599 | { | |
| 2600 | dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad); | |
| 2601 | dst->rts_bad = __le32_to_cpu(src->rts_bad); | |
| 2602 | dst->rts_good = __le32_to_cpu(src->rts_good); | |
| 2603 | dst->fcs_bad = __le32_to_cpu(src->fcs_bad); | |
| 2604 | dst->no_beacons = __le32_to_cpu(src->no_beacons); | |
| 2605 | dst->mib_int_count = __le32_to_cpu(src->mib_int_count); | |
| d15fb520 MK |
2606 | } |
| 2607 | ||
| 0226d602 MK |
2608 | void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, |
| 2609 | struct ath10k_fw_stats_peer *dst) | |
| d15fb520 MK |
2610 | { |
| 2611 | ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); | |
| 2612 | dst->peer_rssi = __le32_to_cpu(src->peer_rssi); | |
| 2613 | dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); | |
| 2614 | } | |
| 2615 | ||
| f9575793 MSS |
2616 | static void |
| 2617 | ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src, | |
| 2618 | struct ath10k_fw_stats_peer *dst) | |
| 2619 | { | |
| 2620 | ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); | |
| 2621 | dst->peer_rssi = __le32_to_cpu(src->peer_rssi); | |
| 2622 | dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); | |
| 2623 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
| 2624 | } | |
| 2625 | ||
| d7579d12 MK |
2626 | static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar, |
| 2627 | struct sk_buff *skb, | |
| 2628 | struct ath10k_fw_stats *stats) | |
| d15fb520 MK |
2629 | { |
| 2630 | const struct wmi_stats_event *ev = (void *)skb->data; | |
| 2631 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; | |
| 2632 | int i; | |
| 2633 | ||
| 2634 | if (!skb_pull(skb, sizeof(*ev))) | |
| 2635 | return -EPROTO; | |
| 2636 | ||
| 2637 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
| 2638 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
| 2639 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
| 2640 | ||
| 5326849a | 2641 | for (i = 0; i < num_pdev_stats; i++) { |
| d15fb520 | 2642 | const struct wmi_pdev_stats *src; |
| 5326849a | 2643 | struct ath10k_fw_stats_pdev *dst; |
| d15fb520 MK |
2644 | |
| 2645 | src = (void *)skb->data; | |
| 2646 | if (!skb_pull(skb, sizeof(*src))) | |
| 2647 | return -EPROTO; | |
| 2648 | ||
| 5326849a MK |
2649 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
| 2650 | if (!dst) | |
| 2651 | continue; | |
| 2652 | ||
| b91251fb MK |
2653 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); |
| 2654 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
| 2655 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
| 2656 | ||
| 5326849a | 2657 | list_add_tail(&dst->list, &stats->pdevs); |
| d15fb520 MK |
2658 | } |
| 2659 | ||
| 2660 | /* fw doesn't implement vdev stats */ | |
| 2661 | ||
| 2662 | for (i = 0; i < num_peer_stats; i++) { | |
| 2663 | const struct wmi_peer_stats *src; | |
| 5326849a | 2664 | struct ath10k_fw_stats_peer *dst; |
| d15fb520 MK |
2665 | |
| 2666 | src = (void *)skb->data; | |
| 2667 | if (!skb_pull(skb, sizeof(*src))) | |
| 2668 | return -EPROTO; | |
| 2669 | ||
| 5326849a MK |
2670 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
| 2671 | if (!dst) | |
| 2672 | continue; | |
| 2673 | ||
| 2674 | ath10k_wmi_pull_peer_stats(src, dst); | |
| 2675 | list_add_tail(&dst->list, &stats->peers); | |
| d15fb520 MK |
2676 | } |
| 2677 | ||
| 2678 | return 0; | |
| 2679 | } | |
| 2680 | ||
| d7579d12 MK |
2681 | static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar, |
| 2682 | struct sk_buff *skb, | |
| 2683 | struct ath10k_fw_stats *stats) | |
| d15fb520 MK |
2684 | { |
| 2685 | const struct wmi_stats_event *ev = (void *)skb->data; | |
| 2686 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; | |
| 2687 | int i; | |
| 2688 | ||
| 2689 | if (!skb_pull(skb, sizeof(*ev))) | |
| 2690 | return -EPROTO; | |
| 2691 | ||
| 2692 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
| 2693 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
| 2694 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
| 2695 | ||
| 5326849a | 2696 | for (i = 0; i < num_pdev_stats; i++) { |
| d15fb520 | 2697 | const struct wmi_10x_pdev_stats *src; |
| 5326849a | 2698 | struct ath10k_fw_stats_pdev *dst; |
| d15fb520 MK |
2699 | |
| 2700 | src = (void *)skb->data; | |
| 2701 | if (!skb_pull(skb, sizeof(*src))) | |
| 2702 | return -EPROTO; | |
| 2703 | ||
| 5326849a MK |
2704 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
| 2705 | if (!dst) | |
| 2706 | continue; | |
| 2707 | ||
| b91251fb MK |
2708 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); |
| 2709 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
| 2710 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
| 2711 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
| d15fb520 | 2712 | |
| 5326849a | 2713 | list_add_tail(&dst->list, &stats->pdevs); |
| d15fb520 MK |
2714 | } |
| 2715 | ||
| 2716 | /* fw doesn't implement vdev stats */ | |
| 2717 | ||
| 2718 | for (i = 0; i < num_peer_stats; i++) { | |
| 2719 | const struct wmi_10x_peer_stats *src; | |
| 5326849a | 2720 | struct ath10k_fw_stats_peer *dst; |
| d15fb520 MK |
2721 | |
| 2722 | src = (void *)skb->data; | |
| 2723 | if (!skb_pull(skb, sizeof(*src))) | |
| 2724 | return -EPROTO; | |
| 2725 | ||
| 5326849a MK |
2726 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
| 2727 | if (!dst) | |
| 2728 | continue; | |
| 2729 | ||
| 2730 | ath10k_wmi_pull_peer_stats(&src->old, dst); | |
| 2731 | ||
| 2732 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
| d15fb520 | 2733 | |
| 5326849a | 2734 | list_add_tail(&dst->list, &stats->peers); |
| d15fb520 MK |
2735 | } |
| 2736 | ||
| 2737 | return 0; | |
| 2738 | } | |
| 2739 | ||
| 20de2229 MK |
2740 | static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar, |
| 2741 | struct sk_buff *skb, | |
| 2742 | struct ath10k_fw_stats *stats) | |
| 2743 | { | |
| 2744 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
| 2745 | u32 num_pdev_stats; | |
| 2746 | u32 num_pdev_ext_stats; | |
| 2747 | u32 num_vdev_stats; | |
| 2748 | u32 num_peer_stats; | |
| 2749 | int i; | |
| 2750 | ||
| 2751 | if (!skb_pull(skb, sizeof(*ev))) | |
| 2752 | return -EPROTO; | |
| 2753 | ||
| 2754 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
| 2755 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
| 2756 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
| 2757 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
| 2758 | ||
| 2759 | for (i = 0; i < num_pdev_stats; i++) { | |
| 2760 | const struct wmi_10_2_pdev_stats *src; | |
| 2761 | struct ath10k_fw_stats_pdev *dst; | |
| 2762 | ||
| 2763 | src = (void *)skb->data; | |
| 2764 | if (!skb_pull(skb, sizeof(*src))) | |
| 2765 | return -EPROTO; | |
| 2766 | ||
| 2767 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2768 | if (!dst) | |
| 2769 | continue; | |
| 2770 | ||
| 2771 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
| 2772 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
| 2773 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
| 2774 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
| 2775 | /* FIXME: expose 10.2 specific values */ | |
| 2776 | ||
| 2777 | list_add_tail(&dst->list, &stats->pdevs); | |
| 2778 | } | |
| 2779 | ||
| 2780 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
| 2781 | const struct wmi_10_2_pdev_ext_stats *src; | |
| 2782 | ||
| 2783 | src = (void *)skb->data; | |
| 2784 | if (!skb_pull(skb, sizeof(*src))) | |
| 2785 | return -EPROTO; | |
| 2786 | ||
| 2787 | /* FIXME: expose values to userspace | |
| 2788 | * | |
| 2789 | * Note: Even though this loop seems to do nothing it is | |
| 2790 | * required to parse following sub-structures properly. | |
| 2791 | */ | |
| 2792 | } | |
| 2793 | ||
| 2794 | /* fw doesn't implement vdev stats */ | |
| 2795 | ||
| 2796 | for (i = 0; i < num_peer_stats; i++) { | |
| 2797 | const struct wmi_10_2_peer_stats *src; | |
| 2798 | struct ath10k_fw_stats_peer *dst; | |
| 2799 | ||
| 2800 | src = (void *)skb->data; | |
| 2801 | if (!skb_pull(skb, sizeof(*src))) | |
| 2802 | return -EPROTO; | |
| 2803 | ||
| 2804 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2805 | if (!dst) | |
| 2806 | continue; | |
| 2807 | ||
| 2808 | ath10k_wmi_pull_peer_stats(&src->old, dst); | |
| 2809 | ||
| 2810 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
| 2811 | /* FIXME: expose 10.2 specific values */ | |
| 2812 | ||
| 2813 | list_add_tail(&dst->list, &stats->peers); | |
| 2814 | } | |
| 2815 | ||
| 2816 | return 0; | |
| 2817 | } | |
| 2818 | ||
| 2819 | static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar, | |
| 2820 | struct sk_buff *skb, | |
| 2821 | struct ath10k_fw_stats *stats) | |
| 2822 | { | |
| 2823 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
| 2824 | u32 num_pdev_stats; | |
| 2825 | u32 num_pdev_ext_stats; | |
| 2826 | u32 num_vdev_stats; | |
| 2827 | u32 num_peer_stats; | |
| 2828 | int i; | |
| 2829 | ||
| 2830 | if (!skb_pull(skb, sizeof(*ev))) | |
| 2831 | return -EPROTO; | |
| 2832 | ||
| 2833 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
| 2834 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
| 2835 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
| 2836 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
| 2837 | ||
| 2838 | for (i = 0; i < num_pdev_stats; i++) { | |
| 2839 | const struct wmi_10_2_pdev_stats *src; | |
| 2840 | struct ath10k_fw_stats_pdev *dst; | |
| 2841 | ||
| 2842 | src = (void *)skb->data; | |
| 2843 | if (!skb_pull(skb, sizeof(*src))) | |
| 2844 | return -EPROTO; | |
| 2845 | ||
| 2846 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2847 | if (!dst) | |
| 2848 | continue; | |
| 2849 | ||
| 2850 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
| 2851 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
| 2852 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
| 2853 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
| 2854 | /* FIXME: expose 10.2 specific values */ | |
| 2855 | ||
| 2856 | list_add_tail(&dst->list, &stats->pdevs); | |
| 2857 | } | |
| 2858 | ||
| 2859 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
| 2860 | const struct wmi_10_2_pdev_ext_stats *src; | |
| 2861 | ||
| 2862 | src = (void *)skb->data; | |
| 2863 | if (!skb_pull(skb, sizeof(*src))) | |
| 2864 | return -EPROTO; | |
| 2865 | ||
| 2866 | /* FIXME: expose values to userspace | |
| 2867 | * | |
| 2868 | * Note: Even though this loop seems to do nothing it is | |
| 2869 | * required to parse following sub-structures properly. | |
| 2870 | */ | |
| 2871 | } | |
| 2872 | ||
| 2873 | /* fw doesn't implement vdev stats */ | |
| 2874 | ||
| 2875 | for (i = 0; i < num_peer_stats; i++) { | |
| de46c015 | 2876 | const struct wmi_10_2_4_ext_peer_stats *src; |
| 20de2229 | 2877 | struct ath10k_fw_stats_peer *dst; |
| de46c015 | 2878 | int stats_len; |
| de46c015 | 2879 | |
| cc61a1bb | 2880 | if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) |
| de46c015 MSS |
2881 | stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats); |
| 2882 | else | |
| 2883 | stats_len = sizeof(struct wmi_10_2_4_peer_stats); | |
| 20de2229 MK |
2884 | |
| 2885 | src = (void *)skb->data; | |
| de46c015 | 2886 | if (!skb_pull(skb, stats_len)) |
| 20de2229 MK |
2887 | return -EPROTO; |
| 2888 | ||
| 2889 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2890 | if (!dst) | |
| 2891 | continue; | |
| 2892 | ||
| 2893 | ath10k_wmi_pull_peer_stats(&src->common.old, dst); | |
| 2894 | ||
| 2895 | dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate); | |
| de46c015 | 2896 | |
| cc61a1bb | 2897 | if (ath10k_peer_stats_enabled(ar)) |
| de46c015 | 2898 | dst->rx_duration = __le32_to_cpu(src->rx_duration); |
| 20de2229 MK |
2899 | /* FIXME: expose 10.2 specific values */ |
| 2900 | ||
| 2901 | list_add_tail(&dst->list, &stats->peers); | |
| 2902 | } | |
| 2903 | ||
| 2904 | return 0; | |
| 2905 | } | |
| 2906 | ||
| 98dd2b92 MP |
2907 | static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar, |
| 2908 | struct sk_buff *skb, | |
| 2909 | struct ath10k_fw_stats *stats) | |
| 2910 | { | |
| 2911 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
| 2912 | u32 num_pdev_stats; | |
| 2913 | u32 num_pdev_ext_stats; | |
| 2914 | u32 num_vdev_stats; | |
| 2915 | u32 num_peer_stats; | |
| f9575793 | 2916 | u32 stats_id; |
| 98dd2b92 MP |
2917 | int i; |
| 2918 | ||
| 2919 | if (!skb_pull(skb, sizeof(*ev))) | |
| 2920 | return -EPROTO; | |
| 2921 | ||
| 2922 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
| 2923 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
| 2924 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
| 2925 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
| f9575793 | 2926 | stats_id = __le32_to_cpu(ev->stats_id); |
| 98dd2b92 MP |
2927 | |
| 2928 | for (i = 0; i < num_pdev_stats; i++) { | |
| 2929 | const struct wmi_10_4_pdev_stats *src; | |
| 2930 | struct ath10k_fw_stats_pdev *dst; | |
| 2931 | ||
| 2932 | src = (void *)skb->data; | |
| 2933 | if (!skb_pull(skb, sizeof(*src))) | |
| 2934 | return -EPROTO; | |
| 2935 | ||
| 2936 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2937 | if (!dst) | |
| 2938 | continue; | |
| 2939 | ||
| 2940 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
| 2941 | ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst); | |
| 2942 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
| 2943 | dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs); | |
| 2944 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
| 2945 | ||
| 2946 | list_add_tail(&dst->list, &stats->pdevs); | |
| 2947 | } | |
| 2948 | ||
| 2949 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
| 2950 | const struct wmi_10_2_pdev_ext_stats *src; | |
| 2951 | ||
| 2952 | src = (void *)skb->data; | |
| 2953 | if (!skb_pull(skb, sizeof(*src))) | |
| 2954 | return -EPROTO; | |
| 2955 | ||
| 2956 | /* FIXME: expose values to userspace | |
| 2957 | * | |
| 2958 | * Note: Even though this loop seems to do nothing it is | |
| 2959 | * required to parse following sub-structures properly. | |
| 2960 | */ | |
| 2961 | } | |
| 2962 | ||
| 2963 | /* fw doesn't implement vdev stats */ | |
| 2964 | ||
| 2965 | for (i = 0; i < num_peer_stats; i++) { | |
| f9575793 | 2966 | const struct wmi_10_4_peer_extd_stats *src; |
| 98dd2b92 | 2967 | struct ath10k_fw_stats_peer *dst; |
| f9575793 MSS |
2968 | int stats_len; |
| 2969 | bool extd_peer_stats = !!(stats_id & WMI_10_4_STAT_PEER_EXTD); | |
| 2970 | ||
| 2971 | if (extd_peer_stats) | |
| 2972 | stats_len = sizeof(struct wmi_10_4_peer_extd_stats); | |
| 2973 | else | |
| 2974 | stats_len = sizeof(struct wmi_10_4_peer_stats); | |
| 98dd2b92 MP |
2975 | |
| 2976 | src = (void *)skb->data; | |
| f9575793 | 2977 | if (!skb_pull(skb, stats_len)) |
| 98dd2b92 MP |
2978 | return -EPROTO; |
| 2979 | ||
| 2980 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2981 | if (!dst) | |
| 2982 | continue; | |
| 2983 | ||
| f9575793 | 2984 | ath10k_wmi_10_4_pull_peer_stats(&src->common, dst); |
| 98dd2b92 | 2985 | /* FIXME: expose 10.4 specific values */ |
| f9575793 MSS |
2986 | if (extd_peer_stats) |
| 2987 | dst->rx_duration = __le32_to_cpu(src->rx_duration); | |
| 98dd2b92 MP |
2988 | |
| 2989 | list_add_tail(&dst->list, &stats->peers); | |
| 2990 | } | |
| 2991 | ||
| 2992 | return 0; | |
| 2993 | } | |
| 2994 | ||
| 0226d602 | 2995 | void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2996 | { |
| 7aa7a72a | 2997 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n"); |
| 60ef401a | 2998 | ath10k_debug_fw_stats_process(ar, skb); |
| 5e3dd157 KV |
2999 | } |
| 3000 | ||
| d7579d12 MK |
3001 | static int |
| 3002 | ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb, | |
| 3003 | struct wmi_vdev_start_ev_arg *arg) | |
| 32653cf1 MK |
3004 | { |
| 3005 | struct wmi_vdev_start_response_event *ev = (void *)skb->data; | |
| 3006 | ||
| 3007 | if (skb->len < sizeof(*ev)) | |
| 3008 | return -EPROTO; | |
| 3009 | ||
| 3010 | skb_pull(skb, sizeof(*ev)); | |
| 3011 | arg->vdev_id = ev->vdev_id; | |
| 3012 | arg->req_id = ev->req_id; | |
| 3013 | arg->resp_type = ev->resp_type; | |
| 3014 | arg->status = ev->status; | |
| 3015 | ||
| 3016 | return 0; | |
| 3017 | } | |
| 3018 | ||
| 0226d602 | 3019 | void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3020 | { |
| 32653cf1 MK |
3021 | struct wmi_vdev_start_ev_arg arg = {}; |
| 3022 | int ret; | |
| 5e3dd157 | 3023 | |
| 7aa7a72a | 3024 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n"); |
| 5e3dd157 | 3025 | |
| d7579d12 | 3026 | ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg); |
| 32653cf1 MK |
3027 | if (ret) { |
| 3028 | ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret); | |
| 3029 | return; | |
| 3030 | } | |
| 5e3dd157 | 3031 | |
| 32653cf1 | 3032 | if (WARN_ON(__le32_to_cpu(arg.status))) |
| 5e3dd157 KV |
3033 | return; |
| 3034 | ||
| 3035 | complete(&ar->vdev_setup_done); | |
| 3036 | } | |
| 3037 | ||
| 0226d602 | 3038 | void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3039 | { |
| 7aa7a72a | 3040 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n"); |
| 5e3dd157 KV |
3041 | complete(&ar->vdev_setup_done); |
| 3042 | } | |
| 3043 | ||
| d7579d12 MK |
3044 | static int |
| 3045 | ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb, | |
| 3046 | struct wmi_peer_kick_ev_arg *arg) | |
| 32653cf1 MK |
3047 | { |
| 3048 | struct wmi_peer_sta_kickout_event *ev = (void *)skb->data; | |
| 3049 | ||
| 3050 | if (skb->len < sizeof(*ev)) | |
| 3051 | return -EPROTO; | |
| 3052 | ||
| 3053 | skb_pull(skb, sizeof(*ev)); | |
| 3054 | arg->mac_addr = ev->peer_macaddr.addr; | |
| 3055 | ||
| 3056 | return 0; | |
| 3057 | } | |
| 3058 | ||
| 0226d602 | 3059 | void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3060 | { |
| 32653cf1 | 3061 | struct wmi_peer_kick_ev_arg arg = {}; |
| 5a13e76e | 3062 | struct ieee80211_sta *sta; |
| 32653cf1 | 3063 | int ret; |
| 5a13e76e | 3064 | |
| d7579d12 | 3065 | ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg); |
| 32653cf1 MK |
3066 | if (ret) { |
| 3067 | ath10k_warn(ar, "failed to parse peer kickout event: %d\n", | |
| 3068 | ret); | |
| 3069 | return; | |
| 3070 | } | |
| 5a13e76e | 3071 | |
| 7aa7a72a | 3072 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n", |
| 32653cf1 | 3073 | arg.mac_addr); |
| 5a13e76e KV |
3074 | |
| 3075 | rcu_read_lock(); | |
| 3076 | ||
| 32653cf1 | 3077 | sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL); |
| 5a13e76e | 3078 | if (!sta) { |
| 7aa7a72a | 3079 | ath10k_warn(ar, "Spurious quick kickout for STA %pM\n", |
| 32653cf1 | 3080 | arg.mac_addr); |
| 5a13e76e KV |
3081 | goto exit; |
| 3082 | } | |
| 3083 | ||
| 3084 | ieee80211_report_low_ack(sta, 10); | |
| 3085 | ||
| 3086 | exit: | |
| 3087 | rcu_read_unlock(); | |
| 5e3dd157 KV |
3088 | } |
| 3089 | ||
| 3090 | /* | |
| 3091 | * FIXME | |
| 3092 | * | |
| 3093 | * We don't report to mac80211 sleep state of connected | |
| 3094 | * stations. Due to this mac80211 can't fill in TIM IE | |
| 3095 | * correctly. | |
| 3096 | * | |
| 3097 | * I know of no way of getting nullfunc frames that contain | |
| 3098 | * sleep transition from connected stations - these do not | |
| 3099 | * seem to be sent from the target to the host. There also | |
| 3100 | * doesn't seem to be a dedicated event for that. So the | |
| 3101 | * only way left to do this would be to read tim_bitmap | |
| 3102 | * during SWBA. | |
| 3103 | * | |
| 3104 | * We could probably try using tim_bitmap from SWBA to tell | |
| 3105 | * mac80211 which stations are asleep and which are not. The | |
| 3106 | * problem here is calling mac80211 functions so many times | |
| 3107 | * could take too long and make us miss the time to submit | |
| 3108 | * the beacon to the target. | |
| 3109 | * | |
| 3110 | * So as a workaround we try to extend the TIM IE if there | |
| 3111 | * is unicast buffered for stations with aid > 7 and fill it | |
| 3112 | * in ourselves. | |
| 3113 | */ | |
| 3114 | static void ath10k_wmi_update_tim(struct ath10k *ar, | |
| 3115 | struct ath10k_vif *arvif, | |
| 3116 | struct sk_buff *bcn, | |
| a03fee34 | 3117 | const struct wmi_tim_info_arg *tim_info) |
| 5e3dd157 KV |
3118 | { |
| 3119 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data; | |
| 3120 | struct ieee80211_tim_ie *tim; | |
| 3121 | u8 *ies, *ie; | |
| 3122 | u8 ie_len, pvm_len; | |
| af762c0b | 3123 | __le32 t; |
| a03fee34 RM |
3124 | u32 v, tim_len; |
| 3125 | ||
| 3126 | /* When FW reports 0 in tim_len, ensure atleast first byte | |
| 3127 | * in tim_bitmap is considered for pvm calculation. | |
| 3128 | */ | |
| 3129 | tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1; | |
| 5e3dd157 KV |
3130 | |
| 3131 | /* if next SWBA has no tim_changed the tim_bitmap is garbage. | |
| 3132 | * we must copy the bitmap upon change and reuse it later */ | |
| 32653cf1 | 3133 | if (__le32_to_cpu(tim_info->tim_changed)) { |
| 5e3dd157 KV |
3134 | int i; |
| 3135 | ||
| a03fee34 RM |
3136 | if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) { |
| 3137 | ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu", | |
| 3138 | tim_len, sizeof(arvif->u.ap.tim_bitmap)); | |
| 3139 | tim_len = sizeof(arvif->u.ap.tim_bitmap); | |
| 3140 | } | |
| 5e3dd157 | 3141 | |
| a03fee34 | 3142 | for (i = 0; i < tim_len; i++) { |
| 32653cf1 | 3143 | t = tim_info->tim_bitmap[i / 4]; |
| af762c0b | 3144 | v = __le32_to_cpu(t); |
| 5e3dd157 KV |
3145 | arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; |
| 3146 | } | |
| 3147 | ||
| a03fee34 RM |
3148 | /* FW reports either length 0 or length based on max supported |
| 3149 | * station. so we calculate this on our own | |
| 3150 | */ | |
| 5e3dd157 | 3151 | arvif->u.ap.tim_len = 0; |
| a03fee34 | 3152 | for (i = 0; i < tim_len; i++) |
| 5e3dd157 KV |
3153 | if (arvif->u.ap.tim_bitmap[i]) |
| 3154 | arvif->u.ap.tim_len = i; | |
| 3155 | ||
| 3156 | arvif->u.ap.tim_len++; | |
| 3157 | } | |
| 3158 | ||
| 3159 | ies = bcn->data; | |
| 3160 | ies += ieee80211_hdrlen(hdr->frame_control); | |
| 3161 | ies += 12; /* fixed parameters */ | |
| 3162 | ||
| 3163 | ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies, | |
| 3164 | (u8 *)skb_tail_pointer(bcn) - ies); | |
| 3165 | if (!ie) { | |
| 09af8f85 | 3166 | if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS) |
| 7aa7a72a | 3167 | ath10k_warn(ar, "no tim ie found;\n"); |
| 5e3dd157 KV |
3168 | return; |
| 3169 | } | |
| 3170 | ||
| 3171 | tim = (void *)ie + 2; | |
| 3172 | ie_len = ie[1]; | |
| 3173 | pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */ | |
| 3174 | ||
| 3175 | if (pvm_len < arvif->u.ap.tim_len) { | |
| a03fee34 | 3176 | int expand_size = tim_len - pvm_len; |
| 5e3dd157 KV |
3177 | int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len); |
| 3178 | void *next_ie = ie + 2 + ie_len; | |
| 3179 | ||
| 3180 | if (skb_put(bcn, expand_size)) { | |
| 3181 | memmove(next_ie + expand_size, next_ie, move_size); | |
| 3182 | ||
| 3183 | ie[1] += expand_size; | |
| 3184 | ie_len += expand_size; | |
| 3185 | pvm_len += expand_size; | |
| 3186 | } else { | |
| 7aa7a72a | 3187 | ath10k_warn(ar, "tim expansion failed\n"); |
| 5e3dd157 KV |
3188 | } |
| 3189 | } | |
| 3190 | ||
| a03fee34 | 3191 | if (pvm_len > tim_len) { |
| 7aa7a72a | 3192 | ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len); |
| 5e3dd157 KV |
3193 | return; |
| 3194 | } | |
| 3195 | ||
| 32653cf1 | 3196 | tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast); |
| 5e3dd157 KV |
3197 | memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len); |
| 3198 | ||
| 748afc47 | 3199 | if (tim->dtim_count == 0) { |
| 66b8a010 | 3200 | ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO; |
| 748afc47 | 3201 | |
| 32653cf1 | 3202 | if (__le32_to_cpu(tim_info->tim_mcast) == 1) |
| 66b8a010 | 3203 | ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB; |
| 748afc47 MK |
3204 | } |
| 3205 | ||
| 7aa7a72a | 3206 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n", |
| 5e3dd157 KV |
3207 | tim->dtim_count, tim->dtim_period, |
| 3208 | tim->bitmap_ctrl, pvm_len); | |
| 3209 | } | |
| 3210 | ||
| 5e3dd157 KV |
3211 | static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif, |
| 3212 | struct sk_buff *bcn, | |
| 32653cf1 | 3213 | const struct wmi_p2p_noa_info *noa) |
| 5e3dd157 | 3214 | { |
| 08c27be1 | 3215 | if (!arvif->vif->p2p) |
| 5e3dd157 KV |
3216 | return; |
| 3217 | ||
| 7aa7a72a | 3218 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed); |
| 5e3dd157 | 3219 | |
| 6a94888f MK |
3220 | if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) |
| 3221 | ath10k_p2p_noa_update(arvif, noa); | |
| 5e3dd157 KV |
3222 | |
| 3223 | if (arvif->u.ap.noa_data) | |
| 3224 | if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC)) | |
| 3225 | memcpy(skb_put(bcn, arvif->u.ap.noa_len), | |
| 3226 | arvif->u.ap.noa_data, | |
| 3227 | arvif->u.ap.noa_len); | |
| 5e3dd157 KV |
3228 | } |
| 3229 | ||
| d7579d12 MK |
3230 | static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb, |
| 3231 | struct wmi_swba_ev_arg *arg) | |
| 32653cf1 MK |
3232 | { |
| 3233 | struct wmi_host_swba_event *ev = (void *)skb->data; | |
| 3234 | u32 map; | |
| 3235 | size_t i; | |
| 3236 | ||
| 3237 | if (skb->len < sizeof(*ev)) | |
| 3238 | return -EPROTO; | |
| 3239 | ||
| 3240 | skb_pull(skb, sizeof(*ev)); | |
| 3241 | arg->vdev_map = ev->vdev_map; | |
| 3242 | ||
| 3243 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | |
| 3244 | if (!(map & BIT(0))) | |
| 3245 | continue; | |
| 3246 | ||
| 3247 | /* If this happens there were some changes in firmware and | |
| 3248 | * ath10k should update the max size of tim_info array. | |
| 3249 | */ | |
| 3250 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | |
| 3251 | break; | |
| 3252 | ||
| a03fee34 RM |
3253 | if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > |
| 3254 | sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { | |
| 3255 | ath10k_warn(ar, "refusing to parse invalid swba structure\n"); | |
| 3256 | return -EPROTO; | |
| 3257 | } | |
| 3258 | ||
| 3259 | arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len; | |
| 3260 | arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; | |
| 3261 | arg->tim_info[i].tim_bitmap = | |
| 3262 | ev->bcn_info[i].tim_info.tim_bitmap; | |
| 3263 | arg->tim_info[i].tim_changed = | |
| 3264 | ev->bcn_info[i].tim_info.tim_changed; | |
| 3265 | arg->tim_info[i].tim_num_ps_pending = | |
| 3266 | ev->bcn_info[i].tim_info.tim_num_ps_pending; | |
| 3267 | ||
| 32653cf1 MK |
3268 | arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info; |
| 3269 | i++; | |
| 3270 | } | |
| 3271 | ||
| 3272 | return 0; | |
| 3273 | } | |
| 3274 | ||
| 8b019fb0 YL |
3275 | static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar, |
| 3276 | struct sk_buff *skb, | |
| 3277 | struct wmi_swba_ev_arg *arg) | |
| 3278 | { | |
| 3279 | struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data; | |
| 3280 | u32 map; | |
| 3281 | size_t i; | |
| 3282 | ||
| 3283 | if (skb->len < sizeof(*ev)) | |
| 3284 | return -EPROTO; | |
| 3285 | ||
| 3286 | skb_pull(skb, sizeof(*ev)); | |
| 3287 | arg->vdev_map = ev->vdev_map; | |
| 3288 | ||
| 3289 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | |
| 3290 | if (!(map & BIT(0))) | |
| 3291 | continue; | |
| 3292 | ||
| 3293 | /* If this happens there were some changes in firmware and | |
| 3294 | * ath10k should update the max size of tim_info array. | |
| 3295 | */ | |
| 3296 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | |
| 3297 | break; | |
| 3298 | ||
| 3299 | if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > | |
| 3300 | sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { | |
| 3301 | ath10k_warn(ar, "refusing to parse invalid swba structure\n"); | |
| 3302 | return -EPROTO; | |
| 3303 | } | |
| 3304 | ||
| 3305 | arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len; | |
| 3306 | arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; | |
| 3307 | arg->tim_info[i].tim_bitmap = | |
| 3308 | ev->bcn_info[i].tim_info.tim_bitmap; | |
| 3309 | arg->tim_info[i].tim_changed = | |
| 3310 | ev->bcn_info[i].tim_info.tim_changed; | |
| 3311 | arg->tim_info[i].tim_num_ps_pending = | |
| 3312 | ev->bcn_info[i].tim_info.tim_num_ps_pending; | |
| 3313 | i++; | |
| 3314 | } | |
| 3315 | ||
| 3316 | return 0; | |
| 3317 | } | |
| 3318 | ||
| 3cec3be3 RM |
3319 | static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar, |
| 3320 | struct sk_buff *skb, | |
| 3321 | struct wmi_swba_ev_arg *arg) | |
| 3322 | { | |
| 3323 | struct wmi_10_4_host_swba_event *ev = (void *)skb->data; | |
| 3324 | u32 map, tim_len; | |
| 3325 | size_t i; | |
| 3326 | ||
| 3327 | if (skb->len < sizeof(*ev)) | |
| 3328 | return -EPROTO; | |
| 3329 | ||
| 3330 | skb_pull(skb, sizeof(*ev)); | |
| 3331 | arg->vdev_map = ev->vdev_map; | |
| 3332 | ||
| 3333 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | |
| 3334 | if (!(map & BIT(0))) | |
| 3335 | continue; | |
| 3336 | ||
| 3337 | /* If this happens there were some changes in firmware and | |
| 3338 | * ath10k should update the max size of tim_info array. | |
| 3339 | */ | |
| 3340 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | |
| 3341 | break; | |
| 3342 | ||
| 3343 | if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > | |
| 3344 | sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { | |
| 3345 | ath10k_warn(ar, "refusing to parse invalid swba structure\n"); | |
| 3346 | return -EPROTO; | |
| 3347 | } | |
| 3348 | ||
| 3349 | tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len); | |
| 3350 | if (tim_len) { | |
| 3351 | /* Exclude 4 byte guard length */ | |
| 3352 | tim_len -= 4; | |
| 3353 | arg->tim_info[i].tim_len = __cpu_to_le32(tim_len); | |
| 3354 | } else { | |
| 3355 | arg->tim_info[i].tim_len = 0; | |
| 3356 | } | |
| 3357 | ||
| 3358 | arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; | |
| 3359 | arg->tim_info[i].tim_bitmap = | |
| 3360 | ev->bcn_info[i].tim_info.tim_bitmap; | |
| 3361 | arg->tim_info[i].tim_changed = | |
| 3362 | ev->bcn_info[i].tim_info.tim_changed; | |
| 3363 | arg->tim_info[i].tim_num_ps_pending = | |
| 3364 | ev->bcn_info[i].tim_info.tim_num_ps_pending; | |
| 3365 | ||
| 3366 | /* 10.4 firmware doesn't have p2p support. notice of absence | |
| 3367 | * info can be ignored for now. | |
| 3368 | */ | |
| 3369 | ||
| 3370 | i++; | |
| 3371 | } | |
| 3372 | ||
| 3373 | return 0; | |
| 3374 | } | |
| 3375 | ||
| 08e75ea8 VN |
3376 | static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar) |
| 3377 | { | |
| 3378 | return WMI_TXBF_CONF_BEFORE_ASSOC; | |
| 3379 | } | |
| 3380 | ||
| 0226d602 | 3381 | void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3382 | { |
| 32653cf1 | 3383 | struct wmi_swba_ev_arg arg = {}; |
| 5e3dd157 KV |
3384 | u32 map; |
| 3385 | int i = -1; | |
| a03fee34 | 3386 | const struct wmi_tim_info_arg *tim_info; |
| 32653cf1 | 3387 | const struct wmi_p2p_noa_info *noa_info; |
| 5e3dd157 | 3388 | struct ath10k_vif *arvif; |
| 5e3dd157 | 3389 | struct sk_buff *bcn; |
| 64badcb6 | 3390 | dma_addr_t paddr; |
| 767d34fc | 3391 | int ret, vdev_id = 0; |
| 5e3dd157 | 3392 | |
| d7579d12 | 3393 | ret = ath10k_wmi_pull_swba(ar, skb, &arg); |
| 32653cf1 MK |
3394 | if (ret) { |
| 3395 | ath10k_warn(ar, "failed to parse swba event: %d\n", ret); | |
| 3396 | return; | |
| 3397 | } | |
| 3398 | ||
| 3399 | map = __le32_to_cpu(arg.vdev_map); | |
| 5e3dd157 | 3400 | |
| 7aa7a72a | 3401 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n", |
| 32653cf1 | 3402 | map); |
| 5e3dd157 KV |
3403 | |
| 3404 | for (; map; map >>= 1, vdev_id++) { | |
| 3405 | if (!(map & 0x1)) | |
| 3406 | continue; | |
| 3407 | ||
| 3408 | i++; | |
| 3409 | ||
| 3410 | if (i >= WMI_MAX_AP_VDEV) { | |
| 7aa7a72a | 3411 | ath10k_warn(ar, "swba has corrupted vdev map\n"); |
| 5e3dd157 KV |
3412 | break; |
| 3413 | } | |
| 3414 | ||
| a03fee34 | 3415 | tim_info = &arg.tim_info[i]; |
| 32653cf1 | 3416 | noa_info = arg.noa_info[i]; |
| 5e3dd157 | 3417 | |
| 7aa7a72a | 3418 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
| 7a8a396b | 3419 | "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n", |
| 5e3dd157 | 3420 | i, |
| 32653cf1 MK |
3421 | __le32_to_cpu(tim_info->tim_len), |
| 3422 | __le32_to_cpu(tim_info->tim_mcast), | |
| 3423 | __le32_to_cpu(tim_info->tim_changed), | |
| 3424 | __le32_to_cpu(tim_info->tim_num_ps_pending), | |
| 3425 | __le32_to_cpu(tim_info->tim_bitmap[3]), | |
| 3426 | __le32_to_cpu(tim_info->tim_bitmap[2]), | |
| 3427 | __le32_to_cpu(tim_info->tim_bitmap[1]), | |
| 3428 | __le32_to_cpu(tim_info->tim_bitmap[0])); | |
| 5e3dd157 | 3429 | |
| a03fee34 RM |
3430 | /* TODO: Only first 4 word from tim_bitmap is dumped. |
| 3431 | * Extend debug code to dump full tim_bitmap. | |
| 3432 | */ | |
| 3433 | ||
| 5e3dd157 KV |
3434 | arvif = ath10k_get_arvif(ar, vdev_id); |
| 3435 | if (arvif == NULL) { | |
| 7aa7a72a MK |
3436 | ath10k_warn(ar, "no vif for vdev_id %d found\n", |
| 3437 | vdev_id); | |
| 5e3dd157 KV |
3438 | continue; |
| 3439 | } | |
| 3440 | ||
| c2df44b3 MK |
3441 | /* There are no completions for beacons so wait for next SWBA |
| 3442 | * before telling mac80211 to decrement CSA counter | |
| 3443 | * | |
| 3444 | * Once CSA counter is completed stop sending beacons until | |
| 3445 | * actual channel switch is done */ | |
| 3446 | if (arvif->vif->csa_active && | |
| 3447 | ieee80211_csa_is_complete(arvif->vif)) { | |
| 3448 | ieee80211_csa_finish(arvif->vif); | |
| 3449 | continue; | |
| 3450 | } | |
| 3451 | ||
| 5e3dd157 KV |
3452 | bcn = ieee80211_beacon_get(ar->hw, arvif->vif); |
| 3453 | if (!bcn) { | |
| 7aa7a72a | 3454 | ath10k_warn(ar, "could not get mac80211 beacon\n"); |
| 5e3dd157 KV |
3455 | continue; |
| 3456 | } | |
| 3457 | ||
| 4b604558 | 3458 | ath10k_tx_h_seq_no(arvif->vif, bcn); |
| 32653cf1 MK |
3459 | ath10k_wmi_update_tim(ar, arvif, bcn, tim_info); |
| 3460 | ath10k_wmi_update_noa(ar, arvif, bcn, noa_info); | |
| 5e3dd157 | 3461 | |
| ed54388a | 3462 | spin_lock_bh(&ar->data_lock); |
| 748afc47 | 3463 | |
| ed54388a | 3464 | if (arvif->beacon) { |
| af21319f MK |
3465 | switch (arvif->beacon_state) { |
| 3466 | case ATH10K_BEACON_SENT: | |
| 3467 | break; | |
| 3468 | case ATH10K_BEACON_SCHEDULED: | |
| 3469 | ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n", | |
| 3470 | arvif->vdev_id); | |
| 3471 | break; | |
| 3472 | case ATH10K_BEACON_SENDING: | |
| 3473 | ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n", | |
| 748afc47 | 3474 | arvif->vdev_id); |
| af21319f MK |
3475 | dev_kfree_skb(bcn); |
| 3476 | goto skip; | |
| 3477 | } | |
| 748afc47 | 3478 | |
| 64badcb6 | 3479 | ath10k_mac_vif_beacon_free(arvif); |
| ed54388a | 3480 | } |
| 5e3dd157 | 3481 | |
| 64badcb6 MK |
3482 | if (!arvif->beacon_buf) { |
| 3483 | paddr = dma_map_single(arvif->ar->dev, bcn->data, | |
| 3484 | bcn->len, DMA_TO_DEVICE); | |
| 3485 | ret = dma_mapping_error(arvif->ar->dev, paddr); | |
| 3486 | if (ret) { | |
| 3487 | ath10k_warn(ar, "failed to map beacon: %d\n", | |
| 3488 | ret); | |
| 3489 | dev_kfree_skb_any(bcn); | |
| 5e55e3cb | 3490 | ret = -EIO; |
| 64badcb6 MK |
3491 | goto skip; |
| 3492 | } | |
| 3493 | ||
| 3494 | ATH10K_SKB_CB(bcn)->paddr = paddr; | |
| 3495 | } else { | |
| 3496 | if (bcn->len > IEEE80211_MAX_FRAME_LEN) { | |
| 3497 | ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n", | |
| 3498 | bcn->len, IEEE80211_MAX_FRAME_LEN); | |
| 3499 | skb_trim(bcn, IEEE80211_MAX_FRAME_LEN); | |
| 3500 | } | |
| 3501 | memcpy(arvif->beacon_buf, bcn->data, bcn->len); | |
| 3502 | ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr; | |
| 767d34fc | 3503 | } |
| 748afc47 | 3504 | |
| ed54388a | 3505 | arvif->beacon = bcn; |
| af21319f | 3506 | arvif->beacon_state = ATH10K_BEACON_SCHEDULED; |
| 5e3dd157 | 3507 | |
| 5ce8e7fd RM |
3508 | trace_ath10k_tx_hdr(ar, bcn->data, bcn->len); |
| 3509 | trace_ath10k_tx_payload(ar, bcn->data, bcn->len); | |
| 3510 | ||
| 767d34fc | 3511 | skip: |
| ed54388a | 3512 | spin_unlock_bh(&ar->data_lock); |
| 5e3dd157 | 3513 | } |
| af21319f MK |
3514 | |
| 3515 | ath10k_wmi_tx_beacons_nowait(ar); | |
| 5e3dd157 KV |
3516 | } |
| 3517 | ||
| 0226d602 | 3518 | void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3519 | { |
| 7aa7a72a | 3520 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n"); |
| 5e3dd157 KV |
3521 | } |
| 3522 | ||
| 9702c686 | 3523 | static void ath10k_dfs_radar_report(struct ath10k *ar, |
| 991adf71 | 3524 | struct wmi_phyerr_ev_arg *phyerr, |
| 2332d0ae | 3525 | const struct phyerr_radar_report *rr, |
| 9702c686 JD |
3526 | u64 tsf) |
| 3527 | { | |
| 3528 | u32 reg0, reg1, tsf32l; | |
| 500ff9f9 | 3529 | struct ieee80211_channel *ch; |
| 9702c686 JD |
3530 | struct pulse_event pe; |
| 3531 | u64 tsf64; | |
| 3532 | u8 rssi, width; | |
| 3533 | ||
| 3534 | reg0 = __le32_to_cpu(rr->reg0); | |
| 3535 | reg1 = __le32_to_cpu(rr->reg1); | |
| 3536 | ||
| 7aa7a72a | 3537 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3538 | "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n", |
| 3539 | MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP), | |
| 3540 | MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH), | |
| 3541 | MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN), | |
| 3542 | MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF)); | |
| 7aa7a72a | 3543 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3544 | "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n", |
| 3545 | MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK), | |
| 3546 | MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX), | |
| 3547 | MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID), | |
| 3548 | MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN), | |
| 3549 | MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK)); | |
| 7aa7a72a | 3550 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3551 | "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n", |
| 3552 | MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET), | |
| 3553 | MS(reg1, RADAR_REPORT_REG1_PULSE_DUR)); | |
| 3554 | ||
| 3555 | if (!ar->dfs_detector) | |
| 3556 | return; | |
| 3557 | ||
| 500ff9f9 MK |
3558 | spin_lock_bh(&ar->data_lock); |
| 3559 | ch = ar->rx_channel; | |
| 3560 | spin_unlock_bh(&ar->data_lock); | |
| 3561 | ||
| 3562 | if (!ch) { | |
| 3563 | ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n"); | |
| 3564 | goto radar_detected; | |
| 3565 | } | |
| 3566 | ||
| 9702c686 | 3567 | /* report event to DFS pattern detector */ |
| 991adf71 | 3568 | tsf32l = phyerr->tsf_timestamp; |
| 9702c686 JD |
3569 | tsf64 = tsf & (~0xFFFFFFFFULL); |
| 3570 | tsf64 |= tsf32l; | |
| 3571 | ||
| 3572 | width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR); | |
| 2332d0ae | 3573 | rssi = phyerr->rssi_combined; |
| 9702c686 JD |
3574 | |
| 3575 | /* hardware store this as 8 bit signed value, | |
| 3576 | * set to zero if negative number | |
| 3577 | */ | |
| 3578 | if (rssi & 0x80) | |
| 3579 | rssi = 0; | |
| 3580 | ||
| 3581 | pe.ts = tsf64; | |
| 500ff9f9 | 3582 | pe.freq = ch->center_freq; |
| 9702c686 JD |
3583 | pe.width = width; |
| 3584 | pe.rssi = rssi; | |
| 2c3f26a0 | 3585 | pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0); |
| 7aa7a72a | 3586 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3587 | "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n", |
| 3588 | pe.freq, pe.width, pe.rssi, pe.ts); | |
| 3589 | ||
| 3590 | ATH10K_DFS_STAT_INC(ar, pulses_detected); | |
| 3591 | ||
| 3592 | if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) { | |
| 7aa7a72a | 3593 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3594 | "dfs no pulse pattern detected, yet\n"); |
| 3595 | return; | |
| 3596 | } | |
| 3597 | ||
| 500ff9f9 | 3598 | radar_detected: |
| 7aa7a72a | 3599 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n"); |
| 9702c686 | 3600 | ATH10K_DFS_STAT_INC(ar, radar_detected); |
| 7d9b40b4 MP |
3601 | |
| 3602 | /* Control radar events reporting in debugfs file | |
| 3603 | dfs_block_radar_events */ | |
| 3604 | if (ar->dfs_block_radar_events) { | |
| 7aa7a72a | 3605 | ath10k_info(ar, "DFS Radar detected, but ignored as requested\n"); |
| 7d9b40b4 MP |
3606 | return; |
| 3607 | } | |
| 3608 | ||
| 9702c686 JD |
3609 | ieee80211_radar_detected(ar->hw); |
| 3610 | } | |
| 3611 | ||
| 3612 | static int ath10k_dfs_fft_report(struct ath10k *ar, | |
| 991adf71 | 3613 | struct wmi_phyerr_ev_arg *phyerr, |
| 2332d0ae | 3614 | const struct phyerr_fft_report *fftr, |
| 9702c686 JD |
3615 | u64 tsf) |
| 3616 | { | |
| 3617 | u32 reg0, reg1; | |
| 3618 | u8 rssi, peak_mag; | |
| 3619 | ||
| 3620 | reg0 = __le32_to_cpu(fftr->reg0); | |
| 3621 | reg1 = __le32_to_cpu(fftr->reg1); | |
| 2332d0ae | 3622 | rssi = phyerr->rssi_combined; |
| 9702c686 | 3623 | |
| 7aa7a72a | 3624 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3625 | "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n", |
| 3626 | MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB), | |
| 3627 | MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB), | |
| 3628 | MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX), | |
| 3629 | MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX)); | |
| 7aa7a72a | 3630 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3631 | "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n", |
| 3632 | MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB), | |
| 3633 | MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB), | |
| 3634 | MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG), | |
| 3635 | MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB)); | |
| 3636 | ||
| 3637 | peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG); | |
| 3638 | ||
| 3639 | /* false event detection */ | |
| 3640 | if (rssi == DFS_RSSI_POSSIBLY_FALSE && | |
| 3641 | peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) { | |
| 7aa7a72a | 3642 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n"); |
| 9702c686 JD |
3643 | ATH10K_DFS_STAT_INC(ar, pulses_discarded); |
| 3644 | return -EINVAL; | |
| 3645 | } | |
| 3646 | ||
| 3647 | return 0; | |
| 3648 | } | |
| 3649 | ||
| 0226d602 | 3650 | void ath10k_wmi_event_dfs(struct ath10k *ar, |
| 991adf71 | 3651 | struct wmi_phyerr_ev_arg *phyerr, |
| 0226d602 | 3652 | u64 tsf) |
| 9702c686 JD |
3653 | { |
| 3654 | int buf_len, tlv_len, res, i = 0; | |
| 2332d0ae MK |
3655 | const struct phyerr_tlv *tlv; |
| 3656 | const struct phyerr_radar_report *rr; | |
| 3657 | const struct phyerr_fft_report *fftr; | |
| 3658 | const u8 *tlv_buf; | |
| 9702c686 | 3659 | |
| 991adf71 | 3660 | buf_len = phyerr->buf_len; |
| 7aa7a72a | 3661 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 | 3662 | "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n", |
| 2332d0ae | 3663 | phyerr->phy_err_code, phyerr->rssi_combined, |
| 991adf71 | 3664 | phyerr->tsf_timestamp, tsf, buf_len); |
| 9702c686 JD |
3665 | |
| 3666 | /* Skip event if DFS disabled */ | |
| 3667 | if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED)) | |
| 3668 | return; | |
| 3669 | ||
| 3670 | ATH10K_DFS_STAT_INC(ar, pulses_total); | |
| 3671 | ||
| 3672 | while (i < buf_len) { | |
| 3673 | if (i + sizeof(*tlv) > buf_len) { | |
| 7aa7a72a MK |
3674 | ath10k_warn(ar, "too short buf for tlv header (%d)\n", |
| 3675 | i); | |
| 9702c686 JD |
3676 | return; |
| 3677 | } | |
| 3678 | ||
| 2332d0ae | 3679 | tlv = (struct phyerr_tlv *)&phyerr->buf[i]; |
| 9702c686 | 3680 | tlv_len = __le16_to_cpu(tlv->len); |
| 2332d0ae | 3681 | tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; |
| 7aa7a72a | 3682 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3683 | "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n", |
| 3684 | tlv_len, tlv->tag, tlv->sig); | |
| 3685 | ||
| 3686 | switch (tlv->tag) { | |
| 3687 | case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY: | |
| 3688 | if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) { | |
| 7aa7a72a | 3689 | ath10k_warn(ar, "too short radar pulse summary (%d)\n", |
| 9702c686 JD |
3690 | i); |
| 3691 | return; | |
| 3692 | } | |
| 3693 | ||
| 3694 | rr = (struct phyerr_radar_report *)tlv_buf; | |
| 2332d0ae | 3695 | ath10k_dfs_radar_report(ar, phyerr, rr, tsf); |
| 9702c686 JD |
3696 | break; |
| 3697 | case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: | |
| 3698 | if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) { | |
| 7aa7a72a MK |
3699 | ath10k_warn(ar, "too short fft report (%d)\n", |
| 3700 | i); | |
| 9702c686 JD |
3701 | return; |
| 3702 | } | |
| 3703 | ||
| 3704 | fftr = (struct phyerr_fft_report *)tlv_buf; | |
| 2332d0ae | 3705 | res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf); |
| 9702c686 JD |
3706 | if (res) |
| 3707 | return; | |
| 3708 | break; | |
| 3709 | } | |
| 3710 | ||
| 3711 | i += sizeof(*tlv) + tlv_len; | |
| 3712 | } | |
| 3713 | } | |
| 3714 | ||
| 0226d602 | 3715 | void ath10k_wmi_event_spectral_scan(struct ath10k *ar, |
| 991adf71 | 3716 | struct wmi_phyerr_ev_arg *phyerr, |
| 0226d602 | 3717 | u64 tsf) |
| 9702c686 | 3718 | { |
| 855aed12 SW |
3719 | int buf_len, tlv_len, res, i = 0; |
| 3720 | struct phyerr_tlv *tlv; | |
| 2332d0ae MK |
3721 | const void *tlv_buf; |
| 3722 | const struct phyerr_fft_report *fftr; | |
| 855aed12 SW |
3723 | size_t fftr_len; |
| 3724 | ||
| 991adf71 | 3725 | buf_len = phyerr->buf_len; |
| 855aed12 SW |
3726 | |
| 3727 | while (i < buf_len) { | |
| 3728 | if (i + sizeof(*tlv) > buf_len) { | |
| 7aa7a72a | 3729 | ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n", |
| 855aed12 SW |
3730 | i); |
| 3731 | return; | |
| 3732 | } | |
| 3733 | ||
| 2332d0ae | 3734 | tlv = (struct phyerr_tlv *)&phyerr->buf[i]; |
| 855aed12 | 3735 | tlv_len = __le16_to_cpu(tlv->len); |
| 2332d0ae | 3736 | tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; |
| 855aed12 SW |
3737 | |
| 3738 | if (i + sizeof(*tlv) + tlv_len > buf_len) { | |
| 7aa7a72a | 3739 | ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n", |
| 855aed12 SW |
3740 | i); |
| 3741 | return; | |
| 3742 | } | |
| 3743 | ||
| 3744 | switch (tlv->tag) { | |
| 3745 | case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: | |
| 3746 | if (sizeof(*fftr) > tlv_len) { | |
| 7aa7a72a | 3747 | ath10k_warn(ar, "failed to parse fft report at byte %d\n", |
| 855aed12 SW |
3748 | i); |
| 3749 | return; | |
| 3750 | } | |
| 3751 | ||
| 3752 | fftr_len = tlv_len - sizeof(*fftr); | |
| 2332d0ae MK |
3753 | fftr = tlv_buf; |
| 3754 | res = ath10k_spectral_process_fft(ar, phyerr, | |
| 855aed12 SW |
3755 | fftr, fftr_len, |
| 3756 | tsf); | |
| 3757 | if (res < 0) { | |
| 3413e97d | 3758 | ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n", |
| 617b0f4d | 3759 | res); |
| 855aed12 SW |
3760 | return; |
| 3761 | } | |
| 3762 | break; | |
| 3763 | } | |
| 3764 | ||
| 3765 | i += sizeof(*tlv) + tlv_len; | |
| 3766 | } | |
| 9702c686 JD |
3767 | } |
| 3768 | ||
| 991adf71 RM |
3769 | static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar, |
| 3770 | struct sk_buff *skb, | |
| 3771 | struct wmi_phyerr_hdr_arg *arg) | |
| 32653cf1 MK |
3772 | { |
| 3773 | struct wmi_phyerr_event *ev = (void *)skb->data; | |
| 3774 | ||
| 3775 | if (skb->len < sizeof(*ev)) | |
| 3776 | return -EPROTO; | |
| 3777 | ||
| 991adf71 RM |
3778 | arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs); |
| 3779 | arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32); | |
| 3780 | arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32); | |
| 3781 | arg->buf_len = skb->len - sizeof(*ev); | |
| 32653cf1 MK |
3782 | arg->phyerrs = ev->phyerrs; |
| 3783 | ||
| 3784 | return 0; | |
| 3785 | } | |
| 3786 | ||
| 2b0a2e0d RM |
3787 | static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar, |
| 3788 | struct sk_buff *skb, | |
| 3789 | struct wmi_phyerr_hdr_arg *arg) | |
| 3790 | { | |
| 3791 | struct wmi_10_4_phyerr_event *ev = (void *)skb->data; | |
| 3792 | ||
| 3793 | if (skb->len < sizeof(*ev)) | |
| 3794 | return -EPROTO; | |
| 3795 | ||
| 3796 | /* 10.4 firmware always reports only one phyerr */ | |
| 3797 | arg->num_phyerrs = 1; | |
| 3798 | ||
| 3799 | arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32); | |
| 3800 | arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32); | |
| 3801 | arg->buf_len = skb->len; | |
| 3802 | arg->phyerrs = skb->data; | |
| 3803 | ||
| 3804 | return 0; | |
| 3805 | } | |
| 3806 | ||
| 991adf71 RM |
3807 | int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, |
| 3808 | const void *phyerr_buf, | |
| 3809 | int left_len, | |
| 3810 | struct wmi_phyerr_ev_arg *arg) | |
| 3811 | { | |
| 3812 | const struct wmi_phyerr *phyerr = phyerr_buf; | |
| 3813 | int i; | |
| 3814 | ||
| 3815 | if (left_len < sizeof(*phyerr)) { | |
| ee92a209 | 3816 | ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n", |
| 991adf71 RM |
3817 | left_len, sizeof(*phyerr)); |
| 3818 | return -EINVAL; | |
| 3819 | } | |
| 3820 | ||
| 3821 | arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp); | |
| 3822 | arg->freq1 = __le16_to_cpu(phyerr->freq1); | |
| 3823 | arg->freq2 = __le16_to_cpu(phyerr->freq2); | |
| 3824 | arg->rssi_combined = phyerr->rssi_combined; | |
| 3825 | arg->chan_width_mhz = phyerr->chan_width_mhz; | |
| 3826 | arg->buf_len = __le32_to_cpu(phyerr->buf_len); | |
| 3827 | arg->buf = phyerr->buf; | |
| 3828 | arg->hdr_len = sizeof(*phyerr); | |
| 3829 | ||
| 3830 | for (i = 0; i < 4; i++) | |
| 3831 | arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]); | |
| 3832 | ||
| 3833 | switch (phyerr->phy_err_code) { | |
| 3834 | case PHY_ERROR_GEN_SPECTRAL_SCAN: | |
| 3835 | arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN; | |
| 3836 | break; | |
| 3837 | case PHY_ERROR_GEN_FALSE_RADAR_EXT: | |
| 3838 | arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT; | |
| 3839 | break; | |
| 3840 | case PHY_ERROR_GEN_RADAR: | |
| 3841 | arg->phy_err_code = PHY_ERROR_RADAR; | |
| 3842 | break; | |
| 3843 | default: | |
| 3844 | arg->phy_err_code = PHY_ERROR_UNKNOWN; | |
| 3845 | break; | |
| 3846 | } | |
| 3847 | ||
| 3848 | return 0; | |
| 3849 | } | |
| 3850 | ||
| 2b0a2e0d RM |
3851 | static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar, |
| 3852 | const void *phyerr_buf, | |
| 3853 | int left_len, | |
| 3854 | struct wmi_phyerr_ev_arg *arg) | |
| 3855 | { | |
| 3856 | const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf; | |
| 3857 | u32 phy_err_mask; | |
| 3858 | int i; | |
| 3859 | ||
| 3860 | if (left_len < sizeof(*phyerr)) { | |
| ee92a209 | 3861 | ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n", |
| 2b0a2e0d RM |
3862 | left_len, sizeof(*phyerr)); |
| 3863 | return -EINVAL; | |
| 3864 | } | |
| 3865 | ||
| 3866 | arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp); | |
| 3867 | arg->freq1 = __le16_to_cpu(phyerr->freq1); | |
| 3868 | arg->freq2 = __le16_to_cpu(phyerr->freq2); | |
| 3869 | arg->rssi_combined = phyerr->rssi_combined; | |
| 3870 | arg->chan_width_mhz = phyerr->chan_width_mhz; | |
| 3871 | arg->buf_len = __le32_to_cpu(phyerr->buf_len); | |
| 3872 | arg->buf = phyerr->buf; | |
| 3873 | arg->hdr_len = sizeof(*phyerr); | |
| 3874 | ||
| 3875 | for (i = 0; i < 4; i++) | |
| 3876 | arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]); | |
| 3877 | ||
| 3878 | phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]); | |
| 3879 | ||
| 3880 | if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK) | |
| 3881 | arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN; | |
| 3882 | else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK) | |
| 3883 | arg->phy_err_code = PHY_ERROR_RADAR; | |
| 3884 | else | |
| 3885 | arg->phy_err_code = PHY_ERROR_UNKNOWN; | |
| 3886 | ||
| 3887 | return 0; | |
| 3888 | } | |
| 3889 | ||
| 0226d602 | 3890 | void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3891 | { |
| 991adf71 RM |
3892 | struct wmi_phyerr_hdr_arg hdr_arg = {}; |
| 3893 | struct wmi_phyerr_ev_arg phyerr_arg = {}; | |
| 3894 | const void *phyerr; | |
| 9702c686 JD |
3895 | u32 count, i, buf_len, phy_err_code; |
| 3896 | u64 tsf; | |
| 32653cf1 | 3897 | int left_len, ret; |
| 9702c686 JD |
3898 | |
| 3899 | ATH10K_DFS_STAT_INC(ar, phy_errors); | |
| 3900 | ||
| 991adf71 | 3901 | ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg); |
| 32653cf1 | 3902 | if (ret) { |
| 991adf71 | 3903 | ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret); |
| 9702c686 JD |
3904 | return; |
| 3905 | } | |
| 3906 | ||
| 9702c686 | 3907 | /* Check number of included events */ |
| 991adf71 | 3908 | count = hdr_arg.num_phyerrs; |
| 9702c686 | 3909 | |
| 991adf71 RM |
3910 | left_len = hdr_arg.buf_len; |
| 3911 | ||
| 3912 | tsf = hdr_arg.tsf_u32; | |
| 9702c686 | 3913 | tsf <<= 32; |
| 991adf71 | 3914 | tsf |= hdr_arg.tsf_l32; |
| 9702c686 | 3915 | |
| 7aa7a72a | 3916 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 9702c686 JD |
3917 | "wmi event phyerr count %d tsf64 0x%llX\n", |
| 3918 | count, tsf); | |
| 3919 | ||
| 991adf71 | 3920 | phyerr = hdr_arg.phyerrs; |
| 9702c686 | 3921 | for (i = 0; i < count; i++) { |
| 991adf71 RM |
3922 | ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg); |
| 3923 | if (ret) { | |
| 3924 | ath10k_warn(ar, "failed to parse phyerr event (%d)\n", | |
| 7aa7a72a | 3925 | i); |
| 9702c686 JD |
3926 | return; |
| 3927 | } | |
| 3928 | ||
| 991adf71 RM |
3929 | left_len -= phyerr_arg.hdr_len; |
| 3930 | buf_len = phyerr_arg.buf_len; | |
| 3931 | phy_err_code = phyerr_arg.phy_err_code; | |
| 9702c686 JD |
3932 | |
| 3933 | if (left_len < buf_len) { | |
| 7aa7a72a | 3934 | ath10k_warn(ar, "single event (%d) wrong buf len\n", i); |
| 9702c686 JD |
3935 | return; |
| 3936 | } | |
| 3937 | ||
| 3938 | left_len -= buf_len; | |
| 3939 | ||
| 3940 | switch (phy_err_code) { | |
| 3941 | case PHY_ERROR_RADAR: | |
| 991adf71 | 3942 | ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf); |
| 9702c686 JD |
3943 | break; |
| 3944 | case PHY_ERROR_SPECTRAL_SCAN: | |
| 991adf71 | 3945 | ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf); |
| 9702c686 JD |
3946 | break; |
| 3947 | case PHY_ERROR_FALSE_RADAR_EXT: | |
| 991adf71 RM |
3948 | ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf); |
| 3949 | ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf); | |
| 9702c686 JD |
3950 | break; |
| 3951 | default: | |
| 3952 | break; | |
| 3953 | } | |
| 3954 | ||
| 991adf71 | 3955 | phyerr = phyerr + phyerr_arg.hdr_len + buf_len; |
| 9702c686 | 3956 | } |
| 5e3dd157 KV |
3957 | } |
| 3958 | ||
| 0226d602 | 3959 | void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3960 | { |
| c1a4654a MK |
3961 | struct wmi_roam_ev_arg arg = {}; |
| 3962 | int ret; | |
| 3963 | u32 vdev_id; | |
| 3964 | u32 reason; | |
| 3965 | s32 rssi; | |
| 3966 | ||
| 3967 | ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg); | |
| 3968 | if (ret) { | |
| 3969 | ath10k_warn(ar, "failed to parse roam event: %d\n", ret); | |
| 3970 | return; | |
| 3971 | } | |
| 3972 | ||
| 3973 | vdev_id = __le32_to_cpu(arg.vdev_id); | |
| 3974 | reason = __le32_to_cpu(arg.reason); | |
| 3975 | rssi = __le32_to_cpu(arg.rssi); | |
| 3976 | rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT; | |
| 3977 | ||
| 3978 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 3979 | "wmi roam event vdev %u reason 0x%08x rssi %d\n", | |
| 3980 | vdev_id, reason, rssi); | |
| 3981 | ||
| 3982 | if (reason >= WMI_ROAM_REASON_MAX) | |
| 3983 | ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n", | |
| 3984 | reason, vdev_id); | |
| 3985 | ||
| 3986 | switch (reason) { | |
| c1a4654a | 3987 | case WMI_ROAM_REASON_BEACON_MISS: |
| cc9904e6 MK |
3988 | ath10k_mac_handle_beacon_miss(ar, vdev_id); |
| 3989 | break; | |
| 3990 | case WMI_ROAM_REASON_BETTER_AP: | |
| c1a4654a MK |
3991 | case WMI_ROAM_REASON_LOW_RSSI: |
| 3992 | case WMI_ROAM_REASON_SUITABLE_AP_FOUND: | |
| 3993 | case WMI_ROAM_REASON_HO_FAILED: | |
| 3994 | ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n", | |
| 3995 | reason, vdev_id); | |
| 3996 | break; | |
| 3997 | } | |
| 5e3dd157 KV |
3998 | } |
| 3999 | ||
| 0226d602 | 4000 | void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4001 | { |
| 7aa7a72a | 4002 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n"); |
| 5e3dd157 KV |
4003 | } |
| 4004 | ||
| 0226d602 | 4005 | void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4006 | { |
| 2fe5288c KV |
4007 | char buf[101], c; |
| 4008 | int i; | |
| 4009 | ||
| 4010 | for (i = 0; i < sizeof(buf) - 1; i++) { | |
| 4011 | if (i >= skb->len) | |
| 4012 | break; | |
| 4013 | ||
| 4014 | c = skb->data[i]; | |
| 4015 | ||
| 4016 | if (c == '\0') | |
| 4017 | break; | |
| 4018 | ||
| 4019 | if (isascii(c) && isprint(c)) | |
| 4020 | buf[i] = c; | |
| 4021 | else | |
| 4022 | buf[i] = '.'; | |
| 4023 | } | |
| 4024 | ||
| 4025 | if (i == sizeof(buf) - 1) | |
| 7aa7a72a | 4026 | ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len); |
| 2fe5288c KV |
4027 | |
| 4028 | /* for some reason the debug prints end with \n, remove that */ | |
| 4029 | if (skb->data[i - 1] == '\n') | |
| 4030 | i--; | |
| 4031 | ||
| 4032 | /* the last byte is always reserved for the null character */ | |
| 4033 | buf[i] = '\0'; | |
| 4034 | ||
| 3be004c3 | 4035 | ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf); |
| 5e3dd157 KV |
4036 | } |
| 4037 | ||
| 0226d602 | 4038 | void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4039 | { |
| 7aa7a72a | 4040 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n"); |
| 5e3dd157 KV |
4041 | } |
| 4042 | ||
| 0226d602 | 4043 | void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4044 | { |
| 7aa7a72a | 4045 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n"); |
| 5e3dd157 KV |
4046 | } |
| 4047 | ||
| 0226d602 MK |
4048 | void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, |
| 4049 | struct sk_buff *skb) | |
| 5e3dd157 | 4050 | { |
| 7aa7a72a | 4051 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n"); |
| 5e3dd157 KV |
4052 | } |
| 4053 | ||
| 0226d602 MK |
4054 | void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, |
| 4055 | struct sk_buff *skb) | |
| 5e3dd157 | 4056 | { |
| 7aa7a72a | 4057 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n"); |
| 5e3dd157 KV |
4058 | } |
| 4059 | ||
| 0226d602 | 4060 | void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4061 | { |
| 7aa7a72a | 4062 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n"); |
| 5e3dd157 KV |
4063 | } |
| 4064 | ||
| 0226d602 | 4065 | void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4066 | { |
| 5fd3ac3c JD |
4067 | struct wmi_wow_ev_arg ev = {}; |
| 4068 | int ret; | |
| 4069 | ||
| 4070 | complete(&ar->wow.wakeup_completed); | |
| 4071 | ||
| 4072 | ret = ath10k_wmi_pull_wow_event(ar, skb, &ev); | |
| 4073 | if (ret) { | |
| 4074 | ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret); | |
| 4075 | return; | |
| 4076 | } | |
| 4077 | ||
| 4078 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n", | |
| 4079 | wow_reason(ev.wake_reason)); | |
| 5e3dd157 KV |
4080 | } |
| 4081 | ||
| 0226d602 | 4082 | void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4083 | { |
| 7aa7a72a | 4084 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n"); |
| 5e3dd157 KV |
4085 | } |
| 4086 | ||
| 29542666 MK |
4087 | static u8 ath10k_tpc_config_get_rate(struct ath10k *ar, |
| 4088 | struct wmi_pdev_tpc_config_event *ev, | |
| 4089 | u32 rate_idx, u32 num_chains, | |
| 4090 | u32 rate_code, u8 type) | |
| 4091 | { | |
| 4092 | u8 tpc, num_streams, preamble, ch, stm_idx; | |
| 4093 | ||
| 4094 | num_streams = ATH10K_HW_NSS(rate_code); | |
| 4095 | preamble = ATH10K_HW_PREAMBLE(rate_code); | |
| 4096 | ch = num_chains - 1; | |
| 4097 | ||
| 4098 | tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]); | |
| 4099 | ||
| 4100 | if (__le32_to_cpu(ev->num_tx_chain) <= 1) | |
| 4101 | goto out; | |
| 4102 | ||
| 4103 | if (preamble == WMI_RATE_PREAMBLE_CCK) | |
| 4104 | goto out; | |
| 4105 | ||
| 4106 | stm_idx = num_streams - 1; | |
| 4107 | if (num_chains <= num_streams) | |
| 4108 | goto out; | |
| 4109 | ||
| 4110 | switch (type) { | |
| 4111 | case WMI_TPC_TABLE_TYPE_STBC: | |
| 4112 | tpc = min_t(u8, tpc, | |
| 4113 | ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]); | |
| 4114 | break; | |
| 4115 | case WMI_TPC_TABLE_TYPE_TXBF: | |
| 4116 | tpc = min_t(u8, tpc, | |
| 4117 | ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]); | |
| 4118 | break; | |
| 4119 | case WMI_TPC_TABLE_TYPE_CDD: | |
| 4120 | tpc = min_t(u8, tpc, | |
| 4121 | ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]); | |
| 4122 | break; | |
| 4123 | default: | |
| 4124 | ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type); | |
| 4125 | tpc = 0; | |
| 4126 | break; | |
| 4127 | } | |
| 4128 | ||
| 4129 | out: | |
| 4130 | return tpc; | |
| 4131 | } | |
| 4132 | ||
| 4133 | static void ath10k_tpc_config_disp_tables(struct ath10k *ar, | |
| 4134 | struct wmi_pdev_tpc_config_event *ev, | |
| 4135 | struct ath10k_tpc_stats *tpc_stats, | |
| 4136 | u8 *rate_code, u16 *pream_table, u8 type) | |
| 4137 | { | |
| 4138 | u32 i, j, pream_idx, flags; | |
| 4139 | u8 tpc[WMI_TPC_TX_N_CHAIN]; | |
| 4140 | char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; | |
| 4141 | char buff[WMI_TPC_BUF_SIZE]; | |
| 4142 | ||
| 4143 | flags = __le32_to_cpu(ev->flags); | |
| 4144 | ||
| 4145 | switch (type) { | |
| 4146 | case WMI_TPC_TABLE_TYPE_CDD: | |
| 4147 | if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) { | |
| 4148 | ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n"); | |
| 4149 | tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; | |
| 4150 | return; | |
| 4151 | } | |
| 4152 | break; | |
| 4153 | case WMI_TPC_TABLE_TYPE_STBC: | |
| 4154 | if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) { | |
| 4155 | ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n"); | |
| 4156 | tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; | |
| 4157 | return; | |
| 4158 | } | |
| 4159 | break; | |
| 4160 | case WMI_TPC_TABLE_TYPE_TXBF: | |
| 4161 | if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) { | |
| 4162 | ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n"); | |
| 4163 | tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; | |
| 4164 | return; | |
| 4165 | } | |
| 4166 | break; | |
| 4167 | default: | |
| 4168 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 4169 | "invalid table type in wmi tpc event: %d\n", type); | |
| 4170 | return; | |
| 4171 | } | |
| 4172 | ||
| 4173 | pream_idx = 0; | |
| 4174 | for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) { | |
| 4175 | memset(tpc_value, 0, sizeof(tpc_value)); | |
| 4176 | memset(buff, 0, sizeof(buff)); | |
| 4177 | if (i == pream_table[pream_idx]) | |
| 4178 | pream_idx++; | |
| 4179 | ||
| 4180 | for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) { | |
| 4181 | if (j >= __le32_to_cpu(ev->num_tx_chain)) | |
| 4182 | break; | |
| 4183 | ||
| 4184 | tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1, | |
| 4185 | rate_code[i], | |
| 4186 | type); | |
| 4187 | snprintf(buff, sizeof(buff), "%8d ", tpc[j]); | |
| 4188 | strncat(tpc_value, buff, strlen(buff)); | |
| 4189 | } | |
| 4190 | tpc_stats->tpc_table[type].pream_idx[i] = pream_idx; | |
| 4191 | tpc_stats->tpc_table[type].rate_code[i] = rate_code[i]; | |
| 4192 | memcpy(tpc_stats->tpc_table[type].tpc_value[i], | |
| 4193 | tpc_value, sizeof(tpc_value)); | |
| 4194 | } | |
| 4195 | } | |
| 4196 | ||
| 0226d602 | 4197 | void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4198 | { |
| 29542666 MK |
4199 | u32 i, j, pream_idx, num_tx_chain; |
| 4200 | u8 rate_code[WMI_TPC_RATE_MAX], rate_idx; | |
| 4201 | u16 pream_table[WMI_TPC_PREAM_TABLE_MAX]; | |
| 4202 | struct wmi_pdev_tpc_config_event *ev; | |
| 4203 | struct ath10k_tpc_stats *tpc_stats; | |
| 4204 | ||
| 4205 | ev = (struct wmi_pdev_tpc_config_event *)skb->data; | |
| 4206 | ||
| 4207 | tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC); | |
| 4208 | if (!tpc_stats) | |
| 4209 | return; | |
| 4210 | ||
| 4211 | /* Create the rate code table based on the chains supported */ | |
| 4212 | rate_idx = 0; | |
| 4213 | pream_idx = 0; | |
| 4214 | ||
| 4215 | /* Fill CCK rate code */ | |
| 4216 | for (i = 0; i < 4; i++) { | |
| 4217 | rate_code[rate_idx] = | |
| 4218 | ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK); | |
| 4219 | rate_idx++; | |
| 4220 | } | |
| 4221 | pream_table[pream_idx] = rate_idx; | |
| 4222 | pream_idx++; | |
| 4223 | ||
| 4224 | /* Fill OFDM rate code */ | |
| 4225 | for (i = 0; i < 8; i++) { | |
| 4226 | rate_code[rate_idx] = | |
| 4227 | ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM); | |
| 4228 | rate_idx++; | |
| 4229 | } | |
| 4230 | pream_table[pream_idx] = rate_idx; | |
| 4231 | pream_idx++; | |
| 4232 | ||
| 4233 | num_tx_chain = __le32_to_cpu(ev->num_tx_chain); | |
| 4234 | ||
| 4235 | /* Fill HT20 rate code */ | |
| 4236 | for (i = 0; i < num_tx_chain; i++) { | |
| 4237 | for (j = 0; j < 8; j++) { | |
| 4238 | rate_code[rate_idx] = | |
| 4239 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT); | |
| 4240 | rate_idx++; | |
| 4241 | } | |
| 4242 | } | |
| 4243 | pream_table[pream_idx] = rate_idx; | |
| 4244 | pream_idx++; | |
| 4245 | ||
| 4246 | /* Fill HT40 rate code */ | |
| 4247 | for (i = 0; i < num_tx_chain; i++) { | |
| 4248 | for (j = 0; j < 8; j++) { | |
| 4249 | rate_code[rate_idx] = | |
| 4250 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT); | |
| 4251 | rate_idx++; | |
| 4252 | } | |
| 4253 | } | |
| 4254 | pream_table[pream_idx] = rate_idx; | |
| 4255 | pream_idx++; | |
| 4256 | ||
| 4257 | /* Fill VHT20 rate code */ | |
| 4258 | for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) { | |
| 4259 | for (j = 0; j < 10; j++) { | |
| 4260 | rate_code[rate_idx] = | |
| 4261 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); | |
| 4262 | rate_idx++; | |
| 4263 | } | |
| 4264 | } | |
| 4265 | pream_table[pream_idx] = rate_idx; | |
| 4266 | pream_idx++; | |
| 4267 | ||
| 4268 | /* Fill VHT40 rate code */ | |
| 4269 | for (i = 0; i < num_tx_chain; i++) { | |
| 4270 | for (j = 0; j < 10; j++) { | |
| 4271 | rate_code[rate_idx] = | |
| 4272 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); | |
| 4273 | rate_idx++; | |
| 4274 | } | |
| 4275 | } | |
| 4276 | pream_table[pream_idx] = rate_idx; | |
| 4277 | pream_idx++; | |
| 4278 | ||
| 4279 | /* Fill VHT80 rate code */ | |
| 4280 | for (i = 0; i < num_tx_chain; i++) { | |
| 4281 | for (j = 0; j < 10; j++) { | |
| 4282 | rate_code[rate_idx] = | |
| 4283 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); | |
| 4284 | rate_idx++; | |
| 4285 | } | |
| 4286 | } | |
| 4287 | pream_table[pream_idx] = rate_idx; | |
| 4288 | pream_idx++; | |
| 4289 | ||
| 4290 | rate_code[rate_idx++] = | |
| 4291 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK); | |
| 4292 | rate_code[rate_idx++] = | |
| 4293 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); | |
| 4294 | rate_code[rate_idx++] = | |
| 4295 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK); | |
| 4296 | rate_code[rate_idx++] = | |
| 4297 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); | |
| 4298 | rate_code[rate_idx++] = | |
| 4299 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); | |
| 4300 | ||
| 4301 | pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END; | |
| 4302 | ||
| 4303 | tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq); | |
| 4304 | tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode); | |
| 4305 | tpc_stats->ctl = __le32_to_cpu(ev->ctl); | |
| 4306 | tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain); | |
| 4307 | tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain); | |
| 4308 | tpc_stats->twice_antenna_reduction = | |
| 4309 | __le32_to_cpu(ev->twice_antenna_reduction); | |
| 4310 | tpc_stats->power_limit = __le32_to_cpu(ev->power_limit); | |
| 4311 | tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power); | |
| 4312 | tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain); | |
| 4313 | tpc_stats->rate_max = __le32_to_cpu(ev->rate_max); | |
| 4314 | ||
| 4315 | ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, | |
| 4316 | rate_code, pream_table, | |
| 4317 | WMI_TPC_TABLE_TYPE_CDD); | |
| 4318 | ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, | |
| 4319 | rate_code, pream_table, | |
| 4320 | WMI_TPC_TABLE_TYPE_STBC); | |
| 4321 | ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, | |
| 4322 | rate_code, pream_table, | |
| 4323 | WMI_TPC_TABLE_TYPE_TXBF); | |
| 4324 | ||
| 4325 | ath10k_debug_tpc_stats_process(ar, tpc_stats); | |
| 4326 | ||
| 4327 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 4328 | "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n", | |
| 4329 | __le32_to_cpu(ev->chan_freq), | |
| 4330 | __le32_to_cpu(ev->phy_mode), | |
| 4331 | __le32_to_cpu(ev->ctl), | |
| 4332 | __le32_to_cpu(ev->reg_domain), | |
| 4333 | a_sle32_to_cpu(ev->twice_antenna_gain), | |
| 4334 | __le32_to_cpu(ev->twice_antenna_reduction), | |
| 4335 | __le32_to_cpu(ev->power_limit), | |
| 4336 | __le32_to_cpu(ev->twice_max_rd_power) / 2, | |
| 4337 | __le32_to_cpu(ev->num_tx_chain), | |
| 4338 | __le32_to_cpu(ev->rate_max)); | |
| 5e3dd157 KV |
4339 | } |
| 4340 | ||
| 0226d602 | 4341 | void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4342 | { |
| 7aa7a72a | 4343 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n"); |
| 5e3dd157 KV |
4344 | } |
| 4345 | ||
| 0226d602 | 4346 | void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4347 | { |
| 7aa7a72a | 4348 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n"); |
| 5e3dd157 KV |
4349 | } |
| 4350 | ||
| 0226d602 | 4351 | void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4352 | { |
| 7aa7a72a | 4353 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n"); |
| 5e3dd157 KV |
4354 | } |
| 4355 | ||
| 0226d602 | 4356 | void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4357 | { |
| 7aa7a72a | 4358 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n"); |
| 5e3dd157 KV |
4359 | } |
| 4360 | ||
| 0226d602 | 4361 | void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4362 | { |
| 7aa7a72a | 4363 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n"); |
| 5e3dd157 KV |
4364 | } |
| 4365 | ||
| 0226d602 MK |
4366 | void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, |
| 4367 | struct sk_buff *skb) | |
| 5e3dd157 | 4368 | { |
| 7aa7a72a | 4369 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n"); |
| 5e3dd157 KV |
4370 | } |
| 4371 | ||
| 0226d602 | 4372 | void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb) |
| 8a6618b0 | 4373 | { |
| 7aa7a72a | 4374 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n"); |
| 8a6618b0 BM |
4375 | } |
| 4376 | ||
| 0226d602 | 4377 | void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb) |
| 8a6618b0 | 4378 | { |
| 7aa7a72a | 4379 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n"); |
| 8a6618b0 BM |
4380 | } |
| 4381 | ||
| 0226d602 | 4382 | void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb) |
| 8a6618b0 | 4383 | { |
| 7aa7a72a | 4384 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n"); |
| 8a6618b0 BM |
4385 | } |
| 4386 | ||
| b0578865 FF |
4387 | static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id, |
| 4388 | u32 num_units, u32 unit_len) | |
| b3effe61 BM |
4389 | { |
| 4390 | dma_addr_t paddr; | |
| b0578865 | 4391 | u32 pool_size = 0; |
| b3effe61 | 4392 | int idx = ar->wmi.num_mem_chunks; |
| b0578865 | 4393 | void *vaddr = NULL; |
| b3effe61 | 4394 | |
| b0578865 FF |
4395 | if (ar->wmi.num_mem_chunks == ARRAY_SIZE(ar->wmi.mem_chunks)) |
| 4396 | return -ENOMEM; | |
| b3effe61 | 4397 | |
| b0578865 FF |
4398 | while (!vaddr && num_units) { |
| 4399 | pool_size = num_units * round_up(unit_len, 4); | |
| 4400 | if (!pool_size) | |
| 4401 | return -EINVAL; | |
| b3effe61 | 4402 | |
| b0578865 FF |
4403 | vaddr = kzalloc(pool_size, GFP_KERNEL | __GFP_NOWARN); |
| 4404 | if (!vaddr) | |
| 4405 | num_units /= 2; | |
| b3effe61 BM |
4406 | } |
| 4407 | ||
| b0578865 FF |
4408 | if (!num_units) |
| 4409 | return -ENOMEM; | |
| 4410 | ||
| 4411 | paddr = dma_map_single(ar->dev, vaddr, pool_size, DMA_TO_DEVICE); | |
| 4412 | if (dma_mapping_error(ar->dev, paddr)) { | |
| 4413 | kfree(vaddr); | |
| 4414 | return -ENOMEM; | |
| 4415 | } | |
| b3effe61 | 4416 | |
| b0578865 | 4417 | ar->wmi.mem_chunks[idx].vaddr = vaddr; |
| b3effe61 BM |
4418 | ar->wmi.mem_chunks[idx].paddr = paddr; |
| 4419 | ar->wmi.mem_chunks[idx].len = pool_size; | |
| 4420 | ar->wmi.mem_chunks[idx].req_id = req_id; | |
| 4421 | ar->wmi.num_mem_chunks++; | |
| 4422 | ||
| b0578865 FF |
4423 | return num_units; |
| 4424 | } | |
| 4425 | ||
| 4426 | static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id, | |
| 4427 | u32 num_units, u32 unit_len) | |
| 4428 | { | |
| 4429 | int ret; | |
| 4430 | ||
| 4431 | while (num_units) { | |
| 4432 | ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len); | |
| 4433 | if (ret < 0) | |
| 4434 | return ret; | |
| 4435 | ||
| 4436 | num_units -= ret; | |
| 4437 | } | |
| 4438 | ||
| b3effe61 BM |
4439 | return 0; |
| 4440 | } | |
| 4441 | ||
| a925a376 VT |
4442 | static bool |
| 4443 | ath10k_wmi_is_host_mem_allocated(struct ath10k *ar, | |
| 4444 | const struct wlan_host_mem_req **mem_reqs, | |
| 4445 | u32 num_mem_reqs) | |
| 4446 | { | |
| 4447 | u32 req_id, num_units, unit_size, num_unit_info; | |
| 4448 | u32 pool_size; | |
| 4449 | int i, j; | |
| 4450 | bool found; | |
| 4451 | ||
| 4452 | if (ar->wmi.num_mem_chunks != num_mem_reqs) | |
| 4453 | return false; | |
| 4454 | ||
| 4455 | for (i = 0; i < num_mem_reqs; ++i) { | |
| 4456 | req_id = __le32_to_cpu(mem_reqs[i]->req_id); | |
| 4457 | num_units = __le32_to_cpu(mem_reqs[i]->num_units); | |
| 4458 | unit_size = __le32_to_cpu(mem_reqs[i]->unit_size); | |
| 4459 | num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info); | |
| 4460 | ||
| 4461 | if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) { | |
| 4462 | if (ar->num_active_peers) | |
| 4463 | num_units = ar->num_active_peers + 1; | |
| 4464 | else | |
| 4465 | num_units = ar->max_num_peers + 1; | |
| 4466 | } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) { | |
| 4467 | num_units = ar->max_num_peers + 1; | |
| 4468 | } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) { | |
| 4469 | num_units = ar->max_num_vdevs + 1; | |
| 4470 | } | |
| 4471 | ||
| 4472 | found = false; | |
| 4473 | for (j = 0; j < ar->wmi.num_mem_chunks; j++) { | |
| 4474 | if (ar->wmi.mem_chunks[j].req_id == req_id) { | |
| 4475 | pool_size = num_units * round_up(unit_size, 4); | |
| 4476 | if (ar->wmi.mem_chunks[j].len == pool_size) { | |
| 4477 | found = true; | |
| 4478 | break; | |
| 4479 | } | |
| 4480 | } | |
| 4481 | } | |
| 4482 | if (!found) | |
| 4483 | return false; | |
| 4484 | } | |
| 4485 | ||
| 4486 | return true; | |
| 4487 | } | |
| 4488 | ||
| d7579d12 MK |
4489 | static int |
| 4490 | ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, | |
| 4491 | struct wmi_svc_rdy_ev_arg *arg) | |
| 5c01aa3d MK |
4492 | { |
| 4493 | struct wmi_service_ready_event *ev; | |
| 4494 | size_t i, n; | |
| 4495 | ||
| 4496 | if (skb->len < sizeof(*ev)) | |
| 4497 | return -EPROTO; | |
| 4498 | ||
| 4499 | ev = (void *)skb->data; | |
| 4500 | skb_pull(skb, sizeof(*ev)); | |
| 4501 | arg->min_tx_power = ev->hw_min_tx_power; | |
| 4502 | arg->max_tx_power = ev->hw_max_tx_power; | |
| 4503 | arg->ht_cap = ev->ht_cap_info; | |
| 4504 | arg->vht_cap = ev->vht_cap_info; | |
| 4505 | arg->sw_ver0 = ev->sw_version; | |
| 4506 | arg->sw_ver1 = ev->sw_version_1; | |
| 4507 | arg->phy_capab = ev->phy_capability; | |
| 4508 | arg->num_rf_chains = ev->num_rf_chains; | |
| 4509 | arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; | |
| 4510 | arg->num_mem_reqs = ev->num_mem_reqs; | |
| 4511 | arg->service_map = ev->wmi_service_bitmap; | |
| 2a3e60d3 | 4512 | arg->service_map_len = sizeof(ev->wmi_service_bitmap); |
| 5c01aa3d MK |
4513 | |
| 4514 | n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), | |
| 4515 | ARRAY_SIZE(arg->mem_reqs)); | |
| 4516 | for (i = 0; i < n; i++) | |
| 4517 | arg->mem_reqs[i] = &ev->mem_reqs[i]; | |
| 4518 | ||
| 4519 | if (skb->len < | |
| 4520 | __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) | |
| 4521 | return -EPROTO; | |
| 4522 | ||
| 4523 | return 0; | |
| 4524 | } | |
| 4525 | ||
| d7579d12 MK |
4526 | static int |
| 4527 | ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, | |
| 4528 | struct wmi_svc_rdy_ev_arg *arg) | |
| 5c01aa3d MK |
4529 | { |
| 4530 | struct wmi_10x_service_ready_event *ev; | |
| 4531 | int i, n; | |
| 4532 | ||
| 4533 | if (skb->len < sizeof(*ev)) | |
| 4534 | return -EPROTO; | |
| 4535 | ||
| 4536 | ev = (void *)skb->data; | |
| 4537 | skb_pull(skb, sizeof(*ev)); | |
| 4538 | arg->min_tx_power = ev->hw_min_tx_power; | |
| 4539 | arg->max_tx_power = ev->hw_max_tx_power; | |
| 4540 | arg->ht_cap = ev->ht_cap_info; | |
| 4541 | arg->vht_cap = ev->vht_cap_info; | |
| 4542 | arg->sw_ver0 = ev->sw_version; | |
| 4543 | arg->phy_capab = ev->phy_capability; | |
| 4544 | arg->num_rf_chains = ev->num_rf_chains; | |
| 4545 | arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; | |
| 4546 | arg->num_mem_reqs = ev->num_mem_reqs; | |
| 4547 | arg->service_map = ev->wmi_service_bitmap; | |
| 2a3e60d3 | 4548 | arg->service_map_len = sizeof(ev->wmi_service_bitmap); |
| 5c01aa3d MK |
4549 | |
| 4550 | n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), | |
| 4551 | ARRAY_SIZE(arg->mem_reqs)); | |
| 4552 | for (i = 0; i < n; i++) | |
| 4553 | arg->mem_reqs[i] = &ev->mem_reqs[i]; | |
| 4554 | ||
| 4555 | if (skb->len < | |
| 4556 | __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) | |
| 4557 | return -EPROTO; | |
| 4558 | ||
| 4559 | return 0; | |
| 4560 | } | |
| 4561 | ||
| c8ecfc1c | 4562 | static void ath10k_wmi_event_service_ready_work(struct work_struct *work) |
| 5e3dd157 | 4563 | { |
| c8ecfc1c RM |
4564 | struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work); |
| 4565 | struct sk_buff *skb = ar->svc_rdy_skb; | |
| 5c01aa3d MK |
4566 | struct wmi_svc_rdy_ev_arg arg = {}; |
| 4567 | u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i; | |
| 5c01aa3d | 4568 | int ret; |
| a925a376 | 4569 | bool allocated; |
| 5c01aa3d | 4570 | |
| c8ecfc1c RM |
4571 | if (!skb) { |
| 4572 | ath10k_warn(ar, "invalid service ready event skb\n"); | |
| 4573 | return; | |
| 4574 | } | |
| 4575 | ||
| d7579d12 | 4576 | ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg); |
| 5c01aa3d MK |
4577 | if (ret) { |
| 4578 | ath10k_warn(ar, "failed to parse service ready: %d\n", ret); | |
| 5e3dd157 KV |
4579 | return; |
| 4580 | } | |
| 4581 | ||
| d7579d12 MK |
4582 | memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map)); |
| 4583 | ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map, | |
| 4584 | arg.service_map_len); | |
| 4585 | ||
| 5c01aa3d MK |
4586 | ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power); |
| 4587 | ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power); | |
| 4588 | ar->ht_cap_info = __le32_to_cpu(arg.ht_cap); | |
| 4589 | ar->vht_cap_info = __le32_to_cpu(arg.vht_cap); | |
| 5e3dd157 | 4590 | ar->fw_version_major = |
| 5c01aa3d MK |
4591 | (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24; |
| 4592 | ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff); | |
| 5e3dd157 | 4593 | ar->fw_version_release = |
| 5c01aa3d MK |
4594 | (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16; |
| 4595 | ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff); | |
| 4596 | ar->phy_capability = __le32_to_cpu(arg.phy_capab); | |
| 4597 | ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains); | |
| 4598 | ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd); | |
| 4599 | ||
| 5c01aa3d | 4600 | ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ", |
| 2a3e60d3 | 4601 | arg.service_map, arg.service_map_len); |
| 8865bee4 | 4602 | |
| 1a222435 KV |
4603 | /* only manually set fw features when not using FW IE format */ |
| 4604 | if (ar->fw_api == 1 && ar->fw_version_build > 636) | |
| 0d9b0438 MK |
4605 | set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features); |
| 4606 | ||
| 5c8726ec | 4607 | if (ar->num_rf_chains > ar->max_spatial_stream) { |
| 7aa7a72a | 4608 | ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n", |
| 5c8726ec RM |
4609 | ar->num_rf_chains, ar->max_spatial_stream); |
| 4610 | ar->num_rf_chains = ar->max_spatial_stream; | |
| 8865bee4 | 4611 | } |
| 5e3dd157 | 4612 | |
| 166de3f1 RM |
4613 | if (!ar->cfg_tx_chainmask) { |
| 4614 | ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1; | |
| 4615 | ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1; | |
| 4616 | } | |
| fdb959c7 | 4617 | |
| 5e3dd157 KV |
4618 | if (strlen(ar->hw->wiphy->fw_version) == 0) { |
| 4619 | snprintf(ar->hw->wiphy->fw_version, | |
| 4620 | sizeof(ar->hw->wiphy->fw_version), | |
| 4621 | "%u.%u.%u.%u", | |
| 4622 | ar->fw_version_major, | |
| 4623 | ar->fw_version_minor, | |
| 4624 | ar->fw_version_release, | |
| 4625 | ar->fw_version_build); | |
| 4626 | } | |
| 4627 | ||
| 5c01aa3d MK |
4628 | num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs); |
| 4629 | if (num_mem_reqs > WMI_MAX_MEM_REQS) { | |
| 7aa7a72a | 4630 | ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n", |
| b3effe61 BM |
4631 | num_mem_reqs); |
| 4632 | return; | |
| 6f97d256 BM |
4633 | } |
| 4634 | ||
| b0399417 | 4635 | if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) { |
| 99ad1cba MK |
4636 | if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, |
| 4637 | ar->fw_features)) | |
| 4638 | ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC + | |
| 4639 | ar->max_num_vdevs; | |
| 4640 | else | |
| 4641 | ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS + | |
| 4642 | ar->max_num_vdevs; | |
| 4643 | ||
| b0399417 | 4644 | ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX + |
| 5699a6f2 | 4645 | ar->max_num_vdevs; |
| b0399417 RM |
4646 | ar->num_tids = ar->num_active_peers * 2; |
| 4647 | ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX; | |
| 4648 | } | |
| 4649 | ||
| 4650 | /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE | |
| 4651 | * and WMI_SERVICE_IRAM_TIDS, etc. | |
| 4652 | */ | |
| 4653 | ||
| a925a376 VT |
4654 | allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs, |
| 4655 | num_mem_reqs); | |
| 4656 | if (allocated) | |
| 4657 | goto skip_mem_alloc; | |
| 4658 | ||
| 4659 | /* Either this event is received during boot time or there is a change | |
| 4660 | * in memory requirement from firmware when compared to last request. | |
| 4661 | * Free any old memory and do a fresh allocation based on the current | |
| 4662 | * memory requirement. | |
| 4663 | */ | |
| 4664 | ath10k_wmi_free_host_mem(ar); | |
| 4665 | ||
| b3effe61 | 4666 | for (i = 0; i < num_mem_reqs; ++i) { |
| 5c01aa3d MK |
4667 | req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id); |
| 4668 | num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units); | |
| 4669 | unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size); | |
| 4670 | num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info); | |
| b3effe61 | 4671 | |
| b0399417 RM |
4672 | if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) { |
| 4673 | if (ar->num_active_peers) | |
| 4674 | num_units = ar->num_active_peers + 1; | |
| 4675 | else | |
| 4676 | num_units = ar->max_num_peers + 1; | |
| 4677 | } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) { | |
| b3effe61 BM |
4678 | /* number of units to allocate is number of |
| 4679 | * peers, 1 extra for self peer on target */ | |
| 4680 | /* this needs to be tied, host and target | |
| 4681 | * can get out of sync */ | |
| b0399417 RM |
4682 | num_units = ar->max_num_peers + 1; |
| 4683 | } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) { | |
| 4684 | num_units = ar->max_num_vdevs + 1; | |
| 4685 | } | |
| b3effe61 | 4686 | |
| 7aa7a72a | 4687 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| b3effe61 BM |
4688 | "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n", |
| 4689 | req_id, | |
| 5c01aa3d | 4690 | __le32_to_cpu(arg.mem_reqs[i]->num_units), |
| b3effe61 BM |
4691 | num_unit_info, |
| 4692 | unit_size, | |
| 4693 | num_units); | |
| 4694 | ||
| 4695 | ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units, | |
| 4696 | unit_size); | |
| 4697 | if (ret) | |
| 4698 | return; | |
| 4699 | } | |
| 4700 | ||
| a925a376 | 4701 | skip_mem_alloc: |
| 7aa7a72a | 4702 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| ca996ec5 | 4703 | "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n", |
| 5c01aa3d MK |
4704 | __le32_to_cpu(arg.min_tx_power), |
| 4705 | __le32_to_cpu(arg.max_tx_power), | |
| 4706 | __le32_to_cpu(arg.ht_cap), | |
| 4707 | __le32_to_cpu(arg.vht_cap), | |
| 4708 | __le32_to_cpu(arg.sw_ver0), | |
| 4709 | __le32_to_cpu(arg.sw_ver1), | |
| ca996ec5 | 4710 | __le32_to_cpu(arg.fw_build), |
| 5c01aa3d MK |
4711 | __le32_to_cpu(arg.phy_capab), |
| 4712 | __le32_to_cpu(arg.num_rf_chains), | |
| 4713 | __le32_to_cpu(arg.eeprom_rd), | |
| 4714 | __le32_to_cpu(arg.num_mem_reqs)); | |
| 6f97d256 | 4715 | |
| c8ecfc1c RM |
4716 | dev_kfree_skb(skb); |
| 4717 | ar->svc_rdy_skb = NULL; | |
| 6f97d256 BM |
4718 | complete(&ar->wmi.service_ready); |
| 4719 | } | |
| 4720 | ||
| c8ecfc1c RM |
4721 | void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb) |
| 4722 | { | |
| 4723 | ar->svc_rdy_skb = skb; | |
| 4724 | queue_work(ar->workqueue_aux, &ar->svc_rdy_work); | |
| 4725 | } | |
| 4726 | ||
| d7579d12 MK |
4727 | static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb, |
| 4728 | struct wmi_rdy_ev_arg *arg) | |
| 5e3dd157 | 4729 | { |
| 32653cf1 | 4730 | struct wmi_ready_event *ev = (void *)skb->data; |
| 5e3dd157 | 4731 | |
| 32653cf1 MK |
4732 | if (skb->len < sizeof(*ev)) |
| 4733 | return -EPROTO; | |
| 4734 | ||
| 4735 | skb_pull(skb, sizeof(*ev)); | |
| 4736 | arg->sw_version = ev->sw_version; | |
| 4737 | arg->abi_version = ev->abi_version; | |
| 4738 | arg->status = ev->status; | |
| 4739 | arg->mac_addr = ev->mac_addr.addr; | |
| 4740 | ||
| 4741 | return 0; | |
| 4742 | } | |
| 5e3dd157 | 4743 | |
| c1a4654a MK |
4744 | static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb, |
| 4745 | struct wmi_roam_ev_arg *arg) | |
| 4746 | { | |
| 4747 | struct wmi_roam_ev *ev = (void *)skb->data; | |
| 4748 | ||
| 4749 | if (skb->len < sizeof(*ev)) | |
| 4750 | return -EPROTO; | |
| 4751 | ||
| 4752 | skb_pull(skb, sizeof(*ev)); | |
| 4753 | arg->vdev_id = ev->vdev_id; | |
| 4754 | arg->reason = ev->reason; | |
| 4755 | ||
| 4756 | return 0; | |
| 4757 | } | |
| 4758 | ||
| 0226d602 | 4759 | int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb) |
| 32653cf1 MK |
4760 | { |
| 4761 | struct wmi_rdy_ev_arg arg = {}; | |
| 4762 | int ret; | |
| 4763 | ||
| d7579d12 | 4764 | ret = ath10k_wmi_pull_rdy(ar, skb, &arg); |
| 32653cf1 MK |
4765 | if (ret) { |
| 4766 | ath10k_warn(ar, "failed to parse ready event: %d\n", ret); | |
| 4767 | return ret; | |
| 4768 | } | |
| 5e3dd157 | 4769 | |
| 7aa7a72a | 4770 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 32653cf1 MK |
4771 | "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n", |
| 4772 | __le32_to_cpu(arg.sw_version), | |
| 4773 | __le32_to_cpu(arg.abi_version), | |
| 4774 | arg.mac_addr, | |
| 4775 | __le32_to_cpu(arg.status)); | |
| 5e3dd157 | 4776 | |
| 32653cf1 | 4777 | ether_addr_copy(ar->mac_addr, arg.mac_addr); |
| 5e3dd157 KV |
4778 | complete(&ar->wmi.unified_ready); |
| 4779 | return 0; | |
| 4780 | } | |
| 4781 | ||
| a57a6a27 RM |
4782 | static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb) |
| 4783 | { | |
| 4784 | const struct wmi_pdev_temperature_event *ev; | |
| 4785 | ||
| 4786 | ev = (struct wmi_pdev_temperature_event *)skb->data; | |
| 4787 | if (WARN_ON(skb->len < sizeof(*ev))) | |
| 4788 | return -EPROTO; | |
| 4789 | ||
| ac2953fc | 4790 | ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature)); |
| a57a6a27 RM |
4791 | return 0; |
| 4792 | } | |
| 4793 | ||
| d7579d12 | 4794 | static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 KV |
4795 | { |
| 4796 | struct wmi_cmd_hdr *cmd_hdr; | |
| 4797 | enum wmi_event_id id; | |
| 5e3dd157 KV |
4798 | |
| 4799 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
| 4800 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
| 4801 | ||
| 4802 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
| 469d479f | 4803 | goto out; |
| 5e3dd157 | 4804 | |
| d35a6c18 | 4805 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
| 5e3dd157 KV |
4806 | |
| 4807 | switch (id) { | |
| 4808 | case WMI_MGMT_RX_EVENTID: | |
| 4809 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
| 4810 | /* mgmt_rx() owns the skb now! */ | |
| 4811 | return; | |
| 4812 | case WMI_SCAN_EVENTID: | |
| 4813 | ath10k_wmi_event_scan(ar, skb); | |
| 4814 | break; | |
| 4815 | case WMI_CHAN_INFO_EVENTID: | |
| 4816 | ath10k_wmi_event_chan_info(ar, skb); | |
| 4817 | break; | |
| 4818 | case WMI_ECHO_EVENTID: | |
| 4819 | ath10k_wmi_event_echo(ar, skb); | |
| 4820 | break; | |
| 4821 | case WMI_DEBUG_MESG_EVENTID: | |
| 4822 | ath10k_wmi_event_debug_mesg(ar, skb); | |
| 4823 | break; | |
| 4824 | case WMI_UPDATE_STATS_EVENTID: | |
| 4825 | ath10k_wmi_event_update_stats(ar, skb); | |
| 4826 | break; | |
| 4827 | case WMI_VDEV_START_RESP_EVENTID: | |
| 4828 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
| 4829 | break; | |
| 4830 | case WMI_VDEV_STOPPED_EVENTID: | |
| 4831 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
| 4832 | break; | |
| 4833 | case WMI_PEER_STA_KICKOUT_EVENTID: | |
| 4834 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
| 4835 | break; | |
| 4836 | case WMI_HOST_SWBA_EVENTID: | |
| 4837 | ath10k_wmi_event_host_swba(ar, skb); | |
| 4838 | break; | |
| 4839 | case WMI_TBTTOFFSET_UPDATE_EVENTID: | |
| 4840 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
| 4841 | break; | |
| 4842 | case WMI_PHYERR_EVENTID: | |
| 4843 | ath10k_wmi_event_phyerr(ar, skb); | |
| 4844 | break; | |
| 4845 | case WMI_ROAM_EVENTID: | |
| 4846 | ath10k_wmi_event_roam(ar, skb); | |
| 4847 | break; | |
| 4848 | case WMI_PROFILE_MATCH: | |
| 4849 | ath10k_wmi_event_profile_match(ar, skb); | |
| 4850 | break; | |
| 4851 | case WMI_DEBUG_PRINT_EVENTID: | |
| 4852 | ath10k_wmi_event_debug_print(ar, skb); | |
| 4853 | break; | |
| 4854 | case WMI_PDEV_QVIT_EVENTID: | |
| 4855 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
| 4856 | break; | |
| 4857 | case WMI_WLAN_PROFILE_DATA_EVENTID: | |
| 4858 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
| 4859 | break; | |
| 4860 | case WMI_RTT_MEASUREMENT_REPORT_EVENTID: | |
| 4861 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
| 4862 | break; | |
| 4863 | case WMI_TSF_MEASUREMENT_REPORT_EVENTID: | |
| 4864 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
| 4865 | break; | |
| 4866 | case WMI_RTT_ERROR_REPORT_EVENTID: | |
| 4867 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
| 4868 | break; | |
| 4869 | case WMI_WOW_WAKEUP_HOST_EVENTID: | |
| 4870 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
| 4871 | break; | |
| 4872 | case WMI_DCS_INTERFERENCE_EVENTID: | |
| 4873 | ath10k_wmi_event_dcs_interference(ar, skb); | |
| 4874 | break; | |
| 4875 | case WMI_PDEV_TPC_CONFIG_EVENTID: | |
| 4876 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
| 4877 | break; | |
| 4878 | case WMI_PDEV_FTM_INTG_EVENTID: | |
| 4879 | ath10k_wmi_event_pdev_ftm_intg(ar, skb); | |
| 4880 | break; | |
| 4881 | case WMI_GTK_OFFLOAD_STATUS_EVENTID: | |
| 4882 | ath10k_wmi_event_gtk_offload_status(ar, skb); | |
| 4883 | break; | |
| 4884 | case WMI_GTK_REKEY_FAIL_EVENTID: | |
| 4885 | ath10k_wmi_event_gtk_rekey_fail(ar, skb); | |
| 4886 | break; | |
| 4887 | case WMI_TX_DELBA_COMPLETE_EVENTID: | |
| 4888 | ath10k_wmi_event_delba_complete(ar, skb); | |
| 4889 | break; | |
| 4890 | case WMI_TX_ADDBA_COMPLETE_EVENTID: | |
| 4891 | ath10k_wmi_event_addba_complete(ar, skb); | |
| 4892 | break; | |
| 4893 | case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: | |
| 4894 | ath10k_wmi_event_vdev_install_key_complete(ar, skb); | |
| 4895 | break; | |
| 4896 | case WMI_SERVICE_READY_EVENTID: | |
| b34d2b3d | 4897 | ath10k_wmi_event_service_ready(ar, skb); |
| c8ecfc1c | 4898 | return; |
| 5e3dd157 | 4899 | case WMI_READY_EVENTID: |
| b34d2b3d | 4900 | ath10k_wmi_event_ready(ar, skb); |
| 5e3dd157 KV |
4901 | break; |
| 4902 | default: | |
| 7aa7a72a | 4903 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
| 5e3dd157 KV |
4904 | break; |
| 4905 | } | |
| 4906 | ||
| 469d479f | 4907 | out: |
| 5e3dd157 KV |
4908 | dev_kfree_skb(skb); |
| 4909 | } | |
| 4910 | ||
| d7579d12 | 4911 | static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb) |
| 8a6618b0 BM |
4912 | { |
| 4913 | struct wmi_cmd_hdr *cmd_hdr; | |
| 4914 | enum wmi_10x_event_id id; | |
| 43d2a30f | 4915 | bool consumed; |
| 8a6618b0 BM |
4916 | |
| 4917 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
| 4918 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
| 4919 | ||
| 4920 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
| 469d479f | 4921 | goto out; |
| 8a6618b0 | 4922 | |
| d35a6c18 | 4923 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
| 8a6618b0 | 4924 | |
| 43d2a30f KV |
4925 | consumed = ath10k_tm_event_wmi(ar, id, skb); |
| 4926 | ||
| 4927 | /* Ready event must be handled normally also in UTF mode so that we | |
| 4928 | * know the UTF firmware has booted, others we are just bypass WMI | |
| 4929 | * events to testmode. | |
| 4930 | */ | |
| 4931 | if (consumed && id != WMI_10X_READY_EVENTID) { | |
| 4932 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 4933 | "wmi testmode consumed 0x%x\n", id); | |
| 4934 | goto out; | |
| 4935 | } | |
| 4936 | ||
| 8a6618b0 BM |
4937 | switch (id) { |
| 4938 | case WMI_10X_MGMT_RX_EVENTID: | |
| 4939 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
| 4940 | /* mgmt_rx() owns the skb now! */ | |
| 4941 | return; | |
| 4942 | case WMI_10X_SCAN_EVENTID: | |
| 4943 | ath10k_wmi_event_scan(ar, skb); | |
| 4944 | break; | |
| 4945 | case WMI_10X_CHAN_INFO_EVENTID: | |
| 4946 | ath10k_wmi_event_chan_info(ar, skb); | |
| 4947 | break; | |
| 4948 | case WMI_10X_ECHO_EVENTID: | |
| 4949 | ath10k_wmi_event_echo(ar, skb); | |
| 4950 | break; | |
| 4951 | case WMI_10X_DEBUG_MESG_EVENTID: | |
| 4952 | ath10k_wmi_event_debug_mesg(ar, skb); | |
| 4953 | break; | |
| 4954 | case WMI_10X_UPDATE_STATS_EVENTID: | |
| 4955 | ath10k_wmi_event_update_stats(ar, skb); | |
| 4956 | break; | |
| 4957 | case WMI_10X_VDEV_START_RESP_EVENTID: | |
| 4958 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
| 4959 | break; | |
| 4960 | case WMI_10X_VDEV_STOPPED_EVENTID: | |
| 4961 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
| 4962 | break; | |
| 4963 | case WMI_10X_PEER_STA_KICKOUT_EVENTID: | |
| 4964 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
| 4965 | break; | |
| 4966 | case WMI_10X_HOST_SWBA_EVENTID: | |
| 4967 | ath10k_wmi_event_host_swba(ar, skb); | |
| 4968 | break; | |
| 4969 | case WMI_10X_TBTTOFFSET_UPDATE_EVENTID: | |
| 4970 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
| 4971 | break; | |
| 4972 | case WMI_10X_PHYERR_EVENTID: | |
| 4973 | ath10k_wmi_event_phyerr(ar, skb); | |
| 4974 | break; | |
| 4975 | case WMI_10X_ROAM_EVENTID: | |
| 4976 | ath10k_wmi_event_roam(ar, skb); | |
| 4977 | break; | |
| 4978 | case WMI_10X_PROFILE_MATCH: | |
| 4979 | ath10k_wmi_event_profile_match(ar, skb); | |
| 4980 | break; | |
| 4981 | case WMI_10X_DEBUG_PRINT_EVENTID: | |
| 4982 | ath10k_wmi_event_debug_print(ar, skb); | |
| 4983 | break; | |
| 4984 | case WMI_10X_PDEV_QVIT_EVENTID: | |
| 4985 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
| 4986 | break; | |
| 4987 | case WMI_10X_WLAN_PROFILE_DATA_EVENTID: | |
| 4988 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
| 4989 | break; | |
| 4990 | case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID: | |
| 4991 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
| 4992 | break; | |
| 4993 | case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID: | |
| 4994 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
| 4995 | break; | |
| 4996 | case WMI_10X_RTT_ERROR_REPORT_EVENTID: | |
| 4997 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
| 4998 | break; | |
| 4999 | case WMI_10X_WOW_WAKEUP_HOST_EVENTID: | |
| 5000 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
| 5001 | break; | |
| 5002 | case WMI_10X_DCS_INTERFERENCE_EVENTID: | |
| 5003 | ath10k_wmi_event_dcs_interference(ar, skb); | |
| 5004 | break; | |
| 5005 | case WMI_10X_PDEV_TPC_CONFIG_EVENTID: | |
| 5006 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
| 5007 | break; | |
| 5008 | case WMI_10X_INST_RSSI_STATS_EVENTID: | |
| 5009 | ath10k_wmi_event_inst_rssi_stats(ar, skb); | |
| 5010 | break; | |
| 5011 | case WMI_10X_VDEV_STANDBY_REQ_EVENTID: | |
| 5012 | ath10k_wmi_event_vdev_standby_req(ar, skb); | |
| 5013 | break; | |
| 5014 | case WMI_10X_VDEV_RESUME_REQ_EVENTID: | |
| 5015 | ath10k_wmi_event_vdev_resume_req(ar, skb); | |
| 5016 | break; | |
| 5017 | case WMI_10X_SERVICE_READY_EVENTID: | |
| b34d2b3d | 5018 | ath10k_wmi_event_service_ready(ar, skb); |
| c8ecfc1c | 5019 | return; |
| 8a6618b0 | 5020 | case WMI_10X_READY_EVENTID: |
| b34d2b3d | 5021 | ath10k_wmi_event_ready(ar, skb); |
| 8a6618b0 | 5022 | break; |
| 43d2a30f KV |
5023 | case WMI_10X_PDEV_UTF_EVENTID: |
| 5024 | /* ignore utf events */ | |
| 5025 | break; | |
| 8a6618b0 | 5026 | default: |
| 7aa7a72a | 5027 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
| 8a6618b0 BM |
5028 | break; |
| 5029 | } | |
| 5030 | ||
| 43d2a30f | 5031 | out: |
| 8a6618b0 BM |
5032 | dev_kfree_skb(skb); |
| 5033 | } | |
| 5034 | ||
| d7579d12 | 5035 | static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb) |
| 24c88f78 MK |
5036 | { |
| 5037 | struct wmi_cmd_hdr *cmd_hdr; | |
| 5038 | enum wmi_10_2_event_id id; | |
| 5039 | ||
| 5040 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
| 5041 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
| 5042 | ||
| 5043 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
| 469d479f | 5044 | goto out; |
| 24c88f78 | 5045 | |
| d35a6c18 | 5046 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
| 24c88f78 MK |
5047 | |
| 5048 | switch (id) { | |
| 5049 | case WMI_10_2_MGMT_RX_EVENTID: | |
| 5050 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
| 5051 | /* mgmt_rx() owns the skb now! */ | |
| 5052 | return; | |
| 5053 | case WMI_10_2_SCAN_EVENTID: | |
| 5054 | ath10k_wmi_event_scan(ar, skb); | |
| 5055 | break; | |
| 5056 | case WMI_10_2_CHAN_INFO_EVENTID: | |
| 5057 | ath10k_wmi_event_chan_info(ar, skb); | |
| 5058 | break; | |
| 5059 | case WMI_10_2_ECHO_EVENTID: | |
| 5060 | ath10k_wmi_event_echo(ar, skb); | |
| 5061 | break; | |
| 5062 | case WMI_10_2_DEBUG_MESG_EVENTID: | |
| 5063 | ath10k_wmi_event_debug_mesg(ar, skb); | |
| 5064 | break; | |
| 5065 | case WMI_10_2_UPDATE_STATS_EVENTID: | |
| 5066 | ath10k_wmi_event_update_stats(ar, skb); | |
| 5067 | break; | |
| 5068 | case WMI_10_2_VDEV_START_RESP_EVENTID: | |
| 5069 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
| 5070 | break; | |
| 5071 | case WMI_10_2_VDEV_STOPPED_EVENTID: | |
| 5072 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
| 5073 | break; | |
| 5074 | case WMI_10_2_PEER_STA_KICKOUT_EVENTID: | |
| 5075 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
| 5076 | break; | |
| 5077 | case WMI_10_2_HOST_SWBA_EVENTID: | |
| 5078 | ath10k_wmi_event_host_swba(ar, skb); | |
| 5079 | break; | |
| 5080 | case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID: | |
| 5081 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
| 5082 | break; | |
| 5083 | case WMI_10_2_PHYERR_EVENTID: | |
| 5084 | ath10k_wmi_event_phyerr(ar, skb); | |
| 5085 | break; | |
| 5086 | case WMI_10_2_ROAM_EVENTID: | |
| 5087 | ath10k_wmi_event_roam(ar, skb); | |
| 5088 | break; | |
| 5089 | case WMI_10_2_PROFILE_MATCH: | |
| 5090 | ath10k_wmi_event_profile_match(ar, skb); | |
| 5091 | break; | |
| 5092 | case WMI_10_2_DEBUG_PRINT_EVENTID: | |
| 5093 | ath10k_wmi_event_debug_print(ar, skb); | |
| 5094 | break; | |
| 5095 | case WMI_10_2_PDEV_QVIT_EVENTID: | |
| 5096 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
| 5097 | break; | |
| 5098 | case WMI_10_2_WLAN_PROFILE_DATA_EVENTID: | |
| 5099 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
| 5100 | break; | |
| 5101 | case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID: | |
| 5102 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
| 5103 | break; | |
| 5104 | case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID: | |
| 5105 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
| 5106 | break; | |
| 5107 | case WMI_10_2_RTT_ERROR_REPORT_EVENTID: | |
| 5108 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
| 5109 | break; | |
| 5110 | case WMI_10_2_WOW_WAKEUP_HOST_EVENTID: | |
| 5111 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
| 5112 | break; | |
| 5113 | case WMI_10_2_DCS_INTERFERENCE_EVENTID: | |
| 5114 | ath10k_wmi_event_dcs_interference(ar, skb); | |
| 5115 | break; | |
| 5116 | case WMI_10_2_PDEV_TPC_CONFIG_EVENTID: | |
| 5117 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
| 5118 | break; | |
| 5119 | case WMI_10_2_INST_RSSI_STATS_EVENTID: | |
| 5120 | ath10k_wmi_event_inst_rssi_stats(ar, skb); | |
| 5121 | break; | |
| 5122 | case WMI_10_2_VDEV_STANDBY_REQ_EVENTID: | |
| 5123 | ath10k_wmi_event_vdev_standby_req(ar, skb); | |
| 5124 | break; | |
| 5125 | case WMI_10_2_VDEV_RESUME_REQ_EVENTID: | |
| 5126 | ath10k_wmi_event_vdev_resume_req(ar, skb); | |
| 5127 | break; | |
| 5128 | case WMI_10_2_SERVICE_READY_EVENTID: | |
| b34d2b3d | 5129 | ath10k_wmi_event_service_ready(ar, skb); |
| c8ecfc1c | 5130 | return; |
| 24c88f78 | 5131 | case WMI_10_2_READY_EVENTID: |
| b34d2b3d | 5132 | ath10k_wmi_event_ready(ar, skb); |
| 24c88f78 | 5133 | break; |
| a57a6a27 RM |
5134 | case WMI_10_2_PDEV_TEMPERATURE_EVENTID: |
| 5135 | ath10k_wmi_event_temperature(ar, skb); | |
| 5136 | break; | |
| 24c88f78 MK |
5137 | case WMI_10_2_RTT_KEEPALIVE_EVENTID: |
| 5138 | case WMI_10_2_GPIO_INPUT_EVENTID: | |
| 5139 | case WMI_10_2_PEER_RATECODE_LIST_EVENTID: | |
| 5140 | case WMI_10_2_GENERIC_BUFFER_EVENTID: | |
| 5141 | case WMI_10_2_MCAST_BUF_RELEASE_EVENTID: | |
| 5142 | case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID: | |
| 5143 | case WMI_10_2_WDS_PEER_EVENTID: | |
| 7aa7a72a | 5144 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 24c88f78 MK |
5145 | "received event id %d not implemented\n", id); |
| 5146 | break; | |
| 5147 | default: | |
| 7aa7a72a | 5148 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
| 24c88f78 MK |
5149 | break; |
| 5150 | } | |
| 5151 | ||
| 469d479f | 5152 | out: |
| 24c88f78 MK |
5153 | dev_kfree_skb(skb); |
| 5154 | } | |
| 8a6618b0 | 5155 | |
| 1c092961 RM |
5156 | static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb) |
| 5157 | { | |
| 5158 | struct wmi_cmd_hdr *cmd_hdr; | |
| 5159 | enum wmi_10_4_event_id id; | |
| 5160 | ||
| 5161 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
| 5162 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
| 5163 | ||
| 5164 | if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) | |
| 5165 | goto out; | |
| 5166 | ||
| 5167 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); | |
| 5168 | ||
| 5169 | switch (id) { | |
| 5170 | case WMI_10_4_MGMT_RX_EVENTID: | |
| 5171 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
| 5172 | /* mgmt_rx() owns the skb now! */ | |
| 5173 | return; | |
| 373b48cf RM |
5174 | case WMI_10_4_ECHO_EVENTID: |
| 5175 | ath10k_wmi_event_echo(ar, skb); | |
| 5176 | break; | |
| 5177 | case WMI_10_4_DEBUG_MESG_EVENTID: | |
| 5178 | ath10k_wmi_event_debug_mesg(ar, skb); | |
| 5179 | break; | |
| 5180 | case WMI_10_4_SERVICE_READY_EVENTID: | |
| 5181 | ath10k_wmi_event_service_ready(ar, skb); | |
| c8ecfc1c | 5182 | return; |
| b2297baa RM |
5183 | case WMI_10_4_SCAN_EVENTID: |
| 5184 | ath10k_wmi_event_scan(ar, skb); | |
| 5185 | break; | |
| 5186 | case WMI_10_4_CHAN_INFO_EVENTID: | |
| 5187 | ath10k_wmi_event_chan_info(ar, skb); | |
| 5188 | break; | |
| 2b0a2e0d RM |
5189 | case WMI_10_4_PHYERR_EVENTID: |
| 5190 | ath10k_wmi_event_phyerr(ar, skb); | |
| 5191 | break; | |
| d02e752f RM |
5192 | case WMI_10_4_READY_EVENTID: |
| 5193 | ath10k_wmi_event_ready(ar, skb); | |
| 5194 | break; | |
| 373b48cf RM |
5195 | case WMI_10_4_PEER_STA_KICKOUT_EVENTID: |
| 5196 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
| 5197 | break; | |
| 3cec3be3 RM |
5198 | case WMI_10_4_HOST_SWBA_EVENTID: |
| 5199 | ath10k_wmi_event_host_swba(ar, skb); | |
| 5200 | break; | |
| 373b48cf RM |
5201 | case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID: |
| 5202 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
| 5203 | break; | |
| 5204 | case WMI_10_4_DEBUG_PRINT_EVENTID: | |
| 5205 | ath10k_wmi_event_debug_print(ar, skb); | |
| 5206 | break; | |
| 5207 | case WMI_10_4_VDEV_START_RESP_EVENTID: | |
| 5208 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
| 5209 | break; | |
| 5210 | case WMI_10_4_VDEV_STOPPED_EVENTID: | |
| 5211 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
| 5212 | break; | |
| 5213 | case WMI_10_4_WOW_WAKEUP_HOST_EVENTID: | |
| 5214 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 5215 | "received event id %d not implemented\n", id); | |
| 5216 | break; | |
| 98dd2b92 MP |
5217 | case WMI_10_4_UPDATE_STATS_EVENTID: |
| 5218 | ath10k_wmi_event_update_stats(ar, skb); | |
| 5219 | break; | |
| 6dd46348 T |
5220 | case WMI_10_4_PDEV_TEMPERATURE_EVENTID: |
| 5221 | ath10k_wmi_event_temperature(ar, skb); | |
| 5222 | break; | |
| 1c092961 RM |
5223 | default: |
| 5224 | ath10k_warn(ar, "Unknown eventid: %d\n", id); | |
| 5225 | break; | |
| 5226 | } | |
| 5227 | ||
| 5228 | out: | |
| 5229 | dev_kfree_skb(skb); | |
| 5230 | } | |
| 5231 | ||
| ce42870e BM |
5232 | static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb) |
| 5233 | { | |
| d7579d12 MK |
5234 | int ret; |
| 5235 | ||
| 5236 | ret = ath10k_wmi_rx(ar, skb); | |
| 5237 | if (ret) | |
| 5238 | ath10k_warn(ar, "failed to process wmi rx: %d\n", ret); | |
| ce42870e BM |
5239 | } |
| 5240 | ||
| 95bf21f9 | 5241 | int ath10k_wmi_connect(struct ath10k *ar) |
| 5e3dd157 KV |
5242 | { |
| 5243 | int status; | |
| 5244 | struct ath10k_htc_svc_conn_req conn_req; | |
| 5245 | struct ath10k_htc_svc_conn_resp conn_resp; | |
| 5246 | ||
| 5247 | memset(&conn_req, 0, sizeof(conn_req)); | |
| 5248 | memset(&conn_resp, 0, sizeof(conn_resp)); | |
| 5249 | ||
| 5250 | /* these fields are the same for all service endpoints */ | |
| 5251 | conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete; | |
| 5252 | conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx; | |
| be8b3943 | 5253 | conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits; |
| 5e3dd157 KV |
5254 | |
| 5255 | /* connect to control service */ | |
| 5256 | conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL; | |
| 5257 | ||
| cd003fad | 5258 | status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp); |
| 5e3dd157 | 5259 | if (status) { |
| 7aa7a72a | 5260 | ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n", |
| 5e3dd157 KV |
5261 | status); |
| 5262 | return status; | |
| 5263 | } | |
| 5264 | ||
| 5265 | ar->wmi.eid = conn_resp.eid; | |
| 5266 | return 0; | |
| 5267 | } | |
| 5268 | ||
| d7579d12 MK |
5269 | static struct sk_buff * |
| 5270 | ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g, | |
| 5271 | u16 ctl2g, u16 ctl5g, | |
| 5272 | enum wmi_dfs_region dfs_reg) | |
| 5e3dd157 KV |
5273 | { |
| 5274 | struct wmi_pdev_set_regdomain_cmd *cmd; | |
| 5275 | struct sk_buff *skb; | |
| 5276 | ||
| 7aa7a72a | 5277 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5278 | if (!skb) |
| d7579d12 | 5279 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5280 | |
| 5281 | cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; | |
| 5282 | cmd->reg_domain = __cpu_to_le32(rd); | |
| 5283 | cmd->reg_domain_2G = __cpu_to_le32(rd2g); | |
| 5284 | cmd->reg_domain_5G = __cpu_to_le32(rd5g); | |
| 5285 | cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); | |
| 5286 | cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); | |
| 5287 | ||
| 7aa7a72a | 5288 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
5289 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n", |
| 5290 | rd, rd2g, rd5g, ctl2g, ctl5g); | |
| d7579d12 | 5291 | return skb; |
| 5e3dd157 KV |
5292 | } |
| 5293 | ||
| d7579d12 MK |
5294 | static struct sk_buff * |
| 5295 | ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 | |
| 5296 | rd5g, u16 ctl2g, u16 ctl5g, | |
| 5297 | enum wmi_dfs_region dfs_reg) | |
| 821af6ae MP |
5298 | { |
| 5299 | struct wmi_pdev_set_regdomain_cmd_10x *cmd; | |
| 5300 | struct sk_buff *skb; | |
| 5301 | ||
| 7aa7a72a | 5302 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 821af6ae | 5303 | if (!skb) |
| d7579d12 | 5304 | return ERR_PTR(-ENOMEM); |
| 821af6ae MP |
5305 | |
| 5306 | cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data; | |
| 5307 | cmd->reg_domain = __cpu_to_le32(rd); | |
| 5308 | cmd->reg_domain_2G = __cpu_to_le32(rd2g); | |
| 5309 | cmd->reg_domain_5G = __cpu_to_le32(rd5g); | |
| 5310 | cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); | |
| 5311 | cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); | |
| 5312 | cmd->dfs_domain = __cpu_to_le32(dfs_reg); | |
| 5313 | ||
| 7aa7a72a | 5314 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 821af6ae MP |
5315 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n", |
| 5316 | rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg); | |
| d7579d12 | 5317 | return skb; |
| 821af6ae MP |
5318 | } |
| 5319 | ||
| d7579d12 MK |
5320 | static struct sk_buff * |
| 5321 | ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt) | |
| 5e3dd157 KV |
5322 | { |
| 5323 | struct wmi_pdev_suspend_cmd *cmd; | |
| 5324 | struct sk_buff *skb; | |
| 5325 | ||
| 7aa7a72a | 5326 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5327 | if (!skb) |
| d7579d12 | 5328 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5329 | |
| 5330 | cmd = (struct wmi_pdev_suspend_cmd *)skb->data; | |
| 00f5482b | 5331 | cmd->suspend_opt = __cpu_to_le32(suspend_opt); |
| 5e3dd157 | 5332 | |
| d7579d12 | 5333 | return skb; |
| 5e3dd157 KV |
5334 | } |
| 5335 | ||
| d7579d12 MK |
5336 | static struct sk_buff * |
| 5337 | ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar) | |
| 5e3dd157 KV |
5338 | { |
| 5339 | struct sk_buff *skb; | |
| 5340 | ||
| 7aa7a72a | 5341 | skb = ath10k_wmi_alloc_skb(ar, 0); |
| d7579d12 MK |
5342 | if (!skb) |
| 5343 | return ERR_PTR(-ENOMEM); | |
| 5e3dd157 | 5344 | |
| d7579d12 | 5345 | return skb; |
| 5e3dd157 KV |
5346 | } |
| 5347 | ||
| d7579d12 MK |
5348 | static struct sk_buff * |
| 5349 | ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value) | |
| 5e3dd157 KV |
5350 | { |
| 5351 | struct wmi_pdev_set_param_cmd *cmd; | |
| 5352 | struct sk_buff *skb; | |
| 5353 | ||
| 226a339b | 5354 | if (id == WMI_PDEV_PARAM_UNSUPPORTED) { |
| 7aa7a72a MK |
5355 | ath10k_warn(ar, "pdev param %d not supported by firmware\n", |
| 5356 | id); | |
| d7579d12 | 5357 | return ERR_PTR(-EOPNOTSUPP); |
| 226a339b BM |
5358 | } |
| 5359 | ||
| 7aa7a72a | 5360 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5361 | if (!skb) |
| d7579d12 | 5362 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5363 | |
| 5364 | cmd = (struct wmi_pdev_set_param_cmd *)skb->data; | |
| 5365 | cmd->param_id = __cpu_to_le32(id); | |
| 5366 | cmd->param_value = __cpu_to_le32(value); | |
| 5367 | ||
| 7aa7a72a | 5368 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n", |
| 5e3dd157 | 5369 | id, value); |
| d7579d12 | 5370 | return skb; |
| 5e3dd157 KV |
5371 | } |
| 5372 | ||
| 0226d602 MK |
5373 | void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, |
| 5374 | struct wmi_host_mem_chunks *chunks) | |
| cf9fca8f MK |
5375 | { |
| 5376 | struct host_memory_chunk *chunk; | |
| 5377 | int i; | |
| 5378 | ||
| 5379 | chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks); | |
| 5380 | ||
| 5381 | for (i = 0; i < ar->wmi.num_mem_chunks; i++) { | |
| 5382 | chunk = &chunks->items[i]; | |
| 5383 | chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr); | |
| 5384 | chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len); | |
| 5385 | chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id); | |
| 5386 | ||
| 5387 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 5388 | "wmi chunk %d len %d requested, addr 0x%llx\n", | |
| 5389 | i, | |
| 5390 | ar->wmi.mem_chunks[i].len, | |
| 5391 | (unsigned long long)ar->wmi.mem_chunks[i].paddr); | |
| 5392 | } | |
| 5393 | } | |
| 5394 | ||
| d7579d12 | 5395 | static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar) |
| 5e3dd157 KV |
5396 | { |
| 5397 | struct wmi_init_cmd *cmd; | |
| 5398 | struct sk_buff *buf; | |
| 5399 | struct wmi_resource_config config = {}; | |
| b3effe61 | 5400 | u32 len, val; |
| 5e3dd157 KV |
5401 | |
| 5402 | config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS); | |
| cfd1061e | 5403 | config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS); |
| 5e3dd157 KV |
5404 | config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS); |
| 5405 | ||
| 5406 | config.num_offload_reorder_bufs = | |
| 5407 | __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS); | |
| 5408 | ||
| 5409 | config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS); | |
| 5410 | config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS); | |
| 5411 | config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT); | |
| 5412 | config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK); | |
| 5413 | config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK); | |
| 5414 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
| 5415 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
| 5416 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
| 5417 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI); | |
| ccec9038 | 5418 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
| 5e3dd157 KV |
5419 | config.scan_max_pending_reqs = |
| 5420 | __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS); | |
| 5421 | ||
| 5422 | config.bmiss_offload_max_vdev = | |
| 5423 | __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV); | |
| 5424 | ||
| 5425 | config.roam_offload_max_vdev = | |
| 5426 | __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV); | |
| 5427 | ||
| 5428 | config.roam_offload_max_ap_profiles = | |
| 5429 | __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES); | |
| 5430 | ||
| 5431 | config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS); | |
| 5432 | config.num_mcast_table_elems = | |
| 5433 | __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS); | |
| 5434 | ||
| 5435 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE); | |
| 5436 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE); | |
| 5437 | config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES); | |
| 5438 | config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE); | |
| 5439 | config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM); | |
| 5440 | ||
| 5441 | val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; | |
| 5442 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); | |
| 5443 | ||
| 5444 | config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG); | |
| 5445 | ||
| 5446 | config.gtk_offload_max_vdev = | |
| 5447 | __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV); | |
| 5448 | ||
| 5449 | config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC); | |
| 5450 | config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES); | |
| 5451 | ||
| b3effe61 BM |
5452 | len = sizeof(*cmd) + |
| 5453 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
| 5454 | ||
| 7aa7a72a | 5455 | buf = ath10k_wmi_alloc_skb(ar, len); |
| 5e3dd157 | 5456 | if (!buf) |
| d7579d12 | 5457 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5458 | |
| 5459 | cmd = (struct wmi_init_cmd *)buf->data; | |
| b3effe61 | 5460 | |
| 5e3dd157 | 5461 | memcpy(&cmd->resource_config, &config, sizeof(config)); |
| cf9fca8f | 5462 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
| 5e3dd157 | 5463 | |
| 7aa7a72a | 5464 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n"); |
| d7579d12 | 5465 | return buf; |
| 5e3dd157 KV |
5466 | } |
| 5467 | ||
| d7579d12 | 5468 | static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar) |
| 12b2b9e3 BM |
5469 | { |
| 5470 | struct wmi_init_cmd_10x *cmd; | |
| 5471 | struct sk_buff *buf; | |
| 5472 | struct wmi_resource_config_10x config = {}; | |
| 5473 | u32 len, val; | |
| 12b2b9e3 | 5474 | |
| ec6a73f0 BM |
5475 | config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); |
| 5476 | config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); | |
| 5477 | config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); | |
| 5478 | config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); | |
| 5479 | config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); | |
| 5480 | config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); | |
| 5481 | config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); | |
| 5482 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5483 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5484 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5485 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); | |
| ccec9038 | 5486 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
| 12b2b9e3 | 5487 | config.scan_max_pending_reqs = |
| ec6a73f0 | 5488 | __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); |
| 12b2b9e3 BM |
5489 | |
| 5490 | config.bmiss_offload_max_vdev = | |
| ec6a73f0 | 5491 | __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); |
| 12b2b9e3 BM |
5492 | |
| 5493 | config.roam_offload_max_vdev = | |
| ec6a73f0 | 5494 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); |
| 12b2b9e3 BM |
5495 | |
| 5496 | config.roam_offload_max_ap_profiles = | |
| ec6a73f0 | 5497 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); |
| 12b2b9e3 | 5498 | |
| ec6a73f0 | 5499 | config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); |
| 12b2b9e3 | 5500 | config.num_mcast_table_elems = |
| ec6a73f0 | 5501 | __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); |
| 12b2b9e3 | 5502 | |
| ec6a73f0 BM |
5503 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); |
| 5504 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); | |
| 5505 | config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); | |
| 5506 | config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE); | |
| 5507 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); | |
| 12b2b9e3 | 5508 | |
| ec6a73f0 | 5509 | val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; |
| 12b2b9e3 BM |
5510 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); |
| 5511 | ||
| ec6a73f0 | 5512 | config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); |
| 12b2b9e3 | 5513 | |
| ec6a73f0 BM |
5514 | config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); |
| 5515 | config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); | |
| 12b2b9e3 BM |
5516 | |
| 5517 | len = sizeof(*cmd) + | |
| 5518 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
| 5519 | ||
| 7aa7a72a | 5520 | buf = ath10k_wmi_alloc_skb(ar, len); |
| 12b2b9e3 | 5521 | if (!buf) |
| d7579d12 | 5522 | return ERR_PTR(-ENOMEM); |
| 12b2b9e3 BM |
5523 | |
| 5524 | cmd = (struct wmi_init_cmd_10x *)buf->data; | |
| 5525 | ||
| 12b2b9e3 | 5526 | memcpy(&cmd->resource_config, &config, sizeof(config)); |
| cf9fca8f | 5527 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
| 12b2b9e3 | 5528 | |
| 7aa7a72a | 5529 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n"); |
| d7579d12 | 5530 | return buf; |
| 12b2b9e3 BM |
5531 | } |
| 5532 | ||
| d7579d12 | 5533 | static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar) |
| 24c88f78 MK |
5534 | { |
| 5535 | struct wmi_init_cmd_10_2 *cmd; | |
| 5536 | struct sk_buff *buf; | |
| 5537 | struct wmi_resource_config_10x config = {}; | |
| b6c8e287 | 5538 | u32 len, val, features; |
| 24c88f78 MK |
5539 | |
| 5540 | config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); | |
| 24c88f78 | 5541 | config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); |
| cc61a1bb MSS |
5542 | |
| 5543 | if (ath10k_peer_stats_enabled(ar)) { | |
| af9a6a3a AK |
5544 | config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS); |
| 5545 | config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS); | |
| 5546 | } else { | |
| 5547 | config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); | |
| 5548 | config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); | |
| 5549 | } | |
| 5550 | ||
| 24c88f78 MK |
5551 | config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); |
| 5552 | config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); | |
| 5553 | config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); | |
| 5554 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5555 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5556 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5557 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); | |
| ccec9038 | 5558 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
| 24c88f78 MK |
5559 | |
| 5560 | config.scan_max_pending_reqs = | |
| 5561 | __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); | |
| 5562 | ||
| 5563 | config.bmiss_offload_max_vdev = | |
| 5564 | __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); | |
| 5565 | ||
| 5566 | config.roam_offload_max_vdev = | |
| 5567 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); | |
| 5568 | ||
| 5569 | config.roam_offload_max_ap_profiles = | |
| 5570 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); | |
| 5571 | ||
| 5572 | config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); | |
| 5573 | config.num_mcast_table_elems = | |
| 5574 | __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); | |
| 5575 | ||
| 5576 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); | |
| 5577 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); | |
| 5578 | config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); | |
| f6603ff2 | 5579 | config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE); |
| 24c88f78 MK |
5580 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); |
| 5581 | ||
| 5582 | val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; | |
| 5583 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); | |
| 5584 | ||
| 5585 | config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); | |
| 5586 | ||
| 5587 | config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); | |
| 5588 | config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); | |
| 5589 | ||
| 5590 | len = sizeof(*cmd) + | |
| 5591 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
| 5592 | ||
| 7aa7a72a | 5593 | buf = ath10k_wmi_alloc_skb(ar, len); |
| 24c88f78 | 5594 | if (!buf) |
| d7579d12 | 5595 | return ERR_PTR(-ENOMEM); |
| 24c88f78 MK |
5596 | |
| 5597 | cmd = (struct wmi_init_cmd_10_2 *)buf->data; | |
| 5598 | ||
| b6c8e287 | 5599 | features = WMI_10_2_RX_BATCH_MODE; |
| 844fa572 YL |
5600 | |
| 5601 | if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) && | |
| 5602 | test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map)) | |
| de0c789b | 5603 | features |= WMI_10_2_COEX_GPIO; |
| 844fa572 | 5604 | |
| cc61a1bb | 5605 | if (ath10k_peer_stats_enabled(ar)) |
| de46c015 MSS |
5606 | features |= WMI_10_2_PEER_STATS; |
| 5607 | ||
| b6c8e287 SM |
5608 | cmd->resource_config.feature_mask = __cpu_to_le32(features); |
| 5609 | ||
| 24c88f78 | 5610 | memcpy(&cmd->resource_config.common, &config, sizeof(config)); |
| cf9fca8f | 5611 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
| 24c88f78 | 5612 | |
| 7aa7a72a | 5613 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n"); |
| d7579d12 | 5614 | return buf; |
| 5e3dd157 KV |
5615 | } |
| 5616 | ||
| d1e52a8e RM |
5617 | static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar) |
| 5618 | { | |
| 5619 | struct wmi_init_cmd_10_4 *cmd; | |
| 5620 | struct sk_buff *buf; | |
| 5621 | struct wmi_resource_config_10_4 config = {}; | |
| 5622 | u32 len; | |
| 5623 | ||
| 5624 | config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs); | |
| 5625 | config.num_peers = __cpu_to_le32(ar->max_num_peers); | |
| 5626 | config.num_active_peers = __cpu_to_le32(ar->num_active_peers); | |
| 5627 | config.num_tids = __cpu_to_le32(ar->num_tids); | |
| 5628 | ||
| 5629 | config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS); | |
| 5630 | config.num_offload_reorder_buffs = | |
| 5631 | __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS); | |
| 5632 | config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS); | |
| 5633 | config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT); | |
| 5699a6f2 RM |
5634 | config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask); |
| 5635 | config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask); | |
| d1e52a8e RM |
5636 | |
| 5637 | config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
| 5638 | config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
| 5639 | config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
| 5640 | config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI); | |
| 5641 | ||
| bc27e8cd | 5642 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
| d1e52a8e RM |
5643 | config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS); |
| 5644 | config.bmiss_offload_max_vdev = | |
| 5645 | __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV); | |
| 5646 | config.roam_offload_max_vdev = | |
| 5647 | __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV); | |
| 5648 | config.roam_offload_max_ap_profiles = | |
| 5649 | __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES); | |
| 5650 | config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS); | |
| 5651 | config.num_mcast_table_elems = | |
| 5652 | __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS); | |
| 5653 | ||
| 5654 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE); | |
| 5655 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE); | |
| 5656 | config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES); | |
| 5657 | config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE); | |
| 5658 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM); | |
| 5659 | ||
| 5660 | config.rx_skip_defrag_timeout_dup_detection_check = | |
| 5661 | __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK); | |
| 5662 | ||
| 5663 | config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG); | |
| 5664 | config.gtk_offload_max_vdev = | |
| 5665 | __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV); | |
| 5699a6f2 | 5666 | config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx); |
| d1e52a8e RM |
5667 | config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS); |
| 5668 | config.max_peer_ext_stats = | |
| 5669 | __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS); | |
| 5670 | config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP); | |
| 5671 | ||
| 5672 | config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE); | |
| 5673 | config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE); | |
| 5674 | config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE); | |
| 5675 | config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE); | |
| 5676 | ||
| 5677 | config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE); | |
| 5678 | config.tt_support = | |
| 5679 | __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG); | |
| 5680 | config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG); | |
| 5681 | config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG); | |
| 5682 | config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG); | |
| 5683 | ||
| 5684 | len = sizeof(*cmd) + | |
| 5685 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
| 5686 | ||
| 5687 | buf = ath10k_wmi_alloc_skb(ar, len); | |
| 5688 | if (!buf) | |
| 5689 | return ERR_PTR(-ENOMEM); | |
| 5690 | ||
| 5691 | cmd = (struct wmi_init_cmd_10_4 *)buf->data; | |
| 5692 | memcpy(&cmd->resource_config, &config, sizeof(config)); | |
| 5693 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); | |
| 5694 | ||
| 5695 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n"); | |
| 5696 | return buf; | |
| 5697 | } | |
| 5698 | ||
| 0226d602 | 5699 | int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg) |
| 5e3dd157 | 5700 | { |
| a6aa5da3 MK |
5701 | if (arg->ie_len && !arg->ie) |
| 5702 | return -EINVAL; | |
| 5703 | if (arg->n_channels && !arg->channels) | |
| 5704 | return -EINVAL; | |
| 5705 | if (arg->n_ssids && !arg->ssids) | |
| 5706 | return -EINVAL; | |
| 5707 | if (arg->n_bssids && !arg->bssids) | |
| 5708 | return -EINVAL; | |
| 5e3dd157 | 5709 | |
| a6aa5da3 MK |
5710 | if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN) |
| 5711 | return -EINVAL; | |
| 5712 | if (arg->n_channels > ARRAY_SIZE(arg->channels)) | |
| 5713 | return -EINVAL; | |
| 5714 | if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID) | |
| 5715 | return -EINVAL; | |
| 5716 | if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID) | |
| 5717 | return -EINVAL; | |
| 5e3dd157 | 5718 | |
| a6aa5da3 MK |
5719 | return 0; |
| 5720 | } | |
| 5e3dd157 | 5721 | |
| a6aa5da3 MK |
5722 | static size_t |
| 5723 | ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg) | |
| 5724 | { | |
| 5725 | int len = 0; | |
| 5726 | ||
| 5727 | if (arg->ie_len) { | |
| 5e3dd157 KV |
5728 | len += sizeof(struct wmi_ie_data); |
| 5729 | len += roundup(arg->ie_len, 4); | |
| 5730 | } | |
| 5731 | ||
| 5732 | if (arg->n_channels) { | |
| 5e3dd157 KV |
5733 | len += sizeof(struct wmi_chan_list); |
| 5734 | len += sizeof(__le32) * arg->n_channels; | |
| 5735 | } | |
| 5736 | ||
| 5737 | if (arg->n_ssids) { | |
| 5e3dd157 KV |
5738 | len += sizeof(struct wmi_ssid_list); |
| 5739 | len += sizeof(struct wmi_ssid) * arg->n_ssids; | |
| 5740 | } | |
| 5741 | ||
| 5742 | if (arg->n_bssids) { | |
| 5e3dd157 KV |
5743 | len += sizeof(struct wmi_bssid_list); |
| 5744 | len += sizeof(struct wmi_mac_addr) * arg->n_bssids; | |
| 5745 | } | |
| 5746 | ||
| 5747 | return len; | |
| 5748 | } | |
| 5749 | ||
| 0226d602 MK |
5750 | void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, |
| 5751 | const struct wmi_start_scan_arg *arg) | |
| 5e3dd157 | 5752 | { |
| 5e3dd157 KV |
5753 | u32 scan_id; |
| 5754 | u32 scan_req_id; | |
| 5e3dd157 KV |
5755 | |
| 5756 | scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX; | |
| 5757 | scan_id |= arg->scan_id; | |
| 5758 | ||
| 5759 | scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; | |
| 5760 | scan_req_id |= arg->scan_req_id; | |
| 5761 | ||
| a6aa5da3 MK |
5762 | cmn->scan_id = __cpu_to_le32(scan_id); |
| 5763 | cmn->scan_req_id = __cpu_to_le32(scan_req_id); | |
| 5764 | cmn->vdev_id = __cpu_to_le32(arg->vdev_id); | |
| 5765 | cmn->scan_priority = __cpu_to_le32(arg->scan_priority); | |
| 5766 | cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events); | |
| 5767 | cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active); | |
| 5768 | cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive); | |
| 5769 | cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time); | |
| 5770 | cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time); | |
| 5771 | cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time); | |
| 5772 | cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time); | |
| 5773 | cmn->idle_time = __cpu_to_le32(arg->idle_time); | |
| 5774 | cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time); | |
| 5775 | cmn->probe_delay = __cpu_to_le32(arg->probe_delay); | |
| 5776 | cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags); | |
| 5777 | } | |
| 5778 | ||
| 5779 | static void | |
| 5780 | ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs, | |
| 5781 | const struct wmi_start_scan_arg *arg) | |
| 5782 | { | |
| 5783 | struct wmi_ie_data *ie; | |
| 5784 | struct wmi_chan_list *channels; | |
| 5785 | struct wmi_ssid_list *ssids; | |
| 5786 | struct wmi_bssid_list *bssids; | |
| 5787 | void *ptr = tlvs->tlvs; | |
| 5788 | int i; | |
| 5e3dd157 KV |
5789 | |
| 5790 | if (arg->n_channels) { | |
| a6aa5da3 | 5791 | channels = ptr; |
| 5e3dd157 KV |
5792 | channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG); |
| 5793 | channels->num_chan = __cpu_to_le32(arg->n_channels); | |
| 5794 | ||
| 5795 | for (i = 0; i < arg->n_channels; i++) | |
| 24c88f78 MK |
5796 | channels->channel_list[i].freq = |
| 5797 | __cpu_to_le16(arg->channels[i]); | |
| 5e3dd157 | 5798 | |
| a6aa5da3 MK |
5799 | ptr += sizeof(*channels); |
| 5800 | ptr += sizeof(__le32) * arg->n_channels; | |
| 5e3dd157 KV |
5801 | } |
| 5802 | ||
| 5803 | if (arg->n_ssids) { | |
| a6aa5da3 | 5804 | ssids = ptr; |
| 5e3dd157 KV |
5805 | ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG); |
| 5806 | ssids->num_ssids = __cpu_to_le32(arg->n_ssids); | |
| 5807 | ||
| 5808 | for (i = 0; i < arg->n_ssids; i++) { | |
| 5809 | ssids->ssids[i].ssid_len = | |
| 5810 | __cpu_to_le32(arg->ssids[i].len); | |
| 5811 | memcpy(&ssids->ssids[i].ssid, | |
| 5812 | arg->ssids[i].ssid, | |
| 5813 | arg->ssids[i].len); | |
| 5814 | } | |
| 5815 | ||
| a6aa5da3 MK |
5816 | ptr += sizeof(*ssids); |
| 5817 | ptr += sizeof(struct wmi_ssid) * arg->n_ssids; | |
| 5e3dd157 KV |
5818 | } |
| 5819 | ||
| 5820 | if (arg->n_bssids) { | |
| a6aa5da3 | 5821 | bssids = ptr; |
| 5e3dd157 KV |
5822 | bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG); |
| 5823 | bssids->num_bssid = __cpu_to_le32(arg->n_bssids); | |
| 5824 | ||
| 5825 | for (i = 0; i < arg->n_bssids; i++) | |
| 5826 | memcpy(&bssids->bssid_list[i], | |
| 5827 | arg->bssids[i].bssid, | |
| 5828 | ETH_ALEN); | |
| 5829 | ||
| a6aa5da3 MK |
5830 | ptr += sizeof(*bssids); |
| 5831 | ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids; | |
| 5e3dd157 KV |
5832 | } |
| 5833 | ||
| 5834 | if (arg->ie_len) { | |
| a6aa5da3 | 5835 | ie = ptr; |
| 5e3dd157 KV |
5836 | ie->tag = __cpu_to_le32(WMI_IE_TAG); |
| 5837 | ie->ie_len = __cpu_to_le32(arg->ie_len); | |
| 5838 | memcpy(ie->ie_data, arg->ie, arg->ie_len); | |
| 5839 | ||
| a6aa5da3 MK |
5840 | ptr += sizeof(*ie); |
| 5841 | ptr += roundup(arg->ie_len, 4); | |
| 5e3dd157 | 5842 | } |
| a6aa5da3 | 5843 | } |
| 5e3dd157 | 5844 | |
| d7579d12 MK |
5845 | static struct sk_buff * |
| 5846 | ath10k_wmi_op_gen_start_scan(struct ath10k *ar, | |
| 5847 | const struct wmi_start_scan_arg *arg) | |
| a6aa5da3 | 5848 | { |
| d7579d12 | 5849 | struct wmi_start_scan_cmd *cmd; |
| a6aa5da3 MK |
5850 | struct sk_buff *skb; |
| 5851 | size_t len; | |
| 5852 | int ret; | |
| 5853 | ||
| 5854 | ret = ath10k_wmi_start_scan_verify(arg); | |
| 5855 | if (ret) | |
| d7579d12 | 5856 | return ERR_PTR(ret); |
| a6aa5da3 | 5857 | |
| d7579d12 | 5858 | len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); |
| a6aa5da3 MK |
5859 | skb = ath10k_wmi_alloc_skb(ar, len); |
| 5860 | if (!skb) | |
| d7579d12 | 5861 | return ERR_PTR(-ENOMEM); |
| a6aa5da3 | 5862 | |
| d7579d12 | 5863 | cmd = (struct wmi_start_scan_cmd *)skb->data; |
| a6aa5da3 | 5864 | |
| d7579d12 MK |
5865 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); |
| 5866 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | |
| a6aa5da3 | 5867 | |
| d7579d12 | 5868 | cmd->burst_duration_ms = __cpu_to_le32(0); |
| 5e3dd157 | 5869 | |
| 7aa7a72a | 5870 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n"); |
| d7579d12 MK |
5871 | return skb; |
| 5872 | } | |
| 5873 | ||
| 5874 | static struct sk_buff * | |
| 5875 | ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar, | |
| 5876 | const struct wmi_start_scan_arg *arg) | |
| 5877 | { | |
| 5878 | struct wmi_10x_start_scan_cmd *cmd; | |
| 5879 | struct sk_buff *skb; | |
| 5880 | size_t len; | |
| 5881 | int ret; | |
| 5882 | ||
| 5883 | ret = ath10k_wmi_start_scan_verify(arg); | |
| 5884 | if (ret) | |
| 5885 | return ERR_PTR(ret); | |
| 5886 | ||
| 5887 | len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); | |
| 5888 | skb = ath10k_wmi_alloc_skb(ar, len); | |
| 5889 | if (!skb) | |
| 5890 | return ERR_PTR(-ENOMEM); | |
| 5891 | ||
| 5892 | cmd = (struct wmi_10x_start_scan_cmd *)skb->data; | |
| 5893 | ||
| 5894 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); | |
| 5895 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | |
| 5896 | ||
| 5897 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n"); | |
| 5898 | return skb; | |
| 5e3dd157 KV |
5899 | } |
| 5900 | ||
| 5901 | void ath10k_wmi_start_scan_init(struct ath10k *ar, | |
| 5902 | struct wmi_start_scan_arg *arg) | |
| 5903 | { | |
| 5904 | /* setup commonly used values */ | |
| 5905 | arg->scan_req_id = 1; | |
| 5906 | arg->scan_priority = WMI_SCAN_PRIORITY_LOW; | |
| 5907 | arg->dwell_time_active = 50; | |
| 5908 | arg->dwell_time_passive = 150; | |
| 5909 | arg->min_rest_time = 50; | |
| 5910 | arg->max_rest_time = 500; | |
| 5911 | arg->repeat_probe_time = 0; | |
| 5912 | arg->probe_spacing_time = 0; | |
| 5913 | arg->idle_time = 0; | |
| c322892f | 5914 | arg->max_scan_time = 20000; |
| 5e3dd157 KV |
5915 | arg->probe_delay = 5; |
| 5916 | arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | |
| 5917 | | WMI_SCAN_EVENT_COMPLETED | |
| 5918 | | WMI_SCAN_EVENT_BSS_CHANNEL | |
| 5919 | | WMI_SCAN_EVENT_FOREIGN_CHANNEL | |
| 5920 | | WMI_SCAN_EVENT_DEQUEUED; | |
| 5e3dd157 KV |
5921 | arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT; |
| 5922 | arg->n_bssids = 1; | |
| 5923 | arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF"; | |
| 5924 | } | |
| 5925 | ||
| d7579d12 MK |
5926 | static struct sk_buff * |
| 5927 | ath10k_wmi_op_gen_stop_scan(struct ath10k *ar, | |
| 5928 | const struct wmi_stop_scan_arg *arg) | |
| 5e3dd157 KV |
5929 | { |
| 5930 | struct wmi_stop_scan_cmd *cmd; | |
| 5931 | struct sk_buff *skb; | |
| 5932 | u32 scan_id; | |
| 5933 | u32 req_id; | |
| 5934 | ||
| 5935 | if (arg->req_id > 0xFFF) | |
| d7579d12 | 5936 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 5937 | if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF) |
| d7579d12 | 5938 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 5939 | |
| 7aa7a72a | 5940 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5941 | if (!skb) |
| d7579d12 | 5942 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5943 | |
| 5944 | scan_id = arg->u.scan_id; | |
| 5945 | scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX; | |
| 5946 | ||
| 5947 | req_id = arg->req_id; | |
| 5948 | req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; | |
| 5949 | ||
| 5950 | cmd = (struct wmi_stop_scan_cmd *)skb->data; | |
| 5951 | cmd->req_type = __cpu_to_le32(arg->req_type); | |
| 5952 | cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id); | |
| 5953 | cmd->scan_id = __cpu_to_le32(scan_id); | |
| 5954 | cmd->scan_req_id = __cpu_to_le32(req_id); | |
| 5955 | ||
| 7aa7a72a | 5956 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
5957 | "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n", |
| 5958 | arg->req_id, arg->req_type, arg->u.scan_id); | |
| d7579d12 | 5959 | return skb; |
| 5e3dd157 KV |
5960 | } |
| 5961 | ||
| d7579d12 MK |
5962 | static struct sk_buff * |
| 5963 | ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id, | |
| 5964 | enum wmi_vdev_type type, | |
| 5965 | enum wmi_vdev_subtype subtype, | |
| 5966 | const u8 macaddr[ETH_ALEN]) | |
| 5e3dd157 KV |
5967 | { |
| 5968 | struct wmi_vdev_create_cmd *cmd; | |
| 5969 | struct sk_buff *skb; | |
| 5970 | ||
| 7aa7a72a | 5971 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5972 | if (!skb) |
| d7579d12 | 5973 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5974 | |
| 5975 | cmd = (struct wmi_vdev_create_cmd *)skb->data; | |
| 5976 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 5977 | cmd->vdev_type = __cpu_to_le32(type); | |
| 5978 | cmd->vdev_subtype = __cpu_to_le32(subtype); | |
| b25f32cb | 5979 | ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); |
| 5e3dd157 | 5980 | |
| 7aa7a72a | 5981 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
5982 | "WMI vdev create: id %d type %d subtype %d macaddr %pM\n", |
| 5983 | vdev_id, type, subtype, macaddr); | |
| d7579d12 | 5984 | return skb; |
| 5e3dd157 KV |
5985 | } |
| 5986 | ||
| d7579d12 MK |
5987 | static struct sk_buff * |
| 5988 | ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id) | |
| 5e3dd157 KV |
5989 | { |
| 5990 | struct wmi_vdev_delete_cmd *cmd; | |
| 5991 | struct sk_buff *skb; | |
| 5992 | ||
| 7aa7a72a | 5993 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5994 | if (!skb) |
| d7579d12 | 5995 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5996 | |
| 5997 | cmd = (struct wmi_vdev_delete_cmd *)skb->data; | |
| 5998 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 5999 | ||
| 7aa7a72a | 6000 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 | 6001 | "WMI vdev delete id %d\n", vdev_id); |
| d7579d12 | 6002 | return skb; |
| 5e3dd157 KV |
6003 | } |
| 6004 | ||
| d7579d12 MK |
6005 | static struct sk_buff * |
| 6006 | ath10k_wmi_op_gen_vdev_start(struct ath10k *ar, | |
| 6007 | const struct wmi_vdev_start_request_arg *arg, | |
| 6008 | bool restart) | |
| 5e3dd157 KV |
6009 | { |
| 6010 | struct wmi_vdev_start_request_cmd *cmd; | |
| 6011 | struct sk_buff *skb; | |
| 6012 | const char *cmdname; | |
| 6013 | u32 flags = 0; | |
| 6014 | ||
| 5e3dd157 | 6015 | if (WARN_ON(arg->hidden_ssid && !arg->ssid)) |
| d7579d12 | 6016 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 6017 | if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) |
| d7579d12 | 6018 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 6019 | |
| d7579d12 | 6020 | if (restart) |
| 5e3dd157 KV |
6021 | cmdname = "restart"; |
| 6022 | else | |
| d7579d12 | 6023 | cmdname = "start"; |
| 5e3dd157 | 6024 | |
| 7aa7a72a | 6025 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6026 | if (!skb) |
| d7579d12 | 6027 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6028 | |
| 6029 | if (arg->hidden_ssid) | |
| 6030 | flags |= WMI_VDEV_START_HIDDEN_SSID; | |
| 6031 | if (arg->pmf_enabled) | |
| 6032 | flags |= WMI_VDEV_START_PMF_ENABLED; | |
| 6033 | ||
| 6034 | cmd = (struct wmi_vdev_start_request_cmd *)skb->data; | |
| 6035 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
| 6036 | cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack); | |
| 6037 | cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval); | |
| 6038 | cmd->dtim_period = __cpu_to_le32(arg->dtim_period); | |
| 6039 | cmd->flags = __cpu_to_le32(flags); | |
| 6040 | cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate); | |
| 6041 | cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power); | |
| 6042 | ||
| 6043 | if (arg->ssid) { | |
| 6044 | cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len); | |
| 6045 | memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); | |
| 6046 | } | |
| 6047 | ||
| 2d66721c | 6048 | ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel); |
| 5e3dd157 | 6049 | |
| 7aa7a72a | 6050 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 8cc7f26c KV |
6051 | "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n", |
| 6052 | cmdname, arg->vdev_id, | |
| e8a50f8b MP |
6053 | flags, arg->channel.freq, arg->channel.mode, |
| 6054 | cmd->chan.flags, arg->channel.max_power); | |
| 5e3dd157 | 6055 | |
| d7579d12 | 6056 | return skb; |
| 5e3dd157 KV |
6057 | } |
| 6058 | ||
| d7579d12 MK |
6059 | static struct sk_buff * |
| 6060 | ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id) | |
| 5e3dd157 KV |
6061 | { |
| 6062 | struct wmi_vdev_stop_cmd *cmd; | |
| 6063 | struct sk_buff *skb; | |
| 6064 | ||
| 7aa7a72a | 6065 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6066 | if (!skb) |
| d7579d12 | 6067 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6068 | |
| 6069 | cmd = (struct wmi_vdev_stop_cmd *)skb->data; | |
| 6070 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6071 | ||
| 7aa7a72a | 6072 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id); |
| d7579d12 | 6073 | return skb; |
| 5e3dd157 KV |
6074 | } |
| 6075 | ||
| d7579d12 MK |
6076 | static struct sk_buff * |
| 6077 | ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, | |
| 6078 | const u8 *bssid) | |
| 5e3dd157 KV |
6079 | { |
| 6080 | struct wmi_vdev_up_cmd *cmd; | |
| 6081 | struct sk_buff *skb; | |
| 6082 | ||
| 7aa7a72a | 6083 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6084 | if (!skb) |
| d7579d12 | 6085 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6086 | |
| 6087 | cmd = (struct wmi_vdev_up_cmd *)skb->data; | |
| 6088 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6089 | cmd->vdev_assoc_id = __cpu_to_le32(aid); | |
| b25f32cb | 6090 | ether_addr_copy(cmd->vdev_bssid.addr, bssid); |
| 5e3dd157 | 6091 | |
| 7aa7a72a | 6092 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6093 | "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n", |
| 6094 | vdev_id, aid, bssid); | |
| d7579d12 | 6095 | return skb; |
| 5e3dd157 KV |
6096 | } |
| 6097 | ||
| d7579d12 MK |
6098 | static struct sk_buff * |
| 6099 | ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id) | |
| 5e3dd157 KV |
6100 | { |
| 6101 | struct wmi_vdev_down_cmd *cmd; | |
| 6102 | struct sk_buff *skb; | |
| 6103 | ||
| 7aa7a72a | 6104 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6105 | if (!skb) |
| d7579d12 | 6106 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6107 | |
| 6108 | cmd = (struct wmi_vdev_down_cmd *)skb->data; | |
| 6109 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6110 | ||
| 7aa7a72a | 6111 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 | 6112 | "wmi mgmt vdev down id 0x%x\n", vdev_id); |
| d7579d12 | 6113 | return skb; |
| 5e3dd157 KV |
6114 | } |
| 6115 | ||
| d7579d12 MK |
6116 | static struct sk_buff * |
| 6117 | ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id, | |
| 6118 | u32 param_id, u32 param_value) | |
| 5e3dd157 KV |
6119 | { |
| 6120 | struct wmi_vdev_set_param_cmd *cmd; | |
| 6121 | struct sk_buff *skb; | |
| 6122 | ||
| 6d1506e7 | 6123 | if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) { |
| 7aa7a72a | 6124 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 6d1506e7 BM |
6125 | "vdev param %d not supported by firmware\n", |
| 6126 | param_id); | |
| d7579d12 | 6127 | return ERR_PTR(-EOPNOTSUPP); |
| 6d1506e7 BM |
6128 | } |
| 6129 | ||
| 7aa7a72a | 6130 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6131 | if (!skb) |
| d7579d12 | 6132 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6133 | |
| 6134 | cmd = (struct wmi_vdev_set_param_cmd *)skb->data; | |
| 6135 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6136 | cmd->param_id = __cpu_to_le32(param_id); | |
| 6137 | cmd->param_value = __cpu_to_le32(param_value); | |
| 6138 | ||
| 7aa7a72a | 6139 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6140 | "wmi vdev id 0x%x set param %d value %d\n", |
| 6141 | vdev_id, param_id, param_value); | |
| d7579d12 | 6142 | return skb; |
| 5e3dd157 KV |
6143 | } |
| 6144 | ||
| d7579d12 MK |
6145 | static struct sk_buff * |
| 6146 | ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar, | |
| 6147 | const struct wmi_vdev_install_key_arg *arg) | |
| 5e3dd157 KV |
6148 | { |
| 6149 | struct wmi_vdev_install_key_cmd *cmd; | |
| 6150 | struct sk_buff *skb; | |
| 6151 | ||
| 6152 | if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL) | |
| d7579d12 | 6153 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 6154 | if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL) |
| d7579d12 | 6155 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 6156 | |
| 7aa7a72a | 6157 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len); |
| 5e3dd157 | 6158 | if (!skb) |
| d7579d12 | 6159 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6160 | |
| 6161 | cmd = (struct wmi_vdev_install_key_cmd *)skb->data; | |
| 6162 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
| 6163 | cmd->key_idx = __cpu_to_le32(arg->key_idx); | |
| 6164 | cmd->key_flags = __cpu_to_le32(arg->key_flags); | |
| 6165 | cmd->key_cipher = __cpu_to_le32(arg->key_cipher); | |
| 6166 | cmd->key_len = __cpu_to_le32(arg->key_len); | |
| 6167 | cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len); | |
| 6168 | cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len); | |
| 6169 | ||
| 6170 | if (arg->macaddr) | |
| b25f32cb | 6171 | ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); |
| 5e3dd157 KV |
6172 | if (arg->key_data) |
| 6173 | memcpy(cmd->key_data, arg->key_data, arg->key_len); | |
| 6174 | ||
| 7aa7a72a | 6175 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| e0c508ab MK |
6176 | "wmi vdev install key idx %d cipher %d len %d\n", |
| 6177 | arg->key_idx, arg->key_cipher, arg->key_len); | |
| d7579d12 | 6178 | return skb; |
| 5e3dd157 KV |
6179 | } |
| 6180 | ||
| d7579d12 MK |
6181 | static struct sk_buff * |
| 6182 | ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar, | |
| 6183 | const struct wmi_vdev_spectral_conf_arg *arg) | |
| 855aed12 SW |
6184 | { |
| 6185 | struct wmi_vdev_spectral_conf_cmd *cmd; | |
| 6186 | struct sk_buff *skb; | |
| 855aed12 | 6187 | |
| 7aa7a72a | 6188 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 855aed12 | 6189 | if (!skb) |
| d7579d12 | 6190 | return ERR_PTR(-ENOMEM); |
| 855aed12 SW |
6191 | |
| 6192 | cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data; | |
| 6193 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
| 6194 | cmd->scan_count = __cpu_to_le32(arg->scan_count); | |
| 6195 | cmd->scan_period = __cpu_to_le32(arg->scan_period); | |
| 6196 | cmd->scan_priority = __cpu_to_le32(arg->scan_priority); | |
| 6197 | cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size); | |
| 6198 | cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena); | |
| 6199 | cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena); | |
| 6200 | cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref); | |
| 6201 | cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay); | |
| 6202 | cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr); | |
| 6203 | cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr); | |
| 6204 | cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode); | |
| 6205 | cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode); | |
| 6206 | cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr); | |
| 6207 | cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format); | |
| 6208 | cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode); | |
| 6209 | cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale); | |
| 6210 | cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj); | |
| 6211 | cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask); | |
| 6212 | ||
| d7579d12 | 6213 | return skb; |
| 855aed12 SW |
6214 | } |
| 6215 | ||
| d7579d12 MK |
6216 | static struct sk_buff * |
| 6217 | ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, | |
| 6218 | u32 trigger, u32 enable) | |
| 855aed12 SW |
6219 | { |
| 6220 | struct wmi_vdev_spectral_enable_cmd *cmd; | |
| 6221 | struct sk_buff *skb; | |
| 855aed12 | 6222 | |
| 7aa7a72a | 6223 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 855aed12 | 6224 | if (!skb) |
| d7579d12 | 6225 | return ERR_PTR(-ENOMEM); |
| 855aed12 SW |
6226 | |
| 6227 | cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data; | |
| 6228 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6229 | cmd->trigger_cmd = __cpu_to_le32(trigger); | |
| 6230 | cmd->enable_cmd = __cpu_to_le32(enable); | |
| 6231 | ||
| d7579d12 | 6232 | return skb; |
| 855aed12 SW |
6233 | } |
| 6234 | ||
| d7579d12 MK |
6235 | static struct sk_buff * |
| 6236 | ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id, | |
| 7390ed34 MP |
6237 | const u8 peer_addr[ETH_ALEN], |
| 6238 | enum wmi_peer_type peer_type) | |
| 5e3dd157 KV |
6239 | { |
| 6240 | struct wmi_peer_create_cmd *cmd; | |
| 6241 | struct sk_buff *skb; | |
| 6242 | ||
| 7aa7a72a | 6243 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6244 | if (!skb) |
| d7579d12 | 6245 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6246 | |
| 6247 | cmd = (struct wmi_peer_create_cmd *)skb->data; | |
| 6248 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| b25f32cb | 6249 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
| 5e3dd157 | 6250 | |
| 7aa7a72a | 6251 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6252 | "wmi peer create vdev_id %d peer_addr %pM\n", |
| 6253 | vdev_id, peer_addr); | |
| d7579d12 | 6254 | return skb; |
| 5e3dd157 KV |
6255 | } |
| 6256 | ||
| d7579d12 MK |
6257 | static struct sk_buff * |
| 6258 | ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id, | |
| 6259 | const u8 peer_addr[ETH_ALEN]) | |
| 5e3dd157 KV |
6260 | { |
| 6261 | struct wmi_peer_delete_cmd *cmd; | |
| 6262 | struct sk_buff *skb; | |
| 6263 | ||
| 7aa7a72a | 6264 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6265 | if (!skb) |
| d7579d12 | 6266 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6267 | |
| 6268 | cmd = (struct wmi_peer_delete_cmd *)skb->data; | |
| 6269 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| b25f32cb | 6270 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
| 5e3dd157 | 6271 | |
| 7aa7a72a | 6272 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6273 | "wmi peer delete vdev_id %d peer_addr %pM\n", |
| 6274 | vdev_id, peer_addr); | |
| d7579d12 | 6275 | return skb; |
| 5e3dd157 KV |
6276 | } |
| 6277 | ||
| d7579d12 MK |
6278 | static struct sk_buff * |
| 6279 | ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id, | |
| 6280 | const u8 peer_addr[ETH_ALEN], u32 tid_bitmap) | |
| 5e3dd157 KV |
6281 | { |
| 6282 | struct wmi_peer_flush_tids_cmd *cmd; | |
| 6283 | struct sk_buff *skb; | |
| 6284 | ||
| 7aa7a72a | 6285 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6286 | if (!skb) |
| d7579d12 | 6287 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6288 | |
| 6289 | cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; | |
| 6290 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6291 | cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap); | |
| b25f32cb | 6292 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
| 5e3dd157 | 6293 | |
| 7aa7a72a | 6294 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6295 | "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n", |
| 6296 | vdev_id, peer_addr, tid_bitmap); | |
| d7579d12 | 6297 | return skb; |
| 5e3dd157 KV |
6298 | } |
| 6299 | ||
| d7579d12 MK |
6300 | static struct sk_buff * |
| 6301 | ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id, | |
| 6302 | const u8 *peer_addr, | |
| 6303 | enum wmi_peer_param param_id, | |
| 6304 | u32 param_value) | |
| 5e3dd157 KV |
6305 | { |
| 6306 | struct wmi_peer_set_param_cmd *cmd; | |
| 6307 | struct sk_buff *skb; | |
| 6308 | ||
| 7aa7a72a | 6309 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6310 | if (!skb) |
| d7579d12 | 6311 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6312 | |
| 6313 | cmd = (struct wmi_peer_set_param_cmd *)skb->data; | |
| 6314 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6315 | cmd->param_id = __cpu_to_le32(param_id); | |
| 6316 | cmd->param_value = __cpu_to_le32(param_value); | |
| b25f32cb | 6317 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
| 5e3dd157 | 6318 | |
| 7aa7a72a | 6319 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6320 | "wmi vdev %d peer 0x%pM set param %d value %d\n", |
| 6321 | vdev_id, peer_addr, param_id, param_value); | |
| d7579d12 | 6322 | return skb; |
| 5e3dd157 KV |
6323 | } |
| 6324 | ||
| d7579d12 MK |
6325 | static struct sk_buff * |
| 6326 | ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id, | |
| 6327 | enum wmi_sta_ps_mode psmode) | |
| 5e3dd157 KV |
6328 | { |
| 6329 | struct wmi_sta_powersave_mode_cmd *cmd; | |
| 6330 | struct sk_buff *skb; | |
| 6331 | ||
| 7aa7a72a | 6332 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6333 | if (!skb) |
| d7579d12 | 6334 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6335 | |
| 6336 | cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data; | |
| 6337 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6338 | cmd->sta_ps_mode = __cpu_to_le32(psmode); | |
| 6339 | ||
| 7aa7a72a | 6340 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6341 | "wmi set powersave id 0x%x mode %d\n", |
| 6342 | vdev_id, psmode); | |
| d7579d12 | 6343 | return skb; |
| 5e3dd157 KV |
6344 | } |
| 6345 | ||
| d7579d12 MK |
6346 | static struct sk_buff * |
| 6347 | ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id, | |
| 6348 | enum wmi_sta_powersave_param param_id, | |
| 6349 | u32 value) | |
| 5e3dd157 KV |
6350 | { |
| 6351 | struct wmi_sta_powersave_param_cmd *cmd; | |
| 6352 | struct sk_buff *skb; | |
| 6353 | ||
| 7aa7a72a | 6354 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6355 | if (!skb) |
| d7579d12 | 6356 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6357 | |
| 6358 | cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; | |
| 6359 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6360 | cmd->param_id = __cpu_to_le32(param_id); | |
| 6361 | cmd->param_value = __cpu_to_le32(value); | |
| 6362 | ||
| 7aa7a72a | 6363 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6364 | "wmi sta ps param vdev_id 0x%x param %d value %d\n", |
| 6365 | vdev_id, param_id, value); | |
| d7579d12 | 6366 | return skb; |
| 5e3dd157 KV |
6367 | } |
| 6368 | ||
| d7579d12 MK |
6369 | static struct sk_buff * |
| 6370 | ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
| 6371 | enum wmi_ap_ps_peer_param param_id, u32 value) | |
| 5e3dd157 KV |
6372 | { |
| 6373 | struct wmi_ap_ps_peer_cmd *cmd; | |
| 6374 | struct sk_buff *skb; | |
| 6375 | ||
| 6376 | if (!mac) | |
| d7579d12 | 6377 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 6378 | |
| 7aa7a72a | 6379 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6380 | if (!skb) |
| d7579d12 | 6381 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6382 | |
| 6383 | cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; | |
| 6384 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6385 | cmd->param_id = __cpu_to_le32(param_id); | |
| 6386 | cmd->param_value = __cpu_to_le32(value); | |
| b25f32cb | 6387 | ether_addr_copy(cmd->peer_macaddr.addr, mac); |
| 5e3dd157 | 6388 | |
| 7aa7a72a | 6389 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6390 | "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n", |
| 6391 | vdev_id, param_id, value, mac); | |
| d7579d12 | 6392 | return skb; |
| 5e3dd157 KV |
6393 | } |
| 6394 | ||
| d7579d12 MK |
6395 | static struct sk_buff * |
| 6396 | ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar, | |
| 6397 | const struct wmi_scan_chan_list_arg *arg) | |
| 5e3dd157 KV |
6398 | { |
| 6399 | struct wmi_scan_chan_list_cmd *cmd; | |
| 6400 | struct sk_buff *skb; | |
| 6401 | struct wmi_channel_arg *ch; | |
| 6402 | struct wmi_channel *ci; | |
| 6403 | int len; | |
| 6404 | int i; | |
| 6405 | ||
| 6406 | len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel); | |
| 6407 | ||
| 7aa7a72a | 6408 | skb = ath10k_wmi_alloc_skb(ar, len); |
| 5e3dd157 | 6409 | if (!skb) |
| d7579d12 | 6410 | return ERR_PTR(-EINVAL); |
| 5e3dd157 KV |
6411 | |
| 6412 | cmd = (struct wmi_scan_chan_list_cmd *)skb->data; | |
| 6413 | cmd->num_scan_chans = __cpu_to_le32(arg->n_channels); | |
| 6414 | ||
| 6415 | for (i = 0; i < arg->n_channels; i++) { | |
| 5e3dd157 KV |
6416 | ch = &arg->channels[i]; |
| 6417 | ci = &cmd->chan_info[i]; | |
| 6418 | ||
| 2d66721c | 6419 | ath10k_wmi_put_wmi_channel(ci, ch); |
| 5e3dd157 KV |
6420 | } |
| 6421 | ||
| d7579d12 | 6422 | return skb; |
| 5e3dd157 KV |
6423 | } |
| 6424 | ||
| 24c88f78 MK |
6425 | static void |
| 6426 | ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf, | |
| 6427 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 5e3dd157 | 6428 | { |
| 24c88f78 | 6429 | struct wmi_common_peer_assoc_complete_cmd *cmd = buf; |
| 5e3dd157 | 6430 | |
| 5e3dd157 KV |
6431 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); |
| 6432 | cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1); | |
| 6433 | cmd->peer_associd = __cpu_to_le32(arg->peer_aid); | |
| 6434 | cmd->peer_flags = __cpu_to_le32(arg->peer_flags); | |
| 6435 | cmd->peer_caps = __cpu_to_le32(arg->peer_caps); | |
| 6436 | cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval); | |
| 6437 | cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps); | |
| 6438 | cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu); | |
| 6439 | cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density); | |
| 6440 | cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps); | |
| 6441 | cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams); | |
| 6442 | cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps); | |
| 6443 | cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode); | |
| 6444 | ||
| b25f32cb | 6445 | ether_addr_copy(cmd->peer_macaddr.addr, arg->addr); |
| 5e3dd157 KV |
6446 | |
| 6447 | cmd->peer_legacy_rates.num_rates = | |
| 6448 | __cpu_to_le32(arg->peer_legacy_rates.num_rates); | |
| 6449 | memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates, | |
| 6450 | arg->peer_legacy_rates.num_rates); | |
| 6451 | ||
| 6452 | cmd->peer_ht_rates.num_rates = | |
| 6453 | __cpu_to_le32(arg->peer_ht_rates.num_rates); | |
| 6454 | memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates, | |
| 6455 | arg->peer_ht_rates.num_rates); | |
| 6456 | ||
| 6457 | cmd->peer_vht_rates.rx_max_rate = | |
| 6458 | __cpu_to_le32(arg->peer_vht_rates.rx_max_rate); | |
| 6459 | cmd->peer_vht_rates.rx_mcs_set = | |
| 6460 | __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set); | |
| 6461 | cmd->peer_vht_rates.tx_max_rate = | |
| 6462 | __cpu_to_le32(arg->peer_vht_rates.tx_max_rate); | |
| 6463 | cmd->peer_vht_rates.tx_mcs_set = | |
| 6464 | __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set); | |
| 24c88f78 MK |
6465 | } |
| 6466 | ||
| 6467 | static void | |
| 6468 | ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf, | |
| 6469 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6470 | { | |
| 6471 | struct wmi_main_peer_assoc_complete_cmd *cmd = buf; | |
| 6472 | ||
| 6473 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
| 6474 | memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info)); | |
| 6475 | } | |
| 6476 | ||
| 6477 | static void | |
| 6478 | ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf, | |
| 6479 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6480 | { | |
| 6481 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
| 6482 | } | |
| 6483 | ||
| 6484 | static void | |
| 6485 | ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf, | |
| 6486 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6487 | { | |
| 6488 | struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf; | |
| 6489 | int max_mcs, max_nss; | |
| 6490 | u32 info0; | |
| 6491 | ||
| 6492 | /* TODO: Is using max values okay with firmware? */ | |
| 6493 | max_mcs = 0xf; | |
| 6494 | max_nss = 0xf; | |
| 6495 | ||
| 6496 | info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) | | |
| 6497 | SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS); | |
| 6498 | ||
| 6499 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
| 6500 | cmd->info0 = __cpu_to_le32(info0); | |
| 6501 | } | |
| 6502 | ||
| b54e16f1 VT |
6503 | static void |
| 6504 | ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf, | |
| 6505 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6506 | { | |
| 6507 | struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf; | |
| 6508 | ||
| 6509 | ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg); | |
| 6510 | cmd->peer_bw_rxnss_override = 0; | |
| 6511 | } | |
| 6512 | ||
| d7579d12 MK |
6513 | static int |
| 6514 | ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg) | |
| 24c88f78 | 6515 | { |
| 24c88f78 MK |
6516 | if (arg->peer_mpdu_density > 16) |
| 6517 | return -EINVAL; | |
| 6518 | if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES) | |
| 6519 | return -EINVAL; | |
| 6520 | if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES) | |
| 6521 | return -EINVAL; | |
| 6522 | ||
| d7579d12 MK |
6523 | return 0; |
| 6524 | } | |
| 6525 | ||
| 6526 | static struct sk_buff * | |
| 6527 | ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar, | |
| 6528 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6529 | { | |
| 6530 | size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd); | |
| 6531 | struct sk_buff *skb; | |
| 6532 | int ret; | |
| 6533 | ||
| 6534 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
| 6535 | if (ret) | |
| 6536 | return ERR_PTR(ret); | |
| 24c88f78 | 6537 | |
| 7aa7a72a | 6538 | skb = ath10k_wmi_alloc_skb(ar, len); |
| 24c88f78 | 6539 | if (!skb) |
| d7579d12 | 6540 | return ERR_PTR(-ENOMEM); |
| 24c88f78 | 6541 | |
| d7579d12 MK |
6542 | ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg); |
| 6543 | ||
| 6544 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6545 | "wmi peer assoc vdev %d addr %pM (%s)\n", | |
| 6546 | arg->vdev_id, arg->addr, | |
| 6547 | arg->peer_reassoc ? "reassociate" : "new"); | |
| 6548 | return skb; | |
| 6549 | } | |
| 6550 | ||
| 6551 | static struct sk_buff * | |
| 6552 | ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar, | |
| 6553 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6554 | { | |
| 6555 | size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd); | |
| 6556 | struct sk_buff *skb; | |
| 6557 | int ret; | |
| 6558 | ||
| 6559 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
| 6560 | if (ret) | |
| 6561 | return ERR_PTR(ret); | |
| 6562 | ||
| 6563 | skb = ath10k_wmi_alloc_skb(ar, len); | |
| 6564 | if (!skb) | |
| 6565 | return ERR_PTR(-ENOMEM); | |
| 6566 | ||
| 6567 | ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg); | |
| 6568 | ||
| 6569 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6570 | "wmi peer assoc vdev %d addr %pM (%s)\n", | |
| 6571 | arg->vdev_id, arg->addr, | |
| 6572 | arg->peer_reassoc ? "reassociate" : "new"); | |
| 6573 | return skb; | |
| 6574 | } | |
| 6575 | ||
| 6576 | static struct sk_buff * | |
| 6577 | ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar, | |
| 6578 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6579 | { | |
| 6580 | size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd); | |
| 6581 | struct sk_buff *skb; | |
| 6582 | int ret; | |
| 6583 | ||
| 6584 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
| 6585 | if (ret) | |
| 6586 | return ERR_PTR(ret); | |
| 6587 | ||
| 6588 | skb = ath10k_wmi_alloc_skb(ar, len); | |
| 6589 | if (!skb) | |
| 6590 | return ERR_PTR(-ENOMEM); | |
| 6591 | ||
| 6592 | ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg); | |
| 5e3dd157 | 6593 | |
| 7aa7a72a | 6594 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 44d6fa90 CYY |
6595 | "wmi peer assoc vdev %d addr %pM (%s)\n", |
| 6596 | arg->vdev_id, arg->addr, | |
| 6597 | arg->peer_reassoc ? "reassociate" : "new"); | |
| d7579d12 | 6598 | return skb; |
| 5e3dd157 KV |
6599 | } |
| 6600 | ||
| b54e16f1 VT |
6601 | static struct sk_buff * |
| 6602 | ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar, | |
| 6603 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6604 | { | |
| 6605 | size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd); | |
| 6606 | struct sk_buff *skb; | |
| 6607 | int ret; | |
| 6608 | ||
| 6609 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
| 6610 | if (ret) | |
| 6611 | return ERR_PTR(ret); | |
| 6612 | ||
| 6613 | skb = ath10k_wmi_alloc_skb(ar, len); | |
| 6614 | if (!skb) | |
| 6615 | return ERR_PTR(-ENOMEM); | |
| 6616 | ||
| 6617 | ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg); | |
| 6618 | ||
| 6619 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6620 | "wmi peer assoc vdev %d addr %pM (%s)\n", | |
| 6621 | arg->vdev_id, arg->addr, | |
| 6622 | arg->peer_reassoc ? "reassociate" : "new"); | |
| 6623 | return skb; | |
| 6624 | } | |
| 6625 | ||
| a57a6a27 RM |
6626 | static struct sk_buff * |
| 6627 | ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar) | |
| 6628 | { | |
| 6629 | struct sk_buff *skb; | |
| 6630 | ||
| 6631 | skb = ath10k_wmi_alloc_skb(ar, 0); | |
| 6632 | if (!skb) | |
| 6633 | return ERR_PTR(-ENOMEM); | |
| 6634 | ||
| 6635 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n"); | |
| 6636 | return skb; | |
| 6637 | } | |
| 6638 | ||
| 748afc47 | 6639 | /* This function assumes the beacon is already DMA mapped */ |
| d7579d12 | 6640 | static struct sk_buff * |
| 9ad50182 MK |
6641 | ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn, |
| 6642 | size_t bcn_len, u32 bcn_paddr, bool dtim_zero, | |
| 6643 | bool deliver_cab) | |
| 5e3dd157 | 6644 | { |
| 748afc47 | 6645 | struct wmi_bcn_tx_ref_cmd *cmd; |
| 5e3dd157 | 6646 | struct sk_buff *skb; |
| 748afc47 | 6647 | struct ieee80211_hdr *hdr; |
| 748afc47 | 6648 | u16 fc; |
| 5e3dd157 | 6649 | |
| 7aa7a72a | 6650 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6651 | if (!skb) |
| d7579d12 | 6652 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 | 6653 | |
| 9ad50182 | 6654 | hdr = (struct ieee80211_hdr *)bcn; |
| 748afc47 MK |
6655 | fc = le16_to_cpu(hdr->frame_control); |
| 6656 | ||
| 6657 | cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data; | |
| 9ad50182 MK |
6658 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
| 6659 | cmd->data_len = __cpu_to_le32(bcn_len); | |
| 6660 | cmd->data_ptr = __cpu_to_le32(bcn_paddr); | |
| 748afc47 MK |
6661 | cmd->msdu_id = 0; |
| 6662 | cmd->frame_control = __cpu_to_le32(fc); | |
| 6663 | cmd->flags = 0; | |
| 24c88f78 | 6664 | cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA); |
| 748afc47 | 6665 | |
| 9ad50182 | 6666 | if (dtim_zero) |
| 748afc47 MK |
6667 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO); |
| 6668 | ||
| 9ad50182 | 6669 | if (deliver_cab) |
| 748afc47 MK |
6670 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB); |
| 6671 | ||
| d7579d12 | 6672 | return skb; |
| 5e3dd157 KV |
6673 | } |
| 6674 | ||
| 5e752e42 MK |
6675 | void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params, |
| 6676 | const struct wmi_wmm_params_arg *arg) | |
| 5e3dd157 KV |
6677 | { |
| 6678 | params->cwmin = __cpu_to_le32(arg->cwmin); | |
| 6679 | params->cwmax = __cpu_to_le32(arg->cwmax); | |
| 6680 | params->aifs = __cpu_to_le32(arg->aifs); | |
| 6681 | params->txop = __cpu_to_le32(arg->txop); | |
| 6682 | params->acm = __cpu_to_le32(arg->acm); | |
| 6683 | params->no_ack = __cpu_to_le32(arg->no_ack); | |
| 6684 | } | |
| 6685 | ||
| d7579d12 MK |
6686 | static struct sk_buff * |
| 6687 | ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar, | |
| 5e752e42 | 6688 | const struct wmi_wmm_params_all_arg *arg) |
| 5e3dd157 KV |
6689 | { |
| 6690 | struct wmi_pdev_set_wmm_params *cmd; | |
| 6691 | struct sk_buff *skb; | |
| 6692 | ||
| 7aa7a72a | 6693 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6694 | if (!skb) |
| d7579d12 | 6695 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6696 | |
| 6697 | cmd = (struct wmi_pdev_set_wmm_params *)skb->data; | |
| 5e752e42 MK |
6698 | ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be); |
| 6699 | ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk); | |
| 6700 | ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi); | |
| 6701 | ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo); | |
| 5e3dd157 | 6702 | |
| 7aa7a72a | 6703 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n"); |
| d7579d12 | 6704 | return skb; |
| 5e3dd157 KV |
6705 | } |
| 6706 | ||
| d7579d12 | 6707 | static struct sk_buff * |
| de23d3ef | 6708 | ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask) |
| 5e3dd157 KV |
6709 | { |
| 6710 | struct wmi_request_stats_cmd *cmd; | |
| 6711 | struct sk_buff *skb; | |
| 6712 | ||
| 7aa7a72a | 6713 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6714 | if (!skb) |
| d7579d12 | 6715 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6716 | |
| 6717 | cmd = (struct wmi_request_stats_cmd *)skb->data; | |
| de23d3ef | 6718 | cmd->stats_id = __cpu_to_le32(stats_mask); |
| 5e3dd157 | 6719 | |
| de23d3ef MK |
6720 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n", |
| 6721 | stats_mask); | |
| d7579d12 | 6722 | return skb; |
| 5e3dd157 | 6723 | } |
| 9cfbce75 | 6724 | |
| d7579d12 MK |
6725 | static struct sk_buff * |
| 6726 | ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar, | |
| 6727 | enum wmi_force_fw_hang_type type, u32 delay_ms) | |
| 9cfbce75 MK |
6728 | { |
| 6729 | struct wmi_force_fw_hang_cmd *cmd; | |
| 6730 | struct sk_buff *skb; | |
| 6731 | ||
| 7aa7a72a | 6732 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 9cfbce75 | 6733 | if (!skb) |
| d7579d12 | 6734 | return ERR_PTR(-ENOMEM); |
| 9cfbce75 MK |
6735 | |
| 6736 | cmd = (struct wmi_force_fw_hang_cmd *)skb->data; | |
| 6737 | cmd->type = __cpu_to_le32(type); | |
| 6738 | cmd->delay_ms = __cpu_to_le32(delay_ms); | |
| 6739 | ||
| 7aa7a72a | 6740 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n", |
| 9cfbce75 | 6741 | type, delay_ms); |
| d7579d12 | 6742 | return skb; |
| 9cfbce75 | 6743 | } |
| f118a3e5 | 6744 | |
| d7579d12 | 6745 | static struct sk_buff * |
| 467210a6 SJ |
6746 | ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable, |
| 6747 | u32 log_level) | |
| f118a3e5 KV |
6748 | { |
| 6749 | struct wmi_dbglog_cfg_cmd *cmd; | |
| 6750 | struct sk_buff *skb; | |
| 6751 | u32 cfg; | |
| 6752 | ||
| 7aa7a72a | 6753 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| f118a3e5 | 6754 | if (!skb) |
| d7579d12 | 6755 | return ERR_PTR(-ENOMEM); |
| f118a3e5 KV |
6756 | |
| 6757 | cmd = (struct wmi_dbglog_cfg_cmd *)skb->data; | |
| 6758 | ||
| 6759 | if (module_enable) { | |
| 467210a6 | 6760 | cfg = SM(log_level, |
| f118a3e5 KV |
6761 | ATH10K_DBGLOG_CFG_LOG_LVL); |
| 6762 | } else { | |
| 6763 | /* set back defaults, all modules with WARN level */ | |
| 6764 | cfg = SM(ATH10K_DBGLOG_LEVEL_WARN, | |
| 6765 | ATH10K_DBGLOG_CFG_LOG_LVL); | |
| 6766 | module_enable = ~0; | |
| 6767 | } | |
| 6768 | ||
| 6769 | cmd->module_enable = __cpu_to_le32(module_enable); | |
| 6770 | cmd->module_valid = __cpu_to_le32(~0); | |
| 6771 | cmd->config_enable = __cpu_to_le32(cfg); | |
| 6772 | cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK); | |
| 6773 | ||
| 7aa7a72a | 6774 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| f118a3e5 KV |
6775 | "wmi dbglog cfg modules %08x %08x config %08x %08x\n", |
| 6776 | __le32_to_cpu(cmd->module_enable), | |
| 6777 | __le32_to_cpu(cmd->module_valid), | |
| 6778 | __le32_to_cpu(cmd->config_enable), | |
| 6779 | __le32_to_cpu(cmd->config_valid)); | |
| d7579d12 | 6780 | return skb; |
| f118a3e5 | 6781 | } |
| b79b9baa | 6782 | |
| d7579d12 MK |
6783 | static struct sk_buff * |
| 6784 | ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap) | |
| 90174455 RM |
6785 | { |
| 6786 | struct wmi_pdev_pktlog_enable_cmd *cmd; | |
| 6787 | struct sk_buff *skb; | |
| 6788 | ||
| 6789 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6790 | if (!skb) | |
| d7579d12 | 6791 | return ERR_PTR(-ENOMEM); |
| 90174455 RM |
6792 | |
| 6793 | ev_bitmap &= ATH10K_PKTLOG_ANY; | |
| 90174455 RM |
6794 | |
| 6795 | cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data; | |
| 6796 | cmd->ev_bitmap = __cpu_to_le32(ev_bitmap); | |
| d7579d12 MK |
6797 | |
| 6798 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n", | |
| 6799 | ev_bitmap); | |
| 6800 | return skb; | |
| 90174455 RM |
6801 | } |
| 6802 | ||
| d7579d12 MK |
6803 | static struct sk_buff * |
| 6804 | ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar) | |
| 90174455 RM |
6805 | { |
| 6806 | struct sk_buff *skb; | |
| 6807 | ||
| 6808 | skb = ath10k_wmi_alloc_skb(ar, 0); | |
| 6809 | if (!skb) | |
| d7579d12 | 6810 | return ERR_PTR(-ENOMEM); |
| 90174455 RM |
6811 | |
| 6812 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n"); | |
| d7579d12 | 6813 | return skb; |
| 90174455 RM |
6814 | } |
| 6815 | ||
| ffdd738d RM |
6816 | static struct sk_buff * |
| 6817 | ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period, | |
| 6818 | u32 duration, u32 next_offset, | |
| 6819 | u32 enabled) | |
| 6820 | { | |
| 6821 | struct wmi_pdev_set_quiet_cmd *cmd; | |
| 6822 | struct sk_buff *skb; | |
| 6823 | ||
| 6824 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6825 | if (!skb) | |
| 6826 | return ERR_PTR(-ENOMEM); | |
| 6827 | ||
| 6828 | cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data; | |
| 6829 | cmd->period = __cpu_to_le32(period); | |
| 6830 | cmd->duration = __cpu_to_le32(duration); | |
| 6831 | cmd->next_start = __cpu_to_le32(next_offset); | |
| 6832 | cmd->enabled = __cpu_to_le32(enabled); | |
| 6833 | ||
| 6834 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6835 | "wmi quiet param: period %u duration %u enabled %d\n", | |
| 6836 | period, duration, enabled); | |
| 6837 | return skb; | |
| 6838 | } | |
| 6839 | ||
| dc8ab278 RM |
6840 | static struct sk_buff * |
| 6841 | ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id, | |
| 6842 | const u8 *mac) | |
| 6843 | { | |
| 6844 | struct wmi_addba_clear_resp_cmd *cmd; | |
| 6845 | struct sk_buff *skb; | |
| 6846 | ||
| 6847 | if (!mac) | |
| 6848 | return ERR_PTR(-EINVAL); | |
| 6849 | ||
| 6850 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6851 | if (!skb) | |
| 6852 | return ERR_PTR(-ENOMEM); | |
| 6853 | ||
| 6854 | cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; | |
| 6855 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6856 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
| 6857 | ||
| 6858 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6859 | "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", | |
| 6860 | vdev_id, mac); | |
| 6861 | return skb; | |
| 6862 | } | |
| 6863 | ||
| 65c0893d RM |
6864 | static struct sk_buff * |
| 6865 | ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
| 6866 | u32 tid, u32 buf_size) | |
| 6867 | { | |
| 6868 | struct wmi_addba_send_cmd *cmd; | |
| 6869 | struct sk_buff *skb; | |
| 6870 | ||
| 6871 | if (!mac) | |
| 6872 | return ERR_PTR(-EINVAL); | |
| 6873 | ||
| 6874 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6875 | if (!skb) | |
| 6876 | return ERR_PTR(-ENOMEM); | |
| 6877 | ||
| 6878 | cmd = (struct wmi_addba_send_cmd *)skb->data; | |
| 6879 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6880 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
| 6881 | cmd->tid = __cpu_to_le32(tid); | |
| 6882 | cmd->buffersize = __cpu_to_le32(buf_size); | |
| 6883 | ||
| 6884 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6885 | "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", | |
| 6886 | vdev_id, mac, tid, buf_size); | |
| 6887 | return skb; | |
| 6888 | } | |
| 6889 | ||
| 11597413 RM |
6890 | static struct sk_buff * |
| 6891 | ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
| 6892 | u32 tid, u32 status) | |
| 6893 | { | |
| 6894 | struct wmi_addba_setresponse_cmd *cmd; | |
| 6895 | struct sk_buff *skb; | |
| 6896 | ||
| 6897 | if (!mac) | |
| 6898 | return ERR_PTR(-EINVAL); | |
| 6899 | ||
| 6900 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6901 | if (!skb) | |
| 6902 | return ERR_PTR(-ENOMEM); | |
| 6903 | ||
| 6904 | cmd = (struct wmi_addba_setresponse_cmd *)skb->data; | |
| 6905 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6906 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
| 6907 | cmd->tid = __cpu_to_le32(tid); | |
| 6908 | cmd->statuscode = __cpu_to_le32(status); | |
| 6909 | ||
| 6910 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6911 | "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", | |
| 6912 | vdev_id, mac, tid, status); | |
| 6913 | return skb; | |
| 6914 | } | |
| 6915 | ||
| 50abef85 RM |
6916 | static struct sk_buff * |
| 6917 | ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
| 6918 | u32 tid, u32 initiator, u32 reason) | |
| 6919 | { | |
| 6920 | struct wmi_delba_send_cmd *cmd; | |
| 6921 | struct sk_buff *skb; | |
| 6922 | ||
| 6923 | if (!mac) | |
| 6924 | return ERR_PTR(-EINVAL); | |
| 6925 | ||
| 6926 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6927 | if (!skb) | |
| 6928 | return ERR_PTR(-ENOMEM); | |
| 6929 | ||
| 6930 | cmd = (struct wmi_delba_send_cmd *)skb->data; | |
| 6931 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6932 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
| 6933 | cmd->tid = __cpu_to_le32(tid); | |
| 6934 | cmd->initiator = __cpu_to_le32(initiator); | |
| 6935 | cmd->reasoncode = __cpu_to_le32(reason); | |
| 6936 | ||
| 6937 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6938 | "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", | |
| 6939 | vdev_id, mac, tid, initiator, reason); | |
| 6940 | return skb; | |
| 6941 | } | |
| 6942 | ||
| 29542666 MK |
6943 | static struct sk_buff * |
| 6944 | ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param) | |
| 6945 | { | |
| 6946 | struct wmi_pdev_get_tpc_config_cmd *cmd; | |
| 6947 | struct sk_buff *skb; | |
| 6948 | ||
| 6949 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6950 | if (!skb) | |
| 6951 | return ERR_PTR(-ENOMEM); | |
| 6952 | ||
| 6953 | cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data; | |
| 6954 | cmd->param = __cpu_to_le32(param); | |
| 6955 | ||
| 6956 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6957 | "wmi pdev get tcp config param:%d\n", param); | |
| 6958 | return skb; | |
| 6959 | } | |
| 6960 | ||
| bc6f9ae6 MP |
6961 | size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head) |
| 6962 | { | |
| 6963 | struct ath10k_fw_stats_peer *i; | |
| 6964 | size_t num = 0; | |
| 6965 | ||
| 6966 | list_for_each_entry(i, head, list) | |
| 6967 | ++num; | |
| 6968 | ||
| 6969 | return num; | |
| 6970 | } | |
| 6971 | ||
| 6972 | size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head) | |
| 6973 | { | |
| 6974 | struct ath10k_fw_stats_vdev *i; | |
| 6975 | size_t num = 0; | |
| 6976 | ||
| 6977 | list_for_each_entry(i, head, list) | |
| 6978 | ++num; | |
| 6979 | ||
| 6980 | return num; | |
| 6981 | } | |
| 6982 | ||
| 6983 | static void | |
| 6984 | ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
| 6985 | char *buf, u32 *length) | |
| 6986 | { | |
| 6987 | u32 len = *length; | |
| 6988 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 6989 | ||
| 6990 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 6991 | len += scnprintf(buf + len, buf_len - len, "%30s\n", | |
| 6992 | "ath10k PDEV stats"); | |
| 6993 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 6994 | "================="); | |
| 6995 | ||
| 6996 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 6997 | "Channel noise floor", pdev->ch_noise_floor); | |
| 6998 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 6999 | "Channel TX power", pdev->chan_tx_power); | |
| 7000 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7001 | "TX frame count", pdev->tx_frame_count); | |
| 7002 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7003 | "RX frame count", pdev->rx_frame_count); | |
| 7004 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7005 | "RX clear count", pdev->rx_clear_count); | |
| 7006 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7007 | "Cycle count", pdev->cycle_count); | |
| 7008 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7009 | "PHY error count", pdev->phy_err_count); | |
| 7010 | ||
| 7011 | *length = len; | |
| 7012 | } | |
| 7013 | ||
| 7014 | static void | |
| 7015 | ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
| 7016 | char *buf, u32 *length) | |
| 7017 | { | |
| 7018 | u32 len = *length; | |
| 7019 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7020 | ||
| 7021 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7022 | "RTS bad count", pdev->rts_bad); | |
| 7023 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7024 | "RTS good count", pdev->rts_good); | |
| 7025 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7026 | "FCS bad count", pdev->fcs_bad); | |
| 7027 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7028 | "No beacon count", pdev->no_beacons); | |
| 7029 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7030 | "MIB int count", pdev->mib_int_count); | |
| 7031 | ||
| 7032 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7033 | *length = len; | |
| 7034 | } | |
| 7035 | ||
| 7036 | static void | |
| 7037 | ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
| 7038 | char *buf, u32 *length) | |
| 7039 | { | |
| 7040 | u32 len = *length; | |
| 7041 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7042 | ||
| 7043 | len += scnprintf(buf + len, buf_len - len, "\n%30s\n", | |
| 7044 | "ath10k PDEV TX stats"); | |
| 7045 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7046 | "================="); | |
| 7047 | ||
| 7048 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7049 | "HTT cookies queued", pdev->comp_queued); | |
| 7050 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7051 | "HTT cookies disp.", pdev->comp_delivered); | |
| 7052 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7053 | "MSDU queued", pdev->msdu_enqued); | |
| 7054 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7055 | "MPDU queued", pdev->mpdu_enqued); | |
| 7056 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7057 | "MSDUs dropped", pdev->wmm_drop); | |
| 7058 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7059 | "Local enqued", pdev->local_enqued); | |
| 7060 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7061 | "Local freed", pdev->local_freed); | |
| 7062 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7063 | "HW queued", pdev->hw_queued); | |
| 7064 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7065 | "PPDUs reaped", pdev->hw_reaped); | |
| 7066 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7067 | "Num underruns", pdev->underrun); | |
| 7068 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7069 | "PPDUs cleaned", pdev->tx_abort); | |
| 7070 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7071 | "MPDUs requed", pdev->mpdus_requed); | |
| 7072 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7073 | "Excessive retries", pdev->tx_ko); | |
| 7074 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7075 | "HW rate", pdev->data_rc); | |
| 7076 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7077 | "Sched self tiggers", pdev->self_triggers); | |
| 7078 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7079 | "Dropped due to SW retries", | |
| 7080 | pdev->sw_retry_failure); | |
| 7081 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7082 | "Illegal rate phy errors", | |
| 7083 | pdev->illgl_rate_phy_err); | |
| 7084 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7085 | "Pdev continuous xretry", pdev->pdev_cont_xretry); | |
| 7086 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7087 | "TX timeout", pdev->pdev_tx_timeout); | |
| 7088 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7089 | "PDEV resets", pdev->pdev_resets); | |
| 7090 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7091 | "PHY underrun", pdev->phy_underrun); | |
| 7092 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7093 | "MPDU is more than txop limit", pdev->txop_ovf); | |
| 7094 | *length = len; | |
| 7095 | } | |
| 7096 | ||
| 7097 | static void | |
| 7098 | ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
| 7099 | char *buf, u32 *length) | |
| 7100 | { | |
| 7101 | u32 len = *length; | |
| 7102 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7103 | ||
| 7104 | len += scnprintf(buf + len, buf_len - len, "\n%30s\n", | |
| 7105 | "ath10k PDEV RX stats"); | |
| 7106 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7107 | "================="); | |
| 7108 | ||
| 7109 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7110 | "Mid PPDU route change", | |
| 7111 | pdev->mid_ppdu_route_change); | |
| 7112 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7113 | "Tot. number of statuses", pdev->status_rcvd); | |
| 7114 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7115 | "Extra frags on rings 0", pdev->r0_frags); | |
| 7116 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7117 | "Extra frags on rings 1", pdev->r1_frags); | |
| 7118 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7119 | "Extra frags on rings 2", pdev->r2_frags); | |
| 7120 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7121 | "Extra frags on rings 3", pdev->r3_frags); | |
| 7122 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7123 | "MSDUs delivered to HTT", pdev->htt_msdus); | |
| 7124 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7125 | "MPDUs delivered to HTT", pdev->htt_mpdus); | |
| 7126 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7127 | "MSDUs delivered to stack", pdev->loc_msdus); | |
| 7128 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7129 | "MPDUs delivered to stack", pdev->loc_mpdus); | |
| 7130 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7131 | "Oversized AMSUs", pdev->oversize_amsdu); | |
| 7132 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7133 | "PHY errors", pdev->phy_errs); | |
| 7134 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7135 | "PHY errors drops", pdev->phy_err_drop); | |
| 7136 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7137 | "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs); | |
| 7138 | *length = len; | |
| 7139 | } | |
| 7140 | ||
| 7141 | static void | |
| 7142 | ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev, | |
| 7143 | char *buf, u32 *length) | |
| 7144 | { | |
| 7145 | u32 len = *length; | |
| 7146 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7147 | int i; | |
| 7148 | ||
| 7149 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7150 | "vdev id", vdev->vdev_id); | |
| 7151 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7152 | "beacon snr", vdev->beacon_snr); | |
| 7153 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7154 | "data snr", vdev->data_snr); | |
| 7155 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7156 | "num rx frames", vdev->num_rx_frames); | |
| 7157 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7158 | "num rts fail", vdev->num_rts_fail); | |
| 7159 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7160 | "num rts success", vdev->num_rts_success); | |
| 7161 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7162 | "num rx err", vdev->num_rx_err); | |
| 7163 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7164 | "num rx discard", vdev->num_rx_discard); | |
| 7165 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7166 | "num tx not acked", vdev->num_tx_not_acked); | |
| 7167 | ||
| 7168 | for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++) | |
| 7169 | len += scnprintf(buf + len, buf_len - len, | |
| 7170 | "%25s [%02d] %u\n", | |
| 7171 | "num tx frames", i, | |
| 7172 | vdev->num_tx_frames[i]); | |
| 7173 | ||
| 7174 | for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++) | |
| 7175 | len += scnprintf(buf + len, buf_len - len, | |
| 7176 | "%25s [%02d] %u\n", | |
| 7177 | "num tx frames retries", i, | |
| 7178 | vdev->num_tx_frames_retries[i]); | |
| 7179 | ||
| 7180 | for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++) | |
| 7181 | len += scnprintf(buf + len, buf_len - len, | |
| 7182 | "%25s [%02d] %u\n", | |
| 7183 | "num tx frames failures", i, | |
| 7184 | vdev->num_tx_frames_failures[i]); | |
| 7185 | ||
| 7186 | for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++) | |
| 7187 | len += scnprintf(buf + len, buf_len - len, | |
| 7188 | "%25s [%02d] 0x%08x\n", | |
| 7189 | "tx rate history", i, | |
| 7190 | vdev->tx_rate_history[i]); | |
| 7191 | ||
| 7192 | for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++) | |
| 7193 | len += scnprintf(buf + len, buf_len - len, | |
| 7194 | "%25s [%02d] %u\n", | |
| 7195 | "beacon rssi history", i, | |
| 7196 | vdev->beacon_rssi_history[i]); | |
| 7197 | ||
| 7198 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7199 | *length = len; | |
| 7200 | } | |
| 7201 | ||
| 7202 | static void | |
| 7203 | ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer, | |
| 7204 | char *buf, u32 *length) | |
| 7205 | { | |
| 7206 | u32 len = *length; | |
| 7207 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7208 | ||
| 7209 | len += scnprintf(buf + len, buf_len - len, "%30s %pM\n", | |
| 7210 | "Peer MAC address", peer->peer_macaddr); | |
| 7211 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7212 | "Peer RSSI", peer->peer_rssi); | |
| 7213 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7214 | "Peer TX rate", peer->peer_tx_rate); | |
| 7215 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7216 | "Peer RX rate", peer->peer_rx_rate); | |
| de46c015 MSS |
7217 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", |
| 7218 | "Peer RX duration", peer->rx_duration); | |
| 7219 | ||
| bc6f9ae6 MP |
7220 | len += scnprintf(buf + len, buf_len - len, "\n"); |
| 7221 | *length = len; | |
| 7222 | } | |
| 7223 | ||
| 7224 | void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar, | |
| 7225 | struct ath10k_fw_stats *fw_stats, | |
| 7226 | char *buf) | |
| 7227 | { | |
| 7228 | u32 len = 0; | |
| 7229 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7230 | const struct ath10k_fw_stats_pdev *pdev; | |
| 7231 | const struct ath10k_fw_stats_vdev *vdev; | |
| 7232 | const struct ath10k_fw_stats_peer *peer; | |
| 7233 | size_t num_peers; | |
| 7234 | size_t num_vdevs; | |
| 7235 | ||
| 7236 | spin_lock_bh(&ar->data_lock); | |
| 7237 | ||
| 7238 | pdev = list_first_entry_or_null(&fw_stats->pdevs, | |
| 7239 | struct ath10k_fw_stats_pdev, list); | |
| 7240 | if (!pdev) { | |
| 7241 | ath10k_warn(ar, "failed to get pdev stats\n"); | |
| 7242 | goto unlock; | |
| 7243 | } | |
| 7244 | ||
| 7245 | num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); | |
| 7246 | num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); | |
| 7247 | ||
| 7248 | ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); | |
| 7249 | ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); | |
| 7250 | ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); | |
| 7251 | ||
| 7252 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7253 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7254 | "ath10k VDEV stats", num_vdevs); | |
| 7255 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7256 | "================="); | |
| 7257 | ||
| 7258 | list_for_each_entry(vdev, &fw_stats->vdevs, list) { | |
| 7259 | ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); | |
| 7260 | } | |
| 7261 | ||
| 7262 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7263 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7264 | "ath10k PEER stats", num_peers); | |
| 7265 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7266 | "================="); | |
| 7267 | ||
| 7268 | list_for_each_entry(peer, &fw_stats->peers, list) { | |
| 7269 | ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); | |
| 7270 | } | |
| 7271 | ||
| 7272 | unlock: | |
| 7273 | spin_unlock_bh(&ar->data_lock); | |
| 7274 | ||
| 7275 | if (len >= buf_len) | |
| 7276 | buf[len - 1] = 0; | |
| 7277 | else | |
| 7278 | buf[len] = 0; | |
| 7279 | } | |
| 7280 | ||
| 7281 | void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar, | |
| 7282 | struct ath10k_fw_stats *fw_stats, | |
| 7283 | char *buf) | |
| 7284 | { | |
| 7285 | unsigned int len = 0; | |
| 7286 | unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7287 | const struct ath10k_fw_stats_pdev *pdev; | |
| 7288 | const struct ath10k_fw_stats_vdev *vdev; | |
| 7289 | const struct ath10k_fw_stats_peer *peer; | |
| 7290 | size_t num_peers; | |
| 7291 | size_t num_vdevs; | |
| 7292 | ||
| 7293 | spin_lock_bh(&ar->data_lock); | |
| 7294 | ||
| 7295 | pdev = list_first_entry_or_null(&fw_stats->pdevs, | |
| 7296 | struct ath10k_fw_stats_pdev, list); | |
| 7297 | if (!pdev) { | |
| 7298 | ath10k_warn(ar, "failed to get pdev stats\n"); | |
| 7299 | goto unlock; | |
| 7300 | } | |
| 7301 | ||
| 7302 | num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); | |
| 7303 | num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); | |
| 7304 | ||
| 7305 | ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); | |
| 7306 | ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len); | |
| 7307 | ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); | |
| 7308 | ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); | |
| 7309 | ||
| 7310 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7311 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7312 | "ath10k VDEV stats", num_vdevs); | |
| 7313 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7314 | "================="); | |
| 7315 | ||
| 7316 | list_for_each_entry(vdev, &fw_stats->vdevs, list) { | |
| 7317 | ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); | |
| 7318 | } | |
| 7319 | ||
| 7320 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7321 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7322 | "ath10k PEER stats", num_peers); | |
| 7323 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7324 | "================="); | |
| 7325 | ||
| 7326 | list_for_each_entry(peer, &fw_stats->peers, list) { | |
| 7327 | ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); | |
| 7328 | } | |
| 7329 | ||
| 7330 | unlock: | |
| 7331 | spin_unlock_bh(&ar->data_lock); | |
| 7332 | ||
| 7333 | if (len >= buf_len) | |
| 7334 | buf[len - 1] = 0; | |
| 7335 | else | |
| 7336 | buf[len] = 0; | |
| 7337 | } | |
| 7338 | ||
| 62f77f09 M |
7339 | static struct sk_buff * |
| 7340 | ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable, | |
| 7341 | u32 detect_level, u32 detect_margin) | |
| 7342 | { | |
| 7343 | struct wmi_pdev_set_adaptive_cca_params *cmd; | |
| 7344 | struct sk_buff *skb; | |
| 7345 | ||
| 7346 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 7347 | if (!skb) | |
| 7348 | return ERR_PTR(-ENOMEM); | |
| 7349 | ||
| 7350 | cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data; | |
| 7351 | cmd->enable = __cpu_to_le32(enable); | |
| 7352 | cmd->cca_detect_level = __cpu_to_le32(detect_level); | |
| 7353 | cmd->cca_detect_margin = __cpu_to_le32(detect_margin); | |
| 7354 | ||
| 7355 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 7356 | "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n", | |
| 7357 | enable, detect_level, detect_margin); | |
| 7358 | return skb; | |
| 7359 | } | |
| 7360 | ||
| 98dd2b92 MP |
7361 | void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar, |
| 7362 | struct ath10k_fw_stats *fw_stats, | |
| 7363 | char *buf) | |
| 7364 | { | |
| 7365 | u32 len = 0; | |
| 7366 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7367 | const struct ath10k_fw_stats_pdev *pdev; | |
| 7368 | const struct ath10k_fw_stats_vdev *vdev; | |
| 7369 | const struct ath10k_fw_stats_peer *peer; | |
| 7370 | size_t num_peers; | |
| 7371 | size_t num_vdevs; | |
| 7372 | ||
| 7373 | spin_lock_bh(&ar->data_lock); | |
| 7374 | ||
| 7375 | pdev = list_first_entry_or_null(&fw_stats->pdevs, | |
| 7376 | struct ath10k_fw_stats_pdev, list); | |
| 7377 | if (!pdev) { | |
| 7378 | ath10k_warn(ar, "failed to get pdev stats\n"); | |
| 7379 | goto unlock; | |
| 7380 | } | |
| 7381 | ||
| 7382 | num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); | |
| 7383 | num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); | |
| 7384 | ||
| 7385 | ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); | |
| 7386 | ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len); | |
| 7387 | ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); | |
| 7388 | ||
| 7389 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7390 | "HW paused", pdev->hw_paused); | |
| 7391 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7392 | "Seqs posted", pdev->seq_posted); | |
| 7393 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7394 | "Seqs failed queueing", pdev->seq_failed_queueing); | |
| 7395 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7396 | "Seqs completed", pdev->seq_completed); | |
| 7397 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7398 | "Seqs restarted", pdev->seq_restarted); | |
| 7399 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7400 | "MU Seqs posted", pdev->mu_seq_posted); | |
| 7401 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7402 | "MPDUs SW flushed", pdev->mpdus_sw_flush); | |
| 7403 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7404 | "MPDUs HW filtered", pdev->mpdus_hw_filter); | |
| 7405 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7406 | "MPDUs truncated", pdev->mpdus_truncated); | |
| 7407 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7408 | "MPDUs receive no ACK", pdev->mpdus_ack_failed); | |
| 7409 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7410 | "MPDUs expired", pdev->mpdus_expired); | |
| 7411 | ||
| 7412 | ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); | |
| 7413 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7414 | "Num Rx Overflow errors", pdev->rx_ovfl_errs); | |
| 7415 | ||
| 7416 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7417 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7418 | "ath10k VDEV stats", num_vdevs); | |
| 7419 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7420 | "================="); | |
| 7421 | ||
| 7422 | list_for_each_entry(vdev, &fw_stats->vdevs, list) { | |
| 7423 | ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); | |
| 7424 | } | |
| 7425 | ||
| 7426 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7427 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7428 | "ath10k PEER stats", num_peers); | |
| 7429 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7430 | "================="); | |
| 7431 | ||
| 7432 | list_for_each_entry(peer, &fw_stats->peers, list) { | |
| 7433 | ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); | |
| 7434 | } | |
| 7435 | ||
| 7436 | unlock: | |
| 7437 | spin_unlock_bh(&ar->data_lock); | |
| 7438 | ||
| 7439 | if (len >= buf_len) | |
| 7440 | buf[len - 1] = 0; | |
| 7441 | else | |
| 7442 | buf[len] = 0; | |
| 7443 | } | |
| 7444 | ||
| 6e4de1a4 PO |
7445 | int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar, |
| 7446 | enum wmi_vdev_subtype subtype) | |
| 7447 | { | |
| 7448 | switch (subtype) { | |
| 7449 | case WMI_VDEV_SUBTYPE_NONE: | |
| 7450 | return WMI_VDEV_SUBTYPE_LEGACY_NONE; | |
| 7451 | case WMI_VDEV_SUBTYPE_P2P_DEVICE: | |
| 7452 | return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV; | |
| 7453 | case WMI_VDEV_SUBTYPE_P2P_CLIENT: | |
| 7454 | return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI; | |
| 7455 | case WMI_VDEV_SUBTYPE_P2P_GO: | |
| 7456 | return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO; | |
| 7457 | case WMI_VDEV_SUBTYPE_PROXY_STA: | |
| 7458 | return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA; | |
| 7459 | case WMI_VDEV_SUBTYPE_MESH_11S: | |
| 7460 | case WMI_VDEV_SUBTYPE_MESH_NON_11S: | |
| 7461 | return -ENOTSUPP; | |
| 7462 | } | |
| 7463 | return -ENOTSUPP; | |
| 7464 | } | |
| 7465 | ||
| 7466 | static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar, | |
| 7467 | enum wmi_vdev_subtype subtype) | |
| 7468 | { | |
| 7469 | switch (subtype) { | |
| 7470 | case WMI_VDEV_SUBTYPE_NONE: | |
| 7471 | return WMI_VDEV_SUBTYPE_10_2_4_NONE; | |
| 7472 | case WMI_VDEV_SUBTYPE_P2P_DEVICE: | |
| 7473 | return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV; | |
| 7474 | case WMI_VDEV_SUBTYPE_P2P_CLIENT: | |
| 7475 | return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI; | |
| 7476 | case WMI_VDEV_SUBTYPE_P2P_GO: | |
| 7477 | return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO; | |
| 7478 | case WMI_VDEV_SUBTYPE_PROXY_STA: | |
| 7479 | return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA; | |
| 7480 | case WMI_VDEV_SUBTYPE_MESH_11S: | |
| 7481 | return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S; | |
| 7482 | case WMI_VDEV_SUBTYPE_MESH_NON_11S: | |
| 7483 | return -ENOTSUPP; | |
| 7484 | } | |
| 7485 | return -ENOTSUPP; | |
| 7486 | } | |
| 7487 | ||
| 7488 | static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar, | |
| 7489 | enum wmi_vdev_subtype subtype) | |
| 7490 | { | |
| 7491 | switch (subtype) { | |
| 7492 | case WMI_VDEV_SUBTYPE_NONE: | |
| 7493 | return WMI_VDEV_SUBTYPE_10_4_NONE; | |
| 7494 | case WMI_VDEV_SUBTYPE_P2P_DEVICE: | |
| 7495 | return WMI_VDEV_SUBTYPE_10_4_P2P_DEV; | |
| 7496 | case WMI_VDEV_SUBTYPE_P2P_CLIENT: | |
| 7497 | return WMI_VDEV_SUBTYPE_10_4_P2P_CLI; | |
| 7498 | case WMI_VDEV_SUBTYPE_P2P_GO: | |
| 7499 | return WMI_VDEV_SUBTYPE_10_4_P2P_GO; | |
| 7500 | case WMI_VDEV_SUBTYPE_PROXY_STA: | |
| 7501 | return WMI_VDEV_SUBTYPE_10_4_PROXY_STA; | |
| 7502 | case WMI_VDEV_SUBTYPE_MESH_11S: | |
| 7503 | return WMI_VDEV_SUBTYPE_10_4_MESH_11S; | |
| 7504 | case WMI_VDEV_SUBTYPE_MESH_NON_11S: | |
| 7505 | return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S; | |
| 7506 | } | |
| 7507 | return -ENOTSUPP; | |
| 7508 | } | |
| 7509 | ||
| 47771902 RM |
7510 | static struct sk_buff * |
| 7511 | ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar, | |
| 7512 | enum wmi_host_platform_type type, | |
| 7513 | u32 fw_feature_bitmap) | |
| 7514 | { | |
| 7515 | struct wmi_ext_resource_config_10_4_cmd *cmd; | |
| 7516 | struct sk_buff *skb; | |
| 7517 | ||
| 7518 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 7519 | if (!skb) | |
| 7520 | return ERR_PTR(-ENOMEM); | |
| 7521 | ||
| 7522 | cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data; | |
| 7523 | cmd->host_platform_config = __cpu_to_le32(type); | |
| 7524 | cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap); | |
| 7525 | ||
| 7526 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 7527 | "wmi ext resource config host type %d firmware feature bitmap %08x\n", | |
| 7528 | type, fw_feature_bitmap); | |
| 7529 | return skb; | |
| 7530 | } | |
| 7531 | ||
| d7579d12 MK |
7532 | static const struct wmi_ops wmi_ops = { |
| 7533 | .rx = ath10k_wmi_op_rx, | |
| 7534 | .map_svc = wmi_main_svc_map, | |
| 7535 | ||
| 7536 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
| 7537 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
| 7538 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
| 7539 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
| 7540 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
| 7541 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
| 991adf71 | 7542 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
| d7579d12 MK |
7543 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
| 7544 | .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, | |
| 7545 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
| 7546 | .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats, | |
| c1a4654a | 7547 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
| d7579d12 MK |
7548 | |
| 7549 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
| 7550 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
| 7551 | .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd, | |
| 7552 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
| 7553 | .gen_init = ath10k_wmi_op_gen_init, | |
| 7554 | .gen_start_scan = ath10k_wmi_op_gen_start_scan, | |
| 7555 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
| 7556 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
| 7557 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
| 7558 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
| 7559 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
| 7560 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
| 7561 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
| 7562 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
| 7563 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
| 7564 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
| 7565 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
| 6d492fe2 | 7566 | /* .gen_vdev_wmm_conf not implemented */ |
| d7579d12 MK |
7567 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
| 7568 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
| 7569 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
| 7570 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
| 7571 | .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc, | |
| 7572 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
| 7573 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
| 7574 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
| 7575 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
| 7576 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
| 7577 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
| 7578 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
| 7579 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
| 7580 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
| 7581 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
| 7582 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
| 7583 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
| ffdd738d | 7584 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
| a57a6a27 | 7585 | /* .gen_pdev_get_temperature not implemented */ |
| dc8ab278 | 7586 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
| 65c0893d | 7587 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
| 11597413 | 7588 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
| 50abef85 | 7589 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
| bc6f9ae6 | 7590 | .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill, |
| 6e4de1a4 | 7591 | .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype, |
| be9ce9d8 | 7592 | /* .gen_bcn_tmpl not implemented */ |
| 4c4955fe | 7593 | /* .gen_prb_tmpl not implemented */ |
| 369242b4 | 7594 | /* .gen_p2p_go_bcn_ie not implemented */ |
| 5b272e30 | 7595 | /* .gen_adaptive_qcs not implemented */ |
| 62f77f09 | 7596 | /* .gen_pdev_enable_adaptive_cca not implemented */ |
| d7579d12 MK |
7597 | }; |
| 7598 | ||
| 7599 | static const struct wmi_ops wmi_10_1_ops = { | |
| 7600 | .rx = ath10k_wmi_10_1_op_rx, | |
| 7601 | .map_svc = wmi_10x_svc_map, | |
| 7602 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
| 7603 | .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats, | |
| 7604 | .gen_init = ath10k_wmi_10_1_op_gen_init, | |
| 7605 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | |
| 7606 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
| 7607 | .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc, | |
| a57a6a27 | 7608 | /* .gen_pdev_get_temperature not implemented */ |
| d7579d12 MK |
7609 | |
| 7610 | /* shared with main branch */ | |
| 7611 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
| 7612 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
| 7613 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
| 7614 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
| 7615 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
| 7616 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
| 991adf71 | 7617 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
| d7579d12 MK |
7618 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
| 7619 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
| c1a4654a | 7620 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
| d7579d12 MK |
7621 | |
| 7622 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
| 7623 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
| 7624 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
| 7625 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
| 7626 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
| 7627 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
| 7628 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
| 7629 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
| 7630 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
| 7631 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
| 7632 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
| 7633 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
| 7634 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
| 7635 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
| 6d492fe2 | 7636 | /* .gen_vdev_wmm_conf not implemented */ |
| d7579d12 MK |
7637 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
| 7638 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
| 7639 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
| 7640 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
| 7641 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
| 7642 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
| 7643 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
| 7644 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
| 7645 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
| 7646 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
| 7647 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
| 7648 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
| 7649 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
| 7650 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
| 7651 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
| 7652 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
| ffdd738d | 7653 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
| dc8ab278 | 7654 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
| 65c0893d | 7655 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
| 11597413 | 7656 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
| 50abef85 | 7657 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
| bc6f9ae6 | 7658 | .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, |
| 6e4de1a4 | 7659 | .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype, |
| be9ce9d8 | 7660 | /* .gen_bcn_tmpl not implemented */ |
| 4c4955fe | 7661 | /* .gen_prb_tmpl not implemented */ |
| 369242b4 | 7662 | /* .gen_p2p_go_bcn_ie not implemented */ |
| 5b272e30 | 7663 | /* .gen_adaptive_qcs not implemented */ |
| 62f77f09 | 7664 | /* .gen_pdev_enable_adaptive_cca not implemented */ |
| d7579d12 MK |
7665 | }; |
| 7666 | ||
| 7667 | static const struct wmi_ops wmi_10_2_ops = { | |
| 7668 | .rx = ath10k_wmi_10_2_op_rx, | |
| 20de2229 | 7669 | .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats, |
| d7579d12 MK |
7670 | .gen_init = ath10k_wmi_10_2_op_gen_init, |
| 7671 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | |
| a57a6a27 | 7672 | /* .gen_pdev_get_temperature not implemented */ |
| d7579d12 MK |
7673 | |
| 7674 | /* shared with 10.1 */ | |
| 7675 | .map_svc = wmi_10x_svc_map, | |
| 7676 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
| d7579d12 MK |
7677 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, |
| 7678 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
| 7679 | ||
| 7680 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
| 7681 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
| 7682 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
| 7683 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
| 7684 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
| 7685 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
| 991adf71 | 7686 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
| d7579d12 MK |
7687 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
| 7688 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
| c1a4654a | 7689 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
| d7579d12 MK |
7690 | |
| 7691 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
| 7692 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
| 7693 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
| 7694 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
| 7695 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
| 7696 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
| 7697 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
| 7698 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
| 7699 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
| 7700 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
| 7701 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
| 7702 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
| 7703 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
| 7704 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
| 6d492fe2 | 7705 | /* .gen_vdev_wmm_conf not implemented */ |
| d7579d12 MK |
7706 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
| 7707 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
| 7708 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
| 7709 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
| 7710 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
| 7711 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
| 7712 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
| 7713 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
| 7714 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
| 7715 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
| 7716 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
| 7717 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
| 7718 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
| 7719 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
| 7720 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
| 7721 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
| ffdd738d | 7722 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
| dc8ab278 | 7723 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
| 65c0893d | 7724 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
| 11597413 | 7725 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
| 50abef85 | 7726 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
| bc6f9ae6 | 7727 | .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, |
| 6e4de1a4 | 7728 | .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype, |
| 62f77f09 | 7729 | /* .gen_pdev_enable_adaptive_cca not implemented */ |
| d7579d12 MK |
7730 | }; |
| 7731 | ||
| 4a16fbec RM |
7732 | static const struct wmi_ops wmi_10_2_4_ops = { |
| 7733 | .rx = ath10k_wmi_10_2_op_rx, | |
| 20de2229 | 7734 | .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats, |
| 4a16fbec RM |
7735 | .gen_init = ath10k_wmi_10_2_op_gen_init, |
| 7736 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | |
| a57a6a27 | 7737 | .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature, |
| 4a16fbec RM |
7738 | |
| 7739 | /* shared with 10.1 */ | |
| 7740 | .map_svc = wmi_10x_svc_map, | |
| 7741 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
| 4a16fbec RM |
7742 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, |
| 7743 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
| 7744 | ||
| 7745 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
| 7746 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
| 7747 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
| 7748 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
| 7749 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
| 8b019fb0 | 7750 | .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev, |
| 991adf71 | 7751 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
| 4a16fbec RM |
7752 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
| 7753 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
| c1a4654a | 7754 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
| 4a16fbec RM |
7755 | |
| 7756 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
| 7757 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
| 7758 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
| 7759 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
| 7760 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
| 7761 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
| 7762 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
| 7763 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
| 7764 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
| 7765 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
| 7766 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
| 7767 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
| 7768 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
| 7769 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
| 7770 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, | |
| 7771 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
| 7772 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
| 7773 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
| 7774 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
| 7775 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
| 7776 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
| 7777 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
| 7778 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
| 7779 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
| 7780 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
| 7781 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
| 7782 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
| 7783 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
| 7784 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
| 7785 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
| ffdd738d | 7786 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
| dc8ab278 | 7787 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
| 65c0893d | 7788 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
| 11597413 | 7789 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
| 50abef85 | 7790 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
| 29542666 | 7791 | .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config, |
| bc6f9ae6 | 7792 | .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, |
| 62f77f09 M |
7793 | .gen_pdev_enable_adaptive_cca = |
| 7794 | ath10k_wmi_op_gen_pdev_enable_adaptive_cca, | |
| 6e4de1a4 | 7795 | .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype, |
| be9ce9d8 | 7796 | /* .gen_bcn_tmpl not implemented */ |
| 4c4955fe | 7797 | /* .gen_prb_tmpl not implemented */ |
| 369242b4 | 7798 | /* .gen_p2p_go_bcn_ie not implemented */ |
| 5b272e30 | 7799 | /* .gen_adaptive_qcs not implemented */ |
| 4a16fbec RM |
7800 | }; |
| 7801 | ||
| 840357cc | 7802 | static const struct wmi_ops wmi_10_4_ops = { |
| 1c092961 | 7803 | .rx = ath10k_wmi_10_4_op_rx, |
| 840357cc | 7804 | .map_svc = wmi_10_4_svc_map, |
| b2297baa | 7805 | |
| 98dd2b92 | 7806 | .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats, |
| b2297baa | 7807 | .pull_scan = ath10k_wmi_op_pull_scan_ev, |
| 1c092961 | 7808 | .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev, |
| b2297baa | 7809 | .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev, |
| 373b48cf RM |
7810 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, |
| 7811 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
| 3cec3be3 | 7812 | .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev, |
| 2b0a2e0d RM |
7813 | .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr, |
| 7814 | .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev, | |
| 1c092961 | 7815 | .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, |
| d02e752f | 7816 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, |
| 08e75ea8 | 7817 | .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme, |
| 373b48cf RM |
7818 | |
| 7819 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
| 7820 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
| 7821 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | |
| 7822 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
| d1e52a8e | 7823 | .gen_init = ath10k_wmi_10_4_op_gen_init, |
| b2297baa RM |
7824 | .gen_start_scan = ath10k_wmi_op_gen_start_scan, |
| 7825 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
| 373b48cf RM |
7826 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, |
| 7827 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
| 7828 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
| 7829 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
| 7830 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
| 7831 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
| 7832 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
| 7833 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
| 4535edbd RM |
7834 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, |
| 7835 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
| 373b48cf RM |
7836 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
| 7837 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
| 7838 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
| 7839 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
| b54e16f1 | 7840 | .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc, |
| 373b48cf RM |
7841 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, |
| 7842 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
| 7843 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
| 7844 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
| 7845 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
| 7846 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
| 7847 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
| 7848 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
| 7849 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
| 7850 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
| 7851 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
| 7852 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, | |
| b2887410 VT |
7853 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
| 7854 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, | |
| 7855 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, | |
| 7856 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, | |
| 98dd2b92 | 7857 | .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill, |
| 47771902 | 7858 | .ext_resource_config = ath10k_wmi_10_4_ext_resource_config, |
| 373b48cf RM |
7859 | |
| 7860 | /* shared with 10.2 */ | |
| 98dd2b92 | 7861 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, |
| 6dd46348 | 7862 | .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature, |
| 6e4de1a4 | 7863 | .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype, |
| 840357cc RM |
7864 | }; |
| 7865 | ||
| b79b9baa MK |
7866 | int ath10k_wmi_attach(struct ath10k *ar) |
| 7867 | { | |
| d7579d12 | 7868 | switch (ar->wmi.op_version) { |
| 9bd21322 | 7869 | case ATH10K_FW_WMI_OP_VERSION_10_4: |
| 840357cc | 7870 | ar->wmi.ops = &wmi_10_4_ops; |
| 2d491e69 | 7871 | ar->wmi.cmd = &wmi_10_4_cmd_map; |
| 93841a15 | 7872 | ar->wmi.vdev_param = &wmi_10_4_vdev_param_map; |
| d86561ff | 7873 | ar->wmi.pdev_param = &wmi_10_4_pdev_param_map; |
| 3fab30f7 | 7874 | ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; |
| 9bd21322 | 7875 | break; |
| 4a16fbec RM |
7876 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: |
| 7877 | ar->wmi.cmd = &wmi_10_2_4_cmd_map; | |
| 7878 | ar->wmi.ops = &wmi_10_2_4_ops; | |
| 7879 | ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map; | |
| 7880 | ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map; | |
| 3fab30f7 | 7881 | ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; |
| 4a16fbec | 7882 | break; |
| d7579d12 MK |
7883 | case ATH10K_FW_WMI_OP_VERSION_10_2: |
| 7884 | ar->wmi.cmd = &wmi_10_2_cmd_map; | |
| 7885 | ar->wmi.ops = &wmi_10_2_ops; | |
| b79b9baa MK |
7886 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; |
| 7887 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; | |
| 3fab30f7 | 7888 | ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; |
| d7579d12 MK |
7889 | break; |
| 7890 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
| 7891 | ar->wmi.cmd = &wmi_10x_cmd_map; | |
| 7892 | ar->wmi.ops = &wmi_10_1_ops; | |
| 7893 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; | |
| 7894 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; | |
| 3fab30f7 | 7895 | ar->wmi.peer_flags = &wmi_10x_peer_flags_map; |
| d7579d12 MK |
7896 | break; |
| 7897 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
| b79b9baa | 7898 | ar->wmi.cmd = &wmi_cmd_map; |
| d7579d12 | 7899 | ar->wmi.ops = &wmi_ops; |
| b79b9baa MK |
7900 | ar->wmi.vdev_param = &wmi_vdev_param_map; |
| 7901 | ar->wmi.pdev_param = &wmi_pdev_param_map; | |
| 3fab30f7 | 7902 | ar->wmi.peer_flags = &wmi_peer_flags_map; |
| d7579d12 | 7903 | break; |
| ca996ec5 MK |
7904 | case ATH10K_FW_WMI_OP_VERSION_TLV: |
| 7905 | ath10k_wmi_tlv_attach(ar); | |
| 7906 | break; | |
| d7579d12 MK |
7907 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
| 7908 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
| 7909 | ath10k_err(ar, "unsupported WMI op version: %d\n", | |
| 7910 | ar->wmi.op_version); | |
| 7911 | return -EINVAL; | |
| b79b9baa MK |
7912 | } |
| 7913 | ||
| 7914 | init_completion(&ar->wmi.service_ready); | |
| 7915 | init_completion(&ar->wmi.unified_ready); | |
| b79b9baa | 7916 | |
| c8ecfc1c RM |
7917 | INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work); |
| 7918 | ||
| b79b9baa MK |
7919 | return 0; |
| 7920 | } | |
| 7921 | ||
| a925a376 | 7922 | void ath10k_wmi_free_host_mem(struct ath10k *ar) |
| b79b9baa MK |
7923 | { |
| 7924 | int i; | |
| 7925 | ||
| 7926 | /* free the host memory chunks requested by firmware */ | |
| 7927 | for (i = 0; i < ar->wmi.num_mem_chunks; i++) { | |
| b0578865 FF |
7928 | dma_unmap_single(ar->dev, |
| 7929 | ar->wmi.mem_chunks[i].paddr, | |
| 7930 | ar->wmi.mem_chunks[i].len, | |
| 7931 | DMA_TO_DEVICE); | |
| 7932 | kfree(ar->wmi.mem_chunks[i].vaddr); | |
| b79b9baa MK |
7933 | } |
| 7934 | ||
| 7935 | ar->wmi.num_mem_chunks = 0; | |
| 7936 | } | |
| a925a376 VT |
7937 | |
| 7938 | void ath10k_wmi_detach(struct ath10k *ar) | |
| 7939 | { | |
| 7940 | cancel_work_sync(&ar->svc_rdy_work); | |
| 7941 | ||
| 7942 | if (ar->svc_rdy_skb) | |
| 7943 | dev_kfree_skb(ar->svc_rdy_skb); | |
| 7944 | } |