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ath10k: workaround fw beaconing bug
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
5e3dd157
KV		 20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
25#include "mac.h"
43d2a30f 26#include "testmode.h"
5e3dd157 27
ce42870e
BM		 28/* MAIN WMI cmd track */
29static struct wmi_cmd_map wmi_cmd_map = {
30 .init_cmdid = WMI_INIT_CMDID,
31 .start_scan_cmdid = WMI_START_SCAN_CMDID,
32 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
33 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
34 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
35 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
36 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
37 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
38 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
39 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
40 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
41 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
42 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
43 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
44 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
45 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
46 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
47 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
48 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
49 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
50 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
51 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
52 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
53 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
54 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
55 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
56 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
57 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
58 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
59 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
60 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
61 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
62 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
63 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
64 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
65 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
66 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
67 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
68 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
69 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
70 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
71 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
72 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
73 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
74 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
75 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
76 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
77 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
78 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
79 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
80 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
81 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
82 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
83 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
84 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
85 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
86 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
87 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
88 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
89 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
90 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
91 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
92 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
93 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
94 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
95 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
96 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
97 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
98 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
99 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
100 .wlan_profile_set_hist_intvl_cmdid =
101 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
102 .wlan_profile_get_profile_data_cmdid =
103 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
104 .wlan_profile_enable_profile_id_cmdid =
105 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
106 .wlan_profile_list_profile_id_cmdid =
107 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
108 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
109 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
110 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
111 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
112 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
113 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
114 .wow_enable_disable_wake_event_cmdid =
115 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
116 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
117 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
118 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
119 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
120 .vdev_spectral_scan_configure_cmdid =
121 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
122 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
123 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
124 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
125 .network_list_offload_config_cmdid =
126 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
127 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
128 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
129 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
130 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
131 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
132 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
133 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
134 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
135 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
136 .echo_cmdid = WMI_ECHO_CMDID,
137 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
138 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
139 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
140 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
141 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
142 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
143 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
144 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
145 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
146};
147
b7e3adf9
BM		 148/* 10.X WMI cmd track */
149static struct wmi_cmd_map wmi_10x_cmd_map = {
150 .init_cmdid = WMI_10X_INIT_CMDID,
151 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
152 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
153 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 154 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 155 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
156 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
157 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
158 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
159 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
160 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
161 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
162 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
163 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
164 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
165 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
166 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
167 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
168 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
169 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
170 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
171 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
172 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
173 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
174 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
175 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
176 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
177 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
178 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
179 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
180 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
181 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
182 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
183 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
184 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
185 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
186 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 187 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 188 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
189 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
190 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 191 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 192 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
193 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
194 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
195 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
196 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
197 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
198 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
199 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
200 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
201 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
202 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
203 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
204 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
205 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
206 .roam_scan_rssi_change_threshold =
207 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
208 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
209 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
210 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
211 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
212 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
213 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
214 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
215 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 216 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 217 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 218 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 219 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
220 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
221 .wlan_profile_set_hist_intvl_cmdid =
222 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
223 .wlan_profile_get_profile_data_cmdid =
224 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
225 .wlan_profile_enable_profile_id_cmdid =
226 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
227 .wlan_profile_list_profile_id_cmdid =
228 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
229 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
230 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
231 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
232 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
233 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
234 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
235 .wow_enable_disable_wake_event_cmdid =
236 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
237 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
238 .wow_hostwakeup_from_sleep_cmdid =
239 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
240 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
241 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
242 .vdev_spectral_scan_configure_cmdid =
243 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
244 .vdev_spectral_scan_enable_cmdid =
245 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
246 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
34957b25
BM		 247 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
248 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
249 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
250 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
251 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
252 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
253 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
254 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
255 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
256 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
257 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 258 .echo_cmdid = WMI_10X_ECHO_CMDID,
259 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
260 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
261 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
34957b25
BM		 262 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
263 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
264 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
265 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 266 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
267 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
268};
ce42870e 269
6d1506e7
BM		 270/* MAIN WMI VDEV param map */
271static struct wmi_vdev_param_map wmi_vdev_param_map = {
272 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
273 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
274 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
275 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
276 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
277 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
278 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
279 .preamble = WMI_VDEV_PARAM_PREAMBLE,
280 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
281 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
282 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
283 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
284 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
285 .wmi_vdev_oc_scheduler_air_time_limit =
286 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
287 .wds = WMI_VDEV_PARAM_WDS,
288 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
289 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
290 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
291 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
292 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
293 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
294 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
295 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
296 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
297 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
298 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
299 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
300 .sgi = WMI_VDEV_PARAM_SGI,
301 .ldpc = WMI_VDEV_PARAM_LDPC,
302 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
303 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
304 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
305 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
306 .nss = WMI_VDEV_PARAM_NSS,
307 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
308 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
309 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
310 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
311 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
312 .ap_keepalive_min_idle_inactive_time_secs =
313 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
314 .ap_keepalive_max_idle_inactive_time_secs =
315 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
316 .ap_keepalive_max_unresponsive_time_secs =
317 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
318 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
319 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
320 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
321 .txbf = WMI_VDEV_PARAM_TXBF,
322 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
323 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
324 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
325 .ap_detect_out_of_sync_sleeping_sta_time_secs =
326 WMI_VDEV_PARAM_UNSUPPORTED,
327};
328
329/* 10.X WMI VDEV param map */
330static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
331 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
332 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
333 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
334 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
335 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
336 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
337 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
338 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
339 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
340 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
341 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
342 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
343 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
344 .wmi_vdev_oc_scheduler_air_time_limit =
345 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
346 .wds = WMI_10X_VDEV_PARAM_WDS,
347 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
348 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
349 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
350 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
351 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
352 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
353 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
354 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
355 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
356 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
357 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
358 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
359 .sgi = WMI_10X_VDEV_PARAM_SGI,
360 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
361 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
362 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
363 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
364 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
365 .nss = WMI_10X_VDEV_PARAM_NSS,
366 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
367 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
368 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
369 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
370 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
371 .ap_keepalive_min_idle_inactive_time_secs =
372 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
373 .ap_keepalive_max_idle_inactive_time_secs =
374 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
375 .ap_keepalive_max_unresponsive_time_secs =
376 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
377 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
378 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
379 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
380 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
381 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
382 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
383 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
384 .ap_detect_out_of_sync_sleeping_sta_time_secs =
385 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
386};
387
226a339b
BM		 388static struct wmi_pdev_param_map wmi_pdev_param_map = {
389 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
390 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
391 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
392 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
393 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
394 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
395 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
396 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
397 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
398 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
399 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
400 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
401 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
402 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
403 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
404 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
405 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
406 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
407 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
408 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
409 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
410 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
411 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
412 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
413 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
414 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
415 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
416 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
417 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
418 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
419 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
420 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
421 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
422 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
423 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
226a339b
BM		 424 .dcs = WMI_PDEV_PARAM_DCS,
425 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
426 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
427 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
428 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
429 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
430 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
431 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
432 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
433 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
434 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
435 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
436 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
437};
438
439static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
440 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
441 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
442 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
443 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
444 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
445 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
446 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
447 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
448 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
449 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
450 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
451 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
452 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
453 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
454 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
455 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
456 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
457 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
458 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
459 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
460 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
461 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
462 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
463 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
464 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
465 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
466 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
467 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
468 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
469 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
470 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
471 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
472 .bcnflt_stats_update_period =
473 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
474 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
ab6258ed 475 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
226a339b
BM		 476 .dcs = WMI_10X_PDEV_PARAM_DCS,
477 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
478 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
479 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
480 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
481 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
482 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
483 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
484 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
485 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
486 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
487 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
488 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
489};
490
24c88f78
MK		 491/* firmware 10.2 specific mappings */
492static struct wmi_cmd_map wmi_10_2_cmd_map = {
493 .init_cmdid = WMI_10_2_INIT_CMDID,
494 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
495 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
496 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
497 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
498 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
499 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
500 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
501 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
502 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
503 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
504 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
505 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
506 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
507 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
508 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
509 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
510 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
511 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
512 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
513 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
514 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
515 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
516 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
517 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
518 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
519 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
520 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
521 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
522 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
523 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
524 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
525 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
526 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
527 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
528 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
529 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
530 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
531 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
532 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
533 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
534 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
535 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
536 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
537 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
538 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
539 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
540 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
541 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
542 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
543 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
544 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
545 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
546 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
547 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
548 .roam_scan_rssi_change_threshold =
549 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
550 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
551 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
552 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
553 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
554 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
555 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
556 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
557 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
558 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
559 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
560 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
561 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
562 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
563 .wlan_profile_set_hist_intvl_cmdid =
564 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
565 .wlan_profile_get_profile_data_cmdid =
566 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
567 .wlan_profile_enable_profile_id_cmdid =
568 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
569 .wlan_profile_list_profile_id_cmdid =
570 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
571 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
572 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
573 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
574 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
575 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
576 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
577 .wow_enable_disable_wake_event_cmdid =
578 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
579 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
580 .wow_hostwakeup_from_sleep_cmdid =
581 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
582 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
583 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
584 .vdev_spectral_scan_configure_cmdid =
585 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
586 .vdev_spectral_scan_enable_cmdid =
587 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
588 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
589 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
590 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
591 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
592 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
593 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
594 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
595 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
596 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
597 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
598 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
599 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
600 .echo_cmdid = WMI_10_2_ECHO_CMDID,
601 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
602 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
603 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
604 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
605 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
606 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
607 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
608 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
609 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
610};
611
5e3dd157
KV		 612int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
613{
614 int ret;
af762c0b 615
5e3dd157
KV		 616 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
617 WMI_SERVICE_READY_TIMEOUT_HZ);
618 return ret;
619}
620
621int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
622{
623 int ret;
af762c0b 624
5e3dd157
KV		 625 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
626 WMI_UNIFIED_READY_TIMEOUT_HZ);
627 return ret;
628}
629
666a73f3 630struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
5e3dd157
KV		 631{
632 struct sk_buff *skb;
633 u32 round_len = roundup(len, 4);
634
7aa7a72a 635 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
5e3dd157
KV		 636 if (!skb)
637 return NULL;
638
639 skb_reserve(skb, WMI_SKB_HEADROOM);
640 if (!IS_ALIGNED((unsigned long)skb->data, 4))
7aa7a72a 641 ath10k_warn(ar, "Unaligned WMI skb\n");
5e3dd157
KV		 642
643 skb_put(skb, round_len);
644 memset(skb->data, 0, round_len);
645
646 return skb;
647}
648
649static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
650{
651 dev_kfree_skb(skb);
5e3dd157
KV		 652}
653
be8b3943 654static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
ce42870e 655 u32 cmd_id)
5e3dd157
KV		 656{
657 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
658 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 659 int ret;
5e3dd157
KV		 660 u32 cmd = 0;
661
662 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
663 return -ENOMEM;
664
665 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
666
667 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
668 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
669
5e3dd157 670 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943 671 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
d35a6c18 672 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
5e3dd157 673
be8b3943
MK		 674 if (ret)
675 goto err_pull;
5e3dd157 676
be8b3943
MK		 677 return 0;
678
679err_pull:
680 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
681 return ret;
682}
683
ed54388a
MK		 684static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
685{
ed54388a
MK		 686 int ret;
687
688 lockdep_assert_held(&arvif->ar->data_lock);
689
690 if (arvif->beacon == NULL)
691 return;
692
748afc47
MK		 693 if (arvif->beacon_sent)
694 return;
ed54388a 695
748afc47 696 ret = ath10k_wmi_beacon_send_ref_nowait(arvif);
ed54388a
MK		 697 if (ret)
698 return;
699
748afc47
MK		 700 /* We need to retain the arvif->beacon reference for DMA unmapping and
701 * freeing the skbuff later. */
702 arvif->beacon_sent = true;
ed54388a
MK		 703}
704
705static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
706 struct ieee80211_vif *vif)
707{
708 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
709
710 ath10k_wmi_tx_beacon_nowait(arvif);
711}
712
713static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
714{
715 spin_lock_bh(&ar->data_lock);
716 ieee80211_iterate_active_interfaces_atomic(ar->hw,
717 IEEE80211_IFACE_ITER_NORMAL,
718 ath10k_wmi_tx_beacons_iter,
719 NULL);
720 spin_unlock_bh(&ar->data_lock);
721}
722
12acbc43 723static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 724{
ed54388a
MK		 725 /* try to send pending beacons first. they take priority */
726 ath10k_wmi_tx_beacons_nowait(ar);
727
be8b3943
MK		 728 wake_up(&ar->wmi.tx_credits_wq);
729}
730
666a73f3 731int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
be8b3943 732{
34957b25 733 int ret = -EOPNOTSUPP;
be8b3943 734
56b84287
KV		 735 might_sleep();
736
34957b25 737 if (cmd_id == WMI_CMD_UNSUPPORTED) {
7aa7a72a 738 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
55321559
BM		 739 cmd_id);
740 return ret;
741 }
be8b3943
MK		 742
743 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK		 744 /* try to send pending beacons first. they take priority */
745 ath10k_wmi_tx_beacons_nowait(ar);
746
be8b3943
MK		 747 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
748 (ret != -EAGAIN);
749 }), 3*HZ);
750
751 if (ret)
5e3dd157 752 dev_kfree_skb_any(skb);
5e3dd157 753
be8b3943 754 return ret;
5e3dd157
KV		 755}
756
5e00d31a
BM		 757int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
758{
759 int ret = 0;
760 struct wmi_mgmt_tx_cmd *cmd;
761 struct ieee80211_hdr *hdr;
762 struct sk_buff *wmi_skb;
763 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
764 int len;
eeab266c 765 u32 buf_len = skb->len;
5e00d31a
BM		 766 u16 fc;
767
768 hdr = (struct ieee80211_hdr *)skb->data;
769 fc = le16_to_cpu(hdr->frame_control);
770
771 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
772 return -EINVAL;
773
774 len = sizeof(cmd->hdr) + skb->len;
eeab266c
MK		 775
776 if ((ieee80211_is_action(hdr->frame_control) ||
777 ieee80211_is_deauth(hdr->frame_control) ||
778 ieee80211_is_disassoc(hdr->frame_control)) &&
779 ieee80211_has_protected(hdr->frame_control)) {
780 len += IEEE80211_CCMP_MIC_LEN;
781 buf_len += IEEE80211_CCMP_MIC_LEN;
782 }
783
5e00d31a
BM		 784 len = round_up(len, 4);
785
7aa7a72a 786 wmi_skb = ath10k_wmi_alloc_skb(ar, len);
5e00d31a
BM		 787 if (!wmi_skb)
788 return -ENOMEM;
789
790 cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
791
792 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
793 cmd->hdr.tx_rate = 0;
794 cmd->hdr.tx_power = 0;
eeab266c 795 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
5e00d31a 796
b25f32cb 797 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
5e00d31a
BM		 798 memcpy(cmd->buf, skb->data, skb->len);
799
7aa7a72a 800 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
5e00d31a
BM		 801 wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
802 fc & IEEE80211_FCTL_STYPE);
803
804 /* Send the management frame buffer to the target */
805 ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
5fb5e41f 806 if (ret)
5e00d31a 807 return ret;
5e00d31a
BM		 808
809 /* TODO: report tx status to mac80211 - temporary just ACK */
810 info->flags |= IEEE80211_TX_STAT_ACK;
811 ieee80211_tx_status_irqsafe(ar->hw, skb);
812
813 return ret;
814}
815
5c81c7fd
MK		 816static void ath10k_wmi_event_scan_started(struct ath10k *ar)
817{
818 lockdep_assert_held(&ar->data_lock);
819
820 switch (ar->scan.state) {
821 case ATH10K_SCAN_IDLE:
822 case ATH10K_SCAN_RUNNING:
823 case ATH10K_SCAN_ABORTING:
7aa7a72a 824 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 825 ath10k_scan_state_str(ar->scan.state),
826 ar->scan.state);
827 break;
828 case ATH10K_SCAN_STARTING:
829 ar->scan.state = ATH10K_SCAN_RUNNING;
830
831 if (ar->scan.is_roc)
832 ieee80211_ready_on_channel(ar->hw);
833
834 complete(&ar->scan.started);
835 break;
836 }
837}
838
839static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
840{
841 lockdep_assert_held(&ar->data_lock);
842
843 switch (ar->scan.state) {
844 case ATH10K_SCAN_IDLE:
845 case ATH10K_SCAN_STARTING:
846 /* One suspected reason scan can be completed while starting is
847 * if firmware fails to deliver all scan events to the host,
848 * e.g. when transport pipe is full. This has been observed
849 * with spectral scan phyerr events starving wmi transport
850 * pipe. In such case the "scan completed" event should be (and
851 * is) ignored by the host as it may be just firmware's scan
852 * state machine recovering.
853 */
7aa7a72a 854 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 855 ath10k_scan_state_str(ar->scan.state),
856 ar->scan.state);
857 break;
858 case ATH10K_SCAN_RUNNING:
859 case ATH10K_SCAN_ABORTING:
860 __ath10k_scan_finish(ar);
861 break;
862 }
863}
864
865static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
866{
867 lockdep_assert_held(&ar->data_lock);
868
869 switch (ar->scan.state) {
870 case ATH10K_SCAN_IDLE:
871 case ATH10K_SCAN_STARTING:
7aa7a72a 872 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 873 ath10k_scan_state_str(ar->scan.state),
874 ar->scan.state);
875 break;
876 case ATH10K_SCAN_RUNNING:
877 case ATH10K_SCAN_ABORTING:
878 ar->scan_channel = NULL;
879 break;
880 }
881}
882
883static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
884{
885 lockdep_assert_held(&ar->data_lock);
886
887 switch (ar->scan.state) {
888 case ATH10K_SCAN_IDLE:
889 case ATH10K_SCAN_STARTING:
7aa7a72a 890 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 891 ath10k_scan_state_str(ar->scan.state),
892 ar->scan.state);
893 break;
894 case ATH10K_SCAN_RUNNING:
895 case ATH10K_SCAN_ABORTING:
896 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
897
898 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
899 complete(&ar->scan.on_channel);
900 break;
901 }
902}
903
9ff8b724
MK		 904static const char *
905ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
906 enum wmi_scan_completion_reason reason)
907{
908 switch (type) {
909 case WMI_SCAN_EVENT_STARTED:
910 return "started";
911 case WMI_SCAN_EVENT_COMPLETED:
912 switch (reason) {
913 case WMI_SCAN_REASON_COMPLETED:
914 return "completed";
915 case WMI_SCAN_REASON_CANCELLED:
916 return "completed [cancelled]";
917 case WMI_SCAN_REASON_PREEMPTED:
918 return "completed [preempted]";
919 case WMI_SCAN_REASON_TIMEDOUT:
920 return "completed [timedout]";
921 case WMI_SCAN_REASON_MAX:
922 break;
923 }
924 return "completed [unknown]";
925 case WMI_SCAN_EVENT_BSS_CHANNEL:
926 return "bss channel";
927 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
928 return "foreign channel";
929 case WMI_SCAN_EVENT_DEQUEUED:
930 return "dequeued";
931 case WMI_SCAN_EVENT_PREEMPTED:
932 return "preempted";
933 case WMI_SCAN_EVENT_START_FAILED:
934 return "start failed";
935 default:
936 return "unknown";
937 }
938}
939
5e3dd157
KV		 940static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
941{
942 struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
943 enum wmi_scan_event_type event_type;
944 enum wmi_scan_completion_reason reason;
945 u32 freq;
946 u32 req_id;
947 u32 scan_id;
948 u32 vdev_id;
949
950 event_type = __le32_to_cpu(event->event_type);
951 reason = __le32_to_cpu(event->reason);
952 freq = __le32_to_cpu(event->channel_freq);
953 req_id = __le32_to_cpu(event->scan_req_id);
954 scan_id = __le32_to_cpu(event->scan_id);
955 vdev_id = __le32_to_cpu(event->vdev_id);
956
5c81c7fd
MK		 957 spin_lock_bh(&ar->data_lock);
958
7aa7a72a 959 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c81c7fd 960 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
9ff8b724 961 ath10k_wmi_event_scan_type_str(event_type, reason),
5c81c7fd
MK		 962 event_type, reason, freq, req_id, scan_id, vdev_id,
963 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
5e3dd157
KV		 964
965 switch (event_type) {
966 case WMI_SCAN_EVENT_STARTED:
5c81c7fd 967 ath10k_wmi_event_scan_started(ar);
5e3dd157
KV		 968 break;
969 case WMI_SCAN_EVENT_COMPLETED:
5c81c7fd 970 ath10k_wmi_event_scan_completed(ar);
5e3dd157
KV		 971 break;
972 case WMI_SCAN_EVENT_BSS_CHANNEL:
5c81c7fd 973 ath10k_wmi_event_scan_bss_chan(ar);
5e3dd157
KV		 974 break;
975 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
5c81c7fd
MK		 976 ath10k_wmi_event_scan_foreign_chan(ar, freq);
977 break;
978 case WMI_SCAN_EVENT_START_FAILED:
7aa7a72a 979 ath10k_warn(ar, "received scan start failure event\n");
5e3dd157
KV		 980 break;
981 case WMI_SCAN_EVENT_DEQUEUED:
5e3dd157 982 case WMI_SCAN_EVENT_PREEMPTED:
5e3dd157
KV		 983 default:
984 break;
985 }
986
987 spin_unlock_bh(&ar->data_lock);
988 return 0;
989}
990
991static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
992{
993 enum ieee80211_band band;
994
995 switch (phy_mode) {
996 case MODE_11A:
997 case MODE_11NA_HT20:
998 case MODE_11NA_HT40:
999 case MODE_11AC_VHT20:
1000 case MODE_11AC_VHT40:
1001 case MODE_11AC_VHT80:
1002 band = IEEE80211_BAND_5GHZ;
1003 break;
1004 case MODE_11G:
1005 case MODE_11B:
1006 case MODE_11GONLY:
1007 case MODE_11NG_HT20:
1008 case MODE_11NG_HT40:
1009 case MODE_11AC_VHT20_2G:
1010 case MODE_11AC_VHT40_2G:
1011 case MODE_11AC_VHT80_2G:
1012 default:
1013 band = IEEE80211_BAND_2GHZ;
1014 }
1015
1016 return band;
1017}
1018
1019static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
1020{
1021 u8 rate_idx = 0;
1022
1023 /* rate in Kbps */
1024 switch (rate) {
1025 case 1000:
1026 rate_idx = 0;
1027 break;
1028 case 2000:
1029 rate_idx = 1;
1030 break;
1031 case 5500:
1032 rate_idx = 2;
1033 break;
1034 case 11000:
1035 rate_idx = 3;
1036 break;
1037 case 6000:
1038 rate_idx = 4;
1039 break;
1040 case 9000:
1041 rate_idx = 5;
1042 break;
1043 case 12000:
1044 rate_idx = 6;
1045 break;
1046 case 18000:
1047 rate_idx = 7;
1048 break;
1049 case 24000:
1050 rate_idx = 8;
1051 break;
1052 case 36000:
1053 rate_idx = 9;
1054 break;
1055 case 48000:
1056 rate_idx = 10;
1057 break;
1058 case 54000:
1059 rate_idx = 11;
1060 break;
1061 default:
1062 break;
1063 }
1064
1065 if (band == IEEE80211_BAND_5GHZ) {
1066 if (rate_idx > 3)
1067 /* Omit CCK rates */
1068 rate_idx -= 4;
1069 else
1070 rate_idx = 0;
1071 }
1072
1073 return rate_idx;
1074}
1075
1076static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
1077{
0d9b0438
MK		 1078 struct wmi_mgmt_rx_event_v1 *ev_v1;
1079 struct wmi_mgmt_rx_event_v2 *ev_v2;
1080 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
5e3dd157 1081 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
453cdb61 1082 struct ieee80211_channel *ch;
5e3dd157
KV		 1083 struct ieee80211_hdr *hdr;
1084 u32 rx_status;
1085 u32 channel;
1086 u32 phy_mode;
1087 u32 snr;
1088 u32 rate;
1089 u32 buf_len;
1090 u16 fc;
0d9b0438
MK		 1091 int pull_len;
1092
1093 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
1094 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
1095 ev_hdr = &ev_v2->hdr.v1;
1096 pull_len = sizeof(*ev_v2);
1097 } else {
1098 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
1099 ev_hdr = &ev_v1->hdr;
1100 pull_len = sizeof(*ev_v1);
1101 }
5e3dd157 1102
0d9b0438
MK		 1103 channel = __le32_to_cpu(ev_hdr->channel);
1104 buf_len = __le32_to_cpu(ev_hdr->buf_len);
1105 rx_status = __le32_to_cpu(ev_hdr->status);
1106 snr = __le32_to_cpu(ev_hdr->snr);
1107 phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
1108 rate = __le32_to_cpu(ev_hdr->rate);
5e3dd157
KV		 1109
1110 memset(status, 0, sizeof(*status));
1111
7aa7a72a 1112 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1113 "event mgmt rx status %08x\n", rx_status);
1114
e8a50f8b
MP		 1115 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1116 dev_kfree_skb(skb);
1117 return 0;
1118 }
1119
5e3dd157
KV		 1120 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
1121 dev_kfree_skb(skb);
1122 return 0;
1123 }
1124
1125 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
1126 dev_kfree_skb(skb);
1127 return 0;
1128 }
1129
1130 if (rx_status & WMI_RX_STATUS_ERR_CRC)
1131 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1132 if (rx_status & WMI_RX_STATUS_ERR_MIC)
1133 status->flag |= RX_FLAG_MMIC_ERROR;
1134
453cdb61
MK		 1135 /* HW can Rx CCK rates on 5GHz. In that case phy_mode is set to
1136 * MODE_11B. This means phy_mode is not a reliable source for the band
1137 * of mgmt rx. */
1138
1139 ch = ar->scan_channel;
1140 if (!ch)
1141 ch = ar->rx_channel;
1142
1143 if (ch) {
1144 status->band = ch->band;
1145
1146 if (phy_mode == MODE_11B &&
1147 status->band == IEEE80211_BAND_5GHZ)
7aa7a72a 1148 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
453cdb61 1149 } else {
7aa7a72a 1150 ath10k_warn(ar, "using (unreliable) phy_mode to extract band for mgmt rx\n");
453cdb61
MK		 1151 status->band = phy_mode_to_band(phy_mode);
1152 }
1153
5e3dd157
KV		 1154 status->freq = ieee80211_channel_to_frequency(channel, status->band);
1155 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
1156 status->rate_idx = get_rate_idx(rate, status->band);
1157
0d9b0438 1158 skb_pull(skb, pull_len);
5e3dd157
KV		 1159
1160 hdr = (struct ieee80211_hdr *)skb->data;
1161 fc = le16_to_cpu(hdr->frame_control);
1162
2b6a6a90
MK		 1163 /* FW delivers WEP Shared Auth frame with Protected Bit set and
1164 * encrypted payload. However in case of PMF it delivers decrypted
1165 * frames with Protected Bit set. */
1166 if (ieee80211_has_protected(hdr->frame_control) &&
1167 !ieee80211_is_auth(hdr->frame_control)) {
eeab266c
MK		 1168 status->flag |= RX_FLAG_DECRYPTED;
1169
1170 if (!ieee80211_is_action(hdr->frame_control) &&
1171 !ieee80211_is_deauth(hdr->frame_control) &&
1172 !ieee80211_is_disassoc(hdr->frame_control)) {
1173 status->flag |= RX_FLAG_IV_STRIPPED |
1174 RX_FLAG_MMIC_STRIPPED;
1175 hdr->frame_control = __cpu_to_le16(fc &
5e3dd157 1176 ~IEEE80211_FCTL_PROTECTED);
eeab266c 1177 }
5e3dd157
KV		 1178 }
1179
7aa7a72a 1180 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1181 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
1182 skb, skb->len,
1183 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
1184
7aa7a72a 1185 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1186 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
1187 status->freq, status->band, status->signal,
1188 status->rate_idx);
1189
1190 /*
1191 * packets from HTC come aligned to 4byte boundaries
1192 * because they can originally come in along with a trailer
1193 */
1194 skb_trim(skb, buf_len);
1195
1196 ieee80211_rx(ar->hw, skb);
1197 return 0;
1198}
1199
2e1dea40
MK		 1200static int freq_to_idx(struct ath10k *ar, int freq)
1201{
1202 struct ieee80211_supported_band *sband;
1203 int band, ch, idx = 0;
1204
1205 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
1206 sband = ar->hw->wiphy->bands[band];
1207 if (!sband)
1208 continue;
1209
1210 for (ch = 0; ch < sband->n_channels; ch++, idx++)
1211 if (sband->channels[ch].center_freq == freq)
1212 goto exit;
1213 }
1214
1215exit:
1216 return idx;
1217}
1218
5e3dd157
KV		 1219static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1220{
2e1dea40
MK		 1221 struct wmi_chan_info_event *ev;
1222 struct survey_info *survey;
1223 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1224 int idx;
1225
1226 ev = (struct wmi_chan_info_event *)skb->data;
1227
1228 err_code = __le32_to_cpu(ev->err_code);
1229 freq = __le32_to_cpu(ev->freq);
1230 cmd_flags = __le32_to_cpu(ev->cmd_flags);
1231 noise_floor = __le32_to_cpu(ev->noise_floor);
1232 rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
1233 cycle_count = __le32_to_cpu(ev->cycle_count);
1234
7aa7a72a 1235 ath10k_dbg(ar, ATH10K_DBG_WMI,
2e1dea40
MK		 1236 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1237 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1238 cycle_count);
1239
1240 spin_lock_bh(&ar->data_lock);
1241
5c81c7fd
MK		 1242 switch (ar->scan.state) {
1243 case ATH10K_SCAN_IDLE:
1244 case ATH10K_SCAN_STARTING:
7aa7a72a 1245 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
2e1dea40 1246 goto exit;
5c81c7fd
MK		 1247 case ATH10K_SCAN_RUNNING:
1248 case ATH10K_SCAN_ABORTING:
1249 break;
2e1dea40
MK		 1250 }
1251
1252 idx = freq_to_idx(ar, freq);
1253 if (idx >= ARRAY_SIZE(ar->survey)) {
7aa7a72a 1254 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2e1dea40
MK		 1255 freq, idx);
1256 goto exit;
1257 }
1258
1259 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1260 /* During scanning chan info is reported twice for each
1261 * visited channel. The reported cycle count is global
1262 * and per-channel cycle count must be calculated */
1263
1264 cycle_count -= ar->survey_last_cycle_count;
1265 rx_clear_count -= ar->survey_last_rx_clear_count;
1266
1267 survey = &ar->survey[idx];
1268 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
1269 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1270 survey->noise = noise_floor;
1271 survey->filled = SURVEY_INFO_CHANNEL_TIME |
1272 SURVEY_INFO_CHANNEL_TIME_RX |
1273 SURVEY_INFO_NOISE_DBM;
1274 }
1275
1276 ar->survey_last_rx_clear_count = rx_clear_count;
1277 ar->survey_last_cycle_count = cycle_count;
1278
1279exit:
1280 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1281}
1282
1283static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1284{
7aa7a72a 1285 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
5e3dd157
KV		 1286}
1287
869526b9 1288static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 1289{
7aa7a72a 1290 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
869526b9
KV		 1291 skb->len);
1292
d35a6c18 1293 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
869526b9
KV		 1294
1295 return 0;
5e3dd157
KV		 1296}
1297
1298static void ath10k_wmi_event_update_stats(struct ath10k *ar,
1299 struct sk_buff *skb)
1300{
1301 struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
1302
7aa7a72a 1303 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
5e3dd157
KV		 1304
1305 ath10k_debug_read_target_stats(ar, ev);
1306}
1307
1308static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
1309 struct sk_buff *skb)
1310{
1311 struct wmi_vdev_start_response_event *ev;
1312
7aa7a72a 1313 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
5e3dd157
KV		 1314
1315 ev = (struct wmi_vdev_start_response_event *)skb->data;
1316
1317 if (WARN_ON(__le32_to_cpu(ev->status)))
1318 return;
1319
1320 complete(&ar->vdev_setup_done);
1321}
1322
1323static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
1324 struct sk_buff *skb)
1325{
7aa7a72a 1326 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
5e3dd157
KV		 1327 complete(&ar->vdev_setup_done);
1328}
1329
1330static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
1331 struct sk_buff *skb)
1332{
5a13e76e
KV		 1333 struct wmi_peer_sta_kickout_event *ev;
1334 struct ieee80211_sta *sta;
1335
1336 ev = (struct wmi_peer_sta_kickout_event *)skb->data;
1337
7aa7a72a 1338 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
5a13e76e
KV		 1339 ev->peer_macaddr.addr);
1340
1341 rcu_read_lock();
1342
1343 sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL);
1344 if (!sta) {
7aa7a72a 1345 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
5a13e76e
KV		 1346 ev->peer_macaddr.addr);
1347 goto exit;
1348 }
1349
1350 ieee80211_report_low_ack(sta, 10);
1351
1352exit:
1353 rcu_read_unlock();
5e3dd157
KV		 1354}
1355
1356/*
1357 * FIXME
1358 *
1359 * We don't report to mac80211 sleep state of connected
1360 * stations. Due to this mac80211 can't fill in TIM IE
1361 * correctly.
1362 *
1363 * I know of no way of getting nullfunc frames that contain
1364 * sleep transition from connected stations - these do not
1365 * seem to be sent from the target to the host. There also
1366 * doesn't seem to be a dedicated event for that. So the
1367 * only way left to do this would be to read tim_bitmap
1368 * during SWBA.
1369 *
1370 * We could probably try using tim_bitmap from SWBA to tell
1371 * mac80211 which stations are asleep and which are not. The
1372 * problem here is calling mac80211 functions so many times
1373 * could take too long and make us miss the time to submit
1374 * the beacon to the target.
1375 *
1376 * So as a workaround we try to extend the TIM IE if there
1377 * is unicast buffered for stations with aid > 7 and fill it
1378 * in ourselves.
1379 */
1380static void ath10k_wmi_update_tim(struct ath10k *ar,
1381 struct ath10k_vif *arvif,
1382 struct sk_buff *bcn,
1383 struct wmi_bcn_info *bcn_info)
1384{
1385 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
1386 struct ieee80211_tim_ie *tim;
1387 u8 *ies, *ie;
1388 u8 ie_len, pvm_len;
af762c0b
KV		 1389 __le32 t;
1390 u32 v;
5e3dd157
KV		 1391
1392 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
1393 * we must copy the bitmap upon change and reuse it later */
1394 if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
1395 int i;
1396
1397 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
1398 sizeof(bcn_info->tim_info.tim_bitmap));
1399
1400 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
af762c0b
KV		 1401 t = bcn_info->tim_info.tim_bitmap[i / 4];
1402 v = __le32_to_cpu(t);
5e3dd157
KV		 1403 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
1404 }
1405
1406 /* FW reports either length 0 or 16
1407 * so we calculate this on our own */
1408 arvif->u.ap.tim_len = 0;
1409 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
1410 if (arvif->u.ap.tim_bitmap[i])
1411 arvif->u.ap.tim_len = i;
1412
1413 arvif->u.ap.tim_len++;
1414 }
1415
1416 ies = bcn->data;
1417 ies += ieee80211_hdrlen(hdr->frame_control);
1418 ies += 12; /* fixed parameters */
1419
1420 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
1421 (u8 *)skb_tail_pointer(bcn) - ies);
1422 if (!ie) {
09af8f85 1423 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
7aa7a72a 1424 ath10k_warn(ar, "no tim ie found;\n");
5e3dd157
KV		 1425 return;
1426 }
1427
1428 tim = (void *)ie + 2;
1429 ie_len = ie[1];
1430 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
1431
1432 if (pvm_len < arvif->u.ap.tim_len) {
1433 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
1434 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
1435 void *next_ie = ie + 2 + ie_len;
1436
1437 if (skb_put(bcn, expand_size)) {
1438 memmove(next_ie + expand_size, next_ie, move_size);
1439
1440 ie[1] += expand_size;
1441 ie_len += expand_size;
1442 pvm_len += expand_size;
1443 } else {
7aa7a72a 1444 ath10k_warn(ar, "tim expansion failed\n");
5e3dd157
KV		 1445 }
1446 }
1447
1448 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
7aa7a72a 1449 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
5e3dd157
KV		 1450 return;
1451 }
1452
1453 tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
1454 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
1455
748afc47
MK		 1456 if (tim->dtim_count == 0) {
1457 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
1458
1459 if (__le32_to_cpu(bcn_info->tim_info.tim_mcast) == 1)
1460 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
1461 }
1462
7aa7a72a 1463 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
5e3dd157
KV		 1464 tim->dtim_count, tim->dtim_period,
1465 tim->bitmap_ctrl, pvm_len);
1466}
1467
1468static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
1469 struct wmi_p2p_noa_info *noa)
1470{
1471 struct ieee80211_p2p_noa_attr *noa_attr;
1472 u8 ctwindow_oppps = noa->ctwindow_oppps;
1473 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
1474 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
1475 __le16 *noa_attr_len;
1476 u16 attr_len;
1477 u8 noa_descriptors = noa->num_descriptors;
1478 int i;
1479
1480 /* P2P IE */
1481 data[0] = WLAN_EID_VENDOR_SPECIFIC;
1482 data[1] = len - 2;
1483 data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
1484 data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
1485 data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
1486 data[5] = WLAN_OUI_TYPE_WFA_P2P;
1487
1488 /* NOA ATTR */
1489 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
1490 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
1491 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
1492
1493 noa_attr->index = noa->index;
1494 noa_attr->oppps_ctwindow = ctwindow;
1495 if (oppps)
1496 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
1497
1498 for (i = 0; i < noa_descriptors; i++) {
1499 noa_attr->desc[i].count =
1500 __le32_to_cpu(noa->descriptors[i].type_count);
1501 noa_attr->desc[i].duration = noa->descriptors[i].duration;
1502 noa_attr->desc[i].interval = noa->descriptors[i].interval;
1503 noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
1504 }
1505
1506 attr_len = 2; /* index + oppps_ctwindow */
1507 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1508 *noa_attr_len = __cpu_to_le16(attr_len);
1509}
1510
1511static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
1512{
1513 u32 len = 0;
1514 u8 noa_descriptors = noa->num_descriptors;
1515 u8 opp_ps_info = noa->ctwindow_oppps;
1516 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
1517
5e3dd157
KV		 1518 if (!noa_descriptors && !opps_enabled)
1519 return len;
1520
1521 len += 1 + 1 + 4; /* EID + len + OUI */
1522 len += 1 + 2; /* noa attr + attr len */
1523 len += 1 + 1; /* index + oppps_ctwindow */
1524 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1525
1526 return len;
1527}
1528
1529static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
1530 struct sk_buff *bcn,
1531 struct wmi_bcn_info *bcn_info)
1532{
1533 struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
1534 u8 *new_data, *old_data = arvif->u.ap.noa_data;
1535 u32 new_len;
1536
1537 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
1538 return;
1539
7aa7a72a 1540 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
5e3dd157
KV		 1541 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
1542 new_len = ath10k_p2p_calc_noa_ie_len(noa);
1543 if (!new_len)
1544 goto cleanup;
1545
1546 new_data = kmalloc(new_len, GFP_ATOMIC);
1547 if (!new_data)
1548 goto cleanup;
1549
1550 ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
1551
1552 spin_lock_bh(&ar->data_lock);
1553 arvif->u.ap.noa_data = new_data;
1554 arvif->u.ap.noa_len = new_len;
1555 spin_unlock_bh(&ar->data_lock);
1556 kfree(old_data);
1557 }
1558
1559 if (arvif->u.ap.noa_data)
1560 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
1561 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
1562 arvif->u.ap.noa_data,
1563 arvif->u.ap.noa_len);
1564 return;
1565
1566cleanup:
1567 spin_lock_bh(&ar->data_lock);
1568 arvif->u.ap.noa_data = NULL;
1569 arvif->u.ap.noa_len = 0;
1570 spin_unlock_bh(&ar->data_lock);
1571 kfree(old_data);
1572}
1573
5e3dd157
KV		 1574static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
1575{
1576 struct wmi_host_swba_event *ev;
1577 u32 map;
1578 int i = -1;
1579 struct wmi_bcn_info *bcn_info;
1580 struct ath10k_vif *arvif;
5e3dd157 1581 struct sk_buff *bcn;
64badcb6 1582 dma_addr_t paddr;
767d34fc 1583 int ret, vdev_id = 0;
5e3dd157 1584
5e3dd157
KV		 1585 ev = (struct wmi_host_swba_event *)skb->data;
1586 map = __le32_to_cpu(ev->vdev_map);
1587
7aa7a72a 1588 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
5e3dd157
KV		 1589 ev->vdev_map);
1590
1591 for (; map; map >>= 1, vdev_id++) {
1592 if (!(map & 0x1))
1593 continue;
1594
1595 i++;
1596
1597 if (i >= WMI_MAX_AP_VDEV) {
7aa7a72a 1598 ath10k_warn(ar, "swba has corrupted vdev map\n");
5e3dd157
KV		 1599 break;
1600 }
1601
1602 bcn_info = &ev->bcn_info[i];
1603
7aa7a72a 1604 ath10k_dbg(ar, ATH10K_DBG_MGMT,
7a8a396b 1605 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
5e3dd157
KV		 1606 i,
1607 __le32_to_cpu(bcn_info->tim_info.tim_len),
1608 __le32_to_cpu(bcn_info->tim_info.tim_mcast),
1609 __le32_to_cpu(bcn_info->tim_info.tim_changed),
1610 __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
1611 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
1612 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
1613 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
1614 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
1615
1616 arvif = ath10k_get_arvif(ar, vdev_id);
1617 if (arvif == NULL) {
7aa7a72a
MK		 1618 ath10k_warn(ar, "no vif for vdev_id %d found\n",
1619 vdev_id);
5e3dd157
KV		 1620 continue;
1621 }
1622
c2df44b3
MK		 1623 /* There are no completions for beacons so wait for next SWBA
1624 * before telling mac80211 to decrement CSA counter
1625 *
1626 * Once CSA counter is completed stop sending beacons until
1627 * actual channel switch is done */
1628 if (arvif->vif->csa_active &&
1629 ieee80211_csa_is_complete(arvif->vif)) {
1630 ieee80211_csa_finish(arvif->vif);
1631 continue;
1632 }
1633
5e3dd157
KV		 1634 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
1635 if (!bcn) {
7aa7a72a 1636 ath10k_warn(ar, "could not get mac80211 beacon\n");
5e3dd157
KV		 1637 continue;
1638 }
1639
4b604558 1640 ath10k_tx_h_seq_no(arvif->vif, bcn);
5e3dd157
KV		 1641 ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
1642 ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
1643
ed54388a 1644 spin_lock_bh(&ar->data_lock);
748afc47 1645
ed54388a 1646 if (arvif->beacon) {
748afc47 1647 if (!arvif->beacon_sent)
7aa7a72a 1648 ath10k_warn(ar, "SWBA overrun on vdev %d\n",
748afc47
MK		 1649 arvif->vdev_id);
1650
64badcb6 1651 ath10k_mac_vif_beacon_free(arvif);
ed54388a 1652 }
5e3dd157 1653
64badcb6
MK		 1654 if (!arvif->beacon_buf) {
1655 paddr = dma_map_single(arvif->ar->dev, bcn->data,
1656 bcn->len, DMA_TO_DEVICE);
1657 ret = dma_mapping_error(arvif->ar->dev, paddr);
1658 if (ret) {
1659 ath10k_warn(ar, "failed to map beacon: %d\n",
1660 ret);
1661 dev_kfree_skb_any(bcn);
1662 goto skip;
1663 }
1664
1665 ATH10K_SKB_CB(bcn)->paddr = paddr;
1666 } else {
1667 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
1668 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
1669 bcn->len, IEEE80211_MAX_FRAME_LEN);
1670 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
1671 }
1672 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
1673 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
767d34fc 1674 }
748afc47 1675
ed54388a 1676 arvif->beacon = bcn;
748afc47 1677 arvif->beacon_sent = false;
5e3dd157 1678
ed54388a 1679 ath10k_wmi_tx_beacon_nowait(arvif);
767d34fc 1680skip:
ed54388a 1681 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1682 }
1683}
1684
1685static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
1686 struct sk_buff *skb)
1687{
7aa7a72a 1688 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
5e3dd157
KV		 1689}
1690
9702c686
JD		 1691static void ath10k_dfs_radar_report(struct ath10k *ar,
1692 struct wmi_single_phyerr_rx_event *event,
1693 struct phyerr_radar_report *rr,
1694 u64 tsf)
1695{
1696 u32 reg0, reg1, tsf32l;
1697 struct pulse_event pe;
1698 u64 tsf64;
1699 u8 rssi, width;
1700
1701 reg0 = __le32_to_cpu(rr->reg0);
1702 reg1 = __le32_to_cpu(rr->reg1);
1703
7aa7a72a 1704 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1705 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
1706 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
1707 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
1708 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
1709 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
7aa7a72a 1710 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1711 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
1712 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
1713 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
1714 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
1715 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
1716 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
7aa7a72a 1717 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1718 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
1719 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
1720 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
1721
1722 if (!ar->dfs_detector)
1723 return;
1724
1725 /* report event to DFS pattern detector */
1726 tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
1727 tsf64 = tsf & (~0xFFFFFFFFULL);
1728 tsf64 |= tsf32l;
1729
1730 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
1731 rssi = event->hdr.rssi_combined;
1732
1733 /* hardware store this as 8 bit signed value,
1734 * set to zero if negative number
1735 */
1736 if (rssi & 0x80)
1737 rssi = 0;
1738
1739 pe.ts = tsf64;
1740 pe.freq = ar->hw->conf.chandef.chan->center_freq;
1741 pe.width = width;
1742 pe.rssi = rssi;
1743
7aa7a72a 1744 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1745 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
1746 pe.freq, pe.width, pe.rssi, pe.ts);
1747
1748 ATH10K_DFS_STAT_INC(ar, pulses_detected);
1749
1750 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
7aa7a72a 1751 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1752 "dfs no pulse pattern detected, yet\n");
1753 return;
1754 }
1755
7aa7a72a 1756 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
9702c686 1757 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP		 1758
1759 /* Control radar events reporting in debugfs file
1760 dfs_block_radar_events */
1761 if (ar->dfs_block_radar_events) {
7aa7a72a 1762 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
7d9b40b4
MP		 1763 return;
1764 }
1765
9702c686
JD		 1766 ieee80211_radar_detected(ar->hw);
1767}
1768
1769static int ath10k_dfs_fft_report(struct ath10k *ar,
1770 struct wmi_single_phyerr_rx_event *event,
1771 struct phyerr_fft_report *fftr,
1772 u64 tsf)
1773{
1774 u32 reg0, reg1;
1775 u8 rssi, peak_mag;
1776
1777 reg0 = __le32_to_cpu(fftr->reg0);
1778 reg1 = __le32_to_cpu(fftr->reg1);
1779 rssi = event->hdr.rssi_combined;
1780
7aa7a72a 1781 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1782 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
1783 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
1784 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
1785 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
1786 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
7aa7a72a 1787 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1788 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
1789 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
1790 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
1791 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
1792 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
1793
1794 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
1795
1796 /* false event detection */
1797 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
1798 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
7aa7a72a 1799 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
9702c686
JD		 1800 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
1801 return -EINVAL;
1802 }
1803
1804 return 0;
1805}
1806
1807static void ath10k_wmi_event_dfs(struct ath10k *ar,
1808 struct wmi_single_phyerr_rx_event *event,
1809 u64 tsf)
1810{
1811 int buf_len, tlv_len, res, i = 0;
1812 struct phyerr_tlv *tlv;
1813 struct phyerr_radar_report *rr;
1814 struct phyerr_fft_report *fftr;
1815 u8 *tlv_buf;
1816
1817 buf_len = __le32_to_cpu(event->hdr.buf_len);
7aa7a72a 1818 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1819 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
1820 event->hdr.phy_err_code, event->hdr.rssi_combined,
1821 __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
1822
1823 /* Skip event if DFS disabled */
1824 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
1825 return;
1826
1827 ATH10K_DFS_STAT_INC(ar, pulses_total);
1828
1829 while (i < buf_len) {
1830 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a
MK		 1831 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
1832 i);
9702c686
JD		 1833 return;
1834 }
1835
1836 tlv = (struct phyerr_tlv *)&event->bufp[i];
1837 tlv_len = __le16_to_cpu(tlv->len);
1838 tlv_buf = &event->bufp[i + sizeof(*tlv)];
7aa7a72a 1839 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1840 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
1841 tlv_len, tlv->tag, tlv->sig);
1842
1843 switch (tlv->tag) {
1844 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
1845 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
7aa7a72a 1846 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
9702c686
JD		 1847 i);
1848 return;
1849 }
1850
1851 rr = (struct phyerr_radar_report *)tlv_buf;
1852 ath10k_dfs_radar_report(ar, event, rr, tsf);
1853 break;
1854 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1855 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
7aa7a72a
MK		 1856 ath10k_warn(ar, "too short fft report (%d)\n",
1857 i);
9702c686
JD		 1858 return;
1859 }
1860
1861 fftr = (struct phyerr_fft_report *)tlv_buf;
1862 res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
1863 if (res)
1864 return;
1865 break;
1866 }
1867
1868 i += sizeof(*tlv) + tlv_len;
1869 }
1870}
1871
5b07e07f
KV		 1872static void
1873ath10k_wmi_event_spectral_scan(struct ath10k *ar,
1874 struct wmi_single_phyerr_rx_event *event,
1875 u64 tsf)
9702c686 1876{
855aed12
SW		 1877 int buf_len, tlv_len, res, i = 0;
1878 struct phyerr_tlv *tlv;
1879 u8 *tlv_buf;
1880 struct phyerr_fft_report *fftr;
1881 size_t fftr_len;
1882
1883 buf_len = __le32_to_cpu(event->hdr.buf_len);
1884
1885 while (i < buf_len) {
1886 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a 1887 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
855aed12
SW		 1888 i);
1889 return;
1890 }
1891
1892 tlv = (struct phyerr_tlv *)&event->bufp[i];
1893 tlv_len = __le16_to_cpu(tlv->len);
1894 tlv_buf = &event->bufp[i + sizeof(*tlv)];
1895
1896 if (i + sizeof(*tlv) + tlv_len > buf_len) {
7aa7a72a 1897 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
855aed12
SW		 1898 i);
1899 return;
1900 }
1901
1902 switch (tlv->tag) {
1903 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1904 if (sizeof(*fftr) > tlv_len) {
7aa7a72a 1905 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
855aed12
SW		 1906 i);
1907 return;
1908 }
1909
1910 fftr_len = tlv_len - sizeof(*fftr);
1911 fftr = (struct phyerr_fft_report *)tlv_buf;
1912 res = ath10k_spectral_process_fft(ar, event,
1913 fftr, fftr_len,
1914 tsf);
1915 if (res < 0) {
7aa7a72a 1916 ath10k_warn(ar, "failed to process fft report: %d\n",
855aed12
SW		 1917 res);
1918 return;
1919 }
1920 break;
1921 }
1922
1923 i += sizeof(*tlv) + tlv_len;
1924 }
9702c686
JD		 1925}
1926
5e3dd157
KV		 1927static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
1928{
9702c686
JD		 1929 struct wmi_comb_phyerr_rx_event *comb_event;
1930 struct wmi_single_phyerr_rx_event *event;
1931 u32 count, i, buf_len, phy_err_code;
1932 u64 tsf;
1933 int left_len = skb->len;
1934
1935 ATH10K_DFS_STAT_INC(ar, phy_errors);
1936
1937 /* Check if combined event available */
1938 if (left_len < sizeof(*comb_event)) {
7aa7a72a 1939 ath10k_warn(ar, "wmi phyerr combined event wrong len\n");
9702c686
JD		 1940 return;
1941 }
1942
1943 left_len -= sizeof(*comb_event);
1944
1945 /* Check number of included events */
1946 comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
1947 count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
1948
1949 tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
1950 tsf <<= 32;
1951 tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
1952
7aa7a72a 1953 ath10k_dbg(ar, ATH10K_DBG_WMI,
9702c686
JD		 1954 "wmi event phyerr count %d tsf64 0x%llX\n",
1955 count, tsf);
1956
1957 event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
1958 for (i = 0; i < count; i++) {
1959 /* Check if we can read event header */
1960 if (left_len < sizeof(*event)) {
7aa7a72a
MK		 1961 ath10k_warn(ar, "single event (%d) wrong head len\n",
1962 i);
9702c686
JD		 1963 return;
1964 }
1965
1966 left_len -= sizeof(*event);
1967
1968 buf_len = __le32_to_cpu(event->hdr.buf_len);
1969 phy_err_code = event->hdr.phy_err_code;
1970
1971 if (left_len < buf_len) {
7aa7a72a 1972 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
9702c686
JD		 1973 return;
1974 }
1975
1976 left_len -= buf_len;
1977
1978 switch (phy_err_code) {
1979 case PHY_ERROR_RADAR:
1980 ath10k_wmi_event_dfs(ar, event, tsf);
1981 break;
1982 case PHY_ERROR_SPECTRAL_SCAN:
1983 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1984 break;
1985 case PHY_ERROR_FALSE_RADAR_EXT:
1986 ath10k_wmi_event_dfs(ar, event, tsf);
1987 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1988 break;
1989 default:
1990 break;
1991 }
1992
1993 event += sizeof(*event) + buf_len;
1994 }
5e3dd157
KV		 1995}
1996
1997static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
1998{
7aa7a72a 1999 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
5e3dd157
KV		 2000}
2001
2002static void ath10k_wmi_event_profile_match(struct ath10k *ar,
5b07e07f 2003 struct sk_buff *skb)
5e3dd157 2004{
7aa7a72a 2005 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
5e3dd157
KV		 2006}
2007
2008static void ath10k_wmi_event_debug_print(struct ath10k *ar,
2fe5288c 2009 struct sk_buff *skb)
5e3dd157 2010{
2fe5288c
KV		 2011 char buf[101], c;
2012 int i;
2013
2014 for (i = 0; i < sizeof(buf) - 1; i++) {
2015 if (i >= skb->len)
2016 break;
2017
2018 c = skb->data[i];
2019
2020 if (c == '\0')
2021 break;
2022
2023 if (isascii(c) && isprint(c))
2024 buf[i] = c;
2025 else
2026 buf[i] = '.';
2027 }
2028
2029 if (i == sizeof(buf) - 1)
7aa7a72a 2030 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2fe5288c
KV		 2031
2032 /* for some reason the debug prints end with \n, remove that */
2033 if (skb->data[i - 1] == '\n')
2034 i--;
2035
2036 /* the last byte is always reserved for the null character */
2037 buf[i] = '\0';
2038
7aa7a72a 2039 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf);
5e3dd157
KV		 2040}
2041
2042static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
2043{
7aa7a72a 2044 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
5e3dd157
KV		 2045}
2046
2047static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
2048 struct sk_buff *skb)
2049{
7aa7a72a 2050 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
5e3dd157
KV		 2051}
2052
2053static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
5b07e07f 2054 struct sk_buff *skb)
5e3dd157 2055{
7aa7a72a 2056 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 2057}
2058
2059static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
5b07e07f 2060 struct sk_buff *skb)
5e3dd157 2061{
7aa7a72a 2062 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 2063}
2064
2065static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
2066 struct sk_buff *skb)
2067{
7aa7a72a 2068 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
5e3dd157
KV		 2069}
2070
2071static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
2072 struct sk_buff *skb)
2073{
7aa7a72a 2074 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
5e3dd157
KV		 2075}
2076
2077static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
2078 struct sk_buff *skb)
2079{
7aa7a72a 2080 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
5e3dd157
KV		 2081}
2082
2083static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
2084 struct sk_buff *skb)
2085{
7aa7a72a 2086 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
5e3dd157
KV		 2087}
2088
2089static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
2090 struct sk_buff *skb)
2091{
7aa7a72a 2092 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5e3dd157
KV		 2093}
2094
2095static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
5b07e07f 2096 struct sk_buff *skb)
5e3dd157 2097{
7aa7a72a 2098 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5e3dd157
KV		 2099}
2100
2101static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
2102 struct sk_buff *skb)
2103{
7aa7a72a 2104 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5e3dd157
KV		 2105}
2106
2107static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
2108 struct sk_buff *skb)
2109{
7aa7a72a 2110 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 2111}
2112
2113static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
2114 struct sk_buff *skb)
2115{
7aa7a72a 2116 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 2117}
2118
2119static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
5b07e07f 2120 struct sk_buff *skb)
5e3dd157 2121{
7aa7a72a 2122 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5e3dd157
KV		 2123}
2124
8a6618b0
BM		 2125static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
2126 struct sk_buff *skb)
2127{
7aa7a72a 2128 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
8a6618b0
BM		 2129}
2130
2131static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
2132 struct sk_buff *skb)
2133{
7aa7a72a 2134 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
8a6618b0
BM		 2135}
2136
2137static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
2138 struct sk_buff *skb)
2139{
7aa7a72a 2140 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
8a6618b0
BM		 2141}
2142
b3effe61 2143static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
5b07e07f 2144 u32 num_units, u32 unit_len)
b3effe61
BM		 2145{
2146 dma_addr_t paddr;
2147 u32 pool_size;
2148 int idx = ar->wmi.num_mem_chunks;
2149
2150 pool_size = num_units * round_up(unit_len, 4);
2151
2152 if (!pool_size)
2153 return -EINVAL;
2154
2155 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
2156 pool_size,
2157 &paddr,
2158 GFP_ATOMIC);
2159 if (!ar->wmi.mem_chunks[idx].vaddr) {
7aa7a72a 2160 ath10k_warn(ar, "failed to allocate memory chunk\n");
b3effe61
BM		 2161 return -ENOMEM;
2162 }
2163
2164 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
2165
2166 ar->wmi.mem_chunks[idx].paddr = paddr;
2167 ar->wmi.mem_chunks[idx].len = pool_size;
2168 ar->wmi.mem_chunks[idx].req_id = req_id;
2169 ar->wmi.num_mem_chunks++;
2170
2171 return 0;
2172}
2173
5e3dd157
KV		 2174static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
2175 struct sk_buff *skb)
2176{
2177 struct wmi_service_ready_event *ev = (void *)skb->data;
c4f8c836 2178 DECLARE_BITMAP(svc_bmap, WMI_SERVICE_MAX) = {};
5e3dd157
KV		 2179
2180 if (skb->len < sizeof(*ev)) {
7aa7a72a 2181 ath10k_warn(ar, "Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
5e3dd157
KV		 2182 skb->len, sizeof(*ev));
2183 return;
2184 }
2185
2186 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
2187 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
2188 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
2189 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
2190 ar->fw_version_major =
2191 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
2192 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
2193 ar->fw_version_release =
2194 (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
2195 ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
2196 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
8865bee4
MK		 2197 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
2198
1a222435
KV		 2199 /* only manually set fw features when not using FW IE format */
2200 if (ar->fw_api == 1 && ar->fw_version_build > 636)
0d9b0438
MK		 2201 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
2202
8865bee4 2203 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
7aa7a72a 2204 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
8865bee4
MK		 2205 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
2206 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
2207 }
5e3dd157
KV		 2208
2209 ar->ath_common.regulatory.current_rd =
2210 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
2211
7a7b3732 2212 wmi_main_svc_map(ev->wmi_service_bitmap, svc_bmap);
cff990ce 2213 ath10k_debug_read_service_map(ar, svc_bmap, sizeof(svc_bmap));
7aa7a72a 2214 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
cff990ce 2215 ev->wmi_service_bitmap, sizeof(ev->wmi_service_bitmap));
5e3dd157
KV		 2216
2217 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2218 snprintf(ar->hw->wiphy->fw_version,
2219 sizeof(ar->hw->wiphy->fw_version),
2220 "%u.%u.%u.%u",
2221 ar->fw_version_major,
2222 ar->fw_version_minor,
2223 ar->fw_version_release,
2224 ar->fw_version_build);
2225 }
2226
2227 /* FIXME: it probably should be better to support this */
2228 if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
7aa7a72a 2229 ath10k_warn(ar, "target requested %d memory chunks; ignoring\n",
5e3dd157
KV		 2230 __le32_to_cpu(ev->num_mem_reqs));
2231 }
2232
7aa7a72a 2233 ath10k_dbg(ar, ATH10K_DBG_WMI,
8865bee4 2234 "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
5e3dd157
KV		 2235 __le32_to_cpu(ev->sw_version),
2236 __le32_to_cpu(ev->sw_version_1),
2237 __le32_to_cpu(ev->abi_version),
2238 __le32_to_cpu(ev->phy_capability),
2239 __le32_to_cpu(ev->ht_cap_info),
2240 __le32_to_cpu(ev->vht_cap_info),
2241 __le32_to_cpu(ev->vht_supp_mcs),
2242 __le32_to_cpu(ev->sys_cap_info),
8865bee4
MK		 2243 __le32_to_cpu(ev->num_mem_reqs),
2244 __le32_to_cpu(ev->num_rf_chains));
5e3dd157
KV		 2245
2246 complete(&ar->wmi.service_ready);
2247}
2248
6f97d256
BM		 2249static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar,
2250 struct sk_buff *skb)
2251{
b3effe61
BM		 2252 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
2253 int ret;
6f97d256 2254 struct wmi_service_ready_event_10x *ev = (void *)skb->data;
c4f8c836 2255 DECLARE_BITMAP(svc_bmap, WMI_SERVICE_MAX) = {};
6f97d256
BM		 2256
2257 if (skb->len < sizeof(*ev)) {
7aa7a72a 2258 ath10k_warn(ar, "Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
6f97d256
BM		 2259 skb->len, sizeof(*ev));
2260 return;
2261 }
2262
2263 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
2264 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
2265 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
2266 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
2267 ar->fw_version_major =
2268 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
2269 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
2270 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
2271 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
2272
2273 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
7aa7a72a 2274 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
6f97d256
BM		 2275 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
2276 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
2277 }
2278
2279 ar->ath_common.regulatory.current_rd =
2280 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
2281
7a7b3732 2282 wmi_10x_svc_map(ev->wmi_service_bitmap, svc_bmap);
cff990ce 2283 ath10k_debug_read_service_map(ar, svc_bmap, sizeof(svc_bmap));
7aa7a72a 2284 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
cff990ce 2285 ev->wmi_service_bitmap, sizeof(ev->wmi_service_bitmap));
6f97d256
BM		 2286
2287 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2288 snprintf(ar->hw->wiphy->fw_version,
2289 sizeof(ar->hw->wiphy->fw_version),
2290 "%u.%u",
2291 ar->fw_version_major,
2292 ar->fw_version_minor);
2293 }
2294
b3effe61
BM		 2295 num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs);
2296
2297 if (num_mem_reqs > ATH10K_MAX_MEM_REQS) {
7aa7a72a 2298 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
b3effe61
BM		 2299 num_mem_reqs);
2300 return;
6f97d256
BM		 2301 }
2302
b3effe61
BM		 2303 if (!num_mem_reqs)
2304 goto exit;
2305
7aa7a72a 2306 ath10k_dbg(ar, ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n",
b3effe61
BM		 2307 num_mem_reqs);
2308
2309 for (i = 0; i < num_mem_reqs; ++i) {
2310 req_id = __le32_to_cpu(ev->mem_reqs[i].req_id);
2311 num_units = __le32_to_cpu(ev->mem_reqs[i].num_units);
2312 unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size);
2313 num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info);
2314
2315 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
2316 /* number of units to allocate is number of
2317 * peers, 1 extra for self peer on target */
2318 /* this needs to be tied, host and target
2319 * can get out of sync */
ec6a73f0 2320 num_units = TARGET_10X_NUM_PEERS + 1;
b3effe61 2321 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
ec6a73f0 2322 num_units = TARGET_10X_NUM_VDEVS + 1;
b3effe61 2323
7aa7a72a 2324 ath10k_dbg(ar, ATH10K_DBG_WMI,
b3effe61
BM		 2325 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
2326 req_id,
2327 __le32_to_cpu(ev->mem_reqs[i].num_units),
2328 num_unit_info,
2329 unit_size,
2330 num_units);
2331
2332 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
2333 unit_size);
2334 if (ret)
2335 return;
2336 }
2337
2338exit:
7aa7a72a 2339 ath10k_dbg(ar, ATH10K_DBG_WMI,
6f97d256
BM		 2340 "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
2341 __le32_to_cpu(ev->sw_version),
2342 __le32_to_cpu(ev->abi_version),
2343 __le32_to_cpu(ev->phy_capability),
2344 __le32_to_cpu(ev->ht_cap_info),
2345 __le32_to_cpu(ev->vht_cap_info),
2346 __le32_to_cpu(ev->vht_supp_mcs),
2347 __le32_to_cpu(ev->sys_cap_info),
2348 __le32_to_cpu(ev->num_mem_reqs),
2349 __le32_to_cpu(ev->num_rf_chains));
2350
2351 complete(&ar->wmi.service_ready);
2352}
2353
5e3dd157
KV		 2354static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
2355{
2356 struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
2357
2358 if (WARN_ON(skb->len < sizeof(*ev)))
2359 return -EINVAL;
2360
b25f32cb 2361 ether_addr_copy(ar->mac_addr, ev->mac_addr.addr);
5e3dd157 2362
7aa7a72a 2363 ath10k_dbg(ar, ATH10K_DBG_WMI,
2c34752a 2364 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d skb->len %i ev-sz %zu\n",
5e3dd157
KV		 2365 __le32_to_cpu(ev->sw_version),
2366 __le32_to_cpu(ev->abi_version),
2367 ev->mac_addr.addr,
2c34752a 2368 __le32_to_cpu(ev->status), skb->len, sizeof(*ev));
5e3dd157
KV		 2369
2370 complete(&ar->wmi.unified_ready);
2371 return 0;
2372}
2373
ce42870e 2374static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 2375{
2376 struct wmi_cmd_hdr *cmd_hdr;
2377 enum wmi_event_id id;
5e3dd157
KV		 2378
2379 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2380 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2381
2382 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2383 return;
2384
d35a6c18 2385 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5e3dd157
KV		 2386
2387 switch (id) {
2388 case WMI_MGMT_RX_EVENTID:
2389 ath10k_wmi_event_mgmt_rx(ar, skb);
2390 /* mgmt_rx() owns the skb now! */
2391 return;
2392 case WMI_SCAN_EVENTID:
2393 ath10k_wmi_event_scan(ar, skb);
2394 break;
2395 case WMI_CHAN_INFO_EVENTID:
2396 ath10k_wmi_event_chan_info(ar, skb);
2397 break;
2398 case WMI_ECHO_EVENTID:
2399 ath10k_wmi_event_echo(ar, skb);
2400 break;
2401 case WMI_DEBUG_MESG_EVENTID:
2402 ath10k_wmi_event_debug_mesg(ar, skb);
2403 break;
2404 case WMI_UPDATE_STATS_EVENTID:
2405 ath10k_wmi_event_update_stats(ar, skb);
2406 break;
2407 case WMI_VDEV_START_RESP_EVENTID:
2408 ath10k_wmi_event_vdev_start_resp(ar, skb);
2409 break;
2410 case WMI_VDEV_STOPPED_EVENTID:
2411 ath10k_wmi_event_vdev_stopped(ar, skb);
2412 break;
2413 case WMI_PEER_STA_KICKOUT_EVENTID:
2414 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2415 break;
2416 case WMI_HOST_SWBA_EVENTID:
2417 ath10k_wmi_event_host_swba(ar, skb);
2418 break;
2419 case WMI_TBTTOFFSET_UPDATE_EVENTID:
2420 ath10k_wmi_event_tbttoffset_update(ar, skb);
2421 break;
2422 case WMI_PHYERR_EVENTID:
2423 ath10k_wmi_event_phyerr(ar, skb);
2424 break;
2425 case WMI_ROAM_EVENTID:
2426 ath10k_wmi_event_roam(ar, skb);
2427 break;
2428 case WMI_PROFILE_MATCH:
2429 ath10k_wmi_event_profile_match(ar, skb);
2430 break;
2431 case WMI_DEBUG_PRINT_EVENTID:
2432 ath10k_wmi_event_debug_print(ar, skb);
2433 break;
2434 case WMI_PDEV_QVIT_EVENTID:
2435 ath10k_wmi_event_pdev_qvit(ar, skb);
2436 break;
2437 case WMI_WLAN_PROFILE_DATA_EVENTID:
2438 ath10k_wmi_event_wlan_profile_data(ar, skb);
2439 break;
2440 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
2441 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2442 break;
2443 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
2444 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2445 break;
2446 case WMI_RTT_ERROR_REPORT_EVENTID:
2447 ath10k_wmi_event_rtt_error_report(ar, skb);
2448 break;
2449 case WMI_WOW_WAKEUP_HOST_EVENTID:
2450 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2451 break;
2452 case WMI_DCS_INTERFERENCE_EVENTID:
2453 ath10k_wmi_event_dcs_interference(ar, skb);
2454 break;
2455 case WMI_PDEV_TPC_CONFIG_EVENTID:
2456 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2457 break;
2458 case WMI_PDEV_FTM_INTG_EVENTID:
2459 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
2460 break;
2461 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
2462 ath10k_wmi_event_gtk_offload_status(ar, skb);
2463 break;
2464 case WMI_GTK_REKEY_FAIL_EVENTID:
2465 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
2466 break;
2467 case WMI_TX_DELBA_COMPLETE_EVENTID:
2468 ath10k_wmi_event_delba_complete(ar, skb);
2469 break;
2470 case WMI_TX_ADDBA_COMPLETE_EVENTID:
2471 ath10k_wmi_event_addba_complete(ar, skb);
2472 break;
2473 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
2474 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
2475 break;
2476 case WMI_SERVICE_READY_EVENTID:
2477 ath10k_wmi_service_ready_event_rx(ar, skb);
2478 break;
2479 case WMI_READY_EVENTID:
2480 ath10k_wmi_ready_event_rx(ar, skb);
2481 break;
2482 default:
7aa7a72a 2483 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5e3dd157
KV		 2484 break;
2485 }
2486
2487 dev_kfree_skb(skb);
2488}
2489
8a6618b0
BM		 2490static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
2491{
2492 struct wmi_cmd_hdr *cmd_hdr;
2493 enum wmi_10x_event_id id;
43d2a30f 2494 bool consumed;
8a6618b0
BM		 2495
2496 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2497 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2498
2499 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2500 return;
2501
d35a6c18 2502 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
8a6618b0 2503
43d2a30f
KV		 2504 consumed = ath10k_tm_event_wmi(ar, id, skb);
2505
2506 /* Ready event must be handled normally also in UTF mode so that we
2507 * know the UTF firmware has booted, others we are just bypass WMI
2508 * events to testmode.
2509 */
2510 if (consumed && id != WMI_10X_READY_EVENTID) {
2511 ath10k_dbg(ar, ATH10K_DBG_WMI,
2512 "wmi testmode consumed 0x%x\n", id);
2513 goto out;
2514 }
2515
8a6618b0
BM		 2516 switch (id) {
2517 case WMI_10X_MGMT_RX_EVENTID:
2518 ath10k_wmi_event_mgmt_rx(ar, skb);
2519 /* mgmt_rx() owns the skb now! */
2520 return;
2521 case WMI_10X_SCAN_EVENTID:
2522 ath10k_wmi_event_scan(ar, skb);
2523 break;
2524 case WMI_10X_CHAN_INFO_EVENTID:
2525 ath10k_wmi_event_chan_info(ar, skb);
2526 break;
2527 case WMI_10X_ECHO_EVENTID:
2528 ath10k_wmi_event_echo(ar, skb);
2529 break;
2530 case WMI_10X_DEBUG_MESG_EVENTID:
2531 ath10k_wmi_event_debug_mesg(ar, skb);
2532 break;
2533 case WMI_10X_UPDATE_STATS_EVENTID:
2534 ath10k_wmi_event_update_stats(ar, skb);
2535 break;
2536 case WMI_10X_VDEV_START_RESP_EVENTID:
2537 ath10k_wmi_event_vdev_start_resp(ar, skb);
2538 break;
2539 case WMI_10X_VDEV_STOPPED_EVENTID:
2540 ath10k_wmi_event_vdev_stopped(ar, skb);
2541 break;
2542 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
2543 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2544 break;
2545 case WMI_10X_HOST_SWBA_EVENTID:
2546 ath10k_wmi_event_host_swba(ar, skb);
2547 break;
2548 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
2549 ath10k_wmi_event_tbttoffset_update(ar, skb);
2550 break;
2551 case WMI_10X_PHYERR_EVENTID:
2552 ath10k_wmi_event_phyerr(ar, skb);
2553 break;
2554 case WMI_10X_ROAM_EVENTID:
2555 ath10k_wmi_event_roam(ar, skb);
2556 break;
2557 case WMI_10X_PROFILE_MATCH:
2558 ath10k_wmi_event_profile_match(ar, skb);
2559 break;
2560 case WMI_10X_DEBUG_PRINT_EVENTID:
2561 ath10k_wmi_event_debug_print(ar, skb);
2562 break;
2563 case WMI_10X_PDEV_QVIT_EVENTID:
2564 ath10k_wmi_event_pdev_qvit(ar, skb);
2565 break;
2566 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
2567 ath10k_wmi_event_wlan_profile_data(ar, skb);
2568 break;
2569 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
2570 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2571 break;
2572 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
2573 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2574 break;
2575 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
2576 ath10k_wmi_event_rtt_error_report(ar, skb);
2577 break;
2578 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
2579 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2580 break;
2581 case WMI_10X_DCS_INTERFERENCE_EVENTID:
2582 ath10k_wmi_event_dcs_interference(ar, skb);
2583 break;
2584 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
2585 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2586 break;
2587 case WMI_10X_INST_RSSI_STATS_EVENTID:
2588 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2589 break;
2590 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
2591 ath10k_wmi_event_vdev_standby_req(ar, skb);
2592 break;
2593 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
2594 ath10k_wmi_event_vdev_resume_req(ar, skb);
2595 break;
2596 case WMI_10X_SERVICE_READY_EVENTID:
6f97d256 2597 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
8a6618b0
BM		 2598 break;
2599 case WMI_10X_READY_EVENTID:
2600 ath10k_wmi_ready_event_rx(ar, skb);
2601 break;
43d2a30f
KV		 2602 case WMI_10X_PDEV_UTF_EVENTID:
2603 /* ignore utf events */
2604 break;
8a6618b0 2605 default:
7aa7a72a 2606 ath10k_warn(ar, "Unknown eventid: %d\n", id);
8a6618b0
BM		 2607 break;
2608 }
2609
43d2a30f 2610out:
8a6618b0
BM		 2611 dev_kfree_skb(skb);
2612}
2613
24c88f78
MK		 2614static void ath10k_wmi_10_2_process_rx(struct ath10k *ar, struct sk_buff *skb)
2615{
2616 struct wmi_cmd_hdr *cmd_hdr;
2617 enum wmi_10_2_event_id id;
2618
2619 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2620 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2621
2622 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2623 return;
2624
d35a6c18 2625 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
24c88f78
MK		 2626
2627 switch (id) {
2628 case WMI_10_2_MGMT_RX_EVENTID:
2629 ath10k_wmi_event_mgmt_rx(ar, skb);
2630 /* mgmt_rx() owns the skb now! */
2631 return;
2632 case WMI_10_2_SCAN_EVENTID:
2633 ath10k_wmi_event_scan(ar, skb);
2634 break;
2635 case WMI_10_2_CHAN_INFO_EVENTID:
2636 ath10k_wmi_event_chan_info(ar, skb);
2637 break;
2638 case WMI_10_2_ECHO_EVENTID:
2639 ath10k_wmi_event_echo(ar, skb);
2640 break;
2641 case WMI_10_2_DEBUG_MESG_EVENTID:
2642 ath10k_wmi_event_debug_mesg(ar, skb);
2643 break;
2644 case WMI_10_2_UPDATE_STATS_EVENTID:
2645 ath10k_wmi_event_update_stats(ar, skb);
2646 break;
2647 case WMI_10_2_VDEV_START_RESP_EVENTID:
2648 ath10k_wmi_event_vdev_start_resp(ar, skb);
2649 break;
2650 case WMI_10_2_VDEV_STOPPED_EVENTID:
2651 ath10k_wmi_event_vdev_stopped(ar, skb);
2652 break;
2653 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
2654 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2655 break;
2656 case WMI_10_2_HOST_SWBA_EVENTID:
2657 ath10k_wmi_event_host_swba(ar, skb);
2658 break;
2659 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
2660 ath10k_wmi_event_tbttoffset_update(ar, skb);
2661 break;
2662 case WMI_10_2_PHYERR_EVENTID:
2663 ath10k_wmi_event_phyerr(ar, skb);
2664 break;
2665 case WMI_10_2_ROAM_EVENTID:
2666 ath10k_wmi_event_roam(ar, skb);
2667 break;
2668 case WMI_10_2_PROFILE_MATCH:
2669 ath10k_wmi_event_profile_match(ar, skb);
2670 break;
2671 case WMI_10_2_DEBUG_PRINT_EVENTID:
2672 ath10k_wmi_event_debug_print(ar, skb);
2673 break;
2674 case WMI_10_2_PDEV_QVIT_EVENTID:
2675 ath10k_wmi_event_pdev_qvit(ar, skb);
2676 break;
2677 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
2678 ath10k_wmi_event_wlan_profile_data(ar, skb);
2679 break;
2680 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
2681 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2682 break;
2683 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
2684 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2685 break;
2686 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
2687 ath10k_wmi_event_rtt_error_report(ar, skb);
2688 break;
2689 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
2690 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2691 break;
2692 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
2693 ath10k_wmi_event_dcs_interference(ar, skb);
2694 break;
2695 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
2696 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2697 break;
2698 case WMI_10_2_INST_RSSI_STATS_EVENTID:
2699 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2700 break;
2701 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
2702 ath10k_wmi_event_vdev_standby_req(ar, skb);
2703 break;
2704 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
2705 ath10k_wmi_event_vdev_resume_req(ar, skb);
2706 break;
2707 case WMI_10_2_SERVICE_READY_EVENTID:
2708 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
2709 break;
2710 case WMI_10_2_READY_EVENTID:
2711 ath10k_wmi_ready_event_rx(ar, skb);
2712 break;
2713 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
2714 case WMI_10_2_GPIO_INPUT_EVENTID:
2715 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
2716 case WMI_10_2_GENERIC_BUFFER_EVENTID:
2717 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
2718 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
2719 case WMI_10_2_WDS_PEER_EVENTID:
7aa7a72a 2720 ath10k_dbg(ar, ATH10K_DBG_WMI,
24c88f78
MK		 2721 "received event id %d not implemented\n", id);
2722 break;
2723 default:
7aa7a72a 2724 ath10k_warn(ar, "Unknown eventid: %d\n", id);
24c88f78
MK		 2725 break;
2726 }
2727
2728 dev_kfree_skb(skb);
2729}
8a6618b0 2730
ce42870e
BM		 2731static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
2732{
24c88f78
MK		 2733 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
2734 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
2735 ath10k_wmi_10_2_process_rx(ar, skb);
2736 else
2737 ath10k_wmi_10x_process_rx(ar, skb);
2738 } else {
ce42870e 2739 ath10k_wmi_main_process_rx(ar, skb);
24c88f78 2740 }
ce42870e
BM		 2741}
2742
5e3dd157
KV		 2743/* WMI Initialization functions */
2744int ath10k_wmi_attach(struct ath10k *ar)
2745{
ce42870e 2746 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
24c88f78
MK		 2747 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
2748 ar->wmi.cmd = &wmi_10_2_cmd_map;
2749 else
2750 ar->wmi.cmd = &wmi_10x_cmd_map;
2751
6d1506e7 2752 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
226a339b 2753 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
ce42870e
BM		 2754 } else {
2755 ar->wmi.cmd = &wmi_cmd_map;
6d1506e7 2756 ar->wmi.vdev_param = &wmi_vdev_param_map;
226a339b 2757 ar->wmi.pdev_param = &wmi_pdev_param_map;
ce42870e
BM		 2758 }
2759
5e3dd157
KV		 2760 init_completion(&ar->wmi.service_ready);
2761 init_completion(&ar->wmi.unified_ready);
be8b3943 2762 init_waitqueue_head(&ar->wmi.tx_credits_wq);
5e3dd157
KV		 2763
2764 return 0;
2765}
2766
2767void ath10k_wmi_detach(struct ath10k *ar)
2768{
b3effe61
BM		 2769 int i;
2770
2771 /* free the host memory chunks requested by firmware */
2772 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2773 dma_free_coherent(ar->dev,
2774 ar->wmi.mem_chunks[i].len,
2775 ar->wmi.mem_chunks[i].vaddr,
2776 ar->wmi.mem_chunks[i].paddr);
2777 }
2778
2779 ar->wmi.num_mem_chunks = 0;
5e3dd157
KV		 2780}
2781
95bf21f9 2782int ath10k_wmi_connect(struct ath10k *ar)
5e3dd157
KV		 2783{
2784 int status;
2785 struct ath10k_htc_svc_conn_req conn_req;
2786 struct ath10k_htc_svc_conn_resp conn_resp;
2787
2788 memset(&conn_req, 0, sizeof(conn_req));
2789 memset(&conn_resp, 0, sizeof(conn_resp));
2790
2791 /* these fields are the same for all service endpoints */
2792 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
2793 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 2794 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV		 2795
2796 /* connect to control service */
2797 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
2798
cd003fad 2799 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157 2800 if (status) {
7aa7a72a 2801 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
5e3dd157
KV		 2802 status);
2803 return status;
2804 }
2805
2806 ar->wmi.eid = conn_resp.eid;
2807 return 0;
2808}
2809
821af6ae
MP		 2810static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2811 u16 rd2g, u16 rd5g, u16 ctl2g,
2812 u16 ctl5g)
5e3dd157
KV		 2813{
2814 struct wmi_pdev_set_regdomain_cmd *cmd;
2815 struct sk_buff *skb;
2816
7aa7a72a 2817 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 2818 if (!skb)
2819 return -ENOMEM;
2820
2821 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
2822 cmd->reg_domain = __cpu_to_le32(rd);
2823 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2824 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2825 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2826 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2827
7aa7a72a 2828 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 2829 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
2830 rd, rd2g, rd5g, ctl2g, ctl5g);
2831
ce42870e
BM		 2832 return ath10k_wmi_cmd_send(ar, skb,
2833 ar->wmi.cmd->pdev_set_regdomain_cmdid);
5e3dd157
KV		 2834}
2835
821af6ae
MP		 2836static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2837 u16 rd2g, u16 rd5g,
2838 u16 ctl2g, u16 ctl5g,
2839 enum wmi_dfs_region dfs_reg)
2840{
2841 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
2842 struct sk_buff *skb;
2843
7aa7a72a 2844 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
821af6ae
MP		 2845 if (!skb)
2846 return -ENOMEM;
2847
2848 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
2849 cmd->reg_domain = __cpu_to_le32(rd);
2850 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2851 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2852 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2853 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2854 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
2855
7aa7a72a 2856 ath10k_dbg(ar, ATH10K_DBG_WMI,
821af6ae
MP		 2857 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
2858 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
2859
2860 return ath10k_wmi_cmd_send(ar, skb,
2861 ar->wmi.cmd->pdev_set_regdomain_cmdid);
2862}
2863
2864int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
2865 u16 rd5g, u16 ctl2g, u16 ctl5g,
2866 enum wmi_dfs_region dfs_reg)
2867{
2868 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2869 return ath10k_wmi_10x_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2870 ctl2g, ctl5g, dfs_reg);
2871 else
2872 return ath10k_wmi_main_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2873 ctl2g, ctl5g);
2874}
2875
5e3dd157
KV		 2876int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
2877 const struct wmi_channel_arg *arg)
2878{
2879 struct wmi_set_channel_cmd *cmd;
2880 struct sk_buff *skb;
e8a50f8b 2881 u32 ch_flags = 0;
5e3dd157
KV		 2882
2883 if (arg->passive)
2884 return -EINVAL;
2885
7aa7a72a 2886 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 2887 if (!skb)
2888 return -ENOMEM;
2889
e8a50f8b
MP		 2890 if (arg->chan_radar)
2891 ch_flags |= WMI_CHAN_FLAG_DFS;
2892
5e3dd157
KV		 2893 cmd = (struct wmi_set_channel_cmd *)skb->data;
2894 cmd->chan.mhz = __cpu_to_le32(arg->freq);
2895 cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
2896 cmd->chan.mode = arg->mode;
e8a50f8b 2897 cmd->chan.flags |= __cpu_to_le32(ch_flags);
5e3dd157
KV		 2898 cmd->chan.min_power = arg->min_power;
2899 cmd->chan.max_power = arg->max_power;
2900 cmd->chan.reg_power = arg->max_reg_power;
2901 cmd->chan.reg_classid = arg->reg_class_id;
2902 cmd->chan.antenna_max = arg->max_antenna_gain;
2903
7aa7a72a 2904 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 2905 "wmi set channel mode %d freq %d\n",
2906 arg->mode, arg->freq);
2907
ce42870e
BM		 2908 return ath10k_wmi_cmd_send(ar, skb,
2909 ar->wmi.cmd->pdev_set_channel_cmdid);
5e3dd157
KV		 2910}
2911
00f5482b 2912int ath10k_wmi_pdev_suspend_target(struct ath10k *ar, u32 suspend_opt)
5e3dd157
KV		 2913{
2914 struct wmi_pdev_suspend_cmd *cmd;
2915 struct sk_buff *skb;
2916
7aa7a72a 2917 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 2918 if (!skb)
2919 return -ENOMEM;
2920
2921 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
00f5482b 2922 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
5e3dd157 2923
ce42870e 2924 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
5e3dd157
KV		 2925}
2926
2927int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
2928{
2929 struct sk_buff *skb;
2930
7aa7a72a 2931 skb = ath10k_wmi_alloc_skb(ar, 0);
5e3dd157
KV		 2932 if (skb == NULL)
2933 return -ENOMEM;
2934
ce42870e 2935 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
5e3dd157
KV		 2936}
2937
226a339b 2938int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV		 2939{
2940 struct wmi_pdev_set_param_cmd *cmd;
2941 struct sk_buff *skb;
2942
226a339b 2943 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
7aa7a72a
MK		 2944 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
2945 id);
d544943a 2946 return -EOPNOTSUPP;
226a339b
BM		 2947 }
2948
7aa7a72a 2949 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 2950 if (!skb)
2951 return -ENOMEM;
2952
2953 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
2954 cmd->param_id = __cpu_to_le32(id);
2955 cmd->param_value = __cpu_to_le32(value);
2956
7aa7a72a 2957 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
5e3dd157 2958 id, value);
ce42870e 2959 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
5e3dd157
KV		 2960}
2961
12b2b9e3 2962static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
5e3dd157
KV		 2963{
2964 struct wmi_init_cmd *cmd;
2965 struct sk_buff *buf;
2966 struct wmi_resource_config config = {};
b3effe61
BM		 2967 u32 len, val;
2968 int i;
5e3dd157
KV		 2969
2970 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
2971 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
2972 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
2973
2974 config.num_offload_reorder_bufs =
2975 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
2976
2977 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
2978 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
2979 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
2980 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
2981 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
2982 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2983 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2984 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2985 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
2986 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
2987
2988 config.scan_max_pending_reqs =
2989 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
2990
2991 config.bmiss_offload_max_vdev =
2992 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
2993
2994 config.roam_offload_max_vdev =
2995 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
2996
2997 config.roam_offload_max_ap_profiles =
2998 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
2999
3000 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
3001 config.num_mcast_table_elems =
3002 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
3003
3004 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
3005 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
3006 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
3007 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
3008 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
3009
3010 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3011 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3012
3013 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
3014
3015 config.gtk_offload_max_vdev =
3016 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
3017
3018 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
3019 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
3020
b3effe61
BM		 3021 len = sizeof(*cmd) +
3022 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3023
7aa7a72a 3024 buf = ath10k_wmi_alloc_skb(ar, len);
5e3dd157
KV		 3025 if (!buf)
3026 return -ENOMEM;
3027
3028 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61
BM		 3029
3030 if (ar->wmi.num_mem_chunks == 0) {
3031 cmd->num_host_mem_chunks = 0;
3032 goto out;
3033 }
3034
7aa7a72a 3035 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
5c54a7bf 3036 ar->wmi.num_mem_chunks);
b3effe61
BM		 3037
3038 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
3039
3040 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3041 cmd->host_mem_chunks[i].ptr =
3042 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3043 cmd->host_mem_chunks[i].size =
3044 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3045 cmd->host_mem_chunks[i].req_id =
3046 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3047
7aa7a72a 3048 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c54a7bf 3049 "wmi chunk %d len %d requested, addr 0x%llx\n",
b3effe61 3050 i,
5c54a7bf
MK		 3051 ar->wmi.mem_chunks[i].len,
3052 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
b3effe61
BM		 3053 }
3054out:
5e3dd157
KV		 3055 memcpy(&cmd->resource_config, &config, sizeof(config));
3056
7aa7a72a 3057 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
ce42870e 3058 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
5e3dd157
KV		 3059}
3060
12b2b9e3
BM		 3061static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
3062{
3063 struct wmi_init_cmd_10x *cmd;
3064 struct sk_buff *buf;
3065 struct wmi_resource_config_10x config = {};
3066 u32 len, val;
3067 int i;
3068
ec6a73f0
BM		 3069 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3070 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3071 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3072 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3073 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3074 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3075 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3076 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3077 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3078 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3079 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3080 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
12b2b9e3
BM		 3081
3082 config.scan_max_pending_reqs =
ec6a73f0 3083 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM		 3084
3085 config.bmiss_offload_max_vdev =
ec6a73f0 3086 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 3087
3088 config.roam_offload_max_vdev =
ec6a73f0 3089 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 3090
3091 config.roam_offload_max_ap_profiles =
ec6a73f0 3092 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 3093
ec6a73f0 3094 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 3095 config.num_mcast_table_elems =
ec6a73f0 3096 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 3097
ec6a73f0
BM		 3098 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3099 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3100 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3101 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3102 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 3103
ec6a73f0 3104 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM		 3105 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3106
ec6a73f0 3107 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 3108
ec6a73f0
BM		 3109 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3110 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM		 3111
3112 len = sizeof(*cmd) +
3113 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3114
7aa7a72a 3115 buf = ath10k_wmi_alloc_skb(ar, len);
12b2b9e3
BM		 3116 if (!buf)
3117 return -ENOMEM;
3118
3119 cmd = (struct wmi_init_cmd_10x *)buf->data;
3120
3121 if (ar->wmi.num_mem_chunks == 0) {
3122 cmd->num_host_mem_chunks = 0;
3123 goto out;
3124 }
3125
7aa7a72a 3126 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
5c54a7bf 3127 ar->wmi.num_mem_chunks);
12b2b9e3
BM		 3128
3129 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
3130
3131 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3132 cmd->host_mem_chunks[i].ptr =
3133 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3134 cmd->host_mem_chunks[i].size =
3135 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3136 cmd->host_mem_chunks[i].req_id =
3137 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3138
7aa7a72a 3139 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c54a7bf 3140 "wmi chunk %d len %d requested, addr 0x%llx\n",
12b2b9e3 3141 i,
5c54a7bf
MK		 3142 ar->wmi.mem_chunks[i].len,
3143 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
12b2b9e3
BM		 3144 }
3145out:
3146 memcpy(&cmd->resource_config, &config, sizeof(config));
3147
7aa7a72a 3148 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
12b2b9e3
BM		 3149 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
3150}
3151
24c88f78
MK		 3152static int ath10k_wmi_10_2_cmd_init(struct ath10k *ar)
3153{
3154 struct wmi_init_cmd_10_2 *cmd;
3155 struct sk_buff *buf;
3156 struct wmi_resource_config_10x config = {};
3157 u32 len, val;
3158 int i;
3159
3160 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3161 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3162 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3163 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3164 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3165 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3166 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3167 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3168 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3169 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3170 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3171 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
3172
3173 config.scan_max_pending_reqs =
3174 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
3175
3176 config.bmiss_offload_max_vdev =
3177 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
3178
3179 config.roam_offload_max_vdev =
3180 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
3181
3182 config.roam_offload_max_ap_profiles =
3183 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
3184
3185 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
3186 config.num_mcast_table_elems =
3187 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
3188
3189 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3190 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3191 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3192 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3193 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
3194
3195 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3196 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3197
3198 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
3199
3200 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3201 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
3202
3203 len = sizeof(*cmd) +
3204 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3205
7aa7a72a 3206 buf = ath10k_wmi_alloc_skb(ar, len);
24c88f78
MK		 3207 if (!buf)
3208 return -ENOMEM;
3209
3210 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
3211
3212 if (ar->wmi.num_mem_chunks == 0) {
3213 cmd->num_host_mem_chunks = 0;
3214 goto out;
3215 }
3216
7aa7a72a 3217 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
24c88f78
MK		 3218 ar->wmi.num_mem_chunks);
3219
3220 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
3221
3222 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3223 cmd->host_mem_chunks[i].ptr =
3224 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3225 cmd->host_mem_chunks[i].size =
3226 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3227 cmd->host_mem_chunks[i].req_id =
3228 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3229
7aa7a72a 3230 ath10k_dbg(ar, ATH10K_DBG_WMI,
24c88f78
MK		 3231 "wmi chunk %d len %d requested, addr 0x%llx\n",
3232 i,
3233 ar->wmi.mem_chunks[i].len,
3234 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
3235 }
3236out:
3237 memcpy(&cmd->resource_config.common, &config, sizeof(config));
3238
7aa7a72a 3239 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
24c88f78
MK		 3240 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
3241}
3242
12b2b9e3
BM		 3243int ath10k_wmi_cmd_init(struct ath10k *ar)
3244{
3245 int ret;
3246
24c88f78
MK		 3247 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
3248 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
3249 ret = ath10k_wmi_10_2_cmd_init(ar);
3250 else
3251 ret = ath10k_wmi_10x_cmd_init(ar);
3252 } else {
12b2b9e3 3253 ret = ath10k_wmi_main_cmd_init(ar);
24c88f78 3254 }
12b2b9e3
BM		 3255
3256 return ret;
5e3dd157
KV		 3257}
3258
89b7e766
BM		 3259static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar,
3260 const struct wmi_start_scan_arg *arg)
5e3dd157
KV		 3261{
3262 int len;
3263
89b7e766
BM		 3264 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
3265 len = sizeof(struct wmi_start_scan_cmd_10x);
3266 else
3267 len = sizeof(struct wmi_start_scan_cmd);
5e3dd157
KV		 3268
3269 if (arg->ie_len) {
3270 if (!arg->ie)
3271 return -EINVAL;
3272 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
3273 return -EINVAL;
3274
3275 len += sizeof(struct wmi_ie_data);
3276 len += roundup(arg->ie_len, 4);
3277 }
3278
3279 if (arg->n_channels) {
3280 if (!arg->channels)
3281 return -EINVAL;
3282 if (arg->n_channels > ARRAY_SIZE(arg->channels))
3283 return -EINVAL;
3284
3285 len += sizeof(struct wmi_chan_list);
3286 len += sizeof(__le32) * arg->n_channels;
3287 }
3288
3289 if (arg->n_ssids) {
3290 if (!arg->ssids)
3291 return -EINVAL;
3292 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
3293 return -EINVAL;
3294
3295 len += sizeof(struct wmi_ssid_list);
3296 len += sizeof(struct wmi_ssid) * arg->n_ssids;
3297 }
3298
3299 if (arg->n_bssids) {
3300 if (!arg->bssids)
3301 return -EINVAL;
3302 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
3303 return -EINVAL;
3304
3305 len += sizeof(struct wmi_bssid_list);
3306 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
3307 }
3308
3309 return len;
3310}
3311
3312int ath10k_wmi_start_scan(struct ath10k *ar,
3313 const struct wmi_start_scan_arg *arg)
3314{
3315 struct wmi_start_scan_cmd *cmd;
3316 struct sk_buff *skb;
3317 struct wmi_ie_data *ie;
3318 struct wmi_chan_list *channels;
3319 struct wmi_ssid_list *ssids;
3320 struct wmi_bssid_list *bssids;
3321 u32 scan_id;
3322 u32 scan_req_id;
3323 int off;
3324 int len = 0;
3325 int i;
3326
89b7e766 3327 len = ath10k_wmi_start_scan_calc_len(ar, arg);
5e3dd157
KV		 3328 if (len < 0)
3329 return len; /* len contains error code here */
3330
7aa7a72a 3331 skb = ath10k_wmi_alloc_skb(ar, len);
5e3dd157
KV		 3332 if (!skb)
3333 return -ENOMEM;
3334
3335 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
3336 scan_id |= arg->scan_id;
3337
3338 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
3339 scan_req_id |= arg->scan_req_id;
3340
3341 cmd = (struct wmi_start_scan_cmd *)skb->data;
3342 cmd->scan_id = __cpu_to_le32(scan_id);
3343 cmd->scan_req_id = __cpu_to_le32(scan_req_id);
3344 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3345 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
3346 cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
3347 cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
3348 cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
3349 cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
3350 cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
3351 cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
3352 cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
3353 cmd->idle_time = __cpu_to_le32(arg->idle_time);
3354 cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
3355 cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
3356 cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
3357
3358 /* TLV list starts after fields included in the struct */
89b7e766
BM		 3359 /* There's just one filed that differes the two start_scan
3360 * structures - burst_duration, which we are not using btw,
3361 no point to make the split here, just shift the buffer to fit with
3362 given FW */
3363 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
3364 off = sizeof(struct wmi_start_scan_cmd_10x);
3365 else
3366 off = sizeof(struct wmi_start_scan_cmd);
5e3dd157
KV		 3367
3368 if (arg->n_channels) {
3369 channels = (void *)skb->data + off;
3370 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
3371 channels->num_chan = __cpu_to_le32(arg->n_channels);
3372
3373 for (i = 0; i < arg->n_channels; i++)
24c88f78
MK		 3374 channels->channel_list[i].freq =
3375 __cpu_to_le16(arg->channels[i]);
5e3dd157
KV		 3376
3377 off += sizeof(*channels);
3378 off += sizeof(__le32) * arg->n_channels;
3379 }
3380
3381 if (arg->n_ssids) {
3382 ssids = (void *)skb->data + off;
3383 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
3384 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
3385
3386 for (i = 0; i < arg->n_ssids; i++) {
3387 ssids->ssids[i].ssid_len =
3388 __cpu_to_le32(arg->ssids[i].len);
3389 memcpy(&ssids->ssids[i].ssid,
3390 arg->ssids[i].ssid,
3391 arg->ssids[i].len);
3392 }
3393
3394 off += sizeof(*ssids);
3395 off += sizeof(struct wmi_ssid) * arg->n_ssids;
3396 }
3397
3398 if (arg->n_bssids) {
3399 bssids = (void *)skb->data + off;
3400 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
3401 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
3402
3403 for (i = 0; i < arg->n_bssids; i++)
3404 memcpy(&bssids->bssid_list[i],
3405 arg->bssids[i].bssid,
3406 ETH_ALEN);
3407
3408 off += sizeof(*bssids);
3409 off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
3410 }
3411
3412 if (arg->ie_len) {
3413 ie = (void *)skb->data + off;
3414 ie->tag = __cpu_to_le32(WMI_IE_TAG);
3415 ie->ie_len = __cpu_to_le32(arg->ie_len);
3416 memcpy(ie->ie_data, arg->ie, arg->ie_len);
3417
3418 off += sizeof(*ie);
3419 off += roundup(arg->ie_len, 4);
3420 }
3421
3422 if (off != skb->len) {
3423 dev_kfree_skb(skb);
3424 return -EINVAL;
3425 }
3426
7aa7a72a 3427 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
ce42870e 3428 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
5e3dd157
KV		 3429}
3430
3431void ath10k_wmi_start_scan_init(struct ath10k *ar,
3432 struct wmi_start_scan_arg *arg)
3433{
3434 /* setup commonly used values */
3435 arg->scan_req_id = 1;
3436 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
3437 arg->dwell_time_active = 50;
3438 arg->dwell_time_passive = 150;
3439 arg->min_rest_time = 50;
3440 arg->max_rest_time = 500;
3441 arg->repeat_probe_time = 0;
3442 arg->probe_spacing_time = 0;
3443 arg->idle_time = 0;
c322892f 3444 arg->max_scan_time = 20000;
5e3dd157
KV		 3445 arg->probe_delay = 5;
3446 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
3447 | WMI_SCAN_EVENT_COMPLETED
3448 | WMI_SCAN_EVENT_BSS_CHANNEL
3449 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
3450 | WMI_SCAN_EVENT_DEQUEUED;
3451 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
3452 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
3453 arg->n_bssids = 1;
3454 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
3455}
3456
3457int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
3458{
3459 struct wmi_stop_scan_cmd *cmd;
3460 struct sk_buff *skb;
3461 u32 scan_id;
3462 u32 req_id;
3463
3464 if (arg->req_id > 0xFFF)
3465 return -EINVAL;
3466 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
3467 return -EINVAL;
3468
7aa7a72a 3469 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3470 if (!skb)
3471 return -ENOMEM;
3472
3473 scan_id = arg->u.scan_id;
3474 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
3475
3476 req_id = arg->req_id;
3477 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
3478
3479 cmd = (struct wmi_stop_scan_cmd *)skb->data;
3480 cmd->req_type = __cpu_to_le32(arg->req_type);
3481 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
3482 cmd->scan_id = __cpu_to_le32(scan_id);
3483 cmd->scan_req_id = __cpu_to_le32(req_id);
3484
7aa7a72a 3485 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3486 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
3487 arg->req_id, arg->req_type, arg->u.scan_id);
ce42870e 3488 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
5e3dd157
KV		 3489}
3490
3491int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
3492 enum wmi_vdev_type type,
3493 enum wmi_vdev_subtype subtype,
3494 const u8 macaddr[ETH_ALEN])
3495{
3496 struct wmi_vdev_create_cmd *cmd;
3497 struct sk_buff *skb;
3498
7aa7a72a 3499 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3500 if (!skb)
3501 return -ENOMEM;
3502
3503 cmd = (struct wmi_vdev_create_cmd *)skb->data;
3504 cmd->vdev_id = __cpu_to_le32(vdev_id);
3505 cmd->vdev_type = __cpu_to_le32(type);
3506 cmd->vdev_subtype = __cpu_to_le32(subtype);
b25f32cb 3507 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
5e3dd157 3508
7aa7a72a 3509 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3510 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
3511 vdev_id, type, subtype, macaddr);
3512
ce42870e 3513 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
5e3dd157
KV		 3514}
3515
3516int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
3517{
3518 struct wmi_vdev_delete_cmd *cmd;
3519 struct sk_buff *skb;
3520
7aa7a72a 3521 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3522 if (!skb)
3523 return -ENOMEM;
3524
3525 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
3526 cmd->vdev_id = __cpu_to_le32(vdev_id);
3527
7aa7a72a 3528 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3529 "WMI vdev delete id %d\n", vdev_id);
3530
ce42870e 3531 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
5e3dd157
KV		 3532}
3533
5b07e07f
KV		 3534static int
3535ath10k_wmi_vdev_start_restart(struct ath10k *ar,
3536 const struct wmi_vdev_start_request_arg *arg,
3537 u32 cmd_id)
5e3dd157
KV		 3538{
3539 struct wmi_vdev_start_request_cmd *cmd;
3540 struct sk_buff *skb;
3541 const char *cmdname;
3542 u32 flags = 0;
e8a50f8b 3543 u32 ch_flags = 0;
5e3dd157 3544
ce42870e
BM		 3545 if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
3546 cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 3547 return -EINVAL;
3548 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
3549 return -EINVAL;
3550 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
3551 return -EINVAL;
3552 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
3553 return -EINVAL;
3554
ce42870e 3555 if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
5e3dd157 3556 cmdname = "start";
ce42870e 3557 else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 3558 cmdname = "restart";
3559 else
3560 return -EINVAL; /* should not happen, we already check cmd_id */
3561
7aa7a72a 3562 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3563 if (!skb)
3564 return -ENOMEM;
3565
3566 if (arg->hidden_ssid)
3567 flags |= WMI_VDEV_START_HIDDEN_SSID;
3568 if (arg->pmf_enabled)
3569 flags |= WMI_VDEV_START_PMF_ENABLED;
e8a50f8b
MP		 3570 if (arg->channel.chan_radar)
3571 ch_flags |= WMI_CHAN_FLAG_DFS;
5e3dd157
KV		 3572
3573 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
3574 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3575 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
3576 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
3577 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
3578 cmd->flags = __cpu_to_le32(flags);
3579 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
3580 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
3581
3582 if (arg->ssid) {
3583 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
3584 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
3585 }
3586
3587 cmd->chan.mhz = __cpu_to_le32(arg->channel.freq);
3588
3589 cmd->chan.band_center_freq1 =
3590 __cpu_to_le32(arg->channel.band_center_freq1);
3591
3592 cmd->chan.mode = arg->channel.mode;
e8a50f8b 3593 cmd->chan.flags |= __cpu_to_le32(ch_flags);
5e3dd157
KV		 3594 cmd->chan.min_power = arg->channel.min_power;
3595 cmd->chan.max_power = arg->channel.max_power;
3596 cmd->chan.reg_power = arg->channel.max_reg_power;
3597 cmd->chan.reg_classid = arg->channel.reg_class_id;
3598 cmd->chan.antenna_max = arg->channel.max_antenna_gain;
3599
7aa7a72a 3600 ath10k_dbg(ar, ATH10K_DBG_WMI,
8cc7f26c
KV		 3601 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
3602 cmdname, arg->vdev_id,
e8a50f8b
MP		 3603 flags, arg->channel.freq, arg->channel.mode,
3604 cmd->chan.flags, arg->channel.max_power);
5e3dd157
KV		 3605
3606 return ath10k_wmi_cmd_send(ar, skb, cmd_id);
3607}
3608
3609int ath10k_wmi_vdev_start(struct ath10k *ar,
3610 const struct wmi_vdev_start_request_arg *arg)
3611{
ce42870e
BM		 3612 u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
3613
3614 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3615}
3616
3617int ath10k_wmi_vdev_restart(struct ath10k *ar,
5b07e07f 3618 const struct wmi_vdev_start_request_arg *arg)
5e3dd157 3619{
ce42870e
BM		 3620 u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
3621
3622 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3623}
3624
3625int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
3626{
3627 struct wmi_vdev_stop_cmd *cmd;
3628 struct sk_buff *skb;
3629
7aa7a72a 3630 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3631 if (!skb)
3632 return -ENOMEM;
3633
3634 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
3635 cmd->vdev_id = __cpu_to_le32(vdev_id);
3636
7aa7a72a 3637 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
5e3dd157 3638
ce42870e 3639 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
5e3dd157
KV		 3640}
3641
3642int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
3643{
3644 struct wmi_vdev_up_cmd *cmd;
3645 struct sk_buff *skb;
3646
7aa7a72a 3647 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3648 if (!skb)
3649 return -ENOMEM;
3650
3651 cmd = (struct wmi_vdev_up_cmd *)skb->data;
3652 cmd->vdev_id = __cpu_to_le32(vdev_id);
3653 cmd->vdev_assoc_id = __cpu_to_le32(aid);
b25f32cb 3654 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
5e3dd157 3655
7aa7a72a 3656 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3657 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
3658 vdev_id, aid, bssid);
3659
ce42870e 3660 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
5e3dd157
KV		 3661}
3662
3663int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
3664{
3665 struct wmi_vdev_down_cmd *cmd;
3666 struct sk_buff *skb;
3667
7aa7a72a 3668 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3669 if (!skb)
3670 return -ENOMEM;
3671
3672 cmd = (struct wmi_vdev_down_cmd *)skb->data;
3673 cmd->vdev_id = __cpu_to_le32(vdev_id);
3674
7aa7a72a 3675 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3676 "wmi mgmt vdev down id 0x%x\n", vdev_id);
3677
ce42870e 3678 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
5e3dd157
KV		 3679}
3680
3681int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
6d1506e7 3682 u32 param_id, u32 param_value)
5e3dd157
KV		 3683{
3684 struct wmi_vdev_set_param_cmd *cmd;
3685 struct sk_buff *skb;
3686
6d1506e7 3687 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7aa7a72a 3688 ath10k_dbg(ar, ATH10K_DBG_WMI,
6d1506e7
BM		 3689 "vdev param %d not supported by firmware\n",
3690 param_id);
ebc9abdd 3691 return -EOPNOTSUPP;
6d1506e7
BM		 3692 }
3693
7aa7a72a 3694 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3695 if (!skb)
3696 return -ENOMEM;
3697
3698 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
3699 cmd->vdev_id = __cpu_to_le32(vdev_id);
3700 cmd->param_id = __cpu_to_le32(param_id);
3701 cmd->param_value = __cpu_to_le32(param_value);
3702
7aa7a72a 3703 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3704 "wmi vdev id 0x%x set param %d value %d\n",
3705 vdev_id, param_id, param_value);
3706
ce42870e 3707 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
5e3dd157
KV		 3708}
3709
3710int ath10k_wmi_vdev_install_key(struct ath10k *ar,
3711 const struct wmi_vdev_install_key_arg *arg)
3712{
3713 struct wmi_vdev_install_key_cmd *cmd;
3714 struct sk_buff *skb;
3715
3716 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
3717 return -EINVAL;
3718 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
3719 return -EINVAL;
3720
7aa7a72a 3721 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
5e3dd157
KV		 3722 if (!skb)
3723 return -ENOMEM;
3724
3725 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
3726 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3727 cmd->key_idx = __cpu_to_le32(arg->key_idx);
3728 cmd->key_flags = __cpu_to_le32(arg->key_flags);
3729 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
3730 cmd->key_len = __cpu_to_le32(arg->key_len);
3731 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
3732 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
3733
3734 if (arg->macaddr)
b25f32cb 3735 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
5e3dd157
KV		 3736 if (arg->key_data)
3737 memcpy(cmd->key_data, arg->key_data, arg->key_len);
3738
7aa7a72a 3739 ath10k_dbg(ar, ATH10K_DBG_WMI,
e0c508ab
MK		 3740 "wmi vdev install key idx %d cipher %d len %d\n",
3741 arg->key_idx, arg->key_cipher, arg->key_len);
ce42870e
BM		 3742 return ath10k_wmi_cmd_send(ar, skb,
3743 ar->wmi.cmd->vdev_install_key_cmdid);
5e3dd157
KV		 3744}
3745
855aed12
SW		 3746int ath10k_wmi_vdev_spectral_conf(struct ath10k *ar,
3747 const struct wmi_vdev_spectral_conf_arg *arg)
3748{
3749 struct wmi_vdev_spectral_conf_cmd *cmd;
3750 struct sk_buff *skb;
3751 u32 cmdid;
3752
7aa7a72a 3753 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12
SW		 3754 if (!skb)
3755 return -ENOMEM;
3756
3757 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
3758 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3759 cmd->scan_count = __cpu_to_le32(arg->scan_count);
3760 cmd->scan_period = __cpu_to_le32(arg->scan_period);
3761 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
3762 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
3763 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
3764 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
3765 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
3766 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
3767 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
3768 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
3769 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
3770 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
3771 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
3772 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
3773 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
3774 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
3775 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
3776 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
3777
3778 cmdid = ar->wmi.cmd->vdev_spectral_scan_configure_cmdid;
3779 return ath10k_wmi_cmd_send(ar, skb, cmdid);
3780}
3781
3782int ath10k_wmi_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, u32 trigger,
3783 u32 enable)
3784{
3785 struct wmi_vdev_spectral_enable_cmd *cmd;
3786 struct sk_buff *skb;
3787 u32 cmdid;
3788
7aa7a72a 3789 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12
SW		 3790 if (!skb)
3791 return -ENOMEM;
3792
3793 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
3794 cmd->vdev_id = __cpu_to_le32(vdev_id);
3795 cmd->trigger_cmd = __cpu_to_le32(trigger);
3796 cmd->enable_cmd = __cpu_to_le32(enable);
3797
3798 cmdid = ar->wmi.cmd->vdev_spectral_scan_enable_cmdid;
3799 return ath10k_wmi_cmd_send(ar, skb, cmdid);
3800}
3801
5e3dd157
KV		 3802int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
3803 const u8 peer_addr[ETH_ALEN])
3804{
3805 struct wmi_peer_create_cmd *cmd;
3806 struct sk_buff *skb;
3807
7aa7a72a 3808 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3809 if (!skb)
3810 return -ENOMEM;
3811
3812 cmd = (struct wmi_peer_create_cmd *)skb->data;
3813 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 3814 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3815
7aa7a72a 3816 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3817 "wmi peer create vdev_id %d peer_addr %pM\n",
3818 vdev_id, peer_addr);
ce42870e 3819 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
5e3dd157
KV		 3820}
3821
3822int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
3823 const u8 peer_addr[ETH_ALEN])
3824{
3825 struct wmi_peer_delete_cmd *cmd;
3826 struct sk_buff *skb;
3827
7aa7a72a 3828 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3829 if (!skb)
3830 return -ENOMEM;
3831
3832 cmd = (struct wmi_peer_delete_cmd *)skb->data;
3833 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 3834 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3835
7aa7a72a 3836 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3837 "wmi peer delete vdev_id %d peer_addr %pM\n",
3838 vdev_id, peer_addr);
ce42870e 3839 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
5e3dd157
KV		 3840}
3841
3842int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
3843 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
3844{
3845 struct wmi_peer_flush_tids_cmd *cmd;
3846 struct sk_buff *skb;
3847
7aa7a72a 3848 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3849 if (!skb)
3850 return -ENOMEM;
3851
3852 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
3853 cmd->vdev_id = __cpu_to_le32(vdev_id);
3854 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
b25f32cb 3855 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3856
7aa7a72a 3857 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3858 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
3859 vdev_id, peer_addr, tid_bitmap);
ce42870e 3860 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
5e3dd157
KV		 3861}
3862
3863int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
3864 const u8 *peer_addr, enum wmi_peer_param param_id,
3865 u32 param_value)
3866{
3867 struct wmi_peer_set_param_cmd *cmd;
3868 struct sk_buff *skb;
3869
7aa7a72a 3870 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3871 if (!skb)
3872 return -ENOMEM;
3873
3874 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
3875 cmd->vdev_id = __cpu_to_le32(vdev_id);
3876 cmd->param_id = __cpu_to_le32(param_id);
3877 cmd->param_value = __cpu_to_le32(param_value);
b25f32cb 3878 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3879
7aa7a72a 3880 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3881 "wmi vdev %d peer 0x%pM set param %d value %d\n",
3882 vdev_id, peer_addr, param_id, param_value);
3883
ce42870e 3884 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
5e3dd157
KV		 3885}
3886
3887int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
3888 enum wmi_sta_ps_mode psmode)
3889{
3890 struct wmi_sta_powersave_mode_cmd *cmd;
3891 struct sk_buff *skb;
3892
7aa7a72a 3893 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3894 if (!skb)
3895 return -ENOMEM;
3896
3897 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
3898 cmd->vdev_id = __cpu_to_le32(vdev_id);
3899 cmd->sta_ps_mode = __cpu_to_le32(psmode);
3900
7aa7a72a 3901 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3902 "wmi set powersave id 0x%x mode %d\n",
3903 vdev_id, psmode);
3904
ce42870e
BM		 3905 return ath10k_wmi_cmd_send(ar, skb,
3906 ar->wmi.cmd->sta_powersave_mode_cmdid);
5e3dd157
KV		 3907}
3908
3909int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
3910 enum wmi_sta_powersave_param param_id,
3911 u32 value)
3912{
3913 struct wmi_sta_powersave_param_cmd *cmd;
3914 struct sk_buff *skb;
3915
7aa7a72a 3916 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3917 if (!skb)
3918 return -ENOMEM;
3919
3920 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
3921 cmd->vdev_id = __cpu_to_le32(vdev_id);
3922 cmd->param_id = __cpu_to_le32(param_id);
3923 cmd->param_value = __cpu_to_le32(value);
3924
7aa7a72a 3925 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3926 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
3927 vdev_id, param_id, value);
ce42870e
BM		 3928 return ath10k_wmi_cmd_send(ar, skb,
3929 ar->wmi.cmd->sta_powersave_param_cmdid);
5e3dd157
KV		 3930}
3931
3932int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
3933 enum wmi_ap_ps_peer_param param_id, u32 value)
3934{
3935 struct wmi_ap_ps_peer_cmd *cmd;
3936 struct sk_buff *skb;
3937
3938 if (!mac)
3939 return -EINVAL;
3940
7aa7a72a 3941 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3942 if (!skb)
3943 return -ENOMEM;
3944
3945 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
3946 cmd->vdev_id = __cpu_to_le32(vdev_id);
3947 cmd->param_id = __cpu_to_le32(param_id);
3948 cmd->param_value = __cpu_to_le32(value);
b25f32cb 3949 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5e3dd157 3950
7aa7a72a 3951 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3952 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
3953 vdev_id, param_id, value, mac);
3954
ce42870e
BM		 3955 return ath10k_wmi_cmd_send(ar, skb,
3956 ar->wmi.cmd->ap_ps_peer_param_cmdid);
5e3dd157
KV		 3957}
3958
3959int ath10k_wmi_scan_chan_list(struct ath10k *ar,
3960 const struct wmi_scan_chan_list_arg *arg)
3961{
3962 struct wmi_scan_chan_list_cmd *cmd;
3963 struct sk_buff *skb;
3964 struct wmi_channel_arg *ch;
3965 struct wmi_channel *ci;
3966 int len;
3967 int i;
3968
3969 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
3970
7aa7a72a 3971 skb = ath10k_wmi_alloc_skb(ar, len);
5e3dd157
KV		 3972 if (!skb)
3973 return -EINVAL;
3974
3975 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
3976 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
3977
3978 for (i = 0; i < arg->n_channels; i++) {
3979 u32 flags = 0;
3980
3981 ch = &arg->channels[i];
3982 ci = &cmd->chan_info[i];
3983
3984 if (ch->passive)
3985 flags |= WMI_CHAN_FLAG_PASSIVE;
3986 if (ch->allow_ibss)
3987 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
3988 if (ch->allow_ht)
3989 flags |= WMI_CHAN_FLAG_ALLOW_HT;
3990 if (ch->allow_vht)
3991 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
3992 if (ch->ht40plus)
3993 flags |= WMI_CHAN_FLAG_HT40_PLUS;
e8a50f8b
MP		 3994 if (ch->chan_radar)
3995 flags |= WMI_CHAN_FLAG_DFS;
5e3dd157
KV		 3996
3997 ci->mhz = __cpu_to_le32(ch->freq);
3998 ci->band_center_freq1 = __cpu_to_le32(ch->freq);
3999 ci->band_center_freq2 = 0;
4000 ci->min_power = ch->min_power;
4001 ci->max_power = ch->max_power;
4002 ci->reg_power = ch->max_reg_power;
4003 ci->antenna_max = ch->max_antenna_gain;
5e3dd157
KV		 4004
4005 /* mode & flags share storage */
4006 ci->mode = ch->mode;
4007 ci->flags |= __cpu_to_le32(flags);
4008 }
4009
ce42870e 4010 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
5e3dd157
KV		 4011}
4012
24c88f78
MK		 4013static void
4014ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
4015 const struct wmi_peer_assoc_complete_arg *arg)
5e3dd157 4016{
24c88f78 4017 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
5e3dd157 4018
5e3dd157
KV		 4019 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4020 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
4021 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
4022 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
4023 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
4024 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
4025 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
4026 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
4027 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
4028 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
4029 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
4030 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
4031 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
4032
b25f32cb 4033 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
5e3dd157
KV		 4034
4035 cmd->peer_legacy_rates.num_rates =
4036 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
4037 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
4038 arg->peer_legacy_rates.num_rates);
4039
4040 cmd->peer_ht_rates.num_rates =
4041 __cpu_to_le32(arg->peer_ht_rates.num_rates);
4042 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
4043 arg->peer_ht_rates.num_rates);
4044
4045 cmd->peer_vht_rates.rx_max_rate =
4046 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
4047 cmd->peer_vht_rates.rx_mcs_set =
4048 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
4049 cmd->peer_vht_rates.tx_max_rate =
4050 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
4051 cmd->peer_vht_rates.tx_mcs_set =
4052 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
24c88f78
MK		 4053}
4054
4055static void
4056ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
4057 const struct wmi_peer_assoc_complete_arg *arg)
4058{
4059 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
4060
4061 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4062 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
4063}
4064
4065static void
4066ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
4067 const struct wmi_peer_assoc_complete_arg *arg)
4068{
4069 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4070}
4071
4072static void
4073ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
4074 const struct wmi_peer_assoc_complete_arg *arg)
4075{
4076 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
4077 int max_mcs, max_nss;
4078 u32 info0;
4079
4080 /* TODO: Is using max values okay with firmware? */
4081 max_mcs = 0xf;
4082 max_nss = 0xf;
4083
4084 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
4085 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
4086
4087 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4088 cmd->info0 = __cpu_to_le32(info0);
4089}
4090
4091int ath10k_wmi_peer_assoc(struct ath10k *ar,
4092 const struct wmi_peer_assoc_complete_arg *arg)
4093{
4094 struct sk_buff *skb;
4095 int len;
4096
4097 if (arg->peer_mpdu_density > 16)
4098 return -EINVAL;
4099 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
4100 return -EINVAL;
4101 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
4102 return -EINVAL;
4103
4104 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4105 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
4106 len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
4107 else
4108 len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
4109 } else {
4110 len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
4111 }
4112
7aa7a72a 4113 skb = ath10k_wmi_alloc_skb(ar, len);
24c88f78
MK		 4114 if (!skb)
4115 return -ENOMEM;
4116
4117 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4118 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
4119 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
4120 else
4121 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
4122 } else {
4123 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
4124 }
5e3dd157 4125
7aa7a72a 4126 ath10k_dbg(ar, ATH10K_DBG_WMI,
44d6fa90
CYY		 4127 "wmi peer assoc vdev %d addr %pM (%s)\n",
4128 arg->vdev_id, arg->addr,
4129 arg->peer_reassoc ? "reassociate" : "new");
ce42870e 4130 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
5e3dd157
KV		 4131}
4132
748afc47
MK		 4133/* This function assumes the beacon is already DMA mapped */
4134int ath10k_wmi_beacon_send_ref_nowait(struct ath10k_vif *arvif)
5e3dd157 4135{
748afc47 4136 struct wmi_bcn_tx_ref_cmd *cmd;
5e3dd157 4137 struct sk_buff *skb;
748afc47
MK		 4138 struct sk_buff *beacon = arvif->beacon;
4139 struct ath10k *ar = arvif->ar;
4140 struct ieee80211_hdr *hdr;
e2045481 4141 int ret;
748afc47 4142 u16 fc;
5e3dd157 4143
7aa7a72a 4144 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4145 if (!skb)
4146 return -ENOMEM;
4147
748afc47
MK		 4148 hdr = (struct ieee80211_hdr *)beacon->data;
4149 fc = le16_to_cpu(hdr->frame_control);
4150
4151 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
4152 cmd->vdev_id = __cpu_to_le32(arvif->vdev_id);
4153 cmd->data_len = __cpu_to_le32(beacon->len);
4154 cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr);
4155 cmd->msdu_id = 0;
4156 cmd->frame_control = __cpu_to_le32(fc);
4157 cmd->flags = 0;
24c88f78 4158 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
748afc47
MK		 4159
4160 if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero)
4161 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
4162
4163 if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab)
4164 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
4165
4166 ret = ath10k_wmi_cmd_send_nowait(ar, skb,
4167 ar->wmi.cmd->pdev_send_bcn_cmdid);
5e3dd157 4168
e2045481
MK		 4169 if (ret)
4170 dev_kfree_skb(skb);
4171
4172 return ret;
5e3dd157
KV		 4173}
4174
4175static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
4176 const struct wmi_wmm_params_arg *arg)
4177{
4178 params->cwmin = __cpu_to_le32(arg->cwmin);
4179 params->cwmax = __cpu_to_le32(arg->cwmax);
4180 params->aifs = __cpu_to_le32(arg->aifs);
4181 params->txop = __cpu_to_le32(arg->txop);
4182 params->acm = __cpu_to_le32(arg->acm);
4183 params->no_ack = __cpu_to_le32(arg->no_ack);
4184}
4185
4186int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
5b07e07f 4187 const struct wmi_pdev_set_wmm_params_arg *arg)
5e3dd157
KV		 4188{
4189 struct wmi_pdev_set_wmm_params *cmd;
4190 struct sk_buff *skb;
4191
7aa7a72a 4192 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4193 if (!skb)
4194 return -ENOMEM;
4195
4196 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
4197 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
4198 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
4199 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
4200 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
4201
7aa7a72a 4202 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
ce42870e
BM		 4203 return ath10k_wmi_cmd_send(ar, skb,
4204 ar->wmi.cmd->pdev_set_wmm_params_cmdid);
5e3dd157
KV		 4205}
4206
4207int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
4208{
4209 struct wmi_request_stats_cmd *cmd;
4210 struct sk_buff *skb;
4211
7aa7a72a 4212 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4213 if (!skb)
4214 return -ENOMEM;
4215
4216 cmd = (struct wmi_request_stats_cmd *)skb->data;
4217 cmd->stats_id = __cpu_to_le32(stats_id);
4218
7aa7a72a 4219 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
ce42870e 4220 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
5e3dd157 4221}
9cfbce75
MK		 4222
4223int ath10k_wmi_force_fw_hang(struct ath10k *ar,
4224 enum wmi_force_fw_hang_type type, u32 delay_ms)
4225{
4226 struct wmi_force_fw_hang_cmd *cmd;
4227 struct sk_buff *skb;
4228
7aa7a72a 4229 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9cfbce75
MK		 4230 if (!skb)
4231 return -ENOMEM;
4232
4233 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
4234 cmd->type = __cpu_to_le32(type);
4235 cmd->delay_ms = __cpu_to_le32(delay_ms);
4236
7aa7a72a 4237 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
9cfbce75 4238 type, delay_ms);
ce42870e 4239 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
9cfbce75 4240}
f118a3e5
KV		 4241
4242int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable)
4243{
4244 struct wmi_dbglog_cfg_cmd *cmd;
4245 struct sk_buff *skb;
4246 u32 cfg;
4247
7aa7a72a 4248 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
f118a3e5
KV		 4249 if (!skb)
4250 return -ENOMEM;
4251
4252 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
4253
4254 if (module_enable) {
4255 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
4256 ATH10K_DBGLOG_CFG_LOG_LVL);
4257 } else {
4258 /* set back defaults, all modules with WARN level */
4259 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
4260 ATH10K_DBGLOG_CFG_LOG_LVL);
4261 module_enable = ~0;
4262 }
4263
4264 cmd->module_enable = __cpu_to_le32(module_enable);
4265 cmd->module_valid = __cpu_to_le32(~0);
4266 cmd->config_enable = __cpu_to_le32(cfg);
4267 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
4268
7aa7a72a 4269 ath10k_dbg(ar, ATH10K_DBG_WMI,
f118a3e5
KV		 4270 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
4271 __le32_to_cpu(cmd->module_enable),
4272 __le32_to_cpu(cmd->module_valid),
4273 __le32_to_cpu(cmd->config_enable),
4274 __le32_to_cpu(cmd->config_valid));
4275
4276 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid);
4277}
Linux kernel - Deliverables
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