Commit | Line | Data |
---|---|---|
5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/skbuff.h> | |
2fe5288c | 19 | #include <linux/ctype.h> |
5e3dd157 KV |
20 | |
21 | #include "core.h" | |
22 | #include "htc.h" | |
23 | #include "debug.h" | |
24 | #include "wmi.h" | |
ca996ec5 | 25 | #include "wmi-tlv.h" |
5e3dd157 | 26 | #include "mac.h" |
43d2a30f | 27 | #include "testmode.h" |
d7579d12 | 28 | #include "wmi-ops.h" |
6a94888f | 29 | #include "p2p.h" |
587f7031 | 30 | #include "hw.h" |
5e3dd157 | 31 | |
ce42870e BM |
32 | /* MAIN WMI cmd track */ |
33 | static struct wmi_cmd_map wmi_cmd_map = { | |
34 | .init_cmdid = WMI_INIT_CMDID, | |
35 | .start_scan_cmdid = WMI_START_SCAN_CMDID, | |
36 | .stop_scan_cmdid = WMI_STOP_SCAN_CMDID, | |
37 | .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID, | |
38 | .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID, | |
39 | .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID, | |
40 | .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID, | |
41 | .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID, | |
42 | .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID, | |
43 | .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID, | |
44 | .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID, | |
45 | .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID, | |
46 | .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID, | |
47 | .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID, | |
48 | .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID, | |
49 | .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
50 | .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID, | |
51 | .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID, | |
52 | .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID, | |
53 | .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID, | |
54 | .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID, | |
55 | .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID, | |
56 | .vdev_up_cmdid = WMI_VDEV_UP_CMDID, | |
57 | .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID, | |
58 | .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID, | |
59 | .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID, | |
60 | .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID, | |
61 | .peer_create_cmdid = WMI_PEER_CREATE_CMDID, | |
62 | .peer_delete_cmdid = WMI_PEER_DELETE_CMDID, | |
63 | .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID, | |
64 | .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID, | |
65 | .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID, | |
66 | .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID, | |
67 | .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID, | |
68 | .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID, | |
69 | .bcn_tx_cmdid = WMI_BCN_TX_CMDID, | |
70 | .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID, | |
71 | .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID, | |
72 | .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID, | |
73 | .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID, | |
74 | .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID, | |
75 | .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID, | |
76 | .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID, | |
77 | .addba_send_cmdid = WMI_ADDBA_SEND_CMDID, | |
78 | .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID, | |
79 | .delba_send_cmdid = WMI_DELBA_SEND_CMDID, | |
80 | .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID, | |
81 | .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID, | |
82 | .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID, | |
83 | .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID, | |
84 | .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID, | |
85 | .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID, | |
86 | .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID, | |
87 | .roam_scan_mode = WMI_ROAM_SCAN_MODE, | |
88 | .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD, | |
89 | .roam_scan_period = WMI_ROAM_SCAN_PERIOD, | |
90 | .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
91 | .roam_ap_profile = WMI_ROAM_AP_PROFILE, | |
92 | .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE, | |
93 | .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE, | |
94 | .ofl_scan_period = WMI_OFL_SCAN_PERIOD, | |
95 | .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO, | |
96 | .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY, | |
97 | .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE, | |
98 | .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE, | |
99 | .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID, | |
100 | .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID, | |
101 | .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID, | |
102 | .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID, | |
103 | .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID, | |
104 | .wlan_profile_set_hist_intvl_cmdid = | |
105 | WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
106 | .wlan_profile_get_profile_data_cmdid = | |
107 | WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
108 | .wlan_profile_enable_profile_id_cmdid = | |
109 | WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
110 | .wlan_profile_list_profile_id_cmdid = | |
111 | WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
112 | .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID, | |
113 | .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID, | |
114 | .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID, | |
115 | .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID, | |
116 | .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID, | |
117 | .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID, | |
118 | .wow_enable_disable_wake_event_cmdid = | |
119 | WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
120 | .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID, | |
121 | .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
122 | .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID, | |
123 | .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID, | |
124 | .vdev_spectral_scan_configure_cmdid = | |
125 | WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
126 | .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
127 | .request_stats_cmdid = WMI_REQUEST_STATS_CMDID, | |
128 | .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID, | |
129 | .network_list_offload_config_cmdid = | |
130 | WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID, | |
131 | .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID, | |
132 | .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID, | |
133 | .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, | |
134 | .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID, | |
135 | .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID, | |
136 | .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID, | |
137 | .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID, | |
138 | .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID, | |
139 | .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD, | |
140 | .echo_cmdid = WMI_ECHO_CMDID, | |
141 | .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID, | |
142 | .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID, | |
143 | .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID, | |
144 | .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID, | |
145 | .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID, | |
146 | .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID, | |
147 | .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID, | |
148 | .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID, | |
149 | .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID, | |
a57a6a27 | 150 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
62f77f09 | 151 | .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, |
772b4aee RM |
152 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
153 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
154 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
155 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
156 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
157 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
158 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
159 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
160 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
161 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
162 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
163 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
164 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
165 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
166 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
167 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
168 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
169 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
170 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
171 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
172 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
173 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
174 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
175 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
176 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
177 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
178 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
179 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
180 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
181 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
182 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
183 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
184 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
185 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
186 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
187 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
188 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
189 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
190 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
191 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
192 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
193 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
ce42870e BM |
194 | }; |
195 | ||
b7e3adf9 BM |
196 | /* 10.X WMI cmd track */ |
197 | static struct wmi_cmd_map wmi_10x_cmd_map = { | |
198 | .init_cmdid = WMI_10X_INIT_CMDID, | |
199 | .start_scan_cmdid = WMI_10X_START_SCAN_CMDID, | |
200 | .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID, | |
201 | .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID, | |
34957b25 | 202 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, |
b7e3adf9 BM |
203 | .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID, |
204 | .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID, | |
205 | .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID, | |
206 | .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID, | |
207 | .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID, | |
208 | .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID, | |
209 | .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID, | |
210 | .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID, | |
211 | .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID, | |
212 | .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID, | |
213 | .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
214 | .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID, | |
215 | .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID, | |
216 | .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID, | |
217 | .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID, | |
218 | .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID, | |
219 | .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID, | |
220 | .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID, | |
221 | .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID, | |
222 | .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID, | |
223 | .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID, | |
224 | .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID, | |
225 | .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID, | |
226 | .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID, | |
227 | .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID, | |
228 | .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID, | |
229 | .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID, | |
230 | .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID, | |
231 | .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID, | |
232 | .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID, | |
233 | .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID, | |
234 | .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID, | |
34957b25 | 235 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, |
b7e3adf9 BM |
236 | .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID, |
237 | .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID, | |
238 | .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID, | |
34957b25 | 239 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, |
b7e3adf9 BM |
240 | .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID, |
241 | .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID, | |
242 | .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID, | |
243 | .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID, | |
244 | .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID, | |
245 | .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID, | |
246 | .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID, | |
247 | .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID, | |
248 | .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID, | |
249 | .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID, | |
250 | .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID, | |
251 | .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE, | |
252 | .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD, | |
253 | .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD, | |
254 | .roam_scan_rssi_change_threshold = | |
255 | WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
256 | .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE, | |
257 | .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE, | |
258 | .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE, | |
259 | .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD, | |
260 | .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO, | |
261 | .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY, | |
262 | .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE, | |
263 | .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE, | |
34957b25 | 264 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, |
542fb174 | 265 | .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID, |
34957b25 | 266 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, |
b7e3adf9 BM |
267 | .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID, |
268 | .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID, | |
269 | .wlan_profile_set_hist_intvl_cmdid = | |
270 | WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
271 | .wlan_profile_get_profile_data_cmdid = | |
272 | WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
273 | .wlan_profile_enable_profile_id_cmdid = | |
274 | WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
275 | .wlan_profile_list_profile_id_cmdid = | |
276 | WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
277 | .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID, | |
278 | .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID, | |
279 | .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID, | |
280 | .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID, | |
281 | .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID, | |
282 | .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID, | |
283 | .wow_enable_disable_wake_event_cmdid = | |
284 | WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
285 | .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID, | |
286 | .wow_hostwakeup_from_sleep_cmdid = | |
287 | WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
288 | .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID, | |
289 | .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID, | |
290 | .vdev_spectral_scan_configure_cmdid = | |
291 | WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
292 | .vdev_spectral_scan_enable_cmdid = | |
293 | WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
294 | .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID, | |
34957b25 BM |
295 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, |
296 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
297 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
298 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
299 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
300 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
301 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
302 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
303 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
304 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
305 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
b7e3adf9 BM |
306 | .echo_cmdid = WMI_10X_ECHO_CMDID, |
307 | .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID, | |
308 | .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID, | |
309 | .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID, | |
34957b25 BM |
310 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, |
311 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
312 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
313 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
b7e3adf9 BM |
314 | .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID, |
315 | .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID, | |
a57a6a27 | 316 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
62f77f09 | 317 | .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, |
772b4aee RM |
318 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
319 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
320 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
321 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
322 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
323 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
324 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
325 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
326 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
327 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
328 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
329 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
330 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
331 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
332 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
333 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
334 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
335 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
336 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
337 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
338 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
339 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
340 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
341 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
342 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
343 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
344 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
345 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
346 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
347 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
348 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
349 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
350 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
351 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
352 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
353 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
354 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
355 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
356 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
357 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
358 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
359 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
b7e3adf9 | 360 | }; |
ce42870e | 361 | |
4a16fbec RM |
362 | /* 10.2.4 WMI cmd track */ |
363 | static struct wmi_cmd_map wmi_10_2_4_cmd_map = { | |
364 | .init_cmdid = WMI_10_2_INIT_CMDID, | |
365 | .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, | |
366 | .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, | |
367 | .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, | |
368 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, | |
369 | .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, | |
370 | .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, | |
371 | .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, | |
372 | .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, | |
373 | .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, | |
374 | .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, | |
375 | .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, | |
376 | .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, | |
377 | .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, | |
378 | .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
379 | .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, | |
380 | .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, | |
381 | .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, | |
382 | .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, | |
383 | .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, | |
384 | .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, | |
385 | .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, | |
386 | .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, | |
387 | .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, | |
388 | .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, | |
389 | .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, | |
390 | .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, | |
391 | .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, | |
392 | .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, | |
393 | .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, | |
394 | .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, | |
395 | .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, | |
396 | .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, | |
397 | .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, | |
398 | .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, | |
399 | .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, | |
400 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
401 | .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, | |
402 | .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, | |
403 | .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, | |
404 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
405 | .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, | |
406 | .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, | |
407 | .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, | |
408 | .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, | |
409 | .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, | |
410 | .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, | |
411 | .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, | |
412 | .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, | |
413 | .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, | |
414 | .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, | |
415 | .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, | |
416 | .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, | |
417 | .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, | |
418 | .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, | |
419 | .roam_scan_rssi_change_threshold = | |
420 | WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
421 | .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, | |
422 | .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, | |
423 | .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, | |
424 | .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, | |
425 | .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, | |
426 | .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, | |
427 | .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, | |
428 | .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, | |
429 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, | |
430 | .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, | |
431 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, | |
432 | .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, | |
433 | .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, | |
434 | .wlan_profile_set_hist_intvl_cmdid = | |
435 | WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
436 | .wlan_profile_get_profile_data_cmdid = | |
437 | WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
438 | .wlan_profile_enable_profile_id_cmdid = | |
439 | WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
440 | .wlan_profile_list_profile_id_cmdid = | |
441 | WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
442 | .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, | |
443 | .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, | |
444 | .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, | |
445 | .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, | |
446 | .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, | |
447 | .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, | |
448 | .wow_enable_disable_wake_event_cmdid = | |
449 | WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
450 | .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, | |
451 | .wow_hostwakeup_from_sleep_cmdid = | |
452 | WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
453 | .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, | |
454 | .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, | |
455 | .vdev_spectral_scan_configure_cmdid = | |
456 | WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
457 | .vdev_spectral_scan_enable_cmdid = | |
458 | WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
459 | .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, | |
460 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
461 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
462 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
463 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
464 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
465 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
466 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
467 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
468 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
469 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
470 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
471 | .echo_cmdid = WMI_10_2_ECHO_CMDID, | |
472 | .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, | |
473 | .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, | |
474 | .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, | |
475 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
476 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
477 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
478 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
479 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, | |
480 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, | |
a57a6a27 | 481 | .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, |
62f77f09 | 482 | .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS, |
772b4aee RM |
483 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
484 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
485 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
486 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
487 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
488 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
489 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
490 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
491 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
492 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
493 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
494 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
495 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
496 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
497 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
498 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
499 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
500 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
501 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
502 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
503 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
504 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
505 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
506 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
507 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
508 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
509 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
510 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
511 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
512 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
513 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
514 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
515 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
516 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
517 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
518 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
519 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
520 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
521 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
522 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
523 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
524 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
4a16fbec RM |
525 | }; |
526 | ||
2d491e69 RM |
527 | /* 10.4 WMI cmd track */ |
528 | static struct wmi_cmd_map wmi_10_4_cmd_map = { | |
529 | .init_cmdid = WMI_10_4_INIT_CMDID, | |
530 | .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID, | |
531 | .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID, | |
532 | .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID, | |
533 | .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID, | |
534 | .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID, | |
535 | .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID, | |
536 | .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID, | |
537 | .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID, | |
538 | .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID, | |
539 | .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID, | |
540 | .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID, | |
541 | .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID, | |
542 | .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID, | |
543 | .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID, | |
544 | .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
545 | .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID, | |
546 | .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID, | |
547 | .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID, | |
548 | .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID, | |
549 | .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID, | |
550 | .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID, | |
551 | .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID, | |
552 | .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID, | |
553 | .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID, | |
554 | .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID, | |
555 | .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID, | |
556 | .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID, | |
557 | .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID, | |
558 | .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID, | |
559 | .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID, | |
560 | .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID, | |
561 | .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID, | |
562 | .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID, | |
563 | .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID, | |
564 | .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID, | |
565 | .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID, | |
566 | .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID, | |
567 | .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID, | |
568 | .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID, | |
569 | .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID, | |
570 | .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID, | |
571 | .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID, | |
572 | .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID, | |
573 | .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID, | |
574 | .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID, | |
575 | .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID, | |
576 | .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID, | |
577 | .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID, | |
578 | .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID, | |
579 | .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID, | |
580 | .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID, | |
581 | .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID, | |
582 | .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE, | |
583 | .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD, | |
584 | .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD, | |
585 | .roam_scan_rssi_change_threshold = | |
586 | WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
587 | .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE, | |
588 | .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE, | |
589 | .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE, | |
590 | .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD, | |
591 | .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO, | |
592 | .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY, | |
593 | .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE, | |
594 | .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE, | |
595 | .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID, | |
596 | .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID, | |
597 | .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID, | |
598 | .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID, | |
599 | .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID, | |
600 | .wlan_profile_set_hist_intvl_cmdid = | |
601 | WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
602 | .wlan_profile_get_profile_data_cmdid = | |
603 | WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
604 | .wlan_profile_enable_profile_id_cmdid = | |
605 | WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
606 | .wlan_profile_list_profile_id_cmdid = | |
607 | WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
608 | .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID, | |
609 | .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID, | |
610 | .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID, | |
611 | .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID, | |
612 | .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID, | |
613 | .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID, | |
614 | .wow_enable_disable_wake_event_cmdid = | |
615 | WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
616 | .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID, | |
617 | .wow_hostwakeup_from_sleep_cmdid = | |
618 | WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
619 | .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID, | |
620 | .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID, | |
621 | .vdev_spectral_scan_configure_cmdid = | |
622 | WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
623 | .vdev_spectral_scan_enable_cmdid = | |
624 | WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
625 | .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID, | |
626 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
627 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
628 | .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID, | |
629 | .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID, | |
630 | .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID, | |
631 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
632 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
633 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
634 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
635 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
636 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
637 | .echo_cmdid = WMI_10_4_ECHO_CMDID, | |
638 | .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID, | |
639 | .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID, | |
640 | .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID, | |
641 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
642 | .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID, | |
643 | .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID, | |
644 | .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID, | |
645 | .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID, | |
646 | .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID, | |
647 | .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID, | |
648 | .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED, | |
649 | .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED, | |
650 | .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED, | |
651 | .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED, | |
652 | .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID, | |
653 | .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID, | |
654 | .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID, | |
655 | .wlan_peer_caching_add_peer_cmdid = | |
656 | WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID, | |
657 | .wlan_peer_caching_evict_peer_cmdid = | |
658 | WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID, | |
659 | .wlan_peer_caching_restore_peer_cmdid = | |
660 | WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID, | |
661 | .wlan_peer_caching_print_all_peers_info_cmdid = | |
662 | WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID, | |
663 | .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID, | |
664 | .peer_add_proxy_sta_entry_cmdid = | |
665 | WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID, | |
666 | .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID, | |
667 | .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID, | |
668 | .nan_cmdid = WMI_10_4_NAN_CMDID, | |
669 | .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID, | |
670 | .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID, | |
671 | .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID, | |
672 | .pdev_smart_ant_set_rx_antenna_cmdid = | |
673 | WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, | |
674 | .peer_smart_ant_set_tx_antenna_cmdid = | |
675 | WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, | |
676 | .peer_smart_ant_set_train_info_cmdid = | |
677 | WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, | |
678 | .peer_smart_ant_set_node_config_ops_cmdid = | |
679 | WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, | |
680 | .pdev_set_antenna_switch_table_cmdid = | |
681 | WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, | |
682 | .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID, | |
683 | .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID, | |
684 | .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID, | |
685 | .pdev_ratepwr_chainmsk_table_cmdid = | |
686 | WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID, | |
687 | .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID, | |
688 | .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID, | |
689 | .fwtest_cmdid = WMI_10_4_FWTEST_CMDID, | |
690 | .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID, | |
691 | .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID, | |
692 | .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID, | |
693 | .pdev_get_ani_ofdm_config_cmdid = | |
694 | WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID, | |
695 | .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID, | |
696 | .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID, | |
697 | .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID, | |
698 | .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID, | |
699 | .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID, | |
700 | .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID, | |
701 | .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID, | |
702 | .vdev_filter_neighbor_rx_packets_cmdid = | |
703 | WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, | |
704 | .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID, | |
705 | .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID, | |
706 | .pdev_bss_chan_info_request_cmdid = | |
707 | WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, | |
708 | }; | |
709 | ||
6d1506e7 BM |
710 | /* MAIN WMI VDEV param map */ |
711 | static struct wmi_vdev_param_map wmi_vdev_param_map = { | |
712 | .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD, | |
713 | .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
714 | .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL, | |
715 | .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL, | |
716 | .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE, | |
717 | .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE, | |
718 | .slot_time = WMI_VDEV_PARAM_SLOT_TIME, | |
719 | .preamble = WMI_VDEV_PARAM_PREAMBLE, | |
720 | .swba_time = WMI_VDEV_PARAM_SWBA_TIME, | |
721 | .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD, | |
722 | .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME, | |
723 | .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL, | |
724 | .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD, | |
725 | .wmi_vdev_oc_scheduler_air_time_limit = | |
726 | WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
727 | .wds = WMI_VDEV_PARAM_WDS, | |
728 | .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW, | |
729 | .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX, | |
730 | .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT, | |
731 | .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT, | |
732 | .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM, | |
733 | .chwidth = WMI_VDEV_PARAM_CHWIDTH, | |
734 | .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET, | |
735 | .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION, | |
736 | .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT, | |
737 | .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE, | |
738 | .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE, | |
739 | .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE, | |
740 | .sgi = WMI_VDEV_PARAM_SGI, | |
741 | .ldpc = WMI_VDEV_PARAM_LDPC, | |
742 | .tx_stbc = WMI_VDEV_PARAM_TX_STBC, | |
743 | .rx_stbc = WMI_VDEV_PARAM_RX_STBC, | |
744 | .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD, | |
745 | .def_keyid = WMI_VDEV_PARAM_DEF_KEYID, | |
746 | .nss = WMI_VDEV_PARAM_NSS, | |
747 | .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE, | |
748 | .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE, | |
749 | .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE, | |
750 | .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE, | |
751 | .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
752 | .ap_keepalive_min_idle_inactive_time_secs = | |
753 | WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
754 | .ap_keepalive_max_idle_inactive_time_secs = | |
755 | WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
756 | .ap_keepalive_max_unresponsive_time_secs = | |
757 | WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
758 | .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS, | |
759 | .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
760 | .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS, | |
761 | .txbf = WMI_VDEV_PARAM_TXBF, | |
762 | .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE, | |
763 | .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY, | |
764 | .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE, | |
765 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
766 | WMI_VDEV_PARAM_UNSUPPORTED, | |
93841a15 RM |
767 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
768 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
769 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
770 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
771 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
772 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
773 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
774 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
775 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
776 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
777 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
778 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
779 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
780 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
781 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
782 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
6d1506e7 BM |
783 | }; |
784 | ||
785 | /* 10.X WMI VDEV param map */ | |
786 | static struct wmi_vdev_param_map wmi_10x_vdev_param_map = { | |
787 | .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, | |
788 | .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
789 | .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, | |
790 | .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, | |
791 | .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, | |
792 | .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, | |
793 | .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, | |
794 | .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, | |
795 | .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, | |
796 | .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, | |
797 | .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, | |
798 | .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, | |
799 | .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, | |
800 | .wmi_vdev_oc_scheduler_air_time_limit = | |
801 | WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
802 | .wds = WMI_10X_VDEV_PARAM_WDS, | |
803 | .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, | |
804 | .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, | |
805 | .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
806 | .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
807 | .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, | |
808 | .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, | |
809 | .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, | |
810 | .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, | |
811 | .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, | |
812 | .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, | |
813 | .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, | |
814 | .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, | |
815 | .sgi = WMI_10X_VDEV_PARAM_SGI, | |
816 | .ldpc = WMI_10X_VDEV_PARAM_LDPC, | |
817 | .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, | |
818 | .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, | |
819 | .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, | |
820 | .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, | |
821 | .nss = WMI_10X_VDEV_PARAM_NSS, | |
822 | .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, | |
823 | .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, | |
824 | .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, | |
825 | .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, | |
826 | .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
827 | .ap_keepalive_min_idle_inactive_time_secs = | |
828 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
829 | .ap_keepalive_max_idle_inactive_time_secs = | |
830 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
831 | .ap_keepalive_max_unresponsive_time_secs = | |
832 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
833 | .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, | |
834 | .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, | |
835 | .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, | |
836 | .txbf = WMI_VDEV_PARAM_UNSUPPORTED, | |
837 | .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, | |
838 | .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, | |
839 | .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
840 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
841 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
93841a15 RM |
842 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
843 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
844 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
845 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
846 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
847 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
848 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
849 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
850 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
851 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
852 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
853 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
854 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
855 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
856 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
857 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
6d1506e7 BM |
858 | }; |
859 | ||
4a16fbec RM |
860 | static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = { |
861 | .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, | |
862 | .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
863 | .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, | |
864 | .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, | |
865 | .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, | |
866 | .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, | |
867 | .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, | |
868 | .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, | |
869 | .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, | |
870 | .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, | |
871 | .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, | |
872 | .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, | |
873 | .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, | |
874 | .wmi_vdev_oc_scheduler_air_time_limit = | |
875 | WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
876 | .wds = WMI_10X_VDEV_PARAM_WDS, | |
877 | .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, | |
878 | .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, | |
879 | .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
880 | .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
881 | .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, | |
882 | .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, | |
883 | .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, | |
884 | .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, | |
885 | .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, | |
886 | .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, | |
887 | .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, | |
888 | .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, | |
889 | .sgi = WMI_10X_VDEV_PARAM_SGI, | |
890 | .ldpc = WMI_10X_VDEV_PARAM_LDPC, | |
891 | .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, | |
892 | .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, | |
893 | .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, | |
894 | .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, | |
895 | .nss = WMI_10X_VDEV_PARAM_NSS, | |
896 | .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, | |
897 | .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, | |
898 | .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, | |
899 | .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, | |
900 | .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
901 | .ap_keepalive_min_idle_inactive_time_secs = | |
902 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
903 | .ap_keepalive_max_idle_inactive_time_secs = | |
904 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
905 | .ap_keepalive_max_unresponsive_time_secs = | |
906 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
907 | .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, | |
908 | .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, | |
909 | .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, | |
910 | .txbf = WMI_VDEV_PARAM_UNSUPPORTED, | |
911 | .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, | |
912 | .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, | |
913 | .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
914 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
915 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
93841a15 RM |
916 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
917 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
918 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
919 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
920 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
921 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
922 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
923 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
924 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
925 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
926 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
927 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
928 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
929 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
930 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
931 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
932 | }; | |
933 | ||
934 | static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = { | |
935 | .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD, | |
936 | .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
937 | .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL, | |
938 | .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL, | |
939 | .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE, | |
940 | .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE, | |
941 | .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME, | |
942 | .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE, | |
943 | .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME, | |
944 | .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD, | |
945 | .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME, | |
946 | .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL, | |
947 | .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD, | |
948 | .wmi_vdev_oc_scheduler_air_time_limit = | |
949 | WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
950 | .wds = WMI_10_4_VDEV_PARAM_WDS, | |
951 | .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW, | |
952 | .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX, | |
953 | .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT, | |
954 | .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT, | |
955 | .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM, | |
956 | .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH, | |
957 | .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET, | |
958 | .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION, | |
959 | .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT, | |
960 | .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE, | |
961 | .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE, | |
962 | .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE, | |
963 | .sgi = WMI_10_4_VDEV_PARAM_SGI, | |
964 | .ldpc = WMI_10_4_VDEV_PARAM_LDPC, | |
965 | .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC, | |
966 | .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC, | |
967 | .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD, | |
968 | .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID, | |
969 | .nss = WMI_10_4_VDEV_PARAM_NSS, | |
970 | .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE, | |
971 | .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE, | |
972 | .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE, | |
973 | .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE, | |
974 | .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
975 | .ap_keepalive_min_idle_inactive_time_secs = | |
976 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
977 | .ap_keepalive_max_idle_inactive_time_secs = | |
978 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
979 | .ap_keepalive_max_unresponsive_time_secs = | |
980 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
981 | .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS, | |
982 | .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET, | |
983 | .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS, | |
984 | .txbf = WMI_10_4_VDEV_PARAM_TXBF, | |
985 | .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE, | |
986 | .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY, | |
987 | .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE, | |
988 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
989 | WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
990 | .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES, | |
991 | .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR, | |
992 | .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET, | |
993 | .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE, | |
994 | .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK, | |
995 | .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK, | |
996 | .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, | |
997 | .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, | |
998 | .early_rx_bmiss_sample_cycle = | |
999 | WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, | |
1000 | .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP, | |
1001 | .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP, | |
1002 | .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, | |
1003 | .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA, | |
1004 | .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC, | |
1005 | .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE, | |
1006 | .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK, | |
4a16fbec RM |
1007 | }; |
1008 | ||
226a339b BM |
1009 | static struct wmi_pdev_param_map wmi_pdev_param_map = { |
1010 | .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK, | |
1011 | .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK, | |
1012 | .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G, | |
1013 | .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G, | |
1014 | .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE, | |
1015 | .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE, | |
1016 | .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE, | |
1017 | .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
1018 | .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE, | |
1019 | .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW, | |
1020 | .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
1021 | .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH, | |
1022 | .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH, | |
1023 | .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
1024 | .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE, | |
1025 | .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
1026 | .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
1027 | .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
1028 | .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
1029 | .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
1030 | .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
1031 | .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE, | |
1032 | .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
1033 | .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE, | |
1034 | .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE, | |
1035 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, | |
1036 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
1037 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
1038 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, | |
1039 | .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
1040 | .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
1041 | .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
1042 | .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
1043 | .pmf_qos = WMI_PDEV_PARAM_PMF_QOS, | |
1044 | .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE, | |
226a339b BM |
1045 | .dcs = WMI_PDEV_PARAM_DCS, |
1046 | .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE, | |
1047 | .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD, | |
1048 | .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
1049 | .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL, | |
1050 | .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL, | |
1051 | .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN, | |
1052 | .proxy_sta = WMI_PDEV_PARAM_PROXY_STA, | |
1053 | .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG, | |
1054 | .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP, | |
1055 | .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1056 | .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED, | |
1057 | .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
a7bd3e99 | 1058 | .cal_period = WMI_PDEV_PARAM_UNSUPPORTED, |
d86561ff RM |
1059 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
1060 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1061 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
1062 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1063 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1064 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
1065 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
1066 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1067 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1068 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1069 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1070 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1071 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1072 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1073 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
1074 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1075 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1076 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1077 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1078 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1079 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1080 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
1081 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
1082 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
1083 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1084 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1085 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
1086 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
1087 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
1088 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
1089 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
1090 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
1091 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1092 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1093 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1094 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1095 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1096 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
1097 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1098 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1099 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
1100 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
226a339b BM |
1101 | }; |
1102 | ||
1103 | static struct wmi_pdev_param_map wmi_10x_pdev_param_map = { | |
1104 | .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, | |
1105 | .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, | |
1106 | .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, | |
1107 | .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, | |
1108 | .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, | |
1109 | .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, | |
1110 | .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, | |
1111 | .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
1112 | .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, | |
1113 | .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, | |
1114 | .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
1115 | .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, | |
1116 | .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, | |
1117 | .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
1118 | .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, | |
1119 | .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
1120 | .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
1121 | .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
1122 | .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
1123 | .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
1124 | .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
1125 | .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, | |
1126 | .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
1127 | .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, | |
1128 | .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, | |
1129 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, | |
1130 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, | |
1131 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, | |
1132 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, | |
1133 | .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
1134 | .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
1135 | .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
1136 | .bcnflt_stats_update_period = | |
1137 | WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
1138 | .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, | |
ab6258ed | 1139 | .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, |
226a339b BM |
1140 | .dcs = WMI_10X_PDEV_PARAM_DCS, |
1141 | .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, | |
1142 | .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, | |
1143 | .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
1144 | .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, | |
1145 | .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, | |
1146 | .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, | |
1147 | .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, | |
1148 | .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, | |
1149 | .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, | |
1150 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, | |
1151 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, | |
1152 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, | |
a7bd3e99 | 1153 | .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, |
d86561ff RM |
1154 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
1155 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1156 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
1157 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1158 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1159 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
1160 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
1161 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1162 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1163 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1164 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1165 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1166 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1167 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1168 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
1169 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1170 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1171 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1172 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1173 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1174 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1175 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
1176 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
1177 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
1178 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1179 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1180 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
1181 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
1182 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
1183 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
1184 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
1185 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
1186 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1187 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1188 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1189 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1190 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1191 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
1192 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1193 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1194 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
1195 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
226a339b BM |
1196 | }; |
1197 | ||
4a16fbec RM |
1198 | static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = { |
1199 | .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, | |
1200 | .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, | |
1201 | .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, | |
1202 | .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, | |
1203 | .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, | |
1204 | .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, | |
1205 | .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, | |
1206 | .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
1207 | .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, | |
1208 | .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, | |
1209 | .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
1210 | .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, | |
1211 | .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, | |
1212 | .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
1213 | .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, | |
1214 | .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
1215 | .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
1216 | .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
1217 | .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
1218 | .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
1219 | .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
1220 | .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, | |
1221 | .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
1222 | .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, | |
1223 | .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, | |
1224 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, | |
1225 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, | |
1226 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, | |
1227 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, | |
1228 | .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
1229 | .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
1230 | .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
1231 | .bcnflt_stats_update_period = | |
1232 | WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
1233 | .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, | |
1234 | .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, | |
1235 | .dcs = WMI_10X_PDEV_PARAM_DCS, | |
1236 | .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, | |
1237 | .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, | |
1238 | .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
1239 | .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, | |
1240 | .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, | |
1241 | .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, | |
1242 | .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, | |
1243 | .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, | |
1244 | .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, | |
1245 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, | |
1246 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, | |
1247 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, | |
1248 | .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, | |
d86561ff RM |
1249 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
1250 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1251 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
1252 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1253 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1254 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
1255 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
1256 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1257 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1258 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
1259 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1260 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
1261 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1262 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
1263 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
1264 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1265 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1266 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1267 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1268 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1269 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
1270 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
1271 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
1272 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
1273 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1274 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
1275 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
1276 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
1277 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
1278 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
1279 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
1280 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
1281 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1282 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
1283 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1284 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
1285 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
1286 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
1287 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1288 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
1289 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
1290 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
4a16fbec RM |
1291 | }; |
1292 | ||
24c88f78 MK |
1293 | /* firmware 10.2 specific mappings */ |
1294 | static struct wmi_cmd_map wmi_10_2_cmd_map = { | |
1295 | .init_cmdid = WMI_10_2_INIT_CMDID, | |
1296 | .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, | |
1297 | .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, | |
1298 | .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, | |
1299 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, | |
1300 | .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, | |
1301 | .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, | |
1302 | .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, | |
1303 | .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, | |
1304 | .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, | |
1305 | .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, | |
1306 | .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, | |
1307 | .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, | |
1308 | .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, | |
1309 | .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
1310 | .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, | |
1311 | .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, | |
1312 | .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, | |
1313 | .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, | |
1314 | .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, | |
1315 | .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, | |
1316 | .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, | |
1317 | .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, | |
1318 | .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, | |
1319 | .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, | |
1320 | .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, | |
1321 | .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, | |
1322 | .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, | |
1323 | .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, | |
1324 | .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, | |
1325 | .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, | |
1326 | .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, | |
1327 | .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, | |
1328 | .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, | |
1329 | .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, | |
1330 | .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, | |
1331 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
1332 | .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, | |
1333 | .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, | |
1334 | .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, | |
1335 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
1336 | .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, | |
1337 | .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, | |
1338 | .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, | |
1339 | .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, | |
1340 | .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, | |
1341 | .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, | |
1342 | .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, | |
1343 | .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, | |
1344 | .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, | |
1345 | .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, | |
1346 | .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, | |
1347 | .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, | |
1348 | .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, | |
1349 | .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, | |
1350 | .roam_scan_rssi_change_threshold = | |
1351 | WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
1352 | .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, | |
1353 | .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, | |
1354 | .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, | |
1355 | .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, | |
1356 | .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, | |
1357 | .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, | |
1358 | .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, | |
1359 | .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, | |
1360 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, | |
1361 | .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, | |
1362 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, | |
1363 | .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, | |
1364 | .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, | |
1365 | .wlan_profile_set_hist_intvl_cmdid = | |
1366 | WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
1367 | .wlan_profile_get_profile_data_cmdid = | |
1368 | WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
1369 | .wlan_profile_enable_profile_id_cmdid = | |
1370 | WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
1371 | .wlan_profile_list_profile_id_cmdid = | |
1372 | WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
1373 | .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, | |
1374 | .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, | |
1375 | .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, | |
1376 | .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, | |
1377 | .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, | |
1378 | .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, | |
1379 | .wow_enable_disable_wake_event_cmdid = | |
1380 | WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
1381 | .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, | |
1382 | .wow_hostwakeup_from_sleep_cmdid = | |
1383 | WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
1384 | .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, | |
1385 | .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, | |
1386 | .vdev_spectral_scan_configure_cmdid = | |
1387 | WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
1388 | .vdev_spectral_scan_enable_cmdid = | |
1389 | WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
1390 | .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, | |
1391 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
1392 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
1393 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
1394 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
1395 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
1396 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
1397 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
1398 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
1399 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
1400 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
1401 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
1402 | .echo_cmdid = WMI_10_2_ECHO_CMDID, | |
1403 | .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, | |
1404 | .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, | |
1405 | .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, | |
1406 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
1407 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
1408 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
1409 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
1410 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, | |
1411 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, | |
a57a6a27 | 1412 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
62f77f09 | 1413 | .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, |
772b4aee RM |
1414 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
1415 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
1416 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
1417 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
1418 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
1419 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
1420 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
1421 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
1422 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
1423 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
1424 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
1425 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
1426 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
1427 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
1428 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
1429 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
1430 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
1431 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
1432 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
1433 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
1434 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
1435 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
1436 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
1437 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
1438 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
1439 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
1440 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
1441 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
1442 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
1443 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
1444 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
1445 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
24c88f78 MK |
1446 | }; |
1447 | ||
d86561ff RM |
1448 | static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = { |
1449 | .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK, | |
1450 | .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK, | |
1451 | .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G, | |
1452 | .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G, | |
1453 | .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE, | |
1454 | .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE, | |
1455 | .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE, | |
1456 | .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
1457 | .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE, | |
1458 | .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW, | |
1459 | .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
1460 | .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH, | |
1461 | .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH, | |
1462 | .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
1463 | .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE, | |
1464 | .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
1465 | .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
1466 | .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
1467 | .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
1468 | .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
1469 | .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
1470 | .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE, | |
1471 | .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
1472 | .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE, | |
1473 | .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE, | |
1474 | .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH, | |
1475 | .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, | |
1476 | .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
1477 | .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, | |
1478 | .pdev_stats_update_period = | |
1479 | WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
1480 | .vdev_stats_update_period = | |
1481 | WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
1482 | .peer_stats_update_period = | |
1483 | WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
1484 | .bcnflt_stats_update_period = | |
1485 | WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
1486 | .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS, | |
1487 | .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE, | |
1488 | .dcs = WMI_10_4_PDEV_PARAM_DCS, | |
1489 | .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE, | |
1490 | .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD, | |
1491 | .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
1492 | .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL, | |
1493 | .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL, | |
1494 | .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN, | |
1495 | .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA, | |
1496 | .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG, | |
1497 | .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP, | |
1498 | .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET, | |
1499 | .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR, | |
1500 | .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE, | |
1501 | .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD, | |
1502 | .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST, | |
1503 | .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE, | |
1504 | .smart_antenna_default_antenna = | |
1505 | WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, | |
1506 | .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE, | |
1507 | .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID, | |
1508 | .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN, | |
1509 | .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER, | |
1510 | .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID, | |
1511 | .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE, | |
1512 | .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE, | |
1513 | .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, | |
1514 | .remove_mcast2ucast_buffer = | |
1515 | WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, | |
1516 | .peer_sta_ps_statechg_enable = | |
1517 | WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE, | |
1518 | .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, | |
1519 | .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS, | |
1520 | .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID, | |
1521 | .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID, | |
1522 | .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID, | |
1523 | .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, | |
1524 | .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID, | |
1525 | .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID, | |
1526 | .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS, | |
1527 | .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY, | |
1528 | .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION, | |
1529 | .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD, | |
1530 | .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE, | |
1531 | .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO, | |
1532 | .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH, | |
1533 | .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION, | |
1534 | .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN, | |
1535 | .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT, | |
1536 | .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL, | |
1537 | .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G, | |
1538 | .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G, | |
1539 | .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU, | |
1540 | .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU, | |
1541 | .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD, | |
1542 | .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE, | |
1543 | .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET, | |
1544 | .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET, | |
1545 | .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR, | |
1546 | .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR, | |
1547 | }; | |
1548 | ||
3fab30f7 T |
1549 | static const struct wmi_peer_flags_map wmi_peer_flags_map = { |
1550 | .auth = WMI_PEER_AUTH, | |
1551 | .qos = WMI_PEER_QOS, | |
1552 | .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY, | |
1553 | .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY, | |
1554 | .apsd = WMI_PEER_APSD, | |
1555 | .ht = WMI_PEER_HT, | |
1556 | .bw40 = WMI_PEER_40MHZ, | |
1557 | .stbc = WMI_PEER_STBC, | |
1558 | .ldbc = WMI_PEER_LDPC, | |
1559 | .dyn_mimops = WMI_PEER_DYN_MIMOPS, | |
1560 | .static_mimops = WMI_PEER_STATIC_MIMOPS, | |
1561 | .spatial_mux = WMI_PEER_SPATIAL_MUX, | |
1562 | .vht = WMI_PEER_VHT, | |
1563 | .bw80 = WMI_PEER_80MHZ, | |
1564 | .vht_2g = WMI_PEER_VHT_2G, | |
1565 | .pmf = WMI_PEER_PMF, | |
1566 | }; | |
1567 | ||
1568 | static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = { | |
1569 | .auth = WMI_10X_PEER_AUTH, | |
1570 | .qos = WMI_10X_PEER_QOS, | |
1571 | .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY, | |
1572 | .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY, | |
1573 | .apsd = WMI_10X_PEER_APSD, | |
1574 | .ht = WMI_10X_PEER_HT, | |
1575 | .bw40 = WMI_10X_PEER_40MHZ, | |
1576 | .stbc = WMI_10X_PEER_STBC, | |
1577 | .ldbc = WMI_10X_PEER_LDPC, | |
1578 | .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS, | |
1579 | .static_mimops = WMI_10X_PEER_STATIC_MIMOPS, | |
1580 | .spatial_mux = WMI_10X_PEER_SPATIAL_MUX, | |
1581 | .vht = WMI_10X_PEER_VHT, | |
1582 | .bw80 = WMI_10X_PEER_80MHZ, | |
1583 | }; | |
1584 | ||
1585 | static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = { | |
1586 | .auth = WMI_10_2_PEER_AUTH, | |
1587 | .qos = WMI_10_2_PEER_QOS, | |
1588 | .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY, | |
1589 | .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY, | |
1590 | .apsd = WMI_10_2_PEER_APSD, | |
1591 | .ht = WMI_10_2_PEER_HT, | |
1592 | .bw40 = WMI_10_2_PEER_40MHZ, | |
1593 | .stbc = WMI_10_2_PEER_STBC, | |
1594 | .ldbc = WMI_10_2_PEER_LDPC, | |
1595 | .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS, | |
1596 | .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS, | |
1597 | .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX, | |
1598 | .vht = WMI_10_2_PEER_VHT, | |
1599 | .bw80 = WMI_10_2_PEER_80MHZ, | |
1600 | .vht_2g = WMI_10_2_PEER_VHT_2G, | |
1601 | .pmf = WMI_10_2_PEER_PMF, | |
1602 | }; | |
1603 | ||
0226d602 MK |
1604 | void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, |
1605 | const struct wmi_channel_arg *arg) | |
2d66721c MK |
1606 | { |
1607 | u32 flags = 0; | |
1608 | ||
1609 | memset(ch, 0, sizeof(*ch)); | |
1610 | ||
1611 | if (arg->passive) | |
1612 | flags |= WMI_CHAN_FLAG_PASSIVE; | |
1613 | if (arg->allow_ibss) | |
1614 | flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED; | |
1615 | if (arg->allow_ht) | |
1616 | flags |= WMI_CHAN_FLAG_ALLOW_HT; | |
1617 | if (arg->allow_vht) | |
1618 | flags |= WMI_CHAN_FLAG_ALLOW_VHT; | |
1619 | if (arg->ht40plus) | |
1620 | flags |= WMI_CHAN_FLAG_HT40_PLUS; | |
1621 | if (arg->chan_radar) | |
1622 | flags |= WMI_CHAN_FLAG_DFS; | |
1623 | ||
1624 | ch->mhz = __cpu_to_le32(arg->freq); | |
1625 | ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1); | |
1626 | ch->band_center_freq2 = 0; | |
1627 | ch->min_power = arg->min_power; | |
1628 | ch->max_power = arg->max_power; | |
1629 | ch->reg_power = arg->max_reg_power; | |
1630 | ch->antenna_max = arg->max_antenna_gain; | |
1631 | ||
1632 | /* mode & flags share storage */ | |
1633 | ch->mode = arg->mode; | |
1634 | ch->flags |= __cpu_to_le32(flags); | |
1635 | } | |
1636 | ||
5e3dd157 KV |
1637 | int ath10k_wmi_wait_for_service_ready(struct ath10k *ar) |
1638 | { | |
9eea5689 | 1639 | unsigned long time_left; |
af762c0b | 1640 | |
9eea5689 NMG |
1641 | time_left = wait_for_completion_timeout(&ar->wmi.service_ready, |
1642 | WMI_SERVICE_READY_TIMEOUT_HZ); | |
1643 | if (!time_left) | |
1644 | return -ETIMEDOUT; | |
1645 | return 0; | |
5e3dd157 KV |
1646 | } |
1647 | ||
1648 | int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar) | |
1649 | { | |
9eea5689 | 1650 | unsigned long time_left; |
af762c0b | 1651 | |
9eea5689 NMG |
1652 | time_left = wait_for_completion_timeout(&ar->wmi.unified_ready, |
1653 | WMI_UNIFIED_READY_TIMEOUT_HZ); | |
1654 | if (!time_left) | |
1655 | return -ETIMEDOUT; | |
1656 | return 0; | |
5e3dd157 KV |
1657 | } |
1658 | ||
666a73f3 | 1659 | struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len) |
5e3dd157 KV |
1660 | { |
1661 | struct sk_buff *skb; | |
1662 | u32 round_len = roundup(len, 4); | |
1663 | ||
7aa7a72a | 1664 | skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len); |
5e3dd157 KV |
1665 | if (!skb) |
1666 | return NULL; | |
1667 | ||
1668 | skb_reserve(skb, WMI_SKB_HEADROOM); | |
1669 | if (!IS_ALIGNED((unsigned long)skb->data, 4)) | |
7aa7a72a | 1670 | ath10k_warn(ar, "Unaligned WMI skb\n"); |
5e3dd157 KV |
1671 | |
1672 | skb_put(skb, round_len); | |
1673 | memset(skb->data, 0, round_len); | |
1674 | ||
1675 | return skb; | |
1676 | } | |
1677 | ||
1678 | static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb) | |
1679 | { | |
1680 | dev_kfree_skb(skb); | |
5e3dd157 KV |
1681 | } |
1682 | ||
d7579d12 MK |
1683 | int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, |
1684 | u32 cmd_id) | |
5e3dd157 KV |
1685 | { |
1686 | struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb); | |
1687 | struct wmi_cmd_hdr *cmd_hdr; | |
be8b3943 | 1688 | int ret; |
5e3dd157 KV |
1689 | u32 cmd = 0; |
1690 | ||
1691 | if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
1692 | return -ENOMEM; | |
1693 | ||
1694 | cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID); | |
1695 | ||
1696 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
1697 | cmd_hdr->cmd_id = __cpu_to_le32(cmd); | |
1698 | ||
5e3dd157 | 1699 | memset(skb_cb, 0, sizeof(*skb_cb)); |
be8b3943 | 1700 | ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb); |
d35a6c18 | 1701 | trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret); |
5e3dd157 | 1702 | |
be8b3943 MK |
1703 | if (ret) |
1704 | goto err_pull; | |
5e3dd157 | 1705 | |
be8b3943 MK |
1706 | return 0; |
1707 | ||
1708 | err_pull: | |
1709 | skb_pull(skb, sizeof(struct wmi_cmd_hdr)); | |
1710 | return ret; | |
1711 | } | |
1712 | ||
ed54388a MK |
1713 | static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif) |
1714 | { | |
af21319f | 1715 | struct ath10k *ar = arvif->ar; |
9ad50182 | 1716 | struct ath10k_skb_cb *cb; |
af21319f | 1717 | struct sk_buff *bcn; |
ed54388a MK |
1718 | int ret; |
1719 | ||
af21319f | 1720 | spin_lock_bh(&ar->data_lock); |
ed54388a | 1721 | |
af21319f | 1722 | bcn = arvif->beacon; |
ed54388a | 1723 | |
af21319f MK |
1724 | if (!bcn) |
1725 | goto unlock; | |
ed54388a | 1726 | |
9ad50182 | 1727 | cb = ATH10K_SKB_CB(bcn); |
ed54388a | 1728 | |
af21319f MK |
1729 | switch (arvif->beacon_state) { |
1730 | case ATH10K_BEACON_SENDING: | |
1731 | case ATH10K_BEACON_SENT: | |
1732 | break; | |
1733 | case ATH10K_BEACON_SCHEDULED: | |
1734 | arvif->beacon_state = ATH10K_BEACON_SENDING; | |
1735 | spin_unlock_bh(&ar->data_lock); | |
1736 | ||
1737 | ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar, | |
1738 | arvif->vdev_id, | |
1739 | bcn->data, bcn->len, | |
1740 | cb->paddr, | |
1741 | cb->bcn.dtim_zero, | |
1742 | cb->bcn.deliver_cab); | |
1743 | ||
1744 | spin_lock_bh(&ar->data_lock); | |
1745 | ||
1746 | if (ret == 0) | |
1747 | arvif->beacon_state = ATH10K_BEACON_SENT; | |
1748 | else | |
1749 | arvif->beacon_state = ATH10K_BEACON_SCHEDULED; | |
1750 | } | |
ed54388a | 1751 | |
af21319f MK |
1752 | unlock: |
1753 | spin_unlock_bh(&ar->data_lock); | |
ed54388a MK |
1754 | } |
1755 | ||
1756 | static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac, | |
1757 | struct ieee80211_vif *vif) | |
1758 | { | |
1759 | struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif); | |
1760 | ||
1761 | ath10k_wmi_tx_beacon_nowait(arvif); | |
1762 | } | |
1763 | ||
1764 | static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar) | |
1765 | { | |
ed54388a MK |
1766 | ieee80211_iterate_active_interfaces_atomic(ar->hw, |
1767 | IEEE80211_IFACE_ITER_NORMAL, | |
1768 | ath10k_wmi_tx_beacons_iter, | |
1769 | NULL); | |
ed54388a MK |
1770 | } |
1771 | ||
12acbc43 | 1772 | static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar) |
be8b3943 | 1773 | { |
ed54388a MK |
1774 | /* try to send pending beacons first. they take priority */ |
1775 | ath10k_wmi_tx_beacons_nowait(ar); | |
1776 | ||
be8b3943 MK |
1777 | wake_up(&ar->wmi.tx_credits_wq); |
1778 | } | |
1779 | ||
666a73f3 | 1780 | int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id) |
be8b3943 | 1781 | { |
34957b25 | 1782 | int ret = -EOPNOTSUPP; |
be8b3943 | 1783 | |
56b84287 KV |
1784 | might_sleep(); |
1785 | ||
34957b25 | 1786 | if (cmd_id == WMI_CMD_UNSUPPORTED) { |
7aa7a72a | 1787 | ath10k_warn(ar, "wmi command %d is not supported by firmware\n", |
55321559 BM |
1788 | cmd_id); |
1789 | return ret; | |
1790 | } | |
be8b3943 MK |
1791 | |
1792 | wait_event_timeout(ar->wmi.tx_credits_wq, ({ | |
ed54388a MK |
1793 | /* try to send pending beacons first. they take priority */ |
1794 | ath10k_wmi_tx_beacons_nowait(ar); | |
1795 | ||
be8b3943 | 1796 | ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id); |
7962b0d8 MK |
1797 | |
1798 | if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags)) | |
1799 | ret = -ESHUTDOWN; | |
1800 | ||
be8b3943 MK |
1801 | (ret != -EAGAIN); |
1802 | }), 3*HZ); | |
1803 | ||
1804 | if (ret) | |
5e3dd157 | 1805 | dev_kfree_skb_any(skb); |
5e3dd157 | 1806 | |
be8b3943 | 1807 | return ret; |
5e3dd157 KV |
1808 | } |
1809 | ||
d7579d12 MK |
1810 | static struct sk_buff * |
1811 | ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu) | |
5e00d31a | 1812 | { |
5e00d31a BM |
1813 | struct wmi_mgmt_tx_cmd *cmd; |
1814 | struct ieee80211_hdr *hdr; | |
d7579d12 | 1815 | struct sk_buff *skb; |
5e00d31a | 1816 | int len; |
d7579d12 | 1817 | u32 buf_len = msdu->len; |
5e00d31a BM |
1818 | u16 fc; |
1819 | ||
d7579d12 | 1820 | hdr = (struct ieee80211_hdr *)msdu->data; |
5e00d31a BM |
1821 | fc = le16_to_cpu(hdr->frame_control); |
1822 | ||
1823 | if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control))) | |
d7579d12 | 1824 | return ERR_PTR(-EINVAL); |
5e00d31a | 1825 | |
d7579d12 | 1826 | len = sizeof(cmd->hdr) + msdu->len; |
eeab266c MK |
1827 | |
1828 | if ((ieee80211_is_action(hdr->frame_control) || | |
1829 | ieee80211_is_deauth(hdr->frame_control) || | |
1830 | ieee80211_is_disassoc(hdr->frame_control)) && | |
1831 | ieee80211_has_protected(hdr->frame_control)) { | |
1832 | len += IEEE80211_CCMP_MIC_LEN; | |
1833 | buf_len += IEEE80211_CCMP_MIC_LEN; | |
1834 | } | |
1835 | ||
5e00d31a BM |
1836 | len = round_up(len, 4); |
1837 | ||
d7579d12 MK |
1838 | skb = ath10k_wmi_alloc_skb(ar, len); |
1839 | if (!skb) | |
1840 | return ERR_PTR(-ENOMEM); | |
5e00d31a | 1841 | |
d7579d12 | 1842 | cmd = (struct wmi_mgmt_tx_cmd *)skb->data; |
5e00d31a | 1843 | |
d7579d12 | 1844 | cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(msdu)->vdev_id); |
5e00d31a BM |
1845 | cmd->hdr.tx_rate = 0; |
1846 | cmd->hdr.tx_power = 0; | |
eeab266c | 1847 | cmd->hdr.buf_len = __cpu_to_le32(buf_len); |
5e00d31a | 1848 | |
b25f32cb | 1849 | ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr)); |
d7579d12 | 1850 | memcpy(cmd->buf, msdu->data, msdu->len); |
5e00d31a | 1851 | |
7aa7a72a | 1852 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n", |
d7579d12 | 1853 | msdu, skb->len, fc & IEEE80211_FCTL_FTYPE, |
5e00d31a | 1854 | fc & IEEE80211_FCTL_STYPE); |
5ce8e7fd RM |
1855 | trace_ath10k_tx_hdr(ar, skb->data, skb->len); |
1856 | trace_ath10k_tx_payload(ar, skb->data, skb->len); | |
5e00d31a | 1857 | |
d7579d12 | 1858 | return skb; |
5e00d31a BM |
1859 | } |
1860 | ||
5c81c7fd MK |
1861 | static void ath10k_wmi_event_scan_started(struct ath10k *ar) |
1862 | { | |
1863 | lockdep_assert_held(&ar->data_lock); | |
1864 | ||
1865 | switch (ar->scan.state) { | |
1866 | case ATH10K_SCAN_IDLE: | |
1867 | case ATH10K_SCAN_RUNNING: | |
1868 | case ATH10K_SCAN_ABORTING: | |
7aa7a72a | 1869 | ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n", |
5c81c7fd MK |
1870 | ath10k_scan_state_str(ar->scan.state), |
1871 | ar->scan.state); | |
1872 | break; | |
1873 | case ATH10K_SCAN_STARTING: | |
1874 | ar->scan.state = ATH10K_SCAN_RUNNING; | |
1875 | ||
1876 | if (ar->scan.is_roc) | |
1877 | ieee80211_ready_on_channel(ar->hw); | |
1878 | ||
1879 | complete(&ar->scan.started); | |
1880 | break; | |
1881 | } | |
1882 | } | |
1883 | ||
2f9eec0b BG |
1884 | static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar) |
1885 | { | |
1886 | lockdep_assert_held(&ar->data_lock); | |
1887 | ||
1888 | switch (ar->scan.state) { | |
1889 | case ATH10K_SCAN_IDLE: | |
1890 | case ATH10K_SCAN_RUNNING: | |
1891 | case ATH10K_SCAN_ABORTING: | |
1892 | ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n", | |
1893 | ath10k_scan_state_str(ar->scan.state), | |
1894 | ar->scan.state); | |
1895 | break; | |
1896 | case ATH10K_SCAN_STARTING: | |
1897 | complete(&ar->scan.started); | |
1898 | __ath10k_scan_finish(ar); | |
1899 | break; | |
1900 | } | |
1901 | } | |
1902 | ||
5c81c7fd MK |
1903 | static void ath10k_wmi_event_scan_completed(struct ath10k *ar) |
1904 | { | |
1905 | lockdep_assert_held(&ar->data_lock); | |
1906 | ||
1907 | switch (ar->scan.state) { | |
1908 | case ATH10K_SCAN_IDLE: | |
1909 | case ATH10K_SCAN_STARTING: | |
1910 | /* One suspected reason scan can be completed while starting is | |
1911 | * if firmware fails to deliver all scan events to the host, | |
1912 | * e.g. when transport pipe is full. This has been observed | |
1913 | * with spectral scan phyerr events starving wmi transport | |
1914 | * pipe. In such case the "scan completed" event should be (and | |
1915 | * is) ignored by the host as it may be just firmware's scan | |
1916 | * state machine recovering. | |
1917 | */ | |
7aa7a72a | 1918 | ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n", |
5c81c7fd MK |
1919 | ath10k_scan_state_str(ar->scan.state), |
1920 | ar->scan.state); | |
1921 | break; | |
1922 | case ATH10K_SCAN_RUNNING: | |
1923 | case ATH10K_SCAN_ABORTING: | |
1924 | __ath10k_scan_finish(ar); | |
1925 | break; | |
1926 | } | |
1927 | } | |
1928 | ||
1929 | static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar) | |
1930 | { | |
1931 | lockdep_assert_held(&ar->data_lock); | |
1932 | ||
1933 | switch (ar->scan.state) { | |
1934 | case ATH10K_SCAN_IDLE: | |
1935 | case ATH10K_SCAN_STARTING: | |
7aa7a72a | 1936 | ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n", |
5c81c7fd MK |
1937 | ath10k_scan_state_str(ar->scan.state), |
1938 | ar->scan.state); | |
1939 | break; | |
1940 | case ATH10K_SCAN_RUNNING: | |
1941 | case ATH10K_SCAN_ABORTING: | |
1942 | ar->scan_channel = NULL; | |
1943 | break; | |
1944 | } | |
1945 | } | |
1946 | ||
1947 | static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq) | |
1948 | { | |
1949 | lockdep_assert_held(&ar->data_lock); | |
1950 | ||
1951 | switch (ar->scan.state) { | |
1952 | case ATH10K_SCAN_IDLE: | |
1953 | case ATH10K_SCAN_STARTING: | |
7aa7a72a | 1954 | ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n", |
5c81c7fd MK |
1955 | ath10k_scan_state_str(ar->scan.state), |
1956 | ar->scan.state); | |
1957 | break; | |
1958 | case ATH10K_SCAN_RUNNING: | |
1959 | case ATH10K_SCAN_ABORTING: | |
1960 | ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); | |
1961 | ||
1962 | if (ar->scan.is_roc && ar->scan.roc_freq == freq) | |
1963 | complete(&ar->scan.on_channel); | |
1964 | break; | |
1965 | } | |
1966 | } | |
1967 | ||
9ff8b724 MK |
1968 | static const char * |
1969 | ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type, | |
1970 | enum wmi_scan_completion_reason reason) | |
1971 | { | |
1972 | switch (type) { | |
1973 | case WMI_SCAN_EVENT_STARTED: | |
1974 | return "started"; | |
1975 | case WMI_SCAN_EVENT_COMPLETED: | |
1976 | switch (reason) { | |
1977 | case WMI_SCAN_REASON_COMPLETED: | |
1978 | return "completed"; | |
1979 | case WMI_SCAN_REASON_CANCELLED: | |
1980 | return "completed [cancelled]"; | |
1981 | case WMI_SCAN_REASON_PREEMPTED: | |
1982 | return "completed [preempted]"; | |
1983 | case WMI_SCAN_REASON_TIMEDOUT: | |
1984 | return "completed [timedout]"; | |
b2297baa RM |
1985 | case WMI_SCAN_REASON_INTERNAL_FAILURE: |
1986 | return "completed [internal err]"; | |
9ff8b724 MK |
1987 | case WMI_SCAN_REASON_MAX: |
1988 | break; | |
1989 | } | |
1990 | return "completed [unknown]"; | |
1991 | case WMI_SCAN_EVENT_BSS_CHANNEL: | |
1992 | return "bss channel"; | |
1993 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL: | |
1994 | return "foreign channel"; | |
1995 | case WMI_SCAN_EVENT_DEQUEUED: | |
1996 | return "dequeued"; | |
1997 | case WMI_SCAN_EVENT_PREEMPTED: | |
1998 | return "preempted"; | |
1999 | case WMI_SCAN_EVENT_START_FAILED: | |
2000 | return "start failed"; | |
b2297baa RM |
2001 | case WMI_SCAN_EVENT_RESTARTED: |
2002 | return "restarted"; | |
2003 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT: | |
2004 | return "foreign channel exit"; | |
9ff8b724 MK |
2005 | default: |
2006 | return "unknown"; | |
2007 | } | |
2008 | } | |
2009 | ||
d7579d12 MK |
2010 | static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb, |
2011 | struct wmi_scan_ev_arg *arg) | |
32653cf1 MK |
2012 | { |
2013 | struct wmi_scan_event *ev = (void *)skb->data; | |
2014 | ||
2015 | if (skb->len < sizeof(*ev)) | |
2016 | return -EPROTO; | |
2017 | ||
2018 | skb_pull(skb, sizeof(*ev)); | |
2019 | arg->event_type = ev->event_type; | |
2020 | arg->reason = ev->reason; | |
2021 | arg->channel_freq = ev->channel_freq; | |
2022 | arg->scan_req_id = ev->scan_req_id; | |
2023 | arg->scan_id = ev->scan_id; | |
2024 | arg->vdev_id = ev->vdev_id; | |
2025 | ||
2026 | return 0; | |
2027 | } | |
2028 | ||
0226d602 | 2029 | int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2030 | { |
32653cf1 | 2031 | struct wmi_scan_ev_arg arg = {}; |
5e3dd157 KV |
2032 | enum wmi_scan_event_type event_type; |
2033 | enum wmi_scan_completion_reason reason; | |
2034 | u32 freq; | |
2035 | u32 req_id; | |
2036 | u32 scan_id; | |
2037 | u32 vdev_id; | |
32653cf1 | 2038 | int ret; |
5e3dd157 | 2039 | |
d7579d12 | 2040 | ret = ath10k_wmi_pull_scan(ar, skb, &arg); |
32653cf1 MK |
2041 | if (ret) { |
2042 | ath10k_warn(ar, "failed to parse scan event: %d\n", ret); | |
2043 | return ret; | |
2044 | } | |
2045 | ||
2046 | event_type = __le32_to_cpu(arg.event_type); | |
2047 | reason = __le32_to_cpu(arg.reason); | |
2048 | freq = __le32_to_cpu(arg.channel_freq); | |
2049 | req_id = __le32_to_cpu(arg.scan_req_id); | |
2050 | scan_id = __le32_to_cpu(arg.scan_id); | |
2051 | vdev_id = __le32_to_cpu(arg.vdev_id); | |
5e3dd157 | 2052 | |
5c81c7fd MK |
2053 | spin_lock_bh(&ar->data_lock); |
2054 | ||
7aa7a72a | 2055 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5c81c7fd | 2056 | "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", |
9ff8b724 | 2057 | ath10k_wmi_event_scan_type_str(event_type, reason), |
5c81c7fd MK |
2058 | event_type, reason, freq, req_id, scan_id, vdev_id, |
2059 | ath10k_scan_state_str(ar->scan.state), ar->scan.state); | |
5e3dd157 KV |
2060 | |
2061 | switch (event_type) { | |
2062 | case WMI_SCAN_EVENT_STARTED: | |
5c81c7fd | 2063 | ath10k_wmi_event_scan_started(ar); |
5e3dd157 KV |
2064 | break; |
2065 | case WMI_SCAN_EVENT_COMPLETED: | |
5c81c7fd | 2066 | ath10k_wmi_event_scan_completed(ar); |
5e3dd157 KV |
2067 | break; |
2068 | case WMI_SCAN_EVENT_BSS_CHANNEL: | |
5c81c7fd | 2069 | ath10k_wmi_event_scan_bss_chan(ar); |
5e3dd157 KV |
2070 | break; |
2071 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL: | |
5c81c7fd MK |
2072 | ath10k_wmi_event_scan_foreign_chan(ar, freq); |
2073 | break; | |
2074 | case WMI_SCAN_EVENT_START_FAILED: | |
7aa7a72a | 2075 | ath10k_warn(ar, "received scan start failure event\n"); |
2f9eec0b | 2076 | ath10k_wmi_event_scan_start_failed(ar); |
5e3dd157 KV |
2077 | break; |
2078 | case WMI_SCAN_EVENT_DEQUEUED: | |
5e3dd157 | 2079 | case WMI_SCAN_EVENT_PREEMPTED: |
b2297baa RM |
2080 | case WMI_SCAN_EVENT_RESTARTED: |
2081 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT: | |
5e3dd157 KV |
2082 | default: |
2083 | break; | |
2084 | } | |
2085 | ||
2086 | spin_unlock_bh(&ar->data_lock); | |
2087 | return 0; | |
2088 | } | |
2089 | ||
2090 | static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode) | |
2091 | { | |
2092 | enum ieee80211_band band; | |
2093 | ||
2094 | switch (phy_mode) { | |
2095 | case MODE_11A: | |
2096 | case MODE_11NA_HT20: | |
2097 | case MODE_11NA_HT40: | |
2098 | case MODE_11AC_VHT20: | |
2099 | case MODE_11AC_VHT40: | |
2100 | case MODE_11AC_VHT80: | |
2101 | band = IEEE80211_BAND_5GHZ; | |
2102 | break; | |
2103 | case MODE_11G: | |
2104 | case MODE_11B: | |
2105 | case MODE_11GONLY: | |
2106 | case MODE_11NG_HT20: | |
2107 | case MODE_11NG_HT40: | |
2108 | case MODE_11AC_VHT20_2G: | |
2109 | case MODE_11AC_VHT40_2G: | |
2110 | case MODE_11AC_VHT80_2G: | |
2111 | default: | |
2112 | band = IEEE80211_BAND_2GHZ; | |
2113 | } | |
2114 | ||
2115 | return band; | |
2116 | } | |
2117 | ||
504f6cdf SM |
2118 | /* If keys are configured, HW decrypts all frames |
2119 | * with protected bit set. Mark such frames as decrypted. | |
2120 | */ | |
2121 | static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar, | |
2122 | struct sk_buff *skb, | |
2123 | struct ieee80211_rx_status *status) | |
2124 | { | |
2125 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
2126 | unsigned int hdrlen; | |
2127 | bool peer_key; | |
2128 | u8 *addr, keyidx; | |
2129 | ||
2130 | if (!ieee80211_is_auth(hdr->frame_control) || | |
2131 | !ieee80211_has_protected(hdr->frame_control)) | |
2132 | return; | |
2133 | ||
2134 | hdrlen = ieee80211_hdrlen(hdr->frame_control); | |
2135 | if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN)) | |
2136 | return; | |
2137 | ||
2138 | keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT; | |
2139 | addr = ieee80211_get_SA(hdr); | |
2140 | ||
2141 | spin_lock_bh(&ar->data_lock); | |
2142 | peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx); | |
2143 | spin_unlock_bh(&ar->data_lock); | |
2144 | ||
2145 | if (peer_key) { | |
2146 | ath10k_dbg(ar, ATH10K_DBG_MAC, | |
2147 | "mac wep key present for peer %pM\n", addr); | |
2148 | status->flag |= RX_FLAG_DECRYPTED; | |
2149 | } | |
2150 | } | |
2151 | ||
d7579d12 MK |
2152 | static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb, |
2153 | struct wmi_mgmt_rx_ev_arg *arg) | |
5e3dd157 | 2154 | { |
0d9b0438 MK |
2155 | struct wmi_mgmt_rx_event_v1 *ev_v1; |
2156 | struct wmi_mgmt_rx_event_v2 *ev_v2; | |
2157 | struct wmi_mgmt_rx_hdr_v1 *ev_hdr; | |
32653cf1 MK |
2158 | size_t pull_len; |
2159 | u32 msdu_len; | |
2160 | ||
2161 | if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) { | |
2162 | ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data; | |
2163 | ev_hdr = &ev_v2->hdr.v1; | |
2164 | pull_len = sizeof(*ev_v2); | |
2165 | } else { | |
2166 | ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data; | |
2167 | ev_hdr = &ev_v1->hdr; | |
2168 | pull_len = sizeof(*ev_v1); | |
2169 | } | |
2170 | ||
2171 | if (skb->len < pull_len) | |
2172 | return -EPROTO; | |
2173 | ||
2174 | skb_pull(skb, pull_len); | |
2175 | arg->channel = ev_hdr->channel; | |
2176 | arg->buf_len = ev_hdr->buf_len; | |
2177 | arg->status = ev_hdr->status; | |
2178 | arg->snr = ev_hdr->snr; | |
2179 | arg->phy_mode = ev_hdr->phy_mode; | |
2180 | arg->rate = ev_hdr->rate; | |
2181 | ||
2182 | msdu_len = __le32_to_cpu(arg->buf_len); | |
2183 | if (skb->len < msdu_len) | |
2184 | return -EPROTO; | |
2185 | ||
2186 | /* the WMI buffer might've ended up being padded to 4 bytes due to HTC | |
2187 | * trailer with credit update. Trim the excess garbage. | |
2188 | */ | |
2189 | skb_trim(skb, msdu_len); | |
2190 | ||
2191 | return 0; | |
2192 | } | |
2193 | ||
1c092961 RM |
2194 | static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar, |
2195 | struct sk_buff *skb, | |
2196 | struct wmi_mgmt_rx_ev_arg *arg) | |
2197 | { | |
2198 | struct wmi_10_4_mgmt_rx_event *ev; | |
2199 | struct wmi_10_4_mgmt_rx_hdr *ev_hdr; | |
2200 | size_t pull_len; | |
2201 | u32 msdu_len; | |
2202 | ||
2203 | ev = (struct wmi_10_4_mgmt_rx_event *)skb->data; | |
2204 | ev_hdr = &ev->hdr; | |
2205 | pull_len = sizeof(*ev); | |
2206 | ||
2207 | if (skb->len < pull_len) | |
2208 | return -EPROTO; | |
2209 | ||
2210 | skb_pull(skb, pull_len); | |
2211 | arg->channel = ev_hdr->channel; | |
2212 | arg->buf_len = ev_hdr->buf_len; | |
2213 | arg->status = ev_hdr->status; | |
2214 | arg->snr = ev_hdr->snr; | |
2215 | arg->phy_mode = ev_hdr->phy_mode; | |
2216 | arg->rate = ev_hdr->rate; | |
2217 | ||
2218 | msdu_len = __le32_to_cpu(arg->buf_len); | |
2219 | if (skb->len < msdu_len) | |
2220 | return -EPROTO; | |
2221 | ||
2222 | /* Make sure bytes added for padding are removed. */ | |
2223 | skb_trim(skb, msdu_len); | |
2224 | ||
2225 | return 0; | |
2226 | } | |
2227 | ||
0226d602 | 2228 | int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) |
32653cf1 MK |
2229 | { |
2230 | struct wmi_mgmt_rx_ev_arg arg = {}; | |
5e3dd157 KV |
2231 | struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); |
2232 | struct ieee80211_hdr *hdr; | |
01cebe1c | 2233 | struct ieee80211_supported_band *sband; |
5e3dd157 KV |
2234 | u32 rx_status; |
2235 | u32 channel; | |
2236 | u32 phy_mode; | |
2237 | u32 snr; | |
2238 | u32 rate; | |
2239 | u32 buf_len; | |
2240 | u16 fc; | |
32653cf1 | 2241 | int ret; |
0d9b0438 | 2242 | |
d7579d12 | 2243 | ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg); |
32653cf1 MK |
2244 | if (ret) { |
2245 | ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret); | |
08603f2e | 2246 | dev_kfree_skb(skb); |
32653cf1 | 2247 | return ret; |
0d9b0438 | 2248 | } |
5e3dd157 | 2249 | |
32653cf1 MK |
2250 | channel = __le32_to_cpu(arg.channel); |
2251 | buf_len = __le32_to_cpu(arg.buf_len); | |
2252 | rx_status = __le32_to_cpu(arg.status); | |
2253 | snr = __le32_to_cpu(arg.snr); | |
2254 | phy_mode = __le32_to_cpu(arg.phy_mode); | |
2255 | rate = __le32_to_cpu(arg.rate); | |
5e3dd157 KV |
2256 | |
2257 | memset(status, 0, sizeof(*status)); | |
2258 | ||
7aa7a72a | 2259 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
5e3dd157 KV |
2260 | "event mgmt rx status %08x\n", rx_status); |
2261 | ||
2c9bcece MP |
2262 | if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) || |
2263 | (rx_status & (WMI_RX_STATUS_ERR_DECRYPT | | |
2264 | WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) { | |
d67d0a02 MK |
2265 | dev_kfree_skb(skb); |
2266 | return 0; | |
2267 | } | |
2268 | ||
5e3dd157 KV |
2269 | if (rx_status & WMI_RX_STATUS_ERR_MIC) |
2270 | status->flag |= RX_FLAG_MMIC_ERROR; | |
2271 | ||
21040bf9 | 2272 | /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to |
453cdb61 | 2273 | * MODE_11B. This means phy_mode is not a reliable source for the band |
21040bf9 MK |
2274 | * of mgmt rx. |
2275 | */ | |
2276 | if (channel >= 1 && channel <= 14) { | |
2277 | status->band = IEEE80211_BAND_2GHZ; | |
2278 | } else if (channel >= 36 && channel <= 165) { | |
2279 | status->band = IEEE80211_BAND_5GHZ; | |
453cdb61 | 2280 | } else { |
21040bf9 MK |
2281 | /* Shouldn't happen unless list of advertised channels to |
2282 | * mac80211 has been changed. | |
2283 | */ | |
2284 | WARN_ON_ONCE(1); | |
2285 | dev_kfree_skb(skb); | |
2286 | return 0; | |
453cdb61 MK |
2287 | } |
2288 | ||
21040bf9 MK |
2289 | if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ) |
2290 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n"); | |
2291 | ||
01cebe1c MK |
2292 | sband = &ar->mac.sbands[status->band]; |
2293 | ||
5e3dd157 KV |
2294 | status->freq = ieee80211_channel_to_frequency(channel, status->band); |
2295 | status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR; | |
01cebe1c | 2296 | status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100); |
5e3dd157 | 2297 | |
5e3dd157 KV |
2298 | hdr = (struct ieee80211_hdr *)skb->data; |
2299 | fc = le16_to_cpu(hdr->frame_control); | |
2300 | ||
504f6cdf SM |
2301 | ath10k_wmi_handle_wep_reauth(ar, skb, status); |
2302 | ||
2b6a6a90 MK |
2303 | /* FW delivers WEP Shared Auth frame with Protected Bit set and |
2304 | * encrypted payload. However in case of PMF it delivers decrypted | |
2305 | * frames with Protected Bit set. */ | |
2306 | if (ieee80211_has_protected(hdr->frame_control) && | |
2307 | !ieee80211_is_auth(hdr->frame_control)) { | |
eeab266c MK |
2308 | status->flag |= RX_FLAG_DECRYPTED; |
2309 | ||
2310 | if (!ieee80211_is_action(hdr->frame_control) && | |
2311 | !ieee80211_is_deauth(hdr->frame_control) && | |
2312 | !ieee80211_is_disassoc(hdr->frame_control)) { | |
2313 | status->flag |= RX_FLAG_IV_STRIPPED | | |
2314 | RX_FLAG_MMIC_STRIPPED; | |
2315 | hdr->frame_control = __cpu_to_le16(fc & | |
5e3dd157 | 2316 | ~IEEE80211_FCTL_PROTECTED); |
eeab266c | 2317 | } |
5e3dd157 KV |
2318 | } |
2319 | ||
cc9904e6 MK |
2320 | if (ieee80211_is_beacon(hdr->frame_control)) |
2321 | ath10k_mac_handle_beacon(ar, skb); | |
2322 | ||
7aa7a72a | 2323 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
5e3dd157 KV |
2324 | "event mgmt rx skb %p len %d ftype %02x stype %02x\n", |
2325 | skb, skb->len, | |
2326 | fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); | |
2327 | ||
7aa7a72a | 2328 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
5e3dd157 KV |
2329 | "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", |
2330 | status->freq, status->band, status->signal, | |
2331 | status->rate_idx); | |
2332 | ||
5e3dd157 KV |
2333 | ieee80211_rx(ar->hw, skb); |
2334 | return 0; | |
2335 | } | |
2336 | ||
2e1dea40 MK |
2337 | static int freq_to_idx(struct ath10k *ar, int freq) |
2338 | { | |
2339 | struct ieee80211_supported_band *sband; | |
2340 | int band, ch, idx = 0; | |
2341 | ||
2342 | for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) { | |
2343 | sband = ar->hw->wiphy->bands[band]; | |
2344 | if (!sband) | |
2345 | continue; | |
2346 | ||
2347 | for (ch = 0; ch < sband->n_channels; ch++, idx++) | |
2348 | if (sband->channels[ch].center_freq == freq) | |
2349 | goto exit; | |
2350 | } | |
2351 | ||
2352 | exit: | |
2353 | return idx; | |
2354 | } | |
2355 | ||
d7579d12 MK |
2356 | static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb, |
2357 | struct wmi_ch_info_ev_arg *arg) | |
32653cf1 MK |
2358 | { |
2359 | struct wmi_chan_info_event *ev = (void *)skb->data; | |
2360 | ||
2361 | if (skb->len < sizeof(*ev)) | |
2362 | return -EPROTO; | |
2363 | ||
2364 | skb_pull(skb, sizeof(*ev)); | |
2365 | arg->err_code = ev->err_code; | |
2366 | arg->freq = ev->freq; | |
2367 | arg->cmd_flags = ev->cmd_flags; | |
2368 | arg->noise_floor = ev->noise_floor; | |
2369 | arg->rx_clear_count = ev->rx_clear_count; | |
2370 | arg->cycle_count = ev->cycle_count; | |
2371 | ||
2372 | return 0; | |
2373 | } | |
2374 | ||
b2297baa RM |
2375 | static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar, |
2376 | struct sk_buff *skb, | |
2377 | struct wmi_ch_info_ev_arg *arg) | |
2378 | { | |
2379 | struct wmi_10_4_chan_info_event *ev = (void *)skb->data; | |
2380 | ||
2381 | if (skb->len < sizeof(*ev)) | |
2382 | return -EPROTO; | |
2383 | ||
2384 | skb_pull(skb, sizeof(*ev)); | |
2385 | arg->err_code = ev->err_code; | |
2386 | arg->freq = ev->freq; | |
2387 | arg->cmd_flags = ev->cmd_flags; | |
2388 | arg->noise_floor = ev->noise_floor; | |
2389 | arg->rx_clear_count = ev->rx_clear_count; | |
2390 | arg->cycle_count = ev->cycle_count; | |
2391 | arg->chan_tx_pwr_range = ev->chan_tx_pwr_range; | |
2392 | arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; | |
2393 | arg->rx_frame_count = ev->rx_frame_count; | |
2394 | ||
2395 | return 0; | |
2396 | } | |
2397 | ||
0226d602 | 2398 | void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2399 | { |
32653cf1 | 2400 | struct wmi_ch_info_ev_arg arg = {}; |
2e1dea40 MK |
2401 | struct survey_info *survey; |
2402 | u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count; | |
32653cf1 | 2403 | int idx, ret; |
2e1dea40 | 2404 | |
d7579d12 | 2405 | ret = ath10k_wmi_pull_ch_info(ar, skb, &arg); |
32653cf1 MK |
2406 | if (ret) { |
2407 | ath10k_warn(ar, "failed to parse chan info event: %d\n", ret); | |
2408 | return; | |
2409 | } | |
2e1dea40 | 2410 | |
32653cf1 MK |
2411 | err_code = __le32_to_cpu(arg.err_code); |
2412 | freq = __le32_to_cpu(arg.freq); | |
2413 | cmd_flags = __le32_to_cpu(arg.cmd_flags); | |
2414 | noise_floor = __le32_to_cpu(arg.noise_floor); | |
2415 | rx_clear_count = __le32_to_cpu(arg.rx_clear_count); | |
2416 | cycle_count = __le32_to_cpu(arg.cycle_count); | |
2e1dea40 | 2417 | |
7aa7a72a | 2418 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
2e1dea40 MK |
2419 | "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n", |
2420 | err_code, freq, cmd_flags, noise_floor, rx_clear_count, | |
2421 | cycle_count); | |
2422 | ||
2423 | spin_lock_bh(&ar->data_lock); | |
2424 | ||
5c81c7fd MK |
2425 | switch (ar->scan.state) { |
2426 | case ATH10K_SCAN_IDLE: | |
2427 | case ATH10K_SCAN_STARTING: | |
7aa7a72a | 2428 | ath10k_warn(ar, "received chan info event without a scan request, ignoring\n"); |
2e1dea40 | 2429 | goto exit; |
5c81c7fd MK |
2430 | case ATH10K_SCAN_RUNNING: |
2431 | case ATH10K_SCAN_ABORTING: | |
2432 | break; | |
2e1dea40 MK |
2433 | } |
2434 | ||
2435 | idx = freq_to_idx(ar, freq); | |
2436 | if (idx >= ARRAY_SIZE(ar->survey)) { | |
7aa7a72a | 2437 | ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n", |
2e1dea40 MK |
2438 | freq, idx); |
2439 | goto exit; | |
2440 | } | |
2441 | ||
2442 | if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) { | |
44b7d483 MK |
2443 | if (ar->ch_info_can_report_survey) { |
2444 | survey = &ar->survey[idx]; | |
2445 | survey->noise = noise_floor; | |
2446 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
2447 | ||
2448 | ath10k_hw_fill_survey_time(ar, | |
2449 | survey, | |
2450 | cycle_count, | |
2451 | rx_clear_count, | |
2452 | ar->survey_last_cycle_count, | |
2453 | ar->survey_last_rx_clear_count); | |
2454 | } | |
2455 | ||
2456 | ar->ch_info_can_report_survey = false; | |
2457 | } else { | |
2458 | ar->ch_info_can_report_survey = true; | |
2e1dea40 MK |
2459 | } |
2460 | ||
3d2a2e29 VT |
2461 | if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) { |
2462 | ar->survey_last_rx_clear_count = rx_clear_count; | |
2463 | ar->survey_last_cycle_count = cycle_count; | |
2464 | } | |
2e1dea40 MK |
2465 | |
2466 | exit: | |
2467 | spin_unlock_bh(&ar->data_lock); | |
5e3dd157 KV |
2468 | } |
2469 | ||
0226d602 | 2470 | void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2471 | { |
7aa7a72a | 2472 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n"); |
5e3dd157 KV |
2473 | } |
2474 | ||
0226d602 | 2475 | int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2476 | { |
7aa7a72a | 2477 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n", |
869526b9 KV |
2478 | skb->len); |
2479 | ||
d35a6c18 | 2480 | trace_ath10k_wmi_dbglog(ar, skb->data, skb->len); |
869526b9 KV |
2481 | |
2482 | return 0; | |
5e3dd157 KV |
2483 | } |
2484 | ||
b91251fb MK |
2485 | void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src, |
2486 | struct ath10k_fw_stats_pdev *dst) | |
d15fb520 | 2487 | { |
d15fb520 MK |
2488 | dst->ch_noise_floor = __le32_to_cpu(src->chan_nf); |
2489 | dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); | |
2490 | dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); | |
2491 | dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count); | |
2492 | dst->cycle_count = __le32_to_cpu(src->cycle_count); | |
2493 | dst->phy_err_count = __le32_to_cpu(src->phy_err_count); | |
2494 | dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); | |
b91251fb | 2495 | } |
d15fb520 | 2496 | |
b91251fb MK |
2497 | void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src, |
2498 | struct ath10k_fw_stats_pdev *dst) | |
2499 | { | |
2500 | dst->comp_queued = __le32_to_cpu(src->comp_queued); | |
2501 | dst->comp_delivered = __le32_to_cpu(src->comp_delivered); | |
2502 | dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); | |
2503 | dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); | |
2504 | dst->wmm_drop = __le32_to_cpu(src->wmm_drop); | |
2505 | dst->local_enqued = __le32_to_cpu(src->local_enqued); | |
2506 | dst->local_freed = __le32_to_cpu(src->local_freed); | |
2507 | dst->hw_queued = __le32_to_cpu(src->hw_queued); | |
2508 | dst->hw_reaped = __le32_to_cpu(src->hw_reaped); | |
2509 | dst->underrun = __le32_to_cpu(src->underrun); | |
2510 | dst->tx_abort = __le32_to_cpu(src->tx_abort); | |
2511 | dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); | |
2512 | dst->tx_ko = __le32_to_cpu(src->tx_ko); | |
2513 | dst->data_rc = __le32_to_cpu(src->data_rc); | |
2514 | dst->self_triggers = __le32_to_cpu(src->self_triggers); | |
2515 | dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); | |
2516 | dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); | |
2517 | dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); | |
2518 | dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); | |
2519 | dst->pdev_resets = __le32_to_cpu(src->pdev_resets); | |
2520 | dst->phy_underrun = __le32_to_cpu(src->phy_underrun); | |
2521 | dst->txop_ovf = __le32_to_cpu(src->txop_ovf); | |
2522 | } | |
d15fb520 | 2523 | |
98dd2b92 MP |
2524 | static void |
2525 | ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src, | |
2526 | struct ath10k_fw_stats_pdev *dst) | |
2527 | { | |
2528 | dst->comp_queued = __le32_to_cpu(src->comp_queued); | |
2529 | dst->comp_delivered = __le32_to_cpu(src->comp_delivered); | |
2530 | dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); | |
2531 | dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); | |
2532 | dst->wmm_drop = __le32_to_cpu(src->wmm_drop); | |
2533 | dst->local_enqued = __le32_to_cpu(src->local_enqued); | |
2534 | dst->local_freed = __le32_to_cpu(src->local_freed); | |
2535 | dst->hw_queued = __le32_to_cpu(src->hw_queued); | |
2536 | dst->hw_reaped = __le32_to_cpu(src->hw_reaped); | |
2537 | dst->underrun = __le32_to_cpu(src->underrun); | |
2538 | dst->tx_abort = __le32_to_cpu(src->tx_abort); | |
2539 | dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); | |
2540 | dst->tx_ko = __le32_to_cpu(src->tx_ko); | |
2541 | dst->data_rc = __le32_to_cpu(src->data_rc); | |
2542 | dst->self_triggers = __le32_to_cpu(src->self_triggers); | |
2543 | dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); | |
2544 | dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); | |
2545 | dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); | |
2546 | dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); | |
2547 | dst->pdev_resets = __le32_to_cpu(src->pdev_resets); | |
2548 | dst->phy_underrun = __le32_to_cpu(src->phy_underrun); | |
2549 | dst->txop_ovf = __le32_to_cpu(src->txop_ovf); | |
2550 | dst->hw_paused = __le32_to_cpu(src->hw_paused); | |
2551 | dst->seq_posted = __le32_to_cpu(src->seq_posted); | |
2552 | dst->seq_failed_queueing = | |
2553 | __le32_to_cpu(src->seq_failed_queueing); | |
2554 | dst->seq_completed = __le32_to_cpu(src->seq_completed); | |
2555 | dst->seq_restarted = __le32_to_cpu(src->seq_restarted); | |
2556 | dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted); | |
2557 | dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush); | |
2558 | dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter); | |
2559 | dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated); | |
2560 | dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed); | |
2561 | dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter); | |
2562 | dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired); | |
2563 | } | |
2564 | ||
b91251fb MK |
2565 | void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src, |
2566 | struct ath10k_fw_stats_pdev *dst) | |
2567 | { | |
2568 | dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change); | |
2569 | dst->status_rcvd = __le32_to_cpu(src->status_rcvd); | |
2570 | dst->r0_frags = __le32_to_cpu(src->r0_frags); | |
2571 | dst->r1_frags = __le32_to_cpu(src->r1_frags); | |
2572 | dst->r2_frags = __le32_to_cpu(src->r2_frags); | |
2573 | dst->r3_frags = __le32_to_cpu(src->r3_frags); | |
2574 | dst->htt_msdus = __le32_to_cpu(src->htt_msdus); | |
2575 | dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus); | |
2576 | dst->loc_msdus = __le32_to_cpu(src->loc_msdus); | |
2577 | dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus); | |
2578 | dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu); | |
2579 | dst->phy_errs = __le32_to_cpu(src->phy_errs); | |
2580 | dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop); | |
2581 | dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs); | |
2582 | } | |
2583 | ||
2584 | void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src, | |
2585 | struct ath10k_fw_stats_pdev *dst) | |
2586 | { | |
2587 | dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad); | |
2588 | dst->rts_bad = __le32_to_cpu(src->rts_bad); | |
2589 | dst->rts_good = __le32_to_cpu(src->rts_good); | |
2590 | dst->fcs_bad = __le32_to_cpu(src->fcs_bad); | |
2591 | dst->no_beacons = __le32_to_cpu(src->no_beacons); | |
2592 | dst->mib_int_count = __le32_to_cpu(src->mib_int_count); | |
d15fb520 MK |
2593 | } |
2594 | ||
0226d602 MK |
2595 | void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, |
2596 | struct ath10k_fw_stats_peer *dst) | |
d15fb520 MK |
2597 | { |
2598 | ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); | |
2599 | dst->peer_rssi = __le32_to_cpu(src->peer_rssi); | |
2600 | dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); | |
2601 | } | |
2602 | ||
d7579d12 MK |
2603 | static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar, |
2604 | struct sk_buff *skb, | |
2605 | struct ath10k_fw_stats *stats) | |
d15fb520 MK |
2606 | { |
2607 | const struct wmi_stats_event *ev = (void *)skb->data; | |
2608 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; | |
2609 | int i; | |
2610 | ||
2611 | if (!skb_pull(skb, sizeof(*ev))) | |
2612 | return -EPROTO; | |
2613 | ||
2614 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
2615 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
2616 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
2617 | ||
5326849a | 2618 | for (i = 0; i < num_pdev_stats; i++) { |
d15fb520 | 2619 | const struct wmi_pdev_stats *src; |
5326849a | 2620 | struct ath10k_fw_stats_pdev *dst; |
d15fb520 MK |
2621 | |
2622 | src = (void *)skb->data; | |
2623 | if (!skb_pull(skb, sizeof(*src))) | |
2624 | return -EPROTO; | |
2625 | ||
5326849a MK |
2626 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
2627 | if (!dst) | |
2628 | continue; | |
2629 | ||
b91251fb MK |
2630 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); |
2631 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
2632 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
2633 | ||
5326849a | 2634 | list_add_tail(&dst->list, &stats->pdevs); |
d15fb520 MK |
2635 | } |
2636 | ||
2637 | /* fw doesn't implement vdev stats */ | |
2638 | ||
2639 | for (i = 0; i < num_peer_stats; i++) { | |
2640 | const struct wmi_peer_stats *src; | |
5326849a | 2641 | struct ath10k_fw_stats_peer *dst; |
d15fb520 MK |
2642 | |
2643 | src = (void *)skb->data; | |
2644 | if (!skb_pull(skb, sizeof(*src))) | |
2645 | return -EPROTO; | |
2646 | ||
5326849a MK |
2647 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
2648 | if (!dst) | |
2649 | continue; | |
2650 | ||
2651 | ath10k_wmi_pull_peer_stats(src, dst); | |
2652 | list_add_tail(&dst->list, &stats->peers); | |
d15fb520 MK |
2653 | } |
2654 | ||
2655 | return 0; | |
2656 | } | |
2657 | ||
d7579d12 MK |
2658 | static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar, |
2659 | struct sk_buff *skb, | |
2660 | struct ath10k_fw_stats *stats) | |
d15fb520 MK |
2661 | { |
2662 | const struct wmi_stats_event *ev = (void *)skb->data; | |
2663 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; | |
2664 | int i; | |
2665 | ||
2666 | if (!skb_pull(skb, sizeof(*ev))) | |
2667 | return -EPROTO; | |
2668 | ||
2669 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
2670 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
2671 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
2672 | ||
5326849a | 2673 | for (i = 0; i < num_pdev_stats; i++) { |
d15fb520 | 2674 | const struct wmi_10x_pdev_stats *src; |
5326849a | 2675 | struct ath10k_fw_stats_pdev *dst; |
d15fb520 MK |
2676 | |
2677 | src = (void *)skb->data; | |
2678 | if (!skb_pull(skb, sizeof(*src))) | |
2679 | return -EPROTO; | |
2680 | ||
5326849a MK |
2681 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
2682 | if (!dst) | |
2683 | continue; | |
2684 | ||
b91251fb MK |
2685 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); |
2686 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
2687 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
2688 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
d15fb520 | 2689 | |
5326849a | 2690 | list_add_tail(&dst->list, &stats->pdevs); |
d15fb520 MK |
2691 | } |
2692 | ||
2693 | /* fw doesn't implement vdev stats */ | |
2694 | ||
2695 | for (i = 0; i < num_peer_stats; i++) { | |
2696 | const struct wmi_10x_peer_stats *src; | |
5326849a | 2697 | struct ath10k_fw_stats_peer *dst; |
d15fb520 MK |
2698 | |
2699 | src = (void *)skb->data; | |
2700 | if (!skb_pull(skb, sizeof(*src))) | |
2701 | return -EPROTO; | |
2702 | ||
5326849a MK |
2703 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
2704 | if (!dst) | |
2705 | continue; | |
2706 | ||
2707 | ath10k_wmi_pull_peer_stats(&src->old, dst); | |
2708 | ||
2709 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
d15fb520 | 2710 | |
5326849a | 2711 | list_add_tail(&dst->list, &stats->peers); |
d15fb520 MK |
2712 | } |
2713 | ||
2714 | return 0; | |
2715 | } | |
2716 | ||
20de2229 MK |
2717 | static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar, |
2718 | struct sk_buff *skb, | |
2719 | struct ath10k_fw_stats *stats) | |
2720 | { | |
2721 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
2722 | u32 num_pdev_stats; | |
2723 | u32 num_pdev_ext_stats; | |
2724 | u32 num_vdev_stats; | |
2725 | u32 num_peer_stats; | |
2726 | int i; | |
2727 | ||
2728 | if (!skb_pull(skb, sizeof(*ev))) | |
2729 | return -EPROTO; | |
2730 | ||
2731 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
2732 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
2733 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
2734 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
2735 | ||
2736 | for (i = 0; i < num_pdev_stats; i++) { | |
2737 | const struct wmi_10_2_pdev_stats *src; | |
2738 | struct ath10k_fw_stats_pdev *dst; | |
2739 | ||
2740 | src = (void *)skb->data; | |
2741 | if (!skb_pull(skb, sizeof(*src))) | |
2742 | return -EPROTO; | |
2743 | ||
2744 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
2745 | if (!dst) | |
2746 | continue; | |
2747 | ||
2748 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
2749 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
2750 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
2751 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
2752 | /* FIXME: expose 10.2 specific values */ | |
2753 | ||
2754 | list_add_tail(&dst->list, &stats->pdevs); | |
2755 | } | |
2756 | ||
2757 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
2758 | const struct wmi_10_2_pdev_ext_stats *src; | |
2759 | ||
2760 | src = (void *)skb->data; | |
2761 | if (!skb_pull(skb, sizeof(*src))) | |
2762 | return -EPROTO; | |
2763 | ||
2764 | /* FIXME: expose values to userspace | |
2765 | * | |
2766 | * Note: Even though this loop seems to do nothing it is | |
2767 | * required to parse following sub-structures properly. | |
2768 | */ | |
2769 | } | |
2770 | ||
2771 | /* fw doesn't implement vdev stats */ | |
2772 | ||
2773 | for (i = 0; i < num_peer_stats; i++) { | |
2774 | const struct wmi_10_2_peer_stats *src; | |
2775 | struct ath10k_fw_stats_peer *dst; | |
2776 | ||
2777 | src = (void *)skb->data; | |
2778 | if (!skb_pull(skb, sizeof(*src))) | |
2779 | return -EPROTO; | |
2780 | ||
2781 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
2782 | if (!dst) | |
2783 | continue; | |
2784 | ||
2785 | ath10k_wmi_pull_peer_stats(&src->old, dst); | |
2786 | ||
2787 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
2788 | /* FIXME: expose 10.2 specific values */ | |
2789 | ||
2790 | list_add_tail(&dst->list, &stats->peers); | |
2791 | } | |
2792 | ||
2793 | return 0; | |
2794 | } | |
2795 | ||
2796 | static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar, | |
2797 | struct sk_buff *skb, | |
2798 | struct ath10k_fw_stats *stats) | |
2799 | { | |
2800 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
2801 | u32 num_pdev_stats; | |
2802 | u32 num_pdev_ext_stats; | |
2803 | u32 num_vdev_stats; | |
2804 | u32 num_peer_stats; | |
2805 | int i; | |
2806 | ||
2807 | if (!skb_pull(skb, sizeof(*ev))) | |
2808 | return -EPROTO; | |
2809 | ||
2810 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
2811 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
2812 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
2813 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
2814 | ||
2815 | for (i = 0; i < num_pdev_stats; i++) { | |
2816 | const struct wmi_10_2_pdev_stats *src; | |
2817 | struct ath10k_fw_stats_pdev *dst; | |
2818 | ||
2819 | src = (void *)skb->data; | |
2820 | if (!skb_pull(skb, sizeof(*src))) | |
2821 | return -EPROTO; | |
2822 | ||
2823 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
2824 | if (!dst) | |
2825 | continue; | |
2826 | ||
2827 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
2828 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
2829 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
2830 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
2831 | /* FIXME: expose 10.2 specific values */ | |
2832 | ||
2833 | list_add_tail(&dst->list, &stats->pdevs); | |
2834 | } | |
2835 | ||
2836 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
2837 | const struct wmi_10_2_pdev_ext_stats *src; | |
2838 | ||
2839 | src = (void *)skb->data; | |
2840 | if (!skb_pull(skb, sizeof(*src))) | |
2841 | return -EPROTO; | |
2842 | ||
2843 | /* FIXME: expose values to userspace | |
2844 | * | |
2845 | * Note: Even though this loop seems to do nothing it is | |
2846 | * required to parse following sub-structures properly. | |
2847 | */ | |
2848 | } | |
2849 | ||
2850 | /* fw doesn't implement vdev stats */ | |
2851 | ||
2852 | for (i = 0; i < num_peer_stats; i++) { | |
2853 | const struct wmi_10_2_4_peer_stats *src; | |
2854 | struct ath10k_fw_stats_peer *dst; | |
2855 | ||
2856 | src = (void *)skb->data; | |
2857 | if (!skb_pull(skb, sizeof(*src))) | |
2858 | return -EPROTO; | |
2859 | ||
2860 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
2861 | if (!dst) | |
2862 | continue; | |
2863 | ||
2864 | ath10k_wmi_pull_peer_stats(&src->common.old, dst); | |
2865 | ||
2866 | dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate); | |
2867 | /* FIXME: expose 10.2 specific values */ | |
2868 | ||
2869 | list_add_tail(&dst->list, &stats->peers); | |
2870 | } | |
2871 | ||
2872 | return 0; | |
2873 | } | |
2874 | ||
98dd2b92 MP |
2875 | static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar, |
2876 | struct sk_buff *skb, | |
2877 | struct ath10k_fw_stats *stats) | |
2878 | { | |
2879 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
2880 | u32 num_pdev_stats; | |
2881 | u32 num_pdev_ext_stats; | |
2882 | u32 num_vdev_stats; | |
2883 | u32 num_peer_stats; | |
2884 | int i; | |
2885 | ||
2886 | if (!skb_pull(skb, sizeof(*ev))) | |
2887 | return -EPROTO; | |
2888 | ||
2889 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
2890 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
2891 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
2892 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
2893 | ||
2894 | for (i = 0; i < num_pdev_stats; i++) { | |
2895 | const struct wmi_10_4_pdev_stats *src; | |
2896 | struct ath10k_fw_stats_pdev *dst; | |
2897 | ||
2898 | src = (void *)skb->data; | |
2899 | if (!skb_pull(skb, sizeof(*src))) | |
2900 | return -EPROTO; | |
2901 | ||
2902 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
2903 | if (!dst) | |
2904 | continue; | |
2905 | ||
2906 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
2907 | ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst); | |
2908 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
2909 | dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs); | |
2910 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
2911 | ||
2912 | list_add_tail(&dst->list, &stats->pdevs); | |
2913 | } | |
2914 | ||
2915 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
2916 | const struct wmi_10_2_pdev_ext_stats *src; | |
2917 | ||
2918 | src = (void *)skb->data; | |
2919 | if (!skb_pull(skb, sizeof(*src))) | |
2920 | return -EPROTO; | |
2921 | ||
2922 | /* FIXME: expose values to userspace | |
2923 | * | |
2924 | * Note: Even though this loop seems to do nothing it is | |
2925 | * required to parse following sub-structures properly. | |
2926 | */ | |
2927 | } | |
2928 | ||
2929 | /* fw doesn't implement vdev stats */ | |
2930 | ||
2931 | for (i = 0; i < num_peer_stats; i++) { | |
2932 | const struct wmi_10_4_peer_stats *src; | |
2933 | struct ath10k_fw_stats_peer *dst; | |
2934 | ||
2935 | src = (void *)skb->data; | |
2936 | if (!skb_pull(skb, sizeof(*src))) | |
2937 | return -EPROTO; | |
2938 | ||
2939 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
2940 | if (!dst) | |
2941 | continue; | |
2942 | ||
2943 | ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); | |
2944 | dst->peer_rssi = __le32_to_cpu(src->peer_rssi); | |
2945 | dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); | |
2946 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
2947 | /* FIXME: expose 10.4 specific values */ | |
2948 | ||
2949 | list_add_tail(&dst->list, &stats->peers); | |
2950 | } | |
2951 | ||
2952 | return 0; | |
2953 | } | |
2954 | ||
0226d602 | 2955 | void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2956 | { |
7aa7a72a | 2957 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n"); |
60ef401a | 2958 | ath10k_debug_fw_stats_process(ar, skb); |
5e3dd157 KV |
2959 | } |
2960 | ||
d7579d12 MK |
2961 | static int |
2962 | ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb, | |
2963 | struct wmi_vdev_start_ev_arg *arg) | |
32653cf1 MK |
2964 | { |
2965 | struct wmi_vdev_start_response_event *ev = (void *)skb->data; | |
2966 | ||
2967 | if (skb->len < sizeof(*ev)) | |
2968 | return -EPROTO; | |
2969 | ||
2970 | skb_pull(skb, sizeof(*ev)); | |
2971 | arg->vdev_id = ev->vdev_id; | |
2972 | arg->req_id = ev->req_id; | |
2973 | arg->resp_type = ev->resp_type; | |
2974 | arg->status = ev->status; | |
2975 | ||
2976 | return 0; | |
2977 | } | |
2978 | ||
0226d602 | 2979 | void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2980 | { |
32653cf1 MK |
2981 | struct wmi_vdev_start_ev_arg arg = {}; |
2982 | int ret; | |
5e3dd157 | 2983 | |
7aa7a72a | 2984 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n"); |
5e3dd157 | 2985 | |
d7579d12 | 2986 | ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg); |
32653cf1 MK |
2987 | if (ret) { |
2988 | ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret); | |
2989 | return; | |
2990 | } | |
5e3dd157 | 2991 | |
32653cf1 | 2992 | if (WARN_ON(__le32_to_cpu(arg.status))) |
5e3dd157 KV |
2993 | return; |
2994 | ||
2995 | complete(&ar->vdev_setup_done); | |
2996 | } | |
2997 | ||
0226d602 | 2998 | void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 2999 | { |
7aa7a72a | 3000 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n"); |
5e3dd157 KV |
3001 | complete(&ar->vdev_setup_done); |
3002 | } | |
3003 | ||
d7579d12 MK |
3004 | static int |
3005 | ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb, | |
3006 | struct wmi_peer_kick_ev_arg *arg) | |
32653cf1 MK |
3007 | { |
3008 | struct wmi_peer_sta_kickout_event *ev = (void *)skb->data; | |
3009 | ||
3010 | if (skb->len < sizeof(*ev)) | |
3011 | return -EPROTO; | |
3012 | ||
3013 | skb_pull(skb, sizeof(*ev)); | |
3014 | arg->mac_addr = ev->peer_macaddr.addr; | |
3015 | ||
3016 | return 0; | |
3017 | } | |
3018 | ||
0226d602 | 3019 | void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3020 | { |
32653cf1 | 3021 | struct wmi_peer_kick_ev_arg arg = {}; |
5a13e76e | 3022 | struct ieee80211_sta *sta; |
32653cf1 | 3023 | int ret; |
5a13e76e | 3024 | |
d7579d12 | 3025 | ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg); |
32653cf1 MK |
3026 | if (ret) { |
3027 | ath10k_warn(ar, "failed to parse peer kickout event: %d\n", | |
3028 | ret); | |
3029 | return; | |
3030 | } | |
5a13e76e | 3031 | |
7aa7a72a | 3032 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n", |
32653cf1 | 3033 | arg.mac_addr); |
5a13e76e KV |
3034 | |
3035 | rcu_read_lock(); | |
3036 | ||
32653cf1 | 3037 | sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL); |
5a13e76e | 3038 | if (!sta) { |
7aa7a72a | 3039 | ath10k_warn(ar, "Spurious quick kickout for STA %pM\n", |
32653cf1 | 3040 | arg.mac_addr); |
5a13e76e KV |
3041 | goto exit; |
3042 | } | |
3043 | ||
3044 | ieee80211_report_low_ack(sta, 10); | |
3045 | ||
3046 | exit: | |
3047 | rcu_read_unlock(); | |
5e3dd157 KV |
3048 | } |
3049 | ||
3050 | /* | |
3051 | * FIXME | |
3052 | * | |
3053 | * We don't report to mac80211 sleep state of connected | |
3054 | * stations. Due to this mac80211 can't fill in TIM IE | |
3055 | * correctly. | |
3056 | * | |
3057 | * I know of no way of getting nullfunc frames that contain | |
3058 | * sleep transition from connected stations - these do not | |
3059 | * seem to be sent from the target to the host. There also | |
3060 | * doesn't seem to be a dedicated event for that. So the | |
3061 | * only way left to do this would be to read tim_bitmap | |
3062 | * during SWBA. | |
3063 | * | |
3064 | * We could probably try using tim_bitmap from SWBA to tell | |
3065 | * mac80211 which stations are asleep and which are not. The | |
3066 | * problem here is calling mac80211 functions so many times | |
3067 | * could take too long and make us miss the time to submit | |
3068 | * the beacon to the target. | |
3069 | * | |
3070 | * So as a workaround we try to extend the TIM IE if there | |
3071 | * is unicast buffered for stations with aid > 7 and fill it | |
3072 | * in ourselves. | |
3073 | */ | |
3074 | static void ath10k_wmi_update_tim(struct ath10k *ar, | |
3075 | struct ath10k_vif *arvif, | |
3076 | struct sk_buff *bcn, | |
a03fee34 | 3077 | const struct wmi_tim_info_arg *tim_info) |
5e3dd157 KV |
3078 | { |
3079 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data; | |
3080 | struct ieee80211_tim_ie *tim; | |
3081 | u8 *ies, *ie; | |
3082 | u8 ie_len, pvm_len; | |
af762c0b | 3083 | __le32 t; |
a03fee34 RM |
3084 | u32 v, tim_len; |
3085 | ||
3086 | /* When FW reports 0 in tim_len, ensure atleast first byte | |
3087 | * in tim_bitmap is considered for pvm calculation. | |
3088 | */ | |
3089 | tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1; | |
5e3dd157 KV |
3090 | |
3091 | /* if next SWBA has no tim_changed the tim_bitmap is garbage. | |
3092 | * we must copy the bitmap upon change and reuse it later */ | |
32653cf1 | 3093 | if (__le32_to_cpu(tim_info->tim_changed)) { |
5e3dd157 KV |
3094 | int i; |
3095 | ||
a03fee34 RM |
3096 | if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) { |
3097 | ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu", | |
3098 | tim_len, sizeof(arvif->u.ap.tim_bitmap)); | |
3099 | tim_len = sizeof(arvif->u.ap.tim_bitmap); | |
3100 | } | |
5e3dd157 | 3101 | |
a03fee34 | 3102 | for (i = 0; i < tim_len; i++) { |
32653cf1 | 3103 | t = tim_info->tim_bitmap[i / 4]; |
af762c0b | 3104 | v = __le32_to_cpu(t); |
5e3dd157 KV |
3105 | arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; |
3106 | } | |
3107 | ||
a03fee34 RM |
3108 | /* FW reports either length 0 or length based on max supported |
3109 | * station. so we calculate this on our own | |
3110 | */ | |
5e3dd157 | 3111 | arvif->u.ap.tim_len = 0; |
a03fee34 | 3112 | for (i = 0; i < tim_len; i++) |
5e3dd157 KV |
3113 | if (arvif->u.ap.tim_bitmap[i]) |
3114 | arvif->u.ap.tim_len = i; | |
3115 | ||
3116 | arvif->u.ap.tim_len++; | |
3117 | } | |
3118 | ||
3119 | ies = bcn->data; | |
3120 | ies += ieee80211_hdrlen(hdr->frame_control); | |
3121 | ies += 12; /* fixed parameters */ | |
3122 | ||
3123 | ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies, | |
3124 | (u8 *)skb_tail_pointer(bcn) - ies); | |
3125 | if (!ie) { | |
09af8f85 | 3126 | if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS) |
7aa7a72a | 3127 | ath10k_warn(ar, "no tim ie found;\n"); |
5e3dd157 KV |
3128 | return; |
3129 | } | |
3130 | ||
3131 | tim = (void *)ie + 2; | |
3132 | ie_len = ie[1]; | |
3133 | pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */ | |
3134 | ||
3135 | if (pvm_len < arvif->u.ap.tim_len) { | |
a03fee34 | 3136 | int expand_size = tim_len - pvm_len; |
5e3dd157 KV |
3137 | int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len); |
3138 | void *next_ie = ie + 2 + ie_len; | |
3139 | ||
3140 | if (skb_put(bcn, expand_size)) { | |
3141 | memmove(next_ie + expand_size, next_ie, move_size); | |
3142 | ||
3143 | ie[1] += expand_size; | |
3144 | ie_len += expand_size; | |
3145 | pvm_len += expand_size; | |
3146 | } else { | |
7aa7a72a | 3147 | ath10k_warn(ar, "tim expansion failed\n"); |
5e3dd157 KV |
3148 | } |
3149 | } | |
3150 | ||
a03fee34 | 3151 | if (pvm_len > tim_len) { |
7aa7a72a | 3152 | ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len); |
5e3dd157 KV |
3153 | return; |
3154 | } | |
3155 | ||
32653cf1 | 3156 | tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast); |
5e3dd157 KV |
3157 | memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len); |
3158 | ||
748afc47 MK |
3159 | if (tim->dtim_count == 0) { |
3160 | ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true; | |
3161 | ||
32653cf1 | 3162 | if (__le32_to_cpu(tim_info->tim_mcast) == 1) |
748afc47 MK |
3163 | ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true; |
3164 | } | |
3165 | ||
7aa7a72a | 3166 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n", |
5e3dd157 KV |
3167 | tim->dtim_count, tim->dtim_period, |
3168 | tim->bitmap_ctrl, pvm_len); | |
3169 | } | |
3170 | ||
5e3dd157 KV |
3171 | static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif, |
3172 | struct sk_buff *bcn, | |
32653cf1 | 3173 | const struct wmi_p2p_noa_info *noa) |
5e3dd157 | 3174 | { |
5e3dd157 KV |
3175 | if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO) |
3176 | return; | |
3177 | ||
7aa7a72a | 3178 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed); |
5e3dd157 | 3179 | |
6a94888f MK |
3180 | if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) |
3181 | ath10k_p2p_noa_update(arvif, noa); | |
5e3dd157 KV |
3182 | |
3183 | if (arvif->u.ap.noa_data) | |
3184 | if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC)) | |
3185 | memcpy(skb_put(bcn, arvif->u.ap.noa_len), | |
3186 | arvif->u.ap.noa_data, | |
3187 | arvif->u.ap.noa_len); | |
5e3dd157 KV |
3188 | } |
3189 | ||
d7579d12 MK |
3190 | static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb, |
3191 | struct wmi_swba_ev_arg *arg) | |
32653cf1 MK |
3192 | { |
3193 | struct wmi_host_swba_event *ev = (void *)skb->data; | |
3194 | u32 map; | |
3195 | size_t i; | |
3196 | ||
3197 | if (skb->len < sizeof(*ev)) | |
3198 | return -EPROTO; | |
3199 | ||
3200 | skb_pull(skb, sizeof(*ev)); | |
3201 | arg->vdev_map = ev->vdev_map; | |
3202 | ||
3203 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | |
3204 | if (!(map & BIT(0))) | |
3205 | continue; | |
3206 | ||
3207 | /* If this happens there were some changes in firmware and | |
3208 | * ath10k should update the max size of tim_info array. | |
3209 | */ | |
3210 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | |
3211 | break; | |
3212 | ||
a03fee34 RM |
3213 | if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > |
3214 | sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { | |
3215 | ath10k_warn(ar, "refusing to parse invalid swba structure\n"); | |
3216 | return -EPROTO; | |
3217 | } | |
3218 | ||
3219 | arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len; | |
3220 | arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; | |
3221 | arg->tim_info[i].tim_bitmap = | |
3222 | ev->bcn_info[i].tim_info.tim_bitmap; | |
3223 | arg->tim_info[i].tim_changed = | |
3224 | ev->bcn_info[i].tim_info.tim_changed; | |
3225 | arg->tim_info[i].tim_num_ps_pending = | |
3226 | ev->bcn_info[i].tim_info.tim_num_ps_pending; | |
3227 | ||
32653cf1 MK |
3228 | arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info; |
3229 | i++; | |
3230 | } | |
3231 | ||
3232 | return 0; | |
3233 | } | |
3234 | ||
3cec3be3 RM |
3235 | static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar, |
3236 | struct sk_buff *skb, | |
3237 | struct wmi_swba_ev_arg *arg) | |
3238 | { | |
3239 | struct wmi_10_4_host_swba_event *ev = (void *)skb->data; | |
3240 | u32 map, tim_len; | |
3241 | size_t i; | |
3242 | ||
3243 | if (skb->len < sizeof(*ev)) | |
3244 | return -EPROTO; | |
3245 | ||
3246 | skb_pull(skb, sizeof(*ev)); | |
3247 | arg->vdev_map = ev->vdev_map; | |
3248 | ||
3249 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | |
3250 | if (!(map & BIT(0))) | |
3251 | continue; | |
3252 | ||
3253 | /* If this happens there were some changes in firmware and | |
3254 | * ath10k should update the max size of tim_info array. | |
3255 | */ | |
3256 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | |
3257 | break; | |
3258 | ||
3259 | if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > | |
3260 | sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { | |
3261 | ath10k_warn(ar, "refusing to parse invalid swba structure\n"); | |
3262 | return -EPROTO; | |
3263 | } | |
3264 | ||
3265 | tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len); | |
3266 | if (tim_len) { | |
3267 | /* Exclude 4 byte guard length */ | |
3268 | tim_len -= 4; | |
3269 | arg->tim_info[i].tim_len = __cpu_to_le32(tim_len); | |
3270 | } else { | |
3271 | arg->tim_info[i].tim_len = 0; | |
3272 | } | |
3273 | ||
3274 | arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; | |
3275 | arg->tim_info[i].tim_bitmap = | |
3276 | ev->bcn_info[i].tim_info.tim_bitmap; | |
3277 | arg->tim_info[i].tim_changed = | |
3278 | ev->bcn_info[i].tim_info.tim_changed; | |
3279 | arg->tim_info[i].tim_num_ps_pending = | |
3280 | ev->bcn_info[i].tim_info.tim_num_ps_pending; | |
3281 | ||
3282 | /* 10.4 firmware doesn't have p2p support. notice of absence | |
3283 | * info can be ignored for now. | |
3284 | */ | |
3285 | ||
3286 | i++; | |
3287 | } | |
3288 | ||
3289 | return 0; | |
3290 | } | |
3291 | ||
08e75ea8 VN |
3292 | static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar) |
3293 | { | |
3294 | return WMI_TXBF_CONF_BEFORE_ASSOC; | |
3295 | } | |
3296 | ||
0226d602 | 3297 | void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3298 | { |
32653cf1 | 3299 | struct wmi_swba_ev_arg arg = {}; |
5e3dd157 KV |
3300 | u32 map; |
3301 | int i = -1; | |
a03fee34 | 3302 | const struct wmi_tim_info_arg *tim_info; |
32653cf1 | 3303 | const struct wmi_p2p_noa_info *noa_info; |
5e3dd157 | 3304 | struct ath10k_vif *arvif; |
5e3dd157 | 3305 | struct sk_buff *bcn; |
64badcb6 | 3306 | dma_addr_t paddr; |
767d34fc | 3307 | int ret, vdev_id = 0; |
5e3dd157 | 3308 | |
d7579d12 | 3309 | ret = ath10k_wmi_pull_swba(ar, skb, &arg); |
32653cf1 MK |
3310 | if (ret) { |
3311 | ath10k_warn(ar, "failed to parse swba event: %d\n", ret); | |
3312 | return; | |
3313 | } | |
3314 | ||
3315 | map = __le32_to_cpu(arg.vdev_map); | |
5e3dd157 | 3316 | |
7aa7a72a | 3317 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n", |
32653cf1 | 3318 | map); |
5e3dd157 KV |
3319 | |
3320 | for (; map; map >>= 1, vdev_id++) { | |
3321 | if (!(map & 0x1)) | |
3322 | continue; | |
3323 | ||
3324 | i++; | |
3325 | ||
3326 | if (i >= WMI_MAX_AP_VDEV) { | |
7aa7a72a | 3327 | ath10k_warn(ar, "swba has corrupted vdev map\n"); |
5e3dd157 KV |
3328 | break; |
3329 | } | |
3330 | ||
a03fee34 | 3331 | tim_info = &arg.tim_info[i]; |
32653cf1 | 3332 | noa_info = arg.noa_info[i]; |
5e3dd157 | 3333 | |
7aa7a72a | 3334 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
7a8a396b | 3335 | "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n", |
5e3dd157 | 3336 | i, |
32653cf1 MK |
3337 | __le32_to_cpu(tim_info->tim_len), |
3338 | __le32_to_cpu(tim_info->tim_mcast), | |
3339 | __le32_to_cpu(tim_info->tim_changed), | |
3340 | __le32_to_cpu(tim_info->tim_num_ps_pending), | |
3341 | __le32_to_cpu(tim_info->tim_bitmap[3]), | |
3342 | __le32_to_cpu(tim_info->tim_bitmap[2]), | |
3343 | __le32_to_cpu(tim_info->tim_bitmap[1]), | |
3344 | __le32_to_cpu(tim_info->tim_bitmap[0])); | |
5e3dd157 | 3345 | |
a03fee34 RM |
3346 | /* TODO: Only first 4 word from tim_bitmap is dumped. |
3347 | * Extend debug code to dump full tim_bitmap. | |
3348 | */ | |
3349 | ||
5e3dd157 KV |
3350 | arvif = ath10k_get_arvif(ar, vdev_id); |
3351 | if (arvif == NULL) { | |
7aa7a72a MK |
3352 | ath10k_warn(ar, "no vif for vdev_id %d found\n", |
3353 | vdev_id); | |
5e3dd157 KV |
3354 | continue; |
3355 | } | |
3356 | ||
c2df44b3 MK |
3357 | /* There are no completions for beacons so wait for next SWBA |
3358 | * before telling mac80211 to decrement CSA counter | |
3359 | * | |
3360 | * Once CSA counter is completed stop sending beacons until | |
3361 | * actual channel switch is done */ | |
3362 | if (arvif->vif->csa_active && | |
3363 | ieee80211_csa_is_complete(arvif->vif)) { | |
3364 | ieee80211_csa_finish(arvif->vif); | |
3365 | continue; | |
3366 | } | |
3367 | ||
5e3dd157 KV |
3368 | bcn = ieee80211_beacon_get(ar->hw, arvif->vif); |
3369 | if (!bcn) { | |
7aa7a72a | 3370 | ath10k_warn(ar, "could not get mac80211 beacon\n"); |
5e3dd157 KV |
3371 | continue; |
3372 | } | |
3373 | ||
4b604558 | 3374 | ath10k_tx_h_seq_no(arvif->vif, bcn); |
32653cf1 MK |
3375 | ath10k_wmi_update_tim(ar, arvif, bcn, tim_info); |
3376 | ath10k_wmi_update_noa(ar, arvif, bcn, noa_info); | |
5e3dd157 | 3377 | |
ed54388a | 3378 | spin_lock_bh(&ar->data_lock); |
748afc47 | 3379 | |
ed54388a | 3380 | if (arvif->beacon) { |
af21319f MK |
3381 | switch (arvif->beacon_state) { |
3382 | case ATH10K_BEACON_SENT: | |
3383 | break; | |
3384 | case ATH10K_BEACON_SCHEDULED: | |
3385 | ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n", | |
3386 | arvif->vdev_id); | |
3387 | break; | |
3388 | case ATH10K_BEACON_SENDING: | |
3389 | ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n", | |
748afc47 | 3390 | arvif->vdev_id); |
af21319f MK |
3391 | dev_kfree_skb(bcn); |
3392 | goto skip; | |
3393 | } | |
748afc47 | 3394 | |
64badcb6 | 3395 | ath10k_mac_vif_beacon_free(arvif); |
ed54388a | 3396 | } |
5e3dd157 | 3397 | |
64badcb6 MK |
3398 | if (!arvif->beacon_buf) { |
3399 | paddr = dma_map_single(arvif->ar->dev, bcn->data, | |
3400 | bcn->len, DMA_TO_DEVICE); | |
3401 | ret = dma_mapping_error(arvif->ar->dev, paddr); | |
3402 | if (ret) { | |
3403 | ath10k_warn(ar, "failed to map beacon: %d\n", | |
3404 | ret); | |
3405 | dev_kfree_skb_any(bcn); | |
5e55e3cb | 3406 | ret = -EIO; |
64badcb6 MK |
3407 | goto skip; |
3408 | } | |
3409 | ||
3410 | ATH10K_SKB_CB(bcn)->paddr = paddr; | |
3411 | } else { | |
3412 | if (bcn->len > IEEE80211_MAX_FRAME_LEN) { | |
3413 | ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n", | |
3414 | bcn->len, IEEE80211_MAX_FRAME_LEN); | |
3415 | skb_trim(bcn, IEEE80211_MAX_FRAME_LEN); | |
3416 | } | |
3417 | memcpy(arvif->beacon_buf, bcn->data, bcn->len); | |
3418 | ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr; | |
767d34fc | 3419 | } |
748afc47 | 3420 | |
ed54388a | 3421 | arvif->beacon = bcn; |
af21319f | 3422 | arvif->beacon_state = ATH10K_BEACON_SCHEDULED; |
5e3dd157 | 3423 | |
5ce8e7fd RM |
3424 | trace_ath10k_tx_hdr(ar, bcn->data, bcn->len); |
3425 | trace_ath10k_tx_payload(ar, bcn->data, bcn->len); | |
3426 | ||
767d34fc | 3427 | skip: |
ed54388a | 3428 | spin_unlock_bh(&ar->data_lock); |
5e3dd157 | 3429 | } |
af21319f MK |
3430 | |
3431 | ath10k_wmi_tx_beacons_nowait(ar); | |
5e3dd157 KV |
3432 | } |
3433 | ||
0226d602 | 3434 | void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3435 | { |
7aa7a72a | 3436 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n"); |
5e3dd157 KV |
3437 | } |
3438 | ||
9702c686 | 3439 | static void ath10k_dfs_radar_report(struct ath10k *ar, |
991adf71 | 3440 | struct wmi_phyerr_ev_arg *phyerr, |
2332d0ae | 3441 | const struct phyerr_radar_report *rr, |
9702c686 JD |
3442 | u64 tsf) |
3443 | { | |
3444 | u32 reg0, reg1, tsf32l; | |
500ff9f9 | 3445 | struct ieee80211_channel *ch; |
9702c686 JD |
3446 | struct pulse_event pe; |
3447 | u64 tsf64; | |
3448 | u8 rssi, width; | |
3449 | ||
3450 | reg0 = __le32_to_cpu(rr->reg0); | |
3451 | reg1 = __le32_to_cpu(rr->reg1); | |
3452 | ||
7aa7a72a | 3453 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3454 | "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n", |
3455 | MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP), | |
3456 | MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH), | |
3457 | MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN), | |
3458 | MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF)); | |
7aa7a72a | 3459 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3460 | "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n", |
3461 | MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK), | |
3462 | MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX), | |
3463 | MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID), | |
3464 | MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN), | |
3465 | MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK)); | |
7aa7a72a | 3466 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3467 | "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n", |
3468 | MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET), | |
3469 | MS(reg1, RADAR_REPORT_REG1_PULSE_DUR)); | |
3470 | ||
3471 | if (!ar->dfs_detector) | |
3472 | return; | |
3473 | ||
500ff9f9 MK |
3474 | spin_lock_bh(&ar->data_lock); |
3475 | ch = ar->rx_channel; | |
3476 | spin_unlock_bh(&ar->data_lock); | |
3477 | ||
3478 | if (!ch) { | |
3479 | ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n"); | |
3480 | goto radar_detected; | |
3481 | } | |
3482 | ||
9702c686 | 3483 | /* report event to DFS pattern detector */ |
991adf71 | 3484 | tsf32l = phyerr->tsf_timestamp; |
9702c686 JD |
3485 | tsf64 = tsf & (~0xFFFFFFFFULL); |
3486 | tsf64 |= tsf32l; | |
3487 | ||
3488 | width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR); | |
2332d0ae | 3489 | rssi = phyerr->rssi_combined; |
9702c686 JD |
3490 | |
3491 | /* hardware store this as 8 bit signed value, | |
3492 | * set to zero if negative number | |
3493 | */ | |
3494 | if (rssi & 0x80) | |
3495 | rssi = 0; | |
3496 | ||
3497 | pe.ts = tsf64; | |
500ff9f9 | 3498 | pe.freq = ch->center_freq; |
9702c686 JD |
3499 | pe.width = width; |
3500 | pe.rssi = rssi; | |
2c3f26a0 | 3501 | pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0); |
7aa7a72a | 3502 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3503 | "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n", |
3504 | pe.freq, pe.width, pe.rssi, pe.ts); | |
3505 | ||
3506 | ATH10K_DFS_STAT_INC(ar, pulses_detected); | |
3507 | ||
3508 | if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) { | |
7aa7a72a | 3509 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3510 | "dfs no pulse pattern detected, yet\n"); |
3511 | return; | |
3512 | } | |
3513 | ||
500ff9f9 | 3514 | radar_detected: |
7aa7a72a | 3515 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n"); |
9702c686 | 3516 | ATH10K_DFS_STAT_INC(ar, radar_detected); |
7d9b40b4 MP |
3517 | |
3518 | /* Control radar events reporting in debugfs file | |
3519 | dfs_block_radar_events */ | |
3520 | if (ar->dfs_block_radar_events) { | |
7aa7a72a | 3521 | ath10k_info(ar, "DFS Radar detected, but ignored as requested\n"); |
7d9b40b4 MP |
3522 | return; |
3523 | } | |
3524 | ||
9702c686 JD |
3525 | ieee80211_radar_detected(ar->hw); |
3526 | } | |
3527 | ||
3528 | static int ath10k_dfs_fft_report(struct ath10k *ar, | |
991adf71 | 3529 | struct wmi_phyerr_ev_arg *phyerr, |
2332d0ae | 3530 | const struct phyerr_fft_report *fftr, |
9702c686 JD |
3531 | u64 tsf) |
3532 | { | |
3533 | u32 reg0, reg1; | |
3534 | u8 rssi, peak_mag; | |
3535 | ||
3536 | reg0 = __le32_to_cpu(fftr->reg0); | |
3537 | reg1 = __le32_to_cpu(fftr->reg1); | |
2332d0ae | 3538 | rssi = phyerr->rssi_combined; |
9702c686 | 3539 | |
7aa7a72a | 3540 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3541 | "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n", |
3542 | MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB), | |
3543 | MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB), | |
3544 | MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX), | |
3545 | MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX)); | |
7aa7a72a | 3546 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3547 | "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n", |
3548 | MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB), | |
3549 | MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB), | |
3550 | MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG), | |
3551 | MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB)); | |
3552 | ||
3553 | peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG); | |
3554 | ||
3555 | /* false event detection */ | |
3556 | if (rssi == DFS_RSSI_POSSIBLY_FALSE && | |
3557 | peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) { | |
7aa7a72a | 3558 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n"); |
9702c686 JD |
3559 | ATH10K_DFS_STAT_INC(ar, pulses_discarded); |
3560 | return -EINVAL; | |
3561 | } | |
3562 | ||
3563 | return 0; | |
3564 | } | |
3565 | ||
0226d602 | 3566 | void ath10k_wmi_event_dfs(struct ath10k *ar, |
991adf71 | 3567 | struct wmi_phyerr_ev_arg *phyerr, |
0226d602 | 3568 | u64 tsf) |
9702c686 JD |
3569 | { |
3570 | int buf_len, tlv_len, res, i = 0; | |
2332d0ae MK |
3571 | const struct phyerr_tlv *tlv; |
3572 | const struct phyerr_radar_report *rr; | |
3573 | const struct phyerr_fft_report *fftr; | |
3574 | const u8 *tlv_buf; | |
9702c686 | 3575 | |
991adf71 | 3576 | buf_len = phyerr->buf_len; |
7aa7a72a | 3577 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 | 3578 | "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n", |
2332d0ae | 3579 | phyerr->phy_err_code, phyerr->rssi_combined, |
991adf71 | 3580 | phyerr->tsf_timestamp, tsf, buf_len); |
9702c686 JD |
3581 | |
3582 | /* Skip event if DFS disabled */ | |
3583 | if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED)) | |
3584 | return; | |
3585 | ||
3586 | ATH10K_DFS_STAT_INC(ar, pulses_total); | |
3587 | ||
3588 | while (i < buf_len) { | |
3589 | if (i + sizeof(*tlv) > buf_len) { | |
7aa7a72a MK |
3590 | ath10k_warn(ar, "too short buf for tlv header (%d)\n", |
3591 | i); | |
9702c686 JD |
3592 | return; |
3593 | } | |
3594 | ||
2332d0ae | 3595 | tlv = (struct phyerr_tlv *)&phyerr->buf[i]; |
9702c686 | 3596 | tlv_len = __le16_to_cpu(tlv->len); |
2332d0ae | 3597 | tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; |
7aa7a72a | 3598 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
9702c686 JD |
3599 | "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n", |
3600 | tlv_len, tlv->tag, tlv->sig); | |
3601 | ||
3602 | switch (tlv->tag) { | |
3603 | case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY: | |
3604 | if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) { | |
7aa7a72a | 3605 | ath10k_warn(ar, "too short radar pulse summary (%d)\n", |
9702c686 JD |
3606 | i); |
3607 | return; | |
3608 | } | |
3609 | ||
3610 | rr = (struct phyerr_radar_report *)tlv_buf; | |
2332d0ae | 3611 | ath10k_dfs_radar_report(ar, phyerr, rr, tsf); |
9702c686 JD |
3612 | break; |
3613 | case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: | |
3614 | if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) { | |
7aa7a72a MK |
3615 | ath10k_warn(ar, "too short fft report (%d)\n", |
3616 | i); | |
9702c686 JD |
3617 | return; |
3618 | } | |
3619 | ||
3620 | fftr = (struct phyerr_fft_report *)tlv_buf; | |
2332d0ae | 3621 | res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf); |
9702c686 JD |
3622 | if (res) |
3623 | return; | |
3624 | break; | |
3625 | } | |
3626 | ||
3627 | i += sizeof(*tlv) + tlv_len; | |
3628 | } | |
3629 | } | |
3630 | ||
0226d602 | 3631 | void ath10k_wmi_event_spectral_scan(struct ath10k *ar, |
991adf71 | 3632 | struct wmi_phyerr_ev_arg *phyerr, |
0226d602 | 3633 | u64 tsf) |
9702c686 | 3634 | { |
855aed12 SW |
3635 | int buf_len, tlv_len, res, i = 0; |
3636 | struct phyerr_tlv *tlv; | |
2332d0ae MK |
3637 | const void *tlv_buf; |
3638 | const struct phyerr_fft_report *fftr; | |
855aed12 SW |
3639 | size_t fftr_len; |
3640 | ||
991adf71 | 3641 | buf_len = phyerr->buf_len; |
855aed12 SW |
3642 | |
3643 | while (i < buf_len) { | |
3644 | if (i + sizeof(*tlv) > buf_len) { | |
7aa7a72a | 3645 | ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n", |
855aed12 SW |
3646 | i); |
3647 | return; | |
3648 | } | |
3649 | ||
2332d0ae | 3650 | tlv = (struct phyerr_tlv *)&phyerr->buf[i]; |
855aed12 | 3651 | tlv_len = __le16_to_cpu(tlv->len); |
2332d0ae | 3652 | tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; |
855aed12 SW |
3653 | |
3654 | if (i + sizeof(*tlv) + tlv_len > buf_len) { | |
7aa7a72a | 3655 | ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n", |
855aed12 SW |
3656 | i); |
3657 | return; | |
3658 | } | |
3659 | ||
3660 | switch (tlv->tag) { | |
3661 | case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: | |
3662 | if (sizeof(*fftr) > tlv_len) { | |
7aa7a72a | 3663 | ath10k_warn(ar, "failed to parse fft report at byte %d\n", |
855aed12 SW |
3664 | i); |
3665 | return; | |
3666 | } | |
3667 | ||
3668 | fftr_len = tlv_len - sizeof(*fftr); | |
2332d0ae MK |
3669 | fftr = tlv_buf; |
3670 | res = ath10k_spectral_process_fft(ar, phyerr, | |
855aed12 SW |
3671 | fftr, fftr_len, |
3672 | tsf); | |
3673 | if (res < 0) { | |
3413e97d | 3674 | ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n", |
617b0f4d | 3675 | res); |
855aed12 SW |
3676 | return; |
3677 | } | |
3678 | break; | |
3679 | } | |
3680 | ||
3681 | i += sizeof(*tlv) + tlv_len; | |
3682 | } | |
9702c686 JD |
3683 | } |
3684 | ||
991adf71 RM |
3685 | static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar, |
3686 | struct sk_buff *skb, | |
3687 | struct wmi_phyerr_hdr_arg *arg) | |
32653cf1 MK |
3688 | { |
3689 | struct wmi_phyerr_event *ev = (void *)skb->data; | |
3690 | ||
3691 | if (skb->len < sizeof(*ev)) | |
3692 | return -EPROTO; | |
3693 | ||
991adf71 RM |
3694 | arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs); |
3695 | arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32); | |
3696 | arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32); | |
3697 | arg->buf_len = skb->len - sizeof(*ev); | |
32653cf1 MK |
3698 | arg->phyerrs = ev->phyerrs; |
3699 | ||
3700 | return 0; | |
3701 | } | |
3702 | ||
2b0a2e0d RM |
3703 | static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar, |
3704 | struct sk_buff *skb, | |
3705 | struct wmi_phyerr_hdr_arg *arg) | |
3706 | { | |
3707 | struct wmi_10_4_phyerr_event *ev = (void *)skb->data; | |
3708 | ||
3709 | if (skb->len < sizeof(*ev)) | |
3710 | return -EPROTO; | |
3711 | ||
3712 | /* 10.4 firmware always reports only one phyerr */ | |
3713 | arg->num_phyerrs = 1; | |
3714 | ||
3715 | arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32); | |
3716 | arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32); | |
3717 | arg->buf_len = skb->len; | |
3718 | arg->phyerrs = skb->data; | |
3719 | ||
3720 | return 0; | |
3721 | } | |
3722 | ||
991adf71 RM |
3723 | int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, |
3724 | const void *phyerr_buf, | |
3725 | int left_len, | |
3726 | struct wmi_phyerr_ev_arg *arg) | |
3727 | { | |
3728 | const struct wmi_phyerr *phyerr = phyerr_buf; | |
3729 | int i; | |
3730 | ||
3731 | if (left_len < sizeof(*phyerr)) { | |
ee92a209 | 3732 | ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n", |
991adf71 RM |
3733 | left_len, sizeof(*phyerr)); |
3734 | return -EINVAL; | |
3735 | } | |
3736 | ||
3737 | arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp); | |
3738 | arg->freq1 = __le16_to_cpu(phyerr->freq1); | |
3739 | arg->freq2 = __le16_to_cpu(phyerr->freq2); | |
3740 | arg->rssi_combined = phyerr->rssi_combined; | |
3741 | arg->chan_width_mhz = phyerr->chan_width_mhz; | |
3742 | arg->buf_len = __le32_to_cpu(phyerr->buf_len); | |
3743 | arg->buf = phyerr->buf; | |
3744 | arg->hdr_len = sizeof(*phyerr); | |
3745 | ||
3746 | for (i = 0; i < 4; i++) | |
3747 | arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]); | |
3748 | ||
3749 | switch (phyerr->phy_err_code) { | |
3750 | case PHY_ERROR_GEN_SPECTRAL_SCAN: | |
3751 | arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN; | |
3752 | break; | |
3753 | case PHY_ERROR_GEN_FALSE_RADAR_EXT: | |
3754 | arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT; | |
3755 | break; | |
3756 | case PHY_ERROR_GEN_RADAR: | |
3757 | arg->phy_err_code = PHY_ERROR_RADAR; | |
3758 | break; | |
3759 | default: | |
3760 | arg->phy_err_code = PHY_ERROR_UNKNOWN; | |
3761 | break; | |
3762 | } | |
3763 | ||
3764 | return 0; | |
3765 | } | |
3766 | ||
2b0a2e0d RM |
3767 | static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar, |
3768 | const void *phyerr_buf, | |
3769 | int left_len, | |
3770 | struct wmi_phyerr_ev_arg *arg) | |
3771 | { | |
3772 | const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf; | |
3773 | u32 phy_err_mask; | |
3774 | int i; | |
3775 | ||
3776 | if (left_len < sizeof(*phyerr)) { | |
ee92a209 | 3777 | ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n", |
2b0a2e0d RM |
3778 | left_len, sizeof(*phyerr)); |
3779 | return -EINVAL; | |
3780 | } | |
3781 | ||
3782 | arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp); | |
3783 | arg->freq1 = __le16_to_cpu(phyerr->freq1); | |
3784 | arg->freq2 = __le16_to_cpu(phyerr->freq2); | |
3785 | arg->rssi_combined = phyerr->rssi_combined; | |
3786 | arg->chan_width_mhz = phyerr->chan_width_mhz; | |
3787 | arg->buf_len = __le32_to_cpu(phyerr->buf_len); | |
3788 | arg->buf = phyerr->buf; | |
3789 | arg->hdr_len = sizeof(*phyerr); | |
3790 | ||
3791 | for (i = 0; i < 4; i++) | |
3792 | arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]); | |
3793 | ||
3794 | phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]); | |
3795 | ||
3796 | if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK) | |
3797 | arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN; | |
3798 | else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK) | |
3799 | arg->phy_err_code = PHY_ERROR_RADAR; | |
3800 | else | |
3801 | arg->phy_err_code = PHY_ERROR_UNKNOWN; | |
3802 | ||
3803 | return 0; | |
3804 | } | |
3805 | ||
0226d602 | 3806 | void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3807 | { |
991adf71 RM |
3808 | struct wmi_phyerr_hdr_arg hdr_arg = {}; |
3809 | struct wmi_phyerr_ev_arg phyerr_arg = {}; | |
3810 | const void *phyerr; | |
9702c686 JD |
3811 | u32 count, i, buf_len, phy_err_code; |
3812 | u64 tsf; | |
32653cf1 | 3813 | int left_len, ret; |
9702c686 JD |
3814 | |
3815 | ATH10K_DFS_STAT_INC(ar, phy_errors); | |
3816 | ||
991adf71 | 3817 | ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg); |
32653cf1 | 3818 | if (ret) { |
991adf71 | 3819 | ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret); |
9702c686 JD |
3820 | return; |
3821 | } | |
3822 | ||
9702c686 | 3823 | /* Check number of included events */ |
991adf71 | 3824 | count = hdr_arg.num_phyerrs; |
9702c686 | 3825 | |
991adf71 RM |
3826 | left_len = hdr_arg.buf_len; |
3827 | ||
3828 | tsf = hdr_arg.tsf_u32; | |
9702c686 | 3829 | tsf <<= 32; |
991adf71 | 3830 | tsf |= hdr_arg.tsf_l32; |
9702c686 | 3831 | |
7aa7a72a | 3832 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
9702c686 JD |
3833 | "wmi event phyerr count %d tsf64 0x%llX\n", |
3834 | count, tsf); | |
3835 | ||
991adf71 | 3836 | phyerr = hdr_arg.phyerrs; |
9702c686 | 3837 | for (i = 0; i < count; i++) { |
991adf71 RM |
3838 | ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg); |
3839 | if (ret) { | |
3840 | ath10k_warn(ar, "failed to parse phyerr event (%d)\n", | |
7aa7a72a | 3841 | i); |
9702c686 JD |
3842 | return; |
3843 | } | |
3844 | ||
991adf71 RM |
3845 | left_len -= phyerr_arg.hdr_len; |
3846 | buf_len = phyerr_arg.buf_len; | |
3847 | phy_err_code = phyerr_arg.phy_err_code; | |
9702c686 JD |
3848 | |
3849 | if (left_len < buf_len) { | |
7aa7a72a | 3850 | ath10k_warn(ar, "single event (%d) wrong buf len\n", i); |
9702c686 JD |
3851 | return; |
3852 | } | |
3853 | ||
3854 | left_len -= buf_len; | |
3855 | ||
3856 | switch (phy_err_code) { | |
3857 | case PHY_ERROR_RADAR: | |
991adf71 | 3858 | ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf); |
9702c686 JD |
3859 | break; |
3860 | case PHY_ERROR_SPECTRAL_SCAN: | |
991adf71 | 3861 | ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf); |
9702c686 JD |
3862 | break; |
3863 | case PHY_ERROR_FALSE_RADAR_EXT: | |
991adf71 RM |
3864 | ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf); |
3865 | ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf); | |
9702c686 JD |
3866 | break; |
3867 | default: | |
3868 | break; | |
3869 | } | |
3870 | ||
991adf71 | 3871 | phyerr = phyerr + phyerr_arg.hdr_len + buf_len; |
9702c686 | 3872 | } |
5e3dd157 KV |
3873 | } |
3874 | ||
0226d602 | 3875 | void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3876 | { |
c1a4654a MK |
3877 | struct wmi_roam_ev_arg arg = {}; |
3878 | int ret; | |
3879 | u32 vdev_id; | |
3880 | u32 reason; | |
3881 | s32 rssi; | |
3882 | ||
3883 | ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg); | |
3884 | if (ret) { | |
3885 | ath10k_warn(ar, "failed to parse roam event: %d\n", ret); | |
3886 | return; | |
3887 | } | |
3888 | ||
3889 | vdev_id = __le32_to_cpu(arg.vdev_id); | |
3890 | reason = __le32_to_cpu(arg.reason); | |
3891 | rssi = __le32_to_cpu(arg.rssi); | |
3892 | rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT; | |
3893 | ||
3894 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
3895 | "wmi roam event vdev %u reason 0x%08x rssi %d\n", | |
3896 | vdev_id, reason, rssi); | |
3897 | ||
3898 | if (reason >= WMI_ROAM_REASON_MAX) | |
3899 | ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n", | |
3900 | reason, vdev_id); | |
3901 | ||
3902 | switch (reason) { | |
c1a4654a | 3903 | case WMI_ROAM_REASON_BEACON_MISS: |
cc9904e6 MK |
3904 | ath10k_mac_handle_beacon_miss(ar, vdev_id); |
3905 | break; | |
3906 | case WMI_ROAM_REASON_BETTER_AP: | |
c1a4654a MK |
3907 | case WMI_ROAM_REASON_LOW_RSSI: |
3908 | case WMI_ROAM_REASON_SUITABLE_AP_FOUND: | |
3909 | case WMI_ROAM_REASON_HO_FAILED: | |
3910 | ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n", | |
3911 | reason, vdev_id); | |
3912 | break; | |
3913 | } | |
5e3dd157 KV |
3914 | } |
3915 | ||
0226d602 | 3916 | void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3917 | { |
7aa7a72a | 3918 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n"); |
5e3dd157 KV |
3919 | } |
3920 | ||
0226d602 | 3921 | void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3922 | { |
2fe5288c KV |
3923 | char buf[101], c; |
3924 | int i; | |
3925 | ||
3926 | for (i = 0; i < sizeof(buf) - 1; i++) { | |
3927 | if (i >= skb->len) | |
3928 | break; | |
3929 | ||
3930 | c = skb->data[i]; | |
3931 | ||
3932 | if (c == '\0') | |
3933 | break; | |
3934 | ||
3935 | if (isascii(c) && isprint(c)) | |
3936 | buf[i] = c; | |
3937 | else | |
3938 | buf[i] = '.'; | |
3939 | } | |
3940 | ||
3941 | if (i == sizeof(buf) - 1) | |
7aa7a72a | 3942 | ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len); |
2fe5288c KV |
3943 | |
3944 | /* for some reason the debug prints end with \n, remove that */ | |
3945 | if (skb->data[i - 1] == '\n') | |
3946 | i--; | |
3947 | ||
3948 | /* the last byte is always reserved for the null character */ | |
3949 | buf[i] = '\0'; | |
3950 | ||
3be004c3 | 3951 | ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf); |
5e3dd157 KV |
3952 | } |
3953 | ||
0226d602 | 3954 | void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3955 | { |
7aa7a72a | 3956 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n"); |
5e3dd157 KV |
3957 | } |
3958 | ||
0226d602 | 3959 | void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3960 | { |
7aa7a72a | 3961 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n"); |
5e3dd157 KV |
3962 | } |
3963 | ||
0226d602 MK |
3964 | void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, |
3965 | struct sk_buff *skb) | |
5e3dd157 | 3966 | { |
7aa7a72a | 3967 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n"); |
5e3dd157 KV |
3968 | } |
3969 | ||
0226d602 MK |
3970 | void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, |
3971 | struct sk_buff *skb) | |
5e3dd157 | 3972 | { |
7aa7a72a | 3973 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n"); |
5e3dd157 KV |
3974 | } |
3975 | ||
0226d602 | 3976 | void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3977 | { |
7aa7a72a | 3978 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n"); |
5e3dd157 KV |
3979 | } |
3980 | ||
0226d602 | 3981 | void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3982 | { |
5fd3ac3c JD |
3983 | struct wmi_wow_ev_arg ev = {}; |
3984 | int ret; | |
3985 | ||
3986 | complete(&ar->wow.wakeup_completed); | |
3987 | ||
3988 | ret = ath10k_wmi_pull_wow_event(ar, skb, &ev); | |
3989 | if (ret) { | |
3990 | ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret); | |
3991 | return; | |
3992 | } | |
3993 | ||
3994 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n", | |
3995 | wow_reason(ev.wake_reason)); | |
5e3dd157 KV |
3996 | } |
3997 | ||
0226d602 | 3998 | void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 3999 | { |
7aa7a72a | 4000 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n"); |
5e3dd157 KV |
4001 | } |
4002 | ||
29542666 MK |
4003 | static u8 ath10k_tpc_config_get_rate(struct ath10k *ar, |
4004 | struct wmi_pdev_tpc_config_event *ev, | |
4005 | u32 rate_idx, u32 num_chains, | |
4006 | u32 rate_code, u8 type) | |
4007 | { | |
4008 | u8 tpc, num_streams, preamble, ch, stm_idx; | |
4009 | ||
4010 | num_streams = ATH10K_HW_NSS(rate_code); | |
4011 | preamble = ATH10K_HW_PREAMBLE(rate_code); | |
4012 | ch = num_chains - 1; | |
4013 | ||
4014 | tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]); | |
4015 | ||
4016 | if (__le32_to_cpu(ev->num_tx_chain) <= 1) | |
4017 | goto out; | |
4018 | ||
4019 | if (preamble == WMI_RATE_PREAMBLE_CCK) | |
4020 | goto out; | |
4021 | ||
4022 | stm_idx = num_streams - 1; | |
4023 | if (num_chains <= num_streams) | |
4024 | goto out; | |
4025 | ||
4026 | switch (type) { | |
4027 | case WMI_TPC_TABLE_TYPE_STBC: | |
4028 | tpc = min_t(u8, tpc, | |
4029 | ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]); | |
4030 | break; | |
4031 | case WMI_TPC_TABLE_TYPE_TXBF: | |
4032 | tpc = min_t(u8, tpc, | |
4033 | ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]); | |
4034 | break; | |
4035 | case WMI_TPC_TABLE_TYPE_CDD: | |
4036 | tpc = min_t(u8, tpc, | |
4037 | ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]); | |
4038 | break; | |
4039 | default: | |
4040 | ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type); | |
4041 | tpc = 0; | |
4042 | break; | |
4043 | } | |
4044 | ||
4045 | out: | |
4046 | return tpc; | |
4047 | } | |
4048 | ||
4049 | static void ath10k_tpc_config_disp_tables(struct ath10k *ar, | |
4050 | struct wmi_pdev_tpc_config_event *ev, | |
4051 | struct ath10k_tpc_stats *tpc_stats, | |
4052 | u8 *rate_code, u16 *pream_table, u8 type) | |
4053 | { | |
4054 | u32 i, j, pream_idx, flags; | |
4055 | u8 tpc[WMI_TPC_TX_N_CHAIN]; | |
4056 | char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; | |
4057 | char buff[WMI_TPC_BUF_SIZE]; | |
4058 | ||
4059 | flags = __le32_to_cpu(ev->flags); | |
4060 | ||
4061 | switch (type) { | |
4062 | case WMI_TPC_TABLE_TYPE_CDD: | |
4063 | if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) { | |
4064 | ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n"); | |
4065 | tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; | |
4066 | return; | |
4067 | } | |
4068 | break; | |
4069 | case WMI_TPC_TABLE_TYPE_STBC: | |
4070 | if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) { | |
4071 | ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n"); | |
4072 | tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; | |
4073 | return; | |
4074 | } | |
4075 | break; | |
4076 | case WMI_TPC_TABLE_TYPE_TXBF: | |
4077 | if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) { | |
4078 | ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n"); | |
4079 | tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; | |
4080 | return; | |
4081 | } | |
4082 | break; | |
4083 | default: | |
4084 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
4085 | "invalid table type in wmi tpc event: %d\n", type); | |
4086 | return; | |
4087 | } | |
4088 | ||
4089 | pream_idx = 0; | |
4090 | for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) { | |
4091 | memset(tpc_value, 0, sizeof(tpc_value)); | |
4092 | memset(buff, 0, sizeof(buff)); | |
4093 | if (i == pream_table[pream_idx]) | |
4094 | pream_idx++; | |
4095 | ||
4096 | for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) { | |
4097 | if (j >= __le32_to_cpu(ev->num_tx_chain)) | |
4098 | break; | |
4099 | ||
4100 | tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1, | |
4101 | rate_code[i], | |
4102 | type); | |
4103 | snprintf(buff, sizeof(buff), "%8d ", tpc[j]); | |
4104 | strncat(tpc_value, buff, strlen(buff)); | |
4105 | } | |
4106 | tpc_stats->tpc_table[type].pream_idx[i] = pream_idx; | |
4107 | tpc_stats->tpc_table[type].rate_code[i] = rate_code[i]; | |
4108 | memcpy(tpc_stats->tpc_table[type].tpc_value[i], | |
4109 | tpc_value, sizeof(tpc_value)); | |
4110 | } | |
4111 | } | |
4112 | ||
0226d602 | 4113 | void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 4114 | { |
29542666 MK |
4115 | u32 i, j, pream_idx, num_tx_chain; |
4116 | u8 rate_code[WMI_TPC_RATE_MAX], rate_idx; | |
4117 | u16 pream_table[WMI_TPC_PREAM_TABLE_MAX]; | |
4118 | struct wmi_pdev_tpc_config_event *ev; | |
4119 | struct ath10k_tpc_stats *tpc_stats; | |
4120 | ||
4121 | ev = (struct wmi_pdev_tpc_config_event *)skb->data; | |
4122 | ||
4123 | tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC); | |
4124 | if (!tpc_stats) | |
4125 | return; | |
4126 | ||
4127 | /* Create the rate code table based on the chains supported */ | |
4128 | rate_idx = 0; | |
4129 | pream_idx = 0; | |
4130 | ||
4131 | /* Fill CCK rate code */ | |
4132 | for (i = 0; i < 4; i++) { | |
4133 | rate_code[rate_idx] = | |
4134 | ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK); | |
4135 | rate_idx++; | |
4136 | } | |
4137 | pream_table[pream_idx] = rate_idx; | |
4138 | pream_idx++; | |
4139 | ||
4140 | /* Fill OFDM rate code */ | |
4141 | for (i = 0; i < 8; i++) { | |
4142 | rate_code[rate_idx] = | |
4143 | ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM); | |
4144 | rate_idx++; | |
4145 | } | |
4146 | pream_table[pream_idx] = rate_idx; | |
4147 | pream_idx++; | |
4148 | ||
4149 | num_tx_chain = __le32_to_cpu(ev->num_tx_chain); | |
4150 | ||
4151 | /* Fill HT20 rate code */ | |
4152 | for (i = 0; i < num_tx_chain; i++) { | |
4153 | for (j = 0; j < 8; j++) { | |
4154 | rate_code[rate_idx] = | |
4155 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT); | |
4156 | rate_idx++; | |
4157 | } | |
4158 | } | |
4159 | pream_table[pream_idx] = rate_idx; | |
4160 | pream_idx++; | |
4161 | ||
4162 | /* Fill HT40 rate code */ | |
4163 | for (i = 0; i < num_tx_chain; i++) { | |
4164 | for (j = 0; j < 8; j++) { | |
4165 | rate_code[rate_idx] = | |
4166 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT); | |
4167 | rate_idx++; | |
4168 | } | |
4169 | } | |
4170 | pream_table[pream_idx] = rate_idx; | |
4171 | pream_idx++; | |
4172 | ||
4173 | /* Fill VHT20 rate code */ | |
4174 | for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) { | |
4175 | for (j = 0; j < 10; j++) { | |
4176 | rate_code[rate_idx] = | |
4177 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); | |
4178 | rate_idx++; | |
4179 | } | |
4180 | } | |
4181 | pream_table[pream_idx] = rate_idx; | |
4182 | pream_idx++; | |
4183 | ||
4184 | /* Fill VHT40 rate code */ | |
4185 | for (i = 0; i < num_tx_chain; i++) { | |
4186 | for (j = 0; j < 10; j++) { | |
4187 | rate_code[rate_idx] = | |
4188 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); | |
4189 | rate_idx++; | |
4190 | } | |
4191 | } | |
4192 | pream_table[pream_idx] = rate_idx; | |
4193 | pream_idx++; | |
4194 | ||
4195 | /* Fill VHT80 rate code */ | |
4196 | for (i = 0; i < num_tx_chain; i++) { | |
4197 | for (j = 0; j < 10; j++) { | |
4198 | rate_code[rate_idx] = | |
4199 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); | |
4200 | rate_idx++; | |
4201 | } | |
4202 | } | |
4203 | pream_table[pream_idx] = rate_idx; | |
4204 | pream_idx++; | |
4205 | ||
4206 | rate_code[rate_idx++] = | |
4207 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK); | |
4208 | rate_code[rate_idx++] = | |
4209 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); | |
4210 | rate_code[rate_idx++] = | |
4211 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK); | |
4212 | rate_code[rate_idx++] = | |
4213 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); | |
4214 | rate_code[rate_idx++] = | |
4215 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); | |
4216 | ||
4217 | pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END; | |
4218 | ||
4219 | tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq); | |
4220 | tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode); | |
4221 | tpc_stats->ctl = __le32_to_cpu(ev->ctl); | |
4222 | tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain); | |
4223 | tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain); | |
4224 | tpc_stats->twice_antenna_reduction = | |
4225 | __le32_to_cpu(ev->twice_antenna_reduction); | |
4226 | tpc_stats->power_limit = __le32_to_cpu(ev->power_limit); | |
4227 | tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power); | |
4228 | tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain); | |
4229 | tpc_stats->rate_max = __le32_to_cpu(ev->rate_max); | |
4230 | ||
4231 | ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, | |
4232 | rate_code, pream_table, | |
4233 | WMI_TPC_TABLE_TYPE_CDD); | |
4234 | ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, | |
4235 | rate_code, pream_table, | |
4236 | WMI_TPC_TABLE_TYPE_STBC); | |
4237 | ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, | |
4238 | rate_code, pream_table, | |
4239 | WMI_TPC_TABLE_TYPE_TXBF); | |
4240 | ||
4241 | ath10k_debug_tpc_stats_process(ar, tpc_stats); | |
4242 | ||
4243 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
4244 | "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n", | |
4245 | __le32_to_cpu(ev->chan_freq), | |
4246 | __le32_to_cpu(ev->phy_mode), | |
4247 | __le32_to_cpu(ev->ctl), | |
4248 | __le32_to_cpu(ev->reg_domain), | |
4249 | a_sle32_to_cpu(ev->twice_antenna_gain), | |
4250 | __le32_to_cpu(ev->twice_antenna_reduction), | |
4251 | __le32_to_cpu(ev->power_limit), | |
4252 | __le32_to_cpu(ev->twice_max_rd_power) / 2, | |
4253 | __le32_to_cpu(ev->num_tx_chain), | |
4254 | __le32_to_cpu(ev->rate_max)); | |
5e3dd157 KV |
4255 | } |
4256 | ||
0226d602 | 4257 | void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 4258 | { |
7aa7a72a | 4259 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n"); |
5e3dd157 KV |
4260 | } |
4261 | ||
0226d602 | 4262 | void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 4263 | { |
7aa7a72a | 4264 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n"); |
5e3dd157 KV |
4265 | } |
4266 | ||
0226d602 | 4267 | void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 4268 | { |
7aa7a72a | 4269 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n"); |
5e3dd157 KV |
4270 | } |
4271 | ||
0226d602 | 4272 | void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 4273 | { |
7aa7a72a | 4274 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n"); |
5e3dd157 KV |
4275 | } |
4276 | ||
0226d602 | 4277 | void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 | 4278 | { |
7aa7a72a | 4279 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n"); |
5e3dd157 KV |
4280 | } |
4281 | ||
0226d602 MK |
4282 | void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, |
4283 | struct sk_buff *skb) | |
5e3dd157 | 4284 | { |
7aa7a72a | 4285 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n"); |
5e3dd157 KV |
4286 | } |
4287 | ||
0226d602 | 4288 | void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb) |
8a6618b0 | 4289 | { |
7aa7a72a | 4290 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n"); |
8a6618b0 BM |
4291 | } |
4292 | ||
0226d602 | 4293 | void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb) |
8a6618b0 | 4294 | { |
7aa7a72a | 4295 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n"); |
8a6618b0 BM |
4296 | } |
4297 | ||
0226d602 | 4298 | void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb) |
8a6618b0 | 4299 | { |
7aa7a72a | 4300 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n"); |
8a6618b0 BM |
4301 | } |
4302 | ||
b3effe61 | 4303 | static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id, |
5b07e07f | 4304 | u32 num_units, u32 unit_len) |
b3effe61 BM |
4305 | { |
4306 | dma_addr_t paddr; | |
4307 | u32 pool_size; | |
4308 | int idx = ar->wmi.num_mem_chunks; | |
4309 | ||
4310 | pool_size = num_units * round_up(unit_len, 4); | |
4311 | ||
4312 | if (!pool_size) | |
4313 | return -EINVAL; | |
4314 | ||
4315 | ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev, | |
4316 | pool_size, | |
4317 | &paddr, | |
c8ecfc1c | 4318 | GFP_KERNEL); |
b3effe61 | 4319 | if (!ar->wmi.mem_chunks[idx].vaddr) { |
7aa7a72a | 4320 | ath10k_warn(ar, "failed to allocate memory chunk\n"); |
b3effe61 BM |
4321 | return -ENOMEM; |
4322 | } | |
4323 | ||
4324 | memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size); | |
4325 | ||
4326 | ar->wmi.mem_chunks[idx].paddr = paddr; | |
4327 | ar->wmi.mem_chunks[idx].len = pool_size; | |
4328 | ar->wmi.mem_chunks[idx].req_id = req_id; | |
4329 | ar->wmi.num_mem_chunks++; | |
4330 | ||
4331 | return 0; | |
4332 | } | |
4333 | ||
a925a376 VT |
4334 | static bool |
4335 | ath10k_wmi_is_host_mem_allocated(struct ath10k *ar, | |
4336 | const struct wlan_host_mem_req **mem_reqs, | |
4337 | u32 num_mem_reqs) | |
4338 | { | |
4339 | u32 req_id, num_units, unit_size, num_unit_info; | |
4340 | u32 pool_size; | |
4341 | int i, j; | |
4342 | bool found; | |
4343 | ||
4344 | if (ar->wmi.num_mem_chunks != num_mem_reqs) | |
4345 | return false; | |
4346 | ||
4347 | for (i = 0; i < num_mem_reqs; ++i) { | |
4348 | req_id = __le32_to_cpu(mem_reqs[i]->req_id); | |
4349 | num_units = __le32_to_cpu(mem_reqs[i]->num_units); | |
4350 | unit_size = __le32_to_cpu(mem_reqs[i]->unit_size); | |
4351 | num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info); | |
4352 | ||
4353 | if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) { | |
4354 | if (ar->num_active_peers) | |
4355 | num_units = ar->num_active_peers + 1; | |
4356 | else | |
4357 | num_units = ar->max_num_peers + 1; | |
4358 | } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) { | |
4359 | num_units = ar->max_num_peers + 1; | |
4360 | } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) { | |
4361 | num_units = ar->max_num_vdevs + 1; | |
4362 | } | |
4363 | ||
4364 | found = false; | |
4365 | for (j = 0; j < ar->wmi.num_mem_chunks; j++) { | |
4366 | if (ar->wmi.mem_chunks[j].req_id == req_id) { | |
4367 | pool_size = num_units * round_up(unit_size, 4); | |
4368 | if (ar->wmi.mem_chunks[j].len == pool_size) { | |
4369 | found = true; | |
4370 | break; | |
4371 | } | |
4372 | } | |
4373 | } | |
4374 | if (!found) | |
4375 | return false; | |
4376 | } | |
4377 | ||
4378 | return true; | |
4379 | } | |
4380 | ||
d7579d12 MK |
4381 | static int |
4382 | ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, | |
4383 | struct wmi_svc_rdy_ev_arg *arg) | |
5c01aa3d MK |
4384 | { |
4385 | struct wmi_service_ready_event *ev; | |
4386 | size_t i, n; | |
4387 | ||
4388 | if (skb->len < sizeof(*ev)) | |
4389 | return -EPROTO; | |
4390 | ||
4391 | ev = (void *)skb->data; | |
4392 | skb_pull(skb, sizeof(*ev)); | |
4393 | arg->min_tx_power = ev->hw_min_tx_power; | |
4394 | arg->max_tx_power = ev->hw_max_tx_power; | |
4395 | arg->ht_cap = ev->ht_cap_info; | |
4396 | arg->vht_cap = ev->vht_cap_info; | |
4397 | arg->sw_ver0 = ev->sw_version; | |
4398 | arg->sw_ver1 = ev->sw_version_1; | |
4399 | arg->phy_capab = ev->phy_capability; | |
4400 | arg->num_rf_chains = ev->num_rf_chains; | |
4401 | arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; | |
4402 | arg->num_mem_reqs = ev->num_mem_reqs; | |
4403 | arg->service_map = ev->wmi_service_bitmap; | |
2a3e60d3 | 4404 | arg->service_map_len = sizeof(ev->wmi_service_bitmap); |
5c01aa3d MK |
4405 | |
4406 | n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), | |
4407 | ARRAY_SIZE(arg->mem_reqs)); | |
4408 | for (i = 0; i < n; i++) | |
4409 | arg->mem_reqs[i] = &ev->mem_reqs[i]; | |
4410 | ||
4411 | if (skb->len < | |
4412 | __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) | |
4413 | return -EPROTO; | |
4414 | ||
4415 | return 0; | |
4416 | } | |
4417 | ||
d7579d12 MK |
4418 | static int |
4419 | ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, | |
4420 | struct wmi_svc_rdy_ev_arg *arg) | |
5c01aa3d MK |
4421 | { |
4422 | struct wmi_10x_service_ready_event *ev; | |
4423 | int i, n; | |
4424 | ||
4425 | if (skb->len < sizeof(*ev)) | |
4426 | return -EPROTO; | |
4427 | ||
4428 | ev = (void *)skb->data; | |
4429 | skb_pull(skb, sizeof(*ev)); | |
4430 | arg->min_tx_power = ev->hw_min_tx_power; | |
4431 | arg->max_tx_power = ev->hw_max_tx_power; | |
4432 | arg->ht_cap = ev->ht_cap_info; | |
4433 | arg->vht_cap = ev->vht_cap_info; | |
4434 | arg->sw_ver0 = ev->sw_version; | |
4435 | arg->phy_capab = ev->phy_capability; | |
4436 | arg->num_rf_chains = ev->num_rf_chains; | |
4437 | arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; | |
4438 | arg->num_mem_reqs = ev->num_mem_reqs; | |
4439 | arg->service_map = ev->wmi_service_bitmap; | |
2a3e60d3 | 4440 | arg->service_map_len = sizeof(ev->wmi_service_bitmap); |
5c01aa3d MK |
4441 | |
4442 | n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), | |
4443 | ARRAY_SIZE(arg->mem_reqs)); | |
4444 | for (i = 0; i < n; i++) | |
4445 | arg->mem_reqs[i] = &ev->mem_reqs[i]; | |
4446 | ||
4447 | if (skb->len < | |
4448 | __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) | |
4449 | return -EPROTO; | |
4450 | ||
4451 | return 0; | |
4452 | } | |
4453 | ||
c8ecfc1c | 4454 | static void ath10k_wmi_event_service_ready_work(struct work_struct *work) |
5e3dd157 | 4455 | { |
c8ecfc1c RM |
4456 | struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work); |
4457 | struct sk_buff *skb = ar->svc_rdy_skb; | |
5c01aa3d MK |
4458 | struct wmi_svc_rdy_ev_arg arg = {}; |
4459 | u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i; | |
5c01aa3d | 4460 | int ret; |
a925a376 | 4461 | bool allocated; |
5c01aa3d | 4462 | |
c8ecfc1c RM |
4463 | if (!skb) { |
4464 | ath10k_warn(ar, "invalid service ready event skb\n"); | |
4465 | return; | |
4466 | } | |
4467 | ||
d7579d12 | 4468 | ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg); |
5c01aa3d MK |
4469 | if (ret) { |
4470 | ath10k_warn(ar, "failed to parse service ready: %d\n", ret); | |
5e3dd157 KV |
4471 | return; |
4472 | } | |
4473 | ||
d7579d12 MK |
4474 | memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map)); |
4475 | ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map, | |
4476 | arg.service_map_len); | |
4477 | ||
5c01aa3d MK |
4478 | ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power); |
4479 | ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power); | |
4480 | ar->ht_cap_info = __le32_to_cpu(arg.ht_cap); | |
4481 | ar->vht_cap_info = __le32_to_cpu(arg.vht_cap); | |
5e3dd157 | 4482 | ar->fw_version_major = |
5c01aa3d MK |
4483 | (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24; |
4484 | ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff); | |
5e3dd157 | 4485 | ar->fw_version_release = |
5c01aa3d MK |
4486 | (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16; |
4487 | ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff); | |
4488 | ar->phy_capability = __le32_to_cpu(arg.phy_capab); | |
4489 | ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains); | |
4490 | ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd); | |
4491 | ||
5c01aa3d | 4492 | ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ", |
2a3e60d3 | 4493 | arg.service_map, arg.service_map_len); |
8865bee4 | 4494 | |
1a222435 KV |
4495 | /* only manually set fw features when not using FW IE format */ |
4496 | if (ar->fw_api == 1 && ar->fw_version_build > 636) | |
0d9b0438 MK |
4497 | set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features); |
4498 | ||
5c8726ec | 4499 | if (ar->num_rf_chains > ar->max_spatial_stream) { |
7aa7a72a | 4500 | ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n", |
5c8726ec RM |
4501 | ar->num_rf_chains, ar->max_spatial_stream); |
4502 | ar->num_rf_chains = ar->max_spatial_stream; | |
8865bee4 | 4503 | } |
5e3dd157 | 4504 | |
166de3f1 RM |
4505 | if (!ar->cfg_tx_chainmask) { |
4506 | ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1; | |
4507 | ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1; | |
4508 | } | |
fdb959c7 | 4509 | |
5e3dd157 KV |
4510 | if (strlen(ar->hw->wiphy->fw_version) == 0) { |
4511 | snprintf(ar->hw->wiphy->fw_version, | |
4512 | sizeof(ar->hw->wiphy->fw_version), | |
4513 | "%u.%u.%u.%u", | |
4514 | ar->fw_version_major, | |
4515 | ar->fw_version_minor, | |
4516 | ar->fw_version_release, | |
4517 | ar->fw_version_build); | |
4518 | } | |
4519 | ||
5c01aa3d MK |
4520 | num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs); |
4521 | if (num_mem_reqs > WMI_MAX_MEM_REQS) { | |
7aa7a72a | 4522 | ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n", |
b3effe61 BM |
4523 | num_mem_reqs); |
4524 | return; | |
6f97d256 BM |
4525 | } |
4526 | ||
b0399417 RM |
4527 | if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) { |
4528 | ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX + | |
4529 | TARGET_10_4_NUM_VDEVS; | |
4530 | ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS + | |
4531 | TARGET_10_4_NUM_VDEVS; | |
4532 | ar->num_tids = ar->num_active_peers * 2; | |
4533 | ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX; | |
4534 | } | |
4535 | ||
4536 | /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE | |
4537 | * and WMI_SERVICE_IRAM_TIDS, etc. | |
4538 | */ | |
4539 | ||
a925a376 VT |
4540 | allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs, |
4541 | num_mem_reqs); | |
4542 | if (allocated) | |
4543 | goto skip_mem_alloc; | |
4544 | ||
4545 | /* Either this event is received during boot time or there is a change | |
4546 | * in memory requirement from firmware when compared to last request. | |
4547 | * Free any old memory and do a fresh allocation based on the current | |
4548 | * memory requirement. | |
4549 | */ | |
4550 | ath10k_wmi_free_host_mem(ar); | |
4551 | ||
b3effe61 | 4552 | for (i = 0; i < num_mem_reqs; ++i) { |
5c01aa3d MK |
4553 | req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id); |
4554 | num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units); | |
4555 | unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size); | |
4556 | num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info); | |
b3effe61 | 4557 | |
b0399417 RM |
4558 | if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) { |
4559 | if (ar->num_active_peers) | |
4560 | num_units = ar->num_active_peers + 1; | |
4561 | else | |
4562 | num_units = ar->max_num_peers + 1; | |
4563 | } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) { | |
b3effe61 BM |
4564 | /* number of units to allocate is number of |
4565 | * peers, 1 extra for self peer on target */ | |
4566 | /* this needs to be tied, host and target | |
4567 | * can get out of sync */ | |
b0399417 RM |
4568 | num_units = ar->max_num_peers + 1; |
4569 | } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) { | |
4570 | num_units = ar->max_num_vdevs + 1; | |
4571 | } | |
b3effe61 | 4572 | |
7aa7a72a | 4573 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
b3effe61 BM |
4574 | "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n", |
4575 | req_id, | |
5c01aa3d | 4576 | __le32_to_cpu(arg.mem_reqs[i]->num_units), |
b3effe61 BM |
4577 | num_unit_info, |
4578 | unit_size, | |
4579 | num_units); | |
4580 | ||
4581 | ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units, | |
4582 | unit_size); | |
4583 | if (ret) | |
4584 | return; | |
4585 | } | |
4586 | ||
a925a376 | 4587 | skip_mem_alloc: |
7aa7a72a | 4588 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
ca996ec5 | 4589 | "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n", |
5c01aa3d MK |
4590 | __le32_to_cpu(arg.min_tx_power), |
4591 | __le32_to_cpu(arg.max_tx_power), | |
4592 | __le32_to_cpu(arg.ht_cap), | |
4593 | __le32_to_cpu(arg.vht_cap), | |
4594 | __le32_to_cpu(arg.sw_ver0), | |
4595 | __le32_to_cpu(arg.sw_ver1), | |
ca996ec5 | 4596 | __le32_to_cpu(arg.fw_build), |
5c01aa3d MK |
4597 | __le32_to_cpu(arg.phy_capab), |
4598 | __le32_to_cpu(arg.num_rf_chains), | |
4599 | __le32_to_cpu(arg.eeprom_rd), | |
4600 | __le32_to_cpu(arg.num_mem_reqs)); | |
6f97d256 | 4601 | |
c8ecfc1c RM |
4602 | dev_kfree_skb(skb); |
4603 | ar->svc_rdy_skb = NULL; | |
6f97d256 BM |
4604 | complete(&ar->wmi.service_ready); |
4605 | } | |
4606 | ||
c8ecfc1c RM |
4607 | void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb) |
4608 | { | |
4609 | ar->svc_rdy_skb = skb; | |
4610 | queue_work(ar->workqueue_aux, &ar->svc_rdy_work); | |
4611 | } | |
4612 | ||
d7579d12 MK |
4613 | static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb, |
4614 | struct wmi_rdy_ev_arg *arg) | |
5e3dd157 | 4615 | { |
32653cf1 | 4616 | struct wmi_ready_event *ev = (void *)skb->data; |
5e3dd157 | 4617 | |
32653cf1 MK |
4618 | if (skb->len < sizeof(*ev)) |
4619 | return -EPROTO; | |
4620 | ||
4621 | skb_pull(skb, sizeof(*ev)); | |
4622 | arg->sw_version = ev->sw_version; | |
4623 | arg->abi_version = ev->abi_version; | |
4624 | arg->status = ev->status; | |
4625 | arg->mac_addr = ev->mac_addr.addr; | |
4626 | ||
4627 | return 0; | |
4628 | } | |
5e3dd157 | 4629 | |
c1a4654a MK |
4630 | static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb, |
4631 | struct wmi_roam_ev_arg *arg) | |
4632 | { | |
4633 | struct wmi_roam_ev *ev = (void *)skb->data; | |
4634 | ||
4635 | if (skb->len < sizeof(*ev)) | |
4636 | return -EPROTO; | |
4637 | ||
4638 | skb_pull(skb, sizeof(*ev)); | |
4639 | arg->vdev_id = ev->vdev_id; | |
4640 | arg->reason = ev->reason; | |
4641 | ||
4642 | return 0; | |
4643 | } | |
4644 | ||
0226d602 | 4645 | int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb) |
32653cf1 MK |
4646 | { |
4647 | struct wmi_rdy_ev_arg arg = {}; | |
4648 | int ret; | |
4649 | ||
d7579d12 | 4650 | ret = ath10k_wmi_pull_rdy(ar, skb, &arg); |
32653cf1 MK |
4651 | if (ret) { |
4652 | ath10k_warn(ar, "failed to parse ready event: %d\n", ret); | |
4653 | return ret; | |
4654 | } | |
5e3dd157 | 4655 | |
7aa7a72a | 4656 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
32653cf1 MK |
4657 | "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n", |
4658 | __le32_to_cpu(arg.sw_version), | |
4659 | __le32_to_cpu(arg.abi_version), | |
4660 | arg.mac_addr, | |
4661 | __le32_to_cpu(arg.status)); | |
5e3dd157 | 4662 | |
32653cf1 | 4663 | ether_addr_copy(ar->mac_addr, arg.mac_addr); |
5e3dd157 KV |
4664 | complete(&ar->wmi.unified_ready); |
4665 | return 0; | |
4666 | } | |
4667 | ||
a57a6a27 RM |
4668 | static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb) |
4669 | { | |
4670 | const struct wmi_pdev_temperature_event *ev; | |
4671 | ||
4672 | ev = (struct wmi_pdev_temperature_event *)skb->data; | |
4673 | if (WARN_ON(skb->len < sizeof(*ev))) | |
4674 | return -EPROTO; | |
4675 | ||
ac2953fc | 4676 | ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature)); |
a57a6a27 RM |
4677 | return 0; |
4678 | } | |
4679 | ||
d7579d12 | 4680 | static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb) |
5e3dd157 KV |
4681 | { |
4682 | struct wmi_cmd_hdr *cmd_hdr; | |
4683 | enum wmi_event_id id; | |
5e3dd157 KV |
4684 | |
4685 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
4686 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
4687 | ||
4688 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
469d479f | 4689 | goto out; |
5e3dd157 | 4690 | |
d35a6c18 | 4691 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
5e3dd157 KV |
4692 | |
4693 | switch (id) { | |
4694 | case WMI_MGMT_RX_EVENTID: | |
4695 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
4696 | /* mgmt_rx() owns the skb now! */ | |
4697 | return; | |
4698 | case WMI_SCAN_EVENTID: | |
4699 | ath10k_wmi_event_scan(ar, skb); | |
4700 | break; | |
4701 | case WMI_CHAN_INFO_EVENTID: | |
4702 | ath10k_wmi_event_chan_info(ar, skb); | |
4703 | break; | |
4704 | case WMI_ECHO_EVENTID: | |
4705 | ath10k_wmi_event_echo(ar, skb); | |
4706 | break; | |
4707 | case WMI_DEBUG_MESG_EVENTID: | |
4708 | ath10k_wmi_event_debug_mesg(ar, skb); | |
4709 | break; | |
4710 | case WMI_UPDATE_STATS_EVENTID: | |
4711 | ath10k_wmi_event_update_stats(ar, skb); | |
4712 | break; | |
4713 | case WMI_VDEV_START_RESP_EVENTID: | |
4714 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
4715 | break; | |
4716 | case WMI_VDEV_STOPPED_EVENTID: | |
4717 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
4718 | break; | |
4719 | case WMI_PEER_STA_KICKOUT_EVENTID: | |
4720 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
4721 | break; | |
4722 | case WMI_HOST_SWBA_EVENTID: | |
4723 | ath10k_wmi_event_host_swba(ar, skb); | |
4724 | break; | |
4725 | case WMI_TBTTOFFSET_UPDATE_EVENTID: | |
4726 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
4727 | break; | |
4728 | case WMI_PHYERR_EVENTID: | |
4729 | ath10k_wmi_event_phyerr(ar, skb); | |
4730 | break; | |
4731 | case WMI_ROAM_EVENTID: | |
4732 | ath10k_wmi_event_roam(ar, skb); | |
4733 | break; | |
4734 | case WMI_PROFILE_MATCH: | |
4735 | ath10k_wmi_event_profile_match(ar, skb); | |
4736 | break; | |
4737 | case WMI_DEBUG_PRINT_EVENTID: | |
4738 | ath10k_wmi_event_debug_print(ar, skb); | |
4739 | break; | |
4740 | case WMI_PDEV_QVIT_EVENTID: | |
4741 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
4742 | break; | |
4743 | case WMI_WLAN_PROFILE_DATA_EVENTID: | |
4744 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
4745 | break; | |
4746 | case WMI_RTT_MEASUREMENT_REPORT_EVENTID: | |
4747 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
4748 | break; | |
4749 | case WMI_TSF_MEASUREMENT_REPORT_EVENTID: | |
4750 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
4751 | break; | |
4752 | case WMI_RTT_ERROR_REPORT_EVENTID: | |
4753 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
4754 | break; | |
4755 | case WMI_WOW_WAKEUP_HOST_EVENTID: | |
4756 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
4757 | break; | |
4758 | case WMI_DCS_INTERFERENCE_EVENTID: | |
4759 | ath10k_wmi_event_dcs_interference(ar, skb); | |
4760 | break; | |
4761 | case WMI_PDEV_TPC_CONFIG_EVENTID: | |
4762 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
4763 | break; | |
4764 | case WMI_PDEV_FTM_INTG_EVENTID: | |
4765 | ath10k_wmi_event_pdev_ftm_intg(ar, skb); | |
4766 | break; | |
4767 | case WMI_GTK_OFFLOAD_STATUS_EVENTID: | |
4768 | ath10k_wmi_event_gtk_offload_status(ar, skb); | |
4769 | break; | |
4770 | case WMI_GTK_REKEY_FAIL_EVENTID: | |
4771 | ath10k_wmi_event_gtk_rekey_fail(ar, skb); | |
4772 | break; | |
4773 | case WMI_TX_DELBA_COMPLETE_EVENTID: | |
4774 | ath10k_wmi_event_delba_complete(ar, skb); | |
4775 | break; | |
4776 | case WMI_TX_ADDBA_COMPLETE_EVENTID: | |
4777 | ath10k_wmi_event_addba_complete(ar, skb); | |
4778 | break; | |
4779 | case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: | |
4780 | ath10k_wmi_event_vdev_install_key_complete(ar, skb); | |
4781 | break; | |
4782 | case WMI_SERVICE_READY_EVENTID: | |
b34d2b3d | 4783 | ath10k_wmi_event_service_ready(ar, skb); |
c8ecfc1c | 4784 | return; |
5e3dd157 | 4785 | case WMI_READY_EVENTID: |
b34d2b3d | 4786 | ath10k_wmi_event_ready(ar, skb); |
5e3dd157 KV |
4787 | break; |
4788 | default: | |
7aa7a72a | 4789 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
5e3dd157 KV |
4790 | break; |
4791 | } | |
4792 | ||
469d479f | 4793 | out: |
5e3dd157 KV |
4794 | dev_kfree_skb(skb); |
4795 | } | |
4796 | ||
d7579d12 | 4797 | static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb) |
8a6618b0 BM |
4798 | { |
4799 | struct wmi_cmd_hdr *cmd_hdr; | |
4800 | enum wmi_10x_event_id id; | |
43d2a30f | 4801 | bool consumed; |
8a6618b0 BM |
4802 | |
4803 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
4804 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
4805 | ||
4806 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
469d479f | 4807 | goto out; |
8a6618b0 | 4808 | |
d35a6c18 | 4809 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
8a6618b0 | 4810 | |
43d2a30f KV |
4811 | consumed = ath10k_tm_event_wmi(ar, id, skb); |
4812 | ||
4813 | /* Ready event must be handled normally also in UTF mode so that we | |
4814 | * know the UTF firmware has booted, others we are just bypass WMI | |
4815 | * events to testmode. | |
4816 | */ | |
4817 | if (consumed && id != WMI_10X_READY_EVENTID) { | |
4818 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
4819 | "wmi testmode consumed 0x%x\n", id); | |
4820 | goto out; | |
4821 | } | |
4822 | ||
8a6618b0 BM |
4823 | switch (id) { |
4824 | case WMI_10X_MGMT_RX_EVENTID: | |
4825 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
4826 | /* mgmt_rx() owns the skb now! */ | |
4827 | return; | |
4828 | case WMI_10X_SCAN_EVENTID: | |
4829 | ath10k_wmi_event_scan(ar, skb); | |
4830 | break; | |
4831 | case WMI_10X_CHAN_INFO_EVENTID: | |
4832 | ath10k_wmi_event_chan_info(ar, skb); | |
4833 | break; | |
4834 | case WMI_10X_ECHO_EVENTID: | |
4835 | ath10k_wmi_event_echo(ar, skb); | |
4836 | break; | |
4837 | case WMI_10X_DEBUG_MESG_EVENTID: | |
4838 | ath10k_wmi_event_debug_mesg(ar, skb); | |
4839 | break; | |
4840 | case WMI_10X_UPDATE_STATS_EVENTID: | |
4841 | ath10k_wmi_event_update_stats(ar, skb); | |
4842 | break; | |
4843 | case WMI_10X_VDEV_START_RESP_EVENTID: | |
4844 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
4845 | break; | |
4846 | case WMI_10X_VDEV_STOPPED_EVENTID: | |
4847 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
4848 | break; | |
4849 | case WMI_10X_PEER_STA_KICKOUT_EVENTID: | |
4850 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
4851 | break; | |
4852 | case WMI_10X_HOST_SWBA_EVENTID: | |
4853 | ath10k_wmi_event_host_swba(ar, skb); | |
4854 | break; | |
4855 | case WMI_10X_TBTTOFFSET_UPDATE_EVENTID: | |
4856 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
4857 | break; | |
4858 | case WMI_10X_PHYERR_EVENTID: | |
4859 | ath10k_wmi_event_phyerr(ar, skb); | |
4860 | break; | |
4861 | case WMI_10X_ROAM_EVENTID: | |
4862 | ath10k_wmi_event_roam(ar, skb); | |
4863 | break; | |
4864 | case WMI_10X_PROFILE_MATCH: | |
4865 | ath10k_wmi_event_profile_match(ar, skb); | |
4866 | break; | |
4867 | case WMI_10X_DEBUG_PRINT_EVENTID: | |
4868 | ath10k_wmi_event_debug_print(ar, skb); | |
4869 | break; | |
4870 | case WMI_10X_PDEV_QVIT_EVENTID: | |
4871 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
4872 | break; | |
4873 | case WMI_10X_WLAN_PROFILE_DATA_EVENTID: | |
4874 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
4875 | break; | |
4876 | case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID: | |
4877 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
4878 | break; | |
4879 | case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID: | |
4880 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
4881 | break; | |
4882 | case WMI_10X_RTT_ERROR_REPORT_EVENTID: | |
4883 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
4884 | break; | |
4885 | case WMI_10X_WOW_WAKEUP_HOST_EVENTID: | |
4886 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
4887 | break; | |
4888 | case WMI_10X_DCS_INTERFERENCE_EVENTID: | |
4889 | ath10k_wmi_event_dcs_interference(ar, skb); | |
4890 | break; | |
4891 | case WMI_10X_PDEV_TPC_CONFIG_EVENTID: | |
4892 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
4893 | break; | |
4894 | case WMI_10X_INST_RSSI_STATS_EVENTID: | |
4895 | ath10k_wmi_event_inst_rssi_stats(ar, skb); | |
4896 | break; | |
4897 | case WMI_10X_VDEV_STANDBY_REQ_EVENTID: | |
4898 | ath10k_wmi_event_vdev_standby_req(ar, skb); | |
4899 | break; | |
4900 | case WMI_10X_VDEV_RESUME_REQ_EVENTID: | |
4901 | ath10k_wmi_event_vdev_resume_req(ar, skb); | |
4902 | break; | |
4903 | case WMI_10X_SERVICE_READY_EVENTID: | |
b34d2b3d | 4904 | ath10k_wmi_event_service_ready(ar, skb); |
c8ecfc1c | 4905 | return; |
8a6618b0 | 4906 | case WMI_10X_READY_EVENTID: |
b34d2b3d | 4907 | ath10k_wmi_event_ready(ar, skb); |
8a6618b0 | 4908 | break; |
43d2a30f KV |
4909 | case WMI_10X_PDEV_UTF_EVENTID: |
4910 | /* ignore utf events */ | |
4911 | break; | |
8a6618b0 | 4912 | default: |
7aa7a72a | 4913 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
8a6618b0 BM |
4914 | break; |
4915 | } | |
4916 | ||
43d2a30f | 4917 | out: |
8a6618b0 BM |
4918 | dev_kfree_skb(skb); |
4919 | } | |
4920 | ||
d7579d12 | 4921 | static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb) |
24c88f78 MK |
4922 | { |
4923 | struct wmi_cmd_hdr *cmd_hdr; | |
4924 | enum wmi_10_2_event_id id; | |
4925 | ||
4926 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
4927 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
4928 | ||
4929 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
469d479f | 4930 | goto out; |
24c88f78 | 4931 | |
d35a6c18 | 4932 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
24c88f78 MK |
4933 | |
4934 | switch (id) { | |
4935 | case WMI_10_2_MGMT_RX_EVENTID: | |
4936 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
4937 | /* mgmt_rx() owns the skb now! */ | |
4938 | return; | |
4939 | case WMI_10_2_SCAN_EVENTID: | |
4940 | ath10k_wmi_event_scan(ar, skb); | |
4941 | break; | |
4942 | case WMI_10_2_CHAN_INFO_EVENTID: | |
4943 | ath10k_wmi_event_chan_info(ar, skb); | |
4944 | break; | |
4945 | case WMI_10_2_ECHO_EVENTID: | |
4946 | ath10k_wmi_event_echo(ar, skb); | |
4947 | break; | |
4948 | case WMI_10_2_DEBUG_MESG_EVENTID: | |
4949 | ath10k_wmi_event_debug_mesg(ar, skb); | |
4950 | break; | |
4951 | case WMI_10_2_UPDATE_STATS_EVENTID: | |
4952 | ath10k_wmi_event_update_stats(ar, skb); | |
4953 | break; | |
4954 | case WMI_10_2_VDEV_START_RESP_EVENTID: | |
4955 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
4956 | break; | |
4957 | case WMI_10_2_VDEV_STOPPED_EVENTID: | |
4958 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
4959 | break; | |
4960 | case WMI_10_2_PEER_STA_KICKOUT_EVENTID: | |
4961 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
4962 | break; | |
4963 | case WMI_10_2_HOST_SWBA_EVENTID: | |
4964 | ath10k_wmi_event_host_swba(ar, skb); | |
4965 | break; | |
4966 | case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID: | |
4967 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
4968 | break; | |
4969 | case WMI_10_2_PHYERR_EVENTID: | |
4970 | ath10k_wmi_event_phyerr(ar, skb); | |
4971 | break; | |
4972 | case WMI_10_2_ROAM_EVENTID: | |
4973 | ath10k_wmi_event_roam(ar, skb); | |
4974 | break; | |
4975 | case WMI_10_2_PROFILE_MATCH: | |
4976 | ath10k_wmi_event_profile_match(ar, skb); | |
4977 | break; | |
4978 | case WMI_10_2_DEBUG_PRINT_EVENTID: | |
4979 | ath10k_wmi_event_debug_print(ar, skb); | |
4980 | break; | |
4981 | case WMI_10_2_PDEV_QVIT_EVENTID: | |
4982 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
4983 | break; | |
4984 | case WMI_10_2_WLAN_PROFILE_DATA_EVENTID: | |
4985 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
4986 | break; | |
4987 | case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID: | |
4988 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
4989 | break; | |
4990 | case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID: | |
4991 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
4992 | break; | |
4993 | case WMI_10_2_RTT_ERROR_REPORT_EVENTID: | |
4994 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
4995 | break; | |
4996 | case WMI_10_2_WOW_WAKEUP_HOST_EVENTID: | |
4997 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
4998 | break; | |
4999 | case WMI_10_2_DCS_INTERFERENCE_EVENTID: | |
5000 | ath10k_wmi_event_dcs_interference(ar, skb); | |
5001 | break; | |
5002 | case WMI_10_2_PDEV_TPC_CONFIG_EVENTID: | |
5003 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
5004 | break; | |
5005 | case WMI_10_2_INST_RSSI_STATS_EVENTID: | |
5006 | ath10k_wmi_event_inst_rssi_stats(ar, skb); | |
5007 | break; | |
5008 | case WMI_10_2_VDEV_STANDBY_REQ_EVENTID: | |
5009 | ath10k_wmi_event_vdev_standby_req(ar, skb); | |
5010 | break; | |
5011 | case WMI_10_2_VDEV_RESUME_REQ_EVENTID: | |
5012 | ath10k_wmi_event_vdev_resume_req(ar, skb); | |
5013 | break; | |
5014 | case WMI_10_2_SERVICE_READY_EVENTID: | |
b34d2b3d | 5015 | ath10k_wmi_event_service_ready(ar, skb); |
c8ecfc1c | 5016 | return; |
24c88f78 | 5017 | case WMI_10_2_READY_EVENTID: |
b34d2b3d | 5018 | ath10k_wmi_event_ready(ar, skb); |
24c88f78 | 5019 | break; |
a57a6a27 RM |
5020 | case WMI_10_2_PDEV_TEMPERATURE_EVENTID: |
5021 | ath10k_wmi_event_temperature(ar, skb); | |
5022 | break; | |
24c88f78 MK |
5023 | case WMI_10_2_RTT_KEEPALIVE_EVENTID: |
5024 | case WMI_10_2_GPIO_INPUT_EVENTID: | |
5025 | case WMI_10_2_PEER_RATECODE_LIST_EVENTID: | |
5026 | case WMI_10_2_GENERIC_BUFFER_EVENTID: | |
5027 | case WMI_10_2_MCAST_BUF_RELEASE_EVENTID: | |
5028 | case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID: | |
5029 | case WMI_10_2_WDS_PEER_EVENTID: | |
7aa7a72a | 5030 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
24c88f78 MK |
5031 | "received event id %d not implemented\n", id); |
5032 | break; | |
5033 | default: | |
7aa7a72a | 5034 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
24c88f78 MK |
5035 | break; |
5036 | } | |
5037 | ||
469d479f | 5038 | out: |
24c88f78 MK |
5039 | dev_kfree_skb(skb); |
5040 | } | |
8a6618b0 | 5041 | |
1c092961 RM |
5042 | static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb) |
5043 | { | |
5044 | struct wmi_cmd_hdr *cmd_hdr; | |
5045 | enum wmi_10_4_event_id id; | |
5046 | ||
5047 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
5048 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
5049 | ||
5050 | if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) | |
5051 | goto out; | |
5052 | ||
5053 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); | |
5054 | ||
5055 | switch (id) { | |
5056 | case WMI_10_4_MGMT_RX_EVENTID: | |
5057 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
5058 | /* mgmt_rx() owns the skb now! */ | |
5059 | return; | |
373b48cf RM |
5060 | case WMI_10_4_ECHO_EVENTID: |
5061 | ath10k_wmi_event_echo(ar, skb); | |
5062 | break; | |
5063 | case WMI_10_4_DEBUG_MESG_EVENTID: | |
5064 | ath10k_wmi_event_debug_mesg(ar, skb); | |
5065 | break; | |
5066 | case WMI_10_4_SERVICE_READY_EVENTID: | |
5067 | ath10k_wmi_event_service_ready(ar, skb); | |
c8ecfc1c | 5068 | return; |
b2297baa RM |
5069 | case WMI_10_4_SCAN_EVENTID: |
5070 | ath10k_wmi_event_scan(ar, skb); | |
5071 | break; | |
5072 | case WMI_10_4_CHAN_INFO_EVENTID: | |
5073 | ath10k_wmi_event_chan_info(ar, skb); | |
5074 | break; | |
2b0a2e0d RM |
5075 | case WMI_10_4_PHYERR_EVENTID: |
5076 | ath10k_wmi_event_phyerr(ar, skb); | |
5077 | break; | |
d02e752f RM |
5078 | case WMI_10_4_READY_EVENTID: |
5079 | ath10k_wmi_event_ready(ar, skb); | |
5080 | break; | |
373b48cf RM |
5081 | case WMI_10_4_PEER_STA_KICKOUT_EVENTID: |
5082 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
5083 | break; | |
3cec3be3 RM |
5084 | case WMI_10_4_HOST_SWBA_EVENTID: |
5085 | ath10k_wmi_event_host_swba(ar, skb); | |
5086 | break; | |
373b48cf RM |
5087 | case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID: |
5088 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
5089 | break; | |
5090 | case WMI_10_4_DEBUG_PRINT_EVENTID: | |
5091 | ath10k_wmi_event_debug_print(ar, skb); | |
5092 | break; | |
5093 | case WMI_10_4_VDEV_START_RESP_EVENTID: | |
5094 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
5095 | break; | |
5096 | case WMI_10_4_VDEV_STOPPED_EVENTID: | |
5097 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
5098 | break; | |
5099 | case WMI_10_4_WOW_WAKEUP_HOST_EVENTID: | |
5100 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
5101 | "received event id %d not implemented\n", id); | |
5102 | break; | |
98dd2b92 MP |
5103 | case WMI_10_4_UPDATE_STATS_EVENTID: |
5104 | ath10k_wmi_event_update_stats(ar, skb); | |
5105 | break; | |
1c092961 RM |
5106 | default: |
5107 | ath10k_warn(ar, "Unknown eventid: %d\n", id); | |
5108 | break; | |
5109 | } | |
5110 | ||
5111 | out: | |
5112 | dev_kfree_skb(skb); | |
5113 | } | |
5114 | ||
ce42870e BM |
5115 | static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb) |
5116 | { | |
d7579d12 MK |
5117 | int ret; |
5118 | ||
5119 | ret = ath10k_wmi_rx(ar, skb); | |
5120 | if (ret) | |
5121 | ath10k_warn(ar, "failed to process wmi rx: %d\n", ret); | |
ce42870e BM |
5122 | } |
5123 | ||
95bf21f9 | 5124 | int ath10k_wmi_connect(struct ath10k *ar) |
5e3dd157 KV |
5125 | { |
5126 | int status; | |
5127 | struct ath10k_htc_svc_conn_req conn_req; | |
5128 | struct ath10k_htc_svc_conn_resp conn_resp; | |
5129 | ||
5130 | memset(&conn_req, 0, sizeof(conn_req)); | |
5131 | memset(&conn_resp, 0, sizeof(conn_resp)); | |
5132 | ||
5133 | /* these fields are the same for all service endpoints */ | |
5134 | conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete; | |
5135 | conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx; | |
be8b3943 | 5136 | conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits; |
5e3dd157 KV |
5137 | |
5138 | /* connect to control service */ | |
5139 | conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL; | |
5140 | ||
cd003fad | 5141 | status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp); |
5e3dd157 | 5142 | if (status) { |
7aa7a72a | 5143 | ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n", |
5e3dd157 KV |
5144 | status); |
5145 | return status; | |
5146 | } | |
5147 | ||
5148 | ar->wmi.eid = conn_resp.eid; | |
5149 | return 0; | |
5150 | } | |
5151 | ||
d7579d12 MK |
5152 | static struct sk_buff * |
5153 | ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g, | |
5154 | u16 ctl2g, u16 ctl5g, | |
5155 | enum wmi_dfs_region dfs_reg) | |
5e3dd157 KV |
5156 | { |
5157 | struct wmi_pdev_set_regdomain_cmd *cmd; | |
5158 | struct sk_buff *skb; | |
5159 | ||
7aa7a72a | 5160 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5161 | if (!skb) |
d7579d12 | 5162 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5163 | |
5164 | cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; | |
5165 | cmd->reg_domain = __cpu_to_le32(rd); | |
5166 | cmd->reg_domain_2G = __cpu_to_le32(rd2g); | |
5167 | cmd->reg_domain_5G = __cpu_to_le32(rd5g); | |
5168 | cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); | |
5169 | cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); | |
5170 | ||
7aa7a72a | 5171 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5172 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n", |
5173 | rd, rd2g, rd5g, ctl2g, ctl5g); | |
d7579d12 | 5174 | return skb; |
5e3dd157 KV |
5175 | } |
5176 | ||
d7579d12 MK |
5177 | static struct sk_buff * |
5178 | ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 | |
5179 | rd5g, u16 ctl2g, u16 ctl5g, | |
5180 | enum wmi_dfs_region dfs_reg) | |
821af6ae MP |
5181 | { |
5182 | struct wmi_pdev_set_regdomain_cmd_10x *cmd; | |
5183 | struct sk_buff *skb; | |
5184 | ||
7aa7a72a | 5185 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
821af6ae | 5186 | if (!skb) |
d7579d12 | 5187 | return ERR_PTR(-ENOMEM); |
821af6ae MP |
5188 | |
5189 | cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data; | |
5190 | cmd->reg_domain = __cpu_to_le32(rd); | |
5191 | cmd->reg_domain_2G = __cpu_to_le32(rd2g); | |
5192 | cmd->reg_domain_5G = __cpu_to_le32(rd5g); | |
5193 | cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); | |
5194 | cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); | |
5195 | cmd->dfs_domain = __cpu_to_le32(dfs_reg); | |
5196 | ||
7aa7a72a | 5197 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
821af6ae MP |
5198 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n", |
5199 | rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg); | |
d7579d12 | 5200 | return skb; |
821af6ae MP |
5201 | } |
5202 | ||
d7579d12 MK |
5203 | static struct sk_buff * |
5204 | ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt) | |
5e3dd157 KV |
5205 | { |
5206 | struct wmi_pdev_suspend_cmd *cmd; | |
5207 | struct sk_buff *skb; | |
5208 | ||
7aa7a72a | 5209 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5210 | if (!skb) |
d7579d12 | 5211 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5212 | |
5213 | cmd = (struct wmi_pdev_suspend_cmd *)skb->data; | |
00f5482b | 5214 | cmd->suspend_opt = __cpu_to_le32(suspend_opt); |
5e3dd157 | 5215 | |
d7579d12 | 5216 | return skb; |
5e3dd157 KV |
5217 | } |
5218 | ||
d7579d12 MK |
5219 | static struct sk_buff * |
5220 | ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar) | |
5e3dd157 KV |
5221 | { |
5222 | struct sk_buff *skb; | |
5223 | ||
7aa7a72a | 5224 | skb = ath10k_wmi_alloc_skb(ar, 0); |
d7579d12 MK |
5225 | if (!skb) |
5226 | return ERR_PTR(-ENOMEM); | |
5e3dd157 | 5227 | |
d7579d12 | 5228 | return skb; |
5e3dd157 KV |
5229 | } |
5230 | ||
d7579d12 MK |
5231 | static struct sk_buff * |
5232 | ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value) | |
5e3dd157 KV |
5233 | { |
5234 | struct wmi_pdev_set_param_cmd *cmd; | |
5235 | struct sk_buff *skb; | |
5236 | ||
226a339b | 5237 | if (id == WMI_PDEV_PARAM_UNSUPPORTED) { |
7aa7a72a MK |
5238 | ath10k_warn(ar, "pdev param %d not supported by firmware\n", |
5239 | id); | |
d7579d12 | 5240 | return ERR_PTR(-EOPNOTSUPP); |
226a339b BM |
5241 | } |
5242 | ||
7aa7a72a | 5243 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5244 | if (!skb) |
d7579d12 | 5245 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5246 | |
5247 | cmd = (struct wmi_pdev_set_param_cmd *)skb->data; | |
5248 | cmd->param_id = __cpu_to_le32(id); | |
5249 | cmd->param_value = __cpu_to_le32(value); | |
5250 | ||
7aa7a72a | 5251 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n", |
5e3dd157 | 5252 | id, value); |
d7579d12 | 5253 | return skb; |
5e3dd157 KV |
5254 | } |
5255 | ||
0226d602 MK |
5256 | void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, |
5257 | struct wmi_host_mem_chunks *chunks) | |
cf9fca8f MK |
5258 | { |
5259 | struct host_memory_chunk *chunk; | |
5260 | int i; | |
5261 | ||
5262 | chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks); | |
5263 | ||
5264 | for (i = 0; i < ar->wmi.num_mem_chunks; i++) { | |
5265 | chunk = &chunks->items[i]; | |
5266 | chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr); | |
5267 | chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len); | |
5268 | chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id); | |
5269 | ||
5270 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
5271 | "wmi chunk %d len %d requested, addr 0x%llx\n", | |
5272 | i, | |
5273 | ar->wmi.mem_chunks[i].len, | |
5274 | (unsigned long long)ar->wmi.mem_chunks[i].paddr); | |
5275 | } | |
5276 | } | |
5277 | ||
d7579d12 | 5278 | static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar) |
5e3dd157 KV |
5279 | { |
5280 | struct wmi_init_cmd *cmd; | |
5281 | struct sk_buff *buf; | |
5282 | struct wmi_resource_config config = {}; | |
b3effe61 | 5283 | u32 len, val; |
5e3dd157 KV |
5284 | |
5285 | config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS); | |
cfd1061e | 5286 | config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS); |
5e3dd157 KV |
5287 | config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS); |
5288 | ||
5289 | config.num_offload_reorder_bufs = | |
5290 | __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS); | |
5291 | ||
5292 | config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS); | |
5293 | config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS); | |
5294 | config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT); | |
5295 | config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK); | |
5296 | config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK); | |
5297 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
5298 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
5299 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
5300 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI); | |
ccec9038 | 5301 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
5e3dd157 KV |
5302 | config.scan_max_pending_reqs = |
5303 | __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS); | |
5304 | ||
5305 | config.bmiss_offload_max_vdev = | |
5306 | __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV); | |
5307 | ||
5308 | config.roam_offload_max_vdev = | |
5309 | __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV); | |
5310 | ||
5311 | config.roam_offload_max_ap_profiles = | |
5312 | __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES); | |
5313 | ||
5314 | config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS); | |
5315 | config.num_mcast_table_elems = | |
5316 | __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS); | |
5317 | ||
5318 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE); | |
5319 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE); | |
5320 | config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES); | |
5321 | config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE); | |
5322 | config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM); | |
5323 | ||
5324 | val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; | |
5325 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); | |
5326 | ||
5327 | config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG); | |
5328 | ||
5329 | config.gtk_offload_max_vdev = | |
5330 | __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV); | |
5331 | ||
5332 | config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC); | |
5333 | config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES); | |
5334 | ||
b3effe61 BM |
5335 | len = sizeof(*cmd) + |
5336 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
5337 | ||
7aa7a72a | 5338 | buf = ath10k_wmi_alloc_skb(ar, len); |
5e3dd157 | 5339 | if (!buf) |
d7579d12 | 5340 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5341 | |
5342 | cmd = (struct wmi_init_cmd *)buf->data; | |
b3effe61 | 5343 | |
5e3dd157 | 5344 | memcpy(&cmd->resource_config, &config, sizeof(config)); |
cf9fca8f | 5345 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
5e3dd157 | 5346 | |
7aa7a72a | 5347 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n"); |
d7579d12 | 5348 | return buf; |
5e3dd157 KV |
5349 | } |
5350 | ||
d7579d12 | 5351 | static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar) |
12b2b9e3 BM |
5352 | { |
5353 | struct wmi_init_cmd_10x *cmd; | |
5354 | struct sk_buff *buf; | |
5355 | struct wmi_resource_config_10x config = {}; | |
5356 | u32 len, val; | |
12b2b9e3 | 5357 | |
ec6a73f0 BM |
5358 | config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); |
5359 | config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); | |
5360 | config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); | |
5361 | config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); | |
5362 | config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); | |
5363 | config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); | |
5364 | config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); | |
5365 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
5366 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
5367 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
5368 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); | |
ccec9038 | 5369 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
12b2b9e3 | 5370 | config.scan_max_pending_reqs = |
ec6a73f0 | 5371 | __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); |
12b2b9e3 BM |
5372 | |
5373 | config.bmiss_offload_max_vdev = | |
ec6a73f0 | 5374 | __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); |
12b2b9e3 BM |
5375 | |
5376 | config.roam_offload_max_vdev = | |
ec6a73f0 | 5377 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); |
12b2b9e3 BM |
5378 | |
5379 | config.roam_offload_max_ap_profiles = | |
ec6a73f0 | 5380 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); |
12b2b9e3 | 5381 | |
ec6a73f0 | 5382 | config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); |
12b2b9e3 | 5383 | config.num_mcast_table_elems = |
ec6a73f0 | 5384 | __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); |
12b2b9e3 | 5385 | |
ec6a73f0 BM |
5386 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); |
5387 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); | |
5388 | config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); | |
5389 | config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE); | |
5390 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); | |
12b2b9e3 | 5391 | |
ec6a73f0 | 5392 | val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; |
12b2b9e3 BM |
5393 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); |
5394 | ||
ec6a73f0 | 5395 | config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); |
12b2b9e3 | 5396 | |
ec6a73f0 BM |
5397 | config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); |
5398 | config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); | |
12b2b9e3 BM |
5399 | |
5400 | len = sizeof(*cmd) + | |
5401 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
5402 | ||
7aa7a72a | 5403 | buf = ath10k_wmi_alloc_skb(ar, len); |
12b2b9e3 | 5404 | if (!buf) |
d7579d12 | 5405 | return ERR_PTR(-ENOMEM); |
12b2b9e3 BM |
5406 | |
5407 | cmd = (struct wmi_init_cmd_10x *)buf->data; | |
5408 | ||
12b2b9e3 | 5409 | memcpy(&cmd->resource_config, &config, sizeof(config)); |
cf9fca8f | 5410 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
12b2b9e3 | 5411 | |
7aa7a72a | 5412 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n"); |
d7579d12 | 5413 | return buf; |
12b2b9e3 BM |
5414 | } |
5415 | ||
d7579d12 | 5416 | static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar) |
24c88f78 MK |
5417 | { |
5418 | struct wmi_init_cmd_10_2 *cmd; | |
5419 | struct sk_buff *buf; | |
5420 | struct wmi_resource_config_10x config = {}; | |
b6c8e287 | 5421 | u32 len, val, features; |
24c88f78 MK |
5422 | |
5423 | config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); | |
5424 | config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); | |
5425 | config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); | |
5426 | config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); | |
5427 | config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); | |
5428 | config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); | |
5429 | config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); | |
5430 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
5431 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
5432 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
5433 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); | |
ccec9038 | 5434 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
24c88f78 MK |
5435 | |
5436 | config.scan_max_pending_reqs = | |
5437 | __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); | |
5438 | ||
5439 | config.bmiss_offload_max_vdev = | |
5440 | __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); | |
5441 | ||
5442 | config.roam_offload_max_vdev = | |
5443 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); | |
5444 | ||
5445 | config.roam_offload_max_ap_profiles = | |
5446 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); | |
5447 | ||
5448 | config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); | |
5449 | config.num_mcast_table_elems = | |
5450 | __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); | |
5451 | ||
5452 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); | |
5453 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); | |
5454 | config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); | |
f6603ff2 | 5455 | config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE); |
24c88f78 MK |
5456 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); |
5457 | ||
5458 | val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; | |
5459 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); | |
5460 | ||
5461 | config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); | |
5462 | ||
5463 | config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); | |
5464 | config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); | |
5465 | ||
5466 | len = sizeof(*cmd) + | |
5467 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
5468 | ||
7aa7a72a | 5469 | buf = ath10k_wmi_alloc_skb(ar, len); |
24c88f78 | 5470 | if (!buf) |
d7579d12 | 5471 | return ERR_PTR(-ENOMEM); |
24c88f78 MK |
5472 | |
5473 | cmd = (struct wmi_init_cmd_10_2 *)buf->data; | |
5474 | ||
b6c8e287 | 5475 | features = WMI_10_2_RX_BATCH_MODE; |
de0c789b YL |
5476 | if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map)) |
5477 | features |= WMI_10_2_COEX_GPIO; | |
b6c8e287 SM |
5478 | cmd->resource_config.feature_mask = __cpu_to_le32(features); |
5479 | ||
24c88f78 | 5480 | memcpy(&cmd->resource_config.common, &config, sizeof(config)); |
cf9fca8f | 5481 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
24c88f78 | 5482 | |
7aa7a72a | 5483 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n"); |
d7579d12 | 5484 | return buf; |
5e3dd157 KV |
5485 | } |
5486 | ||
d1e52a8e RM |
5487 | static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar) |
5488 | { | |
5489 | struct wmi_init_cmd_10_4 *cmd; | |
5490 | struct sk_buff *buf; | |
5491 | struct wmi_resource_config_10_4 config = {}; | |
5492 | u32 len; | |
5493 | ||
5494 | config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs); | |
5495 | config.num_peers = __cpu_to_le32(ar->max_num_peers); | |
5496 | config.num_active_peers = __cpu_to_le32(ar->num_active_peers); | |
5497 | config.num_tids = __cpu_to_le32(ar->num_tids); | |
5498 | ||
5499 | config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS); | |
5500 | config.num_offload_reorder_buffs = | |
5501 | __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS); | |
5502 | config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS); | |
5503 | config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT); | |
5504 | config.tx_chain_mask = __cpu_to_le32(TARGET_10_4_TX_CHAIN_MASK); | |
5505 | config.rx_chain_mask = __cpu_to_le32(TARGET_10_4_RX_CHAIN_MASK); | |
5506 | ||
5507 | config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
5508 | config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
5509 | config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
5510 | config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI); | |
5511 | ||
bc27e8cd | 5512 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
d1e52a8e RM |
5513 | config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS); |
5514 | config.bmiss_offload_max_vdev = | |
5515 | __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV); | |
5516 | config.roam_offload_max_vdev = | |
5517 | __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV); | |
5518 | config.roam_offload_max_ap_profiles = | |
5519 | __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES); | |
5520 | config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS); | |
5521 | config.num_mcast_table_elems = | |
5522 | __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS); | |
5523 | ||
5524 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE); | |
5525 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE); | |
5526 | config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES); | |
5527 | config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE); | |
5528 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM); | |
5529 | ||
5530 | config.rx_skip_defrag_timeout_dup_detection_check = | |
5531 | __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK); | |
5532 | ||
5533 | config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG); | |
5534 | config.gtk_offload_max_vdev = | |
5535 | __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV); | |
5536 | config.num_msdu_desc = __cpu_to_le32(TARGET_10_4_NUM_MSDU_DESC); | |
5537 | config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS); | |
5538 | config.max_peer_ext_stats = | |
5539 | __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS); | |
5540 | config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP); | |
5541 | ||
5542 | config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE); | |
5543 | config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE); | |
5544 | config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE); | |
5545 | config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE); | |
5546 | ||
5547 | config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE); | |
5548 | config.tt_support = | |
5549 | __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG); | |
5550 | config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG); | |
5551 | config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG); | |
5552 | config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG); | |
5553 | ||
5554 | len = sizeof(*cmd) + | |
5555 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
5556 | ||
5557 | buf = ath10k_wmi_alloc_skb(ar, len); | |
5558 | if (!buf) | |
5559 | return ERR_PTR(-ENOMEM); | |
5560 | ||
5561 | cmd = (struct wmi_init_cmd_10_4 *)buf->data; | |
5562 | memcpy(&cmd->resource_config, &config, sizeof(config)); | |
5563 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); | |
5564 | ||
5565 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n"); | |
5566 | return buf; | |
5567 | } | |
5568 | ||
0226d602 | 5569 | int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg) |
5e3dd157 | 5570 | { |
a6aa5da3 MK |
5571 | if (arg->ie_len && !arg->ie) |
5572 | return -EINVAL; | |
5573 | if (arg->n_channels && !arg->channels) | |
5574 | return -EINVAL; | |
5575 | if (arg->n_ssids && !arg->ssids) | |
5576 | return -EINVAL; | |
5577 | if (arg->n_bssids && !arg->bssids) | |
5578 | return -EINVAL; | |
5e3dd157 | 5579 | |
a6aa5da3 MK |
5580 | if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN) |
5581 | return -EINVAL; | |
5582 | if (arg->n_channels > ARRAY_SIZE(arg->channels)) | |
5583 | return -EINVAL; | |
5584 | if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID) | |
5585 | return -EINVAL; | |
5586 | if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID) | |
5587 | return -EINVAL; | |
5e3dd157 | 5588 | |
a6aa5da3 MK |
5589 | return 0; |
5590 | } | |
5e3dd157 | 5591 | |
a6aa5da3 MK |
5592 | static size_t |
5593 | ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg) | |
5594 | { | |
5595 | int len = 0; | |
5596 | ||
5597 | if (arg->ie_len) { | |
5e3dd157 KV |
5598 | len += sizeof(struct wmi_ie_data); |
5599 | len += roundup(arg->ie_len, 4); | |
5600 | } | |
5601 | ||
5602 | if (arg->n_channels) { | |
5e3dd157 KV |
5603 | len += sizeof(struct wmi_chan_list); |
5604 | len += sizeof(__le32) * arg->n_channels; | |
5605 | } | |
5606 | ||
5607 | if (arg->n_ssids) { | |
5e3dd157 KV |
5608 | len += sizeof(struct wmi_ssid_list); |
5609 | len += sizeof(struct wmi_ssid) * arg->n_ssids; | |
5610 | } | |
5611 | ||
5612 | if (arg->n_bssids) { | |
5e3dd157 KV |
5613 | len += sizeof(struct wmi_bssid_list); |
5614 | len += sizeof(struct wmi_mac_addr) * arg->n_bssids; | |
5615 | } | |
5616 | ||
5617 | return len; | |
5618 | } | |
5619 | ||
0226d602 MK |
5620 | void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, |
5621 | const struct wmi_start_scan_arg *arg) | |
5e3dd157 | 5622 | { |
5e3dd157 KV |
5623 | u32 scan_id; |
5624 | u32 scan_req_id; | |
5e3dd157 KV |
5625 | |
5626 | scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX; | |
5627 | scan_id |= arg->scan_id; | |
5628 | ||
5629 | scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; | |
5630 | scan_req_id |= arg->scan_req_id; | |
5631 | ||
a6aa5da3 MK |
5632 | cmn->scan_id = __cpu_to_le32(scan_id); |
5633 | cmn->scan_req_id = __cpu_to_le32(scan_req_id); | |
5634 | cmn->vdev_id = __cpu_to_le32(arg->vdev_id); | |
5635 | cmn->scan_priority = __cpu_to_le32(arg->scan_priority); | |
5636 | cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events); | |
5637 | cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active); | |
5638 | cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive); | |
5639 | cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time); | |
5640 | cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time); | |
5641 | cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time); | |
5642 | cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time); | |
5643 | cmn->idle_time = __cpu_to_le32(arg->idle_time); | |
5644 | cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time); | |
5645 | cmn->probe_delay = __cpu_to_le32(arg->probe_delay); | |
5646 | cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags); | |
5647 | } | |
5648 | ||
5649 | static void | |
5650 | ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs, | |
5651 | const struct wmi_start_scan_arg *arg) | |
5652 | { | |
5653 | struct wmi_ie_data *ie; | |
5654 | struct wmi_chan_list *channels; | |
5655 | struct wmi_ssid_list *ssids; | |
5656 | struct wmi_bssid_list *bssids; | |
5657 | void *ptr = tlvs->tlvs; | |
5658 | int i; | |
5e3dd157 KV |
5659 | |
5660 | if (arg->n_channels) { | |
a6aa5da3 | 5661 | channels = ptr; |
5e3dd157 KV |
5662 | channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG); |
5663 | channels->num_chan = __cpu_to_le32(arg->n_channels); | |
5664 | ||
5665 | for (i = 0; i < arg->n_channels; i++) | |
24c88f78 MK |
5666 | channels->channel_list[i].freq = |
5667 | __cpu_to_le16(arg->channels[i]); | |
5e3dd157 | 5668 | |
a6aa5da3 MK |
5669 | ptr += sizeof(*channels); |
5670 | ptr += sizeof(__le32) * arg->n_channels; | |
5e3dd157 KV |
5671 | } |
5672 | ||
5673 | if (arg->n_ssids) { | |
a6aa5da3 | 5674 | ssids = ptr; |
5e3dd157 KV |
5675 | ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG); |
5676 | ssids->num_ssids = __cpu_to_le32(arg->n_ssids); | |
5677 | ||
5678 | for (i = 0; i < arg->n_ssids; i++) { | |
5679 | ssids->ssids[i].ssid_len = | |
5680 | __cpu_to_le32(arg->ssids[i].len); | |
5681 | memcpy(&ssids->ssids[i].ssid, | |
5682 | arg->ssids[i].ssid, | |
5683 | arg->ssids[i].len); | |
5684 | } | |
5685 | ||
a6aa5da3 MK |
5686 | ptr += sizeof(*ssids); |
5687 | ptr += sizeof(struct wmi_ssid) * arg->n_ssids; | |
5e3dd157 KV |
5688 | } |
5689 | ||
5690 | if (arg->n_bssids) { | |
a6aa5da3 | 5691 | bssids = ptr; |
5e3dd157 KV |
5692 | bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG); |
5693 | bssids->num_bssid = __cpu_to_le32(arg->n_bssids); | |
5694 | ||
5695 | for (i = 0; i < arg->n_bssids; i++) | |
5696 | memcpy(&bssids->bssid_list[i], | |
5697 | arg->bssids[i].bssid, | |
5698 | ETH_ALEN); | |
5699 | ||
a6aa5da3 MK |
5700 | ptr += sizeof(*bssids); |
5701 | ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids; | |
5e3dd157 KV |
5702 | } |
5703 | ||
5704 | if (arg->ie_len) { | |
a6aa5da3 | 5705 | ie = ptr; |
5e3dd157 KV |
5706 | ie->tag = __cpu_to_le32(WMI_IE_TAG); |
5707 | ie->ie_len = __cpu_to_le32(arg->ie_len); | |
5708 | memcpy(ie->ie_data, arg->ie, arg->ie_len); | |
5709 | ||
a6aa5da3 MK |
5710 | ptr += sizeof(*ie); |
5711 | ptr += roundup(arg->ie_len, 4); | |
5e3dd157 | 5712 | } |
a6aa5da3 | 5713 | } |
5e3dd157 | 5714 | |
d7579d12 MK |
5715 | static struct sk_buff * |
5716 | ath10k_wmi_op_gen_start_scan(struct ath10k *ar, | |
5717 | const struct wmi_start_scan_arg *arg) | |
a6aa5da3 | 5718 | { |
d7579d12 | 5719 | struct wmi_start_scan_cmd *cmd; |
a6aa5da3 MK |
5720 | struct sk_buff *skb; |
5721 | size_t len; | |
5722 | int ret; | |
5723 | ||
5724 | ret = ath10k_wmi_start_scan_verify(arg); | |
5725 | if (ret) | |
d7579d12 | 5726 | return ERR_PTR(ret); |
a6aa5da3 | 5727 | |
d7579d12 | 5728 | len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); |
a6aa5da3 MK |
5729 | skb = ath10k_wmi_alloc_skb(ar, len); |
5730 | if (!skb) | |
d7579d12 | 5731 | return ERR_PTR(-ENOMEM); |
a6aa5da3 | 5732 | |
d7579d12 | 5733 | cmd = (struct wmi_start_scan_cmd *)skb->data; |
a6aa5da3 | 5734 | |
d7579d12 MK |
5735 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); |
5736 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | |
a6aa5da3 | 5737 | |
d7579d12 | 5738 | cmd->burst_duration_ms = __cpu_to_le32(0); |
5e3dd157 | 5739 | |
7aa7a72a | 5740 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n"); |
d7579d12 MK |
5741 | return skb; |
5742 | } | |
5743 | ||
5744 | static struct sk_buff * | |
5745 | ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar, | |
5746 | const struct wmi_start_scan_arg *arg) | |
5747 | { | |
5748 | struct wmi_10x_start_scan_cmd *cmd; | |
5749 | struct sk_buff *skb; | |
5750 | size_t len; | |
5751 | int ret; | |
5752 | ||
5753 | ret = ath10k_wmi_start_scan_verify(arg); | |
5754 | if (ret) | |
5755 | return ERR_PTR(ret); | |
5756 | ||
5757 | len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); | |
5758 | skb = ath10k_wmi_alloc_skb(ar, len); | |
5759 | if (!skb) | |
5760 | return ERR_PTR(-ENOMEM); | |
5761 | ||
5762 | cmd = (struct wmi_10x_start_scan_cmd *)skb->data; | |
5763 | ||
5764 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); | |
5765 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | |
5766 | ||
5767 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n"); | |
5768 | return skb; | |
5e3dd157 KV |
5769 | } |
5770 | ||
5771 | void ath10k_wmi_start_scan_init(struct ath10k *ar, | |
5772 | struct wmi_start_scan_arg *arg) | |
5773 | { | |
5774 | /* setup commonly used values */ | |
5775 | arg->scan_req_id = 1; | |
5776 | arg->scan_priority = WMI_SCAN_PRIORITY_LOW; | |
5777 | arg->dwell_time_active = 50; | |
5778 | arg->dwell_time_passive = 150; | |
5779 | arg->min_rest_time = 50; | |
5780 | arg->max_rest_time = 500; | |
5781 | arg->repeat_probe_time = 0; | |
5782 | arg->probe_spacing_time = 0; | |
5783 | arg->idle_time = 0; | |
c322892f | 5784 | arg->max_scan_time = 20000; |
5e3dd157 KV |
5785 | arg->probe_delay = 5; |
5786 | arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | |
5787 | | WMI_SCAN_EVENT_COMPLETED | |
5788 | | WMI_SCAN_EVENT_BSS_CHANNEL | |
5789 | | WMI_SCAN_EVENT_FOREIGN_CHANNEL | |
5790 | | WMI_SCAN_EVENT_DEQUEUED; | |
5e3dd157 KV |
5791 | arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT; |
5792 | arg->n_bssids = 1; | |
5793 | arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF"; | |
5794 | } | |
5795 | ||
d7579d12 MK |
5796 | static struct sk_buff * |
5797 | ath10k_wmi_op_gen_stop_scan(struct ath10k *ar, | |
5798 | const struct wmi_stop_scan_arg *arg) | |
5e3dd157 KV |
5799 | { |
5800 | struct wmi_stop_scan_cmd *cmd; | |
5801 | struct sk_buff *skb; | |
5802 | u32 scan_id; | |
5803 | u32 req_id; | |
5804 | ||
5805 | if (arg->req_id > 0xFFF) | |
d7579d12 | 5806 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5807 | if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF) |
d7579d12 | 5808 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5809 | |
7aa7a72a | 5810 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5811 | if (!skb) |
d7579d12 | 5812 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5813 | |
5814 | scan_id = arg->u.scan_id; | |
5815 | scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX; | |
5816 | ||
5817 | req_id = arg->req_id; | |
5818 | req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; | |
5819 | ||
5820 | cmd = (struct wmi_stop_scan_cmd *)skb->data; | |
5821 | cmd->req_type = __cpu_to_le32(arg->req_type); | |
5822 | cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id); | |
5823 | cmd->scan_id = __cpu_to_le32(scan_id); | |
5824 | cmd->scan_req_id = __cpu_to_le32(req_id); | |
5825 | ||
7aa7a72a | 5826 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5827 | "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n", |
5828 | arg->req_id, arg->req_type, arg->u.scan_id); | |
d7579d12 | 5829 | return skb; |
5e3dd157 KV |
5830 | } |
5831 | ||
d7579d12 MK |
5832 | static struct sk_buff * |
5833 | ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id, | |
5834 | enum wmi_vdev_type type, | |
5835 | enum wmi_vdev_subtype subtype, | |
5836 | const u8 macaddr[ETH_ALEN]) | |
5e3dd157 KV |
5837 | { |
5838 | struct wmi_vdev_create_cmd *cmd; | |
5839 | struct sk_buff *skb; | |
5840 | ||
7aa7a72a | 5841 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5842 | if (!skb) |
d7579d12 | 5843 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5844 | |
5845 | cmd = (struct wmi_vdev_create_cmd *)skb->data; | |
5846 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5847 | cmd->vdev_type = __cpu_to_le32(type); | |
5848 | cmd->vdev_subtype = __cpu_to_le32(subtype); | |
b25f32cb | 5849 | ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); |
5e3dd157 | 5850 | |
7aa7a72a | 5851 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5852 | "WMI vdev create: id %d type %d subtype %d macaddr %pM\n", |
5853 | vdev_id, type, subtype, macaddr); | |
d7579d12 | 5854 | return skb; |
5e3dd157 KV |
5855 | } |
5856 | ||
d7579d12 MK |
5857 | static struct sk_buff * |
5858 | ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id) | |
5e3dd157 KV |
5859 | { |
5860 | struct wmi_vdev_delete_cmd *cmd; | |
5861 | struct sk_buff *skb; | |
5862 | ||
7aa7a72a | 5863 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5864 | if (!skb) |
d7579d12 | 5865 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5866 | |
5867 | cmd = (struct wmi_vdev_delete_cmd *)skb->data; | |
5868 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5869 | ||
7aa7a72a | 5870 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 | 5871 | "WMI vdev delete id %d\n", vdev_id); |
d7579d12 | 5872 | return skb; |
5e3dd157 KV |
5873 | } |
5874 | ||
d7579d12 MK |
5875 | static struct sk_buff * |
5876 | ath10k_wmi_op_gen_vdev_start(struct ath10k *ar, | |
5877 | const struct wmi_vdev_start_request_arg *arg, | |
5878 | bool restart) | |
5e3dd157 KV |
5879 | { |
5880 | struct wmi_vdev_start_request_cmd *cmd; | |
5881 | struct sk_buff *skb; | |
5882 | const char *cmdname; | |
5883 | u32 flags = 0; | |
5884 | ||
5e3dd157 | 5885 | if (WARN_ON(arg->hidden_ssid && !arg->ssid)) |
d7579d12 | 5886 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5887 | if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) |
d7579d12 | 5888 | return ERR_PTR(-EINVAL); |
5e3dd157 | 5889 | |
d7579d12 | 5890 | if (restart) |
5e3dd157 KV |
5891 | cmdname = "restart"; |
5892 | else | |
d7579d12 | 5893 | cmdname = "start"; |
5e3dd157 | 5894 | |
7aa7a72a | 5895 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5896 | if (!skb) |
d7579d12 | 5897 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5898 | |
5899 | if (arg->hidden_ssid) | |
5900 | flags |= WMI_VDEV_START_HIDDEN_SSID; | |
5901 | if (arg->pmf_enabled) | |
5902 | flags |= WMI_VDEV_START_PMF_ENABLED; | |
5903 | ||
5904 | cmd = (struct wmi_vdev_start_request_cmd *)skb->data; | |
5905 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
5906 | cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack); | |
5907 | cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval); | |
5908 | cmd->dtim_period = __cpu_to_le32(arg->dtim_period); | |
5909 | cmd->flags = __cpu_to_le32(flags); | |
5910 | cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate); | |
5911 | cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power); | |
5912 | ||
5913 | if (arg->ssid) { | |
5914 | cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len); | |
5915 | memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); | |
5916 | } | |
5917 | ||
2d66721c | 5918 | ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel); |
5e3dd157 | 5919 | |
7aa7a72a | 5920 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
8cc7f26c KV |
5921 | "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n", |
5922 | cmdname, arg->vdev_id, | |
e8a50f8b MP |
5923 | flags, arg->channel.freq, arg->channel.mode, |
5924 | cmd->chan.flags, arg->channel.max_power); | |
5e3dd157 | 5925 | |
d7579d12 | 5926 | return skb; |
5e3dd157 KV |
5927 | } |
5928 | ||
d7579d12 MK |
5929 | static struct sk_buff * |
5930 | ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id) | |
5e3dd157 KV |
5931 | { |
5932 | struct wmi_vdev_stop_cmd *cmd; | |
5933 | struct sk_buff *skb; | |
5934 | ||
7aa7a72a | 5935 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5936 | if (!skb) |
d7579d12 | 5937 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5938 | |
5939 | cmd = (struct wmi_vdev_stop_cmd *)skb->data; | |
5940 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5941 | ||
7aa7a72a | 5942 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id); |
d7579d12 | 5943 | return skb; |
5e3dd157 KV |
5944 | } |
5945 | ||
d7579d12 MK |
5946 | static struct sk_buff * |
5947 | ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, | |
5948 | const u8 *bssid) | |
5e3dd157 KV |
5949 | { |
5950 | struct wmi_vdev_up_cmd *cmd; | |
5951 | struct sk_buff *skb; | |
5952 | ||
7aa7a72a | 5953 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5954 | if (!skb) |
d7579d12 | 5955 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5956 | |
5957 | cmd = (struct wmi_vdev_up_cmd *)skb->data; | |
5958 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5959 | cmd->vdev_assoc_id = __cpu_to_le32(aid); | |
b25f32cb | 5960 | ether_addr_copy(cmd->vdev_bssid.addr, bssid); |
5e3dd157 | 5961 | |
7aa7a72a | 5962 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
5963 | "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n", |
5964 | vdev_id, aid, bssid); | |
d7579d12 | 5965 | return skb; |
5e3dd157 KV |
5966 | } |
5967 | ||
d7579d12 MK |
5968 | static struct sk_buff * |
5969 | ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id) | |
5e3dd157 KV |
5970 | { |
5971 | struct wmi_vdev_down_cmd *cmd; | |
5972 | struct sk_buff *skb; | |
5973 | ||
7aa7a72a | 5974 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 5975 | if (!skb) |
d7579d12 | 5976 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
5977 | |
5978 | cmd = (struct wmi_vdev_down_cmd *)skb->data; | |
5979 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
5980 | ||
7aa7a72a | 5981 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 | 5982 | "wmi mgmt vdev down id 0x%x\n", vdev_id); |
d7579d12 | 5983 | return skb; |
5e3dd157 KV |
5984 | } |
5985 | ||
d7579d12 MK |
5986 | static struct sk_buff * |
5987 | ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id, | |
5988 | u32 param_id, u32 param_value) | |
5e3dd157 KV |
5989 | { |
5990 | struct wmi_vdev_set_param_cmd *cmd; | |
5991 | struct sk_buff *skb; | |
5992 | ||
6d1506e7 | 5993 | if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) { |
7aa7a72a | 5994 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
6d1506e7 BM |
5995 | "vdev param %d not supported by firmware\n", |
5996 | param_id); | |
d7579d12 | 5997 | return ERR_PTR(-EOPNOTSUPP); |
6d1506e7 BM |
5998 | } |
5999 | ||
7aa7a72a | 6000 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6001 | if (!skb) |
d7579d12 | 6002 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6003 | |
6004 | cmd = (struct wmi_vdev_set_param_cmd *)skb->data; | |
6005 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6006 | cmd->param_id = __cpu_to_le32(param_id); | |
6007 | cmd->param_value = __cpu_to_le32(param_value); | |
6008 | ||
7aa7a72a | 6009 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
6010 | "wmi vdev id 0x%x set param %d value %d\n", |
6011 | vdev_id, param_id, param_value); | |
d7579d12 | 6012 | return skb; |
5e3dd157 KV |
6013 | } |
6014 | ||
d7579d12 MK |
6015 | static struct sk_buff * |
6016 | ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar, | |
6017 | const struct wmi_vdev_install_key_arg *arg) | |
5e3dd157 KV |
6018 | { |
6019 | struct wmi_vdev_install_key_cmd *cmd; | |
6020 | struct sk_buff *skb; | |
6021 | ||
6022 | if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL) | |
d7579d12 | 6023 | return ERR_PTR(-EINVAL); |
5e3dd157 | 6024 | if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL) |
d7579d12 | 6025 | return ERR_PTR(-EINVAL); |
5e3dd157 | 6026 | |
7aa7a72a | 6027 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len); |
5e3dd157 | 6028 | if (!skb) |
d7579d12 | 6029 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6030 | |
6031 | cmd = (struct wmi_vdev_install_key_cmd *)skb->data; | |
6032 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
6033 | cmd->key_idx = __cpu_to_le32(arg->key_idx); | |
6034 | cmd->key_flags = __cpu_to_le32(arg->key_flags); | |
6035 | cmd->key_cipher = __cpu_to_le32(arg->key_cipher); | |
6036 | cmd->key_len = __cpu_to_le32(arg->key_len); | |
6037 | cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len); | |
6038 | cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len); | |
6039 | ||
6040 | if (arg->macaddr) | |
b25f32cb | 6041 | ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); |
5e3dd157 KV |
6042 | if (arg->key_data) |
6043 | memcpy(cmd->key_data, arg->key_data, arg->key_len); | |
6044 | ||
7aa7a72a | 6045 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
e0c508ab MK |
6046 | "wmi vdev install key idx %d cipher %d len %d\n", |
6047 | arg->key_idx, arg->key_cipher, arg->key_len); | |
d7579d12 | 6048 | return skb; |
5e3dd157 KV |
6049 | } |
6050 | ||
d7579d12 MK |
6051 | static struct sk_buff * |
6052 | ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar, | |
6053 | const struct wmi_vdev_spectral_conf_arg *arg) | |
855aed12 SW |
6054 | { |
6055 | struct wmi_vdev_spectral_conf_cmd *cmd; | |
6056 | struct sk_buff *skb; | |
855aed12 | 6057 | |
7aa7a72a | 6058 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
855aed12 | 6059 | if (!skb) |
d7579d12 | 6060 | return ERR_PTR(-ENOMEM); |
855aed12 SW |
6061 | |
6062 | cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data; | |
6063 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
6064 | cmd->scan_count = __cpu_to_le32(arg->scan_count); | |
6065 | cmd->scan_period = __cpu_to_le32(arg->scan_period); | |
6066 | cmd->scan_priority = __cpu_to_le32(arg->scan_priority); | |
6067 | cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size); | |
6068 | cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena); | |
6069 | cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena); | |
6070 | cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref); | |
6071 | cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay); | |
6072 | cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr); | |
6073 | cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr); | |
6074 | cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode); | |
6075 | cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode); | |
6076 | cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr); | |
6077 | cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format); | |
6078 | cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode); | |
6079 | cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale); | |
6080 | cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj); | |
6081 | cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask); | |
6082 | ||
d7579d12 | 6083 | return skb; |
855aed12 SW |
6084 | } |
6085 | ||
d7579d12 MK |
6086 | static struct sk_buff * |
6087 | ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, | |
6088 | u32 trigger, u32 enable) | |
855aed12 SW |
6089 | { |
6090 | struct wmi_vdev_spectral_enable_cmd *cmd; | |
6091 | struct sk_buff *skb; | |
855aed12 | 6092 | |
7aa7a72a | 6093 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
855aed12 | 6094 | if (!skb) |
d7579d12 | 6095 | return ERR_PTR(-ENOMEM); |
855aed12 SW |
6096 | |
6097 | cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data; | |
6098 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6099 | cmd->trigger_cmd = __cpu_to_le32(trigger); | |
6100 | cmd->enable_cmd = __cpu_to_le32(enable); | |
6101 | ||
d7579d12 | 6102 | return skb; |
855aed12 SW |
6103 | } |
6104 | ||
d7579d12 MK |
6105 | static struct sk_buff * |
6106 | ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id, | |
7390ed34 MP |
6107 | const u8 peer_addr[ETH_ALEN], |
6108 | enum wmi_peer_type peer_type) | |
5e3dd157 KV |
6109 | { |
6110 | struct wmi_peer_create_cmd *cmd; | |
6111 | struct sk_buff *skb; | |
6112 | ||
7aa7a72a | 6113 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6114 | if (!skb) |
d7579d12 | 6115 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6116 | |
6117 | cmd = (struct wmi_peer_create_cmd *)skb->data; | |
6118 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
b25f32cb | 6119 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
5e3dd157 | 6120 | |
7aa7a72a | 6121 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
6122 | "wmi peer create vdev_id %d peer_addr %pM\n", |
6123 | vdev_id, peer_addr); | |
d7579d12 | 6124 | return skb; |
5e3dd157 KV |
6125 | } |
6126 | ||
d7579d12 MK |
6127 | static struct sk_buff * |
6128 | ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id, | |
6129 | const u8 peer_addr[ETH_ALEN]) | |
5e3dd157 KV |
6130 | { |
6131 | struct wmi_peer_delete_cmd *cmd; | |
6132 | struct sk_buff *skb; | |
6133 | ||
7aa7a72a | 6134 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6135 | if (!skb) |
d7579d12 | 6136 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6137 | |
6138 | cmd = (struct wmi_peer_delete_cmd *)skb->data; | |
6139 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
b25f32cb | 6140 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
5e3dd157 | 6141 | |
7aa7a72a | 6142 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
6143 | "wmi peer delete vdev_id %d peer_addr %pM\n", |
6144 | vdev_id, peer_addr); | |
d7579d12 | 6145 | return skb; |
5e3dd157 KV |
6146 | } |
6147 | ||
d7579d12 MK |
6148 | static struct sk_buff * |
6149 | ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id, | |
6150 | const u8 peer_addr[ETH_ALEN], u32 tid_bitmap) | |
5e3dd157 KV |
6151 | { |
6152 | struct wmi_peer_flush_tids_cmd *cmd; | |
6153 | struct sk_buff *skb; | |
6154 | ||
7aa7a72a | 6155 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6156 | if (!skb) |
d7579d12 | 6157 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6158 | |
6159 | cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; | |
6160 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6161 | cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap); | |
b25f32cb | 6162 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
5e3dd157 | 6163 | |
7aa7a72a | 6164 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
6165 | "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n", |
6166 | vdev_id, peer_addr, tid_bitmap); | |
d7579d12 | 6167 | return skb; |
5e3dd157 KV |
6168 | } |
6169 | ||
d7579d12 MK |
6170 | static struct sk_buff * |
6171 | ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id, | |
6172 | const u8 *peer_addr, | |
6173 | enum wmi_peer_param param_id, | |
6174 | u32 param_value) | |
5e3dd157 KV |
6175 | { |
6176 | struct wmi_peer_set_param_cmd *cmd; | |
6177 | struct sk_buff *skb; | |
6178 | ||
7aa7a72a | 6179 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6180 | if (!skb) |
d7579d12 | 6181 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6182 | |
6183 | cmd = (struct wmi_peer_set_param_cmd *)skb->data; | |
6184 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6185 | cmd->param_id = __cpu_to_le32(param_id); | |
6186 | cmd->param_value = __cpu_to_le32(param_value); | |
b25f32cb | 6187 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
5e3dd157 | 6188 | |
7aa7a72a | 6189 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
6190 | "wmi vdev %d peer 0x%pM set param %d value %d\n", |
6191 | vdev_id, peer_addr, param_id, param_value); | |
d7579d12 | 6192 | return skb; |
5e3dd157 KV |
6193 | } |
6194 | ||
d7579d12 MK |
6195 | static struct sk_buff * |
6196 | ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id, | |
6197 | enum wmi_sta_ps_mode psmode) | |
5e3dd157 KV |
6198 | { |
6199 | struct wmi_sta_powersave_mode_cmd *cmd; | |
6200 | struct sk_buff *skb; | |
6201 | ||
7aa7a72a | 6202 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6203 | if (!skb) |
d7579d12 | 6204 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6205 | |
6206 | cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data; | |
6207 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6208 | cmd->sta_ps_mode = __cpu_to_le32(psmode); | |
6209 | ||
7aa7a72a | 6210 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
6211 | "wmi set powersave id 0x%x mode %d\n", |
6212 | vdev_id, psmode); | |
d7579d12 | 6213 | return skb; |
5e3dd157 KV |
6214 | } |
6215 | ||
d7579d12 MK |
6216 | static struct sk_buff * |
6217 | ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id, | |
6218 | enum wmi_sta_powersave_param param_id, | |
6219 | u32 value) | |
5e3dd157 KV |
6220 | { |
6221 | struct wmi_sta_powersave_param_cmd *cmd; | |
6222 | struct sk_buff *skb; | |
6223 | ||
7aa7a72a | 6224 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6225 | if (!skb) |
d7579d12 | 6226 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6227 | |
6228 | cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; | |
6229 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6230 | cmd->param_id = __cpu_to_le32(param_id); | |
6231 | cmd->param_value = __cpu_to_le32(value); | |
6232 | ||
7aa7a72a | 6233 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
6234 | "wmi sta ps param vdev_id 0x%x param %d value %d\n", |
6235 | vdev_id, param_id, value); | |
d7579d12 | 6236 | return skb; |
5e3dd157 KV |
6237 | } |
6238 | ||
d7579d12 MK |
6239 | static struct sk_buff * |
6240 | ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
6241 | enum wmi_ap_ps_peer_param param_id, u32 value) | |
5e3dd157 KV |
6242 | { |
6243 | struct wmi_ap_ps_peer_cmd *cmd; | |
6244 | struct sk_buff *skb; | |
6245 | ||
6246 | if (!mac) | |
d7579d12 | 6247 | return ERR_PTR(-EINVAL); |
5e3dd157 | 6248 | |
7aa7a72a | 6249 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6250 | if (!skb) |
d7579d12 | 6251 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6252 | |
6253 | cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; | |
6254 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6255 | cmd->param_id = __cpu_to_le32(param_id); | |
6256 | cmd->param_value = __cpu_to_le32(value); | |
b25f32cb | 6257 | ether_addr_copy(cmd->peer_macaddr.addr, mac); |
5e3dd157 | 6258 | |
7aa7a72a | 6259 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
5e3dd157 KV |
6260 | "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n", |
6261 | vdev_id, param_id, value, mac); | |
d7579d12 | 6262 | return skb; |
5e3dd157 KV |
6263 | } |
6264 | ||
d7579d12 MK |
6265 | static struct sk_buff * |
6266 | ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar, | |
6267 | const struct wmi_scan_chan_list_arg *arg) | |
5e3dd157 KV |
6268 | { |
6269 | struct wmi_scan_chan_list_cmd *cmd; | |
6270 | struct sk_buff *skb; | |
6271 | struct wmi_channel_arg *ch; | |
6272 | struct wmi_channel *ci; | |
6273 | int len; | |
6274 | int i; | |
6275 | ||
6276 | len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel); | |
6277 | ||
7aa7a72a | 6278 | skb = ath10k_wmi_alloc_skb(ar, len); |
5e3dd157 | 6279 | if (!skb) |
d7579d12 | 6280 | return ERR_PTR(-EINVAL); |
5e3dd157 KV |
6281 | |
6282 | cmd = (struct wmi_scan_chan_list_cmd *)skb->data; | |
6283 | cmd->num_scan_chans = __cpu_to_le32(arg->n_channels); | |
6284 | ||
6285 | for (i = 0; i < arg->n_channels; i++) { | |
5e3dd157 KV |
6286 | ch = &arg->channels[i]; |
6287 | ci = &cmd->chan_info[i]; | |
6288 | ||
2d66721c | 6289 | ath10k_wmi_put_wmi_channel(ci, ch); |
5e3dd157 KV |
6290 | } |
6291 | ||
d7579d12 | 6292 | return skb; |
5e3dd157 KV |
6293 | } |
6294 | ||
24c88f78 MK |
6295 | static void |
6296 | ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf, | |
6297 | const struct wmi_peer_assoc_complete_arg *arg) | |
5e3dd157 | 6298 | { |
24c88f78 | 6299 | struct wmi_common_peer_assoc_complete_cmd *cmd = buf; |
5e3dd157 | 6300 | |
5e3dd157 KV |
6301 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); |
6302 | cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1); | |
6303 | cmd->peer_associd = __cpu_to_le32(arg->peer_aid); | |
6304 | cmd->peer_flags = __cpu_to_le32(arg->peer_flags); | |
6305 | cmd->peer_caps = __cpu_to_le32(arg->peer_caps); | |
6306 | cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval); | |
6307 | cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps); | |
6308 | cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu); | |
6309 | cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density); | |
6310 | cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps); | |
6311 | cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams); | |
6312 | cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps); | |
6313 | cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode); | |
6314 | ||
b25f32cb | 6315 | ether_addr_copy(cmd->peer_macaddr.addr, arg->addr); |
5e3dd157 KV |
6316 | |
6317 | cmd->peer_legacy_rates.num_rates = | |
6318 | __cpu_to_le32(arg->peer_legacy_rates.num_rates); | |
6319 | memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates, | |
6320 | arg->peer_legacy_rates.num_rates); | |
6321 | ||
6322 | cmd->peer_ht_rates.num_rates = | |
6323 | __cpu_to_le32(arg->peer_ht_rates.num_rates); | |
6324 | memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates, | |
6325 | arg->peer_ht_rates.num_rates); | |
6326 | ||
6327 | cmd->peer_vht_rates.rx_max_rate = | |
6328 | __cpu_to_le32(arg->peer_vht_rates.rx_max_rate); | |
6329 | cmd->peer_vht_rates.rx_mcs_set = | |
6330 | __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set); | |
6331 | cmd->peer_vht_rates.tx_max_rate = | |
6332 | __cpu_to_le32(arg->peer_vht_rates.tx_max_rate); | |
6333 | cmd->peer_vht_rates.tx_mcs_set = | |
6334 | __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set); | |
24c88f78 MK |
6335 | } |
6336 | ||
6337 | static void | |
6338 | ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf, | |
6339 | const struct wmi_peer_assoc_complete_arg *arg) | |
6340 | { | |
6341 | struct wmi_main_peer_assoc_complete_cmd *cmd = buf; | |
6342 | ||
6343 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
6344 | memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info)); | |
6345 | } | |
6346 | ||
6347 | static void | |
6348 | ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf, | |
6349 | const struct wmi_peer_assoc_complete_arg *arg) | |
6350 | { | |
6351 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
6352 | } | |
6353 | ||
6354 | static void | |
6355 | ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf, | |
6356 | const struct wmi_peer_assoc_complete_arg *arg) | |
6357 | { | |
6358 | struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf; | |
6359 | int max_mcs, max_nss; | |
6360 | u32 info0; | |
6361 | ||
6362 | /* TODO: Is using max values okay with firmware? */ | |
6363 | max_mcs = 0xf; | |
6364 | max_nss = 0xf; | |
6365 | ||
6366 | info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) | | |
6367 | SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS); | |
6368 | ||
6369 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
6370 | cmd->info0 = __cpu_to_le32(info0); | |
6371 | } | |
6372 | ||
d7579d12 MK |
6373 | static int |
6374 | ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg) | |
24c88f78 | 6375 | { |
24c88f78 MK |
6376 | if (arg->peer_mpdu_density > 16) |
6377 | return -EINVAL; | |
6378 | if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES) | |
6379 | return -EINVAL; | |
6380 | if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES) | |
6381 | return -EINVAL; | |
6382 | ||
d7579d12 MK |
6383 | return 0; |
6384 | } | |
6385 | ||
6386 | static struct sk_buff * | |
6387 | ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar, | |
6388 | const struct wmi_peer_assoc_complete_arg *arg) | |
6389 | { | |
6390 | size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd); | |
6391 | struct sk_buff *skb; | |
6392 | int ret; | |
6393 | ||
6394 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
6395 | if (ret) | |
6396 | return ERR_PTR(ret); | |
24c88f78 | 6397 | |
7aa7a72a | 6398 | skb = ath10k_wmi_alloc_skb(ar, len); |
24c88f78 | 6399 | if (!skb) |
d7579d12 | 6400 | return ERR_PTR(-ENOMEM); |
24c88f78 | 6401 | |
d7579d12 MK |
6402 | ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg); |
6403 | ||
6404 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6405 | "wmi peer assoc vdev %d addr %pM (%s)\n", | |
6406 | arg->vdev_id, arg->addr, | |
6407 | arg->peer_reassoc ? "reassociate" : "new"); | |
6408 | return skb; | |
6409 | } | |
6410 | ||
6411 | static struct sk_buff * | |
6412 | ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar, | |
6413 | const struct wmi_peer_assoc_complete_arg *arg) | |
6414 | { | |
6415 | size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd); | |
6416 | struct sk_buff *skb; | |
6417 | int ret; | |
6418 | ||
6419 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
6420 | if (ret) | |
6421 | return ERR_PTR(ret); | |
6422 | ||
6423 | skb = ath10k_wmi_alloc_skb(ar, len); | |
6424 | if (!skb) | |
6425 | return ERR_PTR(-ENOMEM); | |
6426 | ||
6427 | ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg); | |
6428 | ||
6429 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6430 | "wmi peer assoc vdev %d addr %pM (%s)\n", | |
6431 | arg->vdev_id, arg->addr, | |
6432 | arg->peer_reassoc ? "reassociate" : "new"); | |
6433 | return skb; | |
6434 | } | |
6435 | ||
6436 | static struct sk_buff * | |
6437 | ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar, | |
6438 | const struct wmi_peer_assoc_complete_arg *arg) | |
6439 | { | |
6440 | size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd); | |
6441 | struct sk_buff *skb; | |
6442 | int ret; | |
6443 | ||
6444 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
6445 | if (ret) | |
6446 | return ERR_PTR(ret); | |
6447 | ||
6448 | skb = ath10k_wmi_alloc_skb(ar, len); | |
6449 | if (!skb) | |
6450 | return ERR_PTR(-ENOMEM); | |
6451 | ||
6452 | ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg); | |
5e3dd157 | 6453 | |
7aa7a72a | 6454 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
44d6fa90 CYY |
6455 | "wmi peer assoc vdev %d addr %pM (%s)\n", |
6456 | arg->vdev_id, arg->addr, | |
6457 | arg->peer_reassoc ? "reassociate" : "new"); | |
d7579d12 | 6458 | return skb; |
5e3dd157 KV |
6459 | } |
6460 | ||
a57a6a27 RM |
6461 | static struct sk_buff * |
6462 | ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar) | |
6463 | { | |
6464 | struct sk_buff *skb; | |
6465 | ||
6466 | skb = ath10k_wmi_alloc_skb(ar, 0); | |
6467 | if (!skb) | |
6468 | return ERR_PTR(-ENOMEM); | |
6469 | ||
6470 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n"); | |
6471 | return skb; | |
6472 | } | |
6473 | ||
748afc47 | 6474 | /* This function assumes the beacon is already DMA mapped */ |
d7579d12 | 6475 | static struct sk_buff * |
9ad50182 MK |
6476 | ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn, |
6477 | size_t bcn_len, u32 bcn_paddr, bool dtim_zero, | |
6478 | bool deliver_cab) | |
5e3dd157 | 6479 | { |
748afc47 | 6480 | struct wmi_bcn_tx_ref_cmd *cmd; |
5e3dd157 | 6481 | struct sk_buff *skb; |
748afc47 | 6482 | struct ieee80211_hdr *hdr; |
748afc47 | 6483 | u16 fc; |
5e3dd157 | 6484 | |
7aa7a72a | 6485 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6486 | if (!skb) |
d7579d12 | 6487 | return ERR_PTR(-ENOMEM); |
5e3dd157 | 6488 | |
9ad50182 | 6489 | hdr = (struct ieee80211_hdr *)bcn; |
748afc47 MK |
6490 | fc = le16_to_cpu(hdr->frame_control); |
6491 | ||
6492 | cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data; | |
9ad50182 MK |
6493 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
6494 | cmd->data_len = __cpu_to_le32(bcn_len); | |
6495 | cmd->data_ptr = __cpu_to_le32(bcn_paddr); | |
748afc47 MK |
6496 | cmd->msdu_id = 0; |
6497 | cmd->frame_control = __cpu_to_le32(fc); | |
6498 | cmd->flags = 0; | |
24c88f78 | 6499 | cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA); |
748afc47 | 6500 | |
9ad50182 | 6501 | if (dtim_zero) |
748afc47 MK |
6502 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO); |
6503 | ||
9ad50182 | 6504 | if (deliver_cab) |
748afc47 MK |
6505 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB); |
6506 | ||
d7579d12 | 6507 | return skb; |
5e3dd157 KV |
6508 | } |
6509 | ||
5e752e42 MK |
6510 | void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params, |
6511 | const struct wmi_wmm_params_arg *arg) | |
5e3dd157 KV |
6512 | { |
6513 | params->cwmin = __cpu_to_le32(arg->cwmin); | |
6514 | params->cwmax = __cpu_to_le32(arg->cwmax); | |
6515 | params->aifs = __cpu_to_le32(arg->aifs); | |
6516 | params->txop = __cpu_to_le32(arg->txop); | |
6517 | params->acm = __cpu_to_le32(arg->acm); | |
6518 | params->no_ack = __cpu_to_le32(arg->no_ack); | |
6519 | } | |
6520 | ||
d7579d12 MK |
6521 | static struct sk_buff * |
6522 | ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar, | |
5e752e42 | 6523 | const struct wmi_wmm_params_all_arg *arg) |
5e3dd157 KV |
6524 | { |
6525 | struct wmi_pdev_set_wmm_params *cmd; | |
6526 | struct sk_buff *skb; | |
6527 | ||
7aa7a72a | 6528 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6529 | if (!skb) |
d7579d12 | 6530 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6531 | |
6532 | cmd = (struct wmi_pdev_set_wmm_params *)skb->data; | |
5e752e42 MK |
6533 | ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be); |
6534 | ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk); | |
6535 | ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi); | |
6536 | ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo); | |
5e3dd157 | 6537 | |
7aa7a72a | 6538 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n"); |
d7579d12 | 6539 | return skb; |
5e3dd157 KV |
6540 | } |
6541 | ||
d7579d12 | 6542 | static struct sk_buff * |
de23d3ef | 6543 | ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask) |
5e3dd157 KV |
6544 | { |
6545 | struct wmi_request_stats_cmd *cmd; | |
6546 | struct sk_buff *skb; | |
6547 | ||
7aa7a72a | 6548 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
5e3dd157 | 6549 | if (!skb) |
d7579d12 | 6550 | return ERR_PTR(-ENOMEM); |
5e3dd157 KV |
6551 | |
6552 | cmd = (struct wmi_request_stats_cmd *)skb->data; | |
de23d3ef | 6553 | cmd->stats_id = __cpu_to_le32(stats_mask); |
5e3dd157 | 6554 | |
de23d3ef MK |
6555 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n", |
6556 | stats_mask); | |
d7579d12 | 6557 | return skb; |
5e3dd157 | 6558 | } |
9cfbce75 | 6559 | |
d7579d12 MK |
6560 | static struct sk_buff * |
6561 | ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar, | |
6562 | enum wmi_force_fw_hang_type type, u32 delay_ms) | |
9cfbce75 MK |
6563 | { |
6564 | struct wmi_force_fw_hang_cmd *cmd; | |
6565 | struct sk_buff *skb; | |
6566 | ||
7aa7a72a | 6567 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
9cfbce75 | 6568 | if (!skb) |
d7579d12 | 6569 | return ERR_PTR(-ENOMEM); |
9cfbce75 MK |
6570 | |
6571 | cmd = (struct wmi_force_fw_hang_cmd *)skb->data; | |
6572 | cmd->type = __cpu_to_le32(type); | |
6573 | cmd->delay_ms = __cpu_to_le32(delay_ms); | |
6574 | ||
7aa7a72a | 6575 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n", |
9cfbce75 | 6576 | type, delay_ms); |
d7579d12 | 6577 | return skb; |
9cfbce75 | 6578 | } |
f118a3e5 | 6579 | |
d7579d12 | 6580 | static struct sk_buff * |
467210a6 SJ |
6581 | ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable, |
6582 | u32 log_level) | |
f118a3e5 KV |
6583 | { |
6584 | struct wmi_dbglog_cfg_cmd *cmd; | |
6585 | struct sk_buff *skb; | |
6586 | u32 cfg; | |
6587 | ||
7aa7a72a | 6588 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
f118a3e5 | 6589 | if (!skb) |
d7579d12 | 6590 | return ERR_PTR(-ENOMEM); |
f118a3e5 KV |
6591 | |
6592 | cmd = (struct wmi_dbglog_cfg_cmd *)skb->data; | |
6593 | ||
6594 | if (module_enable) { | |
467210a6 | 6595 | cfg = SM(log_level, |
f118a3e5 KV |
6596 | ATH10K_DBGLOG_CFG_LOG_LVL); |
6597 | } else { | |
6598 | /* set back defaults, all modules with WARN level */ | |
6599 | cfg = SM(ATH10K_DBGLOG_LEVEL_WARN, | |
6600 | ATH10K_DBGLOG_CFG_LOG_LVL); | |
6601 | module_enable = ~0; | |
6602 | } | |
6603 | ||
6604 | cmd->module_enable = __cpu_to_le32(module_enable); | |
6605 | cmd->module_valid = __cpu_to_le32(~0); | |
6606 | cmd->config_enable = __cpu_to_le32(cfg); | |
6607 | cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK); | |
6608 | ||
7aa7a72a | 6609 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
f118a3e5 KV |
6610 | "wmi dbglog cfg modules %08x %08x config %08x %08x\n", |
6611 | __le32_to_cpu(cmd->module_enable), | |
6612 | __le32_to_cpu(cmd->module_valid), | |
6613 | __le32_to_cpu(cmd->config_enable), | |
6614 | __le32_to_cpu(cmd->config_valid)); | |
d7579d12 | 6615 | return skb; |
f118a3e5 | 6616 | } |
b79b9baa | 6617 | |
d7579d12 MK |
6618 | static struct sk_buff * |
6619 | ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap) | |
90174455 RM |
6620 | { |
6621 | struct wmi_pdev_pktlog_enable_cmd *cmd; | |
6622 | struct sk_buff *skb; | |
6623 | ||
6624 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6625 | if (!skb) | |
d7579d12 | 6626 | return ERR_PTR(-ENOMEM); |
90174455 RM |
6627 | |
6628 | ev_bitmap &= ATH10K_PKTLOG_ANY; | |
90174455 RM |
6629 | |
6630 | cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data; | |
6631 | cmd->ev_bitmap = __cpu_to_le32(ev_bitmap); | |
d7579d12 MK |
6632 | |
6633 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n", | |
6634 | ev_bitmap); | |
6635 | return skb; | |
90174455 RM |
6636 | } |
6637 | ||
d7579d12 MK |
6638 | static struct sk_buff * |
6639 | ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar) | |
90174455 RM |
6640 | { |
6641 | struct sk_buff *skb; | |
6642 | ||
6643 | skb = ath10k_wmi_alloc_skb(ar, 0); | |
6644 | if (!skb) | |
d7579d12 | 6645 | return ERR_PTR(-ENOMEM); |
90174455 RM |
6646 | |
6647 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n"); | |
d7579d12 | 6648 | return skb; |
90174455 RM |
6649 | } |
6650 | ||
ffdd738d RM |
6651 | static struct sk_buff * |
6652 | ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period, | |
6653 | u32 duration, u32 next_offset, | |
6654 | u32 enabled) | |
6655 | { | |
6656 | struct wmi_pdev_set_quiet_cmd *cmd; | |
6657 | struct sk_buff *skb; | |
6658 | ||
6659 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6660 | if (!skb) | |
6661 | return ERR_PTR(-ENOMEM); | |
6662 | ||
6663 | cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data; | |
6664 | cmd->period = __cpu_to_le32(period); | |
6665 | cmd->duration = __cpu_to_le32(duration); | |
6666 | cmd->next_start = __cpu_to_le32(next_offset); | |
6667 | cmd->enabled = __cpu_to_le32(enabled); | |
6668 | ||
6669 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6670 | "wmi quiet param: period %u duration %u enabled %d\n", | |
6671 | period, duration, enabled); | |
6672 | return skb; | |
6673 | } | |
6674 | ||
dc8ab278 RM |
6675 | static struct sk_buff * |
6676 | ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id, | |
6677 | const u8 *mac) | |
6678 | { | |
6679 | struct wmi_addba_clear_resp_cmd *cmd; | |
6680 | struct sk_buff *skb; | |
6681 | ||
6682 | if (!mac) | |
6683 | return ERR_PTR(-EINVAL); | |
6684 | ||
6685 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6686 | if (!skb) | |
6687 | return ERR_PTR(-ENOMEM); | |
6688 | ||
6689 | cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; | |
6690 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6691 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
6692 | ||
6693 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6694 | "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", | |
6695 | vdev_id, mac); | |
6696 | return skb; | |
6697 | } | |
6698 | ||
65c0893d RM |
6699 | static struct sk_buff * |
6700 | ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
6701 | u32 tid, u32 buf_size) | |
6702 | { | |
6703 | struct wmi_addba_send_cmd *cmd; | |
6704 | struct sk_buff *skb; | |
6705 | ||
6706 | if (!mac) | |
6707 | return ERR_PTR(-EINVAL); | |
6708 | ||
6709 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6710 | if (!skb) | |
6711 | return ERR_PTR(-ENOMEM); | |
6712 | ||
6713 | cmd = (struct wmi_addba_send_cmd *)skb->data; | |
6714 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6715 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
6716 | cmd->tid = __cpu_to_le32(tid); | |
6717 | cmd->buffersize = __cpu_to_le32(buf_size); | |
6718 | ||
6719 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6720 | "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", | |
6721 | vdev_id, mac, tid, buf_size); | |
6722 | return skb; | |
6723 | } | |
6724 | ||
11597413 RM |
6725 | static struct sk_buff * |
6726 | ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
6727 | u32 tid, u32 status) | |
6728 | { | |
6729 | struct wmi_addba_setresponse_cmd *cmd; | |
6730 | struct sk_buff *skb; | |
6731 | ||
6732 | if (!mac) | |
6733 | return ERR_PTR(-EINVAL); | |
6734 | ||
6735 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6736 | if (!skb) | |
6737 | return ERR_PTR(-ENOMEM); | |
6738 | ||
6739 | cmd = (struct wmi_addba_setresponse_cmd *)skb->data; | |
6740 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6741 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
6742 | cmd->tid = __cpu_to_le32(tid); | |
6743 | cmd->statuscode = __cpu_to_le32(status); | |
6744 | ||
6745 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6746 | "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", | |
6747 | vdev_id, mac, tid, status); | |
6748 | return skb; | |
6749 | } | |
6750 | ||
50abef85 RM |
6751 | static struct sk_buff * |
6752 | ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
6753 | u32 tid, u32 initiator, u32 reason) | |
6754 | { | |
6755 | struct wmi_delba_send_cmd *cmd; | |
6756 | struct sk_buff *skb; | |
6757 | ||
6758 | if (!mac) | |
6759 | return ERR_PTR(-EINVAL); | |
6760 | ||
6761 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6762 | if (!skb) | |
6763 | return ERR_PTR(-ENOMEM); | |
6764 | ||
6765 | cmd = (struct wmi_delba_send_cmd *)skb->data; | |
6766 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
6767 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
6768 | cmd->tid = __cpu_to_le32(tid); | |
6769 | cmd->initiator = __cpu_to_le32(initiator); | |
6770 | cmd->reasoncode = __cpu_to_le32(reason); | |
6771 | ||
6772 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6773 | "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", | |
6774 | vdev_id, mac, tid, initiator, reason); | |
6775 | return skb; | |
6776 | } | |
6777 | ||
29542666 MK |
6778 | static struct sk_buff * |
6779 | ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param) | |
6780 | { | |
6781 | struct wmi_pdev_get_tpc_config_cmd *cmd; | |
6782 | struct sk_buff *skb; | |
6783 | ||
6784 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
6785 | if (!skb) | |
6786 | return ERR_PTR(-ENOMEM); | |
6787 | ||
6788 | cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data; | |
6789 | cmd->param = __cpu_to_le32(param); | |
6790 | ||
6791 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
6792 | "wmi pdev get tcp config param:%d\n", param); | |
6793 | return skb; | |
6794 | } | |
6795 | ||
bc6f9ae6 MP |
6796 | size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head) |
6797 | { | |
6798 | struct ath10k_fw_stats_peer *i; | |
6799 | size_t num = 0; | |
6800 | ||
6801 | list_for_each_entry(i, head, list) | |
6802 | ++num; | |
6803 | ||
6804 | return num; | |
6805 | } | |
6806 | ||
6807 | size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head) | |
6808 | { | |
6809 | struct ath10k_fw_stats_vdev *i; | |
6810 | size_t num = 0; | |
6811 | ||
6812 | list_for_each_entry(i, head, list) | |
6813 | ++num; | |
6814 | ||
6815 | return num; | |
6816 | } | |
6817 | ||
6818 | static void | |
6819 | ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
6820 | char *buf, u32 *length) | |
6821 | { | |
6822 | u32 len = *length; | |
6823 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
6824 | ||
6825 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
6826 | len += scnprintf(buf + len, buf_len - len, "%30s\n", | |
6827 | "ath10k PDEV stats"); | |
6828 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
6829 | "================="); | |
6830 | ||
6831 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6832 | "Channel noise floor", pdev->ch_noise_floor); | |
6833 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6834 | "Channel TX power", pdev->chan_tx_power); | |
6835 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6836 | "TX frame count", pdev->tx_frame_count); | |
6837 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6838 | "RX frame count", pdev->rx_frame_count); | |
6839 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6840 | "RX clear count", pdev->rx_clear_count); | |
6841 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6842 | "Cycle count", pdev->cycle_count); | |
6843 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6844 | "PHY error count", pdev->phy_err_count); | |
6845 | ||
6846 | *length = len; | |
6847 | } | |
6848 | ||
6849 | static void | |
6850 | ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
6851 | char *buf, u32 *length) | |
6852 | { | |
6853 | u32 len = *length; | |
6854 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
6855 | ||
6856 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6857 | "RTS bad count", pdev->rts_bad); | |
6858 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6859 | "RTS good count", pdev->rts_good); | |
6860 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6861 | "FCS bad count", pdev->fcs_bad); | |
6862 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6863 | "No beacon count", pdev->no_beacons); | |
6864 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
6865 | "MIB int count", pdev->mib_int_count); | |
6866 | ||
6867 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
6868 | *length = len; | |
6869 | } | |
6870 | ||
6871 | static void | |
6872 | ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
6873 | char *buf, u32 *length) | |
6874 | { | |
6875 | u32 len = *length; | |
6876 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
6877 | ||
6878 | len += scnprintf(buf + len, buf_len - len, "\n%30s\n", | |
6879 | "ath10k PDEV TX stats"); | |
6880 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
6881 | "================="); | |
6882 | ||
6883 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6884 | "HTT cookies queued", pdev->comp_queued); | |
6885 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6886 | "HTT cookies disp.", pdev->comp_delivered); | |
6887 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6888 | "MSDU queued", pdev->msdu_enqued); | |
6889 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6890 | "MPDU queued", pdev->mpdu_enqued); | |
6891 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6892 | "MSDUs dropped", pdev->wmm_drop); | |
6893 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6894 | "Local enqued", pdev->local_enqued); | |
6895 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6896 | "Local freed", pdev->local_freed); | |
6897 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6898 | "HW queued", pdev->hw_queued); | |
6899 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6900 | "PPDUs reaped", pdev->hw_reaped); | |
6901 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6902 | "Num underruns", pdev->underrun); | |
6903 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6904 | "PPDUs cleaned", pdev->tx_abort); | |
6905 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6906 | "MPDUs requed", pdev->mpdus_requed); | |
6907 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6908 | "Excessive retries", pdev->tx_ko); | |
6909 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6910 | "HW rate", pdev->data_rc); | |
6911 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6912 | "Sched self tiggers", pdev->self_triggers); | |
6913 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6914 | "Dropped due to SW retries", | |
6915 | pdev->sw_retry_failure); | |
6916 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6917 | "Illegal rate phy errors", | |
6918 | pdev->illgl_rate_phy_err); | |
6919 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6920 | "Pdev continuous xretry", pdev->pdev_cont_xretry); | |
6921 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6922 | "TX timeout", pdev->pdev_tx_timeout); | |
6923 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6924 | "PDEV resets", pdev->pdev_resets); | |
6925 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6926 | "PHY underrun", pdev->phy_underrun); | |
6927 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6928 | "MPDU is more than txop limit", pdev->txop_ovf); | |
6929 | *length = len; | |
6930 | } | |
6931 | ||
6932 | static void | |
6933 | ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
6934 | char *buf, u32 *length) | |
6935 | { | |
6936 | u32 len = *length; | |
6937 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
6938 | ||
6939 | len += scnprintf(buf + len, buf_len - len, "\n%30s\n", | |
6940 | "ath10k PDEV RX stats"); | |
6941 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
6942 | "================="); | |
6943 | ||
6944 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6945 | "Mid PPDU route change", | |
6946 | pdev->mid_ppdu_route_change); | |
6947 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6948 | "Tot. number of statuses", pdev->status_rcvd); | |
6949 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6950 | "Extra frags on rings 0", pdev->r0_frags); | |
6951 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6952 | "Extra frags on rings 1", pdev->r1_frags); | |
6953 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6954 | "Extra frags on rings 2", pdev->r2_frags); | |
6955 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6956 | "Extra frags on rings 3", pdev->r3_frags); | |
6957 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6958 | "MSDUs delivered to HTT", pdev->htt_msdus); | |
6959 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6960 | "MPDUs delivered to HTT", pdev->htt_mpdus); | |
6961 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6962 | "MSDUs delivered to stack", pdev->loc_msdus); | |
6963 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6964 | "MPDUs delivered to stack", pdev->loc_mpdus); | |
6965 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6966 | "Oversized AMSUs", pdev->oversize_amsdu); | |
6967 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6968 | "PHY errors", pdev->phy_errs); | |
6969 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6970 | "PHY errors drops", pdev->phy_err_drop); | |
6971 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
6972 | "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs); | |
6973 | *length = len; | |
6974 | } | |
6975 | ||
6976 | static void | |
6977 | ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev, | |
6978 | char *buf, u32 *length) | |
6979 | { | |
6980 | u32 len = *length; | |
6981 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
6982 | int i; | |
6983 | ||
6984 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
6985 | "vdev id", vdev->vdev_id); | |
6986 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
6987 | "beacon snr", vdev->beacon_snr); | |
6988 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
6989 | "data snr", vdev->data_snr); | |
6990 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
6991 | "num rx frames", vdev->num_rx_frames); | |
6992 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
6993 | "num rts fail", vdev->num_rts_fail); | |
6994 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
6995 | "num rts success", vdev->num_rts_success); | |
6996 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
6997 | "num rx err", vdev->num_rx_err); | |
6998 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
6999 | "num rx discard", vdev->num_rx_discard); | |
7000 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
7001 | "num tx not acked", vdev->num_tx_not_acked); | |
7002 | ||
7003 | for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++) | |
7004 | len += scnprintf(buf + len, buf_len - len, | |
7005 | "%25s [%02d] %u\n", | |
7006 | "num tx frames", i, | |
7007 | vdev->num_tx_frames[i]); | |
7008 | ||
7009 | for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++) | |
7010 | len += scnprintf(buf + len, buf_len - len, | |
7011 | "%25s [%02d] %u\n", | |
7012 | "num tx frames retries", i, | |
7013 | vdev->num_tx_frames_retries[i]); | |
7014 | ||
7015 | for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++) | |
7016 | len += scnprintf(buf + len, buf_len - len, | |
7017 | "%25s [%02d] %u\n", | |
7018 | "num tx frames failures", i, | |
7019 | vdev->num_tx_frames_failures[i]); | |
7020 | ||
7021 | for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++) | |
7022 | len += scnprintf(buf + len, buf_len - len, | |
7023 | "%25s [%02d] 0x%08x\n", | |
7024 | "tx rate history", i, | |
7025 | vdev->tx_rate_history[i]); | |
7026 | ||
7027 | for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++) | |
7028 | len += scnprintf(buf + len, buf_len - len, | |
7029 | "%25s [%02d] %u\n", | |
7030 | "beacon rssi history", i, | |
7031 | vdev->beacon_rssi_history[i]); | |
7032 | ||
7033 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
7034 | *length = len; | |
7035 | } | |
7036 | ||
7037 | static void | |
7038 | ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer, | |
7039 | char *buf, u32 *length) | |
7040 | { | |
7041 | u32 len = *length; | |
7042 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
7043 | ||
7044 | len += scnprintf(buf + len, buf_len - len, "%30s %pM\n", | |
7045 | "Peer MAC address", peer->peer_macaddr); | |
7046 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
7047 | "Peer RSSI", peer->peer_rssi); | |
7048 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
7049 | "Peer TX rate", peer->peer_tx_rate); | |
7050 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
7051 | "Peer RX rate", peer->peer_rx_rate); | |
7052 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
7053 | *length = len; | |
7054 | } | |
7055 | ||
7056 | void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar, | |
7057 | struct ath10k_fw_stats *fw_stats, | |
7058 | char *buf) | |
7059 | { | |
7060 | u32 len = 0; | |
7061 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
7062 | const struct ath10k_fw_stats_pdev *pdev; | |
7063 | const struct ath10k_fw_stats_vdev *vdev; | |
7064 | const struct ath10k_fw_stats_peer *peer; | |
7065 | size_t num_peers; | |
7066 | size_t num_vdevs; | |
7067 | ||
7068 | spin_lock_bh(&ar->data_lock); | |
7069 | ||
7070 | pdev = list_first_entry_or_null(&fw_stats->pdevs, | |
7071 | struct ath10k_fw_stats_pdev, list); | |
7072 | if (!pdev) { | |
7073 | ath10k_warn(ar, "failed to get pdev stats\n"); | |
7074 | goto unlock; | |
7075 | } | |
7076 | ||
7077 | num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); | |
7078 | num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); | |
7079 | ||
7080 | ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); | |
7081 | ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); | |
7082 | ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); | |
7083 | ||
7084 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
7085 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
7086 | "ath10k VDEV stats", num_vdevs); | |
7087 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
7088 | "================="); | |
7089 | ||
7090 | list_for_each_entry(vdev, &fw_stats->vdevs, list) { | |
7091 | ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); | |
7092 | } | |
7093 | ||
7094 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
7095 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
7096 | "ath10k PEER stats", num_peers); | |
7097 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
7098 | "================="); | |
7099 | ||
7100 | list_for_each_entry(peer, &fw_stats->peers, list) { | |
7101 | ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); | |
7102 | } | |
7103 | ||
7104 | unlock: | |
7105 | spin_unlock_bh(&ar->data_lock); | |
7106 | ||
7107 | if (len >= buf_len) | |
7108 | buf[len - 1] = 0; | |
7109 | else | |
7110 | buf[len] = 0; | |
7111 | } | |
7112 | ||
7113 | void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar, | |
7114 | struct ath10k_fw_stats *fw_stats, | |
7115 | char *buf) | |
7116 | { | |
7117 | unsigned int len = 0; | |
7118 | unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
7119 | const struct ath10k_fw_stats_pdev *pdev; | |
7120 | const struct ath10k_fw_stats_vdev *vdev; | |
7121 | const struct ath10k_fw_stats_peer *peer; | |
7122 | size_t num_peers; | |
7123 | size_t num_vdevs; | |
7124 | ||
7125 | spin_lock_bh(&ar->data_lock); | |
7126 | ||
7127 | pdev = list_first_entry_or_null(&fw_stats->pdevs, | |
7128 | struct ath10k_fw_stats_pdev, list); | |
7129 | if (!pdev) { | |
7130 | ath10k_warn(ar, "failed to get pdev stats\n"); | |
7131 | goto unlock; | |
7132 | } | |
7133 | ||
7134 | num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); | |
7135 | num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); | |
7136 | ||
7137 | ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); | |
7138 | ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len); | |
7139 | ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); | |
7140 | ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); | |
7141 | ||
7142 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
7143 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
7144 | "ath10k VDEV stats", num_vdevs); | |
7145 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
7146 | "================="); | |
7147 | ||
7148 | list_for_each_entry(vdev, &fw_stats->vdevs, list) { | |
7149 | ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); | |
7150 | } | |
7151 | ||
7152 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
7153 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
7154 | "ath10k PEER stats", num_peers); | |
7155 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
7156 | "================="); | |
7157 | ||
7158 | list_for_each_entry(peer, &fw_stats->peers, list) { | |
7159 | ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); | |
7160 | } | |
7161 | ||
7162 | unlock: | |
7163 | spin_unlock_bh(&ar->data_lock); | |
7164 | ||
7165 | if (len >= buf_len) | |
7166 | buf[len - 1] = 0; | |
7167 | else | |
7168 | buf[len] = 0; | |
7169 | } | |
7170 | ||
62f77f09 M |
7171 | static struct sk_buff * |
7172 | ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable, | |
7173 | u32 detect_level, u32 detect_margin) | |
7174 | { | |
7175 | struct wmi_pdev_set_adaptive_cca_params *cmd; | |
7176 | struct sk_buff *skb; | |
7177 | ||
7178 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
7179 | if (!skb) | |
7180 | return ERR_PTR(-ENOMEM); | |
7181 | ||
7182 | cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data; | |
7183 | cmd->enable = __cpu_to_le32(enable); | |
7184 | cmd->cca_detect_level = __cpu_to_le32(detect_level); | |
7185 | cmd->cca_detect_margin = __cpu_to_le32(detect_margin); | |
7186 | ||
7187 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
7188 | "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n", | |
7189 | enable, detect_level, detect_margin); | |
7190 | return skb; | |
7191 | } | |
7192 | ||
98dd2b92 MP |
7193 | void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar, |
7194 | struct ath10k_fw_stats *fw_stats, | |
7195 | char *buf) | |
7196 | { | |
7197 | u32 len = 0; | |
7198 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
7199 | const struct ath10k_fw_stats_pdev *pdev; | |
7200 | const struct ath10k_fw_stats_vdev *vdev; | |
7201 | const struct ath10k_fw_stats_peer *peer; | |
7202 | size_t num_peers; | |
7203 | size_t num_vdevs; | |
7204 | ||
7205 | spin_lock_bh(&ar->data_lock); | |
7206 | ||
7207 | pdev = list_first_entry_or_null(&fw_stats->pdevs, | |
7208 | struct ath10k_fw_stats_pdev, list); | |
7209 | if (!pdev) { | |
7210 | ath10k_warn(ar, "failed to get pdev stats\n"); | |
7211 | goto unlock; | |
7212 | } | |
7213 | ||
7214 | num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); | |
7215 | num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); | |
7216 | ||
7217 | ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); | |
7218 | ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len); | |
7219 | ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); | |
7220 | ||
7221 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7222 | "HW paused", pdev->hw_paused); | |
7223 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7224 | "Seqs posted", pdev->seq_posted); | |
7225 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7226 | "Seqs failed queueing", pdev->seq_failed_queueing); | |
7227 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7228 | "Seqs completed", pdev->seq_completed); | |
7229 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7230 | "Seqs restarted", pdev->seq_restarted); | |
7231 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7232 | "MU Seqs posted", pdev->mu_seq_posted); | |
7233 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7234 | "MPDUs SW flushed", pdev->mpdus_sw_flush); | |
7235 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7236 | "MPDUs HW filtered", pdev->mpdus_hw_filter); | |
7237 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7238 | "MPDUs truncated", pdev->mpdus_truncated); | |
7239 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7240 | "MPDUs receive no ACK", pdev->mpdus_ack_failed); | |
7241 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7242 | "MPDUs expired", pdev->mpdus_expired); | |
7243 | ||
7244 | ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); | |
7245 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
7246 | "Num Rx Overflow errors", pdev->rx_ovfl_errs); | |
7247 | ||
7248 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
7249 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
7250 | "ath10k VDEV stats", num_vdevs); | |
7251 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
7252 | "================="); | |
7253 | ||
7254 | list_for_each_entry(vdev, &fw_stats->vdevs, list) { | |
7255 | ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); | |
7256 | } | |
7257 | ||
7258 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
7259 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
7260 | "ath10k PEER stats", num_peers); | |
7261 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
7262 | "================="); | |
7263 | ||
7264 | list_for_each_entry(peer, &fw_stats->peers, list) { | |
7265 | ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); | |
7266 | } | |
7267 | ||
7268 | unlock: | |
7269 | spin_unlock_bh(&ar->data_lock); | |
7270 | ||
7271 | if (len >= buf_len) | |
7272 | buf[len - 1] = 0; | |
7273 | else | |
7274 | buf[len] = 0; | |
7275 | } | |
7276 | ||
d7579d12 MK |
7277 | static const struct wmi_ops wmi_ops = { |
7278 | .rx = ath10k_wmi_op_rx, | |
7279 | .map_svc = wmi_main_svc_map, | |
7280 | ||
7281 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
7282 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
7283 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
7284 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
7285 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
7286 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
991adf71 | 7287 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
d7579d12 MK |
7288 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
7289 | .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, | |
7290 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
7291 | .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats, | |
c1a4654a | 7292 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
d7579d12 MK |
7293 | |
7294 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
7295 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
7296 | .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd, | |
7297 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
7298 | .gen_init = ath10k_wmi_op_gen_init, | |
7299 | .gen_start_scan = ath10k_wmi_op_gen_start_scan, | |
7300 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
7301 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
7302 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
7303 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
7304 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
7305 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
7306 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
7307 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
7308 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
7309 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
7310 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
6d492fe2 | 7311 | /* .gen_vdev_wmm_conf not implemented */ |
d7579d12 MK |
7312 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
7313 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
7314 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
7315 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
7316 | .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc, | |
7317 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
7318 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
7319 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
7320 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
7321 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
7322 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
7323 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
7324 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
7325 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
7326 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
7327 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
7328 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
ffdd738d | 7329 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
a57a6a27 | 7330 | /* .gen_pdev_get_temperature not implemented */ |
dc8ab278 | 7331 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
65c0893d | 7332 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
11597413 | 7333 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
50abef85 | 7334 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
bc6f9ae6 | 7335 | .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill, |
be9ce9d8 | 7336 | /* .gen_bcn_tmpl not implemented */ |
4c4955fe | 7337 | /* .gen_prb_tmpl not implemented */ |
369242b4 | 7338 | /* .gen_p2p_go_bcn_ie not implemented */ |
5b272e30 | 7339 | /* .gen_adaptive_qcs not implemented */ |
62f77f09 | 7340 | /* .gen_pdev_enable_adaptive_cca not implemented */ |
d7579d12 MK |
7341 | }; |
7342 | ||
7343 | static const struct wmi_ops wmi_10_1_ops = { | |
7344 | .rx = ath10k_wmi_10_1_op_rx, | |
7345 | .map_svc = wmi_10x_svc_map, | |
7346 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
7347 | .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats, | |
7348 | .gen_init = ath10k_wmi_10_1_op_gen_init, | |
7349 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | |
7350 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
7351 | .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc, | |
a57a6a27 | 7352 | /* .gen_pdev_get_temperature not implemented */ |
d7579d12 MK |
7353 | |
7354 | /* shared with main branch */ | |
7355 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
7356 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
7357 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
7358 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
7359 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
7360 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
991adf71 | 7361 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
d7579d12 MK |
7362 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
7363 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
c1a4654a | 7364 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
d7579d12 MK |
7365 | |
7366 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
7367 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
7368 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
7369 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
7370 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
7371 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
7372 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
7373 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
7374 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
7375 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
7376 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
7377 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
7378 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
7379 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
6d492fe2 | 7380 | /* .gen_vdev_wmm_conf not implemented */ |
d7579d12 MK |
7381 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
7382 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
7383 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
7384 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
7385 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
7386 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
7387 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
7388 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
7389 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
7390 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
7391 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
7392 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
7393 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
7394 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
7395 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
7396 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
ffdd738d | 7397 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
dc8ab278 | 7398 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
65c0893d | 7399 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
11597413 | 7400 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
50abef85 | 7401 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
bc6f9ae6 | 7402 | .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, |
be9ce9d8 | 7403 | /* .gen_bcn_tmpl not implemented */ |
4c4955fe | 7404 | /* .gen_prb_tmpl not implemented */ |
369242b4 | 7405 | /* .gen_p2p_go_bcn_ie not implemented */ |
5b272e30 | 7406 | /* .gen_adaptive_qcs not implemented */ |
62f77f09 | 7407 | /* .gen_pdev_enable_adaptive_cca not implemented */ |
d7579d12 MK |
7408 | }; |
7409 | ||
7410 | static const struct wmi_ops wmi_10_2_ops = { | |
7411 | .rx = ath10k_wmi_10_2_op_rx, | |
20de2229 | 7412 | .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats, |
d7579d12 MK |
7413 | .gen_init = ath10k_wmi_10_2_op_gen_init, |
7414 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | |
a57a6a27 | 7415 | /* .gen_pdev_get_temperature not implemented */ |
d7579d12 MK |
7416 | |
7417 | /* shared with 10.1 */ | |
7418 | .map_svc = wmi_10x_svc_map, | |
7419 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
d7579d12 MK |
7420 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, |
7421 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
7422 | ||
7423 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
7424 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
7425 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
7426 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
7427 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
7428 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
991adf71 | 7429 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
d7579d12 MK |
7430 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
7431 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
c1a4654a | 7432 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
d7579d12 MK |
7433 | |
7434 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
7435 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
7436 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
7437 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
7438 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
7439 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
7440 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
7441 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
7442 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
7443 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
7444 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
7445 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
7446 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
7447 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
6d492fe2 | 7448 | /* .gen_vdev_wmm_conf not implemented */ |
d7579d12 MK |
7449 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
7450 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
7451 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
7452 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
7453 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
7454 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
7455 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
7456 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
7457 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
7458 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
7459 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
7460 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
7461 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
7462 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
7463 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
7464 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
ffdd738d | 7465 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
dc8ab278 | 7466 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
65c0893d | 7467 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
11597413 | 7468 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
50abef85 | 7469 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
bc6f9ae6 | 7470 | .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, |
62f77f09 | 7471 | /* .gen_pdev_enable_adaptive_cca not implemented */ |
d7579d12 MK |
7472 | }; |
7473 | ||
4a16fbec RM |
7474 | static const struct wmi_ops wmi_10_2_4_ops = { |
7475 | .rx = ath10k_wmi_10_2_op_rx, | |
20de2229 | 7476 | .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats, |
4a16fbec RM |
7477 | .gen_init = ath10k_wmi_10_2_op_gen_init, |
7478 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | |
a57a6a27 | 7479 | .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature, |
4a16fbec RM |
7480 | |
7481 | /* shared with 10.1 */ | |
7482 | .map_svc = wmi_10x_svc_map, | |
7483 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
4a16fbec RM |
7484 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, |
7485 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
7486 | ||
7487 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
7488 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
7489 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
7490 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
7491 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
7492 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
991adf71 | 7493 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
4a16fbec RM |
7494 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
7495 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
c1a4654a | 7496 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
4a16fbec RM |
7497 | |
7498 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
7499 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
7500 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
7501 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
7502 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
7503 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
7504 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
7505 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
7506 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
7507 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
7508 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
7509 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
7510 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
7511 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
7512 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, | |
7513 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
7514 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
7515 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
7516 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
7517 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
7518 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
7519 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
7520 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
7521 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
7522 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
7523 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
7524 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
7525 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
7526 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
7527 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
ffdd738d | 7528 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
dc8ab278 | 7529 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
65c0893d | 7530 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
11597413 | 7531 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
50abef85 | 7532 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
29542666 | 7533 | .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config, |
bc6f9ae6 | 7534 | .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, |
62f77f09 M |
7535 | .gen_pdev_enable_adaptive_cca = |
7536 | ath10k_wmi_op_gen_pdev_enable_adaptive_cca, | |
be9ce9d8 | 7537 | /* .gen_bcn_tmpl not implemented */ |
4c4955fe | 7538 | /* .gen_prb_tmpl not implemented */ |
369242b4 | 7539 | /* .gen_p2p_go_bcn_ie not implemented */ |
5b272e30 | 7540 | /* .gen_adaptive_qcs not implemented */ |
4a16fbec RM |
7541 | }; |
7542 | ||
840357cc | 7543 | static const struct wmi_ops wmi_10_4_ops = { |
1c092961 | 7544 | .rx = ath10k_wmi_10_4_op_rx, |
840357cc | 7545 | .map_svc = wmi_10_4_svc_map, |
b2297baa | 7546 | |
98dd2b92 | 7547 | .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats, |
b2297baa | 7548 | .pull_scan = ath10k_wmi_op_pull_scan_ev, |
1c092961 | 7549 | .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev, |
b2297baa | 7550 | .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev, |
373b48cf RM |
7551 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, |
7552 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
3cec3be3 | 7553 | .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev, |
2b0a2e0d RM |
7554 | .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr, |
7555 | .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev, | |
1c092961 | 7556 | .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, |
d02e752f | 7557 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, |
08e75ea8 | 7558 | .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme, |
373b48cf RM |
7559 | |
7560 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
7561 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
7562 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | |
7563 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
d1e52a8e | 7564 | .gen_init = ath10k_wmi_10_4_op_gen_init, |
b2297baa RM |
7565 | .gen_start_scan = ath10k_wmi_op_gen_start_scan, |
7566 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
373b48cf RM |
7567 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, |
7568 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
7569 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
7570 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
7571 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
7572 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
7573 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
7574 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
4535edbd RM |
7575 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, |
7576 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
373b48cf RM |
7577 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
7578 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
7579 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
7580 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
7581 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
7582 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
7583 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
7584 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
7585 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
7586 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
7587 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
7588 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
7589 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
7590 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
7591 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
7592 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, | |
b2887410 VT |
7593 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
7594 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, | |
7595 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, | |
7596 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, | |
98dd2b92 | 7597 | .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill, |
373b48cf RM |
7598 | |
7599 | /* shared with 10.2 */ | |
7600 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | |
98dd2b92 | 7601 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, |
840357cc RM |
7602 | }; |
7603 | ||
b79b9baa MK |
7604 | int ath10k_wmi_attach(struct ath10k *ar) |
7605 | { | |
d7579d12 | 7606 | switch (ar->wmi.op_version) { |
9bd21322 | 7607 | case ATH10K_FW_WMI_OP_VERSION_10_4: |
840357cc | 7608 | ar->wmi.ops = &wmi_10_4_ops; |
2d491e69 | 7609 | ar->wmi.cmd = &wmi_10_4_cmd_map; |
93841a15 | 7610 | ar->wmi.vdev_param = &wmi_10_4_vdev_param_map; |
d86561ff | 7611 | ar->wmi.pdev_param = &wmi_10_4_pdev_param_map; |
3fab30f7 | 7612 | ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; |
9bd21322 | 7613 | break; |
4a16fbec RM |
7614 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: |
7615 | ar->wmi.cmd = &wmi_10_2_4_cmd_map; | |
7616 | ar->wmi.ops = &wmi_10_2_4_ops; | |
7617 | ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map; | |
7618 | ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map; | |
3fab30f7 | 7619 | ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; |
4a16fbec | 7620 | break; |
d7579d12 MK |
7621 | case ATH10K_FW_WMI_OP_VERSION_10_2: |
7622 | ar->wmi.cmd = &wmi_10_2_cmd_map; | |
7623 | ar->wmi.ops = &wmi_10_2_ops; | |
b79b9baa MK |
7624 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; |
7625 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; | |
3fab30f7 | 7626 | ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; |
d7579d12 MK |
7627 | break; |
7628 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
7629 | ar->wmi.cmd = &wmi_10x_cmd_map; | |
7630 | ar->wmi.ops = &wmi_10_1_ops; | |
7631 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; | |
7632 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; | |
3fab30f7 | 7633 | ar->wmi.peer_flags = &wmi_10x_peer_flags_map; |
d7579d12 MK |
7634 | break; |
7635 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
b79b9baa | 7636 | ar->wmi.cmd = &wmi_cmd_map; |
d7579d12 | 7637 | ar->wmi.ops = &wmi_ops; |
b79b9baa MK |
7638 | ar->wmi.vdev_param = &wmi_vdev_param_map; |
7639 | ar->wmi.pdev_param = &wmi_pdev_param_map; | |
3fab30f7 | 7640 | ar->wmi.peer_flags = &wmi_peer_flags_map; |
d7579d12 | 7641 | break; |
ca996ec5 MK |
7642 | case ATH10K_FW_WMI_OP_VERSION_TLV: |
7643 | ath10k_wmi_tlv_attach(ar); | |
7644 | break; | |
d7579d12 MK |
7645 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
7646 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
7647 | ath10k_err(ar, "unsupported WMI op version: %d\n", | |
7648 | ar->wmi.op_version); | |
7649 | return -EINVAL; | |
b79b9baa MK |
7650 | } |
7651 | ||
7652 | init_completion(&ar->wmi.service_ready); | |
7653 | init_completion(&ar->wmi.unified_ready); | |
b79b9baa | 7654 | |
c8ecfc1c RM |
7655 | INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work); |
7656 | ||
b79b9baa MK |
7657 | return 0; |
7658 | } | |
7659 | ||
a925a376 | 7660 | void ath10k_wmi_free_host_mem(struct ath10k *ar) |
b79b9baa MK |
7661 | { |
7662 | int i; | |
7663 | ||
7664 | /* free the host memory chunks requested by firmware */ | |
7665 | for (i = 0; i < ar->wmi.num_mem_chunks; i++) { | |
7666 | dma_free_coherent(ar->dev, | |
7667 | ar->wmi.mem_chunks[i].len, | |
7668 | ar->wmi.mem_chunks[i].vaddr, | |
7669 | ar->wmi.mem_chunks[i].paddr); | |
7670 | } | |
7671 | ||
7672 | ar->wmi.num_mem_chunks = 0; | |
7673 | } | |
a925a376 VT |
7674 | |
7675 | void ath10k_wmi_detach(struct ath10k *ar) | |
7676 | { | |
7677 | cancel_work_sync(&ar->svc_rdy_work); | |
7678 | ||
7679 | if (ar->svc_rdy_skb) | |
7680 | dev_kfree_skb(ar->svc_rdy_skb); | |
7681 | } |