tree-wide: replace config_enabled() with IS_ENABLED()
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
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1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
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20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
ca996ec5 25#include "wmi-tlv.h"
5e3dd157 26#include "mac.h"
43d2a30f 27#include "testmode.h"
d7579d12 28#include "wmi-ops.h"
6a94888f 29#include "p2p.h"
587f7031 30#include "hw.h"
5e3dd157 31
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32/* MAIN WMI cmd track */
33static struct wmi_cmd_map wmi_cmd_map = {
34 .init_cmdid = WMI_INIT_CMDID,
35 .start_scan_cmdid = WMI_START_SCAN_CMDID,
36 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
37 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
38 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
39 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
40 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
41 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
42 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
43 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
44 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
45 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
46 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
47 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
48 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
49 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
50 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
51 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
52 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
53 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
54 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
55 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
56 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
57 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
58 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
59 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
60 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
61 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
62 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
63 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
64 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
65 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
66 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
67 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
68 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
69 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
70 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
71 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
72 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
73 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
74 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
75 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
76 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
77 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
78 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
79 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
80 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
81 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
82 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
83 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
84 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
85 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
86 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
87 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
88 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
89 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
90 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
91 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
92 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
93 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
94 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
95 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
96 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
97 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
98 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
99 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
100 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
101 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
102 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
103 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
104 .wlan_profile_set_hist_intvl_cmdid =
105 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
106 .wlan_profile_get_profile_data_cmdid =
107 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
108 .wlan_profile_enable_profile_id_cmdid =
109 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
110 .wlan_profile_list_profile_id_cmdid =
111 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
112 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
113 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
114 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
115 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
116 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
117 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
118 .wow_enable_disable_wake_event_cmdid =
119 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
120 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
121 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
122 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
123 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
124 .vdev_spectral_scan_configure_cmdid =
125 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
126 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
127 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
128 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
129 .network_list_offload_config_cmdid =
130 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
131 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
132 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
133 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
134 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
135 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
136 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
137 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
138 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
139 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
140 .echo_cmdid = WMI_ECHO_CMDID,
141 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
142 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
143 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
144 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
145 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
146 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
147 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
148 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
149 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
a57a6a27 150 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 151 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
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152 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
153 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
154 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
155 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
156 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
157 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
158 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
159 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
160 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
161 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
162 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
163 .nan_cmdid = WMI_CMD_UNSUPPORTED,
164 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
165 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
166 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
167 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
168 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
169 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
170 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
171 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
172 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
173 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
174 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
175 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
176 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
177 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
178 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
179 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
180 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
181 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
182 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
183 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
184 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
185 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
186 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
187 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
188 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
189 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
190 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
191 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
192 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
193 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
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194};
195
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196/* 10.X WMI cmd track */
197static struct wmi_cmd_map wmi_10x_cmd_map = {
198 .init_cmdid = WMI_10X_INIT_CMDID,
199 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
200 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
201 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 202 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
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203 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
204 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
205 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
206 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
207 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
208 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
209 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
210 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
211 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
212 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
213 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
214 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
215 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
216 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
217 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
218 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
219 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
220 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
221 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
222 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
223 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
224 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
225 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
226 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
227 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
228 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
229 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
230 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
231 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
232 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
233 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
234 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 235 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
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236 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
237 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
238 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 239 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
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240 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
241 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
242 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
243 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
244 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
245 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
246 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
247 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
248 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
249 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
250 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
251 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
252 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
253 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
254 .roam_scan_rssi_change_threshold =
255 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
256 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
257 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
258 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
259 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
260 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
261 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
262 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
263 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 264 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 265 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 266 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
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267 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
268 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
269 .wlan_profile_set_hist_intvl_cmdid =
270 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
271 .wlan_profile_get_profile_data_cmdid =
272 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
273 .wlan_profile_enable_profile_id_cmdid =
274 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
275 .wlan_profile_list_profile_id_cmdid =
276 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
277 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
278 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
279 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
280 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
281 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
282 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
283 .wow_enable_disable_wake_event_cmdid =
284 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
285 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
286 .wow_hostwakeup_from_sleep_cmdid =
287 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
288 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
289 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
290 .vdev_spectral_scan_configure_cmdid =
291 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
292 .vdev_spectral_scan_enable_cmdid =
293 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
294 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
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295 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
296 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
297 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
298 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
299 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
300 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
301 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
302 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
303 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
304 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
305 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
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306 .echo_cmdid = WMI_10X_ECHO_CMDID,
307 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
308 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
309 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
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310 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
311 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
312 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
313 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
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314 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
315 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
a57a6a27 316 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 317 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
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318 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
319 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
320 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
321 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
322 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
323 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
324 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
325 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
326 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
327 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
328 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
329 .nan_cmdid = WMI_CMD_UNSUPPORTED,
330 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
331 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
332 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
333 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
334 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
335 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
336 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
337 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
338 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
339 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
340 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
341 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
342 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
343 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
344 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
345 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
346 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
347 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
348 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
349 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
350 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
351 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
352 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
353 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
354 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
355 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
356 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
357 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
358 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
359 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9 360};
ce42870e 361
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362/* 10.2.4 WMI cmd track */
363static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
364 .init_cmdid = WMI_10_2_INIT_CMDID,
365 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
366 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
367 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
368 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
369 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
370 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
371 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
372 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
373 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
374 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
375 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
376 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
377 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
378 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
379 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
380 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
381 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
382 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
383 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
384 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
385 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
386 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
387 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
388 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
389 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
390 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
391 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
392 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
393 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
394 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
395 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
396 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
397 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
398 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
399 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
400 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
401 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
402 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
403 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
404 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
405 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
406 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
407 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
408 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
409 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
410 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
411 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
412 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
413 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
414 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
415 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
416 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
417 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
418 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
419 .roam_scan_rssi_change_threshold =
420 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
421 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
422 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
423 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
424 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
425 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
426 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
427 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
428 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
429 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
430 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
431 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
432 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
433 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
434 .wlan_profile_set_hist_intvl_cmdid =
435 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
436 .wlan_profile_get_profile_data_cmdid =
437 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
438 .wlan_profile_enable_profile_id_cmdid =
439 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
440 .wlan_profile_list_profile_id_cmdid =
441 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
442 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
443 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
444 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
445 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
446 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
447 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
448 .wow_enable_disable_wake_event_cmdid =
449 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
450 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
451 .wow_hostwakeup_from_sleep_cmdid =
452 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
453 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
454 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
455 .vdev_spectral_scan_configure_cmdid =
456 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
457 .vdev_spectral_scan_enable_cmdid =
458 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
459 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
460 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
461 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
462 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
463 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
464 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
465 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
466 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
467 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
468 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
469 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
470 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
471 .echo_cmdid = WMI_10_2_ECHO_CMDID,
472 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
473 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
474 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
475 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
476 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
477 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
478 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
479 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
480 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
a57a6a27 481 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
62f77f09 482 .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
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483 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
484 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
485 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
486 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
487 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
488 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
489 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
490 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
491 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
492 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
493 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
494 .nan_cmdid = WMI_CMD_UNSUPPORTED,
495 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
496 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
497 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
498 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
499 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
500 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
501 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
502 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
503 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
504 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
505 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
506 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
507 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
508 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
509 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
510 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
511 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
512 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
513 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
514 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
515 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
516 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
517 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
518 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
519 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
520 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
521 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
522 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
523 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
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524 .pdev_bss_chan_info_request_cmdid =
525 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
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526};
527
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528/* 10.4 WMI cmd track */
529static struct wmi_cmd_map wmi_10_4_cmd_map = {
530 .init_cmdid = WMI_10_4_INIT_CMDID,
531 .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
532 .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
533 .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
534 .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
535 .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
536 .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
537 .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
538 .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
539 .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
540 .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
541 .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
542 .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
543 .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
544 .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
545 .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
546 .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
547 .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
548 .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
549 .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
550 .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
551 .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
552 .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
553 .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
554 .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
555 .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
556 .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
557 .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
558 .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
559 .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
560 .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
561 .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
562 .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
563 .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
564 .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
565 .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
566 .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
567 .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
568 .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
569 .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
570 .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
571 .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
572 .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
573 .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
574 .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
575 .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
576 .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
577 .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
578 .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
579 .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
580 .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
581 .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
582 .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
583 .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
584 .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
585 .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
586 .roam_scan_rssi_change_threshold =
587 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
588 .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
589 .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
590 .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
591 .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
592 .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
593 .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
594 .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
595 .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
596 .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
597 .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
598 .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
599 .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
600 .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
601 .wlan_profile_set_hist_intvl_cmdid =
602 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
603 .wlan_profile_get_profile_data_cmdid =
604 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
605 .wlan_profile_enable_profile_id_cmdid =
606 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
607 .wlan_profile_list_profile_id_cmdid =
608 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
609 .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
610 .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
611 .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
612 .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
613 .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
614 .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
615 .wow_enable_disable_wake_event_cmdid =
616 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
617 .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
618 .wow_hostwakeup_from_sleep_cmdid =
619 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
620 .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
621 .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
622 .vdev_spectral_scan_configure_cmdid =
623 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
624 .vdev_spectral_scan_enable_cmdid =
625 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
626 .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
627 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
628 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
629 .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
630 .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
631 .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
632 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
633 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
634 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
635 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
636 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
637 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
638 .echo_cmdid = WMI_10_4_ECHO_CMDID,
639 .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
640 .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
641 .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
642 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
643 .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
644 .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
645 .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
646 .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
647 .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
648 .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
649 .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
650 .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED,
651 .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED,
652 .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
653 .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
654 .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
655 .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
656 .wlan_peer_caching_add_peer_cmdid =
657 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
658 .wlan_peer_caching_evict_peer_cmdid =
659 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
660 .wlan_peer_caching_restore_peer_cmdid =
661 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
662 .wlan_peer_caching_print_all_peers_info_cmdid =
663 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
664 .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
665 .peer_add_proxy_sta_entry_cmdid =
666 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
667 .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
668 .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
669 .nan_cmdid = WMI_10_4_NAN_CMDID,
670 .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
671 .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
672 .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
673 .pdev_smart_ant_set_rx_antenna_cmdid =
674 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
675 .peer_smart_ant_set_tx_antenna_cmdid =
676 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
677 .peer_smart_ant_set_train_info_cmdid =
678 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
679 .peer_smart_ant_set_node_config_ops_cmdid =
680 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
681 .pdev_set_antenna_switch_table_cmdid =
682 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
683 .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
684 .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
685 .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
686 .pdev_ratepwr_chainmsk_table_cmdid =
687 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
688 .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
689 .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
690 .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
691 .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
692 .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
693 .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
694 .pdev_get_ani_ofdm_config_cmdid =
695 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
696 .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
697 .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
698 .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
699 .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
700 .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
701 .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
702 .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
703 .vdev_filter_neighbor_rx_packets_cmdid =
704 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
705 .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
706 .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
707 .pdev_bss_chan_info_request_cmdid =
708 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
47771902 709 .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
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710};
711
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712/* MAIN WMI VDEV param map */
713static struct wmi_vdev_param_map wmi_vdev_param_map = {
714 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
715 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
716 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
717 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
718 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
719 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
720 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
721 .preamble = WMI_VDEV_PARAM_PREAMBLE,
722 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
723 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
724 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
725 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
726 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
727 .wmi_vdev_oc_scheduler_air_time_limit =
728 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
729 .wds = WMI_VDEV_PARAM_WDS,
730 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
731 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
732 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
733 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
734 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
735 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
736 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
737 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
738 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
739 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
740 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
741 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
742 .sgi = WMI_VDEV_PARAM_SGI,
743 .ldpc = WMI_VDEV_PARAM_LDPC,
744 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
745 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
746 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
747 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
748 .nss = WMI_VDEV_PARAM_NSS,
749 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
750 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
751 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
752 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
753 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
754 .ap_keepalive_min_idle_inactive_time_secs =
755 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
756 .ap_keepalive_max_idle_inactive_time_secs =
757 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
758 .ap_keepalive_max_unresponsive_time_secs =
759 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
760 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
761 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
762 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
763 .txbf = WMI_VDEV_PARAM_TXBF,
764 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
765 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
766 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
767 .ap_detect_out_of_sync_sleeping_sta_time_secs =
768 WMI_VDEV_PARAM_UNSUPPORTED,
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769 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
770 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
771 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
772 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
773 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
774 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
775 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
776 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
777 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
778 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
779 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
780 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
781 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
782 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
783 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
784 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 785 .set_tsf = WMI_VDEV_PARAM_UNSUPPORTED,
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786};
787
788/* 10.X WMI VDEV param map */
789static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
790 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
791 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
792 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
793 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
794 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
795 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
796 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
797 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
798 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
799 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
800 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
801 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
802 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
803 .wmi_vdev_oc_scheduler_air_time_limit =
804 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
805 .wds = WMI_10X_VDEV_PARAM_WDS,
806 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
807 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
808 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
809 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
810 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
811 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
812 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
813 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
814 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
815 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
816 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
817 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
818 .sgi = WMI_10X_VDEV_PARAM_SGI,
819 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
820 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
821 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
822 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
823 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
824 .nss = WMI_10X_VDEV_PARAM_NSS,
825 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
826 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
827 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
828 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
829 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
830 .ap_keepalive_min_idle_inactive_time_secs =
831 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
832 .ap_keepalive_max_idle_inactive_time_secs =
833 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
834 .ap_keepalive_max_unresponsive_time_secs =
835 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
836 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
837 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
838 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
839 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
840 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
841 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
842 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
843 .ap_detect_out_of_sync_sleeping_sta_time_secs =
844 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
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845 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
846 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
847 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
848 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
849 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
850 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
851 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
852 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
853 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
854 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
855 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
856 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
857 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
858 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
859 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
860 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 861 .set_tsf = WMI_VDEV_PARAM_UNSUPPORTED,
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862};
863
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864static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
865 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
866 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
867 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
868 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
869 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
870 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
871 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
872 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
873 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
874 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
875 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
876 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
877 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
878 .wmi_vdev_oc_scheduler_air_time_limit =
879 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
880 .wds = WMI_10X_VDEV_PARAM_WDS,
881 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
882 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
883 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
884 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
885 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
886 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
887 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
888 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
889 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
890 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
891 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
892 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
893 .sgi = WMI_10X_VDEV_PARAM_SGI,
894 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
895 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
896 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
897 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
898 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
899 .nss = WMI_10X_VDEV_PARAM_NSS,
900 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
901 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
902 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
903 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
904 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
905 .ap_keepalive_min_idle_inactive_time_secs =
906 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
907 .ap_keepalive_max_idle_inactive_time_secs =
908 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
909 .ap_keepalive_max_unresponsive_time_secs =
910 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
911 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
912 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
913 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
914 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
915 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
916 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
917 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
918 .ap_detect_out_of_sync_sleeping_sta_time_secs =
919 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
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920 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
921 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
922 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
923 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
924 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
925 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
926 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
927 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
928 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
929 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
930 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
931 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
932 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
933 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
934 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
935 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 936 .set_tsf = WMI_10X_VDEV_PARAM_TSF_INCREMENT,
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937};
938
939static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
940 .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
941 .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
942 .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
943 .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
944 .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
945 .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
946 .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
947 .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
948 .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
949 .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
950 .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
951 .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
952 .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
953 .wmi_vdev_oc_scheduler_air_time_limit =
954 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
955 .wds = WMI_10_4_VDEV_PARAM_WDS,
956 .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
957 .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
958 .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
959 .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
960 .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
961 .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
962 .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
963 .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
964 .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
965 .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
966 .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
967 .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
968 .sgi = WMI_10_4_VDEV_PARAM_SGI,
969 .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
970 .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
971 .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
972 .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
973 .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
974 .nss = WMI_10_4_VDEV_PARAM_NSS,
975 .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
976 .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
977 .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
978 .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
979 .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
980 .ap_keepalive_min_idle_inactive_time_secs =
981 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
982 .ap_keepalive_max_idle_inactive_time_secs =
983 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
984 .ap_keepalive_max_unresponsive_time_secs =
985 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
986 .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
987 .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
988 .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
989 .txbf = WMI_10_4_VDEV_PARAM_TXBF,
990 .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
991 .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
992 .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
993 .ap_detect_out_of_sync_sleeping_sta_time_secs =
994 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
995 .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
996 .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
997 .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
998 .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
999 .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
1000 .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
1001 .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1002 .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1003 .early_rx_bmiss_sample_cycle =
1004 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1005 .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1006 .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1007 .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1008 .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
1009 .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
1010 .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
1011 .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
a606c0ee 1012 .set_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
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1013};
1014
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1015static struct wmi_pdev_param_map wmi_pdev_param_map = {
1016 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
1017 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
1018 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
1019 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
1020 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
1021 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
1022 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
1023 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1024 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
1025 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
1026 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1027 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
1028 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
1029 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1030 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
1031 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
1032 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
1033 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
1034 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
1035 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1036 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1037 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
1038 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1039 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
1040 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
1041 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1042 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1043 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1044 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1045 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1046 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1047 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1048 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1049 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
1050 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
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1051 .dcs = WMI_PDEV_PARAM_DCS,
1052 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
1053 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
1054 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
1055 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
1056 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
1057 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
1058 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
1059 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
1060 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
1061 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1062 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
1063 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
a7bd3e99 1064 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
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1065 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1066 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1067 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1068 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1069 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1070 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1071 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1072 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1073 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1074 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1075 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1076 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1077 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1078 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1079 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1080 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1081 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1082 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1083 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1084 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1085 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1086 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1087 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1088 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1089 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1090 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1091 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1092 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1093 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1094 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1095 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1096 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1097 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1098 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1099 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1100 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1101 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1102 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1103 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1104 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1105 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1106 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
39136248 1107 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
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1108};
1109
1110static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
1111 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1112 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1113 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1114 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1115 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1116 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1117 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1118 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1119 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1120 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1121 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1122 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1123 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1124 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1125 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1126 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1127 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1128 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1129 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1130 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1131 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1132 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1133 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1134 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1135 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1136 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1137 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1138 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1139 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1140 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1141 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1142 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1143 .bcnflt_stats_update_period =
1144 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1145 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
ab6258ed 1146 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
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1147 .dcs = WMI_10X_PDEV_PARAM_DCS,
1148 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1149 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1150 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1151 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1152 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1153 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1154 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1155 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1156 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1157 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1158 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1159 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
a7bd3e99 1160 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
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1161 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1162 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1163 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1164 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1165 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1166 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1167 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1168 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1169 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1170 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1171 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1172 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1173 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1174 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1175 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1176 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1177 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1178 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1179 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1180 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1181 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1182 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1183 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1184 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1185 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1186 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1187 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1188 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1189 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1190 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1191 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1192 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1193 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1194 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1195 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1196 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1197 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1198 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1199 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1200 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1201 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1202 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
39136248 1203 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
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1204};
1205
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1206static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
1207 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1208 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1209 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1210 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1211 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1212 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1213 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1214 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1215 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1216 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1217 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1218 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1219 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1220 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1221 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1222 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1223 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1224 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1225 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1226 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1227 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1228 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1229 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1230 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1231 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1232 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1233 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1234 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1235 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1236 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1237 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1238 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1239 .bcnflt_stats_update_period =
1240 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1241 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1242 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1243 .dcs = WMI_10X_PDEV_PARAM_DCS,
1244 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1245 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1246 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1247 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1248 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1249 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1250 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1251 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1252 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1253 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1254 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1255 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1256 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
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1257 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1258 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1259 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1260 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1261 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1262 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1263 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1264 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1265 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1266 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1267 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1268 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1269 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1270 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1271 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1272 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1273 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1274 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1275 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1276 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1277 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1278 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1279 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1280 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1281 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1282 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1283 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1284 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1285 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1286 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1287 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1288 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1289 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1290 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1291 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1292 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1293 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1294 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1295 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1296 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1297 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1298 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
39136248 1299 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
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1300};
1301
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1302/* firmware 10.2 specific mappings */
1303static struct wmi_cmd_map wmi_10_2_cmd_map = {
1304 .init_cmdid = WMI_10_2_INIT_CMDID,
1305 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
1306 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
1307 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
1308 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
1309 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1310 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1311 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
1312 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1313 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1314 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1315 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1316 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1317 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1318 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1319 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1320 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1321 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
1322 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
1323 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
1324 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1325 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
1326 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
1327 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
1328 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
1329 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1330 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
1331 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
1332 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1333 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
1334 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
1335 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1336 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1337 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
1338 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
1339 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
1340 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1341 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
1342 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1343 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
1344 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1345 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1346 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
1347 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
1348 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
1349 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
1350 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1351 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1352 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1353 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1354 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1355 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1356 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
1357 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1358 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
1359 .roam_scan_rssi_change_threshold =
1360 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1361 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
1362 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1363 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1364 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
1365 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1366 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1367 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
1368 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1369 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
1370 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1371 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
1372 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1373 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1374 .wlan_profile_set_hist_intvl_cmdid =
1375 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1376 .wlan_profile_get_profile_data_cmdid =
1377 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1378 .wlan_profile_enable_profile_id_cmdid =
1379 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1380 .wlan_profile_list_profile_id_cmdid =
1381 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1382 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
1383 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
1384 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
1385 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
1386 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1387 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1388 .wow_enable_disable_wake_event_cmdid =
1389 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1390 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
1391 .wow_hostwakeup_from_sleep_cmdid =
1392 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1393 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
1394 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
1395 .vdev_spectral_scan_configure_cmdid =
1396 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1397 .vdev_spectral_scan_enable_cmdid =
1398 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1399 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
1400 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
1401 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
1402 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
1403 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
1404 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
1405 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
1406 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
1407 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
1408 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
1409 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
1410 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
1411 .echo_cmdid = WMI_10_2_ECHO_CMDID,
1412 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
1413 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
1414 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
1415 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
1416 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1417 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1418 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
1419 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
1420 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
a57a6a27 1421 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 1422 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
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1423 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
1424 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
1425 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
1426 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
1427 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
1428 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
1429 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
1430 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
1431 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
1432 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1433 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
1434 .nan_cmdid = WMI_CMD_UNSUPPORTED,
1435 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
1436 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
1437 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
1438 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1439 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1440 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
1441 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
1442 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
1443 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
1444 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
1445 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
1446 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
1447 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
1448 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
1449 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
1450 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1451 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1452 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
1453 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
1454 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
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1455};
1456
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1457static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
1458 .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
1459 .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
1460 .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
1461 .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
1462 .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
1463 .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
1464 .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
1465 .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1466 .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
1467 .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
1468 .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1469 .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
1470 .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
1471 .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1472 .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
1473 .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
1474 .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
1475 .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
1476 .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
1477 .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1478 .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1479 .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
1480 .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1481 .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
1482 .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
1483 .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1484 .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
1485 .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1486 .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1487 .pdev_stats_update_period =
1488 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1489 .vdev_stats_update_period =
1490 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1491 .peer_stats_update_period =
1492 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1493 .bcnflt_stats_update_period =
1494 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1495 .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
1496 .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
1497 .dcs = WMI_10_4_PDEV_PARAM_DCS,
1498 .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
1499 .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
1500 .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
1501 .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
1502 .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
1503 .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
1504 .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
1505 .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
1506 .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
1507 .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
1508 .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
1509 .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
1510 .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
1511 .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
1512 .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
1513 .smart_antenna_default_antenna =
1514 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
1515 .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
1516 .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
1517 .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
1518 .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
1519 .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
1520 .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
1521 .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
1522 .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
1523 .remove_mcast2ucast_buffer =
1524 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
1525 .peer_sta_ps_statechg_enable =
1526 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
1527 .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
1528 .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
1529 .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
1530 .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
1531 .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
1532 .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
1533 .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
1534 .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
1535 .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
1536 .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
1537 .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
1538 .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
1539 .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
1540 .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
1541 .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
1542 .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
1543 .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
1544 .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
1545 .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
1546 .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
1547 .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
1548 .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
1549 .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
1550 .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
1551 .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
1552 .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
1553 .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
1554 .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
1555 .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
39136248 1556 .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
d86561ff
RM
1557};
1558
3fab30f7
T
1559static const struct wmi_peer_flags_map wmi_peer_flags_map = {
1560 .auth = WMI_PEER_AUTH,
1561 .qos = WMI_PEER_QOS,
1562 .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
1563 .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
1564 .apsd = WMI_PEER_APSD,
1565 .ht = WMI_PEER_HT,
1566 .bw40 = WMI_PEER_40MHZ,
1567 .stbc = WMI_PEER_STBC,
1568 .ldbc = WMI_PEER_LDPC,
1569 .dyn_mimops = WMI_PEER_DYN_MIMOPS,
1570 .static_mimops = WMI_PEER_STATIC_MIMOPS,
1571 .spatial_mux = WMI_PEER_SPATIAL_MUX,
1572 .vht = WMI_PEER_VHT,
1573 .bw80 = WMI_PEER_80MHZ,
1574 .vht_2g = WMI_PEER_VHT_2G,
1575 .pmf = WMI_PEER_PMF,
1576};
1577
1578static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
1579 .auth = WMI_10X_PEER_AUTH,
1580 .qos = WMI_10X_PEER_QOS,
1581 .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
1582 .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
1583 .apsd = WMI_10X_PEER_APSD,
1584 .ht = WMI_10X_PEER_HT,
1585 .bw40 = WMI_10X_PEER_40MHZ,
1586 .stbc = WMI_10X_PEER_STBC,
1587 .ldbc = WMI_10X_PEER_LDPC,
1588 .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
1589 .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
1590 .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
1591 .vht = WMI_10X_PEER_VHT,
1592 .bw80 = WMI_10X_PEER_80MHZ,
1593};
1594
1595static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
1596 .auth = WMI_10_2_PEER_AUTH,
1597 .qos = WMI_10_2_PEER_QOS,
1598 .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
1599 .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
1600 .apsd = WMI_10_2_PEER_APSD,
1601 .ht = WMI_10_2_PEER_HT,
1602 .bw40 = WMI_10_2_PEER_40MHZ,
1603 .stbc = WMI_10_2_PEER_STBC,
1604 .ldbc = WMI_10_2_PEER_LDPC,
1605 .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
1606 .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
1607 .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
1608 .vht = WMI_10_2_PEER_VHT,
1609 .bw80 = WMI_10_2_PEER_80MHZ,
1610 .vht_2g = WMI_10_2_PEER_VHT_2G,
1611 .pmf = WMI_10_2_PEER_PMF,
1612};
1613
0226d602
MK
1614void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
1615 const struct wmi_channel_arg *arg)
2d66721c
MK
1616{
1617 u32 flags = 0;
1618
1619 memset(ch, 0, sizeof(*ch));
1620
1621 if (arg->passive)
1622 flags |= WMI_CHAN_FLAG_PASSIVE;
1623 if (arg->allow_ibss)
1624 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
1625 if (arg->allow_ht)
1626 flags |= WMI_CHAN_FLAG_ALLOW_HT;
1627 if (arg->allow_vht)
1628 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
1629 if (arg->ht40plus)
1630 flags |= WMI_CHAN_FLAG_HT40_PLUS;
1631 if (arg->chan_radar)
1632 flags |= WMI_CHAN_FLAG_DFS;
1633
1634 ch->mhz = __cpu_to_le32(arg->freq);
1635 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
1636 ch->band_center_freq2 = 0;
1637 ch->min_power = arg->min_power;
1638 ch->max_power = arg->max_power;
1639 ch->reg_power = arg->max_reg_power;
1640 ch->antenna_max = arg->max_antenna_gain;
513527c8 1641 ch->max_tx_power = arg->max_power;
2d66721c
MK
1642
1643 /* mode & flags share storage */
1644 ch->mode = arg->mode;
1645 ch->flags |= __cpu_to_le32(flags);
1646}
1647
5e3dd157
KV
1648int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
1649{
9eea5689 1650 unsigned long time_left;
af762c0b 1651
9eea5689
NMG
1652 time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
1653 WMI_SERVICE_READY_TIMEOUT_HZ);
1654 if (!time_left)
1655 return -ETIMEDOUT;
1656 return 0;
5e3dd157
KV
1657}
1658
1659int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
1660{
9eea5689 1661 unsigned long time_left;
af762c0b 1662
9eea5689
NMG
1663 time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
1664 WMI_UNIFIED_READY_TIMEOUT_HZ);
1665 if (!time_left)
1666 return -ETIMEDOUT;
1667 return 0;
5e3dd157
KV
1668}
1669
666a73f3 1670struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
5e3dd157
KV
1671{
1672 struct sk_buff *skb;
1673 u32 round_len = roundup(len, 4);
1674
7aa7a72a 1675 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
5e3dd157
KV
1676 if (!skb)
1677 return NULL;
1678
1679 skb_reserve(skb, WMI_SKB_HEADROOM);
1680 if (!IS_ALIGNED((unsigned long)skb->data, 4))
7aa7a72a 1681 ath10k_warn(ar, "Unaligned WMI skb\n");
5e3dd157
KV
1682
1683 skb_put(skb, round_len);
1684 memset(skb->data, 0, round_len);
1685
1686 return skb;
1687}
1688
1689static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
1690{
1691 dev_kfree_skb(skb);
5e3dd157
KV
1692}
1693
d7579d12
MK
1694int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
1695 u32 cmd_id)
5e3dd157
KV
1696{
1697 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
1698 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 1699 int ret;
5e3dd157
KV
1700 u32 cmd = 0;
1701
1702 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
1703 return -ENOMEM;
1704
1705 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
1706
1707 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
1708 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
1709
5e3dd157 1710 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943 1711 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
d35a6c18 1712 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
5e3dd157 1713
be8b3943
MK
1714 if (ret)
1715 goto err_pull;
5e3dd157 1716
be8b3943
MK
1717 return 0;
1718
1719err_pull:
1720 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
1721 return ret;
1722}
1723
ed54388a
MK
1724static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
1725{
af21319f 1726 struct ath10k *ar = arvif->ar;
9ad50182 1727 struct ath10k_skb_cb *cb;
af21319f 1728 struct sk_buff *bcn;
66b8a010
MK
1729 bool dtim_zero;
1730 bool deliver_cab;
ed54388a
MK
1731 int ret;
1732
af21319f 1733 spin_lock_bh(&ar->data_lock);
ed54388a 1734
af21319f 1735 bcn = arvif->beacon;
ed54388a 1736
af21319f
MK
1737 if (!bcn)
1738 goto unlock;
ed54388a 1739
9ad50182 1740 cb = ATH10K_SKB_CB(bcn);
ed54388a 1741
af21319f
MK
1742 switch (arvif->beacon_state) {
1743 case ATH10K_BEACON_SENDING:
1744 case ATH10K_BEACON_SENT:
1745 break;
1746 case ATH10K_BEACON_SCHEDULED:
1747 arvif->beacon_state = ATH10K_BEACON_SENDING;
1748 spin_unlock_bh(&ar->data_lock);
1749
66b8a010
MK
1750 dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
1751 deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
af21319f
MK
1752 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
1753 arvif->vdev_id,
1754 bcn->data, bcn->len,
1755 cb->paddr,
66b8a010
MK
1756 dtim_zero,
1757 deliver_cab);
af21319f
MK
1758
1759 spin_lock_bh(&ar->data_lock);
1760
1761 if (ret == 0)
1762 arvif->beacon_state = ATH10K_BEACON_SENT;
1763 else
1764 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
1765 }
ed54388a 1766
af21319f
MK
1767unlock:
1768 spin_unlock_bh(&ar->data_lock);
ed54388a
MK
1769}
1770
1771static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1772 struct ieee80211_vif *vif)
1773{
1774 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
1775
1776 ath10k_wmi_tx_beacon_nowait(arvif);
1777}
1778
1779static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1780{
ed54388a
MK
1781 ieee80211_iterate_active_interfaces_atomic(ar->hw,
1782 IEEE80211_IFACE_ITER_NORMAL,
1783 ath10k_wmi_tx_beacons_iter,
1784 NULL);
ed54388a
MK
1785}
1786
12acbc43 1787static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 1788{
ed54388a
MK
1789 /* try to send pending beacons first. they take priority */
1790 ath10k_wmi_tx_beacons_nowait(ar);
1791
be8b3943
MK
1792 wake_up(&ar->wmi.tx_credits_wq);
1793}
1794
666a73f3 1795int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
be8b3943 1796{
34957b25 1797 int ret = -EOPNOTSUPP;
be8b3943 1798
56b84287
KV
1799 might_sleep();
1800
34957b25 1801 if (cmd_id == WMI_CMD_UNSUPPORTED) {
7aa7a72a 1802 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
55321559
BM
1803 cmd_id);
1804 return ret;
1805 }
be8b3943
MK
1806
1807 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK
1808 /* try to send pending beacons first. they take priority */
1809 ath10k_wmi_tx_beacons_nowait(ar);
1810
be8b3943 1811 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
7962b0d8
MK
1812
1813 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1814 ret = -ESHUTDOWN;
1815
be8b3943 1816 (ret != -EAGAIN);
14e105cd 1817 }), 3 * HZ);
be8b3943
MK
1818
1819 if (ret)
5e3dd157 1820 dev_kfree_skb_any(skb);
5e3dd157 1821
be8b3943 1822 return ret;
5e3dd157
KV
1823}
1824
d7579d12
MK
1825static struct sk_buff *
1826ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
5e00d31a 1827{
609db229 1828 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
a66cd733 1829 struct ath10k_vif *arvif;
5e00d31a
BM
1830 struct wmi_mgmt_tx_cmd *cmd;
1831 struct ieee80211_hdr *hdr;
d7579d12 1832 struct sk_buff *skb;
5e00d31a 1833 int len;
609db229 1834 u32 vdev_id;
d7579d12 1835 u32 buf_len = msdu->len;
5e00d31a
BM
1836 u16 fc;
1837
d7579d12 1838 hdr = (struct ieee80211_hdr *)msdu->data;
5e00d31a
BM
1839 fc = le16_to_cpu(hdr->frame_control);
1840
a66cd733
BC
1841 if (cb->vif) {
1842 arvif = (void *)cb->vif->drv_priv;
609db229 1843 vdev_id = arvif->vdev_id;
a66cd733 1844 } else {
609db229 1845 vdev_id = 0;
a66cd733 1846 }
609db229 1847
5e00d31a 1848 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
d7579d12 1849 return ERR_PTR(-EINVAL);
5e00d31a 1850
d7579d12 1851 len = sizeof(cmd->hdr) + msdu->len;
eeab266c
MK
1852
1853 if ((ieee80211_is_action(hdr->frame_control) ||
1854 ieee80211_is_deauth(hdr->frame_control) ||
1855 ieee80211_is_disassoc(hdr->frame_control)) &&
1856 ieee80211_has_protected(hdr->frame_control)) {
1857 len += IEEE80211_CCMP_MIC_LEN;
1858 buf_len += IEEE80211_CCMP_MIC_LEN;
1859 }
1860
5e00d31a
BM
1861 len = round_up(len, 4);
1862
d7579d12
MK
1863 skb = ath10k_wmi_alloc_skb(ar, len);
1864 if (!skb)
1865 return ERR_PTR(-ENOMEM);
5e00d31a 1866
d7579d12 1867 cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
5e00d31a 1868
609db229 1869 cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
5e00d31a
BM
1870 cmd->hdr.tx_rate = 0;
1871 cmd->hdr.tx_power = 0;
eeab266c 1872 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
5e00d31a 1873
b25f32cb 1874 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
d7579d12 1875 memcpy(cmd->buf, msdu->data, msdu->len);
5e00d31a 1876
7aa7a72a 1877 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
d7579d12 1878 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
5e00d31a 1879 fc & IEEE80211_FCTL_STYPE);
5ce8e7fd
RM
1880 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
1881 trace_ath10k_tx_payload(ar, skb->data, skb->len);
5e00d31a 1882
d7579d12 1883 return skb;
5e00d31a
BM
1884}
1885
5c81c7fd
MK
1886static void ath10k_wmi_event_scan_started(struct ath10k *ar)
1887{
1888 lockdep_assert_held(&ar->data_lock);
1889
1890 switch (ar->scan.state) {
1891 case ATH10K_SCAN_IDLE:
1892 case ATH10K_SCAN_RUNNING:
1893 case ATH10K_SCAN_ABORTING:
7aa7a72a 1894 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK
1895 ath10k_scan_state_str(ar->scan.state),
1896 ar->scan.state);
1897 break;
1898 case ATH10K_SCAN_STARTING:
1899 ar->scan.state = ATH10K_SCAN_RUNNING;
1900
1901 if (ar->scan.is_roc)
1902 ieee80211_ready_on_channel(ar->hw);
1903
1904 complete(&ar->scan.started);
1905 break;
1906 }
1907}
1908
2f9eec0b
BG
1909static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
1910{
1911 lockdep_assert_held(&ar->data_lock);
1912
1913 switch (ar->scan.state) {
1914 case ATH10K_SCAN_IDLE:
1915 case ATH10K_SCAN_RUNNING:
1916 case ATH10K_SCAN_ABORTING:
1917 ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
1918 ath10k_scan_state_str(ar->scan.state),
1919 ar->scan.state);
1920 break;
1921 case ATH10K_SCAN_STARTING:
1922 complete(&ar->scan.started);
1923 __ath10k_scan_finish(ar);
1924 break;
1925 }
1926}
1927
5c81c7fd
MK
1928static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
1929{
1930 lockdep_assert_held(&ar->data_lock);
1931
1932 switch (ar->scan.state) {
1933 case ATH10K_SCAN_IDLE:
1934 case ATH10K_SCAN_STARTING:
1935 /* One suspected reason scan can be completed while starting is
1936 * if firmware fails to deliver all scan events to the host,
1937 * e.g. when transport pipe is full. This has been observed
1938 * with spectral scan phyerr events starving wmi transport
1939 * pipe. In such case the "scan completed" event should be (and
1940 * is) ignored by the host as it may be just firmware's scan
1941 * state machine recovering.
1942 */
7aa7a72a 1943 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK
1944 ath10k_scan_state_str(ar->scan.state),
1945 ar->scan.state);
1946 break;
1947 case ATH10K_SCAN_RUNNING:
1948 case ATH10K_SCAN_ABORTING:
1949 __ath10k_scan_finish(ar);
1950 break;
1951 }
1952}
1953
1954static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
1955{
1956 lockdep_assert_held(&ar->data_lock);
1957
1958 switch (ar->scan.state) {
1959 case ATH10K_SCAN_IDLE:
1960 case ATH10K_SCAN_STARTING:
7aa7a72a 1961 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK
1962 ath10k_scan_state_str(ar->scan.state),
1963 ar->scan.state);
1964 break;
1965 case ATH10K_SCAN_RUNNING:
1966 case ATH10K_SCAN_ABORTING:
1967 ar->scan_channel = NULL;
1968 break;
1969 }
1970}
1971
1972static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
1973{
1974 lockdep_assert_held(&ar->data_lock);
1975
1976 switch (ar->scan.state) {
1977 case ATH10K_SCAN_IDLE:
1978 case ATH10K_SCAN_STARTING:
7aa7a72a 1979 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK
1980 ath10k_scan_state_str(ar->scan.state),
1981 ar->scan.state);
1982 break;
1983 case ATH10K_SCAN_RUNNING:
1984 case ATH10K_SCAN_ABORTING:
1985 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
1986
1987 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
1988 complete(&ar->scan.on_channel);
1989 break;
1990 }
1991}
1992
9ff8b724
MK
1993static const char *
1994ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
1995 enum wmi_scan_completion_reason reason)
1996{
1997 switch (type) {
1998 case WMI_SCAN_EVENT_STARTED:
1999 return "started";
2000 case WMI_SCAN_EVENT_COMPLETED:
2001 switch (reason) {
2002 case WMI_SCAN_REASON_COMPLETED:
2003 return "completed";
2004 case WMI_SCAN_REASON_CANCELLED:
2005 return "completed [cancelled]";
2006 case WMI_SCAN_REASON_PREEMPTED:
2007 return "completed [preempted]";
2008 case WMI_SCAN_REASON_TIMEDOUT:
2009 return "completed [timedout]";
b2297baa
RM
2010 case WMI_SCAN_REASON_INTERNAL_FAILURE:
2011 return "completed [internal err]";
9ff8b724
MK
2012 case WMI_SCAN_REASON_MAX:
2013 break;
2014 }
2015 return "completed [unknown]";
2016 case WMI_SCAN_EVENT_BSS_CHANNEL:
2017 return "bss channel";
2018 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2019 return "foreign channel";
2020 case WMI_SCAN_EVENT_DEQUEUED:
2021 return "dequeued";
2022 case WMI_SCAN_EVENT_PREEMPTED:
2023 return "preempted";
2024 case WMI_SCAN_EVENT_START_FAILED:
2025 return "start failed";
b2297baa
RM
2026 case WMI_SCAN_EVENT_RESTARTED:
2027 return "restarted";
2028 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2029 return "foreign channel exit";
9ff8b724
MK
2030 default:
2031 return "unknown";
2032 }
2033}
2034
d7579d12
MK
2035static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
2036 struct wmi_scan_ev_arg *arg)
32653cf1
MK
2037{
2038 struct wmi_scan_event *ev = (void *)skb->data;
2039
2040 if (skb->len < sizeof(*ev))
2041 return -EPROTO;
2042
2043 skb_pull(skb, sizeof(*ev));
2044 arg->event_type = ev->event_type;
2045 arg->reason = ev->reason;
2046 arg->channel_freq = ev->channel_freq;
2047 arg->scan_req_id = ev->scan_req_id;
2048 arg->scan_id = ev->scan_id;
2049 arg->vdev_id = ev->vdev_id;
2050
2051 return 0;
2052}
2053
0226d602 2054int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2055{
32653cf1 2056 struct wmi_scan_ev_arg arg = {};
5e3dd157
KV
2057 enum wmi_scan_event_type event_type;
2058 enum wmi_scan_completion_reason reason;
2059 u32 freq;
2060 u32 req_id;
2061 u32 scan_id;
2062 u32 vdev_id;
32653cf1 2063 int ret;
5e3dd157 2064
d7579d12 2065 ret = ath10k_wmi_pull_scan(ar, skb, &arg);
32653cf1
MK
2066 if (ret) {
2067 ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
2068 return ret;
2069 }
2070
2071 event_type = __le32_to_cpu(arg.event_type);
2072 reason = __le32_to_cpu(arg.reason);
2073 freq = __le32_to_cpu(arg.channel_freq);
2074 req_id = __le32_to_cpu(arg.scan_req_id);
2075 scan_id = __le32_to_cpu(arg.scan_id);
2076 vdev_id = __le32_to_cpu(arg.vdev_id);
5e3dd157 2077
5c81c7fd
MK
2078 spin_lock_bh(&ar->data_lock);
2079
7aa7a72a 2080 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c81c7fd 2081 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
9ff8b724 2082 ath10k_wmi_event_scan_type_str(event_type, reason),
5c81c7fd
MK
2083 event_type, reason, freq, req_id, scan_id, vdev_id,
2084 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
5e3dd157
KV
2085
2086 switch (event_type) {
2087 case WMI_SCAN_EVENT_STARTED:
5c81c7fd 2088 ath10k_wmi_event_scan_started(ar);
5e3dd157
KV
2089 break;
2090 case WMI_SCAN_EVENT_COMPLETED:
5c81c7fd 2091 ath10k_wmi_event_scan_completed(ar);
5e3dd157
KV
2092 break;
2093 case WMI_SCAN_EVENT_BSS_CHANNEL:
5c81c7fd 2094 ath10k_wmi_event_scan_bss_chan(ar);
5e3dd157
KV
2095 break;
2096 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
5c81c7fd
MK
2097 ath10k_wmi_event_scan_foreign_chan(ar, freq);
2098 break;
2099 case WMI_SCAN_EVENT_START_FAILED:
7aa7a72a 2100 ath10k_warn(ar, "received scan start failure event\n");
2f9eec0b 2101 ath10k_wmi_event_scan_start_failed(ar);
5e3dd157
KV
2102 break;
2103 case WMI_SCAN_EVENT_DEQUEUED:
5e3dd157 2104 case WMI_SCAN_EVENT_PREEMPTED:
b2297baa
RM
2105 case WMI_SCAN_EVENT_RESTARTED:
2106 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
5e3dd157
KV
2107 default:
2108 break;
2109 }
2110
2111 spin_unlock_bh(&ar->data_lock);
2112 return 0;
2113}
2114
504f6cdf
SM
2115/* If keys are configured, HW decrypts all frames
2116 * with protected bit set. Mark such frames as decrypted.
2117 */
2118static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
2119 struct sk_buff *skb,
2120 struct ieee80211_rx_status *status)
2121{
2122 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2123 unsigned int hdrlen;
2124 bool peer_key;
2125 u8 *addr, keyidx;
2126
2127 if (!ieee80211_is_auth(hdr->frame_control) ||
2128 !ieee80211_has_protected(hdr->frame_control))
2129 return;
2130
2131 hdrlen = ieee80211_hdrlen(hdr->frame_control);
2132 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
2133 return;
2134
2135 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
2136 addr = ieee80211_get_SA(hdr);
2137
2138 spin_lock_bh(&ar->data_lock);
2139 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
2140 spin_unlock_bh(&ar->data_lock);
2141
2142 if (peer_key) {
2143 ath10k_dbg(ar, ATH10K_DBG_MAC,
2144 "mac wep key present for peer %pM\n", addr);
2145 status->flag |= RX_FLAG_DECRYPTED;
2146 }
2147}
2148
d7579d12
MK
2149static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
2150 struct wmi_mgmt_rx_ev_arg *arg)
5e3dd157 2151{
0d9b0438
MK
2152 struct wmi_mgmt_rx_event_v1 *ev_v1;
2153 struct wmi_mgmt_rx_event_v2 *ev_v2;
2154 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
8d130963 2155 struct wmi_mgmt_rx_ext_info *ext_info;
32653cf1
MK
2156 size_t pull_len;
2157 u32 msdu_len;
8d130963 2158 u32 len;
32653cf1 2159
c4cdf753
KV
2160 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
2161 ar->running_fw->fw_file.fw_features)) {
32653cf1
MK
2162 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
2163 ev_hdr = &ev_v2->hdr.v1;
2164 pull_len = sizeof(*ev_v2);
2165 } else {
2166 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
2167 ev_hdr = &ev_v1->hdr;
2168 pull_len = sizeof(*ev_v1);
2169 }
2170
2171 if (skb->len < pull_len)
2172 return -EPROTO;
2173
2174 skb_pull(skb, pull_len);
2175 arg->channel = ev_hdr->channel;
2176 arg->buf_len = ev_hdr->buf_len;
2177 arg->status = ev_hdr->status;
2178 arg->snr = ev_hdr->snr;
2179 arg->phy_mode = ev_hdr->phy_mode;
2180 arg->rate = ev_hdr->rate;
2181
2182 msdu_len = __le32_to_cpu(arg->buf_len);
2183 if (skb->len < msdu_len)
2184 return -EPROTO;
2185
8d130963
PO
2186 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2187 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2188 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2189 memcpy(&arg->ext_info, ext_info,
2190 sizeof(struct wmi_mgmt_rx_ext_info));
2191 }
32653cf1
MK
2192 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
2193 * trailer with credit update. Trim the excess garbage.
2194 */
2195 skb_trim(skb, msdu_len);
2196
2197 return 0;
2198}
2199
1c092961
RM
2200static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
2201 struct sk_buff *skb,
2202 struct wmi_mgmt_rx_ev_arg *arg)
2203{
2204 struct wmi_10_4_mgmt_rx_event *ev;
2205 struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
2206 size_t pull_len;
2207 u32 msdu_len;
7d5efd08
PO
2208 struct wmi_mgmt_rx_ext_info *ext_info;
2209 u32 len;
1c092961
RM
2210
2211 ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
2212 ev_hdr = &ev->hdr;
2213 pull_len = sizeof(*ev);
2214
2215 if (skb->len < pull_len)
2216 return -EPROTO;
2217
2218 skb_pull(skb, pull_len);
2219 arg->channel = ev_hdr->channel;
2220 arg->buf_len = ev_hdr->buf_len;
2221 arg->status = ev_hdr->status;
2222 arg->snr = ev_hdr->snr;
2223 arg->phy_mode = ev_hdr->phy_mode;
2224 arg->rate = ev_hdr->rate;
2225
2226 msdu_len = __le32_to_cpu(arg->buf_len);
2227 if (skb->len < msdu_len)
2228 return -EPROTO;
2229
7d5efd08
PO
2230 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2231 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2232 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2233 memcpy(&arg->ext_info, ext_info,
2234 sizeof(struct wmi_mgmt_rx_ext_info));
2235 }
2236
1c092961
RM
2237 /* Make sure bytes added for padding are removed. */
2238 skb_trim(skb, msdu_len);
2239
2240 return 0;
2241}
2242
0226d602 2243int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
32653cf1
MK
2244{
2245 struct wmi_mgmt_rx_ev_arg arg = {};
5e3dd157
KV
2246 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
2247 struct ieee80211_hdr *hdr;
01cebe1c 2248 struct ieee80211_supported_band *sband;
5e3dd157
KV
2249 u32 rx_status;
2250 u32 channel;
2251 u32 phy_mode;
2252 u32 snr;
2253 u32 rate;
2254 u32 buf_len;
2255 u16 fc;
32653cf1 2256 int ret;
0d9b0438 2257
d7579d12 2258 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
32653cf1
MK
2259 if (ret) {
2260 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
08603f2e 2261 dev_kfree_skb(skb);
32653cf1 2262 return ret;
0d9b0438 2263 }
5e3dd157 2264
32653cf1
MK
2265 channel = __le32_to_cpu(arg.channel);
2266 buf_len = __le32_to_cpu(arg.buf_len);
2267 rx_status = __le32_to_cpu(arg.status);
2268 snr = __le32_to_cpu(arg.snr);
2269 phy_mode = __le32_to_cpu(arg.phy_mode);
2270 rate = __le32_to_cpu(arg.rate);
5e3dd157
KV
2271
2272 memset(status, 0, sizeof(*status));
2273
7aa7a72a 2274 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV
2275 "event mgmt rx status %08x\n", rx_status);
2276
2c9bcece
MP
2277 if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
2278 (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
2279 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
d67d0a02
MK
2280 dev_kfree_skb(skb);
2281 return 0;
2282 }
2283
5e3dd157
KV
2284 if (rx_status & WMI_RX_STATUS_ERR_MIC)
2285 status->flag |= RX_FLAG_MMIC_ERROR;
2286
8d130963
PO
2287 if (rx_status & WMI_RX_STATUS_EXT_INFO) {
2288 status->mactime =
2289 __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
2290 status->flag |= RX_FLAG_MACTIME_END;
2291 }
21040bf9 2292 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
453cdb61 2293 * MODE_11B. This means phy_mode is not a reliable source for the band
21040bf9
MK
2294 * of mgmt rx.
2295 */
2296 if (channel >= 1 && channel <= 14) {
57fbcce3 2297 status->band = NL80211_BAND_2GHZ;
21040bf9 2298 } else if (channel >= 36 && channel <= 165) {
57fbcce3 2299 status->band = NL80211_BAND_5GHZ;
453cdb61 2300 } else {
21040bf9
MK
2301 /* Shouldn't happen unless list of advertised channels to
2302 * mac80211 has been changed.
2303 */
2304 WARN_ON_ONCE(1);
2305 dev_kfree_skb(skb);
2306 return 0;
453cdb61
MK
2307 }
2308
57fbcce3 2309 if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
21040bf9
MK
2310 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
2311
01cebe1c
MK
2312 sband = &ar->mac.sbands[status->band];
2313
5e3dd157
KV
2314 status->freq = ieee80211_channel_to_frequency(channel, status->band);
2315 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
01cebe1c 2316 status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
5e3dd157 2317
5e3dd157
KV
2318 hdr = (struct ieee80211_hdr *)skb->data;
2319 fc = le16_to_cpu(hdr->frame_control);
2320
60549cab
GB
2321 /* Firmware is guaranteed to report all essential management frames via
2322 * WMI while it can deliver some extra via HTT. Since there can be
2323 * duplicates split the reporting wrt monitor/sniffing.
2324 */
2325 status->flag |= RX_FLAG_SKIP_MONITOR;
2326
504f6cdf
SM
2327 ath10k_wmi_handle_wep_reauth(ar, skb, status);
2328
2b6a6a90
MK
2329 /* FW delivers WEP Shared Auth frame with Protected Bit set and
2330 * encrypted payload. However in case of PMF it delivers decrypted
2331 * frames with Protected Bit set. */
2332 if (ieee80211_has_protected(hdr->frame_control) &&
2333 !ieee80211_is_auth(hdr->frame_control)) {
eeab266c
MK
2334 status->flag |= RX_FLAG_DECRYPTED;
2335
2336 if (!ieee80211_is_action(hdr->frame_control) &&
2337 !ieee80211_is_deauth(hdr->frame_control) &&
2338 !ieee80211_is_disassoc(hdr->frame_control)) {
2339 status->flag |= RX_FLAG_IV_STRIPPED |
2340 RX_FLAG_MMIC_STRIPPED;
2341 hdr->frame_control = __cpu_to_le16(fc &
5e3dd157 2342 ~IEEE80211_FCTL_PROTECTED);
eeab266c 2343 }
5e3dd157
KV
2344 }
2345
cc9904e6
MK
2346 if (ieee80211_is_beacon(hdr->frame_control))
2347 ath10k_mac_handle_beacon(ar, skb);
2348
7aa7a72a 2349 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV
2350 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
2351 skb, skb->len,
2352 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
2353
7aa7a72a 2354 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV
2355 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
2356 status->freq, status->band, status->signal,
2357 status->rate_idx);
2358
5e3dd157
KV
2359 ieee80211_rx(ar->hw, skb);
2360 return 0;
2361}
2362
2e1dea40
MK
2363static int freq_to_idx(struct ath10k *ar, int freq)
2364{
2365 struct ieee80211_supported_band *sband;
2366 int band, ch, idx = 0;
2367
57fbcce3 2368 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
2e1dea40
MK
2369 sband = ar->hw->wiphy->bands[band];
2370 if (!sband)
2371 continue;
2372
2373 for (ch = 0; ch < sband->n_channels; ch++, idx++)
2374 if (sband->channels[ch].center_freq == freq)
2375 goto exit;
2376 }
2377
2378exit:
2379 return idx;
2380}
2381
d7579d12
MK
2382static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
2383 struct wmi_ch_info_ev_arg *arg)
32653cf1
MK
2384{
2385 struct wmi_chan_info_event *ev = (void *)skb->data;
2386
2387 if (skb->len < sizeof(*ev))
2388 return -EPROTO;
2389
2390 skb_pull(skb, sizeof(*ev));
2391 arg->err_code = ev->err_code;
2392 arg->freq = ev->freq;
2393 arg->cmd_flags = ev->cmd_flags;
2394 arg->noise_floor = ev->noise_floor;
2395 arg->rx_clear_count = ev->rx_clear_count;
2396 arg->cycle_count = ev->cycle_count;
2397
2398 return 0;
2399}
2400
b2297baa
RM
2401static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
2402 struct sk_buff *skb,
2403 struct wmi_ch_info_ev_arg *arg)
2404{
2405 struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
2406
2407 if (skb->len < sizeof(*ev))
2408 return -EPROTO;
2409
2410 skb_pull(skb, sizeof(*ev));
2411 arg->err_code = ev->err_code;
2412 arg->freq = ev->freq;
2413 arg->cmd_flags = ev->cmd_flags;
2414 arg->noise_floor = ev->noise_floor;
2415 arg->rx_clear_count = ev->rx_clear_count;
2416 arg->cycle_count = ev->cycle_count;
2417 arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
2418 arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
2419 arg->rx_frame_count = ev->rx_frame_count;
2420
2421 return 0;
2422}
2423
0226d602 2424void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2425{
32653cf1 2426 struct wmi_ch_info_ev_arg arg = {};
2e1dea40
MK
2427 struct survey_info *survey;
2428 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
32653cf1 2429 int idx, ret;
2e1dea40 2430
d7579d12 2431 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
32653cf1
MK
2432 if (ret) {
2433 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
2434 return;
2435 }
2e1dea40 2436
32653cf1
MK
2437 err_code = __le32_to_cpu(arg.err_code);
2438 freq = __le32_to_cpu(arg.freq);
2439 cmd_flags = __le32_to_cpu(arg.cmd_flags);
2440 noise_floor = __le32_to_cpu(arg.noise_floor);
2441 rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
2442 cycle_count = __le32_to_cpu(arg.cycle_count);
2e1dea40 2443
7aa7a72a 2444 ath10k_dbg(ar, ATH10K_DBG_WMI,
2e1dea40
MK
2445 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
2446 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
2447 cycle_count);
2448
2449 spin_lock_bh(&ar->data_lock);
2450
5c81c7fd
MK
2451 switch (ar->scan.state) {
2452 case ATH10K_SCAN_IDLE:
2453 case ATH10K_SCAN_STARTING:
7aa7a72a 2454 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
2e1dea40 2455 goto exit;
5c81c7fd
MK
2456 case ATH10K_SCAN_RUNNING:
2457 case ATH10K_SCAN_ABORTING:
2458 break;
2e1dea40
MK
2459 }
2460
2461 idx = freq_to_idx(ar, freq);
2462 if (idx >= ARRAY_SIZE(ar->survey)) {
7aa7a72a 2463 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2e1dea40
MK
2464 freq, idx);
2465 goto exit;
2466 }
2467
2468 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
44b7d483
MK
2469 if (ar->ch_info_can_report_survey) {
2470 survey = &ar->survey[idx];
2471 survey->noise = noise_floor;
2472 survey->filled = SURVEY_INFO_NOISE_DBM;
2473
2474 ath10k_hw_fill_survey_time(ar,
2475 survey,
2476 cycle_count,
2477 rx_clear_count,
2478 ar->survey_last_cycle_count,
2479 ar->survey_last_rx_clear_count);
2480 }
2481
2482 ar->ch_info_can_report_survey = false;
2483 } else {
2484 ar->ch_info_can_report_survey = true;
2e1dea40
MK
2485 }
2486
3d2a2e29
VT
2487 if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
2488 ar->survey_last_rx_clear_count = rx_clear_count;
2489 ar->survey_last_cycle_count = cycle_count;
2490 }
2e1dea40
MK
2491
2492exit:
2493 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV
2494}
2495
0226d602 2496void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2497{
7aa7a72a 2498 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
5e3dd157
KV
2499}
2500
0226d602 2501int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2502{
7aa7a72a 2503 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
869526b9
KV
2504 skb->len);
2505
d35a6c18 2506 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
869526b9
KV
2507
2508 return 0;
5e3dd157
KV
2509}
2510
b91251fb
MK
2511void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
2512 struct ath10k_fw_stats_pdev *dst)
d15fb520 2513{
d15fb520
MK
2514 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
2515 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
2516 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
2517 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
2518 dst->cycle_count = __le32_to_cpu(src->cycle_count);
2519 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
2520 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
b91251fb 2521}
d15fb520 2522
b91251fb
MK
2523void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
2524 struct ath10k_fw_stats_pdev *dst)
2525{
2526 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2527 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2528 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2529 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2530 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2531 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2532 dst->local_freed = __le32_to_cpu(src->local_freed);
2533 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2534 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2535 dst->underrun = __le32_to_cpu(src->underrun);
2536 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2537 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2538 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2539 dst->data_rc = __le32_to_cpu(src->data_rc);
2540 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2541 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2542 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2543 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2544 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2545 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2546 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2547 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2548}
d15fb520 2549
98dd2b92
MP
2550static void
2551ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
2552 struct ath10k_fw_stats_pdev *dst)
2553{
2554 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2555 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2556 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2557 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2558 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2559 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2560 dst->local_freed = __le32_to_cpu(src->local_freed);
2561 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2562 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2563 dst->underrun = __le32_to_cpu(src->underrun);
2564 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2565 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2566 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2567 dst->data_rc = __le32_to_cpu(src->data_rc);
2568 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2569 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2570 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2571 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2572 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2573 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2574 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2575 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2576 dst->hw_paused = __le32_to_cpu(src->hw_paused);
2577 dst->seq_posted = __le32_to_cpu(src->seq_posted);
2578 dst->seq_failed_queueing =
2579 __le32_to_cpu(src->seq_failed_queueing);
2580 dst->seq_completed = __le32_to_cpu(src->seq_completed);
2581 dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
2582 dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
2583 dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
2584 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2585 dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
2586 dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
2587 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2588 dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
2589}
2590
b91251fb
MK
2591void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
2592 struct ath10k_fw_stats_pdev *dst)
2593{
2594 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
2595 dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
2596 dst->r0_frags = __le32_to_cpu(src->r0_frags);
2597 dst->r1_frags = __le32_to_cpu(src->r1_frags);
2598 dst->r2_frags = __le32_to_cpu(src->r2_frags);
2599 dst->r3_frags = __le32_to_cpu(src->r3_frags);
2600 dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
2601 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
2602 dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
2603 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
2604 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
2605 dst->phy_errs = __le32_to_cpu(src->phy_errs);
2606 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
2607 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
2608}
2609
2610void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
2611 struct ath10k_fw_stats_pdev *dst)
2612{
2613 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
2614 dst->rts_bad = __le32_to_cpu(src->rts_bad);
2615 dst->rts_good = __le32_to_cpu(src->rts_good);
2616 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
2617 dst->no_beacons = __le32_to_cpu(src->no_beacons);
2618 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
d15fb520
MK
2619}
2620
0226d602
MK
2621void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
2622 struct ath10k_fw_stats_peer *dst)
d15fb520
MK
2623{
2624 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2625 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2626 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2627}
2628
f9575793
MSS
2629static void
2630ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
2631 struct ath10k_fw_stats_peer *dst)
2632{
2633 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2634 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2635 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2636 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2637}
2638
d7579d12
MK
2639static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
2640 struct sk_buff *skb,
2641 struct ath10k_fw_stats *stats)
d15fb520
MK
2642{
2643 const struct wmi_stats_event *ev = (void *)skb->data;
2644 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
2645 int i;
2646
2647 if (!skb_pull(skb, sizeof(*ev)))
2648 return -EPROTO;
2649
2650 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2651 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2652 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2653
5326849a 2654 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 2655 const struct wmi_pdev_stats *src;
5326849a 2656 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK
2657
2658 src = (void *)skb->data;
2659 if (!skb_pull(skb, sizeof(*src)))
2660 return -EPROTO;
2661
5326849a
MK
2662 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2663 if (!dst)
2664 continue;
2665
b91251fb
MK
2666 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2667 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2668 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2669
5326849a 2670 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK
2671 }
2672
2673 /* fw doesn't implement vdev stats */
2674
2675 for (i = 0; i < num_peer_stats; i++) {
2676 const struct wmi_peer_stats *src;
5326849a 2677 struct ath10k_fw_stats_peer *dst;
d15fb520
MK
2678
2679 src = (void *)skb->data;
2680 if (!skb_pull(skb, sizeof(*src)))
2681 return -EPROTO;
2682
5326849a
MK
2683 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2684 if (!dst)
2685 continue;
2686
2687 ath10k_wmi_pull_peer_stats(src, dst);
2688 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK
2689 }
2690
2691 return 0;
2692}
2693
d7579d12
MK
2694static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
2695 struct sk_buff *skb,
2696 struct ath10k_fw_stats *stats)
d15fb520
MK
2697{
2698 const struct wmi_stats_event *ev = (void *)skb->data;
2699 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
2700 int i;
2701
2702 if (!skb_pull(skb, sizeof(*ev)))
2703 return -EPROTO;
2704
2705 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2706 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2707 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2708
5326849a 2709 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 2710 const struct wmi_10x_pdev_stats *src;
5326849a 2711 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK
2712
2713 src = (void *)skb->data;
2714 if (!skb_pull(skb, sizeof(*src)))
2715 return -EPROTO;
2716
5326849a
MK
2717 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2718 if (!dst)
2719 continue;
2720
b91251fb
MK
2721 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2722 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2723 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2724 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
d15fb520 2725
5326849a 2726 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK
2727 }
2728
2729 /* fw doesn't implement vdev stats */
2730
2731 for (i = 0; i < num_peer_stats; i++) {
2732 const struct wmi_10x_peer_stats *src;
5326849a 2733 struct ath10k_fw_stats_peer *dst;
d15fb520
MK
2734
2735 src = (void *)skb->data;
2736 if (!skb_pull(skb, sizeof(*src)))
2737 return -EPROTO;
2738
5326849a
MK
2739 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2740 if (!dst)
2741 continue;
2742
2743 ath10k_wmi_pull_peer_stats(&src->old, dst);
2744
2745 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
d15fb520 2746
5326849a 2747 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK
2748 }
2749
2750 return 0;
2751}
2752
20de2229
MK
2753static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
2754 struct sk_buff *skb,
2755 struct ath10k_fw_stats *stats)
2756{
2757 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2758 u32 num_pdev_stats;
2759 u32 num_pdev_ext_stats;
2760 u32 num_vdev_stats;
2761 u32 num_peer_stats;
2762 int i;
2763
2764 if (!skb_pull(skb, sizeof(*ev)))
2765 return -EPROTO;
2766
2767 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2768 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2769 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2770 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2771
2772 for (i = 0; i < num_pdev_stats; i++) {
2773 const struct wmi_10_2_pdev_stats *src;
2774 struct ath10k_fw_stats_pdev *dst;
2775
2776 src = (void *)skb->data;
2777 if (!skb_pull(skb, sizeof(*src)))
2778 return -EPROTO;
2779
2780 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2781 if (!dst)
2782 continue;
2783
2784 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2785 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2786 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2787 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2788 /* FIXME: expose 10.2 specific values */
2789
2790 list_add_tail(&dst->list, &stats->pdevs);
2791 }
2792
2793 for (i = 0; i < num_pdev_ext_stats; i++) {
2794 const struct wmi_10_2_pdev_ext_stats *src;
2795
2796 src = (void *)skb->data;
2797 if (!skb_pull(skb, sizeof(*src)))
2798 return -EPROTO;
2799
2800 /* FIXME: expose values to userspace
2801 *
2802 * Note: Even though this loop seems to do nothing it is
2803 * required to parse following sub-structures properly.
2804 */
2805 }
2806
2807 /* fw doesn't implement vdev stats */
2808
2809 for (i = 0; i < num_peer_stats; i++) {
2810 const struct wmi_10_2_peer_stats *src;
2811 struct ath10k_fw_stats_peer *dst;
2812
2813 src = (void *)skb->data;
2814 if (!skb_pull(skb, sizeof(*src)))
2815 return -EPROTO;
2816
2817 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2818 if (!dst)
2819 continue;
2820
2821 ath10k_wmi_pull_peer_stats(&src->old, dst);
2822
2823 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2824 /* FIXME: expose 10.2 specific values */
2825
2826 list_add_tail(&dst->list, &stats->peers);
2827 }
2828
2829 return 0;
2830}
2831
2832static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
2833 struct sk_buff *skb,
2834 struct ath10k_fw_stats *stats)
2835{
2836 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2837 u32 num_pdev_stats;
2838 u32 num_pdev_ext_stats;
2839 u32 num_vdev_stats;
2840 u32 num_peer_stats;
2841 int i;
2842
2843 if (!skb_pull(skb, sizeof(*ev)))
2844 return -EPROTO;
2845
2846 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2847 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2848 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2849 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2850
2851 for (i = 0; i < num_pdev_stats; i++) {
2852 const struct wmi_10_2_pdev_stats *src;
2853 struct ath10k_fw_stats_pdev *dst;
2854
2855 src = (void *)skb->data;
2856 if (!skb_pull(skb, sizeof(*src)))
2857 return -EPROTO;
2858
2859 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2860 if (!dst)
2861 continue;
2862
2863 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2864 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2865 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2866 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2867 /* FIXME: expose 10.2 specific values */
2868
2869 list_add_tail(&dst->list, &stats->pdevs);
2870 }
2871
2872 for (i = 0; i < num_pdev_ext_stats; i++) {
2873 const struct wmi_10_2_pdev_ext_stats *src;
2874
2875 src = (void *)skb->data;
2876 if (!skb_pull(skb, sizeof(*src)))
2877 return -EPROTO;
2878
2879 /* FIXME: expose values to userspace
2880 *
2881 * Note: Even though this loop seems to do nothing it is
2882 * required to parse following sub-structures properly.
2883 */
2884 }
2885
2886 /* fw doesn't implement vdev stats */
2887
2888 for (i = 0; i < num_peer_stats; i++) {
de46c015 2889 const struct wmi_10_2_4_ext_peer_stats *src;
20de2229 2890 struct ath10k_fw_stats_peer *dst;
de46c015 2891 int stats_len;
de46c015 2892
cc61a1bb 2893 if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
de46c015
MSS
2894 stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
2895 else
2896 stats_len = sizeof(struct wmi_10_2_4_peer_stats);
20de2229
MK
2897
2898 src = (void *)skb->data;
de46c015 2899 if (!skb_pull(skb, stats_len))
20de2229
MK
2900 return -EPROTO;
2901
2902 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2903 if (!dst)
2904 continue;
2905
2906 ath10k_wmi_pull_peer_stats(&src->common.old, dst);
2907
2908 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
de46c015 2909
cc61a1bb 2910 if (ath10k_peer_stats_enabled(ar))
de46c015 2911 dst->rx_duration = __le32_to_cpu(src->rx_duration);
20de2229
MK
2912 /* FIXME: expose 10.2 specific values */
2913
2914 list_add_tail(&dst->list, &stats->peers);
2915 }
2916
2917 return 0;
2918}
2919
98dd2b92
MP
2920static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
2921 struct sk_buff *skb,
2922 struct ath10k_fw_stats *stats)
2923{
2924 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2925 u32 num_pdev_stats;
2926 u32 num_pdev_ext_stats;
2927 u32 num_vdev_stats;
2928 u32 num_peer_stats;
4a49ae94 2929 u32 num_bcnflt_stats;
f9575793 2930 u32 stats_id;
98dd2b92
MP
2931 int i;
2932
2933 if (!skb_pull(skb, sizeof(*ev)))
2934 return -EPROTO;
2935
2936 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2937 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2938 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2939 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
4a49ae94 2940 num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
f9575793 2941 stats_id = __le32_to_cpu(ev->stats_id);
98dd2b92
MP
2942
2943 for (i = 0; i < num_pdev_stats; i++) {
2944 const struct wmi_10_4_pdev_stats *src;
2945 struct ath10k_fw_stats_pdev *dst;
2946
2947 src = (void *)skb->data;
2948 if (!skb_pull(skb, sizeof(*src)))
2949 return -EPROTO;
2950
2951 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2952 if (!dst)
2953 continue;
2954
2955 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2956 ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
2957 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2958 dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
2959 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2960
2961 list_add_tail(&dst->list, &stats->pdevs);
2962 }
2963
2964 for (i = 0; i < num_pdev_ext_stats; i++) {
2965 const struct wmi_10_2_pdev_ext_stats *src;
2966
2967 src = (void *)skb->data;
2968 if (!skb_pull(skb, sizeof(*src)))
2969 return -EPROTO;
2970
2971 /* FIXME: expose values to userspace
2972 *
2973 * Note: Even though this loop seems to do nothing it is
2974 * required to parse following sub-structures properly.
2975 */
2976 }
2977
2978 /* fw doesn't implement vdev stats */
2979
2980 for (i = 0; i < num_peer_stats; i++) {
4a49ae94 2981 const struct wmi_10_4_peer_stats *src;
98dd2b92
MP
2982 struct ath10k_fw_stats_peer *dst;
2983
2984 src = (void *)skb->data;
4a49ae94 2985 if (!skb_pull(skb, sizeof(*src)))
98dd2b92
MP
2986 return -EPROTO;
2987
2988 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2989 if (!dst)
2990 continue;
2991
4a49ae94 2992 ath10k_wmi_10_4_pull_peer_stats(src, dst);
98dd2b92
MP
2993 list_add_tail(&dst->list, &stats->peers);
2994 }
2995
4a49ae94
MSS
2996 for (i = 0; i < num_bcnflt_stats; i++) {
2997 const struct wmi_10_4_bss_bcn_filter_stats *src;
2998
2999 src = (void *)skb->data;
3000 if (!skb_pull(skb, sizeof(*src)))
3001 return -EPROTO;
3002
3003 /* FIXME: expose values to userspace
3004 *
3005 * Note: Even though this loop seems to do nothing it is
3006 * required to parse following sub-structures properly.
3007 */
3008 }
3009
3010 if ((stats_id & WMI_10_4_STAT_PEER_EXTD) == 0)
3011 return 0;
3012
3013 stats->extended = true;
3014
3015 for (i = 0; i < num_peer_stats; i++) {
3016 const struct wmi_10_4_peer_extd_stats *src;
3017 struct ath10k_fw_extd_stats_peer *dst;
3018
3019 src = (void *)skb->data;
3020 if (!skb_pull(skb, sizeof(*src)))
3021 return -EPROTO;
3022
3023 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3024 if (!dst)
3025 continue;
3026
3027 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
3028 dst->rx_duration = __le32_to_cpu(src->rx_duration);
3029 list_add_tail(&dst->list, &stats->peers_extd);
3030 }
3031
98dd2b92
MP
3032 return 0;
3033}
3034
0226d602 3035void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3036{
7aa7a72a 3037 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
60ef401a 3038 ath10k_debug_fw_stats_process(ar, skb);
5e3dd157
KV
3039}
3040
d7579d12
MK
3041static int
3042ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
3043 struct wmi_vdev_start_ev_arg *arg)
32653cf1
MK
3044{
3045 struct wmi_vdev_start_response_event *ev = (void *)skb->data;
3046
3047 if (skb->len < sizeof(*ev))
3048 return -EPROTO;
3049
3050 skb_pull(skb, sizeof(*ev));
3051 arg->vdev_id = ev->vdev_id;
3052 arg->req_id = ev->req_id;
3053 arg->resp_type = ev->resp_type;
3054 arg->status = ev->status;
3055
3056 return 0;
3057}
3058
0226d602 3059void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3060{
32653cf1
MK
3061 struct wmi_vdev_start_ev_arg arg = {};
3062 int ret;
5e3dd157 3063
7aa7a72a 3064 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
5e3dd157 3065
d7579d12 3066 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
32653cf1
MK
3067 if (ret) {
3068 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
3069 return;
3070 }
5e3dd157 3071
32653cf1 3072 if (WARN_ON(__le32_to_cpu(arg.status)))
5e3dd157
KV
3073 return;
3074
3075 complete(&ar->vdev_setup_done);
3076}
3077
0226d602 3078void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3079{
7aa7a72a 3080 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
5e3dd157
KV
3081 complete(&ar->vdev_setup_done);
3082}
3083
d7579d12
MK
3084static int
3085ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
3086 struct wmi_peer_kick_ev_arg *arg)
32653cf1
MK
3087{
3088 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
3089
3090 if (skb->len < sizeof(*ev))
3091 return -EPROTO;
3092
3093 skb_pull(skb, sizeof(*ev));
3094 arg->mac_addr = ev->peer_macaddr.addr;
3095
3096 return 0;
3097}
3098
0226d602 3099void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3100{
32653cf1 3101 struct wmi_peer_kick_ev_arg arg = {};
5a13e76e 3102 struct ieee80211_sta *sta;
32653cf1 3103 int ret;
5a13e76e 3104
d7579d12 3105 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
32653cf1
MK
3106 if (ret) {
3107 ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
3108 ret);
3109 return;
3110 }
5a13e76e 3111
7aa7a72a 3112 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
32653cf1 3113 arg.mac_addr);
5a13e76e
KV
3114
3115 rcu_read_lock();
3116
32653cf1 3117 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
5a13e76e 3118 if (!sta) {
7aa7a72a 3119 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
32653cf1 3120 arg.mac_addr);
5a13e76e
KV
3121 goto exit;
3122 }
3123
3124 ieee80211_report_low_ack(sta, 10);
3125
3126exit:
3127 rcu_read_unlock();
5e3dd157
KV
3128}
3129
3130/*
3131 * FIXME
3132 *
3133 * We don't report to mac80211 sleep state of connected
3134 * stations. Due to this mac80211 can't fill in TIM IE
3135 * correctly.
3136 *
3137 * I know of no way of getting nullfunc frames that contain
3138 * sleep transition from connected stations - these do not
3139 * seem to be sent from the target to the host. There also
3140 * doesn't seem to be a dedicated event for that. So the
3141 * only way left to do this would be to read tim_bitmap
3142 * during SWBA.
3143 *
3144 * We could probably try using tim_bitmap from SWBA to tell
3145 * mac80211 which stations are asleep and which are not. The
3146 * problem here is calling mac80211 functions so many times
3147 * could take too long and make us miss the time to submit
3148 * the beacon to the target.
3149 *
3150 * So as a workaround we try to extend the TIM IE if there
3151 * is unicast buffered for stations with aid > 7 and fill it
3152 * in ourselves.
3153 */
3154static void ath10k_wmi_update_tim(struct ath10k *ar,
3155 struct ath10k_vif *arvif,
3156 struct sk_buff *bcn,
a03fee34 3157 const struct wmi_tim_info_arg *tim_info)
5e3dd157
KV
3158{
3159 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
3160 struct ieee80211_tim_ie *tim;
3161 u8 *ies, *ie;
3162 u8 ie_len, pvm_len;
af762c0b 3163 __le32 t;
a03fee34
RM
3164 u32 v, tim_len;
3165
3166 /* When FW reports 0 in tim_len, ensure atleast first byte
3167 * in tim_bitmap is considered for pvm calculation.
3168 */
3169 tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
5e3dd157
KV
3170
3171 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
3172 * we must copy the bitmap upon change and reuse it later */
32653cf1 3173 if (__le32_to_cpu(tim_info->tim_changed)) {
5e3dd157
KV
3174 int i;
3175
a03fee34
RM
3176 if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
3177 ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
3178 tim_len, sizeof(arvif->u.ap.tim_bitmap));
3179 tim_len = sizeof(arvif->u.ap.tim_bitmap);
3180 }
5e3dd157 3181
a03fee34 3182 for (i = 0; i < tim_len; i++) {
32653cf1 3183 t = tim_info->tim_bitmap[i / 4];
af762c0b 3184 v = __le32_to_cpu(t);
5e3dd157
KV
3185 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
3186 }
3187
a03fee34
RM
3188 /* FW reports either length 0 or length based on max supported
3189 * station. so we calculate this on our own
3190 */
5e3dd157 3191 arvif->u.ap.tim_len = 0;
a03fee34 3192 for (i = 0; i < tim_len; i++)
5e3dd157
KV
3193 if (arvif->u.ap.tim_bitmap[i])
3194 arvif->u.ap.tim_len = i;
3195
3196 arvif->u.ap.tim_len++;
3197 }
3198
3199 ies = bcn->data;
3200 ies += ieee80211_hdrlen(hdr->frame_control);
3201 ies += 12; /* fixed parameters */
3202
3203 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
3204 (u8 *)skb_tail_pointer(bcn) - ies);
3205 if (!ie) {
09af8f85 3206 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
7aa7a72a 3207 ath10k_warn(ar, "no tim ie found;\n");
5e3dd157
KV
3208 return;
3209 }
3210
3211 tim = (void *)ie + 2;
3212 ie_len = ie[1];
3213 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
3214
3215 if (pvm_len < arvif->u.ap.tim_len) {
a03fee34 3216 int expand_size = tim_len - pvm_len;
5e3dd157
KV
3217 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
3218 void *next_ie = ie + 2 + ie_len;
3219
3220 if (skb_put(bcn, expand_size)) {
3221 memmove(next_ie + expand_size, next_ie, move_size);
3222
3223 ie[1] += expand_size;
3224 ie_len += expand_size;
3225 pvm_len += expand_size;
3226 } else {
7aa7a72a 3227 ath10k_warn(ar, "tim expansion failed\n");
5e3dd157
KV
3228 }
3229 }
3230
a03fee34 3231 if (pvm_len > tim_len) {
7aa7a72a 3232 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
5e3dd157
KV
3233 return;
3234 }
3235
32653cf1 3236 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
5e3dd157
KV
3237 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
3238
748afc47 3239 if (tim->dtim_count == 0) {
66b8a010 3240 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
748afc47 3241
32653cf1 3242 if (__le32_to_cpu(tim_info->tim_mcast) == 1)
66b8a010 3243 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
748afc47
MK
3244 }
3245
7aa7a72a 3246 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
5e3dd157
KV
3247 tim->dtim_count, tim->dtim_period,
3248 tim->bitmap_ctrl, pvm_len);
3249}
3250
5e3dd157
KV
3251static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
3252 struct sk_buff *bcn,
32653cf1 3253 const struct wmi_p2p_noa_info *noa)
5e3dd157 3254{
08c27be1 3255 if (!arvif->vif->p2p)
5e3dd157
KV
3256 return;
3257
7aa7a72a 3258 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
5e3dd157 3259
6a94888f
MK
3260 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
3261 ath10k_p2p_noa_update(arvif, noa);
5e3dd157
KV
3262
3263 if (arvif->u.ap.noa_data)
3264 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
3265 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
3266 arvif->u.ap.noa_data,
3267 arvif->u.ap.noa_len);
5e3dd157
KV
3268}
3269
d7579d12
MK
3270static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
3271 struct wmi_swba_ev_arg *arg)
32653cf1
MK
3272{
3273 struct wmi_host_swba_event *ev = (void *)skb->data;
3274 u32 map;
3275 size_t i;
3276
3277 if (skb->len < sizeof(*ev))
3278 return -EPROTO;
3279
3280 skb_pull(skb, sizeof(*ev));
3281 arg->vdev_map = ev->vdev_map;
3282
3283 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3284 if (!(map & BIT(0)))
3285 continue;
3286
3287 /* If this happens there were some changes in firmware and
3288 * ath10k should update the max size of tim_info array.
3289 */
3290 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3291 break;
3292
a03fee34
RM
3293 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3294 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3295 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3296 return -EPROTO;
3297 }
3298
3299 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3300 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3301 arg->tim_info[i].tim_bitmap =
3302 ev->bcn_info[i].tim_info.tim_bitmap;
3303 arg->tim_info[i].tim_changed =
3304 ev->bcn_info[i].tim_info.tim_changed;
3305 arg->tim_info[i].tim_num_ps_pending =
3306 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3307
32653cf1
MK
3308 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
3309 i++;
3310 }
3311
3312 return 0;
3313}
3314
8b019fb0
YL
3315static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
3316 struct sk_buff *skb,
3317 struct wmi_swba_ev_arg *arg)
3318{
3319 struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
3320 u32 map;
3321 size_t i;
3322
3323 if (skb->len < sizeof(*ev))
3324 return -EPROTO;
3325
3326 skb_pull(skb, sizeof(*ev));
3327 arg->vdev_map = ev->vdev_map;
3328
3329 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3330 if (!(map & BIT(0)))
3331 continue;
3332
3333 /* If this happens there were some changes in firmware and
3334 * ath10k should update the max size of tim_info array.
3335 */
3336 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3337 break;
3338
3339 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3340 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3341 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3342 return -EPROTO;
3343 }
3344
3345 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3346 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3347 arg->tim_info[i].tim_bitmap =
3348 ev->bcn_info[i].tim_info.tim_bitmap;
3349 arg->tim_info[i].tim_changed =
3350 ev->bcn_info[i].tim_info.tim_changed;
3351 arg->tim_info[i].tim_num_ps_pending =
3352 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3353 i++;
3354 }
3355
3356 return 0;
3357}
3358
3cec3be3
RM
3359static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
3360 struct sk_buff *skb,
3361 struct wmi_swba_ev_arg *arg)
3362{
3363 struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
3364 u32 map, tim_len;
3365 size_t i;
3366
3367 if (skb->len < sizeof(*ev))
3368 return -EPROTO;
3369
3370 skb_pull(skb, sizeof(*ev));
3371 arg->vdev_map = ev->vdev_map;
3372
3373 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3374 if (!(map & BIT(0)))
3375 continue;
3376
3377 /* If this happens there were some changes in firmware and
3378 * ath10k should update the max size of tim_info array.
3379 */
3380 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3381 break;
3382
3383 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3384 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3385 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3386 return -EPROTO;
3387 }
3388
3389 tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
3390 if (tim_len) {
3391 /* Exclude 4 byte guard length */
3392 tim_len -= 4;
3393 arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
3394 } else {
3395 arg->tim_info[i].tim_len = 0;
3396 }
3397
3398 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3399 arg->tim_info[i].tim_bitmap =
3400 ev->bcn_info[i].tim_info.tim_bitmap;
3401 arg->tim_info[i].tim_changed =
3402 ev->bcn_info[i].tim_info.tim_changed;
3403 arg->tim_info[i].tim_num_ps_pending =
3404 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3405
3406 /* 10.4 firmware doesn't have p2p support. notice of absence
3407 * info can be ignored for now.
3408 */
3409
3410 i++;
3411 }
3412
3413 return 0;
3414}
3415
08e75ea8
VN
3416static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
3417{
3418 return WMI_TXBF_CONF_BEFORE_ASSOC;
3419}
3420
0226d602 3421void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3422{
32653cf1 3423 struct wmi_swba_ev_arg arg = {};
5e3dd157
KV
3424 u32 map;
3425 int i = -1;
a03fee34 3426 const struct wmi_tim_info_arg *tim_info;
32653cf1 3427 const struct wmi_p2p_noa_info *noa_info;
5e3dd157 3428 struct ath10k_vif *arvif;
5e3dd157 3429 struct sk_buff *bcn;
64badcb6 3430 dma_addr_t paddr;
767d34fc 3431 int ret, vdev_id = 0;
5e3dd157 3432
d7579d12 3433 ret = ath10k_wmi_pull_swba(ar, skb, &arg);
32653cf1
MK
3434 if (ret) {
3435 ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
3436 return;
3437 }
3438
3439 map = __le32_to_cpu(arg.vdev_map);
5e3dd157 3440
7aa7a72a 3441 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
32653cf1 3442 map);
5e3dd157
KV
3443
3444 for (; map; map >>= 1, vdev_id++) {
3445 if (!(map & 0x1))
3446 continue;
3447
3448 i++;
3449
3450 if (i >= WMI_MAX_AP_VDEV) {
7aa7a72a 3451 ath10k_warn(ar, "swba has corrupted vdev map\n");
5e3dd157
KV
3452 break;
3453 }
3454
a03fee34 3455 tim_info = &arg.tim_info[i];
32653cf1 3456 noa_info = arg.noa_info[i];
5e3dd157 3457
7aa7a72a 3458 ath10k_dbg(ar, ATH10K_DBG_MGMT,
7a8a396b 3459 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
5e3dd157 3460 i,
32653cf1
MK
3461 __le32_to_cpu(tim_info->tim_len),
3462 __le32_to_cpu(tim_info->tim_mcast),
3463 __le32_to_cpu(tim_info->tim_changed),
3464 __le32_to_cpu(tim_info->tim_num_ps_pending),
3465 __le32_to_cpu(tim_info->tim_bitmap[3]),
3466 __le32_to_cpu(tim_info->tim_bitmap[2]),
3467 __le32_to_cpu(tim_info->tim_bitmap[1]),
3468 __le32_to_cpu(tim_info->tim_bitmap[0]));
5e3dd157 3469
a03fee34
RM
3470 /* TODO: Only first 4 word from tim_bitmap is dumped.
3471 * Extend debug code to dump full tim_bitmap.
3472 */
3473
5e3dd157
KV
3474 arvif = ath10k_get_arvif(ar, vdev_id);
3475 if (arvif == NULL) {
7aa7a72a
MK
3476 ath10k_warn(ar, "no vif for vdev_id %d found\n",
3477 vdev_id);
5e3dd157
KV
3478 continue;
3479 }
3480
c2df44b3
MK
3481 /* There are no completions for beacons so wait for next SWBA
3482 * before telling mac80211 to decrement CSA counter
3483 *
3484 * Once CSA counter is completed stop sending beacons until
3485 * actual channel switch is done */
3486 if (arvif->vif->csa_active &&
3487 ieee80211_csa_is_complete(arvif->vif)) {
3488 ieee80211_csa_finish(arvif->vif);
3489 continue;
3490 }
3491
5e3dd157
KV
3492 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
3493 if (!bcn) {
7aa7a72a 3494 ath10k_warn(ar, "could not get mac80211 beacon\n");
5e3dd157
KV
3495 continue;
3496 }
3497
4b604558 3498 ath10k_tx_h_seq_no(arvif->vif, bcn);
32653cf1
MK
3499 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
3500 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
5e3dd157 3501
ed54388a 3502 spin_lock_bh(&ar->data_lock);
748afc47 3503
ed54388a 3504 if (arvif->beacon) {
af21319f
MK
3505 switch (arvif->beacon_state) {
3506 case ATH10K_BEACON_SENT:
3507 break;
3508 case ATH10K_BEACON_SCHEDULED:
3509 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
3510 arvif->vdev_id);
3511 break;
3512 case ATH10K_BEACON_SENDING:
3513 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
748afc47 3514 arvif->vdev_id);
af21319f
MK
3515 dev_kfree_skb(bcn);
3516 goto skip;
3517 }
748afc47 3518
64badcb6 3519 ath10k_mac_vif_beacon_free(arvif);
ed54388a 3520 }
5e3dd157 3521
64badcb6
MK
3522 if (!arvif->beacon_buf) {
3523 paddr = dma_map_single(arvif->ar->dev, bcn->data,
3524 bcn->len, DMA_TO_DEVICE);
3525 ret = dma_mapping_error(arvif->ar->dev, paddr);
3526 if (ret) {
3527 ath10k_warn(ar, "failed to map beacon: %d\n",
3528 ret);
3529 dev_kfree_skb_any(bcn);
5e55e3cb 3530 ret = -EIO;
64badcb6
MK
3531 goto skip;
3532 }
3533
3534 ATH10K_SKB_CB(bcn)->paddr = paddr;
3535 } else {
3536 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
3537 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
3538 bcn->len, IEEE80211_MAX_FRAME_LEN);
3539 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
3540 }
3541 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
3542 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
767d34fc 3543 }
748afc47 3544
ed54388a 3545 arvif->beacon = bcn;
af21319f 3546 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
5e3dd157 3547
5ce8e7fd
RM
3548 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
3549 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
3550
767d34fc 3551skip:
ed54388a 3552 spin_unlock_bh(&ar->data_lock);
5e3dd157 3553 }
af21319f
MK
3554
3555 ath10k_wmi_tx_beacons_nowait(ar);
5e3dd157
KV
3556}
3557
0226d602 3558void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3559{
7aa7a72a 3560 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
5e3dd157
KV
3561}
3562
9702c686 3563static void ath10k_dfs_radar_report(struct ath10k *ar,
991adf71 3564 struct wmi_phyerr_ev_arg *phyerr,
2332d0ae 3565 const struct phyerr_radar_report *rr,
9702c686
JD
3566 u64 tsf)
3567{
3568 u32 reg0, reg1, tsf32l;
500ff9f9 3569 struct ieee80211_channel *ch;
9702c686
JD
3570 struct pulse_event pe;
3571 u64 tsf64;
3572 u8 rssi, width;
3573
3574 reg0 = __le32_to_cpu(rr->reg0);
3575 reg1 = __le32_to_cpu(rr->reg1);
3576
7aa7a72a 3577 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD
3578 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
3579 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
3580 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
3581 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
3582 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
7aa7a72a 3583 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD
3584 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
3585 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
3586 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
3587 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
3588 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
3589 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
7aa7a72a 3590 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD
3591 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
3592 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
3593 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
3594
3595 if (!ar->dfs_detector)
3596 return;
3597
500ff9f9
MK
3598 spin_lock_bh(&ar->data_lock);
3599 ch = ar->rx_channel;
3600 spin_unlock_bh(&ar->data_lock);
3601
3602 if (!ch) {
3603 ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
3604 goto radar_detected;
3605 }
3606
9702c686 3607 /* report event to DFS pattern detector */
991adf71 3608 tsf32l = phyerr->tsf_timestamp;
9702c686
JD
3609 tsf64 = tsf & (~0xFFFFFFFFULL);
3610 tsf64 |= tsf32l;
3611
3612 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
2332d0ae 3613 rssi = phyerr->rssi_combined;
9702c686
JD
3614
3615 /* hardware store this as 8 bit signed value,
3616 * set to zero if negative number
3617 */
3618 if (rssi & 0x80)
3619 rssi = 0;
3620
3621 pe.ts = tsf64;
500ff9f9 3622 pe.freq = ch->center_freq;
9702c686
JD
3623 pe.width = width;
3624 pe.rssi = rssi;
2c3f26a0 3625 pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
7aa7a72a 3626 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD
3627 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
3628 pe.freq, pe.width, pe.rssi, pe.ts);
3629
3630 ATH10K_DFS_STAT_INC(ar, pulses_detected);
3631
3632 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
7aa7a72a 3633 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD
3634 "dfs no pulse pattern detected, yet\n");
3635 return;
3636 }
3637
500ff9f9 3638radar_detected:
7aa7a72a 3639 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
9702c686 3640 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP
3641
3642 /* Control radar events reporting in debugfs file
3643 dfs_block_radar_events */
3644 if (ar->dfs_block_radar_events) {
7aa7a72a 3645 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
7d9b40b4
MP
3646 return;
3647 }
3648
9702c686
JD
3649 ieee80211_radar_detected(ar->hw);
3650}
3651
3652static int ath10k_dfs_fft_report(struct ath10k *ar,
991adf71 3653 struct wmi_phyerr_ev_arg *phyerr,
2332d0ae 3654 const struct phyerr_fft_report *fftr,
9702c686
JD
3655 u64 tsf)
3656{
3657 u32 reg0, reg1;
3658 u8 rssi, peak_mag;
3659
3660 reg0 = __le32_to_cpu(fftr->reg0);
3661 reg1 = __le32_to_cpu(fftr->reg1);
2332d0ae 3662 rssi = phyerr->rssi_combined;
9702c686 3663
7aa7a72a 3664 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD
3665 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
3666 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
3667 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
3668 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
3669 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
7aa7a72a 3670 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD
3671 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
3672 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
3673 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
3674 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
3675 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
3676
3677 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
3678
3679 /* false event detection */
3680 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
3681 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
7aa7a72a 3682 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
9702c686
JD
3683 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
3684 return -EINVAL;
3685 }
3686
3687 return 0;
3688}
3689
0226d602 3690void ath10k_wmi_event_dfs(struct ath10k *ar,
991adf71 3691 struct wmi_phyerr_ev_arg *phyerr,
0226d602 3692 u64 tsf)
9702c686
JD
3693{
3694 int buf_len, tlv_len, res, i = 0;
2332d0ae
MK
3695 const struct phyerr_tlv *tlv;
3696 const struct phyerr_radar_report *rr;
3697 const struct phyerr_fft_report *fftr;
3698 const u8 *tlv_buf;
9702c686 3699
991adf71 3700 buf_len = phyerr->buf_len;
7aa7a72a 3701 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686 3702 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
2332d0ae 3703 phyerr->phy_err_code, phyerr->rssi_combined,
991adf71 3704 phyerr->tsf_timestamp, tsf, buf_len);
9702c686
JD
3705
3706 /* Skip event if DFS disabled */
97f2645f 3707 if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
9702c686
JD
3708 return;
3709
3710 ATH10K_DFS_STAT_INC(ar, pulses_total);
3711
3712 while (i < buf_len) {
3713 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a
MK
3714 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
3715 i);
9702c686
JD
3716 return;
3717 }
3718
2332d0ae 3719 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
9702c686 3720 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 3721 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
7aa7a72a 3722 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD
3723 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
3724 tlv_len, tlv->tag, tlv->sig);
3725
3726 switch (tlv->tag) {
3727 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
3728 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
7aa7a72a 3729 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
9702c686
JD
3730 i);
3731 return;
3732 }
3733
3734 rr = (struct phyerr_radar_report *)tlv_buf;
2332d0ae 3735 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
9702c686
JD
3736 break;
3737 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
3738 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
7aa7a72a
MK
3739 ath10k_warn(ar, "too short fft report (%d)\n",
3740 i);
9702c686
JD
3741 return;
3742 }
3743
3744 fftr = (struct phyerr_fft_report *)tlv_buf;
2332d0ae 3745 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
9702c686
JD
3746 if (res)
3747 return;
3748 break;
3749 }
3750
3751 i += sizeof(*tlv) + tlv_len;
3752 }
3753}
3754
0226d602 3755void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
991adf71 3756 struct wmi_phyerr_ev_arg *phyerr,
0226d602 3757 u64 tsf)
9702c686 3758{
855aed12
SW
3759 int buf_len, tlv_len, res, i = 0;
3760 struct phyerr_tlv *tlv;
2332d0ae
MK
3761 const void *tlv_buf;
3762 const struct phyerr_fft_report *fftr;
855aed12
SW
3763 size_t fftr_len;
3764
991adf71 3765 buf_len = phyerr->buf_len;
855aed12
SW
3766
3767 while (i < buf_len) {
3768 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a 3769 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
855aed12
SW
3770 i);
3771 return;
3772 }
3773
2332d0ae 3774 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
855aed12 3775 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 3776 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
855aed12
SW
3777
3778 if (i + sizeof(*tlv) + tlv_len > buf_len) {
7aa7a72a 3779 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
855aed12
SW
3780 i);
3781 return;
3782 }
3783
3784 switch (tlv->tag) {
3785 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
3786 if (sizeof(*fftr) > tlv_len) {
7aa7a72a 3787 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
855aed12
SW
3788 i);
3789 return;
3790 }
3791
3792 fftr_len = tlv_len - sizeof(*fftr);
2332d0ae
MK
3793 fftr = tlv_buf;
3794 res = ath10k_spectral_process_fft(ar, phyerr,
855aed12
SW
3795 fftr, fftr_len,
3796 tsf);
3797 if (res < 0) {
3413e97d 3798 ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
617b0f4d 3799 res);
855aed12
SW
3800 return;
3801 }
3802 break;
3803 }
3804
3805 i += sizeof(*tlv) + tlv_len;
3806 }
9702c686
JD
3807}
3808
991adf71
RM
3809static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
3810 struct sk_buff *skb,
3811 struct wmi_phyerr_hdr_arg *arg)
32653cf1
MK
3812{
3813 struct wmi_phyerr_event *ev = (void *)skb->data;
3814
3815 if (skb->len < sizeof(*ev))
3816 return -EPROTO;
3817
991adf71
RM
3818 arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
3819 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
3820 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
3821 arg->buf_len = skb->len - sizeof(*ev);
32653cf1
MK
3822 arg->phyerrs = ev->phyerrs;
3823
3824 return 0;
3825}
3826
2b0a2e0d
RM
3827static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
3828 struct sk_buff *skb,
3829 struct wmi_phyerr_hdr_arg *arg)
3830{
3831 struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
3832
3833 if (skb->len < sizeof(*ev))
3834 return -EPROTO;
3835
3836 /* 10.4 firmware always reports only one phyerr */
3837 arg->num_phyerrs = 1;
3838
3839 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
3840 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
3841 arg->buf_len = skb->len;
3842 arg->phyerrs = skb->data;
3843
3844 return 0;
3845}
3846
991adf71
RM
3847int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
3848 const void *phyerr_buf,
3849 int left_len,
3850 struct wmi_phyerr_ev_arg *arg)
3851{
3852 const struct wmi_phyerr *phyerr = phyerr_buf;
3853 int i;
3854
3855 if (left_len < sizeof(*phyerr)) {
ee92a209 3856 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
991adf71
RM
3857 left_len, sizeof(*phyerr));
3858 return -EINVAL;
3859 }
3860
3861 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
3862 arg->freq1 = __le16_to_cpu(phyerr->freq1);
3863 arg->freq2 = __le16_to_cpu(phyerr->freq2);
3864 arg->rssi_combined = phyerr->rssi_combined;
3865 arg->chan_width_mhz = phyerr->chan_width_mhz;
3866 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
3867 arg->buf = phyerr->buf;
3868 arg->hdr_len = sizeof(*phyerr);
3869
3870 for (i = 0; i < 4; i++)
3871 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
3872
3873 switch (phyerr->phy_err_code) {
3874 case PHY_ERROR_GEN_SPECTRAL_SCAN:
3875 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
3876 break;
3877 case PHY_ERROR_GEN_FALSE_RADAR_EXT:
3878 arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
3879 break;
3880 case PHY_ERROR_GEN_RADAR:
3881 arg->phy_err_code = PHY_ERROR_RADAR;
3882 break;
3883 default:
3884 arg->phy_err_code = PHY_ERROR_UNKNOWN;
3885 break;
3886 }
3887
3888 return 0;
3889}
3890
2b0a2e0d
RM
3891static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
3892 const void *phyerr_buf,
3893 int left_len,
3894 struct wmi_phyerr_ev_arg *arg)
3895{
3896 const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
3897 u32 phy_err_mask;
3898 int i;
3899
3900 if (left_len < sizeof(*phyerr)) {
ee92a209 3901 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
2b0a2e0d
RM
3902 left_len, sizeof(*phyerr));
3903 return -EINVAL;
3904 }
3905
3906 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
3907 arg->freq1 = __le16_to_cpu(phyerr->freq1);
3908 arg->freq2 = __le16_to_cpu(phyerr->freq2);
3909 arg->rssi_combined = phyerr->rssi_combined;
3910 arg->chan_width_mhz = phyerr->chan_width_mhz;
3911 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
3912 arg->buf = phyerr->buf;
3913 arg->hdr_len = sizeof(*phyerr);
3914
3915 for (i = 0; i < 4; i++)
3916 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
3917
3918 phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
3919
3920 if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
3921 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
3922 else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
3923 arg->phy_err_code = PHY_ERROR_RADAR;
3924 else
3925 arg->phy_err_code = PHY_ERROR_UNKNOWN;
3926
3927 return 0;
3928}
3929
0226d602 3930void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3931{
991adf71
RM
3932 struct wmi_phyerr_hdr_arg hdr_arg = {};
3933 struct wmi_phyerr_ev_arg phyerr_arg = {};
3934 const void *phyerr;
9702c686
JD
3935 u32 count, i, buf_len, phy_err_code;
3936 u64 tsf;
32653cf1 3937 int left_len, ret;
9702c686
JD
3938
3939 ATH10K_DFS_STAT_INC(ar, phy_errors);
3940
991adf71 3941 ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
32653cf1 3942 if (ret) {
991adf71 3943 ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
9702c686
JD
3944 return;
3945 }
3946
9702c686 3947 /* Check number of included events */
991adf71 3948 count = hdr_arg.num_phyerrs;
9702c686 3949
991adf71
RM
3950 left_len = hdr_arg.buf_len;
3951
3952 tsf = hdr_arg.tsf_u32;
9702c686 3953 tsf <<= 32;
991adf71 3954 tsf |= hdr_arg.tsf_l32;
9702c686 3955
7aa7a72a 3956 ath10k_dbg(ar, ATH10K_DBG_WMI,
9702c686
JD
3957 "wmi event phyerr count %d tsf64 0x%llX\n",
3958 count, tsf);
3959
991adf71 3960 phyerr = hdr_arg.phyerrs;
9702c686 3961 for (i = 0; i < count; i++) {
991adf71
RM
3962 ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
3963 if (ret) {
3964 ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
7aa7a72a 3965 i);
9702c686
JD
3966 return;
3967 }
3968
991adf71
RM
3969 left_len -= phyerr_arg.hdr_len;
3970 buf_len = phyerr_arg.buf_len;
3971 phy_err_code = phyerr_arg.phy_err_code;
9702c686
JD
3972
3973 if (left_len < buf_len) {
7aa7a72a 3974 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
9702c686
JD
3975 return;
3976 }
3977
3978 left_len -= buf_len;
3979
3980 switch (phy_err_code) {
3981 case PHY_ERROR_RADAR:
991adf71 3982 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
9702c686
JD
3983 break;
3984 case PHY_ERROR_SPECTRAL_SCAN:
991adf71 3985 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
9702c686
JD
3986 break;
3987 case PHY_ERROR_FALSE_RADAR_EXT:
991adf71
RM
3988 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
3989 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
9702c686
JD
3990 break;
3991 default:
3992 break;
3993 }
3994
991adf71 3995 phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
9702c686 3996 }
5e3dd157
KV
3997}
3998
0226d602 3999void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4000{
c1a4654a
MK
4001 struct wmi_roam_ev_arg arg = {};
4002 int ret;
4003 u32 vdev_id;
4004 u32 reason;
4005 s32 rssi;
4006
4007 ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
4008 if (ret) {
4009 ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
4010 return;
4011 }
4012
4013 vdev_id = __le32_to_cpu(arg.vdev_id);
4014 reason = __le32_to_cpu(arg.reason);
4015 rssi = __le32_to_cpu(arg.rssi);
4016 rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
4017
4018 ath10k_dbg(ar, ATH10K_DBG_WMI,
4019 "wmi roam event vdev %u reason 0x%08x rssi %d\n",
4020 vdev_id, reason, rssi);
4021
4022 if (reason >= WMI_ROAM_REASON_MAX)
4023 ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
4024 reason, vdev_id);
4025
4026 switch (reason) {
c1a4654a 4027 case WMI_ROAM_REASON_BEACON_MISS:
cc9904e6
MK
4028 ath10k_mac_handle_beacon_miss(ar, vdev_id);
4029 break;
4030 case WMI_ROAM_REASON_BETTER_AP:
c1a4654a
MK
4031 case WMI_ROAM_REASON_LOW_RSSI:
4032 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
4033 case WMI_ROAM_REASON_HO_FAILED:
4034 ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
4035 reason, vdev_id);
4036 break;
4037 }
5e3dd157
KV
4038}
4039
0226d602 4040void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4041{
7aa7a72a 4042 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
5e3dd157
KV
4043}
4044
0226d602 4045void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4046{
2fe5288c
KV
4047 char buf[101], c;
4048 int i;
4049
4050 for (i = 0; i < sizeof(buf) - 1; i++) {
4051 if (i >= skb->len)
4052 break;
4053
4054 c = skb->data[i];
4055
4056 if (c == '\0')
4057 break;
4058
4059 if (isascii(c) && isprint(c))
4060 buf[i] = c;
4061 else
4062 buf[i] = '.';
4063 }
4064
4065 if (i == sizeof(buf) - 1)
7aa7a72a 4066 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2fe5288c
KV
4067
4068 /* for some reason the debug prints end with \n, remove that */
4069 if (skb->data[i - 1] == '\n')
4070 i--;
4071
4072 /* the last byte is always reserved for the null character */
4073 buf[i] = '\0';
4074
3be004c3 4075 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
5e3dd157
KV
4076}
4077
0226d602 4078void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4079{
7aa7a72a 4080 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
5e3dd157
KV
4081}
4082
0226d602 4083void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4084{
7aa7a72a 4085 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
5e3dd157
KV
4086}
4087
0226d602
MK
4088void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
4089 struct sk_buff *skb)
5e3dd157 4090{
7aa7a72a 4091 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV
4092}
4093
0226d602
MK
4094void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
4095 struct sk_buff *skb)
5e3dd157 4096{
7aa7a72a 4097 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV
4098}
4099
0226d602 4100void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4101{
7aa7a72a 4102 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
5e3dd157
KV
4103}
4104
0226d602 4105void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4106{
5fd3ac3c
JD
4107 struct wmi_wow_ev_arg ev = {};
4108 int ret;
4109
4110 complete(&ar->wow.wakeup_completed);
4111
4112 ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
4113 if (ret) {
4114 ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
4115 return;
4116 }
4117
4118 ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
4119 wow_reason(ev.wake_reason));
5e3dd157
KV
4120}
4121
0226d602 4122void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4123{
7aa7a72a 4124 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
5e3dd157
KV
4125}
4126
29542666
MK
4127static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
4128 struct wmi_pdev_tpc_config_event *ev,
4129 u32 rate_idx, u32 num_chains,
4130 u32 rate_code, u8 type)
4131{
4132 u8 tpc, num_streams, preamble, ch, stm_idx;
4133
4134 num_streams = ATH10K_HW_NSS(rate_code);
4135 preamble = ATH10K_HW_PREAMBLE(rate_code);
4136 ch = num_chains - 1;
4137
4138 tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
4139
4140 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
4141 goto out;
4142
4143 if (preamble == WMI_RATE_PREAMBLE_CCK)
4144 goto out;
4145
4146 stm_idx = num_streams - 1;
4147 if (num_chains <= num_streams)
4148 goto out;
4149
4150 switch (type) {
4151 case WMI_TPC_TABLE_TYPE_STBC:
4152 tpc = min_t(u8, tpc,
4153 ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
4154 break;
4155 case WMI_TPC_TABLE_TYPE_TXBF:
4156 tpc = min_t(u8, tpc,
4157 ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
4158 break;
4159 case WMI_TPC_TABLE_TYPE_CDD:
4160 tpc = min_t(u8, tpc,
4161 ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
4162 break;
4163 default:
4164 ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
4165 tpc = 0;
4166 break;
4167 }
4168
4169out:
4170 return tpc;
4171}
4172
4173static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
4174 struct wmi_pdev_tpc_config_event *ev,
4175 struct ath10k_tpc_stats *tpc_stats,
4176 u8 *rate_code, u16 *pream_table, u8 type)
4177{
4178 u32 i, j, pream_idx, flags;
4179 u8 tpc[WMI_TPC_TX_N_CHAIN];
4180 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
4181 char buff[WMI_TPC_BUF_SIZE];
4182
4183 flags = __le32_to_cpu(ev->flags);
4184
4185 switch (type) {
4186 case WMI_TPC_TABLE_TYPE_CDD:
4187 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
4188 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
4189 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4190 return;
4191 }
4192 break;
4193 case WMI_TPC_TABLE_TYPE_STBC:
4194 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
4195 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
4196 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4197 return;
4198 }
4199 break;
4200 case WMI_TPC_TABLE_TYPE_TXBF:
4201 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
4202 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
4203 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4204 return;
4205 }
4206 break;
4207 default:
4208 ath10k_dbg(ar, ATH10K_DBG_WMI,
4209 "invalid table type in wmi tpc event: %d\n", type);
4210 return;
4211 }
4212
4213 pream_idx = 0;
4214 for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
4215 memset(tpc_value, 0, sizeof(tpc_value));
4216 memset(buff, 0, sizeof(buff));
4217 if (i == pream_table[pream_idx])
4218 pream_idx++;
4219
4220 for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
4221 if (j >= __le32_to_cpu(ev->num_tx_chain))
4222 break;
4223
4224 tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
4225 rate_code[i],
4226 type);
4227 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
4228 strncat(tpc_value, buff, strlen(buff));
4229 }
4230 tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
4231 tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
4232 memcpy(tpc_stats->tpc_table[type].tpc_value[i],
4233 tpc_value, sizeof(tpc_value));
4234 }
4235}
4236
0226d602 4237void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4238{
29542666
MK
4239 u32 i, j, pream_idx, num_tx_chain;
4240 u8 rate_code[WMI_TPC_RATE_MAX], rate_idx;
4241 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
4242 struct wmi_pdev_tpc_config_event *ev;
4243 struct ath10k_tpc_stats *tpc_stats;
4244
4245 ev = (struct wmi_pdev_tpc_config_event *)skb->data;
4246
4247 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
4248 if (!tpc_stats)
4249 return;
4250
4251 /* Create the rate code table based on the chains supported */
4252 rate_idx = 0;
4253 pream_idx = 0;
4254
4255 /* Fill CCK rate code */
4256 for (i = 0; i < 4; i++) {
4257 rate_code[rate_idx] =
4258 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
4259 rate_idx++;
4260 }
4261 pream_table[pream_idx] = rate_idx;
4262 pream_idx++;
4263
4264 /* Fill OFDM rate code */
4265 for (i = 0; i < 8; i++) {
4266 rate_code[rate_idx] =
4267 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
4268 rate_idx++;
4269 }
4270 pream_table[pream_idx] = rate_idx;
4271 pream_idx++;
4272
4273 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4274
4275 /* Fill HT20 rate code */
4276 for (i = 0; i < num_tx_chain; i++) {
4277 for (j = 0; j < 8; j++) {
4278 rate_code[rate_idx] =
4279 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4280 rate_idx++;
4281 }
4282 }
4283 pream_table[pream_idx] = rate_idx;
4284 pream_idx++;
4285
4286 /* Fill HT40 rate code */
4287 for (i = 0; i < num_tx_chain; i++) {
4288 for (j = 0; j < 8; j++) {
4289 rate_code[rate_idx] =
4290 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4291 rate_idx++;
4292 }
4293 }
4294 pream_table[pream_idx] = rate_idx;
4295 pream_idx++;
4296
4297 /* Fill VHT20 rate code */
4298 for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) {
4299 for (j = 0; j < 10; j++) {
4300 rate_code[rate_idx] =
4301 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4302 rate_idx++;
4303 }
4304 }
4305 pream_table[pream_idx] = rate_idx;
4306 pream_idx++;
4307
4308 /* Fill VHT40 rate code */
4309 for (i = 0; i < num_tx_chain; i++) {
4310 for (j = 0; j < 10; j++) {
4311 rate_code[rate_idx] =
4312 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4313 rate_idx++;
4314 }
4315 }
4316 pream_table[pream_idx] = rate_idx;
4317 pream_idx++;
4318
4319 /* Fill VHT80 rate code */
4320 for (i = 0; i < num_tx_chain; i++) {
4321 for (j = 0; j < 10; j++) {
4322 rate_code[rate_idx] =
4323 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4324 rate_idx++;
4325 }
4326 }
4327 pream_table[pream_idx] = rate_idx;
4328 pream_idx++;
4329
4330 rate_code[rate_idx++] =
4331 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4332 rate_code[rate_idx++] =
4333 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4334 rate_code[rate_idx++] =
4335 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4336 rate_code[rate_idx++] =
4337 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4338 rate_code[rate_idx++] =
4339 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4340
4341 pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
4342
4343 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
4344 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
4345 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
4346 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
4347 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
4348 tpc_stats->twice_antenna_reduction =
4349 __le32_to_cpu(ev->twice_antenna_reduction);
4350 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
4351 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
4352 tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4353 tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
4354
4355 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4356 rate_code, pream_table,
4357 WMI_TPC_TABLE_TYPE_CDD);
4358 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4359 rate_code, pream_table,
4360 WMI_TPC_TABLE_TYPE_STBC);
4361 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4362 rate_code, pream_table,
4363 WMI_TPC_TABLE_TYPE_TXBF);
4364
4365 ath10k_debug_tpc_stats_process(ar, tpc_stats);
4366
4367 ath10k_dbg(ar, ATH10K_DBG_WMI,
4368 "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
4369 __le32_to_cpu(ev->chan_freq),
4370 __le32_to_cpu(ev->phy_mode),
4371 __le32_to_cpu(ev->ctl),
4372 __le32_to_cpu(ev->reg_domain),
4373 a_sle32_to_cpu(ev->twice_antenna_gain),
4374 __le32_to_cpu(ev->twice_antenna_reduction),
4375 __le32_to_cpu(ev->power_limit),
4376 __le32_to_cpu(ev->twice_max_rd_power) / 2,
4377 __le32_to_cpu(ev->num_tx_chain),
4378 __le32_to_cpu(ev->rate_max));
5e3dd157
KV
4379}
4380
0226d602 4381void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4382{
7aa7a72a 4383 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5e3dd157
KV
4384}
4385
0226d602 4386void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4387{
7aa7a72a 4388 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5e3dd157
KV
4389}
4390
0226d602 4391void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4392{
7aa7a72a 4393 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5e3dd157
KV
4394}
4395
0226d602 4396void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4397{
7aa7a72a 4398 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5e3dd157
KV
4399}
4400
0226d602 4401void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4402{
7aa7a72a 4403 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5e3dd157
KV
4404}
4405
0226d602
MK
4406void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
4407 struct sk_buff *skb)
5e3dd157 4408{
7aa7a72a 4409 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5e3dd157
KV
4410}
4411
0226d602 4412void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4413{
7aa7a72a 4414 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
8a6618b0
BM
4415}
4416
0226d602 4417void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4418{
7aa7a72a 4419 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
8a6618b0
BM
4420}
4421
0226d602 4422void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4423{
7aa7a72a 4424 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
8a6618b0
BM
4425}
4426
b0578865
FF
4427static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
4428 u32 num_units, u32 unit_len)
b3effe61
BM
4429{
4430 dma_addr_t paddr;
b0578865 4431 u32 pool_size = 0;
b3effe61 4432 int idx = ar->wmi.num_mem_chunks;
b0578865 4433 void *vaddr = NULL;
b3effe61 4434
b0578865
FF
4435 if (ar->wmi.num_mem_chunks == ARRAY_SIZE(ar->wmi.mem_chunks))
4436 return -ENOMEM;
b3effe61 4437
b0578865
FF
4438 while (!vaddr && num_units) {
4439 pool_size = num_units * round_up(unit_len, 4);
4440 if (!pool_size)
4441 return -EINVAL;
b3effe61 4442
b0578865
FF
4443 vaddr = kzalloc(pool_size, GFP_KERNEL | __GFP_NOWARN);
4444 if (!vaddr)
4445 num_units /= 2;
b3effe61
BM
4446 }
4447
b0578865
FF
4448 if (!num_units)
4449 return -ENOMEM;
4450
4451 paddr = dma_map_single(ar->dev, vaddr, pool_size, DMA_TO_DEVICE);
4452 if (dma_mapping_error(ar->dev, paddr)) {
4453 kfree(vaddr);
4454 return -ENOMEM;
4455 }
b3effe61 4456
b0578865 4457 ar->wmi.mem_chunks[idx].vaddr = vaddr;
b3effe61
BM
4458 ar->wmi.mem_chunks[idx].paddr = paddr;
4459 ar->wmi.mem_chunks[idx].len = pool_size;
4460 ar->wmi.mem_chunks[idx].req_id = req_id;
4461 ar->wmi.num_mem_chunks++;
4462
b0578865
FF
4463 return num_units;
4464}
4465
4466static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
4467 u32 num_units, u32 unit_len)
4468{
4469 int ret;
4470
4471 while (num_units) {
4472 ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
4473 if (ret < 0)
4474 return ret;
4475
4476 num_units -= ret;
4477 }
4478
b3effe61
BM
4479 return 0;
4480}
4481
a925a376
VT
4482static bool
4483ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
4484 const struct wlan_host_mem_req **mem_reqs,
4485 u32 num_mem_reqs)
4486{
4487 u32 req_id, num_units, unit_size, num_unit_info;
4488 u32 pool_size;
4489 int i, j;
4490 bool found;
4491
4492 if (ar->wmi.num_mem_chunks != num_mem_reqs)
4493 return false;
4494
4495 for (i = 0; i < num_mem_reqs; ++i) {
4496 req_id = __le32_to_cpu(mem_reqs[i]->req_id);
4497 num_units = __le32_to_cpu(mem_reqs[i]->num_units);
4498 unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
4499 num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
4500
4501 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
4502 if (ar->num_active_peers)
4503 num_units = ar->num_active_peers + 1;
4504 else
4505 num_units = ar->max_num_peers + 1;
4506 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
4507 num_units = ar->max_num_peers + 1;
4508 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
4509 num_units = ar->max_num_vdevs + 1;
4510 }
4511
4512 found = false;
4513 for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
4514 if (ar->wmi.mem_chunks[j].req_id == req_id) {
4515 pool_size = num_units * round_up(unit_size, 4);
4516 if (ar->wmi.mem_chunks[j].len == pool_size) {
4517 found = true;
4518 break;
4519 }
4520 }
4521 }
4522 if (!found)
4523 return false;
4524 }
4525
4526 return true;
4527}
4528
d7579d12
MK
4529static int
4530ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4531 struct wmi_svc_rdy_ev_arg *arg)
5c01aa3d
MK
4532{
4533 struct wmi_service_ready_event *ev;
4534 size_t i, n;
4535
4536 if (skb->len < sizeof(*ev))
4537 return -EPROTO;
4538
4539 ev = (void *)skb->data;
4540 skb_pull(skb, sizeof(*ev));
4541 arg->min_tx_power = ev->hw_min_tx_power;
4542 arg->max_tx_power = ev->hw_max_tx_power;
4543 arg->ht_cap = ev->ht_cap_info;
4544 arg->vht_cap = ev->vht_cap_info;
4545 arg->sw_ver0 = ev->sw_version;
4546 arg->sw_ver1 = ev->sw_version_1;
4547 arg->phy_capab = ev->phy_capability;
4548 arg->num_rf_chains = ev->num_rf_chains;
4549 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
4550 arg->num_mem_reqs = ev->num_mem_reqs;
4551 arg->service_map = ev->wmi_service_bitmap;
2a3e60d3 4552 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5c01aa3d
MK
4553
4554 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
4555 ARRAY_SIZE(arg->mem_reqs));
4556 for (i = 0; i < n; i++)
4557 arg->mem_reqs[i] = &ev->mem_reqs[i];
4558
4559 if (skb->len <
4560 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
4561 return -EPROTO;
4562
4563 return 0;
4564}
4565
d7579d12
MK
4566static int
4567ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4568 struct wmi_svc_rdy_ev_arg *arg)
5c01aa3d
MK
4569{
4570 struct wmi_10x_service_ready_event *ev;
4571 int i, n;
4572
4573 if (skb->len < sizeof(*ev))
4574 return -EPROTO;
4575
4576 ev = (void *)skb->data;
4577 skb_pull(skb, sizeof(*ev));
4578 arg->min_tx_power = ev->hw_min_tx_power;
4579 arg->max_tx_power = ev->hw_max_tx_power;
4580 arg->ht_cap = ev->ht_cap_info;
4581 arg->vht_cap = ev->vht_cap_info;
4582 arg->sw_ver0 = ev->sw_version;
4583 arg->phy_capab = ev->phy_capability;
4584 arg->num_rf_chains = ev->num_rf_chains;
4585 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
4586 arg->num_mem_reqs = ev->num_mem_reqs;
4587 arg->service_map = ev->wmi_service_bitmap;
2a3e60d3 4588 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5c01aa3d
MK
4589
4590 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
4591 ARRAY_SIZE(arg->mem_reqs));
4592 for (i = 0; i < n; i++)
4593 arg->mem_reqs[i] = &ev->mem_reqs[i];
4594
4595 if (skb->len <
4596 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
4597 return -EPROTO;
4598
4599 return 0;
4600}
4601
c8ecfc1c 4602static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
5e3dd157 4603{
c8ecfc1c
RM
4604 struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
4605 struct sk_buff *skb = ar->svc_rdy_skb;
5c01aa3d
MK
4606 struct wmi_svc_rdy_ev_arg arg = {};
4607 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
5c01aa3d 4608 int ret;
a925a376 4609 bool allocated;
5c01aa3d 4610
c8ecfc1c
RM
4611 if (!skb) {
4612 ath10k_warn(ar, "invalid service ready event skb\n");
4613 return;
4614 }
4615
d7579d12 4616 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
5c01aa3d
MK
4617 if (ret) {
4618 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5e3dd157
KV
4619 return;
4620 }
4621
d7579d12
MK
4622 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
4623 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
4624 arg.service_map_len);
4625
5c01aa3d
MK
4626 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
4627 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
4628 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
4629 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5e3dd157 4630 ar->fw_version_major =
5c01aa3d
MK
4631 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
4632 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5e3dd157 4633 ar->fw_version_release =
5c01aa3d
MK
4634 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
4635 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
4636 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
4637 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
4638 ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
4639
5c01aa3d 4640 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
2a3e60d3 4641 arg.service_map, arg.service_map_len);
8865bee4 4642
5c8726ec 4643 if (ar->num_rf_chains > ar->max_spatial_stream) {
7aa7a72a 4644 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
5c8726ec
RM
4645 ar->num_rf_chains, ar->max_spatial_stream);
4646 ar->num_rf_chains = ar->max_spatial_stream;
8865bee4 4647 }
5e3dd157 4648
166de3f1
RM
4649 if (!ar->cfg_tx_chainmask) {
4650 ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
4651 ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
4652 }
fdb959c7 4653
5e3dd157
KV
4654 if (strlen(ar->hw->wiphy->fw_version) == 0) {
4655 snprintf(ar->hw->wiphy->fw_version,
4656 sizeof(ar->hw->wiphy->fw_version),
4657 "%u.%u.%u.%u",
4658 ar->fw_version_major,
4659 ar->fw_version_minor,
4660 ar->fw_version_release,
4661 ar->fw_version_build);
4662 }
4663
5c01aa3d
MK
4664 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
4665 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
7aa7a72a 4666 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
b3effe61
BM
4667 num_mem_reqs);
4668 return;
6f97d256
BM
4669 }
4670
b0399417 4671 if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
99ad1cba 4672 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
c4cdf753 4673 ar->running_fw->fw_file.fw_features))
99ad1cba
MK
4674 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
4675 ar->max_num_vdevs;
4676 else
4677 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
4678 ar->max_num_vdevs;
4679
b0399417 4680 ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
5699a6f2 4681 ar->max_num_vdevs;
b0399417
RM
4682 ar->num_tids = ar->num_active_peers * 2;
4683 ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
4684 }
4685
4686 /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
4687 * and WMI_SERVICE_IRAM_TIDS, etc.
4688 */
4689
a925a376
VT
4690 allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
4691 num_mem_reqs);
4692 if (allocated)
4693 goto skip_mem_alloc;
4694
4695 /* Either this event is received during boot time or there is a change
4696 * in memory requirement from firmware when compared to last request.
4697 * Free any old memory and do a fresh allocation based on the current
4698 * memory requirement.
4699 */
4700 ath10k_wmi_free_host_mem(ar);
4701
b3effe61 4702 for (i = 0; i < num_mem_reqs; ++i) {
5c01aa3d
MK
4703 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
4704 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
4705 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
4706 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
b3effe61 4707
b0399417
RM
4708 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
4709 if (ar->num_active_peers)
4710 num_units = ar->num_active_peers + 1;
4711 else
4712 num_units = ar->max_num_peers + 1;
4713 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
b3effe61
BM
4714 /* number of units to allocate is number of
4715 * peers, 1 extra for self peer on target */
4716 /* this needs to be tied, host and target
4717 * can get out of sync */
b0399417
RM
4718 num_units = ar->max_num_peers + 1;
4719 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
4720 num_units = ar->max_num_vdevs + 1;
4721 }
b3effe61 4722
7aa7a72a 4723 ath10k_dbg(ar, ATH10K_DBG_WMI,
b3effe61
BM
4724 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
4725 req_id,
5c01aa3d 4726 __le32_to_cpu(arg.mem_reqs[i]->num_units),
b3effe61
BM
4727 num_unit_info,
4728 unit_size,
4729 num_units);
4730
4731 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
4732 unit_size);
4733 if (ret)
4734 return;
4735 }
4736
a925a376 4737skip_mem_alloc:
7aa7a72a 4738 ath10k_dbg(ar, ATH10K_DBG_WMI,
ca996ec5 4739 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
5c01aa3d
MK
4740 __le32_to_cpu(arg.min_tx_power),
4741 __le32_to_cpu(arg.max_tx_power),
4742 __le32_to_cpu(arg.ht_cap),
4743 __le32_to_cpu(arg.vht_cap),
4744 __le32_to_cpu(arg.sw_ver0),
4745 __le32_to_cpu(arg.sw_ver1),
ca996ec5 4746 __le32_to_cpu(arg.fw_build),
5c01aa3d
MK
4747 __le32_to_cpu(arg.phy_capab),
4748 __le32_to_cpu(arg.num_rf_chains),
4749 __le32_to_cpu(arg.eeprom_rd),
4750 __le32_to_cpu(arg.num_mem_reqs));
6f97d256 4751
c8ecfc1c
RM
4752 dev_kfree_skb(skb);
4753 ar->svc_rdy_skb = NULL;
6f97d256
BM
4754 complete(&ar->wmi.service_ready);
4755}
4756
c8ecfc1c
RM
4757void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
4758{
4759 ar->svc_rdy_skb = skb;
4760 queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
4761}
4762
d7579d12
MK
4763static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4764 struct wmi_rdy_ev_arg *arg)
5e3dd157 4765{
32653cf1 4766 struct wmi_ready_event *ev = (void *)skb->data;
5e3dd157 4767
32653cf1
MK
4768 if (skb->len < sizeof(*ev))
4769 return -EPROTO;
4770
4771 skb_pull(skb, sizeof(*ev));
4772 arg->sw_version = ev->sw_version;
4773 arg->abi_version = ev->abi_version;
4774 arg->status = ev->status;
4775 arg->mac_addr = ev->mac_addr.addr;
4776
4777 return 0;
4778}
5e3dd157 4779
c1a4654a
MK
4780static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
4781 struct wmi_roam_ev_arg *arg)
4782{
4783 struct wmi_roam_ev *ev = (void *)skb->data;
4784
4785 if (skb->len < sizeof(*ev))
4786 return -EPROTO;
4787
4788 skb_pull(skb, sizeof(*ev));
4789 arg->vdev_id = ev->vdev_id;
4790 arg->reason = ev->reason;
4791
4792 return 0;
4793}
4794
0226d602 4795int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
32653cf1
MK
4796{
4797 struct wmi_rdy_ev_arg arg = {};
4798 int ret;
4799
d7579d12 4800 ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
32653cf1
MK
4801 if (ret) {
4802 ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
4803 return ret;
4804 }
5e3dd157 4805
7aa7a72a 4806 ath10k_dbg(ar, ATH10K_DBG_WMI,
32653cf1
MK
4807 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
4808 __le32_to_cpu(arg.sw_version),
4809 __le32_to_cpu(arg.abi_version),
4810 arg.mac_addr,
4811 __le32_to_cpu(arg.status));
5e3dd157 4812
32653cf1 4813 ether_addr_copy(ar->mac_addr, arg.mac_addr);
5e3dd157
KV
4814 complete(&ar->wmi.unified_ready);
4815 return 0;
4816}
4817
a57a6a27
RM
4818static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
4819{
4820 const struct wmi_pdev_temperature_event *ev;
4821
4822 ev = (struct wmi_pdev_temperature_event *)skb->data;
4823 if (WARN_ON(skb->len < sizeof(*ev)))
4824 return -EPROTO;
4825
ac2953fc 4826 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
a57a6a27
RM
4827 return 0;
4828}
4829
89d2d183
RM
4830static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
4831 struct sk_buff *skb)
4832{
4833 struct wmi_pdev_bss_chan_info_event *ev;
fa7937e3 4834 struct survey_info *survey;
89d2d183
RM
4835 u64 busy, total, tx, rx, rx_bss;
4836 u32 freq, noise_floor;
fa7937e3
RM
4837 u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
4838 int idx;
89d2d183
RM
4839
4840 ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
4841 if (WARN_ON(skb->len < sizeof(*ev)))
4842 return -EPROTO;
4843
4844 freq = __le32_to_cpu(ev->freq);
4845 noise_floor = __le32_to_cpu(ev->noise_floor);
4846 busy = __le64_to_cpu(ev->cycle_busy);
4847 total = __le64_to_cpu(ev->cycle_total);
4848 tx = __le64_to_cpu(ev->cycle_tx);
4849 rx = __le64_to_cpu(ev->cycle_rx);
4850 rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
4851
4852 ath10k_dbg(ar, ATH10K_DBG_WMI,
4853 "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
4854 freq, noise_floor, busy, total, tx, rx, rx_bss);
4855
fa7937e3
RM
4856 spin_lock_bh(&ar->data_lock);
4857 idx = freq_to_idx(ar, freq);
4858 if (idx >= ARRAY_SIZE(ar->survey)) {
4859 ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
4860 freq, idx);
4861 goto exit;
4862 }
4863
4864 survey = &ar->survey[idx];
4865
4866 survey->noise = noise_floor;
4867 survey->time = div_u64(total, cc_freq_hz);
4868 survey->time_busy = div_u64(busy, cc_freq_hz);
4869 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
4870 survey->time_tx = div_u64(tx, cc_freq_hz);
4871 survey->filled |= (SURVEY_INFO_NOISE_DBM |
4872 SURVEY_INFO_TIME |
4873 SURVEY_INFO_TIME_BUSY |
4874 SURVEY_INFO_TIME_RX |
4875 SURVEY_INFO_TIME_TX);
4876exit:
4877 spin_unlock_bh(&ar->data_lock);
4878 complete(&ar->bss_survey_done);
89d2d183
RM
4879 return 0;
4880}
4881
d7579d12 4882static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV
4883{
4884 struct wmi_cmd_hdr *cmd_hdr;
4885 enum wmi_event_id id;
5e3dd157
KV
4886
4887 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
4888 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
4889
4890 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 4891 goto out;
5e3dd157 4892
d35a6c18 4893 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5e3dd157
KV
4894
4895 switch (id) {
4896 case WMI_MGMT_RX_EVENTID:
4897 ath10k_wmi_event_mgmt_rx(ar, skb);
4898 /* mgmt_rx() owns the skb now! */
4899 return;
4900 case WMI_SCAN_EVENTID:
4901 ath10k_wmi_event_scan(ar, skb);
4902 break;
4903 case WMI_CHAN_INFO_EVENTID:
4904 ath10k_wmi_event_chan_info(ar, skb);
4905 break;
4906 case WMI_ECHO_EVENTID:
4907 ath10k_wmi_event_echo(ar, skb);
4908 break;
4909 case WMI_DEBUG_MESG_EVENTID:
4910 ath10k_wmi_event_debug_mesg(ar, skb);
4911 break;
4912 case WMI_UPDATE_STATS_EVENTID:
4913 ath10k_wmi_event_update_stats(ar, skb);
4914 break;
4915 case WMI_VDEV_START_RESP_EVENTID:
4916 ath10k_wmi_event_vdev_start_resp(ar, skb);
4917 break;
4918 case WMI_VDEV_STOPPED_EVENTID:
4919 ath10k_wmi_event_vdev_stopped(ar, skb);
4920 break;
4921 case WMI_PEER_STA_KICKOUT_EVENTID:
4922 ath10k_wmi_event_peer_sta_kickout(ar, skb);
4923 break;
4924 case WMI_HOST_SWBA_EVENTID:
4925 ath10k_wmi_event_host_swba(ar, skb);
4926 break;
4927 case WMI_TBTTOFFSET_UPDATE_EVENTID:
4928 ath10k_wmi_event_tbttoffset_update(ar, skb);
4929 break;
4930 case WMI_PHYERR_EVENTID:
4931 ath10k_wmi_event_phyerr(ar, skb);
4932 break;
4933 case WMI_ROAM_EVENTID:
4934 ath10k_wmi_event_roam(ar, skb);
4935 break;
4936 case WMI_PROFILE_MATCH:
4937 ath10k_wmi_event_profile_match(ar, skb);
4938 break;
4939 case WMI_DEBUG_PRINT_EVENTID:
4940 ath10k_wmi_event_debug_print(ar, skb);
4941 break;
4942 case WMI_PDEV_QVIT_EVENTID:
4943 ath10k_wmi_event_pdev_qvit(ar, skb);
4944 break;
4945 case WMI_WLAN_PROFILE_DATA_EVENTID:
4946 ath10k_wmi_event_wlan_profile_data(ar, skb);
4947 break;
4948 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
4949 ath10k_wmi_event_rtt_measurement_report(ar, skb);
4950 break;
4951 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
4952 ath10k_wmi_event_tsf_measurement_report(ar, skb);
4953 break;
4954 case WMI_RTT_ERROR_REPORT_EVENTID:
4955 ath10k_wmi_event_rtt_error_report(ar, skb);
4956 break;
4957 case WMI_WOW_WAKEUP_HOST_EVENTID:
4958 ath10k_wmi_event_wow_wakeup_host(ar, skb);
4959 break;
4960 case WMI_DCS_INTERFERENCE_EVENTID:
4961 ath10k_wmi_event_dcs_interference(ar, skb);
4962 break;
4963 case WMI_PDEV_TPC_CONFIG_EVENTID:
4964 ath10k_wmi_event_pdev_tpc_config(ar, skb);
4965 break;
4966 case WMI_PDEV_FTM_INTG_EVENTID:
4967 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
4968 break;
4969 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
4970 ath10k_wmi_event_gtk_offload_status(ar, skb);
4971 break;
4972 case WMI_GTK_REKEY_FAIL_EVENTID:
4973 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
4974 break;
4975 case WMI_TX_DELBA_COMPLETE_EVENTID:
4976 ath10k_wmi_event_delba_complete(ar, skb);
4977 break;
4978 case WMI_TX_ADDBA_COMPLETE_EVENTID:
4979 ath10k_wmi_event_addba_complete(ar, skb);
4980 break;
4981 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
4982 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
4983 break;
4984 case WMI_SERVICE_READY_EVENTID:
b34d2b3d 4985 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 4986 return;
5e3dd157 4987 case WMI_READY_EVENTID:
b34d2b3d 4988 ath10k_wmi_event_ready(ar, skb);
5e3dd157
KV
4989 break;
4990 default:
7aa7a72a 4991 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5e3dd157
KV
4992 break;
4993 }
4994
469d479f 4995out:
5e3dd157
KV
4996 dev_kfree_skb(skb);
4997}
4998
d7579d12 4999static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
8a6618b0
BM
5000{
5001 struct wmi_cmd_hdr *cmd_hdr;
5002 enum wmi_10x_event_id id;
43d2a30f 5003 bool consumed;
8a6618b0
BM
5004
5005 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5006 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5007
5008 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 5009 goto out;
8a6618b0 5010
d35a6c18 5011 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
8a6618b0 5012
43d2a30f
KV
5013 consumed = ath10k_tm_event_wmi(ar, id, skb);
5014
5015 /* Ready event must be handled normally also in UTF mode so that we
5016 * know the UTF firmware has booted, others we are just bypass WMI
5017 * events to testmode.
5018 */
5019 if (consumed && id != WMI_10X_READY_EVENTID) {
5020 ath10k_dbg(ar, ATH10K_DBG_WMI,
5021 "wmi testmode consumed 0x%x\n", id);
5022 goto out;
5023 }
5024
8a6618b0
BM
5025 switch (id) {
5026 case WMI_10X_MGMT_RX_EVENTID:
5027 ath10k_wmi_event_mgmt_rx(ar, skb);
5028 /* mgmt_rx() owns the skb now! */
5029 return;
5030 case WMI_10X_SCAN_EVENTID:
5031 ath10k_wmi_event_scan(ar, skb);
5032 break;
5033 case WMI_10X_CHAN_INFO_EVENTID:
5034 ath10k_wmi_event_chan_info(ar, skb);
5035 break;
5036 case WMI_10X_ECHO_EVENTID:
5037 ath10k_wmi_event_echo(ar, skb);
5038 break;
5039 case WMI_10X_DEBUG_MESG_EVENTID:
5040 ath10k_wmi_event_debug_mesg(ar, skb);
5041 break;
5042 case WMI_10X_UPDATE_STATS_EVENTID:
5043 ath10k_wmi_event_update_stats(ar, skb);
5044 break;
5045 case WMI_10X_VDEV_START_RESP_EVENTID:
5046 ath10k_wmi_event_vdev_start_resp(ar, skb);
5047 break;
5048 case WMI_10X_VDEV_STOPPED_EVENTID:
5049 ath10k_wmi_event_vdev_stopped(ar, skb);
5050 break;
5051 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
5052 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5053 break;
5054 case WMI_10X_HOST_SWBA_EVENTID:
5055 ath10k_wmi_event_host_swba(ar, skb);
5056 break;
5057 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
5058 ath10k_wmi_event_tbttoffset_update(ar, skb);
5059 break;
5060 case WMI_10X_PHYERR_EVENTID:
5061 ath10k_wmi_event_phyerr(ar, skb);
5062 break;
5063 case WMI_10X_ROAM_EVENTID:
5064 ath10k_wmi_event_roam(ar, skb);
5065 break;
5066 case WMI_10X_PROFILE_MATCH:
5067 ath10k_wmi_event_profile_match(ar, skb);
5068 break;
5069 case WMI_10X_DEBUG_PRINT_EVENTID:
5070 ath10k_wmi_event_debug_print(ar, skb);
5071 break;
5072 case WMI_10X_PDEV_QVIT_EVENTID:
5073 ath10k_wmi_event_pdev_qvit(ar, skb);
5074 break;
5075 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
5076 ath10k_wmi_event_wlan_profile_data(ar, skb);
5077 break;
5078 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
5079 ath10k_wmi_event_rtt_measurement_report(ar, skb);
5080 break;
5081 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
5082 ath10k_wmi_event_tsf_measurement_report(ar, skb);
5083 break;
5084 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
5085 ath10k_wmi_event_rtt_error_report(ar, skb);
5086 break;
5087 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
5088 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5089 break;
5090 case WMI_10X_DCS_INTERFERENCE_EVENTID:
5091 ath10k_wmi_event_dcs_interference(ar, skb);
5092 break;
5093 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
5094 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5095 break;
5096 case WMI_10X_INST_RSSI_STATS_EVENTID:
5097 ath10k_wmi_event_inst_rssi_stats(ar, skb);
5098 break;
5099 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
5100 ath10k_wmi_event_vdev_standby_req(ar, skb);
5101 break;
5102 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
5103 ath10k_wmi_event_vdev_resume_req(ar, skb);
5104 break;
5105 case WMI_10X_SERVICE_READY_EVENTID:
b34d2b3d 5106 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5107 return;
8a6618b0 5108 case WMI_10X_READY_EVENTID:
b34d2b3d 5109 ath10k_wmi_event_ready(ar, skb);
8a6618b0 5110 break;
43d2a30f
KV
5111 case WMI_10X_PDEV_UTF_EVENTID:
5112 /* ignore utf events */
5113 break;
8a6618b0 5114 default:
7aa7a72a 5115 ath10k_warn(ar, "Unknown eventid: %d\n", id);
8a6618b0
BM
5116 break;
5117 }
5118
43d2a30f 5119out:
8a6618b0
BM
5120 dev_kfree_skb(skb);
5121}
5122
d7579d12 5123static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
24c88f78
MK
5124{
5125 struct wmi_cmd_hdr *cmd_hdr;
5126 enum wmi_10_2_event_id id;
5127
5128 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5129 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5130
5131 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 5132 goto out;
24c88f78 5133
d35a6c18 5134 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
24c88f78
MK
5135
5136 switch (id) {
5137 case WMI_10_2_MGMT_RX_EVENTID:
5138 ath10k_wmi_event_mgmt_rx(ar, skb);
5139 /* mgmt_rx() owns the skb now! */
5140 return;
5141 case WMI_10_2_SCAN_EVENTID:
5142 ath10k_wmi_event_scan(ar, skb);
5143 break;
5144 case WMI_10_2_CHAN_INFO_EVENTID:
5145 ath10k_wmi_event_chan_info(ar, skb);
5146 break;
5147 case WMI_10_2_ECHO_EVENTID:
5148 ath10k_wmi_event_echo(ar, skb);
5149 break;
5150 case WMI_10_2_DEBUG_MESG_EVENTID:
5151 ath10k_wmi_event_debug_mesg(ar, skb);
5152 break;
5153 case WMI_10_2_UPDATE_STATS_EVENTID:
5154 ath10k_wmi_event_update_stats(ar, skb);
5155 break;
5156 case WMI_10_2_VDEV_START_RESP_EVENTID:
5157 ath10k_wmi_event_vdev_start_resp(ar, skb);
5158 break;
5159 case WMI_10_2_VDEV_STOPPED_EVENTID:
5160 ath10k_wmi_event_vdev_stopped(ar, skb);
5161 break;
5162 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
5163 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5164 break;
5165 case WMI_10_2_HOST_SWBA_EVENTID:
5166 ath10k_wmi_event_host_swba(ar, skb);
5167 break;
5168 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
5169 ath10k_wmi_event_tbttoffset_update(ar, skb);
5170 break;
5171 case WMI_10_2_PHYERR_EVENTID:
5172 ath10k_wmi_event_phyerr(ar, skb);
5173 break;
5174 case WMI_10_2_ROAM_EVENTID:
5175 ath10k_wmi_event_roam(ar, skb);
5176 break;
5177 case WMI_10_2_PROFILE_MATCH:
5178 ath10k_wmi_event_profile_match(ar, skb);
5179 break;
5180 case WMI_10_2_DEBUG_PRINT_EVENTID:
5181 ath10k_wmi_event_debug_print(ar, skb);
5182 break;
5183 case WMI_10_2_PDEV_QVIT_EVENTID:
5184 ath10k_wmi_event_pdev_qvit(ar, skb);
5185 break;
5186 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
5187 ath10k_wmi_event_wlan_profile_data(ar, skb);
5188 break;
5189 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
5190 ath10k_wmi_event_rtt_measurement_report(ar, skb);
5191 break;
5192 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
5193 ath10k_wmi_event_tsf_measurement_report(ar, skb);
5194 break;
5195 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
5196 ath10k_wmi_event_rtt_error_report(ar, skb);
5197 break;
5198 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
5199 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5200 break;
5201 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
5202 ath10k_wmi_event_dcs_interference(ar, skb);
5203 break;
5204 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
5205 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5206 break;
5207 case WMI_10_2_INST_RSSI_STATS_EVENTID:
5208 ath10k_wmi_event_inst_rssi_stats(ar, skb);
5209 break;
5210 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
5211 ath10k_wmi_event_vdev_standby_req(ar, skb);
5212 break;
5213 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
5214 ath10k_wmi_event_vdev_resume_req(ar, skb);
5215 break;
5216 case WMI_10_2_SERVICE_READY_EVENTID:
b34d2b3d 5217 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5218 return;
24c88f78 5219 case WMI_10_2_READY_EVENTID:
b34d2b3d 5220 ath10k_wmi_event_ready(ar, skb);
24c88f78 5221 break;
a57a6a27
RM
5222 case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
5223 ath10k_wmi_event_temperature(ar, skb);
5224 break;
89d2d183
RM
5225 case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
5226 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
5227 break;
24c88f78
MK
5228 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
5229 case WMI_10_2_GPIO_INPUT_EVENTID:
5230 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
5231 case WMI_10_2_GENERIC_BUFFER_EVENTID:
5232 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
5233 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
5234 case WMI_10_2_WDS_PEER_EVENTID:
7aa7a72a 5235 ath10k_dbg(ar, ATH10K_DBG_WMI,
24c88f78
MK
5236 "received event id %d not implemented\n", id);
5237 break;
5238 default:
7aa7a72a 5239 ath10k_warn(ar, "Unknown eventid: %d\n", id);
24c88f78
MK
5240 break;
5241 }
5242
469d479f 5243out:
24c88f78
MK
5244 dev_kfree_skb(skb);
5245}
8a6618b0 5246
1c092961
RM
5247static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
5248{
5249 struct wmi_cmd_hdr *cmd_hdr;
5250 enum wmi_10_4_event_id id;
5251
5252 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5253 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5254
5255 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
5256 goto out;
5257
5258 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5259
5260 switch (id) {
5261 case WMI_10_4_MGMT_RX_EVENTID:
5262 ath10k_wmi_event_mgmt_rx(ar, skb);
5263 /* mgmt_rx() owns the skb now! */
5264 return;
373b48cf
RM
5265 case WMI_10_4_ECHO_EVENTID:
5266 ath10k_wmi_event_echo(ar, skb);
5267 break;
5268 case WMI_10_4_DEBUG_MESG_EVENTID:
5269 ath10k_wmi_event_debug_mesg(ar, skb);
5270 break;
5271 case WMI_10_4_SERVICE_READY_EVENTID:
5272 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5273 return;
b2297baa
RM
5274 case WMI_10_4_SCAN_EVENTID:
5275 ath10k_wmi_event_scan(ar, skb);
5276 break;
5277 case WMI_10_4_CHAN_INFO_EVENTID:
5278 ath10k_wmi_event_chan_info(ar, skb);
5279 break;
2b0a2e0d
RM
5280 case WMI_10_4_PHYERR_EVENTID:
5281 ath10k_wmi_event_phyerr(ar, skb);
5282 break;
d02e752f
RM
5283 case WMI_10_4_READY_EVENTID:
5284 ath10k_wmi_event_ready(ar, skb);
5285 break;
373b48cf
RM
5286 case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
5287 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5288 break;
343bf960
MSS
5289 case WMI_10_4_ROAM_EVENTID:
5290 ath10k_wmi_event_roam(ar, skb);
5291 break;
3cec3be3
RM
5292 case WMI_10_4_HOST_SWBA_EVENTID:
5293 ath10k_wmi_event_host_swba(ar, skb);
5294 break;
373b48cf
RM
5295 case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
5296 ath10k_wmi_event_tbttoffset_update(ar, skb);
5297 break;
5298 case WMI_10_4_DEBUG_PRINT_EVENTID:
5299 ath10k_wmi_event_debug_print(ar, skb);
5300 break;
5301 case WMI_10_4_VDEV_START_RESP_EVENTID:
5302 ath10k_wmi_event_vdev_start_resp(ar, skb);
5303 break;
5304 case WMI_10_4_VDEV_STOPPED_EVENTID:
5305 ath10k_wmi_event_vdev_stopped(ar, skb);
5306 break;
5307 case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
36bd39bb 5308 case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
373b48cf
RM
5309 ath10k_dbg(ar, ATH10K_DBG_WMI,
5310 "received event id %d not implemented\n", id);
5311 break;
98dd2b92
MP
5312 case WMI_10_4_UPDATE_STATS_EVENTID:
5313 ath10k_wmi_event_update_stats(ar, skb);
5314 break;
6dd46348
T
5315 case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
5316 ath10k_wmi_event_temperature(ar, skb);
5317 break;
89d2d183
RM
5318 case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
5319 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
5320 break;
1c092961
RM
5321 default:
5322 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5323 break;
5324 }
5325
5326out:
5327 dev_kfree_skb(skb);
5328}
5329
ce42870e
BM
5330static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
5331{
d7579d12
MK
5332 int ret;
5333
5334 ret = ath10k_wmi_rx(ar, skb);
5335 if (ret)
5336 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
ce42870e
BM
5337}
5338
95bf21f9 5339int ath10k_wmi_connect(struct ath10k *ar)
5e3dd157
KV
5340{
5341 int status;
5342 struct ath10k_htc_svc_conn_req conn_req;
5343 struct ath10k_htc_svc_conn_resp conn_resp;
5344
5345 memset(&conn_req, 0, sizeof(conn_req));
5346 memset(&conn_resp, 0, sizeof(conn_resp));
5347
5348 /* these fields are the same for all service endpoints */
5349 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
5350 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 5351 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV
5352
5353 /* connect to control service */
5354 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
5355
cd003fad 5356 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157 5357 if (status) {
7aa7a72a 5358 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
5e3dd157
KV
5359 status);
5360 return status;
5361 }
5362
5363 ar->wmi.eid = conn_resp.eid;
5364 return 0;
5365}
5366
d7579d12
MK
5367static struct sk_buff *
5368ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
5369 u16 ctl2g, u16 ctl5g,
5370 enum wmi_dfs_region dfs_reg)
5e3dd157
KV
5371{
5372 struct wmi_pdev_set_regdomain_cmd *cmd;
5373 struct sk_buff *skb;
5374
7aa7a72a 5375 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5376 if (!skb)
d7579d12 5377 return ERR_PTR(-ENOMEM);
5e3dd157
KV
5378
5379 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
5380 cmd->reg_domain = __cpu_to_le32(rd);
5381 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
5382 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
5383 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
5384 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
5385
7aa7a72a 5386 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
5387 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
5388 rd, rd2g, rd5g, ctl2g, ctl5g);
d7579d12 5389 return skb;
5e3dd157
KV
5390}
5391
d7579d12
MK
5392static struct sk_buff *
5393ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
5394 rd5g, u16 ctl2g, u16 ctl5g,
5395 enum wmi_dfs_region dfs_reg)
821af6ae
MP
5396{
5397 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
5398 struct sk_buff *skb;
5399
7aa7a72a 5400 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
821af6ae 5401 if (!skb)
d7579d12 5402 return ERR_PTR(-ENOMEM);
821af6ae
MP
5403
5404 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
5405 cmd->reg_domain = __cpu_to_le32(rd);
5406 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
5407 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
5408 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
5409 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
5410 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
5411
7aa7a72a 5412 ath10k_dbg(ar, ATH10K_DBG_WMI,
821af6ae
MP
5413 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
5414 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
d7579d12 5415 return skb;
821af6ae
MP
5416}
5417
d7579d12
MK
5418static struct sk_buff *
5419ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
5e3dd157
KV
5420{
5421 struct wmi_pdev_suspend_cmd *cmd;
5422 struct sk_buff *skb;
5423
7aa7a72a 5424 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5425 if (!skb)
d7579d12 5426 return ERR_PTR(-ENOMEM);
5e3dd157
KV
5427
5428 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
00f5482b 5429 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
5e3dd157 5430
d7579d12 5431 return skb;
5e3dd157
KV
5432}
5433
d7579d12
MK
5434static struct sk_buff *
5435ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
5e3dd157
KV
5436{
5437 struct sk_buff *skb;
5438
7aa7a72a 5439 skb = ath10k_wmi_alloc_skb(ar, 0);
d7579d12
MK
5440 if (!skb)
5441 return ERR_PTR(-ENOMEM);
5e3dd157 5442
d7579d12 5443 return skb;
5e3dd157
KV
5444}
5445
d7579d12
MK
5446static struct sk_buff *
5447ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV
5448{
5449 struct wmi_pdev_set_param_cmd *cmd;
5450 struct sk_buff *skb;
5451
226a339b 5452 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
7aa7a72a
MK
5453 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
5454 id);
d7579d12 5455 return ERR_PTR(-EOPNOTSUPP);
226a339b
BM
5456 }
5457
7aa7a72a 5458 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5459 if (!skb)
d7579d12 5460 return ERR_PTR(-ENOMEM);
5e3dd157
KV
5461
5462 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
5463 cmd->param_id = __cpu_to_le32(id);
5464 cmd->param_value = __cpu_to_le32(value);
5465
7aa7a72a 5466 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
5e3dd157 5467 id, value);
d7579d12 5468 return skb;
5e3dd157
KV
5469}
5470
0226d602
MK
5471void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
5472 struct wmi_host_mem_chunks *chunks)
cf9fca8f
MK
5473{
5474 struct host_memory_chunk *chunk;
5475 int i;
5476
5477 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
5478
5479 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
5480 chunk = &chunks->items[i];
5481 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
5482 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
5483 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
5484
5485 ath10k_dbg(ar, ATH10K_DBG_WMI,
5486 "wmi chunk %d len %d requested, addr 0x%llx\n",
5487 i,
5488 ar->wmi.mem_chunks[i].len,
5489 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
5490 }
5491}
5492
d7579d12 5493static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
5e3dd157
KV
5494{
5495 struct wmi_init_cmd *cmd;
5496 struct sk_buff *buf;
5497 struct wmi_resource_config config = {};
b3effe61 5498 u32 len, val;
5e3dd157
KV
5499
5500 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
cfd1061e 5501 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
5e3dd157
KV
5502 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
5503
5504 config.num_offload_reorder_bufs =
5505 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
5506
5507 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
5508 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
5509 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
5510 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
5511 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
5512 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5513 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5514 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5515 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
ccec9038 5516 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
5e3dd157
KV
5517 config.scan_max_pending_reqs =
5518 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
5519
5520 config.bmiss_offload_max_vdev =
5521 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
5522
5523 config.roam_offload_max_vdev =
5524 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
5525
5526 config.roam_offload_max_ap_profiles =
5527 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
5528
5529 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
5530 config.num_mcast_table_elems =
5531 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
5532
5533 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
5534 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
5535 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
5536 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
5537 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
5538
5539 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
5540 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5541
5542 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
5543
5544 config.gtk_offload_max_vdev =
5545 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
5546
5547 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
5548 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
5549
b3effe61
BM
5550 len = sizeof(*cmd) +
5551 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5552
7aa7a72a 5553 buf = ath10k_wmi_alloc_skb(ar, len);
5e3dd157 5554 if (!buf)
d7579d12 5555 return ERR_PTR(-ENOMEM);
5e3dd157
KV
5556
5557 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61 5558
5e3dd157 5559 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 5560 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
5e3dd157 5561
7aa7a72a 5562 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
d7579d12 5563 return buf;
5e3dd157
KV
5564}
5565
d7579d12 5566static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
12b2b9e3
BM
5567{
5568 struct wmi_init_cmd_10x *cmd;
5569 struct sk_buff *buf;
5570 struct wmi_resource_config_10x config = {};
5571 u32 len, val;
12b2b9e3 5572
ec6a73f0
BM
5573 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
5574 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
5575 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
5576 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
5577 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
5578 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
5579 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
5580 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5581 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5582 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5583 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
ccec9038 5584 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
12b2b9e3 5585 config.scan_max_pending_reqs =
ec6a73f0 5586 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM
5587
5588 config.bmiss_offload_max_vdev =
ec6a73f0 5589 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM
5590
5591 config.roam_offload_max_vdev =
ec6a73f0 5592 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM
5593
5594 config.roam_offload_max_ap_profiles =
ec6a73f0 5595 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 5596
ec6a73f0 5597 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 5598 config.num_mcast_table_elems =
ec6a73f0 5599 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 5600
ec6a73f0
BM
5601 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
5602 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
5603 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
5604 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
5605 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 5606
ec6a73f0 5607 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM
5608 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5609
ec6a73f0 5610 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 5611
ec6a73f0
BM
5612 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
5613 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM
5614
5615 len = sizeof(*cmd) +
5616 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5617
7aa7a72a 5618 buf = ath10k_wmi_alloc_skb(ar, len);
12b2b9e3 5619 if (!buf)
d7579d12 5620 return ERR_PTR(-ENOMEM);
12b2b9e3
BM
5621
5622 cmd = (struct wmi_init_cmd_10x *)buf->data;
5623
12b2b9e3 5624 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 5625 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
12b2b9e3 5626
7aa7a72a 5627 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
d7579d12 5628 return buf;
12b2b9e3
BM
5629}
5630
d7579d12 5631static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
24c88f78
MK
5632{
5633 struct wmi_init_cmd_10_2 *cmd;
5634 struct sk_buff *buf;
5635 struct wmi_resource_config_10x config = {};
b6c8e287 5636 u32 len, val, features;
24c88f78
MK
5637
5638 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
24c88f78 5639 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
cc61a1bb
MSS
5640
5641 if (ath10k_peer_stats_enabled(ar)) {
af9a6a3a
AK
5642 config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
5643 config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
5644 } else {
5645 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
5646 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
5647 }
5648
24c88f78
MK
5649 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
5650 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
5651 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
5652 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5653 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5654 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5655 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
ccec9038 5656 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
24c88f78
MK
5657
5658 config.scan_max_pending_reqs =
5659 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
5660
5661 config.bmiss_offload_max_vdev =
5662 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
5663
5664 config.roam_offload_max_vdev =
5665 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
5666
5667 config.roam_offload_max_ap_profiles =
5668 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
5669
5670 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
5671 config.num_mcast_table_elems =
5672 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
5673
5674 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
5675 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
5676 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
f6603ff2 5677 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
24c88f78
MK
5678 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
5679
5680 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
5681 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5682
5683 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
5684
5685 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
5686 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
5687
5688 len = sizeof(*cmd) +
5689 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5690
7aa7a72a 5691 buf = ath10k_wmi_alloc_skb(ar, len);
24c88f78 5692 if (!buf)
d7579d12 5693 return ERR_PTR(-ENOMEM);
24c88f78
MK
5694
5695 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
5696
b6c8e287 5697 features = WMI_10_2_RX_BATCH_MODE;
844fa572
YL
5698
5699 if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
5700 test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
de0c789b 5701 features |= WMI_10_2_COEX_GPIO;
844fa572 5702
cc61a1bb 5703 if (ath10k_peer_stats_enabled(ar))
de46c015
MSS
5704 features |= WMI_10_2_PEER_STATS;
5705
fa7937e3
RM
5706 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
5707 features |= WMI_10_2_BSS_CHAN_INFO;
5708
b6c8e287
SM
5709 cmd->resource_config.feature_mask = __cpu_to_le32(features);
5710
24c88f78 5711 memcpy(&cmd->resource_config.common, &config, sizeof(config));
cf9fca8f 5712 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
24c88f78 5713
7aa7a72a 5714 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
d7579d12 5715 return buf;
5e3dd157
KV
5716}
5717
d1e52a8e
RM
5718static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
5719{
5720 struct wmi_init_cmd_10_4 *cmd;
5721 struct sk_buff *buf;
5722 struct wmi_resource_config_10_4 config = {};
5723 u32 len;
5724
5725 config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
5726 config.num_peers = __cpu_to_le32(ar->max_num_peers);
5727 config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
5728 config.num_tids = __cpu_to_le32(ar->num_tids);
5729
5730 config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
5731 config.num_offload_reorder_buffs =
5732 __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
5733 config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
5734 config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
5699a6f2
RM
5735 config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
5736 config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
d1e52a8e
RM
5737
5738 config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5739 config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5740 config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5741 config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
5742
bc27e8cd 5743 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
d1e52a8e
RM
5744 config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
5745 config.bmiss_offload_max_vdev =
5746 __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
5747 config.roam_offload_max_vdev =
5748 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
5749 config.roam_offload_max_ap_profiles =
5750 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
5751 config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
5752 config.num_mcast_table_elems =
5753 __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
5754
5755 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
5756 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
5757 config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
5758 config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
5759 config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
5760
5761 config.rx_skip_defrag_timeout_dup_detection_check =
5762 __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
5763
5764 config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
5765 config.gtk_offload_max_vdev =
5766 __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
5699a6f2 5767 config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
d1e52a8e
RM
5768 config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
5769 config.max_peer_ext_stats =
5770 __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
5771 config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
5772
5773 config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
5774 config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
5775 config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
5776 config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
5777
5778 config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
5779 config.tt_support =
5780 __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
5781 config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
5782 config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
5783 config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
5784
5785 len = sizeof(*cmd) +
5786 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5787
5788 buf = ath10k_wmi_alloc_skb(ar, len);
5789 if (!buf)
5790 return ERR_PTR(-ENOMEM);
5791
5792 cmd = (struct wmi_init_cmd_10_4 *)buf->data;
5793 memcpy(&cmd->resource_config, &config, sizeof(config));
5794 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
5795
5796 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
5797 return buf;
5798}
5799
0226d602 5800int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
5e3dd157 5801{
a6aa5da3
MK
5802 if (arg->ie_len && !arg->ie)
5803 return -EINVAL;
5804 if (arg->n_channels && !arg->channels)
5805 return -EINVAL;
5806 if (arg->n_ssids && !arg->ssids)
5807 return -EINVAL;
5808 if (arg->n_bssids && !arg->bssids)
5809 return -EINVAL;
5e3dd157 5810
a6aa5da3
MK
5811 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
5812 return -EINVAL;
5813 if (arg->n_channels > ARRAY_SIZE(arg->channels))
5814 return -EINVAL;
5815 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
5816 return -EINVAL;
5817 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
5818 return -EINVAL;
5e3dd157 5819
a6aa5da3
MK
5820 return 0;
5821}
5e3dd157 5822
a6aa5da3
MK
5823static size_t
5824ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
5825{
5826 int len = 0;
5827
5828 if (arg->ie_len) {
5e3dd157
KV
5829 len += sizeof(struct wmi_ie_data);
5830 len += roundup(arg->ie_len, 4);
5831 }
5832
5833 if (arg->n_channels) {
5e3dd157
KV
5834 len += sizeof(struct wmi_chan_list);
5835 len += sizeof(__le32) * arg->n_channels;
5836 }
5837
5838 if (arg->n_ssids) {
5e3dd157
KV
5839 len += sizeof(struct wmi_ssid_list);
5840 len += sizeof(struct wmi_ssid) * arg->n_ssids;
5841 }
5842
5843 if (arg->n_bssids) {
5e3dd157
KV
5844 len += sizeof(struct wmi_bssid_list);
5845 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
5846 }
5847
5848 return len;
5849}
5850
0226d602
MK
5851void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
5852 const struct wmi_start_scan_arg *arg)
5e3dd157 5853{
5e3dd157
KV
5854 u32 scan_id;
5855 u32 scan_req_id;
5e3dd157
KV
5856
5857 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
5858 scan_id |= arg->scan_id;
5859
5860 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
5861 scan_req_id |= arg->scan_req_id;
5862
a6aa5da3
MK
5863 cmn->scan_id = __cpu_to_le32(scan_id);
5864 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
5865 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
5866 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
5867 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
5868 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
5869 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
5870 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
5871 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
5872 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
5873 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
5874 cmn->idle_time = __cpu_to_le32(arg->idle_time);
5875 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
5876 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
5877 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
5878}
5879
5880static void
5881ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
5882 const struct wmi_start_scan_arg *arg)
5883{
5884 struct wmi_ie_data *ie;
5885 struct wmi_chan_list *channels;
5886 struct wmi_ssid_list *ssids;
5887 struct wmi_bssid_list *bssids;
5888 void *ptr = tlvs->tlvs;
5889 int i;
5e3dd157
KV
5890
5891 if (arg->n_channels) {
a6aa5da3 5892 channels = ptr;
5e3dd157
KV
5893 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
5894 channels->num_chan = __cpu_to_le32(arg->n_channels);
5895
5896 for (i = 0; i < arg->n_channels; i++)
24c88f78
MK
5897 channels->channel_list[i].freq =
5898 __cpu_to_le16(arg->channels[i]);
5e3dd157 5899
a6aa5da3
MK
5900 ptr += sizeof(*channels);
5901 ptr += sizeof(__le32) * arg->n_channels;
5e3dd157
KV
5902 }
5903
5904 if (arg->n_ssids) {
a6aa5da3 5905 ssids = ptr;
5e3dd157
KV
5906 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
5907 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
5908
5909 for (i = 0; i < arg->n_ssids; i++) {
5910 ssids->ssids[i].ssid_len =
5911 __cpu_to_le32(arg->ssids[i].len);
5912 memcpy(&ssids->ssids[i].ssid,
5913 arg->ssids[i].ssid,
5914 arg->ssids[i].len);
5915 }
5916
a6aa5da3
MK
5917 ptr += sizeof(*ssids);
5918 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
5e3dd157
KV
5919 }
5920
5921 if (arg->n_bssids) {
a6aa5da3 5922 bssids = ptr;
5e3dd157
KV
5923 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
5924 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
5925
5926 for (i = 0; i < arg->n_bssids; i++)
8f4ffb7d
KV
5927 ether_addr_copy(bssids->bssid_list[i].addr,
5928 arg->bssids[i].bssid);
5e3dd157 5929
a6aa5da3
MK
5930 ptr += sizeof(*bssids);
5931 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
5e3dd157
KV
5932 }
5933
5934 if (arg->ie_len) {
a6aa5da3 5935 ie = ptr;
5e3dd157
KV
5936 ie->tag = __cpu_to_le32(WMI_IE_TAG);
5937 ie->ie_len = __cpu_to_le32(arg->ie_len);
5938 memcpy(ie->ie_data, arg->ie, arg->ie_len);
5939
a6aa5da3
MK
5940 ptr += sizeof(*ie);
5941 ptr += roundup(arg->ie_len, 4);
5e3dd157 5942 }
a6aa5da3 5943}
5e3dd157 5944
d7579d12
MK
5945static struct sk_buff *
5946ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
5947 const struct wmi_start_scan_arg *arg)
a6aa5da3 5948{
d7579d12 5949 struct wmi_start_scan_cmd *cmd;
a6aa5da3
MK
5950 struct sk_buff *skb;
5951 size_t len;
5952 int ret;
5953
5954 ret = ath10k_wmi_start_scan_verify(arg);
5955 if (ret)
d7579d12 5956 return ERR_PTR(ret);
a6aa5da3 5957
d7579d12 5958 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
a6aa5da3
MK
5959 skb = ath10k_wmi_alloc_skb(ar, len);
5960 if (!skb)
d7579d12 5961 return ERR_PTR(-ENOMEM);
a6aa5da3 5962
d7579d12 5963 cmd = (struct wmi_start_scan_cmd *)skb->data;
a6aa5da3 5964
d7579d12
MK
5965 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
5966 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
a6aa5da3 5967
d7579d12 5968 cmd->burst_duration_ms = __cpu_to_le32(0);
5e3dd157 5969
7aa7a72a 5970 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
d7579d12
MK
5971 return skb;
5972}
5973
5974static struct sk_buff *
5975ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
5976 const struct wmi_start_scan_arg *arg)
5977{
5978 struct wmi_10x_start_scan_cmd *cmd;
5979 struct sk_buff *skb;
5980 size_t len;
5981 int ret;
5982
5983 ret = ath10k_wmi_start_scan_verify(arg);
5984 if (ret)
5985 return ERR_PTR(ret);
5986
5987 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
5988 skb = ath10k_wmi_alloc_skb(ar, len);
5989 if (!skb)
5990 return ERR_PTR(-ENOMEM);
5991
5992 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
5993
5994 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
5995 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
5996
5997 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
5998 return skb;
5e3dd157
KV
5999}
6000
6001void ath10k_wmi_start_scan_init(struct ath10k *ar,
6002 struct wmi_start_scan_arg *arg)
6003{
6004 /* setup commonly used values */
6005 arg->scan_req_id = 1;
6006 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
6007 arg->dwell_time_active = 50;
6008 arg->dwell_time_passive = 150;
6009 arg->min_rest_time = 50;
6010 arg->max_rest_time = 500;
6011 arg->repeat_probe_time = 0;
6012 arg->probe_spacing_time = 0;
6013 arg->idle_time = 0;
c322892f 6014 arg->max_scan_time = 20000;
5e3dd157
KV
6015 arg->probe_delay = 5;
6016 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
6017 | WMI_SCAN_EVENT_COMPLETED
6018 | WMI_SCAN_EVENT_BSS_CHANNEL
6019 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
6020 | WMI_SCAN_EVENT_DEQUEUED;
5e3dd157
KV
6021 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
6022 arg->n_bssids = 1;
6023 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
6024}
6025
d7579d12
MK
6026static struct sk_buff *
6027ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
6028 const struct wmi_stop_scan_arg *arg)
5e3dd157
KV
6029{
6030 struct wmi_stop_scan_cmd *cmd;
6031 struct sk_buff *skb;
6032 u32 scan_id;
6033 u32 req_id;
6034
6035 if (arg->req_id > 0xFFF)
d7579d12 6036 return ERR_PTR(-EINVAL);
5e3dd157 6037 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
d7579d12 6038 return ERR_PTR(-EINVAL);
5e3dd157 6039
7aa7a72a 6040 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6041 if (!skb)
d7579d12 6042 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6043
6044 scan_id = arg->u.scan_id;
6045 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
6046
6047 req_id = arg->req_id;
6048 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
6049
6050 cmd = (struct wmi_stop_scan_cmd *)skb->data;
6051 cmd->req_type = __cpu_to_le32(arg->req_type);
6052 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
6053 cmd->scan_id = __cpu_to_le32(scan_id);
6054 cmd->scan_req_id = __cpu_to_le32(req_id);
6055
7aa7a72a 6056 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6057 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
6058 arg->req_id, arg->req_type, arg->u.scan_id);
d7579d12 6059 return skb;
5e3dd157
KV
6060}
6061
d7579d12
MK
6062static struct sk_buff *
6063ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
6064 enum wmi_vdev_type type,
6065 enum wmi_vdev_subtype subtype,
6066 const u8 macaddr[ETH_ALEN])
5e3dd157
KV
6067{
6068 struct wmi_vdev_create_cmd *cmd;
6069 struct sk_buff *skb;
6070
7aa7a72a 6071 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6072 if (!skb)
d7579d12 6073 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6074
6075 cmd = (struct wmi_vdev_create_cmd *)skb->data;
6076 cmd->vdev_id = __cpu_to_le32(vdev_id);
6077 cmd->vdev_type = __cpu_to_le32(type);
6078 cmd->vdev_subtype = __cpu_to_le32(subtype);
b25f32cb 6079 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
5e3dd157 6080
7aa7a72a 6081 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6082 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
6083 vdev_id, type, subtype, macaddr);
d7579d12 6084 return skb;
5e3dd157
KV
6085}
6086
d7579d12
MK
6087static struct sk_buff *
6088ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV
6089{
6090 struct wmi_vdev_delete_cmd *cmd;
6091 struct sk_buff *skb;
6092
7aa7a72a 6093 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6094 if (!skb)
d7579d12 6095 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6096
6097 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
6098 cmd->vdev_id = __cpu_to_le32(vdev_id);
6099
7aa7a72a 6100 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157 6101 "WMI vdev delete id %d\n", vdev_id);
d7579d12 6102 return skb;
5e3dd157
KV
6103}
6104
d7579d12
MK
6105static struct sk_buff *
6106ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
6107 const struct wmi_vdev_start_request_arg *arg,
6108 bool restart)
5e3dd157
KV
6109{
6110 struct wmi_vdev_start_request_cmd *cmd;
6111 struct sk_buff *skb;
6112 const char *cmdname;
6113 u32 flags = 0;
6114
5e3dd157 6115 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
d7579d12 6116 return ERR_PTR(-EINVAL);
5e3dd157 6117 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
d7579d12 6118 return ERR_PTR(-EINVAL);
5e3dd157 6119
d7579d12 6120 if (restart)
5e3dd157
KV
6121 cmdname = "restart";
6122 else
d7579d12 6123 cmdname = "start";
5e3dd157 6124
7aa7a72a 6125 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6126 if (!skb)
d7579d12 6127 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6128
6129 if (arg->hidden_ssid)
6130 flags |= WMI_VDEV_START_HIDDEN_SSID;
6131 if (arg->pmf_enabled)
6132 flags |= WMI_VDEV_START_PMF_ENABLED;
6133
6134 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
6135 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6136 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
6137 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
6138 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
6139 cmd->flags = __cpu_to_le32(flags);
6140 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
6141 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
6142
6143 if (arg->ssid) {
6144 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
6145 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
6146 }
6147
2d66721c 6148 ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
5e3dd157 6149
7aa7a72a 6150 ath10k_dbg(ar, ATH10K_DBG_WMI,
8cc7f26c
KV
6151 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
6152 cmdname, arg->vdev_id,
e8a50f8b
MP
6153 flags, arg->channel.freq, arg->channel.mode,
6154 cmd->chan.flags, arg->channel.max_power);
5e3dd157 6155
d7579d12 6156 return skb;
5e3dd157
KV
6157}
6158
d7579d12
MK
6159static struct sk_buff *
6160ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV
6161{
6162 struct wmi_vdev_stop_cmd *cmd;
6163 struct sk_buff *skb;
6164
7aa7a72a 6165 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6166 if (!skb)
d7579d12 6167 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6168
6169 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
6170 cmd->vdev_id = __cpu_to_le32(vdev_id);
6171
7aa7a72a 6172 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
d7579d12 6173 return skb;
5e3dd157
KV
6174}
6175
d7579d12
MK
6176static struct sk_buff *
6177ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
6178 const u8 *bssid)
5e3dd157
KV
6179{
6180 struct wmi_vdev_up_cmd *cmd;
6181 struct sk_buff *skb;
6182
7aa7a72a 6183 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6184 if (!skb)
d7579d12 6185 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6186
6187 cmd = (struct wmi_vdev_up_cmd *)skb->data;
6188 cmd->vdev_id = __cpu_to_le32(vdev_id);
6189 cmd->vdev_assoc_id = __cpu_to_le32(aid);
b25f32cb 6190 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
5e3dd157 6191
7aa7a72a 6192 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6193 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
6194 vdev_id, aid, bssid);
d7579d12 6195 return skb;
5e3dd157
KV
6196}
6197
d7579d12
MK
6198static struct sk_buff *
6199ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV
6200{
6201 struct wmi_vdev_down_cmd *cmd;
6202 struct sk_buff *skb;
6203
7aa7a72a 6204 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6205 if (!skb)
d7579d12 6206 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6207
6208 cmd = (struct wmi_vdev_down_cmd *)skb->data;
6209 cmd->vdev_id = __cpu_to_le32(vdev_id);
6210
7aa7a72a 6211 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157 6212 "wmi mgmt vdev down id 0x%x\n", vdev_id);
d7579d12 6213 return skb;
5e3dd157
KV
6214}
6215
d7579d12
MK
6216static struct sk_buff *
6217ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
6218 u32 param_id, u32 param_value)
5e3dd157
KV
6219{
6220 struct wmi_vdev_set_param_cmd *cmd;
6221 struct sk_buff *skb;
6222
6d1506e7 6223 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7aa7a72a 6224 ath10k_dbg(ar, ATH10K_DBG_WMI,
6d1506e7
BM
6225 "vdev param %d not supported by firmware\n",
6226 param_id);
d7579d12 6227 return ERR_PTR(-EOPNOTSUPP);
6d1506e7
BM
6228 }
6229
7aa7a72a 6230 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6231 if (!skb)
d7579d12 6232 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6233
6234 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
6235 cmd->vdev_id = __cpu_to_le32(vdev_id);
6236 cmd->param_id = __cpu_to_le32(param_id);
6237 cmd->param_value = __cpu_to_le32(param_value);
6238
7aa7a72a 6239 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6240 "wmi vdev id 0x%x set param %d value %d\n",
6241 vdev_id, param_id, param_value);
d7579d12 6242 return skb;
5e3dd157
KV
6243}
6244
d7579d12
MK
6245static struct sk_buff *
6246ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
6247 const struct wmi_vdev_install_key_arg *arg)
5e3dd157
KV
6248{
6249 struct wmi_vdev_install_key_cmd *cmd;
6250 struct sk_buff *skb;
6251
6252 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
d7579d12 6253 return ERR_PTR(-EINVAL);
5e3dd157 6254 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
d7579d12 6255 return ERR_PTR(-EINVAL);
5e3dd157 6256
7aa7a72a 6257 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
5e3dd157 6258 if (!skb)
d7579d12 6259 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6260
6261 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
6262 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6263 cmd->key_idx = __cpu_to_le32(arg->key_idx);
6264 cmd->key_flags = __cpu_to_le32(arg->key_flags);
6265 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
6266 cmd->key_len = __cpu_to_le32(arg->key_len);
6267 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
6268 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
6269
6270 if (arg->macaddr)
b25f32cb 6271 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
5e3dd157
KV
6272 if (arg->key_data)
6273 memcpy(cmd->key_data, arg->key_data, arg->key_len);
6274
7aa7a72a 6275 ath10k_dbg(ar, ATH10K_DBG_WMI,
e0c508ab
MK
6276 "wmi vdev install key idx %d cipher %d len %d\n",
6277 arg->key_idx, arg->key_cipher, arg->key_len);
d7579d12 6278 return skb;
5e3dd157
KV
6279}
6280
d7579d12
MK
6281static struct sk_buff *
6282ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
6283 const struct wmi_vdev_spectral_conf_arg *arg)
855aed12
SW
6284{
6285 struct wmi_vdev_spectral_conf_cmd *cmd;
6286 struct sk_buff *skb;
855aed12 6287
7aa7a72a 6288 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12 6289 if (!skb)
d7579d12 6290 return ERR_PTR(-ENOMEM);
855aed12
SW
6291
6292 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
6293 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6294 cmd->scan_count = __cpu_to_le32(arg->scan_count);
6295 cmd->scan_period = __cpu_to_le32(arg->scan_period);
6296 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
6297 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
6298 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
6299 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
6300 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
6301 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
6302 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
6303 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
6304 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
6305 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
6306 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
6307 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
6308 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
6309 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
6310 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
6311 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
6312
d7579d12 6313 return skb;
855aed12
SW
6314}
6315
d7579d12
MK
6316static struct sk_buff *
6317ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
6318 u32 trigger, u32 enable)
855aed12
SW
6319{
6320 struct wmi_vdev_spectral_enable_cmd *cmd;
6321 struct sk_buff *skb;
855aed12 6322
7aa7a72a 6323 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12 6324 if (!skb)
d7579d12 6325 return ERR_PTR(-ENOMEM);
855aed12
SW
6326
6327 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
6328 cmd->vdev_id = __cpu_to_le32(vdev_id);
6329 cmd->trigger_cmd = __cpu_to_le32(trigger);
6330 cmd->enable_cmd = __cpu_to_le32(enable);
6331
d7579d12 6332 return skb;
855aed12
SW
6333}
6334
d7579d12
MK
6335static struct sk_buff *
6336ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
7390ed34
MP
6337 const u8 peer_addr[ETH_ALEN],
6338 enum wmi_peer_type peer_type)
5e3dd157
KV
6339{
6340 struct wmi_peer_create_cmd *cmd;
6341 struct sk_buff *skb;
6342
7aa7a72a 6343 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6344 if (!skb)
d7579d12 6345 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6346
6347 cmd = (struct wmi_peer_create_cmd *)skb->data;
6348 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 6349 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6350
7aa7a72a 6351 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6352 "wmi peer create vdev_id %d peer_addr %pM\n",
6353 vdev_id, peer_addr);
d7579d12 6354 return skb;
5e3dd157
KV
6355}
6356
d7579d12
MK
6357static struct sk_buff *
6358ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
6359 const u8 peer_addr[ETH_ALEN])
5e3dd157
KV
6360{
6361 struct wmi_peer_delete_cmd *cmd;
6362 struct sk_buff *skb;
6363
7aa7a72a 6364 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6365 if (!skb)
d7579d12 6366 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6367
6368 cmd = (struct wmi_peer_delete_cmd *)skb->data;
6369 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 6370 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6371
7aa7a72a 6372 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6373 "wmi peer delete vdev_id %d peer_addr %pM\n",
6374 vdev_id, peer_addr);
d7579d12 6375 return skb;
5e3dd157
KV
6376}
6377
d7579d12
MK
6378static struct sk_buff *
6379ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
6380 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
5e3dd157
KV
6381{
6382 struct wmi_peer_flush_tids_cmd *cmd;
6383 struct sk_buff *skb;
6384
7aa7a72a 6385 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6386 if (!skb)
d7579d12 6387 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6388
6389 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
6390 cmd->vdev_id = __cpu_to_le32(vdev_id);
6391 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
b25f32cb 6392 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6393
7aa7a72a 6394 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6395 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
6396 vdev_id, peer_addr, tid_bitmap);
d7579d12 6397 return skb;
5e3dd157
KV
6398}
6399
d7579d12
MK
6400static struct sk_buff *
6401ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
6402 const u8 *peer_addr,
6403 enum wmi_peer_param param_id,
6404 u32 param_value)
5e3dd157
KV
6405{
6406 struct wmi_peer_set_param_cmd *cmd;
6407 struct sk_buff *skb;
6408
7aa7a72a 6409 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6410 if (!skb)
d7579d12 6411 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6412
6413 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
6414 cmd->vdev_id = __cpu_to_le32(vdev_id);
6415 cmd->param_id = __cpu_to_le32(param_id);
6416 cmd->param_value = __cpu_to_le32(param_value);
b25f32cb 6417 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6418
7aa7a72a 6419 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6420 "wmi vdev %d peer 0x%pM set param %d value %d\n",
6421 vdev_id, peer_addr, param_id, param_value);
d7579d12 6422 return skb;
5e3dd157
KV
6423}
6424
d7579d12
MK
6425static struct sk_buff *
6426ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
6427 enum wmi_sta_ps_mode psmode)
5e3dd157
KV
6428{
6429 struct wmi_sta_powersave_mode_cmd *cmd;
6430 struct sk_buff *skb;
6431
7aa7a72a 6432 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6433 if (!skb)
d7579d12 6434 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6435
6436 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
6437 cmd->vdev_id = __cpu_to_le32(vdev_id);
6438 cmd->sta_ps_mode = __cpu_to_le32(psmode);
6439
7aa7a72a 6440 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6441 "wmi set powersave id 0x%x mode %d\n",
6442 vdev_id, psmode);
d7579d12 6443 return skb;
5e3dd157
KV
6444}
6445
d7579d12
MK
6446static struct sk_buff *
6447ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
6448 enum wmi_sta_powersave_param param_id,
6449 u32 value)
5e3dd157
KV
6450{
6451 struct wmi_sta_powersave_param_cmd *cmd;
6452 struct sk_buff *skb;
6453
7aa7a72a 6454 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6455 if (!skb)
d7579d12 6456 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6457
6458 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
6459 cmd->vdev_id = __cpu_to_le32(vdev_id);
6460 cmd->param_id = __cpu_to_le32(param_id);
6461 cmd->param_value = __cpu_to_le32(value);
6462
7aa7a72a 6463 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6464 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
6465 vdev_id, param_id, value);
d7579d12 6466 return skb;
5e3dd157
KV
6467}
6468
d7579d12
MK
6469static struct sk_buff *
6470ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6471 enum wmi_ap_ps_peer_param param_id, u32 value)
5e3dd157
KV
6472{
6473 struct wmi_ap_ps_peer_cmd *cmd;
6474 struct sk_buff *skb;
6475
6476 if (!mac)
d7579d12 6477 return ERR_PTR(-EINVAL);
5e3dd157 6478
7aa7a72a 6479 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6480 if (!skb)
d7579d12 6481 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6482
6483 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
6484 cmd->vdev_id = __cpu_to_le32(vdev_id);
6485 cmd->param_id = __cpu_to_le32(param_id);
6486 cmd->param_value = __cpu_to_le32(value);
b25f32cb 6487 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5e3dd157 6488
7aa7a72a 6489 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV
6490 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
6491 vdev_id, param_id, value, mac);
d7579d12 6492 return skb;
5e3dd157
KV
6493}
6494
d7579d12
MK
6495static struct sk_buff *
6496ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
6497 const struct wmi_scan_chan_list_arg *arg)
5e3dd157
KV
6498{
6499 struct wmi_scan_chan_list_cmd *cmd;
6500 struct sk_buff *skb;
6501 struct wmi_channel_arg *ch;
6502 struct wmi_channel *ci;
6503 int len;
6504 int i;
6505
6506 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
6507
7aa7a72a 6508 skb = ath10k_wmi_alloc_skb(ar, len);
5e3dd157 6509 if (!skb)
d7579d12 6510 return ERR_PTR(-EINVAL);
5e3dd157
KV
6511
6512 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
6513 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
6514
6515 for (i = 0; i < arg->n_channels; i++) {
5e3dd157
KV
6516 ch = &arg->channels[i];
6517 ci = &cmd->chan_info[i];
6518
2d66721c 6519 ath10k_wmi_put_wmi_channel(ci, ch);
5e3dd157
KV
6520 }
6521
d7579d12 6522 return skb;
5e3dd157
KV
6523}
6524
24c88f78
MK
6525static void
6526ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
6527 const struct wmi_peer_assoc_complete_arg *arg)
5e3dd157 6528{
24c88f78 6529 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
5e3dd157 6530
5e3dd157
KV
6531 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6532 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
6533 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
6534 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
6535 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
6536 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
6537 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
6538 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
6539 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
6540 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
6541 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
6542 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
6543 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
6544
b25f32cb 6545 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
5e3dd157
KV
6546
6547 cmd->peer_legacy_rates.num_rates =
6548 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
6549 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
6550 arg->peer_legacy_rates.num_rates);
6551
6552 cmd->peer_ht_rates.num_rates =
6553 __cpu_to_le32(arg->peer_ht_rates.num_rates);
6554 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
6555 arg->peer_ht_rates.num_rates);
6556
6557 cmd->peer_vht_rates.rx_max_rate =
6558 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
6559 cmd->peer_vht_rates.rx_mcs_set =
6560 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
6561 cmd->peer_vht_rates.tx_max_rate =
6562 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
6563 cmd->peer_vht_rates.tx_mcs_set =
6564 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
24c88f78
MK
6565}
6566
6567static void
6568ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
6569 const struct wmi_peer_assoc_complete_arg *arg)
6570{
6571 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
6572
6573 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6574 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
6575}
6576
6577static void
6578ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
6579 const struct wmi_peer_assoc_complete_arg *arg)
6580{
6581 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6582}
6583
6584static void
6585ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
6586 const struct wmi_peer_assoc_complete_arg *arg)
6587{
6588 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
6589 int max_mcs, max_nss;
6590 u32 info0;
6591
6592 /* TODO: Is using max values okay with firmware? */
6593 max_mcs = 0xf;
6594 max_nss = 0xf;
6595
6596 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
6597 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
6598
6599 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6600 cmd->info0 = __cpu_to_le32(info0);
6601}
6602
b54e16f1
VT
6603static void
6604ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
6605 const struct wmi_peer_assoc_complete_arg *arg)
6606{
6607 struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
6608
6609 ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
6610 cmd->peer_bw_rxnss_override = 0;
6611}
6612
d7579d12
MK
6613static int
6614ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
24c88f78 6615{
24c88f78
MK
6616 if (arg->peer_mpdu_density > 16)
6617 return -EINVAL;
6618 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
6619 return -EINVAL;
6620 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
6621 return -EINVAL;
6622
d7579d12
MK
6623 return 0;
6624}
6625
6626static struct sk_buff *
6627ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
6628 const struct wmi_peer_assoc_complete_arg *arg)
6629{
6630 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
6631 struct sk_buff *skb;
6632 int ret;
6633
6634 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6635 if (ret)
6636 return ERR_PTR(ret);
24c88f78 6637
7aa7a72a 6638 skb = ath10k_wmi_alloc_skb(ar, len);
24c88f78 6639 if (!skb)
d7579d12 6640 return ERR_PTR(-ENOMEM);
24c88f78 6641
d7579d12
MK
6642 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
6643
6644 ath10k_dbg(ar, ATH10K_DBG_WMI,
6645 "wmi peer assoc vdev %d addr %pM (%s)\n",
6646 arg->vdev_id, arg->addr,
6647 arg->peer_reassoc ? "reassociate" : "new");
6648 return skb;
6649}
6650
6651static struct sk_buff *
6652ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
6653 const struct wmi_peer_assoc_complete_arg *arg)
6654{
6655 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
6656 struct sk_buff *skb;
6657 int ret;
6658
6659 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6660 if (ret)
6661 return ERR_PTR(ret);
6662
6663 skb = ath10k_wmi_alloc_skb(ar, len);
6664 if (!skb)
6665 return ERR_PTR(-ENOMEM);
6666
6667 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
6668
6669 ath10k_dbg(ar, ATH10K_DBG_WMI,
6670 "wmi peer assoc vdev %d addr %pM (%s)\n",
6671 arg->vdev_id, arg->addr,
6672 arg->peer_reassoc ? "reassociate" : "new");
6673 return skb;
6674}
6675
6676static struct sk_buff *
6677ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
6678 const struct wmi_peer_assoc_complete_arg *arg)
6679{
6680 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
6681 struct sk_buff *skb;
6682 int ret;
6683
6684 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6685 if (ret)
6686 return ERR_PTR(ret);
6687
6688 skb = ath10k_wmi_alloc_skb(ar, len);
6689 if (!skb)
6690 return ERR_PTR(-ENOMEM);
6691
6692 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
5e3dd157 6693
7aa7a72a 6694 ath10k_dbg(ar, ATH10K_DBG_WMI,
44d6fa90
CYY
6695 "wmi peer assoc vdev %d addr %pM (%s)\n",
6696 arg->vdev_id, arg->addr,
6697 arg->peer_reassoc ? "reassociate" : "new");
d7579d12 6698 return skb;
5e3dd157
KV
6699}
6700
b54e16f1
VT
6701static struct sk_buff *
6702ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
6703 const struct wmi_peer_assoc_complete_arg *arg)
6704{
6705 size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
6706 struct sk_buff *skb;
6707 int ret;
6708
6709 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6710 if (ret)
6711 return ERR_PTR(ret);
6712
6713 skb = ath10k_wmi_alloc_skb(ar, len);
6714 if (!skb)
6715 return ERR_PTR(-ENOMEM);
6716
6717 ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
6718
6719 ath10k_dbg(ar, ATH10K_DBG_WMI,
6720 "wmi peer assoc vdev %d addr %pM (%s)\n",
6721 arg->vdev_id, arg->addr,
6722 arg->peer_reassoc ? "reassociate" : "new");
6723 return skb;
6724}
6725
a57a6a27
RM
6726static struct sk_buff *
6727ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
6728{
6729 struct sk_buff *skb;
6730
6731 skb = ath10k_wmi_alloc_skb(ar, 0);
6732 if (!skb)
6733 return ERR_PTR(-ENOMEM);
6734
6735 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
6736 return skb;
6737}
6738
8a0b459e
RM
6739static struct sk_buff *
6740ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
6741 enum wmi_bss_survey_req_type type)
6742{
6743 struct wmi_pdev_chan_info_req_cmd *cmd;
6744 struct sk_buff *skb;
6745
6746 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6747 if (!skb)
6748 return ERR_PTR(-ENOMEM);
6749
6750 cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
6751 cmd->type = __cpu_to_le32(type);
6752
6753 ath10k_dbg(ar, ATH10K_DBG_WMI,
6754 "wmi pdev bss info request type %d\n", type);
6755
6756 return skb;
6757}
6758
748afc47 6759/* This function assumes the beacon is already DMA mapped */
d7579d12 6760static struct sk_buff *
9ad50182
MK
6761ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
6762 size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
6763 bool deliver_cab)
5e3dd157 6764{
748afc47 6765 struct wmi_bcn_tx_ref_cmd *cmd;
5e3dd157 6766 struct sk_buff *skb;
748afc47 6767 struct ieee80211_hdr *hdr;
748afc47 6768 u16 fc;
5e3dd157 6769
7aa7a72a 6770 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6771 if (!skb)
d7579d12 6772 return ERR_PTR(-ENOMEM);
5e3dd157 6773
9ad50182 6774 hdr = (struct ieee80211_hdr *)bcn;
748afc47
MK
6775 fc = le16_to_cpu(hdr->frame_control);
6776
6777 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
9ad50182
MK
6778 cmd->vdev_id = __cpu_to_le32(vdev_id);
6779 cmd->data_len = __cpu_to_le32(bcn_len);
6780 cmd->data_ptr = __cpu_to_le32(bcn_paddr);
748afc47
MK
6781 cmd->msdu_id = 0;
6782 cmd->frame_control = __cpu_to_le32(fc);
6783 cmd->flags = 0;
24c88f78 6784 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
748afc47 6785
9ad50182 6786 if (dtim_zero)
748afc47
MK
6787 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
6788
9ad50182 6789 if (deliver_cab)
748afc47
MK
6790 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
6791
d7579d12 6792 return skb;
5e3dd157
KV
6793}
6794
5e752e42
MK
6795void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
6796 const struct wmi_wmm_params_arg *arg)
5e3dd157
KV
6797{
6798 params->cwmin = __cpu_to_le32(arg->cwmin);
6799 params->cwmax = __cpu_to_le32(arg->cwmax);
6800 params->aifs = __cpu_to_le32(arg->aifs);
6801 params->txop = __cpu_to_le32(arg->txop);
6802 params->acm = __cpu_to_le32(arg->acm);
6803 params->no_ack = __cpu_to_le32(arg->no_ack);
6804}
6805
d7579d12
MK
6806static struct sk_buff *
6807ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
5e752e42 6808 const struct wmi_wmm_params_all_arg *arg)
5e3dd157
KV
6809{
6810 struct wmi_pdev_set_wmm_params *cmd;
6811 struct sk_buff *skb;
6812
7aa7a72a 6813 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6814 if (!skb)
d7579d12 6815 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6816
6817 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
5e752e42
MK
6818 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
6819 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
6820 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
6821 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
5e3dd157 6822
7aa7a72a 6823 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
d7579d12 6824 return skb;
5e3dd157
KV
6825}
6826
d7579d12 6827static struct sk_buff *
de23d3ef 6828ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
5e3dd157
KV
6829{
6830 struct wmi_request_stats_cmd *cmd;
6831 struct sk_buff *skb;
6832
7aa7a72a 6833 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6834 if (!skb)
d7579d12 6835 return ERR_PTR(-ENOMEM);
5e3dd157
KV
6836
6837 cmd = (struct wmi_request_stats_cmd *)skb->data;
de23d3ef 6838 cmd->stats_id = __cpu_to_le32(stats_mask);
5e3dd157 6839
de23d3ef
MK
6840 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
6841 stats_mask);
d7579d12 6842 return skb;
5e3dd157 6843}
9cfbce75 6844
d7579d12
MK
6845static struct sk_buff *
6846ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
6847 enum wmi_force_fw_hang_type type, u32 delay_ms)
9cfbce75
MK
6848{
6849 struct wmi_force_fw_hang_cmd *cmd;
6850 struct sk_buff *skb;
6851
7aa7a72a 6852 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9cfbce75 6853 if (!skb)
d7579d12 6854 return ERR_PTR(-ENOMEM);
9cfbce75
MK
6855
6856 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
6857 cmd->type = __cpu_to_le32(type);
6858 cmd->delay_ms = __cpu_to_le32(delay_ms);
6859
7aa7a72a 6860 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
9cfbce75 6861 type, delay_ms);
d7579d12 6862 return skb;
9cfbce75 6863}
f118a3e5 6864
d7579d12 6865static struct sk_buff *
467210a6
SJ
6866ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable,
6867 u32 log_level)
f118a3e5
KV
6868{
6869 struct wmi_dbglog_cfg_cmd *cmd;
6870 struct sk_buff *skb;
6871 u32 cfg;
6872
7aa7a72a 6873 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
f118a3e5 6874 if (!skb)
d7579d12 6875 return ERR_PTR(-ENOMEM);
f118a3e5
KV
6876
6877 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
6878
6879 if (module_enable) {
467210a6 6880 cfg = SM(log_level,
f118a3e5
KV
6881 ATH10K_DBGLOG_CFG_LOG_LVL);
6882 } else {
6883 /* set back defaults, all modules with WARN level */
6884 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
6885 ATH10K_DBGLOG_CFG_LOG_LVL);
6886 module_enable = ~0;
6887 }
6888
6889 cmd->module_enable = __cpu_to_le32(module_enable);
6890 cmd->module_valid = __cpu_to_le32(~0);
6891 cmd->config_enable = __cpu_to_le32(cfg);
6892 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
6893
7aa7a72a 6894 ath10k_dbg(ar, ATH10K_DBG_WMI,
f118a3e5
KV
6895 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
6896 __le32_to_cpu(cmd->module_enable),
6897 __le32_to_cpu(cmd->module_valid),
6898 __le32_to_cpu(cmd->config_enable),
6899 __le32_to_cpu(cmd->config_valid));
d7579d12 6900 return skb;
f118a3e5 6901}
b79b9baa 6902
d7579d12
MK
6903static struct sk_buff *
6904ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
90174455
RM
6905{
6906 struct wmi_pdev_pktlog_enable_cmd *cmd;
6907 struct sk_buff *skb;
6908
6909 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6910 if (!skb)
d7579d12 6911 return ERR_PTR(-ENOMEM);
90174455
RM
6912
6913 ev_bitmap &= ATH10K_PKTLOG_ANY;
90174455
RM
6914
6915 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
6916 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
d7579d12
MK
6917
6918 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
6919 ev_bitmap);
6920 return skb;
90174455
RM
6921}
6922
d7579d12
MK
6923static struct sk_buff *
6924ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
90174455
RM
6925{
6926 struct sk_buff *skb;
6927
6928 skb = ath10k_wmi_alloc_skb(ar, 0);
6929 if (!skb)
d7579d12 6930 return ERR_PTR(-ENOMEM);
90174455
RM
6931
6932 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
d7579d12 6933 return skb;
90174455
RM
6934}
6935
ffdd738d
RM
6936static struct sk_buff *
6937ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
6938 u32 duration, u32 next_offset,
6939 u32 enabled)
6940{
6941 struct wmi_pdev_set_quiet_cmd *cmd;
6942 struct sk_buff *skb;
6943
6944 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6945 if (!skb)
6946 return ERR_PTR(-ENOMEM);
6947
6948 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
6949 cmd->period = __cpu_to_le32(period);
6950 cmd->duration = __cpu_to_le32(duration);
6951 cmd->next_start = __cpu_to_le32(next_offset);
6952 cmd->enabled = __cpu_to_le32(enabled);
6953
6954 ath10k_dbg(ar, ATH10K_DBG_WMI,
6955 "wmi quiet param: period %u duration %u enabled %d\n",
6956 period, duration, enabled);
6957 return skb;
6958}
6959
dc8ab278
RM
6960static struct sk_buff *
6961ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
6962 const u8 *mac)
6963{
6964 struct wmi_addba_clear_resp_cmd *cmd;
6965 struct sk_buff *skb;
6966
6967 if (!mac)
6968 return ERR_PTR(-EINVAL);
6969
6970 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6971 if (!skb)
6972 return ERR_PTR(-ENOMEM);
6973
6974 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
6975 cmd->vdev_id = __cpu_to_le32(vdev_id);
6976 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6977
6978 ath10k_dbg(ar, ATH10K_DBG_WMI,
6979 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
6980 vdev_id, mac);
6981 return skb;
6982}
6983
65c0893d
RM
6984static struct sk_buff *
6985ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6986 u32 tid, u32 buf_size)
6987{
6988 struct wmi_addba_send_cmd *cmd;
6989 struct sk_buff *skb;
6990
6991 if (!mac)
6992 return ERR_PTR(-EINVAL);
6993
6994 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6995 if (!skb)
6996 return ERR_PTR(-ENOMEM);
6997
6998 cmd = (struct wmi_addba_send_cmd *)skb->data;
6999 cmd->vdev_id = __cpu_to_le32(vdev_id);
7000 ether_addr_copy(cmd->peer_macaddr.addr, mac);
7001 cmd->tid = __cpu_to_le32(tid);
7002 cmd->buffersize = __cpu_to_le32(buf_size);
7003
7004 ath10k_dbg(ar, ATH10K_DBG_WMI,
7005 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
7006 vdev_id, mac, tid, buf_size);
7007 return skb;
7008}
7009
11597413
RM
7010static struct sk_buff *
7011ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
7012 u32 tid, u32 status)
7013{
7014 struct wmi_addba_setresponse_cmd *cmd;
7015 struct sk_buff *skb;
7016
7017 if (!mac)
7018 return ERR_PTR(-EINVAL);
7019
7020 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7021 if (!skb)
7022 return ERR_PTR(-ENOMEM);
7023
7024 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
7025 cmd->vdev_id = __cpu_to_le32(vdev_id);
7026 ether_addr_copy(cmd->peer_macaddr.addr, mac);
7027 cmd->tid = __cpu_to_le32(tid);
7028 cmd->statuscode = __cpu_to_le32(status);
7029
7030 ath10k_dbg(ar, ATH10K_DBG_WMI,
7031 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
7032 vdev_id, mac, tid, status);
7033 return skb;
7034}
7035
50abef85
RM
7036static struct sk_buff *
7037ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
7038 u32 tid, u32 initiator, u32 reason)
7039{
7040 struct wmi_delba_send_cmd *cmd;
7041 struct sk_buff *skb;
7042
7043 if (!mac)
7044 return ERR_PTR(-EINVAL);
7045
7046 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7047 if (!skb)
7048 return ERR_PTR(-ENOMEM);
7049
7050 cmd = (struct wmi_delba_send_cmd *)skb->data;
7051 cmd->vdev_id = __cpu_to_le32(vdev_id);
7052 ether_addr_copy(cmd->peer_macaddr.addr, mac);
7053 cmd->tid = __cpu_to_le32(tid);
7054 cmd->initiator = __cpu_to_le32(initiator);
7055 cmd->reasoncode = __cpu_to_le32(reason);
7056
7057 ath10k_dbg(ar, ATH10K_DBG_WMI,
7058 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
7059 vdev_id, mac, tid, initiator, reason);
7060 return skb;
7061}
7062
29542666
MK
7063static struct sk_buff *
7064ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
7065{
7066 struct wmi_pdev_get_tpc_config_cmd *cmd;
7067 struct sk_buff *skb;
7068
7069 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7070 if (!skb)
7071 return ERR_PTR(-ENOMEM);
7072
7073 cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
7074 cmd->param = __cpu_to_le32(param);
7075
7076 ath10k_dbg(ar, ATH10K_DBG_WMI,
7077 "wmi pdev get tcp config param:%d\n", param);
7078 return skb;
7079}
7080
bc6f9ae6
MP
7081size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
7082{
7083 struct ath10k_fw_stats_peer *i;
7084 size_t num = 0;
7085
7086 list_for_each_entry(i, head, list)
7087 ++num;
7088
7089 return num;
7090}
7091
7092size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
7093{
7094 struct ath10k_fw_stats_vdev *i;
7095 size_t num = 0;
7096
7097 list_for_each_entry(i, head, list)
7098 ++num;
7099
7100 return num;
7101}
7102
7103static void
7104ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7105 char *buf, u32 *length)
7106{
7107 u32 len = *length;
7108 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7109
7110 len += scnprintf(buf + len, buf_len - len, "\n");
7111 len += scnprintf(buf + len, buf_len - len, "%30s\n",
7112 "ath10k PDEV stats");
7113 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7114 "=================");
7115
7116 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7117 "Channel noise floor", pdev->ch_noise_floor);
7118 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7119 "Channel TX power", pdev->chan_tx_power);
7120 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7121 "TX frame count", pdev->tx_frame_count);
7122 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7123 "RX frame count", pdev->rx_frame_count);
7124 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7125 "RX clear count", pdev->rx_clear_count);
7126 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7127 "Cycle count", pdev->cycle_count);
7128 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7129 "PHY error count", pdev->phy_err_count);
7130
7131 *length = len;
7132}
7133
7134static void
7135ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7136 char *buf, u32 *length)
7137{
7138 u32 len = *length;
7139 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7140
7141 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7142 "RTS bad count", pdev->rts_bad);
7143 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7144 "RTS good count", pdev->rts_good);
7145 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7146 "FCS bad count", pdev->fcs_bad);
7147 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7148 "No beacon count", pdev->no_beacons);
7149 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7150 "MIB int count", pdev->mib_int_count);
7151
7152 len += scnprintf(buf + len, buf_len - len, "\n");
7153 *length = len;
7154}
7155
7156static void
7157ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7158 char *buf, u32 *length)
7159{
7160 u32 len = *length;
7161 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7162
7163 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7164 "ath10k PDEV TX stats");
7165 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7166 "=================");
7167
7168 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7169 "HTT cookies queued", pdev->comp_queued);
7170 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7171 "HTT cookies disp.", pdev->comp_delivered);
7172 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7173 "MSDU queued", pdev->msdu_enqued);
7174 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7175 "MPDU queued", pdev->mpdu_enqued);
7176 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7177 "MSDUs dropped", pdev->wmm_drop);
7178 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7179 "Local enqued", pdev->local_enqued);
7180 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7181 "Local freed", pdev->local_freed);
7182 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7183 "HW queued", pdev->hw_queued);
7184 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7185 "PPDUs reaped", pdev->hw_reaped);
7186 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7187 "Num underruns", pdev->underrun);
7188 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7189 "PPDUs cleaned", pdev->tx_abort);
7190 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7191 "MPDUs requed", pdev->mpdus_requed);
7192 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7193 "Excessive retries", pdev->tx_ko);
7194 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7195 "HW rate", pdev->data_rc);
7196 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7197 "Sched self tiggers", pdev->self_triggers);
7198 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7199 "Dropped due to SW retries",
7200 pdev->sw_retry_failure);
7201 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7202 "Illegal rate phy errors",
7203 pdev->illgl_rate_phy_err);
7204 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7205 "Pdev continuous xretry", pdev->pdev_cont_xretry);
7206 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7207 "TX timeout", pdev->pdev_tx_timeout);
7208 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7209 "PDEV resets", pdev->pdev_resets);
7210 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7211 "PHY underrun", pdev->phy_underrun);
7212 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7213 "MPDU is more than txop limit", pdev->txop_ovf);
7214 *length = len;
7215}
7216
7217static void
7218ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7219 char *buf, u32 *length)
7220{
7221 u32 len = *length;
7222 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7223
7224 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7225 "ath10k PDEV RX stats");
7226 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7227 "=================");
7228
7229 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7230 "Mid PPDU route change",
7231 pdev->mid_ppdu_route_change);
7232 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7233 "Tot. number of statuses", pdev->status_rcvd);
7234 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7235 "Extra frags on rings 0", pdev->r0_frags);
7236 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7237 "Extra frags on rings 1", pdev->r1_frags);
7238 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7239 "Extra frags on rings 2", pdev->r2_frags);
7240 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7241 "Extra frags on rings 3", pdev->r3_frags);
7242 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7243 "MSDUs delivered to HTT", pdev->htt_msdus);
7244 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7245 "MPDUs delivered to HTT", pdev->htt_mpdus);
7246 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7247 "MSDUs delivered to stack", pdev->loc_msdus);
7248 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7249 "MPDUs delivered to stack", pdev->loc_mpdus);
7250 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7251 "Oversized AMSUs", pdev->oversize_amsdu);
7252 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7253 "PHY errors", pdev->phy_errs);
7254 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7255 "PHY errors drops", pdev->phy_err_drop);
7256 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7257 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
7258 *length = len;
7259}
7260
7261static void
7262ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
7263 char *buf, u32 *length)
7264{
7265 u32 len = *length;
7266 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7267 int i;
7268
7269 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7270 "vdev id", vdev->vdev_id);
7271 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7272 "beacon snr", vdev->beacon_snr);
7273 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7274 "data snr", vdev->data_snr);
7275 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7276 "num rx frames", vdev->num_rx_frames);
7277 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7278 "num rts fail", vdev->num_rts_fail);
7279 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7280 "num rts success", vdev->num_rts_success);
7281 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7282 "num rx err", vdev->num_rx_err);
7283 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7284 "num rx discard", vdev->num_rx_discard);
7285 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7286 "num tx not acked", vdev->num_tx_not_acked);
7287
7288 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
7289 len += scnprintf(buf + len, buf_len - len,
7290 "%25s [%02d] %u\n",
7291 "num tx frames", i,
7292 vdev->num_tx_frames[i]);
7293
7294 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
7295 len += scnprintf(buf + len, buf_len - len,
7296 "%25s [%02d] %u\n",
7297 "num tx frames retries", i,
7298 vdev->num_tx_frames_retries[i]);
7299
7300 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
7301 len += scnprintf(buf + len, buf_len - len,
7302 "%25s [%02d] %u\n",
7303 "num tx frames failures", i,
7304 vdev->num_tx_frames_failures[i]);
7305
7306 for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
7307 len += scnprintf(buf + len, buf_len - len,
7308 "%25s [%02d] 0x%08x\n",
7309 "tx rate history", i,
7310 vdev->tx_rate_history[i]);
7311
7312 for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
7313 len += scnprintf(buf + len, buf_len - len,
7314 "%25s [%02d] %u\n",
7315 "beacon rssi history", i,
7316 vdev->beacon_rssi_history[i]);
7317
7318 len += scnprintf(buf + len, buf_len - len, "\n");
7319 *length = len;
7320}
7321
7322static void
7323ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
7324 char *buf, u32 *length)
7325{
7326 u32 len = *length;
7327 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7328
7329 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7330 "Peer MAC address", peer->peer_macaddr);
7331 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7332 "Peer RSSI", peer->peer_rssi);
7333 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7334 "Peer TX rate", peer->peer_tx_rate);
7335 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7336 "Peer RX rate", peer->peer_rx_rate);
de46c015
MSS
7337 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7338 "Peer RX duration", peer->rx_duration);
7339
bc6f9ae6
MP
7340 len += scnprintf(buf + len, buf_len - len, "\n");
7341 *length = len;
7342}
7343
7344void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7345 struct ath10k_fw_stats *fw_stats,
7346 char *buf)
7347{
7348 u32 len = 0;
7349 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7350 const struct ath10k_fw_stats_pdev *pdev;
7351 const struct ath10k_fw_stats_vdev *vdev;
7352 const struct ath10k_fw_stats_peer *peer;
7353 size_t num_peers;
7354 size_t num_vdevs;
7355
7356 spin_lock_bh(&ar->data_lock);
7357
7358 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7359 struct ath10k_fw_stats_pdev, list);
7360 if (!pdev) {
7361 ath10k_warn(ar, "failed to get pdev stats\n");
7362 goto unlock;
7363 }
7364
7365 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7366 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7367
7368 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7369 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7370 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7371
7372 len += scnprintf(buf + len, buf_len - len, "\n");
7373 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7374 "ath10k VDEV stats", num_vdevs);
7375 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7376 "=================");
7377
7378 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7379 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7380 }
7381
7382 len += scnprintf(buf + len, buf_len - len, "\n");
7383 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7384 "ath10k PEER stats", num_peers);
7385 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7386 "=================");
7387
7388 list_for_each_entry(peer, &fw_stats->peers, list) {
7389 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7390 }
7391
7392unlock:
7393 spin_unlock_bh(&ar->data_lock);
7394
7395 if (len >= buf_len)
7396 buf[len - 1] = 0;
7397 else
7398 buf[len] = 0;
7399}
7400
7401void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7402 struct ath10k_fw_stats *fw_stats,
7403 char *buf)
7404{
7405 unsigned int len = 0;
7406 unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
7407 const struct ath10k_fw_stats_pdev *pdev;
7408 const struct ath10k_fw_stats_vdev *vdev;
7409 const struct ath10k_fw_stats_peer *peer;
7410 size_t num_peers;
7411 size_t num_vdevs;
7412
7413 spin_lock_bh(&ar->data_lock);
7414
7415 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7416 struct ath10k_fw_stats_pdev, list);
7417 if (!pdev) {
7418 ath10k_warn(ar, "failed to get pdev stats\n");
7419 goto unlock;
7420 }
7421
7422 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7423 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7424
7425 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7426 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
7427 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7428 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7429
7430 len += scnprintf(buf + len, buf_len - len, "\n");
7431 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7432 "ath10k VDEV stats", num_vdevs);
7433 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7434 "=================");
7435
7436 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7437 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7438 }
7439
7440 len += scnprintf(buf + len, buf_len - len, "\n");
7441 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7442 "ath10k PEER stats", num_peers);
7443 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7444 "=================");
7445
7446 list_for_each_entry(peer, &fw_stats->peers, list) {
7447 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7448 }
7449
7450unlock:
7451 spin_unlock_bh(&ar->data_lock);
7452
7453 if (len >= buf_len)
7454 buf[len - 1] = 0;
7455 else
7456 buf[len] = 0;
7457}
7458
62f77f09
M
7459static struct sk_buff *
7460ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
7461 u32 detect_level, u32 detect_margin)
7462{
7463 struct wmi_pdev_set_adaptive_cca_params *cmd;
7464 struct sk_buff *skb;
7465
7466 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7467 if (!skb)
7468 return ERR_PTR(-ENOMEM);
7469
7470 cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
7471 cmd->enable = __cpu_to_le32(enable);
7472 cmd->cca_detect_level = __cpu_to_le32(detect_level);
7473 cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
7474
7475 ath10k_dbg(ar, ATH10K_DBG_WMI,
7476 "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
7477 enable, detect_level, detect_margin);
7478 return skb;
7479}
7480
98dd2b92
MP
7481void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
7482 struct ath10k_fw_stats *fw_stats,
7483 char *buf)
7484{
7485 u32 len = 0;
7486 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7487 const struct ath10k_fw_stats_pdev *pdev;
7488 const struct ath10k_fw_stats_vdev *vdev;
7489 const struct ath10k_fw_stats_peer *peer;
7490 size_t num_peers;
7491 size_t num_vdevs;
7492
7493 spin_lock_bh(&ar->data_lock);
7494
7495 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7496 struct ath10k_fw_stats_pdev, list);
7497 if (!pdev) {
7498 ath10k_warn(ar, "failed to get pdev stats\n");
7499 goto unlock;
7500 }
7501
7502 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7503 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7504
7505 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7506 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
7507 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7508
7509 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7510 "HW paused", pdev->hw_paused);
7511 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7512 "Seqs posted", pdev->seq_posted);
7513 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7514 "Seqs failed queueing", pdev->seq_failed_queueing);
7515 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7516 "Seqs completed", pdev->seq_completed);
7517 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7518 "Seqs restarted", pdev->seq_restarted);
7519 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7520 "MU Seqs posted", pdev->mu_seq_posted);
7521 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7522 "MPDUs SW flushed", pdev->mpdus_sw_flush);
7523 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7524 "MPDUs HW filtered", pdev->mpdus_hw_filter);
7525 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7526 "MPDUs truncated", pdev->mpdus_truncated);
7527 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7528 "MPDUs receive no ACK", pdev->mpdus_ack_failed);
7529 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7530 "MPDUs expired", pdev->mpdus_expired);
7531
7532 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7533 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7534 "Num Rx Overflow errors", pdev->rx_ovfl_errs);
7535
7536 len += scnprintf(buf + len, buf_len - len, "\n");
7537 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7538 "ath10k VDEV stats", num_vdevs);
7539 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7540 "=================");
7541
7542 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7543 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7544 }
7545
7546 len += scnprintf(buf + len, buf_len - len, "\n");
7547 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7548 "ath10k PEER stats", num_peers);
7549 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7550 "=================");
7551
7552 list_for_each_entry(peer, &fw_stats->peers, list) {
7553 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7554 }
7555
7556unlock:
7557 spin_unlock_bh(&ar->data_lock);
7558
7559 if (len >= buf_len)
7560 buf[len - 1] = 0;
7561 else
7562 buf[len] = 0;
7563}
7564
6e4de1a4
PO
7565int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
7566 enum wmi_vdev_subtype subtype)
7567{
7568 switch (subtype) {
7569 case WMI_VDEV_SUBTYPE_NONE:
7570 return WMI_VDEV_SUBTYPE_LEGACY_NONE;
7571 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7572 return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
7573 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7574 return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
7575 case WMI_VDEV_SUBTYPE_P2P_GO:
7576 return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
7577 case WMI_VDEV_SUBTYPE_PROXY_STA:
7578 return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
7579 case WMI_VDEV_SUBTYPE_MESH_11S:
7580 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7581 return -ENOTSUPP;
7582 }
7583 return -ENOTSUPP;
7584}
7585
7586static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
7587 enum wmi_vdev_subtype subtype)
7588{
7589 switch (subtype) {
7590 case WMI_VDEV_SUBTYPE_NONE:
7591 return WMI_VDEV_SUBTYPE_10_2_4_NONE;
7592 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7593 return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
7594 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7595 return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
7596 case WMI_VDEV_SUBTYPE_P2P_GO:
7597 return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
7598 case WMI_VDEV_SUBTYPE_PROXY_STA:
7599 return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
7600 case WMI_VDEV_SUBTYPE_MESH_11S:
7601 return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
7602 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7603 return -ENOTSUPP;
7604 }
7605 return -ENOTSUPP;
7606}
7607
7608static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
7609 enum wmi_vdev_subtype subtype)
7610{
7611 switch (subtype) {
7612 case WMI_VDEV_SUBTYPE_NONE:
7613 return WMI_VDEV_SUBTYPE_10_4_NONE;
7614 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7615 return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
7616 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7617 return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
7618 case WMI_VDEV_SUBTYPE_P2P_GO:
7619 return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
7620 case WMI_VDEV_SUBTYPE_PROXY_STA:
7621 return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
7622 case WMI_VDEV_SUBTYPE_MESH_11S:
7623 return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
7624 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7625 return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
7626 }
7627 return -ENOTSUPP;
7628}
7629
47771902
RM
7630static struct sk_buff *
7631ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
7632 enum wmi_host_platform_type type,
7633 u32 fw_feature_bitmap)
7634{
7635 struct wmi_ext_resource_config_10_4_cmd *cmd;
7636 struct sk_buff *skb;
7637
7638 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7639 if (!skb)
7640 return ERR_PTR(-ENOMEM);
7641
7642 cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
7643 cmd->host_platform_config = __cpu_to_le32(type);
7644 cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
7645
7646 ath10k_dbg(ar, ATH10K_DBG_WMI,
7647 "wmi ext resource config host type %d firmware feature bitmap %08x\n",
7648 type, fw_feature_bitmap);
7649 return skb;
7650}
7651
d7579d12
MK
7652static const struct wmi_ops wmi_ops = {
7653 .rx = ath10k_wmi_op_rx,
7654 .map_svc = wmi_main_svc_map,
7655
7656 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7657 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7658 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7659 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7660 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7661 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7662 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK
7663 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7664 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
7665 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
7666 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
c1a4654a 7667 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK
7668
7669 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7670 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7671 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
7672 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7673 .gen_init = ath10k_wmi_op_gen_init,
7674 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
7675 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7676 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7677 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7678 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7679 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7680 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7681 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7682 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7683 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7684 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7685 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7686 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK
7687 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7688 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7689 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7690 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7691 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
7692 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7693 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7694 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7695 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7696 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7697 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7698 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7699 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7700 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7701 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7702 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7703 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7704 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
a57a6a27 7705 /* .gen_pdev_get_temperature not implemented */
dc8ab278 7706 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7707 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7708 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7709 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7710 .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
6e4de1a4 7711 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
be9ce9d8 7712 /* .gen_bcn_tmpl not implemented */
4c4955fe 7713 /* .gen_prb_tmpl not implemented */
369242b4 7714 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7715 /* .gen_adaptive_qcs not implemented */
62f77f09 7716 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK
7717};
7718
7719static const struct wmi_ops wmi_10_1_ops = {
7720 .rx = ath10k_wmi_10_1_op_rx,
7721 .map_svc = wmi_10x_svc_map,
7722 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
7723 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
7724 .gen_init = ath10k_wmi_10_1_op_gen_init,
7725 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7726 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7727 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
a57a6a27 7728 /* .gen_pdev_get_temperature not implemented */
d7579d12
MK
7729
7730 /* shared with main branch */
7731 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7732 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7733 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7734 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7735 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7736 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7737 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK
7738 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7739 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7740 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK
7741
7742 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7743 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7744 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7745 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7746 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7747 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7748 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7749 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7750 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7751 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7752 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7753 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7754 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7755 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7756 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK
7757 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7758 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7759 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7760 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7761 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7762 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7763 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7764 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7765 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7766 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7767 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7768 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7769 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7770 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7771 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7772 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7773 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7774 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7775 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7776 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7777 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7778 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
6e4de1a4 7779 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
be9ce9d8 7780 /* .gen_bcn_tmpl not implemented */
4c4955fe 7781 /* .gen_prb_tmpl not implemented */
369242b4 7782 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7783 /* .gen_adaptive_qcs not implemented */
62f77f09 7784 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK
7785};
7786
7787static const struct wmi_ops wmi_10_2_ops = {
7788 .rx = ath10k_wmi_10_2_op_rx,
20de2229 7789 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
d7579d12
MK
7790 .gen_init = ath10k_wmi_10_2_op_gen_init,
7791 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
a57a6a27 7792 /* .gen_pdev_get_temperature not implemented */
d7579d12
MK
7793
7794 /* shared with 10.1 */
7795 .map_svc = wmi_10x_svc_map,
7796 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
d7579d12
MK
7797 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7798 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7799
7800 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7801 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7802 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7803 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7804 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7805 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7806 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK
7807 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7808 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7809 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK
7810
7811 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7812 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7813 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7814 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7815 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7816 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7817 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7818 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7819 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7820 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7821 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7822 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7823 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7824 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7825 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK
7826 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7827 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7828 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7829 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7830 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7831 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7832 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7833 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7834 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7835 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7836 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7837 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7838 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7839 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7840 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7841 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7842 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7843 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7844 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7845 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7846 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7847 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
6e4de1a4 7848 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
62f77f09 7849 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK
7850};
7851
4a16fbec
RM
7852static const struct wmi_ops wmi_10_2_4_ops = {
7853 .rx = ath10k_wmi_10_2_op_rx,
20de2229 7854 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
4a16fbec
RM
7855 .gen_init = ath10k_wmi_10_2_op_gen_init,
7856 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
a57a6a27 7857 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
8a0b459e 7858 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
4a16fbec
RM
7859
7860 /* shared with 10.1 */
7861 .map_svc = wmi_10x_svc_map,
7862 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
4a16fbec
RM
7863 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7864 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7865
7866 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7867 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7868 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7869 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7870 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
8b019fb0 7871 .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
991adf71 7872 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
4a16fbec
RM
7873 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7874 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7875 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
4a16fbec
RM
7876
7877 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7878 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7879 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7880 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7881 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7882 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7883 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7884 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7885 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7886 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7887 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7888 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7889 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7890 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
7891 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7892 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7893 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7894 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7895 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7896 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7897 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7898 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7899 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7900 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7901 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7902 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7903 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7904 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7905 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7906 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7907 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7908 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7909 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7910 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7911 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
29542666 7912 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
bc6f9ae6 7913 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
62f77f09
M
7914 .gen_pdev_enable_adaptive_cca =
7915 ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
6e4de1a4 7916 .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
be9ce9d8 7917 /* .gen_bcn_tmpl not implemented */
4c4955fe 7918 /* .gen_prb_tmpl not implemented */
369242b4 7919 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7920 /* .gen_adaptive_qcs not implemented */
4a16fbec
RM
7921};
7922
840357cc 7923static const struct wmi_ops wmi_10_4_ops = {
1c092961 7924 .rx = ath10k_wmi_10_4_op_rx,
840357cc 7925 .map_svc = wmi_10_4_svc_map,
b2297baa 7926
98dd2b92 7927 .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
b2297baa 7928 .pull_scan = ath10k_wmi_op_pull_scan_ev,
1c092961 7929 .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
b2297baa 7930 .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
373b48cf
RM
7931 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7932 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
3cec3be3 7933 .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
2b0a2e0d
RM
7934 .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
7935 .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
1c092961 7936 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
d02e752f 7937 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
343bf960 7938 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
08e75ea8 7939 .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
373b48cf
RM
7940
7941 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7942 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7943 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7944 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
d1e52a8e 7945 .gen_init = ath10k_wmi_10_4_op_gen_init,
b2297baa
RM
7946 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
7947 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
373b48cf
RM
7948 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7949 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7950 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7951 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7952 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7953 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7954 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7955 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
4535edbd
RM
7956 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7957 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
373b48cf
RM
7958 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7959 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7960 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7961 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
b54e16f1 7962 .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
373b48cf
RM
7963 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7964 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7965 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7966 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7967 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7968 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7969 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7970 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7971 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7972 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7973 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
7974 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
b2887410
VT
7975 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
7976 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
7977 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
7978 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
98dd2b92 7979 .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
47771902 7980 .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
373b48cf
RM
7981
7982 /* shared with 10.2 */
98dd2b92 7983 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
6dd46348 7984 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
6e4de1a4 7985 .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
8a0b459e 7986 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
840357cc
RM
7987};
7988
b79b9baa
MK
7989int ath10k_wmi_attach(struct ath10k *ar)
7990{
bf3c13ab 7991 switch (ar->running_fw->fw_file.wmi_op_version) {
9bd21322 7992 case ATH10K_FW_WMI_OP_VERSION_10_4:
840357cc 7993 ar->wmi.ops = &wmi_10_4_ops;
2d491e69 7994 ar->wmi.cmd = &wmi_10_4_cmd_map;
93841a15 7995 ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
d86561ff 7996 ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
3fab30f7 7997 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9bd21322 7998 break;
4a16fbec
RM
7999 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
8000 ar->wmi.cmd = &wmi_10_2_4_cmd_map;
8001 ar->wmi.ops = &wmi_10_2_4_ops;
8002 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
8003 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
3fab30f7 8004 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
4a16fbec 8005 break;
d7579d12
MK
8006 case ATH10K_FW_WMI_OP_VERSION_10_2:
8007 ar->wmi.cmd = &wmi_10_2_cmd_map;
8008 ar->wmi.ops = &wmi_10_2_ops;
b79b9baa
MK
8009 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
8010 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
3fab30f7 8011 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
d7579d12
MK
8012 break;
8013 case ATH10K_FW_WMI_OP_VERSION_10_1:
8014 ar->wmi.cmd = &wmi_10x_cmd_map;
8015 ar->wmi.ops = &wmi_10_1_ops;
8016 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
8017 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
3fab30f7 8018 ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
d7579d12
MK
8019 break;
8020 case ATH10K_FW_WMI_OP_VERSION_MAIN:
b79b9baa 8021 ar->wmi.cmd = &wmi_cmd_map;
d7579d12 8022 ar->wmi.ops = &wmi_ops;
b79b9baa
MK
8023 ar->wmi.vdev_param = &wmi_vdev_param_map;
8024 ar->wmi.pdev_param = &wmi_pdev_param_map;
3fab30f7 8025 ar->wmi.peer_flags = &wmi_peer_flags_map;
d7579d12 8026 break;
ca996ec5
MK
8027 case ATH10K_FW_WMI_OP_VERSION_TLV:
8028 ath10k_wmi_tlv_attach(ar);
8029 break;
d7579d12
MK
8030 case ATH10K_FW_WMI_OP_VERSION_UNSET:
8031 case ATH10K_FW_WMI_OP_VERSION_MAX:
8032 ath10k_err(ar, "unsupported WMI op version: %d\n",
bf3c13ab 8033 ar->running_fw->fw_file.wmi_op_version);
d7579d12 8034 return -EINVAL;
b79b9baa
MK
8035 }
8036
8037 init_completion(&ar->wmi.service_ready);
8038 init_completion(&ar->wmi.unified_ready);
b79b9baa 8039
c8ecfc1c
RM
8040 INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
8041
b79b9baa
MK
8042 return 0;
8043}
8044
a925a376 8045void ath10k_wmi_free_host_mem(struct ath10k *ar)
b79b9baa
MK
8046{
8047 int i;
8048
8049 /* free the host memory chunks requested by firmware */
8050 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
b0578865
FF
8051 dma_unmap_single(ar->dev,
8052 ar->wmi.mem_chunks[i].paddr,
8053 ar->wmi.mem_chunks[i].len,
8054 DMA_TO_DEVICE);
8055 kfree(ar->wmi.mem_chunks[i].vaddr);
b79b9baa
MK
8056 }
8057
8058 ar->wmi.num_mem_chunks = 0;
8059}
a925a376
VT
8060
8061void ath10k_wmi_detach(struct ath10k *ar)
8062{
8063 cancel_work_sync(&ar->svc_rdy_work);
8064
8065 if (ar->svc_rdy_skb)
8066 dev_kfree_skb(ar->svc_rdy_skb);
8067}
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