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ath10k: get rid of pci_assign_resource() call from pci_probe
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
5e3dd157
KV		 20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
25#include "mac.h"
26
ce42870e
BM		 27/* MAIN WMI cmd track */
28static struct wmi_cmd_map wmi_cmd_map = {
29 .init_cmdid = WMI_INIT_CMDID,
30 .start_scan_cmdid = WMI_START_SCAN_CMDID,
31 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
32 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
33 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
34 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
35 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
36 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
37 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
38 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
39 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
40 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
41 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
42 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
43 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
44 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
45 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
46 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
47 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
48 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
49 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
50 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
51 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
52 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
53 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
54 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
55 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
56 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
57 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
58 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
59 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
60 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
61 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
62 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
63 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
64 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
65 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
66 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
67 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
68 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
69 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
70 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
71 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
72 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
73 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
74 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
75 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
76 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
77 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
78 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
79 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
80 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
81 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
82 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
83 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
84 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
85 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
86 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
87 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
88 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
89 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
90 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
91 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
92 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
93 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
94 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
95 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
96 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
97 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
98 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
99 .wlan_profile_set_hist_intvl_cmdid =
100 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
101 .wlan_profile_get_profile_data_cmdid =
102 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
103 .wlan_profile_enable_profile_id_cmdid =
104 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
105 .wlan_profile_list_profile_id_cmdid =
106 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
107 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
108 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
109 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
110 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
111 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
112 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
113 .wow_enable_disable_wake_event_cmdid =
114 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
115 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
116 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
117 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
118 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
119 .vdev_spectral_scan_configure_cmdid =
120 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
121 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
122 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
123 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
124 .network_list_offload_config_cmdid =
125 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
126 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
127 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
128 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
129 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
130 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
131 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
132 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
133 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
134 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
135 .echo_cmdid = WMI_ECHO_CMDID,
136 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
137 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
138 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
139 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
140 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
141 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
142 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
143 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
144 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
145};
146
b7e3adf9
BM		 147/* 10.X WMI cmd track */
148static struct wmi_cmd_map wmi_10x_cmd_map = {
149 .init_cmdid = WMI_10X_INIT_CMDID,
150 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
151 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
152 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 153 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 154 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
155 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
156 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
157 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
158 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
159 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
160 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
161 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
162 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
163 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
164 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
165 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
166 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
167 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
168 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
169 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
170 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
171 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
172 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
173 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
174 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
175 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
176 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
177 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
178 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
179 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
180 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
181 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
182 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
183 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
184 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
185 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 186 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 187 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
188 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
189 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 190 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 191 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
192 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
193 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
194 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
195 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
196 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
197 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
198 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
199 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
200 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
201 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
202 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
203 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
204 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
205 .roam_scan_rssi_change_threshold =
206 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
207 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
208 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
209 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
210 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
211 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
212 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
213 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
214 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 215 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 216 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 217 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 218 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
219 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
220 .wlan_profile_set_hist_intvl_cmdid =
221 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
222 .wlan_profile_get_profile_data_cmdid =
223 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
224 .wlan_profile_enable_profile_id_cmdid =
225 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
226 .wlan_profile_list_profile_id_cmdid =
227 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
228 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
229 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
230 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
231 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
232 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
233 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
234 .wow_enable_disable_wake_event_cmdid =
235 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
236 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
237 .wow_hostwakeup_from_sleep_cmdid =
238 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
239 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
240 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
241 .vdev_spectral_scan_configure_cmdid =
242 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
243 .vdev_spectral_scan_enable_cmdid =
244 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
245 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
34957b25
BM		 246 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
247 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
248 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
249 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
250 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
251 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
252 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
253 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
254 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
255 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
256 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 257 .echo_cmdid = WMI_10X_ECHO_CMDID,
258 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
259 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
260 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
34957b25
BM		 261 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
262 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
263 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
264 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 265 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
266 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
267};
ce42870e 268
6d1506e7
BM		 269/* MAIN WMI VDEV param map */
270static struct wmi_vdev_param_map wmi_vdev_param_map = {
271 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
272 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
273 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
274 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
275 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
276 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
277 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
278 .preamble = WMI_VDEV_PARAM_PREAMBLE,
279 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
280 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
281 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
282 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
283 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
284 .wmi_vdev_oc_scheduler_air_time_limit =
285 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
286 .wds = WMI_VDEV_PARAM_WDS,
287 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
288 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
289 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
290 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
291 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
292 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
293 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
294 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
295 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
296 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
297 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
298 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
299 .sgi = WMI_VDEV_PARAM_SGI,
300 .ldpc = WMI_VDEV_PARAM_LDPC,
301 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
302 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
303 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
304 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
305 .nss = WMI_VDEV_PARAM_NSS,
306 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
307 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
308 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
309 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
310 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
311 .ap_keepalive_min_idle_inactive_time_secs =
312 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
313 .ap_keepalive_max_idle_inactive_time_secs =
314 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
315 .ap_keepalive_max_unresponsive_time_secs =
316 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
317 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
318 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
319 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
320 .txbf = WMI_VDEV_PARAM_TXBF,
321 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
322 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
323 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
324 .ap_detect_out_of_sync_sleeping_sta_time_secs =
325 WMI_VDEV_PARAM_UNSUPPORTED,
326};
327
328/* 10.X WMI VDEV param map */
329static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
330 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
331 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
332 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
333 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
334 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
335 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
336 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
337 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
338 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
339 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
340 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
341 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
342 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
343 .wmi_vdev_oc_scheduler_air_time_limit =
344 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
345 .wds = WMI_10X_VDEV_PARAM_WDS,
346 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
347 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
348 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
349 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
350 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
351 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
352 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
353 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
354 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
355 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
356 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
357 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
358 .sgi = WMI_10X_VDEV_PARAM_SGI,
359 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
360 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
361 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
362 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
363 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
364 .nss = WMI_10X_VDEV_PARAM_NSS,
365 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
366 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
367 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
368 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
369 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
370 .ap_keepalive_min_idle_inactive_time_secs =
371 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
372 .ap_keepalive_max_idle_inactive_time_secs =
373 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
374 .ap_keepalive_max_unresponsive_time_secs =
375 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
376 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
377 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
378 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
379 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
380 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
381 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
382 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
383 .ap_detect_out_of_sync_sleeping_sta_time_secs =
384 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
385};
386
226a339b
BM		 387static struct wmi_pdev_param_map wmi_pdev_param_map = {
388 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
389 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
390 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
391 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
392 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
393 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
394 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
395 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
396 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
397 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
398 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
399 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
400 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
401 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
402 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
403 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
404 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
405 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
406 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
407 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
408 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
409 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
410 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
411 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
412 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
413 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
414 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
415 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
416 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
417 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
418 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
419 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
420 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
421 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
422 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
226a339b
BM		 423 .dcs = WMI_PDEV_PARAM_DCS,
424 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
425 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
426 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
427 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
428 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
429 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
430 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
431 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
432 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
433 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
434 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
435 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
436};
437
438static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
439 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
440 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
441 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
442 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
443 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
444 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
445 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
446 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
447 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
448 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
449 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
450 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
451 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
452 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
453 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
454 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
455 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
456 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
457 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
458 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
459 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
460 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
461 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
462 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
463 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
464 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
465 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
466 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
467 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
468 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
469 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
470 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
471 .bcnflt_stats_update_period =
472 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
473 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
ab6258ed 474 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
226a339b
BM		 475 .dcs = WMI_10X_PDEV_PARAM_DCS,
476 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
477 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
478 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
479 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
480 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
481 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
482 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
483 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
484 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
485 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
486 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
487 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
488};
489
5e3dd157
KV		 490int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
491{
492 int ret;
493 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
494 WMI_SERVICE_READY_TIMEOUT_HZ);
495 return ret;
496}
497
498int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
499{
500 int ret;
501 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
502 WMI_UNIFIED_READY_TIMEOUT_HZ);
503 return ret;
504}
505
506static struct sk_buff *ath10k_wmi_alloc_skb(u32 len)
507{
508 struct sk_buff *skb;
509 u32 round_len = roundup(len, 4);
510
511 skb = ath10k_htc_alloc_skb(WMI_SKB_HEADROOM + round_len);
512 if (!skb)
513 return NULL;
514
515 skb_reserve(skb, WMI_SKB_HEADROOM);
516 if (!IS_ALIGNED((unsigned long)skb->data, 4))
517 ath10k_warn("Unaligned WMI skb\n");
518
519 skb_put(skb, round_len);
520 memset(skb->data, 0, round_len);
521
522 return skb;
523}
524
525static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
526{
527 dev_kfree_skb(skb);
5e3dd157
KV		 528}
529
be8b3943 530static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
ce42870e 531 u32 cmd_id)
5e3dd157
KV		 532{
533 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
534 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 535 int ret;
5e3dd157
KV		 536 u32 cmd = 0;
537
538 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
539 return -ENOMEM;
540
541 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
542
543 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
544 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
545
5e3dd157 546 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943
MK		 547 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
548 trace_ath10k_wmi_cmd(cmd_id, skb->data, skb->len, ret);
5e3dd157 549
be8b3943
MK		 550 if (ret)
551 goto err_pull;
5e3dd157 552
be8b3943
MK		 553 return 0;
554
555err_pull:
556 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
557 return ret;
558}
559
ed54388a
MK		 560static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
561{
ed54388a
MK		 562 int ret;
563
564 lockdep_assert_held(&arvif->ar->data_lock);
565
566 if (arvif->beacon == NULL)
567 return;
568
748afc47
MK		 569 if (arvif->beacon_sent)
570 return;
ed54388a 571
748afc47 572 ret = ath10k_wmi_beacon_send_ref_nowait(arvif);
ed54388a
MK		 573 if (ret)
574 return;
575
748afc47
MK		 576 /* We need to retain the arvif->beacon reference for DMA unmapping and
577 * freeing the skbuff later. */
578 arvif->beacon_sent = true;
ed54388a
MK		 579}
580
581static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
582 struct ieee80211_vif *vif)
583{
584 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
585
586 ath10k_wmi_tx_beacon_nowait(arvif);
587}
588
589static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
590{
591 spin_lock_bh(&ar->data_lock);
592 ieee80211_iterate_active_interfaces_atomic(ar->hw,
593 IEEE80211_IFACE_ITER_NORMAL,
594 ath10k_wmi_tx_beacons_iter,
595 NULL);
596 spin_unlock_bh(&ar->data_lock);
597}
598
12acbc43 599static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 600{
ed54388a
MK		 601 /* try to send pending beacons first. they take priority */
602 ath10k_wmi_tx_beacons_nowait(ar);
603
be8b3943
MK		 604 wake_up(&ar->wmi.tx_credits_wq);
605}
606
607static int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb,
ce42870e 608 u32 cmd_id)
be8b3943 609{
34957b25 610 int ret = -EOPNOTSUPP;
be8b3943 611
56b84287
KV		 612 might_sleep();
613
34957b25 614 if (cmd_id == WMI_CMD_UNSUPPORTED) {
55321559
BM		 615 ath10k_warn("wmi command %d is not supported by firmware\n",
616 cmd_id);
617 return ret;
618 }
be8b3943
MK		 619
620 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK		 621 /* try to send pending beacons first. they take priority */
622 ath10k_wmi_tx_beacons_nowait(ar);
623
be8b3943
MK		 624 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
625 (ret != -EAGAIN);
626 }), 3*HZ);
627
628 if (ret)
5e3dd157 629 dev_kfree_skb_any(skb);
5e3dd157 630
be8b3943 631 return ret;
5e3dd157
KV		 632}
633
5e00d31a
BM		 634int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
635{
636 int ret = 0;
637 struct wmi_mgmt_tx_cmd *cmd;
638 struct ieee80211_hdr *hdr;
639 struct sk_buff *wmi_skb;
640 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
641 int len;
642 u16 fc;
643
644 hdr = (struct ieee80211_hdr *)skb->data;
645 fc = le16_to_cpu(hdr->frame_control);
646
647 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
648 return -EINVAL;
649
650 len = sizeof(cmd->hdr) + skb->len;
651 len = round_up(len, 4);
652
653 wmi_skb = ath10k_wmi_alloc_skb(len);
654 if (!wmi_skb)
655 return -ENOMEM;
656
657 cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
658
659 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
660 cmd->hdr.tx_rate = 0;
661 cmd->hdr.tx_power = 0;
662 cmd->hdr.buf_len = __cpu_to_le32((u32)(skb->len));
663
664 memcpy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr), ETH_ALEN);
665 memcpy(cmd->buf, skb->data, skb->len);
666
667 ath10k_dbg(ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
668 wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
669 fc & IEEE80211_FCTL_STYPE);
670
671 /* Send the management frame buffer to the target */
672 ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
5fb5e41f 673 if (ret)
5e00d31a 674 return ret;
5e00d31a
BM		 675
676 /* TODO: report tx status to mac80211 - temporary just ACK */
677 info->flags |= IEEE80211_TX_STAT_ACK;
678 ieee80211_tx_status_irqsafe(ar->hw, skb);
679
680 return ret;
681}
682
5e3dd157
KV		 683static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
684{
685 struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
686 enum wmi_scan_event_type event_type;
687 enum wmi_scan_completion_reason reason;
688 u32 freq;
689 u32 req_id;
690 u32 scan_id;
691 u32 vdev_id;
692
693 event_type = __le32_to_cpu(event->event_type);
694 reason = __le32_to_cpu(event->reason);
695 freq = __le32_to_cpu(event->channel_freq);
696 req_id = __le32_to_cpu(event->scan_req_id);
697 scan_id = __le32_to_cpu(event->scan_id);
698 vdev_id = __le32_to_cpu(event->vdev_id);
699
700 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENTID\n");
701 ath10k_dbg(ATH10K_DBG_WMI,
702 "scan event type %d reason %d freq %d req_id %d "
703 "scan_id %d vdev_id %d\n",
704 event_type, reason, freq, req_id, scan_id, vdev_id);
705
706 spin_lock_bh(&ar->data_lock);
707
708 switch (event_type) {
709 case WMI_SCAN_EVENT_STARTED:
710 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_STARTED\n");
711 if (ar->scan.in_progress && ar->scan.is_roc)
712 ieee80211_ready_on_channel(ar->hw);
713
714 complete(&ar->scan.started);
715 break;
716 case WMI_SCAN_EVENT_COMPLETED:
717 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_COMPLETED\n");
718 switch (reason) {
719 case WMI_SCAN_REASON_COMPLETED:
720 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_COMPLETED\n");
721 break;
722 case WMI_SCAN_REASON_CANCELLED:
723 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_CANCELED\n");
724 break;
725 case WMI_SCAN_REASON_PREEMPTED:
726 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_PREEMPTED\n");
727 break;
728 case WMI_SCAN_REASON_TIMEDOUT:
729 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_TIMEDOUT\n");
730 break;
731 default:
732 break;
733 }
734
735 ar->scan_channel = NULL;
736 if (!ar->scan.in_progress) {
737 ath10k_warn("no scan requested, ignoring\n");
738 break;
739 }
740
741 if (ar->scan.is_roc) {
742 ath10k_offchan_tx_purge(ar);
743
744 if (!ar->scan.aborting)
745 ieee80211_remain_on_channel_expired(ar->hw);
746 } else {
747 ieee80211_scan_completed(ar->hw, ar->scan.aborting);
748 }
749
750 del_timer(&ar->scan.timeout);
751 complete_all(&ar->scan.completed);
752 ar->scan.in_progress = false;
753 break;
754 case WMI_SCAN_EVENT_BSS_CHANNEL:
755 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_BSS_CHANNEL\n");
756 ar->scan_channel = NULL;
757 break;
758 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
759 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_FOREIGN_CHANNEL\n");
760 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
761 if (ar->scan.in_progress && ar->scan.is_roc &&
762 ar->scan.roc_freq == freq) {
763 complete(&ar->scan.on_channel);
764 }
765 break;
766 case WMI_SCAN_EVENT_DEQUEUED:
767 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_DEQUEUED\n");
768 break;
769 case WMI_SCAN_EVENT_PREEMPTED:
770 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_PREEMPTED\n");
771 break;
772 case WMI_SCAN_EVENT_START_FAILED:
773 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_START_FAILED\n");
774 break;
775 default:
776 break;
777 }
778
779 spin_unlock_bh(&ar->data_lock);
780 return 0;
781}
782
783static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
784{
785 enum ieee80211_band band;
786
787 switch (phy_mode) {
788 case MODE_11A:
789 case MODE_11NA_HT20:
790 case MODE_11NA_HT40:
791 case MODE_11AC_VHT20:
792 case MODE_11AC_VHT40:
793 case MODE_11AC_VHT80:
794 band = IEEE80211_BAND_5GHZ;
795 break;
796 case MODE_11G:
797 case MODE_11B:
798 case MODE_11GONLY:
799 case MODE_11NG_HT20:
800 case MODE_11NG_HT40:
801 case MODE_11AC_VHT20_2G:
802 case MODE_11AC_VHT40_2G:
803 case MODE_11AC_VHT80_2G:
804 default:
805 band = IEEE80211_BAND_2GHZ;
806 }
807
808 return band;
809}
810
811static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
812{
813 u8 rate_idx = 0;
814
815 /* rate in Kbps */
816 switch (rate) {
817 case 1000:
818 rate_idx = 0;
819 break;
820 case 2000:
821 rate_idx = 1;
822 break;
823 case 5500:
824 rate_idx = 2;
825 break;
826 case 11000:
827 rate_idx = 3;
828 break;
829 case 6000:
830 rate_idx = 4;
831 break;
832 case 9000:
833 rate_idx = 5;
834 break;
835 case 12000:
836 rate_idx = 6;
837 break;
838 case 18000:
839 rate_idx = 7;
840 break;
841 case 24000:
842 rate_idx = 8;
843 break;
844 case 36000:
845 rate_idx = 9;
846 break;
847 case 48000:
848 rate_idx = 10;
849 break;
850 case 54000:
851 rate_idx = 11;
852 break;
853 default:
854 break;
855 }
856
857 if (band == IEEE80211_BAND_5GHZ) {
858 if (rate_idx > 3)
859 /* Omit CCK rates */
860 rate_idx -= 4;
861 else
862 rate_idx = 0;
863 }
864
865 return rate_idx;
866}
867
868static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
869{
0d9b0438
MK		 870 struct wmi_mgmt_rx_event_v1 *ev_v1;
871 struct wmi_mgmt_rx_event_v2 *ev_v2;
872 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
5e3dd157 873 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
453cdb61 874 struct ieee80211_channel *ch;
5e3dd157
KV		 875 struct ieee80211_hdr *hdr;
876 u32 rx_status;
877 u32 channel;
878 u32 phy_mode;
879 u32 snr;
880 u32 rate;
881 u32 buf_len;
882 u16 fc;
0d9b0438
MK		 883 int pull_len;
884
885 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
886 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
887 ev_hdr = &ev_v2->hdr.v1;
888 pull_len = sizeof(*ev_v2);
889 } else {
890 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
891 ev_hdr = &ev_v1->hdr;
892 pull_len = sizeof(*ev_v1);
893 }
5e3dd157 894
0d9b0438
MK		 895 channel = __le32_to_cpu(ev_hdr->channel);
896 buf_len = __le32_to_cpu(ev_hdr->buf_len);
897 rx_status = __le32_to_cpu(ev_hdr->status);
898 snr = __le32_to_cpu(ev_hdr->snr);
899 phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
900 rate = __le32_to_cpu(ev_hdr->rate);
5e3dd157
KV		 901
902 memset(status, 0, sizeof(*status));
903
904 ath10k_dbg(ATH10K_DBG_MGMT,
905 "event mgmt rx status %08x\n", rx_status);
906
e8a50f8b
MP		 907 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
908 dev_kfree_skb(skb);
909 return 0;
910 }
911
5e3dd157
KV		 912 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
913 dev_kfree_skb(skb);
914 return 0;
915 }
916
917 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
918 dev_kfree_skb(skb);
919 return 0;
920 }
921
922 if (rx_status & WMI_RX_STATUS_ERR_CRC)
923 status->flag |= RX_FLAG_FAILED_FCS_CRC;
924 if (rx_status & WMI_RX_STATUS_ERR_MIC)
925 status->flag |= RX_FLAG_MMIC_ERROR;
926
453cdb61
MK		 927 /* HW can Rx CCK rates on 5GHz. In that case phy_mode is set to
928 * MODE_11B. This means phy_mode is not a reliable source for the band
929 * of mgmt rx. */
930
931 ch = ar->scan_channel;
932 if (!ch)
933 ch = ar->rx_channel;
934
935 if (ch) {
936 status->band = ch->band;
937
938 if (phy_mode == MODE_11B &&
939 status->band == IEEE80211_BAND_5GHZ)
940 ath10k_dbg(ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
941 } else {
942 ath10k_warn("using (unreliable) phy_mode to extract band for mgmt rx\n");
943 status->band = phy_mode_to_band(phy_mode);
944 }
945
5e3dd157
KV		 946 status->freq = ieee80211_channel_to_frequency(channel, status->band);
947 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
948 status->rate_idx = get_rate_idx(rate, status->band);
949
0d9b0438 950 skb_pull(skb, pull_len);
5e3dd157
KV		 951
952 hdr = (struct ieee80211_hdr *)skb->data;
953 fc = le16_to_cpu(hdr->frame_control);
954
2b6a6a90
MK		 955 /* FW delivers WEP Shared Auth frame with Protected Bit set and
956 * encrypted payload. However in case of PMF it delivers decrypted
957 * frames with Protected Bit set. */
958 if (ieee80211_has_protected(hdr->frame_control) &&
959 !ieee80211_is_auth(hdr->frame_control)) {
5e3dd157
KV		 960 status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_IV_STRIPPED |
961 RX_FLAG_MMIC_STRIPPED;
962 hdr->frame_control = __cpu_to_le16(fc &
963 ~IEEE80211_FCTL_PROTECTED);
964 }
965
966 ath10k_dbg(ATH10K_DBG_MGMT,
967 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
968 skb, skb->len,
969 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
970
971 ath10k_dbg(ATH10K_DBG_MGMT,
972 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
973 status->freq, status->band, status->signal,
974 status->rate_idx);
975
976 /*
977 * packets from HTC come aligned to 4byte boundaries
978 * because they can originally come in along with a trailer
979 */
980 skb_trim(skb, buf_len);
981
982 ieee80211_rx(ar->hw, skb);
983 return 0;
984}
985
2e1dea40
MK		 986static int freq_to_idx(struct ath10k *ar, int freq)
987{
988 struct ieee80211_supported_band *sband;
989 int band, ch, idx = 0;
990
991 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
992 sband = ar->hw->wiphy->bands[band];
993 if (!sband)
994 continue;
995
996 for (ch = 0; ch < sband->n_channels; ch++, idx++)
997 if (sband->channels[ch].center_freq == freq)
998 goto exit;
999 }
1000
1001exit:
1002 return idx;
1003}
1004
5e3dd157
KV		 1005static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1006{
2e1dea40
MK		 1007 struct wmi_chan_info_event *ev;
1008 struct survey_info *survey;
1009 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1010 int idx;
1011
1012 ev = (struct wmi_chan_info_event *)skb->data;
1013
1014 err_code = __le32_to_cpu(ev->err_code);
1015 freq = __le32_to_cpu(ev->freq);
1016 cmd_flags = __le32_to_cpu(ev->cmd_flags);
1017 noise_floor = __le32_to_cpu(ev->noise_floor);
1018 rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
1019 cycle_count = __le32_to_cpu(ev->cycle_count);
1020
1021 ath10k_dbg(ATH10K_DBG_WMI,
1022 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1023 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1024 cycle_count);
1025
1026 spin_lock_bh(&ar->data_lock);
1027
1028 if (!ar->scan.in_progress) {
1029 ath10k_warn("chan info event without a scan request?\n");
1030 goto exit;
1031 }
1032
1033 idx = freq_to_idx(ar, freq);
1034 if (idx >= ARRAY_SIZE(ar->survey)) {
1035 ath10k_warn("chan info: invalid frequency %d (idx %d out of bounds)\n",
1036 freq, idx);
1037 goto exit;
1038 }
1039
1040 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1041 /* During scanning chan info is reported twice for each
1042 * visited channel. The reported cycle count is global
1043 * and per-channel cycle count must be calculated */
1044
1045 cycle_count -= ar->survey_last_cycle_count;
1046 rx_clear_count -= ar->survey_last_rx_clear_count;
1047
1048 survey = &ar->survey[idx];
1049 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
1050 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1051 survey->noise = noise_floor;
1052 survey->filled = SURVEY_INFO_CHANNEL_TIME |
1053 SURVEY_INFO_CHANNEL_TIME_RX |
1054 SURVEY_INFO_NOISE_DBM;
1055 }
1056
1057 ar->survey_last_rx_clear_count = rx_clear_count;
1058 ar->survey_last_cycle_count = cycle_count;
1059
1060exit:
1061 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1062}
1063
1064static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1065{
1066 ath10k_dbg(ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
1067}
1068
869526b9 1069static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 1070{
869526b9
KV		 1071 ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
1072 skb->len);
1073
1074 trace_ath10k_wmi_dbglog(skb->data, skb->len);
1075
1076 return 0;
5e3dd157
KV		 1077}
1078
1079static void ath10k_wmi_event_update_stats(struct ath10k *ar,
1080 struct sk_buff *skb)
1081{
1082 struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
1083
1084 ath10k_dbg(ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
1085
1086 ath10k_debug_read_target_stats(ar, ev);
1087}
1088
1089static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
1090 struct sk_buff *skb)
1091{
1092 struct wmi_vdev_start_response_event *ev;
1093
1094 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
1095
1096 ev = (struct wmi_vdev_start_response_event *)skb->data;
1097
1098 if (WARN_ON(__le32_to_cpu(ev->status)))
1099 return;
1100
1101 complete(&ar->vdev_setup_done);
1102}
1103
1104static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
1105 struct sk_buff *skb)
1106{
1107 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
1108 complete(&ar->vdev_setup_done);
1109}
1110
1111static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
1112 struct sk_buff *skb)
1113{
5a13e76e
KV		 1114 struct wmi_peer_sta_kickout_event *ev;
1115 struct ieee80211_sta *sta;
1116
1117 ev = (struct wmi_peer_sta_kickout_event *)skb->data;
1118
1119 ath10k_dbg(ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
1120 ev->peer_macaddr.addr);
1121
1122 rcu_read_lock();
1123
1124 sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL);
1125 if (!sta) {
1126 ath10k_warn("Spurious quick kickout for STA %pM\n",
1127 ev->peer_macaddr.addr);
1128 goto exit;
1129 }
1130
1131 ieee80211_report_low_ack(sta, 10);
1132
1133exit:
1134 rcu_read_unlock();
5e3dd157
KV		 1135}
1136
1137/*
1138 * FIXME
1139 *
1140 * We don't report to mac80211 sleep state of connected
1141 * stations. Due to this mac80211 can't fill in TIM IE
1142 * correctly.
1143 *
1144 * I know of no way of getting nullfunc frames that contain
1145 * sleep transition from connected stations - these do not
1146 * seem to be sent from the target to the host. There also
1147 * doesn't seem to be a dedicated event for that. So the
1148 * only way left to do this would be to read tim_bitmap
1149 * during SWBA.
1150 *
1151 * We could probably try using tim_bitmap from SWBA to tell
1152 * mac80211 which stations are asleep and which are not. The
1153 * problem here is calling mac80211 functions so many times
1154 * could take too long and make us miss the time to submit
1155 * the beacon to the target.
1156 *
1157 * So as a workaround we try to extend the TIM IE if there
1158 * is unicast buffered for stations with aid > 7 and fill it
1159 * in ourselves.
1160 */
1161static void ath10k_wmi_update_tim(struct ath10k *ar,
1162 struct ath10k_vif *arvif,
1163 struct sk_buff *bcn,
1164 struct wmi_bcn_info *bcn_info)
1165{
1166 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
1167 struct ieee80211_tim_ie *tim;
1168 u8 *ies, *ie;
1169 u8 ie_len, pvm_len;
1170
1171 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
1172 * we must copy the bitmap upon change and reuse it later */
1173 if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
1174 int i;
1175
1176 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
1177 sizeof(bcn_info->tim_info.tim_bitmap));
1178
1179 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
1180 __le32 t = bcn_info->tim_info.tim_bitmap[i / 4];
1181 u32 v = __le32_to_cpu(t);
1182 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
1183 }
1184
1185 /* FW reports either length 0 or 16
1186 * so we calculate this on our own */
1187 arvif->u.ap.tim_len = 0;
1188 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
1189 if (arvif->u.ap.tim_bitmap[i])
1190 arvif->u.ap.tim_len = i;
1191
1192 arvif->u.ap.tim_len++;
1193 }
1194
1195 ies = bcn->data;
1196 ies += ieee80211_hdrlen(hdr->frame_control);
1197 ies += 12; /* fixed parameters */
1198
1199 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
1200 (u8 *)skb_tail_pointer(bcn) - ies);
1201 if (!ie) {
09af8f85
MK		 1202 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
1203 ath10k_warn("no tim ie found;\n");
5e3dd157
KV		 1204 return;
1205 }
1206
1207 tim = (void *)ie + 2;
1208 ie_len = ie[1];
1209 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
1210
1211 if (pvm_len < arvif->u.ap.tim_len) {
1212 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
1213 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
1214 void *next_ie = ie + 2 + ie_len;
1215
1216 if (skb_put(bcn, expand_size)) {
1217 memmove(next_ie + expand_size, next_ie, move_size);
1218
1219 ie[1] += expand_size;
1220 ie_len += expand_size;
1221 pvm_len += expand_size;
1222 } else {
1223 ath10k_warn("tim expansion failed\n");
1224 }
1225 }
1226
1227 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
1228 ath10k_warn("tim pvm length is too great (%d)\n", pvm_len);
1229 return;
1230 }
1231
1232 tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
1233 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
1234
748afc47
MK		 1235 if (tim->dtim_count == 0) {
1236 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
1237
1238 if (__le32_to_cpu(bcn_info->tim_info.tim_mcast) == 1)
1239 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
1240 }
1241
5e3dd157
KV		 1242 ath10k_dbg(ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
1243 tim->dtim_count, tim->dtim_period,
1244 tim->bitmap_ctrl, pvm_len);
1245}
1246
1247static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
1248 struct wmi_p2p_noa_info *noa)
1249{
1250 struct ieee80211_p2p_noa_attr *noa_attr;
1251 u8 ctwindow_oppps = noa->ctwindow_oppps;
1252 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
1253 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
1254 __le16 *noa_attr_len;
1255 u16 attr_len;
1256 u8 noa_descriptors = noa->num_descriptors;
1257 int i;
1258
1259 /* P2P IE */
1260 data[0] = WLAN_EID_VENDOR_SPECIFIC;
1261 data[1] = len - 2;
1262 data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
1263 data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
1264 data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
1265 data[5] = WLAN_OUI_TYPE_WFA_P2P;
1266
1267 /* NOA ATTR */
1268 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
1269 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
1270 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
1271
1272 noa_attr->index = noa->index;
1273 noa_attr->oppps_ctwindow = ctwindow;
1274 if (oppps)
1275 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
1276
1277 for (i = 0; i < noa_descriptors; i++) {
1278 noa_attr->desc[i].count =
1279 __le32_to_cpu(noa->descriptors[i].type_count);
1280 noa_attr->desc[i].duration = noa->descriptors[i].duration;
1281 noa_attr->desc[i].interval = noa->descriptors[i].interval;
1282 noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
1283 }
1284
1285 attr_len = 2; /* index + oppps_ctwindow */
1286 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1287 *noa_attr_len = __cpu_to_le16(attr_len);
1288}
1289
1290static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
1291{
1292 u32 len = 0;
1293 u8 noa_descriptors = noa->num_descriptors;
1294 u8 opp_ps_info = noa->ctwindow_oppps;
1295 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
1296
1297
1298 if (!noa_descriptors && !opps_enabled)
1299 return len;
1300
1301 len += 1 + 1 + 4; /* EID + len + OUI */
1302 len += 1 + 2; /* noa attr + attr len */
1303 len += 1 + 1; /* index + oppps_ctwindow */
1304 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1305
1306 return len;
1307}
1308
1309static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
1310 struct sk_buff *bcn,
1311 struct wmi_bcn_info *bcn_info)
1312{
1313 struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
1314 u8 *new_data, *old_data = arvif->u.ap.noa_data;
1315 u32 new_len;
1316
1317 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
1318 return;
1319
1320 ath10k_dbg(ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
1321 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
1322 new_len = ath10k_p2p_calc_noa_ie_len(noa);
1323 if (!new_len)
1324 goto cleanup;
1325
1326 new_data = kmalloc(new_len, GFP_ATOMIC);
1327 if (!new_data)
1328 goto cleanup;
1329
1330 ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
1331
1332 spin_lock_bh(&ar->data_lock);
1333 arvif->u.ap.noa_data = new_data;
1334 arvif->u.ap.noa_len = new_len;
1335 spin_unlock_bh(&ar->data_lock);
1336 kfree(old_data);
1337 }
1338
1339 if (arvif->u.ap.noa_data)
1340 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
1341 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
1342 arvif->u.ap.noa_data,
1343 arvif->u.ap.noa_len);
1344 return;
1345
1346cleanup:
1347 spin_lock_bh(&ar->data_lock);
1348 arvif->u.ap.noa_data = NULL;
1349 arvif->u.ap.noa_len = 0;
1350 spin_unlock_bh(&ar->data_lock);
1351 kfree(old_data);
1352}
1353
1354
1355static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
1356{
1357 struct wmi_host_swba_event *ev;
1358 u32 map;
1359 int i = -1;
1360 struct wmi_bcn_info *bcn_info;
1361 struct ath10k_vif *arvif;
5e3dd157 1362 struct sk_buff *bcn;
767d34fc 1363 int ret, vdev_id = 0;
5e3dd157 1364
5e3dd157
KV		 1365 ev = (struct wmi_host_swba_event *)skb->data;
1366 map = __le32_to_cpu(ev->vdev_map);
1367
7a8a396b 1368 ath10k_dbg(ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
5e3dd157
KV		 1369 ev->vdev_map);
1370
1371 for (; map; map >>= 1, vdev_id++) {
1372 if (!(map & 0x1))
1373 continue;
1374
1375 i++;
1376
1377 if (i >= WMI_MAX_AP_VDEV) {
1378 ath10k_warn("swba has corrupted vdev map\n");
1379 break;
1380 }
1381
1382 bcn_info = &ev->bcn_info[i];
1383
1384 ath10k_dbg(ATH10K_DBG_MGMT,
7a8a396b 1385 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
5e3dd157
KV		 1386 i,
1387 __le32_to_cpu(bcn_info->tim_info.tim_len),
1388 __le32_to_cpu(bcn_info->tim_info.tim_mcast),
1389 __le32_to_cpu(bcn_info->tim_info.tim_changed),
1390 __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
1391 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
1392 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
1393 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
1394 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
1395
1396 arvif = ath10k_get_arvif(ar, vdev_id);
1397 if (arvif == NULL) {
1398 ath10k_warn("no vif for vdev_id %d found\n", vdev_id);
1399 continue;
1400 }
1401
c2df44b3
MK		 1402 /* There are no completions for beacons so wait for next SWBA
1403 * before telling mac80211 to decrement CSA counter
1404 *
1405 * Once CSA counter is completed stop sending beacons until
1406 * actual channel switch is done */
1407 if (arvif->vif->csa_active &&
1408 ieee80211_csa_is_complete(arvif->vif)) {
1409 ieee80211_csa_finish(arvif->vif);
1410 continue;
1411 }
1412
5e3dd157
KV		 1413 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
1414 if (!bcn) {
1415 ath10k_warn("could not get mac80211 beacon\n");
1416 continue;
1417 }
1418
1419 ath10k_tx_h_seq_no(bcn);
1420 ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
1421 ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
1422
ed54388a 1423 spin_lock_bh(&ar->data_lock);
748afc47 1424
ed54388a 1425 if (arvif->beacon) {
748afc47
MK		 1426 if (!arvif->beacon_sent)
1427 ath10k_warn("SWBA overrun on vdev %d\n",
1428 arvif->vdev_id);
1429
767d34fc
MK		 1430 dma_unmap_single(arvif->ar->dev,
1431 ATH10K_SKB_CB(arvif->beacon)->paddr,
1432 arvif->beacon->len, DMA_TO_DEVICE);
ed54388a 1433 dev_kfree_skb_any(arvif->beacon);
2ab03a6b 1434 arvif->beacon = NULL;
ed54388a 1435 }
5e3dd157 1436
767d34fc
MK		 1437 ATH10K_SKB_CB(bcn)->paddr = dma_map_single(arvif->ar->dev,
1438 bcn->data, bcn->len,
1439 DMA_TO_DEVICE);
1440 ret = dma_mapping_error(arvif->ar->dev,
1441 ATH10K_SKB_CB(bcn)->paddr);
1442 if (ret) {
1443 ath10k_warn("failed to map beacon: %d\n", ret);
ad3d2153 1444 dev_kfree_skb_any(bcn);
767d34fc
MK		 1445 goto skip;
1446 }
748afc47 1447
ed54388a 1448 arvif->beacon = bcn;
748afc47 1449 arvif->beacon_sent = false;
5e3dd157 1450
ed54388a 1451 ath10k_wmi_tx_beacon_nowait(arvif);
767d34fc 1452skip:
ed54388a 1453 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1454 }
1455}
1456
1457static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
1458 struct sk_buff *skb)
1459{
1460 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
1461}
1462
9702c686
JD		 1463static void ath10k_dfs_radar_report(struct ath10k *ar,
1464 struct wmi_single_phyerr_rx_event *event,
1465 struct phyerr_radar_report *rr,
1466 u64 tsf)
1467{
1468 u32 reg0, reg1, tsf32l;
1469 struct pulse_event pe;
1470 u64 tsf64;
1471 u8 rssi, width;
1472
1473 reg0 = __le32_to_cpu(rr->reg0);
1474 reg1 = __le32_to_cpu(rr->reg1);
1475
1476 ath10k_dbg(ATH10K_DBG_REGULATORY,
1477 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
1478 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
1479 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
1480 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
1481 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
1482 ath10k_dbg(ATH10K_DBG_REGULATORY,
1483 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
1484 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
1485 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
1486 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
1487 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
1488 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
1489 ath10k_dbg(ATH10K_DBG_REGULATORY,
1490 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
1491 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
1492 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
1493
1494 if (!ar->dfs_detector)
1495 return;
1496
1497 /* report event to DFS pattern detector */
1498 tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
1499 tsf64 = tsf & (~0xFFFFFFFFULL);
1500 tsf64 |= tsf32l;
1501
1502 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
1503 rssi = event->hdr.rssi_combined;
1504
1505 /* hardware store this as 8 bit signed value,
1506 * set to zero if negative number
1507 */
1508 if (rssi & 0x80)
1509 rssi = 0;
1510
1511 pe.ts = tsf64;
1512 pe.freq = ar->hw->conf.chandef.chan->center_freq;
1513 pe.width = width;
1514 pe.rssi = rssi;
1515
1516 ath10k_dbg(ATH10K_DBG_REGULATORY,
1517 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
1518 pe.freq, pe.width, pe.rssi, pe.ts);
1519
1520 ATH10K_DFS_STAT_INC(ar, pulses_detected);
1521
1522 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
1523 ath10k_dbg(ATH10K_DBG_REGULATORY,
1524 "dfs no pulse pattern detected, yet\n");
1525 return;
1526 }
1527
1528 ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs radar detected\n");
1529 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP		 1530
1531 /* Control radar events reporting in debugfs file
1532 dfs_block_radar_events */
1533 if (ar->dfs_block_radar_events) {
1534 ath10k_info("DFS Radar detected, but ignored as requested\n");
1535 return;
1536 }
1537
9702c686
JD		 1538 ieee80211_radar_detected(ar->hw);
1539}
1540
1541static int ath10k_dfs_fft_report(struct ath10k *ar,
1542 struct wmi_single_phyerr_rx_event *event,
1543 struct phyerr_fft_report *fftr,
1544 u64 tsf)
1545{
1546 u32 reg0, reg1;
1547 u8 rssi, peak_mag;
1548
1549 reg0 = __le32_to_cpu(fftr->reg0);
1550 reg1 = __le32_to_cpu(fftr->reg1);
1551 rssi = event->hdr.rssi_combined;
1552
1553 ath10k_dbg(ATH10K_DBG_REGULATORY,
1554 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
1555 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
1556 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
1557 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
1558 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
1559 ath10k_dbg(ATH10K_DBG_REGULATORY,
1560 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
1561 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
1562 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
1563 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
1564 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
1565
1566 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
1567
1568 /* false event detection */
1569 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
1570 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
1571 ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
1572 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
1573 return -EINVAL;
1574 }
1575
1576 return 0;
1577}
1578
1579static void ath10k_wmi_event_dfs(struct ath10k *ar,
1580 struct wmi_single_phyerr_rx_event *event,
1581 u64 tsf)
1582{
1583 int buf_len, tlv_len, res, i = 0;
1584 struct phyerr_tlv *tlv;
1585 struct phyerr_radar_report *rr;
1586 struct phyerr_fft_report *fftr;
1587 u8 *tlv_buf;
1588
1589 buf_len = __le32_to_cpu(event->hdr.buf_len);
1590 ath10k_dbg(ATH10K_DBG_REGULATORY,
1591 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
1592 event->hdr.phy_err_code, event->hdr.rssi_combined,
1593 __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
1594
1595 /* Skip event if DFS disabled */
1596 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
1597 return;
1598
1599 ATH10K_DFS_STAT_INC(ar, pulses_total);
1600
1601 while (i < buf_len) {
1602 if (i + sizeof(*tlv) > buf_len) {
1603 ath10k_warn("too short buf for tlv header (%d)\n", i);
1604 return;
1605 }
1606
1607 tlv = (struct phyerr_tlv *)&event->bufp[i];
1608 tlv_len = __le16_to_cpu(tlv->len);
1609 tlv_buf = &event->bufp[i + sizeof(*tlv)];
1610 ath10k_dbg(ATH10K_DBG_REGULATORY,
1611 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
1612 tlv_len, tlv->tag, tlv->sig);
1613
1614 switch (tlv->tag) {
1615 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
1616 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
1617 ath10k_warn("too short radar pulse summary (%d)\n",
1618 i);
1619 return;
1620 }
1621
1622 rr = (struct phyerr_radar_report *)tlv_buf;
1623 ath10k_dfs_radar_report(ar, event, rr, tsf);
1624 break;
1625 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1626 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
1627 ath10k_warn("too short fft report (%d)\n", i);
1628 return;
1629 }
1630
1631 fftr = (struct phyerr_fft_report *)tlv_buf;
1632 res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
1633 if (res)
1634 return;
1635 break;
1636 }
1637
1638 i += sizeof(*tlv) + tlv_len;
1639 }
1640}
1641
1642static void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
1643 struct wmi_single_phyerr_rx_event *event,
1644 u64 tsf)
1645{
1646 ath10k_dbg(ATH10K_DBG_WMI, "wmi event spectral scan\n");
1647}
1648
5e3dd157
KV		 1649static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
1650{
9702c686
JD		 1651 struct wmi_comb_phyerr_rx_event *comb_event;
1652 struct wmi_single_phyerr_rx_event *event;
1653 u32 count, i, buf_len, phy_err_code;
1654 u64 tsf;
1655 int left_len = skb->len;
1656
1657 ATH10K_DFS_STAT_INC(ar, phy_errors);
1658
1659 /* Check if combined event available */
1660 if (left_len < sizeof(*comb_event)) {
1661 ath10k_warn("wmi phyerr combined event wrong len\n");
1662 return;
1663 }
1664
1665 left_len -= sizeof(*comb_event);
1666
1667 /* Check number of included events */
1668 comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
1669 count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
1670
1671 tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
1672 tsf <<= 32;
1673 tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
1674
1675 ath10k_dbg(ATH10K_DBG_WMI,
1676 "wmi event phyerr count %d tsf64 0x%llX\n",
1677 count, tsf);
1678
1679 event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
1680 for (i = 0; i < count; i++) {
1681 /* Check if we can read event header */
1682 if (left_len < sizeof(*event)) {
1683 ath10k_warn("single event (%d) wrong head len\n", i);
1684 return;
1685 }
1686
1687 left_len -= sizeof(*event);
1688
1689 buf_len = __le32_to_cpu(event->hdr.buf_len);
1690 phy_err_code = event->hdr.phy_err_code;
1691
1692 if (left_len < buf_len) {
1693 ath10k_warn("single event (%d) wrong buf len\n", i);
1694 return;
1695 }
1696
1697 left_len -= buf_len;
1698
1699 switch (phy_err_code) {
1700 case PHY_ERROR_RADAR:
1701 ath10k_wmi_event_dfs(ar, event, tsf);
1702 break;
1703 case PHY_ERROR_SPECTRAL_SCAN:
1704 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1705 break;
1706 case PHY_ERROR_FALSE_RADAR_EXT:
1707 ath10k_wmi_event_dfs(ar, event, tsf);
1708 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1709 break;
1710 default:
1711 break;
1712 }
1713
1714 event += sizeof(*event) + buf_len;
1715 }
5e3dd157
KV		 1716}
1717
1718static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
1719{
1720 ath10k_dbg(ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
1721}
1722
1723static void ath10k_wmi_event_profile_match(struct ath10k *ar,
1724 struct sk_buff *skb)
1725{
1726 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
1727}
1728
1729static void ath10k_wmi_event_debug_print(struct ath10k *ar,
2fe5288c 1730 struct sk_buff *skb)
5e3dd157 1731{
2fe5288c
KV		 1732 char buf[101], c;
1733 int i;
1734
1735 for (i = 0; i < sizeof(buf) - 1; i++) {
1736 if (i >= skb->len)
1737 break;
1738
1739 c = skb->data[i];
1740
1741 if (c == '\0')
1742 break;
1743
1744 if (isascii(c) && isprint(c))
1745 buf[i] = c;
1746 else
1747 buf[i] = '.';
1748 }
1749
1750 if (i == sizeof(buf) - 1)
1751 ath10k_warn("wmi debug print truncated: %d\n", skb->len);
1752
1753 /* for some reason the debug prints end with \n, remove that */
1754 if (skb->data[i - 1] == '\n')
1755 i--;
1756
1757 /* the last byte is always reserved for the null character */
1758 buf[i] = '\0';
1759
1760 ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf);
5e3dd157
KV		 1761}
1762
1763static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
1764{
1765 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
1766}
1767
1768static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
1769 struct sk_buff *skb)
1770{
1771 ath10k_dbg(ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
1772}
1773
1774static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
1775 struct sk_buff *skb)
1776{
1777 ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
1778}
1779
1780static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
1781 struct sk_buff *skb)
1782{
1783 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
1784}
1785
1786static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
1787 struct sk_buff *skb)
1788{
1789 ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
1790}
1791
1792static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
1793 struct sk_buff *skb)
1794{
1795 ath10k_dbg(ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
1796}
1797
1798static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
1799 struct sk_buff *skb)
1800{
1801 ath10k_dbg(ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
1802}
1803
1804static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
1805 struct sk_buff *skb)
1806{
1807 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
1808}
1809
1810static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
1811 struct sk_buff *skb)
1812{
1813 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
1814}
1815
1816static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
1817 struct sk_buff *skb)
1818{
1819 ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
1820}
1821
1822static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
1823 struct sk_buff *skb)
1824{
1825 ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
1826}
1827
1828static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
1829 struct sk_buff *skb)
1830{
1831 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
1832}
1833
1834static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
1835 struct sk_buff *skb)
1836{
1837 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
1838}
1839
1840static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
1841 struct sk_buff *skb)
1842{
1843 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
1844}
1845
8a6618b0
BM		 1846static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
1847 struct sk_buff *skb)
1848{
1849 ath10k_dbg(ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
1850}
1851
1852static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
1853 struct sk_buff *skb)
1854{
1855 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
1856}
1857
1858static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
1859 struct sk_buff *skb)
1860{
1861 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
1862}
1863
b3effe61
BM		 1864static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
1865 u32 num_units, u32 unit_len)
1866{
1867 dma_addr_t paddr;
1868 u32 pool_size;
1869 int idx = ar->wmi.num_mem_chunks;
1870
1871 pool_size = num_units * round_up(unit_len, 4);
1872
1873 if (!pool_size)
1874 return -EINVAL;
1875
1876 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
1877 pool_size,
1878 &paddr,
1879 GFP_ATOMIC);
1880 if (!ar->wmi.mem_chunks[idx].vaddr) {
1881 ath10k_warn("failed to allocate memory chunk\n");
1882 return -ENOMEM;
1883 }
1884
1885 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
1886
1887 ar->wmi.mem_chunks[idx].paddr = paddr;
1888 ar->wmi.mem_chunks[idx].len = pool_size;
1889 ar->wmi.mem_chunks[idx].req_id = req_id;
1890 ar->wmi.num_mem_chunks++;
1891
1892 return 0;
1893}
1894
5e3dd157
KV		 1895static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
1896 struct sk_buff *skb)
1897{
1898 struct wmi_service_ready_event *ev = (void *)skb->data;
1899
1900 if (skb->len < sizeof(*ev)) {
1901 ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
1902 skb->len, sizeof(*ev));
1903 return;
1904 }
1905
1906 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
1907 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
1908 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
1909 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
1910 ar->fw_version_major =
1911 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
1912 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
1913 ar->fw_version_release =
1914 (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
1915 ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
1916 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
8865bee4
MK		 1917 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
1918
1a222435
KV		 1919 /* only manually set fw features when not using FW IE format */
1920 if (ar->fw_api == 1 && ar->fw_version_build > 636)
0d9b0438
MK		 1921 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
1922
8865bee4
MK		 1923 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
1924 ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
1925 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
1926 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
1927 }
5e3dd157
KV		 1928
1929 ar->ath_common.regulatory.current_rd =
1930 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
1931
1932 ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
1933 sizeof(ev->wmi_service_bitmap));
1934
1935 if (strlen(ar->hw->wiphy->fw_version) == 0) {
1936 snprintf(ar->hw->wiphy->fw_version,
1937 sizeof(ar->hw->wiphy->fw_version),
1938 "%u.%u.%u.%u",
1939 ar->fw_version_major,
1940 ar->fw_version_minor,
1941 ar->fw_version_release,
1942 ar->fw_version_build);
1943 }
1944
1945 /* FIXME: it probably should be better to support this */
1946 if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
1947 ath10k_warn("target requested %d memory chunks; ignoring\n",
1948 __le32_to_cpu(ev->num_mem_reqs));
1949 }
1950
1951 ath10k_dbg(ATH10K_DBG_WMI,
8865bee4 1952 "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
5e3dd157
KV		 1953 __le32_to_cpu(ev->sw_version),
1954 __le32_to_cpu(ev->sw_version_1),
1955 __le32_to_cpu(ev->abi_version),
1956 __le32_to_cpu(ev->phy_capability),
1957 __le32_to_cpu(ev->ht_cap_info),
1958 __le32_to_cpu(ev->vht_cap_info),
1959 __le32_to_cpu(ev->vht_supp_mcs),
1960 __le32_to_cpu(ev->sys_cap_info),
8865bee4
MK		 1961 __le32_to_cpu(ev->num_mem_reqs),
1962 __le32_to_cpu(ev->num_rf_chains));
5e3dd157
KV		 1963
1964 complete(&ar->wmi.service_ready);
1965}
1966
6f97d256
BM		 1967static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar,
1968 struct sk_buff *skb)
1969{
b3effe61
BM		 1970 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
1971 int ret;
6f97d256
BM		 1972 struct wmi_service_ready_event_10x *ev = (void *)skb->data;
1973
1974 if (skb->len < sizeof(*ev)) {
1975 ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
1976 skb->len, sizeof(*ev));
1977 return;
1978 }
1979
1980 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
1981 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
1982 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
1983 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
1984 ar->fw_version_major =
1985 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
1986 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
1987 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
1988 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
1989
1990 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
1991 ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
1992 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
1993 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
1994 }
1995
1996 ar->ath_common.regulatory.current_rd =
1997 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
1998
1999 ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
2000 sizeof(ev->wmi_service_bitmap));
2001
2002 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2003 snprintf(ar->hw->wiphy->fw_version,
2004 sizeof(ar->hw->wiphy->fw_version),
2005 "%u.%u",
2006 ar->fw_version_major,
2007 ar->fw_version_minor);
2008 }
2009
b3effe61
BM		 2010 num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs);
2011
2012 if (num_mem_reqs > ATH10K_MAX_MEM_REQS) {
2013 ath10k_warn("requested memory chunks number (%d) exceeds the limit\n",
2014 num_mem_reqs);
2015 return;
6f97d256
BM		 2016 }
2017
b3effe61
BM		 2018 if (!num_mem_reqs)
2019 goto exit;
2020
2021 ath10k_dbg(ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n",
2022 num_mem_reqs);
2023
2024 for (i = 0; i < num_mem_reqs; ++i) {
2025 req_id = __le32_to_cpu(ev->mem_reqs[i].req_id);
2026 num_units = __le32_to_cpu(ev->mem_reqs[i].num_units);
2027 unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size);
2028 num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info);
2029
2030 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
2031 /* number of units to allocate is number of
2032 * peers, 1 extra for self peer on target */
2033 /* this needs to be tied, host and target
2034 * can get out of sync */
ec6a73f0 2035 num_units = TARGET_10X_NUM_PEERS + 1;
b3effe61 2036 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
ec6a73f0 2037 num_units = TARGET_10X_NUM_VDEVS + 1;
b3effe61
BM		 2038
2039 ath10k_dbg(ATH10K_DBG_WMI,
2040 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
2041 req_id,
2042 __le32_to_cpu(ev->mem_reqs[i].num_units),
2043 num_unit_info,
2044 unit_size,
2045 num_units);
2046
2047 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
2048 unit_size);
2049 if (ret)
2050 return;
2051 }
2052
2053exit:
6f97d256
BM		 2054 ath10k_dbg(ATH10K_DBG_WMI,
2055 "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
2056 __le32_to_cpu(ev->sw_version),
2057 __le32_to_cpu(ev->abi_version),
2058 __le32_to_cpu(ev->phy_capability),
2059 __le32_to_cpu(ev->ht_cap_info),
2060 __le32_to_cpu(ev->vht_cap_info),
2061 __le32_to_cpu(ev->vht_supp_mcs),
2062 __le32_to_cpu(ev->sys_cap_info),
2063 __le32_to_cpu(ev->num_mem_reqs),
2064 __le32_to_cpu(ev->num_rf_chains));
2065
2066 complete(&ar->wmi.service_ready);
2067}
2068
5e3dd157
KV		 2069static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
2070{
2071 struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
2072
2073 if (WARN_ON(skb->len < sizeof(*ev)))
2074 return -EINVAL;
2075
2076 memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN);
2077
2078 ath10k_dbg(ATH10K_DBG_WMI,
2c34752a 2079 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d skb->len %i ev-sz %zu\n",
5e3dd157
KV		 2080 __le32_to_cpu(ev->sw_version),
2081 __le32_to_cpu(ev->abi_version),
2082 ev->mac_addr.addr,
2c34752a 2083 __le32_to_cpu(ev->status), skb->len, sizeof(*ev));
5e3dd157
KV		 2084
2085 complete(&ar->wmi.unified_ready);
2086 return 0;
2087}
2088
ce42870e 2089static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 2090{
2091 struct wmi_cmd_hdr *cmd_hdr;
2092 enum wmi_event_id id;
2093 u16 len;
2094
2095 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2096 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2097
2098 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2099 return;
2100
2101 len = skb->len;
2102
2103 trace_ath10k_wmi_event(id, skb->data, skb->len);
2104
2105 switch (id) {
2106 case WMI_MGMT_RX_EVENTID:
2107 ath10k_wmi_event_mgmt_rx(ar, skb);
2108 /* mgmt_rx() owns the skb now! */
2109 return;
2110 case WMI_SCAN_EVENTID:
2111 ath10k_wmi_event_scan(ar, skb);
2112 break;
2113 case WMI_CHAN_INFO_EVENTID:
2114 ath10k_wmi_event_chan_info(ar, skb);
2115 break;
2116 case WMI_ECHO_EVENTID:
2117 ath10k_wmi_event_echo(ar, skb);
2118 break;
2119 case WMI_DEBUG_MESG_EVENTID:
2120 ath10k_wmi_event_debug_mesg(ar, skb);
2121 break;
2122 case WMI_UPDATE_STATS_EVENTID:
2123 ath10k_wmi_event_update_stats(ar, skb);
2124 break;
2125 case WMI_VDEV_START_RESP_EVENTID:
2126 ath10k_wmi_event_vdev_start_resp(ar, skb);
2127 break;
2128 case WMI_VDEV_STOPPED_EVENTID:
2129 ath10k_wmi_event_vdev_stopped(ar, skb);
2130 break;
2131 case WMI_PEER_STA_KICKOUT_EVENTID:
2132 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2133 break;
2134 case WMI_HOST_SWBA_EVENTID:
2135 ath10k_wmi_event_host_swba(ar, skb);
2136 break;
2137 case WMI_TBTTOFFSET_UPDATE_EVENTID:
2138 ath10k_wmi_event_tbttoffset_update(ar, skb);
2139 break;
2140 case WMI_PHYERR_EVENTID:
2141 ath10k_wmi_event_phyerr(ar, skb);
2142 break;
2143 case WMI_ROAM_EVENTID:
2144 ath10k_wmi_event_roam(ar, skb);
2145 break;
2146 case WMI_PROFILE_MATCH:
2147 ath10k_wmi_event_profile_match(ar, skb);
2148 break;
2149 case WMI_DEBUG_PRINT_EVENTID:
2150 ath10k_wmi_event_debug_print(ar, skb);
2151 break;
2152 case WMI_PDEV_QVIT_EVENTID:
2153 ath10k_wmi_event_pdev_qvit(ar, skb);
2154 break;
2155 case WMI_WLAN_PROFILE_DATA_EVENTID:
2156 ath10k_wmi_event_wlan_profile_data(ar, skb);
2157 break;
2158 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
2159 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2160 break;
2161 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
2162 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2163 break;
2164 case WMI_RTT_ERROR_REPORT_EVENTID:
2165 ath10k_wmi_event_rtt_error_report(ar, skb);
2166 break;
2167 case WMI_WOW_WAKEUP_HOST_EVENTID:
2168 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2169 break;
2170 case WMI_DCS_INTERFERENCE_EVENTID:
2171 ath10k_wmi_event_dcs_interference(ar, skb);
2172 break;
2173 case WMI_PDEV_TPC_CONFIG_EVENTID:
2174 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2175 break;
2176 case WMI_PDEV_FTM_INTG_EVENTID:
2177 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
2178 break;
2179 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
2180 ath10k_wmi_event_gtk_offload_status(ar, skb);
2181 break;
2182 case WMI_GTK_REKEY_FAIL_EVENTID:
2183 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
2184 break;
2185 case WMI_TX_DELBA_COMPLETE_EVENTID:
2186 ath10k_wmi_event_delba_complete(ar, skb);
2187 break;
2188 case WMI_TX_ADDBA_COMPLETE_EVENTID:
2189 ath10k_wmi_event_addba_complete(ar, skb);
2190 break;
2191 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
2192 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
2193 break;
2194 case WMI_SERVICE_READY_EVENTID:
2195 ath10k_wmi_service_ready_event_rx(ar, skb);
2196 break;
2197 case WMI_READY_EVENTID:
2198 ath10k_wmi_ready_event_rx(ar, skb);
2199 break;
2200 default:
2201 ath10k_warn("Unknown eventid: %d\n", id);
2202 break;
2203 }
2204
2205 dev_kfree_skb(skb);
2206}
2207
8a6618b0
BM		 2208static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
2209{
2210 struct wmi_cmd_hdr *cmd_hdr;
2211 enum wmi_10x_event_id id;
2212 u16 len;
2213
2214 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2215 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2216
2217 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2218 return;
2219
2220 len = skb->len;
2221
2222 trace_ath10k_wmi_event(id, skb->data, skb->len);
2223
2224 switch (id) {
2225 case WMI_10X_MGMT_RX_EVENTID:
2226 ath10k_wmi_event_mgmt_rx(ar, skb);
2227 /* mgmt_rx() owns the skb now! */
2228 return;
2229 case WMI_10X_SCAN_EVENTID:
2230 ath10k_wmi_event_scan(ar, skb);
2231 break;
2232 case WMI_10X_CHAN_INFO_EVENTID:
2233 ath10k_wmi_event_chan_info(ar, skb);
2234 break;
2235 case WMI_10X_ECHO_EVENTID:
2236 ath10k_wmi_event_echo(ar, skb);
2237 break;
2238 case WMI_10X_DEBUG_MESG_EVENTID:
2239 ath10k_wmi_event_debug_mesg(ar, skb);
2240 break;
2241 case WMI_10X_UPDATE_STATS_EVENTID:
2242 ath10k_wmi_event_update_stats(ar, skb);
2243 break;
2244 case WMI_10X_VDEV_START_RESP_EVENTID:
2245 ath10k_wmi_event_vdev_start_resp(ar, skb);
2246 break;
2247 case WMI_10X_VDEV_STOPPED_EVENTID:
2248 ath10k_wmi_event_vdev_stopped(ar, skb);
2249 break;
2250 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
2251 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2252 break;
2253 case WMI_10X_HOST_SWBA_EVENTID:
2254 ath10k_wmi_event_host_swba(ar, skb);
2255 break;
2256 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
2257 ath10k_wmi_event_tbttoffset_update(ar, skb);
2258 break;
2259 case WMI_10X_PHYERR_EVENTID:
2260 ath10k_wmi_event_phyerr(ar, skb);
2261 break;
2262 case WMI_10X_ROAM_EVENTID:
2263 ath10k_wmi_event_roam(ar, skb);
2264 break;
2265 case WMI_10X_PROFILE_MATCH:
2266 ath10k_wmi_event_profile_match(ar, skb);
2267 break;
2268 case WMI_10X_DEBUG_PRINT_EVENTID:
2269 ath10k_wmi_event_debug_print(ar, skb);
2270 break;
2271 case WMI_10X_PDEV_QVIT_EVENTID:
2272 ath10k_wmi_event_pdev_qvit(ar, skb);
2273 break;
2274 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
2275 ath10k_wmi_event_wlan_profile_data(ar, skb);
2276 break;
2277 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
2278 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2279 break;
2280 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
2281 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2282 break;
2283 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
2284 ath10k_wmi_event_rtt_error_report(ar, skb);
2285 break;
2286 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
2287 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2288 break;
2289 case WMI_10X_DCS_INTERFERENCE_EVENTID:
2290 ath10k_wmi_event_dcs_interference(ar, skb);
2291 break;
2292 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
2293 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2294 break;
2295 case WMI_10X_INST_RSSI_STATS_EVENTID:
2296 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2297 break;
2298 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
2299 ath10k_wmi_event_vdev_standby_req(ar, skb);
2300 break;
2301 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
2302 ath10k_wmi_event_vdev_resume_req(ar, skb);
2303 break;
2304 case WMI_10X_SERVICE_READY_EVENTID:
6f97d256 2305 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
8a6618b0
BM		 2306 break;
2307 case WMI_10X_READY_EVENTID:
2308 ath10k_wmi_ready_event_rx(ar, skb);
2309 break;
2310 default:
2311 ath10k_warn("Unknown eventid: %d\n", id);
2312 break;
2313 }
2314
2315 dev_kfree_skb(skb);
2316}
2317
2318
ce42870e
BM		 2319static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
2320{
2321 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
8a6618b0 2322 ath10k_wmi_10x_process_rx(ar, skb);
ce42870e
BM		 2323 else
2324 ath10k_wmi_main_process_rx(ar, skb);
2325}
2326
5e3dd157
KV		 2327/* WMI Initialization functions */
2328int ath10k_wmi_attach(struct ath10k *ar)
2329{
ce42870e 2330 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
b7e3adf9 2331 ar->wmi.cmd = &wmi_10x_cmd_map;
6d1506e7 2332 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
226a339b 2333 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
ce42870e
BM		 2334 } else {
2335 ar->wmi.cmd = &wmi_cmd_map;
6d1506e7 2336 ar->wmi.vdev_param = &wmi_vdev_param_map;
226a339b 2337 ar->wmi.pdev_param = &wmi_pdev_param_map;
ce42870e
BM		 2338 }
2339
5e3dd157
KV		 2340 init_completion(&ar->wmi.service_ready);
2341 init_completion(&ar->wmi.unified_ready);
be8b3943 2342 init_waitqueue_head(&ar->wmi.tx_credits_wq);
5e3dd157
KV		 2343
2344 return 0;
2345}
2346
2347void ath10k_wmi_detach(struct ath10k *ar)
2348{
b3effe61
BM		 2349 int i;
2350
2351 /* free the host memory chunks requested by firmware */
2352 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2353 dma_free_coherent(ar->dev,
2354 ar->wmi.mem_chunks[i].len,
2355 ar->wmi.mem_chunks[i].vaddr,
2356 ar->wmi.mem_chunks[i].paddr);
2357 }
2358
2359 ar->wmi.num_mem_chunks = 0;
5e3dd157
KV		 2360}
2361
2362int ath10k_wmi_connect_htc_service(struct ath10k *ar)
2363{
2364 int status;
2365 struct ath10k_htc_svc_conn_req conn_req;
2366 struct ath10k_htc_svc_conn_resp conn_resp;
2367
2368 memset(&conn_req, 0, sizeof(conn_req));
2369 memset(&conn_resp, 0, sizeof(conn_resp));
2370
2371 /* these fields are the same for all service endpoints */
2372 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
2373 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 2374 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV		 2375
2376 /* connect to control service */
2377 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
2378
cd003fad 2379 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157
KV		 2380 if (status) {
2381 ath10k_warn("failed to connect to WMI CONTROL service status: %d\n",
2382 status);
2383 return status;
2384 }
2385
2386 ar->wmi.eid = conn_resp.eid;
2387 return 0;
2388}
2389
821af6ae
MP		 2390static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2391 u16 rd2g, u16 rd5g, u16 ctl2g,
2392 u16 ctl5g)
5e3dd157
KV		 2393{
2394 struct wmi_pdev_set_regdomain_cmd *cmd;
2395 struct sk_buff *skb;
2396
2397 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2398 if (!skb)
2399 return -ENOMEM;
2400
2401 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
2402 cmd->reg_domain = __cpu_to_le32(rd);
2403 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2404 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2405 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2406 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2407
2408 ath10k_dbg(ATH10K_DBG_WMI,
2409 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
2410 rd, rd2g, rd5g, ctl2g, ctl5g);
2411
ce42870e
BM		 2412 return ath10k_wmi_cmd_send(ar, skb,
2413 ar->wmi.cmd->pdev_set_regdomain_cmdid);
5e3dd157
KV		 2414}
2415
821af6ae
MP		 2416static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2417 u16 rd2g, u16 rd5g,
2418 u16 ctl2g, u16 ctl5g,
2419 enum wmi_dfs_region dfs_reg)
2420{
2421 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
2422 struct sk_buff *skb;
2423
2424 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2425 if (!skb)
2426 return -ENOMEM;
2427
2428 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
2429 cmd->reg_domain = __cpu_to_le32(rd);
2430 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2431 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2432 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2433 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2434 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
2435
2436 ath10k_dbg(ATH10K_DBG_WMI,
2437 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
2438 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
2439
2440 return ath10k_wmi_cmd_send(ar, skb,
2441 ar->wmi.cmd->pdev_set_regdomain_cmdid);
2442}
2443
2444int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
2445 u16 rd5g, u16 ctl2g, u16 ctl5g,
2446 enum wmi_dfs_region dfs_reg)
2447{
2448 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2449 return ath10k_wmi_10x_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2450 ctl2g, ctl5g, dfs_reg);
2451 else
2452 return ath10k_wmi_main_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2453 ctl2g, ctl5g);
2454}
2455
5e3dd157
KV		 2456int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
2457 const struct wmi_channel_arg *arg)
2458{
2459 struct wmi_set_channel_cmd *cmd;
2460 struct sk_buff *skb;
e8a50f8b 2461 u32 ch_flags = 0;
5e3dd157
KV		 2462
2463 if (arg->passive)
2464 return -EINVAL;
2465
2466 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2467 if (!skb)
2468 return -ENOMEM;
2469
e8a50f8b
MP		 2470 if (arg->chan_radar)
2471 ch_flags |= WMI_CHAN_FLAG_DFS;
2472
5e3dd157
KV		 2473 cmd = (struct wmi_set_channel_cmd *)skb->data;
2474 cmd->chan.mhz = __cpu_to_le32(arg->freq);
2475 cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
2476 cmd->chan.mode = arg->mode;
e8a50f8b 2477 cmd->chan.flags |= __cpu_to_le32(ch_flags);
5e3dd157
KV		 2478 cmd->chan.min_power = arg->min_power;
2479 cmd->chan.max_power = arg->max_power;
2480 cmd->chan.reg_power = arg->max_reg_power;
2481 cmd->chan.reg_classid = arg->reg_class_id;
2482 cmd->chan.antenna_max = arg->max_antenna_gain;
2483
2484 ath10k_dbg(ATH10K_DBG_WMI,
2485 "wmi set channel mode %d freq %d\n",
2486 arg->mode, arg->freq);
2487
ce42870e
BM		 2488 return ath10k_wmi_cmd_send(ar, skb,
2489 ar->wmi.cmd->pdev_set_channel_cmdid);
5e3dd157
KV		 2490}
2491
00f5482b 2492int ath10k_wmi_pdev_suspend_target(struct ath10k *ar, u32 suspend_opt)
5e3dd157
KV		 2493{
2494 struct wmi_pdev_suspend_cmd *cmd;
2495 struct sk_buff *skb;
2496
2497 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2498 if (!skb)
2499 return -ENOMEM;
2500
2501 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
00f5482b 2502 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
5e3dd157 2503
ce42870e 2504 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
5e3dd157
KV		 2505}
2506
2507int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
2508{
2509 struct sk_buff *skb;
2510
2511 skb = ath10k_wmi_alloc_skb(0);
2512 if (skb == NULL)
2513 return -ENOMEM;
2514
ce42870e 2515 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
5e3dd157
KV		 2516}
2517
226a339b 2518int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV		 2519{
2520 struct wmi_pdev_set_param_cmd *cmd;
2521 struct sk_buff *skb;
2522
226a339b
BM		 2523 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
2524 ath10k_warn("pdev param %d not supported by firmware\n", id);
d544943a 2525 return -EOPNOTSUPP;
226a339b
BM		 2526 }
2527
5e3dd157
KV		 2528 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2529 if (!skb)
2530 return -ENOMEM;
2531
2532 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
2533 cmd->param_id = __cpu_to_le32(id);
2534 cmd->param_value = __cpu_to_le32(value);
2535
2536 ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
2537 id, value);
ce42870e 2538 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
5e3dd157
KV		 2539}
2540
12b2b9e3 2541static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
5e3dd157
KV		 2542{
2543 struct wmi_init_cmd *cmd;
2544 struct sk_buff *buf;
2545 struct wmi_resource_config config = {};
b3effe61
BM		 2546 u32 len, val;
2547 int i;
5e3dd157
KV		 2548
2549 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
2550 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
2551 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
2552
2553 config.num_offload_reorder_bufs =
2554 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
2555
2556 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
2557 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
2558 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
2559 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
2560 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
2561 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2562 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2563 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2564 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
2565 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
2566
2567 config.scan_max_pending_reqs =
2568 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
2569
2570 config.bmiss_offload_max_vdev =
2571 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
2572
2573 config.roam_offload_max_vdev =
2574 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
2575
2576 config.roam_offload_max_ap_profiles =
2577 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
2578
2579 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
2580 config.num_mcast_table_elems =
2581 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
2582
2583 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
2584 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
2585 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
2586 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
2587 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
2588
2589 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
2590 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
2591
2592 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
2593
2594 config.gtk_offload_max_vdev =
2595 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
2596
2597 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
2598 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
2599
b3effe61
BM		 2600 len = sizeof(*cmd) +
2601 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
2602
2603 buf = ath10k_wmi_alloc_skb(len);
5e3dd157
KV		 2604 if (!buf)
2605 return -ENOMEM;
2606
2607 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61
BM		 2608
2609 if (ar->wmi.num_mem_chunks == 0) {
2610 cmd->num_host_mem_chunks = 0;
2611 goto out;
2612 }
2613
2614 ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
5c54a7bf 2615 ar->wmi.num_mem_chunks);
b3effe61
BM		 2616
2617 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
2618
2619 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2620 cmd->host_mem_chunks[i].ptr =
2621 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
2622 cmd->host_mem_chunks[i].size =
2623 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
2624 cmd->host_mem_chunks[i].req_id =
2625 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
2626
2627 ath10k_dbg(ATH10K_DBG_WMI,
5c54a7bf 2628 "wmi chunk %d len %d requested, addr 0x%llx\n",
b3effe61 2629 i,
5c54a7bf
MK		 2630 ar->wmi.mem_chunks[i].len,
2631 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
b3effe61
BM		 2632 }
2633out:
5e3dd157
KV		 2634 memcpy(&cmd->resource_config, &config, sizeof(config));
2635
2636 ath10k_dbg(ATH10K_DBG_WMI, "wmi init\n");
ce42870e 2637 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
5e3dd157
KV		 2638}
2639
12b2b9e3
BM		 2640static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
2641{
2642 struct wmi_init_cmd_10x *cmd;
2643 struct sk_buff *buf;
2644 struct wmi_resource_config_10x config = {};
2645 u32 len, val;
2646 int i;
2647
ec6a73f0
BM		 2648 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
2649 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
2650 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
2651 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
2652 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
2653 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
2654 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
2655 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2656 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2657 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2658 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
2659 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
12b2b9e3
BM		 2660
2661 config.scan_max_pending_reqs =
ec6a73f0 2662 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM		 2663
2664 config.bmiss_offload_max_vdev =
ec6a73f0 2665 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 2666
2667 config.roam_offload_max_vdev =
ec6a73f0 2668 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 2669
2670 config.roam_offload_max_ap_profiles =
ec6a73f0 2671 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 2672
ec6a73f0 2673 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 2674 config.num_mcast_table_elems =
ec6a73f0 2675 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 2676
ec6a73f0
BM		 2677 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
2678 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
2679 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
2680 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
2681 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 2682
ec6a73f0 2683 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM		 2684 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
2685
ec6a73f0 2686 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 2687
ec6a73f0
BM		 2688 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
2689 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM		 2690
2691 len = sizeof(*cmd) +
2692 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
2693
2694 buf = ath10k_wmi_alloc_skb(len);
2695 if (!buf)
2696 return -ENOMEM;
2697
2698 cmd = (struct wmi_init_cmd_10x *)buf->data;
2699
2700 if (ar->wmi.num_mem_chunks == 0) {
2701 cmd->num_host_mem_chunks = 0;
2702 goto out;
2703 }
2704
2705 ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
5c54a7bf 2706 ar->wmi.num_mem_chunks);
12b2b9e3
BM		 2707
2708 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
2709
2710 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2711 cmd->host_mem_chunks[i].ptr =
2712 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
2713 cmd->host_mem_chunks[i].size =
2714 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
2715 cmd->host_mem_chunks[i].req_id =
2716 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
2717
2718 ath10k_dbg(ATH10K_DBG_WMI,
5c54a7bf 2719 "wmi chunk %d len %d requested, addr 0x%llx\n",
12b2b9e3 2720 i,
5c54a7bf
MK		 2721 ar->wmi.mem_chunks[i].len,
2722 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
12b2b9e3
BM		 2723 }
2724out:
2725 memcpy(&cmd->resource_config, &config, sizeof(config));
2726
2727 ath10k_dbg(ATH10K_DBG_WMI, "wmi init 10x\n");
2728 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
2729}
2730
2731int ath10k_wmi_cmd_init(struct ath10k *ar)
2732{
2733 int ret;
2734
2735 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2736 ret = ath10k_wmi_10x_cmd_init(ar);
2737 else
2738 ret = ath10k_wmi_main_cmd_init(ar);
2739
2740 return ret;
5e3dd157
KV		 2741}
2742
89b7e766
BM		 2743static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar,
2744 const struct wmi_start_scan_arg *arg)
5e3dd157
KV		 2745{
2746 int len;
2747
89b7e766
BM		 2748 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2749 len = sizeof(struct wmi_start_scan_cmd_10x);
2750 else
2751 len = sizeof(struct wmi_start_scan_cmd);
5e3dd157
KV		 2752
2753 if (arg->ie_len) {
2754 if (!arg->ie)
2755 return -EINVAL;
2756 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
2757 return -EINVAL;
2758
2759 len += sizeof(struct wmi_ie_data);
2760 len += roundup(arg->ie_len, 4);
2761 }
2762
2763 if (arg->n_channels) {
2764 if (!arg->channels)
2765 return -EINVAL;
2766 if (arg->n_channels > ARRAY_SIZE(arg->channels))
2767 return -EINVAL;
2768
2769 len += sizeof(struct wmi_chan_list);
2770 len += sizeof(__le32) * arg->n_channels;
2771 }
2772
2773 if (arg->n_ssids) {
2774 if (!arg->ssids)
2775 return -EINVAL;
2776 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
2777 return -EINVAL;
2778
2779 len += sizeof(struct wmi_ssid_list);
2780 len += sizeof(struct wmi_ssid) * arg->n_ssids;
2781 }
2782
2783 if (arg->n_bssids) {
2784 if (!arg->bssids)
2785 return -EINVAL;
2786 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
2787 return -EINVAL;
2788
2789 len += sizeof(struct wmi_bssid_list);
2790 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
2791 }
2792
2793 return len;
2794}
2795
2796int ath10k_wmi_start_scan(struct ath10k *ar,
2797 const struct wmi_start_scan_arg *arg)
2798{
2799 struct wmi_start_scan_cmd *cmd;
2800 struct sk_buff *skb;
2801 struct wmi_ie_data *ie;
2802 struct wmi_chan_list *channels;
2803 struct wmi_ssid_list *ssids;
2804 struct wmi_bssid_list *bssids;
2805 u32 scan_id;
2806 u32 scan_req_id;
2807 int off;
2808 int len = 0;
2809 int i;
2810
89b7e766 2811 len = ath10k_wmi_start_scan_calc_len(ar, arg);
5e3dd157
KV		 2812 if (len < 0)
2813 return len; /* len contains error code here */
2814
2815 skb = ath10k_wmi_alloc_skb(len);
2816 if (!skb)
2817 return -ENOMEM;
2818
2819 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
2820 scan_id |= arg->scan_id;
2821
2822 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
2823 scan_req_id |= arg->scan_req_id;
2824
2825 cmd = (struct wmi_start_scan_cmd *)skb->data;
2826 cmd->scan_id = __cpu_to_le32(scan_id);
2827 cmd->scan_req_id = __cpu_to_le32(scan_req_id);
2828 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
2829 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
2830 cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
2831 cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
2832 cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
2833 cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
2834 cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
2835 cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
2836 cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
2837 cmd->idle_time = __cpu_to_le32(arg->idle_time);
2838 cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
2839 cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
2840 cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
2841
2842 /* TLV list starts after fields included in the struct */
89b7e766
BM		 2843 /* There's just one filed that differes the two start_scan
2844 * structures - burst_duration, which we are not using btw,
2845 no point to make the split here, just shift the buffer to fit with
2846 given FW */
2847 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2848 off = sizeof(struct wmi_start_scan_cmd_10x);
2849 else
2850 off = sizeof(struct wmi_start_scan_cmd);
5e3dd157
KV		 2851
2852 if (arg->n_channels) {
2853 channels = (void *)skb->data + off;
2854 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
2855 channels->num_chan = __cpu_to_le32(arg->n_channels);
2856
2857 for (i = 0; i < arg->n_channels; i++)
2858 channels->channel_list[i] =
2859 __cpu_to_le32(arg->channels[i]);
2860
2861 off += sizeof(*channels);
2862 off += sizeof(__le32) * arg->n_channels;
2863 }
2864
2865 if (arg->n_ssids) {
2866 ssids = (void *)skb->data + off;
2867 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
2868 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
2869
2870 for (i = 0; i < arg->n_ssids; i++) {
2871 ssids->ssids[i].ssid_len =
2872 __cpu_to_le32(arg->ssids[i].len);
2873 memcpy(&ssids->ssids[i].ssid,
2874 arg->ssids[i].ssid,
2875 arg->ssids[i].len);
2876 }
2877
2878 off += sizeof(*ssids);
2879 off += sizeof(struct wmi_ssid) * arg->n_ssids;
2880 }
2881
2882 if (arg->n_bssids) {
2883 bssids = (void *)skb->data + off;
2884 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
2885 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
2886
2887 for (i = 0; i < arg->n_bssids; i++)
2888 memcpy(&bssids->bssid_list[i],
2889 arg->bssids[i].bssid,
2890 ETH_ALEN);
2891
2892 off += sizeof(*bssids);
2893 off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
2894 }
2895
2896 if (arg->ie_len) {
2897 ie = (void *)skb->data + off;
2898 ie->tag = __cpu_to_le32(WMI_IE_TAG);
2899 ie->ie_len = __cpu_to_le32(arg->ie_len);
2900 memcpy(ie->ie_data, arg->ie, arg->ie_len);
2901
2902 off += sizeof(*ie);
2903 off += roundup(arg->ie_len, 4);
2904 }
2905
2906 if (off != skb->len) {
2907 dev_kfree_skb(skb);
2908 return -EINVAL;
2909 }
2910
2911 ath10k_dbg(ATH10K_DBG_WMI, "wmi start scan\n");
ce42870e 2912 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
5e3dd157
KV		 2913}
2914
2915void ath10k_wmi_start_scan_init(struct ath10k *ar,
2916 struct wmi_start_scan_arg *arg)
2917{
2918 /* setup commonly used values */
2919 arg->scan_req_id = 1;
2920 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2921 arg->dwell_time_active = 50;
2922 arg->dwell_time_passive = 150;
2923 arg->min_rest_time = 50;
2924 arg->max_rest_time = 500;
2925 arg->repeat_probe_time = 0;
2926 arg->probe_spacing_time = 0;
2927 arg->idle_time = 0;
c322892f 2928 arg->max_scan_time = 20000;
5e3dd157
KV		 2929 arg->probe_delay = 5;
2930 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
2931 | WMI_SCAN_EVENT_COMPLETED
2932 | WMI_SCAN_EVENT_BSS_CHANNEL
2933 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
2934 | WMI_SCAN_EVENT_DEQUEUED;
2935 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
2936 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
2937 arg->n_bssids = 1;
2938 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
2939}
2940
2941int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
2942{
2943 struct wmi_stop_scan_cmd *cmd;
2944 struct sk_buff *skb;
2945 u32 scan_id;
2946 u32 req_id;
2947
2948 if (arg->req_id > 0xFFF)
2949 return -EINVAL;
2950 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
2951 return -EINVAL;
2952
2953 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2954 if (!skb)
2955 return -ENOMEM;
2956
2957 scan_id = arg->u.scan_id;
2958 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
2959
2960 req_id = arg->req_id;
2961 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
2962
2963 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2964 cmd->req_type = __cpu_to_le32(arg->req_type);
2965 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
2966 cmd->scan_id = __cpu_to_le32(scan_id);
2967 cmd->scan_req_id = __cpu_to_le32(req_id);
2968
2969 ath10k_dbg(ATH10K_DBG_WMI,
2970 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
2971 arg->req_id, arg->req_type, arg->u.scan_id);
ce42870e 2972 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
5e3dd157
KV		 2973}
2974
2975int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
2976 enum wmi_vdev_type type,
2977 enum wmi_vdev_subtype subtype,
2978 const u8 macaddr[ETH_ALEN])
2979{
2980 struct wmi_vdev_create_cmd *cmd;
2981 struct sk_buff *skb;
2982
2983 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2984 if (!skb)
2985 return -ENOMEM;
2986
2987 cmd = (struct wmi_vdev_create_cmd *)skb->data;
2988 cmd->vdev_id = __cpu_to_le32(vdev_id);
2989 cmd->vdev_type = __cpu_to_le32(type);
2990 cmd->vdev_subtype = __cpu_to_le32(subtype);
2991 memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN);
2992
2993 ath10k_dbg(ATH10K_DBG_WMI,
2994 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
2995 vdev_id, type, subtype, macaddr);
2996
ce42870e 2997 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
5e3dd157
KV		 2998}
2999
3000int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
3001{
3002 struct wmi_vdev_delete_cmd *cmd;
3003 struct sk_buff *skb;
3004
3005 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3006 if (!skb)
3007 return -ENOMEM;
3008
3009 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
3010 cmd->vdev_id = __cpu_to_le32(vdev_id);
3011
3012 ath10k_dbg(ATH10K_DBG_WMI,
3013 "WMI vdev delete id %d\n", vdev_id);
3014
ce42870e 3015 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
5e3dd157
KV		 3016}
3017
3018static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
3019 const struct wmi_vdev_start_request_arg *arg,
ce42870e 3020 u32 cmd_id)
5e3dd157
KV		 3021{
3022 struct wmi_vdev_start_request_cmd *cmd;
3023 struct sk_buff *skb;
3024 const char *cmdname;
3025 u32 flags = 0;
e8a50f8b 3026 u32 ch_flags = 0;
5e3dd157 3027
ce42870e
BM		 3028 if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
3029 cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 3030 return -EINVAL;
3031 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
3032 return -EINVAL;
3033 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
3034 return -EINVAL;
3035 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
3036 return -EINVAL;
3037
ce42870e 3038 if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
5e3dd157 3039 cmdname = "start";
ce42870e 3040 else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 3041 cmdname = "restart";
3042 else
3043 return -EINVAL; /* should not happen, we already check cmd_id */
3044
3045 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3046 if (!skb)
3047 return -ENOMEM;
3048
3049 if (arg->hidden_ssid)
3050 flags |= WMI_VDEV_START_HIDDEN_SSID;
3051 if (arg->pmf_enabled)
3052 flags |= WMI_VDEV_START_PMF_ENABLED;
e8a50f8b
MP		 3053 if (arg->channel.chan_radar)
3054 ch_flags |= WMI_CHAN_FLAG_DFS;
5e3dd157
KV		 3055
3056 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
3057 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3058 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
3059 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
3060 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
3061 cmd->flags = __cpu_to_le32(flags);
3062 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
3063 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
3064
3065 if (arg->ssid) {
3066 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
3067 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
3068 }
3069
3070 cmd->chan.mhz = __cpu_to_le32(arg->channel.freq);
3071
3072 cmd->chan.band_center_freq1 =
3073 __cpu_to_le32(arg->channel.band_center_freq1);
3074
3075 cmd->chan.mode = arg->channel.mode;
e8a50f8b 3076 cmd->chan.flags |= __cpu_to_le32(ch_flags);
5e3dd157
KV		 3077 cmd->chan.min_power = arg->channel.min_power;
3078 cmd->chan.max_power = arg->channel.max_power;
3079 cmd->chan.reg_power = arg->channel.max_reg_power;
3080 cmd->chan.reg_classid = arg->channel.reg_class_id;
3081 cmd->chan.antenna_max = arg->channel.max_antenna_gain;
3082
3083 ath10k_dbg(ATH10K_DBG_WMI,
e8a50f8b
MP		 3084 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, "
3085 "ch_flags: 0x%0X, max_power: %d\n", cmdname, arg->vdev_id,
3086 flags, arg->channel.freq, arg->channel.mode,
3087 cmd->chan.flags, arg->channel.max_power);
5e3dd157
KV		 3088
3089 return ath10k_wmi_cmd_send(ar, skb, cmd_id);
3090}
3091
3092int ath10k_wmi_vdev_start(struct ath10k *ar,
3093 const struct wmi_vdev_start_request_arg *arg)
3094{
ce42870e
BM		 3095 u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
3096
3097 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3098}
3099
3100int ath10k_wmi_vdev_restart(struct ath10k *ar,
3101 const struct wmi_vdev_start_request_arg *arg)
3102{
ce42870e
BM		 3103 u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
3104
3105 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3106}
3107
3108int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
3109{
3110 struct wmi_vdev_stop_cmd *cmd;
3111 struct sk_buff *skb;
3112
3113 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3114 if (!skb)
3115 return -ENOMEM;
3116
3117 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
3118 cmd->vdev_id = __cpu_to_le32(vdev_id);
3119
3120 ath10k_dbg(ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
3121
ce42870e 3122 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
5e3dd157
KV		 3123}
3124
3125int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
3126{
3127 struct wmi_vdev_up_cmd *cmd;
3128 struct sk_buff *skb;
3129
3130 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3131 if (!skb)
3132 return -ENOMEM;
3133
3134 cmd = (struct wmi_vdev_up_cmd *)skb->data;
3135 cmd->vdev_id = __cpu_to_le32(vdev_id);
3136 cmd->vdev_assoc_id = __cpu_to_le32(aid);
7b4371ea 3137 memcpy(&cmd->vdev_bssid.addr, bssid, ETH_ALEN);
5e3dd157
KV		 3138
3139 ath10k_dbg(ATH10K_DBG_WMI,
3140 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
3141 vdev_id, aid, bssid);
3142
ce42870e 3143 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
5e3dd157
KV		 3144}
3145
3146int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
3147{
3148 struct wmi_vdev_down_cmd *cmd;
3149 struct sk_buff *skb;
3150
3151 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3152 if (!skb)
3153 return -ENOMEM;
3154
3155 cmd = (struct wmi_vdev_down_cmd *)skb->data;
3156 cmd->vdev_id = __cpu_to_le32(vdev_id);
3157
3158 ath10k_dbg(ATH10K_DBG_WMI,
3159 "wmi mgmt vdev down id 0x%x\n", vdev_id);
3160
ce42870e 3161 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
5e3dd157
KV		 3162}
3163
3164int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
6d1506e7 3165 u32 param_id, u32 param_value)
5e3dd157
KV		 3166{
3167 struct wmi_vdev_set_param_cmd *cmd;
3168 struct sk_buff *skb;
3169
6d1506e7
BM		 3170 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
3171 ath10k_dbg(ATH10K_DBG_WMI,
3172 "vdev param %d not supported by firmware\n",
3173 param_id);
ebc9abdd 3174 return -EOPNOTSUPP;
6d1506e7
BM		 3175 }
3176
5e3dd157
KV		 3177 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3178 if (!skb)
3179 return -ENOMEM;
3180
3181 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
3182 cmd->vdev_id = __cpu_to_le32(vdev_id);
3183 cmd->param_id = __cpu_to_le32(param_id);
3184 cmd->param_value = __cpu_to_le32(param_value);
3185
3186 ath10k_dbg(ATH10K_DBG_WMI,
3187 "wmi vdev id 0x%x set param %d value %d\n",
3188 vdev_id, param_id, param_value);
3189
ce42870e 3190 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
5e3dd157
KV		 3191}
3192
3193int ath10k_wmi_vdev_install_key(struct ath10k *ar,
3194 const struct wmi_vdev_install_key_arg *arg)
3195{
3196 struct wmi_vdev_install_key_cmd *cmd;
3197 struct sk_buff *skb;
3198
3199 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
3200 return -EINVAL;
3201 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
3202 return -EINVAL;
3203
3204 skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->key_len);
3205 if (!skb)
3206 return -ENOMEM;
3207
3208 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
3209 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3210 cmd->key_idx = __cpu_to_le32(arg->key_idx);
3211 cmd->key_flags = __cpu_to_le32(arg->key_flags);
3212 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
3213 cmd->key_len = __cpu_to_le32(arg->key_len);
3214 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
3215 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
3216
3217 if (arg->macaddr)
3218 memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN);
3219 if (arg->key_data)
3220 memcpy(cmd->key_data, arg->key_data, arg->key_len);
3221
e0c508ab
MK		 3222 ath10k_dbg(ATH10K_DBG_WMI,
3223 "wmi vdev install key idx %d cipher %d len %d\n",
3224 arg->key_idx, arg->key_cipher, arg->key_len);
ce42870e
BM		 3225 return ath10k_wmi_cmd_send(ar, skb,
3226 ar->wmi.cmd->vdev_install_key_cmdid);
5e3dd157
KV		 3227}
3228
3229int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
3230 const u8 peer_addr[ETH_ALEN])
3231{
3232 struct wmi_peer_create_cmd *cmd;
3233 struct sk_buff *skb;
3234
3235 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3236 if (!skb)
3237 return -ENOMEM;
3238
3239 cmd = (struct wmi_peer_create_cmd *)skb->data;
3240 cmd->vdev_id = __cpu_to_le32(vdev_id);
3241 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3242
3243 ath10k_dbg(ATH10K_DBG_WMI,
3244 "wmi peer create vdev_id %d peer_addr %pM\n",
3245 vdev_id, peer_addr);
ce42870e 3246 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
5e3dd157
KV		 3247}
3248
3249int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
3250 const u8 peer_addr[ETH_ALEN])
3251{
3252 struct wmi_peer_delete_cmd *cmd;
3253 struct sk_buff *skb;
3254
3255 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3256 if (!skb)
3257 return -ENOMEM;
3258
3259 cmd = (struct wmi_peer_delete_cmd *)skb->data;
3260 cmd->vdev_id = __cpu_to_le32(vdev_id);
3261 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3262
3263 ath10k_dbg(ATH10K_DBG_WMI,
3264 "wmi peer delete vdev_id %d peer_addr %pM\n",
3265 vdev_id, peer_addr);
ce42870e 3266 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
5e3dd157
KV		 3267}
3268
3269int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
3270 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
3271{
3272 struct wmi_peer_flush_tids_cmd *cmd;
3273 struct sk_buff *skb;
3274
3275 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3276 if (!skb)
3277 return -ENOMEM;
3278
3279 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
3280 cmd->vdev_id = __cpu_to_le32(vdev_id);
3281 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
3282 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3283
3284 ath10k_dbg(ATH10K_DBG_WMI,
3285 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
3286 vdev_id, peer_addr, tid_bitmap);
ce42870e 3287 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
5e3dd157
KV		 3288}
3289
3290int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
3291 const u8 *peer_addr, enum wmi_peer_param param_id,
3292 u32 param_value)
3293{
3294 struct wmi_peer_set_param_cmd *cmd;
3295 struct sk_buff *skb;
3296
3297 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3298 if (!skb)
3299 return -ENOMEM;
3300
3301 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
3302 cmd->vdev_id = __cpu_to_le32(vdev_id);
3303 cmd->param_id = __cpu_to_le32(param_id);
3304 cmd->param_value = __cpu_to_le32(param_value);
d458cdf7 3305 memcpy(&cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
5e3dd157
KV		 3306
3307 ath10k_dbg(ATH10K_DBG_WMI,
3308 "wmi vdev %d peer 0x%pM set param %d value %d\n",
3309 vdev_id, peer_addr, param_id, param_value);
3310
ce42870e 3311 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
5e3dd157
KV		 3312}
3313
3314int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
3315 enum wmi_sta_ps_mode psmode)
3316{
3317 struct wmi_sta_powersave_mode_cmd *cmd;
3318 struct sk_buff *skb;
3319
3320 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3321 if (!skb)
3322 return -ENOMEM;
3323
3324 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
3325 cmd->vdev_id = __cpu_to_le32(vdev_id);
3326 cmd->sta_ps_mode = __cpu_to_le32(psmode);
3327
3328 ath10k_dbg(ATH10K_DBG_WMI,
3329 "wmi set powersave id 0x%x mode %d\n",
3330 vdev_id, psmode);
3331
ce42870e
BM		 3332 return ath10k_wmi_cmd_send(ar, skb,
3333 ar->wmi.cmd->sta_powersave_mode_cmdid);
5e3dd157
KV		 3334}
3335
3336int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
3337 enum wmi_sta_powersave_param param_id,
3338 u32 value)
3339{
3340 struct wmi_sta_powersave_param_cmd *cmd;
3341 struct sk_buff *skb;
3342
3343 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3344 if (!skb)
3345 return -ENOMEM;
3346
3347 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
3348 cmd->vdev_id = __cpu_to_le32(vdev_id);
3349 cmd->param_id = __cpu_to_le32(param_id);
3350 cmd->param_value = __cpu_to_le32(value);
3351
3352 ath10k_dbg(ATH10K_DBG_WMI,
3353 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
3354 vdev_id, param_id, value);
ce42870e
BM		 3355 return ath10k_wmi_cmd_send(ar, skb,
3356 ar->wmi.cmd->sta_powersave_param_cmdid);
5e3dd157
KV		 3357}
3358
3359int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
3360 enum wmi_ap_ps_peer_param param_id, u32 value)
3361{
3362 struct wmi_ap_ps_peer_cmd *cmd;
3363 struct sk_buff *skb;
3364
3365 if (!mac)
3366 return -EINVAL;
3367
3368 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3369 if (!skb)
3370 return -ENOMEM;
3371
3372 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
3373 cmd->vdev_id = __cpu_to_le32(vdev_id);
3374 cmd->param_id = __cpu_to_le32(param_id);
3375 cmd->param_value = __cpu_to_le32(value);
3376 memcpy(&cmd->peer_macaddr, mac, ETH_ALEN);
3377
3378 ath10k_dbg(ATH10K_DBG_WMI,
3379 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
3380 vdev_id, param_id, value, mac);
3381
ce42870e
BM		 3382 return ath10k_wmi_cmd_send(ar, skb,
3383 ar->wmi.cmd->ap_ps_peer_param_cmdid);
5e3dd157
KV		 3384}
3385
3386int ath10k_wmi_scan_chan_list(struct ath10k *ar,
3387 const struct wmi_scan_chan_list_arg *arg)
3388{
3389 struct wmi_scan_chan_list_cmd *cmd;
3390 struct sk_buff *skb;
3391 struct wmi_channel_arg *ch;
3392 struct wmi_channel *ci;
3393 int len;
3394 int i;
3395
3396 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
3397
3398 skb = ath10k_wmi_alloc_skb(len);
3399 if (!skb)
3400 return -EINVAL;
3401
3402 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
3403 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
3404
3405 for (i = 0; i < arg->n_channels; i++) {
3406 u32 flags = 0;
3407
3408 ch = &arg->channels[i];
3409 ci = &cmd->chan_info[i];
3410
3411 if (ch->passive)
3412 flags |= WMI_CHAN_FLAG_PASSIVE;
3413 if (ch->allow_ibss)
3414 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
3415 if (ch->allow_ht)
3416 flags |= WMI_CHAN_FLAG_ALLOW_HT;
3417 if (ch->allow_vht)
3418 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
3419 if (ch->ht40plus)
3420 flags |= WMI_CHAN_FLAG_HT40_PLUS;
e8a50f8b
MP		 3421 if (ch->chan_radar)
3422 flags |= WMI_CHAN_FLAG_DFS;
5e3dd157
KV		 3423
3424 ci->mhz = __cpu_to_le32(ch->freq);
3425 ci->band_center_freq1 = __cpu_to_le32(ch->freq);
3426 ci->band_center_freq2 = 0;
3427 ci->min_power = ch->min_power;
3428 ci->max_power = ch->max_power;
3429 ci->reg_power = ch->max_reg_power;
3430 ci->antenna_max = ch->max_antenna_gain;
5e3dd157
KV		 3431
3432 /* mode & flags share storage */
3433 ci->mode = ch->mode;
3434 ci->flags |= __cpu_to_le32(flags);
3435 }
3436
ce42870e 3437 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
5e3dd157
KV		 3438}
3439
3440int ath10k_wmi_peer_assoc(struct ath10k *ar,
3441 const struct wmi_peer_assoc_complete_arg *arg)
3442{
3443 struct wmi_peer_assoc_complete_cmd *cmd;
3444 struct sk_buff *skb;
3445
3446 if (arg->peer_mpdu_density > 16)
3447 return -EINVAL;
3448 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
3449 return -EINVAL;
3450 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
3451 return -EINVAL;
3452
3453 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3454 if (!skb)
3455 return -ENOMEM;
3456
3457 cmd = (struct wmi_peer_assoc_complete_cmd *)skb->data;
3458 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3459 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
3460 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
3461 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
3462 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
3463 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
3464 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
3465 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
3466 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
3467 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
3468 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
3469 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
3470 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
3471
3472 memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN);
3473
3474 cmd->peer_legacy_rates.num_rates =
3475 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
3476 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
3477 arg->peer_legacy_rates.num_rates);
3478
3479 cmd->peer_ht_rates.num_rates =
3480 __cpu_to_le32(arg->peer_ht_rates.num_rates);
3481 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
3482 arg->peer_ht_rates.num_rates);
3483
3484 cmd->peer_vht_rates.rx_max_rate =
3485 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
3486 cmd->peer_vht_rates.rx_mcs_set =
3487 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
3488 cmd->peer_vht_rates.tx_max_rate =
3489 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
3490 cmd->peer_vht_rates.tx_mcs_set =
3491 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
3492
e0c508ab 3493 ath10k_dbg(ATH10K_DBG_WMI,
44d6fa90
CYY		 3494 "wmi peer assoc vdev %d addr %pM (%s)\n",
3495 arg->vdev_id, arg->addr,
3496 arg->peer_reassoc ? "reassociate" : "new");
ce42870e 3497 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
5e3dd157
KV		 3498}
3499
748afc47
MK		 3500/* This function assumes the beacon is already DMA mapped */
3501int ath10k_wmi_beacon_send_ref_nowait(struct ath10k_vif *arvif)
5e3dd157 3502{
748afc47 3503 struct wmi_bcn_tx_ref_cmd *cmd;
5e3dd157 3504 struct sk_buff *skb;
748afc47
MK		 3505 struct sk_buff *beacon = arvif->beacon;
3506 struct ath10k *ar = arvif->ar;
3507 struct ieee80211_hdr *hdr;
e2045481 3508 int ret;
748afc47 3509 u16 fc;
5e3dd157 3510
748afc47 3511 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
5e3dd157
KV		 3512 if (!skb)
3513 return -ENOMEM;
3514
748afc47
MK		 3515 hdr = (struct ieee80211_hdr *)beacon->data;
3516 fc = le16_to_cpu(hdr->frame_control);
3517
3518 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
3519 cmd->vdev_id = __cpu_to_le32(arvif->vdev_id);
3520 cmd->data_len = __cpu_to_le32(beacon->len);
3521 cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr);
3522 cmd->msdu_id = 0;
3523 cmd->frame_control = __cpu_to_le32(fc);
3524 cmd->flags = 0;
3525
3526 if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero)
3527 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
3528
3529 if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab)
3530 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
3531
3532 ret = ath10k_wmi_cmd_send_nowait(ar, skb,
3533 ar->wmi.cmd->pdev_send_bcn_cmdid);
5e3dd157 3534
e2045481
MK		 3535 if (ret)
3536 dev_kfree_skb(skb);
3537
3538 return ret;
5e3dd157
KV		 3539}
3540
3541static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
3542 const struct wmi_wmm_params_arg *arg)
3543{
3544 params->cwmin = __cpu_to_le32(arg->cwmin);
3545 params->cwmax = __cpu_to_le32(arg->cwmax);
3546 params->aifs = __cpu_to_le32(arg->aifs);
3547 params->txop = __cpu_to_le32(arg->txop);
3548 params->acm = __cpu_to_le32(arg->acm);
3549 params->no_ack = __cpu_to_le32(arg->no_ack);
3550}
3551
3552int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
3553 const struct wmi_pdev_set_wmm_params_arg *arg)
3554{
3555 struct wmi_pdev_set_wmm_params *cmd;
3556 struct sk_buff *skb;
3557
3558 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3559 if (!skb)
3560 return -ENOMEM;
3561
3562 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
3563 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
3564 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
3565 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
3566 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
3567
3568 ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
ce42870e
BM		 3569 return ath10k_wmi_cmd_send(ar, skb,
3570 ar->wmi.cmd->pdev_set_wmm_params_cmdid);
5e3dd157
KV		 3571}
3572
3573int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
3574{
3575 struct wmi_request_stats_cmd *cmd;
3576 struct sk_buff *skb;
3577
3578 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3579 if (!skb)
3580 return -ENOMEM;
3581
3582 cmd = (struct wmi_request_stats_cmd *)skb->data;
3583 cmd->stats_id = __cpu_to_le32(stats_id);
3584
3585 ath10k_dbg(ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
ce42870e 3586 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
5e3dd157 3587}
9cfbce75
MK		 3588
3589int ath10k_wmi_force_fw_hang(struct ath10k *ar,
3590 enum wmi_force_fw_hang_type type, u32 delay_ms)
3591{
3592 struct wmi_force_fw_hang_cmd *cmd;
3593 struct sk_buff *skb;
3594
3595 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3596 if (!skb)
3597 return -ENOMEM;
3598
3599 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
3600 cmd->type = __cpu_to_le32(type);
3601 cmd->delay_ms = __cpu_to_le32(delay_ms);
3602
3603 ath10k_dbg(ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
3604 type, delay_ms);
ce42870e 3605 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
9cfbce75 3606}
f118a3e5
KV		 3607
3608int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable)
3609{
3610 struct wmi_dbglog_cfg_cmd *cmd;
3611 struct sk_buff *skb;
3612 u32 cfg;
3613
3614 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3615 if (!skb)
3616 return -ENOMEM;
3617
3618 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
3619
3620 if (module_enable) {
3621 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
3622 ATH10K_DBGLOG_CFG_LOG_LVL);
3623 } else {
3624 /* set back defaults, all modules with WARN level */
3625 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
3626 ATH10K_DBGLOG_CFG_LOG_LVL);
3627 module_enable = ~0;
3628 }
3629
3630 cmd->module_enable = __cpu_to_le32(module_enable);
3631 cmd->module_valid = __cpu_to_le32(~0);
3632 cmd->config_enable = __cpu_to_le32(cfg);
3633 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
3634
3635 ath10k_dbg(ATH10K_DBG_WMI,
3636 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
3637 __le32_to_cpu(cmd->module_enable),
3638 __le32_to_cpu(cmd->module_valid),
3639 __le32_to_cpu(cmd->config_enable),
3640 __le32_to_cpu(cmd->config_valid));
3641
3642 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid);
3643}
Linux kernel - Deliverables
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