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ath10k: implement channel switching
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
5e3dd157
KV		 20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
25#include "mac.h"
26
ce42870e
BM		 27/* MAIN WMI cmd track */
28static struct wmi_cmd_map wmi_cmd_map = {
29 .init_cmdid = WMI_INIT_CMDID,
30 .start_scan_cmdid = WMI_START_SCAN_CMDID,
31 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
32 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
33 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
34 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
35 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
36 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
37 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
38 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
39 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
40 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
41 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
42 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
43 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
44 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
45 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
46 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
47 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
48 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
49 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
50 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
51 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
52 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
53 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
54 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
55 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
56 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
57 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
58 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
59 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
60 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
61 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
62 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
63 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
64 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
65 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
66 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
67 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
68 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
69 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
70 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
71 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
72 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
73 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
74 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
75 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
76 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
77 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
78 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
79 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
80 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
81 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
82 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
83 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
84 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
85 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
86 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
87 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
88 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
89 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
90 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
91 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
92 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
93 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
94 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
95 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
96 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
97 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
98 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
99 .wlan_profile_set_hist_intvl_cmdid =
100 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
101 .wlan_profile_get_profile_data_cmdid =
102 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
103 .wlan_profile_enable_profile_id_cmdid =
104 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
105 .wlan_profile_list_profile_id_cmdid =
106 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
107 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
108 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
109 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
110 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
111 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
112 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
113 .wow_enable_disable_wake_event_cmdid =
114 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
115 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
116 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
117 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
118 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
119 .vdev_spectral_scan_configure_cmdid =
120 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
121 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
122 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
123 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
124 .network_list_offload_config_cmdid =
125 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
126 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
127 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
128 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
129 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
130 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
131 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
132 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
133 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
134 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
135 .echo_cmdid = WMI_ECHO_CMDID,
136 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
137 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
138 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
139 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
140 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
141 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
142 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
143 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
144 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
145};
146
b7e3adf9
BM		 147/* 10.X WMI cmd track */
148static struct wmi_cmd_map wmi_10x_cmd_map = {
149 .init_cmdid = WMI_10X_INIT_CMDID,
150 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
151 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
152 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 153 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 154 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
155 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
156 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
157 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
158 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
159 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
160 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
161 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
162 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
163 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
164 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
165 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
166 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
167 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
168 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
169 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
170 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
171 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
172 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
173 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
174 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
175 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
176 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
177 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
178 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
179 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
180 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
181 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
182 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
183 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
184 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
185 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 186 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 187 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
188 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
189 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 190 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 191 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
192 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
193 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
194 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
195 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
196 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
197 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
198 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
199 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
200 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
201 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
202 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
203 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
204 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
205 .roam_scan_rssi_change_threshold =
206 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
207 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
208 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
209 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
210 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
211 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
212 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
213 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
214 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 215 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 216 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 217 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 218 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
219 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
220 .wlan_profile_set_hist_intvl_cmdid =
221 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
222 .wlan_profile_get_profile_data_cmdid =
223 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
224 .wlan_profile_enable_profile_id_cmdid =
225 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
226 .wlan_profile_list_profile_id_cmdid =
227 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
228 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
229 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
230 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
231 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
232 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
233 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
234 .wow_enable_disable_wake_event_cmdid =
235 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
236 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
237 .wow_hostwakeup_from_sleep_cmdid =
238 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
239 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
240 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
241 .vdev_spectral_scan_configure_cmdid =
242 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
243 .vdev_spectral_scan_enable_cmdid =
244 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
245 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
34957b25
BM		 246 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
247 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
248 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
249 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
250 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
251 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
252 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
253 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
254 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
255 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
256 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 257 .echo_cmdid = WMI_10X_ECHO_CMDID,
258 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
259 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
260 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
34957b25
BM		 261 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
262 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
263 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
264 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 265 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
266 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
267};
ce42870e 268
6d1506e7
BM		 269/* MAIN WMI VDEV param map */
270static struct wmi_vdev_param_map wmi_vdev_param_map = {
271 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
272 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
273 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
274 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
275 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
276 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
277 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
278 .preamble = WMI_VDEV_PARAM_PREAMBLE,
279 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
280 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
281 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
282 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
283 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
284 .wmi_vdev_oc_scheduler_air_time_limit =
285 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
286 .wds = WMI_VDEV_PARAM_WDS,
287 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
288 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
289 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
290 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
291 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
292 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
293 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
294 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
295 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
296 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
297 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
298 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
299 .sgi = WMI_VDEV_PARAM_SGI,
300 .ldpc = WMI_VDEV_PARAM_LDPC,
301 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
302 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
303 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
304 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
305 .nss = WMI_VDEV_PARAM_NSS,
306 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
307 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
308 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
309 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
310 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
311 .ap_keepalive_min_idle_inactive_time_secs =
312 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
313 .ap_keepalive_max_idle_inactive_time_secs =
314 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
315 .ap_keepalive_max_unresponsive_time_secs =
316 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
317 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
318 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
319 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
320 .txbf = WMI_VDEV_PARAM_TXBF,
321 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
322 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
323 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
324 .ap_detect_out_of_sync_sleeping_sta_time_secs =
325 WMI_VDEV_PARAM_UNSUPPORTED,
326};
327
328/* 10.X WMI VDEV param map */
329static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
330 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
331 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
332 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
333 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
334 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
335 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
336 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
337 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
338 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
339 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
340 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
341 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
342 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
343 .wmi_vdev_oc_scheduler_air_time_limit =
344 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
345 .wds = WMI_10X_VDEV_PARAM_WDS,
346 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
347 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
348 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
349 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
350 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
351 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
352 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
353 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
354 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
355 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
356 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
357 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
358 .sgi = WMI_10X_VDEV_PARAM_SGI,
359 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
360 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
361 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
362 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
363 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
364 .nss = WMI_10X_VDEV_PARAM_NSS,
365 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
366 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
367 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
368 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
369 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
370 .ap_keepalive_min_idle_inactive_time_secs =
371 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
372 .ap_keepalive_max_idle_inactive_time_secs =
373 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
374 .ap_keepalive_max_unresponsive_time_secs =
375 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
376 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
377 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
378 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
379 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
380 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
381 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
382 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
383 .ap_detect_out_of_sync_sleeping_sta_time_secs =
384 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
385};
386
226a339b
BM		 387static struct wmi_pdev_param_map wmi_pdev_param_map = {
388 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
389 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
390 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
391 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
392 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
393 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
394 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
395 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
396 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
397 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
398 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
399 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
400 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
401 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
402 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
403 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
404 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
405 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
406 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
407 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
408 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
409 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
410 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
411 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
412 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
413 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
414 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
415 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
416 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
417 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
418 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
419 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
420 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
421 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
422 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
423 .arpdhcp_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
424 .dcs = WMI_PDEV_PARAM_DCS,
425 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
426 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
427 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
428 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
429 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
430 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
431 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
432 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
433 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
434 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
435 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
436 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
437};
438
439static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
440 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
441 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
442 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
443 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
444 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
445 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
446 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
447 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
448 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
449 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
450 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
451 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
452 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
453 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
454 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
455 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
456 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
457 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
458 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
459 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
460 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
461 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
462 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
463 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
464 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
465 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
466 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
467 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
468 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
469 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
470 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
471 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
472 .bcnflt_stats_update_period =
473 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
474 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
475 .arp_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
476 .arpdhcp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
477 .dcs = WMI_10X_PDEV_PARAM_DCS,
478 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
479 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
480 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
481 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
482 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
483 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
484 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
485 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
486 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
487 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
488 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
489 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
490};
491
5e3dd157
KV		 492int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
493{
494 int ret;
495 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
496 WMI_SERVICE_READY_TIMEOUT_HZ);
497 return ret;
498}
499
500int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
501{
502 int ret;
503 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
504 WMI_UNIFIED_READY_TIMEOUT_HZ);
505 return ret;
506}
507
508static struct sk_buff *ath10k_wmi_alloc_skb(u32 len)
509{
510 struct sk_buff *skb;
511 u32 round_len = roundup(len, 4);
512
513 skb = ath10k_htc_alloc_skb(WMI_SKB_HEADROOM + round_len);
514 if (!skb)
515 return NULL;
516
517 skb_reserve(skb, WMI_SKB_HEADROOM);
518 if (!IS_ALIGNED((unsigned long)skb->data, 4))
519 ath10k_warn("Unaligned WMI skb\n");
520
521 skb_put(skb, round_len);
522 memset(skb->data, 0, round_len);
523
524 return skb;
525}
526
527static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
528{
529 dev_kfree_skb(skb);
5e3dd157
KV		 530}
531
be8b3943 532static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
ce42870e 533 u32 cmd_id)
5e3dd157
KV		 534{
535 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
536 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 537 int ret;
5e3dd157
KV		 538 u32 cmd = 0;
539
540 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
541 return -ENOMEM;
542
543 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
544
545 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
546 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
547
5e3dd157 548 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943
MK		 549 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
550 trace_ath10k_wmi_cmd(cmd_id, skb->data, skb->len, ret);
5e3dd157 551
be8b3943
MK		 552 if (ret)
553 goto err_pull;
5e3dd157 554
be8b3943
MK		 555 return 0;
556
557err_pull:
558 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
559 return ret;
560}
561
ed54388a
MK		 562static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
563{
564 struct wmi_bcn_tx_arg arg = {0};
565 int ret;
566
567 lockdep_assert_held(&arvif->ar->data_lock);
568
569 if (arvif->beacon == NULL)
570 return;
571
572 arg.vdev_id = arvif->vdev_id;
573 arg.tx_rate = 0;
574 arg.tx_power = 0;
575 arg.bcn = arvif->beacon->data;
576 arg.bcn_len = arvif->beacon->len;
577
578 ret = ath10k_wmi_beacon_send_nowait(arvif->ar, &arg);
579 if (ret)
580 return;
581
582 dev_kfree_skb_any(arvif->beacon);
583 arvif->beacon = NULL;
584}
585
586static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
587 struct ieee80211_vif *vif)
588{
589 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
590
591 ath10k_wmi_tx_beacon_nowait(arvif);
592}
593
594static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
595{
596 spin_lock_bh(&ar->data_lock);
597 ieee80211_iterate_active_interfaces_atomic(ar->hw,
598 IEEE80211_IFACE_ITER_NORMAL,
599 ath10k_wmi_tx_beacons_iter,
600 NULL);
601 spin_unlock_bh(&ar->data_lock);
602}
603
12acbc43 604static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 605{
ed54388a
MK		 606 /* try to send pending beacons first. they take priority */
607 ath10k_wmi_tx_beacons_nowait(ar);
608
be8b3943
MK		 609 wake_up(&ar->wmi.tx_credits_wq);
610}
611
612static int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb,
ce42870e 613 u32 cmd_id)
be8b3943 614{
34957b25 615 int ret = -EOPNOTSUPP;
be8b3943 616
56b84287
KV		 617 might_sleep();
618
34957b25 619 if (cmd_id == WMI_CMD_UNSUPPORTED) {
55321559
BM		 620 ath10k_warn("wmi command %d is not supported by firmware\n",
621 cmd_id);
622 return ret;
623 }
be8b3943
MK		 624
625 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK		 626 /* try to send pending beacons first. they take priority */
627 ath10k_wmi_tx_beacons_nowait(ar);
628
be8b3943
MK		 629 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
630 (ret != -EAGAIN);
631 }), 3*HZ);
632
633 if (ret)
5e3dd157 634 dev_kfree_skb_any(skb);
5e3dd157 635
be8b3943 636 return ret;
5e3dd157
KV		 637}
638
5e00d31a
BM		 639int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
640{
641 int ret = 0;
642 struct wmi_mgmt_tx_cmd *cmd;
643 struct ieee80211_hdr *hdr;
644 struct sk_buff *wmi_skb;
645 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
646 int len;
647 u16 fc;
648
649 hdr = (struct ieee80211_hdr *)skb->data;
650 fc = le16_to_cpu(hdr->frame_control);
651
652 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
653 return -EINVAL;
654
655 len = sizeof(cmd->hdr) + skb->len;
656 len = round_up(len, 4);
657
658 wmi_skb = ath10k_wmi_alloc_skb(len);
659 if (!wmi_skb)
660 return -ENOMEM;
661
662 cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
663
664 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
665 cmd->hdr.tx_rate = 0;
666 cmd->hdr.tx_power = 0;
667 cmd->hdr.buf_len = __cpu_to_le32((u32)(skb->len));
668
669 memcpy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr), ETH_ALEN);
670 memcpy(cmd->buf, skb->data, skb->len);
671
672 ath10k_dbg(ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
673 wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
674 fc & IEEE80211_FCTL_STYPE);
675
676 /* Send the management frame buffer to the target */
677 ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
5fb5e41f 678 if (ret)
5e00d31a 679 return ret;
5e00d31a
BM		 680
681 /* TODO: report tx status to mac80211 - temporary just ACK */
682 info->flags |= IEEE80211_TX_STAT_ACK;
683 ieee80211_tx_status_irqsafe(ar->hw, skb);
684
685 return ret;
686}
687
5e3dd157
KV		 688static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
689{
690 struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
691 enum wmi_scan_event_type event_type;
692 enum wmi_scan_completion_reason reason;
693 u32 freq;
694 u32 req_id;
695 u32 scan_id;
696 u32 vdev_id;
697
698 event_type = __le32_to_cpu(event->event_type);
699 reason = __le32_to_cpu(event->reason);
700 freq = __le32_to_cpu(event->channel_freq);
701 req_id = __le32_to_cpu(event->scan_req_id);
702 scan_id = __le32_to_cpu(event->scan_id);
703 vdev_id = __le32_to_cpu(event->vdev_id);
704
705 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENTID\n");
706 ath10k_dbg(ATH10K_DBG_WMI,
707 "scan event type %d reason %d freq %d req_id %d "
708 "scan_id %d vdev_id %d\n",
709 event_type, reason, freq, req_id, scan_id, vdev_id);
710
711 spin_lock_bh(&ar->data_lock);
712
713 switch (event_type) {
714 case WMI_SCAN_EVENT_STARTED:
715 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_STARTED\n");
716 if (ar->scan.in_progress && ar->scan.is_roc)
717 ieee80211_ready_on_channel(ar->hw);
718
719 complete(&ar->scan.started);
720 break;
721 case WMI_SCAN_EVENT_COMPLETED:
722 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_COMPLETED\n");
723 switch (reason) {
724 case WMI_SCAN_REASON_COMPLETED:
725 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_COMPLETED\n");
726 break;
727 case WMI_SCAN_REASON_CANCELLED:
728 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_CANCELED\n");
729 break;
730 case WMI_SCAN_REASON_PREEMPTED:
731 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_PREEMPTED\n");
732 break;
733 case WMI_SCAN_REASON_TIMEDOUT:
734 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_TIMEDOUT\n");
735 break;
736 default:
737 break;
738 }
739
740 ar->scan_channel = NULL;
741 if (!ar->scan.in_progress) {
742 ath10k_warn("no scan requested, ignoring\n");
743 break;
744 }
745
746 if (ar->scan.is_roc) {
747 ath10k_offchan_tx_purge(ar);
748
749 if (!ar->scan.aborting)
750 ieee80211_remain_on_channel_expired(ar->hw);
751 } else {
752 ieee80211_scan_completed(ar->hw, ar->scan.aborting);
753 }
754
755 del_timer(&ar->scan.timeout);
756 complete_all(&ar->scan.completed);
757 ar->scan.in_progress = false;
758 break;
759 case WMI_SCAN_EVENT_BSS_CHANNEL:
760 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_BSS_CHANNEL\n");
761 ar->scan_channel = NULL;
762 break;
763 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
764 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_FOREIGN_CHANNEL\n");
765 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
766 if (ar->scan.in_progress && ar->scan.is_roc &&
767 ar->scan.roc_freq == freq) {
768 complete(&ar->scan.on_channel);
769 }
770 break;
771 case WMI_SCAN_EVENT_DEQUEUED:
772 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_DEQUEUED\n");
773 break;
774 case WMI_SCAN_EVENT_PREEMPTED:
775 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_PREEMPTED\n");
776 break;
777 case WMI_SCAN_EVENT_START_FAILED:
778 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_START_FAILED\n");
779 break;
780 default:
781 break;
782 }
783
784 spin_unlock_bh(&ar->data_lock);
785 return 0;
786}
787
788static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
789{
790 enum ieee80211_band band;
791
792 switch (phy_mode) {
793 case MODE_11A:
794 case MODE_11NA_HT20:
795 case MODE_11NA_HT40:
796 case MODE_11AC_VHT20:
797 case MODE_11AC_VHT40:
798 case MODE_11AC_VHT80:
799 band = IEEE80211_BAND_5GHZ;
800 break;
801 case MODE_11G:
802 case MODE_11B:
803 case MODE_11GONLY:
804 case MODE_11NG_HT20:
805 case MODE_11NG_HT40:
806 case MODE_11AC_VHT20_2G:
807 case MODE_11AC_VHT40_2G:
808 case MODE_11AC_VHT80_2G:
809 default:
810 band = IEEE80211_BAND_2GHZ;
811 }
812
813 return band;
814}
815
816static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
817{
818 u8 rate_idx = 0;
819
820 /* rate in Kbps */
821 switch (rate) {
822 case 1000:
823 rate_idx = 0;
824 break;
825 case 2000:
826 rate_idx = 1;
827 break;
828 case 5500:
829 rate_idx = 2;
830 break;
831 case 11000:
832 rate_idx = 3;
833 break;
834 case 6000:
835 rate_idx = 4;
836 break;
837 case 9000:
838 rate_idx = 5;
839 break;
840 case 12000:
841 rate_idx = 6;
842 break;
843 case 18000:
844 rate_idx = 7;
845 break;
846 case 24000:
847 rate_idx = 8;
848 break;
849 case 36000:
850 rate_idx = 9;
851 break;
852 case 48000:
853 rate_idx = 10;
854 break;
855 case 54000:
856 rate_idx = 11;
857 break;
858 default:
859 break;
860 }
861
862 if (band == IEEE80211_BAND_5GHZ) {
863 if (rate_idx > 3)
864 /* Omit CCK rates */
865 rate_idx -= 4;
866 else
867 rate_idx = 0;
868 }
869
870 return rate_idx;
871}
872
873static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
874{
0d9b0438
MK		 875 struct wmi_mgmt_rx_event_v1 *ev_v1;
876 struct wmi_mgmt_rx_event_v2 *ev_v2;
877 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
5e3dd157 878 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
453cdb61 879 struct ieee80211_channel *ch;
5e3dd157
KV		 880 struct ieee80211_hdr *hdr;
881 u32 rx_status;
882 u32 channel;
883 u32 phy_mode;
884 u32 snr;
885 u32 rate;
886 u32 buf_len;
887 u16 fc;
0d9b0438
MK		 888 int pull_len;
889
890 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
891 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
892 ev_hdr = &ev_v2->hdr.v1;
893 pull_len = sizeof(*ev_v2);
894 } else {
895 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
896 ev_hdr = &ev_v1->hdr;
897 pull_len = sizeof(*ev_v1);
898 }
5e3dd157 899
0d9b0438
MK		 900 channel = __le32_to_cpu(ev_hdr->channel);
901 buf_len = __le32_to_cpu(ev_hdr->buf_len);
902 rx_status = __le32_to_cpu(ev_hdr->status);
903 snr = __le32_to_cpu(ev_hdr->snr);
904 phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
905 rate = __le32_to_cpu(ev_hdr->rate);
5e3dd157
KV		 906
907 memset(status, 0, sizeof(*status));
908
909 ath10k_dbg(ATH10K_DBG_MGMT,
910 "event mgmt rx status %08x\n", rx_status);
911
e8a50f8b
MP		 912 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
913 dev_kfree_skb(skb);
914 return 0;
915 }
916
5e3dd157
KV		 917 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
918 dev_kfree_skb(skb);
919 return 0;
920 }
921
922 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
923 dev_kfree_skb(skb);
924 return 0;
925 }
926
927 if (rx_status & WMI_RX_STATUS_ERR_CRC)
928 status->flag |= RX_FLAG_FAILED_FCS_CRC;
929 if (rx_status & WMI_RX_STATUS_ERR_MIC)
930 status->flag |= RX_FLAG_MMIC_ERROR;
931
453cdb61
MK		 932 /* HW can Rx CCK rates on 5GHz. In that case phy_mode is set to
933 * MODE_11B. This means phy_mode is not a reliable source for the band
934 * of mgmt rx. */
935
936 ch = ar->scan_channel;
937 if (!ch)
938 ch = ar->rx_channel;
939
940 if (ch) {
941 status->band = ch->band;
942
943 if (phy_mode == MODE_11B &&
944 status->band == IEEE80211_BAND_5GHZ)
945 ath10k_dbg(ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
946 } else {
947 ath10k_warn("using (unreliable) phy_mode to extract band for mgmt rx\n");
948 status->band = phy_mode_to_band(phy_mode);
949 }
950
5e3dd157
KV		 951 status->freq = ieee80211_channel_to_frequency(channel, status->band);
952 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
953 status->rate_idx = get_rate_idx(rate, status->band);
954
0d9b0438 955 skb_pull(skb, pull_len);
5e3dd157
KV		 956
957 hdr = (struct ieee80211_hdr *)skb->data;
958 fc = le16_to_cpu(hdr->frame_control);
959
2b6a6a90
MK		 960 /* FW delivers WEP Shared Auth frame with Protected Bit set and
961 * encrypted payload. However in case of PMF it delivers decrypted
962 * frames with Protected Bit set. */
963 if (ieee80211_has_protected(hdr->frame_control) &&
964 !ieee80211_is_auth(hdr->frame_control)) {
5e3dd157
KV		 965 status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_IV_STRIPPED |
966 RX_FLAG_MMIC_STRIPPED;
967 hdr->frame_control = __cpu_to_le16(fc &
968 ~IEEE80211_FCTL_PROTECTED);
969 }
970
971 ath10k_dbg(ATH10K_DBG_MGMT,
972 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
973 skb, skb->len,
974 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
975
976 ath10k_dbg(ATH10K_DBG_MGMT,
977 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
978 status->freq, status->band, status->signal,
979 status->rate_idx);
980
981 /*
982 * packets from HTC come aligned to 4byte boundaries
983 * because they can originally come in along with a trailer
984 */
985 skb_trim(skb, buf_len);
986
987 ieee80211_rx(ar->hw, skb);
988 return 0;
989}
990
2e1dea40
MK		 991static int freq_to_idx(struct ath10k *ar, int freq)
992{
993 struct ieee80211_supported_band *sband;
994 int band, ch, idx = 0;
995
996 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
997 sband = ar->hw->wiphy->bands[band];
998 if (!sband)
999 continue;
1000
1001 for (ch = 0; ch < sband->n_channels; ch++, idx++)
1002 if (sband->channels[ch].center_freq == freq)
1003 goto exit;
1004 }
1005
1006exit:
1007 return idx;
1008}
1009
5e3dd157
KV		 1010static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1011{
2e1dea40
MK		 1012 struct wmi_chan_info_event *ev;
1013 struct survey_info *survey;
1014 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1015 int idx;
1016
1017 ev = (struct wmi_chan_info_event *)skb->data;
1018
1019 err_code = __le32_to_cpu(ev->err_code);
1020 freq = __le32_to_cpu(ev->freq);
1021 cmd_flags = __le32_to_cpu(ev->cmd_flags);
1022 noise_floor = __le32_to_cpu(ev->noise_floor);
1023 rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
1024 cycle_count = __le32_to_cpu(ev->cycle_count);
1025
1026 ath10k_dbg(ATH10K_DBG_WMI,
1027 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1028 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1029 cycle_count);
1030
1031 spin_lock_bh(&ar->data_lock);
1032
1033 if (!ar->scan.in_progress) {
1034 ath10k_warn("chan info event without a scan request?\n");
1035 goto exit;
1036 }
1037
1038 idx = freq_to_idx(ar, freq);
1039 if (idx >= ARRAY_SIZE(ar->survey)) {
1040 ath10k_warn("chan info: invalid frequency %d (idx %d out of bounds)\n",
1041 freq, idx);
1042 goto exit;
1043 }
1044
1045 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1046 /* During scanning chan info is reported twice for each
1047 * visited channel. The reported cycle count is global
1048 * and per-channel cycle count must be calculated */
1049
1050 cycle_count -= ar->survey_last_cycle_count;
1051 rx_clear_count -= ar->survey_last_rx_clear_count;
1052
1053 survey = &ar->survey[idx];
1054 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
1055 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1056 survey->noise = noise_floor;
1057 survey->filled = SURVEY_INFO_CHANNEL_TIME |
1058 SURVEY_INFO_CHANNEL_TIME_RX |
1059 SURVEY_INFO_NOISE_DBM;
1060 }
1061
1062 ar->survey_last_rx_clear_count = rx_clear_count;
1063 ar->survey_last_cycle_count = cycle_count;
1064
1065exit:
1066 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1067}
1068
1069static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1070{
1071 ath10k_dbg(ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
1072}
1073
869526b9 1074static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 1075{
869526b9
KV		 1076 ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
1077 skb->len);
1078
1079 trace_ath10k_wmi_dbglog(skb->data, skb->len);
1080
1081 return 0;
5e3dd157
KV		 1082}
1083
1084static void ath10k_wmi_event_update_stats(struct ath10k *ar,
1085 struct sk_buff *skb)
1086{
1087 struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
1088
1089 ath10k_dbg(ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
1090
1091 ath10k_debug_read_target_stats(ar, ev);
1092}
1093
1094static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
1095 struct sk_buff *skb)
1096{
1097 struct wmi_vdev_start_response_event *ev;
1098
1099 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
1100
1101 ev = (struct wmi_vdev_start_response_event *)skb->data;
1102
1103 if (WARN_ON(__le32_to_cpu(ev->status)))
1104 return;
1105
1106 complete(&ar->vdev_setup_done);
1107}
1108
1109static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
1110 struct sk_buff *skb)
1111{
1112 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
1113 complete(&ar->vdev_setup_done);
1114}
1115
1116static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
1117 struct sk_buff *skb)
1118{
5a13e76e
KV		 1119 struct wmi_peer_sta_kickout_event *ev;
1120 struct ieee80211_sta *sta;
1121
1122 ev = (struct wmi_peer_sta_kickout_event *)skb->data;
1123
1124 ath10k_dbg(ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
1125 ev->peer_macaddr.addr);
1126
1127 rcu_read_lock();
1128
1129 sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL);
1130 if (!sta) {
1131 ath10k_warn("Spurious quick kickout for STA %pM\n",
1132 ev->peer_macaddr.addr);
1133 goto exit;
1134 }
1135
1136 ieee80211_report_low_ack(sta, 10);
1137
1138exit:
1139 rcu_read_unlock();
5e3dd157
KV		 1140}
1141
1142/*
1143 * FIXME
1144 *
1145 * We don't report to mac80211 sleep state of connected
1146 * stations. Due to this mac80211 can't fill in TIM IE
1147 * correctly.
1148 *
1149 * I know of no way of getting nullfunc frames that contain
1150 * sleep transition from connected stations - these do not
1151 * seem to be sent from the target to the host. There also
1152 * doesn't seem to be a dedicated event for that. So the
1153 * only way left to do this would be to read tim_bitmap
1154 * during SWBA.
1155 *
1156 * We could probably try using tim_bitmap from SWBA to tell
1157 * mac80211 which stations are asleep and which are not. The
1158 * problem here is calling mac80211 functions so many times
1159 * could take too long and make us miss the time to submit
1160 * the beacon to the target.
1161 *
1162 * So as a workaround we try to extend the TIM IE if there
1163 * is unicast buffered for stations with aid > 7 and fill it
1164 * in ourselves.
1165 */
1166static void ath10k_wmi_update_tim(struct ath10k *ar,
1167 struct ath10k_vif *arvif,
1168 struct sk_buff *bcn,
1169 struct wmi_bcn_info *bcn_info)
1170{
1171 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
1172 struct ieee80211_tim_ie *tim;
1173 u8 *ies, *ie;
1174 u8 ie_len, pvm_len;
1175
1176 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
1177 * we must copy the bitmap upon change and reuse it later */
1178 if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
1179 int i;
1180
1181 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
1182 sizeof(bcn_info->tim_info.tim_bitmap));
1183
1184 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
1185 __le32 t = bcn_info->tim_info.tim_bitmap[i / 4];
1186 u32 v = __le32_to_cpu(t);
1187 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
1188 }
1189
1190 /* FW reports either length 0 or 16
1191 * so we calculate this on our own */
1192 arvif->u.ap.tim_len = 0;
1193 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
1194 if (arvif->u.ap.tim_bitmap[i])
1195 arvif->u.ap.tim_len = i;
1196
1197 arvif->u.ap.tim_len++;
1198 }
1199
1200 ies = bcn->data;
1201 ies += ieee80211_hdrlen(hdr->frame_control);
1202 ies += 12; /* fixed parameters */
1203
1204 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
1205 (u8 *)skb_tail_pointer(bcn) - ies);
1206 if (!ie) {
09af8f85
MK		 1207 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
1208 ath10k_warn("no tim ie found;\n");
5e3dd157
KV		 1209 return;
1210 }
1211
1212 tim = (void *)ie + 2;
1213 ie_len = ie[1];
1214 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
1215
1216 if (pvm_len < arvif->u.ap.tim_len) {
1217 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
1218 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
1219 void *next_ie = ie + 2 + ie_len;
1220
1221 if (skb_put(bcn, expand_size)) {
1222 memmove(next_ie + expand_size, next_ie, move_size);
1223
1224 ie[1] += expand_size;
1225 ie_len += expand_size;
1226 pvm_len += expand_size;
1227 } else {
1228 ath10k_warn("tim expansion failed\n");
1229 }
1230 }
1231
1232 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
1233 ath10k_warn("tim pvm length is too great (%d)\n", pvm_len);
1234 return;
1235 }
1236
1237 tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
1238 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
1239
1240 ath10k_dbg(ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
1241 tim->dtim_count, tim->dtim_period,
1242 tim->bitmap_ctrl, pvm_len);
1243}
1244
1245static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
1246 struct wmi_p2p_noa_info *noa)
1247{
1248 struct ieee80211_p2p_noa_attr *noa_attr;
1249 u8 ctwindow_oppps = noa->ctwindow_oppps;
1250 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
1251 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
1252 __le16 *noa_attr_len;
1253 u16 attr_len;
1254 u8 noa_descriptors = noa->num_descriptors;
1255 int i;
1256
1257 /* P2P IE */
1258 data[0] = WLAN_EID_VENDOR_SPECIFIC;
1259 data[1] = len - 2;
1260 data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
1261 data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
1262 data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
1263 data[5] = WLAN_OUI_TYPE_WFA_P2P;
1264
1265 /* NOA ATTR */
1266 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
1267 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
1268 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
1269
1270 noa_attr->index = noa->index;
1271 noa_attr->oppps_ctwindow = ctwindow;
1272 if (oppps)
1273 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
1274
1275 for (i = 0; i < noa_descriptors; i++) {
1276 noa_attr->desc[i].count =
1277 __le32_to_cpu(noa->descriptors[i].type_count);
1278 noa_attr->desc[i].duration = noa->descriptors[i].duration;
1279 noa_attr->desc[i].interval = noa->descriptors[i].interval;
1280 noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
1281 }
1282
1283 attr_len = 2; /* index + oppps_ctwindow */
1284 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1285 *noa_attr_len = __cpu_to_le16(attr_len);
1286}
1287
1288static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
1289{
1290 u32 len = 0;
1291 u8 noa_descriptors = noa->num_descriptors;
1292 u8 opp_ps_info = noa->ctwindow_oppps;
1293 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
1294
1295
1296 if (!noa_descriptors && !opps_enabled)
1297 return len;
1298
1299 len += 1 + 1 + 4; /* EID + len + OUI */
1300 len += 1 + 2; /* noa attr + attr len */
1301 len += 1 + 1; /* index + oppps_ctwindow */
1302 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1303
1304 return len;
1305}
1306
1307static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
1308 struct sk_buff *bcn,
1309 struct wmi_bcn_info *bcn_info)
1310{
1311 struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
1312 u8 *new_data, *old_data = arvif->u.ap.noa_data;
1313 u32 new_len;
1314
1315 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
1316 return;
1317
1318 ath10k_dbg(ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
1319 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
1320 new_len = ath10k_p2p_calc_noa_ie_len(noa);
1321 if (!new_len)
1322 goto cleanup;
1323
1324 new_data = kmalloc(new_len, GFP_ATOMIC);
1325 if (!new_data)
1326 goto cleanup;
1327
1328 ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
1329
1330 spin_lock_bh(&ar->data_lock);
1331 arvif->u.ap.noa_data = new_data;
1332 arvif->u.ap.noa_len = new_len;
1333 spin_unlock_bh(&ar->data_lock);
1334 kfree(old_data);
1335 }
1336
1337 if (arvif->u.ap.noa_data)
1338 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
1339 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
1340 arvif->u.ap.noa_data,
1341 arvif->u.ap.noa_len);
1342 return;
1343
1344cleanup:
1345 spin_lock_bh(&ar->data_lock);
1346 arvif->u.ap.noa_data = NULL;
1347 arvif->u.ap.noa_len = 0;
1348 spin_unlock_bh(&ar->data_lock);
1349 kfree(old_data);
1350}
1351
1352
1353static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
1354{
1355 struct wmi_host_swba_event *ev;
1356 u32 map;
1357 int i = -1;
1358 struct wmi_bcn_info *bcn_info;
1359 struct ath10k_vif *arvif;
5e3dd157
KV		 1360 struct sk_buff *bcn;
1361 int vdev_id = 0;
5e3dd157
KV		 1362
1363 ath10k_dbg(ATH10K_DBG_MGMT, "WMI_HOST_SWBA_EVENTID\n");
1364
1365 ev = (struct wmi_host_swba_event *)skb->data;
1366 map = __le32_to_cpu(ev->vdev_map);
1367
1368 ath10k_dbg(ATH10K_DBG_MGMT, "host swba:\n"
1369 "-vdev map 0x%x\n",
1370 ev->vdev_map);
1371
1372 for (; map; map >>= 1, vdev_id++) {
1373 if (!(map & 0x1))
1374 continue;
1375
1376 i++;
1377
1378 if (i >= WMI_MAX_AP_VDEV) {
1379 ath10k_warn("swba has corrupted vdev map\n");
1380 break;
1381 }
1382
1383 bcn_info = &ev->bcn_info[i];
1384
1385 ath10k_dbg(ATH10K_DBG_MGMT,
1386 "-bcn_info[%d]:\n"
1387 "--tim_len %d\n"
1388 "--tim_mcast %d\n"
1389 "--tim_changed %d\n"
1390 "--tim_num_ps_pending %d\n"
1391 "--tim_bitmap 0x%08x%08x%08x%08x\n",
1392 i,
1393 __le32_to_cpu(bcn_info->tim_info.tim_len),
1394 __le32_to_cpu(bcn_info->tim_info.tim_mcast),
1395 __le32_to_cpu(bcn_info->tim_info.tim_changed),
1396 __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
1397 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
1398 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
1399 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
1400 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
1401
1402 arvif = ath10k_get_arvif(ar, vdev_id);
1403 if (arvif == NULL) {
1404 ath10k_warn("no vif for vdev_id %d found\n", vdev_id);
1405 continue;
1406 }
1407
1408 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
1409 if (!bcn) {
1410 ath10k_warn("could not get mac80211 beacon\n");
1411 continue;
1412 }
1413
1414 ath10k_tx_h_seq_no(bcn);
1415 ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
1416 ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
1417
ed54388a
MK		 1418 spin_lock_bh(&ar->data_lock);
1419 if (arvif->beacon) {
1420 ath10k_warn("SWBA overrun on vdev %d\n",
1421 arvif->vdev_id);
1422 dev_kfree_skb_any(arvif->beacon);
1423 }
5e3dd157 1424
ed54388a 1425 arvif->beacon = bcn;
5e3dd157 1426
ed54388a
MK		 1427 ath10k_wmi_tx_beacon_nowait(arvif);
1428 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1429 }
1430}
1431
1432static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
1433 struct sk_buff *skb)
1434{
1435 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
1436}
1437
9702c686
JD		 1438static void ath10k_dfs_radar_report(struct ath10k *ar,
1439 struct wmi_single_phyerr_rx_event *event,
1440 struct phyerr_radar_report *rr,
1441 u64 tsf)
1442{
1443 u32 reg0, reg1, tsf32l;
1444 struct pulse_event pe;
1445 u64 tsf64;
1446 u8 rssi, width;
1447
1448 reg0 = __le32_to_cpu(rr->reg0);
1449 reg1 = __le32_to_cpu(rr->reg1);
1450
1451 ath10k_dbg(ATH10K_DBG_REGULATORY,
1452 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
1453 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
1454 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
1455 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
1456 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
1457 ath10k_dbg(ATH10K_DBG_REGULATORY,
1458 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
1459 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
1460 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
1461 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
1462 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
1463 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
1464 ath10k_dbg(ATH10K_DBG_REGULATORY,
1465 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
1466 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
1467 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
1468
1469 if (!ar->dfs_detector)
1470 return;
1471
1472 /* report event to DFS pattern detector */
1473 tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
1474 tsf64 = tsf & (~0xFFFFFFFFULL);
1475 tsf64 |= tsf32l;
1476
1477 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
1478 rssi = event->hdr.rssi_combined;
1479
1480 /* hardware store this as 8 bit signed value,
1481 * set to zero if negative number
1482 */
1483 if (rssi & 0x80)
1484 rssi = 0;
1485
1486 pe.ts = tsf64;
1487 pe.freq = ar->hw->conf.chandef.chan->center_freq;
1488 pe.width = width;
1489 pe.rssi = rssi;
1490
1491 ath10k_dbg(ATH10K_DBG_REGULATORY,
1492 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
1493 pe.freq, pe.width, pe.rssi, pe.ts);
1494
1495 ATH10K_DFS_STAT_INC(ar, pulses_detected);
1496
1497 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
1498 ath10k_dbg(ATH10K_DBG_REGULATORY,
1499 "dfs no pulse pattern detected, yet\n");
1500 return;
1501 }
1502
1503 ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs radar detected\n");
1504 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP		 1505
1506 /* Control radar events reporting in debugfs file
1507 dfs_block_radar_events */
1508 if (ar->dfs_block_radar_events) {
1509 ath10k_info("DFS Radar detected, but ignored as requested\n");
1510 return;
1511 }
1512
9702c686
JD		 1513 ieee80211_radar_detected(ar->hw);
1514}
1515
1516static int ath10k_dfs_fft_report(struct ath10k *ar,
1517 struct wmi_single_phyerr_rx_event *event,
1518 struct phyerr_fft_report *fftr,
1519 u64 tsf)
1520{
1521 u32 reg0, reg1;
1522 u8 rssi, peak_mag;
1523
1524 reg0 = __le32_to_cpu(fftr->reg0);
1525 reg1 = __le32_to_cpu(fftr->reg1);
1526 rssi = event->hdr.rssi_combined;
1527
1528 ath10k_dbg(ATH10K_DBG_REGULATORY,
1529 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
1530 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
1531 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
1532 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
1533 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
1534 ath10k_dbg(ATH10K_DBG_REGULATORY,
1535 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
1536 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
1537 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
1538 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
1539 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
1540
1541 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
1542
1543 /* false event detection */
1544 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
1545 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
1546 ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
1547 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
1548 return -EINVAL;
1549 }
1550
1551 return 0;
1552}
1553
1554static void ath10k_wmi_event_dfs(struct ath10k *ar,
1555 struct wmi_single_phyerr_rx_event *event,
1556 u64 tsf)
1557{
1558 int buf_len, tlv_len, res, i = 0;
1559 struct phyerr_tlv *tlv;
1560 struct phyerr_radar_report *rr;
1561 struct phyerr_fft_report *fftr;
1562 u8 *tlv_buf;
1563
1564 buf_len = __le32_to_cpu(event->hdr.buf_len);
1565 ath10k_dbg(ATH10K_DBG_REGULATORY,
1566 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
1567 event->hdr.phy_err_code, event->hdr.rssi_combined,
1568 __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
1569
1570 /* Skip event if DFS disabled */
1571 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
1572 return;
1573
1574 ATH10K_DFS_STAT_INC(ar, pulses_total);
1575
1576 while (i < buf_len) {
1577 if (i + sizeof(*tlv) > buf_len) {
1578 ath10k_warn("too short buf for tlv header (%d)\n", i);
1579 return;
1580 }
1581
1582 tlv = (struct phyerr_tlv *)&event->bufp[i];
1583 tlv_len = __le16_to_cpu(tlv->len);
1584 tlv_buf = &event->bufp[i + sizeof(*tlv)];
1585 ath10k_dbg(ATH10K_DBG_REGULATORY,
1586 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
1587 tlv_len, tlv->tag, tlv->sig);
1588
1589 switch (tlv->tag) {
1590 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
1591 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
1592 ath10k_warn("too short radar pulse summary (%d)\n",
1593 i);
1594 return;
1595 }
1596
1597 rr = (struct phyerr_radar_report *)tlv_buf;
1598 ath10k_dfs_radar_report(ar, event, rr, tsf);
1599 break;
1600 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1601 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
1602 ath10k_warn("too short fft report (%d)\n", i);
1603 return;
1604 }
1605
1606 fftr = (struct phyerr_fft_report *)tlv_buf;
1607 res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
1608 if (res)
1609 return;
1610 break;
1611 }
1612
1613 i += sizeof(*tlv) + tlv_len;
1614 }
1615}
1616
1617static void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
1618 struct wmi_single_phyerr_rx_event *event,
1619 u64 tsf)
1620{
1621 ath10k_dbg(ATH10K_DBG_WMI, "wmi event spectral scan\n");
1622}
1623
5e3dd157
KV		 1624static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
1625{
9702c686
JD		 1626 struct wmi_comb_phyerr_rx_event *comb_event;
1627 struct wmi_single_phyerr_rx_event *event;
1628 u32 count, i, buf_len, phy_err_code;
1629 u64 tsf;
1630 int left_len = skb->len;
1631
1632 ATH10K_DFS_STAT_INC(ar, phy_errors);
1633
1634 /* Check if combined event available */
1635 if (left_len < sizeof(*comb_event)) {
1636 ath10k_warn("wmi phyerr combined event wrong len\n");
1637 return;
1638 }
1639
1640 left_len -= sizeof(*comb_event);
1641
1642 /* Check number of included events */
1643 comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
1644 count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
1645
1646 tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
1647 tsf <<= 32;
1648 tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
1649
1650 ath10k_dbg(ATH10K_DBG_WMI,
1651 "wmi event phyerr count %d tsf64 0x%llX\n",
1652 count, tsf);
1653
1654 event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
1655 for (i = 0; i < count; i++) {
1656 /* Check if we can read event header */
1657 if (left_len < sizeof(*event)) {
1658 ath10k_warn("single event (%d) wrong head len\n", i);
1659 return;
1660 }
1661
1662 left_len -= sizeof(*event);
1663
1664 buf_len = __le32_to_cpu(event->hdr.buf_len);
1665 phy_err_code = event->hdr.phy_err_code;
1666
1667 if (left_len < buf_len) {
1668 ath10k_warn("single event (%d) wrong buf len\n", i);
1669 return;
1670 }
1671
1672 left_len -= buf_len;
1673
1674 switch (phy_err_code) {
1675 case PHY_ERROR_RADAR:
1676 ath10k_wmi_event_dfs(ar, event, tsf);
1677 break;
1678 case PHY_ERROR_SPECTRAL_SCAN:
1679 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1680 break;
1681 case PHY_ERROR_FALSE_RADAR_EXT:
1682 ath10k_wmi_event_dfs(ar, event, tsf);
1683 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1684 break;
1685 default:
1686 break;
1687 }
1688
1689 event += sizeof(*event) + buf_len;
1690 }
5e3dd157
KV		 1691}
1692
1693static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
1694{
1695 ath10k_dbg(ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
1696}
1697
1698static void ath10k_wmi_event_profile_match(struct ath10k *ar,
1699 struct sk_buff *skb)
1700{
1701 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
1702}
1703
1704static void ath10k_wmi_event_debug_print(struct ath10k *ar,
2fe5288c 1705 struct sk_buff *skb)
5e3dd157 1706{
2fe5288c
KV		 1707 char buf[101], c;
1708 int i;
1709
1710 for (i = 0; i < sizeof(buf) - 1; i++) {
1711 if (i >= skb->len)
1712 break;
1713
1714 c = skb->data[i];
1715
1716 if (c == '\0')
1717 break;
1718
1719 if (isascii(c) && isprint(c))
1720 buf[i] = c;
1721 else
1722 buf[i] = '.';
1723 }
1724
1725 if (i == sizeof(buf) - 1)
1726 ath10k_warn("wmi debug print truncated: %d\n", skb->len);
1727
1728 /* for some reason the debug prints end with \n, remove that */
1729 if (skb->data[i - 1] == '\n')
1730 i--;
1731
1732 /* the last byte is always reserved for the null character */
1733 buf[i] = '\0';
1734
1735 ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf);
5e3dd157
KV		 1736}
1737
1738static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
1739{
1740 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
1741}
1742
1743static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
1744 struct sk_buff *skb)
1745{
1746 ath10k_dbg(ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
1747}
1748
1749static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
1750 struct sk_buff *skb)
1751{
1752 ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
1753}
1754
1755static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
1756 struct sk_buff *skb)
1757{
1758 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
1759}
1760
1761static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
1762 struct sk_buff *skb)
1763{
1764 ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
1765}
1766
1767static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
1768 struct sk_buff *skb)
1769{
1770 ath10k_dbg(ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
1771}
1772
1773static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
1774 struct sk_buff *skb)
1775{
1776 ath10k_dbg(ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
1777}
1778
1779static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
1780 struct sk_buff *skb)
1781{
1782 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
1783}
1784
1785static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
1786 struct sk_buff *skb)
1787{
1788 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
1789}
1790
1791static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
1792 struct sk_buff *skb)
1793{
1794 ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
1795}
1796
1797static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
1798 struct sk_buff *skb)
1799{
1800 ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
1801}
1802
1803static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
1804 struct sk_buff *skb)
1805{
1806 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
1807}
1808
1809static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
1810 struct sk_buff *skb)
1811{
1812 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
1813}
1814
1815static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
1816 struct sk_buff *skb)
1817{
1818 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
1819}
1820
8a6618b0
BM		 1821static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
1822 struct sk_buff *skb)
1823{
1824 ath10k_dbg(ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
1825}
1826
1827static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
1828 struct sk_buff *skb)
1829{
1830 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
1831}
1832
1833static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
1834 struct sk_buff *skb)
1835{
1836 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
1837}
1838
b3effe61
BM		 1839static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
1840 u32 num_units, u32 unit_len)
1841{
1842 dma_addr_t paddr;
1843 u32 pool_size;
1844 int idx = ar->wmi.num_mem_chunks;
1845
1846 pool_size = num_units * round_up(unit_len, 4);
1847
1848 if (!pool_size)
1849 return -EINVAL;
1850
1851 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
1852 pool_size,
1853 &paddr,
1854 GFP_ATOMIC);
1855 if (!ar->wmi.mem_chunks[idx].vaddr) {
1856 ath10k_warn("failed to allocate memory chunk\n");
1857 return -ENOMEM;
1858 }
1859
1860 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
1861
1862 ar->wmi.mem_chunks[idx].paddr = paddr;
1863 ar->wmi.mem_chunks[idx].len = pool_size;
1864 ar->wmi.mem_chunks[idx].req_id = req_id;
1865 ar->wmi.num_mem_chunks++;
1866
1867 return 0;
1868}
1869
5e3dd157
KV		 1870static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
1871 struct sk_buff *skb)
1872{
1873 struct wmi_service_ready_event *ev = (void *)skb->data;
1874
1875 if (skb->len < sizeof(*ev)) {
1876 ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
1877 skb->len, sizeof(*ev));
1878 return;
1879 }
1880
1881 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
1882 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
1883 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
1884 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
1885 ar->fw_version_major =
1886 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
1887 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
1888 ar->fw_version_release =
1889 (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
1890 ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
1891 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
8865bee4
MK		 1892 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
1893
1a222435
KV		 1894 /* only manually set fw features when not using FW IE format */
1895 if (ar->fw_api == 1 && ar->fw_version_build > 636)
0d9b0438
MK		 1896 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
1897
8865bee4
MK		 1898 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
1899 ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
1900 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
1901 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
1902 }
5e3dd157
KV		 1903
1904 ar->ath_common.regulatory.current_rd =
1905 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
1906
1907 ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
1908 sizeof(ev->wmi_service_bitmap));
1909
1910 if (strlen(ar->hw->wiphy->fw_version) == 0) {
1911 snprintf(ar->hw->wiphy->fw_version,
1912 sizeof(ar->hw->wiphy->fw_version),
1913 "%u.%u.%u.%u",
1914 ar->fw_version_major,
1915 ar->fw_version_minor,
1916 ar->fw_version_release,
1917 ar->fw_version_build);
1918 }
1919
1920 /* FIXME: it probably should be better to support this */
1921 if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
1922 ath10k_warn("target requested %d memory chunks; ignoring\n",
1923 __le32_to_cpu(ev->num_mem_reqs));
1924 }
1925
1926 ath10k_dbg(ATH10K_DBG_WMI,
8865bee4 1927 "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
5e3dd157
KV		 1928 __le32_to_cpu(ev->sw_version),
1929 __le32_to_cpu(ev->sw_version_1),
1930 __le32_to_cpu(ev->abi_version),
1931 __le32_to_cpu(ev->phy_capability),
1932 __le32_to_cpu(ev->ht_cap_info),
1933 __le32_to_cpu(ev->vht_cap_info),
1934 __le32_to_cpu(ev->vht_supp_mcs),
1935 __le32_to_cpu(ev->sys_cap_info),
8865bee4
MK		 1936 __le32_to_cpu(ev->num_mem_reqs),
1937 __le32_to_cpu(ev->num_rf_chains));
5e3dd157
KV		 1938
1939 complete(&ar->wmi.service_ready);
1940}
1941
6f97d256
BM		 1942static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar,
1943 struct sk_buff *skb)
1944{
b3effe61
BM		 1945 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
1946 int ret;
6f97d256
BM		 1947 struct wmi_service_ready_event_10x *ev = (void *)skb->data;
1948
1949 if (skb->len < sizeof(*ev)) {
1950 ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
1951 skb->len, sizeof(*ev));
1952 return;
1953 }
1954
1955 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
1956 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
1957 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
1958 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
1959 ar->fw_version_major =
1960 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
1961 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
1962 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
1963 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
1964
1965 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
1966 ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
1967 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
1968 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
1969 }
1970
1971 ar->ath_common.regulatory.current_rd =
1972 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
1973
1974 ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
1975 sizeof(ev->wmi_service_bitmap));
1976
1977 if (strlen(ar->hw->wiphy->fw_version) == 0) {
1978 snprintf(ar->hw->wiphy->fw_version,
1979 sizeof(ar->hw->wiphy->fw_version),
1980 "%u.%u",
1981 ar->fw_version_major,
1982 ar->fw_version_minor);
1983 }
1984
b3effe61
BM		 1985 num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs);
1986
1987 if (num_mem_reqs > ATH10K_MAX_MEM_REQS) {
1988 ath10k_warn("requested memory chunks number (%d) exceeds the limit\n",
1989 num_mem_reqs);
1990 return;
6f97d256
BM		 1991 }
1992
b3effe61
BM		 1993 if (!num_mem_reqs)
1994 goto exit;
1995
1996 ath10k_dbg(ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n",
1997 num_mem_reqs);
1998
1999 for (i = 0; i < num_mem_reqs; ++i) {
2000 req_id = __le32_to_cpu(ev->mem_reqs[i].req_id);
2001 num_units = __le32_to_cpu(ev->mem_reqs[i].num_units);
2002 unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size);
2003 num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info);
2004
2005 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
2006 /* number of units to allocate is number of
2007 * peers, 1 extra for self peer on target */
2008 /* this needs to be tied, host and target
2009 * can get out of sync */
ec6a73f0 2010 num_units = TARGET_10X_NUM_PEERS + 1;
b3effe61 2011 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
ec6a73f0 2012 num_units = TARGET_10X_NUM_VDEVS + 1;
b3effe61
BM		 2013
2014 ath10k_dbg(ATH10K_DBG_WMI,
2015 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
2016 req_id,
2017 __le32_to_cpu(ev->mem_reqs[i].num_units),
2018 num_unit_info,
2019 unit_size,
2020 num_units);
2021
2022 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
2023 unit_size);
2024 if (ret)
2025 return;
2026 }
2027
2028exit:
6f97d256
BM		 2029 ath10k_dbg(ATH10K_DBG_WMI,
2030 "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
2031 __le32_to_cpu(ev->sw_version),
2032 __le32_to_cpu(ev->abi_version),
2033 __le32_to_cpu(ev->phy_capability),
2034 __le32_to_cpu(ev->ht_cap_info),
2035 __le32_to_cpu(ev->vht_cap_info),
2036 __le32_to_cpu(ev->vht_supp_mcs),
2037 __le32_to_cpu(ev->sys_cap_info),
2038 __le32_to_cpu(ev->num_mem_reqs),
2039 __le32_to_cpu(ev->num_rf_chains));
2040
2041 complete(&ar->wmi.service_ready);
2042}
2043
5e3dd157
KV		 2044static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
2045{
2046 struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
2047
2048 if (WARN_ON(skb->len < sizeof(*ev)))
2049 return -EINVAL;
2050
2051 memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN);
2052
2053 ath10k_dbg(ATH10K_DBG_WMI,
2054 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
2055 __le32_to_cpu(ev->sw_version),
2056 __le32_to_cpu(ev->abi_version),
2057 ev->mac_addr.addr,
2058 __le32_to_cpu(ev->status));
2059
2060 complete(&ar->wmi.unified_ready);
2061 return 0;
2062}
2063
ce42870e 2064static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 2065{
2066 struct wmi_cmd_hdr *cmd_hdr;
2067 enum wmi_event_id id;
2068 u16 len;
2069
2070 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2071 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2072
2073 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2074 return;
2075
2076 len = skb->len;
2077
2078 trace_ath10k_wmi_event(id, skb->data, skb->len);
2079
2080 switch (id) {
2081 case WMI_MGMT_RX_EVENTID:
2082 ath10k_wmi_event_mgmt_rx(ar, skb);
2083 /* mgmt_rx() owns the skb now! */
2084 return;
2085 case WMI_SCAN_EVENTID:
2086 ath10k_wmi_event_scan(ar, skb);
2087 break;
2088 case WMI_CHAN_INFO_EVENTID:
2089 ath10k_wmi_event_chan_info(ar, skb);
2090 break;
2091 case WMI_ECHO_EVENTID:
2092 ath10k_wmi_event_echo(ar, skb);
2093 break;
2094 case WMI_DEBUG_MESG_EVENTID:
2095 ath10k_wmi_event_debug_mesg(ar, skb);
2096 break;
2097 case WMI_UPDATE_STATS_EVENTID:
2098 ath10k_wmi_event_update_stats(ar, skb);
2099 break;
2100 case WMI_VDEV_START_RESP_EVENTID:
2101 ath10k_wmi_event_vdev_start_resp(ar, skb);
2102 break;
2103 case WMI_VDEV_STOPPED_EVENTID:
2104 ath10k_wmi_event_vdev_stopped(ar, skb);
2105 break;
2106 case WMI_PEER_STA_KICKOUT_EVENTID:
2107 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2108 break;
2109 case WMI_HOST_SWBA_EVENTID:
2110 ath10k_wmi_event_host_swba(ar, skb);
2111 break;
2112 case WMI_TBTTOFFSET_UPDATE_EVENTID:
2113 ath10k_wmi_event_tbttoffset_update(ar, skb);
2114 break;
2115 case WMI_PHYERR_EVENTID:
2116 ath10k_wmi_event_phyerr(ar, skb);
2117 break;
2118 case WMI_ROAM_EVENTID:
2119 ath10k_wmi_event_roam(ar, skb);
2120 break;
2121 case WMI_PROFILE_MATCH:
2122 ath10k_wmi_event_profile_match(ar, skb);
2123 break;
2124 case WMI_DEBUG_PRINT_EVENTID:
2125 ath10k_wmi_event_debug_print(ar, skb);
2126 break;
2127 case WMI_PDEV_QVIT_EVENTID:
2128 ath10k_wmi_event_pdev_qvit(ar, skb);
2129 break;
2130 case WMI_WLAN_PROFILE_DATA_EVENTID:
2131 ath10k_wmi_event_wlan_profile_data(ar, skb);
2132 break;
2133 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
2134 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2135 break;
2136 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
2137 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2138 break;
2139 case WMI_RTT_ERROR_REPORT_EVENTID:
2140 ath10k_wmi_event_rtt_error_report(ar, skb);
2141 break;
2142 case WMI_WOW_WAKEUP_HOST_EVENTID:
2143 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2144 break;
2145 case WMI_DCS_INTERFERENCE_EVENTID:
2146 ath10k_wmi_event_dcs_interference(ar, skb);
2147 break;
2148 case WMI_PDEV_TPC_CONFIG_EVENTID:
2149 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2150 break;
2151 case WMI_PDEV_FTM_INTG_EVENTID:
2152 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
2153 break;
2154 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
2155 ath10k_wmi_event_gtk_offload_status(ar, skb);
2156 break;
2157 case WMI_GTK_REKEY_FAIL_EVENTID:
2158 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
2159 break;
2160 case WMI_TX_DELBA_COMPLETE_EVENTID:
2161 ath10k_wmi_event_delba_complete(ar, skb);
2162 break;
2163 case WMI_TX_ADDBA_COMPLETE_EVENTID:
2164 ath10k_wmi_event_addba_complete(ar, skb);
2165 break;
2166 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
2167 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
2168 break;
2169 case WMI_SERVICE_READY_EVENTID:
2170 ath10k_wmi_service_ready_event_rx(ar, skb);
2171 break;
2172 case WMI_READY_EVENTID:
2173 ath10k_wmi_ready_event_rx(ar, skb);
2174 break;
2175 default:
2176 ath10k_warn("Unknown eventid: %d\n", id);
2177 break;
2178 }
2179
2180 dev_kfree_skb(skb);
2181}
2182
8a6618b0
BM		 2183static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
2184{
2185 struct wmi_cmd_hdr *cmd_hdr;
2186 enum wmi_10x_event_id id;
2187 u16 len;
2188
2189 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2190 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2191
2192 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2193 return;
2194
2195 len = skb->len;
2196
2197 trace_ath10k_wmi_event(id, skb->data, skb->len);
2198
2199 switch (id) {
2200 case WMI_10X_MGMT_RX_EVENTID:
2201 ath10k_wmi_event_mgmt_rx(ar, skb);
2202 /* mgmt_rx() owns the skb now! */
2203 return;
2204 case WMI_10X_SCAN_EVENTID:
2205 ath10k_wmi_event_scan(ar, skb);
2206 break;
2207 case WMI_10X_CHAN_INFO_EVENTID:
2208 ath10k_wmi_event_chan_info(ar, skb);
2209 break;
2210 case WMI_10X_ECHO_EVENTID:
2211 ath10k_wmi_event_echo(ar, skb);
2212 break;
2213 case WMI_10X_DEBUG_MESG_EVENTID:
2214 ath10k_wmi_event_debug_mesg(ar, skb);
2215 break;
2216 case WMI_10X_UPDATE_STATS_EVENTID:
2217 ath10k_wmi_event_update_stats(ar, skb);
2218 break;
2219 case WMI_10X_VDEV_START_RESP_EVENTID:
2220 ath10k_wmi_event_vdev_start_resp(ar, skb);
2221 break;
2222 case WMI_10X_VDEV_STOPPED_EVENTID:
2223 ath10k_wmi_event_vdev_stopped(ar, skb);
2224 break;
2225 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
2226 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2227 break;
2228 case WMI_10X_HOST_SWBA_EVENTID:
2229 ath10k_wmi_event_host_swba(ar, skb);
2230 break;
2231 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
2232 ath10k_wmi_event_tbttoffset_update(ar, skb);
2233 break;
2234 case WMI_10X_PHYERR_EVENTID:
2235 ath10k_wmi_event_phyerr(ar, skb);
2236 break;
2237 case WMI_10X_ROAM_EVENTID:
2238 ath10k_wmi_event_roam(ar, skb);
2239 break;
2240 case WMI_10X_PROFILE_MATCH:
2241 ath10k_wmi_event_profile_match(ar, skb);
2242 break;
2243 case WMI_10X_DEBUG_PRINT_EVENTID:
2244 ath10k_wmi_event_debug_print(ar, skb);
2245 break;
2246 case WMI_10X_PDEV_QVIT_EVENTID:
2247 ath10k_wmi_event_pdev_qvit(ar, skb);
2248 break;
2249 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
2250 ath10k_wmi_event_wlan_profile_data(ar, skb);
2251 break;
2252 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
2253 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2254 break;
2255 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
2256 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2257 break;
2258 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
2259 ath10k_wmi_event_rtt_error_report(ar, skb);
2260 break;
2261 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
2262 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2263 break;
2264 case WMI_10X_DCS_INTERFERENCE_EVENTID:
2265 ath10k_wmi_event_dcs_interference(ar, skb);
2266 break;
2267 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
2268 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2269 break;
2270 case WMI_10X_INST_RSSI_STATS_EVENTID:
2271 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2272 break;
2273 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
2274 ath10k_wmi_event_vdev_standby_req(ar, skb);
2275 break;
2276 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
2277 ath10k_wmi_event_vdev_resume_req(ar, skb);
2278 break;
2279 case WMI_10X_SERVICE_READY_EVENTID:
6f97d256 2280 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
8a6618b0
BM		 2281 break;
2282 case WMI_10X_READY_EVENTID:
2283 ath10k_wmi_ready_event_rx(ar, skb);
2284 break;
2285 default:
2286 ath10k_warn("Unknown eventid: %d\n", id);
2287 break;
2288 }
2289
2290 dev_kfree_skb(skb);
2291}
2292
2293
ce42870e
BM		 2294static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
2295{
2296 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
8a6618b0 2297 ath10k_wmi_10x_process_rx(ar, skb);
ce42870e
BM		 2298 else
2299 ath10k_wmi_main_process_rx(ar, skb);
2300}
2301
5e3dd157
KV		 2302/* WMI Initialization functions */
2303int ath10k_wmi_attach(struct ath10k *ar)
2304{
ce42870e 2305 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
b7e3adf9 2306 ar->wmi.cmd = &wmi_10x_cmd_map;
6d1506e7 2307 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
226a339b 2308 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
ce42870e
BM		 2309 } else {
2310 ar->wmi.cmd = &wmi_cmd_map;
6d1506e7 2311 ar->wmi.vdev_param = &wmi_vdev_param_map;
226a339b 2312 ar->wmi.pdev_param = &wmi_pdev_param_map;
ce42870e
BM		 2313 }
2314
5e3dd157
KV		 2315 init_completion(&ar->wmi.service_ready);
2316 init_completion(&ar->wmi.unified_ready);
be8b3943 2317 init_waitqueue_head(&ar->wmi.tx_credits_wq);
5e3dd157
KV		 2318
2319 return 0;
2320}
2321
2322void ath10k_wmi_detach(struct ath10k *ar)
2323{
b3effe61
BM		 2324 int i;
2325
2326 /* free the host memory chunks requested by firmware */
2327 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2328 dma_free_coherent(ar->dev,
2329 ar->wmi.mem_chunks[i].len,
2330 ar->wmi.mem_chunks[i].vaddr,
2331 ar->wmi.mem_chunks[i].paddr);
2332 }
2333
2334 ar->wmi.num_mem_chunks = 0;
5e3dd157
KV		 2335}
2336
2337int ath10k_wmi_connect_htc_service(struct ath10k *ar)
2338{
2339 int status;
2340 struct ath10k_htc_svc_conn_req conn_req;
2341 struct ath10k_htc_svc_conn_resp conn_resp;
2342
2343 memset(&conn_req, 0, sizeof(conn_req));
2344 memset(&conn_resp, 0, sizeof(conn_resp));
2345
2346 /* these fields are the same for all service endpoints */
2347 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
2348 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 2349 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV		 2350
2351 /* connect to control service */
2352 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
2353
cd003fad 2354 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157
KV		 2355 if (status) {
2356 ath10k_warn("failed to connect to WMI CONTROL service status: %d\n",
2357 status);
2358 return status;
2359 }
2360
2361 ar->wmi.eid = conn_resp.eid;
2362 return 0;
2363}
2364
2365int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
2366 u16 rd5g, u16 ctl2g, u16 ctl5g)
2367{
2368 struct wmi_pdev_set_regdomain_cmd *cmd;
2369 struct sk_buff *skb;
2370
2371 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2372 if (!skb)
2373 return -ENOMEM;
2374
2375 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
2376 cmd->reg_domain = __cpu_to_le32(rd);
2377 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2378 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2379 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2380 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2381
2382 ath10k_dbg(ATH10K_DBG_WMI,
2383 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
2384 rd, rd2g, rd5g, ctl2g, ctl5g);
2385
ce42870e
BM		 2386 return ath10k_wmi_cmd_send(ar, skb,
2387 ar->wmi.cmd->pdev_set_regdomain_cmdid);
5e3dd157
KV		 2388}
2389
2390int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
2391 const struct wmi_channel_arg *arg)
2392{
2393 struct wmi_set_channel_cmd *cmd;
2394 struct sk_buff *skb;
e8a50f8b 2395 u32 ch_flags = 0;
5e3dd157
KV		 2396
2397 if (arg->passive)
2398 return -EINVAL;
2399
2400 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2401 if (!skb)
2402 return -ENOMEM;
2403
e8a50f8b
MP		 2404 if (arg->chan_radar)
2405 ch_flags |= WMI_CHAN_FLAG_DFS;
2406
5e3dd157
KV		 2407 cmd = (struct wmi_set_channel_cmd *)skb->data;
2408 cmd->chan.mhz = __cpu_to_le32(arg->freq);
2409 cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
2410 cmd->chan.mode = arg->mode;
e8a50f8b 2411 cmd->chan.flags |= __cpu_to_le32(ch_flags);
5e3dd157
KV		 2412 cmd->chan.min_power = arg->min_power;
2413 cmd->chan.max_power = arg->max_power;
2414 cmd->chan.reg_power = arg->max_reg_power;
2415 cmd->chan.reg_classid = arg->reg_class_id;
2416 cmd->chan.antenna_max = arg->max_antenna_gain;
2417
2418 ath10k_dbg(ATH10K_DBG_WMI,
2419 "wmi set channel mode %d freq %d\n",
2420 arg->mode, arg->freq);
2421
ce42870e
BM		 2422 return ath10k_wmi_cmd_send(ar, skb,
2423 ar->wmi.cmd->pdev_set_channel_cmdid);
5e3dd157
KV		 2424}
2425
2426int ath10k_wmi_pdev_suspend_target(struct ath10k *ar)
2427{
2428 struct wmi_pdev_suspend_cmd *cmd;
2429 struct sk_buff *skb;
2430
2431 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2432 if (!skb)
2433 return -ENOMEM;
2434
2435 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
2436 cmd->suspend_opt = WMI_PDEV_SUSPEND;
2437
ce42870e 2438 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
5e3dd157
KV		 2439}
2440
2441int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
2442{
2443 struct sk_buff *skb;
2444
2445 skb = ath10k_wmi_alloc_skb(0);
2446 if (skb == NULL)
2447 return -ENOMEM;
2448
ce42870e 2449 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
5e3dd157
KV		 2450}
2451
226a339b 2452int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV		 2453{
2454 struct wmi_pdev_set_param_cmd *cmd;
2455 struct sk_buff *skb;
2456
226a339b
BM		 2457 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
2458 ath10k_warn("pdev param %d not supported by firmware\n", id);
d544943a 2459 return -EOPNOTSUPP;
226a339b
BM		 2460 }
2461
5e3dd157
KV		 2462 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2463 if (!skb)
2464 return -ENOMEM;
2465
2466 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
2467 cmd->param_id = __cpu_to_le32(id);
2468 cmd->param_value = __cpu_to_le32(value);
2469
2470 ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
2471 id, value);
ce42870e 2472 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
5e3dd157
KV		 2473}
2474
12b2b9e3 2475static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
5e3dd157
KV		 2476{
2477 struct wmi_init_cmd *cmd;
2478 struct sk_buff *buf;
2479 struct wmi_resource_config config = {};
b3effe61
BM		 2480 u32 len, val;
2481 int i;
5e3dd157
KV		 2482
2483 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
2484 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
2485 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
2486
2487 config.num_offload_reorder_bufs =
2488 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
2489
2490 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
2491 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
2492 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
2493 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
2494 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
2495 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2496 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2497 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2498 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
2499 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
2500
2501 config.scan_max_pending_reqs =
2502 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
2503
2504 config.bmiss_offload_max_vdev =
2505 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
2506
2507 config.roam_offload_max_vdev =
2508 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
2509
2510 config.roam_offload_max_ap_profiles =
2511 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
2512
2513 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
2514 config.num_mcast_table_elems =
2515 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
2516
2517 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
2518 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
2519 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
2520 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
2521 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
2522
2523 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
2524 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
2525
2526 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
2527
2528 config.gtk_offload_max_vdev =
2529 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
2530
2531 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
2532 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
2533
b3effe61
BM		 2534 len = sizeof(*cmd) +
2535 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
2536
2537 buf = ath10k_wmi_alloc_skb(len);
5e3dd157
KV		 2538 if (!buf)
2539 return -ENOMEM;
2540
2541 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61
BM		 2542
2543 if (ar->wmi.num_mem_chunks == 0) {
2544 cmd->num_host_mem_chunks = 0;
2545 goto out;
2546 }
2547
2548 ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
5c54a7bf 2549 ar->wmi.num_mem_chunks);
b3effe61
BM		 2550
2551 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
2552
2553 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2554 cmd->host_mem_chunks[i].ptr =
2555 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
2556 cmd->host_mem_chunks[i].size =
2557 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
2558 cmd->host_mem_chunks[i].req_id =
2559 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
2560
2561 ath10k_dbg(ATH10K_DBG_WMI,
5c54a7bf 2562 "wmi chunk %d len %d requested, addr 0x%llx\n",
b3effe61 2563 i,
5c54a7bf
MK		 2564 ar->wmi.mem_chunks[i].len,
2565 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
b3effe61
BM		 2566 }
2567out:
5e3dd157
KV		 2568 memcpy(&cmd->resource_config, &config, sizeof(config));
2569
2570 ath10k_dbg(ATH10K_DBG_WMI, "wmi init\n");
ce42870e 2571 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
5e3dd157
KV		 2572}
2573
12b2b9e3
BM		 2574static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
2575{
2576 struct wmi_init_cmd_10x *cmd;
2577 struct sk_buff *buf;
2578 struct wmi_resource_config_10x config = {};
2579 u32 len, val;
2580 int i;
2581
ec6a73f0
BM		 2582 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
2583 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
2584 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
2585 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
2586 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
2587 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
2588 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
2589 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2590 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2591 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2592 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
2593 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
12b2b9e3
BM		 2594
2595 config.scan_max_pending_reqs =
ec6a73f0 2596 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM		 2597
2598 config.bmiss_offload_max_vdev =
ec6a73f0 2599 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 2600
2601 config.roam_offload_max_vdev =
ec6a73f0 2602 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 2603
2604 config.roam_offload_max_ap_profiles =
ec6a73f0 2605 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 2606
ec6a73f0 2607 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 2608 config.num_mcast_table_elems =
ec6a73f0 2609 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 2610
ec6a73f0
BM		 2611 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
2612 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
2613 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
2614 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
2615 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 2616
ec6a73f0 2617 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM		 2618 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
2619
ec6a73f0 2620 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 2621
ec6a73f0
BM		 2622 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
2623 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM		 2624
2625 len = sizeof(*cmd) +
2626 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
2627
2628 buf = ath10k_wmi_alloc_skb(len);
2629 if (!buf)
2630 return -ENOMEM;
2631
2632 cmd = (struct wmi_init_cmd_10x *)buf->data;
2633
2634 if (ar->wmi.num_mem_chunks == 0) {
2635 cmd->num_host_mem_chunks = 0;
2636 goto out;
2637 }
2638
2639 ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
5c54a7bf 2640 ar->wmi.num_mem_chunks);
12b2b9e3
BM		 2641
2642 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
2643
2644 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2645 cmd->host_mem_chunks[i].ptr =
2646 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
2647 cmd->host_mem_chunks[i].size =
2648 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
2649 cmd->host_mem_chunks[i].req_id =
2650 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
2651
2652 ath10k_dbg(ATH10K_DBG_WMI,
5c54a7bf 2653 "wmi chunk %d len %d requested, addr 0x%llx\n",
12b2b9e3 2654 i,
5c54a7bf
MK		 2655 ar->wmi.mem_chunks[i].len,
2656 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
12b2b9e3
BM		 2657 }
2658out:
2659 memcpy(&cmd->resource_config, &config, sizeof(config));
2660
2661 ath10k_dbg(ATH10K_DBG_WMI, "wmi init 10x\n");
2662 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
2663}
2664
2665int ath10k_wmi_cmd_init(struct ath10k *ar)
2666{
2667 int ret;
2668
2669 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2670 ret = ath10k_wmi_10x_cmd_init(ar);
2671 else
2672 ret = ath10k_wmi_main_cmd_init(ar);
2673
2674 return ret;
5e3dd157
KV		 2675}
2676
89b7e766
BM		 2677static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar,
2678 const struct wmi_start_scan_arg *arg)
5e3dd157
KV		 2679{
2680 int len;
2681
89b7e766
BM		 2682 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2683 len = sizeof(struct wmi_start_scan_cmd_10x);
2684 else
2685 len = sizeof(struct wmi_start_scan_cmd);
5e3dd157
KV		 2686
2687 if (arg->ie_len) {
2688 if (!arg->ie)
2689 return -EINVAL;
2690 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
2691 return -EINVAL;
2692
2693 len += sizeof(struct wmi_ie_data);
2694 len += roundup(arg->ie_len, 4);
2695 }
2696
2697 if (arg->n_channels) {
2698 if (!arg->channels)
2699 return -EINVAL;
2700 if (arg->n_channels > ARRAY_SIZE(arg->channels))
2701 return -EINVAL;
2702
2703 len += sizeof(struct wmi_chan_list);
2704 len += sizeof(__le32) * arg->n_channels;
2705 }
2706
2707 if (arg->n_ssids) {
2708 if (!arg->ssids)
2709 return -EINVAL;
2710 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
2711 return -EINVAL;
2712
2713 len += sizeof(struct wmi_ssid_list);
2714 len += sizeof(struct wmi_ssid) * arg->n_ssids;
2715 }
2716
2717 if (arg->n_bssids) {
2718 if (!arg->bssids)
2719 return -EINVAL;
2720 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
2721 return -EINVAL;
2722
2723 len += sizeof(struct wmi_bssid_list);
2724 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
2725 }
2726
2727 return len;
2728}
2729
2730int ath10k_wmi_start_scan(struct ath10k *ar,
2731 const struct wmi_start_scan_arg *arg)
2732{
2733 struct wmi_start_scan_cmd *cmd;
2734 struct sk_buff *skb;
2735 struct wmi_ie_data *ie;
2736 struct wmi_chan_list *channels;
2737 struct wmi_ssid_list *ssids;
2738 struct wmi_bssid_list *bssids;
2739 u32 scan_id;
2740 u32 scan_req_id;
2741 int off;
2742 int len = 0;
2743 int i;
2744
89b7e766 2745 len = ath10k_wmi_start_scan_calc_len(ar, arg);
5e3dd157
KV		 2746 if (len < 0)
2747 return len; /* len contains error code here */
2748
2749 skb = ath10k_wmi_alloc_skb(len);
2750 if (!skb)
2751 return -ENOMEM;
2752
2753 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
2754 scan_id |= arg->scan_id;
2755
2756 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
2757 scan_req_id |= arg->scan_req_id;
2758
2759 cmd = (struct wmi_start_scan_cmd *)skb->data;
2760 cmd->scan_id = __cpu_to_le32(scan_id);
2761 cmd->scan_req_id = __cpu_to_le32(scan_req_id);
2762 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
2763 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
2764 cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
2765 cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
2766 cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
2767 cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
2768 cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
2769 cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
2770 cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
2771 cmd->idle_time = __cpu_to_le32(arg->idle_time);
2772 cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
2773 cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
2774 cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
2775
2776 /* TLV list starts after fields included in the struct */
89b7e766
BM		 2777 /* There's just one filed that differes the two start_scan
2778 * structures - burst_duration, which we are not using btw,
2779 no point to make the split here, just shift the buffer to fit with
2780 given FW */
2781 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2782 off = sizeof(struct wmi_start_scan_cmd_10x);
2783 else
2784 off = sizeof(struct wmi_start_scan_cmd);
5e3dd157
KV		 2785
2786 if (arg->n_channels) {
2787 channels = (void *)skb->data + off;
2788 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
2789 channels->num_chan = __cpu_to_le32(arg->n_channels);
2790
2791 for (i = 0; i < arg->n_channels; i++)
2792 channels->channel_list[i] =
2793 __cpu_to_le32(arg->channels[i]);
2794
2795 off += sizeof(*channels);
2796 off += sizeof(__le32) * arg->n_channels;
2797 }
2798
2799 if (arg->n_ssids) {
2800 ssids = (void *)skb->data + off;
2801 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
2802 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
2803
2804 for (i = 0; i < arg->n_ssids; i++) {
2805 ssids->ssids[i].ssid_len =
2806 __cpu_to_le32(arg->ssids[i].len);
2807 memcpy(&ssids->ssids[i].ssid,
2808 arg->ssids[i].ssid,
2809 arg->ssids[i].len);
2810 }
2811
2812 off += sizeof(*ssids);
2813 off += sizeof(struct wmi_ssid) * arg->n_ssids;
2814 }
2815
2816 if (arg->n_bssids) {
2817 bssids = (void *)skb->data + off;
2818 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
2819 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
2820
2821 for (i = 0; i < arg->n_bssids; i++)
2822 memcpy(&bssids->bssid_list[i],
2823 arg->bssids[i].bssid,
2824 ETH_ALEN);
2825
2826 off += sizeof(*bssids);
2827 off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
2828 }
2829
2830 if (arg->ie_len) {
2831 ie = (void *)skb->data + off;
2832 ie->tag = __cpu_to_le32(WMI_IE_TAG);
2833 ie->ie_len = __cpu_to_le32(arg->ie_len);
2834 memcpy(ie->ie_data, arg->ie, arg->ie_len);
2835
2836 off += sizeof(*ie);
2837 off += roundup(arg->ie_len, 4);
2838 }
2839
2840 if (off != skb->len) {
2841 dev_kfree_skb(skb);
2842 return -EINVAL;
2843 }
2844
2845 ath10k_dbg(ATH10K_DBG_WMI, "wmi start scan\n");
ce42870e 2846 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
5e3dd157
KV		 2847}
2848
2849void ath10k_wmi_start_scan_init(struct ath10k *ar,
2850 struct wmi_start_scan_arg *arg)
2851{
2852 /* setup commonly used values */
2853 arg->scan_req_id = 1;
2854 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2855 arg->dwell_time_active = 50;
2856 arg->dwell_time_passive = 150;
2857 arg->min_rest_time = 50;
2858 arg->max_rest_time = 500;
2859 arg->repeat_probe_time = 0;
2860 arg->probe_spacing_time = 0;
2861 arg->idle_time = 0;
c322892f 2862 arg->max_scan_time = 20000;
5e3dd157
KV		 2863 arg->probe_delay = 5;
2864 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
2865 | WMI_SCAN_EVENT_COMPLETED
2866 | WMI_SCAN_EVENT_BSS_CHANNEL
2867 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
2868 | WMI_SCAN_EVENT_DEQUEUED;
2869 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
2870 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
2871 arg->n_bssids = 1;
2872 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
2873}
2874
2875int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
2876{
2877 struct wmi_stop_scan_cmd *cmd;
2878 struct sk_buff *skb;
2879 u32 scan_id;
2880 u32 req_id;
2881
2882 if (arg->req_id > 0xFFF)
2883 return -EINVAL;
2884 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
2885 return -EINVAL;
2886
2887 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2888 if (!skb)
2889 return -ENOMEM;
2890
2891 scan_id = arg->u.scan_id;
2892 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
2893
2894 req_id = arg->req_id;
2895 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
2896
2897 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2898 cmd->req_type = __cpu_to_le32(arg->req_type);
2899 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
2900 cmd->scan_id = __cpu_to_le32(scan_id);
2901 cmd->scan_req_id = __cpu_to_le32(req_id);
2902
2903 ath10k_dbg(ATH10K_DBG_WMI,
2904 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
2905 arg->req_id, arg->req_type, arg->u.scan_id);
ce42870e 2906 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
5e3dd157
KV		 2907}
2908
2909int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
2910 enum wmi_vdev_type type,
2911 enum wmi_vdev_subtype subtype,
2912 const u8 macaddr[ETH_ALEN])
2913{
2914 struct wmi_vdev_create_cmd *cmd;
2915 struct sk_buff *skb;
2916
2917 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2918 if (!skb)
2919 return -ENOMEM;
2920
2921 cmd = (struct wmi_vdev_create_cmd *)skb->data;
2922 cmd->vdev_id = __cpu_to_le32(vdev_id);
2923 cmd->vdev_type = __cpu_to_le32(type);
2924 cmd->vdev_subtype = __cpu_to_le32(subtype);
2925 memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN);
2926
2927 ath10k_dbg(ATH10K_DBG_WMI,
2928 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
2929 vdev_id, type, subtype, macaddr);
2930
ce42870e 2931 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
5e3dd157
KV		 2932}
2933
2934int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
2935{
2936 struct wmi_vdev_delete_cmd *cmd;
2937 struct sk_buff *skb;
2938
2939 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2940 if (!skb)
2941 return -ENOMEM;
2942
2943 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
2944 cmd->vdev_id = __cpu_to_le32(vdev_id);
2945
2946 ath10k_dbg(ATH10K_DBG_WMI,
2947 "WMI vdev delete id %d\n", vdev_id);
2948
ce42870e 2949 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
5e3dd157
KV		 2950}
2951
2952static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
2953 const struct wmi_vdev_start_request_arg *arg,
ce42870e 2954 u32 cmd_id)
5e3dd157
KV		 2955{
2956 struct wmi_vdev_start_request_cmd *cmd;
2957 struct sk_buff *skb;
2958 const char *cmdname;
2959 u32 flags = 0;
e8a50f8b 2960 u32 ch_flags = 0;
5e3dd157 2961
ce42870e
BM		 2962 if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
2963 cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 2964 return -EINVAL;
2965 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
2966 return -EINVAL;
2967 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
2968 return -EINVAL;
2969 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
2970 return -EINVAL;
2971
ce42870e 2972 if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
5e3dd157 2973 cmdname = "start";
ce42870e 2974 else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 2975 cmdname = "restart";
2976 else
2977 return -EINVAL; /* should not happen, we already check cmd_id */
2978
2979 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2980 if (!skb)
2981 return -ENOMEM;
2982
2983 if (arg->hidden_ssid)
2984 flags |= WMI_VDEV_START_HIDDEN_SSID;
2985 if (arg->pmf_enabled)
2986 flags |= WMI_VDEV_START_PMF_ENABLED;
e8a50f8b
MP		 2987 if (arg->channel.chan_radar)
2988 ch_flags |= WMI_CHAN_FLAG_DFS;
5e3dd157
KV		 2989
2990 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
2991 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
2992 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
2993 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
2994 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
2995 cmd->flags = __cpu_to_le32(flags);
2996 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
2997 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
2998
2999 if (arg->ssid) {
3000 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
3001 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
3002 }
3003
3004 cmd->chan.mhz = __cpu_to_le32(arg->channel.freq);
3005
3006 cmd->chan.band_center_freq1 =
3007 __cpu_to_le32(arg->channel.band_center_freq1);
3008
3009 cmd->chan.mode = arg->channel.mode;
e8a50f8b 3010 cmd->chan.flags |= __cpu_to_le32(ch_flags);
5e3dd157
KV		 3011 cmd->chan.min_power = arg->channel.min_power;
3012 cmd->chan.max_power = arg->channel.max_power;
3013 cmd->chan.reg_power = arg->channel.max_reg_power;
3014 cmd->chan.reg_classid = arg->channel.reg_class_id;
3015 cmd->chan.antenna_max = arg->channel.max_antenna_gain;
3016
3017 ath10k_dbg(ATH10K_DBG_WMI,
e8a50f8b
MP		 3018 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, "
3019 "ch_flags: 0x%0X, max_power: %d\n", cmdname, arg->vdev_id,
3020 flags, arg->channel.freq, arg->channel.mode,
3021 cmd->chan.flags, arg->channel.max_power);
5e3dd157
KV		 3022
3023 return ath10k_wmi_cmd_send(ar, skb, cmd_id);
3024}
3025
3026int ath10k_wmi_vdev_start(struct ath10k *ar,
3027 const struct wmi_vdev_start_request_arg *arg)
3028{
ce42870e
BM		 3029 u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
3030
3031 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3032}
3033
3034int ath10k_wmi_vdev_restart(struct ath10k *ar,
3035 const struct wmi_vdev_start_request_arg *arg)
3036{
ce42870e
BM		 3037 u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
3038
3039 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3040}
3041
3042int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
3043{
3044 struct wmi_vdev_stop_cmd *cmd;
3045 struct sk_buff *skb;
3046
3047 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3048 if (!skb)
3049 return -ENOMEM;
3050
3051 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
3052 cmd->vdev_id = __cpu_to_le32(vdev_id);
3053
3054 ath10k_dbg(ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
3055
ce42870e 3056 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
5e3dd157
KV		 3057}
3058
3059int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
3060{
3061 struct wmi_vdev_up_cmd *cmd;
3062 struct sk_buff *skb;
3063
3064 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3065 if (!skb)
3066 return -ENOMEM;
3067
3068 cmd = (struct wmi_vdev_up_cmd *)skb->data;
3069 cmd->vdev_id = __cpu_to_le32(vdev_id);
3070 cmd->vdev_assoc_id = __cpu_to_le32(aid);
7b4371ea 3071 memcpy(&cmd->vdev_bssid.addr, bssid, ETH_ALEN);
5e3dd157
KV		 3072
3073 ath10k_dbg(ATH10K_DBG_WMI,
3074 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
3075 vdev_id, aid, bssid);
3076
ce42870e 3077 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
5e3dd157
KV		 3078}
3079
3080int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
3081{
3082 struct wmi_vdev_down_cmd *cmd;
3083 struct sk_buff *skb;
3084
3085 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3086 if (!skb)
3087 return -ENOMEM;
3088
3089 cmd = (struct wmi_vdev_down_cmd *)skb->data;
3090 cmd->vdev_id = __cpu_to_le32(vdev_id);
3091
3092 ath10k_dbg(ATH10K_DBG_WMI,
3093 "wmi mgmt vdev down id 0x%x\n", vdev_id);
3094
ce42870e 3095 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
5e3dd157
KV		 3096}
3097
3098int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
6d1506e7 3099 u32 param_id, u32 param_value)
5e3dd157
KV		 3100{
3101 struct wmi_vdev_set_param_cmd *cmd;
3102 struct sk_buff *skb;
3103
6d1506e7
BM		 3104 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
3105 ath10k_dbg(ATH10K_DBG_WMI,
3106 "vdev param %d not supported by firmware\n",
3107 param_id);
ebc9abdd 3108 return -EOPNOTSUPP;
6d1506e7
BM		 3109 }
3110
5e3dd157
KV		 3111 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3112 if (!skb)
3113 return -ENOMEM;
3114
3115 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
3116 cmd->vdev_id = __cpu_to_le32(vdev_id);
3117 cmd->param_id = __cpu_to_le32(param_id);
3118 cmd->param_value = __cpu_to_le32(param_value);
3119
3120 ath10k_dbg(ATH10K_DBG_WMI,
3121 "wmi vdev id 0x%x set param %d value %d\n",
3122 vdev_id, param_id, param_value);
3123
ce42870e 3124 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
5e3dd157
KV		 3125}
3126
3127int ath10k_wmi_vdev_install_key(struct ath10k *ar,
3128 const struct wmi_vdev_install_key_arg *arg)
3129{
3130 struct wmi_vdev_install_key_cmd *cmd;
3131 struct sk_buff *skb;
3132
3133 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
3134 return -EINVAL;
3135 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
3136 return -EINVAL;
3137
3138 skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->key_len);
3139 if (!skb)
3140 return -ENOMEM;
3141
3142 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
3143 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3144 cmd->key_idx = __cpu_to_le32(arg->key_idx);
3145 cmd->key_flags = __cpu_to_le32(arg->key_flags);
3146 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
3147 cmd->key_len = __cpu_to_le32(arg->key_len);
3148 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
3149 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
3150
3151 if (arg->macaddr)
3152 memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN);
3153 if (arg->key_data)
3154 memcpy(cmd->key_data, arg->key_data, arg->key_len);
3155
e0c508ab
MK		 3156 ath10k_dbg(ATH10K_DBG_WMI,
3157 "wmi vdev install key idx %d cipher %d len %d\n",
3158 arg->key_idx, arg->key_cipher, arg->key_len);
ce42870e
BM		 3159 return ath10k_wmi_cmd_send(ar, skb,
3160 ar->wmi.cmd->vdev_install_key_cmdid);
5e3dd157
KV		 3161}
3162
3163int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
3164 const u8 peer_addr[ETH_ALEN])
3165{
3166 struct wmi_peer_create_cmd *cmd;
3167 struct sk_buff *skb;
3168
3169 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3170 if (!skb)
3171 return -ENOMEM;
3172
3173 cmd = (struct wmi_peer_create_cmd *)skb->data;
3174 cmd->vdev_id = __cpu_to_le32(vdev_id);
3175 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3176
3177 ath10k_dbg(ATH10K_DBG_WMI,
3178 "wmi peer create vdev_id %d peer_addr %pM\n",
3179 vdev_id, peer_addr);
ce42870e 3180 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
5e3dd157
KV		 3181}
3182
3183int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
3184 const u8 peer_addr[ETH_ALEN])
3185{
3186 struct wmi_peer_delete_cmd *cmd;
3187 struct sk_buff *skb;
3188
3189 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3190 if (!skb)
3191 return -ENOMEM;
3192
3193 cmd = (struct wmi_peer_delete_cmd *)skb->data;
3194 cmd->vdev_id = __cpu_to_le32(vdev_id);
3195 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3196
3197 ath10k_dbg(ATH10K_DBG_WMI,
3198 "wmi peer delete vdev_id %d peer_addr %pM\n",
3199 vdev_id, peer_addr);
ce42870e 3200 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
5e3dd157
KV		 3201}
3202
3203int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
3204 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
3205{
3206 struct wmi_peer_flush_tids_cmd *cmd;
3207 struct sk_buff *skb;
3208
3209 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3210 if (!skb)
3211 return -ENOMEM;
3212
3213 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
3214 cmd->vdev_id = __cpu_to_le32(vdev_id);
3215 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
3216 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3217
3218 ath10k_dbg(ATH10K_DBG_WMI,
3219 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
3220 vdev_id, peer_addr, tid_bitmap);
ce42870e 3221 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
5e3dd157
KV		 3222}
3223
3224int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
3225 const u8 *peer_addr, enum wmi_peer_param param_id,
3226 u32 param_value)
3227{
3228 struct wmi_peer_set_param_cmd *cmd;
3229 struct sk_buff *skb;
3230
3231 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3232 if (!skb)
3233 return -ENOMEM;
3234
3235 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
3236 cmd->vdev_id = __cpu_to_le32(vdev_id);
3237 cmd->param_id = __cpu_to_le32(param_id);
3238 cmd->param_value = __cpu_to_le32(param_value);
d458cdf7 3239 memcpy(&cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
5e3dd157
KV		 3240
3241 ath10k_dbg(ATH10K_DBG_WMI,
3242 "wmi vdev %d peer 0x%pM set param %d value %d\n",
3243 vdev_id, peer_addr, param_id, param_value);
3244
ce42870e 3245 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
5e3dd157
KV		 3246}
3247
3248int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
3249 enum wmi_sta_ps_mode psmode)
3250{
3251 struct wmi_sta_powersave_mode_cmd *cmd;
3252 struct sk_buff *skb;
3253
3254 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3255 if (!skb)
3256 return -ENOMEM;
3257
3258 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
3259 cmd->vdev_id = __cpu_to_le32(vdev_id);
3260 cmd->sta_ps_mode = __cpu_to_le32(psmode);
3261
3262 ath10k_dbg(ATH10K_DBG_WMI,
3263 "wmi set powersave id 0x%x mode %d\n",
3264 vdev_id, psmode);
3265
ce42870e
BM		 3266 return ath10k_wmi_cmd_send(ar, skb,
3267 ar->wmi.cmd->sta_powersave_mode_cmdid);
5e3dd157
KV		 3268}
3269
3270int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
3271 enum wmi_sta_powersave_param param_id,
3272 u32 value)
3273{
3274 struct wmi_sta_powersave_param_cmd *cmd;
3275 struct sk_buff *skb;
3276
3277 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3278 if (!skb)
3279 return -ENOMEM;
3280
3281 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
3282 cmd->vdev_id = __cpu_to_le32(vdev_id);
3283 cmd->param_id = __cpu_to_le32(param_id);
3284 cmd->param_value = __cpu_to_le32(value);
3285
3286 ath10k_dbg(ATH10K_DBG_WMI,
3287 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
3288 vdev_id, param_id, value);
ce42870e
BM		 3289 return ath10k_wmi_cmd_send(ar, skb,
3290 ar->wmi.cmd->sta_powersave_param_cmdid);
5e3dd157
KV		 3291}
3292
3293int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
3294 enum wmi_ap_ps_peer_param param_id, u32 value)
3295{
3296 struct wmi_ap_ps_peer_cmd *cmd;
3297 struct sk_buff *skb;
3298
3299 if (!mac)
3300 return -EINVAL;
3301
3302 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3303 if (!skb)
3304 return -ENOMEM;
3305
3306 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
3307 cmd->vdev_id = __cpu_to_le32(vdev_id);
3308 cmd->param_id = __cpu_to_le32(param_id);
3309 cmd->param_value = __cpu_to_le32(value);
3310 memcpy(&cmd->peer_macaddr, mac, ETH_ALEN);
3311
3312 ath10k_dbg(ATH10K_DBG_WMI,
3313 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
3314 vdev_id, param_id, value, mac);
3315
ce42870e
BM		 3316 return ath10k_wmi_cmd_send(ar, skb,
3317 ar->wmi.cmd->ap_ps_peer_param_cmdid);
5e3dd157
KV		 3318}
3319
3320int ath10k_wmi_scan_chan_list(struct ath10k *ar,
3321 const struct wmi_scan_chan_list_arg *arg)
3322{
3323 struct wmi_scan_chan_list_cmd *cmd;
3324 struct sk_buff *skb;
3325 struct wmi_channel_arg *ch;
3326 struct wmi_channel *ci;
3327 int len;
3328 int i;
3329
3330 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
3331
3332 skb = ath10k_wmi_alloc_skb(len);
3333 if (!skb)
3334 return -EINVAL;
3335
3336 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
3337 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
3338
3339 for (i = 0; i < arg->n_channels; i++) {
3340 u32 flags = 0;
3341
3342 ch = &arg->channels[i];
3343 ci = &cmd->chan_info[i];
3344
3345 if (ch->passive)
3346 flags |= WMI_CHAN_FLAG_PASSIVE;
3347 if (ch->allow_ibss)
3348 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
3349 if (ch->allow_ht)
3350 flags |= WMI_CHAN_FLAG_ALLOW_HT;
3351 if (ch->allow_vht)
3352 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
3353 if (ch->ht40plus)
3354 flags |= WMI_CHAN_FLAG_HT40_PLUS;
e8a50f8b
MP		 3355 if (ch->chan_radar)
3356 flags |= WMI_CHAN_FLAG_DFS;
5e3dd157
KV		 3357
3358 ci->mhz = __cpu_to_le32(ch->freq);
3359 ci->band_center_freq1 = __cpu_to_le32(ch->freq);
3360 ci->band_center_freq2 = 0;
3361 ci->min_power = ch->min_power;
3362 ci->max_power = ch->max_power;
3363 ci->reg_power = ch->max_reg_power;
3364 ci->antenna_max = ch->max_antenna_gain;
3365 ci->antenna_max = 0;
3366
3367 /* mode & flags share storage */
3368 ci->mode = ch->mode;
3369 ci->flags |= __cpu_to_le32(flags);
3370 }
3371
ce42870e 3372 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
5e3dd157
KV		 3373}
3374
3375int ath10k_wmi_peer_assoc(struct ath10k *ar,
3376 const struct wmi_peer_assoc_complete_arg *arg)
3377{
3378 struct wmi_peer_assoc_complete_cmd *cmd;
3379 struct sk_buff *skb;
3380
3381 if (arg->peer_mpdu_density > 16)
3382 return -EINVAL;
3383 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
3384 return -EINVAL;
3385 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
3386 return -EINVAL;
3387
3388 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3389 if (!skb)
3390 return -ENOMEM;
3391
3392 cmd = (struct wmi_peer_assoc_complete_cmd *)skb->data;
3393 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3394 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
3395 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
3396 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
3397 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
3398 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
3399 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
3400 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
3401 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
3402 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
3403 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
3404 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
3405 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
3406
3407 memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN);
3408
3409 cmd->peer_legacy_rates.num_rates =
3410 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
3411 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
3412 arg->peer_legacy_rates.num_rates);
3413
3414 cmd->peer_ht_rates.num_rates =
3415 __cpu_to_le32(arg->peer_ht_rates.num_rates);
3416 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
3417 arg->peer_ht_rates.num_rates);
3418
3419 cmd->peer_vht_rates.rx_max_rate =
3420 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
3421 cmd->peer_vht_rates.rx_mcs_set =
3422 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
3423 cmd->peer_vht_rates.tx_max_rate =
3424 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
3425 cmd->peer_vht_rates.tx_mcs_set =
3426 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
3427
e0c508ab
MK		 3428 ath10k_dbg(ATH10K_DBG_WMI,
3429 "wmi peer assoc vdev %d addr %pM\n",
3430 arg->vdev_id, arg->addr);
ce42870e 3431 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
5e3dd157
KV		 3432}
3433
ed54388a
MK		 3434int ath10k_wmi_beacon_send_nowait(struct ath10k *ar,
3435 const struct wmi_bcn_tx_arg *arg)
5e3dd157
KV		 3436{
3437 struct wmi_bcn_tx_cmd *cmd;
3438 struct sk_buff *skb;
e2045481 3439 int ret;
5e3dd157
KV		 3440
3441 skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->bcn_len);
3442 if (!skb)
3443 return -ENOMEM;
3444
3445 cmd = (struct wmi_bcn_tx_cmd *)skb->data;
3446 cmd->hdr.vdev_id = __cpu_to_le32(arg->vdev_id);
3447 cmd->hdr.tx_rate = __cpu_to_le32(arg->tx_rate);
3448 cmd->hdr.tx_power = __cpu_to_le32(arg->tx_power);
3449 cmd->hdr.bcn_len = __cpu_to_le32(arg->bcn_len);
3450 memcpy(cmd->bcn, arg->bcn, arg->bcn_len);
3451
e2045481
MK		 3452 ret = ath10k_wmi_cmd_send_nowait(ar, skb, ar->wmi.cmd->bcn_tx_cmdid);
3453 if (ret)
3454 dev_kfree_skb(skb);
3455
3456 return ret;
5e3dd157
KV		 3457}
3458
3459static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
3460 const struct wmi_wmm_params_arg *arg)
3461{
3462 params->cwmin = __cpu_to_le32(arg->cwmin);
3463 params->cwmax = __cpu_to_le32(arg->cwmax);
3464 params->aifs = __cpu_to_le32(arg->aifs);
3465 params->txop = __cpu_to_le32(arg->txop);
3466 params->acm = __cpu_to_le32(arg->acm);
3467 params->no_ack = __cpu_to_le32(arg->no_ack);
3468}
3469
3470int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
3471 const struct wmi_pdev_set_wmm_params_arg *arg)
3472{
3473 struct wmi_pdev_set_wmm_params *cmd;
3474 struct sk_buff *skb;
3475
3476 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3477 if (!skb)
3478 return -ENOMEM;
3479
3480 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
3481 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
3482 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
3483 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
3484 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
3485
3486 ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
ce42870e
BM		 3487 return ath10k_wmi_cmd_send(ar, skb,
3488 ar->wmi.cmd->pdev_set_wmm_params_cmdid);
5e3dd157
KV		 3489}
3490
3491int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
3492{
3493 struct wmi_request_stats_cmd *cmd;
3494 struct sk_buff *skb;
3495
3496 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3497 if (!skb)
3498 return -ENOMEM;
3499
3500 cmd = (struct wmi_request_stats_cmd *)skb->data;
3501 cmd->stats_id = __cpu_to_le32(stats_id);
3502
3503 ath10k_dbg(ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
ce42870e 3504 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
5e3dd157 3505}
9cfbce75
MK		 3506
3507int ath10k_wmi_force_fw_hang(struct ath10k *ar,
3508 enum wmi_force_fw_hang_type type, u32 delay_ms)
3509{
3510 struct wmi_force_fw_hang_cmd *cmd;
3511 struct sk_buff *skb;
3512
3513 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3514 if (!skb)
3515 return -ENOMEM;
3516
3517 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
3518 cmd->type = __cpu_to_le32(type);
3519 cmd->delay_ms = __cpu_to_le32(delay_ms);
3520
3521 ath10k_dbg(ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
3522 type, delay_ms);
ce42870e 3523 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
9cfbce75 3524}
f118a3e5
KV		 3525
3526int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable)
3527{
3528 struct wmi_dbglog_cfg_cmd *cmd;
3529 struct sk_buff *skb;
3530 u32 cfg;
3531
3532 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3533 if (!skb)
3534 return -ENOMEM;
3535
3536 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
3537
3538 if (module_enable) {
3539 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
3540 ATH10K_DBGLOG_CFG_LOG_LVL);
3541 } else {
3542 /* set back defaults, all modules with WARN level */
3543 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
3544 ATH10K_DBGLOG_CFG_LOG_LVL);
3545 module_enable = ~0;
3546 }
3547
3548 cmd->module_enable = __cpu_to_le32(module_enable);
3549 cmd->module_valid = __cpu_to_le32(~0);
3550 cmd->config_enable = __cpu_to_le32(cfg);
3551 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
3552
3553 ath10k_dbg(ATH10K_DBG_WMI,
3554 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
3555 __le32_to_cpu(cmd->module_enable),
3556 __le32_to_cpu(cmd->module_valid),
3557 __le32_to_cpu(cmd->config_enable),
3558 __le32_to_cpu(cmd->config_valid));
3559
3560 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid);
3561}
Linux kernel - Deliverables
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