projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 5e3dd157 KV |
1 | /* |
| 2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
| 3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
| 4 | * | |
| 5 | * Permission to use, copy, modify, and/or distribute this software for any | |
| 6 | * purpose with or without fee is hereby granted, provided that the above | |
| 7 | * copyright notice and this permission notice appear in all copies. | |
| 8 | * | |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
| 10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
| 11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
| 12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
| 13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
| 14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
| 15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
| 16 | */ | |
| 17 | ||
| 18 | #include <linux/skbuff.h> | |
| 2fe5288c | 19 | #include <linux/ctype.h> |
| 5e3dd157 KV |
20 | |
| 21 | #include "core.h" | |
| 22 | #include "htc.h" | |
| 23 | #include "debug.h" | |
| 24 | #include "wmi.h" | |
| ca996ec5 | 25 | #include "wmi-tlv.h" |
| 5e3dd157 | 26 | #include "mac.h" |
| 43d2a30f | 27 | #include "testmode.h" |
| d7579d12 | 28 | #include "wmi-ops.h" |
| 6a94888f | 29 | #include "p2p.h" |
| 587f7031 | 30 | #include "hw.h" |
| 5e3dd157 | 31 | |
| ce42870e BM |
32 | /* MAIN WMI cmd track */ |
| 33 | static struct wmi_cmd_map wmi_cmd_map = { | |
| 34 | .init_cmdid = WMI_INIT_CMDID, | |
| 35 | .start_scan_cmdid = WMI_START_SCAN_CMDID, | |
| 36 | .stop_scan_cmdid = WMI_STOP_SCAN_CMDID, | |
| 37 | .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID, | |
| 38 | .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID, | |
| 39 | .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID, | |
| 40 | .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID, | |
| 41 | .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID, | |
| 42 | .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID, | |
| 43 | .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID, | |
| 44 | .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID, | |
| 45 | .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID, | |
| 46 | .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID, | |
| 47 | .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID, | |
| 48 | .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID, | |
| 49 | .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
| 50 | .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID, | |
| 51 | .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID, | |
| 52 | .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID, | |
| 53 | .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID, | |
| 54 | .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID, | |
| 55 | .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID, | |
| 56 | .vdev_up_cmdid = WMI_VDEV_UP_CMDID, | |
| 57 | .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID, | |
| 58 | .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID, | |
| 59 | .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID, | |
| 60 | .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID, | |
| 61 | .peer_create_cmdid = WMI_PEER_CREATE_CMDID, | |
| 62 | .peer_delete_cmdid = WMI_PEER_DELETE_CMDID, | |
| 63 | .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID, | |
| 64 | .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID, | |
| 65 | .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID, | |
| 66 | .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID, | |
| 67 | .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID, | |
| 68 | .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID, | |
| 69 | .bcn_tx_cmdid = WMI_BCN_TX_CMDID, | |
| 70 | .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID, | |
| 71 | .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID, | |
| 72 | .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID, | |
| 73 | .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID, | |
| 74 | .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID, | |
| 75 | .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID, | |
| 76 | .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID, | |
| 77 | .addba_send_cmdid = WMI_ADDBA_SEND_CMDID, | |
| 78 | .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID, | |
| 79 | .delba_send_cmdid = WMI_DELBA_SEND_CMDID, | |
| 80 | .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID, | |
| 81 | .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID, | |
| 82 | .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID, | |
| 83 | .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID, | |
| 84 | .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID, | |
| 85 | .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID, | |
| 86 | .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID, | |
| 87 | .roam_scan_mode = WMI_ROAM_SCAN_MODE, | |
| 88 | .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD, | |
| 89 | .roam_scan_period = WMI_ROAM_SCAN_PERIOD, | |
| 90 | .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
| 91 | .roam_ap_profile = WMI_ROAM_AP_PROFILE, | |
| 92 | .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE, | |
| 93 | .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE, | |
| 94 | .ofl_scan_period = WMI_OFL_SCAN_PERIOD, | |
| 95 | .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO, | |
| 96 | .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY, | |
| 97 | .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE, | |
| 98 | .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE, | |
| 99 | .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID, | |
| 100 | .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID, | |
| 101 | .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID, | |
| 102 | .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID, | |
| 103 | .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID, | |
| 104 | .wlan_profile_set_hist_intvl_cmdid = | |
| 105 | WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
| 106 | .wlan_profile_get_profile_data_cmdid = | |
| 107 | WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
| 108 | .wlan_profile_enable_profile_id_cmdid = | |
| 109 | WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
| 110 | .wlan_profile_list_profile_id_cmdid = | |
| 111 | WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
| 112 | .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID, | |
| 113 | .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID, | |
| 114 | .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID, | |
| 115 | .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID, | |
| 116 | .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID, | |
| 117 | .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID, | |
| 118 | .wow_enable_disable_wake_event_cmdid = | |
| 119 | WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
| 120 | .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID, | |
| 121 | .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
| 122 | .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID, | |
| 123 | .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID, | |
| 124 | .vdev_spectral_scan_configure_cmdid = | |
| 125 | WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
| 126 | .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
| 127 | .request_stats_cmdid = WMI_REQUEST_STATS_CMDID, | |
| 128 | .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID, | |
| 129 | .network_list_offload_config_cmdid = | |
| 130 | WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID, | |
| 131 | .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID, | |
| 132 | .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID, | |
| 133 | .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, | |
| 134 | .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID, | |
| 135 | .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID, | |
| 136 | .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID, | |
| 137 | .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID, | |
| 138 | .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID, | |
| 139 | .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD, | |
| 140 | .echo_cmdid = WMI_ECHO_CMDID, | |
| 141 | .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID, | |
| 142 | .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID, | |
| 143 | .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID, | |
| 144 | .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID, | |
| 145 | .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID, | |
| 146 | .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID, | |
| 147 | .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID, | |
| 148 | .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID, | |
| 149 | .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID, | |
| a57a6a27 | 150 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
| 62f77f09 | 151 | .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, |
| 772b4aee RM |
152 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
| 153 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 154 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 155 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 156 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 157 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 158 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 159 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 160 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 161 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 162 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
| 163 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
| 164 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
| 165 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 166 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 167 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 168 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 169 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 170 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
| 171 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 172 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 173 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 174 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 175 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 176 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
| 177 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
| 178 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
| 179 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 180 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 181 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 182 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 183 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 184 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
| 185 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
| 186 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 187 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
| 188 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 189 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 190 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
| 191 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
| 192 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
| 193 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| ce42870e BM |
194 | }; |
| 195 | ||
| b7e3adf9 BM |
196 | /* 10.X WMI cmd track */ |
| 197 | static struct wmi_cmd_map wmi_10x_cmd_map = { | |
| 198 | .init_cmdid = WMI_10X_INIT_CMDID, | |
| 199 | .start_scan_cmdid = WMI_10X_START_SCAN_CMDID, | |
| 200 | .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID, | |
| 201 | .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID, | |
| 34957b25 | 202 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, |
| b7e3adf9 BM |
203 | .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID, |
| 204 | .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID, | |
| 205 | .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID, | |
| 206 | .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID, | |
| 207 | .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID, | |
| 208 | .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID, | |
| 209 | .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID, | |
| 210 | .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID, | |
| 211 | .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID, | |
| 212 | .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID, | |
| 213 | .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
| 214 | .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID, | |
| 215 | .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID, | |
| 216 | .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID, | |
| 217 | .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID, | |
| 218 | .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID, | |
| 219 | .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID, | |
| 220 | .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID, | |
| 221 | .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID, | |
| 222 | .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID, | |
| 223 | .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID, | |
| 224 | .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID, | |
| 225 | .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID, | |
| 226 | .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID, | |
| 227 | .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID, | |
| 228 | .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID, | |
| 229 | .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID, | |
| 230 | .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID, | |
| 231 | .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID, | |
| 232 | .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID, | |
| 233 | .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID, | |
| 234 | .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID, | |
| 34957b25 | 235 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, |
| b7e3adf9 BM |
236 | .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID, |
| 237 | .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID, | |
| 238 | .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID, | |
| 34957b25 | 239 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, |
| b7e3adf9 BM |
240 | .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID, |
| 241 | .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID, | |
| 242 | .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID, | |
| 243 | .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID, | |
| 244 | .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID, | |
| 245 | .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID, | |
| 246 | .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID, | |
| 247 | .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID, | |
| 248 | .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID, | |
| 249 | .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID, | |
| 250 | .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID, | |
| 251 | .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE, | |
| 252 | .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD, | |
| 253 | .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD, | |
| 254 | .roam_scan_rssi_change_threshold = | |
| 255 | WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
| 256 | .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE, | |
| 257 | .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE, | |
| 258 | .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE, | |
| 259 | .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD, | |
| 260 | .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO, | |
| 261 | .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY, | |
| 262 | .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE, | |
| 263 | .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE, | |
| 34957b25 | 264 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, |
| 542fb174 | 265 | .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID, |
| 34957b25 | 266 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, |
| b7e3adf9 BM |
267 | .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID, |
| 268 | .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID, | |
| 269 | .wlan_profile_set_hist_intvl_cmdid = | |
| 270 | WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
| 271 | .wlan_profile_get_profile_data_cmdid = | |
| 272 | WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
| 273 | .wlan_profile_enable_profile_id_cmdid = | |
| 274 | WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
| 275 | .wlan_profile_list_profile_id_cmdid = | |
| 276 | WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
| 277 | .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID, | |
| 278 | .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID, | |
| 279 | .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID, | |
| 280 | .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID, | |
| 281 | .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID, | |
| 282 | .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID, | |
| 283 | .wow_enable_disable_wake_event_cmdid = | |
| 284 | WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
| 285 | .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID, | |
| 286 | .wow_hostwakeup_from_sleep_cmdid = | |
| 287 | WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
| 288 | .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID, | |
| 289 | .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID, | |
| 290 | .vdev_spectral_scan_configure_cmdid = | |
| 291 | WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
| 292 | .vdev_spectral_scan_enable_cmdid = | |
| 293 | WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
| 294 | .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID, | |
| 34957b25 BM |
295 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, |
| 296 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 297 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 298 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 299 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
| 300 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
| 301 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 302 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 303 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
| 304 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
| 305 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
| b7e3adf9 BM |
306 | .echo_cmdid = WMI_10X_ECHO_CMDID, |
| 307 | .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID, | |
| 308 | .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID, | |
| 309 | .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID, | |
| 34957b25 BM |
310 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, |
| 311 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 312 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 313 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
| b7e3adf9 BM |
314 | .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID, |
| 315 | .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID, | |
| a57a6a27 | 316 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
| 62f77f09 | 317 | .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, |
| 772b4aee RM |
318 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
| 319 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 320 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 321 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 322 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 323 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 324 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 325 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 326 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 327 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 328 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
| 329 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
| 330 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
| 331 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 332 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 333 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 334 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 335 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 336 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
| 337 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 338 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 339 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 340 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 341 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 342 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
| 343 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
| 344 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
| 345 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 346 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 347 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 348 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 349 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 350 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
| 351 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
| 352 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 353 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
| 354 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 355 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 356 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
| 357 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
| 358 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
| 359 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| b7e3adf9 | 360 | }; |
| ce42870e | 361 | |
| 4a16fbec RM |
362 | /* 10.2.4 WMI cmd track */ |
| 363 | static struct wmi_cmd_map wmi_10_2_4_cmd_map = { | |
| 364 | .init_cmdid = WMI_10_2_INIT_CMDID, | |
| 365 | .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, | |
| 366 | .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, | |
| 367 | .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, | |
| 368 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 369 | .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, | |
| 370 | .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, | |
| 371 | .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, | |
| 372 | .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, | |
| 373 | .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, | |
| 374 | .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, | |
| 375 | .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, | |
| 376 | .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, | |
| 377 | .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, | |
| 378 | .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
| 379 | .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, | |
| 380 | .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, | |
| 381 | .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, | |
| 382 | .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, | |
| 383 | .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, | |
| 384 | .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, | |
| 385 | .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, | |
| 386 | .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, | |
| 387 | .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, | |
| 388 | .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, | |
| 389 | .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, | |
| 390 | .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, | |
| 391 | .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, | |
| 392 | .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, | |
| 393 | .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, | |
| 394 | .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, | |
| 395 | .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, | |
| 396 | .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, | |
| 397 | .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, | |
| 398 | .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, | |
| 399 | .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, | |
| 400 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 401 | .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, | |
| 402 | .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, | |
| 403 | .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, | |
| 404 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 405 | .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, | |
| 406 | .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, | |
| 407 | .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, | |
| 408 | .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, | |
| 409 | .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, | |
| 410 | .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, | |
| 411 | .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, | |
| 412 | .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, | |
| 413 | .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, | |
| 414 | .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, | |
| 415 | .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, | |
| 416 | .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, | |
| 417 | .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, | |
| 418 | .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, | |
| 419 | .roam_scan_rssi_change_threshold = | |
| 420 | WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
| 421 | .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, | |
| 422 | .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, | |
| 423 | .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, | |
| 424 | .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, | |
| 425 | .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, | |
| 426 | .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, | |
| 427 | .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, | |
| 428 | .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, | |
| 429 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, | |
| 430 | .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, | |
| 431 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, | |
| 432 | .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, | |
| 433 | .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, | |
| 434 | .wlan_profile_set_hist_intvl_cmdid = | |
| 435 | WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
| 436 | .wlan_profile_get_profile_data_cmdid = | |
| 437 | WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
| 438 | .wlan_profile_enable_profile_id_cmdid = | |
| 439 | WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
| 440 | .wlan_profile_list_profile_id_cmdid = | |
| 441 | WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
| 442 | .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, | |
| 443 | .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, | |
| 444 | .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, | |
| 445 | .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, | |
| 446 | .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, | |
| 447 | .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, | |
| 448 | .wow_enable_disable_wake_event_cmdid = | |
| 449 | WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
| 450 | .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, | |
| 451 | .wow_hostwakeup_from_sleep_cmdid = | |
| 452 | WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
| 453 | .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, | |
| 454 | .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, | |
| 455 | .vdev_spectral_scan_configure_cmdid = | |
| 456 | WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
| 457 | .vdev_spectral_scan_enable_cmdid = | |
| 458 | WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
| 459 | .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, | |
| 460 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 461 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 462 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 463 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 464 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
| 465 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
| 466 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 467 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 468 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
| 469 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
| 470 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
| 471 | .echo_cmdid = WMI_10_2_ECHO_CMDID, | |
| 472 | .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, | |
| 473 | .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, | |
| 474 | .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, | |
| 475 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 476 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 477 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 478 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
| 479 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, | |
| 480 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, | |
| a57a6a27 | 481 | .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, |
| 62f77f09 | 482 | .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS, |
| 772b4aee RM |
483 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
| 484 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 485 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 486 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 487 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 488 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 489 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 490 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 491 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 492 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 493 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
| 494 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
| 495 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
| 496 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 497 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 498 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 499 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 500 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 501 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
| 502 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 503 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 504 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 505 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 506 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 507 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
| 508 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
| 509 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
| 510 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 511 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 512 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 513 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 514 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 515 | .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED, | |
| 516 | .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED, | |
| 517 | .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 518 | .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED, | |
| 519 | .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 520 | .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 521 | .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED, | |
| 522 | .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED, | |
| 523 | .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED, | |
| 524 | .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 4a16fbec RM |
525 | }; |
| 526 | ||
| 2d491e69 RM |
527 | /* 10.4 WMI cmd track */ |
| 528 | static struct wmi_cmd_map wmi_10_4_cmd_map = { | |
| 529 | .init_cmdid = WMI_10_4_INIT_CMDID, | |
| 530 | .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID, | |
| 531 | .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID, | |
| 532 | .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID, | |
| 533 | .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID, | |
| 534 | .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID, | |
| 535 | .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID, | |
| 536 | .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID, | |
| 537 | .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID, | |
| 538 | .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID, | |
| 539 | .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID, | |
| 540 | .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID, | |
| 541 | .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID, | |
| 542 | .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID, | |
| 543 | .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID, | |
| 544 | .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
| 545 | .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID, | |
| 546 | .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID, | |
| 547 | .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID, | |
| 548 | .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID, | |
| 549 | .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID, | |
| 550 | .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID, | |
| 551 | .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID, | |
| 552 | .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID, | |
| 553 | .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID, | |
| 554 | .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID, | |
| 555 | .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID, | |
| 556 | .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID, | |
| 557 | .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID, | |
| 558 | .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID, | |
| 559 | .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID, | |
| 560 | .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID, | |
| 561 | .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID, | |
| 562 | .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID, | |
| 563 | .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID, | |
| 564 | .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID, | |
| 565 | .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID, | |
| 566 | .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID, | |
| 567 | .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID, | |
| 568 | .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID, | |
| 569 | .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID, | |
| 570 | .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID, | |
| 571 | .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID, | |
| 572 | .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID, | |
| 573 | .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID, | |
| 574 | .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID, | |
| 575 | .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID, | |
| 576 | .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID, | |
| 577 | .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID, | |
| 578 | .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID, | |
| 579 | .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID, | |
| 580 | .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID, | |
| 581 | .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID, | |
| 582 | .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE, | |
| 583 | .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD, | |
| 584 | .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD, | |
| 585 | .roam_scan_rssi_change_threshold = | |
| 586 | WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
| 587 | .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE, | |
| 588 | .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE, | |
| 589 | .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE, | |
| 590 | .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD, | |
| 591 | .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO, | |
| 592 | .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY, | |
| 593 | .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE, | |
| 594 | .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE, | |
| 595 | .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID, | |
| 596 | .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID, | |
| 597 | .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID, | |
| 598 | .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID, | |
| 599 | .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID, | |
| 600 | .wlan_profile_set_hist_intvl_cmdid = | |
| 601 | WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
| 602 | .wlan_profile_get_profile_data_cmdid = | |
| 603 | WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
| 604 | .wlan_profile_enable_profile_id_cmdid = | |
| 605 | WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
| 606 | .wlan_profile_list_profile_id_cmdid = | |
| 607 | WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
| 608 | .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID, | |
| 609 | .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID, | |
| 610 | .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID, | |
| 611 | .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID, | |
| 612 | .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID, | |
| 613 | .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID, | |
| 614 | .wow_enable_disable_wake_event_cmdid = | |
| 615 | WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
| 616 | .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID, | |
| 617 | .wow_hostwakeup_from_sleep_cmdid = | |
| 618 | WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
| 619 | .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID, | |
| 620 | .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID, | |
| 621 | .vdev_spectral_scan_configure_cmdid = | |
| 622 | WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
| 623 | .vdev_spectral_scan_enable_cmdid = | |
| 624 | WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
| 625 | .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID, | |
| 626 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 627 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 628 | .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID, | |
| 629 | .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID, | |
| 630 | .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID, | |
| 631 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
| 632 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 633 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 634 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
| 635 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
| 636 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
| 637 | .echo_cmdid = WMI_10_4_ECHO_CMDID, | |
| 638 | .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID, | |
| 639 | .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID, | |
| 640 | .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID, | |
| 641 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 642 | .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID, | |
| 643 | .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID, | |
| 644 | .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID, | |
| 645 | .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID, | |
| 646 | .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID, | |
| 647 | .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID, | |
| 648 | .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED, | |
| 649 | .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED, | |
| 650 | .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED, | |
| 651 | .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED, | |
| 652 | .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID, | |
| 653 | .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID, | |
| 654 | .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID, | |
| 655 | .wlan_peer_caching_add_peer_cmdid = | |
| 656 | WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID, | |
| 657 | .wlan_peer_caching_evict_peer_cmdid = | |
| 658 | WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID, | |
| 659 | .wlan_peer_caching_restore_peer_cmdid = | |
| 660 | WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID, | |
| 661 | .wlan_peer_caching_print_all_peers_info_cmdid = | |
| 662 | WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID, | |
| 663 | .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID, | |
| 664 | .peer_add_proxy_sta_entry_cmdid = | |
| 665 | WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID, | |
| 666 | .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID, | |
| 667 | .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID, | |
| 668 | .nan_cmdid = WMI_10_4_NAN_CMDID, | |
| 669 | .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID, | |
| 670 | .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID, | |
| 671 | .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID, | |
| 672 | .pdev_smart_ant_set_rx_antenna_cmdid = | |
| 673 | WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, | |
| 674 | .peer_smart_ant_set_tx_antenna_cmdid = | |
| 675 | WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, | |
| 676 | .peer_smart_ant_set_train_info_cmdid = | |
| 677 | WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, | |
| 678 | .peer_smart_ant_set_node_config_ops_cmdid = | |
| 679 | WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, | |
| 680 | .pdev_set_antenna_switch_table_cmdid = | |
| 681 | WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, | |
| 682 | .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID, | |
| 683 | .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID, | |
| 684 | .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID, | |
| 685 | .pdev_ratepwr_chainmsk_table_cmdid = | |
| 686 | WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID, | |
| 687 | .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID, | |
| 688 | .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID, | |
| 689 | .fwtest_cmdid = WMI_10_4_FWTEST_CMDID, | |
| 690 | .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID, | |
| 691 | .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID, | |
| 692 | .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID, | |
| 693 | .pdev_get_ani_ofdm_config_cmdid = | |
| 694 | WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID, | |
| 695 | .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID, | |
| 696 | .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID, | |
| 697 | .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID, | |
| 698 | .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID, | |
| 699 | .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID, | |
| 700 | .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID, | |
| 701 | .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID, | |
| 702 | .vdev_filter_neighbor_rx_packets_cmdid = | |
| 703 | WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, | |
| 704 | .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID, | |
| 705 | .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID, | |
| 706 | .pdev_bss_chan_info_request_cmdid = | |
| 707 | WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, | |
| 708 | }; | |
| 709 | ||
| 6d1506e7 BM |
710 | /* MAIN WMI VDEV param map */ |
| 711 | static struct wmi_vdev_param_map wmi_vdev_param_map = { | |
| 712 | .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD, | |
| 713 | .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
| 714 | .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL, | |
| 715 | .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL, | |
| 716 | .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE, | |
| 717 | .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE, | |
| 718 | .slot_time = WMI_VDEV_PARAM_SLOT_TIME, | |
| 719 | .preamble = WMI_VDEV_PARAM_PREAMBLE, | |
| 720 | .swba_time = WMI_VDEV_PARAM_SWBA_TIME, | |
| 721 | .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD, | |
| 722 | .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME, | |
| 723 | .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL, | |
| 724 | .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD, | |
| 725 | .wmi_vdev_oc_scheduler_air_time_limit = | |
| 726 | WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
| 727 | .wds = WMI_VDEV_PARAM_WDS, | |
| 728 | .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW, | |
| 729 | .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX, | |
| 730 | .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT, | |
| 731 | .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT, | |
| 732 | .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM, | |
| 733 | .chwidth = WMI_VDEV_PARAM_CHWIDTH, | |
| 734 | .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET, | |
| 735 | .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION, | |
| 736 | .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT, | |
| 737 | .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE, | |
| 738 | .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE, | |
| 739 | .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE, | |
| 740 | .sgi = WMI_VDEV_PARAM_SGI, | |
| 741 | .ldpc = WMI_VDEV_PARAM_LDPC, | |
| 742 | .tx_stbc = WMI_VDEV_PARAM_TX_STBC, | |
| 743 | .rx_stbc = WMI_VDEV_PARAM_RX_STBC, | |
| 744 | .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD, | |
| 745 | .def_keyid = WMI_VDEV_PARAM_DEF_KEYID, | |
| 746 | .nss = WMI_VDEV_PARAM_NSS, | |
| 747 | .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE, | |
| 748 | .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE, | |
| 749 | .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE, | |
| 750 | .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE, | |
| 751 | .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
| 752 | .ap_keepalive_min_idle_inactive_time_secs = | |
| 753 | WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
| 754 | .ap_keepalive_max_idle_inactive_time_secs = | |
| 755 | WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
| 756 | .ap_keepalive_max_unresponsive_time_secs = | |
| 757 | WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
| 758 | .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS, | |
| 759 | .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 760 | .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS, | |
| 761 | .txbf = WMI_VDEV_PARAM_TXBF, | |
| 762 | .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE, | |
| 763 | .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY, | |
| 764 | .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE, | |
| 765 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
| 766 | WMI_VDEV_PARAM_UNSUPPORTED, | |
| 93841a15 RM |
767 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
| 768 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 769 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 770 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 771 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 772 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 773 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 774 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 775 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 776 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 777 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 778 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 779 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 780 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 781 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 782 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 6d1506e7 BM |
783 | }; |
| 784 | ||
| 785 | /* 10.X WMI VDEV param map */ | |
| 786 | static struct wmi_vdev_param_map wmi_10x_vdev_param_map = { | |
| 787 | .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, | |
| 788 | .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
| 789 | .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, | |
| 790 | .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, | |
| 791 | .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, | |
| 792 | .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, | |
| 793 | .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, | |
| 794 | .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, | |
| 795 | .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, | |
| 796 | .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, | |
| 797 | .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, | |
| 798 | .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, | |
| 799 | .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, | |
| 800 | .wmi_vdev_oc_scheduler_air_time_limit = | |
| 801 | WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
| 802 | .wds = WMI_10X_VDEV_PARAM_WDS, | |
| 803 | .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, | |
| 804 | .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, | |
| 805 | .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 806 | .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 807 | .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, | |
| 808 | .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, | |
| 809 | .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, | |
| 810 | .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, | |
| 811 | .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, | |
| 812 | .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, | |
| 813 | .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, | |
| 814 | .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, | |
| 815 | .sgi = WMI_10X_VDEV_PARAM_SGI, | |
| 816 | .ldpc = WMI_10X_VDEV_PARAM_LDPC, | |
| 817 | .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, | |
| 818 | .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, | |
| 819 | .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, | |
| 820 | .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, | |
| 821 | .nss = WMI_10X_VDEV_PARAM_NSS, | |
| 822 | .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, | |
| 823 | .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, | |
| 824 | .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, | |
| 825 | .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, | |
| 826 | .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
| 827 | .ap_keepalive_min_idle_inactive_time_secs = | |
| 828 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
| 829 | .ap_keepalive_max_idle_inactive_time_secs = | |
| 830 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
| 831 | .ap_keepalive_max_unresponsive_time_secs = | |
| 832 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
| 833 | .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, | |
| 834 | .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, | |
| 835 | .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, | |
| 836 | .txbf = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 837 | .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 838 | .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 839 | .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 840 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
| 841 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
| 93841a15 RM |
842 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
| 843 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 844 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 845 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 846 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 847 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 848 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 849 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 850 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 851 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 852 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 853 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 854 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 855 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 856 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 857 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 6d1506e7 BM |
858 | }; |
| 859 | ||
| 4a16fbec RM |
860 | static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = { |
| 861 | .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, | |
| 862 | .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
| 863 | .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, | |
| 864 | .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, | |
| 865 | .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, | |
| 866 | .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, | |
| 867 | .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, | |
| 868 | .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, | |
| 869 | .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, | |
| 870 | .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, | |
| 871 | .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, | |
| 872 | .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, | |
| 873 | .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, | |
| 874 | .wmi_vdev_oc_scheduler_air_time_limit = | |
| 875 | WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
| 876 | .wds = WMI_10X_VDEV_PARAM_WDS, | |
| 877 | .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, | |
| 878 | .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, | |
| 879 | .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 880 | .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 881 | .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, | |
| 882 | .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, | |
| 883 | .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, | |
| 884 | .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, | |
| 885 | .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, | |
| 886 | .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, | |
| 887 | .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, | |
| 888 | .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, | |
| 889 | .sgi = WMI_10X_VDEV_PARAM_SGI, | |
| 890 | .ldpc = WMI_10X_VDEV_PARAM_LDPC, | |
| 891 | .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, | |
| 892 | .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, | |
| 893 | .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, | |
| 894 | .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, | |
| 895 | .nss = WMI_10X_VDEV_PARAM_NSS, | |
| 896 | .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, | |
| 897 | .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, | |
| 898 | .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, | |
| 899 | .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, | |
| 900 | .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
| 901 | .ap_keepalive_min_idle_inactive_time_secs = | |
| 902 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
| 903 | .ap_keepalive_max_idle_inactive_time_secs = | |
| 904 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
| 905 | .ap_keepalive_max_unresponsive_time_secs = | |
| 906 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
| 907 | .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, | |
| 908 | .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, | |
| 909 | .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, | |
| 910 | .txbf = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 911 | .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 912 | .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 913 | .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 914 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
| 915 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
| 93841a15 RM |
916 | .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED, |
| 917 | .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 918 | .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 919 | .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 920 | .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 921 | .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 922 | .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 923 | .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 924 | .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 925 | .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 926 | .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 927 | .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 928 | .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 929 | .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 930 | .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 931 | .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED, | |
| 932 | }; | |
| 933 | ||
| 934 | static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = { | |
| 935 | .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD, | |
| 936 | .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | |
| 937 | .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL, | |
| 938 | .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL, | |
| 939 | .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE, | |
| 940 | .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE, | |
| 941 | .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME, | |
| 942 | .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE, | |
| 943 | .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME, | |
| 944 | .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD, | |
| 945 | .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME, | |
| 946 | .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL, | |
| 947 | .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD, | |
| 948 | .wmi_vdev_oc_scheduler_air_time_limit = | |
| 949 | WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | |
| 950 | .wds = WMI_10_4_VDEV_PARAM_WDS, | |
| 951 | .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW, | |
| 952 | .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX, | |
| 953 | .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT, | |
| 954 | .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT, | |
| 955 | .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM, | |
| 956 | .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH, | |
| 957 | .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET, | |
| 958 | .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION, | |
| 959 | .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT, | |
| 960 | .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE, | |
| 961 | .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE, | |
| 962 | .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE, | |
| 963 | .sgi = WMI_10_4_VDEV_PARAM_SGI, | |
| 964 | .ldpc = WMI_10_4_VDEV_PARAM_LDPC, | |
| 965 | .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC, | |
| 966 | .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC, | |
| 967 | .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD, | |
| 968 | .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID, | |
| 969 | .nss = WMI_10_4_VDEV_PARAM_NSS, | |
| 970 | .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE, | |
| 971 | .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE, | |
| 972 | .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE, | |
| 973 | .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE, | |
| 974 | .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | |
| 975 | .ap_keepalive_min_idle_inactive_time_secs = | |
| 976 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | |
| 977 | .ap_keepalive_max_idle_inactive_time_secs = | |
| 978 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | |
| 979 | .ap_keepalive_max_unresponsive_time_secs = | |
| 980 | WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | |
| 981 | .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS, | |
| 982 | .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET, | |
| 983 | .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS, | |
| 984 | .txbf = WMI_10_4_VDEV_PARAM_TXBF, | |
| 985 | .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE, | |
| 986 | .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY, | |
| 987 | .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE, | |
| 988 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | |
| 989 | WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | |
| 990 | .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES, | |
| 991 | .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR, | |
| 992 | .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET, | |
| 993 | .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE, | |
| 994 | .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK, | |
| 995 | .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK, | |
| 996 | .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, | |
| 997 | .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, | |
| 998 | .early_rx_bmiss_sample_cycle = | |
| 999 | WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, | |
| 1000 | .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP, | |
| 1001 | .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP, | |
| 1002 | .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, | |
| 1003 | .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA, | |
| 1004 | .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC, | |
| 1005 | .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE, | |
| 1006 | .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK, | |
| 4a16fbec RM |
1007 | }; |
| 1008 | ||
| 226a339b BM |
1009 | static struct wmi_pdev_param_map wmi_pdev_param_map = { |
| 1010 | .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK, | |
| 1011 | .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK, | |
| 1012 | .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G, | |
| 1013 | .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G, | |
| 1014 | .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE, | |
| 1015 | .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE, | |
| 1016 | .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE, | |
| 1017 | .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
| 1018 | .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE, | |
| 1019 | .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW, | |
| 1020 | .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
| 1021 | .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH, | |
| 1022 | .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH, | |
| 1023 | .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
| 1024 | .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE, | |
| 1025 | .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
| 1026 | .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
| 1027 | .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
| 1028 | .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
| 1029 | .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
| 1030 | .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
| 1031 | .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE, | |
| 1032 | .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
| 1033 | .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE, | |
| 1034 | .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE, | |
| 1035 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, | |
| 1036 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
| 1037 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
| 1038 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, | |
| 1039 | .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
| 1040 | .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
| 1041 | .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
| 1042 | .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
| 1043 | .pmf_qos = WMI_PDEV_PARAM_PMF_QOS, | |
| 1044 | .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE, | |
| 226a339b BM |
1045 | .dcs = WMI_PDEV_PARAM_DCS, |
| 1046 | .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE, | |
| 1047 | .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD, | |
| 1048 | .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
| 1049 | .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL, | |
| 1050 | .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL, | |
| 1051 | .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN, | |
| 1052 | .proxy_sta = WMI_PDEV_PARAM_PROXY_STA, | |
| 1053 | .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG, | |
| 1054 | .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP, | |
| 1055 | .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1056 | .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1057 | .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| a7bd3e99 | 1058 | .cal_period = WMI_PDEV_PARAM_UNSUPPORTED, |
| d86561ff RM |
1059 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
| 1060 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1061 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1062 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1063 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1064 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1065 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1066 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1067 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1068 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1069 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1070 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1071 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1072 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1073 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1074 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1075 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1076 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1077 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1078 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1079 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1080 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1081 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1082 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1083 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1084 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1085 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1086 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1087 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1088 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1089 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1090 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1091 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1092 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1093 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1094 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1095 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1096 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1097 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1098 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1099 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1100 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 226a339b BM |
1101 | }; |
| 1102 | ||
| 1103 | static struct wmi_pdev_param_map wmi_10x_pdev_param_map = { | |
| 1104 | .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, | |
| 1105 | .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, | |
| 1106 | .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, | |
| 1107 | .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, | |
| 1108 | .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, | |
| 1109 | .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, | |
| 1110 | .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, | |
| 1111 | .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
| 1112 | .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, | |
| 1113 | .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, | |
| 1114 | .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
| 1115 | .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, | |
| 1116 | .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, | |
| 1117 | .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
| 1118 | .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, | |
| 1119 | .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
| 1120 | .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
| 1121 | .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
| 1122 | .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
| 1123 | .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
| 1124 | .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
| 1125 | .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, | |
| 1126 | .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
| 1127 | .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, | |
| 1128 | .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, | |
| 1129 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1130 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1131 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1132 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1133 | .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
| 1134 | .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
| 1135 | .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
| 1136 | .bcnflt_stats_update_period = | |
| 1137 | WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
| 1138 | .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, | |
| ab6258ed | 1139 | .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, |
| 226a339b BM |
1140 | .dcs = WMI_10X_PDEV_PARAM_DCS, |
| 1141 | .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, | |
| 1142 | .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, | |
| 1143 | .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
| 1144 | .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, | |
| 1145 | .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, | |
| 1146 | .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, | |
| 1147 | .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1148 | .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1149 | .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1150 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, | |
| 1151 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, | |
| 1152 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, | |
| a7bd3e99 | 1153 | .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, |
| d86561ff RM |
1154 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
| 1155 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1156 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1157 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1158 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1159 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1160 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1161 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1162 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1163 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1164 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1165 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1166 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1167 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1168 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1169 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1170 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1171 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1172 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1173 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1174 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1175 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1176 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1177 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1178 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1179 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1180 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1181 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1182 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1183 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1184 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1185 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1186 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1187 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1188 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1189 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1190 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1191 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1192 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1193 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1194 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1195 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 226a339b BM |
1196 | }; |
| 1197 | ||
| 4a16fbec RM |
1198 | static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = { |
| 1199 | .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, | |
| 1200 | .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, | |
| 1201 | .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, | |
| 1202 | .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, | |
| 1203 | .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, | |
| 1204 | .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, | |
| 1205 | .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, | |
| 1206 | .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
| 1207 | .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, | |
| 1208 | .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, | |
| 1209 | .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
| 1210 | .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, | |
| 1211 | .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, | |
| 1212 | .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
| 1213 | .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, | |
| 1214 | .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
| 1215 | .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
| 1216 | .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
| 1217 | .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
| 1218 | .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
| 1219 | .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
| 1220 | .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, | |
| 1221 | .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
| 1222 | .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, | |
| 1223 | .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, | |
| 1224 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1225 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1226 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1227 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1228 | .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
| 1229 | .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
| 1230 | .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
| 1231 | .bcnflt_stats_update_period = | |
| 1232 | WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
| 1233 | .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, | |
| 1234 | .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, | |
| 1235 | .dcs = WMI_10X_PDEV_PARAM_DCS, | |
| 1236 | .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, | |
| 1237 | .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, | |
| 1238 | .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
| 1239 | .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, | |
| 1240 | .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, | |
| 1241 | .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, | |
| 1242 | .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1243 | .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1244 | .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1245 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, | |
| 1246 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, | |
| 1247 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, | |
| 1248 | .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, | |
| d86561ff RM |
1249 | .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED, |
| 1250 | .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1251 | .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1252 | .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1253 | .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1254 | .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1255 | .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1256 | .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1257 | .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1258 | .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1259 | .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1260 | .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1261 | .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1262 | .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1263 | .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1264 | .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1265 | .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1266 | .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1267 | .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1268 | .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1269 | .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1270 | .en_stats = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1271 | .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1272 | .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1273 | .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1274 | .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1275 | .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1276 | .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1277 | .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1278 | .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1279 | .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1280 | .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1281 | .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1282 | .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1283 | .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1284 | .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1285 | .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1286 | .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1287 | .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1288 | .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1289 | .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 1290 | .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED, | |
| 4a16fbec RM |
1291 | }; |
| 1292 | ||
| 24c88f78 MK |
1293 | /* firmware 10.2 specific mappings */ |
| 1294 | static struct wmi_cmd_map wmi_10_2_cmd_map = { | |
| 1295 | .init_cmdid = WMI_10_2_INIT_CMDID, | |
| 1296 | .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, | |
| 1297 | .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, | |
| 1298 | .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, | |
| 1299 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1300 | .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, | |
| 1301 | .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, | |
| 1302 | .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, | |
| 1303 | .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, | |
| 1304 | .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, | |
| 1305 | .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, | |
| 1306 | .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, | |
| 1307 | .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, | |
| 1308 | .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, | |
| 1309 | .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, | |
| 1310 | .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, | |
| 1311 | .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, | |
| 1312 | .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, | |
| 1313 | .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, | |
| 1314 | .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, | |
| 1315 | .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, | |
| 1316 | .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, | |
| 1317 | .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, | |
| 1318 | .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, | |
| 1319 | .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, | |
| 1320 | .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, | |
| 1321 | .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, | |
| 1322 | .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, | |
| 1323 | .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, | |
| 1324 | .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, | |
| 1325 | .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, | |
| 1326 | .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, | |
| 1327 | .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, | |
| 1328 | .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, | |
| 1329 | .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, | |
| 1330 | .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, | |
| 1331 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1332 | .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, | |
| 1333 | .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, | |
| 1334 | .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, | |
| 1335 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1336 | .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, | |
| 1337 | .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, | |
| 1338 | .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, | |
| 1339 | .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, | |
| 1340 | .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, | |
| 1341 | .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, | |
| 1342 | .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, | |
| 1343 | .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, | |
| 1344 | .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, | |
| 1345 | .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, | |
| 1346 | .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, | |
| 1347 | .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, | |
| 1348 | .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, | |
| 1349 | .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, | |
| 1350 | .roam_scan_rssi_change_threshold = | |
| 1351 | WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | |
| 1352 | .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, | |
| 1353 | .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, | |
| 1354 | .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, | |
| 1355 | .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, | |
| 1356 | .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, | |
| 1357 | .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, | |
| 1358 | .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, | |
| 1359 | .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, | |
| 1360 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1361 | .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, | |
| 1362 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1363 | .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, | |
| 1364 | .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, | |
| 1365 | .wlan_profile_set_hist_intvl_cmdid = | |
| 1366 | WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | |
| 1367 | .wlan_profile_get_profile_data_cmdid = | |
| 1368 | WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | |
| 1369 | .wlan_profile_enable_profile_id_cmdid = | |
| 1370 | WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | |
| 1371 | .wlan_profile_list_profile_id_cmdid = | |
| 1372 | WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | |
| 1373 | .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, | |
| 1374 | .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, | |
| 1375 | .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, | |
| 1376 | .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, | |
| 1377 | .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, | |
| 1378 | .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, | |
| 1379 | .wow_enable_disable_wake_event_cmdid = | |
| 1380 | WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | |
| 1381 | .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, | |
| 1382 | .wow_hostwakeup_from_sleep_cmdid = | |
| 1383 | WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | |
| 1384 | .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, | |
| 1385 | .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, | |
| 1386 | .vdev_spectral_scan_configure_cmdid = | |
| 1387 | WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | |
| 1388 | .vdev_spectral_scan_enable_cmdid = | |
| 1389 | WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | |
| 1390 | .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, | |
| 1391 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1392 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1393 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1394 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1395 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1396 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1397 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1398 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1399 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1400 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1401 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | |
| 1402 | .echo_cmdid = WMI_10_2_ECHO_CMDID, | |
| 1403 | .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, | |
| 1404 | .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, | |
| 1405 | .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, | |
| 1406 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1407 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1408 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1409 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1410 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, | |
| 1411 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, | |
| a57a6a27 | 1412 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, |
| 62f77f09 | 1413 | .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED, |
| 772b4aee RM |
1414 | .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED, |
| 1415 | .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1416 | .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1417 | .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1418 | .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1419 | .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1420 | .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1421 | .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1422 | .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1423 | .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1424 | .oem_req_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1425 | .nan_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1426 | .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1427 | .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1428 | .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1429 | .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1430 | .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1431 | .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1432 | .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1433 | .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1434 | .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1435 | .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1436 | .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1437 | .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1438 | .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1439 | .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1440 | .fwtest_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1441 | .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1442 | .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1443 | .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1444 | .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED, | |
| 1445 | .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED, | |
| 24c88f78 MK |
1446 | }; |
| 1447 | ||
| d86561ff RM |
1448 | static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = { |
| 1449 | .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK, | |
| 1450 | .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK, | |
| 1451 | .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G, | |
| 1452 | .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G, | |
| 1453 | .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE, | |
| 1454 | .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE, | |
| 1455 | .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE, | |
| 1456 | .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | |
| 1457 | .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE, | |
| 1458 | .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW, | |
| 1459 | .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | |
| 1460 | .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH, | |
| 1461 | .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH, | |
| 1462 | .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING, | |
| 1463 | .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE, | |
| 1464 | .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE, | |
| 1465 | .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK, | |
| 1466 | .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI, | |
| 1467 | .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO, | |
| 1468 | .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | |
| 1469 | .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | |
| 1470 | .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE, | |
| 1471 | .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | |
| 1472 | .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE, | |
| 1473 | .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE, | |
| 1474 | .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH, | |
| 1475 | .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, | |
| 1476 | .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, | |
| 1477 | .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, | |
| 1478 | .pdev_stats_update_period = | |
| 1479 | WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | |
| 1480 | .vdev_stats_update_period = | |
| 1481 | WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | |
| 1482 | .peer_stats_update_period = | |
| 1483 | WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | |
| 1484 | .bcnflt_stats_update_period = | |
| 1485 | WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | |
| 1486 | .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS, | |
| 1487 | .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE, | |
| 1488 | .dcs = WMI_10_4_PDEV_PARAM_DCS, | |
| 1489 | .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE, | |
| 1490 | .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD, | |
| 1491 | .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD, | |
| 1492 | .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL, | |
| 1493 | .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL, | |
| 1494 | .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN, | |
| 1495 | .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA, | |
| 1496 | .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG, | |
| 1497 | .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP, | |
| 1498 | .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET, | |
| 1499 | .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR, | |
| 1500 | .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE, | |
| 1501 | .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD, | |
| 1502 | .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST, | |
| 1503 | .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE, | |
| 1504 | .smart_antenna_default_antenna = | |
| 1505 | WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, | |
| 1506 | .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE, | |
| 1507 | .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID, | |
| 1508 | .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN, | |
| 1509 | .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER, | |
| 1510 | .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID, | |
| 1511 | .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE, | |
| 1512 | .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE, | |
| 1513 | .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, | |
| 1514 | .remove_mcast2ucast_buffer = | |
| 1515 | WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, | |
| 1516 | .peer_sta_ps_statechg_enable = | |
| 1517 | WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE, | |
| 1518 | .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, | |
| 1519 | .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS, | |
| 1520 | .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID, | |
| 1521 | .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID, | |
| 1522 | .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID, | |
| 1523 | .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, | |
| 1524 | .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID, | |
| 1525 | .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID, | |
| 1526 | .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS, | |
| 1527 | .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY, | |
| 1528 | .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION, | |
| 1529 | .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD, | |
| 1530 | .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE, | |
| 1531 | .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO, | |
| 1532 | .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH, | |
| 1533 | .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION, | |
| 1534 | .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN, | |
| 1535 | .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT, | |
| 1536 | .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL, | |
| 1537 | .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G, | |
| 1538 | .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G, | |
| 1539 | .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU, | |
| 1540 | .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU, | |
| 1541 | .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD, | |
| 1542 | .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE, | |
| 1543 | .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET, | |
| 1544 | .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET, | |
| 1545 | .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR, | |
| 1546 | .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR, | |
| 1547 | }; | |
| 1548 | ||
| 3fab30f7 T |
1549 | static const struct wmi_peer_flags_map wmi_peer_flags_map = { |
| 1550 | .auth = WMI_PEER_AUTH, | |
| 1551 | .qos = WMI_PEER_QOS, | |
| 1552 | .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY, | |
| 1553 | .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY, | |
| 1554 | .apsd = WMI_PEER_APSD, | |
| 1555 | .ht = WMI_PEER_HT, | |
| 1556 | .bw40 = WMI_PEER_40MHZ, | |
| 1557 | .stbc = WMI_PEER_STBC, | |
| 1558 | .ldbc = WMI_PEER_LDPC, | |
| 1559 | .dyn_mimops = WMI_PEER_DYN_MIMOPS, | |
| 1560 | .static_mimops = WMI_PEER_STATIC_MIMOPS, | |
| 1561 | .spatial_mux = WMI_PEER_SPATIAL_MUX, | |
| 1562 | .vht = WMI_PEER_VHT, | |
| 1563 | .bw80 = WMI_PEER_80MHZ, | |
| 1564 | .vht_2g = WMI_PEER_VHT_2G, | |
| 1565 | .pmf = WMI_PEER_PMF, | |
| 1566 | }; | |
| 1567 | ||
| 1568 | static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = { | |
| 1569 | .auth = WMI_10X_PEER_AUTH, | |
| 1570 | .qos = WMI_10X_PEER_QOS, | |
| 1571 | .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY, | |
| 1572 | .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY, | |
| 1573 | .apsd = WMI_10X_PEER_APSD, | |
| 1574 | .ht = WMI_10X_PEER_HT, | |
| 1575 | .bw40 = WMI_10X_PEER_40MHZ, | |
| 1576 | .stbc = WMI_10X_PEER_STBC, | |
| 1577 | .ldbc = WMI_10X_PEER_LDPC, | |
| 1578 | .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS, | |
| 1579 | .static_mimops = WMI_10X_PEER_STATIC_MIMOPS, | |
| 1580 | .spatial_mux = WMI_10X_PEER_SPATIAL_MUX, | |
| 1581 | .vht = WMI_10X_PEER_VHT, | |
| 1582 | .bw80 = WMI_10X_PEER_80MHZ, | |
| 1583 | }; | |
| 1584 | ||
| 1585 | static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = { | |
| 1586 | .auth = WMI_10_2_PEER_AUTH, | |
| 1587 | .qos = WMI_10_2_PEER_QOS, | |
| 1588 | .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY, | |
| 1589 | .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY, | |
| 1590 | .apsd = WMI_10_2_PEER_APSD, | |
| 1591 | .ht = WMI_10_2_PEER_HT, | |
| 1592 | .bw40 = WMI_10_2_PEER_40MHZ, | |
| 1593 | .stbc = WMI_10_2_PEER_STBC, | |
| 1594 | .ldbc = WMI_10_2_PEER_LDPC, | |
| 1595 | .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS, | |
| 1596 | .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS, | |
| 1597 | .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX, | |
| 1598 | .vht = WMI_10_2_PEER_VHT, | |
| 1599 | .bw80 = WMI_10_2_PEER_80MHZ, | |
| 1600 | .vht_2g = WMI_10_2_PEER_VHT_2G, | |
| 1601 | .pmf = WMI_10_2_PEER_PMF, | |
| 1602 | }; | |
| 1603 | ||
| 0226d602 MK |
1604 | void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, |
| 1605 | const struct wmi_channel_arg *arg) | |
| 2d66721c MK |
1606 | { |
| 1607 | u32 flags = 0; | |
| 1608 | ||
| 1609 | memset(ch, 0, sizeof(*ch)); | |
| 1610 | ||
| 1611 | if (arg->passive) | |
| 1612 | flags |= WMI_CHAN_FLAG_PASSIVE; | |
| 1613 | if (arg->allow_ibss) | |
| 1614 | flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED; | |
| 1615 | if (arg->allow_ht) | |
| 1616 | flags |= WMI_CHAN_FLAG_ALLOW_HT; | |
| 1617 | if (arg->allow_vht) | |
| 1618 | flags |= WMI_CHAN_FLAG_ALLOW_VHT; | |
| 1619 | if (arg->ht40plus) | |
| 1620 | flags |= WMI_CHAN_FLAG_HT40_PLUS; | |
| 1621 | if (arg->chan_radar) | |
| 1622 | flags |= WMI_CHAN_FLAG_DFS; | |
| 1623 | ||
| 1624 | ch->mhz = __cpu_to_le32(arg->freq); | |
| 1625 | ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1); | |
| 1626 | ch->band_center_freq2 = 0; | |
| 1627 | ch->min_power = arg->min_power; | |
| 1628 | ch->max_power = arg->max_power; | |
| 1629 | ch->reg_power = arg->max_reg_power; | |
| 1630 | ch->antenna_max = arg->max_antenna_gain; | |
| 1631 | ||
| 1632 | /* mode & flags share storage */ | |
| 1633 | ch->mode = arg->mode; | |
| 1634 | ch->flags |= __cpu_to_le32(flags); | |
| 1635 | } | |
| 1636 | ||
| 5e3dd157 KV |
1637 | int ath10k_wmi_wait_for_service_ready(struct ath10k *ar) |
| 1638 | { | |
| 9eea5689 | 1639 | unsigned long time_left; |
| af762c0b | 1640 | |
| 9eea5689 NMG |
1641 | time_left = wait_for_completion_timeout(&ar->wmi.service_ready, |
| 1642 | WMI_SERVICE_READY_TIMEOUT_HZ); | |
| 1643 | if (!time_left) | |
| 1644 | return -ETIMEDOUT; | |
| 1645 | return 0; | |
| 5e3dd157 KV |
1646 | } |
| 1647 | ||
| 1648 | int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar) | |
| 1649 | { | |
| 9eea5689 | 1650 | unsigned long time_left; |
| af762c0b | 1651 | |
| 9eea5689 NMG |
1652 | time_left = wait_for_completion_timeout(&ar->wmi.unified_ready, |
| 1653 | WMI_UNIFIED_READY_TIMEOUT_HZ); | |
| 1654 | if (!time_left) | |
| 1655 | return -ETIMEDOUT; | |
| 1656 | return 0; | |
| 5e3dd157 KV |
1657 | } |
| 1658 | ||
| 666a73f3 | 1659 | struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len) |
| 5e3dd157 KV |
1660 | { |
| 1661 | struct sk_buff *skb; | |
| 1662 | u32 round_len = roundup(len, 4); | |
| 1663 | ||
| 7aa7a72a | 1664 | skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len); |
| 5e3dd157 KV |
1665 | if (!skb) |
| 1666 | return NULL; | |
| 1667 | ||
| 1668 | skb_reserve(skb, WMI_SKB_HEADROOM); | |
| 1669 | if (!IS_ALIGNED((unsigned long)skb->data, 4)) | |
| 7aa7a72a | 1670 | ath10k_warn(ar, "Unaligned WMI skb\n"); |
| 5e3dd157 KV |
1671 | |
| 1672 | skb_put(skb, round_len); | |
| 1673 | memset(skb->data, 0, round_len); | |
| 1674 | ||
| 1675 | return skb; | |
| 1676 | } | |
| 1677 | ||
| 1678 | static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb) | |
| 1679 | { | |
| 1680 | dev_kfree_skb(skb); | |
| 5e3dd157 KV |
1681 | } |
| 1682 | ||
| d7579d12 MK |
1683 | int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, |
| 1684 | u32 cmd_id) | |
| 5e3dd157 KV |
1685 | { |
| 1686 | struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb); | |
| 1687 | struct wmi_cmd_hdr *cmd_hdr; | |
| be8b3943 | 1688 | int ret; |
| 5e3dd157 KV |
1689 | u32 cmd = 0; |
| 1690 | ||
| 1691 | if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
| 1692 | return -ENOMEM; | |
| 1693 | ||
| 1694 | cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID); | |
| 1695 | ||
| 1696 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
| 1697 | cmd_hdr->cmd_id = __cpu_to_le32(cmd); | |
| 1698 | ||
| 5e3dd157 | 1699 | memset(skb_cb, 0, sizeof(*skb_cb)); |
| be8b3943 | 1700 | ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb); |
| d35a6c18 | 1701 | trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret); |
| 5e3dd157 | 1702 | |
| be8b3943 MK |
1703 | if (ret) |
| 1704 | goto err_pull; | |
| 5e3dd157 | 1705 | |
| be8b3943 MK |
1706 | return 0; |
| 1707 | ||
| 1708 | err_pull: | |
| 1709 | skb_pull(skb, sizeof(struct wmi_cmd_hdr)); | |
| 1710 | return ret; | |
| 1711 | } | |
| 1712 | ||
| ed54388a MK |
1713 | static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif) |
| 1714 | { | |
| af21319f | 1715 | struct ath10k *ar = arvif->ar; |
| 9ad50182 | 1716 | struct ath10k_skb_cb *cb; |
| af21319f | 1717 | struct sk_buff *bcn; |
| 66b8a010 MK |
1718 | bool dtim_zero; |
| 1719 | bool deliver_cab; | |
| ed54388a MK |
1720 | int ret; |
| 1721 | ||
| af21319f | 1722 | spin_lock_bh(&ar->data_lock); |
| ed54388a | 1723 | |
| af21319f | 1724 | bcn = arvif->beacon; |
| ed54388a | 1725 | |
| af21319f MK |
1726 | if (!bcn) |
| 1727 | goto unlock; | |
| ed54388a | 1728 | |
| 9ad50182 | 1729 | cb = ATH10K_SKB_CB(bcn); |
| ed54388a | 1730 | |
| af21319f MK |
1731 | switch (arvif->beacon_state) { |
| 1732 | case ATH10K_BEACON_SENDING: | |
| 1733 | case ATH10K_BEACON_SENT: | |
| 1734 | break; | |
| 1735 | case ATH10K_BEACON_SCHEDULED: | |
| 1736 | arvif->beacon_state = ATH10K_BEACON_SENDING; | |
| 1737 | spin_unlock_bh(&ar->data_lock); | |
| 1738 | ||
| 66b8a010 MK |
1739 | dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO); |
| 1740 | deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB); | |
| af21319f MK |
1741 | ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar, |
| 1742 | arvif->vdev_id, | |
| 1743 | bcn->data, bcn->len, | |
| 1744 | cb->paddr, | |
| 66b8a010 MK |
1745 | dtim_zero, |
| 1746 | deliver_cab); | |
| af21319f MK |
1747 | |
| 1748 | spin_lock_bh(&ar->data_lock); | |
| 1749 | ||
| 1750 | if (ret == 0) | |
| 1751 | arvif->beacon_state = ATH10K_BEACON_SENT; | |
| 1752 | else | |
| 1753 | arvif->beacon_state = ATH10K_BEACON_SCHEDULED; | |
| 1754 | } | |
| ed54388a | 1755 | |
| af21319f MK |
1756 | unlock: |
| 1757 | spin_unlock_bh(&ar->data_lock); | |
| ed54388a MK |
1758 | } |
| 1759 | ||
| 1760 | static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac, | |
| 1761 | struct ieee80211_vif *vif) | |
| 1762 | { | |
| 1763 | struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif); | |
| 1764 | ||
| 1765 | ath10k_wmi_tx_beacon_nowait(arvif); | |
| 1766 | } | |
| 1767 | ||
| 1768 | static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar) | |
| 1769 | { | |
| ed54388a MK |
1770 | ieee80211_iterate_active_interfaces_atomic(ar->hw, |
| 1771 | IEEE80211_IFACE_ITER_NORMAL, | |
| 1772 | ath10k_wmi_tx_beacons_iter, | |
| 1773 | NULL); | |
| ed54388a MK |
1774 | } |
| 1775 | ||
| 12acbc43 | 1776 | static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar) |
| be8b3943 | 1777 | { |
| ed54388a MK |
1778 | /* try to send pending beacons first. they take priority */ |
| 1779 | ath10k_wmi_tx_beacons_nowait(ar); | |
| 1780 | ||
| be8b3943 MK |
1781 | wake_up(&ar->wmi.tx_credits_wq); |
| 1782 | } | |
| 1783 | ||
| 666a73f3 | 1784 | int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id) |
| be8b3943 | 1785 | { |
| 34957b25 | 1786 | int ret = -EOPNOTSUPP; |
| be8b3943 | 1787 | |
| 56b84287 KV |
1788 | might_sleep(); |
| 1789 | ||
| 34957b25 | 1790 | if (cmd_id == WMI_CMD_UNSUPPORTED) { |
| 7aa7a72a | 1791 | ath10k_warn(ar, "wmi command %d is not supported by firmware\n", |
| 55321559 BM |
1792 | cmd_id); |
| 1793 | return ret; | |
| 1794 | } | |
| be8b3943 MK |
1795 | |
| 1796 | wait_event_timeout(ar->wmi.tx_credits_wq, ({ | |
| ed54388a MK |
1797 | /* try to send pending beacons first. they take priority */ |
| 1798 | ath10k_wmi_tx_beacons_nowait(ar); | |
| 1799 | ||
| be8b3943 | 1800 | ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id); |
| 7962b0d8 MK |
1801 | |
| 1802 | if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags)) | |
| 1803 | ret = -ESHUTDOWN; | |
| 1804 | ||
| be8b3943 MK |
1805 | (ret != -EAGAIN); |
| 1806 | }), 3*HZ); | |
| 1807 | ||
| 1808 | if (ret) | |
| 5e3dd157 | 1809 | dev_kfree_skb_any(skb); |
| 5e3dd157 | 1810 | |
| be8b3943 | 1811 | return ret; |
| 5e3dd157 KV |
1812 | } |
| 1813 | ||
| d7579d12 MK |
1814 | static struct sk_buff * |
| 1815 | ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu) | |
| 5e00d31a | 1816 | { |
| 609db229 MK |
1817 | struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu); |
| 1818 | struct ath10k_vif *arvif = (void *)cb->vif->drv_priv; | |
| 5e00d31a BM |
1819 | struct wmi_mgmt_tx_cmd *cmd; |
| 1820 | struct ieee80211_hdr *hdr; | |
| d7579d12 | 1821 | struct sk_buff *skb; |
| 5e00d31a | 1822 | int len; |
| 609db229 | 1823 | u32 vdev_id; |
| d7579d12 | 1824 | u32 buf_len = msdu->len; |
| 5e00d31a BM |
1825 | u16 fc; |
| 1826 | ||
| d7579d12 | 1827 | hdr = (struct ieee80211_hdr *)msdu->data; |
| 5e00d31a BM |
1828 | fc = le16_to_cpu(hdr->frame_control); |
| 1829 | ||
| 609db229 MK |
1830 | if (cb->vif) |
| 1831 | vdev_id = arvif->vdev_id; | |
| 1832 | else | |
| 1833 | vdev_id = 0; | |
| 1834 | ||
| 5e00d31a | 1835 | if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control))) |
| d7579d12 | 1836 | return ERR_PTR(-EINVAL); |
| 5e00d31a | 1837 | |
| d7579d12 | 1838 | len = sizeof(cmd->hdr) + msdu->len; |
| eeab266c MK |
1839 | |
| 1840 | if ((ieee80211_is_action(hdr->frame_control) || | |
| 1841 | ieee80211_is_deauth(hdr->frame_control) || | |
| 1842 | ieee80211_is_disassoc(hdr->frame_control)) && | |
| 1843 | ieee80211_has_protected(hdr->frame_control)) { | |
| 1844 | len += IEEE80211_CCMP_MIC_LEN; | |
| 1845 | buf_len += IEEE80211_CCMP_MIC_LEN; | |
| 1846 | } | |
| 1847 | ||
| 5e00d31a BM |
1848 | len = round_up(len, 4); |
| 1849 | ||
| d7579d12 MK |
1850 | skb = ath10k_wmi_alloc_skb(ar, len); |
| 1851 | if (!skb) | |
| 1852 | return ERR_PTR(-ENOMEM); | |
| 5e00d31a | 1853 | |
| d7579d12 | 1854 | cmd = (struct wmi_mgmt_tx_cmd *)skb->data; |
| 5e00d31a | 1855 | |
| 609db229 | 1856 | cmd->hdr.vdev_id = __cpu_to_le32(vdev_id); |
| 5e00d31a BM |
1857 | cmd->hdr.tx_rate = 0; |
| 1858 | cmd->hdr.tx_power = 0; | |
| eeab266c | 1859 | cmd->hdr.buf_len = __cpu_to_le32(buf_len); |
| 5e00d31a | 1860 | |
| b25f32cb | 1861 | ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr)); |
| d7579d12 | 1862 | memcpy(cmd->buf, msdu->data, msdu->len); |
| 5e00d31a | 1863 | |
| 7aa7a72a | 1864 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n", |
| d7579d12 | 1865 | msdu, skb->len, fc & IEEE80211_FCTL_FTYPE, |
| 5e00d31a | 1866 | fc & IEEE80211_FCTL_STYPE); |
| 5ce8e7fd RM |
1867 | trace_ath10k_tx_hdr(ar, skb->data, skb->len); |
| 1868 | trace_ath10k_tx_payload(ar, skb->data, skb->len); | |
| 5e00d31a | 1869 | |
| d7579d12 | 1870 | return skb; |
| 5e00d31a BM |
1871 | } |
| 1872 | ||
| 5c81c7fd MK |
1873 | static void ath10k_wmi_event_scan_started(struct ath10k *ar) |
| 1874 | { | |
| 1875 | lockdep_assert_held(&ar->data_lock); | |
| 1876 | ||
| 1877 | switch (ar->scan.state) { | |
| 1878 | case ATH10K_SCAN_IDLE: | |
| 1879 | case ATH10K_SCAN_RUNNING: | |
| 1880 | case ATH10K_SCAN_ABORTING: | |
| 7aa7a72a | 1881 | ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n", |
| 5c81c7fd MK |
1882 | ath10k_scan_state_str(ar->scan.state), |
| 1883 | ar->scan.state); | |
| 1884 | break; | |
| 1885 | case ATH10K_SCAN_STARTING: | |
| 1886 | ar->scan.state = ATH10K_SCAN_RUNNING; | |
| 1887 | ||
| 1888 | if (ar->scan.is_roc) | |
| 1889 | ieee80211_ready_on_channel(ar->hw); | |
| 1890 | ||
| 1891 | complete(&ar->scan.started); | |
| 1892 | break; | |
| 1893 | } | |
| 1894 | } | |
| 1895 | ||
| 2f9eec0b BG |
1896 | static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar) |
| 1897 | { | |
| 1898 | lockdep_assert_held(&ar->data_lock); | |
| 1899 | ||
| 1900 | switch (ar->scan.state) { | |
| 1901 | case ATH10K_SCAN_IDLE: | |
| 1902 | case ATH10K_SCAN_RUNNING: | |
| 1903 | case ATH10K_SCAN_ABORTING: | |
| 1904 | ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n", | |
| 1905 | ath10k_scan_state_str(ar->scan.state), | |
| 1906 | ar->scan.state); | |
| 1907 | break; | |
| 1908 | case ATH10K_SCAN_STARTING: | |
| 1909 | complete(&ar->scan.started); | |
| 1910 | __ath10k_scan_finish(ar); | |
| 1911 | break; | |
| 1912 | } | |
| 1913 | } | |
| 1914 | ||
| 5c81c7fd MK |
1915 | static void ath10k_wmi_event_scan_completed(struct ath10k *ar) |
| 1916 | { | |
| 1917 | lockdep_assert_held(&ar->data_lock); | |
| 1918 | ||
| 1919 | switch (ar->scan.state) { | |
| 1920 | case ATH10K_SCAN_IDLE: | |
| 1921 | case ATH10K_SCAN_STARTING: | |
| 1922 | /* One suspected reason scan can be completed while starting is | |
| 1923 | * if firmware fails to deliver all scan events to the host, | |
| 1924 | * e.g. when transport pipe is full. This has been observed | |
| 1925 | * with spectral scan phyerr events starving wmi transport | |
| 1926 | * pipe. In such case the "scan completed" event should be (and | |
| 1927 | * is) ignored by the host as it may be just firmware's scan | |
| 1928 | * state machine recovering. | |
| 1929 | */ | |
| 7aa7a72a | 1930 | ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n", |
| 5c81c7fd MK |
1931 | ath10k_scan_state_str(ar->scan.state), |
| 1932 | ar->scan.state); | |
| 1933 | break; | |
| 1934 | case ATH10K_SCAN_RUNNING: | |
| 1935 | case ATH10K_SCAN_ABORTING: | |
| 1936 | __ath10k_scan_finish(ar); | |
| 1937 | break; | |
| 1938 | } | |
| 1939 | } | |
| 1940 | ||
| 1941 | static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar) | |
| 1942 | { | |
| 1943 | lockdep_assert_held(&ar->data_lock); | |
| 1944 | ||
| 1945 | switch (ar->scan.state) { | |
| 1946 | case ATH10K_SCAN_IDLE: | |
| 1947 | case ATH10K_SCAN_STARTING: | |
| 7aa7a72a | 1948 | ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n", |
| 5c81c7fd MK |
1949 | ath10k_scan_state_str(ar->scan.state), |
| 1950 | ar->scan.state); | |
| 1951 | break; | |
| 1952 | case ATH10K_SCAN_RUNNING: | |
| 1953 | case ATH10K_SCAN_ABORTING: | |
| 1954 | ar->scan_channel = NULL; | |
| 1955 | break; | |
| 1956 | } | |
| 1957 | } | |
| 1958 | ||
| 1959 | static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq) | |
| 1960 | { | |
| 1961 | lockdep_assert_held(&ar->data_lock); | |
| 1962 | ||
| 1963 | switch (ar->scan.state) { | |
| 1964 | case ATH10K_SCAN_IDLE: | |
| 1965 | case ATH10K_SCAN_STARTING: | |
| 7aa7a72a | 1966 | ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n", |
| 5c81c7fd MK |
1967 | ath10k_scan_state_str(ar->scan.state), |
| 1968 | ar->scan.state); | |
| 1969 | break; | |
| 1970 | case ATH10K_SCAN_RUNNING: | |
| 1971 | case ATH10K_SCAN_ABORTING: | |
| 1972 | ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); | |
| 1973 | ||
| 1974 | if (ar->scan.is_roc && ar->scan.roc_freq == freq) | |
| 1975 | complete(&ar->scan.on_channel); | |
| 1976 | break; | |
| 1977 | } | |
| 1978 | } | |
| 1979 | ||
| 9ff8b724 MK |
1980 | static const char * |
| 1981 | ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type, | |
| 1982 | enum wmi_scan_completion_reason reason) | |
| 1983 | { | |
| 1984 | switch (type) { | |
| 1985 | case WMI_SCAN_EVENT_STARTED: | |
| 1986 | return "started"; | |
| 1987 | case WMI_SCAN_EVENT_COMPLETED: | |
| 1988 | switch (reason) { | |
| 1989 | case WMI_SCAN_REASON_COMPLETED: | |
| 1990 | return "completed"; | |
| 1991 | case WMI_SCAN_REASON_CANCELLED: | |
| 1992 | return "completed [cancelled]"; | |
| 1993 | case WMI_SCAN_REASON_PREEMPTED: | |
| 1994 | return "completed [preempted]"; | |
| 1995 | case WMI_SCAN_REASON_TIMEDOUT: | |
| 1996 | return "completed [timedout]"; | |
| b2297baa RM |
1997 | case WMI_SCAN_REASON_INTERNAL_FAILURE: |
| 1998 | return "completed [internal err]"; | |
| 9ff8b724 MK |
1999 | case WMI_SCAN_REASON_MAX: |
| 2000 | break; | |
| 2001 | } | |
| 2002 | return "completed [unknown]"; | |
| 2003 | case WMI_SCAN_EVENT_BSS_CHANNEL: | |
| 2004 | return "bss channel"; | |
| 2005 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL: | |
| 2006 | return "foreign channel"; | |
| 2007 | case WMI_SCAN_EVENT_DEQUEUED: | |
| 2008 | return "dequeued"; | |
| 2009 | case WMI_SCAN_EVENT_PREEMPTED: | |
| 2010 | return "preempted"; | |
| 2011 | case WMI_SCAN_EVENT_START_FAILED: | |
| 2012 | return "start failed"; | |
| b2297baa RM |
2013 | case WMI_SCAN_EVENT_RESTARTED: |
| 2014 | return "restarted"; | |
| 2015 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT: | |
| 2016 | return "foreign channel exit"; | |
| 9ff8b724 MK |
2017 | default: |
| 2018 | return "unknown"; | |
| 2019 | } | |
| 2020 | } | |
| 2021 | ||
| d7579d12 MK |
2022 | static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb, |
| 2023 | struct wmi_scan_ev_arg *arg) | |
| 32653cf1 MK |
2024 | { |
| 2025 | struct wmi_scan_event *ev = (void *)skb->data; | |
| 2026 | ||
| 2027 | if (skb->len < sizeof(*ev)) | |
| 2028 | return -EPROTO; | |
| 2029 | ||
| 2030 | skb_pull(skb, sizeof(*ev)); | |
| 2031 | arg->event_type = ev->event_type; | |
| 2032 | arg->reason = ev->reason; | |
| 2033 | arg->channel_freq = ev->channel_freq; | |
| 2034 | arg->scan_req_id = ev->scan_req_id; | |
| 2035 | arg->scan_id = ev->scan_id; | |
| 2036 | arg->vdev_id = ev->vdev_id; | |
| 2037 | ||
| 2038 | return 0; | |
| 2039 | } | |
| 2040 | ||
| 0226d602 | 2041 | int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2042 | { |
| 32653cf1 | 2043 | struct wmi_scan_ev_arg arg = {}; |
| 5e3dd157 KV |
2044 | enum wmi_scan_event_type event_type; |
| 2045 | enum wmi_scan_completion_reason reason; | |
| 2046 | u32 freq; | |
| 2047 | u32 req_id; | |
| 2048 | u32 scan_id; | |
| 2049 | u32 vdev_id; | |
| 32653cf1 | 2050 | int ret; |
| 5e3dd157 | 2051 | |
| d7579d12 | 2052 | ret = ath10k_wmi_pull_scan(ar, skb, &arg); |
| 32653cf1 MK |
2053 | if (ret) { |
| 2054 | ath10k_warn(ar, "failed to parse scan event: %d\n", ret); | |
| 2055 | return ret; | |
| 2056 | } | |
| 2057 | ||
| 2058 | event_type = __le32_to_cpu(arg.event_type); | |
| 2059 | reason = __le32_to_cpu(arg.reason); | |
| 2060 | freq = __le32_to_cpu(arg.channel_freq); | |
| 2061 | req_id = __le32_to_cpu(arg.scan_req_id); | |
| 2062 | scan_id = __le32_to_cpu(arg.scan_id); | |
| 2063 | vdev_id = __le32_to_cpu(arg.vdev_id); | |
| 5e3dd157 | 2064 | |
| 5c81c7fd MK |
2065 | spin_lock_bh(&ar->data_lock); |
| 2066 | ||
| 7aa7a72a | 2067 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5c81c7fd | 2068 | "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", |
| 9ff8b724 | 2069 | ath10k_wmi_event_scan_type_str(event_type, reason), |
| 5c81c7fd MK |
2070 | event_type, reason, freq, req_id, scan_id, vdev_id, |
| 2071 | ath10k_scan_state_str(ar->scan.state), ar->scan.state); | |
| 5e3dd157 KV |
2072 | |
| 2073 | switch (event_type) { | |
| 2074 | case WMI_SCAN_EVENT_STARTED: | |
| 5c81c7fd | 2075 | ath10k_wmi_event_scan_started(ar); |
| 5e3dd157 KV |
2076 | break; |
| 2077 | case WMI_SCAN_EVENT_COMPLETED: | |
| 5c81c7fd | 2078 | ath10k_wmi_event_scan_completed(ar); |
| 5e3dd157 KV |
2079 | break; |
| 2080 | case WMI_SCAN_EVENT_BSS_CHANNEL: | |
| 5c81c7fd | 2081 | ath10k_wmi_event_scan_bss_chan(ar); |
| 5e3dd157 KV |
2082 | break; |
| 2083 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL: | |
| 5c81c7fd MK |
2084 | ath10k_wmi_event_scan_foreign_chan(ar, freq); |
| 2085 | break; | |
| 2086 | case WMI_SCAN_EVENT_START_FAILED: | |
| 7aa7a72a | 2087 | ath10k_warn(ar, "received scan start failure event\n"); |
| 2f9eec0b | 2088 | ath10k_wmi_event_scan_start_failed(ar); |
| 5e3dd157 KV |
2089 | break; |
| 2090 | case WMI_SCAN_EVENT_DEQUEUED: | |
| 5e3dd157 | 2091 | case WMI_SCAN_EVENT_PREEMPTED: |
| b2297baa RM |
2092 | case WMI_SCAN_EVENT_RESTARTED: |
| 2093 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT: | |
| 5e3dd157 KV |
2094 | default: |
| 2095 | break; | |
| 2096 | } | |
| 2097 | ||
| 2098 | spin_unlock_bh(&ar->data_lock); | |
| 2099 | return 0; | |
| 2100 | } | |
| 2101 | ||
| 504f6cdf SM |
2102 | /* If keys are configured, HW decrypts all frames |
| 2103 | * with protected bit set. Mark such frames as decrypted. | |
| 2104 | */ | |
| 2105 | static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar, | |
| 2106 | struct sk_buff *skb, | |
| 2107 | struct ieee80211_rx_status *status) | |
| 2108 | { | |
| 2109 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
| 2110 | unsigned int hdrlen; | |
| 2111 | bool peer_key; | |
| 2112 | u8 *addr, keyidx; | |
| 2113 | ||
| 2114 | if (!ieee80211_is_auth(hdr->frame_control) || | |
| 2115 | !ieee80211_has_protected(hdr->frame_control)) | |
| 2116 | return; | |
| 2117 | ||
| 2118 | hdrlen = ieee80211_hdrlen(hdr->frame_control); | |
| 2119 | if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN)) | |
| 2120 | return; | |
| 2121 | ||
| 2122 | keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT; | |
| 2123 | addr = ieee80211_get_SA(hdr); | |
| 2124 | ||
| 2125 | spin_lock_bh(&ar->data_lock); | |
| 2126 | peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx); | |
| 2127 | spin_unlock_bh(&ar->data_lock); | |
| 2128 | ||
| 2129 | if (peer_key) { | |
| 2130 | ath10k_dbg(ar, ATH10K_DBG_MAC, | |
| 2131 | "mac wep key present for peer %pM\n", addr); | |
| 2132 | status->flag |= RX_FLAG_DECRYPTED; | |
| 2133 | } | |
| 2134 | } | |
| 2135 | ||
| d7579d12 MK |
2136 | static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb, |
| 2137 | struct wmi_mgmt_rx_ev_arg *arg) | |
| 5e3dd157 | 2138 | { |
| 0d9b0438 MK |
2139 | struct wmi_mgmt_rx_event_v1 *ev_v1; |
| 2140 | struct wmi_mgmt_rx_event_v2 *ev_v2; | |
| 2141 | struct wmi_mgmt_rx_hdr_v1 *ev_hdr; | |
| 8d130963 | 2142 | struct wmi_mgmt_rx_ext_info *ext_info; |
| 32653cf1 MK |
2143 | size_t pull_len; |
| 2144 | u32 msdu_len; | |
| 8d130963 | 2145 | u32 len; |
| 32653cf1 MK |
2146 | |
| 2147 | if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) { | |
| 2148 | ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data; | |
| 2149 | ev_hdr = &ev_v2->hdr.v1; | |
| 2150 | pull_len = sizeof(*ev_v2); | |
| 2151 | } else { | |
| 2152 | ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data; | |
| 2153 | ev_hdr = &ev_v1->hdr; | |
| 2154 | pull_len = sizeof(*ev_v1); | |
| 2155 | } | |
| 2156 | ||
| 2157 | if (skb->len < pull_len) | |
| 2158 | return -EPROTO; | |
| 2159 | ||
| 2160 | skb_pull(skb, pull_len); | |
| 2161 | arg->channel = ev_hdr->channel; | |
| 2162 | arg->buf_len = ev_hdr->buf_len; | |
| 2163 | arg->status = ev_hdr->status; | |
| 2164 | arg->snr = ev_hdr->snr; | |
| 2165 | arg->phy_mode = ev_hdr->phy_mode; | |
| 2166 | arg->rate = ev_hdr->rate; | |
| 2167 | ||
| 2168 | msdu_len = __le32_to_cpu(arg->buf_len); | |
| 2169 | if (skb->len < msdu_len) | |
| 2170 | return -EPROTO; | |
| 2171 | ||
| 8d130963 PO |
2172 | if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) { |
| 2173 | len = ALIGN(le32_to_cpu(arg->buf_len), 4); | |
| 2174 | ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len); | |
| 2175 | memcpy(&arg->ext_info, ext_info, | |
| 2176 | sizeof(struct wmi_mgmt_rx_ext_info)); | |
| 2177 | } | |
| 32653cf1 MK |
2178 | /* the WMI buffer might've ended up being padded to 4 bytes due to HTC |
| 2179 | * trailer with credit update. Trim the excess garbage. | |
| 2180 | */ | |
| 2181 | skb_trim(skb, msdu_len); | |
| 2182 | ||
| 2183 | return 0; | |
| 2184 | } | |
| 2185 | ||
| 1c092961 RM |
2186 | static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar, |
| 2187 | struct sk_buff *skb, | |
| 2188 | struct wmi_mgmt_rx_ev_arg *arg) | |
| 2189 | { | |
| 2190 | struct wmi_10_4_mgmt_rx_event *ev; | |
| 2191 | struct wmi_10_4_mgmt_rx_hdr *ev_hdr; | |
| 2192 | size_t pull_len; | |
| 2193 | u32 msdu_len; | |
| 2194 | ||
| 2195 | ev = (struct wmi_10_4_mgmt_rx_event *)skb->data; | |
| 2196 | ev_hdr = &ev->hdr; | |
| 2197 | pull_len = sizeof(*ev); | |
| 2198 | ||
| 2199 | if (skb->len < pull_len) | |
| 2200 | return -EPROTO; | |
| 2201 | ||
| 2202 | skb_pull(skb, pull_len); | |
| 2203 | arg->channel = ev_hdr->channel; | |
| 2204 | arg->buf_len = ev_hdr->buf_len; | |
| 2205 | arg->status = ev_hdr->status; | |
| 2206 | arg->snr = ev_hdr->snr; | |
| 2207 | arg->phy_mode = ev_hdr->phy_mode; | |
| 2208 | arg->rate = ev_hdr->rate; | |
| 2209 | ||
| 2210 | msdu_len = __le32_to_cpu(arg->buf_len); | |
| 2211 | if (skb->len < msdu_len) | |
| 2212 | return -EPROTO; | |
| 2213 | ||
| 2214 | /* Make sure bytes added for padding are removed. */ | |
| 2215 | skb_trim(skb, msdu_len); | |
| 2216 | ||
| 2217 | return 0; | |
| 2218 | } | |
| 2219 | ||
| 0226d602 | 2220 | int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) |
| 32653cf1 MK |
2221 | { |
| 2222 | struct wmi_mgmt_rx_ev_arg arg = {}; | |
| 5e3dd157 KV |
2223 | struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); |
| 2224 | struct ieee80211_hdr *hdr; | |
| 01cebe1c | 2225 | struct ieee80211_supported_band *sband; |
| 5e3dd157 KV |
2226 | u32 rx_status; |
| 2227 | u32 channel; | |
| 2228 | u32 phy_mode; | |
| 2229 | u32 snr; | |
| 2230 | u32 rate; | |
| 2231 | u32 buf_len; | |
| 2232 | u16 fc; | |
| 32653cf1 | 2233 | int ret; |
| 0d9b0438 | 2234 | |
| d7579d12 | 2235 | ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg); |
| 32653cf1 MK |
2236 | if (ret) { |
| 2237 | ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret); | |
| 08603f2e | 2238 | dev_kfree_skb(skb); |
| 32653cf1 | 2239 | return ret; |
| 0d9b0438 | 2240 | } |
| 5e3dd157 | 2241 | |
| 32653cf1 MK |
2242 | channel = __le32_to_cpu(arg.channel); |
| 2243 | buf_len = __le32_to_cpu(arg.buf_len); | |
| 2244 | rx_status = __le32_to_cpu(arg.status); | |
| 2245 | snr = __le32_to_cpu(arg.snr); | |
| 2246 | phy_mode = __le32_to_cpu(arg.phy_mode); | |
| 2247 | rate = __le32_to_cpu(arg.rate); | |
| 5e3dd157 KV |
2248 | |
| 2249 | memset(status, 0, sizeof(*status)); | |
| 2250 | ||
| 7aa7a72a | 2251 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
| 5e3dd157 KV |
2252 | "event mgmt rx status %08x\n", rx_status); |
| 2253 | ||
| 2c9bcece MP |
2254 | if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) || |
| 2255 | (rx_status & (WMI_RX_STATUS_ERR_DECRYPT | | |
| 2256 | WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) { | |
| d67d0a02 MK |
2257 | dev_kfree_skb(skb); |
| 2258 | return 0; | |
| 2259 | } | |
| 2260 | ||
| 5e3dd157 KV |
2261 | if (rx_status & WMI_RX_STATUS_ERR_MIC) |
| 2262 | status->flag |= RX_FLAG_MMIC_ERROR; | |
| 2263 | ||
| 8d130963 PO |
2264 | if (rx_status & WMI_RX_STATUS_EXT_INFO) { |
| 2265 | status->mactime = | |
| 2266 | __le64_to_cpu(arg.ext_info.rx_mac_timestamp); | |
| 2267 | status->flag |= RX_FLAG_MACTIME_END; | |
| 2268 | } | |
| 21040bf9 | 2269 | /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to |
| 453cdb61 | 2270 | * MODE_11B. This means phy_mode is not a reliable source for the band |
| 21040bf9 MK |
2271 | * of mgmt rx. |
| 2272 | */ | |
| 2273 | if (channel >= 1 && channel <= 14) { | |
| 2274 | status->band = IEEE80211_BAND_2GHZ; | |
| 2275 | } else if (channel >= 36 && channel <= 165) { | |
| 2276 | status->band = IEEE80211_BAND_5GHZ; | |
| 453cdb61 | 2277 | } else { |
| 21040bf9 MK |
2278 | /* Shouldn't happen unless list of advertised channels to |
| 2279 | * mac80211 has been changed. | |
| 2280 | */ | |
| 2281 | WARN_ON_ONCE(1); | |
| 2282 | dev_kfree_skb(skb); | |
| 2283 | return 0; | |
| 453cdb61 MK |
2284 | } |
| 2285 | ||
| 21040bf9 MK |
2286 | if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ) |
| 2287 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n"); | |
| 2288 | ||
| 01cebe1c MK |
2289 | sband = &ar->mac.sbands[status->band]; |
| 2290 | ||
| 5e3dd157 KV |
2291 | status->freq = ieee80211_channel_to_frequency(channel, status->band); |
| 2292 | status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR; | |
| 01cebe1c | 2293 | status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100); |
| 5e3dd157 | 2294 | |
| 5e3dd157 KV |
2295 | hdr = (struct ieee80211_hdr *)skb->data; |
| 2296 | fc = le16_to_cpu(hdr->frame_control); | |
| 2297 | ||
| 60549cab GB |
2298 | /* Firmware is guaranteed to report all essential management frames via |
| 2299 | * WMI while it can deliver some extra via HTT. Since there can be | |
| 2300 | * duplicates split the reporting wrt monitor/sniffing. | |
| 2301 | */ | |
| 2302 | status->flag |= RX_FLAG_SKIP_MONITOR; | |
| 2303 | ||
| 504f6cdf SM |
2304 | ath10k_wmi_handle_wep_reauth(ar, skb, status); |
| 2305 | ||
| 2b6a6a90 MK |
2306 | /* FW delivers WEP Shared Auth frame with Protected Bit set and |
| 2307 | * encrypted payload. However in case of PMF it delivers decrypted | |
| 2308 | * frames with Protected Bit set. */ | |
| 2309 | if (ieee80211_has_protected(hdr->frame_control) && | |
| 2310 | !ieee80211_is_auth(hdr->frame_control)) { | |
| eeab266c MK |
2311 | status->flag |= RX_FLAG_DECRYPTED; |
| 2312 | ||
| 2313 | if (!ieee80211_is_action(hdr->frame_control) && | |
| 2314 | !ieee80211_is_deauth(hdr->frame_control) && | |
| 2315 | !ieee80211_is_disassoc(hdr->frame_control)) { | |
| 2316 | status->flag |= RX_FLAG_IV_STRIPPED | | |
| 2317 | RX_FLAG_MMIC_STRIPPED; | |
| 2318 | hdr->frame_control = __cpu_to_le16(fc & | |
| 5e3dd157 | 2319 | ~IEEE80211_FCTL_PROTECTED); |
| eeab266c | 2320 | } |
| 5e3dd157 KV |
2321 | } |
| 2322 | ||
| cc9904e6 MK |
2323 | if (ieee80211_is_beacon(hdr->frame_control)) |
| 2324 | ath10k_mac_handle_beacon(ar, skb); | |
| 2325 | ||
| 7aa7a72a | 2326 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
| 5e3dd157 KV |
2327 | "event mgmt rx skb %p len %d ftype %02x stype %02x\n", |
| 2328 | skb, skb->len, | |
| 2329 | fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); | |
| 2330 | ||
| 7aa7a72a | 2331 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
| 5e3dd157 KV |
2332 | "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", |
| 2333 | status->freq, status->band, status->signal, | |
| 2334 | status->rate_idx); | |
| 2335 | ||
| 5e3dd157 KV |
2336 | ieee80211_rx(ar->hw, skb); |
| 2337 | return 0; | |
| 2338 | } | |
| 2339 | ||
| 2e1dea40 MK |
2340 | static int freq_to_idx(struct ath10k *ar, int freq) |
| 2341 | { | |
| 2342 | struct ieee80211_supported_band *sband; | |
| 2343 | int band, ch, idx = 0; | |
| 2344 | ||
| 2345 | for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) { | |
| 2346 | sband = ar->hw->wiphy->bands[band]; | |
| 2347 | if (!sband) | |
| 2348 | continue; | |
| 2349 | ||
| 2350 | for (ch = 0; ch < sband->n_channels; ch++, idx++) | |
| 2351 | if (sband->channels[ch].center_freq == freq) | |
| 2352 | goto exit; | |
| 2353 | } | |
| 2354 | ||
| 2355 | exit: | |
| 2356 | return idx; | |
| 2357 | } | |
| 2358 | ||
| d7579d12 MK |
2359 | static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb, |
| 2360 | struct wmi_ch_info_ev_arg *arg) | |
| 32653cf1 MK |
2361 | { |
| 2362 | struct wmi_chan_info_event *ev = (void *)skb->data; | |
| 2363 | ||
| 2364 | if (skb->len < sizeof(*ev)) | |
| 2365 | return -EPROTO; | |
| 2366 | ||
| 2367 | skb_pull(skb, sizeof(*ev)); | |
| 2368 | arg->err_code = ev->err_code; | |
| 2369 | arg->freq = ev->freq; | |
| 2370 | arg->cmd_flags = ev->cmd_flags; | |
| 2371 | arg->noise_floor = ev->noise_floor; | |
| 2372 | arg->rx_clear_count = ev->rx_clear_count; | |
| 2373 | arg->cycle_count = ev->cycle_count; | |
| 2374 | ||
| 2375 | return 0; | |
| 2376 | } | |
| 2377 | ||
| b2297baa RM |
2378 | static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar, |
| 2379 | struct sk_buff *skb, | |
| 2380 | struct wmi_ch_info_ev_arg *arg) | |
| 2381 | { | |
| 2382 | struct wmi_10_4_chan_info_event *ev = (void *)skb->data; | |
| 2383 | ||
| 2384 | if (skb->len < sizeof(*ev)) | |
| 2385 | return -EPROTO; | |
| 2386 | ||
| 2387 | skb_pull(skb, sizeof(*ev)); | |
| 2388 | arg->err_code = ev->err_code; | |
| 2389 | arg->freq = ev->freq; | |
| 2390 | arg->cmd_flags = ev->cmd_flags; | |
| 2391 | arg->noise_floor = ev->noise_floor; | |
| 2392 | arg->rx_clear_count = ev->rx_clear_count; | |
| 2393 | arg->cycle_count = ev->cycle_count; | |
| 2394 | arg->chan_tx_pwr_range = ev->chan_tx_pwr_range; | |
| 2395 | arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; | |
| 2396 | arg->rx_frame_count = ev->rx_frame_count; | |
| 2397 | ||
| 2398 | return 0; | |
| 2399 | } | |
| 2400 | ||
| 0226d602 | 2401 | void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2402 | { |
| 32653cf1 | 2403 | struct wmi_ch_info_ev_arg arg = {}; |
| 2e1dea40 MK |
2404 | struct survey_info *survey; |
| 2405 | u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count; | |
| 32653cf1 | 2406 | int idx, ret; |
| 2e1dea40 | 2407 | |
| d7579d12 | 2408 | ret = ath10k_wmi_pull_ch_info(ar, skb, &arg); |
| 32653cf1 MK |
2409 | if (ret) { |
| 2410 | ath10k_warn(ar, "failed to parse chan info event: %d\n", ret); | |
| 2411 | return; | |
| 2412 | } | |
| 2e1dea40 | 2413 | |
| 32653cf1 MK |
2414 | err_code = __le32_to_cpu(arg.err_code); |
| 2415 | freq = __le32_to_cpu(arg.freq); | |
| 2416 | cmd_flags = __le32_to_cpu(arg.cmd_flags); | |
| 2417 | noise_floor = __le32_to_cpu(arg.noise_floor); | |
| 2418 | rx_clear_count = __le32_to_cpu(arg.rx_clear_count); | |
| 2419 | cycle_count = __le32_to_cpu(arg.cycle_count); | |
| 2e1dea40 | 2420 | |
| 7aa7a72a | 2421 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 2e1dea40 MK |
2422 | "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n", |
| 2423 | err_code, freq, cmd_flags, noise_floor, rx_clear_count, | |
| 2424 | cycle_count); | |
| 2425 | ||
| 2426 | spin_lock_bh(&ar->data_lock); | |
| 2427 | ||
| 5c81c7fd MK |
2428 | switch (ar->scan.state) { |
| 2429 | case ATH10K_SCAN_IDLE: | |
| 2430 | case ATH10K_SCAN_STARTING: | |
| 7aa7a72a | 2431 | ath10k_warn(ar, "received chan info event without a scan request, ignoring\n"); |
| 2e1dea40 | 2432 | goto exit; |
| 5c81c7fd MK |
2433 | case ATH10K_SCAN_RUNNING: |
| 2434 | case ATH10K_SCAN_ABORTING: | |
| 2435 | break; | |
| 2e1dea40 MK |
2436 | } |
| 2437 | ||
| 2438 | idx = freq_to_idx(ar, freq); | |
| 2439 | if (idx >= ARRAY_SIZE(ar->survey)) { | |
| 7aa7a72a | 2440 | ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n", |
| 2e1dea40 MK |
2441 | freq, idx); |
| 2442 | goto exit; | |
| 2443 | } | |
| 2444 | ||
| 2445 | if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) { | |
| 44b7d483 MK |
2446 | if (ar->ch_info_can_report_survey) { |
| 2447 | survey = &ar->survey[idx]; | |
| 2448 | survey->noise = noise_floor; | |
| 2449 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
| 2450 | ||
| 2451 | ath10k_hw_fill_survey_time(ar, | |
| 2452 | survey, | |
| 2453 | cycle_count, | |
| 2454 | rx_clear_count, | |
| 2455 | ar->survey_last_cycle_count, | |
| 2456 | ar->survey_last_rx_clear_count); | |
| 2457 | } | |
| 2458 | ||
| 2459 | ar->ch_info_can_report_survey = false; | |
| 2460 | } else { | |
| 2461 | ar->ch_info_can_report_survey = true; | |
| 2e1dea40 MK |
2462 | } |
| 2463 | ||
| 3d2a2e29 VT |
2464 | if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) { |
| 2465 | ar->survey_last_rx_clear_count = rx_clear_count; | |
| 2466 | ar->survey_last_cycle_count = cycle_count; | |
| 2467 | } | |
| 2e1dea40 MK |
2468 | |
| 2469 | exit: | |
| 2470 | spin_unlock_bh(&ar->data_lock); | |
| 5e3dd157 KV |
2471 | } |
| 2472 | ||
| 0226d602 | 2473 | void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2474 | { |
| 7aa7a72a | 2475 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n"); |
| 5e3dd157 KV |
2476 | } |
| 2477 | ||
| 0226d602 | 2478 | int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2479 | { |
| 7aa7a72a | 2480 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n", |
| 869526b9 KV |
2481 | skb->len); |
| 2482 | ||
| d35a6c18 | 2483 | trace_ath10k_wmi_dbglog(ar, skb->data, skb->len); |
| 869526b9 KV |
2484 | |
| 2485 | return 0; | |
| 5e3dd157 KV |
2486 | } |
| 2487 | ||
| b91251fb MK |
2488 | void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src, |
| 2489 | struct ath10k_fw_stats_pdev *dst) | |
| d15fb520 | 2490 | { |
| d15fb520 MK |
2491 | dst->ch_noise_floor = __le32_to_cpu(src->chan_nf); |
| 2492 | dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); | |
| 2493 | dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); | |
| 2494 | dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count); | |
| 2495 | dst->cycle_count = __le32_to_cpu(src->cycle_count); | |
| 2496 | dst->phy_err_count = __le32_to_cpu(src->phy_err_count); | |
| 2497 | dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); | |
| b91251fb | 2498 | } |
| d15fb520 | 2499 | |
| b91251fb MK |
2500 | void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src, |
| 2501 | struct ath10k_fw_stats_pdev *dst) | |
| 2502 | { | |
| 2503 | dst->comp_queued = __le32_to_cpu(src->comp_queued); | |
| 2504 | dst->comp_delivered = __le32_to_cpu(src->comp_delivered); | |
| 2505 | dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); | |
| 2506 | dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); | |
| 2507 | dst->wmm_drop = __le32_to_cpu(src->wmm_drop); | |
| 2508 | dst->local_enqued = __le32_to_cpu(src->local_enqued); | |
| 2509 | dst->local_freed = __le32_to_cpu(src->local_freed); | |
| 2510 | dst->hw_queued = __le32_to_cpu(src->hw_queued); | |
| 2511 | dst->hw_reaped = __le32_to_cpu(src->hw_reaped); | |
| 2512 | dst->underrun = __le32_to_cpu(src->underrun); | |
| 2513 | dst->tx_abort = __le32_to_cpu(src->tx_abort); | |
| 2514 | dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); | |
| 2515 | dst->tx_ko = __le32_to_cpu(src->tx_ko); | |
| 2516 | dst->data_rc = __le32_to_cpu(src->data_rc); | |
| 2517 | dst->self_triggers = __le32_to_cpu(src->self_triggers); | |
| 2518 | dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); | |
| 2519 | dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); | |
| 2520 | dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); | |
| 2521 | dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); | |
| 2522 | dst->pdev_resets = __le32_to_cpu(src->pdev_resets); | |
| 2523 | dst->phy_underrun = __le32_to_cpu(src->phy_underrun); | |
| 2524 | dst->txop_ovf = __le32_to_cpu(src->txop_ovf); | |
| 2525 | } | |
| d15fb520 | 2526 | |
| 98dd2b92 MP |
2527 | static void |
| 2528 | ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src, | |
| 2529 | struct ath10k_fw_stats_pdev *dst) | |
| 2530 | { | |
| 2531 | dst->comp_queued = __le32_to_cpu(src->comp_queued); | |
| 2532 | dst->comp_delivered = __le32_to_cpu(src->comp_delivered); | |
| 2533 | dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); | |
| 2534 | dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); | |
| 2535 | dst->wmm_drop = __le32_to_cpu(src->wmm_drop); | |
| 2536 | dst->local_enqued = __le32_to_cpu(src->local_enqued); | |
| 2537 | dst->local_freed = __le32_to_cpu(src->local_freed); | |
| 2538 | dst->hw_queued = __le32_to_cpu(src->hw_queued); | |
| 2539 | dst->hw_reaped = __le32_to_cpu(src->hw_reaped); | |
| 2540 | dst->underrun = __le32_to_cpu(src->underrun); | |
| 2541 | dst->tx_abort = __le32_to_cpu(src->tx_abort); | |
| 2542 | dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); | |
| 2543 | dst->tx_ko = __le32_to_cpu(src->tx_ko); | |
| 2544 | dst->data_rc = __le32_to_cpu(src->data_rc); | |
| 2545 | dst->self_triggers = __le32_to_cpu(src->self_triggers); | |
| 2546 | dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); | |
| 2547 | dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); | |
| 2548 | dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); | |
| 2549 | dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); | |
| 2550 | dst->pdev_resets = __le32_to_cpu(src->pdev_resets); | |
| 2551 | dst->phy_underrun = __le32_to_cpu(src->phy_underrun); | |
| 2552 | dst->txop_ovf = __le32_to_cpu(src->txop_ovf); | |
| 2553 | dst->hw_paused = __le32_to_cpu(src->hw_paused); | |
| 2554 | dst->seq_posted = __le32_to_cpu(src->seq_posted); | |
| 2555 | dst->seq_failed_queueing = | |
| 2556 | __le32_to_cpu(src->seq_failed_queueing); | |
| 2557 | dst->seq_completed = __le32_to_cpu(src->seq_completed); | |
| 2558 | dst->seq_restarted = __le32_to_cpu(src->seq_restarted); | |
| 2559 | dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted); | |
| 2560 | dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush); | |
| 2561 | dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter); | |
| 2562 | dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated); | |
| 2563 | dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed); | |
| 2564 | dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter); | |
| 2565 | dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired); | |
| 2566 | } | |
| 2567 | ||
| b91251fb MK |
2568 | void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src, |
| 2569 | struct ath10k_fw_stats_pdev *dst) | |
| 2570 | { | |
| 2571 | dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change); | |
| 2572 | dst->status_rcvd = __le32_to_cpu(src->status_rcvd); | |
| 2573 | dst->r0_frags = __le32_to_cpu(src->r0_frags); | |
| 2574 | dst->r1_frags = __le32_to_cpu(src->r1_frags); | |
| 2575 | dst->r2_frags = __le32_to_cpu(src->r2_frags); | |
| 2576 | dst->r3_frags = __le32_to_cpu(src->r3_frags); | |
| 2577 | dst->htt_msdus = __le32_to_cpu(src->htt_msdus); | |
| 2578 | dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus); | |
| 2579 | dst->loc_msdus = __le32_to_cpu(src->loc_msdus); | |
| 2580 | dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus); | |
| 2581 | dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu); | |
| 2582 | dst->phy_errs = __le32_to_cpu(src->phy_errs); | |
| 2583 | dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop); | |
| 2584 | dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs); | |
| 2585 | } | |
| 2586 | ||
| 2587 | void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src, | |
| 2588 | struct ath10k_fw_stats_pdev *dst) | |
| 2589 | { | |
| 2590 | dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad); | |
| 2591 | dst->rts_bad = __le32_to_cpu(src->rts_bad); | |
| 2592 | dst->rts_good = __le32_to_cpu(src->rts_good); | |
| 2593 | dst->fcs_bad = __le32_to_cpu(src->fcs_bad); | |
| 2594 | dst->no_beacons = __le32_to_cpu(src->no_beacons); | |
| 2595 | dst->mib_int_count = __le32_to_cpu(src->mib_int_count); | |
| d15fb520 MK |
2596 | } |
| 2597 | ||
| 0226d602 MK |
2598 | void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, |
| 2599 | struct ath10k_fw_stats_peer *dst) | |
| d15fb520 MK |
2600 | { |
| 2601 | ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); | |
| 2602 | dst->peer_rssi = __le32_to_cpu(src->peer_rssi); | |
| 2603 | dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); | |
| 2604 | } | |
| 2605 | ||
| d7579d12 MK |
2606 | static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar, |
| 2607 | struct sk_buff *skb, | |
| 2608 | struct ath10k_fw_stats *stats) | |
| d15fb520 MK |
2609 | { |
| 2610 | const struct wmi_stats_event *ev = (void *)skb->data; | |
| 2611 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; | |
| 2612 | int i; | |
| 2613 | ||
| 2614 | if (!skb_pull(skb, sizeof(*ev))) | |
| 2615 | return -EPROTO; | |
| 2616 | ||
| 2617 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
| 2618 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
| 2619 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
| 2620 | ||
| 5326849a | 2621 | for (i = 0; i < num_pdev_stats; i++) { |
| d15fb520 | 2622 | const struct wmi_pdev_stats *src; |
| 5326849a | 2623 | struct ath10k_fw_stats_pdev *dst; |
| d15fb520 MK |
2624 | |
| 2625 | src = (void *)skb->data; | |
| 2626 | if (!skb_pull(skb, sizeof(*src))) | |
| 2627 | return -EPROTO; | |
| 2628 | ||
| 5326849a MK |
2629 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
| 2630 | if (!dst) | |
| 2631 | continue; | |
| 2632 | ||
| b91251fb MK |
2633 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); |
| 2634 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
| 2635 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
| 2636 | ||
| 5326849a | 2637 | list_add_tail(&dst->list, &stats->pdevs); |
| d15fb520 MK |
2638 | } |
| 2639 | ||
| 2640 | /* fw doesn't implement vdev stats */ | |
| 2641 | ||
| 2642 | for (i = 0; i < num_peer_stats; i++) { | |
| 2643 | const struct wmi_peer_stats *src; | |
| 5326849a | 2644 | struct ath10k_fw_stats_peer *dst; |
| d15fb520 MK |
2645 | |
| 2646 | src = (void *)skb->data; | |
| 2647 | if (!skb_pull(skb, sizeof(*src))) | |
| 2648 | return -EPROTO; | |
| 2649 | ||
| 5326849a MK |
2650 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
| 2651 | if (!dst) | |
| 2652 | continue; | |
| 2653 | ||
| 2654 | ath10k_wmi_pull_peer_stats(src, dst); | |
| 2655 | list_add_tail(&dst->list, &stats->peers); | |
| d15fb520 MK |
2656 | } |
| 2657 | ||
| 2658 | return 0; | |
| 2659 | } | |
| 2660 | ||
| d7579d12 MK |
2661 | static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar, |
| 2662 | struct sk_buff *skb, | |
| 2663 | struct ath10k_fw_stats *stats) | |
| d15fb520 MK |
2664 | { |
| 2665 | const struct wmi_stats_event *ev = (void *)skb->data; | |
| 2666 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; | |
| 2667 | int i; | |
| 2668 | ||
| 2669 | if (!skb_pull(skb, sizeof(*ev))) | |
| 2670 | return -EPROTO; | |
| 2671 | ||
| 2672 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
| 2673 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
| 2674 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
| 2675 | ||
| 5326849a | 2676 | for (i = 0; i < num_pdev_stats; i++) { |
| d15fb520 | 2677 | const struct wmi_10x_pdev_stats *src; |
| 5326849a | 2678 | struct ath10k_fw_stats_pdev *dst; |
| d15fb520 MK |
2679 | |
| 2680 | src = (void *)skb->data; | |
| 2681 | if (!skb_pull(skb, sizeof(*src))) | |
| 2682 | return -EPROTO; | |
| 2683 | ||
| 5326849a MK |
2684 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
| 2685 | if (!dst) | |
| 2686 | continue; | |
| 2687 | ||
| b91251fb MK |
2688 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); |
| 2689 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
| 2690 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
| 2691 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
| d15fb520 | 2692 | |
| 5326849a | 2693 | list_add_tail(&dst->list, &stats->pdevs); |
| d15fb520 MK |
2694 | } |
| 2695 | ||
| 2696 | /* fw doesn't implement vdev stats */ | |
| 2697 | ||
| 2698 | for (i = 0; i < num_peer_stats; i++) { | |
| 2699 | const struct wmi_10x_peer_stats *src; | |
| 5326849a | 2700 | struct ath10k_fw_stats_peer *dst; |
| d15fb520 MK |
2701 | |
| 2702 | src = (void *)skb->data; | |
| 2703 | if (!skb_pull(skb, sizeof(*src))) | |
| 2704 | return -EPROTO; | |
| 2705 | ||
| 5326849a MK |
2706 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); |
| 2707 | if (!dst) | |
| 2708 | continue; | |
| 2709 | ||
| 2710 | ath10k_wmi_pull_peer_stats(&src->old, dst); | |
| 2711 | ||
| 2712 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
| d15fb520 | 2713 | |
| 5326849a | 2714 | list_add_tail(&dst->list, &stats->peers); |
| d15fb520 MK |
2715 | } |
| 2716 | ||
| 2717 | return 0; | |
| 2718 | } | |
| 2719 | ||
| 20de2229 MK |
2720 | static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar, |
| 2721 | struct sk_buff *skb, | |
| 2722 | struct ath10k_fw_stats *stats) | |
| 2723 | { | |
| 2724 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
| 2725 | u32 num_pdev_stats; | |
| 2726 | u32 num_pdev_ext_stats; | |
| 2727 | u32 num_vdev_stats; | |
| 2728 | u32 num_peer_stats; | |
| 2729 | int i; | |
| 2730 | ||
| 2731 | if (!skb_pull(skb, sizeof(*ev))) | |
| 2732 | return -EPROTO; | |
| 2733 | ||
| 2734 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
| 2735 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
| 2736 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
| 2737 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
| 2738 | ||
| 2739 | for (i = 0; i < num_pdev_stats; i++) { | |
| 2740 | const struct wmi_10_2_pdev_stats *src; | |
| 2741 | struct ath10k_fw_stats_pdev *dst; | |
| 2742 | ||
| 2743 | src = (void *)skb->data; | |
| 2744 | if (!skb_pull(skb, sizeof(*src))) | |
| 2745 | return -EPROTO; | |
| 2746 | ||
| 2747 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2748 | if (!dst) | |
| 2749 | continue; | |
| 2750 | ||
| 2751 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
| 2752 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
| 2753 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
| 2754 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
| 2755 | /* FIXME: expose 10.2 specific values */ | |
| 2756 | ||
| 2757 | list_add_tail(&dst->list, &stats->pdevs); | |
| 2758 | } | |
| 2759 | ||
| 2760 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
| 2761 | const struct wmi_10_2_pdev_ext_stats *src; | |
| 2762 | ||
| 2763 | src = (void *)skb->data; | |
| 2764 | if (!skb_pull(skb, sizeof(*src))) | |
| 2765 | return -EPROTO; | |
| 2766 | ||
| 2767 | /* FIXME: expose values to userspace | |
| 2768 | * | |
| 2769 | * Note: Even though this loop seems to do nothing it is | |
| 2770 | * required to parse following sub-structures properly. | |
| 2771 | */ | |
| 2772 | } | |
| 2773 | ||
| 2774 | /* fw doesn't implement vdev stats */ | |
| 2775 | ||
| 2776 | for (i = 0; i < num_peer_stats; i++) { | |
| 2777 | const struct wmi_10_2_peer_stats *src; | |
| 2778 | struct ath10k_fw_stats_peer *dst; | |
| 2779 | ||
| 2780 | src = (void *)skb->data; | |
| 2781 | if (!skb_pull(skb, sizeof(*src))) | |
| 2782 | return -EPROTO; | |
| 2783 | ||
| 2784 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2785 | if (!dst) | |
| 2786 | continue; | |
| 2787 | ||
| 2788 | ath10k_wmi_pull_peer_stats(&src->old, dst); | |
| 2789 | ||
| 2790 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
| 2791 | /* FIXME: expose 10.2 specific values */ | |
| 2792 | ||
| 2793 | list_add_tail(&dst->list, &stats->peers); | |
| 2794 | } | |
| 2795 | ||
| 2796 | return 0; | |
| 2797 | } | |
| 2798 | ||
| 2799 | static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar, | |
| 2800 | struct sk_buff *skb, | |
| 2801 | struct ath10k_fw_stats *stats) | |
| 2802 | { | |
| 2803 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
| 2804 | u32 num_pdev_stats; | |
| 2805 | u32 num_pdev_ext_stats; | |
| 2806 | u32 num_vdev_stats; | |
| 2807 | u32 num_peer_stats; | |
| 2808 | int i; | |
| 2809 | ||
| 2810 | if (!skb_pull(skb, sizeof(*ev))) | |
| 2811 | return -EPROTO; | |
| 2812 | ||
| 2813 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
| 2814 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
| 2815 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
| 2816 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
| 2817 | ||
| 2818 | for (i = 0; i < num_pdev_stats; i++) { | |
| 2819 | const struct wmi_10_2_pdev_stats *src; | |
| 2820 | struct ath10k_fw_stats_pdev *dst; | |
| 2821 | ||
| 2822 | src = (void *)skb->data; | |
| 2823 | if (!skb_pull(skb, sizeof(*src))) | |
| 2824 | return -EPROTO; | |
| 2825 | ||
| 2826 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2827 | if (!dst) | |
| 2828 | continue; | |
| 2829 | ||
| 2830 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
| 2831 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
| 2832 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
| 2833 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
| 2834 | /* FIXME: expose 10.2 specific values */ | |
| 2835 | ||
| 2836 | list_add_tail(&dst->list, &stats->pdevs); | |
| 2837 | } | |
| 2838 | ||
| 2839 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
| 2840 | const struct wmi_10_2_pdev_ext_stats *src; | |
| 2841 | ||
| 2842 | src = (void *)skb->data; | |
| 2843 | if (!skb_pull(skb, sizeof(*src))) | |
| 2844 | return -EPROTO; | |
| 2845 | ||
| 2846 | /* FIXME: expose values to userspace | |
| 2847 | * | |
| 2848 | * Note: Even though this loop seems to do nothing it is | |
| 2849 | * required to parse following sub-structures properly. | |
| 2850 | */ | |
| 2851 | } | |
| 2852 | ||
| 2853 | /* fw doesn't implement vdev stats */ | |
| 2854 | ||
| 2855 | for (i = 0; i < num_peer_stats; i++) { | |
| de46c015 | 2856 | const struct wmi_10_2_4_ext_peer_stats *src; |
| 20de2229 | 2857 | struct ath10k_fw_stats_peer *dst; |
| de46c015 | 2858 | int stats_len; |
| de46c015 | 2859 | |
| cc61a1bb | 2860 | if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) |
| de46c015 MSS |
2861 | stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats); |
| 2862 | else | |
| 2863 | stats_len = sizeof(struct wmi_10_2_4_peer_stats); | |
| 20de2229 MK |
2864 | |
| 2865 | src = (void *)skb->data; | |
| de46c015 | 2866 | if (!skb_pull(skb, stats_len)) |
| 20de2229 MK |
2867 | return -EPROTO; |
| 2868 | ||
| 2869 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2870 | if (!dst) | |
| 2871 | continue; | |
| 2872 | ||
| 2873 | ath10k_wmi_pull_peer_stats(&src->common.old, dst); | |
| 2874 | ||
| 2875 | dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate); | |
| de46c015 | 2876 | |
| cc61a1bb | 2877 | if (ath10k_peer_stats_enabled(ar)) |
| de46c015 | 2878 | dst->rx_duration = __le32_to_cpu(src->rx_duration); |
| 20de2229 MK |
2879 | /* FIXME: expose 10.2 specific values */ |
| 2880 | ||
| 2881 | list_add_tail(&dst->list, &stats->peers); | |
| 2882 | } | |
| 2883 | ||
| 2884 | return 0; | |
| 2885 | } | |
| 2886 | ||
| 98dd2b92 MP |
2887 | static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar, |
| 2888 | struct sk_buff *skb, | |
| 2889 | struct ath10k_fw_stats *stats) | |
| 2890 | { | |
| 2891 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | |
| 2892 | u32 num_pdev_stats; | |
| 2893 | u32 num_pdev_ext_stats; | |
| 2894 | u32 num_vdev_stats; | |
| 2895 | u32 num_peer_stats; | |
| 2896 | int i; | |
| 2897 | ||
| 2898 | if (!skb_pull(skb, sizeof(*ev))) | |
| 2899 | return -EPROTO; | |
| 2900 | ||
| 2901 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | |
| 2902 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | |
| 2903 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | |
| 2904 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | |
| 2905 | ||
| 2906 | for (i = 0; i < num_pdev_stats; i++) { | |
| 2907 | const struct wmi_10_4_pdev_stats *src; | |
| 2908 | struct ath10k_fw_stats_pdev *dst; | |
| 2909 | ||
| 2910 | src = (void *)skb->data; | |
| 2911 | if (!skb_pull(skb, sizeof(*src))) | |
| 2912 | return -EPROTO; | |
| 2913 | ||
| 2914 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2915 | if (!dst) | |
| 2916 | continue; | |
| 2917 | ||
| 2918 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | |
| 2919 | ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst); | |
| 2920 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | |
| 2921 | dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs); | |
| 2922 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | |
| 2923 | ||
| 2924 | list_add_tail(&dst->list, &stats->pdevs); | |
| 2925 | } | |
| 2926 | ||
| 2927 | for (i = 0; i < num_pdev_ext_stats; i++) { | |
| 2928 | const struct wmi_10_2_pdev_ext_stats *src; | |
| 2929 | ||
| 2930 | src = (void *)skb->data; | |
| 2931 | if (!skb_pull(skb, sizeof(*src))) | |
| 2932 | return -EPROTO; | |
| 2933 | ||
| 2934 | /* FIXME: expose values to userspace | |
| 2935 | * | |
| 2936 | * Note: Even though this loop seems to do nothing it is | |
| 2937 | * required to parse following sub-structures properly. | |
| 2938 | */ | |
| 2939 | } | |
| 2940 | ||
| 2941 | /* fw doesn't implement vdev stats */ | |
| 2942 | ||
| 2943 | for (i = 0; i < num_peer_stats; i++) { | |
| 2944 | const struct wmi_10_4_peer_stats *src; | |
| 2945 | struct ath10k_fw_stats_peer *dst; | |
| 2946 | ||
| 2947 | src = (void *)skb->data; | |
| 2948 | if (!skb_pull(skb, sizeof(*src))) | |
| 2949 | return -EPROTO; | |
| 2950 | ||
| 2951 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | |
| 2952 | if (!dst) | |
| 2953 | continue; | |
| 2954 | ||
| 2955 | ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); | |
| 2956 | dst->peer_rssi = __le32_to_cpu(src->peer_rssi); | |
| 2957 | dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); | |
| 2958 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | |
| 2959 | /* FIXME: expose 10.4 specific values */ | |
| 2960 | ||
| 2961 | list_add_tail(&dst->list, &stats->peers); | |
| 2962 | } | |
| 2963 | ||
| 2964 | return 0; | |
| 2965 | } | |
| 2966 | ||
| 0226d602 | 2967 | void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2968 | { |
| 7aa7a72a | 2969 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n"); |
| 60ef401a | 2970 | ath10k_debug_fw_stats_process(ar, skb); |
| 5e3dd157 KV |
2971 | } |
| 2972 | ||
| d7579d12 MK |
2973 | static int |
| 2974 | ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb, | |
| 2975 | struct wmi_vdev_start_ev_arg *arg) | |
| 32653cf1 MK |
2976 | { |
| 2977 | struct wmi_vdev_start_response_event *ev = (void *)skb->data; | |
| 2978 | ||
| 2979 | if (skb->len < sizeof(*ev)) | |
| 2980 | return -EPROTO; | |
| 2981 | ||
| 2982 | skb_pull(skb, sizeof(*ev)); | |
| 2983 | arg->vdev_id = ev->vdev_id; | |
| 2984 | arg->req_id = ev->req_id; | |
| 2985 | arg->resp_type = ev->resp_type; | |
| 2986 | arg->status = ev->status; | |
| 2987 | ||
| 2988 | return 0; | |
| 2989 | } | |
| 2990 | ||
| 0226d602 | 2991 | void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 2992 | { |
| 32653cf1 MK |
2993 | struct wmi_vdev_start_ev_arg arg = {}; |
| 2994 | int ret; | |
| 5e3dd157 | 2995 | |
| 7aa7a72a | 2996 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n"); |
| 5e3dd157 | 2997 | |
| d7579d12 | 2998 | ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg); |
| 32653cf1 MK |
2999 | if (ret) { |
| 3000 | ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret); | |
| 3001 | return; | |
| 3002 | } | |
| 5e3dd157 | 3003 | |
| 32653cf1 | 3004 | if (WARN_ON(__le32_to_cpu(arg.status))) |
| 5e3dd157 KV |
3005 | return; |
| 3006 | ||
| 3007 | complete(&ar->vdev_setup_done); | |
| 3008 | } | |
| 3009 | ||
| 0226d602 | 3010 | void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3011 | { |
| 7aa7a72a | 3012 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n"); |
| 5e3dd157 KV |
3013 | complete(&ar->vdev_setup_done); |
| 3014 | } | |
| 3015 | ||
| d7579d12 MK |
3016 | static int |
| 3017 | ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb, | |
| 3018 | struct wmi_peer_kick_ev_arg *arg) | |
| 32653cf1 MK |
3019 | { |
| 3020 | struct wmi_peer_sta_kickout_event *ev = (void *)skb->data; | |
| 3021 | ||
| 3022 | if (skb->len < sizeof(*ev)) | |
| 3023 | return -EPROTO; | |
| 3024 | ||
| 3025 | skb_pull(skb, sizeof(*ev)); | |
| 3026 | arg->mac_addr = ev->peer_macaddr.addr; | |
| 3027 | ||
| 3028 | return 0; | |
| 3029 | } | |
| 3030 | ||
| 0226d602 | 3031 | void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3032 | { |
| 32653cf1 | 3033 | struct wmi_peer_kick_ev_arg arg = {}; |
| 5a13e76e | 3034 | struct ieee80211_sta *sta; |
| 32653cf1 | 3035 | int ret; |
| 5a13e76e | 3036 | |
| d7579d12 | 3037 | ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg); |
| 32653cf1 MK |
3038 | if (ret) { |
| 3039 | ath10k_warn(ar, "failed to parse peer kickout event: %d\n", | |
| 3040 | ret); | |
| 3041 | return; | |
| 3042 | } | |
| 5a13e76e | 3043 | |
| 7aa7a72a | 3044 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n", |
| 32653cf1 | 3045 | arg.mac_addr); |
| 5a13e76e KV |
3046 | |
| 3047 | rcu_read_lock(); | |
| 3048 | ||
| 32653cf1 | 3049 | sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL); |
| 5a13e76e | 3050 | if (!sta) { |
| 7aa7a72a | 3051 | ath10k_warn(ar, "Spurious quick kickout for STA %pM\n", |
| 32653cf1 | 3052 | arg.mac_addr); |
| 5a13e76e KV |
3053 | goto exit; |
| 3054 | } | |
| 3055 | ||
| 3056 | ieee80211_report_low_ack(sta, 10); | |
| 3057 | ||
| 3058 | exit: | |
| 3059 | rcu_read_unlock(); | |
| 5e3dd157 KV |
3060 | } |
| 3061 | ||
| 3062 | /* | |
| 3063 | * FIXME | |
| 3064 | * | |
| 3065 | * We don't report to mac80211 sleep state of connected | |
| 3066 | * stations. Due to this mac80211 can't fill in TIM IE | |
| 3067 | * correctly. | |
| 3068 | * | |
| 3069 | * I know of no way of getting nullfunc frames that contain | |
| 3070 | * sleep transition from connected stations - these do not | |
| 3071 | * seem to be sent from the target to the host. There also | |
| 3072 | * doesn't seem to be a dedicated event for that. So the | |
| 3073 | * only way left to do this would be to read tim_bitmap | |
| 3074 | * during SWBA. | |
| 3075 | * | |
| 3076 | * We could probably try using tim_bitmap from SWBA to tell | |
| 3077 | * mac80211 which stations are asleep and which are not. The | |
| 3078 | * problem here is calling mac80211 functions so many times | |
| 3079 | * could take too long and make us miss the time to submit | |
| 3080 | * the beacon to the target. | |
| 3081 | * | |
| 3082 | * So as a workaround we try to extend the TIM IE if there | |
| 3083 | * is unicast buffered for stations with aid > 7 and fill it | |
| 3084 | * in ourselves. | |
| 3085 | */ | |
| 3086 | static void ath10k_wmi_update_tim(struct ath10k *ar, | |
| 3087 | struct ath10k_vif *arvif, | |
| 3088 | struct sk_buff *bcn, | |
| a03fee34 | 3089 | const struct wmi_tim_info_arg *tim_info) |
| 5e3dd157 KV |
3090 | { |
| 3091 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data; | |
| 3092 | struct ieee80211_tim_ie *tim; | |
| 3093 | u8 *ies, *ie; | |
| 3094 | u8 ie_len, pvm_len; | |
| af762c0b | 3095 | __le32 t; |
| a03fee34 RM |
3096 | u32 v, tim_len; |
| 3097 | ||
| 3098 | /* When FW reports 0 in tim_len, ensure atleast first byte | |
| 3099 | * in tim_bitmap is considered for pvm calculation. | |
| 3100 | */ | |
| 3101 | tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1; | |
| 5e3dd157 KV |
3102 | |
| 3103 | /* if next SWBA has no tim_changed the tim_bitmap is garbage. | |
| 3104 | * we must copy the bitmap upon change and reuse it later */ | |
| 32653cf1 | 3105 | if (__le32_to_cpu(tim_info->tim_changed)) { |
| 5e3dd157 KV |
3106 | int i; |
| 3107 | ||
| a03fee34 RM |
3108 | if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) { |
| 3109 | ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu", | |
| 3110 | tim_len, sizeof(arvif->u.ap.tim_bitmap)); | |
| 3111 | tim_len = sizeof(arvif->u.ap.tim_bitmap); | |
| 3112 | } | |
| 5e3dd157 | 3113 | |
| a03fee34 | 3114 | for (i = 0; i < tim_len; i++) { |
| 32653cf1 | 3115 | t = tim_info->tim_bitmap[i / 4]; |
| af762c0b | 3116 | v = __le32_to_cpu(t); |
| 5e3dd157 KV |
3117 | arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; |
| 3118 | } | |
| 3119 | ||
| a03fee34 RM |
3120 | /* FW reports either length 0 or length based on max supported |
| 3121 | * station. so we calculate this on our own | |
| 3122 | */ | |
| 5e3dd157 | 3123 | arvif->u.ap.tim_len = 0; |
| a03fee34 | 3124 | for (i = 0; i < tim_len; i++) |
| 5e3dd157 KV |
3125 | if (arvif->u.ap.tim_bitmap[i]) |
| 3126 | arvif->u.ap.tim_len = i; | |
| 3127 | ||
| 3128 | arvif->u.ap.tim_len++; | |
| 3129 | } | |
| 3130 | ||
| 3131 | ies = bcn->data; | |
| 3132 | ies += ieee80211_hdrlen(hdr->frame_control); | |
| 3133 | ies += 12; /* fixed parameters */ | |
| 3134 | ||
| 3135 | ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies, | |
| 3136 | (u8 *)skb_tail_pointer(bcn) - ies); | |
| 3137 | if (!ie) { | |
| 09af8f85 | 3138 | if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS) |
| 7aa7a72a | 3139 | ath10k_warn(ar, "no tim ie found;\n"); |
| 5e3dd157 KV |
3140 | return; |
| 3141 | } | |
| 3142 | ||
| 3143 | tim = (void *)ie + 2; | |
| 3144 | ie_len = ie[1]; | |
| 3145 | pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */ | |
| 3146 | ||
| 3147 | if (pvm_len < arvif->u.ap.tim_len) { | |
| a03fee34 | 3148 | int expand_size = tim_len - pvm_len; |
| 5e3dd157 KV |
3149 | int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len); |
| 3150 | void *next_ie = ie + 2 + ie_len; | |
| 3151 | ||
| 3152 | if (skb_put(bcn, expand_size)) { | |
| 3153 | memmove(next_ie + expand_size, next_ie, move_size); | |
| 3154 | ||
| 3155 | ie[1] += expand_size; | |
| 3156 | ie_len += expand_size; | |
| 3157 | pvm_len += expand_size; | |
| 3158 | } else { | |
| 7aa7a72a | 3159 | ath10k_warn(ar, "tim expansion failed\n"); |
| 5e3dd157 KV |
3160 | } |
| 3161 | } | |
| 3162 | ||
| a03fee34 | 3163 | if (pvm_len > tim_len) { |
| 7aa7a72a | 3164 | ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len); |
| 5e3dd157 KV |
3165 | return; |
| 3166 | } | |
| 3167 | ||
| 32653cf1 | 3168 | tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast); |
| 5e3dd157 KV |
3169 | memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len); |
| 3170 | ||
| 748afc47 | 3171 | if (tim->dtim_count == 0) { |
| 66b8a010 | 3172 | ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO; |
| 748afc47 | 3173 | |
| 32653cf1 | 3174 | if (__le32_to_cpu(tim_info->tim_mcast) == 1) |
| 66b8a010 | 3175 | ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB; |
| 748afc47 MK |
3176 | } |
| 3177 | ||
| 7aa7a72a | 3178 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n", |
| 5e3dd157 KV |
3179 | tim->dtim_count, tim->dtim_period, |
| 3180 | tim->bitmap_ctrl, pvm_len); | |
| 3181 | } | |
| 3182 | ||
| 5e3dd157 KV |
3183 | static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif, |
| 3184 | struct sk_buff *bcn, | |
| 32653cf1 | 3185 | const struct wmi_p2p_noa_info *noa) |
| 5e3dd157 | 3186 | { |
| 08c27be1 | 3187 | if (!arvif->vif->p2p) |
| 5e3dd157 KV |
3188 | return; |
| 3189 | ||
| 7aa7a72a | 3190 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed); |
| 5e3dd157 | 3191 | |
| 6a94888f MK |
3192 | if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) |
| 3193 | ath10k_p2p_noa_update(arvif, noa); | |
| 5e3dd157 KV |
3194 | |
| 3195 | if (arvif->u.ap.noa_data) | |
| 3196 | if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC)) | |
| 3197 | memcpy(skb_put(bcn, arvif->u.ap.noa_len), | |
| 3198 | arvif->u.ap.noa_data, | |
| 3199 | arvif->u.ap.noa_len); | |
| 5e3dd157 KV |
3200 | } |
| 3201 | ||
| d7579d12 MK |
3202 | static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb, |
| 3203 | struct wmi_swba_ev_arg *arg) | |
| 32653cf1 MK |
3204 | { |
| 3205 | struct wmi_host_swba_event *ev = (void *)skb->data; | |
| 3206 | u32 map; | |
| 3207 | size_t i; | |
| 3208 | ||
| 3209 | if (skb->len < sizeof(*ev)) | |
| 3210 | return -EPROTO; | |
| 3211 | ||
| 3212 | skb_pull(skb, sizeof(*ev)); | |
| 3213 | arg->vdev_map = ev->vdev_map; | |
| 3214 | ||
| 3215 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | |
| 3216 | if (!(map & BIT(0))) | |
| 3217 | continue; | |
| 3218 | ||
| 3219 | /* If this happens there were some changes in firmware and | |
| 3220 | * ath10k should update the max size of tim_info array. | |
| 3221 | */ | |
| 3222 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | |
| 3223 | break; | |
| 3224 | ||
| a03fee34 RM |
3225 | if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > |
| 3226 | sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { | |
| 3227 | ath10k_warn(ar, "refusing to parse invalid swba structure\n"); | |
| 3228 | return -EPROTO; | |
| 3229 | } | |
| 3230 | ||
| 3231 | arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len; | |
| 3232 | arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; | |
| 3233 | arg->tim_info[i].tim_bitmap = | |
| 3234 | ev->bcn_info[i].tim_info.tim_bitmap; | |
| 3235 | arg->tim_info[i].tim_changed = | |
| 3236 | ev->bcn_info[i].tim_info.tim_changed; | |
| 3237 | arg->tim_info[i].tim_num_ps_pending = | |
| 3238 | ev->bcn_info[i].tim_info.tim_num_ps_pending; | |
| 3239 | ||
| 32653cf1 MK |
3240 | arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info; |
| 3241 | i++; | |
| 3242 | } | |
| 3243 | ||
| 3244 | return 0; | |
| 3245 | } | |
| 3246 | ||
| 8b019fb0 YL |
3247 | static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar, |
| 3248 | struct sk_buff *skb, | |
| 3249 | struct wmi_swba_ev_arg *arg) | |
| 3250 | { | |
| 3251 | struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data; | |
| 3252 | u32 map; | |
| 3253 | size_t i; | |
| 3254 | ||
| 3255 | if (skb->len < sizeof(*ev)) | |
| 3256 | return -EPROTO; | |
| 3257 | ||
| 3258 | skb_pull(skb, sizeof(*ev)); | |
| 3259 | arg->vdev_map = ev->vdev_map; | |
| 3260 | ||
| 3261 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | |
| 3262 | if (!(map & BIT(0))) | |
| 3263 | continue; | |
| 3264 | ||
| 3265 | /* If this happens there were some changes in firmware and | |
| 3266 | * ath10k should update the max size of tim_info array. | |
| 3267 | */ | |
| 3268 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | |
| 3269 | break; | |
| 3270 | ||
| 3271 | if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > | |
| 3272 | sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { | |
| 3273 | ath10k_warn(ar, "refusing to parse invalid swba structure\n"); | |
| 3274 | return -EPROTO; | |
| 3275 | } | |
| 3276 | ||
| 3277 | arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len; | |
| 3278 | arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; | |
| 3279 | arg->tim_info[i].tim_bitmap = | |
| 3280 | ev->bcn_info[i].tim_info.tim_bitmap; | |
| 3281 | arg->tim_info[i].tim_changed = | |
| 3282 | ev->bcn_info[i].tim_info.tim_changed; | |
| 3283 | arg->tim_info[i].tim_num_ps_pending = | |
| 3284 | ev->bcn_info[i].tim_info.tim_num_ps_pending; | |
| 3285 | i++; | |
| 3286 | } | |
| 3287 | ||
| 3288 | return 0; | |
| 3289 | } | |
| 3290 | ||
| 3cec3be3 RM |
3291 | static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar, |
| 3292 | struct sk_buff *skb, | |
| 3293 | struct wmi_swba_ev_arg *arg) | |
| 3294 | { | |
| 3295 | struct wmi_10_4_host_swba_event *ev = (void *)skb->data; | |
| 3296 | u32 map, tim_len; | |
| 3297 | size_t i; | |
| 3298 | ||
| 3299 | if (skb->len < sizeof(*ev)) | |
| 3300 | return -EPROTO; | |
| 3301 | ||
| 3302 | skb_pull(skb, sizeof(*ev)); | |
| 3303 | arg->vdev_map = ev->vdev_map; | |
| 3304 | ||
| 3305 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | |
| 3306 | if (!(map & BIT(0))) | |
| 3307 | continue; | |
| 3308 | ||
| 3309 | /* If this happens there were some changes in firmware and | |
| 3310 | * ath10k should update the max size of tim_info array. | |
| 3311 | */ | |
| 3312 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | |
| 3313 | break; | |
| 3314 | ||
| 3315 | if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) > | |
| 3316 | sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) { | |
| 3317 | ath10k_warn(ar, "refusing to parse invalid swba structure\n"); | |
| 3318 | return -EPROTO; | |
| 3319 | } | |
| 3320 | ||
| 3321 | tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len); | |
| 3322 | if (tim_len) { | |
| 3323 | /* Exclude 4 byte guard length */ | |
| 3324 | tim_len -= 4; | |
| 3325 | arg->tim_info[i].tim_len = __cpu_to_le32(tim_len); | |
| 3326 | } else { | |
| 3327 | arg->tim_info[i].tim_len = 0; | |
| 3328 | } | |
| 3329 | ||
| 3330 | arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast; | |
| 3331 | arg->tim_info[i].tim_bitmap = | |
| 3332 | ev->bcn_info[i].tim_info.tim_bitmap; | |
| 3333 | arg->tim_info[i].tim_changed = | |
| 3334 | ev->bcn_info[i].tim_info.tim_changed; | |
| 3335 | arg->tim_info[i].tim_num_ps_pending = | |
| 3336 | ev->bcn_info[i].tim_info.tim_num_ps_pending; | |
| 3337 | ||
| 3338 | /* 10.4 firmware doesn't have p2p support. notice of absence | |
| 3339 | * info can be ignored for now. | |
| 3340 | */ | |
| 3341 | ||
| 3342 | i++; | |
| 3343 | } | |
| 3344 | ||
| 3345 | return 0; | |
| 3346 | } | |
| 3347 | ||
| 08e75ea8 VN |
3348 | static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar) |
| 3349 | { | |
| 3350 | return WMI_TXBF_CONF_BEFORE_ASSOC; | |
| 3351 | } | |
| 3352 | ||
| 0226d602 | 3353 | void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3354 | { |
| 32653cf1 | 3355 | struct wmi_swba_ev_arg arg = {}; |
| 5e3dd157 KV |
3356 | u32 map; |
| 3357 | int i = -1; | |
| a03fee34 | 3358 | const struct wmi_tim_info_arg *tim_info; |
| 32653cf1 | 3359 | const struct wmi_p2p_noa_info *noa_info; |
| 5e3dd157 | 3360 | struct ath10k_vif *arvif; |
| 5e3dd157 | 3361 | struct sk_buff *bcn; |
| 64badcb6 | 3362 | dma_addr_t paddr; |
| 767d34fc | 3363 | int ret, vdev_id = 0; |
| 5e3dd157 | 3364 | |
| d7579d12 | 3365 | ret = ath10k_wmi_pull_swba(ar, skb, &arg); |
| 32653cf1 MK |
3366 | if (ret) { |
| 3367 | ath10k_warn(ar, "failed to parse swba event: %d\n", ret); | |
| 3368 | return; | |
| 3369 | } | |
| 3370 | ||
| 3371 | map = __le32_to_cpu(arg.vdev_map); | |
| 5e3dd157 | 3372 | |
| 7aa7a72a | 3373 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n", |
| 32653cf1 | 3374 | map); |
| 5e3dd157 KV |
3375 | |
| 3376 | for (; map; map >>= 1, vdev_id++) { | |
| 3377 | if (!(map & 0x1)) | |
| 3378 | continue; | |
| 3379 | ||
| 3380 | i++; | |
| 3381 | ||
| 3382 | if (i >= WMI_MAX_AP_VDEV) { | |
| 7aa7a72a | 3383 | ath10k_warn(ar, "swba has corrupted vdev map\n"); |
| 5e3dd157 KV |
3384 | break; |
| 3385 | } | |
| 3386 | ||
| a03fee34 | 3387 | tim_info = &arg.tim_info[i]; |
| 32653cf1 | 3388 | noa_info = arg.noa_info[i]; |
| 5e3dd157 | 3389 | |
| 7aa7a72a | 3390 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
| 7a8a396b | 3391 | "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n", |
| 5e3dd157 | 3392 | i, |
| 32653cf1 MK |
3393 | __le32_to_cpu(tim_info->tim_len), |
| 3394 | __le32_to_cpu(tim_info->tim_mcast), | |
| 3395 | __le32_to_cpu(tim_info->tim_changed), | |
| 3396 | __le32_to_cpu(tim_info->tim_num_ps_pending), | |
| 3397 | __le32_to_cpu(tim_info->tim_bitmap[3]), | |
| 3398 | __le32_to_cpu(tim_info->tim_bitmap[2]), | |
| 3399 | __le32_to_cpu(tim_info->tim_bitmap[1]), | |
| 3400 | __le32_to_cpu(tim_info->tim_bitmap[0])); | |
| 5e3dd157 | 3401 | |
| a03fee34 RM |
3402 | /* TODO: Only first 4 word from tim_bitmap is dumped. |
| 3403 | * Extend debug code to dump full tim_bitmap. | |
| 3404 | */ | |
| 3405 | ||
| 5e3dd157 KV |
3406 | arvif = ath10k_get_arvif(ar, vdev_id); |
| 3407 | if (arvif == NULL) { | |
| 7aa7a72a MK |
3408 | ath10k_warn(ar, "no vif for vdev_id %d found\n", |
| 3409 | vdev_id); | |
| 5e3dd157 KV |
3410 | continue; |
| 3411 | } | |
| 3412 | ||
| c2df44b3 MK |
3413 | /* There are no completions for beacons so wait for next SWBA |
| 3414 | * before telling mac80211 to decrement CSA counter | |
| 3415 | * | |
| 3416 | * Once CSA counter is completed stop sending beacons until | |
| 3417 | * actual channel switch is done */ | |
| 3418 | if (arvif->vif->csa_active && | |
| 3419 | ieee80211_csa_is_complete(arvif->vif)) { | |
| 3420 | ieee80211_csa_finish(arvif->vif); | |
| 3421 | continue; | |
| 3422 | } | |
| 3423 | ||
| 5e3dd157 KV |
3424 | bcn = ieee80211_beacon_get(ar->hw, arvif->vif); |
| 3425 | if (!bcn) { | |
| 7aa7a72a | 3426 | ath10k_warn(ar, "could not get mac80211 beacon\n"); |
| 5e3dd157 KV |
3427 | continue; |
| 3428 | } | |
| 3429 | ||
| 4b604558 | 3430 | ath10k_tx_h_seq_no(arvif->vif, bcn); |
| 32653cf1 MK |
3431 | ath10k_wmi_update_tim(ar, arvif, bcn, tim_info); |
| 3432 | ath10k_wmi_update_noa(ar, arvif, bcn, noa_info); | |
| 5e3dd157 | 3433 | |
| ed54388a | 3434 | spin_lock_bh(&ar->data_lock); |
| 748afc47 | 3435 | |
| ed54388a | 3436 | if (arvif->beacon) { |
| af21319f MK |
3437 | switch (arvif->beacon_state) { |
| 3438 | case ATH10K_BEACON_SENT: | |
| 3439 | break; | |
| 3440 | case ATH10K_BEACON_SCHEDULED: | |
| 3441 | ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n", | |
| 3442 | arvif->vdev_id); | |
| 3443 | break; | |
| 3444 | case ATH10K_BEACON_SENDING: | |
| 3445 | ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n", | |
| 748afc47 | 3446 | arvif->vdev_id); |
| af21319f MK |
3447 | dev_kfree_skb(bcn); |
| 3448 | goto skip; | |
| 3449 | } | |
| 748afc47 | 3450 | |
| 64badcb6 | 3451 | ath10k_mac_vif_beacon_free(arvif); |
| ed54388a | 3452 | } |
| 5e3dd157 | 3453 | |
| 64badcb6 MK |
3454 | if (!arvif->beacon_buf) { |
| 3455 | paddr = dma_map_single(arvif->ar->dev, bcn->data, | |
| 3456 | bcn->len, DMA_TO_DEVICE); | |
| 3457 | ret = dma_mapping_error(arvif->ar->dev, paddr); | |
| 3458 | if (ret) { | |
| 3459 | ath10k_warn(ar, "failed to map beacon: %d\n", | |
| 3460 | ret); | |
| 3461 | dev_kfree_skb_any(bcn); | |
| 5e55e3cb | 3462 | ret = -EIO; |
| 64badcb6 MK |
3463 | goto skip; |
| 3464 | } | |
| 3465 | ||
| 3466 | ATH10K_SKB_CB(bcn)->paddr = paddr; | |
| 3467 | } else { | |
| 3468 | if (bcn->len > IEEE80211_MAX_FRAME_LEN) { | |
| 3469 | ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n", | |
| 3470 | bcn->len, IEEE80211_MAX_FRAME_LEN); | |
| 3471 | skb_trim(bcn, IEEE80211_MAX_FRAME_LEN); | |
| 3472 | } | |
| 3473 | memcpy(arvif->beacon_buf, bcn->data, bcn->len); | |
| 3474 | ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr; | |
| 767d34fc | 3475 | } |
| 748afc47 | 3476 | |
| ed54388a | 3477 | arvif->beacon = bcn; |
| af21319f | 3478 | arvif->beacon_state = ATH10K_BEACON_SCHEDULED; |
| 5e3dd157 | 3479 | |
| 5ce8e7fd RM |
3480 | trace_ath10k_tx_hdr(ar, bcn->data, bcn->len); |
| 3481 | trace_ath10k_tx_payload(ar, bcn->data, bcn->len); | |
| 3482 | ||
| 767d34fc | 3483 | skip: |
| ed54388a | 3484 | spin_unlock_bh(&ar->data_lock); |
| 5e3dd157 | 3485 | } |
| af21319f MK |
3486 | |
| 3487 | ath10k_wmi_tx_beacons_nowait(ar); | |
| 5e3dd157 KV |
3488 | } |
| 3489 | ||
| 0226d602 | 3490 | void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3491 | { |
| 7aa7a72a | 3492 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n"); |
| 5e3dd157 KV |
3493 | } |
| 3494 | ||
| 9702c686 | 3495 | static void ath10k_dfs_radar_report(struct ath10k *ar, |
| 991adf71 | 3496 | struct wmi_phyerr_ev_arg *phyerr, |
| 2332d0ae | 3497 | const struct phyerr_radar_report *rr, |
| 9702c686 JD |
3498 | u64 tsf) |
| 3499 | { | |
| 3500 | u32 reg0, reg1, tsf32l; | |
| 500ff9f9 | 3501 | struct ieee80211_channel *ch; |
| 9702c686 JD |
3502 | struct pulse_event pe; |
| 3503 | u64 tsf64; | |
| 3504 | u8 rssi, width; | |
| 3505 | ||
| 3506 | reg0 = __le32_to_cpu(rr->reg0); | |
| 3507 | reg1 = __le32_to_cpu(rr->reg1); | |
| 3508 | ||
| 7aa7a72a | 3509 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3510 | "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n", |
| 3511 | MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP), | |
| 3512 | MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH), | |
| 3513 | MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN), | |
| 3514 | MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF)); | |
| 7aa7a72a | 3515 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3516 | "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n", |
| 3517 | MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK), | |
| 3518 | MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX), | |
| 3519 | MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID), | |
| 3520 | MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN), | |
| 3521 | MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK)); | |
| 7aa7a72a | 3522 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3523 | "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n", |
| 3524 | MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET), | |
| 3525 | MS(reg1, RADAR_REPORT_REG1_PULSE_DUR)); | |
| 3526 | ||
| 3527 | if (!ar->dfs_detector) | |
| 3528 | return; | |
| 3529 | ||
| 500ff9f9 MK |
3530 | spin_lock_bh(&ar->data_lock); |
| 3531 | ch = ar->rx_channel; | |
| 3532 | spin_unlock_bh(&ar->data_lock); | |
| 3533 | ||
| 3534 | if (!ch) { | |
| 3535 | ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n"); | |
| 3536 | goto radar_detected; | |
| 3537 | } | |
| 3538 | ||
| 9702c686 | 3539 | /* report event to DFS pattern detector */ |
| 991adf71 | 3540 | tsf32l = phyerr->tsf_timestamp; |
| 9702c686 JD |
3541 | tsf64 = tsf & (~0xFFFFFFFFULL); |
| 3542 | tsf64 |= tsf32l; | |
| 3543 | ||
| 3544 | width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR); | |
| 2332d0ae | 3545 | rssi = phyerr->rssi_combined; |
| 9702c686 JD |
3546 | |
| 3547 | /* hardware store this as 8 bit signed value, | |
| 3548 | * set to zero if negative number | |
| 3549 | */ | |
| 3550 | if (rssi & 0x80) | |
| 3551 | rssi = 0; | |
| 3552 | ||
| 3553 | pe.ts = tsf64; | |
| 500ff9f9 | 3554 | pe.freq = ch->center_freq; |
| 9702c686 JD |
3555 | pe.width = width; |
| 3556 | pe.rssi = rssi; | |
| 2c3f26a0 | 3557 | pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0); |
| 7aa7a72a | 3558 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3559 | "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n", |
| 3560 | pe.freq, pe.width, pe.rssi, pe.ts); | |
| 3561 | ||
| 3562 | ATH10K_DFS_STAT_INC(ar, pulses_detected); | |
| 3563 | ||
| 3564 | if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) { | |
| 7aa7a72a | 3565 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3566 | "dfs no pulse pattern detected, yet\n"); |
| 3567 | return; | |
| 3568 | } | |
| 3569 | ||
| 500ff9f9 | 3570 | radar_detected: |
| 7aa7a72a | 3571 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n"); |
| 9702c686 | 3572 | ATH10K_DFS_STAT_INC(ar, radar_detected); |
| 7d9b40b4 MP |
3573 | |
| 3574 | /* Control radar events reporting in debugfs file | |
| 3575 | dfs_block_radar_events */ | |
| 3576 | if (ar->dfs_block_radar_events) { | |
| 7aa7a72a | 3577 | ath10k_info(ar, "DFS Radar detected, but ignored as requested\n"); |
| 7d9b40b4 MP |
3578 | return; |
| 3579 | } | |
| 3580 | ||
| 9702c686 JD |
3581 | ieee80211_radar_detected(ar->hw); |
| 3582 | } | |
| 3583 | ||
| 3584 | static int ath10k_dfs_fft_report(struct ath10k *ar, | |
| 991adf71 | 3585 | struct wmi_phyerr_ev_arg *phyerr, |
| 2332d0ae | 3586 | const struct phyerr_fft_report *fftr, |
| 9702c686 JD |
3587 | u64 tsf) |
| 3588 | { | |
| 3589 | u32 reg0, reg1; | |
| 3590 | u8 rssi, peak_mag; | |
| 3591 | ||
| 3592 | reg0 = __le32_to_cpu(fftr->reg0); | |
| 3593 | reg1 = __le32_to_cpu(fftr->reg1); | |
| 2332d0ae | 3594 | rssi = phyerr->rssi_combined; |
| 9702c686 | 3595 | |
| 7aa7a72a | 3596 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3597 | "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n", |
| 3598 | MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB), | |
| 3599 | MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB), | |
| 3600 | MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX), | |
| 3601 | MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX)); | |
| 7aa7a72a | 3602 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3603 | "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n", |
| 3604 | MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB), | |
| 3605 | MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB), | |
| 3606 | MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG), | |
| 3607 | MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB)); | |
| 3608 | ||
| 3609 | peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG); | |
| 3610 | ||
| 3611 | /* false event detection */ | |
| 3612 | if (rssi == DFS_RSSI_POSSIBLY_FALSE && | |
| 3613 | peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) { | |
| 7aa7a72a | 3614 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n"); |
| 9702c686 JD |
3615 | ATH10K_DFS_STAT_INC(ar, pulses_discarded); |
| 3616 | return -EINVAL; | |
| 3617 | } | |
| 3618 | ||
| 3619 | return 0; | |
| 3620 | } | |
| 3621 | ||
| 0226d602 | 3622 | void ath10k_wmi_event_dfs(struct ath10k *ar, |
| 991adf71 | 3623 | struct wmi_phyerr_ev_arg *phyerr, |
| 0226d602 | 3624 | u64 tsf) |
| 9702c686 JD |
3625 | { |
| 3626 | int buf_len, tlv_len, res, i = 0; | |
| 2332d0ae MK |
3627 | const struct phyerr_tlv *tlv; |
| 3628 | const struct phyerr_radar_report *rr; | |
| 3629 | const struct phyerr_fft_report *fftr; | |
| 3630 | const u8 *tlv_buf; | |
| 9702c686 | 3631 | |
| 991adf71 | 3632 | buf_len = phyerr->buf_len; |
| 7aa7a72a | 3633 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 | 3634 | "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n", |
| 2332d0ae | 3635 | phyerr->phy_err_code, phyerr->rssi_combined, |
| 991adf71 | 3636 | phyerr->tsf_timestamp, tsf, buf_len); |
| 9702c686 JD |
3637 | |
| 3638 | /* Skip event if DFS disabled */ | |
| 3639 | if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED)) | |
| 3640 | return; | |
| 3641 | ||
| 3642 | ATH10K_DFS_STAT_INC(ar, pulses_total); | |
| 3643 | ||
| 3644 | while (i < buf_len) { | |
| 3645 | if (i + sizeof(*tlv) > buf_len) { | |
| 7aa7a72a MK |
3646 | ath10k_warn(ar, "too short buf for tlv header (%d)\n", |
| 3647 | i); | |
| 9702c686 JD |
3648 | return; |
| 3649 | } | |
| 3650 | ||
| 2332d0ae | 3651 | tlv = (struct phyerr_tlv *)&phyerr->buf[i]; |
| 9702c686 | 3652 | tlv_len = __le16_to_cpu(tlv->len); |
| 2332d0ae | 3653 | tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; |
| 7aa7a72a | 3654 | ath10k_dbg(ar, ATH10K_DBG_REGULATORY, |
| 9702c686 JD |
3655 | "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n", |
| 3656 | tlv_len, tlv->tag, tlv->sig); | |
| 3657 | ||
| 3658 | switch (tlv->tag) { | |
| 3659 | case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY: | |
| 3660 | if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) { | |
| 7aa7a72a | 3661 | ath10k_warn(ar, "too short radar pulse summary (%d)\n", |
| 9702c686 JD |
3662 | i); |
| 3663 | return; | |
| 3664 | } | |
| 3665 | ||
| 3666 | rr = (struct phyerr_radar_report *)tlv_buf; | |
| 2332d0ae | 3667 | ath10k_dfs_radar_report(ar, phyerr, rr, tsf); |
| 9702c686 JD |
3668 | break; |
| 3669 | case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: | |
| 3670 | if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) { | |
| 7aa7a72a MK |
3671 | ath10k_warn(ar, "too short fft report (%d)\n", |
| 3672 | i); | |
| 9702c686 JD |
3673 | return; |
| 3674 | } | |
| 3675 | ||
| 3676 | fftr = (struct phyerr_fft_report *)tlv_buf; | |
| 2332d0ae | 3677 | res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf); |
| 9702c686 JD |
3678 | if (res) |
| 3679 | return; | |
| 3680 | break; | |
| 3681 | } | |
| 3682 | ||
| 3683 | i += sizeof(*tlv) + tlv_len; | |
| 3684 | } | |
| 3685 | } | |
| 3686 | ||
| 0226d602 | 3687 | void ath10k_wmi_event_spectral_scan(struct ath10k *ar, |
| 991adf71 | 3688 | struct wmi_phyerr_ev_arg *phyerr, |
| 0226d602 | 3689 | u64 tsf) |
| 9702c686 | 3690 | { |
| 855aed12 SW |
3691 | int buf_len, tlv_len, res, i = 0; |
| 3692 | struct phyerr_tlv *tlv; | |
| 2332d0ae MK |
3693 | const void *tlv_buf; |
| 3694 | const struct phyerr_fft_report *fftr; | |
| 855aed12 SW |
3695 | size_t fftr_len; |
| 3696 | ||
| 991adf71 | 3697 | buf_len = phyerr->buf_len; |
| 855aed12 SW |
3698 | |
| 3699 | while (i < buf_len) { | |
| 3700 | if (i + sizeof(*tlv) > buf_len) { | |
| 7aa7a72a | 3701 | ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n", |
| 855aed12 SW |
3702 | i); |
| 3703 | return; | |
| 3704 | } | |
| 3705 | ||
| 2332d0ae | 3706 | tlv = (struct phyerr_tlv *)&phyerr->buf[i]; |
| 855aed12 | 3707 | tlv_len = __le16_to_cpu(tlv->len); |
| 2332d0ae | 3708 | tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; |
| 855aed12 SW |
3709 | |
| 3710 | if (i + sizeof(*tlv) + tlv_len > buf_len) { | |
| 7aa7a72a | 3711 | ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n", |
| 855aed12 SW |
3712 | i); |
| 3713 | return; | |
| 3714 | } | |
| 3715 | ||
| 3716 | switch (tlv->tag) { | |
| 3717 | case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: | |
| 3718 | if (sizeof(*fftr) > tlv_len) { | |
| 7aa7a72a | 3719 | ath10k_warn(ar, "failed to parse fft report at byte %d\n", |
| 855aed12 SW |
3720 | i); |
| 3721 | return; | |
| 3722 | } | |
| 3723 | ||
| 3724 | fftr_len = tlv_len - sizeof(*fftr); | |
| 2332d0ae MK |
3725 | fftr = tlv_buf; |
| 3726 | res = ath10k_spectral_process_fft(ar, phyerr, | |
| 855aed12 SW |
3727 | fftr, fftr_len, |
| 3728 | tsf); | |
| 3729 | if (res < 0) { | |
| 3413e97d | 3730 | ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n", |
| 617b0f4d | 3731 | res); |
| 855aed12 SW |
3732 | return; |
| 3733 | } | |
| 3734 | break; | |
| 3735 | } | |
| 3736 | ||
| 3737 | i += sizeof(*tlv) + tlv_len; | |
| 3738 | } | |
| 9702c686 JD |
3739 | } |
| 3740 | ||
| 991adf71 RM |
3741 | static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar, |
| 3742 | struct sk_buff *skb, | |
| 3743 | struct wmi_phyerr_hdr_arg *arg) | |
| 32653cf1 MK |
3744 | { |
| 3745 | struct wmi_phyerr_event *ev = (void *)skb->data; | |
| 3746 | ||
| 3747 | if (skb->len < sizeof(*ev)) | |
| 3748 | return -EPROTO; | |
| 3749 | ||
| 991adf71 RM |
3750 | arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs); |
| 3751 | arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32); | |
| 3752 | arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32); | |
| 3753 | arg->buf_len = skb->len - sizeof(*ev); | |
| 32653cf1 MK |
3754 | arg->phyerrs = ev->phyerrs; |
| 3755 | ||
| 3756 | return 0; | |
| 3757 | } | |
| 3758 | ||
| 2b0a2e0d RM |
3759 | static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar, |
| 3760 | struct sk_buff *skb, | |
| 3761 | struct wmi_phyerr_hdr_arg *arg) | |
| 3762 | { | |
| 3763 | struct wmi_10_4_phyerr_event *ev = (void *)skb->data; | |
| 3764 | ||
| 3765 | if (skb->len < sizeof(*ev)) | |
| 3766 | return -EPROTO; | |
| 3767 | ||
| 3768 | /* 10.4 firmware always reports only one phyerr */ | |
| 3769 | arg->num_phyerrs = 1; | |
| 3770 | ||
| 3771 | arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32); | |
| 3772 | arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32); | |
| 3773 | arg->buf_len = skb->len; | |
| 3774 | arg->phyerrs = skb->data; | |
| 3775 | ||
| 3776 | return 0; | |
| 3777 | } | |
| 3778 | ||
| 991adf71 RM |
3779 | int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, |
| 3780 | const void *phyerr_buf, | |
| 3781 | int left_len, | |
| 3782 | struct wmi_phyerr_ev_arg *arg) | |
| 3783 | { | |
| 3784 | const struct wmi_phyerr *phyerr = phyerr_buf; | |
| 3785 | int i; | |
| 3786 | ||
| 3787 | if (left_len < sizeof(*phyerr)) { | |
| ee92a209 | 3788 | ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n", |
| 991adf71 RM |
3789 | left_len, sizeof(*phyerr)); |
| 3790 | return -EINVAL; | |
| 3791 | } | |
| 3792 | ||
| 3793 | arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp); | |
| 3794 | arg->freq1 = __le16_to_cpu(phyerr->freq1); | |
| 3795 | arg->freq2 = __le16_to_cpu(phyerr->freq2); | |
| 3796 | arg->rssi_combined = phyerr->rssi_combined; | |
| 3797 | arg->chan_width_mhz = phyerr->chan_width_mhz; | |
| 3798 | arg->buf_len = __le32_to_cpu(phyerr->buf_len); | |
| 3799 | arg->buf = phyerr->buf; | |
| 3800 | arg->hdr_len = sizeof(*phyerr); | |
| 3801 | ||
| 3802 | for (i = 0; i < 4; i++) | |
| 3803 | arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]); | |
| 3804 | ||
| 3805 | switch (phyerr->phy_err_code) { | |
| 3806 | case PHY_ERROR_GEN_SPECTRAL_SCAN: | |
| 3807 | arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN; | |
| 3808 | break; | |
| 3809 | case PHY_ERROR_GEN_FALSE_RADAR_EXT: | |
| 3810 | arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT; | |
| 3811 | break; | |
| 3812 | case PHY_ERROR_GEN_RADAR: | |
| 3813 | arg->phy_err_code = PHY_ERROR_RADAR; | |
| 3814 | break; | |
| 3815 | default: | |
| 3816 | arg->phy_err_code = PHY_ERROR_UNKNOWN; | |
| 3817 | break; | |
| 3818 | } | |
| 3819 | ||
| 3820 | return 0; | |
| 3821 | } | |
| 3822 | ||
| 2b0a2e0d RM |
3823 | static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar, |
| 3824 | const void *phyerr_buf, | |
| 3825 | int left_len, | |
| 3826 | struct wmi_phyerr_ev_arg *arg) | |
| 3827 | { | |
| 3828 | const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf; | |
| 3829 | u32 phy_err_mask; | |
| 3830 | int i; | |
| 3831 | ||
| 3832 | if (left_len < sizeof(*phyerr)) { | |
| ee92a209 | 3833 | ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n", |
| 2b0a2e0d RM |
3834 | left_len, sizeof(*phyerr)); |
| 3835 | return -EINVAL; | |
| 3836 | } | |
| 3837 | ||
| 3838 | arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp); | |
| 3839 | arg->freq1 = __le16_to_cpu(phyerr->freq1); | |
| 3840 | arg->freq2 = __le16_to_cpu(phyerr->freq2); | |
| 3841 | arg->rssi_combined = phyerr->rssi_combined; | |
| 3842 | arg->chan_width_mhz = phyerr->chan_width_mhz; | |
| 3843 | arg->buf_len = __le32_to_cpu(phyerr->buf_len); | |
| 3844 | arg->buf = phyerr->buf; | |
| 3845 | arg->hdr_len = sizeof(*phyerr); | |
| 3846 | ||
| 3847 | for (i = 0; i < 4; i++) | |
| 3848 | arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]); | |
| 3849 | ||
| 3850 | phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]); | |
| 3851 | ||
| 3852 | if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK) | |
| 3853 | arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN; | |
| 3854 | else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK) | |
| 3855 | arg->phy_err_code = PHY_ERROR_RADAR; | |
| 3856 | else | |
| 3857 | arg->phy_err_code = PHY_ERROR_UNKNOWN; | |
| 3858 | ||
| 3859 | return 0; | |
| 3860 | } | |
| 3861 | ||
| 0226d602 | 3862 | void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3863 | { |
| 991adf71 RM |
3864 | struct wmi_phyerr_hdr_arg hdr_arg = {}; |
| 3865 | struct wmi_phyerr_ev_arg phyerr_arg = {}; | |
| 3866 | const void *phyerr; | |
| 9702c686 JD |
3867 | u32 count, i, buf_len, phy_err_code; |
| 3868 | u64 tsf; | |
| 32653cf1 | 3869 | int left_len, ret; |
| 9702c686 JD |
3870 | |
| 3871 | ATH10K_DFS_STAT_INC(ar, phy_errors); | |
| 3872 | ||
| 991adf71 | 3873 | ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg); |
| 32653cf1 | 3874 | if (ret) { |
| 991adf71 | 3875 | ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret); |
| 9702c686 JD |
3876 | return; |
| 3877 | } | |
| 3878 | ||
| 9702c686 | 3879 | /* Check number of included events */ |
| 991adf71 | 3880 | count = hdr_arg.num_phyerrs; |
| 9702c686 | 3881 | |
| 991adf71 RM |
3882 | left_len = hdr_arg.buf_len; |
| 3883 | ||
| 3884 | tsf = hdr_arg.tsf_u32; | |
| 9702c686 | 3885 | tsf <<= 32; |
| 991adf71 | 3886 | tsf |= hdr_arg.tsf_l32; |
| 9702c686 | 3887 | |
| 7aa7a72a | 3888 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 9702c686 JD |
3889 | "wmi event phyerr count %d tsf64 0x%llX\n", |
| 3890 | count, tsf); | |
| 3891 | ||
| 991adf71 | 3892 | phyerr = hdr_arg.phyerrs; |
| 9702c686 | 3893 | for (i = 0; i < count; i++) { |
| 991adf71 RM |
3894 | ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg); |
| 3895 | if (ret) { | |
| 3896 | ath10k_warn(ar, "failed to parse phyerr event (%d)\n", | |
| 7aa7a72a | 3897 | i); |
| 9702c686 JD |
3898 | return; |
| 3899 | } | |
| 3900 | ||
| 991adf71 RM |
3901 | left_len -= phyerr_arg.hdr_len; |
| 3902 | buf_len = phyerr_arg.buf_len; | |
| 3903 | phy_err_code = phyerr_arg.phy_err_code; | |
| 9702c686 JD |
3904 | |
| 3905 | if (left_len < buf_len) { | |
| 7aa7a72a | 3906 | ath10k_warn(ar, "single event (%d) wrong buf len\n", i); |
| 9702c686 JD |
3907 | return; |
| 3908 | } | |
| 3909 | ||
| 3910 | left_len -= buf_len; | |
| 3911 | ||
| 3912 | switch (phy_err_code) { | |
| 3913 | case PHY_ERROR_RADAR: | |
| 991adf71 | 3914 | ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf); |
| 9702c686 JD |
3915 | break; |
| 3916 | case PHY_ERROR_SPECTRAL_SCAN: | |
| 991adf71 | 3917 | ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf); |
| 9702c686 JD |
3918 | break; |
| 3919 | case PHY_ERROR_FALSE_RADAR_EXT: | |
| 991adf71 RM |
3920 | ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf); |
| 3921 | ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf); | |
| 9702c686 JD |
3922 | break; |
| 3923 | default: | |
| 3924 | break; | |
| 3925 | } | |
| 3926 | ||
| 991adf71 | 3927 | phyerr = phyerr + phyerr_arg.hdr_len + buf_len; |
| 9702c686 | 3928 | } |
| 5e3dd157 KV |
3929 | } |
| 3930 | ||
| 0226d602 | 3931 | void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3932 | { |
| c1a4654a MK |
3933 | struct wmi_roam_ev_arg arg = {}; |
| 3934 | int ret; | |
| 3935 | u32 vdev_id; | |
| 3936 | u32 reason; | |
| 3937 | s32 rssi; | |
| 3938 | ||
| 3939 | ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg); | |
| 3940 | if (ret) { | |
| 3941 | ath10k_warn(ar, "failed to parse roam event: %d\n", ret); | |
| 3942 | return; | |
| 3943 | } | |
| 3944 | ||
| 3945 | vdev_id = __le32_to_cpu(arg.vdev_id); | |
| 3946 | reason = __le32_to_cpu(arg.reason); | |
| 3947 | rssi = __le32_to_cpu(arg.rssi); | |
| 3948 | rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT; | |
| 3949 | ||
| 3950 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 3951 | "wmi roam event vdev %u reason 0x%08x rssi %d\n", | |
| 3952 | vdev_id, reason, rssi); | |
| 3953 | ||
| 3954 | if (reason >= WMI_ROAM_REASON_MAX) | |
| 3955 | ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n", | |
| 3956 | reason, vdev_id); | |
| 3957 | ||
| 3958 | switch (reason) { | |
| c1a4654a | 3959 | case WMI_ROAM_REASON_BEACON_MISS: |
| cc9904e6 MK |
3960 | ath10k_mac_handle_beacon_miss(ar, vdev_id); |
| 3961 | break; | |
| 3962 | case WMI_ROAM_REASON_BETTER_AP: | |
| c1a4654a MK |
3963 | case WMI_ROAM_REASON_LOW_RSSI: |
| 3964 | case WMI_ROAM_REASON_SUITABLE_AP_FOUND: | |
| 3965 | case WMI_ROAM_REASON_HO_FAILED: | |
| 3966 | ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n", | |
| 3967 | reason, vdev_id); | |
| 3968 | break; | |
| 3969 | } | |
| 5e3dd157 KV |
3970 | } |
| 3971 | ||
| 0226d602 | 3972 | void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3973 | { |
| 7aa7a72a | 3974 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n"); |
| 5e3dd157 KV |
3975 | } |
| 3976 | ||
| 0226d602 | 3977 | void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 3978 | { |
| 2fe5288c KV |
3979 | char buf[101], c; |
| 3980 | int i; | |
| 3981 | ||
| 3982 | for (i = 0; i < sizeof(buf) - 1; i++) { | |
| 3983 | if (i >= skb->len) | |
| 3984 | break; | |
| 3985 | ||
| 3986 | c = skb->data[i]; | |
| 3987 | ||
| 3988 | if (c == '\0') | |
| 3989 | break; | |
| 3990 | ||
| 3991 | if (isascii(c) && isprint(c)) | |
| 3992 | buf[i] = c; | |
| 3993 | else | |
| 3994 | buf[i] = '.'; | |
| 3995 | } | |
| 3996 | ||
| 3997 | if (i == sizeof(buf) - 1) | |
| 7aa7a72a | 3998 | ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len); |
| 2fe5288c KV |
3999 | |
| 4000 | /* for some reason the debug prints end with \n, remove that */ | |
| 4001 | if (skb->data[i - 1] == '\n') | |
| 4002 | i--; | |
| 4003 | ||
| 4004 | /* the last byte is always reserved for the null character */ | |
| 4005 | buf[i] = '\0'; | |
| 4006 | ||
| 3be004c3 | 4007 | ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf); |
| 5e3dd157 KV |
4008 | } |
| 4009 | ||
| 0226d602 | 4010 | void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4011 | { |
| 7aa7a72a | 4012 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n"); |
| 5e3dd157 KV |
4013 | } |
| 4014 | ||
| 0226d602 | 4015 | void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4016 | { |
| 7aa7a72a | 4017 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n"); |
| 5e3dd157 KV |
4018 | } |
| 4019 | ||
| 0226d602 MK |
4020 | void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, |
| 4021 | struct sk_buff *skb) | |
| 5e3dd157 | 4022 | { |
| 7aa7a72a | 4023 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n"); |
| 5e3dd157 KV |
4024 | } |
| 4025 | ||
| 0226d602 MK |
4026 | void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, |
| 4027 | struct sk_buff *skb) | |
| 5e3dd157 | 4028 | { |
| 7aa7a72a | 4029 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n"); |
| 5e3dd157 KV |
4030 | } |
| 4031 | ||
| 0226d602 | 4032 | void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4033 | { |
| 7aa7a72a | 4034 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n"); |
| 5e3dd157 KV |
4035 | } |
| 4036 | ||
| 0226d602 | 4037 | void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4038 | { |
| 5fd3ac3c JD |
4039 | struct wmi_wow_ev_arg ev = {}; |
| 4040 | int ret; | |
| 4041 | ||
| 4042 | complete(&ar->wow.wakeup_completed); | |
| 4043 | ||
| 4044 | ret = ath10k_wmi_pull_wow_event(ar, skb, &ev); | |
| 4045 | if (ret) { | |
| 4046 | ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret); | |
| 4047 | return; | |
| 4048 | } | |
| 4049 | ||
| 4050 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n", | |
| 4051 | wow_reason(ev.wake_reason)); | |
| 5e3dd157 KV |
4052 | } |
| 4053 | ||
| 0226d602 | 4054 | void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4055 | { |
| 7aa7a72a | 4056 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n"); |
| 5e3dd157 KV |
4057 | } |
| 4058 | ||
| 29542666 MK |
4059 | static u8 ath10k_tpc_config_get_rate(struct ath10k *ar, |
| 4060 | struct wmi_pdev_tpc_config_event *ev, | |
| 4061 | u32 rate_idx, u32 num_chains, | |
| 4062 | u32 rate_code, u8 type) | |
| 4063 | { | |
| 4064 | u8 tpc, num_streams, preamble, ch, stm_idx; | |
| 4065 | ||
| 4066 | num_streams = ATH10K_HW_NSS(rate_code); | |
| 4067 | preamble = ATH10K_HW_PREAMBLE(rate_code); | |
| 4068 | ch = num_chains - 1; | |
| 4069 | ||
| 4070 | tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]); | |
| 4071 | ||
| 4072 | if (__le32_to_cpu(ev->num_tx_chain) <= 1) | |
| 4073 | goto out; | |
| 4074 | ||
| 4075 | if (preamble == WMI_RATE_PREAMBLE_CCK) | |
| 4076 | goto out; | |
| 4077 | ||
| 4078 | stm_idx = num_streams - 1; | |
| 4079 | if (num_chains <= num_streams) | |
| 4080 | goto out; | |
| 4081 | ||
| 4082 | switch (type) { | |
| 4083 | case WMI_TPC_TABLE_TYPE_STBC: | |
| 4084 | tpc = min_t(u8, tpc, | |
| 4085 | ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]); | |
| 4086 | break; | |
| 4087 | case WMI_TPC_TABLE_TYPE_TXBF: | |
| 4088 | tpc = min_t(u8, tpc, | |
| 4089 | ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]); | |
| 4090 | break; | |
| 4091 | case WMI_TPC_TABLE_TYPE_CDD: | |
| 4092 | tpc = min_t(u8, tpc, | |
| 4093 | ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]); | |
| 4094 | break; | |
| 4095 | default: | |
| 4096 | ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type); | |
| 4097 | tpc = 0; | |
| 4098 | break; | |
| 4099 | } | |
| 4100 | ||
| 4101 | out: | |
| 4102 | return tpc; | |
| 4103 | } | |
| 4104 | ||
| 4105 | static void ath10k_tpc_config_disp_tables(struct ath10k *ar, | |
| 4106 | struct wmi_pdev_tpc_config_event *ev, | |
| 4107 | struct ath10k_tpc_stats *tpc_stats, | |
| 4108 | u8 *rate_code, u16 *pream_table, u8 type) | |
| 4109 | { | |
| 4110 | u32 i, j, pream_idx, flags; | |
| 4111 | u8 tpc[WMI_TPC_TX_N_CHAIN]; | |
| 4112 | char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; | |
| 4113 | char buff[WMI_TPC_BUF_SIZE]; | |
| 4114 | ||
| 4115 | flags = __le32_to_cpu(ev->flags); | |
| 4116 | ||
| 4117 | switch (type) { | |
| 4118 | case WMI_TPC_TABLE_TYPE_CDD: | |
| 4119 | if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) { | |
| 4120 | ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n"); | |
| 4121 | tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; | |
| 4122 | return; | |
| 4123 | } | |
| 4124 | break; | |
| 4125 | case WMI_TPC_TABLE_TYPE_STBC: | |
| 4126 | if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) { | |
| 4127 | ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n"); | |
| 4128 | tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; | |
| 4129 | return; | |
| 4130 | } | |
| 4131 | break; | |
| 4132 | case WMI_TPC_TABLE_TYPE_TXBF: | |
| 4133 | if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) { | |
| 4134 | ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n"); | |
| 4135 | tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG; | |
| 4136 | return; | |
| 4137 | } | |
| 4138 | break; | |
| 4139 | default: | |
| 4140 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 4141 | "invalid table type in wmi tpc event: %d\n", type); | |
| 4142 | return; | |
| 4143 | } | |
| 4144 | ||
| 4145 | pream_idx = 0; | |
| 4146 | for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) { | |
| 4147 | memset(tpc_value, 0, sizeof(tpc_value)); | |
| 4148 | memset(buff, 0, sizeof(buff)); | |
| 4149 | if (i == pream_table[pream_idx]) | |
| 4150 | pream_idx++; | |
| 4151 | ||
| 4152 | for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) { | |
| 4153 | if (j >= __le32_to_cpu(ev->num_tx_chain)) | |
| 4154 | break; | |
| 4155 | ||
| 4156 | tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1, | |
| 4157 | rate_code[i], | |
| 4158 | type); | |
| 4159 | snprintf(buff, sizeof(buff), "%8d ", tpc[j]); | |
| 4160 | strncat(tpc_value, buff, strlen(buff)); | |
| 4161 | } | |
| 4162 | tpc_stats->tpc_table[type].pream_idx[i] = pream_idx; | |
| 4163 | tpc_stats->tpc_table[type].rate_code[i] = rate_code[i]; | |
| 4164 | memcpy(tpc_stats->tpc_table[type].tpc_value[i], | |
| 4165 | tpc_value, sizeof(tpc_value)); | |
| 4166 | } | |
| 4167 | } | |
| 4168 | ||
| 0226d602 | 4169 | void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4170 | { |
| 29542666 MK |
4171 | u32 i, j, pream_idx, num_tx_chain; |
| 4172 | u8 rate_code[WMI_TPC_RATE_MAX], rate_idx; | |
| 4173 | u16 pream_table[WMI_TPC_PREAM_TABLE_MAX]; | |
| 4174 | struct wmi_pdev_tpc_config_event *ev; | |
| 4175 | struct ath10k_tpc_stats *tpc_stats; | |
| 4176 | ||
| 4177 | ev = (struct wmi_pdev_tpc_config_event *)skb->data; | |
| 4178 | ||
| 4179 | tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC); | |
| 4180 | if (!tpc_stats) | |
| 4181 | return; | |
| 4182 | ||
| 4183 | /* Create the rate code table based on the chains supported */ | |
| 4184 | rate_idx = 0; | |
| 4185 | pream_idx = 0; | |
| 4186 | ||
| 4187 | /* Fill CCK rate code */ | |
| 4188 | for (i = 0; i < 4; i++) { | |
| 4189 | rate_code[rate_idx] = | |
| 4190 | ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK); | |
| 4191 | rate_idx++; | |
| 4192 | } | |
| 4193 | pream_table[pream_idx] = rate_idx; | |
| 4194 | pream_idx++; | |
| 4195 | ||
| 4196 | /* Fill OFDM rate code */ | |
| 4197 | for (i = 0; i < 8; i++) { | |
| 4198 | rate_code[rate_idx] = | |
| 4199 | ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM); | |
| 4200 | rate_idx++; | |
| 4201 | } | |
| 4202 | pream_table[pream_idx] = rate_idx; | |
| 4203 | pream_idx++; | |
| 4204 | ||
| 4205 | num_tx_chain = __le32_to_cpu(ev->num_tx_chain); | |
| 4206 | ||
| 4207 | /* Fill HT20 rate code */ | |
| 4208 | for (i = 0; i < num_tx_chain; i++) { | |
| 4209 | for (j = 0; j < 8; j++) { | |
| 4210 | rate_code[rate_idx] = | |
| 4211 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT); | |
| 4212 | rate_idx++; | |
| 4213 | } | |
| 4214 | } | |
| 4215 | pream_table[pream_idx] = rate_idx; | |
| 4216 | pream_idx++; | |
| 4217 | ||
| 4218 | /* Fill HT40 rate code */ | |
| 4219 | for (i = 0; i < num_tx_chain; i++) { | |
| 4220 | for (j = 0; j < 8; j++) { | |
| 4221 | rate_code[rate_idx] = | |
| 4222 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT); | |
| 4223 | rate_idx++; | |
| 4224 | } | |
| 4225 | } | |
| 4226 | pream_table[pream_idx] = rate_idx; | |
| 4227 | pream_idx++; | |
| 4228 | ||
| 4229 | /* Fill VHT20 rate code */ | |
| 4230 | for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) { | |
| 4231 | for (j = 0; j < 10; j++) { | |
| 4232 | rate_code[rate_idx] = | |
| 4233 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); | |
| 4234 | rate_idx++; | |
| 4235 | } | |
| 4236 | } | |
| 4237 | pream_table[pream_idx] = rate_idx; | |
| 4238 | pream_idx++; | |
| 4239 | ||
| 4240 | /* Fill VHT40 rate code */ | |
| 4241 | for (i = 0; i < num_tx_chain; i++) { | |
| 4242 | for (j = 0; j < 10; j++) { | |
| 4243 | rate_code[rate_idx] = | |
| 4244 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); | |
| 4245 | rate_idx++; | |
| 4246 | } | |
| 4247 | } | |
| 4248 | pream_table[pream_idx] = rate_idx; | |
| 4249 | pream_idx++; | |
| 4250 | ||
| 4251 | /* Fill VHT80 rate code */ | |
| 4252 | for (i = 0; i < num_tx_chain; i++) { | |
| 4253 | for (j = 0; j < 10; j++) { | |
| 4254 | rate_code[rate_idx] = | |
| 4255 | ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT); | |
| 4256 | rate_idx++; | |
| 4257 | } | |
| 4258 | } | |
| 4259 | pream_table[pream_idx] = rate_idx; | |
| 4260 | pream_idx++; | |
| 4261 | ||
| 4262 | rate_code[rate_idx++] = | |
| 4263 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK); | |
| 4264 | rate_code[rate_idx++] = | |
| 4265 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); | |
| 4266 | rate_code[rate_idx++] = | |
| 4267 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK); | |
| 4268 | rate_code[rate_idx++] = | |
| 4269 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); | |
| 4270 | rate_code[rate_idx++] = | |
| 4271 | ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM); | |
| 4272 | ||
| 4273 | pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END; | |
| 4274 | ||
| 4275 | tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq); | |
| 4276 | tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode); | |
| 4277 | tpc_stats->ctl = __le32_to_cpu(ev->ctl); | |
| 4278 | tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain); | |
| 4279 | tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain); | |
| 4280 | tpc_stats->twice_antenna_reduction = | |
| 4281 | __le32_to_cpu(ev->twice_antenna_reduction); | |
| 4282 | tpc_stats->power_limit = __le32_to_cpu(ev->power_limit); | |
| 4283 | tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power); | |
| 4284 | tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain); | |
| 4285 | tpc_stats->rate_max = __le32_to_cpu(ev->rate_max); | |
| 4286 | ||
| 4287 | ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, | |
| 4288 | rate_code, pream_table, | |
| 4289 | WMI_TPC_TABLE_TYPE_CDD); | |
| 4290 | ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, | |
| 4291 | rate_code, pream_table, | |
| 4292 | WMI_TPC_TABLE_TYPE_STBC); | |
| 4293 | ath10k_tpc_config_disp_tables(ar, ev, tpc_stats, | |
| 4294 | rate_code, pream_table, | |
| 4295 | WMI_TPC_TABLE_TYPE_TXBF); | |
| 4296 | ||
| 4297 | ath10k_debug_tpc_stats_process(ar, tpc_stats); | |
| 4298 | ||
| 4299 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 4300 | "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n", | |
| 4301 | __le32_to_cpu(ev->chan_freq), | |
| 4302 | __le32_to_cpu(ev->phy_mode), | |
| 4303 | __le32_to_cpu(ev->ctl), | |
| 4304 | __le32_to_cpu(ev->reg_domain), | |
| 4305 | a_sle32_to_cpu(ev->twice_antenna_gain), | |
| 4306 | __le32_to_cpu(ev->twice_antenna_reduction), | |
| 4307 | __le32_to_cpu(ev->power_limit), | |
| 4308 | __le32_to_cpu(ev->twice_max_rd_power) / 2, | |
| 4309 | __le32_to_cpu(ev->num_tx_chain), | |
| 4310 | __le32_to_cpu(ev->rate_max)); | |
| 5e3dd157 KV |
4311 | } |
| 4312 | ||
| 0226d602 | 4313 | void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4314 | { |
| 7aa7a72a | 4315 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n"); |
| 5e3dd157 KV |
4316 | } |
| 4317 | ||
| 0226d602 | 4318 | void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4319 | { |
| 7aa7a72a | 4320 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n"); |
| 5e3dd157 KV |
4321 | } |
| 4322 | ||
| 0226d602 | 4323 | void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4324 | { |
| 7aa7a72a | 4325 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n"); |
| 5e3dd157 KV |
4326 | } |
| 4327 | ||
| 0226d602 | 4328 | void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4329 | { |
| 7aa7a72a | 4330 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n"); |
| 5e3dd157 KV |
4331 | } |
| 4332 | ||
| 0226d602 | 4333 | void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 | 4334 | { |
| 7aa7a72a | 4335 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n"); |
| 5e3dd157 KV |
4336 | } |
| 4337 | ||
| 0226d602 MK |
4338 | void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, |
| 4339 | struct sk_buff *skb) | |
| 5e3dd157 | 4340 | { |
| 7aa7a72a | 4341 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n"); |
| 5e3dd157 KV |
4342 | } |
| 4343 | ||
| 0226d602 | 4344 | void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb) |
| 8a6618b0 | 4345 | { |
| 7aa7a72a | 4346 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n"); |
| 8a6618b0 BM |
4347 | } |
| 4348 | ||
| 0226d602 | 4349 | void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb) |
| 8a6618b0 | 4350 | { |
| 7aa7a72a | 4351 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n"); |
| 8a6618b0 BM |
4352 | } |
| 4353 | ||
| 0226d602 | 4354 | void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb) |
| 8a6618b0 | 4355 | { |
| 7aa7a72a | 4356 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n"); |
| 8a6618b0 BM |
4357 | } |
| 4358 | ||
| b0578865 FF |
4359 | static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id, |
| 4360 | u32 num_units, u32 unit_len) | |
| b3effe61 BM |
4361 | { |
| 4362 | dma_addr_t paddr; | |
| b0578865 | 4363 | u32 pool_size = 0; |
| b3effe61 | 4364 | int idx = ar->wmi.num_mem_chunks; |
| b0578865 | 4365 | void *vaddr = NULL; |
| b3effe61 | 4366 | |
| b0578865 FF |
4367 | if (ar->wmi.num_mem_chunks == ARRAY_SIZE(ar->wmi.mem_chunks)) |
| 4368 | return -ENOMEM; | |
| b3effe61 | 4369 | |
| b0578865 FF |
4370 | while (!vaddr && num_units) { |
| 4371 | pool_size = num_units * round_up(unit_len, 4); | |
| 4372 | if (!pool_size) | |
| 4373 | return -EINVAL; | |
| b3effe61 | 4374 | |
| b0578865 FF |
4375 | vaddr = kzalloc(pool_size, GFP_KERNEL | __GFP_NOWARN); |
| 4376 | if (!vaddr) | |
| 4377 | num_units /= 2; | |
| b3effe61 BM |
4378 | } |
| 4379 | ||
| b0578865 FF |
4380 | if (!num_units) |
| 4381 | return -ENOMEM; | |
| 4382 | ||
| 4383 | paddr = dma_map_single(ar->dev, vaddr, pool_size, DMA_TO_DEVICE); | |
| 4384 | if (dma_mapping_error(ar->dev, paddr)) { | |
| 4385 | kfree(vaddr); | |
| 4386 | return -ENOMEM; | |
| 4387 | } | |
| b3effe61 | 4388 | |
| b0578865 | 4389 | ar->wmi.mem_chunks[idx].vaddr = vaddr; |
| b3effe61 BM |
4390 | ar->wmi.mem_chunks[idx].paddr = paddr; |
| 4391 | ar->wmi.mem_chunks[idx].len = pool_size; | |
| 4392 | ar->wmi.mem_chunks[idx].req_id = req_id; | |
| 4393 | ar->wmi.num_mem_chunks++; | |
| 4394 | ||
| b0578865 FF |
4395 | return num_units; |
| 4396 | } | |
| 4397 | ||
| 4398 | static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id, | |
| 4399 | u32 num_units, u32 unit_len) | |
| 4400 | { | |
| 4401 | int ret; | |
| 4402 | ||
| 4403 | while (num_units) { | |
| 4404 | ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len); | |
| 4405 | if (ret < 0) | |
| 4406 | return ret; | |
| 4407 | ||
| 4408 | num_units -= ret; | |
| 4409 | } | |
| 4410 | ||
| b3effe61 BM |
4411 | return 0; |
| 4412 | } | |
| 4413 | ||
| a925a376 VT |
4414 | static bool |
| 4415 | ath10k_wmi_is_host_mem_allocated(struct ath10k *ar, | |
| 4416 | const struct wlan_host_mem_req **mem_reqs, | |
| 4417 | u32 num_mem_reqs) | |
| 4418 | { | |
| 4419 | u32 req_id, num_units, unit_size, num_unit_info; | |
| 4420 | u32 pool_size; | |
| 4421 | int i, j; | |
| 4422 | bool found; | |
| 4423 | ||
| 4424 | if (ar->wmi.num_mem_chunks != num_mem_reqs) | |
| 4425 | return false; | |
| 4426 | ||
| 4427 | for (i = 0; i < num_mem_reqs; ++i) { | |
| 4428 | req_id = __le32_to_cpu(mem_reqs[i]->req_id); | |
| 4429 | num_units = __le32_to_cpu(mem_reqs[i]->num_units); | |
| 4430 | unit_size = __le32_to_cpu(mem_reqs[i]->unit_size); | |
| 4431 | num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info); | |
| 4432 | ||
| 4433 | if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) { | |
| 4434 | if (ar->num_active_peers) | |
| 4435 | num_units = ar->num_active_peers + 1; | |
| 4436 | else | |
| 4437 | num_units = ar->max_num_peers + 1; | |
| 4438 | } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) { | |
| 4439 | num_units = ar->max_num_peers + 1; | |
| 4440 | } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) { | |
| 4441 | num_units = ar->max_num_vdevs + 1; | |
| 4442 | } | |
| 4443 | ||
| 4444 | found = false; | |
| 4445 | for (j = 0; j < ar->wmi.num_mem_chunks; j++) { | |
| 4446 | if (ar->wmi.mem_chunks[j].req_id == req_id) { | |
| 4447 | pool_size = num_units * round_up(unit_size, 4); | |
| 4448 | if (ar->wmi.mem_chunks[j].len == pool_size) { | |
| 4449 | found = true; | |
| 4450 | break; | |
| 4451 | } | |
| 4452 | } | |
| 4453 | } | |
| 4454 | if (!found) | |
| 4455 | return false; | |
| 4456 | } | |
| 4457 | ||
| 4458 | return true; | |
| 4459 | } | |
| 4460 | ||
| d7579d12 MK |
4461 | static int |
| 4462 | ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, | |
| 4463 | struct wmi_svc_rdy_ev_arg *arg) | |
| 5c01aa3d MK |
4464 | { |
| 4465 | struct wmi_service_ready_event *ev; | |
| 4466 | size_t i, n; | |
| 4467 | ||
| 4468 | if (skb->len < sizeof(*ev)) | |
| 4469 | return -EPROTO; | |
| 4470 | ||
| 4471 | ev = (void *)skb->data; | |
| 4472 | skb_pull(skb, sizeof(*ev)); | |
| 4473 | arg->min_tx_power = ev->hw_min_tx_power; | |
| 4474 | arg->max_tx_power = ev->hw_max_tx_power; | |
| 4475 | arg->ht_cap = ev->ht_cap_info; | |
| 4476 | arg->vht_cap = ev->vht_cap_info; | |
| 4477 | arg->sw_ver0 = ev->sw_version; | |
| 4478 | arg->sw_ver1 = ev->sw_version_1; | |
| 4479 | arg->phy_capab = ev->phy_capability; | |
| 4480 | arg->num_rf_chains = ev->num_rf_chains; | |
| 4481 | arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; | |
| 4482 | arg->num_mem_reqs = ev->num_mem_reqs; | |
| 4483 | arg->service_map = ev->wmi_service_bitmap; | |
| 2a3e60d3 | 4484 | arg->service_map_len = sizeof(ev->wmi_service_bitmap); |
| 5c01aa3d MK |
4485 | |
| 4486 | n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), | |
| 4487 | ARRAY_SIZE(arg->mem_reqs)); | |
| 4488 | for (i = 0; i < n; i++) | |
| 4489 | arg->mem_reqs[i] = &ev->mem_reqs[i]; | |
| 4490 | ||
| 4491 | if (skb->len < | |
| 4492 | __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) | |
| 4493 | return -EPROTO; | |
| 4494 | ||
| 4495 | return 0; | |
| 4496 | } | |
| 4497 | ||
| d7579d12 MK |
4498 | static int |
| 4499 | ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, | |
| 4500 | struct wmi_svc_rdy_ev_arg *arg) | |
| 5c01aa3d MK |
4501 | { |
| 4502 | struct wmi_10x_service_ready_event *ev; | |
| 4503 | int i, n; | |
| 4504 | ||
| 4505 | if (skb->len < sizeof(*ev)) | |
| 4506 | return -EPROTO; | |
| 4507 | ||
| 4508 | ev = (void *)skb->data; | |
| 4509 | skb_pull(skb, sizeof(*ev)); | |
| 4510 | arg->min_tx_power = ev->hw_min_tx_power; | |
| 4511 | arg->max_tx_power = ev->hw_max_tx_power; | |
| 4512 | arg->ht_cap = ev->ht_cap_info; | |
| 4513 | arg->vht_cap = ev->vht_cap_info; | |
| 4514 | arg->sw_ver0 = ev->sw_version; | |
| 4515 | arg->phy_capab = ev->phy_capability; | |
| 4516 | arg->num_rf_chains = ev->num_rf_chains; | |
| 4517 | arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; | |
| 4518 | arg->num_mem_reqs = ev->num_mem_reqs; | |
| 4519 | arg->service_map = ev->wmi_service_bitmap; | |
| 2a3e60d3 | 4520 | arg->service_map_len = sizeof(ev->wmi_service_bitmap); |
| 5c01aa3d MK |
4521 | |
| 4522 | n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), | |
| 4523 | ARRAY_SIZE(arg->mem_reqs)); | |
| 4524 | for (i = 0; i < n; i++) | |
| 4525 | arg->mem_reqs[i] = &ev->mem_reqs[i]; | |
| 4526 | ||
| 4527 | if (skb->len < | |
| 4528 | __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) | |
| 4529 | return -EPROTO; | |
| 4530 | ||
| 4531 | return 0; | |
| 4532 | } | |
| 4533 | ||
| c8ecfc1c | 4534 | static void ath10k_wmi_event_service_ready_work(struct work_struct *work) |
| 5e3dd157 | 4535 | { |
| c8ecfc1c RM |
4536 | struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work); |
| 4537 | struct sk_buff *skb = ar->svc_rdy_skb; | |
| 5c01aa3d MK |
4538 | struct wmi_svc_rdy_ev_arg arg = {}; |
| 4539 | u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i; | |
| 5c01aa3d | 4540 | int ret; |
| a925a376 | 4541 | bool allocated; |
| 5c01aa3d | 4542 | |
| c8ecfc1c RM |
4543 | if (!skb) { |
| 4544 | ath10k_warn(ar, "invalid service ready event skb\n"); | |
| 4545 | return; | |
| 4546 | } | |
| 4547 | ||
| d7579d12 | 4548 | ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg); |
| 5c01aa3d MK |
4549 | if (ret) { |
| 4550 | ath10k_warn(ar, "failed to parse service ready: %d\n", ret); | |
| 5e3dd157 KV |
4551 | return; |
| 4552 | } | |
| 4553 | ||
| d7579d12 MK |
4554 | memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map)); |
| 4555 | ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map, | |
| 4556 | arg.service_map_len); | |
| 4557 | ||
| 5c01aa3d MK |
4558 | ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power); |
| 4559 | ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power); | |
| 4560 | ar->ht_cap_info = __le32_to_cpu(arg.ht_cap); | |
| 4561 | ar->vht_cap_info = __le32_to_cpu(arg.vht_cap); | |
| 5e3dd157 | 4562 | ar->fw_version_major = |
| 5c01aa3d MK |
4563 | (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24; |
| 4564 | ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff); | |
| 5e3dd157 | 4565 | ar->fw_version_release = |
| 5c01aa3d MK |
4566 | (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16; |
| 4567 | ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff); | |
| 4568 | ar->phy_capability = __le32_to_cpu(arg.phy_capab); | |
| 4569 | ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains); | |
| 4570 | ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd); | |
| 4571 | ||
| 5c01aa3d | 4572 | ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ", |
| 2a3e60d3 | 4573 | arg.service_map, arg.service_map_len); |
| 8865bee4 | 4574 | |
| 1a222435 KV |
4575 | /* only manually set fw features when not using FW IE format */ |
| 4576 | if (ar->fw_api == 1 && ar->fw_version_build > 636) | |
| 0d9b0438 MK |
4577 | set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features); |
| 4578 | ||
| 5c8726ec | 4579 | if (ar->num_rf_chains > ar->max_spatial_stream) { |
| 7aa7a72a | 4580 | ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n", |
| 5c8726ec RM |
4581 | ar->num_rf_chains, ar->max_spatial_stream); |
| 4582 | ar->num_rf_chains = ar->max_spatial_stream; | |
| 8865bee4 | 4583 | } |
| 5e3dd157 | 4584 | |
| 166de3f1 RM |
4585 | if (!ar->cfg_tx_chainmask) { |
| 4586 | ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1; | |
| 4587 | ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1; | |
| 4588 | } | |
| fdb959c7 | 4589 | |
| 5e3dd157 KV |
4590 | if (strlen(ar->hw->wiphy->fw_version) == 0) { |
| 4591 | snprintf(ar->hw->wiphy->fw_version, | |
| 4592 | sizeof(ar->hw->wiphy->fw_version), | |
| 4593 | "%u.%u.%u.%u", | |
| 4594 | ar->fw_version_major, | |
| 4595 | ar->fw_version_minor, | |
| 4596 | ar->fw_version_release, | |
| 4597 | ar->fw_version_build); | |
| 4598 | } | |
| 4599 | ||
| 5c01aa3d MK |
4600 | num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs); |
| 4601 | if (num_mem_reqs > WMI_MAX_MEM_REQS) { | |
| 7aa7a72a | 4602 | ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n", |
| b3effe61 BM |
4603 | num_mem_reqs); |
| 4604 | return; | |
| 6f97d256 BM |
4605 | } |
| 4606 | ||
| b0399417 | 4607 | if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) { |
| 99ad1cba MK |
4608 | if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, |
| 4609 | ar->fw_features)) | |
| 4610 | ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC + | |
| 4611 | ar->max_num_vdevs; | |
| 4612 | else | |
| 4613 | ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS + | |
| 4614 | ar->max_num_vdevs; | |
| 4615 | ||
| b0399417 | 4616 | ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX + |
| 5699a6f2 | 4617 | ar->max_num_vdevs; |
| b0399417 RM |
4618 | ar->num_tids = ar->num_active_peers * 2; |
| 4619 | ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX; | |
| 4620 | } | |
| 4621 | ||
| 4622 | /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE | |
| 4623 | * and WMI_SERVICE_IRAM_TIDS, etc. | |
| 4624 | */ | |
| 4625 | ||
| a925a376 VT |
4626 | allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs, |
| 4627 | num_mem_reqs); | |
| 4628 | if (allocated) | |
| 4629 | goto skip_mem_alloc; | |
| 4630 | ||
| 4631 | /* Either this event is received during boot time or there is a change | |
| 4632 | * in memory requirement from firmware when compared to last request. | |
| 4633 | * Free any old memory and do a fresh allocation based on the current | |
| 4634 | * memory requirement. | |
| 4635 | */ | |
| 4636 | ath10k_wmi_free_host_mem(ar); | |
| 4637 | ||
| b3effe61 | 4638 | for (i = 0; i < num_mem_reqs; ++i) { |
| 5c01aa3d MK |
4639 | req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id); |
| 4640 | num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units); | |
| 4641 | unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size); | |
| 4642 | num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info); | |
| b3effe61 | 4643 | |
| b0399417 RM |
4644 | if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) { |
| 4645 | if (ar->num_active_peers) | |
| 4646 | num_units = ar->num_active_peers + 1; | |
| 4647 | else | |
| 4648 | num_units = ar->max_num_peers + 1; | |
| 4649 | } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) { | |
| b3effe61 BM |
4650 | /* number of units to allocate is number of |
| 4651 | * peers, 1 extra for self peer on target */ | |
| 4652 | /* this needs to be tied, host and target | |
| 4653 | * can get out of sync */ | |
| b0399417 RM |
4654 | num_units = ar->max_num_peers + 1; |
| 4655 | } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) { | |
| 4656 | num_units = ar->max_num_vdevs + 1; | |
| 4657 | } | |
| b3effe61 | 4658 | |
| 7aa7a72a | 4659 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| b3effe61 BM |
4660 | "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n", |
| 4661 | req_id, | |
| 5c01aa3d | 4662 | __le32_to_cpu(arg.mem_reqs[i]->num_units), |
| b3effe61 BM |
4663 | num_unit_info, |
| 4664 | unit_size, | |
| 4665 | num_units); | |
| 4666 | ||
| 4667 | ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units, | |
| 4668 | unit_size); | |
| 4669 | if (ret) | |
| 4670 | return; | |
| 4671 | } | |
| 4672 | ||
| a925a376 | 4673 | skip_mem_alloc: |
| 7aa7a72a | 4674 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| ca996ec5 | 4675 | "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n", |
| 5c01aa3d MK |
4676 | __le32_to_cpu(arg.min_tx_power), |
| 4677 | __le32_to_cpu(arg.max_tx_power), | |
| 4678 | __le32_to_cpu(arg.ht_cap), | |
| 4679 | __le32_to_cpu(arg.vht_cap), | |
| 4680 | __le32_to_cpu(arg.sw_ver0), | |
| 4681 | __le32_to_cpu(arg.sw_ver1), | |
| ca996ec5 | 4682 | __le32_to_cpu(arg.fw_build), |
| 5c01aa3d MK |
4683 | __le32_to_cpu(arg.phy_capab), |
| 4684 | __le32_to_cpu(arg.num_rf_chains), | |
| 4685 | __le32_to_cpu(arg.eeprom_rd), | |
| 4686 | __le32_to_cpu(arg.num_mem_reqs)); | |
| 6f97d256 | 4687 | |
| c8ecfc1c RM |
4688 | dev_kfree_skb(skb); |
| 4689 | ar->svc_rdy_skb = NULL; | |
| 6f97d256 BM |
4690 | complete(&ar->wmi.service_ready); |
| 4691 | } | |
| 4692 | ||
| c8ecfc1c RM |
4693 | void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb) |
| 4694 | { | |
| 4695 | ar->svc_rdy_skb = skb; | |
| 4696 | queue_work(ar->workqueue_aux, &ar->svc_rdy_work); | |
| 4697 | } | |
| 4698 | ||
| d7579d12 MK |
4699 | static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb, |
| 4700 | struct wmi_rdy_ev_arg *arg) | |
| 5e3dd157 | 4701 | { |
| 32653cf1 | 4702 | struct wmi_ready_event *ev = (void *)skb->data; |
| 5e3dd157 | 4703 | |
| 32653cf1 MK |
4704 | if (skb->len < sizeof(*ev)) |
| 4705 | return -EPROTO; | |
| 4706 | ||
| 4707 | skb_pull(skb, sizeof(*ev)); | |
| 4708 | arg->sw_version = ev->sw_version; | |
| 4709 | arg->abi_version = ev->abi_version; | |
| 4710 | arg->status = ev->status; | |
| 4711 | arg->mac_addr = ev->mac_addr.addr; | |
| 4712 | ||
| 4713 | return 0; | |
| 4714 | } | |
| 5e3dd157 | 4715 | |
| c1a4654a MK |
4716 | static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb, |
| 4717 | struct wmi_roam_ev_arg *arg) | |
| 4718 | { | |
| 4719 | struct wmi_roam_ev *ev = (void *)skb->data; | |
| 4720 | ||
| 4721 | if (skb->len < sizeof(*ev)) | |
| 4722 | return -EPROTO; | |
| 4723 | ||
| 4724 | skb_pull(skb, sizeof(*ev)); | |
| 4725 | arg->vdev_id = ev->vdev_id; | |
| 4726 | arg->reason = ev->reason; | |
| 4727 | ||
| 4728 | return 0; | |
| 4729 | } | |
| 4730 | ||
| 0226d602 | 4731 | int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb) |
| 32653cf1 MK |
4732 | { |
| 4733 | struct wmi_rdy_ev_arg arg = {}; | |
| 4734 | int ret; | |
| 4735 | ||
| d7579d12 | 4736 | ret = ath10k_wmi_pull_rdy(ar, skb, &arg); |
| 32653cf1 MK |
4737 | if (ret) { |
| 4738 | ath10k_warn(ar, "failed to parse ready event: %d\n", ret); | |
| 4739 | return ret; | |
| 4740 | } | |
| 5e3dd157 | 4741 | |
| 7aa7a72a | 4742 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 32653cf1 MK |
4743 | "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n", |
| 4744 | __le32_to_cpu(arg.sw_version), | |
| 4745 | __le32_to_cpu(arg.abi_version), | |
| 4746 | arg.mac_addr, | |
| 4747 | __le32_to_cpu(arg.status)); | |
| 5e3dd157 | 4748 | |
| 32653cf1 | 4749 | ether_addr_copy(ar->mac_addr, arg.mac_addr); |
| 5e3dd157 KV |
4750 | complete(&ar->wmi.unified_ready); |
| 4751 | return 0; | |
| 4752 | } | |
| 4753 | ||
| a57a6a27 RM |
4754 | static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb) |
| 4755 | { | |
| 4756 | const struct wmi_pdev_temperature_event *ev; | |
| 4757 | ||
| 4758 | ev = (struct wmi_pdev_temperature_event *)skb->data; | |
| 4759 | if (WARN_ON(skb->len < sizeof(*ev))) | |
| 4760 | return -EPROTO; | |
| 4761 | ||
| ac2953fc | 4762 | ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature)); |
| a57a6a27 RM |
4763 | return 0; |
| 4764 | } | |
| 4765 | ||
| d7579d12 | 4766 | static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb) |
| 5e3dd157 KV |
4767 | { |
| 4768 | struct wmi_cmd_hdr *cmd_hdr; | |
| 4769 | enum wmi_event_id id; | |
| 5e3dd157 KV |
4770 | |
| 4771 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
| 4772 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
| 4773 | ||
| 4774 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
| 469d479f | 4775 | goto out; |
| 5e3dd157 | 4776 | |
| d35a6c18 | 4777 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
| 5e3dd157 KV |
4778 | |
| 4779 | switch (id) { | |
| 4780 | case WMI_MGMT_RX_EVENTID: | |
| 4781 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
| 4782 | /* mgmt_rx() owns the skb now! */ | |
| 4783 | return; | |
| 4784 | case WMI_SCAN_EVENTID: | |
| 4785 | ath10k_wmi_event_scan(ar, skb); | |
| 4786 | break; | |
| 4787 | case WMI_CHAN_INFO_EVENTID: | |
| 4788 | ath10k_wmi_event_chan_info(ar, skb); | |
| 4789 | break; | |
| 4790 | case WMI_ECHO_EVENTID: | |
| 4791 | ath10k_wmi_event_echo(ar, skb); | |
| 4792 | break; | |
| 4793 | case WMI_DEBUG_MESG_EVENTID: | |
| 4794 | ath10k_wmi_event_debug_mesg(ar, skb); | |
| 4795 | break; | |
| 4796 | case WMI_UPDATE_STATS_EVENTID: | |
| 4797 | ath10k_wmi_event_update_stats(ar, skb); | |
| 4798 | break; | |
| 4799 | case WMI_VDEV_START_RESP_EVENTID: | |
| 4800 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
| 4801 | break; | |
| 4802 | case WMI_VDEV_STOPPED_EVENTID: | |
| 4803 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
| 4804 | break; | |
| 4805 | case WMI_PEER_STA_KICKOUT_EVENTID: | |
| 4806 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
| 4807 | break; | |
| 4808 | case WMI_HOST_SWBA_EVENTID: | |
| 4809 | ath10k_wmi_event_host_swba(ar, skb); | |
| 4810 | break; | |
| 4811 | case WMI_TBTTOFFSET_UPDATE_EVENTID: | |
| 4812 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
| 4813 | break; | |
| 4814 | case WMI_PHYERR_EVENTID: | |
| 4815 | ath10k_wmi_event_phyerr(ar, skb); | |
| 4816 | break; | |
| 4817 | case WMI_ROAM_EVENTID: | |
| 4818 | ath10k_wmi_event_roam(ar, skb); | |
| 4819 | break; | |
| 4820 | case WMI_PROFILE_MATCH: | |
| 4821 | ath10k_wmi_event_profile_match(ar, skb); | |
| 4822 | break; | |
| 4823 | case WMI_DEBUG_PRINT_EVENTID: | |
| 4824 | ath10k_wmi_event_debug_print(ar, skb); | |
| 4825 | break; | |
| 4826 | case WMI_PDEV_QVIT_EVENTID: | |
| 4827 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
| 4828 | break; | |
| 4829 | case WMI_WLAN_PROFILE_DATA_EVENTID: | |
| 4830 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
| 4831 | break; | |
| 4832 | case WMI_RTT_MEASUREMENT_REPORT_EVENTID: | |
| 4833 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
| 4834 | break; | |
| 4835 | case WMI_TSF_MEASUREMENT_REPORT_EVENTID: | |
| 4836 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
| 4837 | break; | |
| 4838 | case WMI_RTT_ERROR_REPORT_EVENTID: | |
| 4839 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
| 4840 | break; | |
| 4841 | case WMI_WOW_WAKEUP_HOST_EVENTID: | |
| 4842 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
| 4843 | break; | |
| 4844 | case WMI_DCS_INTERFERENCE_EVENTID: | |
| 4845 | ath10k_wmi_event_dcs_interference(ar, skb); | |
| 4846 | break; | |
| 4847 | case WMI_PDEV_TPC_CONFIG_EVENTID: | |
| 4848 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
| 4849 | break; | |
| 4850 | case WMI_PDEV_FTM_INTG_EVENTID: | |
| 4851 | ath10k_wmi_event_pdev_ftm_intg(ar, skb); | |
| 4852 | break; | |
| 4853 | case WMI_GTK_OFFLOAD_STATUS_EVENTID: | |
| 4854 | ath10k_wmi_event_gtk_offload_status(ar, skb); | |
| 4855 | break; | |
| 4856 | case WMI_GTK_REKEY_FAIL_EVENTID: | |
| 4857 | ath10k_wmi_event_gtk_rekey_fail(ar, skb); | |
| 4858 | break; | |
| 4859 | case WMI_TX_DELBA_COMPLETE_EVENTID: | |
| 4860 | ath10k_wmi_event_delba_complete(ar, skb); | |
| 4861 | break; | |
| 4862 | case WMI_TX_ADDBA_COMPLETE_EVENTID: | |
| 4863 | ath10k_wmi_event_addba_complete(ar, skb); | |
| 4864 | break; | |
| 4865 | case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: | |
| 4866 | ath10k_wmi_event_vdev_install_key_complete(ar, skb); | |
| 4867 | break; | |
| 4868 | case WMI_SERVICE_READY_EVENTID: | |
| b34d2b3d | 4869 | ath10k_wmi_event_service_ready(ar, skb); |
| c8ecfc1c | 4870 | return; |
| 5e3dd157 | 4871 | case WMI_READY_EVENTID: |
| b34d2b3d | 4872 | ath10k_wmi_event_ready(ar, skb); |
| 5e3dd157 KV |
4873 | break; |
| 4874 | default: | |
| 7aa7a72a | 4875 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
| 5e3dd157 KV |
4876 | break; |
| 4877 | } | |
| 4878 | ||
| 469d479f | 4879 | out: |
| 5e3dd157 KV |
4880 | dev_kfree_skb(skb); |
| 4881 | } | |
| 4882 | ||
| d7579d12 | 4883 | static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb) |
| 8a6618b0 BM |
4884 | { |
| 4885 | struct wmi_cmd_hdr *cmd_hdr; | |
| 4886 | enum wmi_10x_event_id id; | |
| 43d2a30f | 4887 | bool consumed; |
| 8a6618b0 BM |
4888 | |
| 4889 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
| 4890 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
| 4891 | ||
| 4892 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
| 469d479f | 4893 | goto out; |
| 8a6618b0 | 4894 | |
| d35a6c18 | 4895 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
| 8a6618b0 | 4896 | |
| 43d2a30f KV |
4897 | consumed = ath10k_tm_event_wmi(ar, id, skb); |
| 4898 | ||
| 4899 | /* Ready event must be handled normally also in UTF mode so that we | |
| 4900 | * know the UTF firmware has booted, others we are just bypass WMI | |
| 4901 | * events to testmode. | |
| 4902 | */ | |
| 4903 | if (consumed && id != WMI_10X_READY_EVENTID) { | |
| 4904 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 4905 | "wmi testmode consumed 0x%x\n", id); | |
| 4906 | goto out; | |
| 4907 | } | |
| 4908 | ||
| 8a6618b0 BM |
4909 | switch (id) { |
| 4910 | case WMI_10X_MGMT_RX_EVENTID: | |
| 4911 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
| 4912 | /* mgmt_rx() owns the skb now! */ | |
| 4913 | return; | |
| 4914 | case WMI_10X_SCAN_EVENTID: | |
| 4915 | ath10k_wmi_event_scan(ar, skb); | |
| 4916 | break; | |
| 4917 | case WMI_10X_CHAN_INFO_EVENTID: | |
| 4918 | ath10k_wmi_event_chan_info(ar, skb); | |
| 4919 | break; | |
| 4920 | case WMI_10X_ECHO_EVENTID: | |
| 4921 | ath10k_wmi_event_echo(ar, skb); | |
| 4922 | break; | |
| 4923 | case WMI_10X_DEBUG_MESG_EVENTID: | |
| 4924 | ath10k_wmi_event_debug_mesg(ar, skb); | |
| 4925 | break; | |
| 4926 | case WMI_10X_UPDATE_STATS_EVENTID: | |
| 4927 | ath10k_wmi_event_update_stats(ar, skb); | |
| 4928 | break; | |
| 4929 | case WMI_10X_VDEV_START_RESP_EVENTID: | |
| 4930 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
| 4931 | break; | |
| 4932 | case WMI_10X_VDEV_STOPPED_EVENTID: | |
| 4933 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
| 4934 | break; | |
| 4935 | case WMI_10X_PEER_STA_KICKOUT_EVENTID: | |
| 4936 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
| 4937 | break; | |
| 4938 | case WMI_10X_HOST_SWBA_EVENTID: | |
| 4939 | ath10k_wmi_event_host_swba(ar, skb); | |
| 4940 | break; | |
| 4941 | case WMI_10X_TBTTOFFSET_UPDATE_EVENTID: | |
| 4942 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
| 4943 | break; | |
| 4944 | case WMI_10X_PHYERR_EVENTID: | |
| 4945 | ath10k_wmi_event_phyerr(ar, skb); | |
| 4946 | break; | |
| 4947 | case WMI_10X_ROAM_EVENTID: | |
| 4948 | ath10k_wmi_event_roam(ar, skb); | |
| 4949 | break; | |
| 4950 | case WMI_10X_PROFILE_MATCH: | |
| 4951 | ath10k_wmi_event_profile_match(ar, skb); | |
| 4952 | break; | |
| 4953 | case WMI_10X_DEBUG_PRINT_EVENTID: | |
| 4954 | ath10k_wmi_event_debug_print(ar, skb); | |
| 4955 | break; | |
| 4956 | case WMI_10X_PDEV_QVIT_EVENTID: | |
| 4957 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
| 4958 | break; | |
| 4959 | case WMI_10X_WLAN_PROFILE_DATA_EVENTID: | |
| 4960 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
| 4961 | break; | |
| 4962 | case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID: | |
| 4963 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
| 4964 | break; | |
| 4965 | case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID: | |
| 4966 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
| 4967 | break; | |
| 4968 | case WMI_10X_RTT_ERROR_REPORT_EVENTID: | |
| 4969 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
| 4970 | break; | |
| 4971 | case WMI_10X_WOW_WAKEUP_HOST_EVENTID: | |
| 4972 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
| 4973 | break; | |
| 4974 | case WMI_10X_DCS_INTERFERENCE_EVENTID: | |
| 4975 | ath10k_wmi_event_dcs_interference(ar, skb); | |
| 4976 | break; | |
| 4977 | case WMI_10X_PDEV_TPC_CONFIG_EVENTID: | |
| 4978 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
| 4979 | break; | |
| 4980 | case WMI_10X_INST_RSSI_STATS_EVENTID: | |
| 4981 | ath10k_wmi_event_inst_rssi_stats(ar, skb); | |
| 4982 | break; | |
| 4983 | case WMI_10X_VDEV_STANDBY_REQ_EVENTID: | |
| 4984 | ath10k_wmi_event_vdev_standby_req(ar, skb); | |
| 4985 | break; | |
| 4986 | case WMI_10X_VDEV_RESUME_REQ_EVENTID: | |
| 4987 | ath10k_wmi_event_vdev_resume_req(ar, skb); | |
| 4988 | break; | |
| 4989 | case WMI_10X_SERVICE_READY_EVENTID: | |
| b34d2b3d | 4990 | ath10k_wmi_event_service_ready(ar, skb); |
| c8ecfc1c | 4991 | return; |
| 8a6618b0 | 4992 | case WMI_10X_READY_EVENTID: |
| b34d2b3d | 4993 | ath10k_wmi_event_ready(ar, skb); |
| 8a6618b0 | 4994 | break; |
| 43d2a30f KV |
4995 | case WMI_10X_PDEV_UTF_EVENTID: |
| 4996 | /* ignore utf events */ | |
| 4997 | break; | |
| 8a6618b0 | 4998 | default: |
| 7aa7a72a | 4999 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
| 8a6618b0 BM |
5000 | break; |
| 5001 | } | |
| 5002 | ||
| 43d2a30f | 5003 | out: |
| 8a6618b0 BM |
5004 | dev_kfree_skb(skb); |
| 5005 | } | |
| 5006 | ||
| d7579d12 | 5007 | static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb) |
| 24c88f78 MK |
5008 | { |
| 5009 | struct wmi_cmd_hdr *cmd_hdr; | |
| 5010 | enum wmi_10_2_event_id id; | |
| 5011 | ||
| 5012 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
| 5013 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
| 5014 | ||
| 5015 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
| 469d479f | 5016 | goto out; |
| 24c88f78 | 5017 | |
| d35a6c18 | 5018 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); |
| 24c88f78 MK |
5019 | |
| 5020 | switch (id) { | |
| 5021 | case WMI_10_2_MGMT_RX_EVENTID: | |
| 5022 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
| 5023 | /* mgmt_rx() owns the skb now! */ | |
| 5024 | return; | |
| 5025 | case WMI_10_2_SCAN_EVENTID: | |
| 5026 | ath10k_wmi_event_scan(ar, skb); | |
| 5027 | break; | |
| 5028 | case WMI_10_2_CHAN_INFO_EVENTID: | |
| 5029 | ath10k_wmi_event_chan_info(ar, skb); | |
| 5030 | break; | |
| 5031 | case WMI_10_2_ECHO_EVENTID: | |
| 5032 | ath10k_wmi_event_echo(ar, skb); | |
| 5033 | break; | |
| 5034 | case WMI_10_2_DEBUG_MESG_EVENTID: | |
| 5035 | ath10k_wmi_event_debug_mesg(ar, skb); | |
| 5036 | break; | |
| 5037 | case WMI_10_2_UPDATE_STATS_EVENTID: | |
| 5038 | ath10k_wmi_event_update_stats(ar, skb); | |
| 5039 | break; | |
| 5040 | case WMI_10_2_VDEV_START_RESP_EVENTID: | |
| 5041 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
| 5042 | break; | |
| 5043 | case WMI_10_2_VDEV_STOPPED_EVENTID: | |
| 5044 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
| 5045 | break; | |
| 5046 | case WMI_10_2_PEER_STA_KICKOUT_EVENTID: | |
| 5047 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
| 5048 | break; | |
| 5049 | case WMI_10_2_HOST_SWBA_EVENTID: | |
| 5050 | ath10k_wmi_event_host_swba(ar, skb); | |
| 5051 | break; | |
| 5052 | case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID: | |
| 5053 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
| 5054 | break; | |
| 5055 | case WMI_10_2_PHYERR_EVENTID: | |
| 5056 | ath10k_wmi_event_phyerr(ar, skb); | |
| 5057 | break; | |
| 5058 | case WMI_10_2_ROAM_EVENTID: | |
| 5059 | ath10k_wmi_event_roam(ar, skb); | |
| 5060 | break; | |
| 5061 | case WMI_10_2_PROFILE_MATCH: | |
| 5062 | ath10k_wmi_event_profile_match(ar, skb); | |
| 5063 | break; | |
| 5064 | case WMI_10_2_DEBUG_PRINT_EVENTID: | |
| 5065 | ath10k_wmi_event_debug_print(ar, skb); | |
| 5066 | break; | |
| 5067 | case WMI_10_2_PDEV_QVIT_EVENTID: | |
| 5068 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
| 5069 | break; | |
| 5070 | case WMI_10_2_WLAN_PROFILE_DATA_EVENTID: | |
| 5071 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
| 5072 | break; | |
| 5073 | case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID: | |
| 5074 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
| 5075 | break; | |
| 5076 | case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID: | |
| 5077 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
| 5078 | break; | |
| 5079 | case WMI_10_2_RTT_ERROR_REPORT_EVENTID: | |
| 5080 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
| 5081 | break; | |
| 5082 | case WMI_10_2_WOW_WAKEUP_HOST_EVENTID: | |
| 5083 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
| 5084 | break; | |
| 5085 | case WMI_10_2_DCS_INTERFERENCE_EVENTID: | |
| 5086 | ath10k_wmi_event_dcs_interference(ar, skb); | |
| 5087 | break; | |
| 5088 | case WMI_10_2_PDEV_TPC_CONFIG_EVENTID: | |
| 5089 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
| 5090 | break; | |
| 5091 | case WMI_10_2_INST_RSSI_STATS_EVENTID: | |
| 5092 | ath10k_wmi_event_inst_rssi_stats(ar, skb); | |
| 5093 | break; | |
| 5094 | case WMI_10_2_VDEV_STANDBY_REQ_EVENTID: | |
| 5095 | ath10k_wmi_event_vdev_standby_req(ar, skb); | |
| 5096 | break; | |
| 5097 | case WMI_10_2_VDEV_RESUME_REQ_EVENTID: | |
| 5098 | ath10k_wmi_event_vdev_resume_req(ar, skb); | |
| 5099 | break; | |
| 5100 | case WMI_10_2_SERVICE_READY_EVENTID: | |
| b34d2b3d | 5101 | ath10k_wmi_event_service_ready(ar, skb); |
| c8ecfc1c | 5102 | return; |
| 24c88f78 | 5103 | case WMI_10_2_READY_EVENTID: |
| b34d2b3d | 5104 | ath10k_wmi_event_ready(ar, skb); |
| 24c88f78 | 5105 | break; |
| a57a6a27 RM |
5106 | case WMI_10_2_PDEV_TEMPERATURE_EVENTID: |
| 5107 | ath10k_wmi_event_temperature(ar, skb); | |
| 5108 | break; | |
| 24c88f78 MK |
5109 | case WMI_10_2_RTT_KEEPALIVE_EVENTID: |
| 5110 | case WMI_10_2_GPIO_INPUT_EVENTID: | |
| 5111 | case WMI_10_2_PEER_RATECODE_LIST_EVENTID: | |
| 5112 | case WMI_10_2_GENERIC_BUFFER_EVENTID: | |
| 5113 | case WMI_10_2_MCAST_BUF_RELEASE_EVENTID: | |
| 5114 | case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID: | |
| 5115 | case WMI_10_2_WDS_PEER_EVENTID: | |
| 7aa7a72a | 5116 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 24c88f78 MK |
5117 | "received event id %d not implemented\n", id); |
| 5118 | break; | |
| 5119 | default: | |
| 7aa7a72a | 5120 | ath10k_warn(ar, "Unknown eventid: %d\n", id); |
| 24c88f78 MK |
5121 | break; |
| 5122 | } | |
| 5123 | ||
| 469d479f | 5124 | out: |
| 24c88f78 MK |
5125 | dev_kfree_skb(skb); |
| 5126 | } | |
| 8a6618b0 | 5127 | |
| 1c092961 RM |
5128 | static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb) |
| 5129 | { | |
| 5130 | struct wmi_cmd_hdr *cmd_hdr; | |
| 5131 | enum wmi_10_4_event_id id; | |
| 5132 | ||
| 5133 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
| 5134 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
| 5135 | ||
| 5136 | if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) | |
| 5137 | goto out; | |
| 5138 | ||
| 5139 | trace_ath10k_wmi_event(ar, id, skb->data, skb->len); | |
| 5140 | ||
| 5141 | switch (id) { | |
| 5142 | case WMI_10_4_MGMT_RX_EVENTID: | |
| 5143 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
| 5144 | /* mgmt_rx() owns the skb now! */ | |
| 5145 | return; | |
| 373b48cf RM |
5146 | case WMI_10_4_ECHO_EVENTID: |
| 5147 | ath10k_wmi_event_echo(ar, skb); | |
| 5148 | break; | |
| 5149 | case WMI_10_4_DEBUG_MESG_EVENTID: | |
| 5150 | ath10k_wmi_event_debug_mesg(ar, skb); | |
| 5151 | break; | |
| 5152 | case WMI_10_4_SERVICE_READY_EVENTID: | |
| 5153 | ath10k_wmi_event_service_ready(ar, skb); | |
| c8ecfc1c | 5154 | return; |
| b2297baa RM |
5155 | case WMI_10_4_SCAN_EVENTID: |
| 5156 | ath10k_wmi_event_scan(ar, skb); | |
| 5157 | break; | |
| 5158 | case WMI_10_4_CHAN_INFO_EVENTID: | |
| 5159 | ath10k_wmi_event_chan_info(ar, skb); | |
| 5160 | break; | |
| 2b0a2e0d RM |
5161 | case WMI_10_4_PHYERR_EVENTID: |
| 5162 | ath10k_wmi_event_phyerr(ar, skb); | |
| 5163 | break; | |
| d02e752f RM |
5164 | case WMI_10_4_READY_EVENTID: |
| 5165 | ath10k_wmi_event_ready(ar, skb); | |
| 5166 | break; | |
| 373b48cf RM |
5167 | case WMI_10_4_PEER_STA_KICKOUT_EVENTID: |
| 5168 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
| 5169 | break; | |
| 3cec3be3 RM |
5170 | case WMI_10_4_HOST_SWBA_EVENTID: |
| 5171 | ath10k_wmi_event_host_swba(ar, skb); | |
| 5172 | break; | |
| 373b48cf RM |
5173 | case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID: |
| 5174 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
| 5175 | break; | |
| 5176 | case WMI_10_4_DEBUG_PRINT_EVENTID: | |
| 5177 | ath10k_wmi_event_debug_print(ar, skb); | |
| 5178 | break; | |
| 5179 | case WMI_10_4_VDEV_START_RESP_EVENTID: | |
| 5180 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
| 5181 | break; | |
| 5182 | case WMI_10_4_VDEV_STOPPED_EVENTID: | |
| 5183 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
| 5184 | break; | |
| 5185 | case WMI_10_4_WOW_WAKEUP_HOST_EVENTID: | |
| 5186 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 5187 | "received event id %d not implemented\n", id); | |
| 5188 | break; | |
| 98dd2b92 MP |
5189 | case WMI_10_4_UPDATE_STATS_EVENTID: |
| 5190 | ath10k_wmi_event_update_stats(ar, skb); | |
| 5191 | break; | |
| 6dd46348 T |
5192 | case WMI_10_4_PDEV_TEMPERATURE_EVENTID: |
| 5193 | ath10k_wmi_event_temperature(ar, skb); | |
| 5194 | break; | |
| 1c092961 RM |
5195 | default: |
| 5196 | ath10k_warn(ar, "Unknown eventid: %d\n", id); | |
| 5197 | break; | |
| 5198 | } | |
| 5199 | ||
| 5200 | out: | |
| 5201 | dev_kfree_skb(skb); | |
| 5202 | } | |
| 5203 | ||
| ce42870e BM |
5204 | static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb) |
| 5205 | { | |
| d7579d12 MK |
5206 | int ret; |
| 5207 | ||
| 5208 | ret = ath10k_wmi_rx(ar, skb); | |
| 5209 | if (ret) | |
| 5210 | ath10k_warn(ar, "failed to process wmi rx: %d\n", ret); | |
| ce42870e BM |
5211 | } |
| 5212 | ||
| 95bf21f9 | 5213 | int ath10k_wmi_connect(struct ath10k *ar) |
| 5e3dd157 KV |
5214 | { |
| 5215 | int status; | |
| 5216 | struct ath10k_htc_svc_conn_req conn_req; | |
| 5217 | struct ath10k_htc_svc_conn_resp conn_resp; | |
| 5218 | ||
| 5219 | memset(&conn_req, 0, sizeof(conn_req)); | |
| 5220 | memset(&conn_resp, 0, sizeof(conn_resp)); | |
| 5221 | ||
| 5222 | /* these fields are the same for all service endpoints */ | |
| 5223 | conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete; | |
| 5224 | conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx; | |
| be8b3943 | 5225 | conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits; |
| 5e3dd157 KV |
5226 | |
| 5227 | /* connect to control service */ | |
| 5228 | conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL; | |
| 5229 | ||
| cd003fad | 5230 | status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp); |
| 5e3dd157 | 5231 | if (status) { |
| 7aa7a72a | 5232 | ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n", |
| 5e3dd157 KV |
5233 | status); |
| 5234 | return status; | |
| 5235 | } | |
| 5236 | ||
| 5237 | ar->wmi.eid = conn_resp.eid; | |
| 5238 | return 0; | |
| 5239 | } | |
| 5240 | ||
| d7579d12 MK |
5241 | static struct sk_buff * |
| 5242 | ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g, | |
| 5243 | u16 ctl2g, u16 ctl5g, | |
| 5244 | enum wmi_dfs_region dfs_reg) | |
| 5e3dd157 KV |
5245 | { |
| 5246 | struct wmi_pdev_set_regdomain_cmd *cmd; | |
| 5247 | struct sk_buff *skb; | |
| 5248 | ||
| 7aa7a72a | 5249 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5250 | if (!skb) |
| d7579d12 | 5251 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5252 | |
| 5253 | cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; | |
| 5254 | cmd->reg_domain = __cpu_to_le32(rd); | |
| 5255 | cmd->reg_domain_2G = __cpu_to_le32(rd2g); | |
| 5256 | cmd->reg_domain_5G = __cpu_to_le32(rd5g); | |
| 5257 | cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); | |
| 5258 | cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); | |
| 5259 | ||
| 7aa7a72a | 5260 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
5261 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n", |
| 5262 | rd, rd2g, rd5g, ctl2g, ctl5g); | |
| d7579d12 | 5263 | return skb; |
| 5e3dd157 KV |
5264 | } |
| 5265 | ||
| d7579d12 MK |
5266 | static struct sk_buff * |
| 5267 | ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 | |
| 5268 | rd5g, u16 ctl2g, u16 ctl5g, | |
| 5269 | enum wmi_dfs_region dfs_reg) | |
| 821af6ae MP |
5270 | { |
| 5271 | struct wmi_pdev_set_regdomain_cmd_10x *cmd; | |
| 5272 | struct sk_buff *skb; | |
| 5273 | ||
| 7aa7a72a | 5274 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 821af6ae | 5275 | if (!skb) |
| d7579d12 | 5276 | return ERR_PTR(-ENOMEM); |
| 821af6ae MP |
5277 | |
| 5278 | cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data; | |
| 5279 | cmd->reg_domain = __cpu_to_le32(rd); | |
| 5280 | cmd->reg_domain_2G = __cpu_to_le32(rd2g); | |
| 5281 | cmd->reg_domain_5G = __cpu_to_le32(rd5g); | |
| 5282 | cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); | |
| 5283 | cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); | |
| 5284 | cmd->dfs_domain = __cpu_to_le32(dfs_reg); | |
| 5285 | ||
| 7aa7a72a | 5286 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 821af6ae MP |
5287 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n", |
| 5288 | rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg); | |
| d7579d12 | 5289 | return skb; |
| 821af6ae MP |
5290 | } |
| 5291 | ||
| d7579d12 MK |
5292 | static struct sk_buff * |
| 5293 | ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt) | |
| 5e3dd157 KV |
5294 | { |
| 5295 | struct wmi_pdev_suspend_cmd *cmd; | |
| 5296 | struct sk_buff *skb; | |
| 5297 | ||
| 7aa7a72a | 5298 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5299 | if (!skb) |
| d7579d12 | 5300 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5301 | |
| 5302 | cmd = (struct wmi_pdev_suspend_cmd *)skb->data; | |
| 00f5482b | 5303 | cmd->suspend_opt = __cpu_to_le32(suspend_opt); |
| 5e3dd157 | 5304 | |
| d7579d12 | 5305 | return skb; |
| 5e3dd157 KV |
5306 | } |
| 5307 | ||
| d7579d12 MK |
5308 | static struct sk_buff * |
| 5309 | ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar) | |
| 5e3dd157 KV |
5310 | { |
| 5311 | struct sk_buff *skb; | |
| 5312 | ||
| 7aa7a72a | 5313 | skb = ath10k_wmi_alloc_skb(ar, 0); |
| d7579d12 MK |
5314 | if (!skb) |
| 5315 | return ERR_PTR(-ENOMEM); | |
| 5e3dd157 | 5316 | |
| d7579d12 | 5317 | return skb; |
| 5e3dd157 KV |
5318 | } |
| 5319 | ||
| d7579d12 MK |
5320 | static struct sk_buff * |
| 5321 | ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value) | |
| 5e3dd157 KV |
5322 | { |
| 5323 | struct wmi_pdev_set_param_cmd *cmd; | |
| 5324 | struct sk_buff *skb; | |
| 5325 | ||
| 226a339b | 5326 | if (id == WMI_PDEV_PARAM_UNSUPPORTED) { |
| 7aa7a72a MK |
5327 | ath10k_warn(ar, "pdev param %d not supported by firmware\n", |
| 5328 | id); | |
| d7579d12 | 5329 | return ERR_PTR(-EOPNOTSUPP); |
| 226a339b BM |
5330 | } |
| 5331 | ||
| 7aa7a72a | 5332 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5333 | if (!skb) |
| d7579d12 | 5334 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5335 | |
| 5336 | cmd = (struct wmi_pdev_set_param_cmd *)skb->data; | |
| 5337 | cmd->param_id = __cpu_to_le32(id); | |
| 5338 | cmd->param_value = __cpu_to_le32(value); | |
| 5339 | ||
| 7aa7a72a | 5340 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n", |
| 5e3dd157 | 5341 | id, value); |
| d7579d12 | 5342 | return skb; |
| 5e3dd157 KV |
5343 | } |
| 5344 | ||
| 0226d602 MK |
5345 | void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, |
| 5346 | struct wmi_host_mem_chunks *chunks) | |
| cf9fca8f MK |
5347 | { |
| 5348 | struct host_memory_chunk *chunk; | |
| 5349 | int i; | |
| 5350 | ||
| 5351 | chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks); | |
| 5352 | ||
| 5353 | for (i = 0; i < ar->wmi.num_mem_chunks; i++) { | |
| 5354 | chunk = &chunks->items[i]; | |
| 5355 | chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr); | |
| 5356 | chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len); | |
| 5357 | chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id); | |
| 5358 | ||
| 5359 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 5360 | "wmi chunk %d len %d requested, addr 0x%llx\n", | |
| 5361 | i, | |
| 5362 | ar->wmi.mem_chunks[i].len, | |
| 5363 | (unsigned long long)ar->wmi.mem_chunks[i].paddr); | |
| 5364 | } | |
| 5365 | } | |
| 5366 | ||
| d7579d12 | 5367 | static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar) |
| 5e3dd157 KV |
5368 | { |
| 5369 | struct wmi_init_cmd *cmd; | |
| 5370 | struct sk_buff *buf; | |
| 5371 | struct wmi_resource_config config = {}; | |
| b3effe61 | 5372 | u32 len, val; |
| 5e3dd157 KV |
5373 | |
| 5374 | config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS); | |
| cfd1061e | 5375 | config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS); |
| 5e3dd157 KV |
5376 | config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS); |
| 5377 | ||
| 5378 | config.num_offload_reorder_bufs = | |
| 5379 | __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS); | |
| 5380 | ||
| 5381 | config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS); | |
| 5382 | config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS); | |
| 5383 | config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT); | |
| 5384 | config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK); | |
| 5385 | config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK); | |
| 5386 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
| 5387 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
| 5388 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
| 5389 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI); | |
| ccec9038 | 5390 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
| 5e3dd157 KV |
5391 | config.scan_max_pending_reqs = |
| 5392 | __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS); | |
| 5393 | ||
| 5394 | config.bmiss_offload_max_vdev = | |
| 5395 | __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV); | |
| 5396 | ||
| 5397 | config.roam_offload_max_vdev = | |
| 5398 | __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV); | |
| 5399 | ||
| 5400 | config.roam_offload_max_ap_profiles = | |
| 5401 | __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES); | |
| 5402 | ||
| 5403 | config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS); | |
| 5404 | config.num_mcast_table_elems = | |
| 5405 | __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS); | |
| 5406 | ||
| 5407 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE); | |
| 5408 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE); | |
| 5409 | config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES); | |
| 5410 | config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE); | |
| 5411 | config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM); | |
| 5412 | ||
| 5413 | val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; | |
| 5414 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); | |
| 5415 | ||
| 5416 | config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG); | |
| 5417 | ||
| 5418 | config.gtk_offload_max_vdev = | |
| 5419 | __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV); | |
| 5420 | ||
| 5421 | config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC); | |
| 5422 | config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES); | |
| 5423 | ||
| b3effe61 BM |
5424 | len = sizeof(*cmd) + |
| 5425 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
| 5426 | ||
| 7aa7a72a | 5427 | buf = ath10k_wmi_alloc_skb(ar, len); |
| 5e3dd157 | 5428 | if (!buf) |
| d7579d12 | 5429 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5430 | |
| 5431 | cmd = (struct wmi_init_cmd *)buf->data; | |
| b3effe61 | 5432 | |
| 5e3dd157 | 5433 | memcpy(&cmd->resource_config, &config, sizeof(config)); |
| cf9fca8f | 5434 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
| 5e3dd157 | 5435 | |
| 7aa7a72a | 5436 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n"); |
| d7579d12 | 5437 | return buf; |
| 5e3dd157 KV |
5438 | } |
| 5439 | ||
| d7579d12 | 5440 | static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar) |
| 12b2b9e3 BM |
5441 | { |
| 5442 | struct wmi_init_cmd_10x *cmd; | |
| 5443 | struct sk_buff *buf; | |
| 5444 | struct wmi_resource_config_10x config = {}; | |
| 5445 | u32 len, val; | |
| 12b2b9e3 | 5446 | |
| ec6a73f0 BM |
5447 | config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); |
| 5448 | config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); | |
| 5449 | config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); | |
| 5450 | config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); | |
| 5451 | config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); | |
| 5452 | config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); | |
| 5453 | config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); | |
| 5454 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5455 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5456 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5457 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); | |
| ccec9038 | 5458 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
| 12b2b9e3 | 5459 | config.scan_max_pending_reqs = |
| ec6a73f0 | 5460 | __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); |
| 12b2b9e3 BM |
5461 | |
| 5462 | config.bmiss_offload_max_vdev = | |
| ec6a73f0 | 5463 | __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); |
| 12b2b9e3 BM |
5464 | |
| 5465 | config.roam_offload_max_vdev = | |
| ec6a73f0 | 5466 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); |
| 12b2b9e3 BM |
5467 | |
| 5468 | config.roam_offload_max_ap_profiles = | |
| ec6a73f0 | 5469 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); |
| 12b2b9e3 | 5470 | |
| ec6a73f0 | 5471 | config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); |
| 12b2b9e3 | 5472 | config.num_mcast_table_elems = |
| ec6a73f0 | 5473 | __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); |
| 12b2b9e3 | 5474 | |
| ec6a73f0 BM |
5475 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); |
| 5476 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); | |
| 5477 | config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); | |
| 5478 | config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE); | |
| 5479 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); | |
| 12b2b9e3 | 5480 | |
| ec6a73f0 | 5481 | val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; |
| 12b2b9e3 BM |
5482 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); |
| 5483 | ||
| ec6a73f0 | 5484 | config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); |
| 12b2b9e3 | 5485 | |
| ec6a73f0 BM |
5486 | config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); |
| 5487 | config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); | |
| 12b2b9e3 BM |
5488 | |
| 5489 | len = sizeof(*cmd) + | |
| 5490 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
| 5491 | ||
| 7aa7a72a | 5492 | buf = ath10k_wmi_alloc_skb(ar, len); |
| 12b2b9e3 | 5493 | if (!buf) |
| d7579d12 | 5494 | return ERR_PTR(-ENOMEM); |
| 12b2b9e3 BM |
5495 | |
| 5496 | cmd = (struct wmi_init_cmd_10x *)buf->data; | |
| 5497 | ||
| 12b2b9e3 | 5498 | memcpy(&cmd->resource_config, &config, sizeof(config)); |
| cf9fca8f | 5499 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
| 12b2b9e3 | 5500 | |
| 7aa7a72a | 5501 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n"); |
| d7579d12 | 5502 | return buf; |
| 12b2b9e3 BM |
5503 | } |
| 5504 | ||
| d7579d12 | 5505 | static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar) |
| 24c88f78 MK |
5506 | { |
| 5507 | struct wmi_init_cmd_10_2 *cmd; | |
| 5508 | struct sk_buff *buf; | |
| 5509 | struct wmi_resource_config_10x config = {}; | |
| b6c8e287 | 5510 | u32 len, val, features; |
| 24c88f78 MK |
5511 | |
| 5512 | config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); | |
| 24c88f78 | 5513 | config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); |
| cc61a1bb MSS |
5514 | |
| 5515 | if (ath10k_peer_stats_enabled(ar)) { | |
| af9a6a3a AK |
5516 | config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS); |
| 5517 | config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS); | |
| 5518 | } else { | |
| 5519 | config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); | |
| 5520 | config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); | |
| 5521 | } | |
| 5522 | ||
| 24c88f78 MK |
5523 | config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); |
| 5524 | config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); | |
| 5525 | config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); | |
| 5526 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5527 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5528 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); | |
| 5529 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); | |
| ccec9038 | 5530 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
| 24c88f78 MK |
5531 | |
| 5532 | config.scan_max_pending_reqs = | |
| 5533 | __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); | |
| 5534 | ||
| 5535 | config.bmiss_offload_max_vdev = | |
| 5536 | __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); | |
| 5537 | ||
| 5538 | config.roam_offload_max_vdev = | |
| 5539 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); | |
| 5540 | ||
| 5541 | config.roam_offload_max_ap_profiles = | |
| 5542 | __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); | |
| 5543 | ||
| 5544 | config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); | |
| 5545 | config.num_mcast_table_elems = | |
| 5546 | __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); | |
| 5547 | ||
| 5548 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); | |
| 5549 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); | |
| 5550 | config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); | |
| f6603ff2 | 5551 | config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE); |
| 24c88f78 MK |
5552 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); |
| 5553 | ||
| 5554 | val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; | |
| 5555 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); | |
| 5556 | ||
| 5557 | config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); | |
| 5558 | ||
| 5559 | config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); | |
| 5560 | config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); | |
| 5561 | ||
| 5562 | len = sizeof(*cmd) + | |
| 5563 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
| 5564 | ||
| 7aa7a72a | 5565 | buf = ath10k_wmi_alloc_skb(ar, len); |
| 24c88f78 | 5566 | if (!buf) |
| d7579d12 | 5567 | return ERR_PTR(-ENOMEM); |
| 24c88f78 MK |
5568 | |
| 5569 | cmd = (struct wmi_init_cmd_10_2 *)buf->data; | |
| 5570 | ||
| b6c8e287 | 5571 | features = WMI_10_2_RX_BATCH_MODE; |
| 844fa572 YL |
5572 | |
| 5573 | if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) && | |
| 5574 | test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map)) | |
| de0c789b | 5575 | features |= WMI_10_2_COEX_GPIO; |
| 844fa572 | 5576 | |
| cc61a1bb | 5577 | if (ath10k_peer_stats_enabled(ar)) |
| de46c015 MSS |
5578 | features |= WMI_10_2_PEER_STATS; |
| 5579 | ||
| b6c8e287 SM |
5580 | cmd->resource_config.feature_mask = __cpu_to_le32(features); |
| 5581 | ||
| 24c88f78 | 5582 | memcpy(&cmd->resource_config.common, &config, sizeof(config)); |
| cf9fca8f | 5583 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
| 24c88f78 | 5584 | |
| 7aa7a72a | 5585 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n"); |
| d7579d12 | 5586 | return buf; |
| 5e3dd157 KV |
5587 | } |
| 5588 | ||
| d1e52a8e RM |
5589 | static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar) |
| 5590 | { | |
| 5591 | struct wmi_init_cmd_10_4 *cmd; | |
| 5592 | struct sk_buff *buf; | |
| 5593 | struct wmi_resource_config_10_4 config = {}; | |
| 5594 | u32 len; | |
| 5595 | ||
| 5596 | config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs); | |
| 5597 | config.num_peers = __cpu_to_le32(ar->max_num_peers); | |
| 5598 | config.num_active_peers = __cpu_to_le32(ar->num_active_peers); | |
| 5599 | config.num_tids = __cpu_to_le32(ar->num_tids); | |
| 5600 | ||
| 5601 | config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS); | |
| 5602 | config.num_offload_reorder_buffs = | |
| 5603 | __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS); | |
| 5604 | config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS); | |
| 5605 | config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT); | |
| 5699a6f2 RM |
5606 | config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask); |
| 5607 | config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask); | |
| d1e52a8e RM |
5608 | |
| 5609 | config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
| 5610 | config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
| 5611 | config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI); | |
| 5612 | config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI); | |
| 5613 | ||
| bc27e8cd | 5614 | config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode); |
| d1e52a8e RM |
5615 | config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS); |
| 5616 | config.bmiss_offload_max_vdev = | |
| 5617 | __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV); | |
| 5618 | config.roam_offload_max_vdev = | |
| 5619 | __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV); | |
| 5620 | config.roam_offload_max_ap_profiles = | |
| 5621 | __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES); | |
| 5622 | config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS); | |
| 5623 | config.num_mcast_table_elems = | |
| 5624 | __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS); | |
| 5625 | ||
| 5626 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE); | |
| 5627 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE); | |
| 5628 | config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES); | |
| 5629 | config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE); | |
| 5630 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM); | |
| 5631 | ||
| 5632 | config.rx_skip_defrag_timeout_dup_detection_check = | |
| 5633 | __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK); | |
| 5634 | ||
| 5635 | config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG); | |
| 5636 | config.gtk_offload_max_vdev = | |
| 5637 | __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV); | |
| 5699a6f2 | 5638 | config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx); |
| d1e52a8e RM |
5639 | config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS); |
| 5640 | config.max_peer_ext_stats = | |
| 5641 | __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS); | |
| 5642 | config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP); | |
| 5643 | ||
| 5644 | config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE); | |
| 5645 | config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE); | |
| 5646 | config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE); | |
| 5647 | config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE); | |
| 5648 | ||
| 5649 | config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE); | |
| 5650 | config.tt_support = | |
| 5651 | __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG); | |
| 5652 | config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG); | |
| 5653 | config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG); | |
| 5654 | config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG); | |
| 5655 | ||
| 5656 | len = sizeof(*cmd) + | |
| 5657 | (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); | |
| 5658 | ||
| 5659 | buf = ath10k_wmi_alloc_skb(ar, len); | |
| 5660 | if (!buf) | |
| 5661 | return ERR_PTR(-ENOMEM); | |
| 5662 | ||
| 5663 | cmd = (struct wmi_init_cmd_10_4 *)buf->data; | |
| 5664 | memcpy(&cmd->resource_config, &config, sizeof(config)); | |
| 5665 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); | |
| 5666 | ||
| 5667 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n"); | |
| 5668 | return buf; | |
| 5669 | } | |
| 5670 | ||
| 0226d602 | 5671 | int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg) |
| 5e3dd157 | 5672 | { |
| a6aa5da3 MK |
5673 | if (arg->ie_len && !arg->ie) |
| 5674 | return -EINVAL; | |
| 5675 | if (arg->n_channels && !arg->channels) | |
| 5676 | return -EINVAL; | |
| 5677 | if (arg->n_ssids && !arg->ssids) | |
| 5678 | return -EINVAL; | |
| 5679 | if (arg->n_bssids && !arg->bssids) | |
| 5680 | return -EINVAL; | |
| 5e3dd157 | 5681 | |
| a6aa5da3 MK |
5682 | if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN) |
| 5683 | return -EINVAL; | |
| 5684 | if (arg->n_channels > ARRAY_SIZE(arg->channels)) | |
| 5685 | return -EINVAL; | |
| 5686 | if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID) | |
| 5687 | return -EINVAL; | |
| 5688 | if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID) | |
| 5689 | return -EINVAL; | |
| 5e3dd157 | 5690 | |
| a6aa5da3 MK |
5691 | return 0; |
| 5692 | } | |
| 5e3dd157 | 5693 | |
| a6aa5da3 MK |
5694 | static size_t |
| 5695 | ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg) | |
| 5696 | { | |
| 5697 | int len = 0; | |
| 5698 | ||
| 5699 | if (arg->ie_len) { | |
| 5e3dd157 KV |
5700 | len += sizeof(struct wmi_ie_data); |
| 5701 | len += roundup(arg->ie_len, 4); | |
| 5702 | } | |
| 5703 | ||
| 5704 | if (arg->n_channels) { | |
| 5e3dd157 KV |
5705 | len += sizeof(struct wmi_chan_list); |
| 5706 | len += sizeof(__le32) * arg->n_channels; | |
| 5707 | } | |
| 5708 | ||
| 5709 | if (arg->n_ssids) { | |
| 5e3dd157 KV |
5710 | len += sizeof(struct wmi_ssid_list); |
| 5711 | len += sizeof(struct wmi_ssid) * arg->n_ssids; | |
| 5712 | } | |
| 5713 | ||
| 5714 | if (arg->n_bssids) { | |
| 5e3dd157 KV |
5715 | len += sizeof(struct wmi_bssid_list); |
| 5716 | len += sizeof(struct wmi_mac_addr) * arg->n_bssids; | |
| 5717 | } | |
| 5718 | ||
| 5719 | return len; | |
| 5720 | } | |
| 5721 | ||
| 0226d602 MK |
5722 | void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, |
| 5723 | const struct wmi_start_scan_arg *arg) | |
| 5e3dd157 | 5724 | { |
| 5e3dd157 KV |
5725 | u32 scan_id; |
| 5726 | u32 scan_req_id; | |
| 5e3dd157 KV |
5727 | |
| 5728 | scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX; | |
| 5729 | scan_id |= arg->scan_id; | |
| 5730 | ||
| 5731 | scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; | |
| 5732 | scan_req_id |= arg->scan_req_id; | |
| 5733 | ||
| a6aa5da3 MK |
5734 | cmn->scan_id = __cpu_to_le32(scan_id); |
| 5735 | cmn->scan_req_id = __cpu_to_le32(scan_req_id); | |
| 5736 | cmn->vdev_id = __cpu_to_le32(arg->vdev_id); | |
| 5737 | cmn->scan_priority = __cpu_to_le32(arg->scan_priority); | |
| 5738 | cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events); | |
| 5739 | cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active); | |
| 5740 | cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive); | |
| 5741 | cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time); | |
| 5742 | cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time); | |
| 5743 | cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time); | |
| 5744 | cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time); | |
| 5745 | cmn->idle_time = __cpu_to_le32(arg->idle_time); | |
| 5746 | cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time); | |
| 5747 | cmn->probe_delay = __cpu_to_le32(arg->probe_delay); | |
| 5748 | cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags); | |
| 5749 | } | |
| 5750 | ||
| 5751 | static void | |
| 5752 | ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs, | |
| 5753 | const struct wmi_start_scan_arg *arg) | |
| 5754 | { | |
| 5755 | struct wmi_ie_data *ie; | |
| 5756 | struct wmi_chan_list *channels; | |
| 5757 | struct wmi_ssid_list *ssids; | |
| 5758 | struct wmi_bssid_list *bssids; | |
| 5759 | void *ptr = tlvs->tlvs; | |
| 5760 | int i; | |
| 5e3dd157 KV |
5761 | |
| 5762 | if (arg->n_channels) { | |
| a6aa5da3 | 5763 | channels = ptr; |
| 5e3dd157 KV |
5764 | channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG); |
| 5765 | channels->num_chan = __cpu_to_le32(arg->n_channels); | |
| 5766 | ||
| 5767 | for (i = 0; i < arg->n_channels; i++) | |
| 24c88f78 MK |
5768 | channels->channel_list[i].freq = |
| 5769 | __cpu_to_le16(arg->channels[i]); | |
| 5e3dd157 | 5770 | |
| a6aa5da3 MK |
5771 | ptr += sizeof(*channels); |
| 5772 | ptr += sizeof(__le32) * arg->n_channels; | |
| 5e3dd157 KV |
5773 | } |
| 5774 | ||
| 5775 | if (arg->n_ssids) { | |
| a6aa5da3 | 5776 | ssids = ptr; |
| 5e3dd157 KV |
5777 | ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG); |
| 5778 | ssids->num_ssids = __cpu_to_le32(arg->n_ssids); | |
| 5779 | ||
| 5780 | for (i = 0; i < arg->n_ssids; i++) { | |
| 5781 | ssids->ssids[i].ssid_len = | |
| 5782 | __cpu_to_le32(arg->ssids[i].len); | |
| 5783 | memcpy(&ssids->ssids[i].ssid, | |
| 5784 | arg->ssids[i].ssid, | |
| 5785 | arg->ssids[i].len); | |
| 5786 | } | |
| 5787 | ||
| a6aa5da3 MK |
5788 | ptr += sizeof(*ssids); |
| 5789 | ptr += sizeof(struct wmi_ssid) * arg->n_ssids; | |
| 5e3dd157 KV |
5790 | } |
| 5791 | ||
| 5792 | if (arg->n_bssids) { | |
| a6aa5da3 | 5793 | bssids = ptr; |
| 5e3dd157 KV |
5794 | bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG); |
| 5795 | bssids->num_bssid = __cpu_to_le32(arg->n_bssids); | |
| 5796 | ||
| 5797 | for (i = 0; i < arg->n_bssids; i++) | |
| 5798 | memcpy(&bssids->bssid_list[i], | |
| 5799 | arg->bssids[i].bssid, | |
| 5800 | ETH_ALEN); | |
| 5801 | ||
| a6aa5da3 MK |
5802 | ptr += sizeof(*bssids); |
| 5803 | ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids; | |
| 5e3dd157 KV |
5804 | } |
| 5805 | ||
| 5806 | if (arg->ie_len) { | |
| a6aa5da3 | 5807 | ie = ptr; |
| 5e3dd157 KV |
5808 | ie->tag = __cpu_to_le32(WMI_IE_TAG); |
| 5809 | ie->ie_len = __cpu_to_le32(arg->ie_len); | |
| 5810 | memcpy(ie->ie_data, arg->ie, arg->ie_len); | |
| 5811 | ||
| a6aa5da3 MK |
5812 | ptr += sizeof(*ie); |
| 5813 | ptr += roundup(arg->ie_len, 4); | |
| 5e3dd157 | 5814 | } |
| a6aa5da3 | 5815 | } |
| 5e3dd157 | 5816 | |
| d7579d12 MK |
5817 | static struct sk_buff * |
| 5818 | ath10k_wmi_op_gen_start_scan(struct ath10k *ar, | |
| 5819 | const struct wmi_start_scan_arg *arg) | |
| a6aa5da3 | 5820 | { |
| d7579d12 | 5821 | struct wmi_start_scan_cmd *cmd; |
| a6aa5da3 MK |
5822 | struct sk_buff *skb; |
| 5823 | size_t len; | |
| 5824 | int ret; | |
| 5825 | ||
| 5826 | ret = ath10k_wmi_start_scan_verify(arg); | |
| 5827 | if (ret) | |
| d7579d12 | 5828 | return ERR_PTR(ret); |
| a6aa5da3 | 5829 | |
| d7579d12 | 5830 | len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); |
| a6aa5da3 MK |
5831 | skb = ath10k_wmi_alloc_skb(ar, len); |
| 5832 | if (!skb) | |
| d7579d12 | 5833 | return ERR_PTR(-ENOMEM); |
| a6aa5da3 | 5834 | |
| d7579d12 | 5835 | cmd = (struct wmi_start_scan_cmd *)skb->data; |
| a6aa5da3 | 5836 | |
| d7579d12 MK |
5837 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); |
| 5838 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | |
| a6aa5da3 | 5839 | |
| d7579d12 | 5840 | cmd->burst_duration_ms = __cpu_to_le32(0); |
| 5e3dd157 | 5841 | |
| 7aa7a72a | 5842 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n"); |
| d7579d12 MK |
5843 | return skb; |
| 5844 | } | |
| 5845 | ||
| 5846 | static struct sk_buff * | |
| 5847 | ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar, | |
| 5848 | const struct wmi_start_scan_arg *arg) | |
| 5849 | { | |
| 5850 | struct wmi_10x_start_scan_cmd *cmd; | |
| 5851 | struct sk_buff *skb; | |
| 5852 | size_t len; | |
| 5853 | int ret; | |
| 5854 | ||
| 5855 | ret = ath10k_wmi_start_scan_verify(arg); | |
| 5856 | if (ret) | |
| 5857 | return ERR_PTR(ret); | |
| 5858 | ||
| 5859 | len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); | |
| 5860 | skb = ath10k_wmi_alloc_skb(ar, len); | |
| 5861 | if (!skb) | |
| 5862 | return ERR_PTR(-ENOMEM); | |
| 5863 | ||
| 5864 | cmd = (struct wmi_10x_start_scan_cmd *)skb->data; | |
| 5865 | ||
| 5866 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); | |
| 5867 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | |
| 5868 | ||
| 5869 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n"); | |
| 5870 | return skb; | |
| 5e3dd157 KV |
5871 | } |
| 5872 | ||
| 5873 | void ath10k_wmi_start_scan_init(struct ath10k *ar, | |
| 5874 | struct wmi_start_scan_arg *arg) | |
| 5875 | { | |
| 5876 | /* setup commonly used values */ | |
| 5877 | arg->scan_req_id = 1; | |
| 5878 | arg->scan_priority = WMI_SCAN_PRIORITY_LOW; | |
| 5879 | arg->dwell_time_active = 50; | |
| 5880 | arg->dwell_time_passive = 150; | |
| 5881 | arg->min_rest_time = 50; | |
| 5882 | arg->max_rest_time = 500; | |
| 5883 | arg->repeat_probe_time = 0; | |
| 5884 | arg->probe_spacing_time = 0; | |
| 5885 | arg->idle_time = 0; | |
| c322892f | 5886 | arg->max_scan_time = 20000; |
| 5e3dd157 KV |
5887 | arg->probe_delay = 5; |
| 5888 | arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | |
| 5889 | | WMI_SCAN_EVENT_COMPLETED | |
| 5890 | | WMI_SCAN_EVENT_BSS_CHANNEL | |
| 5891 | | WMI_SCAN_EVENT_FOREIGN_CHANNEL | |
| 5892 | | WMI_SCAN_EVENT_DEQUEUED; | |
| 5e3dd157 KV |
5893 | arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT; |
| 5894 | arg->n_bssids = 1; | |
| 5895 | arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF"; | |
| 5896 | } | |
| 5897 | ||
| d7579d12 MK |
5898 | static struct sk_buff * |
| 5899 | ath10k_wmi_op_gen_stop_scan(struct ath10k *ar, | |
| 5900 | const struct wmi_stop_scan_arg *arg) | |
| 5e3dd157 KV |
5901 | { |
| 5902 | struct wmi_stop_scan_cmd *cmd; | |
| 5903 | struct sk_buff *skb; | |
| 5904 | u32 scan_id; | |
| 5905 | u32 req_id; | |
| 5906 | ||
| 5907 | if (arg->req_id > 0xFFF) | |
| d7579d12 | 5908 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 5909 | if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF) |
| d7579d12 | 5910 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 5911 | |
| 7aa7a72a | 5912 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5913 | if (!skb) |
| d7579d12 | 5914 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5915 | |
| 5916 | scan_id = arg->u.scan_id; | |
| 5917 | scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX; | |
| 5918 | ||
| 5919 | req_id = arg->req_id; | |
| 5920 | req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; | |
| 5921 | ||
| 5922 | cmd = (struct wmi_stop_scan_cmd *)skb->data; | |
| 5923 | cmd->req_type = __cpu_to_le32(arg->req_type); | |
| 5924 | cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id); | |
| 5925 | cmd->scan_id = __cpu_to_le32(scan_id); | |
| 5926 | cmd->scan_req_id = __cpu_to_le32(req_id); | |
| 5927 | ||
| 7aa7a72a | 5928 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
5929 | "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n", |
| 5930 | arg->req_id, arg->req_type, arg->u.scan_id); | |
| d7579d12 | 5931 | return skb; |
| 5e3dd157 KV |
5932 | } |
| 5933 | ||
| d7579d12 MK |
5934 | static struct sk_buff * |
| 5935 | ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id, | |
| 5936 | enum wmi_vdev_type type, | |
| 5937 | enum wmi_vdev_subtype subtype, | |
| 5938 | const u8 macaddr[ETH_ALEN]) | |
| 5e3dd157 KV |
5939 | { |
| 5940 | struct wmi_vdev_create_cmd *cmd; | |
| 5941 | struct sk_buff *skb; | |
| 5942 | ||
| 7aa7a72a | 5943 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5944 | if (!skb) |
| d7579d12 | 5945 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5946 | |
| 5947 | cmd = (struct wmi_vdev_create_cmd *)skb->data; | |
| 5948 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 5949 | cmd->vdev_type = __cpu_to_le32(type); | |
| 5950 | cmd->vdev_subtype = __cpu_to_le32(subtype); | |
| b25f32cb | 5951 | ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); |
| 5e3dd157 | 5952 | |
| 7aa7a72a | 5953 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
5954 | "WMI vdev create: id %d type %d subtype %d macaddr %pM\n", |
| 5955 | vdev_id, type, subtype, macaddr); | |
| d7579d12 | 5956 | return skb; |
| 5e3dd157 KV |
5957 | } |
| 5958 | ||
| d7579d12 MK |
5959 | static struct sk_buff * |
| 5960 | ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id) | |
| 5e3dd157 KV |
5961 | { |
| 5962 | struct wmi_vdev_delete_cmd *cmd; | |
| 5963 | struct sk_buff *skb; | |
| 5964 | ||
| 7aa7a72a | 5965 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5966 | if (!skb) |
| d7579d12 | 5967 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
5968 | |
| 5969 | cmd = (struct wmi_vdev_delete_cmd *)skb->data; | |
| 5970 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 5971 | ||
| 7aa7a72a | 5972 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 | 5973 | "WMI vdev delete id %d\n", vdev_id); |
| d7579d12 | 5974 | return skb; |
| 5e3dd157 KV |
5975 | } |
| 5976 | ||
| d7579d12 MK |
5977 | static struct sk_buff * |
| 5978 | ath10k_wmi_op_gen_vdev_start(struct ath10k *ar, | |
| 5979 | const struct wmi_vdev_start_request_arg *arg, | |
| 5980 | bool restart) | |
| 5e3dd157 KV |
5981 | { |
| 5982 | struct wmi_vdev_start_request_cmd *cmd; | |
| 5983 | struct sk_buff *skb; | |
| 5984 | const char *cmdname; | |
| 5985 | u32 flags = 0; | |
| 5986 | ||
| 5e3dd157 | 5987 | if (WARN_ON(arg->hidden_ssid && !arg->ssid)) |
| d7579d12 | 5988 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 5989 | if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) |
| d7579d12 | 5990 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 5991 | |
| d7579d12 | 5992 | if (restart) |
| 5e3dd157 KV |
5993 | cmdname = "restart"; |
| 5994 | else | |
| d7579d12 | 5995 | cmdname = "start"; |
| 5e3dd157 | 5996 | |
| 7aa7a72a | 5997 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 5998 | if (!skb) |
| d7579d12 | 5999 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6000 | |
| 6001 | if (arg->hidden_ssid) | |
| 6002 | flags |= WMI_VDEV_START_HIDDEN_SSID; | |
| 6003 | if (arg->pmf_enabled) | |
| 6004 | flags |= WMI_VDEV_START_PMF_ENABLED; | |
| 6005 | ||
| 6006 | cmd = (struct wmi_vdev_start_request_cmd *)skb->data; | |
| 6007 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
| 6008 | cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack); | |
| 6009 | cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval); | |
| 6010 | cmd->dtim_period = __cpu_to_le32(arg->dtim_period); | |
| 6011 | cmd->flags = __cpu_to_le32(flags); | |
| 6012 | cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate); | |
| 6013 | cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power); | |
| 6014 | ||
| 6015 | if (arg->ssid) { | |
| 6016 | cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len); | |
| 6017 | memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); | |
| 6018 | } | |
| 6019 | ||
| 2d66721c | 6020 | ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel); |
| 5e3dd157 | 6021 | |
| 7aa7a72a | 6022 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 8cc7f26c KV |
6023 | "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n", |
| 6024 | cmdname, arg->vdev_id, | |
| e8a50f8b MP |
6025 | flags, arg->channel.freq, arg->channel.mode, |
| 6026 | cmd->chan.flags, arg->channel.max_power); | |
| 5e3dd157 | 6027 | |
| d7579d12 | 6028 | return skb; |
| 5e3dd157 KV |
6029 | } |
| 6030 | ||
| d7579d12 MK |
6031 | static struct sk_buff * |
| 6032 | ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id) | |
| 5e3dd157 KV |
6033 | { |
| 6034 | struct wmi_vdev_stop_cmd *cmd; | |
| 6035 | struct sk_buff *skb; | |
| 6036 | ||
| 7aa7a72a | 6037 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6038 | if (!skb) |
| d7579d12 | 6039 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6040 | |
| 6041 | cmd = (struct wmi_vdev_stop_cmd *)skb->data; | |
| 6042 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6043 | ||
| 7aa7a72a | 6044 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id); |
| d7579d12 | 6045 | return skb; |
| 5e3dd157 KV |
6046 | } |
| 6047 | ||
| d7579d12 MK |
6048 | static struct sk_buff * |
| 6049 | ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, | |
| 6050 | const u8 *bssid) | |
| 5e3dd157 KV |
6051 | { |
| 6052 | struct wmi_vdev_up_cmd *cmd; | |
| 6053 | struct sk_buff *skb; | |
| 6054 | ||
| 7aa7a72a | 6055 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6056 | if (!skb) |
| d7579d12 | 6057 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6058 | |
| 6059 | cmd = (struct wmi_vdev_up_cmd *)skb->data; | |
| 6060 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6061 | cmd->vdev_assoc_id = __cpu_to_le32(aid); | |
| b25f32cb | 6062 | ether_addr_copy(cmd->vdev_bssid.addr, bssid); |
| 5e3dd157 | 6063 | |
| 7aa7a72a | 6064 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6065 | "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n", |
| 6066 | vdev_id, aid, bssid); | |
| d7579d12 | 6067 | return skb; |
| 5e3dd157 KV |
6068 | } |
| 6069 | ||
| d7579d12 MK |
6070 | static struct sk_buff * |
| 6071 | ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id) | |
| 5e3dd157 KV |
6072 | { |
| 6073 | struct wmi_vdev_down_cmd *cmd; | |
| 6074 | struct sk_buff *skb; | |
| 6075 | ||
| 7aa7a72a | 6076 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6077 | if (!skb) |
| d7579d12 | 6078 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6079 | |
| 6080 | cmd = (struct wmi_vdev_down_cmd *)skb->data; | |
| 6081 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6082 | ||
| 7aa7a72a | 6083 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 | 6084 | "wmi mgmt vdev down id 0x%x\n", vdev_id); |
| d7579d12 | 6085 | return skb; |
| 5e3dd157 KV |
6086 | } |
| 6087 | ||
| d7579d12 MK |
6088 | static struct sk_buff * |
| 6089 | ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id, | |
| 6090 | u32 param_id, u32 param_value) | |
| 5e3dd157 KV |
6091 | { |
| 6092 | struct wmi_vdev_set_param_cmd *cmd; | |
| 6093 | struct sk_buff *skb; | |
| 6094 | ||
| 6d1506e7 | 6095 | if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) { |
| 7aa7a72a | 6096 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 6d1506e7 BM |
6097 | "vdev param %d not supported by firmware\n", |
| 6098 | param_id); | |
| d7579d12 | 6099 | return ERR_PTR(-EOPNOTSUPP); |
| 6d1506e7 BM |
6100 | } |
| 6101 | ||
| 7aa7a72a | 6102 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6103 | if (!skb) |
| d7579d12 | 6104 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6105 | |
| 6106 | cmd = (struct wmi_vdev_set_param_cmd *)skb->data; | |
| 6107 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6108 | cmd->param_id = __cpu_to_le32(param_id); | |
| 6109 | cmd->param_value = __cpu_to_le32(param_value); | |
| 6110 | ||
| 7aa7a72a | 6111 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6112 | "wmi vdev id 0x%x set param %d value %d\n", |
| 6113 | vdev_id, param_id, param_value); | |
| d7579d12 | 6114 | return skb; |
| 5e3dd157 KV |
6115 | } |
| 6116 | ||
| d7579d12 MK |
6117 | static struct sk_buff * |
| 6118 | ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar, | |
| 6119 | const struct wmi_vdev_install_key_arg *arg) | |
| 5e3dd157 KV |
6120 | { |
| 6121 | struct wmi_vdev_install_key_cmd *cmd; | |
| 6122 | struct sk_buff *skb; | |
| 6123 | ||
| 6124 | if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL) | |
| d7579d12 | 6125 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 6126 | if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL) |
| d7579d12 | 6127 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 6128 | |
| 7aa7a72a | 6129 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len); |
| 5e3dd157 | 6130 | if (!skb) |
| d7579d12 | 6131 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6132 | |
| 6133 | cmd = (struct wmi_vdev_install_key_cmd *)skb->data; | |
| 6134 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
| 6135 | cmd->key_idx = __cpu_to_le32(arg->key_idx); | |
| 6136 | cmd->key_flags = __cpu_to_le32(arg->key_flags); | |
| 6137 | cmd->key_cipher = __cpu_to_le32(arg->key_cipher); | |
| 6138 | cmd->key_len = __cpu_to_le32(arg->key_len); | |
| 6139 | cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len); | |
| 6140 | cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len); | |
| 6141 | ||
| 6142 | if (arg->macaddr) | |
| b25f32cb | 6143 | ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); |
| 5e3dd157 KV |
6144 | if (arg->key_data) |
| 6145 | memcpy(cmd->key_data, arg->key_data, arg->key_len); | |
| 6146 | ||
| 7aa7a72a | 6147 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| e0c508ab MK |
6148 | "wmi vdev install key idx %d cipher %d len %d\n", |
| 6149 | arg->key_idx, arg->key_cipher, arg->key_len); | |
| d7579d12 | 6150 | return skb; |
| 5e3dd157 KV |
6151 | } |
| 6152 | ||
| d7579d12 MK |
6153 | static struct sk_buff * |
| 6154 | ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar, | |
| 6155 | const struct wmi_vdev_spectral_conf_arg *arg) | |
| 855aed12 SW |
6156 | { |
| 6157 | struct wmi_vdev_spectral_conf_cmd *cmd; | |
| 6158 | struct sk_buff *skb; | |
| 855aed12 | 6159 | |
| 7aa7a72a | 6160 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 855aed12 | 6161 | if (!skb) |
| d7579d12 | 6162 | return ERR_PTR(-ENOMEM); |
| 855aed12 SW |
6163 | |
| 6164 | cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data; | |
| 6165 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
| 6166 | cmd->scan_count = __cpu_to_le32(arg->scan_count); | |
| 6167 | cmd->scan_period = __cpu_to_le32(arg->scan_period); | |
| 6168 | cmd->scan_priority = __cpu_to_le32(arg->scan_priority); | |
| 6169 | cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size); | |
| 6170 | cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena); | |
| 6171 | cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena); | |
| 6172 | cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref); | |
| 6173 | cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay); | |
| 6174 | cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr); | |
| 6175 | cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr); | |
| 6176 | cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode); | |
| 6177 | cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode); | |
| 6178 | cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr); | |
| 6179 | cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format); | |
| 6180 | cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode); | |
| 6181 | cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale); | |
| 6182 | cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj); | |
| 6183 | cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask); | |
| 6184 | ||
| d7579d12 | 6185 | return skb; |
| 855aed12 SW |
6186 | } |
| 6187 | ||
| d7579d12 MK |
6188 | static struct sk_buff * |
| 6189 | ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, | |
| 6190 | u32 trigger, u32 enable) | |
| 855aed12 SW |
6191 | { |
| 6192 | struct wmi_vdev_spectral_enable_cmd *cmd; | |
| 6193 | struct sk_buff *skb; | |
| 855aed12 | 6194 | |
| 7aa7a72a | 6195 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 855aed12 | 6196 | if (!skb) |
| d7579d12 | 6197 | return ERR_PTR(-ENOMEM); |
| 855aed12 SW |
6198 | |
| 6199 | cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data; | |
| 6200 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6201 | cmd->trigger_cmd = __cpu_to_le32(trigger); | |
| 6202 | cmd->enable_cmd = __cpu_to_le32(enable); | |
| 6203 | ||
| d7579d12 | 6204 | return skb; |
| 855aed12 SW |
6205 | } |
| 6206 | ||
| d7579d12 MK |
6207 | static struct sk_buff * |
| 6208 | ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id, | |
| 7390ed34 MP |
6209 | const u8 peer_addr[ETH_ALEN], |
| 6210 | enum wmi_peer_type peer_type) | |
| 5e3dd157 KV |
6211 | { |
| 6212 | struct wmi_peer_create_cmd *cmd; | |
| 6213 | struct sk_buff *skb; | |
| 6214 | ||
| 7aa7a72a | 6215 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6216 | if (!skb) |
| d7579d12 | 6217 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6218 | |
| 6219 | cmd = (struct wmi_peer_create_cmd *)skb->data; | |
| 6220 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| b25f32cb | 6221 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
| 5e3dd157 | 6222 | |
| 7aa7a72a | 6223 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6224 | "wmi peer create vdev_id %d peer_addr %pM\n", |
| 6225 | vdev_id, peer_addr); | |
| d7579d12 | 6226 | return skb; |
| 5e3dd157 KV |
6227 | } |
| 6228 | ||
| d7579d12 MK |
6229 | static struct sk_buff * |
| 6230 | ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id, | |
| 6231 | const u8 peer_addr[ETH_ALEN]) | |
| 5e3dd157 KV |
6232 | { |
| 6233 | struct wmi_peer_delete_cmd *cmd; | |
| 6234 | struct sk_buff *skb; | |
| 6235 | ||
| 7aa7a72a | 6236 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6237 | if (!skb) |
| d7579d12 | 6238 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6239 | |
| 6240 | cmd = (struct wmi_peer_delete_cmd *)skb->data; | |
| 6241 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| b25f32cb | 6242 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
| 5e3dd157 | 6243 | |
| 7aa7a72a | 6244 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6245 | "wmi peer delete vdev_id %d peer_addr %pM\n", |
| 6246 | vdev_id, peer_addr); | |
| d7579d12 | 6247 | return skb; |
| 5e3dd157 KV |
6248 | } |
| 6249 | ||
| d7579d12 MK |
6250 | static struct sk_buff * |
| 6251 | ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id, | |
| 6252 | const u8 peer_addr[ETH_ALEN], u32 tid_bitmap) | |
| 5e3dd157 KV |
6253 | { |
| 6254 | struct wmi_peer_flush_tids_cmd *cmd; | |
| 6255 | struct sk_buff *skb; | |
| 6256 | ||
| 7aa7a72a | 6257 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6258 | if (!skb) |
| d7579d12 | 6259 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6260 | |
| 6261 | cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; | |
| 6262 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6263 | cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap); | |
| b25f32cb | 6264 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
| 5e3dd157 | 6265 | |
| 7aa7a72a | 6266 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6267 | "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n", |
| 6268 | vdev_id, peer_addr, tid_bitmap); | |
| d7579d12 | 6269 | return skb; |
| 5e3dd157 KV |
6270 | } |
| 6271 | ||
| d7579d12 MK |
6272 | static struct sk_buff * |
| 6273 | ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id, | |
| 6274 | const u8 *peer_addr, | |
| 6275 | enum wmi_peer_param param_id, | |
| 6276 | u32 param_value) | |
| 5e3dd157 KV |
6277 | { |
| 6278 | struct wmi_peer_set_param_cmd *cmd; | |
| 6279 | struct sk_buff *skb; | |
| 6280 | ||
| 7aa7a72a | 6281 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6282 | if (!skb) |
| d7579d12 | 6283 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6284 | |
| 6285 | cmd = (struct wmi_peer_set_param_cmd *)skb->data; | |
| 6286 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6287 | cmd->param_id = __cpu_to_le32(param_id); | |
| 6288 | cmd->param_value = __cpu_to_le32(param_value); | |
| b25f32cb | 6289 | ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); |
| 5e3dd157 | 6290 | |
| 7aa7a72a | 6291 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6292 | "wmi vdev %d peer 0x%pM set param %d value %d\n", |
| 6293 | vdev_id, peer_addr, param_id, param_value); | |
| d7579d12 | 6294 | return skb; |
| 5e3dd157 KV |
6295 | } |
| 6296 | ||
| d7579d12 MK |
6297 | static struct sk_buff * |
| 6298 | ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id, | |
| 6299 | enum wmi_sta_ps_mode psmode) | |
| 5e3dd157 KV |
6300 | { |
| 6301 | struct wmi_sta_powersave_mode_cmd *cmd; | |
| 6302 | struct sk_buff *skb; | |
| 6303 | ||
| 7aa7a72a | 6304 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6305 | if (!skb) |
| d7579d12 | 6306 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6307 | |
| 6308 | cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data; | |
| 6309 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6310 | cmd->sta_ps_mode = __cpu_to_le32(psmode); | |
| 6311 | ||
| 7aa7a72a | 6312 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6313 | "wmi set powersave id 0x%x mode %d\n", |
| 6314 | vdev_id, psmode); | |
| d7579d12 | 6315 | return skb; |
| 5e3dd157 KV |
6316 | } |
| 6317 | ||
| d7579d12 MK |
6318 | static struct sk_buff * |
| 6319 | ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id, | |
| 6320 | enum wmi_sta_powersave_param param_id, | |
| 6321 | u32 value) | |
| 5e3dd157 KV |
6322 | { |
| 6323 | struct wmi_sta_powersave_param_cmd *cmd; | |
| 6324 | struct sk_buff *skb; | |
| 6325 | ||
| 7aa7a72a | 6326 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6327 | if (!skb) |
| d7579d12 | 6328 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6329 | |
| 6330 | cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; | |
| 6331 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6332 | cmd->param_id = __cpu_to_le32(param_id); | |
| 6333 | cmd->param_value = __cpu_to_le32(value); | |
| 6334 | ||
| 7aa7a72a | 6335 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6336 | "wmi sta ps param vdev_id 0x%x param %d value %d\n", |
| 6337 | vdev_id, param_id, value); | |
| d7579d12 | 6338 | return skb; |
| 5e3dd157 KV |
6339 | } |
| 6340 | ||
| d7579d12 MK |
6341 | static struct sk_buff * |
| 6342 | ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
| 6343 | enum wmi_ap_ps_peer_param param_id, u32 value) | |
| 5e3dd157 KV |
6344 | { |
| 6345 | struct wmi_ap_ps_peer_cmd *cmd; | |
| 6346 | struct sk_buff *skb; | |
| 6347 | ||
| 6348 | if (!mac) | |
| d7579d12 | 6349 | return ERR_PTR(-EINVAL); |
| 5e3dd157 | 6350 | |
| 7aa7a72a | 6351 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6352 | if (!skb) |
| d7579d12 | 6353 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6354 | |
| 6355 | cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; | |
| 6356 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6357 | cmd->param_id = __cpu_to_le32(param_id); | |
| 6358 | cmd->param_value = __cpu_to_le32(value); | |
| b25f32cb | 6359 | ether_addr_copy(cmd->peer_macaddr.addr, mac); |
| 5e3dd157 | 6360 | |
| 7aa7a72a | 6361 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 5e3dd157 KV |
6362 | "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n", |
| 6363 | vdev_id, param_id, value, mac); | |
| d7579d12 | 6364 | return skb; |
| 5e3dd157 KV |
6365 | } |
| 6366 | ||
| d7579d12 MK |
6367 | static struct sk_buff * |
| 6368 | ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar, | |
| 6369 | const struct wmi_scan_chan_list_arg *arg) | |
| 5e3dd157 KV |
6370 | { |
| 6371 | struct wmi_scan_chan_list_cmd *cmd; | |
| 6372 | struct sk_buff *skb; | |
| 6373 | struct wmi_channel_arg *ch; | |
| 6374 | struct wmi_channel *ci; | |
| 6375 | int len; | |
| 6376 | int i; | |
| 6377 | ||
| 6378 | len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel); | |
| 6379 | ||
| 7aa7a72a | 6380 | skb = ath10k_wmi_alloc_skb(ar, len); |
| 5e3dd157 | 6381 | if (!skb) |
| d7579d12 | 6382 | return ERR_PTR(-EINVAL); |
| 5e3dd157 KV |
6383 | |
| 6384 | cmd = (struct wmi_scan_chan_list_cmd *)skb->data; | |
| 6385 | cmd->num_scan_chans = __cpu_to_le32(arg->n_channels); | |
| 6386 | ||
| 6387 | for (i = 0; i < arg->n_channels; i++) { | |
| 5e3dd157 KV |
6388 | ch = &arg->channels[i]; |
| 6389 | ci = &cmd->chan_info[i]; | |
| 6390 | ||
| 2d66721c | 6391 | ath10k_wmi_put_wmi_channel(ci, ch); |
| 5e3dd157 KV |
6392 | } |
| 6393 | ||
| d7579d12 | 6394 | return skb; |
| 5e3dd157 KV |
6395 | } |
| 6396 | ||
| 24c88f78 MK |
6397 | static void |
| 6398 | ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf, | |
| 6399 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 5e3dd157 | 6400 | { |
| 24c88f78 | 6401 | struct wmi_common_peer_assoc_complete_cmd *cmd = buf; |
| 5e3dd157 | 6402 | |
| 5e3dd157 KV |
6403 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); |
| 6404 | cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1); | |
| 6405 | cmd->peer_associd = __cpu_to_le32(arg->peer_aid); | |
| 6406 | cmd->peer_flags = __cpu_to_le32(arg->peer_flags); | |
| 6407 | cmd->peer_caps = __cpu_to_le32(arg->peer_caps); | |
| 6408 | cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval); | |
| 6409 | cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps); | |
| 6410 | cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu); | |
| 6411 | cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density); | |
| 6412 | cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps); | |
| 6413 | cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams); | |
| 6414 | cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps); | |
| 6415 | cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode); | |
| 6416 | ||
| b25f32cb | 6417 | ether_addr_copy(cmd->peer_macaddr.addr, arg->addr); |
| 5e3dd157 KV |
6418 | |
| 6419 | cmd->peer_legacy_rates.num_rates = | |
| 6420 | __cpu_to_le32(arg->peer_legacy_rates.num_rates); | |
| 6421 | memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates, | |
| 6422 | arg->peer_legacy_rates.num_rates); | |
| 6423 | ||
| 6424 | cmd->peer_ht_rates.num_rates = | |
| 6425 | __cpu_to_le32(arg->peer_ht_rates.num_rates); | |
| 6426 | memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates, | |
| 6427 | arg->peer_ht_rates.num_rates); | |
| 6428 | ||
| 6429 | cmd->peer_vht_rates.rx_max_rate = | |
| 6430 | __cpu_to_le32(arg->peer_vht_rates.rx_max_rate); | |
| 6431 | cmd->peer_vht_rates.rx_mcs_set = | |
| 6432 | __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set); | |
| 6433 | cmd->peer_vht_rates.tx_max_rate = | |
| 6434 | __cpu_to_le32(arg->peer_vht_rates.tx_max_rate); | |
| 6435 | cmd->peer_vht_rates.tx_mcs_set = | |
| 6436 | __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set); | |
| 24c88f78 MK |
6437 | } |
| 6438 | ||
| 6439 | static void | |
| 6440 | ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf, | |
| 6441 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6442 | { | |
| 6443 | struct wmi_main_peer_assoc_complete_cmd *cmd = buf; | |
| 6444 | ||
| 6445 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
| 6446 | memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info)); | |
| 6447 | } | |
| 6448 | ||
| 6449 | static void | |
| 6450 | ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf, | |
| 6451 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6452 | { | |
| 6453 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
| 6454 | } | |
| 6455 | ||
| 6456 | static void | |
| 6457 | ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf, | |
| 6458 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6459 | { | |
| 6460 | struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf; | |
| 6461 | int max_mcs, max_nss; | |
| 6462 | u32 info0; | |
| 6463 | ||
| 6464 | /* TODO: Is using max values okay with firmware? */ | |
| 6465 | max_mcs = 0xf; | |
| 6466 | max_nss = 0xf; | |
| 6467 | ||
| 6468 | info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) | | |
| 6469 | SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS); | |
| 6470 | ||
| 6471 | ath10k_wmi_peer_assoc_fill(ar, buf, arg); | |
| 6472 | cmd->info0 = __cpu_to_le32(info0); | |
| 6473 | } | |
| 6474 | ||
| b54e16f1 VT |
6475 | static void |
| 6476 | ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf, | |
| 6477 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6478 | { | |
| 6479 | struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf; | |
| 6480 | ||
| 6481 | ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg); | |
| 6482 | cmd->peer_bw_rxnss_override = 0; | |
| 6483 | } | |
| 6484 | ||
| d7579d12 MK |
6485 | static int |
| 6486 | ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg) | |
| 24c88f78 | 6487 | { |
| 24c88f78 MK |
6488 | if (arg->peer_mpdu_density > 16) |
| 6489 | return -EINVAL; | |
| 6490 | if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES) | |
| 6491 | return -EINVAL; | |
| 6492 | if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES) | |
| 6493 | return -EINVAL; | |
| 6494 | ||
| d7579d12 MK |
6495 | return 0; |
| 6496 | } | |
| 6497 | ||
| 6498 | static struct sk_buff * | |
| 6499 | ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar, | |
| 6500 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6501 | { | |
| 6502 | size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd); | |
| 6503 | struct sk_buff *skb; | |
| 6504 | int ret; | |
| 6505 | ||
| 6506 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
| 6507 | if (ret) | |
| 6508 | return ERR_PTR(ret); | |
| 24c88f78 | 6509 | |
| 7aa7a72a | 6510 | skb = ath10k_wmi_alloc_skb(ar, len); |
| 24c88f78 | 6511 | if (!skb) |
| d7579d12 | 6512 | return ERR_PTR(-ENOMEM); |
| 24c88f78 | 6513 | |
| d7579d12 MK |
6514 | ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg); |
| 6515 | ||
| 6516 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6517 | "wmi peer assoc vdev %d addr %pM (%s)\n", | |
| 6518 | arg->vdev_id, arg->addr, | |
| 6519 | arg->peer_reassoc ? "reassociate" : "new"); | |
| 6520 | return skb; | |
| 6521 | } | |
| 6522 | ||
| 6523 | static struct sk_buff * | |
| 6524 | ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar, | |
| 6525 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6526 | { | |
| 6527 | size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd); | |
| 6528 | struct sk_buff *skb; | |
| 6529 | int ret; | |
| 6530 | ||
| 6531 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
| 6532 | if (ret) | |
| 6533 | return ERR_PTR(ret); | |
| 6534 | ||
| 6535 | skb = ath10k_wmi_alloc_skb(ar, len); | |
| 6536 | if (!skb) | |
| 6537 | return ERR_PTR(-ENOMEM); | |
| 6538 | ||
| 6539 | ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg); | |
| 6540 | ||
| 6541 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6542 | "wmi peer assoc vdev %d addr %pM (%s)\n", | |
| 6543 | arg->vdev_id, arg->addr, | |
| 6544 | arg->peer_reassoc ? "reassociate" : "new"); | |
| 6545 | return skb; | |
| 6546 | } | |
| 6547 | ||
| 6548 | static struct sk_buff * | |
| 6549 | ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar, | |
| 6550 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6551 | { | |
| 6552 | size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd); | |
| 6553 | struct sk_buff *skb; | |
| 6554 | int ret; | |
| 6555 | ||
| 6556 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
| 6557 | if (ret) | |
| 6558 | return ERR_PTR(ret); | |
| 6559 | ||
| 6560 | skb = ath10k_wmi_alloc_skb(ar, len); | |
| 6561 | if (!skb) | |
| 6562 | return ERR_PTR(-ENOMEM); | |
| 6563 | ||
| 6564 | ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg); | |
| 5e3dd157 | 6565 | |
| 7aa7a72a | 6566 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| 44d6fa90 CYY |
6567 | "wmi peer assoc vdev %d addr %pM (%s)\n", |
| 6568 | arg->vdev_id, arg->addr, | |
| 6569 | arg->peer_reassoc ? "reassociate" : "new"); | |
| d7579d12 | 6570 | return skb; |
| 5e3dd157 KV |
6571 | } |
| 6572 | ||
| b54e16f1 VT |
6573 | static struct sk_buff * |
| 6574 | ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar, | |
| 6575 | const struct wmi_peer_assoc_complete_arg *arg) | |
| 6576 | { | |
| 6577 | size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd); | |
| 6578 | struct sk_buff *skb; | |
| 6579 | int ret; | |
| 6580 | ||
| 6581 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | |
| 6582 | if (ret) | |
| 6583 | return ERR_PTR(ret); | |
| 6584 | ||
| 6585 | skb = ath10k_wmi_alloc_skb(ar, len); | |
| 6586 | if (!skb) | |
| 6587 | return ERR_PTR(-ENOMEM); | |
| 6588 | ||
| 6589 | ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg); | |
| 6590 | ||
| 6591 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6592 | "wmi peer assoc vdev %d addr %pM (%s)\n", | |
| 6593 | arg->vdev_id, arg->addr, | |
| 6594 | arg->peer_reassoc ? "reassociate" : "new"); | |
| 6595 | return skb; | |
| 6596 | } | |
| 6597 | ||
| a57a6a27 RM |
6598 | static struct sk_buff * |
| 6599 | ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar) | |
| 6600 | { | |
| 6601 | struct sk_buff *skb; | |
| 6602 | ||
| 6603 | skb = ath10k_wmi_alloc_skb(ar, 0); | |
| 6604 | if (!skb) | |
| 6605 | return ERR_PTR(-ENOMEM); | |
| 6606 | ||
| 6607 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n"); | |
| 6608 | return skb; | |
| 6609 | } | |
| 6610 | ||
| 748afc47 | 6611 | /* This function assumes the beacon is already DMA mapped */ |
| d7579d12 | 6612 | static struct sk_buff * |
| 9ad50182 MK |
6613 | ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn, |
| 6614 | size_t bcn_len, u32 bcn_paddr, bool dtim_zero, | |
| 6615 | bool deliver_cab) | |
| 5e3dd157 | 6616 | { |
| 748afc47 | 6617 | struct wmi_bcn_tx_ref_cmd *cmd; |
| 5e3dd157 | 6618 | struct sk_buff *skb; |
| 748afc47 | 6619 | struct ieee80211_hdr *hdr; |
| 748afc47 | 6620 | u16 fc; |
| 5e3dd157 | 6621 | |
| 7aa7a72a | 6622 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6623 | if (!skb) |
| d7579d12 | 6624 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 | 6625 | |
| 9ad50182 | 6626 | hdr = (struct ieee80211_hdr *)bcn; |
| 748afc47 MK |
6627 | fc = le16_to_cpu(hdr->frame_control); |
| 6628 | ||
| 6629 | cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data; | |
| 9ad50182 MK |
6630 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
| 6631 | cmd->data_len = __cpu_to_le32(bcn_len); | |
| 6632 | cmd->data_ptr = __cpu_to_le32(bcn_paddr); | |
| 748afc47 MK |
6633 | cmd->msdu_id = 0; |
| 6634 | cmd->frame_control = __cpu_to_le32(fc); | |
| 6635 | cmd->flags = 0; | |
| 24c88f78 | 6636 | cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA); |
| 748afc47 | 6637 | |
| 9ad50182 | 6638 | if (dtim_zero) |
| 748afc47 MK |
6639 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO); |
| 6640 | ||
| 9ad50182 | 6641 | if (deliver_cab) |
| 748afc47 MK |
6642 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB); |
| 6643 | ||
| d7579d12 | 6644 | return skb; |
| 5e3dd157 KV |
6645 | } |
| 6646 | ||
| 5e752e42 MK |
6647 | void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params, |
| 6648 | const struct wmi_wmm_params_arg *arg) | |
| 5e3dd157 KV |
6649 | { |
| 6650 | params->cwmin = __cpu_to_le32(arg->cwmin); | |
| 6651 | params->cwmax = __cpu_to_le32(arg->cwmax); | |
| 6652 | params->aifs = __cpu_to_le32(arg->aifs); | |
| 6653 | params->txop = __cpu_to_le32(arg->txop); | |
| 6654 | params->acm = __cpu_to_le32(arg->acm); | |
| 6655 | params->no_ack = __cpu_to_le32(arg->no_ack); | |
| 6656 | } | |
| 6657 | ||
| d7579d12 MK |
6658 | static struct sk_buff * |
| 6659 | ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar, | |
| 5e752e42 | 6660 | const struct wmi_wmm_params_all_arg *arg) |
| 5e3dd157 KV |
6661 | { |
| 6662 | struct wmi_pdev_set_wmm_params *cmd; | |
| 6663 | struct sk_buff *skb; | |
| 6664 | ||
| 7aa7a72a | 6665 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6666 | if (!skb) |
| d7579d12 | 6667 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6668 | |
| 6669 | cmd = (struct wmi_pdev_set_wmm_params *)skb->data; | |
| 5e752e42 MK |
6670 | ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be); |
| 6671 | ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk); | |
| 6672 | ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi); | |
| 6673 | ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo); | |
| 5e3dd157 | 6674 | |
| 7aa7a72a | 6675 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n"); |
| d7579d12 | 6676 | return skb; |
| 5e3dd157 KV |
6677 | } |
| 6678 | ||
| d7579d12 | 6679 | static struct sk_buff * |
| de23d3ef | 6680 | ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask) |
| 5e3dd157 KV |
6681 | { |
| 6682 | struct wmi_request_stats_cmd *cmd; | |
| 6683 | struct sk_buff *skb; | |
| 6684 | ||
| 7aa7a72a | 6685 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 5e3dd157 | 6686 | if (!skb) |
| d7579d12 | 6687 | return ERR_PTR(-ENOMEM); |
| 5e3dd157 KV |
6688 | |
| 6689 | cmd = (struct wmi_request_stats_cmd *)skb->data; | |
| de23d3ef | 6690 | cmd->stats_id = __cpu_to_le32(stats_mask); |
| 5e3dd157 | 6691 | |
| de23d3ef MK |
6692 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n", |
| 6693 | stats_mask); | |
| d7579d12 | 6694 | return skb; |
| 5e3dd157 | 6695 | } |
| 9cfbce75 | 6696 | |
| d7579d12 MK |
6697 | static struct sk_buff * |
| 6698 | ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar, | |
| 6699 | enum wmi_force_fw_hang_type type, u32 delay_ms) | |
| 9cfbce75 MK |
6700 | { |
| 6701 | struct wmi_force_fw_hang_cmd *cmd; | |
| 6702 | struct sk_buff *skb; | |
| 6703 | ||
| 7aa7a72a | 6704 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| 9cfbce75 | 6705 | if (!skb) |
| d7579d12 | 6706 | return ERR_PTR(-ENOMEM); |
| 9cfbce75 MK |
6707 | |
| 6708 | cmd = (struct wmi_force_fw_hang_cmd *)skb->data; | |
| 6709 | cmd->type = __cpu_to_le32(type); | |
| 6710 | cmd->delay_ms = __cpu_to_le32(delay_ms); | |
| 6711 | ||
| 7aa7a72a | 6712 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n", |
| 9cfbce75 | 6713 | type, delay_ms); |
| d7579d12 | 6714 | return skb; |
| 9cfbce75 | 6715 | } |
| f118a3e5 | 6716 | |
| d7579d12 | 6717 | static struct sk_buff * |
| 467210a6 SJ |
6718 | ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable, |
| 6719 | u32 log_level) | |
| f118a3e5 KV |
6720 | { |
| 6721 | struct wmi_dbglog_cfg_cmd *cmd; | |
| 6722 | struct sk_buff *skb; | |
| 6723 | u32 cfg; | |
| 6724 | ||
| 7aa7a72a | 6725 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
| f118a3e5 | 6726 | if (!skb) |
| d7579d12 | 6727 | return ERR_PTR(-ENOMEM); |
| f118a3e5 KV |
6728 | |
| 6729 | cmd = (struct wmi_dbglog_cfg_cmd *)skb->data; | |
| 6730 | ||
| 6731 | if (module_enable) { | |
| 467210a6 | 6732 | cfg = SM(log_level, |
| f118a3e5 KV |
6733 | ATH10K_DBGLOG_CFG_LOG_LVL); |
| 6734 | } else { | |
| 6735 | /* set back defaults, all modules with WARN level */ | |
| 6736 | cfg = SM(ATH10K_DBGLOG_LEVEL_WARN, | |
| 6737 | ATH10K_DBGLOG_CFG_LOG_LVL); | |
| 6738 | module_enable = ~0; | |
| 6739 | } | |
| 6740 | ||
| 6741 | cmd->module_enable = __cpu_to_le32(module_enable); | |
| 6742 | cmd->module_valid = __cpu_to_le32(~0); | |
| 6743 | cmd->config_enable = __cpu_to_le32(cfg); | |
| 6744 | cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK); | |
| 6745 | ||
| 7aa7a72a | 6746 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
| f118a3e5 KV |
6747 | "wmi dbglog cfg modules %08x %08x config %08x %08x\n", |
| 6748 | __le32_to_cpu(cmd->module_enable), | |
| 6749 | __le32_to_cpu(cmd->module_valid), | |
| 6750 | __le32_to_cpu(cmd->config_enable), | |
| 6751 | __le32_to_cpu(cmd->config_valid)); | |
| d7579d12 | 6752 | return skb; |
| f118a3e5 | 6753 | } |
| b79b9baa | 6754 | |
| d7579d12 MK |
6755 | static struct sk_buff * |
| 6756 | ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap) | |
| 90174455 RM |
6757 | { |
| 6758 | struct wmi_pdev_pktlog_enable_cmd *cmd; | |
| 6759 | struct sk_buff *skb; | |
| 6760 | ||
| 6761 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6762 | if (!skb) | |
| d7579d12 | 6763 | return ERR_PTR(-ENOMEM); |
| 90174455 RM |
6764 | |
| 6765 | ev_bitmap &= ATH10K_PKTLOG_ANY; | |
| 90174455 RM |
6766 | |
| 6767 | cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data; | |
| 6768 | cmd->ev_bitmap = __cpu_to_le32(ev_bitmap); | |
| d7579d12 MK |
6769 | |
| 6770 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n", | |
| 6771 | ev_bitmap); | |
| 6772 | return skb; | |
| 90174455 RM |
6773 | } |
| 6774 | ||
| d7579d12 MK |
6775 | static struct sk_buff * |
| 6776 | ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar) | |
| 90174455 RM |
6777 | { |
| 6778 | struct sk_buff *skb; | |
| 6779 | ||
| 6780 | skb = ath10k_wmi_alloc_skb(ar, 0); | |
| 6781 | if (!skb) | |
| d7579d12 | 6782 | return ERR_PTR(-ENOMEM); |
| 90174455 RM |
6783 | |
| 6784 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n"); | |
| d7579d12 | 6785 | return skb; |
| 90174455 RM |
6786 | } |
| 6787 | ||
| ffdd738d RM |
6788 | static struct sk_buff * |
| 6789 | ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period, | |
| 6790 | u32 duration, u32 next_offset, | |
| 6791 | u32 enabled) | |
| 6792 | { | |
| 6793 | struct wmi_pdev_set_quiet_cmd *cmd; | |
| 6794 | struct sk_buff *skb; | |
| 6795 | ||
| 6796 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6797 | if (!skb) | |
| 6798 | return ERR_PTR(-ENOMEM); | |
| 6799 | ||
| 6800 | cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data; | |
| 6801 | cmd->period = __cpu_to_le32(period); | |
| 6802 | cmd->duration = __cpu_to_le32(duration); | |
| 6803 | cmd->next_start = __cpu_to_le32(next_offset); | |
| 6804 | cmd->enabled = __cpu_to_le32(enabled); | |
| 6805 | ||
| 6806 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6807 | "wmi quiet param: period %u duration %u enabled %d\n", | |
| 6808 | period, duration, enabled); | |
| 6809 | return skb; | |
| 6810 | } | |
| 6811 | ||
| dc8ab278 RM |
6812 | static struct sk_buff * |
| 6813 | ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id, | |
| 6814 | const u8 *mac) | |
| 6815 | { | |
| 6816 | struct wmi_addba_clear_resp_cmd *cmd; | |
| 6817 | struct sk_buff *skb; | |
| 6818 | ||
| 6819 | if (!mac) | |
| 6820 | return ERR_PTR(-EINVAL); | |
| 6821 | ||
| 6822 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6823 | if (!skb) | |
| 6824 | return ERR_PTR(-ENOMEM); | |
| 6825 | ||
| 6826 | cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; | |
| 6827 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6828 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
| 6829 | ||
| 6830 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6831 | "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", | |
| 6832 | vdev_id, mac); | |
| 6833 | return skb; | |
| 6834 | } | |
| 6835 | ||
| 65c0893d RM |
6836 | static struct sk_buff * |
| 6837 | ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
| 6838 | u32 tid, u32 buf_size) | |
| 6839 | { | |
| 6840 | struct wmi_addba_send_cmd *cmd; | |
| 6841 | struct sk_buff *skb; | |
| 6842 | ||
| 6843 | if (!mac) | |
| 6844 | return ERR_PTR(-EINVAL); | |
| 6845 | ||
| 6846 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6847 | if (!skb) | |
| 6848 | return ERR_PTR(-ENOMEM); | |
| 6849 | ||
| 6850 | cmd = (struct wmi_addba_send_cmd *)skb->data; | |
| 6851 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6852 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
| 6853 | cmd->tid = __cpu_to_le32(tid); | |
| 6854 | cmd->buffersize = __cpu_to_le32(buf_size); | |
| 6855 | ||
| 6856 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6857 | "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", | |
| 6858 | vdev_id, mac, tid, buf_size); | |
| 6859 | return skb; | |
| 6860 | } | |
| 6861 | ||
| 11597413 RM |
6862 | static struct sk_buff * |
| 6863 | ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
| 6864 | u32 tid, u32 status) | |
| 6865 | { | |
| 6866 | struct wmi_addba_setresponse_cmd *cmd; | |
| 6867 | struct sk_buff *skb; | |
| 6868 | ||
| 6869 | if (!mac) | |
| 6870 | return ERR_PTR(-EINVAL); | |
| 6871 | ||
| 6872 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6873 | if (!skb) | |
| 6874 | return ERR_PTR(-ENOMEM); | |
| 6875 | ||
| 6876 | cmd = (struct wmi_addba_setresponse_cmd *)skb->data; | |
| 6877 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6878 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
| 6879 | cmd->tid = __cpu_to_le32(tid); | |
| 6880 | cmd->statuscode = __cpu_to_le32(status); | |
| 6881 | ||
| 6882 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6883 | "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", | |
| 6884 | vdev_id, mac, tid, status); | |
| 6885 | return skb; | |
| 6886 | } | |
| 6887 | ||
| 50abef85 RM |
6888 | static struct sk_buff * |
| 6889 | ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
| 6890 | u32 tid, u32 initiator, u32 reason) | |
| 6891 | { | |
| 6892 | struct wmi_delba_send_cmd *cmd; | |
| 6893 | struct sk_buff *skb; | |
| 6894 | ||
| 6895 | if (!mac) | |
| 6896 | return ERR_PTR(-EINVAL); | |
| 6897 | ||
| 6898 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6899 | if (!skb) | |
| 6900 | return ERR_PTR(-ENOMEM); | |
| 6901 | ||
| 6902 | cmd = (struct wmi_delba_send_cmd *)skb->data; | |
| 6903 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
| 6904 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | |
| 6905 | cmd->tid = __cpu_to_le32(tid); | |
| 6906 | cmd->initiator = __cpu_to_le32(initiator); | |
| 6907 | cmd->reasoncode = __cpu_to_le32(reason); | |
| 6908 | ||
| 6909 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6910 | "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", | |
| 6911 | vdev_id, mac, tid, initiator, reason); | |
| 6912 | return skb; | |
| 6913 | } | |
| 6914 | ||
| 29542666 MK |
6915 | static struct sk_buff * |
| 6916 | ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param) | |
| 6917 | { | |
| 6918 | struct wmi_pdev_get_tpc_config_cmd *cmd; | |
| 6919 | struct sk_buff *skb; | |
| 6920 | ||
| 6921 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 6922 | if (!skb) | |
| 6923 | return ERR_PTR(-ENOMEM); | |
| 6924 | ||
| 6925 | cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data; | |
| 6926 | cmd->param = __cpu_to_le32(param); | |
| 6927 | ||
| 6928 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 6929 | "wmi pdev get tcp config param:%d\n", param); | |
| 6930 | return skb; | |
| 6931 | } | |
| 6932 | ||
| bc6f9ae6 MP |
6933 | size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head) |
| 6934 | { | |
| 6935 | struct ath10k_fw_stats_peer *i; | |
| 6936 | size_t num = 0; | |
| 6937 | ||
| 6938 | list_for_each_entry(i, head, list) | |
| 6939 | ++num; | |
| 6940 | ||
| 6941 | return num; | |
| 6942 | } | |
| 6943 | ||
| 6944 | size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head) | |
| 6945 | { | |
| 6946 | struct ath10k_fw_stats_vdev *i; | |
| 6947 | size_t num = 0; | |
| 6948 | ||
| 6949 | list_for_each_entry(i, head, list) | |
| 6950 | ++num; | |
| 6951 | ||
| 6952 | return num; | |
| 6953 | } | |
| 6954 | ||
| 6955 | static void | |
| 6956 | ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
| 6957 | char *buf, u32 *length) | |
| 6958 | { | |
| 6959 | u32 len = *length; | |
| 6960 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 6961 | ||
| 6962 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 6963 | len += scnprintf(buf + len, buf_len - len, "%30s\n", | |
| 6964 | "ath10k PDEV stats"); | |
| 6965 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 6966 | "================="); | |
| 6967 | ||
| 6968 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 6969 | "Channel noise floor", pdev->ch_noise_floor); | |
| 6970 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 6971 | "Channel TX power", pdev->chan_tx_power); | |
| 6972 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 6973 | "TX frame count", pdev->tx_frame_count); | |
| 6974 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 6975 | "RX frame count", pdev->rx_frame_count); | |
| 6976 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 6977 | "RX clear count", pdev->rx_clear_count); | |
| 6978 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 6979 | "Cycle count", pdev->cycle_count); | |
| 6980 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 6981 | "PHY error count", pdev->phy_err_count); | |
| 6982 | ||
| 6983 | *length = len; | |
| 6984 | } | |
| 6985 | ||
| 6986 | static void | |
| 6987 | ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
| 6988 | char *buf, u32 *length) | |
| 6989 | { | |
| 6990 | u32 len = *length; | |
| 6991 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 6992 | ||
| 6993 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 6994 | "RTS bad count", pdev->rts_bad); | |
| 6995 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 6996 | "RTS good count", pdev->rts_good); | |
| 6997 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 6998 | "FCS bad count", pdev->fcs_bad); | |
| 6999 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7000 | "No beacon count", pdev->no_beacons); | |
| 7001 | len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", | |
| 7002 | "MIB int count", pdev->mib_int_count); | |
| 7003 | ||
| 7004 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7005 | *length = len; | |
| 7006 | } | |
| 7007 | ||
| 7008 | static void | |
| 7009 | ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
| 7010 | char *buf, u32 *length) | |
| 7011 | { | |
| 7012 | u32 len = *length; | |
| 7013 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7014 | ||
| 7015 | len += scnprintf(buf + len, buf_len - len, "\n%30s\n", | |
| 7016 | "ath10k PDEV TX stats"); | |
| 7017 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7018 | "================="); | |
| 7019 | ||
| 7020 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7021 | "HTT cookies queued", pdev->comp_queued); | |
| 7022 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7023 | "HTT cookies disp.", pdev->comp_delivered); | |
| 7024 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7025 | "MSDU queued", pdev->msdu_enqued); | |
| 7026 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7027 | "MPDU queued", pdev->mpdu_enqued); | |
| 7028 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7029 | "MSDUs dropped", pdev->wmm_drop); | |
| 7030 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7031 | "Local enqued", pdev->local_enqued); | |
| 7032 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7033 | "Local freed", pdev->local_freed); | |
| 7034 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7035 | "HW queued", pdev->hw_queued); | |
| 7036 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7037 | "PPDUs reaped", pdev->hw_reaped); | |
| 7038 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7039 | "Num underruns", pdev->underrun); | |
| 7040 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7041 | "PPDUs cleaned", pdev->tx_abort); | |
| 7042 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7043 | "MPDUs requed", pdev->mpdus_requed); | |
| 7044 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7045 | "Excessive retries", pdev->tx_ko); | |
| 7046 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7047 | "HW rate", pdev->data_rc); | |
| 7048 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7049 | "Sched self tiggers", pdev->self_triggers); | |
| 7050 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7051 | "Dropped due to SW retries", | |
| 7052 | pdev->sw_retry_failure); | |
| 7053 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7054 | "Illegal rate phy errors", | |
| 7055 | pdev->illgl_rate_phy_err); | |
| 7056 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7057 | "Pdev continuous xretry", pdev->pdev_cont_xretry); | |
| 7058 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7059 | "TX timeout", pdev->pdev_tx_timeout); | |
| 7060 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7061 | "PDEV resets", pdev->pdev_resets); | |
| 7062 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7063 | "PHY underrun", pdev->phy_underrun); | |
| 7064 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7065 | "MPDU is more than txop limit", pdev->txop_ovf); | |
| 7066 | *length = len; | |
| 7067 | } | |
| 7068 | ||
| 7069 | static void | |
| 7070 | ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev, | |
| 7071 | char *buf, u32 *length) | |
| 7072 | { | |
| 7073 | u32 len = *length; | |
| 7074 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7075 | ||
| 7076 | len += scnprintf(buf + len, buf_len - len, "\n%30s\n", | |
| 7077 | "ath10k PDEV RX stats"); | |
| 7078 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7079 | "================="); | |
| 7080 | ||
| 7081 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7082 | "Mid PPDU route change", | |
| 7083 | pdev->mid_ppdu_route_change); | |
| 7084 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7085 | "Tot. number of statuses", pdev->status_rcvd); | |
| 7086 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7087 | "Extra frags on rings 0", pdev->r0_frags); | |
| 7088 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7089 | "Extra frags on rings 1", pdev->r1_frags); | |
| 7090 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7091 | "Extra frags on rings 2", pdev->r2_frags); | |
| 7092 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7093 | "Extra frags on rings 3", pdev->r3_frags); | |
| 7094 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7095 | "MSDUs delivered to HTT", pdev->htt_msdus); | |
| 7096 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7097 | "MPDUs delivered to HTT", pdev->htt_mpdus); | |
| 7098 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7099 | "MSDUs delivered to stack", pdev->loc_msdus); | |
| 7100 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7101 | "MPDUs delivered to stack", pdev->loc_mpdus); | |
| 7102 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7103 | "Oversized AMSUs", pdev->oversize_amsdu); | |
| 7104 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7105 | "PHY errors", pdev->phy_errs); | |
| 7106 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7107 | "PHY errors drops", pdev->phy_err_drop); | |
| 7108 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7109 | "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs); | |
| 7110 | *length = len; | |
| 7111 | } | |
| 7112 | ||
| 7113 | static void | |
| 7114 | ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev, | |
| 7115 | char *buf, u32 *length) | |
| 7116 | { | |
| 7117 | u32 len = *length; | |
| 7118 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7119 | int i; | |
| 7120 | ||
| 7121 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7122 | "vdev id", vdev->vdev_id); | |
| 7123 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7124 | "beacon snr", vdev->beacon_snr); | |
| 7125 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7126 | "data snr", vdev->data_snr); | |
| 7127 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7128 | "num rx frames", vdev->num_rx_frames); | |
| 7129 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7130 | "num rts fail", vdev->num_rts_fail); | |
| 7131 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7132 | "num rts success", vdev->num_rts_success); | |
| 7133 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7134 | "num rx err", vdev->num_rx_err); | |
| 7135 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7136 | "num rx discard", vdev->num_rx_discard); | |
| 7137 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7138 | "num tx not acked", vdev->num_tx_not_acked); | |
| 7139 | ||
| 7140 | for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++) | |
| 7141 | len += scnprintf(buf + len, buf_len - len, | |
| 7142 | "%25s [%02d] %u\n", | |
| 7143 | "num tx frames", i, | |
| 7144 | vdev->num_tx_frames[i]); | |
| 7145 | ||
| 7146 | for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++) | |
| 7147 | len += scnprintf(buf + len, buf_len - len, | |
| 7148 | "%25s [%02d] %u\n", | |
| 7149 | "num tx frames retries", i, | |
| 7150 | vdev->num_tx_frames_retries[i]); | |
| 7151 | ||
| 7152 | for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++) | |
| 7153 | len += scnprintf(buf + len, buf_len - len, | |
| 7154 | "%25s [%02d] %u\n", | |
| 7155 | "num tx frames failures", i, | |
| 7156 | vdev->num_tx_frames_failures[i]); | |
| 7157 | ||
| 7158 | for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++) | |
| 7159 | len += scnprintf(buf + len, buf_len - len, | |
| 7160 | "%25s [%02d] 0x%08x\n", | |
| 7161 | "tx rate history", i, | |
| 7162 | vdev->tx_rate_history[i]); | |
| 7163 | ||
| 7164 | for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++) | |
| 7165 | len += scnprintf(buf + len, buf_len - len, | |
| 7166 | "%25s [%02d] %u\n", | |
| 7167 | "beacon rssi history", i, | |
| 7168 | vdev->beacon_rssi_history[i]); | |
| 7169 | ||
| 7170 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7171 | *length = len; | |
| 7172 | } | |
| 7173 | ||
| 7174 | static void | |
| 7175 | ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer, | |
| 7176 | char *buf, u32 *length) | |
| 7177 | { | |
| 7178 | u32 len = *length; | |
| 7179 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7180 | ||
| 7181 | len += scnprintf(buf + len, buf_len - len, "%30s %pM\n", | |
| 7182 | "Peer MAC address", peer->peer_macaddr); | |
| 7183 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7184 | "Peer RSSI", peer->peer_rssi); | |
| 7185 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7186 | "Peer TX rate", peer->peer_tx_rate); | |
| 7187 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", | |
| 7188 | "Peer RX rate", peer->peer_rx_rate); | |
| de46c015 MSS |
7189 | len += scnprintf(buf + len, buf_len - len, "%30s %u\n", |
| 7190 | "Peer RX duration", peer->rx_duration); | |
| 7191 | ||
| bc6f9ae6 MP |
7192 | len += scnprintf(buf + len, buf_len - len, "\n"); |
| 7193 | *length = len; | |
| 7194 | } | |
| 7195 | ||
| 7196 | void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar, | |
| 7197 | struct ath10k_fw_stats *fw_stats, | |
| 7198 | char *buf) | |
| 7199 | { | |
| 7200 | u32 len = 0; | |
| 7201 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7202 | const struct ath10k_fw_stats_pdev *pdev; | |
| 7203 | const struct ath10k_fw_stats_vdev *vdev; | |
| 7204 | const struct ath10k_fw_stats_peer *peer; | |
| 7205 | size_t num_peers; | |
| 7206 | size_t num_vdevs; | |
| 7207 | ||
| 7208 | spin_lock_bh(&ar->data_lock); | |
| 7209 | ||
| 7210 | pdev = list_first_entry_or_null(&fw_stats->pdevs, | |
| 7211 | struct ath10k_fw_stats_pdev, list); | |
| 7212 | if (!pdev) { | |
| 7213 | ath10k_warn(ar, "failed to get pdev stats\n"); | |
| 7214 | goto unlock; | |
| 7215 | } | |
| 7216 | ||
| 7217 | num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); | |
| 7218 | num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); | |
| 7219 | ||
| 7220 | ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); | |
| 7221 | ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); | |
| 7222 | ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); | |
| 7223 | ||
| 7224 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7225 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7226 | "ath10k VDEV stats", num_vdevs); | |
| 7227 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7228 | "================="); | |
| 7229 | ||
| 7230 | list_for_each_entry(vdev, &fw_stats->vdevs, list) { | |
| 7231 | ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); | |
| 7232 | } | |
| 7233 | ||
| 7234 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7235 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7236 | "ath10k PEER stats", num_peers); | |
| 7237 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7238 | "================="); | |
| 7239 | ||
| 7240 | list_for_each_entry(peer, &fw_stats->peers, list) { | |
| 7241 | ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); | |
| 7242 | } | |
| 7243 | ||
| 7244 | unlock: | |
| 7245 | spin_unlock_bh(&ar->data_lock); | |
| 7246 | ||
| 7247 | if (len >= buf_len) | |
| 7248 | buf[len - 1] = 0; | |
| 7249 | else | |
| 7250 | buf[len] = 0; | |
| 7251 | } | |
| 7252 | ||
| 7253 | void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar, | |
| 7254 | struct ath10k_fw_stats *fw_stats, | |
| 7255 | char *buf) | |
| 7256 | { | |
| 7257 | unsigned int len = 0; | |
| 7258 | unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7259 | const struct ath10k_fw_stats_pdev *pdev; | |
| 7260 | const struct ath10k_fw_stats_vdev *vdev; | |
| 7261 | const struct ath10k_fw_stats_peer *peer; | |
| 7262 | size_t num_peers; | |
| 7263 | size_t num_vdevs; | |
| 7264 | ||
| 7265 | spin_lock_bh(&ar->data_lock); | |
| 7266 | ||
| 7267 | pdev = list_first_entry_or_null(&fw_stats->pdevs, | |
| 7268 | struct ath10k_fw_stats_pdev, list); | |
| 7269 | if (!pdev) { | |
| 7270 | ath10k_warn(ar, "failed to get pdev stats\n"); | |
| 7271 | goto unlock; | |
| 7272 | } | |
| 7273 | ||
| 7274 | num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); | |
| 7275 | num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); | |
| 7276 | ||
| 7277 | ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); | |
| 7278 | ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len); | |
| 7279 | ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); | |
| 7280 | ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); | |
| 7281 | ||
| 7282 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7283 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7284 | "ath10k VDEV stats", num_vdevs); | |
| 7285 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7286 | "================="); | |
| 7287 | ||
| 7288 | list_for_each_entry(vdev, &fw_stats->vdevs, list) { | |
| 7289 | ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); | |
| 7290 | } | |
| 7291 | ||
| 7292 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7293 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7294 | "ath10k PEER stats", num_peers); | |
| 7295 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7296 | "================="); | |
| 7297 | ||
| 7298 | list_for_each_entry(peer, &fw_stats->peers, list) { | |
| 7299 | ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); | |
| 7300 | } | |
| 7301 | ||
| 7302 | unlock: | |
| 7303 | spin_unlock_bh(&ar->data_lock); | |
| 7304 | ||
| 7305 | if (len >= buf_len) | |
| 7306 | buf[len - 1] = 0; | |
| 7307 | else | |
| 7308 | buf[len] = 0; | |
| 7309 | } | |
| 7310 | ||
| 62f77f09 M |
7311 | static struct sk_buff * |
| 7312 | ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable, | |
| 7313 | u32 detect_level, u32 detect_margin) | |
| 7314 | { | |
| 7315 | struct wmi_pdev_set_adaptive_cca_params *cmd; | |
| 7316 | struct sk_buff *skb; | |
| 7317 | ||
| 7318 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | |
| 7319 | if (!skb) | |
| 7320 | return ERR_PTR(-ENOMEM); | |
| 7321 | ||
| 7322 | cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data; | |
| 7323 | cmd->enable = __cpu_to_le32(enable); | |
| 7324 | cmd->cca_detect_level = __cpu_to_le32(detect_level); | |
| 7325 | cmd->cca_detect_margin = __cpu_to_le32(detect_margin); | |
| 7326 | ||
| 7327 | ath10k_dbg(ar, ATH10K_DBG_WMI, | |
| 7328 | "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n", | |
| 7329 | enable, detect_level, detect_margin); | |
| 7330 | return skb; | |
| 7331 | } | |
| 7332 | ||
| 98dd2b92 MP |
7333 | void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar, |
| 7334 | struct ath10k_fw_stats *fw_stats, | |
| 7335 | char *buf) | |
| 7336 | { | |
| 7337 | u32 len = 0; | |
| 7338 | u32 buf_len = ATH10K_FW_STATS_BUF_SIZE; | |
| 7339 | const struct ath10k_fw_stats_pdev *pdev; | |
| 7340 | const struct ath10k_fw_stats_vdev *vdev; | |
| 7341 | const struct ath10k_fw_stats_peer *peer; | |
| 7342 | size_t num_peers; | |
| 7343 | size_t num_vdevs; | |
| 7344 | ||
| 7345 | spin_lock_bh(&ar->data_lock); | |
| 7346 | ||
| 7347 | pdev = list_first_entry_or_null(&fw_stats->pdevs, | |
| 7348 | struct ath10k_fw_stats_pdev, list); | |
| 7349 | if (!pdev) { | |
| 7350 | ath10k_warn(ar, "failed to get pdev stats\n"); | |
| 7351 | goto unlock; | |
| 7352 | } | |
| 7353 | ||
| 7354 | num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers); | |
| 7355 | num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs); | |
| 7356 | ||
| 7357 | ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len); | |
| 7358 | ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len); | |
| 7359 | ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len); | |
| 7360 | ||
| 7361 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7362 | "HW paused", pdev->hw_paused); | |
| 7363 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7364 | "Seqs posted", pdev->seq_posted); | |
| 7365 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7366 | "Seqs failed queueing", pdev->seq_failed_queueing); | |
| 7367 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7368 | "Seqs completed", pdev->seq_completed); | |
| 7369 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7370 | "Seqs restarted", pdev->seq_restarted); | |
| 7371 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7372 | "MU Seqs posted", pdev->mu_seq_posted); | |
| 7373 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7374 | "MPDUs SW flushed", pdev->mpdus_sw_flush); | |
| 7375 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7376 | "MPDUs HW filtered", pdev->mpdus_hw_filter); | |
| 7377 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7378 | "MPDUs truncated", pdev->mpdus_truncated); | |
| 7379 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7380 | "MPDUs receive no ACK", pdev->mpdus_ack_failed); | |
| 7381 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7382 | "MPDUs expired", pdev->mpdus_expired); | |
| 7383 | ||
| 7384 | ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len); | |
| 7385 | len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", | |
| 7386 | "Num Rx Overflow errors", pdev->rx_ovfl_errs); | |
| 7387 | ||
| 7388 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7389 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7390 | "ath10k VDEV stats", num_vdevs); | |
| 7391 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7392 | "================="); | |
| 7393 | ||
| 7394 | list_for_each_entry(vdev, &fw_stats->vdevs, list) { | |
| 7395 | ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len); | |
| 7396 | } | |
| 7397 | ||
| 7398 | len += scnprintf(buf + len, buf_len - len, "\n"); | |
| 7399 | len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", | |
| 7400 | "ath10k PEER stats", num_peers); | |
| 7401 | len += scnprintf(buf + len, buf_len - len, "%30s\n\n", | |
| 7402 | "================="); | |
| 7403 | ||
| 7404 | list_for_each_entry(peer, &fw_stats->peers, list) { | |
| 7405 | ath10k_wmi_fw_peer_stats_fill(peer, buf, &len); | |
| 7406 | } | |
| 7407 | ||
| 7408 | unlock: | |
| 7409 | spin_unlock_bh(&ar->data_lock); | |
| 7410 | ||
| 7411 | if (len >= buf_len) | |
| 7412 | buf[len - 1] = 0; | |
| 7413 | else | |
| 7414 | buf[len] = 0; | |
| 7415 | } | |
| 7416 | ||
| 6e4de1a4 PO |
7417 | int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar, |
| 7418 | enum wmi_vdev_subtype subtype) | |
| 7419 | { | |
| 7420 | switch (subtype) { | |
| 7421 | case WMI_VDEV_SUBTYPE_NONE: | |
| 7422 | return WMI_VDEV_SUBTYPE_LEGACY_NONE; | |
| 7423 | case WMI_VDEV_SUBTYPE_P2P_DEVICE: | |
| 7424 | return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV; | |
| 7425 | case WMI_VDEV_SUBTYPE_P2P_CLIENT: | |
| 7426 | return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI; | |
| 7427 | case WMI_VDEV_SUBTYPE_P2P_GO: | |
| 7428 | return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO; | |
| 7429 | case WMI_VDEV_SUBTYPE_PROXY_STA: | |
| 7430 | return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA; | |
| 7431 | case WMI_VDEV_SUBTYPE_MESH_11S: | |
| 7432 | case WMI_VDEV_SUBTYPE_MESH_NON_11S: | |
| 7433 | return -ENOTSUPP; | |
| 7434 | } | |
| 7435 | return -ENOTSUPP; | |
| 7436 | } | |
| 7437 | ||
| 7438 | static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar, | |
| 7439 | enum wmi_vdev_subtype subtype) | |
| 7440 | { | |
| 7441 | switch (subtype) { | |
| 7442 | case WMI_VDEV_SUBTYPE_NONE: | |
| 7443 | return WMI_VDEV_SUBTYPE_10_2_4_NONE; | |
| 7444 | case WMI_VDEV_SUBTYPE_P2P_DEVICE: | |
| 7445 | return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV; | |
| 7446 | case WMI_VDEV_SUBTYPE_P2P_CLIENT: | |
| 7447 | return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI; | |
| 7448 | case WMI_VDEV_SUBTYPE_P2P_GO: | |
| 7449 | return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO; | |
| 7450 | case WMI_VDEV_SUBTYPE_PROXY_STA: | |
| 7451 | return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA; | |
| 7452 | case WMI_VDEV_SUBTYPE_MESH_11S: | |
| 7453 | return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S; | |
| 7454 | case WMI_VDEV_SUBTYPE_MESH_NON_11S: | |
| 7455 | return -ENOTSUPP; | |
| 7456 | } | |
| 7457 | return -ENOTSUPP; | |
| 7458 | } | |
| 7459 | ||
| 7460 | static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar, | |
| 7461 | enum wmi_vdev_subtype subtype) | |
| 7462 | { | |
| 7463 | switch (subtype) { | |
| 7464 | case WMI_VDEV_SUBTYPE_NONE: | |
| 7465 | return WMI_VDEV_SUBTYPE_10_4_NONE; | |
| 7466 | case WMI_VDEV_SUBTYPE_P2P_DEVICE: | |
| 7467 | return WMI_VDEV_SUBTYPE_10_4_P2P_DEV; | |
| 7468 | case WMI_VDEV_SUBTYPE_P2P_CLIENT: | |
| 7469 | return WMI_VDEV_SUBTYPE_10_4_P2P_CLI; | |
| 7470 | case WMI_VDEV_SUBTYPE_P2P_GO: | |
| 7471 | return WMI_VDEV_SUBTYPE_10_4_P2P_GO; | |
| 7472 | case WMI_VDEV_SUBTYPE_PROXY_STA: | |
| 7473 | return WMI_VDEV_SUBTYPE_10_4_PROXY_STA; | |
| 7474 | case WMI_VDEV_SUBTYPE_MESH_11S: | |
| 7475 | return WMI_VDEV_SUBTYPE_10_4_MESH_11S; | |
| 7476 | case WMI_VDEV_SUBTYPE_MESH_NON_11S: | |
| 7477 | return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S; | |
| 7478 | } | |
| 7479 | return -ENOTSUPP; | |
| 7480 | } | |
| 7481 | ||
| d7579d12 MK |
7482 | static const struct wmi_ops wmi_ops = { |
| 7483 | .rx = ath10k_wmi_op_rx, | |
| 7484 | .map_svc = wmi_main_svc_map, | |
| 7485 | ||
| 7486 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
| 7487 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
| 7488 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
| 7489 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
| 7490 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
| 7491 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
| 991adf71 | 7492 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
| d7579d12 MK |
7493 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
| 7494 | .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, | |
| 7495 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
| 7496 | .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats, | |
| c1a4654a | 7497 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
| d7579d12 MK |
7498 | |
| 7499 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
| 7500 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
| 7501 | .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd, | |
| 7502 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
| 7503 | .gen_init = ath10k_wmi_op_gen_init, | |
| 7504 | .gen_start_scan = ath10k_wmi_op_gen_start_scan, | |
| 7505 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
| 7506 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
| 7507 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
| 7508 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
| 7509 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
| 7510 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
| 7511 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
| 7512 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
| 7513 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
| 7514 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
| 7515 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
| 6d492fe2 | 7516 | /* .gen_vdev_wmm_conf not implemented */ |
| d7579d12 MK |
7517 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
| 7518 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
| 7519 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
| 7520 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
| 7521 | .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc, | |
| 7522 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
| 7523 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
| 7524 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
| 7525 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
| 7526 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
| 7527 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
| 7528 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
| 7529 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
| 7530 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
| 7531 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
| 7532 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
| 7533 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
| ffdd738d | 7534 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
| a57a6a27 | 7535 | /* .gen_pdev_get_temperature not implemented */ |
| dc8ab278 | 7536 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
| 65c0893d | 7537 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
| 11597413 | 7538 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
| 50abef85 | 7539 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
| bc6f9ae6 | 7540 | .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill, |
| 6e4de1a4 | 7541 | .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype, |
| be9ce9d8 | 7542 | /* .gen_bcn_tmpl not implemented */ |
| 4c4955fe | 7543 | /* .gen_prb_tmpl not implemented */ |
| 369242b4 | 7544 | /* .gen_p2p_go_bcn_ie not implemented */ |
| 5b272e30 | 7545 | /* .gen_adaptive_qcs not implemented */ |
| 62f77f09 | 7546 | /* .gen_pdev_enable_adaptive_cca not implemented */ |
| d7579d12 MK |
7547 | }; |
| 7548 | ||
| 7549 | static const struct wmi_ops wmi_10_1_ops = { | |
| 7550 | .rx = ath10k_wmi_10_1_op_rx, | |
| 7551 | .map_svc = wmi_10x_svc_map, | |
| 7552 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
| 7553 | .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats, | |
| 7554 | .gen_init = ath10k_wmi_10_1_op_gen_init, | |
| 7555 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | |
| 7556 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
| 7557 | .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc, | |
| a57a6a27 | 7558 | /* .gen_pdev_get_temperature not implemented */ |
| d7579d12 MK |
7559 | |
| 7560 | /* shared with main branch */ | |
| 7561 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
| 7562 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
| 7563 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
| 7564 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
| 7565 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
| 7566 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
| 991adf71 | 7567 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
| d7579d12 MK |
7568 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
| 7569 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
| c1a4654a | 7570 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
| d7579d12 MK |
7571 | |
| 7572 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
| 7573 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
| 7574 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
| 7575 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
| 7576 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
| 7577 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
| 7578 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
| 7579 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
| 7580 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
| 7581 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
| 7582 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
| 7583 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
| 7584 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
| 7585 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
| 6d492fe2 | 7586 | /* .gen_vdev_wmm_conf not implemented */ |
| d7579d12 MK |
7587 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
| 7588 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
| 7589 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
| 7590 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
| 7591 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
| 7592 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
| 7593 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
| 7594 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
| 7595 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
| 7596 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
| 7597 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
| 7598 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
| 7599 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
| 7600 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
| 7601 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
| 7602 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
| ffdd738d | 7603 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
| dc8ab278 | 7604 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
| 65c0893d | 7605 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
| 11597413 | 7606 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
| 50abef85 | 7607 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
| bc6f9ae6 | 7608 | .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, |
| 6e4de1a4 | 7609 | .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype, |
| be9ce9d8 | 7610 | /* .gen_bcn_tmpl not implemented */ |
| 4c4955fe | 7611 | /* .gen_prb_tmpl not implemented */ |
| 369242b4 | 7612 | /* .gen_p2p_go_bcn_ie not implemented */ |
| 5b272e30 | 7613 | /* .gen_adaptive_qcs not implemented */ |
| 62f77f09 | 7614 | /* .gen_pdev_enable_adaptive_cca not implemented */ |
| d7579d12 MK |
7615 | }; |
| 7616 | ||
| 7617 | static const struct wmi_ops wmi_10_2_ops = { | |
| 7618 | .rx = ath10k_wmi_10_2_op_rx, | |
| 20de2229 | 7619 | .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats, |
| d7579d12 MK |
7620 | .gen_init = ath10k_wmi_10_2_op_gen_init, |
| 7621 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | |
| a57a6a27 | 7622 | /* .gen_pdev_get_temperature not implemented */ |
| d7579d12 MK |
7623 | |
| 7624 | /* shared with 10.1 */ | |
| 7625 | .map_svc = wmi_10x_svc_map, | |
| 7626 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
| d7579d12 MK |
7627 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, |
| 7628 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
| 7629 | ||
| 7630 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
| 7631 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
| 7632 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
| 7633 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
| 7634 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
| 7635 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | |
| 991adf71 | 7636 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
| d7579d12 MK |
7637 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
| 7638 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
| c1a4654a | 7639 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
| d7579d12 MK |
7640 | |
| 7641 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
| 7642 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
| 7643 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
| 7644 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
| 7645 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
| 7646 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
| 7647 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
| 7648 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
| 7649 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
| 7650 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
| 7651 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
| 7652 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
| 7653 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
| 7654 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
| 6d492fe2 | 7655 | /* .gen_vdev_wmm_conf not implemented */ |
| d7579d12 MK |
7656 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
| 7657 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
| 7658 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
| 7659 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
| 7660 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
| 7661 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
| 7662 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
| 7663 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
| 7664 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
| 7665 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
| 7666 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
| 7667 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
| 7668 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
| 7669 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
| 7670 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
| 7671 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
| ffdd738d | 7672 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
| dc8ab278 | 7673 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
| 65c0893d | 7674 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
| 11597413 | 7675 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
| 50abef85 | 7676 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
| bc6f9ae6 | 7677 | .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, |
| 6e4de1a4 | 7678 | .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype, |
| 62f77f09 | 7679 | /* .gen_pdev_enable_adaptive_cca not implemented */ |
| d7579d12 MK |
7680 | }; |
| 7681 | ||
| 4a16fbec RM |
7682 | static const struct wmi_ops wmi_10_2_4_ops = { |
| 7683 | .rx = ath10k_wmi_10_2_op_rx, | |
| 20de2229 | 7684 | .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats, |
| 4a16fbec RM |
7685 | .gen_init = ath10k_wmi_10_2_op_gen_init, |
| 7686 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | |
| a57a6a27 | 7687 | .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature, |
| 4a16fbec RM |
7688 | |
| 7689 | /* shared with 10.1 */ | |
| 7690 | .map_svc = wmi_10x_svc_map, | |
| 7691 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | |
| 4a16fbec RM |
7692 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, |
| 7693 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | |
| 7694 | ||
| 7695 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | |
| 7696 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | |
| 7697 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | |
| 7698 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | |
| 7699 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
| 8b019fb0 | 7700 | .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev, |
| 991adf71 | 7701 | .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr, |
| 4a16fbec RM |
7702 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, |
| 7703 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | |
| c1a4654a | 7704 | .pull_roam_ev = ath10k_wmi_op_pull_roam_ev, |
| 4a16fbec RM |
7705 | |
| 7706 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
| 7707 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
| 7708 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
| 7709 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
| 7710 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | |
| 7711 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
| 7712 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
| 7713 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
| 7714 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
| 7715 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
| 7716 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
| 7717 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
| 7718 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | |
| 7719 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
| 7720 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, | |
| 7721 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
| 7722 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
| 7723 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
| 7724 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | |
| 7725 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
| 7726 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
| 7727 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
| 7728 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
| 7729 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
| 7730 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | |
| 7731 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
| 7732 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
| 7733 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
| 7734 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
| 7735 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
| ffdd738d | 7736 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, |
| dc8ab278 | 7737 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
| 65c0893d | 7738 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, |
| 11597413 | 7739 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, |
| 50abef85 | 7740 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, |
| 29542666 | 7741 | .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config, |
| bc6f9ae6 | 7742 | .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill, |
| 62f77f09 M |
7743 | .gen_pdev_enable_adaptive_cca = |
| 7744 | ath10k_wmi_op_gen_pdev_enable_adaptive_cca, | |
| 6e4de1a4 | 7745 | .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype, |
| be9ce9d8 | 7746 | /* .gen_bcn_tmpl not implemented */ |
| 4c4955fe | 7747 | /* .gen_prb_tmpl not implemented */ |
| 369242b4 | 7748 | /* .gen_p2p_go_bcn_ie not implemented */ |
| 5b272e30 | 7749 | /* .gen_adaptive_qcs not implemented */ |
| 4a16fbec RM |
7750 | }; |
| 7751 | ||
| 840357cc | 7752 | static const struct wmi_ops wmi_10_4_ops = { |
| 1c092961 | 7753 | .rx = ath10k_wmi_10_4_op_rx, |
| 840357cc | 7754 | .map_svc = wmi_10_4_svc_map, |
| b2297baa | 7755 | |
| 98dd2b92 | 7756 | .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats, |
| b2297baa | 7757 | .pull_scan = ath10k_wmi_op_pull_scan_ev, |
| 1c092961 | 7758 | .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev, |
| b2297baa | 7759 | .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev, |
| 373b48cf RM |
7760 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, |
| 7761 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | |
| 3cec3be3 | 7762 | .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev, |
| 2b0a2e0d RM |
7763 | .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr, |
| 7764 | .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev, | |
| 1c092961 | 7765 | .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, |
| d02e752f | 7766 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, |
| 08e75ea8 | 7767 | .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme, |
| 373b48cf RM |
7768 | |
| 7769 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | |
| 7770 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | |
| 7771 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | |
| 7772 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | |
| d1e52a8e | 7773 | .gen_init = ath10k_wmi_10_4_op_gen_init, |
| b2297baa RM |
7774 | .gen_start_scan = ath10k_wmi_op_gen_start_scan, |
| 7775 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | |
| 373b48cf RM |
7776 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, |
| 7777 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | |
| 7778 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | |
| 7779 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | |
| 7780 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | |
| 7781 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | |
| 7782 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | |
| 7783 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | |
| 4535edbd RM |
7784 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, |
| 7785 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | |
| 373b48cf RM |
7786 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, |
| 7787 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | |
| 7788 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | |
| 7789 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | |
| b54e16f1 | 7790 | .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc, |
| 373b48cf RM |
7791 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, |
| 7792 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | |
| 7793 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | |
| 7794 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | |
| 7795 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | |
| 7796 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | |
| 7797 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | |
| 7798 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | |
| 7799 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | |
| 7800 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | |
| 7801 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | |
| 7802 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, | |
| b2887410 VT |
7803 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, |
| 7804 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, | |
| 7805 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, | |
| 7806 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, | |
| 98dd2b92 | 7807 | .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill, |
| 373b48cf RM |
7808 | |
| 7809 | /* shared with 10.2 */ | |
| 98dd2b92 | 7810 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, |
| 6dd46348 | 7811 | .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature, |
| 6e4de1a4 | 7812 | .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype, |
| 840357cc RM |
7813 | }; |
| 7814 | ||
| b79b9baa MK |
7815 | int ath10k_wmi_attach(struct ath10k *ar) |
| 7816 | { | |
| d7579d12 | 7817 | switch (ar->wmi.op_version) { |
| 9bd21322 | 7818 | case ATH10K_FW_WMI_OP_VERSION_10_4: |
| 840357cc | 7819 | ar->wmi.ops = &wmi_10_4_ops; |
| 2d491e69 | 7820 | ar->wmi.cmd = &wmi_10_4_cmd_map; |
| 93841a15 | 7821 | ar->wmi.vdev_param = &wmi_10_4_vdev_param_map; |
| d86561ff | 7822 | ar->wmi.pdev_param = &wmi_10_4_pdev_param_map; |
| 3fab30f7 | 7823 | ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; |
| 9bd21322 | 7824 | break; |
| 4a16fbec RM |
7825 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: |
| 7826 | ar->wmi.cmd = &wmi_10_2_4_cmd_map; | |
| 7827 | ar->wmi.ops = &wmi_10_2_4_ops; | |
| 7828 | ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map; | |
| 7829 | ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map; | |
| 3fab30f7 | 7830 | ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; |
| 4a16fbec | 7831 | break; |
| d7579d12 MK |
7832 | case ATH10K_FW_WMI_OP_VERSION_10_2: |
| 7833 | ar->wmi.cmd = &wmi_10_2_cmd_map; | |
| 7834 | ar->wmi.ops = &wmi_10_2_ops; | |
| b79b9baa MK |
7835 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; |
| 7836 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; | |
| 3fab30f7 | 7837 | ar->wmi.peer_flags = &wmi_10_2_peer_flags_map; |
| d7579d12 MK |
7838 | break; |
| 7839 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
| 7840 | ar->wmi.cmd = &wmi_10x_cmd_map; | |
| 7841 | ar->wmi.ops = &wmi_10_1_ops; | |
| 7842 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; | |
| 7843 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; | |
| 3fab30f7 | 7844 | ar->wmi.peer_flags = &wmi_10x_peer_flags_map; |
| d7579d12 MK |
7845 | break; |
| 7846 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
| b79b9baa | 7847 | ar->wmi.cmd = &wmi_cmd_map; |
| d7579d12 | 7848 | ar->wmi.ops = &wmi_ops; |
| b79b9baa MK |
7849 | ar->wmi.vdev_param = &wmi_vdev_param_map; |
| 7850 | ar->wmi.pdev_param = &wmi_pdev_param_map; | |
| 3fab30f7 | 7851 | ar->wmi.peer_flags = &wmi_peer_flags_map; |
| d7579d12 | 7852 | break; |
| ca996ec5 MK |
7853 | case ATH10K_FW_WMI_OP_VERSION_TLV: |
| 7854 | ath10k_wmi_tlv_attach(ar); | |
| 7855 | break; | |
| d7579d12 MK |
7856 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
| 7857 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
| 7858 | ath10k_err(ar, "unsupported WMI op version: %d\n", | |
| 7859 | ar->wmi.op_version); | |
| 7860 | return -EINVAL; | |
| b79b9baa MK |
7861 | } |
| 7862 | ||
| 7863 | init_completion(&ar->wmi.service_ready); | |
| 7864 | init_completion(&ar->wmi.unified_ready); | |
| b79b9baa | 7865 | |
| c8ecfc1c RM |
7866 | INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work); |
| 7867 | ||
| b79b9baa MK |
7868 | return 0; |
| 7869 | } | |
| 7870 | ||
| a925a376 | 7871 | void ath10k_wmi_free_host_mem(struct ath10k *ar) |
| b79b9baa MK |
7872 | { |
| 7873 | int i; | |
| 7874 | ||
| 7875 | /* free the host memory chunks requested by firmware */ | |
| 7876 | for (i = 0; i < ar->wmi.num_mem_chunks; i++) { | |
| b0578865 FF |
7877 | dma_unmap_single(ar->dev, |
| 7878 | ar->wmi.mem_chunks[i].paddr, | |
| 7879 | ar->wmi.mem_chunks[i].len, | |
| 7880 | DMA_TO_DEVICE); | |
| 7881 | kfree(ar->wmi.mem_chunks[i].vaddr); | |
| b79b9baa MK |
7882 | } |
| 7883 | ||
| 7884 | ar->wmi.num_mem_chunks = 0; | |
| 7885 | } | |
| a925a376 VT |
7886 | |
| 7887 | void ath10k_wmi_detach(struct ath10k *ar) | |
| 7888 | { | |
| 7889 | cancel_work_sync(&ar->svc_rdy_work); | |
| 7890 | ||
| 7891 | if (ar->svc_rdy_skb) | |
| 7892 | dev_kfree_skb(ar->svc_rdy_skb); | |
| 7893 | } |