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ath10k: add pdev bss channel info wmi definitions
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
5e3dd157
KV		 20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
ca996ec5 25#include "wmi-tlv.h"
5e3dd157 26#include "mac.h"
43d2a30f 27#include "testmode.h"
d7579d12 28#include "wmi-ops.h"
6a94888f 29#include "p2p.h"
587f7031 30#include "hw.h"
5e3dd157 31
ce42870e
BM		 32/* MAIN WMI cmd track */
33static struct wmi_cmd_map wmi_cmd_map = {
34 .init_cmdid = WMI_INIT_CMDID,
35 .start_scan_cmdid = WMI_START_SCAN_CMDID,
36 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
37 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
38 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
39 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
40 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
41 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
42 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
43 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
44 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
45 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
46 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
47 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
48 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
49 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
50 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
51 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
52 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
53 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
54 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
55 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
56 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
57 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
58 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
59 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
60 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
61 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
62 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
63 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
64 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
65 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
66 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
67 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
68 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
69 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
70 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
71 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
72 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
73 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
74 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
75 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
76 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
77 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
78 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
79 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
80 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
81 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
82 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
83 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
84 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
85 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
86 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
87 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
88 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
89 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
90 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
91 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
92 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
93 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
94 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
95 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
96 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
97 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
98 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
99 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
100 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
101 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
102 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
103 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
104 .wlan_profile_set_hist_intvl_cmdid =
105 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
106 .wlan_profile_get_profile_data_cmdid =
107 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
108 .wlan_profile_enable_profile_id_cmdid =
109 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
110 .wlan_profile_list_profile_id_cmdid =
111 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
112 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
113 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
114 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
115 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
116 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
117 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
118 .wow_enable_disable_wake_event_cmdid =
119 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
120 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
121 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
122 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
123 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
124 .vdev_spectral_scan_configure_cmdid =
125 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
126 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
127 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
128 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
129 .network_list_offload_config_cmdid =
130 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
131 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
132 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
133 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
134 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
135 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
136 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
137 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
138 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
139 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
140 .echo_cmdid = WMI_ECHO_CMDID,
141 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
142 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
143 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
144 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
145 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
146 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
147 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
148 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
149 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
a57a6a27 150 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 151 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
772b4aee
RM		 152 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
153 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
154 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
155 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
156 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
157 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
158 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
159 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
160 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
161 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
162 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
163 .nan_cmdid = WMI_CMD_UNSUPPORTED,
164 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
165 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
166 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
167 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
168 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
169 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
170 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
171 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
172 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
173 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
174 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
175 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
176 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
177 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
178 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
179 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
180 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
181 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
182 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
183 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
184 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
185 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
186 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
187 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
188 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
189 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
190 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
191 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
192 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
193 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
ce42870e
BM		 194};
195
b7e3adf9
BM		 196/* 10.X WMI cmd track */
197static struct wmi_cmd_map wmi_10x_cmd_map = {
198 .init_cmdid = WMI_10X_INIT_CMDID,
199 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
200 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
201 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 202 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 203 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
204 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
205 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
206 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
207 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
208 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
209 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
210 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
211 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
212 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
213 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
214 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
215 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
216 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
217 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
218 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
219 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
220 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
221 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
222 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
223 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
224 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
225 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
226 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
227 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
228 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
229 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
230 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
231 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
232 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
233 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
234 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 235 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 236 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
237 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
238 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 239 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 240 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
241 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
242 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
243 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
244 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
245 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
246 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
247 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
248 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
249 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
250 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
251 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
252 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
253 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
254 .roam_scan_rssi_change_threshold =
255 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
256 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
257 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
258 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
259 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
260 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
261 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
262 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
263 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 264 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 265 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 266 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 267 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
268 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
269 .wlan_profile_set_hist_intvl_cmdid =
270 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
271 .wlan_profile_get_profile_data_cmdid =
272 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
273 .wlan_profile_enable_profile_id_cmdid =
274 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
275 .wlan_profile_list_profile_id_cmdid =
276 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
277 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
278 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
279 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
280 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
281 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
282 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
283 .wow_enable_disable_wake_event_cmdid =
284 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
285 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
286 .wow_hostwakeup_from_sleep_cmdid =
287 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
288 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
289 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
290 .vdev_spectral_scan_configure_cmdid =
291 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
292 .vdev_spectral_scan_enable_cmdid =
293 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
294 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
34957b25
BM		 295 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
296 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
297 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
298 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
299 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
300 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
301 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
302 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
303 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
304 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
305 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 306 .echo_cmdid = WMI_10X_ECHO_CMDID,
307 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
308 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
309 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
34957b25
BM		 310 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
311 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
312 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
313 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 314 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
315 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
a57a6a27 316 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 317 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
772b4aee
RM		 318 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
319 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
320 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
321 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
322 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
323 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
324 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
325 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
326 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
327 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
328 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
329 .nan_cmdid = WMI_CMD_UNSUPPORTED,
330 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
331 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
332 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
333 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
334 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
335 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
336 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
337 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
338 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
339 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
340 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
341 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
342 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
343 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
344 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
345 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
346 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
347 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
348 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
349 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
350 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
351 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
352 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
353 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
354 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
355 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
356 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
357 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
358 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
359 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9 360};
ce42870e 361
4a16fbec
RM		 362/* 10.2.4 WMI cmd track */
363static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
364 .init_cmdid = WMI_10_2_INIT_CMDID,
365 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
366 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
367 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
368 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
369 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
370 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
371 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
372 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
373 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
374 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
375 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
376 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
377 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
378 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
379 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
380 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
381 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
382 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
383 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
384 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
385 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
386 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
387 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
388 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
389 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
390 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
391 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
392 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
393 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
394 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
395 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
396 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
397 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
398 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
399 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
400 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
401 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
402 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
403 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
404 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
405 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
406 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
407 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
408 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
409 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
410 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
411 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
412 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
413 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
414 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
415 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
416 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
417 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
418 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
419 .roam_scan_rssi_change_threshold =
420 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
421 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
422 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
423 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
424 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
425 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
426 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
427 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
428 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
429 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
430 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
431 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
432 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
433 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
434 .wlan_profile_set_hist_intvl_cmdid =
435 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
436 .wlan_profile_get_profile_data_cmdid =
437 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
438 .wlan_profile_enable_profile_id_cmdid =
439 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
440 .wlan_profile_list_profile_id_cmdid =
441 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
442 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
443 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
444 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
445 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
446 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
447 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
448 .wow_enable_disable_wake_event_cmdid =
449 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
450 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
451 .wow_hostwakeup_from_sleep_cmdid =
452 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
453 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
454 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
455 .vdev_spectral_scan_configure_cmdid =
456 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
457 .vdev_spectral_scan_enable_cmdid =
458 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
459 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
460 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
461 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
462 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
463 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
464 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
465 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
466 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
467 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
468 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
469 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
470 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
471 .echo_cmdid = WMI_10_2_ECHO_CMDID,
472 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
473 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
474 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
475 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
476 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
477 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
478 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
479 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
480 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
a57a6a27 481 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
62f77f09 482 .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
772b4aee
RM		 483 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
484 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
485 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
486 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
487 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
488 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
489 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
490 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
491 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
492 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
493 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
494 .nan_cmdid = WMI_CMD_UNSUPPORTED,
495 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
496 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
497 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
498 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
499 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
500 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
501 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
502 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
503 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
504 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
505 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
506 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
507 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
508 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
509 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
510 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
511 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
512 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
513 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
514 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
515 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
516 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
517 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
518 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
519 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
520 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
521 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
522 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
523 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
524 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
4a16fbec
RM		 525};
526
2d491e69
RM		 527/* 10.4 WMI cmd track */
528static struct wmi_cmd_map wmi_10_4_cmd_map = {
529 .init_cmdid = WMI_10_4_INIT_CMDID,
530 .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
531 .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
532 .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
533 .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
534 .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
535 .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
536 .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
537 .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
538 .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
539 .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
540 .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
541 .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
542 .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
543 .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
544 .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
545 .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
546 .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
547 .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
548 .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
549 .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
550 .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
551 .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
552 .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
553 .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
554 .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
555 .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
556 .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
557 .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
558 .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
559 .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
560 .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
561 .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
562 .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
563 .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
564 .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
565 .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
566 .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
567 .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
568 .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
569 .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
570 .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
571 .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
572 .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
573 .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
574 .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
575 .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
576 .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
577 .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
578 .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
579 .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
580 .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
581 .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
582 .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
583 .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
584 .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
585 .roam_scan_rssi_change_threshold =
586 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
587 .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
588 .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
589 .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
590 .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
591 .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
592 .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
593 .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
594 .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
595 .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
596 .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
597 .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
598 .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
599 .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
600 .wlan_profile_set_hist_intvl_cmdid =
601 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
602 .wlan_profile_get_profile_data_cmdid =
603 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
604 .wlan_profile_enable_profile_id_cmdid =
605 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
606 .wlan_profile_list_profile_id_cmdid =
607 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
608 .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
609 .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
610 .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
611 .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
612 .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
613 .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
614 .wow_enable_disable_wake_event_cmdid =
615 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
616 .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
617 .wow_hostwakeup_from_sleep_cmdid =
618 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
619 .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
620 .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
621 .vdev_spectral_scan_configure_cmdid =
622 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
623 .vdev_spectral_scan_enable_cmdid =
624 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
625 .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
626 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
627 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
628 .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
629 .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
630 .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
631 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
632 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
633 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
634 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
635 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
636 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
637 .echo_cmdid = WMI_10_4_ECHO_CMDID,
638 .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
639 .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
640 .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
641 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
642 .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
643 .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
644 .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
645 .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
646 .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
647 .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
648 .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
649 .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED,
650 .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED,
651 .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
652 .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
653 .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
654 .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
655 .wlan_peer_caching_add_peer_cmdid =
656 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
657 .wlan_peer_caching_evict_peer_cmdid =
658 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
659 .wlan_peer_caching_restore_peer_cmdid =
660 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
661 .wlan_peer_caching_print_all_peers_info_cmdid =
662 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
663 .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
664 .peer_add_proxy_sta_entry_cmdid =
665 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
666 .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
667 .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
668 .nan_cmdid = WMI_10_4_NAN_CMDID,
669 .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
670 .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
671 .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
672 .pdev_smart_ant_set_rx_antenna_cmdid =
673 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
674 .peer_smart_ant_set_tx_antenna_cmdid =
675 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
676 .peer_smart_ant_set_train_info_cmdid =
677 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
678 .peer_smart_ant_set_node_config_ops_cmdid =
679 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
680 .pdev_set_antenna_switch_table_cmdid =
681 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
682 .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
683 .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
684 .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
685 .pdev_ratepwr_chainmsk_table_cmdid =
686 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
687 .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
688 .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
689 .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
690 .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
691 .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
692 .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
693 .pdev_get_ani_ofdm_config_cmdid =
694 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
695 .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
696 .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
697 .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
698 .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
699 .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
700 .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
701 .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
702 .vdev_filter_neighbor_rx_packets_cmdid =
703 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
704 .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
705 .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
706 .pdev_bss_chan_info_request_cmdid =
707 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
47771902 708 .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
2d491e69
RM		 709};
710
6d1506e7
BM		 711/* MAIN WMI VDEV param map */
712static struct wmi_vdev_param_map wmi_vdev_param_map = {
713 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
714 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
715 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
716 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
717 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
718 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
719 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
720 .preamble = WMI_VDEV_PARAM_PREAMBLE,
721 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
722 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
723 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
724 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
725 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
726 .wmi_vdev_oc_scheduler_air_time_limit =
727 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
728 .wds = WMI_VDEV_PARAM_WDS,
729 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
730 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
731 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
732 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
733 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
734 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
735 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
736 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
737 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
738 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
739 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
740 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
741 .sgi = WMI_VDEV_PARAM_SGI,
742 .ldpc = WMI_VDEV_PARAM_LDPC,
743 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
744 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
745 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
746 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
747 .nss = WMI_VDEV_PARAM_NSS,
748 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
749 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
750 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
751 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
752 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
753 .ap_keepalive_min_idle_inactive_time_secs =
754 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
755 .ap_keepalive_max_idle_inactive_time_secs =
756 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
757 .ap_keepalive_max_unresponsive_time_secs =
758 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
759 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
760 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
761 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
762 .txbf = WMI_VDEV_PARAM_TXBF,
763 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
764 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
765 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
766 .ap_detect_out_of_sync_sleeping_sta_time_secs =
767 WMI_VDEV_PARAM_UNSUPPORTED,
93841a15
RM		 768 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
769 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
770 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
771 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
772 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
773 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
774 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
775 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
776 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
777 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
778 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
779 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
780 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
781 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
782 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
783 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 784 .set_tsf = WMI_VDEV_PARAM_UNSUPPORTED,
6d1506e7
BM		 785};
786
787/* 10.X WMI VDEV param map */
788static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
789 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
790 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
791 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
792 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
793 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
794 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
795 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
796 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
797 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
798 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
799 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
800 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
801 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
802 .wmi_vdev_oc_scheduler_air_time_limit =
803 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
804 .wds = WMI_10X_VDEV_PARAM_WDS,
805 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
806 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
807 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
808 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
809 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
810 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
811 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
812 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
813 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
814 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
815 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
816 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
817 .sgi = WMI_10X_VDEV_PARAM_SGI,
818 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
819 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
820 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
821 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
822 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
823 .nss = WMI_10X_VDEV_PARAM_NSS,
824 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
825 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
826 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
827 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
828 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
829 .ap_keepalive_min_idle_inactive_time_secs =
830 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
831 .ap_keepalive_max_idle_inactive_time_secs =
832 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
833 .ap_keepalive_max_unresponsive_time_secs =
834 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
835 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
836 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
837 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
838 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
839 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
840 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
841 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
842 .ap_detect_out_of_sync_sleeping_sta_time_secs =
843 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
93841a15
RM		 844 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
845 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
846 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
847 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
848 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
849 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
850 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
851 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
852 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
853 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
854 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
855 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
856 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
857 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
858 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
859 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 860 .set_tsf = WMI_VDEV_PARAM_UNSUPPORTED,
6d1506e7
BM		 861};
862
4a16fbec
RM		 863static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
864 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
865 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
866 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
867 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
868 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
869 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
870 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
871 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
872 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
873 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
874 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
875 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
876 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
877 .wmi_vdev_oc_scheduler_air_time_limit =
878 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
879 .wds = WMI_10X_VDEV_PARAM_WDS,
880 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
881 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
882 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
883 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
884 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
885 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
886 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
887 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
888 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
889 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
890 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
891 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
892 .sgi = WMI_10X_VDEV_PARAM_SGI,
893 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
894 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
895 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
896 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
897 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
898 .nss = WMI_10X_VDEV_PARAM_NSS,
899 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
900 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
901 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
902 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
903 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
904 .ap_keepalive_min_idle_inactive_time_secs =
905 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
906 .ap_keepalive_max_idle_inactive_time_secs =
907 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
908 .ap_keepalive_max_unresponsive_time_secs =
909 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
910 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
911 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
912 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
913 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
914 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
915 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
916 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
917 .ap_detect_out_of_sync_sleeping_sta_time_secs =
918 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
93841a15
RM		 919 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
920 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
921 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
922 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
923 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
924 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
925 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
926 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
927 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
928 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
929 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
930 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
931 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
932 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
933 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
934 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 935 .set_tsf = WMI_10X_VDEV_PARAM_TSF_INCREMENT,
93841a15
RM		 936};
937
938static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
939 .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
940 .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
941 .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
942 .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
943 .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
944 .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
945 .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
946 .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
947 .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
948 .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
949 .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
950 .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
951 .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
952 .wmi_vdev_oc_scheduler_air_time_limit =
953 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
954 .wds = WMI_10_4_VDEV_PARAM_WDS,
955 .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
956 .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
957 .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
958 .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
959 .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
960 .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
961 .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
962 .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
963 .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
964 .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
965 .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
966 .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
967 .sgi = WMI_10_4_VDEV_PARAM_SGI,
968 .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
969 .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
970 .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
971 .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
972 .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
973 .nss = WMI_10_4_VDEV_PARAM_NSS,
974 .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
975 .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
976 .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
977 .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
978 .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
979 .ap_keepalive_min_idle_inactive_time_secs =
980 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
981 .ap_keepalive_max_idle_inactive_time_secs =
982 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
983 .ap_keepalive_max_unresponsive_time_secs =
984 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
985 .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
986 .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
987 .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
988 .txbf = WMI_10_4_VDEV_PARAM_TXBF,
989 .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
990 .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
991 .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
992 .ap_detect_out_of_sync_sleeping_sta_time_secs =
993 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
994 .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
995 .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
996 .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
997 .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
998 .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
999 .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
1000 .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1001 .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1002 .early_rx_bmiss_sample_cycle =
1003 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1004 .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1005 .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1006 .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1007 .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
1008 .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
1009 .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
1010 .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
a606c0ee 1011 .set_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
4a16fbec
RM		 1012};
1013
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BM		 1014static struct wmi_pdev_param_map wmi_pdev_param_map = {
1015 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
1016 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
1017 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
1018 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
1019 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
1020 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
1021 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
1022 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1023 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
1024 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
1025 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1026 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
1027 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
1028 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1029 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
1030 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
1031 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
1032 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
1033 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
1034 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1035 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1036 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
1037 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1038 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
1039 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
1040 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1041 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1042 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1043 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1044 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1045 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1046 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1047 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1048 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
1049 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
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BM		 1050 .dcs = WMI_PDEV_PARAM_DCS,
1051 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
1052 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
1053 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
1054 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
1055 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
1056 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
1057 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
1058 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
1059 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
1060 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1061 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
1062 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
a7bd3e99 1063 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
d86561ff
RM		 1064 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1065 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1066 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1067 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1068 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1069 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1070 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1071 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1072 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1073 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1074 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1075 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1076 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1077 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1078 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1079 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1080 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1081 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1082 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1083 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1084 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1085 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1086 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1087 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1088 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1089 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1090 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1091 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1092 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1093 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1094 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1095 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1096 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1097 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1098 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1099 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1100 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1101 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1102 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1103 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1104 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1105 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
226a339b
BM		 1106};
1107
1108static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
1109 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1110 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1111 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1112 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1113 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1114 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1115 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1116 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1117 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1118 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1119 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1120 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1121 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1122 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1123 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1124 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1125 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1126 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1127 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1128 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1129 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1130 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1131 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1132 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1133 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1134 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1135 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1136 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1137 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1138 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1139 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1140 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1141 .bcnflt_stats_update_period =
1142 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1143 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
ab6258ed 1144 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
226a339b
BM		 1145 .dcs = WMI_10X_PDEV_PARAM_DCS,
1146 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1147 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1148 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1149 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1150 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1151 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1152 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1153 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1154 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1155 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1156 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1157 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
a7bd3e99 1158 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
d86561ff
RM		 1159 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1160 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1161 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1162 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1163 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1164 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1165 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1166 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1167 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1168 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1169 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1170 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1171 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1172 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1173 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1174 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1175 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1176 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1177 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1178 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1179 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1180 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1181 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1182 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1183 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1184 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1185 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1186 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1187 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1188 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1189 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1190 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1191 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1192 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1193 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1194 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1195 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1196 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1197 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1198 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1199 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1200 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
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BM		 1201};
1202
4a16fbec
RM		 1203static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
1204 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1205 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1206 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1207 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1208 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1209 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1210 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1211 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1212 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1213 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1214 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1215 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1216 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1217 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1218 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1219 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1220 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1221 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1222 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1223 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1224 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1225 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1226 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1227 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1228 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1229 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1230 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1231 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1232 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1233 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1234 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1235 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1236 .bcnflt_stats_update_period =
1237 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1238 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1239 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1240 .dcs = WMI_10X_PDEV_PARAM_DCS,
1241 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1242 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1243 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1244 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1245 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1246 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1247 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1248 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1249 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1250 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1251 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1252 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1253 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
d86561ff
RM		 1254 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1255 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1256 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1257 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1258 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1259 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1260 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1261 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1262 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1263 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1264 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1265 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1266 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1267 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1268 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1269 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1270 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1271 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1272 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1273 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1274 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1275 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1276 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1277 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1278 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1279 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1280 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1281 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1282 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1283 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1284 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1285 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1286 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1287 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1288 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1289 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1290 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1291 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1292 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1293 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1294 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1295 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
4a16fbec
RM		 1296};
1297
24c88f78
MK		 1298/* firmware 10.2 specific mappings */
1299static struct wmi_cmd_map wmi_10_2_cmd_map = {
1300 .init_cmdid = WMI_10_2_INIT_CMDID,
1301 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
1302 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
1303 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
1304 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
1305 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1306 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1307 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
1308 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1309 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1310 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1311 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1312 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1313 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1314 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1315 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1316 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1317 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
1318 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
1319 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
1320 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1321 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
1322 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
1323 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
1324 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
1325 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1326 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
1327 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
1328 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1329 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
1330 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
1331 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1332 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1333 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
1334 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
1335 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
1336 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1337 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
1338 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1339 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
1340 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1341 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1342 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
1343 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
1344 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
1345 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
1346 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1347 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1348 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1349 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1350 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1351 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1352 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
1353 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1354 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
1355 .roam_scan_rssi_change_threshold =
1356 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1357 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
1358 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1359 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1360 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
1361 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1362 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1363 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
1364 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1365 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
1366 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1367 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
1368 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1369 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1370 .wlan_profile_set_hist_intvl_cmdid =
1371 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1372 .wlan_profile_get_profile_data_cmdid =
1373 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1374 .wlan_profile_enable_profile_id_cmdid =
1375 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1376 .wlan_profile_list_profile_id_cmdid =
1377 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1378 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
1379 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
1380 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
1381 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
1382 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1383 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1384 .wow_enable_disable_wake_event_cmdid =
1385 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1386 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
1387 .wow_hostwakeup_from_sleep_cmdid =
1388 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1389 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
1390 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
1391 .vdev_spectral_scan_configure_cmdid =
1392 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1393 .vdev_spectral_scan_enable_cmdid =
1394 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1395 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
1396 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
1397 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
1398 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
1399 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
1400 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
1401 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
1402 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
1403 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
1404 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
1405 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
1406 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
1407 .echo_cmdid = WMI_10_2_ECHO_CMDID,
1408 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
1409 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
1410 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
1411 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
1412 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1413 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1414 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
1415 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
1416 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
a57a6a27 1417 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 1418 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
772b4aee
RM		 1419 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
1420 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
1421 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
1422 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
1423 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
1424 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
1425 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
1426 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
1427 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
1428 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1429 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
1430 .nan_cmdid = WMI_CMD_UNSUPPORTED,
1431 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
1432 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
1433 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
1434 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1435 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1436 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
1437 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
1438 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
1439 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
1440 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
1441 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
1442 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
1443 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
1444 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
1445 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
1446 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1447 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1448 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
1449 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
1450 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
24c88f78
MK		 1451};
1452
d86561ff
RM		 1453static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
1454 .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
1455 .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
1456 .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
1457 .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
1458 .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
1459 .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
1460 .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
1461 .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1462 .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
1463 .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
1464 .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1465 .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
1466 .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
1467 .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1468 .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
1469 .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
1470 .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
1471 .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
1472 .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
1473 .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1474 .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1475 .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
1476 .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1477 .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
1478 .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
1479 .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1480 .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
1481 .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1482 .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1483 .pdev_stats_update_period =
1484 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1485 .vdev_stats_update_period =
1486 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1487 .peer_stats_update_period =
1488 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1489 .bcnflt_stats_update_period =
1490 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1491 .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
1492 .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
1493 .dcs = WMI_10_4_PDEV_PARAM_DCS,
1494 .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
1495 .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
1496 .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
1497 .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
1498 .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
1499 .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
1500 .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
1501 .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
1502 .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
1503 .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
1504 .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
1505 .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
1506 .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
1507 .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
1508 .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
1509 .smart_antenna_default_antenna =
1510 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
1511 .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
1512 .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
1513 .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
1514 .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
1515 .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
1516 .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
1517 .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
1518 .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
1519 .remove_mcast2ucast_buffer =
1520 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
1521 .peer_sta_ps_statechg_enable =
1522 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
1523 .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
1524 .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
1525 .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
1526 .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
1527 .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
1528 .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
1529 .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
1530 .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
1531 .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
1532 .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
1533 .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
1534 .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
1535 .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
1536 .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
1537 .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
1538 .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
1539 .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
1540 .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
1541 .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
1542 .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
1543 .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
1544 .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
1545 .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
1546 .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
1547 .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
1548 .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
1549 .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
1550 .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
1551 .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
1552};
1553
3fab30f7
T		 1554static const struct wmi_peer_flags_map wmi_peer_flags_map = {
1555 .auth = WMI_PEER_AUTH,
1556 .qos = WMI_PEER_QOS,
1557 .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
1558 .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
1559 .apsd = WMI_PEER_APSD,
1560 .ht = WMI_PEER_HT,
1561 .bw40 = WMI_PEER_40MHZ,
1562 .stbc = WMI_PEER_STBC,
1563 .ldbc = WMI_PEER_LDPC,
1564 .dyn_mimops = WMI_PEER_DYN_MIMOPS,
1565 .static_mimops = WMI_PEER_STATIC_MIMOPS,
1566 .spatial_mux = WMI_PEER_SPATIAL_MUX,
1567 .vht = WMI_PEER_VHT,
1568 .bw80 = WMI_PEER_80MHZ,
1569 .vht_2g = WMI_PEER_VHT_2G,
1570 .pmf = WMI_PEER_PMF,
1571};
1572
1573static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
1574 .auth = WMI_10X_PEER_AUTH,
1575 .qos = WMI_10X_PEER_QOS,
1576 .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
1577 .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
1578 .apsd = WMI_10X_PEER_APSD,
1579 .ht = WMI_10X_PEER_HT,
1580 .bw40 = WMI_10X_PEER_40MHZ,
1581 .stbc = WMI_10X_PEER_STBC,
1582 .ldbc = WMI_10X_PEER_LDPC,
1583 .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
1584 .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
1585 .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
1586 .vht = WMI_10X_PEER_VHT,
1587 .bw80 = WMI_10X_PEER_80MHZ,
1588};
1589
1590static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
1591 .auth = WMI_10_2_PEER_AUTH,
1592 .qos = WMI_10_2_PEER_QOS,
1593 .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
1594 .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
1595 .apsd = WMI_10_2_PEER_APSD,
1596 .ht = WMI_10_2_PEER_HT,
1597 .bw40 = WMI_10_2_PEER_40MHZ,
1598 .stbc = WMI_10_2_PEER_STBC,
1599 .ldbc = WMI_10_2_PEER_LDPC,
1600 .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
1601 .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
1602 .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
1603 .vht = WMI_10_2_PEER_VHT,
1604 .bw80 = WMI_10_2_PEER_80MHZ,
1605 .vht_2g = WMI_10_2_PEER_VHT_2G,
1606 .pmf = WMI_10_2_PEER_PMF,
1607};
1608
0226d602
MK		 1609void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
1610 const struct wmi_channel_arg *arg)
2d66721c
MK		 1611{
1612 u32 flags = 0;
1613
1614 memset(ch, 0, sizeof(*ch));
1615
1616 if (arg->passive)
1617 flags |= WMI_CHAN_FLAG_PASSIVE;
1618 if (arg->allow_ibss)
1619 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
1620 if (arg->allow_ht)
1621 flags |= WMI_CHAN_FLAG_ALLOW_HT;
1622 if (arg->allow_vht)
1623 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
1624 if (arg->ht40plus)
1625 flags |= WMI_CHAN_FLAG_HT40_PLUS;
1626 if (arg->chan_radar)
1627 flags |= WMI_CHAN_FLAG_DFS;
1628
1629 ch->mhz = __cpu_to_le32(arg->freq);
1630 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
1631 ch->band_center_freq2 = 0;
1632 ch->min_power = arg->min_power;
1633 ch->max_power = arg->max_power;
1634 ch->reg_power = arg->max_reg_power;
1635 ch->antenna_max = arg->max_antenna_gain;
513527c8 1636 ch->max_tx_power = arg->max_power;
2d66721c
MK		 1637
1638 /* mode & flags share storage */
1639 ch->mode = arg->mode;
1640 ch->flags |= __cpu_to_le32(flags);
1641}
1642
5e3dd157
KV		 1643int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
1644{
9eea5689 1645 unsigned long time_left;
af762c0b 1646
9eea5689
NMG		 1647 time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
1648 WMI_SERVICE_READY_TIMEOUT_HZ);
1649 if (!time_left)
1650 return -ETIMEDOUT;
1651 return 0;
5e3dd157
KV		 1652}
1653
1654int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
1655{
9eea5689 1656 unsigned long time_left;
af762c0b 1657
9eea5689
NMG		 1658 time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
1659 WMI_UNIFIED_READY_TIMEOUT_HZ);
1660 if (!time_left)
1661 return -ETIMEDOUT;
1662 return 0;
5e3dd157
KV		 1663}
1664
666a73f3 1665struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
5e3dd157
KV		 1666{
1667 struct sk_buff *skb;
1668 u32 round_len = roundup(len, 4);
1669
7aa7a72a 1670 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
5e3dd157
KV		 1671 if (!skb)
1672 return NULL;
1673
1674 skb_reserve(skb, WMI_SKB_HEADROOM);
1675 if (!IS_ALIGNED((unsigned long)skb->data, 4))
7aa7a72a 1676 ath10k_warn(ar, "Unaligned WMI skb\n");
5e3dd157
KV		 1677
1678 skb_put(skb, round_len);
1679 memset(skb->data, 0, round_len);
1680
1681 return skb;
1682}
1683
1684static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
1685{
1686 dev_kfree_skb(skb);
5e3dd157
KV		 1687}
1688
d7579d12
MK		 1689int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
1690 u32 cmd_id)
5e3dd157
KV		 1691{
1692 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
1693 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 1694 int ret;
5e3dd157
KV		 1695 u32 cmd = 0;
1696
1697 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
1698 return -ENOMEM;
1699
1700 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
1701
1702 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
1703 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
1704
5e3dd157 1705 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943 1706 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
d35a6c18 1707 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
5e3dd157 1708
be8b3943
MK		 1709 if (ret)
1710 goto err_pull;
5e3dd157 1711
be8b3943
MK		 1712 return 0;
1713
1714err_pull:
1715 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
1716 return ret;
1717}
1718
ed54388a
MK		 1719static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
1720{
af21319f 1721 struct ath10k *ar = arvif->ar;
9ad50182 1722 struct ath10k_skb_cb *cb;
af21319f 1723 struct sk_buff *bcn;
66b8a010
MK		 1724 bool dtim_zero;
1725 bool deliver_cab;
ed54388a
MK		 1726 int ret;
1727
af21319f 1728 spin_lock_bh(&ar->data_lock);
ed54388a 1729
af21319f 1730 bcn = arvif->beacon;
ed54388a 1731
af21319f
MK		 1732 if (!bcn)
1733 goto unlock;
ed54388a 1734
9ad50182 1735 cb = ATH10K_SKB_CB(bcn);
ed54388a 1736
af21319f
MK		 1737 switch (arvif->beacon_state) {
1738 case ATH10K_BEACON_SENDING:
1739 case ATH10K_BEACON_SENT:
1740 break;
1741 case ATH10K_BEACON_SCHEDULED:
1742 arvif->beacon_state = ATH10K_BEACON_SENDING;
1743 spin_unlock_bh(&ar->data_lock);
1744
66b8a010
MK		 1745 dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
1746 deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
af21319f
MK		 1747 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
1748 arvif->vdev_id,
1749 bcn->data, bcn->len,
1750 cb->paddr,
66b8a010
MK		 1751 dtim_zero,
1752 deliver_cab);
af21319f
MK		 1753
1754 spin_lock_bh(&ar->data_lock);
1755
1756 if (ret == 0)
1757 arvif->beacon_state = ATH10K_BEACON_SENT;
1758 else
1759 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
1760 }
ed54388a 1761
af21319f
MK		 1762unlock:
1763 spin_unlock_bh(&ar->data_lock);
ed54388a
MK		 1764}
1765
1766static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1767 struct ieee80211_vif *vif)
1768{
1769 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
1770
1771 ath10k_wmi_tx_beacon_nowait(arvif);
1772}
1773
1774static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1775{
ed54388a
MK		 1776 ieee80211_iterate_active_interfaces_atomic(ar->hw,
1777 IEEE80211_IFACE_ITER_NORMAL,
1778 ath10k_wmi_tx_beacons_iter,
1779 NULL);
ed54388a
MK		 1780}
1781
12acbc43 1782static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 1783{
ed54388a
MK		 1784 /* try to send pending beacons first. they take priority */
1785 ath10k_wmi_tx_beacons_nowait(ar);
1786
be8b3943
MK		 1787 wake_up(&ar->wmi.tx_credits_wq);
1788}
1789
666a73f3 1790int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
be8b3943 1791{
34957b25 1792 int ret = -EOPNOTSUPP;
be8b3943 1793
56b84287
KV		 1794 might_sleep();
1795
34957b25 1796 if (cmd_id == WMI_CMD_UNSUPPORTED) {
7aa7a72a 1797 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
55321559
BM		 1798 cmd_id);
1799 return ret;
1800 }
be8b3943
MK		 1801
1802 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK		 1803 /* try to send pending beacons first. they take priority */
1804 ath10k_wmi_tx_beacons_nowait(ar);
1805
be8b3943 1806 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
7962b0d8
MK		 1807
1808 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1809 ret = -ESHUTDOWN;
1810
be8b3943 1811 (ret != -EAGAIN);
14e105cd 1812 }), 3 * HZ);
be8b3943
MK		 1813
1814 if (ret)
5e3dd157 1815 dev_kfree_skb_any(skb);
5e3dd157 1816
be8b3943 1817 return ret;
5e3dd157
KV		 1818}
1819
d7579d12
MK		 1820static struct sk_buff *
1821ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
5e00d31a 1822{
609db229
MK		 1823 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
1824 struct ath10k_vif *arvif = (void *)cb->vif->drv_priv;
5e00d31a
BM		 1825 struct wmi_mgmt_tx_cmd *cmd;
1826 struct ieee80211_hdr *hdr;
d7579d12 1827 struct sk_buff *skb;
5e00d31a 1828 int len;
609db229 1829 u32 vdev_id;
d7579d12 1830 u32 buf_len = msdu->len;
5e00d31a
BM		 1831 u16 fc;
1832
d7579d12 1833 hdr = (struct ieee80211_hdr *)msdu->data;
5e00d31a
BM		 1834 fc = le16_to_cpu(hdr->frame_control);
1835
609db229
MK		 1836 if (cb->vif)
1837 vdev_id = arvif->vdev_id;
1838 else
1839 vdev_id = 0;
1840
5e00d31a 1841 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
d7579d12 1842 return ERR_PTR(-EINVAL);
5e00d31a 1843
d7579d12 1844 len = sizeof(cmd->hdr) + msdu->len;
eeab266c
MK		 1845
1846 if ((ieee80211_is_action(hdr->frame_control) ||
1847 ieee80211_is_deauth(hdr->frame_control) ||
1848 ieee80211_is_disassoc(hdr->frame_control)) &&
1849 ieee80211_has_protected(hdr->frame_control)) {
1850 len += IEEE80211_CCMP_MIC_LEN;
1851 buf_len += IEEE80211_CCMP_MIC_LEN;
1852 }
1853
5e00d31a
BM		 1854 len = round_up(len, 4);
1855
d7579d12
MK		 1856 skb = ath10k_wmi_alloc_skb(ar, len);
1857 if (!skb)
1858 return ERR_PTR(-ENOMEM);
5e00d31a 1859
d7579d12 1860 cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
5e00d31a 1861
609db229 1862 cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
5e00d31a
BM		 1863 cmd->hdr.tx_rate = 0;
1864 cmd->hdr.tx_power = 0;
eeab266c 1865 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
5e00d31a 1866
b25f32cb 1867 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
d7579d12 1868 memcpy(cmd->buf, msdu->data, msdu->len);
5e00d31a 1869
7aa7a72a 1870 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
d7579d12 1871 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
5e00d31a 1872 fc & IEEE80211_FCTL_STYPE);
5ce8e7fd
RM		 1873 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
1874 trace_ath10k_tx_payload(ar, skb->data, skb->len);
5e00d31a 1875
d7579d12 1876 return skb;
5e00d31a
BM		 1877}
1878
5c81c7fd
MK		 1879static void ath10k_wmi_event_scan_started(struct ath10k *ar)
1880{
1881 lockdep_assert_held(&ar->data_lock);
1882
1883 switch (ar->scan.state) {
1884 case ATH10K_SCAN_IDLE:
1885 case ATH10K_SCAN_RUNNING:
1886 case ATH10K_SCAN_ABORTING:
7aa7a72a 1887 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1888 ath10k_scan_state_str(ar->scan.state),
1889 ar->scan.state);
1890 break;
1891 case ATH10K_SCAN_STARTING:
1892 ar->scan.state = ATH10K_SCAN_RUNNING;
1893
1894 if (ar->scan.is_roc)
1895 ieee80211_ready_on_channel(ar->hw);
1896
1897 complete(&ar->scan.started);
1898 break;
1899 }
1900}
1901
2f9eec0b
BG		 1902static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
1903{
1904 lockdep_assert_held(&ar->data_lock);
1905
1906 switch (ar->scan.state) {
1907 case ATH10K_SCAN_IDLE:
1908 case ATH10K_SCAN_RUNNING:
1909 case ATH10K_SCAN_ABORTING:
1910 ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
1911 ath10k_scan_state_str(ar->scan.state),
1912 ar->scan.state);
1913 break;
1914 case ATH10K_SCAN_STARTING:
1915 complete(&ar->scan.started);
1916 __ath10k_scan_finish(ar);
1917 break;
1918 }
1919}
1920
5c81c7fd
MK		 1921static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
1922{
1923 lockdep_assert_held(&ar->data_lock);
1924
1925 switch (ar->scan.state) {
1926 case ATH10K_SCAN_IDLE:
1927 case ATH10K_SCAN_STARTING:
1928 /* One suspected reason scan can be completed while starting is
1929 * if firmware fails to deliver all scan events to the host,
1930 * e.g. when transport pipe is full. This has been observed
1931 * with spectral scan phyerr events starving wmi transport
1932 * pipe. In such case the "scan completed" event should be (and
1933 * is) ignored by the host as it may be just firmware's scan
1934 * state machine recovering.
1935 */
7aa7a72a 1936 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1937 ath10k_scan_state_str(ar->scan.state),
1938 ar->scan.state);
1939 break;
1940 case ATH10K_SCAN_RUNNING:
1941 case ATH10K_SCAN_ABORTING:
1942 __ath10k_scan_finish(ar);
1943 break;
1944 }
1945}
1946
1947static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
1948{
1949 lockdep_assert_held(&ar->data_lock);
1950
1951 switch (ar->scan.state) {
1952 case ATH10K_SCAN_IDLE:
1953 case ATH10K_SCAN_STARTING:
7aa7a72a 1954 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1955 ath10k_scan_state_str(ar->scan.state),
1956 ar->scan.state);
1957 break;
1958 case ATH10K_SCAN_RUNNING:
1959 case ATH10K_SCAN_ABORTING:
1960 ar->scan_channel = NULL;
1961 break;
1962 }
1963}
1964
1965static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
1966{
1967 lockdep_assert_held(&ar->data_lock);
1968
1969 switch (ar->scan.state) {
1970 case ATH10K_SCAN_IDLE:
1971 case ATH10K_SCAN_STARTING:
7aa7a72a 1972 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1973 ath10k_scan_state_str(ar->scan.state),
1974 ar->scan.state);
1975 break;
1976 case ATH10K_SCAN_RUNNING:
1977 case ATH10K_SCAN_ABORTING:
1978 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
1979
1980 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
1981 complete(&ar->scan.on_channel);
1982 break;
1983 }
1984}
1985
9ff8b724
MK		 1986static const char *
1987ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
1988 enum wmi_scan_completion_reason reason)
1989{
1990 switch (type) {
1991 case WMI_SCAN_EVENT_STARTED:
1992 return "started";
1993 case WMI_SCAN_EVENT_COMPLETED:
1994 switch (reason) {
1995 case WMI_SCAN_REASON_COMPLETED:
1996 return "completed";
1997 case WMI_SCAN_REASON_CANCELLED:
1998 return "completed [cancelled]";
1999 case WMI_SCAN_REASON_PREEMPTED:
2000 return "completed [preempted]";
2001 case WMI_SCAN_REASON_TIMEDOUT:
2002 return "completed [timedout]";
b2297baa
RM		 2003 case WMI_SCAN_REASON_INTERNAL_FAILURE:
2004 return "completed [internal err]";
9ff8b724
MK		 2005 case WMI_SCAN_REASON_MAX:
2006 break;
2007 }
2008 return "completed [unknown]";
2009 case WMI_SCAN_EVENT_BSS_CHANNEL:
2010 return "bss channel";
2011 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2012 return "foreign channel";
2013 case WMI_SCAN_EVENT_DEQUEUED:
2014 return "dequeued";
2015 case WMI_SCAN_EVENT_PREEMPTED:
2016 return "preempted";
2017 case WMI_SCAN_EVENT_START_FAILED:
2018 return "start failed";
b2297baa
RM		 2019 case WMI_SCAN_EVENT_RESTARTED:
2020 return "restarted";
2021 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2022 return "foreign channel exit";
9ff8b724
MK		 2023 default:
2024 return "unknown";
2025 }
2026}
2027
d7579d12
MK		 2028static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
2029 struct wmi_scan_ev_arg *arg)
32653cf1
MK		 2030{
2031 struct wmi_scan_event *ev = (void *)skb->data;
2032
2033 if (skb->len < sizeof(*ev))
2034 return -EPROTO;
2035
2036 skb_pull(skb, sizeof(*ev));
2037 arg->event_type = ev->event_type;
2038 arg->reason = ev->reason;
2039 arg->channel_freq = ev->channel_freq;
2040 arg->scan_req_id = ev->scan_req_id;
2041 arg->scan_id = ev->scan_id;
2042 arg->vdev_id = ev->vdev_id;
2043
2044 return 0;
2045}
2046
0226d602 2047int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2048{
32653cf1 2049 struct wmi_scan_ev_arg arg = {};
5e3dd157
KV		 2050 enum wmi_scan_event_type event_type;
2051 enum wmi_scan_completion_reason reason;
2052 u32 freq;
2053 u32 req_id;
2054 u32 scan_id;
2055 u32 vdev_id;
32653cf1 2056 int ret;
5e3dd157 2057
d7579d12 2058 ret = ath10k_wmi_pull_scan(ar, skb, &arg);
32653cf1
MK		 2059 if (ret) {
2060 ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
2061 return ret;
2062 }
2063
2064 event_type = __le32_to_cpu(arg.event_type);
2065 reason = __le32_to_cpu(arg.reason);
2066 freq = __le32_to_cpu(arg.channel_freq);
2067 req_id = __le32_to_cpu(arg.scan_req_id);
2068 scan_id = __le32_to_cpu(arg.scan_id);
2069 vdev_id = __le32_to_cpu(arg.vdev_id);
5e3dd157 2070
5c81c7fd
MK		 2071 spin_lock_bh(&ar->data_lock);
2072
7aa7a72a 2073 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c81c7fd 2074 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
9ff8b724 2075 ath10k_wmi_event_scan_type_str(event_type, reason),
5c81c7fd
MK		 2076 event_type, reason, freq, req_id, scan_id, vdev_id,
2077 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
5e3dd157
KV		 2078
2079 switch (event_type) {
2080 case WMI_SCAN_EVENT_STARTED:
5c81c7fd 2081 ath10k_wmi_event_scan_started(ar);
5e3dd157
KV		 2082 break;
2083 case WMI_SCAN_EVENT_COMPLETED:
5c81c7fd 2084 ath10k_wmi_event_scan_completed(ar);
5e3dd157
KV		 2085 break;
2086 case WMI_SCAN_EVENT_BSS_CHANNEL:
5c81c7fd 2087 ath10k_wmi_event_scan_bss_chan(ar);
5e3dd157
KV		 2088 break;
2089 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
5c81c7fd
MK		 2090 ath10k_wmi_event_scan_foreign_chan(ar, freq);
2091 break;
2092 case WMI_SCAN_EVENT_START_FAILED:
7aa7a72a 2093 ath10k_warn(ar, "received scan start failure event\n");
2f9eec0b 2094 ath10k_wmi_event_scan_start_failed(ar);
5e3dd157
KV		 2095 break;
2096 case WMI_SCAN_EVENT_DEQUEUED:
5e3dd157 2097 case WMI_SCAN_EVENT_PREEMPTED:
b2297baa
RM		 2098 case WMI_SCAN_EVENT_RESTARTED:
2099 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
5e3dd157
KV		 2100 default:
2101 break;
2102 }
2103
2104 spin_unlock_bh(&ar->data_lock);
2105 return 0;
2106}
2107
504f6cdf
SM		 2108/* If keys are configured, HW decrypts all frames
2109 * with protected bit set. Mark such frames as decrypted.
2110 */
2111static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
2112 struct sk_buff *skb,
2113 struct ieee80211_rx_status *status)
2114{
2115 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2116 unsigned int hdrlen;
2117 bool peer_key;
2118 u8 *addr, keyidx;
2119
2120 if (!ieee80211_is_auth(hdr->frame_control) ||
2121 !ieee80211_has_protected(hdr->frame_control))
2122 return;
2123
2124 hdrlen = ieee80211_hdrlen(hdr->frame_control);
2125 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
2126 return;
2127
2128 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
2129 addr = ieee80211_get_SA(hdr);
2130
2131 spin_lock_bh(&ar->data_lock);
2132 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
2133 spin_unlock_bh(&ar->data_lock);
2134
2135 if (peer_key) {
2136 ath10k_dbg(ar, ATH10K_DBG_MAC,
2137 "mac wep key present for peer %pM\n", addr);
2138 status->flag |= RX_FLAG_DECRYPTED;
2139 }
2140}
2141
d7579d12
MK		 2142static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
2143 struct wmi_mgmt_rx_ev_arg *arg)
5e3dd157 2144{
0d9b0438
MK		 2145 struct wmi_mgmt_rx_event_v1 *ev_v1;
2146 struct wmi_mgmt_rx_event_v2 *ev_v2;
2147 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
8d130963 2148 struct wmi_mgmt_rx_ext_info *ext_info;
32653cf1
MK		 2149 size_t pull_len;
2150 u32 msdu_len;
8d130963 2151 u32 len;
32653cf1 2152
c4cdf753
KV		 2153 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
2154 ar->running_fw->fw_file.fw_features)) {
32653cf1
MK		 2155 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
2156 ev_hdr = &ev_v2->hdr.v1;
2157 pull_len = sizeof(*ev_v2);
2158 } else {
2159 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
2160 ev_hdr = &ev_v1->hdr;
2161 pull_len = sizeof(*ev_v1);
2162 }
2163
2164 if (skb->len < pull_len)
2165 return -EPROTO;
2166
2167 skb_pull(skb, pull_len);
2168 arg->channel = ev_hdr->channel;
2169 arg->buf_len = ev_hdr->buf_len;
2170 arg->status = ev_hdr->status;
2171 arg->snr = ev_hdr->snr;
2172 arg->phy_mode = ev_hdr->phy_mode;
2173 arg->rate = ev_hdr->rate;
2174
2175 msdu_len = __le32_to_cpu(arg->buf_len);
2176 if (skb->len < msdu_len)
2177 return -EPROTO;
2178
8d130963
PO		 2179 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2180 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2181 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2182 memcpy(&arg->ext_info, ext_info,
2183 sizeof(struct wmi_mgmt_rx_ext_info));
2184 }
32653cf1
MK		 2185 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
2186 * trailer with credit update. Trim the excess garbage.
2187 */
2188 skb_trim(skb, msdu_len);
2189
2190 return 0;
2191}
2192
1c092961
RM		 2193static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
2194 struct sk_buff *skb,
2195 struct wmi_mgmt_rx_ev_arg *arg)
2196{
2197 struct wmi_10_4_mgmt_rx_event *ev;
2198 struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
2199 size_t pull_len;
2200 u32 msdu_len;
7d5efd08
PO		 2201 struct wmi_mgmt_rx_ext_info *ext_info;
2202 u32 len;
1c092961
RM		 2203
2204 ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
2205 ev_hdr = &ev->hdr;
2206 pull_len = sizeof(*ev);
2207
2208 if (skb->len < pull_len)
2209 return -EPROTO;
2210
2211 skb_pull(skb, pull_len);
2212 arg->channel = ev_hdr->channel;
2213 arg->buf_len = ev_hdr->buf_len;
2214 arg->status = ev_hdr->status;
2215 arg->snr = ev_hdr->snr;
2216 arg->phy_mode = ev_hdr->phy_mode;
2217 arg->rate = ev_hdr->rate;
2218
2219 msdu_len = __le32_to_cpu(arg->buf_len);
2220 if (skb->len < msdu_len)
2221 return -EPROTO;
2222
7d5efd08
PO		 2223 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2224 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2225 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2226 memcpy(&arg->ext_info, ext_info,
2227 sizeof(struct wmi_mgmt_rx_ext_info));
2228 }
2229
1c092961
RM		 2230 /* Make sure bytes added for padding are removed. */
2231 skb_trim(skb, msdu_len);
2232
2233 return 0;
2234}
2235
0226d602 2236int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
32653cf1
MK		 2237{
2238 struct wmi_mgmt_rx_ev_arg arg = {};
5e3dd157
KV		 2239 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
2240 struct ieee80211_hdr *hdr;
01cebe1c 2241 struct ieee80211_supported_band *sband;
5e3dd157
KV		 2242 u32 rx_status;
2243 u32 channel;
2244 u32 phy_mode;
2245 u32 snr;
2246 u32 rate;
2247 u32 buf_len;
2248 u16 fc;
32653cf1 2249 int ret;
0d9b0438 2250
d7579d12 2251 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
32653cf1
MK		 2252 if (ret) {
2253 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
08603f2e 2254 dev_kfree_skb(skb);
32653cf1 2255 return ret;
0d9b0438 2256 }
5e3dd157 2257
32653cf1
MK		 2258 channel = __le32_to_cpu(arg.channel);
2259 buf_len = __le32_to_cpu(arg.buf_len);
2260 rx_status = __le32_to_cpu(arg.status);
2261 snr = __le32_to_cpu(arg.snr);
2262 phy_mode = __le32_to_cpu(arg.phy_mode);
2263 rate = __le32_to_cpu(arg.rate);
5e3dd157
KV		 2264
2265 memset(status, 0, sizeof(*status));
2266
7aa7a72a 2267 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 2268 "event mgmt rx status %08x\n", rx_status);
2269
2c9bcece
MP		 2270 if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
2271 (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
2272 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
d67d0a02
MK		 2273 dev_kfree_skb(skb);
2274 return 0;
2275 }
2276
5e3dd157
KV		 2277 if (rx_status & WMI_RX_STATUS_ERR_MIC)
2278 status->flag |= RX_FLAG_MMIC_ERROR;
2279
8d130963
PO		 2280 if (rx_status & WMI_RX_STATUS_EXT_INFO) {
2281 status->mactime =
2282 __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
2283 status->flag |= RX_FLAG_MACTIME_END;
2284 }
21040bf9 2285 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
453cdb61 2286 * MODE_11B. This means phy_mode is not a reliable source for the band
21040bf9
MK		 2287 * of mgmt rx.
2288 */
2289 if (channel >= 1 && channel <= 14) {
57fbcce3 2290 status->band = NL80211_BAND_2GHZ;
21040bf9 2291 } else if (channel >= 36 && channel <= 165) {
57fbcce3 2292 status->band = NL80211_BAND_5GHZ;
453cdb61 2293 } else {
21040bf9
MK		 2294 /* Shouldn't happen unless list of advertised channels to
2295 * mac80211 has been changed.
2296 */
2297 WARN_ON_ONCE(1);
2298 dev_kfree_skb(skb);
2299 return 0;
453cdb61
MK		 2300 }
2301
57fbcce3 2302 if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
21040bf9
MK		 2303 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
2304
01cebe1c
MK		 2305 sband = &ar->mac.sbands[status->band];
2306
5e3dd157
KV		 2307 status->freq = ieee80211_channel_to_frequency(channel, status->band);
2308 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
01cebe1c 2309 status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
5e3dd157 2310
5e3dd157
KV		 2311 hdr = (struct ieee80211_hdr *)skb->data;
2312 fc = le16_to_cpu(hdr->frame_control);
2313
60549cab
GB		 2314 /* Firmware is guaranteed to report all essential management frames via
2315 * WMI while it can deliver some extra via HTT. Since there can be
2316 * duplicates split the reporting wrt monitor/sniffing.
2317 */
2318 status->flag |= RX_FLAG_SKIP_MONITOR;
2319
504f6cdf
SM		 2320 ath10k_wmi_handle_wep_reauth(ar, skb, status);
2321
2b6a6a90
MK		 2322 /* FW delivers WEP Shared Auth frame with Protected Bit set and
2323 * encrypted payload. However in case of PMF it delivers decrypted
2324 * frames with Protected Bit set. */
2325 if (ieee80211_has_protected(hdr->frame_control) &&
2326 !ieee80211_is_auth(hdr->frame_control)) {
eeab266c
MK		 2327 status->flag |= RX_FLAG_DECRYPTED;
2328
2329 if (!ieee80211_is_action(hdr->frame_control) &&
2330 !ieee80211_is_deauth(hdr->frame_control) &&
2331 !ieee80211_is_disassoc(hdr->frame_control)) {
2332 status->flag |= RX_FLAG_IV_STRIPPED |
2333 RX_FLAG_MMIC_STRIPPED;
2334 hdr->frame_control = __cpu_to_le16(fc &
5e3dd157 2335 ~IEEE80211_FCTL_PROTECTED);
eeab266c 2336 }
5e3dd157
KV		 2337 }
2338
cc9904e6
MK		 2339 if (ieee80211_is_beacon(hdr->frame_control))
2340 ath10k_mac_handle_beacon(ar, skb);
2341
7aa7a72a 2342 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 2343 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
2344 skb, skb->len,
2345 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
2346
7aa7a72a 2347 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 2348 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
2349 status->freq, status->band, status->signal,
2350 status->rate_idx);
2351
5e3dd157
KV		 2352 ieee80211_rx(ar->hw, skb);
2353 return 0;
2354}
2355
2e1dea40
MK		 2356static int freq_to_idx(struct ath10k *ar, int freq)
2357{
2358 struct ieee80211_supported_band *sband;
2359 int band, ch, idx = 0;
2360
57fbcce3 2361 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
2e1dea40
MK		 2362 sband = ar->hw->wiphy->bands[band];
2363 if (!sband)
2364 continue;
2365
2366 for (ch = 0; ch < sband->n_channels; ch++, idx++)
2367 if (sband->channels[ch].center_freq == freq)
2368 goto exit;
2369 }
2370
2371exit:
2372 return idx;
2373}
2374
d7579d12
MK		 2375static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
2376 struct wmi_ch_info_ev_arg *arg)
32653cf1
MK		 2377{
2378 struct wmi_chan_info_event *ev = (void *)skb->data;
2379
2380 if (skb->len < sizeof(*ev))
2381 return -EPROTO;
2382
2383 skb_pull(skb, sizeof(*ev));
2384 arg->err_code = ev->err_code;
2385 arg->freq = ev->freq;
2386 arg->cmd_flags = ev->cmd_flags;
2387 arg->noise_floor = ev->noise_floor;
2388 arg->rx_clear_count = ev->rx_clear_count;
2389 arg->cycle_count = ev->cycle_count;
2390
2391 return 0;
2392}
2393
b2297baa
RM		 2394static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
2395 struct sk_buff *skb,
2396 struct wmi_ch_info_ev_arg *arg)
2397{
2398 struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
2399
2400 if (skb->len < sizeof(*ev))
2401 return -EPROTO;
2402
2403 skb_pull(skb, sizeof(*ev));
2404 arg->err_code = ev->err_code;
2405 arg->freq = ev->freq;
2406 arg->cmd_flags = ev->cmd_flags;
2407 arg->noise_floor = ev->noise_floor;
2408 arg->rx_clear_count = ev->rx_clear_count;
2409 arg->cycle_count = ev->cycle_count;
2410 arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
2411 arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
2412 arg->rx_frame_count = ev->rx_frame_count;
2413
2414 return 0;
2415}
2416
0226d602 2417void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2418{
32653cf1 2419 struct wmi_ch_info_ev_arg arg = {};
2e1dea40
MK		 2420 struct survey_info *survey;
2421 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
32653cf1 2422 int idx, ret;
2e1dea40 2423
d7579d12 2424 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
32653cf1
MK		 2425 if (ret) {
2426 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
2427 return;
2428 }
2e1dea40 2429
32653cf1
MK		 2430 err_code = __le32_to_cpu(arg.err_code);
2431 freq = __le32_to_cpu(arg.freq);
2432 cmd_flags = __le32_to_cpu(arg.cmd_flags);
2433 noise_floor = __le32_to_cpu(arg.noise_floor);
2434 rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
2435 cycle_count = __le32_to_cpu(arg.cycle_count);
2e1dea40 2436
7aa7a72a 2437 ath10k_dbg(ar, ATH10K_DBG_WMI,
2e1dea40
MK		 2438 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
2439 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
2440 cycle_count);
2441
2442 spin_lock_bh(&ar->data_lock);
2443
5c81c7fd
MK		 2444 switch (ar->scan.state) {
2445 case ATH10K_SCAN_IDLE:
2446 case ATH10K_SCAN_STARTING:
7aa7a72a 2447 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
2e1dea40 2448 goto exit;
5c81c7fd
MK		 2449 case ATH10K_SCAN_RUNNING:
2450 case ATH10K_SCAN_ABORTING:
2451 break;
2e1dea40
MK		 2452 }
2453
2454 idx = freq_to_idx(ar, freq);
2455 if (idx >= ARRAY_SIZE(ar->survey)) {
7aa7a72a 2456 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2e1dea40
MK		 2457 freq, idx);
2458 goto exit;
2459 }
2460
2461 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
44b7d483
MK		 2462 if (ar->ch_info_can_report_survey) {
2463 survey = &ar->survey[idx];
2464 survey->noise = noise_floor;
2465 survey->filled = SURVEY_INFO_NOISE_DBM;
2466
2467 ath10k_hw_fill_survey_time(ar,
2468 survey,
2469 cycle_count,
2470 rx_clear_count,
2471 ar->survey_last_cycle_count,
2472 ar->survey_last_rx_clear_count);
2473 }
2474
2475 ar->ch_info_can_report_survey = false;
2476 } else {
2477 ar->ch_info_can_report_survey = true;
2e1dea40
MK		 2478 }
2479
3d2a2e29
VT		 2480 if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
2481 ar->survey_last_rx_clear_count = rx_clear_count;
2482 ar->survey_last_cycle_count = cycle_count;
2483 }
2e1dea40
MK		 2484
2485exit:
2486 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 2487}
2488
0226d602 2489void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2490{
7aa7a72a 2491 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
5e3dd157
KV		 2492}
2493
0226d602 2494int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2495{
7aa7a72a 2496 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
869526b9
KV		 2497 skb->len);
2498
d35a6c18 2499 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
869526b9
KV		 2500
2501 return 0;
5e3dd157
KV		 2502}
2503
b91251fb
MK		 2504void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
2505 struct ath10k_fw_stats_pdev *dst)
d15fb520 2506{
d15fb520
MK		 2507 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
2508 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
2509 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
2510 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
2511 dst->cycle_count = __le32_to_cpu(src->cycle_count);
2512 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
2513 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
b91251fb 2514}
d15fb520 2515
b91251fb
MK		 2516void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
2517 struct ath10k_fw_stats_pdev *dst)
2518{
2519 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2520 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2521 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2522 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2523 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2524 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2525 dst->local_freed = __le32_to_cpu(src->local_freed);
2526 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2527 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2528 dst->underrun = __le32_to_cpu(src->underrun);
2529 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2530 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2531 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2532 dst->data_rc = __le32_to_cpu(src->data_rc);
2533 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2534 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2535 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2536 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2537 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2538 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2539 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2540 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2541}
d15fb520 2542
98dd2b92
MP		 2543static void
2544ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
2545 struct ath10k_fw_stats_pdev *dst)
2546{
2547 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2548 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2549 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2550 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2551 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2552 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2553 dst->local_freed = __le32_to_cpu(src->local_freed);
2554 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2555 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2556 dst->underrun = __le32_to_cpu(src->underrun);
2557 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2558 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2559 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2560 dst->data_rc = __le32_to_cpu(src->data_rc);
2561 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2562 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2563 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2564 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2565 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2566 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2567 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2568 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2569 dst->hw_paused = __le32_to_cpu(src->hw_paused);
2570 dst->seq_posted = __le32_to_cpu(src->seq_posted);
2571 dst->seq_failed_queueing =
2572 __le32_to_cpu(src->seq_failed_queueing);
2573 dst->seq_completed = __le32_to_cpu(src->seq_completed);
2574 dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
2575 dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
2576 dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
2577 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2578 dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
2579 dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
2580 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2581 dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
2582}
2583
b91251fb
MK		 2584void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
2585 struct ath10k_fw_stats_pdev *dst)
2586{
2587 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
2588 dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
2589 dst->r0_frags = __le32_to_cpu(src->r0_frags);
2590 dst->r1_frags = __le32_to_cpu(src->r1_frags);
2591 dst->r2_frags = __le32_to_cpu(src->r2_frags);
2592 dst->r3_frags = __le32_to_cpu(src->r3_frags);
2593 dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
2594 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
2595 dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
2596 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
2597 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
2598 dst->phy_errs = __le32_to_cpu(src->phy_errs);
2599 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
2600 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
2601}
2602
2603void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
2604 struct ath10k_fw_stats_pdev *dst)
2605{
2606 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
2607 dst->rts_bad = __le32_to_cpu(src->rts_bad);
2608 dst->rts_good = __le32_to_cpu(src->rts_good);
2609 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
2610 dst->no_beacons = __le32_to_cpu(src->no_beacons);
2611 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
d15fb520
MK		 2612}
2613
0226d602
MK		 2614void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
2615 struct ath10k_fw_stats_peer *dst)
d15fb520
MK		 2616{
2617 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2618 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2619 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2620}
2621
f9575793
MSS		 2622static void
2623ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
2624 struct ath10k_fw_stats_peer *dst)
2625{
2626 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2627 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2628 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2629 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2630}
2631
d7579d12
MK		 2632static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
2633 struct sk_buff *skb,
2634 struct ath10k_fw_stats *stats)
d15fb520
MK		 2635{
2636 const struct wmi_stats_event *ev = (void *)skb->data;
2637 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
2638 int i;
2639
2640 if (!skb_pull(skb, sizeof(*ev)))
2641 return -EPROTO;
2642
2643 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2644 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2645 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2646
5326849a 2647 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 2648 const struct wmi_pdev_stats *src;
5326849a 2649 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK		 2650
2651 src = (void *)skb->data;
2652 if (!skb_pull(skb, sizeof(*src)))
2653 return -EPROTO;
2654
5326849a
MK		 2655 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2656 if (!dst)
2657 continue;
2658
b91251fb
MK		 2659 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2660 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2661 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2662
5326849a 2663 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK		 2664 }
2665
2666 /* fw doesn't implement vdev stats */
2667
2668 for (i = 0; i < num_peer_stats; i++) {
2669 const struct wmi_peer_stats *src;
5326849a 2670 struct ath10k_fw_stats_peer *dst;
d15fb520
MK		 2671
2672 src = (void *)skb->data;
2673 if (!skb_pull(skb, sizeof(*src)))
2674 return -EPROTO;
2675
5326849a
MK		 2676 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2677 if (!dst)
2678 continue;
2679
2680 ath10k_wmi_pull_peer_stats(src, dst);
2681 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK		 2682 }
2683
2684 return 0;
2685}
2686
d7579d12
MK		 2687static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
2688 struct sk_buff *skb,
2689 struct ath10k_fw_stats *stats)
d15fb520
MK		 2690{
2691 const struct wmi_stats_event *ev = (void *)skb->data;
2692 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
2693 int i;
2694
2695 if (!skb_pull(skb, sizeof(*ev)))
2696 return -EPROTO;
2697
2698 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2699 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2700 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2701
5326849a 2702 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 2703 const struct wmi_10x_pdev_stats *src;
5326849a 2704 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK		 2705
2706 src = (void *)skb->data;
2707 if (!skb_pull(skb, sizeof(*src)))
2708 return -EPROTO;
2709
5326849a
MK		 2710 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2711 if (!dst)
2712 continue;
2713
b91251fb
MK		 2714 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2715 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2716 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2717 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
d15fb520 2718
5326849a 2719 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK		 2720 }
2721
2722 /* fw doesn't implement vdev stats */
2723
2724 for (i = 0; i < num_peer_stats; i++) {
2725 const struct wmi_10x_peer_stats *src;
5326849a 2726 struct ath10k_fw_stats_peer *dst;
d15fb520
MK		 2727
2728 src = (void *)skb->data;
2729 if (!skb_pull(skb, sizeof(*src)))
2730 return -EPROTO;
2731
5326849a
MK		 2732 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2733 if (!dst)
2734 continue;
2735
2736 ath10k_wmi_pull_peer_stats(&src->old, dst);
2737
2738 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
d15fb520 2739
5326849a 2740 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK		 2741 }
2742
2743 return 0;
2744}
2745
20de2229
MK		 2746static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
2747 struct sk_buff *skb,
2748 struct ath10k_fw_stats *stats)
2749{
2750 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2751 u32 num_pdev_stats;
2752 u32 num_pdev_ext_stats;
2753 u32 num_vdev_stats;
2754 u32 num_peer_stats;
2755 int i;
2756
2757 if (!skb_pull(skb, sizeof(*ev)))
2758 return -EPROTO;
2759
2760 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2761 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2762 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2763 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2764
2765 for (i = 0; i < num_pdev_stats; i++) {
2766 const struct wmi_10_2_pdev_stats *src;
2767 struct ath10k_fw_stats_pdev *dst;
2768
2769 src = (void *)skb->data;
2770 if (!skb_pull(skb, sizeof(*src)))
2771 return -EPROTO;
2772
2773 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2774 if (!dst)
2775 continue;
2776
2777 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2778 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2779 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2780 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2781 /* FIXME: expose 10.2 specific values */
2782
2783 list_add_tail(&dst->list, &stats->pdevs);
2784 }
2785
2786 for (i = 0; i < num_pdev_ext_stats; i++) {
2787 const struct wmi_10_2_pdev_ext_stats *src;
2788
2789 src = (void *)skb->data;
2790 if (!skb_pull(skb, sizeof(*src)))
2791 return -EPROTO;
2792
2793 /* FIXME: expose values to userspace
2794 *
2795 * Note: Even though this loop seems to do nothing it is
2796 * required to parse following sub-structures properly.
2797 */
2798 }
2799
2800 /* fw doesn't implement vdev stats */
2801
2802 for (i = 0; i < num_peer_stats; i++) {
2803 const struct wmi_10_2_peer_stats *src;
2804 struct ath10k_fw_stats_peer *dst;
2805
2806 src = (void *)skb->data;
2807 if (!skb_pull(skb, sizeof(*src)))
2808 return -EPROTO;
2809
2810 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2811 if (!dst)
2812 continue;
2813
2814 ath10k_wmi_pull_peer_stats(&src->old, dst);
2815
2816 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2817 /* FIXME: expose 10.2 specific values */
2818
2819 list_add_tail(&dst->list, &stats->peers);
2820 }
2821
2822 return 0;
2823}
2824
2825static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
2826 struct sk_buff *skb,
2827 struct ath10k_fw_stats *stats)
2828{
2829 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2830 u32 num_pdev_stats;
2831 u32 num_pdev_ext_stats;
2832 u32 num_vdev_stats;
2833 u32 num_peer_stats;
2834 int i;
2835
2836 if (!skb_pull(skb, sizeof(*ev)))
2837 return -EPROTO;
2838
2839 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2840 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2841 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2842 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2843
2844 for (i = 0; i < num_pdev_stats; i++) {
2845 const struct wmi_10_2_pdev_stats *src;
2846 struct ath10k_fw_stats_pdev *dst;
2847
2848 src = (void *)skb->data;
2849 if (!skb_pull(skb, sizeof(*src)))
2850 return -EPROTO;
2851
2852 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2853 if (!dst)
2854 continue;
2855
2856 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2857 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2858 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2859 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2860 /* FIXME: expose 10.2 specific values */
2861
2862 list_add_tail(&dst->list, &stats->pdevs);
2863 }
2864
2865 for (i = 0; i < num_pdev_ext_stats; i++) {
2866 const struct wmi_10_2_pdev_ext_stats *src;
2867
2868 src = (void *)skb->data;
2869 if (!skb_pull(skb, sizeof(*src)))
2870 return -EPROTO;
2871
2872 /* FIXME: expose values to userspace
2873 *
2874 * Note: Even though this loop seems to do nothing it is
2875 * required to parse following sub-structures properly.
2876 */
2877 }
2878
2879 /* fw doesn't implement vdev stats */
2880
2881 for (i = 0; i < num_peer_stats; i++) {
de46c015 2882 const struct wmi_10_2_4_ext_peer_stats *src;
20de2229 2883 struct ath10k_fw_stats_peer *dst;
de46c015 2884 int stats_len;
de46c015 2885
cc61a1bb 2886 if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
de46c015
MSS		 2887 stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
2888 else
2889 stats_len = sizeof(struct wmi_10_2_4_peer_stats);
20de2229
MK		 2890
2891 src = (void *)skb->data;
de46c015 2892 if (!skb_pull(skb, stats_len))
20de2229
MK		 2893 return -EPROTO;
2894
2895 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2896 if (!dst)
2897 continue;
2898
2899 ath10k_wmi_pull_peer_stats(&src->common.old, dst);
2900
2901 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
de46c015 2902
cc61a1bb 2903 if (ath10k_peer_stats_enabled(ar))
de46c015 2904 dst->rx_duration = __le32_to_cpu(src->rx_duration);
20de2229
MK		 2905 /* FIXME: expose 10.2 specific values */
2906
2907 list_add_tail(&dst->list, &stats->peers);
2908 }
2909
2910 return 0;
2911}
2912
98dd2b92
MP		 2913static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
2914 struct sk_buff *skb,
2915 struct ath10k_fw_stats *stats)
2916{
2917 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2918 u32 num_pdev_stats;
2919 u32 num_pdev_ext_stats;
2920 u32 num_vdev_stats;
2921 u32 num_peer_stats;
f9575793 2922 u32 stats_id;
98dd2b92
MP		 2923 int i;
2924
2925 if (!skb_pull(skb, sizeof(*ev)))
2926 return -EPROTO;
2927
2928 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2929 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2930 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2931 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
f9575793 2932 stats_id = __le32_to_cpu(ev->stats_id);
98dd2b92
MP		 2933
2934 for (i = 0; i < num_pdev_stats; i++) {
2935 const struct wmi_10_4_pdev_stats *src;
2936 struct ath10k_fw_stats_pdev *dst;
2937
2938 src = (void *)skb->data;
2939 if (!skb_pull(skb, sizeof(*src)))
2940 return -EPROTO;
2941
2942 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2943 if (!dst)
2944 continue;
2945
2946 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2947 ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
2948 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2949 dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
2950 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2951
2952 list_add_tail(&dst->list, &stats->pdevs);
2953 }
2954
2955 for (i = 0; i < num_pdev_ext_stats; i++) {
2956 const struct wmi_10_2_pdev_ext_stats *src;
2957
2958 src = (void *)skb->data;
2959 if (!skb_pull(skb, sizeof(*src)))
2960 return -EPROTO;
2961
2962 /* FIXME: expose values to userspace
2963 *
2964 * Note: Even though this loop seems to do nothing it is
2965 * required to parse following sub-structures properly.
2966 */
2967 }
2968
2969 /* fw doesn't implement vdev stats */
2970
2971 for (i = 0; i < num_peer_stats; i++) {
f9575793 2972 const struct wmi_10_4_peer_extd_stats *src;
98dd2b92 2973 struct ath10k_fw_stats_peer *dst;
f9575793
MSS		 2974 int stats_len;
2975 bool extd_peer_stats = !!(stats_id & WMI_10_4_STAT_PEER_EXTD);
2976
2977 if (extd_peer_stats)
2978 stats_len = sizeof(struct wmi_10_4_peer_extd_stats);
2979 else
2980 stats_len = sizeof(struct wmi_10_4_peer_stats);
98dd2b92
MP		 2981
2982 src = (void *)skb->data;
f9575793 2983 if (!skb_pull(skb, stats_len))
98dd2b92
MP		 2984 return -EPROTO;
2985
2986 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2987 if (!dst)
2988 continue;
2989
f9575793 2990 ath10k_wmi_10_4_pull_peer_stats(&src->common, dst);
98dd2b92 2991 /* FIXME: expose 10.4 specific values */
f9575793
MSS		 2992 if (extd_peer_stats)
2993 dst->rx_duration = __le32_to_cpu(src->rx_duration);
98dd2b92
MP		 2994
2995 list_add_tail(&dst->list, &stats->peers);
2996 }
2997
2998 return 0;
2999}
3000
0226d602 3001void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3002{
7aa7a72a 3003 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
60ef401a 3004 ath10k_debug_fw_stats_process(ar, skb);
5e3dd157
KV		 3005}
3006
d7579d12
MK		 3007static int
3008ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
3009 struct wmi_vdev_start_ev_arg *arg)
32653cf1
MK		 3010{
3011 struct wmi_vdev_start_response_event *ev = (void *)skb->data;
3012
3013 if (skb->len < sizeof(*ev))
3014 return -EPROTO;
3015
3016 skb_pull(skb, sizeof(*ev));
3017 arg->vdev_id = ev->vdev_id;
3018 arg->req_id = ev->req_id;
3019 arg->resp_type = ev->resp_type;
3020 arg->status = ev->status;
3021
3022 return 0;
3023}
3024
0226d602 3025void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3026{
32653cf1
MK		 3027 struct wmi_vdev_start_ev_arg arg = {};
3028 int ret;
5e3dd157 3029
7aa7a72a 3030 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
5e3dd157 3031
d7579d12 3032 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
32653cf1
MK		 3033 if (ret) {
3034 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
3035 return;
3036 }
5e3dd157 3037
32653cf1 3038 if (WARN_ON(__le32_to_cpu(arg.status)))
5e3dd157
KV		 3039 return;
3040
3041 complete(&ar->vdev_setup_done);
3042}
3043
0226d602 3044void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3045{
7aa7a72a 3046 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
5e3dd157
KV		 3047 complete(&ar->vdev_setup_done);
3048}
3049
d7579d12
MK		 3050static int
3051ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
3052 struct wmi_peer_kick_ev_arg *arg)
32653cf1
MK		 3053{
3054 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
3055
3056 if (skb->len < sizeof(*ev))
3057 return -EPROTO;
3058
3059 skb_pull(skb, sizeof(*ev));
3060 arg->mac_addr = ev->peer_macaddr.addr;
3061
3062 return 0;
3063}
3064
0226d602 3065void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3066{
32653cf1 3067 struct wmi_peer_kick_ev_arg arg = {};
5a13e76e 3068 struct ieee80211_sta *sta;
32653cf1 3069 int ret;
5a13e76e 3070
d7579d12 3071 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
32653cf1
MK		 3072 if (ret) {
3073 ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
3074 ret);
3075 return;
3076 }
5a13e76e 3077
7aa7a72a 3078 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
32653cf1 3079 arg.mac_addr);
5a13e76e
KV		 3080
3081 rcu_read_lock();
3082
32653cf1 3083 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
5a13e76e 3084 if (!sta) {
7aa7a72a 3085 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
32653cf1 3086 arg.mac_addr);
5a13e76e
KV		 3087 goto exit;
3088 }
3089
3090 ieee80211_report_low_ack(sta, 10);
3091
3092exit:
3093 rcu_read_unlock();
5e3dd157
KV		 3094}
3095
3096/*
3097 * FIXME
3098 *
3099 * We don't report to mac80211 sleep state of connected
3100 * stations. Due to this mac80211 can't fill in TIM IE
3101 * correctly.
3102 *
3103 * I know of no way of getting nullfunc frames that contain
3104 * sleep transition from connected stations - these do not
3105 * seem to be sent from the target to the host. There also
3106 * doesn't seem to be a dedicated event for that. So the
3107 * only way left to do this would be to read tim_bitmap
3108 * during SWBA.
3109 *
3110 * We could probably try using tim_bitmap from SWBA to tell
3111 * mac80211 which stations are asleep and which are not. The
3112 * problem here is calling mac80211 functions so many times
3113 * could take too long and make us miss the time to submit
3114 * the beacon to the target.
3115 *
3116 * So as a workaround we try to extend the TIM IE if there
3117 * is unicast buffered for stations with aid > 7 and fill it
3118 * in ourselves.
3119 */
3120static void ath10k_wmi_update_tim(struct ath10k *ar,
3121 struct ath10k_vif *arvif,
3122 struct sk_buff *bcn,
a03fee34 3123 const struct wmi_tim_info_arg *tim_info)
5e3dd157
KV		 3124{
3125 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
3126 struct ieee80211_tim_ie *tim;
3127 u8 *ies, *ie;
3128 u8 ie_len, pvm_len;
af762c0b 3129 __le32 t;
a03fee34
RM		 3130 u32 v, tim_len;
3131
3132 /* When FW reports 0 in tim_len, ensure atleast first byte
3133 * in tim_bitmap is considered for pvm calculation.
3134 */
3135 tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
5e3dd157
KV		 3136
3137 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
3138 * we must copy the bitmap upon change and reuse it later */
32653cf1 3139 if (__le32_to_cpu(tim_info->tim_changed)) {
5e3dd157
KV		 3140 int i;
3141
a03fee34
RM		 3142 if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
3143 ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
3144 tim_len, sizeof(arvif->u.ap.tim_bitmap));
3145 tim_len = sizeof(arvif->u.ap.tim_bitmap);
3146 }
5e3dd157 3147
a03fee34 3148 for (i = 0; i < tim_len; i++) {
32653cf1 3149 t = tim_info->tim_bitmap[i / 4];
af762c0b 3150 v = __le32_to_cpu(t);
5e3dd157
KV		 3151 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
3152 }
3153
a03fee34
RM		 3154 /* FW reports either length 0 or length based on max supported
3155 * station. so we calculate this on our own
3156 */
5e3dd157 3157 arvif->u.ap.tim_len = 0;
a03fee34 3158 for (i = 0; i < tim_len; i++)
5e3dd157
KV		 3159 if (arvif->u.ap.tim_bitmap[i])
3160 arvif->u.ap.tim_len = i;
3161
3162 arvif->u.ap.tim_len++;
3163 }
3164
3165 ies = bcn->data;
3166 ies += ieee80211_hdrlen(hdr->frame_control);
3167 ies += 12; /* fixed parameters */
3168
3169 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
3170 (u8 *)skb_tail_pointer(bcn) - ies);
3171 if (!ie) {
09af8f85 3172 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
7aa7a72a 3173 ath10k_warn(ar, "no tim ie found;\n");
5e3dd157
KV		 3174 return;
3175 }
3176
3177 tim = (void *)ie + 2;
3178 ie_len = ie[1];
3179 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
3180
3181 if (pvm_len < arvif->u.ap.tim_len) {
a03fee34 3182 int expand_size = tim_len - pvm_len;
5e3dd157
KV		 3183 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
3184 void *next_ie = ie + 2 + ie_len;
3185
3186 if (skb_put(bcn, expand_size)) {
3187 memmove(next_ie + expand_size, next_ie, move_size);
3188
3189 ie[1] += expand_size;
3190 ie_len += expand_size;
3191 pvm_len += expand_size;
3192 } else {
7aa7a72a 3193 ath10k_warn(ar, "tim expansion failed\n");
5e3dd157
KV		 3194 }
3195 }
3196
a03fee34 3197 if (pvm_len > tim_len) {
7aa7a72a 3198 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
5e3dd157
KV		 3199 return;
3200 }
3201
32653cf1 3202 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
5e3dd157
KV		 3203 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
3204
748afc47 3205 if (tim->dtim_count == 0) {
66b8a010 3206 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
748afc47 3207
32653cf1 3208 if (__le32_to_cpu(tim_info->tim_mcast) == 1)
66b8a010 3209 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
748afc47
MK		 3210 }
3211
7aa7a72a 3212 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
5e3dd157
KV		 3213 tim->dtim_count, tim->dtim_period,
3214 tim->bitmap_ctrl, pvm_len);
3215}
3216
5e3dd157
KV		 3217static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
3218 struct sk_buff *bcn,
32653cf1 3219 const struct wmi_p2p_noa_info *noa)
5e3dd157 3220{
08c27be1 3221 if (!arvif->vif->p2p)
5e3dd157
KV		 3222 return;
3223
7aa7a72a 3224 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
5e3dd157 3225
6a94888f
MK		 3226 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
3227 ath10k_p2p_noa_update(arvif, noa);
5e3dd157
KV		 3228
3229 if (arvif->u.ap.noa_data)
3230 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
3231 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
3232 arvif->u.ap.noa_data,
3233 arvif->u.ap.noa_len);
5e3dd157
KV		 3234}
3235
d7579d12
MK		 3236static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
3237 struct wmi_swba_ev_arg *arg)
32653cf1
MK		 3238{
3239 struct wmi_host_swba_event *ev = (void *)skb->data;
3240 u32 map;
3241 size_t i;
3242
3243 if (skb->len < sizeof(*ev))
3244 return -EPROTO;
3245
3246 skb_pull(skb, sizeof(*ev));
3247 arg->vdev_map = ev->vdev_map;
3248
3249 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3250 if (!(map & BIT(0)))
3251 continue;
3252
3253 /* If this happens there were some changes in firmware and
3254 * ath10k should update the max size of tim_info array.
3255 */
3256 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3257 break;
3258
a03fee34
RM		 3259 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3260 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3261 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3262 return -EPROTO;
3263 }
3264
3265 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3266 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3267 arg->tim_info[i].tim_bitmap =
3268 ev->bcn_info[i].tim_info.tim_bitmap;
3269 arg->tim_info[i].tim_changed =
3270 ev->bcn_info[i].tim_info.tim_changed;
3271 arg->tim_info[i].tim_num_ps_pending =
3272 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3273
32653cf1
MK		 3274 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
3275 i++;
3276 }
3277
3278 return 0;
3279}
3280
8b019fb0
YL		 3281static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
3282 struct sk_buff *skb,
3283 struct wmi_swba_ev_arg *arg)
3284{
3285 struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
3286 u32 map;
3287 size_t i;
3288
3289 if (skb->len < sizeof(*ev))
3290 return -EPROTO;
3291
3292 skb_pull(skb, sizeof(*ev));
3293 arg->vdev_map = ev->vdev_map;
3294
3295 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3296 if (!(map & BIT(0)))
3297 continue;
3298
3299 /* If this happens there were some changes in firmware and
3300 * ath10k should update the max size of tim_info array.
3301 */
3302 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3303 break;
3304
3305 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3306 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3307 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3308 return -EPROTO;
3309 }
3310
3311 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3312 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3313 arg->tim_info[i].tim_bitmap =
3314 ev->bcn_info[i].tim_info.tim_bitmap;
3315 arg->tim_info[i].tim_changed =
3316 ev->bcn_info[i].tim_info.tim_changed;
3317 arg->tim_info[i].tim_num_ps_pending =
3318 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3319 i++;
3320 }
3321
3322 return 0;
3323}
3324
3cec3be3
RM		 3325static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
3326 struct sk_buff *skb,
3327 struct wmi_swba_ev_arg *arg)
3328{
3329 struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
3330 u32 map, tim_len;
3331 size_t i;
3332
3333 if (skb->len < sizeof(*ev))
3334 return -EPROTO;
3335
3336 skb_pull(skb, sizeof(*ev));
3337 arg->vdev_map = ev->vdev_map;
3338
3339 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3340 if (!(map & BIT(0)))
3341 continue;
3342
3343 /* If this happens there were some changes in firmware and
3344 * ath10k should update the max size of tim_info array.
3345 */
3346 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3347 break;
3348
3349 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3350 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3351 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3352 return -EPROTO;
3353 }
3354
3355 tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
3356 if (tim_len) {
3357 /* Exclude 4 byte guard length */
3358 tim_len -= 4;
3359 arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
3360 } else {
3361 arg->tim_info[i].tim_len = 0;
3362 }
3363
3364 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3365 arg->tim_info[i].tim_bitmap =
3366 ev->bcn_info[i].tim_info.tim_bitmap;
3367 arg->tim_info[i].tim_changed =
3368 ev->bcn_info[i].tim_info.tim_changed;
3369 arg->tim_info[i].tim_num_ps_pending =
3370 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3371
3372 /* 10.4 firmware doesn't have p2p support. notice of absence
3373 * info can be ignored for now.
3374 */
3375
3376 i++;
3377 }
3378
3379 return 0;
3380}
3381
08e75ea8
VN		 3382static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
3383{
3384 return WMI_TXBF_CONF_BEFORE_ASSOC;
3385}
3386
0226d602 3387void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3388{
32653cf1 3389 struct wmi_swba_ev_arg arg = {};
5e3dd157
KV		 3390 u32 map;
3391 int i = -1;
a03fee34 3392 const struct wmi_tim_info_arg *tim_info;
32653cf1 3393 const struct wmi_p2p_noa_info *noa_info;
5e3dd157 3394 struct ath10k_vif *arvif;
5e3dd157 3395 struct sk_buff *bcn;
64badcb6 3396 dma_addr_t paddr;
767d34fc 3397 int ret, vdev_id = 0;
5e3dd157 3398
d7579d12 3399 ret = ath10k_wmi_pull_swba(ar, skb, &arg);
32653cf1
MK		 3400 if (ret) {
3401 ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
3402 return;
3403 }
3404
3405 map = __le32_to_cpu(arg.vdev_map);
5e3dd157 3406
7aa7a72a 3407 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
32653cf1 3408 map);
5e3dd157
KV		 3409
3410 for (; map; map >>= 1, vdev_id++) {
3411 if (!(map & 0x1))
3412 continue;
3413
3414 i++;
3415
3416 if (i >= WMI_MAX_AP_VDEV) {
7aa7a72a 3417 ath10k_warn(ar, "swba has corrupted vdev map\n");
5e3dd157
KV		 3418 break;
3419 }
3420
a03fee34 3421 tim_info = &arg.tim_info[i];
32653cf1 3422 noa_info = arg.noa_info[i];
5e3dd157 3423
7aa7a72a 3424 ath10k_dbg(ar, ATH10K_DBG_MGMT,
7a8a396b 3425 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
5e3dd157 3426 i,
32653cf1
MK		 3427 __le32_to_cpu(tim_info->tim_len),
3428 __le32_to_cpu(tim_info->tim_mcast),
3429 __le32_to_cpu(tim_info->tim_changed),
3430 __le32_to_cpu(tim_info->tim_num_ps_pending),
3431 __le32_to_cpu(tim_info->tim_bitmap[3]),
3432 __le32_to_cpu(tim_info->tim_bitmap[2]),
3433 __le32_to_cpu(tim_info->tim_bitmap[1]),
3434 __le32_to_cpu(tim_info->tim_bitmap[0]));
5e3dd157 3435
a03fee34
RM		 3436 /* TODO: Only first 4 word from tim_bitmap is dumped.
3437 * Extend debug code to dump full tim_bitmap.
3438 */
3439
5e3dd157
KV		 3440 arvif = ath10k_get_arvif(ar, vdev_id);
3441 if (arvif == NULL) {
7aa7a72a
MK		 3442 ath10k_warn(ar, "no vif for vdev_id %d found\n",
3443 vdev_id);
5e3dd157
KV		 3444 continue;
3445 }
3446
c2df44b3
MK		 3447 /* There are no completions for beacons so wait for next SWBA
3448 * before telling mac80211 to decrement CSA counter
3449 *
3450 * Once CSA counter is completed stop sending beacons until
3451 * actual channel switch is done */
3452 if (arvif->vif->csa_active &&
3453 ieee80211_csa_is_complete(arvif->vif)) {
3454 ieee80211_csa_finish(arvif->vif);
3455 continue;
3456 }
3457
5e3dd157
KV		 3458 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
3459 if (!bcn) {
7aa7a72a 3460 ath10k_warn(ar, "could not get mac80211 beacon\n");
5e3dd157
KV		 3461 continue;
3462 }
3463
4b604558 3464 ath10k_tx_h_seq_no(arvif->vif, bcn);
32653cf1
MK		 3465 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
3466 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
5e3dd157 3467
ed54388a 3468 spin_lock_bh(&ar->data_lock);
748afc47 3469
ed54388a 3470 if (arvif->beacon) {
af21319f
MK		 3471 switch (arvif->beacon_state) {
3472 case ATH10K_BEACON_SENT:
3473 break;
3474 case ATH10K_BEACON_SCHEDULED:
3475 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
3476 arvif->vdev_id);
3477 break;
3478 case ATH10K_BEACON_SENDING:
3479 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
748afc47 3480 arvif->vdev_id);
af21319f
MK		 3481 dev_kfree_skb(bcn);
3482 goto skip;
3483 }
748afc47 3484
64badcb6 3485 ath10k_mac_vif_beacon_free(arvif);
ed54388a 3486 }
5e3dd157 3487
64badcb6
MK		 3488 if (!arvif->beacon_buf) {
3489 paddr = dma_map_single(arvif->ar->dev, bcn->data,
3490 bcn->len, DMA_TO_DEVICE);
3491 ret = dma_mapping_error(arvif->ar->dev, paddr);
3492 if (ret) {
3493 ath10k_warn(ar, "failed to map beacon: %d\n",
3494 ret);
3495 dev_kfree_skb_any(bcn);
5e55e3cb 3496 ret = -EIO;
64badcb6
MK		 3497 goto skip;
3498 }
3499
3500 ATH10K_SKB_CB(bcn)->paddr = paddr;
3501 } else {
3502 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
3503 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
3504 bcn->len, IEEE80211_MAX_FRAME_LEN);
3505 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
3506 }
3507 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
3508 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
767d34fc 3509 }
748afc47 3510
ed54388a 3511 arvif->beacon = bcn;
af21319f 3512 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
5e3dd157 3513
5ce8e7fd
RM		 3514 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
3515 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
3516
767d34fc 3517skip:
ed54388a 3518 spin_unlock_bh(&ar->data_lock);
5e3dd157 3519 }
af21319f
MK		 3520
3521 ath10k_wmi_tx_beacons_nowait(ar);
5e3dd157
KV		 3522}
3523
0226d602 3524void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3525{
7aa7a72a 3526 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
5e3dd157
KV		 3527}
3528
9702c686 3529static void ath10k_dfs_radar_report(struct ath10k *ar,
991adf71 3530 struct wmi_phyerr_ev_arg *phyerr,
2332d0ae 3531 const struct phyerr_radar_report *rr,
9702c686
JD		 3532 u64 tsf)
3533{
3534 u32 reg0, reg1, tsf32l;
500ff9f9 3535 struct ieee80211_channel *ch;
9702c686
JD		 3536 struct pulse_event pe;
3537 u64 tsf64;
3538 u8 rssi, width;
3539
3540 reg0 = __le32_to_cpu(rr->reg0);
3541 reg1 = __le32_to_cpu(rr->reg1);
3542
7aa7a72a 3543 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3544 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
3545 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
3546 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
3547 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
3548 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
7aa7a72a 3549 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3550 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
3551 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
3552 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
3553 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
3554 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
3555 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
7aa7a72a 3556 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3557 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
3558 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
3559 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
3560
3561 if (!ar->dfs_detector)
3562 return;
3563
500ff9f9
MK		 3564 spin_lock_bh(&ar->data_lock);
3565 ch = ar->rx_channel;
3566 spin_unlock_bh(&ar->data_lock);
3567
3568 if (!ch) {
3569 ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
3570 goto radar_detected;
3571 }
3572
9702c686 3573 /* report event to DFS pattern detector */
991adf71 3574 tsf32l = phyerr->tsf_timestamp;
9702c686
JD		 3575 tsf64 = tsf & (~0xFFFFFFFFULL);
3576 tsf64 |= tsf32l;
3577
3578 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
2332d0ae 3579 rssi = phyerr->rssi_combined;
9702c686
JD		 3580
3581 /* hardware store this as 8 bit signed value,
3582 * set to zero if negative number
3583 */
3584 if (rssi & 0x80)
3585 rssi = 0;
3586
3587 pe.ts = tsf64;
500ff9f9 3588 pe.freq = ch->center_freq;
9702c686
JD		 3589 pe.width = width;
3590 pe.rssi = rssi;
2c3f26a0 3591 pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
7aa7a72a 3592 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3593 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
3594 pe.freq, pe.width, pe.rssi, pe.ts);
3595
3596 ATH10K_DFS_STAT_INC(ar, pulses_detected);
3597
3598 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
7aa7a72a 3599 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3600 "dfs no pulse pattern detected, yet\n");
3601 return;
3602 }
3603
500ff9f9 3604radar_detected:
7aa7a72a 3605 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
9702c686 3606 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP		 3607
3608 /* Control radar events reporting in debugfs file
3609 dfs_block_radar_events */
3610 if (ar->dfs_block_radar_events) {
7aa7a72a 3611 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
7d9b40b4
MP		 3612 return;
3613 }
3614
9702c686
JD		 3615 ieee80211_radar_detected(ar->hw);
3616}
3617
3618static int ath10k_dfs_fft_report(struct ath10k *ar,
991adf71 3619 struct wmi_phyerr_ev_arg *phyerr,
2332d0ae 3620 const struct phyerr_fft_report *fftr,
9702c686
JD		 3621 u64 tsf)
3622{
3623 u32 reg0, reg1;
3624 u8 rssi, peak_mag;
3625
3626 reg0 = __le32_to_cpu(fftr->reg0);
3627 reg1 = __le32_to_cpu(fftr->reg1);
2332d0ae 3628 rssi = phyerr->rssi_combined;
9702c686 3629
7aa7a72a 3630 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3631 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
3632 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
3633 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
3634 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
3635 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
7aa7a72a 3636 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3637 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
3638 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
3639 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
3640 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
3641 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
3642
3643 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
3644
3645 /* false event detection */
3646 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
3647 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
7aa7a72a 3648 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
9702c686
JD		 3649 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
3650 return -EINVAL;
3651 }
3652
3653 return 0;
3654}
3655
0226d602 3656void ath10k_wmi_event_dfs(struct ath10k *ar,
991adf71 3657 struct wmi_phyerr_ev_arg *phyerr,
0226d602 3658 u64 tsf)
9702c686
JD		 3659{
3660 int buf_len, tlv_len, res, i = 0;
2332d0ae
MK		 3661 const struct phyerr_tlv *tlv;
3662 const struct phyerr_radar_report *rr;
3663 const struct phyerr_fft_report *fftr;
3664 const u8 *tlv_buf;
9702c686 3665
991adf71 3666 buf_len = phyerr->buf_len;
7aa7a72a 3667 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686 3668 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
2332d0ae 3669 phyerr->phy_err_code, phyerr->rssi_combined,
991adf71 3670 phyerr->tsf_timestamp, tsf, buf_len);
9702c686
JD		 3671
3672 /* Skip event if DFS disabled */
3673 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
3674 return;
3675
3676 ATH10K_DFS_STAT_INC(ar, pulses_total);
3677
3678 while (i < buf_len) {
3679 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a
MK		 3680 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
3681 i);
9702c686
JD		 3682 return;
3683 }
3684
2332d0ae 3685 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
9702c686 3686 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 3687 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
7aa7a72a 3688 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3689 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
3690 tlv_len, tlv->tag, tlv->sig);
3691
3692 switch (tlv->tag) {
3693 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
3694 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
7aa7a72a 3695 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
9702c686
JD		 3696 i);
3697 return;
3698 }
3699
3700 rr = (struct phyerr_radar_report *)tlv_buf;
2332d0ae 3701 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
9702c686
JD		 3702 break;
3703 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
3704 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
7aa7a72a
MK		 3705 ath10k_warn(ar, "too short fft report (%d)\n",
3706 i);
9702c686
JD		 3707 return;
3708 }
3709
3710 fftr = (struct phyerr_fft_report *)tlv_buf;
2332d0ae 3711 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
9702c686
JD		 3712 if (res)
3713 return;
3714 break;
3715 }
3716
3717 i += sizeof(*tlv) + tlv_len;
3718 }
3719}
3720
0226d602 3721void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
991adf71 3722 struct wmi_phyerr_ev_arg *phyerr,
0226d602 3723 u64 tsf)
9702c686 3724{
855aed12
SW		 3725 int buf_len, tlv_len, res, i = 0;
3726 struct phyerr_tlv *tlv;
2332d0ae
MK		 3727 const void *tlv_buf;
3728 const struct phyerr_fft_report *fftr;
855aed12
SW		 3729 size_t fftr_len;
3730
991adf71 3731 buf_len = phyerr->buf_len;
855aed12
SW		 3732
3733 while (i < buf_len) {
3734 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a 3735 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
855aed12
SW		 3736 i);
3737 return;
3738 }
3739
2332d0ae 3740 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
855aed12 3741 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 3742 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
855aed12
SW		 3743
3744 if (i + sizeof(*tlv) + tlv_len > buf_len) {
7aa7a72a 3745 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
855aed12
SW		 3746 i);
3747 return;
3748 }
3749
3750 switch (tlv->tag) {
3751 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
3752 if (sizeof(*fftr) > tlv_len) {
7aa7a72a 3753 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
855aed12
SW		 3754 i);
3755 return;
3756 }
3757
3758 fftr_len = tlv_len - sizeof(*fftr);
2332d0ae
MK		 3759 fftr = tlv_buf;
3760 res = ath10k_spectral_process_fft(ar, phyerr,
855aed12
SW		 3761 fftr, fftr_len,
3762 tsf);
3763 if (res < 0) {
3413e97d 3764 ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
617b0f4d 3765 res);
855aed12
SW		 3766 return;
3767 }
3768 break;
3769 }
3770
3771 i += sizeof(*tlv) + tlv_len;
3772 }
9702c686
JD		 3773}
3774
991adf71
RM		 3775static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
3776 struct sk_buff *skb,
3777 struct wmi_phyerr_hdr_arg *arg)
32653cf1
MK		 3778{
3779 struct wmi_phyerr_event *ev = (void *)skb->data;
3780
3781 if (skb->len < sizeof(*ev))
3782 return -EPROTO;
3783
991adf71
RM		 3784 arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
3785 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
3786 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
3787 arg->buf_len = skb->len - sizeof(*ev);
32653cf1
MK		 3788 arg->phyerrs = ev->phyerrs;
3789
3790 return 0;
3791}
3792
2b0a2e0d
RM		 3793static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
3794 struct sk_buff *skb,
3795 struct wmi_phyerr_hdr_arg *arg)
3796{
3797 struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
3798
3799 if (skb->len < sizeof(*ev))
3800 return -EPROTO;
3801
3802 /* 10.4 firmware always reports only one phyerr */
3803 arg->num_phyerrs = 1;
3804
3805 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
3806 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
3807 arg->buf_len = skb->len;
3808 arg->phyerrs = skb->data;
3809
3810 return 0;
3811}
3812
991adf71
RM		 3813int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
3814 const void *phyerr_buf,
3815 int left_len,
3816 struct wmi_phyerr_ev_arg *arg)
3817{
3818 const struct wmi_phyerr *phyerr = phyerr_buf;
3819 int i;
3820
3821 if (left_len < sizeof(*phyerr)) {
ee92a209 3822 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
991adf71
RM		 3823 left_len, sizeof(*phyerr));
3824 return -EINVAL;
3825 }
3826
3827 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
3828 arg->freq1 = __le16_to_cpu(phyerr->freq1);
3829 arg->freq2 = __le16_to_cpu(phyerr->freq2);
3830 arg->rssi_combined = phyerr->rssi_combined;
3831 arg->chan_width_mhz = phyerr->chan_width_mhz;
3832 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
3833 arg->buf = phyerr->buf;
3834 arg->hdr_len = sizeof(*phyerr);
3835
3836 for (i = 0; i < 4; i++)
3837 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
3838
3839 switch (phyerr->phy_err_code) {
3840 case PHY_ERROR_GEN_SPECTRAL_SCAN:
3841 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
3842 break;
3843 case PHY_ERROR_GEN_FALSE_RADAR_EXT:
3844 arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
3845 break;
3846 case PHY_ERROR_GEN_RADAR:
3847 arg->phy_err_code = PHY_ERROR_RADAR;
3848 break;
3849 default:
3850 arg->phy_err_code = PHY_ERROR_UNKNOWN;
3851 break;
3852 }
3853
3854 return 0;
3855}
3856
2b0a2e0d
RM		 3857static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
3858 const void *phyerr_buf,
3859 int left_len,
3860 struct wmi_phyerr_ev_arg *arg)
3861{
3862 const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
3863 u32 phy_err_mask;
3864 int i;
3865
3866 if (left_len < sizeof(*phyerr)) {
ee92a209 3867 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
2b0a2e0d
RM		 3868 left_len, sizeof(*phyerr));
3869 return -EINVAL;
3870 }
3871
3872 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
3873 arg->freq1 = __le16_to_cpu(phyerr->freq1);
3874 arg->freq2 = __le16_to_cpu(phyerr->freq2);
3875 arg->rssi_combined = phyerr->rssi_combined;
3876 arg->chan_width_mhz = phyerr->chan_width_mhz;
3877 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
3878 arg->buf = phyerr->buf;
3879 arg->hdr_len = sizeof(*phyerr);
3880
3881 for (i = 0; i < 4; i++)
3882 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
3883
3884 phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
3885
3886 if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
3887 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
3888 else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
3889 arg->phy_err_code = PHY_ERROR_RADAR;
3890 else
3891 arg->phy_err_code = PHY_ERROR_UNKNOWN;
3892
3893 return 0;
3894}
3895
0226d602 3896void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3897{
991adf71
RM		 3898 struct wmi_phyerr_hdr_arg hdr_arg = {};
3899 struct wmi_phyerr_ev_arg phyerr_arg = {};
3900 const void *phyerr;
9702c686
JD		 3901 u32 count, i, buf_len, phy_err_code;
3902 u64 tsf;
32653cf1 3903 int left_len, ret;
9702c686
JD		 3904
3905 ATH10K_DFS_STAT_INC(ar, phy_errors);
3906
991adf71 3907 ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
32653cf1 3908 if (ret) {
991adf71 3909 ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
9702c686
JD		 3910 return;
3911 }
3912
9702c686 3913 /* Check number of included events */
991adf71 3914 count = hdr_arg.num_phyerrs;
9702c686 3915
991adf71
RM		 3916 left_len = hdr_arg.buf_len;
3917
3918 tsf = hdr_arg.tsf_u32;
9702c686 3919 tsf <<= 32;
991adf71 3920 tsf |= hdr_arg.tsf_l32;
9702c686 3921
7aa7a72a 3922 ath10k_dbg(ar, ATH10K_DBG_WMI,
9702c686
JD		 3923 "wmi event phyerr count %d tsf64 0x%llX\n",
3924 count, tsf);
3925
991adf71 3926 phyerr = hdr_arg.phyerrs;
9702c686 3927 for (i = 0; i < count; i++) {
991adf71
RM		 3928 ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
3929 if (ret) {
3930 ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
7aa7a72a 3931 i);
9702c686
JD		 3932 return;
3933 }
3934
991adf71
RM		 3935 left_len -= phyerr_arg.hdr_len;
3936 buf_len = phyerr_arg.buf_len;
3937 phy_err_code = phyerr_arg.phy_err_code;
9702c686
JD		 3938
3939 if (left_len < buf_len) {
7aa7a72a 3940 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
9702c686
JD		 3941 return;
3942 }
3943
3944 left_len -= buf_len;
3945
3946 switch (phy_err_code) {
3947 case PHY_ERROR_RADAR:
991adf71 3948 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
9702c686
JD		 3949 break;
3950 case PHY_ERROR_SPECTRAL_SCAN:
991adf71 3951 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
9702c686
JD		 3952 break;
3953 case PHY_ERROR_FALSE_RADAR_EXT:
991adf71
RM		 3954 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
3955 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
9702c686
JD		 3956 break;
3957 default:
3958 break;
3959 }
3960
991adf71 3961 phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
9702c686 3962 }
5e3dd157
KV		 3963}
3964
0226d602 3965void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3966{
c1a4654a
MK		 3967 struct wmi_roam_ev_arg arg = {};
3968 int ret;
3969 u32 vdev_id;
3970 u32 reason;
3971 s32 rssi;
3972
3973 ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
3974 if (ret) {
3975 ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
3976 return;
3977 }
3978
3979 vdev_id = __le32_to_cpu(arg.vdev_id);
3980 reason = __le32_to_cpu(arg.reason);
3981 rssi = __le32_to_cpu(arg.rssi);
3982 rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
3983
3984 ath10k_dbg(ar, ATH10K_DBG_WMI,
3985 "wmi roam event vdev %u reason 0x%08x rssi %d\n",
3986 vdev_id, reason, rssi);
3987
3988 if (reason >= WMI_ROAM_REASON_MAX)
3989 ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
3990 reason, vdev_id);
3991
3992 switch (reason) {
c1a4654a 3993 case WMI_ROAM_REASON_BEACON_MISS:
cc9904e6
MK		 3994 ath10k_mac_handle_beacon_miss(ar, vdev_id);
3995 break;
3996 case WMI_ROAM_REASON_BETTER_AP:
c1a4654a
MK		 3997 case WMI_ROAM_REASON_LOW_RSSI:
3998 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
3999 case WMI_ROAM_REASON_HO_FAILED:
4000 ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
4001 reason, vdev_id);
4002 break;
4003 }
5e3dd157
KV		 4004}
4005
0226d602 4006void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4007{
7aa7a72a 4008 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
5e3dd157
KV		 4009}
4010
0226d602 4011void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4012{
2fe5288c
KV		 4013 char buf[101], c;
4014 int i;
4015
4016 for (i = 0; i < sizeof(buf) - 1; i++) {
4017 if (i >= skb->len)
4018 break;
4019
4020 c = skb->data[i];
4021
4022 if (c == '\0')
4023 break;
4024
4025 if (isascii(c) && isprint(c))
4026 buf[i] = c;
4027 else
4028 buf[i] = '.';
4029 }
4030
4031 if (i == sizeof(buf) - 1)
7aa7a72a 4032 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2fe5288c
KV		 4033
4034 /* for some reason the debug prints end with \n, remove that */
4035 if (skb->data[i - 1] == '\n')
4036 i--;
4037
4038 /* the last byte is always reserved for the null character */
4039 buf[i] = '\0';
4040
3be004c3 4041 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
5e3dd157
KV		 4042}
4043
0226d602 4044void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4045{
7aa7a72a 4046 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
5e3dd157
KV		 4047}
4048
0226d602 4049void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4050{
7aa7a72a 4051 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
5e3dd157
KV		 4052}
4053
0226d602
MK		 4054void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
4055 struct sk_buff *skb)
5e3dd157 4056{
7aa7a72a 4057 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 4058}
4059
0226d602
MK		 4060void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
4061 struct sk_buff *skb)
5e3dd157 4062{
7aa7a72a 4063 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 4064}
4065
0226d602 4066void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4067{
7aa7a72a 4068 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
5e3dd157
KV		 4069}
4070
0226d602 4071void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4072{
5fd3ac3c
JD		 4073 struct wmi_wow_ev_arg ev = {};
4074 int ret;
4075
4076 complete(&ar->wow.wakeup_completed);
4077
4078 ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
4079 if (ret) {
4080 ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
4081 return;
4082 }
4083
4084 ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
4085 wow_reason(ev.wake_reason));
5e3dd157
KV		 4086}
4087
0226d602 4088void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4089{
7aa7a72a 4090 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
5e3dd157
KV		 4091}
4092
29542666
MK		 4093static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
4094 struct wmi_pdev_tpc_config_event *ev,
4095 u32 rate_idx, u32 num_chains,
4096 u32 rate_code, u8 type)
4097{
4098 u8 tpc, num_streams, preamble, ch, stm_idx;
4099
4100 num_streams = ATH10K_HW_NSS(rate_code);
4101 preamble = ATH10K_HW_PREAMBLE(rate_code);
4102 ch = num_chains - 1;
4103
4104 tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
4105
4106 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
4107 goto out;
4108
4109 if (preamble == WMI_RATE_PREAMBLE_CCK)
4110 goto out;
4111
4112 stm_idx = num_streams - 1;
4113 if (num_chains <= num_streams)
4114 goto out;
4115
4116 switch (type) {
4117 case WMI_TPC_TABLE_TYPE_STBC:
4118 tpc = min_t(u8, tpc,
4119 ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
4120 break;
4121 case WMI_TPC_TABLE_TYPE_TXBF:
4122 tpc = min_t(u8, tpc,
4123 ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
4124 break;
4125 case WMI_TPC_TABLE_TYPE_CDD:
4126 tpc = min_t(u8, tpc,
4127 ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
4128 break;
4129 default:
4130 ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
4131 tpc = 0;
4132 break;
4133 }
4134
4135out:
4136 return tpc;
4137}
4138
4139static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
4140 struct wmi_pdev_tpc_config_event *ev,
4141 struct ath10k_tpc_stats *tpc_stats,
4142 u8 *rate_code, u16 *pream_table, u8 type)
4143{
4144 u32 i, j, pream_idx, flags;
4145 u8 tpc[WMI_TPC_TX_N_CHAIN];
4146 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
4147 char buff[WMI_TPC_BUF_SIZE];
4148
4149 flags = __le32_to_cpu(ev->flags);
4150
4151 switch (type) {
4152 case WMI_TPC_TABLE_TYPE_CDD:
4153 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
4154 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
4155 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4156 return;
4157 }
4158 break;
4159 case WMI_TPC_TABLE_TYPE_STBC:
4160 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
4161 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
4162 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4163 return;
4164 }
4165 break;
4166 case WMI_TPC_TABLE_TYPE_TXBF:
4167 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
4168 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
4169 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4170 return;
4171 }
4172 break;
4173 default:
4174 ath10k_dbg(ar, ATH10K_DBG_WMI,
4175 "invalid table type in wmi tpc event: %d\n", type);
4176 return;
4177 }
4178
4179 pream_idx = 0;
4180 for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
4181 memset(tpc_value, 0, sizeof(tpc_value));
4182 memset(buff, 0, sizeof(buff));
4183 if (i == pream_table[pream_idx])
4184 pream_idx++;
4185
4186 for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
4187 if (j >= __le32_to_cpu(ev->num_tx_chain))
4188 break;
4189
4190 tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
4191 rate_code[i],
4192 type);
4193 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
4194 strncat(tpc_value, buff, strlen(buff));
4195 }
4196 tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
4197 tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
4198 memcpy(tpc_stats->tpc_table[type].tpc_value[i],
4199 tpc_value, sizeof(tpc_value));
4200 }
4201}
4202
0226d602 4203void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4204{
29542666
MK		 4205 u32 i, j, pream_idx, num_tx_chain;
4206 u8 rate_code[WMI_TPC_RATE_MAX], rate_idx;
4207 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
4208 struct wmi_pdev_tpc_config_event *ev;
4209 struct ath10k_tpc_stats *tpc_stats;
4210
4211 ev = (struct wmi_pdev_tpc_config_event *)skb->data;
4212
4213 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
4214 if (!tpc_stats)
4215 return;
4216
4217 /* Create the rate code table based on the chains supported */
4218 rate_idx = 0;
4219 pream_idx = 0;
4220
4221 /* Fill CCK rate code */
4222 for (i = 0; i < 4; i++) {
4223 rate_code[rate_idx] =
4224 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
4225 rate_idx++;
4226 }
4227 pream_table[pream_idx] = rate_idx;
4228 pream_idx++;
4229
4230 /* Fill OFDM rate code */
4231 for (i = 0; i < 8; i++) {
4232 rate_code[rate_idx] =
4233 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
4234 rate_idx++;
4235 }
4236 pream_table[pream_idx] = rate_idx;
4237 pream_idx++;
4238
4239 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4240
4241 /* Fill HT20 rate code */
4242 for (i = 0; i < num_tx_chain; i++) {
4243 for (j = 0; j < 8; j++) {
4244 rate_code[rate_idx] =
4245 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4246 rate_idx++;
4247 }
4248 }
4249 pream_table[pream_idx] = rate_idx;
4250 pream_idx++;
4251
4252 /* Fill HT40 rate code */
4253 for (i = 0; i < num_tx_chain; i++) {
4254 for (j = 0; j < 8; j++) {
4255 rate_code[rate_idx] =
4256 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4257 rate_idx++;
4258 }
4259 }
4260 pream_table[pream_idx] = rate_idx;
4261 pream_idx++;
4262
4263 /* Fill VHT20 rate code */
4264 for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) {
4265 for (j = 0; j < 10; j++) {
4266 rate_code[rate_idx] =
4267 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4268 rate_idx++;
4269 }
4270 }
4271 pream_table[pream_idx] = rate_idx;
4272 pream_idx++;
4273
4274 /* Fill VHT40 rate code */
4275 for (i = 0; i < num_tx_chain; i++) {
4276 for (j = 0; j < 10; j++) {
4277 rate_code[rate_idx] =
4278 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4279 rate_idx++;
4280 }
4281 }
4282 pream_table[pream_idx] = rate_idx;
4283 pream_idx++;
4284
4285 /* Fill VHT80 rate code */
4286 for (i = 0; i < num_tx_chain; i++) {
4287 for (j = 0; j < 10; j++) {
4288 rate_code[rate_idx] =
4289 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4290 rate_idx++;
4291 }
4292 }
4293 pream_table[pream_idx] = rate_idx;
4294 pream_idx++;
4295
4296 rate_code[rate_idx++] =
4297 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4298 rate_code[rate_idx++] =
4299 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4300 rate_code[rate_idx++] =
4301 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4302 rate_code[rate_idx++] =
4303 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4304 rate_code[rate_idx++] =
4305 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4306
4307 pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
4308
4309 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
4310 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
4311 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
4312 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
4313 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
4314 tpc_stats->twice_antenna_reduction =
4315 __le32_to_cpu(ev->twice_antenna_reduction);
4316 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
4317 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
4318 tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4319 tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
4320
4321 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4322 rate_code, pream_table,
4323 WMI_TPC_TABLE_TYPE_CDD);
4324 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4325 rate_code, pream_table,
4326 WMI_TPC_TABLE_TYPE_STBC);
4327 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4328 rate_code, pream_table,
4329 WMI_TPC_TABLE_TYPE_TXBF);
4330
4331 ath10k_debug_tpc_stats_process(ar, tpc_stats);
4332
4333 ath10k_dbg(ar, ATH10K_DBG_WMI,
4334 "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
4335 __le32_to_cpu(ev->chan_freq),
4336 __le32_to_cpu(ev->phy_mode),
4337 __le32_to_cpu(ev->ctl),
4338 __le32_to_cpu(ev->reg_domain),
4339 a_sle32_to_cpu(ev->twice_antenna_gain),
4340 __le32_to_cpu(ev->twice_antenna_reduction),
4341 __le32_to_cpu(ev->power_limit),
4342 __le32_to_cpu(ev->twice_max_rd_power) / 2,
4343 __le32_to_cpu(ev->num_tx_chain),
4344 __le32_to_cpu(ev->rate_max));
5e3dd157
KV		 4345}
4346
0226d602 4347void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4348{
7aa7a72a 4349 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5e3dd157
KV		 4350}
4351
0226d602 4352void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4353{
7aa7a72a 4354 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5e3dd157
KV		 4355}
4356
0226d602 4357void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4358{
7aa7a72a 4359 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5e3dd157
KV		 4360}
4361
0226d602 4362void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4363{
7aa7a72a 4364 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 4365}
4366
0226d602 4367void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4368{
7aa7a72a 4369 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 4370}
4371
0226d602
MK		 4372void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
4373 struct sk_buff *skb)
5e3dd157 4374{
7aa7a72a 4375 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5e3dd157
KV		 4376}
4377
0226d602 4378void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4379{
7aa7a72a 4380 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
8a6618b0
BM		 4381}
4382
0226d602 4383void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4384{
7aa7a72a 4385 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
8a6618b0
BM		 4386}
4387
0226d602 4388void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4389{
7aa7a72a 4390 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
8a6618b0
BM		 4391}
4392
b0578865
FF		 4393static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
4394 u32 num_units, u32 unit_len)
b3effe61
BM		 4395{
4396 dma_addr_t paddr;
b0578865 4397 u32 pool_size = 0;
b3effe61 4398 int idx = ar->wmi.num_mem_chunks;
b0578865 4399 void *vaddr = NULL;
b3effe61 4400
b0578865
FF		 4401 if (ar->wmi.num_mem_chunks == ARRAY_SIZE(ar->wmi.mem_chunks))
4402 return -ENOMEM;
b3effe61 4403
b0578865
FF		 4404 while (!vaddr && num_units) {
4405 pool_size = num_units * round_up(unit_len, 4);
4406 if (!pool_size)
4407 return -EINVAL;
b3effe61 4408
b0578865
FF		 4409 vaddr = kzalloc(pool_size, GFP_KERNEL | __GFP_NOWARN);
4410 if (!vaddr)
4411 num_units /= 2;
b3effe61
BM		 4412 }
4413
b0578865
FF		 4414 if (!num_units)
4415 return -ENOMEM;
4416
4417 paddr = dma_map_single(ar->dev, vaddr, pool_size, DMA_TO_DEVICE);
4418 if (dma_mapping_error(ar->dev, paddr)) {
4419 kfree(vaddr);
4420 return -ENOMEM;
4421 }
b3effe61 4422
b0578865 4423 ar->wmi.mem_chunks[idx].vaddr = vaddr;
b3effe61
BM		 4424 ar->wmi.mem_chunks[idx].paddr = paddr;
4425 ar->wmi.mem_chunks[idx].len = pool_size;
4426 ar->wmi.mem_chunks[idx].req_id = req_id;
4427 ar->wmi.num_mem_chunks++;
4428
b0578865
FF		 4429 return num_units;
4430}
4431
4432static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
4433 u32 num_units, u32 unit_len)
4434{
4435 int ret;
4436
4437 while (num_units) {
4438 ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
4439 if (ret < 0)
4440 return ret;
4441
4442 num_units -= ret;
4443 }
4444
b3effe61
BM		 4445 return 0;
4446}
4447
a925a376
VT		 4448static bool
4449ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
4450 const struct wlan_host_mem_req **mem_reqs,
4451 u32 num_mem_reqs)
4452{
4453 u32 req_id, num_units, unit_size, num_unit_info;
4454 u32 pool_size;
4455 int i, j;
4456 bool found;
4457
4458 if (ar->wmi.num_mem_chunks != num_mem_reqs)
4459 return false;
4460
4461 for (i = 0; i < num_mem_reqs; ++i) {
4462 req_id = __le32_to_cpu(mem_reqs[i]->req_id);
4463 num_units = __le32_to_cpu(mem_reqs[i]->num_units);
4464 unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
4465 num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
4466
4467 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
4468 if (ar->num_active_peers)
4469 num_units = ar->num_active_peers + 1;
4470 else
4471 num_units = ar->max_num_peers + 1;
4472 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
4473 num_units = ar->max_num_peers + 1;
4474 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
4475 num_units = ar->max_num_vdevs + 1;
4476 }
4477
4478 found = false;
4479 for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
4480 if (ar->wmi.mem_chunks[j].req_id == req_id) {
4481 pool_size = num_units * round_up(unit_size, 4);
4482 if (ar->wmi.mem_chunks[j].len == pool_size) {
4483 found = true;
4484 break;
4485 }
4486 }
4487 }
4488 if (!found)
4489 return false;
4490 }
4491
4492 return true;
4493}
4494
d7579d12
MK		 4495static int
4496ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4497 struct wmi_svc_rdy_ev_arg *arg)
5c01aa3d
MK		 4498{
4499 struct wmi_service_ready_event *ev;
4500 size_t i, n;
4501
4502 if (skb->len < sizeof(*ev))
4503 return -EPROTO;
4504
4505 ev = (void *)skb->data;
4506 skb_pull(skb, sizeof(*ev));
4507 arg->min_tx_power = ev->hw_min_tx_power;
4508 arg->max_tx_power = ev->hw_max_tx_power;
4509 arg->ht_cap = ev->ht_cap_info;
4510 arg->vht_cap = ev->vht_cap_info;
4511 arg->sw_ver0 = ev->sw_version;
4512 arg->sw_ver1 = ev->sw_version_1;
4513 arg->phy_capab = ev->phy_capability;
4514 arg->num_rf_chains = ev->num_rf_chains;
4515 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
4516 arg->num_mem_reqs = ev->num_mem_reqs;
4517 arg->service_map = ev->wmi_service_bitmap;
2a3e60d3 4518 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5c01aa3d
MK		 4519
4520 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
4521 ARRAY_SIZE(arg->mem_reqs));
4522 for (i = 0; i < n; i++)
4523 arg->mem_reqs[i] = &ev->mem_reqs[i];
4524
4525 if (skb->len <
4526 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
4527 return -EPROTO;
4528
4529 return 0;
4530}
4531
d7579d12
MK		 4532static int
4533ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4534 struct wmi_svc_rdy_ev_arg *arg)
5c01aa3d
MK		 4535{
4536 struct wmi_10x_service_ready_event *ev;
4537 int i, n;
4538
4539 if (skb->len < sizeof(*ev))
4540 return -EPROTO;
4541
4542 ev = (void *)skb->data;
4543 skb_pull(skb, sizeof(*ev));
4544 arg->min_tx_power = ev->hw_min_tx_power;
4545 arg->max_tx_power = ev->hw_max_tx_power;
4546 arg->ht_cap = ev->ht_cap_info;
4547 arg->vht_cap = ev->vht_cap_info;
4548 arg->sw_ver0 = ev->sw_version;
4549 arg->phy_capab = ev->phy_capability;
4550 arg->num_rf_chains = ev->num_rf_chains;
4551 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
4552 arg->num_mem_reqs = ev->num_mem_reqs;
4553 arg->service_map = ev->wmi_service_bitmap;
2a3e60d3 4554 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5c01aa3d
MK		 4555
4556 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
4557 ARRAY_SIZE(arg->mem_reqs));
4558 for (i = 0; i < n; i++)
4559 arg->mem_reqs[i] = &ev->mem_reqs[i];
4560
4561 if (skb->len <
4562 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
4563 return -EPROTO;
4564
4565 return 0;
4566}
4567
c8ecfc1c 4568static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
5e3dd157 4569{
c8ecfc1c
RM		 4570 struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
4571 struct sk_buff *skb = ar->svc_rdy_skb;
5c01aa3d
MK		 4572 struct wmi_svc_rdy_ev_arg arg = {};
4573 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
5c01aa3d 4574 int ret;
a925a376 4575 bool allocated;
5c01aa3d 4576
c8ecfc1c
RM		 4577 if (!skb) {
4578 ath10k_warn(ar, "invalid service ready event skb\n");
4579 return;
4580 }
4581
d7579d12 4582 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
5c01aa3d
MK		 4583 if (ret) {
4584 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5e3dd157
KV		 4585 return;
4586 }
4587
d7579d12
MK		 4588 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
4589 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
4590 arg.service_map_len);
4591
5c01aa3d
MK		 4592 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
4593 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
4594 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
4595 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5e3dd157 4596 ar->fw_version_major =
5c01aa3d
MK		 4597 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
4598 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5e3dd157 4599 ar->fw_version_release =
5c01aa3d
MK		 4600 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
4601 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
4602 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
4603 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
4604 ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
4605
5c01aa3d 4606 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
2a3e60d3 4607 arg.service_map, arg.service_map_len);
8865bee4 4608
5c8726ec 4609 if (ar->num_rf_chains > ar->max_spatial_stream) {
7aa7a72a 4610 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
5c8726ec
RM		 4611 ar->num_rf_chains, ar->max_spatial_stream);
4612 ar->num_rf_chains = ar->max_spatial_stream;
8865bee4 4613 }
5e3dd157 4614
166de3f1
RM		 4615 if (!ar->cfg_tx_chainmask) {
4616 ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
4617 ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
4618 }
fdb959c7 4619
5e3dd157
KV		 4620 if (strlen(ar->hw->wiphy->fw_version) == 0) {
4621 snprintf(ar->hw->wiphy->fw_version,
4622 sizeof(ar->hw->wiphy->fw_version),
4623 "%u.%u.%u.%u",
4624 ar->fw_version_major,
4625 ar->fw_version_minor,
4626 ar->fw_version_release,
4627 ar->fw_version_build);
4628 }
4629
5c01aa3d
MK		 4630 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
4631 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
7aa7a72a 4632 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
b3effe61
BM		 4633 num_mem_reqs);
4634 return;
6f97d256
BM		 4635 }
4636
b0399417 4637 if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
99ad1cba 4638 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
c4cdf753 4639 ar->running_fw->fw_file.fw_features))
99ad1cba
MK		 4640 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
4641 ar->max_num_vdevs;
4642 else
4643 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
4644 ar->max_num_vdevs;
4645
b0399417 4646 ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
5699a6f2 4647 ar->max_num_vdevs;
b0399417
RM		 4648 ar->num_tids = ar->num_active_peers * 2;
4649 ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
4650 }
4651
4652 /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
4653 * and WMI_SERVICE_IRAM_TIDS, etc.
4654 */
4655
a925a376
VT		 4656 allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
4657 num_mem_reqs);
4658 if (allocated)
4659 goto skip_mem_alloc;
4660
4661 /* Either this event is received during boot time or there is a change
4662 * in memory requirement from firmware when compared to last request.
4663 * Free any old memory and do a fresh allocation based on the current
4664 * memory requirement.
4665 */
4666 ath10k_wmi_free_host_mem(ar);
4667
b3effe61 4668 for (i = 0; i < num_mem_reqs; ++i) {
5c01aa3d
MK		 4669 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
4670 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
4671 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
4672 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
b3effe61 4673
b0399417
RM		 4674 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
4675 if (ar->num_active_peers)
4676 num_units = ar->num_active_peers + 1;
4677 else
4678 num_units = ar->max_num_peers + 1;
4679 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
b3effe61
BM		 4680 /* number of units to allocate is number of
4681 * peers, 1 extra for self peer on target */
4682 /* this needs to be tied, host and target
4683 * can get out of sync */
b0399417
RM		 4684 num_units = ar->max_num_peers + 1;
4685 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
4686 num_units = ar->max_num_vdevs + 1;
4687 }
b3effe61 4688
7aa7a72a 4689 ath10k_dbg(ar, ATH10K_DBG_WMI,
b3effe61
BM		 4690 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
4691 req_id,
5c01aa3d 4692 __le32_to_cpu(arg.mem_reqs[i]->num_units),
b3effe61
BM		 4693 num_unit_info,
4694 unit_size,
4695 num_units);
4696
4697 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
4698 unit_size);
4699 if (ret)
4700 return;
4701 }
4702
a925a376 4703skip_mem_alloc:
7aa7a72a 4704 ath10k_dbg(ar, ATH10K_DBG_WMI,
ca996ec5 4705 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
5c01aa3d
MK		 4706 __le32_to_cpu(arg.min_tx_power),
4707 __le32_to_cpu(arg.max_tx_power),
4708 __le32_to_cpu(arg.ht_cap),
4709 __le32_to_cpu(arg.vht_cap),
4710 __le32_to_cpu(arg.sw_ver0),
4711 __le32_to_cpu(arg.sw_ver1),
ca996ec5 4712 __le32_to_cpu(arg.fw_build),
5c01aa3d
MK		 4713 __le32_to_cpu(arg.phy_capab),
4714 __le32_to_cpu(arg.num_rf_chains),
4715 __le32_to_cpu(arg.eeprom_rd),
4716 __le32_to_cpu(arg.num_mem_reqs));
6f97d256 4717
c8ecfc1c
RM		 4718 dev_kfree_skb(skb);
4719 ar->svc_rdy_skb = NULL;
6f97d256
BM		 4720 complete(&ar->wmi.service_ready);
4721}
4722
c8ecfc1c
RM		 4723void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
4724{
4725 ar->svc_rdy_skb = skb;
4726 queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
4727}
4728
d7579d12
MK		 4729static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4730 struct wmi_rdy_ev_arg *arg)
5e3dd157 4731{
32653cf1 4732 struct wmi_ready_event *ev = (void *)skb->data;
5e3dd157 4733
32653cf1
MK		 4734 if (skb->len < sizeof(*ev))
4735 return -EPROTO;
4736
4737 skb_pull(skb, sizeof(*ev));
4738 arg->sw_version = ev->sw_version;
4739 arg->abi_version = ev->abi_version;
4740 arg->status = ev->status;
4741 arg->mac_addr = ev->mac_addr.addr;
4742
4743 return 0;
4744}
5e3dd157 4745
c1a4654a
MK		 4746static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
4747 struct wmi_roam_ev_arg *arg)
4748{
4749 struct wmi_roam_ev *ev = (void *)skb->data;
4750
4751 if (skb->len < sizeof(*ev))
4752 return -EPROTO;
4753
4754 skb_pull(skb, sizeof(*ev));
4755 arg->vdev_id = ev->vdev_id;
4756 arg->reason = ev->reason;
4757
4758 return 0;
4759}
4760
0226d602 4761int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
32653cf1
MK		 4762{
4763 struct wmi_rdy_ev_arg arg = {};
4764 int ret;
4765
d7579d12 4766 ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
32653cf1
MK		 4767 if (ret) {
4768 ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
4769 return ret;
4770 }
5e3dd157 4771
7aa7a72a 4772 ath10k_dbg(ar, ATH10K_DBG_WMI,
32653cf1
MK		 4773 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
4774 __le32_to_cpu(arg.sw_version),
4775 __le32_to_cpu(arg.abi_version),
4776 arg.mac_addr,
4777 __le32_to_cpu(arg.status));
5e3dd157 4778
32653cf1 4779 ether_addr_copy(ar->mac_addr, arg.mac_addr);
5e3dd157
KV		 4780 complete(&ar->wmi.unified_ready);
4781 return 0;
4782}
4783
a57a6a27
RM		 4784static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
4785{
4786 const struct wmi_pdev_temperature_event *ev;
4787
4788 ev = (struct wmi_pdev_temperature_event *)skb->data;
4789 if (WARN_ON(skb->len < sizeof(*ev)))
4790 return -EPROTO;
4791
ac2953fc 4792 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
a57a6a27
RM		 4793 return 0;
4794}
4795
d7579d12 4796static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 4797{
4798 struct wmi_cmd_hdr *cmd_hdr;
4799 enum wmi_event_id id;
5e3dd157
KV		 4800
4801 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
4802 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
4803
4804 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 4805 goto out;
5e3dd157 4806
d35a6c18 4807 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5e3dd157
KV		 4808
4809 switch (id) {
4810 case WMI_MGMT_RX_EVENTID:
4811 ath10k_wmi_event_mgmt_rx(ar, skb);
4812 /* mgmt_rx() owns the skb now! */
4813 return;
4814 case WMI_SCAN_EVENTID:
4815 ath10k_wmi_event_scan(ar, skb);
4816 break;
4817 case WMI_CHAN_INFO_EVENTID:
4818 ath10k_wmi_event_chan_info(ar, skb);
4819 break;
4820 case WMI_ECHO_EVENTID:
4821 ath10k_wmi_event_echo(ar, skb);
4822 break;
4823 case WMI_DEBUG_MESG_EVENTID:
4824 ath10k_wmi_event_debug_mesg(ar, skb);
4825 break;
4826 case WMI_UPDATE_STATS_EVENTID:
4827 ath10k_wmi_event_update_stats(ar, skb);
4828 break;
4829 case WMI_VDEV_START_RESP_EVENTID:
4830 ath10k_wmi_event_vdev_start_resp(ar, skb);
4831 break;
4832 case WMI_VDEV_STOPPED_EVENTID:
4833 ath10k_wmi_event_vdev_stopped(ar, skb);
4834 break;
4835 case WMI_PEER_STA_KICKOUT_EVENTID:
4836 ath10k_wmi_event_peer_sta_kickout(ar, skb);
4837 break;
4838 case WMI_HOST_SWBA_EVENTID:
4839 ath10k_wmi_event_host_swba(ar, skb);
4840 break;
4841 case WMI_TBTTOFFSET_UPDATE_EVENTID:
4842 ath10k_wmi_event_tbttoffset_update(ar, skb);
4843 break;
4844 case WMI_PHYERR_EVENTID:
4845 ath10k_wmi_event_phyerr(ar, skb);
4846 break;
4847 case WMI_ROAM_EVENTID:
4848 ath10k_wmi_event_roam(ar, skb);
4849 break;
4850 case WMI_PROFILE_MATCH:
4851 ath10k_wmi_event_profile_match(ar, skb);
4852 break;
4853 case WMI_DEBUG_PRINT_EVENTID:
4854 ath10k_wmi_event_debug_print(ar, skb);
4855 break;
4856 case WMI_PDEV_QVIT_EVENTID:
4857 ath10k_wmi_event_pdev_qvit(ar, skb);
4858 break;
4859 case WMI_WLAN_PROFILE_DATA_EVENTID:
4860 ath10k_wmi_event_wlan_profile_data(ar, skb);
4861 break;
4862 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
4863 ath10k_wmi_event_rtt_measurement_report(ar, skb);
4864 break;
4865 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
4866 ath10k_wmi_event_tsf_measurement_report(ar, skb);
4867 break;
4868 case WMI_RTT_ERROR_REPORT_EVENTID:
4869 ath10k_wmi_event_rtt_error_report(ar, skb);
4870 break;
4871 case WMI_WOW_WAKEUP_HOST_EVENTID:
4872 ath10k_wmi_event_wow_wakeup_host(ar, skb);
4873 break;
4874 case WMI_DCS_INTERFERENCE_EVENTID:
4875 ath10k_wmi_event_dcs_interference(ar, skb);
4876 break;
4877 case WMI_PDEV_TPC_CONFIG_EVENTID:
4878 ath10k_wmi_event_pdev_tpc_config(ar, skb);
4879 break;
4880 case WMI_PDEV_FTM_INTG_EVENTID:
4881 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
4882 break;
4883 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
4884 ath10k_wmi_event_gtk_offload_status(ar, skb);
4885 break;
4886 case WMI_GTK_REKEY_FAIL_EVENTID:
4887 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
4888 break;
4889 case WMI_TX_DELBA_COMPLETE_EVENTID:
4890 ath10k_wmi_event_delba_complete(ar, skb);
4891 break;
4892 case WMI_TX_ADDBA_COMPLETE_EVENTID:
4893 ath10k_wmi_event_addba_complete(ar, skb);
4894 break;
4895 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
4896 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
4897 break;
4898 case WMI_SERVICE_READY_EVENTID:
b34d2b3d 4899 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 4900 return;
5e3dd157 4901 case WMI_READY_EVENTID:
b34d2b3d 4902 ath10k_wmi_event_ready(ar, skb);
5e3dd157
KV		 4903 break;
4904 default:
7aa7a72a 4905 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5e3dd157
KV		 4906 break;
4907 }
4908
469d479f 4909out:
5e3dd157
KV		 4910 dev_kfree_skb(skb);
4911}
4912
d7579d12 4913static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
8a6618b0
BM		 4914{
4915 struct wmi_cmd_hdr *cmd_hdr;
4916 enum wmi_10x_event_id id;
43d2a30f 4917 bool consumed;
8a6618b0
BM		 4918
4919 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
4920 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
4921
4922 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 4923 goto out;
8a6618b0 4924
d35a6c18 4925 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
8a6618b0 4926
43d2a30f
KV		 4927 consumed = ath10k_tm_event_wmi(ar, id, skb);
4928
4929 /* Ready event must be handled normally also in UTF mode so that we
4930 * know the UTF firmware has booted, others we are just bypass WMI
4931 * events to testmode.
4932 */
4933 if (consumed && id != WMI_10X_READY_EVENTID) {
4934 ath10k_dbg(ar, ATH10K_DBG_WMI,
4935 "wmi testmode consumed 0x%x\n", id);
4936 goto out;
4937 }
4938
8a6618b0
BM		 4939 switch (id) {
4940 case WMI_10X_MGMT_RX_EVENTID:
4941 ath10k_wmi_event_mgmt_rx(ar, skb);
4942 /* mgmt_rx() owns the skb now! */
4943 return;
4944 case WMI_10X_SCAN_EVENTID:
4945 ath10k_wmi_event_scan(ar, skb);
4946 break;
4947 case WMI_10X_CHAN_INFO_EVENTID:
4948 ath10k_wmi_event_chan_info(ar, skb);
4949 break;
4950 case WMI_10X_ECHO_EVENTID:
4951 ath10k_wmi_event_echo(ar, skb);
4952 break;
4953 case WMI_10X_DEBUG_MESG_EVENTID:
4954 ath10k_wmi_event_debug_mesg(ar, skb);
4955 break;
4956 case WMI_10X_UPDATE_STATS_EVENTID:
4957 ath10k_wmi_event_update_stats(ar, skb);
4958 break;
4959 case WMI_10X_VDEV_START_RESP_EVENTID:
4960 ath10k_wmi_event_vdev_start_resp(ar, skb);
4961 break;
4962 case WMI_10X_VDEV_STOPPED_EVENTID:
4963 ath10k_wmi_event_vdev_stopped(ar, skb);
4964 break;
4965 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
4966 ath10k_wmi_event_peer_sta_kickout(ar, skb);
4967 break;
4968 case WMI_10X_HOST_SWBA_EVENTID:
4969 ath10k_wmi_event_host_swba(ar, skb);
4970 break;
4971 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
4972 ath10k_wmi_event_tbttoffset_update(ar, skb);
4973 break;
4974 case WMI_10X_PHYERR_EVENTID:
4975 ath10k_wmi_event_phyerr(ar, skb);
4976 break;
4977 case WMI_10X_ROAM_EVENTID:
4978 ath10k_wmi_event_roam(ar, skb);
4979 break;
4980 case WMI_10X_PROFILE_MATCH:
4981 ath10k_wmi_event_profile_match(ar, skb);
4982 break;
4983 case WMI_10X_DEBUG_PRINT_EVENTID:
4984 ath10k_wmi_event_debug_print(ar, skb);
4985 break;
4986 case WMI_10X_PDEV_QVIT_EVENTID:
4987 ath10k_wmi_event_pdev_qvit(ar, skb);
4988 break;
4989 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
4990 ath10k_wmi_event_wlan_profile_data(ar, skb);
4991 break;
4992 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
4993 ath10k_wmi_event_rtt_measurement_report(ar, skb);
4994 break;
4995 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
4996 ath10k_wmi_event_tsf_measurement_report(ar, skb);
4997 break;
4998 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
4999 ath10k_wmi_event_rtt_error_report(ar, skb);
5000 break;
5001 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
5002 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5003 break;
5004 case WMI_10X_DCS_INTERFERENCE_EVENTID:
5005 ath10k_wmi_event_dcs_interference(ar, skb);
5006 break;
5007 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
5008 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5009 break;
5010 case WMI_10X_INST_RSSI_STATS_EVENTID:
5011 ath10k_wmi_event_inst_rssi_stats(ar, skb);
5012 break;
5013 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
5014 ath10k_wmi_event_vdev_standby_req(ar, skb);
5015 break;
5016 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
5017 ath10k_wmi_event_vdev_resume_req(ar, skb);
5018 break;
5019 case WMI_10X_SERVICE_READY_EVENTID:
b34d2b3d 5020 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5021 return;
8a6618b0 5022 case WMI_10X_READY_EVENTID:
b34d2b3d 5023 ath10k_wmi_event_ready(ar, skb);
8a6618b0 5024 break;
43d2a30f
KV		 5025 case WMI_10X_PDEV_UTF_EVENTID:
5026 /* ignore utf events */
5027 break;
8a6618b0 5028 default:
7aa7a72a 5029 ath10k_warn(ar, "Unknown eventid: %d\n", id);
8a6618b0
BM		 5030 break;
5031 }
5032
43d2a30f 5033out:
8a6618b0
BM		 5034 dev_kfree_skb(skb);
5035}
5036
d7579d12 5037static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
24c88f78
MK		 5038{
5039 struct wmi_cmd_hdr *cmd_hdr;
5040 enum wmi_10_2_event_id id;
5041
5042 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5043 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5044
5045 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 5046 goto out;
24c88f78 5047
d35a6c18 5048 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
24c88f78
MK		 5049
5050 switch (id) {
5051 case WMI_10_2_MGMT_RX_EVENTID:
5052 ath10k_wmi_event_mgmt_rx(ar, skb);
5053 /* mgmt_rx() owns the skb now! */
5054 return;
5055 case WMI_10_2_SCAN_EVENTID:
5056 ath10k_wmi_event_scan(ar, skb);
5057 break;
5058 case WMI_10_2_CHAN_INFO_EVENTID:
5059 ath10k_wmi_event_chan_info(ar, skb);
5060 break;
5061 case WMI_10_2_ECHO_EVENTID:
5062 ath10k_wmi_event_echo(ar, skb);
5063 break;
5064 case WMI_10_2_DEBUG_MESG_EVENTID:
5065 ath10k_wmi_event_debug_mesg(ar, skb);
5066 break;
5067 case WMI_10_2_UPDATE_STATS_EVENTID:
5068 ath10k_wmi_event_update_stats(ar, skb);
5069 break;
5070 case WMI_10_2_VDEV_START_RESP_EVENTID:
5071 ath10k_wmi_event_vdev_start_resp(ar, skb);
5072 break;
5073 case WMI_10_2_VDEV_STOPPED_EVENTID:
5074 ath10k_wmi_event_vdev_stopped(ar, skb);
5075 break;
5076 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
5077 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5078 break;
5079 case WMI_10_2_HOST_SWBA_EVENTID:
5080 ath10k_wmi_event_host_swba(ar, skb);
5081 break;
5082 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
5083 ath10k_wmi_event_tbttoffset_update(ar, skb);
5084 break;
5085 case WMI_10_2_PHYERR_EVENTID:
5086 ath10k_wmi_event_phyerr(ar, skb);
5087 break;
5088 case WMI_10_2_ROAM_EVENTID:
5089 ath10k_wmi_event_roam(ar, skb);
5090 break;
5091 case WMI_10_2_PROFILE_MATCH:
5092 ath10k_wmi_event_profile_match(ar, skb);
5093 break;
5094 case WMI_10_2_DEBUG_PRINT_EVENTID:
5095 ath10k_wmi_event_debug_print(ar, skb);
5096 break;
5097 case WMI_10_2_PDEV_QVIT_EVENTID:
5098 ath10k_wmi_event_pdev_qvit(ar, skb);
5099 break;
5100 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
5101 ath10k_wmi_event_wlan_profile_data(ar, skb);
5102 break;
5103 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
5104 ath10k_wmi_event_rtt_measurement_report(ar, skb);
5105 break;
5106 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
5107 ath10k_wmi_event_tsf_measurement_report(ar, skb);
5108 break;
5109 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
5110 ath10k_wmi_event_rtt_error_report(ar, skb);
5111 break;
5112 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
5113 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5114 break;
5115 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
5116 ath10k_wmi_event_dcs_interference(ar, skb);
5117 break;
5118 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
5119 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5120 break;
5121 case WMI_10_2_INST_RSSI_STATS_EVENTID:
5122 ath10k_wmi_event_inst_rssi_stats(ar, skb);
5123 break;
5124 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
5125 ath10k_wmi_event_vdev_standby_req(ar, skb);
5126 break;
5127 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
5128 ath10k_wmi_event_vdev_resume_req(ar, skb);
5129 break;
5130 case WMI_10_2_SERVICE_READY_EVENTID:
b34d2b3d 5131 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5132 return;
24c88f78 5133 case WMI_10_2_READY_EVENTID:
b34d2b3d 5134 ath10k_wmi_event_ready(ar, skb);
24c88f78 5135 break;
a57a6a27
RM		 5136 case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
5137 ath10k_wmi_event_temperature(ar, skb);
5138 break;
24c88f78
MK		 5139 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
5140 case WMI_10_2_GPIO_INPUT_EVENTID:
5141 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
5142 case WMI_10_2_GENERIC_BUFFER_EVENTID:
5143 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
5144 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
5145 case WMI_10_2_WDS_PEER_EVENTID:
7aa7a72a 5146 ath10k_dbg(ar, ATH10K_DBG_WMI,
24c88f78
MK		 5147 "received event id %d not implemented\n", id);
5148 break;
5149 default:
7aa7a72a 5150 ath10k_warn(ar, "Unknown eventid: %d\n", id);
24c88f78
MK		 5151 break;
5152 }
5153
469d479f 5154out:
24c88f78
MK		 5155 dev_kfree_skb(skb);
5156}
8a6618b0 5157
1c092961
RM		 5158static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
5159{
5160 struct wmi_cmd_hdr *cmd_hdr;
5161 enum wmi_10_4_event_id id;
5162
5163 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5164 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5165
5166 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
5167 goto out;
5168
5169 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5170
5171 switch (id) {
5172 case WMI_10_4_MGMT_RX_EVENTID:
5173 ath10k_wmi_event_mgmt_rx(ar, skb);
5174 /* mgmt_rx() owns the skb now! */
5175 return;
373b48cf
RM		 5176 case WMI_10_4_ECHO_EVENTID:
5177 ath10k_wmi_event_echo(ar, skb);
5178 break;
5179 case WMI_10_4_DEBUG_MESG_EVENTID:
5180 ath10k_wmi_event_debug_mesg(ar, skb);
5181 break;
5182 case WMI_10_4_SERVICE_READY_EVENTID:
5183 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5184 return;
b2297baa
RM		 5185 case WMI_10_4_SCAN_EVENTID:
5186 ath10k_wmi_event_scan(ar, skb);
5187 break;
5188 case WMI_10_4_CHAN_INFO_EVENTID:
5189 ath10k_wmi_event_chan_info(ar, skb);
5190 break;
2b0a2e0d
RM		 5191 case WMI_10_4_PHYERR_EVENTID:
5192 ath10k_wmi_event_phyerr(ar, skb);
5193 break;
d02e752f
RM		 5194 case WMI_10_4_READY_EVENTID:
5195 ath10k_wmi_event_ready(ar, skb);
5196 break;
373b48cf
RM		 5197 case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
5198 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5199 break;
3cec3be3
RM		 5200 case WMI_10_4_HOST_SWBA_EVENTID:
5201 ath10k_wmi_event_host_swba(ar, skb);
5202 break;
373b48cf
RM		 5203 case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
5204 ath10k_wmi_event_tbttoffset_update(ar, skb);
5205 break;
5206 case WMI_10_4_DEBUG_PRINT_EVENTID:
5207 ath10k_wmi_event_debug_print(ar, skb);
5208 break;
5209 case WMI_10_4_VDEV_START_RESP_EVENTID:
5210 ath10k_wmi_event_vdev_start_resp(ar, skb);
5211 break;
5212 case WMI_10_4_VDEV_STOPPED_EVENTID:
5213 ath10k_wmi_event_vdev_stopped(ar, skb);
5214 break;
5215 case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
5216 ath10k_dbg(ar, ATH10K_DBG_WMI,
5217 "received event id %d not implemented\n", id);
5218 break;
98dd2b92
MP		 5219 case WMI_10_4_UPDATE_STATS_EVENTID:
5220 ath10k_wmi_event_update_stats(ar, skb);
5221 break;
6dd46348
T		 5222 case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
5223 ath10k_wmi_event_temperature(ar, skb);
5224 break;
1c092961
RM		 5225 default:
5226 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5227 break;
5228 }
5229
5230out:
5231 dev_kfree_skb(skb);
5232}
5233
ce42870e
BM		 5234static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
5235{
d7579d12
MK		 5236 int ret;
5237
5238 ret = ath10k_wmi_rx(ar, skb);
5239 if (ret)
5240 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
ce42870e
BM		 5241}
5242
95bf21f9 5243int ath10k_wmi_connect(struct ath10k *ar)
5e3dd157
KV		 5244{
5245 int status;
5246 struct ath10k_htc_svc_conn_req conn_req;
5247 struct ath10k_htc_svc_conn_resp conn_resp;
5248
5249 memset(&conn_req, 0, sizeof(conn_req));
5250 memset(&conn_resp, 0, sizeof(conn_resp));
5251
5252 /* these fields are the same for all service endpoints */
5253 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
5254 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 5255 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV		 5256
5257 /* connect to control service */
5258 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
5259
cd003fad 5260 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157 5261 if (status) {
7aa7a72a 5262 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
5e3dd157
KV		 5263 status);
5264 return status;
5265 }
5266
5267 ar->wmi.eid = conn_resp.eid;
5268 return 0;
5269}
5270
d7579d12
MK		 5271static struct sk_buff *
5272ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
5273 u16 ctl2g, u16 ctl5g,
5274 enum wmi_dfs_region dfs_reg)
5e3dd157
KV		 5275{
5276 struct wmi_pdev_set_regdomain_cmd *cmd;
5277 struct sk_buff *skb;
5278
7aa7a72a 5279 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5280 if (!skb)
d7579d12 5281 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5282
5283 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
5284 cmd->reg_domain = __cpu_to_le32(rd);
5285 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
5286 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
5287 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
5288 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
5289
7aa7a72a 5290 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 5291 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
5292 rd, rd2g, rd5g, ctl2g, ctl5g);
d7579d12 5293 return skb;
5e3dd157
KV		 5294}
5295
d7579d12
MK		 5296static struct sk_buff *
5297ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
5298 rd5g, u16 ctl2g, u16 ctl5g,
5299 enum wmi_dfs_region dfs_reg)
821af6ae
MP		 5300{
5301 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
5302 struct sk_buff *skb;
5303
7aa7a72a 5304 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
821af6ae 5305 if (!skb)
d7579d12 5306 return ERR_PTR(-ENOMEM);
821af6ae
MP		 5307
5308 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
5309 cmd->reg_domain = __cpu_to_le32(rd);
5310 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
5311 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
5312 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
5313 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
5314 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
5315
7aa7a72a 5316 ath10k_dbg(ar, ATH10K_DBG_WMI,
821af6ae
MP		 5317 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
5318 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
d7579d12 5319 return skb;
821af6ae
MP		 5320}
5321
d7579d12
MK		 5322static struct sk_buff *
5323ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
5e3dd157
KV		 5324{
5325 struct wmi_pdev_suspend_cmd *cmd;
5326 struct sk_buff *skb;
5327
7aa7a72a 5328 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5329 if (!skb)
d7579d12 5330 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5331
5332 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
00f5482b 5333 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
5e3dd157 5334
d7579d12 5335 return skb;
5e3dd157
KV		 5336}
5337
d7579d12
MK		 5338static struct sk_buff *
5339ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
5e3dd157
KV		 5340{
5341 struct sk_buff *skb;
5342
7aa7a72a 5343 skb = ath10k_wmi_alloc_skb(ar, 0);
d7579d12
MK		 5344 if (!skb)
5345 return ERR_PTR(-ENOMEM);
5e3dd157 5346
d7579d12 5347 return skb;
5e3dd157
KV		 5348}
5349
d7579d12
MK		 5350static struct sk_buff *
5351ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV		 5352{
5353 struct wmi_pdev_set_param_cmd *cmd;
5354 struct sk_buff *skb;
5355
226a339b 5356 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
7aa7a72a
MK		 5357 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
5358 id);
d7579d12 5359 return ERR_PTR(-EOPNOTSUPP);
226a339b
BM		 5360 }
5361
7aa7a72a 5362 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5363 if (!skb)
d7579d12 5364 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5365
5366 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
5367 cmd->param_id = __cpu_to_le32(id);
5368 cmd->param_value = __cpu_to_le32(value);
5369
7aa7a72a 5370 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
5e3dd157 5371 id, value);
d7579d12 5372 return skb;
5e3dd157
KV		 5373}
5374
0226d602
MK		 5375void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
5376 struct wmi_host_mem_chunks *chunks)
cf9fca8f
MK		 5377{
5378 struct host_memory_chunk *chunk;
5379 int i;
5380
5381 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
5382
5383 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
5384 chunk = &chunks->items[i];
5385 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
5386 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
5387 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
5388
5389 ath10k_dbg(ar, ATH10K_DBG_WMI,
5390 "wmi chunk %d len %d requested, addr 0x%llx\n",
5391 i,
5392 ar->wmi.mem_chunks[i].len,
5393 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
5394 }
5395}
5396
d7579d12 5397static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
5e3dd157
KV		 5398{
5399 struct wmi_init_cmd *cmd;
5400 struct sk_buff *buf;
5401 struct wmi_resource_config config = {};
b3effe61 5402 u32 len, val;
5e3dd157
KV		 5403
5404 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
cfd1061e 5405 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
5e3dd157
KV		 5406 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
5407
5408 config.num_offload_reorder_bufs =
5409 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
5410
5411 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
5412 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
5413 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
5414 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
5415 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
5416 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5417 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5418 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5419 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
ccec9038 5420 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
5e3dd157
KV		 5421 config.scan_max_pending_reqs =
5422 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
5423
5424 config.bmiss_offload_max_vdev =
5425 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
5426
5427 config.roam_offload_max_vdev =
5428 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
5429
5430 config.roam_offload_max_ap_profiles =
5431 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
5432
5433 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
5434 config.num_mcast_table_elems =
5435 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
5436
5437 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
5438 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
5439 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
5440 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
5441 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
5442
5443 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
5444 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5445
5446 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
5447
5448 config.gtk_offload_max_vdev =
5449 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
5450
5451 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
5452 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
5453
b3effe61
BM		 5454 len = sizeof(*cmd) +
5455 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5456
7aa7a72a 5457 buf = ath10k_wmi_alloc_skb(ar, len);
5e3dd157 5458 if (!buf)
d7579d12 5459 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5460
5461 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61 5462
5e3dd157 5463 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 5464 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
5e3dd157 5465
7aa7a72a 5466 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
d7579d12 5467 return buf;
5e3dd157
KV		 5468}
5469
d7579d12 5470static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
12b2b9e3
BM		 5471{
5472 struct wmi_init_cmd_10x *cmd;
5473 struct sk_buff *buf;
5474 struct wmi_resource_config_10x config = {};
5475 u32 len, val;
12b2b9e3 5476
ec6a73f0
BM		 5477 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
5478 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
5479 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
5480 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
5481 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
5482 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
5483 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
5484 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5485 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5486 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5487 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
ccec9038 5488 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
12b2b9e3 5489 config.scan_max_pending_reqs =
ec6a73f0 5490 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM		 5491
5492 config.bmiss_offload_max_vdev =
ec6a73f0 5493 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 5494
5495 config.roam_offload_max_vdev =
ec6a73f0 5496 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 5497
5498 config.roam_offload_max_ap_profiles =
ec6a73f0 5499 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 5500
ec6a73f0 5501 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 5502 config.num_mcast_table_elems =
ec6a73f0 5503 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 5504
ec6a73f0
BM		 5505 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
5506 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
5507 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
5508 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
5509 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 5510
ec6a73f0 5511 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM		 5512 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5513
ec6a73f0 5514 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 5515
ec6a73f0
BM		 5516 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
5517 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM		 5518
5519 len = sizeof(*cmd) +
5520 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5521
7aa7a72a 5522 buf = ath10k_wmi_alloc_skb(ar, len);
12b2b9e3 5523 if (!buf)
d7579d12 5524 return ERR_PTR(-ENOMEM);
12b2b9e3
BM		 5525
5526 cmd = (struct wmi_init_cmd_10x *)buf->data;
5527
12b2b9e3 5528 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 5529 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
12b2b9e3 5530
7aa7a72a 5531 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
d7579d12 5532 return buf;
12b2b9e3
BM		 5533}
5534
d7579d12 5535static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
24c88f78
MK		 5536{
5537 struct wmi_init_cmd_10_2 *cmd;
5538 struct sk_buff *buf;
5539 struct wmi_resource_config_10x config = {};
b6c8e287 5540 u32 len, val, features;
24c88f78
MK		 5541
5542 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
24c88f78 5543 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
cc61a1bb
MSS		 5544
5545 if (ath10k_peer_stats_enabled(ar)) {
af9a6a3a
AK		 5546 config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
5547 config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
5548 } else {
5549 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
5550 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
5551 }
5552
24c88f78
MK		 5553 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
5554 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
5555 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
5556 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5557 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5558 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5559 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
ccec9038 5560 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
24c88f78
MK		 5561
5562 config.scan_max_pending_reqs =
5563 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
5564
5565 config.bmiss_offload_max_vdev =
5566 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
5567
5568 config.roam_offload_max_vdev =
5569 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
5570
5571 config.roam_offload_max_ap_profiles =
5572 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
5573
5574 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
5575 config.num_mcast_table_elems =
5576 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
5577
5578 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
5579 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
5580 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
f6603ff2 5581 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
24c88f78
MK		 5582 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
5583
5584 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
5585 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5586
5587 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
5588
5589 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
5590 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
5591
5592 len = sizeof(*cmd) +
5593 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5594
7aa7a72a 5595 buf = ath10k_wmi_alloc_skb(ar, len);
24c88f78 5596 if (!buf)
d7579d12 5597 return ERR_PTR(-ENOMEM);
24c88f78
MK		 5598
5599 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
5600
b6c8e287 5601 features = WMI_10_2_RX_BATCH_MODE;
844fa572
YL		 5602
5603 if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
5604 test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
de0c789b 5605 features |= WMI_10_2_COEX_GPIO;
844fa572 5606
cc61a1bb 5607 if (ath10k_peer_stats_enabled(ar))
de46c015
MSS		 5608 features |= WMI_10_2_PEER_STATS;
5609
b6c8e287
SM		 5610 cmd->resource_config.feature_mask = __cpu_to_le32(features);
5611
24c88f78 5612 memcpy(&cmd->resource_config.common, &config, sizeof(config));
cf9fca8f 5613 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
24c88f78 5614
7aa7a72a 5615 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
d7579d12 5616 return buf;
5e3dd157
KV		 5617}
5618
d1e52a8e
RM		 5619static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
5620{
5621 struct wmi_init_cmd_10_4 *cmd;
5622 struct sk_buff *buf;
5623 struct wmi_resource_config_10_4 config = {};
5624 u32 len;
5625
5626 config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
5627 config.num_peers = __cpu_to_le32(ar->max_num_peers);
5628 config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
5629 config.num_tids = __cpu_to_le32(ar->num_tids);
5630
5631 config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
5632 config.num_offload_reorder_buffs =
5633 __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
5634 config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
5635 config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
5699a6f2
RM		 5636 config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
5637 config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
d1e52a8e
RM		 5638
5639 config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5640 config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5641 config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5642 config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
5643
bc27e8cd 5644 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
d1e52a8e
RM		 5645 config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
5646 config.bmiss_offload_max_vdev =
5647 __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
5648 config.roam_offload_max_vdev =
5649 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
5650 config.roam_offload_max_ap_profiles =
5651 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
5652 config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
5653 config.num_mcast_table_elems =
5654 __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
5655
5656 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
5657 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
5658 config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
5659 config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
5660 config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
5661
5662 config.rx_skip_defrag_timeout_dup_detection_check =
5663 __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
5664
5665 config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
5666 config.gtk_offload_max_vdev =
5667 __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
5699a6f2 5668 config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
d1e52a8e
RM		 5669 config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
5670 config.max_peer_ext_stats =
5671 __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
5672 config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
5673
5674 config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
5675 config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
5676 config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
5677 config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
5678
5679 config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
5680 config.tt_support =
5681 __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
5682 config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
5683 config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
5684 config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
5685
5686 len = sizeof(*cmd) +
5687 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5688
5689 buf = ath10k_wmi_alloc_skb(ar, len);
5690 if (!buf)
5691 return ERR_PTR(-ENOMEM);
5692
5693 cmd = (struct wmi_init_cmd_10_4 *)buf->data;
5694 memcpy(&cmd->resource_config, &config, sizeof(config));
5695 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
5696
5697 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
5698 return buf;
5699}
5700
0226d602 5701int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
5e3dd157 5702{
a6aa5da3
MK		 5703 if (arg->ie_len && !arg->ie)
5704 return -EINVAL;
5705 if (arg->n_channels && !arg->channels)
5706 return -EINVAL;
5707 if (arg->n_ssids && !arg->ssids)
5708 return -EINVAL;
5709 if (arg->n_bssids && !arg->bssids)
5710 return -EINVAL;
5e3dd157 5711
a6aa5da3
MK		 5712 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
5713 return -EINVAL;
5714 if (arg->n_channels > ARRAY_SIZE(arg->channels))
5715 return -EINVAL;
5716 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
5717 return -EINVAL;
5718 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
5719 return -EINVAL;
5e3dd157 5720
a6aa5da3
MK		 5721 return 0;
5722}
5e3dd157 5723
a6aa5da3
MK		 5724static size_t
5725ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
5726{
5727 int len = 0;
5728
5729 if (arg->ie_len) {
5e3dd157
KV		 5730 len += sizeof(struct wmi_ie_data);
5731 len += roundup(arg->ie_len, 4);
5732 }
5733
5734 if (arg->n_channels) {
5e3dd157
KV		 5735 len += sizeof(struct wmi_chan_list);
5736 len += sizeof(__le32) * arg->n_channels;
5737 }
5738
5739 if (arg->n_ssids) {
5e3dd157
KV		 5740 len += sizeof(struct wmi_ssid_list);
5741 len += sizeof(struct wmi_ssid) * arg->n_ssids;
5742 }
5743
5744 if (arg->n_bssids) {
5e3dd157
KV		 5745 len += sizeof(struct wmi_bssid_list);
5746 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
5747 }
5748
5749 return len;
5750}
5751
0226d602
MK		 5752void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
5753 const struct wmi_start_scan_arg *arg)
5e3dd157 5754{
5e3dd157
KV		 5755 u32 scan_id;
5756 u32 scan_req_id;
5e3dd157
KV		 5757
5758 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
5759 scan_id |= arg->scan_id;
5760
5761 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
5762 scan_req_id |= arg->scan_req_id;
5763
a6aa5da3
MK		 5764 cmn->scan_id = __cpu_to_le32(scan_id);
5765 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
5766 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
5767 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
5768 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
5769 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
5770 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
5771 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
5772 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
5773 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
5774 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
5775 cmn->idle_time = __cpu_to_le32(arg->idle_time);
5776 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
5777 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
5778 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
5779}
5780
5781static void
5782ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
5783 const struct wmi_start_scan_arg *arg)
5784{
5785 struct wmi_ie_data *ie;
5786 struct wmi_chan_list *channels;
5787 struct wmi_ssid_list *ssids;
5788 struct wmi_bssid_list *bssids;
5789 void *ptr = tlvs->tlvs;
5790 int i;
5e3dd157
KV		 5791
5792 if (arg->n_channels) {
a6aa5da3 5793 channels = ptr;
5e3dd157
KV		 5794 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
5795 channels->num_chan = __cpu_to_le32(arg->n_channels);
5796
5797 for (i = 0; i < arg->n_channels; i++)
24c88f78
MK		 5798 channels->channel_list[i].freq =
5799 __cpu_to_le16(arg->channels[i]);
5e3dd157 5800
a6aa5da3
MK		 5801 ptr += sizeof(*channels);
5802 ptr += sizeof(__le32) * arg->n_channels;
5e3dd157
KV		 5803 }
5804
5805 if (arg->n_ssids) {
a6aa5da3 5806 ssids = ptr;
5e3dd157
KV		 5807 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
5808 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
5809
5810 for (i = 0; i < arg->n_ssids; i++) {
5811 ssids->ssids[i].ssid_len =
5812 __cpu_to_le32(arg->ssids[i].len);
5813 memcpy(&ssids->ssids[i].ssid,
5814 arg->ssids[i].ssid,
5815 arg->ssids[i].len);
5816 }
5817
a6aa5da3
MK		 5818 ptr += sizeof(*ssids);
5819 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
5e3dd157
KV		 5820 }
5821
5822 if (arg->n_bssids) {
a6aa5da3 5823 bssids = ptr;
5e3dd157
KV		 5824 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
5825 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
5826
5827 for (i = 0; i < arg->n_bssids; i++)
8f4ffb7d
KV		 5828 ether_addr_copy(bssids->bssid_list[i].addr,
5829 arg->bssids[i].bssid);
5e3dd157 5830
a6aa5da3
MK		 5831 ptr += sizeof(*bssids);
5832 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
5e3dd157
KV		 5833 }
5834
5835 if (arg->ie_len) {
a6aa5da3 5836 ie = ptr;
5e3dd157
KV		 5837 ie->tag = __cpu_to_le32(WMI_IE_TAG);
5838 ie->ie_len = __cpu_to_le32(arg->ie_len);
5839 memcpy(ie->ie_data, arg->ie, arg->ie_len);
5840
a6aa5da3
MK		 5841 ptr += sizeof(*ie);
5842 ptr += roundup(arg->ie_len, 4);
5e3dd157 5843 }
a6aa5da3 5844}
5e3dd157 5845
d7579d12
MK		 5846static struct sk_buff *
5847ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
5848 const struct wmi_start_scan_arg *arg)
a6aa5da3 5849{
d7579d12 5850 struct wmi_start_scan_cmd *cmd;
a6aa5da3
MK		 5851 struct sk_buff *skb;
5852 size_t len;
5853 int ret;
5854
5855 ret = ath10k_wmi_start_scan_verify(arg);
5856 if (ret)
d7579d12 5857 return ERR_PTR(ret);
a6aa5da3 5858
d7579d12 5859 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
a6aa5da3
MK		 5860 skb = ath10k_wmi_alloc_skb(ar, len);
5861 if (!skb)
d7579d12 5862 return ERR_PTR(-ENOMEM);
a6aa5da3 5863
d7579d12 5864 cmd = (struct wmi_start_scan_cmd *)skb->data;
a6aa5da3 5865
d7579d12
MK		 5866 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
5867 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
a6aa5da3 5868
d7579d12 5869 cmd->burst_duration_ms = __cpu_to_le32(0);
5e3dd157 5870
7aa7a72a 5871 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
d7579d12
MK		 5872 return skb;
5873}
5874
5875static struct sk_buff *
5876ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
5877 const struct wmi_start_scan_arg *arg)
5878{
5879 struct wmi_10x_start_scan_cmd *cmd;
5880 struct sk_buff *skb;
5881 size_t len;
5882 int ret;
5883
5884 ret = ath10k_wmi_start_scan_verify(arg);
5885 if (ret)
5886 return ERR_PTR(ret);
5887
5888 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
5889 skb = ath10k_wmi_alloc_skb(ar, len);
5890 if (!skb)
5891 return ERR_PTR(-ENOMEM);
5892
5893 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
5894
5895 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
5896 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
5897
5898 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
5899 return skb;
5e3dd157
KV		 5900}
5901
5902void ath10k_wmi_start_scan_init(struct ath10k *ar,
5903 struct wmi_start_scan_arg *arg)
5904{
5905 /* setup commonly used values */
5906 arg->scan_req_id = 1;
5907 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
5908 arg->dwell_time_active = 50;
5909 arg->dwell_time_passive = 150;
5910 arg->min_rest_time = 50;
5911 arg->max_rest_time = 500;
5912 arg->repeat_probe_time = 0;
5913 arg->probe_spacing_time = 0;
5914 arg->idle_time = 0;
c322892f 5915 arg->max_scan_time = 20000;
5e3dd157
KV		 5916 arg->probe_delay = 5;
5917 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
5918 | WMI_SCAN_EVENT_COMPLETED
5919 | WMI_SCAN_EVENT_BSS_CHANNEL
5920 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
5921 | WMI_SCAN_EVENT_DEQUEUED;
5e3dd157
KV		 5922 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
5923 arg->n_bssids = 1;
5924 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
5925}
5926
d7579d12
MK		 5927static struct sk_buff *
5928ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
5929 const struct wmi_stop_scan_arg *arg)
5e3dd157
KV		 5930{
5931 struct wmi_stop_scan_cmd *cmd;
5932 struct sk_buff *skb;
5933 u32 scan_id;
5934 u32 req_id;
5935
5936 if (arg->req_id > 0xFFF)
d7579d12 5937 return ERR_PTR(-EINVAL);
5e3dd157 5938 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
d7579d12 5939 return ERR_PTR(-EINVAL);
5e3dd157 5940
7aa7a72a 5941 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5942 if (!skb)
d7579d12 5943 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5944
5945 scan_id = arg->u.scan_id;
5946 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
5947
5948 req_id = arg->req_id;
5949 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
5950
5951 cmd = (struct wmi_stop_scan_cmd *)skb->data;
5952 cmd->req_type = __cpu_to_le32(arg->req_type);
5953 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
5954 cmd->scan_id = __cpu_to_le32(scan_id);
5955 cmd->scan_req_id = __cpu_to_le32(req_id);
5956
7aa7a72a 5957 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 5958 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
5959 arg->req_id, arg->req_type, arg->u.scan_id);
d7579d12 5960 return skb;
5e3dd157
KV		 5961}
5962
d7579d12
MK		 5963static struct sk_buff *
5964ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
5965 enum wmi_vdev_type type,
5966 enum wmi_vdev_subtype subtype,
5967 const u8 macaddr[ETH_ALEN])
5e3dd157
KV		 5968{
5969 struct wmi_vdev_create_cmd *cmd;
5970 struct sk_buff *skb;
5971
7aa7a72a 5972 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5973 if (!skb)
d7579d12 5974 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5975
5976 cmd = (struct wmi_vdev_create_cmd *)skb->data;
5977 cmd->vdev_id = __cpu_to_le32(vdev_id);
5978 cmd->vdev_type = __cpu_to_le32(type);
5979 cmd->vdev_subtype = __cpu_to_le32(subtype);
b25f32cb 5980 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
5e3dd157 5981
7aa7a72a 5982 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 5983 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
5984 vdev_id, type, subtype, macaddr);
d7579d12 5985 return skb;
5e3dd157
KV		 5986}
5987
d7579d12
MK		 5988static struct sk_buff *
5989ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 5990{
5991 struct wmi_vdev_delete_cmd *cmd;
5992 struct sk_buff *skb;
5993
7aa7a72a 5994 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5995 if (!skb)
d7579d12 5996 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5997
5998 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
5999 cmd->vdev_id = __cpu_to_le32(vdev_id);
6000
7aa7a72a 6001 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157 6002 "WMI vdev delete id %d\n", vdev_id);
d7579d12 6003 return skb;
5e3dd157
KV		 6004}
6005
d7579d12
MK		 6006static struct sk_buff *
6007ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
6008 const struct wmi_vdev_start_request_arg *arg,
6009 bool restart)
5e3dd157
KV		 6010{
6011 struct wmi_vdev_start_request_cmd *cmd;
6012 struct sk_buff *skb;
6013 const char *cmdname;
6014 u32 flags = 0;
6015
5e3dd157 6016 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
d7579d12 6017 return ERR_PTR(-EINVAL);
5e3dd157 6018 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
d7579d12 6019 return ERR_PTR(-EINVAL);
5e3dd157 6020
d7579d12 6021 if (restart)
5e3dd157
KV		 6022 cmdname = "restart";
6023 else
d7579d12 6024 cmdname = "start";
5e3dd157 6025
7aa7a72a 6026 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6027 if (!skb)
d7579d12 6028 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6029
6030 if (arg->hidden_ssid)
6031 flags |= WMI_VDEV_START_HIDDEN_SSID;
6032 if (arg->pmf_enabled)
6033 flags |= WMI_VDEV_START_PMF_ENABLED;
6034
6035 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
6036 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6037 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
6038 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
6039 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
6040 cmd->flags = __cpu_to_le32(flags);
6041 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
6042 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
6043
6044 if (arg->ssid) {
6045 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
6046 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
6047 }
6048
2d66721c 6049 ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
5e3dd157 6050
7aa7a72a 6051 ath10k_dbg(ar, ATH10K_DBG_WMI,
8cc7f26c
KV		 6052 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
6053 cmdname, arg->vdev_id,
e8a50f8b
MP		 6054 flags, arg->channel.freq, arg->channel.mode,
6055 cmd->chan.flags, arg->channel.max_power);
5e3dd157 6056
d7579d12 6057 return skb;
5e3dd157
KV		 6058}
6059
d7579d12
MK		 6060static struct sk_buff *
6061ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 6062{
6063 struct wmi_vdev_stop_cmd *cmd;
6064 struct sk_buff *skb;
6065
7aa7a72a 6066 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6067 if (!skb)
d7579d12 6068 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6069
6070 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
6071 cmd->vdev_id = __cpu_to_le32(vdev_id);
6072
7aa7a72a 6073 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
d7579d12 6074 return skb;
5e3dd157
KV		 6075}
6076
d7579d12
MK		 6077static struct sk_buff *
6078ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
6079 const u8 *bssid)
5e3dd157
KV		 6080{
6081 struct wmi_vdev_up_cmd *cmd;
6082 struct sk_buff *skb;
6083
7aa7a72a 6084 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6085 if (!skb)
d7579d12 6086 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6087
6088 cmd = (struct wmi_vdev_up_cmd *)skb->data;
6089 cmd->vdev_id = __cpu_to_le32(vdev_id);
6090 cmd->vdev_assoc_id = __cpu_to_le32(aid);
b25f32cb 6091 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
5e3dd157 6092
7aa7a72a 6093 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6094 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
6095 vdev_id, aid, bssid);
d7579d12 6096 return skb;
5e3dd157
KV		 6097}
6098
d7579d12
MK		 6099static struct sk_buff *
6100ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 6101{
6102 struct wmi_vdev_down_cmd *cmd;
6103 struct sk_buff *skb;
6104
7aa7a72a 6105 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6106 if (!skb)
d7579d12 6107 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6108
6109 cmd = (struct wmi_vdev_down_cmd *)skb->data;
6110 cmd->vdev_id = __cpu_to_le32(vdev_id);
6111
7aa7a72a 6112 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157 6113 "wmi mgmt vdev down id 0x%x\n", vdev_id);
d7579d12 6114 return skb;
5e3dd157
KV		 6115}
6116
d7579d12
MK		 6117static struct sk_buff *
6118ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
6119 u32 param_id, u32 param_value)
5e3dd157
KV		 6120{
6121 struct wmi_vdev_set_param_cmd *cmd;
6122 struct sk_buff *skb;
6123
6d1506e7 6124 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7aa7a72a 6125 ath10k_dbg(ar, ATH10K_DBG_WMI,
6d1506e7
BM		 6126 "vdev param %d not supported by firmware\n",
6127 param_id);
d7579d12 6128 return ERR_PTR(-EOPNOTSUPP);
6d1506e7
BM		 6129 }
6130
7aa7a72a 6131 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6132 if (!skb)
d7579d12 6133 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6134
6135 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
6136 cmd->vdev_id = __cpu_to_le32(vdev_id);
6137 cmd->param_id = __cpu_to_le32(param_id);
6138 cmd->param_value = __cpu_to_le32(param_value);
6139
7aa7a72a 6140 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6141 "wmi vdev id 0x%x set param %d value %d\n",
6142 vdev_id, param_id, param_value);
d7579d12 6143 return skb;
5e3dd157
KV		 6144}
6145
d7579d12
MK		 6146static struct sk_buff *
6147ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
6148 const struct wmi_vdev_install_key_arg *arg)
5e3dd157
KV		 6149{
6150 struct wmi_vdev_install_key_cmd *cmd;
6151 struct sk_buff *skb;
6152
6153 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
d7579d12 6154 return ERR_PTR(-EINVAL);
5e3dd157 6155 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
d7579d12 6156 return ERR_PTR(-EINVAL);
5e3dd157 6157
7aa7a72a 6158 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
5e3dd157 6159 if (!skb)
d7579d12 6160 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6161
6162 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
6163 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6164 cmd->key_idx = __cpu_to_le32(arg->key_idx);
6165 cmd->key_flags = __cpu_to_le32(arg->key_flags);
6166 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
6167 cmd->key_len = __cpu_to_le32(arg->key_len);
6168 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
6169 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
6170
6171 if (arg->macaddr)
b25f32cb 6172 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
5e3dd157
KV		 6173 if (arg->key_data)
6174 memcpy(cmd->key_data, arg->key_data, arg->key_len);
6175
7aa7a72a 6176 ath10k_dbg(ar, ATH10K_DBG_WMI,
e0c508ab
MK		 6177 "wmi vdev install key idx %d cipher %d len %d\n",
6178 arg->key_idx, arg->key_cipher, arg->key_len);
d7579d12 6179 return skb;
5e3dd157
KV		 6180}
6181
d7579d12
MK		 6182static struct sk_buff *
6183ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
6184 const struct wmi_vdev_spectral_conf_arg *arg)
855aed12
SW		 6185{
6186 struct wmi_vdev_spectral_conf_cmd *cmd;
6187 struct sk_buff *skb;
855aed12 6188
7aa7a72a 6189 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12 6190 if (!skb)
d7579d12 6191 return ERR_PTR(-ENOMEM);
855aed12
SW		 6192
6193 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
6194 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6195 cmd->scan_count = __cpu_to_le32(arg->scan_count);
6196 cmd->scan_period = __cpu_to_le32(arg->scan_period);
6197 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
6198 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
6199 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
6200 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
6201 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
6202 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
6203 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
6204 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
6205 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
6206 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
6207 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
6208 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
6209 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
6210 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
6211 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
6212 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
6213
d7579d12 6214 return skb;
855aed12
SW		 6215}
6216
d7579d12
MK		 6217static struct sk_buff *
6218ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
6219 u32 trigger, u32 enable)
855aed12
SW		 6220{
6221 struct wmi_vdev_spectral_enable_cmd *cmd;
6222 struct sk_buff *skb;
855aed12 6223
7aa7a72a 6224 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12 6225 if (!skb)
d7579d12 6226 return ERR_PTR(-ENOMEM);
855aed12
SW		 6227
6228 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
6229 cmd->vdev_id = __cpu_to_le32(vdev_id);
6230 cmd->trigger_cmd = __cpu_to_le32(trigger);
6231 cmd->enable_cmd = __cpu_to_le32(enable);
6232
d7579d12 6233 return skb;
855aed12
SW		 6234}
6235
d7579d12
MK		 6236static struct sk_buff *
6237ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
7390ed34
MP		 6238 const u8 peer_addr[ETH_ALEN],
6239 enum wmi_peer_type peer_type)
5e3dd157
KV		 6240{
6241 struct wmi_peer_create_cmd *cmd;
6242 struct sk_buff *skb;
6243
7aa7a72a 6244 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6245 if (!skb)
d7579d12 6246 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6247
6248 cmd = (struct wmi_peer_create_cmd *)skb->data;
6249 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 6250 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6251
7aa7a72a 6252 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6253 "wmi peer create vdev_id %d peer_addr %pM\n",
6254 vdev_id, peer_addr);
d7579d12 6255 return skb;
5e3dd157
KV		 6256}
6257
d7579d12
MK		 6258static struct sk_buff *
6259ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
6260 const u8 peer_addr[ETH_ALEN])
5e3dd157
KV		 6261{
6262 struct wmi_peer_delete_cmd *cmd;
6263 struct sk_buff *skb;
6264
7aa7a72a 6265 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6266 if (!skb)
d7579d12 6267 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6268
6269 cmd = (struct wmi_peer_delete_cmd *)skb->data;
6270 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 6271 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6272
7aa7a72a 6273 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6274 "wmi peer delete vdev_id %d peer_addr %pM\n",
6275 vdev_id, peer_addr);
d7579d12 6276 return skb;
5e3dd157
KV		 6277}
6278
d7579d12
MK		 6279static struct sk_buff *
6280ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
6281 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
5e3dd157
KV		 6282{
6283 struct wmi_peer_flush_tids_cmd *cmd;
6284 struct sk_buff *skb;
6285
7aa7a72a 6286 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6287 if (!skb)
d7579d12 6288 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6289
6290 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
6291 cmd->vdev_id = __cpu_to_le32(vdev_id);
6292 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
b25f32cb 6293 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6294
7aa7a72a 6295 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6296 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
6297 vdev_id, peer_addr, tid_bitmap);
d7579d12 6298 return skb;
5e3dd157
KV		 6299}
6300
d7579d12
MK		 6301static struct sk_buff *
6302ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
6303 const u8 *peer_addr,
6304 enum wmi_peer_param param_id,
6305 u32 param_value)
5e3dd157
KV		 6306{
6307 struct wmi_peer_set_param_cmd *cmd;
6308 struct sk_buff *skb;
6309
7aa7a72a 6310 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6311 if (!skb)
d7579d12 6312 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6313
6314 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
6315 cmd->vdev_id = __cpu_to_le32(vdev_id);
6316 cmd->param_id = __cpu_to_le32(param_id);
6317 cmd->param_value = __cpu_to_le32(param_value);
b25f32cb 6318 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6319
7aa7a72a 6320 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6321 "wmi vdev %d peer 0x%pM set param %d value %d\n",
6322 vdev_id, peer_addr, param_id, param_value);
d7579d12 6323 return skb;
5e3dd157
KV		 6324}
6325
d7579d12
MK		 6326static struct sk_buff *
6327ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
6328 enum wmi_sta_ps_mode psmode)
5e3dd157
KV		 6329{
6330 struct wmi_sta_powersave_mode_cmd *cmd;
6331 struct sk_buff *skb;
6332
7aa7a72a 6333 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6334 if (!skb)
d7579d12 6335 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6336
6337 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
6338 cmd->vdev_id = __cpu_to_le32(vdev_id);
6339 cmd->sta_ps_mode = __cpu_to_le32(psmode);
6340
7aa7a72a 6341 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6342 "wmi set powersave id 0x%x mode %d\n",
6343 vdev_id, psmode);
d7579d12 6344 return skb;
5e3dd157
KV		 6345}
6346
d7579d12
MK		 6347static struct sk_buff *
6348ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
6349 enum wmi_sta_powersave_param param_id,
6350 u32 value)
5e3dd157
KV		 6351{
6352 struct wmi_sta_powersave_param_cmd *cmd;
6353 struct sk_buff *skb;
6354
7aa7a72a 6355 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6356 if (!skb)
d7579d12 6357 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6358
6359 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
6360 cmd->vdev_id = __cpu_to_le32(vdev_id);
6361 cmd->param_id = __cpu_to_le32(param_id);
6362 cmd->param_value = __cpu_to_le32(value);
6363
7aa7a72a 6364 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6365 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
6366 vdev_id, param_id, value);
d7579d12 6367 return skb;
5e3dd157
KV		 6368}
6369
d7579d12
MK		 6370static struct sk_buff *
6371ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6372 enum wmi_ap_ps_peer_param param_id, u32 value)
5e3dd157
KV		 6373{
6374 struct wmi_ap_ps_peer_cmd *cmd;
6375 struct sk_buff *skb;
6376
6377 if (!mac)
d7579d12 6378 return ERR_PTR(-EINVAL);
5e3dd157 6379
7aa7a72a 6380 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6381 if (!skb)
d7579d12 6382 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6383
6384 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
6385 cmd->vdev_id = __cpu_to_le32(vdev_id);
6386 cmd->param_id = __cpu_to_le32(param_id);
6387 cmd->param_value = __cpu_to_le32(value);
b25f32cb 6388 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5e3dd157 6389
7aa7a72a 6390 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6391 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
6392 vdev_id, param_id, value, mac);
d7579d12 6393 return skb;
5e3dd157
KV		 6394}
6395
d7579d12
MK		 6396static struct sk_buff *
6397ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
6398 const struct wmi_scan_chan_list_arg *arg)
5e3dd157
KV		 6399{
6400 struct wmi_scan_chan_list_cmd *cmd;
6401 struct sk_buff *skb;
6402 struct wmi_channel_arg *ch;
6403 struct wmi_channel *ci;
6404 int len;
6405 int i;
6406
6407 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
6408
7aa7a72a 6409 skb = ath10k_wmi_alloc_skb(ar, len);
5e3dd157 6410 if (!skb)
d7579d12 6411 return ERR_PTR(-EINVAL);
5e3dd157
KV		 6412
6413 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
6414 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
6415
6416 for (i = 0; i < arg->n_channels; i++) {
5e3dd157
KV		 6417 ch = &arg->channels[i];
6418 ci = &cmd->chan_info[i];
6419
2d66721c 6420 ath10k_wmi_put_wmi_channel(ci, ch);
5e3dd157
KV		 6421 }
6422
d7579d12 6423 return skb;
5e3dd157
KV		 6424}
6425
24c88f78
MK		 6426static void
6427ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
6428 const struct wmi_peer_assoc_complete_arg *arg)
5e3dd157 6429{
24c88f78 6430 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
5e3dd157 6431
5e3dd157
KV		 6432 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6433 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
6434 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
6435 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
6436 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
6437 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
6438 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
6439 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
6440 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
6441 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
6442 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
6443 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
6444 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
6445
b25f32cb 6446 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
5e3dd157
KV		 6447
6448 cmd->peer_legacy_rates.num_rates =
6449 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
6450 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
6451 arg->peer_legacy_rates.num_rates);
6452
6453 cmd->peer_ht_rates.num_rates =
6454 __cpu_to_le32(arg->peer_ht_rates.num_rates);
6455 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
6456 arg->peer_ht_rates.num_rates);
6457
6458 cmd->peer_vht_rates.rx_max_rate =
6459 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
6460 cmd->peer_vht_rates.rx_mcs_set =
6461 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
6462 cmd->peer_vht_rates.tx_max_rate =
6463 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
6464 cmd->peer_vht_rates.tx_mcs_set =
6465 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
24c88f78
MK		 6466}
6467
6468static void
6469ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
6470 const struct wmi_peer_assoc_complete_arg *arg)
6471{
6472 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
6473
6474 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6475 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
6476}
6477
6478static void
6479ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
6480 const struct wmi_peer_assoc_complete_arg *arg)
6481{
6482 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6483}
6484
6485static void
6486ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
6487 const struct wmi_peer_assoc_complete_arg *arg)
6488{
6489 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
6490 int max_mcs, max_nss;
6491 u32 info0;
6492
6493 /* TODO: Is using max values okay with firmware? */
6494 max_mcs = 0xf;
6495 max_nss = 0xf;
6496
6497 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
6498 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
6499
6500 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6501 cmd->info0 = __cpu_to_le32(info0);
6502}
6503
b54e16f1
VT		 6504static void
6505ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
6506 const struct wmi_peer_assoc_complete_arg *arg)
6507{
6508 struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
6509
6510 ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
6511 cmd->peer_bw_rxnss_override = 0;
6512}
6513
d7579d12
MK		 6514static int
6515ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
24c88f78 6516{
24c88f78
MK		 6517 if (arg->peer_mpdu_density > 16)
6518 return -EINVAL;
6519 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
6520 return -EINVAL;
6521 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
6522 return -EINVAL;
6523
d7579d12
MK		 6524 return 0;
6525}
6526
6527static struct sk_buff *
6528ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
6529 const struct wmi_peer_assoc_complete_arg *arg)
6530{
6531 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
6532 struct sk_buff *skb;
6533 int ret;
6534
6535 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6536 if (ret)
6537 return ERR_PTR(ret);
24c88f78 6538
7aa7a72a 6539 skb = ath10k_wmi_alloc_skb(ar, len);
24c88f78 6540 if (!skb)
d7579d12 6541 return ERR_PTR(-ENOMEM);
24c88f78 6542
d7579d12
MK		 6543 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
6544
6545 ath10k_dbg(ar, ATH10K_DBG_WMI,
6546 "wmi peer assoc vdev %d addr %pM (%s)\n",
6547 arg->vdev_id, arg->addr,
6548 arg->peer_reassoc ? "reassociate" : "new");
6549 return skb;
6550}
6551
6552static struct sk_buff *
6553ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
6554 const struct wmi_peer_assoc_complete_arg *arg)
6555{
6556 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
6557 struct sk_buff *skb;
6558 int ret;
6559
6560 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6561 if (ret)
6562 return ERR_PTR(ret);
6563
6564 skb = ath10k_wmi_alloc_skb(ar, len);
6565 if (!skb)
6566 return ERR_PTR(-ENOMEM);
6567
6568 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
6569
6570 ath10k_dbg(ar, ATH10K_DBG_WMI,
6571 "wmi peer assoc vdev %d addr %pM (%s)\n",
6572 arg->vdev_id, arg->addr,
6573 arg->peer_reassoc ? "reassociate" : "new");
6574 return skb;
6575}
6576
6577static struct sk_buff *
6578ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
6579 const struct wmi_peer_assoc_complete_arg *arg)
6580{
6581 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
6582 struct sk_buff *skb;
6583 int ret;
6584
6585 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6586 if (ret)
6587 return ERR_PTR(ret);
6588
6589 skb = ath10k_wmi_alloc_skb(ar, len);
6590 if (!skb)
6591 return ERR_PTR(-ENOMEM);
6592
6593 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
5e3dd157 6594
7aa7a72a 6595 ath10k_dbg(ar, ATH10K_DBG_WMI,
44d6fa90
CYY		 6596 "wmi peer assoc vdev %d addr %pM (%s)\n",
6597 arg->vdev_id, arg->addr,
6598 arg->peer_reassoc ? "reassociate" : "new");
d7579d12 6599 return skb;
5e3dd157
KV		 6600}
6601
b54e16f1
VT		 6602static struct sk_buff *
6603ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
6604 const struct wmi_peer_assoc_complete_arg *arg)
6605{
6606 size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
6607 struct sk_buff *skb;
6608 int ret;
6609
6610 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6611 if (ret)
6612 return ERR_PTR(ret);
6613
6614 skb = ath10k_wmi_alloc_skb(ar, len);
6615 if (!skb)
6616 return ERR_PTR(-ENOMEM);
6617
6618 ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
6619
6620 ath10k_dbg(ar, ATH10K_DBG_WMI,
6621 "wmi peer assoc vdev %d addr %pM (%s)\n",
6622 arg->vdev_id, arg->addr,
6623 arg->peer_reassoc ? "reassociate" : "new");
6624 return skb;
6625}
6626
a57a6a27
RM		 6627static struct sk_buff *
6628ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
6629{
6630 struct sk_buff *skb;
6631
6632 skb = ath10k_wmi_alloc_skb(ar, 0);
6633 if (!skb)
6634 return ERR_PTR(-ENOMEM);
6635
6636 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
6637 return skb;
6638}
6639
748afc47 6640/* This function assumes the beacon is already DMA mapped */
d7579d12 6641static struct sk_buff *
9ad50182
MK		 6642ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
6643 size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
6644 bool deliver_cab)
5e3dd157 6645{
748afc47 6646 struct wmi_bcn_tx_ref_cmd *cmd;
5e3dd157 6647 struct sk_buff *skb;
748afc47 6648 struct ieee80211_hdr *hdr;
748afc47 6649 u16 fc;
5e3dd157 6650
7aa7a72a 6651 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6652 if (!skb)
d7579d12 6653 return ERR_PTR(-ENOMEM);
5e3dd157 6654
9ad50182 6655 hdr = (struct ieee80211_hdr *)bcn;
748afc47
MK		 6656 fc = le16_to_cpu(hdr->frame_control);
6657
6658 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
9ad50182
MK		 6659 cmd->vdev_id = __cpu_to_le32(vdev_id);
6660 cmd->data_len = __cpu_to_le32(bcn_len);
6661 cmd->data_ptr = __cpu_to_le32(bcn_paddr);
748afc47
MK		 6662 cmd->msdu_id = 0;
6663 cmd->frame_control = __cpu_to_le32(fc);
6664 cmd->flags = 0;
24c88f78 6665 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
748afc47 6666
9ad50182 6667 if (dtim_zero)
748afc47
MK		 6668 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
6669
9ad50182 6670 if (deliver_cab)
748afc47
MK		 6671 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
6672
d7579d12 6673 return skb;
5e3dd157
KV		 6674}
6675
5e752e42
MK		 6676void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
6677 const struct wmi_wmm_params_arg *arg)
5e3dd157
KV		 6678{
6679 params->cwmin = __cpu_to_le32(arg->cwmin);
6680 params->cwmax = __cpu_to_le32(arg->cwmax);
6681 params->aifs = __cpu_to_le32(arg->aifs);
6682 params->txop = __cpu_to_le32(arg->txop);
6683 params->acm = __cpu_to_le32(arg->acm);
6684 params->no_ack = __cpu_to_le32(arg->no_ack);
6685}
6686
d7579d12
MK		 6687static struct sk_buff *
6688ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
5e752e42 6689 const struct wmi_wmm_params_all_arg *arg)
5e3dd157
KV		 6690{
6691 struct wmi_pdev_set_wmm_params *cmd;
6692 struct sk_buff *skb;
6693
7aa7a72a 6694 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6695 if (!skb)
d7579d12 6696 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6697
6698 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
5e752e42
MK		 6699 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
6700 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
6701 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
6702 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
5e3dd157 6703
7aa7a72a 6704 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
d7579d12 6705 return skb;
5e3dd157
KV		 6706}
6707
d7579d12 6708static struct sk_buff *
de23d3ef 6709ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
5e3dd157
KV		 6710{
6711 struct wmi_request_stats_cmd *cmd;
6712 struct sk_buff *skb;
6713
7aa7a72a 6714 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6715 if (!skb)
d7579d12 6716 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6717
6718 cmd = (struct wmi_request_stats_cmd *)skb->data;
de23d3ef 6719 cmd->stats_id = __cpu_to_le32(stats_mask);
5e3dd157 6720
de23d3ef
MK		 6721 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
6722 stats_mask);
d7579d12 6723 return skb;
5e3dd157 6724}
9cfbce75 6725
d7579d12
MK		 6726static struct sk_buff *
6727ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
6728 enum wmi_force_fw_hang_type type, u32 delay_ms)
9cfbce75
MK		 6729{
6730 struct wmi_force_fw_hang_cmd *cmd;
6731 struct sk_buff *skb;
6732
7aa7a72a 6733 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9cfbce75 6734 if (!skb)
d7579d12 6735 return ERR_PTR(-ENOMEM);
9cfbce75
MK		 6736
6737 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
6738 cmd->type = __cpu_to_le32(type);
6739 cmd->delay_ms = __cpu_to_le32(delay_ms);
6740
7aa7a72a 6741 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
9cfbce75 6742 type, delay_ms);
d7579d12 6743 return skb;
9cfbce75 6744}
f118a3e5 6745
d7579d12 6746static struct sk_buff *
467210a6
SJ		 6747ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable,
6748 u32 log_level)
f118a3e5
KV		 6749{
6750 struct wmi_dbglog_cfg_cmd *cmd;
6751 struct sk_buff *skb;
6752 u32 cfg;
6753
7aa7a72a 6754 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
f118a3e5 6755 if (!skb)
d7579d12 6756 return ERR_PTR(-ENOMEM);
f118a3e5
KV		 6757
6758 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
6759
6760 if (module_enable) {
467210a6 6761 cfg = SM(log_level,
f118a3e5
KV		 6762 ATH10K_DBGLOG_CFG_LOG_LVL);
6763 } else {
6764 /* set back defaults, all modules with WARN level */
6765 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
6766 ATH10K_DBGLOG_CFG_LOG_LVL);
6767 module_enable = ~0;
6768 }
6769
6770 cmd->module_enable = __cpu_to_le32(module_enable);
6771 cmd->module_valid = __cpu_to_le32(~0);
6772 cmd->config_enable = __cpu_to_le32(cfg);
6773 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
6774
7aa7a72a 6775 ath10k_dbg(ar, ATH10K_DBG_WMI,
f118a3e5
KV		 6776 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
6777 __le32_to_cpu(cmd->module_enable),
6778 __le32_to_cpu(cmd->module_valid),
6779 __le32_to_cpu(cmd->config_enable),
6780 __le32_to_cpu(cmd->config_valid));
d7579d12 6781 return skb;
f118a3e5 6782}
b79b9baa 6783
d7579d12
MK		 6784static struct sk_buff *
6785ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
90174455
RM		 6786{
6787 struct wmi_pdev_pktlog_enable_cmd *cmd;
6788 struct sk_buff *skb;
6789
6790 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6791 if (!skb)
d7579d12 6792 return ERR_PTR(-ENOMEM);
90174455
RM		 6793
6794 ev_bitmap &= ATH10K_PKTLOG_ANY;
90174455
RM		 6795
6796 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
6797 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
d7579d12
MK		 6798
6799 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
6800 ev_bitmap);
6801 return skb;
90174455
RM		 6802}
6803
d7579d12
MK		 6804static struct sk_buff *
6805ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
90174455
RM		 6806{
6807 struct sk_buff *skb;
6808
6809 skb = ath10k_wmi_alloc_skb(ar, 0);
6810 if (!skb)
d7579d12 6811 return ERR_PTR(-ENOMEM);
90174455
RM		 6812
6813 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
d7579d12 6814 return skb;
90174455
RM		 6815}
6816
ffdd738d
RM		 6817static struct sk_buff *
6818ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
6819 u32 duration, u32 next_offset,
6820 u32 enabled)
6821{
6822 struct wmi_pdev_set_quiet_cmd *cmd;
6823 struct sk_buff *skb;
6824
6825 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6826 if (!skb)
6827 return ERR_PTR(-ENOMEM);
6828
6829 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
6830 cmd->period = __cpu_to_le32(period);
6831 cmd->duration = __cpu_to_le32(duration);
6832 cmd->next_start = __cpu_to_le32(next_offset);
6833 cmd->enabled = __cpu_to_le32(enabled);
6834
6835 ath10k_dbg(ar, ATH10K_DBG_WMI,
6836 "wmi quiet param: period %u duration %u enabled %d\n",
6837 period, duration, enabled);
6838 return skb;
6839}
6840
dc8ab278
RM		 6841static struct sk_buff *
6842ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
6843 const u8 *mac)
6844{
6845 struct wmi_addba_clear_resp_cmd *cmd;
6846 struct sk_buff *skb;
6847
6848 if (!mac)
6849 return ERR_PTR(-EINVAL);
6850
6851 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6852 if (!skb)
6853 return ERR_PTR(-ENOMEM);
6854
6855 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
6856 cmd->vdev_id = __cpu_to_le32(vdev_id);
6857 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6858
6859 ath10k_dbg(ar, ATH10K_DBG_WMI,
6860 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
6861 vdev_id, mac);
6862 return skb;
6863}
6864
65c0893d
RM		 6865static struct sk_buff *
6866ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6867 u32 tid, u32 buf_size)
6868{
6869 struct wmi_addba_send_cmd *cmd;
6870 struct sk_buff *skb;
6871
6872 if (!mac)
6873 return ERR_PTR(-EINVAL);
6874
6875 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6876 if (!skb)
6877 return ERR_PTR(-ENOMEM);
6878
6879 cmd = (struct wmi_addba_send_cmd *)skb->data;
6880 cmd->vdev_id = __cpu_to_le32(vdev_id);
6881 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6882 cmd->tid = __cpu_to_le32(tid);
6883 cmd->buffersize = __cpu_to_le32(buf_size);
6884
6885 ath10k_dbg(ar, ATH10K_DBG_WMI,
6886 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
6887 vdev_id, mac, tid, buf_size);
6888 return skb;
6889}
6890
11597413
RM		 6891static struct sk_buff *
6892ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6893 u32 tid, u32 status)
6894{
6895 struct wmi_addba_setresponse_cmd *cmd;
6896 struct sk_buff *skb;
6897
6898 if (!mac)
6899 return ERR_PTR(-EINVAL);
6900
6901 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6902 if (!skb)
6903 return ERR_PTR(-ENOMEM);
6904
6905 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
6906 cmd->vdev_id = __cpu_to_le32(vdev_id);
6907 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6908 cmd->tid = __cpu_to_le32(tid);
6909 cmd->statuscode = __cpu_to_le32(status);
6910
6911 ath10k_dbg(ar, ATH10K_DBG_WMI,
6912 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
6913 vdev_id, mac, tid, status);
6914 return skb;
6915}
6916
50abef85
RM		 6917static struct sk_buff *
6918ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6919 u32 tid, u32 initiator, u32 reason)
6920{
6921 struct wmi_delba_send_cmd *cmd;
6922 struct sk_buff *skb;
6923
6924 if (!mac)
6925 return ERR_PTR(-EINVAL);
6926
6927 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6928 if (!skb)
6929 return ERR_PTR(-ENOMEM);
6930
6931 cmd = (struct wmi_delba_send_cmd *)skb->data;
6932 cmd->vdev_id = __cpu_to_le32(vdev_id);
6933 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6934 cmd->tid = __cpu_to_le32(tid);
6935 cmd->initiator = __cpu_to_le32(initiator);
6936 cmd->reasoncode = __cpu_to_le32(reason);
6937
6938 ath10k_dbg(ar, ATH10K_DBG_WMI,
6939 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
6940 vdev_id, mac, tid, initiator, reason);
6941 return skb;
6942}
6943
29542666
MK		 6944static struct sk_buff *
6945ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
6946{
6947 struct wmi_pdev_get_tpc_config_cmd *cmd;
6948 struct sk_buff *skb;
6949
6950 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6951 if (!skb)
6952 return ERR_PTR(-ENOMEM);
6953
6954 cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
6955 cmd->param = __cpu_to_le32(param);
6956
6957 ath10k_dbg(ar, ATH10K_DBG_WMI,
6958 "wmi pdev get tcp config param:%d\n", param);
6959 return skb;
6960}
6961
bc6f9ae6
MP		 6962size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
6963{
6964 struct ath10k_fw_stats_peer *i;
6965 size_t num = 0;
6966
6967 list_for_each_entry(i, head, list)
6968 ++num;
6969
6970 return num;
6971}
6972
6973size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
6974{
6975 struct ath10k_fw_stats_vdev *i;
6976 size_t num = 0;
6977
6978 list_for_each_entry(i, head, list)
6979 ++num;
6980
6981 return num;
6982}
6983
6984static void
6985ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
6986 char *buf, u32 *length)
6987{
6988 u32 len = *length;
6989 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
6990
6991 len += scnprintf(buf + len, buf_len - len, "\n");
6992 len += scnprintf(buf + len, buf_len - len, "%30s\n",
6993 "ath10k PDEV stats");
6994 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
6995 "=================");
6996
6997 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
6998 "Channel noise floor", pdev->ch_noise_floor);
6999 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7000 "Channel TX power", pdev->chan_tx_power);
7001 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7002 "TX frame count", pdev->tx_frame_count);
7003 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7004 "RX frame count", pdev->rx_frame_count);
7005 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7006 "RX clear count", pdev->rx_clear_count);
7007 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7008 "Cycle count", pdev->cycle_count);
7009 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7010 "PHY error count", pdev->phy_err_count);
7011
7012 *length = len;
7013}
7014
7015static void
7016ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7017 char *buf, u32 *length)
7018{
7019 u32 len = *length;
7020 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7021
7022 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7023 "RTS bad count", pdev->rts_bad);
7024 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7025 "RTS good count", pdev->rts_good);
7026 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7027 "FCS bad count", pdev->fcs_bad);
7028 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7029 "No beacon count", pdev->no_beacons);
7030 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7031 "MIB int count", pdev->mib_int_count);
7032
7033 len += scnprintf(buf + len, buf_len - len, "\n");
7034 *length = len;
7035}
7036
7037static void
7038ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7039 char *buf, u32 *length)
7040{
7041 u32 len = *length;
7042 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7043
7044 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7045 "ath10k PDEV TX stats");
7046 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7047 "=================");
7048
7049 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7050 "HTT cookies queued", pdev->comp_queued);
7051 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7052 "HTT cookies disp.", pdev->comp_delivered);
7053 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7054 "MSDU queued", pdev->msdu_enqued);
7055 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7056 "MPDU queued", pdev->mpdu_enqued);
7057 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7058 "MSDUs dropped", pdev->wmm_drop);
7059 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7060 "Local enqued", pdev->local_enqued);
7061 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7062 "Local freed", pdev->local_freed);
7063 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7064 "HW queued", pdev->hw_queued);
7065 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7066 "PPDUs reaped", pdev->hw_reaped);
7067 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7068 "Num underruns", pdev->underrun);
7069 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7070 "PPDUs cleaned", pdev->tx_abort);
7071 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7072 "MPDUs requed", pdev->mpdus_requed);
7073 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7074 "Excessive retries", pdev->tx_ko);
7075 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7076 "HW rate", pdev->data_rc);
7077 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7078 "Sched self tiggers", pdev->self_triggers);
7079 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7080 "Dropped due to SW retries",
7081 pdev->sw_retry_failure);
7082 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7083 "Illegal rate phy errors",
7084 pdev->illgl_rate_phy_err);
7085 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7086 "Pdev continuous xretry", pdev->pdev_cont_xretry);
7087 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7088 "TX timeout", pdev->pdev_tx_timeout);
7089 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7090 "PDEV resets", pdev->pdev_resets);
7091 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7092 "PHY underrun", pdev->phy_underrun);
7093 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7094 "MPDU is more than txop limit", pdev->txop_ovf);
7095 *length = len;
7096}
7097
7098static void
7099ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7100 char *buf, u32 *length)
7101{
7102 u32 len = *length;
7103 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7104
7105 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7106 "ath10k PDEV RX stats");
7107 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7108 "=================");
7109
7110 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7111 "Mid PPDU route change",
7112 pdev->mid_ppdu_route_change);
7113 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7114 "Tot. number of statuses", pdev->status_rcvd);
7115 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7116 "Extra frags on rings 0", pdev->r0_frags);
7117 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7118 "Extra frags on rings 1", pdev->r1_frags);
7119 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7120 "Extra frags on rings 2", pdev->r2_frags);
7121 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7122 "Extra frags on rings 3", pdev->r3_frags);
7123 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7124 "MSDUs delivered to HTT", pdev->htt_msdus);
7125 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7126 "MPDUs delivered to HTT", pdev->htt_mpdus);
7127 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7128 "MSDUs delivered to stack", pdev->loc_msdus);
7129 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7130 "MPDUs delivered to stack", pdev->loc_mpdus);
7131 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7132 "Oversized AMSUs", pdev->oversize_amsdu);
7133 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7134 "PHY errors", pdev->phy_errs);
7135 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7136 "PHY errors drops", pdev->phy_err_drop);
7137 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7138 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
7139 *length = len;
7140}
7141
7142static void
7143ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
7144 char *buf, u32 *length)
7145{
7146 u32 len = *length;
7147 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7148 int i;
7149
7150 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7151 "vdev id", vdev->vdev_id);
7152 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7153 "beacon snr", vdev->beacon_snr);
7154 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7155 "data snr", vdev->data_snr);
7156 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7157 "num rx frames", vdev->num_rx_frames);
7158 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7159 "num rts fail", vdev->num_rts_fail);
7160 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7161 "num rts success", vdev->num_rts_success);
7162 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7163 "num rx err", vdev->num_rx_err);
7164 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7165 "num rx discard", vdev->num_rx_discard);
7166 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7167 "num tx not acked", vdev->num_tx_not_acked);
7168
7169 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
7170 len += scnprintf(buf + len, buf_len - len,
7171 "%25s [%02d] %u\n",
7172 "num tx frames", i,
7173 vdev->num_tx_frames[i]);
7174
7175 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
7176 len += scnprintf(buf + len, buf_len - len,
7177 "%25s [%02d] %u\n",
7178 "num tx frames retries", i,
7179 vdev->num_tx_frames_retries[i]);
7180
7181 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
7182 len += scnprintf(buf + len, buf_len - len,
7183 "%25s [%02d] %u\n",
7184 "num tx frames failures", i,
7185 vdev->num_tx_frames_failures[i]);
7186
7187 for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
7188 len += scnprintf(buf + len, buf_len - len,
7189 "%25s [%02d] 0x%08x\n",
7190 "tx rate history", i,
7191 vdev->tx_rate_history[i]);
7192
7193 for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
7194 len += scnprintf(buf + len, buf_len - len,
7195 "%25s [%02d] %u\n",
7196 "beacon rssi history", i,
7197 vdev->beacon_rssi_history[i]);
7198
7199 len += scnprintf(buf + len, buf_len - len, "\n");
7200 *length = len;
7201}
7202
7203static void
7204ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
7205 char *buf, u32 *length)
7206{
7207 u32 len = *length;
7208 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7209
7210 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7211 "Peer MAC address", peer->peer_macaddr);
7212 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7213 "Peer RSSI", peer->peer_rssi);
7214 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7215 "Peer TX rate", peer->peer_tx_rate);
7216 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7217 "Peer RX rate", peer->peer_rx_rate);
de46c015
MSS		 7218 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7219 "Peer RX duration", peer->rx_duration);
7220
bc6f9ae6
MP		 7221 len += scnprintf(buf + len, buf_len - len, "\n");
7222 *length = len;
7223}
7224
7225void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7226 struct ath10k_fw_stats *fw_stats,
7227 char *buf)
7228{
7229 u32 len = 0;
7230 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7231 const struct ath10k_fw_stats_pdev *pdev;
7232 const struct ath10k_fw_stats_vdev *vdev;
7233 const struct ath10k_fw_stats_peer *peer;
7234 size_t num_peers;
7235 size_t num_vdevs;
7236
7237 spin_lock_bh(&ar->data_lock);
7238
7239 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7240 struct ath10k_fw_stats_pdev, list);
7241 if (!pdev) {
7242 ath10k_warn(ar, "failed to get pdev stats\n");
7243 goto unlock;
7244 }
7245
7246 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7247 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7248
7249 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7250 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7251 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7252
7253 len += scnprintf(buf + len, buf_len - len, "\n");
7254 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7255 "ath10k VDEV stats", num_vdevs);
7256 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7257 "=================");
7258
7259 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7260 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7261 }
7262
7263 len += scnprintf(buf + len, buf_len - len, "\n");
7264 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7265 "ath10k PEER stats", num_peers);
7266 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7267 "=================");
7268
7269 list_for_each_entry(peer, &fw_stats->peers, list) {
7270 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7271 }
7272
7273unlock:
7274 spin_unlock_bh(&ar->data_lock);
7275
7276 if (len >= buf_len)
7277 buf[len - 1] = 0;
7278 else
7279 buf[len] = 0;
7280}
7281
7282void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7283 struct ath10k_fw_stats *fw_stats,
7284 char *buf)
7285{
7286 unsigned int len = 0;
7287 unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
7288 const struct ath10k_fw_stats_pdev *pdev;
7289 const struct ath10k_fw_stats_vdev *vdev;
7290 const struct ath10k_fw_stats_peer *peer;
7291 size_t num_peers;
7292 size_t num_vdevs;
7293
7294 spin_lock_bh(&ar->data_lock);
7295
7296 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7297 struct ath10k_fw_stats_pdev, list);
7298 if (!pdev) {
7299 ath10k_warn(ar, "failed to get pdev stats\n");
7300 goto unlock;
7301 }
7302
7303 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7304 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7305
7306 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7307 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
7308 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7309 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7310
7311 len += scnprintf(buf + len, buf_len - len, "\n");
7312 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7313 "ath10k VDEV stats", num_vdevs);
7314 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7315 "=================");
7316
7317 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7318 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7319 }
7320
7321 len += scnprintf(buf + len, buf_len - len, "\n");
7322 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7323 "ath10k PEER stats", num_peers);
7324 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7325 "=================");
7326
7327 list_for_each_entry(peer, &fw_stats->peers, list) {
7328 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7329 }
7330
7331unlock:
7332 spin_unlock_bh(&ar->data_lock);
7333
7334 if (len >= buf_len)
7335 buf[len - 1] = 0;
7336 else
7337 buf[len] = 0;
7338}
7339
62f77f09
M		 7340static struct sk_buff *
7341ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
7342 u32 detect_level, u32 detect_margin)
7343{
7344 struct wmi_pdev_set_adaptive_cca_params *cmd;
7345 struct sk_buff *skb;
7346
7347 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7348 if (!skb)
7349 return ERR_PTR(-ENOMEM);
7350
7351 cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
7352 cmd->enable = __cpu_to_le32(enable);
7353 cmd->cca_detect_level = __cpu_to_le32(detect_level);
7354 cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
7355
7356 ath10k_dbg(ar, ATH10K_DBG_WMI,
7357 "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
7358 enable, detect_level, detect_margin);
7359 return skb;
7360}
7361
98dd2b92
MP		 7362void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
7363 struct ath10k_fw_stats *fw_stats,
7364 char *buf)
7365{
7366 u32 len = 0;
7367 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7368 const struct ath10k_fw_stats_pdev *pdev;
7369 const struct ath10k_fw_stats_vdev *vdev;
7370 const struct ath10k_fw_stats_peer *peer;
7371 size_t num_peers;
7372 size_t num_vdevs;
7373
7374 spin_lock_bh(&ar->data_lock);
7375
7376 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7377 struct ath10k_fw_stats_pdev, list);
7378 if (!pdev) {
7379 ath10k_warn(ar, "failed to get pdev stats\n");
7380 goto unlock;
7381 }
7382
7383 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7384 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7385
7386 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7387 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
7388 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7389
7390 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7391 "HW paused", pdev->hw_paused);
7392 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7393 "Seqs posted", pdev->seq_posted);
7394 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7395 "Seqs failed queueing", pdev->seq_failed_queueing);
7396 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7397 "Seqs completed", pdev->seq_completed);
7398 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7399 "Seqs restarted", pdev->seq_restarted);
7400 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7401 "MU Seqs posted", pdev->mu_seq_posted);
7402 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7403 "MPDUs SW flushed", pdev->mpdus_sw_flush);
7404 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7405 "MPDUs HW filtered", pdev->mpdus_hw_filter);
7406 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7407 "MPDUs truncated", pdev->mpdus_truncated);
7408 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7409 "MPDUs receive no ACK", pdev->mpdus_ack_failed);
7410 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7411 "MPDUs expired", pdev->mpdus_expired);
7412
7413 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7414 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7415 "Num Rx Overflow errors", pdev->rx_ovfl_errs);
7416
7417 len += scnprintf(buf + len, buf_len - len, "\n");
7418 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7419 "ath10k VDEV stats", num_vdevs);
7420 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7421 "=================");
7422
7423 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7424 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7425 }
7426
7427 len += scnprintf(buf + len, buf_len - len, "\n");
7428 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7429 "ath10k PEER stats", num_peers);
7430 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7431 "=================");
7432
7433 list_for_each_entry(peer, &fw_stats->peers, list) {
7434 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7435 }
7436
7437unlock:
7438 spin_unlock_bh(&ar->data_lock);
7439
7440 if (len >= buf_len)
7441 buf[len - 1] = 0;
7442 else
7443 buf[len] = 0;
7444}
7445
6e4de1a4
PO		 7446int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
7447 enum wmi_vdev_subtype subtype)
7448{
7449 switch (subtype) {
7450 case WMI_VDEV_SUBTYPE_NONE:
7451 return WMI_VDEV_SUBTYPE_LEGACY_NONE;
7452 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7453 return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
7454 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7455 return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
7456 case WMI_VDEV_SUBTYPE_P2P_GO:
7457 return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
7458 case WMI_VDEV_SUBTYPE_PROXY_STA:
7459 return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
7460 case WMI_VDEV_SUBTYPE_MESH_11S:
7461 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7462 return -ENOTSUPP;
7463 }
7464 return -ENOTSUPP;
7465}
7466
7467static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
7468 enum wmi_vdev_subtype subtype)
7469{
7470 switch (subtype) {
7471 case WMI_VDEV_SUBTYPE_NONE:
7472 return WMI_VDEV_SUBTYPE_10_2_4_NONE;
7473 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7474 return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
7475 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7476 return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
7477 case WMI_VDEV_SUBTYPE_P2P_GO:
7478 return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
7479 case WMI_VDEV_SUBTYPE_PROXY_STA:
7480 return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
7481 case WMI_VDEV_SUBTYPE_MESH_11S:
7482 return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
7483 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7484 return -ENOTSUPP;
7485 }
7486 return -ENOTSUPP;
7487}
7488
7489static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
7490 enum wmi_vdev_subtype subtype)
7491{
7492 switch (subtype) {
7493 case WMI_VDEV_SUBTYPE_NONE:
7494 return WMI_VDEV_SUBTYPE_10_4_NONE;
7495 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7496 return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
7497 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7498 return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
7499 case WMI_VDEV_SUBTYPE_P2P_GO:
7500 return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
7501 case WMI_VDEV_SUBTYPE_PROXY_STA:
7502 return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
7503 case WMI_VDEV_SUBTYPE_MESH_11S:
7504 return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
7505 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7506 return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
7507 }
7508 return -ENOTSUPP;
7509}
7510
47771902
RM		 7511static struct sk_buff *
7512ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
7513 enum wmi_host_platform_type type,
7514 u32 fw_feature_bitmap)
7515{
7516 struct wmi_ext_resource_config_10_4_cmd *cmd;
7517 struct sk_buff *skb;
7518
7519 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7520 if (!skb)
7521 return ERR_PTR(-ENOMEM);
7522
7523 cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
7524 cmd->host_platform_config = __cpu_to_le32(type);
7525 cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
7526
7527 ath10k_dbg(ar, ATH10K_DBG_WMI,
7528 "wmi ext resource config host type %d firmware feature bitmap %08x\n",
7529 type, fw_feature_bitmap);
7530 return skb;
7531}
7532
d7579d12
MK		 7533static const struct wmi_ops wmi_ops = {
7534 .rx = ath10k_wmi_op_rx,
7535 .map_svc = wmi_main_svc_map,
7536
7537 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7538 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7539 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7540 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7541 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7542 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7543 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK		 7544 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7545 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
7546 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
7547 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
c1a4654a 7548 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK		 7549
7550 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7551 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7552 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
7553 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7554 .gen_init = ath10k_wmi_op_gen_init,
7555 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
7556 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7557 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7558 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7559 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7560 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7561 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7562 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7563 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7564 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7565 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7566 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7567 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 7568 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7569 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7570 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7571 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7572 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
7573 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7574 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7575 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7576 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7577 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7578 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7579 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7580 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7581 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7582 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7583 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7584 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7585 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
a57a6a27 7586 /* .gen_pdev_get_temperature not implemented */
dc8ab278 7587 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7588 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7589 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7590 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7591 .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
6e4de1a4 7592 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
be9ce9d8 7593 /* .gen_bcn_tmpl not implemented */
4c4955fe 7594 /* .gen_prb_tmpl not implemented */
369242b4 7595 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7596 /* .gen_adaptive_qcs not implemented */
62f77f09 7597 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK		 7598};
7599
7600static const struct wmi_ops wmi_10_1_ops = {
7601 .rx = ath10k_wmi_10_1_op_rx,
7602 .map_svc = wmi_10x_svc_map,
7603 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
7604 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
7605 .gen_init = ath10k_wmi_10_1_op_gen_init,
7606 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7607 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7608 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
a57a6a27 7609 /* .gen_pdev_get_temperature not implemented */
d7579d12
MK		 7610
7611 /* shared with main branch */
7612 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7613 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7614 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7615 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7616 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7617 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7618 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK		 7619 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7620 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7621 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK		 7622
7623 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7624 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7625 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7626 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7627 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7628 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7629 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7630 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7631 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7632 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7633 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7634 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7635 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7636 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7637 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 7638 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7639 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7640 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7641 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7642 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7643 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7644 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7645 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7646 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7647 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7648 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7649 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7650 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7651 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7652 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7653 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7654 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7655 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7656 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7657 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7658 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7659 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
6e4de1a4 7660 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
be9ce9d8 7661 /* .gen_bcn_tmpl not implemented */
4c4955fe 7662 /* .gen_prb_tmpl not implemented */
369242b4 7663 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7664 /* .gen_adaptive_qcs not implemented */
62f77f09 7665 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK		 7666};
7667
7668static const struct wmi_ops wmi_10_2_ops = {
7669 .rx = ath10k_wmi_10_2_op_rx,
20de2229 7670 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
d7579d12
MK		 7671 .gen_init = ath10k_wmi_10_2_op_gen_init,
7672 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
a57a6a27 7673 /* .gen_pdev_get_temperature not implemented */
d7579d12
MK		 7674
7675 /* shared with 10.1 */
7676 .map_svc = wmi_10x_svc_map,
7677 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
d7579d12
MK		 7678 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7679 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7680
7681 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7682 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7683 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7684 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7685 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7686 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7687 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK		 7688 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7689 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7690 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK		 7691
7692 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7693 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7694 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7695 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7696 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7697 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7698 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7699 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7700 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7701 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7702 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7703 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7704 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7705 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7706 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 7707 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7708 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7709 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7710 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7711 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7712 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7713 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7714 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7715 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7716 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7717 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7718 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7719 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7720 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7721 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7722 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7723 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7724 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7725 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7726 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7727 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7728 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
6e4de1a4 7729 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
62f77f09 7730 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK		 7731};
7732
4a16fbec
RM		 7733static const struct wmi_ops wmi_10_2_4_ops = {
7734 .rx = ath10k_wmi_10_2_op_rx,
20de2229 7735 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
4a16fbec
RM		 7736 .gen_init = ath10k_wmi_10_2_op_gen_init,
7737 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
a57a6a27 7738 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
4a16fbec
RM		 7739
7740 /* shared with 10.1 */
7741 .map_svc = wmi_10x_svc_map,
7742 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
4a16fbec
RM		 7743 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7744 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7745
7746 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7747 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7748 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7749 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7750 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
8b019fb0 7751 .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
991adf71 7752 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
4a16fbec
RM		 7753 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7754 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7755 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
4a16fbec
RM		 7756
7757 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7758 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7759 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7760 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7761 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7762 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7763 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7764 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7765 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7766 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7767 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7768 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7769 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7770 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
7771 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7772 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7773 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7774 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7775 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7776 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7777 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7778 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7779 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7780 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7781 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7782 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7783 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7784 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7785 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7786 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7787 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7788 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7789 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7790 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7791 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
29542666 7792 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
bc6f9ae6 7793 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
62f77f09
M		 7794 .gen_pdev_enable_adaptive_cca =
7795 ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
6e4de1a4 7796 .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
be9ce9d8 7797 /* .gen_bcn_tmpl not implemented */
4c4955fe 7798 /* .gen_prb_tmpl not implemented */
369242b4 7799 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7800 /* .gen_adaptive_qcs not implemented */
4a16fbec
RM		 7801};
7802
840357cc 7803static const struct wmi_ops wmi_10_4_ops = {
1c092961 7804 .rx = ath10k_wmi_10_4_op_rx,
840357cc 7805 .map_svc = wmi_10_4_svc_map,
b2297baa 7806
98dd2b92 7807 .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
b2297baa 7808 .pull_scan = ath10k_wmi_op_pull_scan_ev,
1c092961 7809 .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
b2297baa 7810 .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
373b48cf
RM		 7811 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7812 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
3cec3be3 7813 .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
2b0a2e0d
RM		 7814 .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
7815 .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
1c092961 7816 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
d02e752f 7817 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
08e75ea8 7818 .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
373b48cf
RM		 7819
7820 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7821 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7822 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7823 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
d1e52a8e 7824 .gen_init = ath10k_wmi_10_4_op_gen_init,
b2297baa
RM		 7825 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
7826 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
373b48cf
RM		 7827 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7828 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7829 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7830 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7831 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7832 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7833 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7834 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
4535edbd
RM		 7835 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7836 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
373b48cf
RM		 7837 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7838 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7839 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7840 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
b54e16f1 7841 .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
373b48cf
RM		 7842 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7843 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7844 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7845 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7846 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7847 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7848 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7849 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7850 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7851 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7852 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
7853 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
b2887410
VT		 7854 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
7855 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
7856 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
7857 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
98dd2b92 7858 .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
47771902 7859 .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
373b48cf
RM		 7860
7861 /* shared with 10.2 */
98dd2b92 7862 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
6dd46348 7863 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
6e4de1a4 7864 .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
840357cc
RM		 7865};
7866
b79b9baa
MK		 7867int ath10k_wmi_attach(struct ath10k *ar)
7868{
bf3c13ab 7869 switch (ar->running_fw->fw_file.wmi_op_version) {
9bd21322 7870 case ATH10K_FW_WMI_OP_VERSION_10_4:
840357cc 7871 ar->wmi.ops = &wmi_10_4_ops;
2d491e69 7872 ar->wmi.cmd = &wmi_10_4_cmd_map;
93841a15 7873 ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
d86561ff 7874 ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
3fab30f7 7875 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9bd21322 7876 break;
4a16fbec
RM		 7877 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
7878 ar->wmi.cmd = &wmi_10_2_4_cmd_map;
7879 ar->wmi.ops = &wmi_10_2_4_ops;
7880 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
7881 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
3fab30f7 7882 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
4a16fbec 7883 break;
d7579d12
MK		 7884 case ATH10K_FW_WMI_OP_VERSION_10_2:
7885 ar->wmi.cmd = &wmi_10_2_cmd_map;
7886 ar->wmi.ops = &wmi_10_2_ops;
b79b9baa
MK		 7887 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
7888 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
3fab30f7 7889 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
d7579d12
MK		 7890 break;
7891 case ATH10K_FW_WMI_OP_VERSION_10_1:
7892 ar->wmi.cmd = &wmi_10x_cmd_map;
7893 ar->wmi.ops = &wmi_10_1_ops;
7894 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
7895 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
3fab30f7 7896 ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
d7579d12
MK		 7897 break;
7898 case ATH10K_FW_WMI_OP_VERSION_MAIN:
b79b9baa 7899 ar->wmi.cmd = &wmi_cmd_map;
d7579d12 7900 ar->wmi.ops = &wmi_ops;
b79b9baa
MK		 7901 ar->wmi.vdev_param = &wmi_vdev_param_map;
7902 ar->wmi.pdev_param = &wmi_pdev_param_map;
3fab30f7 7903 ar->wmi.peer_flags = &wmi_peer_flags_map;
d7579d12 7904 break;
ca996ec5
MK		 7905 case ATH10K_FW_WMI_OP_VERSION_TLV:
7906 ath10k_wmi_tlv_attach(ar);
7907 break;
d7579d12
MK		 7908 case ATH10K_FW_WMI_OP_VERSION_UNSET:
7909 case ATH10K_FW_WMI_OP_VERSION_MAX:
7910 ath10k_err(ar, "unsupported WMI op version: %d\n",
bf3c13ab 7911 ar->running_fw->fw_file.wmi_op_version);
d7579d12 7912 return -EINVAL;
b79b9baa
MK		 7913 }
7914
7915 init_completion(&ar->wmi.service_ready);
7916 init_completion(&ar->wmi.unified_ready);
b79b9baa 7917
c8ecfc1c
RM		 7918 INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
7919
b79b9baa
MK		 7920 return 0;
7921}
7922
a925a376 7923void ath10k_wmi_free_host_mem(struct ath10k *ar)
b79b9baa
MK		 7924{
7925 int i;
7926
7927 /* free the host memory chunks requested by firmware */
7928 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
b0578865
FF		 7929 dma_unmap_single(ar->dev,
7930 ar->wmi.mem_chunks[i].paddr,
7931 ar->wmi.mem_chunks[i].len,
7932 DMA_TO_DEVICE);
7933 kfree(ar->wmi.mem_chunks[i].vaddr);
b79b9baa
MK		 7934 }
7935
7936 ar->wmi.num_mem_chunks = 0;
7937}
a925a376
VT		 7938
7939void ath10k_wmi_detach(struct ath10k *ar)
7940{
7941 cancel_work_sync(&ar->svc_rdy_work);
7942
7943 if (ar->svc_rdy_skb)
7944 dev_kfree_skb(ar->svc_rdy_skb);
7945}
Linux kernel - Deliverables
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