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ath10k: fix pmf for action frames
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
5e3dd157
KV		 20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
25#include "mac.h"
26
ce42870e
BM		 27/* MAIN WMI cmd track */
28static struct wmi_cmd_map wmi_cmd_map = {
29 .init_cmdid = WMI_INIT_CMDID,
30 .start_scan_cmdid = WMI_START_SCAN_CMDID,
31 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
32 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
33 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
34 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
35 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
36 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
37 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
38 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
39 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
40 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
41 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
42 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
43 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
44 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
45 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
46 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
47 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
48 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
49 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
50 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
51 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
52 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
53 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
54 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
55 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
56 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
57 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
58 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
59 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
60 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
61 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
62 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
63 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
64 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
65 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
66 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
67 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
68 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
69 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
70 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
71 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
72 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
73 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
74 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
75 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
76 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
77 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
78 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
79 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
80 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
81 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
82 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
83 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
84 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
85 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
86 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
87 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
88 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
89 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
90 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
91 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
92 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
93 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
94 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
95 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
96 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
97 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
98 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
99 .wlan_profile_set_hist_intvl_cmdid =
100 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
101 .wlan_profile_get_profile_data_cmdid =
102 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
103 .wlan_profile_enable_profile_id_cmdid =
104 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
105 .wlan_profile_list_profile_id_cmdid =
106 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
107 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
108 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
109 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
110 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
111 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
112 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
113 .wow_enable_disable_wake_event_cmdid =
114 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
115 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
116 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
117 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
118 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
119 .vdev_spectral_scan_configure_cmdid =
120 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
121 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
122 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
123 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
124 .network_list_offload_config_cmdid =
125 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
126 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
127 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
128 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
129 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
130 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
131 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
132 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
133 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
134 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
135 .echo_cmdid = WMI_ECHO_CMDID,
136 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
137 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
138 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
139 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
140 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
141 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
142 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
143 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
144 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
145};
146
b7e3adf9
BM		 147/* 10.X WMI cmd track */
148static struct wmi_cmd_map wmi_10x_cmd_map = {
149 .init_cmdid = WMI_10X_INIT_CMDID,
150 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
151 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
152 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 153 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 154 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
155 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
156 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
157 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
158 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
159 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
160 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
161 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
162 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
163 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
164 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
165 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
166 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
167 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
168 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
169 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
170 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
171 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
172 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
173 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
174 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
175 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
176 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
177 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
178 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
179 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
180 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
181 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
182 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
183 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
184 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
185 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 186 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 187 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
188 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
189 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 190 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 191 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
192 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
193 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
194 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
195 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
196 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
197 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
198 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
199 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
200 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
201 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
202 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
203 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
204 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
205 .roam_scan_rssi_change_threshold =
206 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
207 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
208 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
209 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
210 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
211 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
212 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
213 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
214 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 215 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 216 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 217 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 218 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
219 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
220 .wlan_profile_set_hist_intvl_cmdid =
221 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
222 .wlan_profile_get_profile_data_cmdid =
223 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
224 .wlan_profile_enable_profile_id_cmdid =
225 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
226 .wlan_profile_list_profile_id_cmdid =
227 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
228 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
229 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
230 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
231 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
232 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
233 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
234 .wow_enable_disable_wake_event_cmdid =
235 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
236 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
237 .wow_hostwakeup_from_sleep_cmdid =
238 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
239 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
240 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
241 .vdev_spectral_scan_configure_cmdid =
242 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
243 .vdev_spectral_scan_enable_cmdid =
244 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
245 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
34957b25
BM		 246 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
247 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
248 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
249 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
250 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
251 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
252 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
253 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
254 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
255 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
256 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 257 .echo_cmdid = WMI_10X_ECHO_CMDID,
258 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
259 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
260 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
34957b25
BM		 261 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
262 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
263 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
264 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 265 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
266 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
267};
ce42870e 268
6d1506e7
BM		 269/* MAIN WMI VDEV param map */
270static struct wmi_vdev_param_map wmi_vdev_param_map = {
271 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
272 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
273 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
274 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
275 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
276 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
277 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
278 .preamble = WMI_VDEV_PARAM_PREAMBLE,
279 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
280 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
281 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
282 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
283 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
284 .wmi_vdev_oc_scheduler_air_time_limit =
285 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
286 .wds = WMI_VDEV_PARAM_WDS,
287 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
288 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
289 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
290 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
291 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
292 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
293 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
294 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
295 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
296 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
297 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
298 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
299 .sgi = WMI_VDEV_PARAM_SGI,
300 .ldpc = WMI_VDEV_PARAM_LDPC,
301 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
302 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
303 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
304 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
305 .nss = WMI_VDEV_PARAM_NSS,
306 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
307 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
308 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
309 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
310 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
311 .ap_keepalive_min_idle_inactive_time_secs =
312 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
313 .ap_keepalive_max_idle_inactive_time_secs =
314 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
315 .ap_keepalive_max_unresponsive_time_secs =
316 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
317 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
318 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
319 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
320 .txbf = WMI_VDEV_PARAM_TXBF,
321 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
322 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
323 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
324 .ap_detect_out_of_sync_sleeping_sta_time_secs =
325 WMI_VDEV_PARAM_UNSUPPORTED,
326};
327
328/* 10.X WMI VDEV param map */
329static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
330 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
331 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
332 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
333 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
334 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
335 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
336 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
337 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
338 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
339 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
340 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
341 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
342 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
343 .wmi_vdev_oc_scheduler_air_time_limit =
344 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
345 .wds = WMI_10X_VDEV_PARAM_WDS,
346 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
347 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
348 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
349 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
350 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
351 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
352 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
353 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
354 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
355 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
356 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
357 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
358 .sgi = WMI_10X_VDEV_PARAM_SGI,
359 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
360 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
361 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
362 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
363 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
364 .nss = WMI_10X_VDEV_PARAM_NSS,
365 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
366 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
367 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
368 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
369 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
370 .ap_keepalive_min_idle_inactive_time_secs =
371 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
372 .ap_keepalive_max_idle_inactive_time_secs =
373 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
374 .ap_keepalive_max_unresponsive_time_secs =
375 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
376 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
377 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
378 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
379 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
380 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
381 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
382 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
383 .ap_detect_out_of_sync_sleeping_sta_time_secs =
384 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
385};
386
226a339b
BM		 387static struct wmi_pdev_param_map wmi_pdev_param_map = {
388 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
389 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
390 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
391 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
392 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
393 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
394 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
395 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
396 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
397 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
398 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
399 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
400 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
401 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
402 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
403 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
404 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
405 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
406 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
407 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
408 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
409 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
410 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
411 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
412 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
413 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
414 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
415 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
416 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
417 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
418 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
419 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
420 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
421 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
422 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
226a339b
BM		 423 .dcs = WMI_PDEV_PARAM_DCS,
424 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
425 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
426 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
427 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
428 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
429 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
430 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
431 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
432 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
433 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
434 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
435 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
436};
437
438static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
439 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
440 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
441 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
442 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
443 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
444 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
445 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
446 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
447 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
448 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
449 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
450 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
451 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
452 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
453 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
454 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
455 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
456 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
457 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
458 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
459 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
460 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
461 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
462 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
463 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
464 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
465 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
466 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
467 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
468 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
469 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
470 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
471 .bcnflt_stats_update_period =
472 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
473 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
ab6258ed 474 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
226a339b
BM		 475 .dcs = WMI_10X_PDEV_PARAM_DCS,
476 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
477 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
478 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
479 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
480 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
481 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
482 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
483 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
484 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
485 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
486 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
487 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
488};
489
5e3dd157
KV		 490int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
491{
492 int ret;
493 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
494 WMI_SERVICE_READY_TIMEOUT_HZ);
495 return ret;
496}
497
498int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
499{
500 int ret;
501 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
502 WMI_UNIFIED_READY_TIMEOUT_HZ);
503 return ret;
504}
505
506static struct sk_buff *ath10k_wmi_alloc_skb(u32 len)
507{
508 struct sk_buff *skb;
509 u32 round_len = roundup(len, 4);
510
511 skb = ath10k_htc_alloc_skb(WMI_SKB_HEADROOM + round_len);
512 if (!skb)
513 return NULL;
514
515 skb_reserve(skb, WMI_SKB_HEADROOM);
516 if (!IS_ALIGNED((unsigned long)skb->data, 4))
517 ath10k_warn("Unaligned WMI skb\n");
518
519 skb_put(skb, round_len);
520 memset(skb->data, 0, round_len);
521
522 return skb;
523}
524
525static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
526{
527 dev_kfree_skb(skb);
5e3dd157
KV		 528}
529
be8b3943 530static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
ce42870e 531 u32 cmd_id)
5e3dd157
KV		 532{
533 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
534 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 535 int ret;
5e3dd157
KV		 536 u32 cmd = 0;
537
538 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
539 return -ENOMEM;
540
541 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
542
543 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
544 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
545
5e3dd157 546 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943
MK		 547 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
548 trace_ath10k_wmi_cmd(cmd_id, skb->data, skb->len, ret);
5e3dd157 549
be8b3943
MK		 550 if (ret)
551 goto err_pull;
5e3dd157 552
be8b3943
MK		 553 return 0;
554
555err_pull:
556 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
557 return ret;
558}
559
ed54388a
MK		 560static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
561{
ed54388a
MK		 562 int ret;
563
564 lockdep_assert_held(&arvif->ar->data_lock);
565
566 if (arvif->beacon == NULL)
567 return;
568
748afc47
MK		 569 if (arvif->beacon_sent)
570 return;
ed54388a 571
748afc47 572 ret = ath10k_wmi_beacon_send_ref_nowait(arvif);
ed54388a
MK		 573 if (ret)
574 return;
575
748afc47
MK		 576 /* We need to retain the arvif->beacon reference for DMA unmapping and
577 * freeing the skbuff later. */
578 arvif->beacon_sent = true;
ed54388a
MK		 579}
580
581static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
582 struct ieee80211_vif *vif)
583{
584 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
585
586 ath10k_wmi_tx_beacon_nowait(arvif);
587}
588
589static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
590{
591 spin_lock_bh(&ar->data_lock);
592 ieee80211_iterate_active_interfaces_atomic(ar->hw,
593 IEEE80211_IFACE_ITER_NORMAL,
594 ath10k_wmi_tx_beacons_iter,
595 NULL);
596 spin_unlock_bh(&ar->data_lock);
597}
598
12acbc43 599static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 600{
ed54388a
MK		 601 /* try to send pending beacons first. they take priority */
602 ath10k_wmi_tx_beacons_nowait(ar);
603
be8b3943
MK		 604 wake_up(&ar->wmi.tx_credits_wq);
605}
606
607static int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb,
ce42870e 608 u32 cmd_id)
be8b3943 609{
34957b25 610 int ret = -EOPNOTSUPP;
be8b3943 611
56b84287
KV		 612 might_sleep();
613
34957b25 614 if (cmd_id == WMI_CMD_UNSUPPORTED) {
55321559
BM		 615 ath10k_warn("wmi command %d is not supported by firmware\n",
616 cmd_id);
617 return ret;
618 }
be8b3943
MK		 619
620 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK		 621 /* try to send pending beacons first. they take priority */
622 ath10k_wmi_tx_beacons_nowait(ar);
623
be8b3943
MK		 624 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
625 (ret != -EAGAIN);
626 }), 3*HZ);
627
628 if (ret)
5e3dd157 629 dev_kfree_skb_any(skb);
5e3dd157 630
be8b3943 631 return ret;
5e3dd157
KV		 632}
633
5e00d31a
BM		 634int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
635{
636 int ret = 0;
637 struct wmi_mgmt_tx_cmd *cmd;
638 struct ieee80211_hdr *hdr;
639 struct sk_buff *wmi_skb;
640 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
641 int len;
eeab266c 642 u32 buf_len = skb->len;
5e00d31a
BM		 643 u16 fc;
644
645 hdr = (struct ieee80211_hdr *)skb->data;
646 fc = le16_to_cpu(hdr->frame_control);
647
648 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
649 return -EINVAL;
650
651 len = sizeof(cmd->hdr) + skb->len;
eeab266c
MK		 652
653 if ((ieee80211_is_action(hdr->frame_control) ||
654 ieee80211_is_deauth(hdr->frame_control) ||
655 ieee80211_is_disassoc(hdr->frame_control)) &&
656 ieee80211_has_protected(hdr->frame_control)) {
657 len += IEEE80211_CCMP_MIC_LEN;
658 buf_len += IEEE80211_CCMP_MIC_LEN;
659 }
660
5e00d31a
BM		 661 len = round_up(len, 4);
662
663 wmi_skb = ath10k_wmi_alloc_skb(len);
664 if (!wmi_skb)
665 return -ENOMEM;
666
667 cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
668
669 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
670 cmd->hdr.tx_rate = 0;
671 cmd->hdr.tx_power = 0;
eeab266c 672 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
5e00d31a
BM		 673
674 memcpy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr), ETH_ALEN);
675 memcpy(cmd->buf, skb->data, skb->len);
676
677 ath10k_dbg(ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
678 wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
679 fc & IEEE80211_FCTL_STYPE);
680
681 /* Send the management frame buffer to the target */
682 ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
5fb5e41f 683 if (ret)
5e00d31a 684 return ret;
5e00d31a
BM		 685
686 /* TODO: report tx status to mac80211 - temporary just ACK */
687 info->flags |= IEEE80211_TX_STAT_ACK;
688 ieee80211_tx_status_irqsafe(ar->hw, skb);
689
690 return ret;
691}
692
5e3dd157
KV		 693static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
694{
695 struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
696 enum wmi_scan_event_type event_type;
697 enum wmi_scan_completion_reason reason;
698 u32 freq;
699 u32 req_id;
700 u32 scan_id;
701 u32 vdev_id;
702
703 event_type = __le32_to_cpu(event->event_type);
704 reason = __le32_to_cpu(event->reason);
705 freq = __le32_to_cpu(event->channel_freq);
706 req_id = __le32_to_cpu(event->scan_req_id);
707 scan_id = __le32_to_cpu(event->scan_id);
708 vdev_id = __le32_to_cpu(event->vdev_id);
709
710 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENTID\n");
711 ath10k_dbg(ATH10K_DBG_WMI,
712 "scan event type %d reason %d freq %d req_id %d "
713 "scan_id %d vdev_id %d\n",
714 event_type, reason, freq, req_id, scan_id, vdev_id);
715
716 spin_lock_bh(&ar->data_lock);
717
718 switch (event_type) {
719 case WMI_SCAN_EVENT_STARTED:
720 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_STARTED\n");
721 if (ar->scan.in_progress && ar->scan.is_roc)
722 ieee80211_ready_on_channel(ar->hw);
723
724 complete(&ar->scan.started);
725 break;
726 case WMI_SCAN_EVENT_COMPLETED:
727 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_COMPLETED\n");
728 switch (reason) {
729 case WMI_SCAN_REASON_COMPLETED:
730 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_COMPLETED\n");
731 break;
732 case WMI_SCAN_REASON_CANCELLED:
733 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_CANCELED\n");
734 break;
735 case WMI_SCAN_REASON_PREEMPTED:
736 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_PREEMPTED\n");
737 break;
738 case WMI_SCAN_REASON_TIMEDOUT:
739 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_TIMEDOUT\n");
740 break;
741 default:
742 break;
743 }
744
745 ar->scan_channel = NULL;
746 if (!ar->scan.in_progress) {
747 ath10k_warn("no scan requested, ignoring\n");
748 break;
749 }
750
751 if (ar->scan.is_roc) {
752 ath10k_offchan_tx_purge(ar);
753
754 if (!ar->scan.aborting)
755 ieee80211_remain_on_channel_expired(ar->hw);
756 } else {
757 ieee80211_scan_completed(ar->hw, ar->scan.aborting);
758 }
759
760 del_timer(&ar->scan.timeout);
761 complete_all(&ar->scan.completed);
762 ar->scan.in_progress = false;
763 break;
764 case WMI_SCAN_EVENT_BSS_CHANNEL:
765 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_BSS_CHANNEL\n");
766 ar->scan_channel = NULL;
767 break;
768 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
769 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_FOREIGN_CHANNEL\n");
770 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
771 if (ar->scan.in_progress && ar->scan.is_roc &&
772 ar->scan.roc_freq == freq) {
773 complete(&ar->scan.on_channel);
774 }
775 break;
776 case WMI_SCAN_EVENT_DEQUEUED:
777 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_DEQUEUED\n");
778 break;
779 case WMI_SCAN_EVENT_PREEMPTED:
780 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_PREEMPTED\n");
781 break;
782 case WMI_SCAN_EVENT_START_FAILED:
783 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_START_FAILED\n");
784 break;
785 default:
786 break;
787 }
788
789 spin_unlock_bh(&ar->data_lock);
790 return 0;
791}
792
793static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
794{
795 enum ieee80211_band band;
796
797 switch (phy_mode) {
798 case MODE_11A:
799 case MODE_11NA_HT20:
800 case MODE_11NA_HT40:
801 case MODE_11AC_VHT20:
802 case MODE_11AC_VHT40:
803 case MODE_11AC_VHT80:
804 band = IEEE80211_BAND_5GHZ;
805 break;
806 case MODE_11G:
807 case MODE_11B:
808 case MODE_11GONLY:
809 case MODE_11NG_HT20:
810 case MODE_11NG_HT40:
811 case MODE_11AC_VHT20_2G:
812 case MODE_11AC_VHT40_2G:
813 case MODE_11AC_VHT80_2G:
814 default:
815 band = IEEE80211_BAND_2GHZ;
816 }
817
818 return band;
819}
820
821static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
822{
823 u8 rate_idx = 0;
824
825 /* rate in Kbps */
826 switch (rate) {
827 case 1000:
828 rate_idx = 0;
829 break;
830 case 2000:
831 rate_idx = 1;
832 break;
833 case 5500:
834 rate_idx = 2;
835 break;
836 case 11000:
837 rate_idx = 3;
838 break;
839 case 6000:
840 rate_idx = 4;
841 break;
842 case 9000:
843 rate_idx = 5;
844 break;
845 case 12000:
846 rate_idx = 6;
847 break;
848 case 18000:
849 rate_idx = 7;
850 break;
851 case 24000:
852 rate_idx = 8;
853 break;
854 case 36000:
855 rate_idx = 9;
856 break;
857 case 48000:
858 rate_idx = 10;
859 break;
860 case 54000:
861 rate_idx = 11;
862 break;
863 default:
864 break;
865 }
866
867 if (band == IEEE80211_BAND_5GHZ) {
868 if (rate_idx > 3)
869 /* Omit CCK rates */
870 rate_idx -= 4;
871 else
872 rate_idx = 0;
873 }
874
875 return rate_idx;
876}
877
878static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
879{
0d9b0438
MK		 880 struct wmi_mgmt_rx_event_v1 *ev_v1;
881 struct wmi_mgmt_rx_event_v2 *ev_v2;
882 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
5e3dd157 883 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
453cdb61 884 struct ieee80211_channel *ch;
5e3dd157
KV		 885 struct ieee80211_hdr *hdr;
886 u32 rx_status;
887 u32 channel;
888 u32 phy_mode;
889 u32 snr;
890 u32 rate;
891 u32 buf_len;
892 u16 fc;
0d9b0438
MK		 893 int pull_len;
894
895 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
896 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
897 ev_hdr = &ev_v2->hdr.v1;
898 pull_len = sizeof(*ev_v2);
899 } else {
900 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
901 ev_hdr = &ev_v1->hdr;
902 pull_len = sizeof(*ev_v1);
903 }
5e3dd157 904
0d9b0438
MK		 905 channel = __le32_to_cpu(ev_hdr->channel);
906 buf_len = __le32_to_cpu(ev_hdr->buf_len);
907 rx_status = __le32_to_cpu(ev_hdr->status);
908 snr = __le32_to_cpu(ev_hdr->snr);
909 phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
910 rate = __le32_to_cpu(ev_hdr->rate);
5e3dd157
KV		 911
912 memset(status, 0, sizeof(*status));
913
914 ath10k_dbg(ATH10K_DBG_MGMT,
915 "event mgmt rx status %08x\n", rx_status);
916
e8a50f8b
MP		 917 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
918 dev_kfree_skb(skb);
919 return 0;
920 }
921
5e3dd157
KV		 922 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
923 dev_kfree_skb(skb);
924 return 0;
925 }
926
927 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
928 dev_kfree_skb(skb);
929 return 0;
930 }
931
932 if (rx_status & WMI_RX_STATUS_ERR_CRC)
933 status->flag |= RX_FLAG_FAILED_FCS_CRC;
934 if (rx_status & WMI_RX_STATUS_ERR_MIC)
935 status->flag |= RX_FLAG_MMIC_ERROR;
936
453cdb61
MK		 937 /* HW can Rx CCK rates on 5GHz. In that case phy_mode is set to
938 * MODE_11B. This means phy_mode is not a reliable source for the band
939 * of mgmt rx. */
940
941 ch = ar->scan_channel;
942 if (!ch)
943 ch = ar->rx_channel;
944
945 if (ch) {
946 status->band = ch->band;
947
948 if (phy_mode == MODE_11B &&
949 status->band == IEEE80211_BAND_5GHZ)
950 ath10k_dbg(ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
951 } else {
952 ath10k_warn("using (unreliable) phy_mode to extract band for mgmt rx\n");
953 status->band = phy_mode_to_band(phy_mode);
954 }
955
5e3dd157
KV		 956 status->freq = ieee80211_channel_to_frequency(channel, status->band);
957 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
958 status->rate_idx = get_rate_idx(rate, status->band);
959
0d9b0438 960 skb_pull(skb, pull_len);
5e3dd157
KV		 961
962 hdr = (struct ieee80211_hdr *)skb->data;
963 fc = le16_to_cpu(hdr->frame_control);
964
2b6a6a90
MK		 965 /* FW delivers WEP Shared Auth frame with Protected Bit set and
966 * encrypted payload. However in case of PMF it delivers decrypted
967 * frames with Protected Bit set. */
968 if (ieee80211_has_protected(hdr->frame_control) &&
969 !ieee80211_is_auth(hdr->frame_control)) {
eeab266c
MK		 970 status->flag |= RX_FLAG_DECRYPTED;
971
972 if (!ieee80211_is_action(hdr->frame_control) &&
973 !ieee80211_is_deauth(hdr->frame_control) &&
974 !ieee80211_is_disassoc(hdr->frame_control)) {
975 status->flag |= RX_FLAG_IV_STRIPPED |
976 RX_FLAG_MMIC_STRIPPED;
977 hdr->frame_control = __cpu_to_le16(fc &
5e3dd157 978 ~IEEE80211_FCTL_PROTECTED);
eeab266c 979 }
5e3dd157
KV		 980 }
981
982 ath10k_dbg(ATH10K_DBG_MGMT,
983 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
984 skb, skb->len,
985 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
986
987 ath10k_dbg(ATH10K_DBG_MGMT,
988 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
989 status->freq, status->band, status->signal,
990 status->rate_idx);
991
992 /*
993 * packets from HTC come aligned to 4byte boundaries
994 * because they can originally come in along with a trailer
995 */
996 skb_trim(skb, buf_len);
997
998 ieee80211_rx(ar->hw, skb);
999 return 0;
1000}
1001
2e1dea40
MK		 1002static int freq_to_idx(struct ath10k *ar, int freq)
1003{
1004 struct ieee80211_supported_band *sband;
1005 int band, ch, idx = 0;
1006
1007 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
1008 sband = ar->hw->wiphy->bands[band];
1009 if (!sband)
1010 continue;
1011
1012 for (ch = 0; ch < sband->n_channels; ch++, idx++)
1013 if (sband->channels[ch].center_freq == freq)
1014 goto exit;
1015 }
1016
1017exit:
1018 return idx;
1019}
1020
5e3dd157
KV		 1021static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1022{
2e1dea40
MK		 1023 struct wmi_chan_info_event *ev;
1024 struct survey_info *survey;
1025 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1026 int idx;
1027
1028 ev = (struct wmi_chan_info_event *)skb->data;
1029
1030 err_code = __le32_to_cpu(ev->err_code);
1031 freq = __le32_to_cpu(ev->freq);
1032 cmd_flags = __le32_to_cpu(ev->cmd_flags);
1033 noise_floor = __le32_to_cpu(ev->noise_floor);
1034 rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
1035 cycle_count = __le32_to_cpu(ev->cycle_count);
1036
1037 ath10k_dbg(ATH10K_DBG_WMI,
1038 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1039 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1040 cycle_count);
1041
1042 spin_lock_bh(&ar->data_lock);
1043
1044 if (!ar->scan.in_progress) {
1045 ath10k_warn("chan info event without a scan request?\n");
1046 goto exit;
1047 }
1048
1049 idx = freq_to_idx(ar, freq);
1050 if (idx >= ARRAY_SIZE(ar->survey)) {
1051 ath10k_warn("chan info: invalid frequency %d (idx %d out of bounds)\n",
1052 freq, idx);
1053 goto exit;
1054 }
1055
1056 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1057 /* During scanning chan info is reported twice for each
1058 * visited channel. The reported cycle count is global
1059 * and per-channel cycle count must be calculated */
1060
1061 cycle_count -= ar->survey_last_cycle_count;
1062 rx_clear_count -= ar->survey_last_rx_clear_count;
1063
1064 survey = &ar->survey[idx];
1065 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
1066 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1067 survey->noise = noise_floor;
1068 survey->filled = SURVEY_INFO_CHANNEL_TIME |
1069 SURVEY_INFO_CHANNEL_TIME_RX |
1070 SURVEY_INFO_NOISE_DBM;
1071 }
1072
1073 ar->survey_last_rx_clear_count = rx_clear_count;
1074 ar->survey_last_cycle_count = cycle_count;
1075
1076exit:
1077 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1078}
1079
1080static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1081{
1082 ath10k_dbg(ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
1083}
1084
869526b9 1085static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 1086{
869526b9
KV		 1087 ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
1088 skb->len);
1089
1090 trace_ath10k_wmi_dbglog(skb->data, skb->len);
1091
1092 return 0;
5e3dd157
KV		 1093}
1094
1095static void ath10k_wmi_event_update_stats(struct ath10k *ar,
1096 struct sk_buff *skb)
1097{
1098 struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
1099
1100 ath10k_dbg(ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
1101
1102 ath10k_debug_read_target_stats(ar, ev);
1103}
1104
1105static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
1106 struct sk_buff *skb)
1107{
1108 struct wmi_vdev_start_response_event *ev;
1109
1110 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
1111
1112 ev = (struct wmi_vdev_start_response_event *)skb->data;
1113
1114 if (WARN_ON(__le32_to_cpu(ev->status)))
1115 return;
1116
1117 complete(&ar->vdev_setup_done);
1118}
1119
1120static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
1121 struct sk_buff *skb)
1122{
1123 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
1124 complete(&ar->vdev_setup_done);
1125}
1126
1127static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
1128 struct sk_buff *skb)
1129{
5a13e76e
KV		 1130 struct wmi_peer_sta_kickout_event *ev;
1131 struct ieee80211_sta *sta;
1132
1133 ev = (struct wmi_peer_sta_kickout_event *)skb->data;
1134
1135 ath10k_dbg(ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
1136 ev->peer_macaddr.addr);
1137
1138 rcu_read_lock();
1139
1140 sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL);
1141 if (!sta) {
1142 ath10k_warn("Spurious quick kickout for STA %pM\n",
1143 ev->peer_macaddr.addr);
1144 goto exit;
1145 }
1146
1147 ieee80211_report_low_ack(sta, 10);
1148
1149exit:
1150 rcu_read_unlock();
5e3dd157
KV		 1151}
1152
1153/*
1154 * FIXME
1155 *
1156 * We don't report to mac80211 sleep state of connected
1157 * stations. Due to this mac80211 can't fill in TIM IE
1158 * correctly.
1159 *
1160 * I know of no way of getting nullfunc frames that contain
1161 * sleep transition from connected stations - these do not
1162 * seem to be sent from the target to the host. There also
1163 * doesn't seem to be a dedicated event for that. So the
1164 * only way left to do this would be to read tim_bitmap
1165 * during SWBA.
1166 *
1167 * We could probably try using tim_bitmap from SWBA to tell
1168 * mac80211 which stations are asleep and which are not. The
1169 * problem here is calling mac80211 functions so many times
1170 * could take too long and make us miss the time to submit
1171 * the beacon to the target.
1172 *
1173 * So as a workaround we try to extend the TIM IE if there
1174 * is unicast buffered for stations with aid > 7 and fill it
1175 * in ourselves.
1176 */
1177static void ath10k_wmi_update_tim(struct ath10k *ar,
1178 struct ath10k_vif *arvif,
1179 struct sk_buff *bcn,
1180 struct wmi_bcn_info *bcn_info)
1181{
1182 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
1183 struct ieee80211_tim_ie *tim;
1184 u8 *ies, *ie;
1185 u8 ie_len, pvm_len;
1186
1187 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
1188 * we must copy the bitmap upon change and reuse it later */
1189 if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
1190 int i;
1191
1192 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
1193 sizeof(bcn_info->tim_info.tim_bitmap));
1194
1195 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
1196 __le32 t = bcn_info->tim_info.tim_bitmap[i / 4];
1197 u32 v = __le32_to_cpu(t);
1198 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
1199 }
1200
1201 /* FW reports either length 0 or 16
1202 * so we calculate this on our own */
1203 arvif->u.ap.tim_len = 0;
1204 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
1205 if (arvif->u.ap.tim_bitmap[i])
1206 arvif->u.ap.tim_len = i;
1207
1208 arvif->u.ap.tim_len++;
1209 }
1210
1211 ies = bcn->data;
1212 ies += ieee80211_hdrlen(hdr->frame_control);
1213 ies += 12; /* fixed parameters */
1214
1215 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
1216 (u8 *)skb_tail_pointer(bcn) - ies);
1217 if (!ie) {
09af8f85
MK		 1218 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
1219 ath10k_warn("no tim ie found;\n");
5e3dd157
KV		 1220 return;
1221 }
1222
1223 tim = (void *)ie + 2;
1224 ie_len = ie[1];
1225 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
1226
1227 if (pvm_len < arvif->u.ap.tim_len) {
1228 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
1229 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
1230 void *next_ie = ie + 2 + ie_len;
1231
1232 if (skb_put(bcn, expand_size)) {
1233 memmove(next_ie + expand_size, next_ie, move_size);
1234
1235 ie[1] += expand_size;
1236 ie_len += expand_size;
1237 pvm_len += expand_size;
1238 } else {
1239 ath10k_warn("tim expansion failed\n");
1240 }
1241 }
1242
1243 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
1244 ath10k_warn("tim pvm length is too great (%d)\n", pvm_len);
1245 return;
1246 }
1247
1248 tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
1249 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
1250
748afc47
MK		 1251 if (tim->dtim_count == 0) {
1252 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
1253
1254 if (__le32_to_cpu(bcn_info->tim_info.tim_mcast) == 1)
1255 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
1256 }
1257
5e3dd157
KV		 1258 ath10k_dbg(ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
1259 tim->dtim_count, tim->dtim_period,
1260 tim->bitmap_ctrl, pvm_len);
1261}
1262
1263static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
1264 struct wmi_p2p_noa_info *noa)
1265{
1266 struct ieee80211_p2p_noa_attr *noa_attr;
1267 u8 ctwindow_oppps = noa->ctwindow_oppps;
1268 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
1269 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
1270 __le16 *noa_attr_len;
1271 u16 attr_len;
1272 u8 noa_descriptors = noa->num_descriptors;
1273 int i;
1274
1275 /* P2P IE */
1276 data[0] = WLAN_EID_VENDOR_SPECIFIC;
1277 data[1] = len - 2;
1278 data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
1279 data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
1280 data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
1281 data[5] = WLAN_OUI_TYPE_WFA_P2P;
1282
1283 /* NOA ATTR */
1284 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
1285 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
1286 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
1287
1288 noa_attr->index = noa->index;
1289 noa_attr->oppps_ctwindow = ctwindow;
1290 if (oppps)
1291 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
1292
1293 for (i = 0; i < noa_descriptors; i++) {
1294 noa_attr->desc[i].count =
1295 __le32_to_cpu(noa->descriptors[i].type_count);
1296 noa_attr->desc[i].duration = noa->descriptors[i].duration;
1297 noa_attr->desc[i].interval = noa->descriptors[i].interval;
1298 noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
1299 }
1300
1301 attr_len = 2; /* index + oppps_ctwindow */
1302 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1303 *noa_attr_len = __cpu_to_le16(attr_len);
1304}
1305
1306static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
1307{
1308 u32 len = 0;
1309 u8 noa_descriptors = noa->num_descriptors;
1310 u8 opp_ps_info = noa->ctwindow_oppps;
1311 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
1312
1313
1314 if (!noa_descriptors && !opps_enabled)
1315 return len;
1316
1317 len += 1 + 1 + 4; /* EID + len + OUI */
1318 len += 1 + 2; /* noa attr + attr len */
1319 len += 1 + 1; /* index + oppps_ctwindow */
1320 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1321
1322 return len;
1323}
1324
1325static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
1326 struct sk_buff *bcn,
1327 struct wmi_bcn_info *bcn_info)
1328{
1329 struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
1330 u8 *new_data, *old_data = arvif->u.ap.noa_data;
1331 u32 new_len;
1332
1333 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
1334 return;
1335
1336 ath10k_dbg(ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
1337 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
1338 new_len = ath10k_p2p_calc_noa_ie_len(noa);
1339 if (!new_len)
1340 goto cleanup;
1341
1342 new_data = kmalloc(new_len, GFP_ATOMIC);
1343 if (!new_data)
1344 goto cleanup;
1345
1346 ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
1347
1348 spin_lock_bh(&ar->data_lock);
1349 arvif->u.ap.noa_data = new_data;
1350 arvif->u.ap.noa_len = new_len;
1351 spin_unlock_bh(&ar->data_lock);
1352 kfree(old_data);
1353 }
1354
1355 if (arvif->u.ap.noa_data)
1356 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
1357 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
1358 arvif->u.ap.noa_data,
1359 arvif->u.ap.noa_len);
1360 return;
1361
1362cleanup:
1363 spin_lock_bh(&ar->data_lock);
1364 arvif->u.ap.noa_data = NULL;
1365 arvif->u.ap.noa_len = 0;
1366 spin_unlock_bh(&ar->data_lock);
1367 kfree(old_data);
1368}
1369
1370
1371static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
1372{
1373 struct wmi_host_swba_event *ev;
1374 u32 map;
1375 int i = -1;
1376 struct wmi_bcn_info *bcn_info;
1377 struct ath10k_vif *arvif;
5e3dd157 1378 struct sk_buff *bcn;
767d34fc 1379 int ret, vdev_id = 0;
5e3dd157 1380
5e3dd157
KV		 1381 ev = (struct wmi_host_swba_event *)skb->data;
1382 map = __le32_to_cpu(ev->vdev_map);
1383
7a8a396b 1384 ath10k_dbg(ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
5e3dd157
KV		 1385 ev->vdev_map);
1386
1387 for (; map; map >>= 1, vdev_id++) {
1388 if (!(map & 0x1))
1389 continue;
1390
1391 i++;
1392
1393 if (i >= WMI_MAX_AP_VDEV) {
1394 ath10k_warn("swba has corrupted vdev map\n");
1395 break;
1396 }
1397
1398 bcn_info = &ev->bcn_info[i];
1399
1400 ath10k_dbg(ATH10K_DBG_MGMT,
7a8a396b 1401 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
5e3dd157
KV		 1402 i,
1403 __le32_to_cpu(bcn_info->tim_info.tim_len),
1404 __le32_to_cpu(bcn_info->tim_info.tim_mcast),
1405 __le32_to_cpu(bcn_info->tim_info.tim_changed),
1406 __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
1407 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
1408 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
1409 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
1410 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
1411
1412 arvif = ath10k_get_arvif(ar, vdev_id);
1413 if (arvif == NULL) {
1414 ath10k_warn("no vif for vdev_id %d found\n", vdev_id);
1415 continue;
1416 }
1417
c2df44b3
MK		 1418 /* There are no completions for beacons so wait for next SWBA
1419 * before telling mac80211 to decrement CSA counter
1420 *
1421 * Once CSA counter is completed stop sending beacons until
1422 * actual channel switch is done */
1423 if (arvif->vif->csa_active &&
1424 ieee80211_csa_is_complete(arvif->vif)) {
1425 ieee80211_csa_finish(arvif->vif);
1426 continue;
1427 }
1428
5e3dd157
KV		 1429 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
1430 if (!bcn) {
1431 ath10k_warn("could not get mac80211 beacon\n");
1432 continue;
1433 }
1434
1435 ath10k_tx_h_seq_no(bcn);
1436 ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
1437 ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
1438
ed54388a 1439 spin_lock_bh(&ar->data_lock);
748afc47 1440
ed54388a 1441 if (arvif->beacon) {
748afc47
MK		 1442 if (!arvif->beacon_sent)
1443 ath10k_warn("SWBA overrun on vdev %d\n",
1444 arvif->vdev_id);
1445
767d34fc
MK		 1446 dma_unmap_single(arvif->ar->dev,
1447 ATH10K_SKB_CB(arvif->beacon)->paddr,
1448 arvif->beacon->len, DMA_TO_DEVICE);
ed54388a 1449 dev_kfree_skb_any(arvif->beacon);
2ab03a6b 1450 arvif->beacon = NULL;
ed54388a 1451 }
5e3dd157 1452
767d34fc
MK		 1453 ATH10K_SKB_CB(bcn)->paddr = dma_map_single(arvif->ar->dev,
1454 bcn->data, bcn->len,
1455 DMA_TO_DEVICE);
1456 ret = dma_mapping_error(arvif->ar->dev,
1457 ATH10K_SKB_CB(bcn)->paddr);
1458 if (ret) {
1459 ath10k_warn("failed to map beacon: %d\n", ret);
ad3d2153 1460 dev_kfree_skb_any(bcn);
767d34fc
MK		 1461 goto skip;
1462 }
748afc47 1463
ed54388a 1464 arvif->beacon = bcn;
748afc47 1465 arvif->beacon_sent = false;
5e3dd157 1466
ed54388a 1467 ath10k_wmi_tx_beacon_nowait(arvif);
767d34fc 1468skip:
ed54388a 1469 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1470 }
1471}
1472
1473static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
1474 struct sk_buff *skb)
1475{
1476 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
1477}
1478
9702c686
JD		 1479static void ath10k_dfs_radar_report(struct ath10k *ar,
1480 struct wmi_single_phyerr_rx_event *event,
1481 struct phyerr_radar_report *rr,
1482 u64 tsf)
1483{
1484 u32 reg0, reg1, tsf32l;
1485 struct pulse_event pe;
1486 u64 tsf64;
1487 u8 rssi, width;
1488
1489 reg0 = __le32_to_cpu(rr->reg0);
1490 reg1 = __le32_to_cpu(rr->reg1);
1491
1492 ath10k_dbg(ATH10K_DBG_REGULATORY,
1493 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
1494 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
1495 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
1496 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
1497 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
1498 ath10k_dbg(ATH10K_DBG_REGULATORY,
1499 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
1500 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
1501 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
1502 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
1503 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
1504 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
1505 ath10k_dbg(ATH10K_DBG_REGULATORY,
1506 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
1507 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
1508 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
1509
1510 if (!ar->dfs_detector)
1511 return;
1512
1513 /* report event to DFS pattern detector */
1514 tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
1515 tsf64 = tsf & (~0xFFFFFFFFULL);
1516 tsf64 |= tsf32l;
1517
1518 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
1519 rssi = event->hdr.rssi_combined;
1520
1521 /* hardware store this as 8 bit signed value,
1522 * set to zero if negative number
1523 */
1524 if (rssi & 0x80)
1525 rssi = 0;
1526
1527 pe.ts = tsf64;
1528 pe.freq = ar->hw->conf.chandef.chan->center_freq;
1529 pe.width = width;
1530 pe.rssi = rssi;
1531
1532 ath10k_dbg(ATH10K_DBG_REGULATORY,
1533 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
1534 pe.freq, pe.width, pe.rssi, pe.ts);
1535
1536 ATH10K_DFS_STAT_INC(ar, pulses_detected);
1537
1538 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
1539 ath10k_dbg(ATH10K_DBG_REGULATORY,
1540 "dfs no pulse pattern detected, yet\n");
1541 return;
1542 }
1543
1544 ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs radar detected\n");
1545 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP		 1546
1547 /* Control radar events reporting in debugfs file
1548 dfs_block_radar_events */
1549 if (ar->dfs_block_radar_events) {
1550 ath10k_info("DFS Radar detected, but ignored as requested\n");
1551 return;
1552 }
1553
9702c686
JD		 1554 ieee80211_radar_detected(ar->hw);
1555}
1556
1557static int ath10k_dfs_fft_report(struct ath10k *ar,
1558 struct wmi_single_phyerr_rx_event *event,
1559 struct phyerr_fft_report *fftr,
1560 u64 tsf)
1561{
1562 u32 reg0, reg1;
1563 u8 rssi, peak_mag;
1564
1565 reg0 = __le32_to_cpu(fftr->reg0);
1566 reg1 = __le32_to_cpu(fftr->reg1);
1567 rssi = event->hdr.rssi_combined;
1568
1569 ath10k_dbg(ATH10K_DBG_REGULATORY,
1570 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
1571 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
1572 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
1573 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
1574 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
1575 ath10k_dbg(ATH10K_DBG_REGULATORY,
1576 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
1577 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
1578 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
1579 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
1580 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
1581
1582 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
1583
1584 /* false event detection */
1585 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
1586 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
1587 ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
1588 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
1589 return -EINVAL;
1590 }
1591
1592 return 0;
1593}
1594
1595static void ath10k_wmi_event_dfs(struct ath10k *ar,
1596 struct wmi_single_phyerr_rx_event *event,
1597 u64 tsf)
1598{
1599 int buf_len, tlv_len, res, i = 0;
1600 struct phyerr_tlv *tlv;
1601 struct phyerr_radar_report *rr;
1602 struct phyerr_fft_report *fftr;
1603 u8 *tlv_buf;
1604
1605 buf_len = __le32_to_cpu(event->hdr.buf_len);
1606 ath10k_dbg(ATH10K_DBG_REGULATORY,
1607 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
1608 event->hdr.phy_err_code, event->hdr.rssi_combined,
1609 __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
1610
1611 /* Skip event if DFS disabled */
1612 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
1613 return;
1614
1615 ATH10K_DFS_STAT_INC(ar, pulses_total);
1616
1617 while (i < buf_len) {
1618 if (i + sizeof(*tlv) > buf_len) {
1619 ath10k_warn("too short buf for tlv header (%d)\n", i);
1620 return;
1621 }
1622
1623 tlv = (struct phyerr_tlv *)&event->bufp[i];
1624 tlv_len = __le16_to_cpu(tlv->len);
1625 tlv_buf = &event->bufp[i + sizeof(*tlv)];
1626 ath10k_dbg(ATH10K_DBG_REGULATORY,
1627 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
1628 tlv_len, tlv->tag, tlv->sig);
1629
1630 switch (tlv->tag) {
1631 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
1632 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
1633 ath10k_warn("too short radar pulse summary (%d)\n",
1634 i);
1635 return;
1636 }
1637
1638 rr = (struct phyerr_radar_report *)tlv_buf;
1639 ath10k_dfs_radar_report(ar, event, rr, tsf);
1640 break;
1641 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1642 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
1643 ath10k_warn("too short fft report (%d)\n", i);
1644 return;
1645 }
1646
1647 fftr = (struct phyerr_fft_report *)tlv_buf;
1648 res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
1649 if (res)
1650 return;
1651 break;
1652 }
1653
1654 i += sizeof(*tlv) + tlv_len;
1655 }
1656}
1657
1658static void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
1659 struct wmi_single_phyerr_rx_event *event,
1660 u64 tsf)
1661{
1662 ath10k_dbg(ATH10K_DBG_WMI, "wmi event spectral scan\n");
1663}
1664
5e3dd157
KV		 1665static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
1666{
9702c686
JD		 1667 struct wmi_comb_phyerr_rx_event *comb_event;
1668 struct wmi_single_phyerr_rx_event *event;
1669 u32 count, i, buf_len, phy_err_code;
1670 u64 tsf;
1671 int left_len = skb->len;
1672
1673 ATH10K_DFS_STAT_INC(ar, phy_errors);
1674
1675 /* Check if combined event available */
1676 if (left_len < sizeof(*comb_event)) {
1677 ath10k_warn("wmi phyerr combined event wrong len\n");
1678 return;
1679 }
1680
1681 left_len -= sizeof(*comb_event);
1682
1683 /* Check number of included events */
1684 comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
1685 count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
1686
1687 tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
1688 tsf <<= 32;
1689 tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
1690
1691 ath10k_dbg(ATH10K_DBG_WMI,
1692 "wmi event phyerr count %d tsf64 0x%llX\n",
1693 count, tsf);
1694
1695 event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
1696 for (i = 0; i < count; i++) {
1697 /* Check if we can read event header */
1698 if (left_len < sizeof(*event)) {
1699 ath10k_warn("single event (%d) wrong head len\n", i);
1700 return;
1701 }
1702
1703 left_len -= sizeof(*event);
1704
1705 buf_len = __le32_to_cpu(event->hdr.buf_len);
1706 phy_err_code = event->hdr.phy_err_code;
1707
1708 if (left_len < buf_len) {
1709 ath10k_warn("single event (%d) wrong buf len\n", i);
1710 return;
1711 }
1712
1713 left_len -= buf_len;
1714
1715 switch (phy_err_code) {
1716 case PHY_ERROR_RADAR:
1717 ath10k_wmi_event_dfs(ar, event, tsf);
1718 break;
1719 case PHY_ERROR_SPECTRAL_SCAN:
1720 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1721 break;
1722 case PHY_ERROR_FALSE_RADAR_EXT:
1723 ath10k_wmi_event_dfs(ar, event, tsf);
1724 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1725 break;
1726 default:
1727 break;
1728 }
1729
1730 event += sizeof(*event) + buf_len;
1731 }
5e3dd157
KV		 1732}
1733
1734static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
1735{
1736 ath10k_dbg(ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
1737}
1738
1739static void ath10k_wmi_event_profile_match(struct ath10k *ar,
1740 struct sk_buff *skb)
1741{
1742 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
1743}
1744
1745static void ath10k_wmi_event_debug_print(struct ath10k *ar,
2fe5288c 1746 struct sk_buff *skb)
5e3dd157 1747{
2fe5288c
KV		 1748 char buf[101], c;
1749 int i;
1750
1751 for (i = 0; i < sizeof(buf) - 1; i++) {
1752 if (i >= skb->len)
1753 break;
1754
1755 c = skb->data[i];
1756
1757 if (c == '\0')
1758 break;
1759
1760 if (isascii(c) && isprint(c))
1761 buf[i] = c;
1762 else
1763 buf[i] = '.';
1764 }
1765
1766 if (i == sizeof(buf) - 1)
1767 ath10k_warn("wmi debug print truncated: %d\n", skb->len);
1768
1769 /* for some reason the debug prints end with \n, remove that */
1770 if (skb->data[i - 1] == '\n')
1771 i--;
1772
1773 /* the last byte is always reserved for the null character */
1774 buf[i] = '\0';
1775
1776 ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf);
5e3dd157
KV		 1777}
1778
1779static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
1780{
1781 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
1782}
1783
1784static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
1785 struct sk_buff *skb)
1786{
1787 ath10k_dbg(ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
1788}
1789
1790static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
1791 struct sk_buff *skb)
1792{
1793 ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
1794}
1795
1796static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
1797 struct sk_buff *skb)
1798{
1799 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
1800}
1801
1802static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
1803 struct sk_buff *skb)
1804{
1805 ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
1806}
1807
1808static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
1809 struct sk_buff *skb)
1810{
1811 ath10k_dbg(ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
1812}
1813
1814static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
1815 struct sk_buff *skb)
1816{
1817 ath10k_dbg(ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
1818}
1819
1820static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
1821 struct sk_buff *skb)
1822{
1823 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
1824}
1825
1826static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
1827 struct sk_buff *skb)
1828{
1829 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
1830}
1831
1832static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
1833 struct sk_buff *skb)
1834{
1835 ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
1836}
1837
1838static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
1839 struct sk_buff *skb)
1840{
1841 ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
1842}
1843
1844static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
1845 struct sk_buff *skb)
1846{
1847 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
1848}
1849
1850static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
1851 struct sk_buff *skb)
1852{
1853 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
1854}
1855
1856static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
1857 struct sk_buff *skb)
1858{
1859 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
1860}
1861
8a6618b0
BM		 1862static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
1863 struct sk_buff *skb)
1864{
1865 ath10k_dbg(ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
1866}
1867
1868static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
1869 struct sk_buff *skb)
1870{
1871 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
1872}
1873
1874static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
1875 struct sk_buff *skb)
1876{
1877 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
1878}
1879
b3effe61
BM		 1880static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
1881 u32 num_units, u32 unit_len)
1882{
1883 dma_addr_t paddr;
1884 u32 pool_size;
1885 int idx = ar->wmi.num_mem_chunks;
1886
1887 pool_size = num_units * round_up(unit_len, 4);
1888
1889 if (!pool_size)
1890 return -EINVAL;
1891
1892 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
1893 pool_size,
1894 &paddr,
1895 GFP_ATOMIC);
1896 if (!ar->wmi.mem_chunks[idx].vaddr) {
1897 ath10k_warn("failed to allocate memory chunk\n");
1898 return -ENOMEM;
1899 }
1900
1901 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
1902
1903 ar->wmi.mem_chunks[idx].paddr = paddr;
1904 ar->wmi.mem_chunks[idx].len = pool_size;
1905 ar->wmi.mem_chunks[idx].req_id = req_id;
1906 ar->wmi.num_mem_chunks++;
1907
1908 return 0;
1909}
1910
5e3dd157
KV		 1911static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
1912 struct sk_buff *skb)
1913{
1914 struct wmi_service_ready_event *ev = (void *)skb->data;
1915
1916 if (skb->len < sizeof(*ev)) {
1917 ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
1918 skb->len, sizeof(*ev));
1919 return;
1920 }
1921
1922 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
1923 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
1924 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
1925 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
1926 ar->fw_version_major =
1927 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
1928 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
1929 ar->fw_version_release =
1930 (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
1931 ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
1932 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
8865bee4
MK		 1933 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
1934
1a222435
KV		 1935 /* only manually set fw features when not using FW IE format */
1936 if (ar->fw_api == 1 && ar->fw_version_build > 636)
0d9b0438
MK		 1937 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
1938
8865bee4
MK		 1939 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
1940 ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
1941 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
1942 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
1943 }
5e3dd157
KV		 1944
1945 ar->ath_common.regulatory.current_rd =
1946 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
1947
1948 ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
1949 sizeof(ev->wmi_service_bitmap));
1950
1951 if (strlen(ar->hw->wiphy->fw_version) == 0) {
1952 snprintf(ar->hw->wiphy->fw_version,
1953 sizeof(ar->hw->wiphy->fw_version),
1954 "%u.%u.%u.%u",
1955 ar->fw_version_major,
1956 ar->fw_version_minor,
1957 ar->fw_version_release,
1958 ar->fw_version_build);
1959 }
1960
1961 /* FIXME: it probably should be better to support this */
1962 if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
1963 ath10k_warn("target requested %d memory chunks; ignoring\n",
1964 __le32_to_cpu(ev->num_mem_reqs));
1965 }
1966
1967 ath10k_dbg(ATH10K_DBG_WMI,
8865bee4 1968 "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
5e3dd157
KV		 1969 __le32_to_cpu(ev->sw_version),
1970 __le32_to_cpu(ev->sw_version_1),
1971 __le32_to_cpu(ev->abi_version),
1972 __le32_to_cpu(ev->phy_capability),
1973 __le32_to_cpu(ev->ht_cap_info),
1974 __le32_to_cpu(ev->vht_cap_info),
1975 __le32_to_cpu(ev->vht_supp_mcs),
1976 __le32_to_cpu(ev->sys_cap_info),
8865bee4
MK		 1977 __le32_to_cpu(ev->num_mem_reqs),
1978 __le32_to_cpu(ev->num_rf_chains));
5e3dd157
KV		 1979
1980 complete(&ar->wmi.service_ready);
1981}
1982
6f97d256
BM		 1983static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar,
1984 struct sk_buff *skb)
1985{
b3effe61
BM		 1986 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
1987 int ret;
6f97d256
BM		 1988 struct wmi_service_ready_event_10x *ev = (void *)skb->data;
1989
1990 if (skb->len < sizeof(*ev)) {
1991 ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
1992 skb->len, sizeof(*ev));
1993 return;
1994 }
1995
1996 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
1997 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
1998 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
1999 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
2000 ar->fw_version_major =
2001 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
2002 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
2003 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
2004 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
2005
2006 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
2007 ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
2008 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
2009 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
2010 }
2011
2012 ar->ath_common.regulatory.current_rd =
2013 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
2014
2015 ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
2016 sizeof(ev->wmi_service_bitmap));
2017
2018 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2019 snprintf(ar->hw->wiphy->fw_version,
2020 sizeof(ar->hw->wiphy->fw_version),
2021 "%u.%u",
2022 ar->fw_version_major,
2023 ar->fw_version_minor);
2024 }
2025
b3effe61
BM		 2026 num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs);
2027
2028 if (num_mem_reqs > ATH10K_MAX_MEM_REQS) {
2029 ath10k_warn("requested memory chunks number (%d) exceeds the limit\n",
2030 num_mem_reqs);
2031 return;
6f97d256
BM		 2032 }
2033
b3effe61
BM		 2034 if (!num_mem_reqs)
2035 goto exit;
2036
2037 ath10k_dbg(ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n",
2038 num_mem_reqs);
2039
2040 for (i = 0; i < num_mem_reqs; ++i) {
2041 req_id = __le32_to_cpu(ev->mem_reqs[i].req_id);
2042 num_units = __le32_to_cpu(ev->mem_reqs[i].num_units);
2043 unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size);
2044 num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info);
2045
2046 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
2047 /* number of units to allocate is number of
2048 * peers, 1 extra for self peer on target */
2049 /* this needs to be tied, host and target
2050 * can get out of sync */
ec6a73f0 2051 num_units = TARGET_10X_NUM_PEERS + 1;
b3effe61 2052 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
ec6a73f0 2053 num_units = TARGET_10X_NUM_VDEVS + 1;
b3effe61
BM		 2054
2055 ath10k_dbg(ATH10K_DBG_WMI,
2056 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
2057 req_id,
2058 __le32_to_cpu(ev->mem_reqs[i].num_units),
2059 num_unit_info,
2060 unit_size,
2061 num_units);
2062
2063 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
2064 unit_size);
2065 if (ret)
2066 return;
2067 }
2068
2069exit:
6f97d256
BM		 2070 ath10k_dbg(ATH10K_DBG_WMI,
2071 "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
2072 __le32_to_cpu(ev->sw_version),
2073 __le32_to_cpu(ev->abi_version),
2074 __le32_to_cpu(ev->phy_capability),
2075 __le32_to_cpu(ev->ht_cap_info),
2076 __le32_to_cpu(ev->vht_cap_info),
2077 __le32_to_cpu(ev->vht_supp_mcs),
2078 __le32_to_cpu(ev->sys_cap_info),
2079 __le32_to_cpu(ev->num_mem_reqs),
2080 __le32_to_cpu(ev->num_rf_chains));
2081
2082 complete(&ar->wmi.service_ready);
2083}
2084
5e3dd157
KV		 2085static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
2086{
2087 struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
2088
2089 if (WARN_ON(skb->len < sizeof(*ev)))
2090 return -EINVAL;
2091
2092 memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN);
2093
2094 ath10k_dbg(ATH10K_DBG_WMI,
2c34752a 2095 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d skb->len %i ev-sz %zu\n",
5e3dd157
KV		 2096 __le32_to_cpu(ev->sw_version),
2097 __le32_to_cpu(ev->abi_version),
2098 ev->mac_addr.addr,
2c34752a 2099 __le32_to_cpu(ev->status), skb->len, sizeof(*ev));
5e3dd157
KV		 2100
2101 complete(&ar->wmi.unified_ready);
2102 return 0;
2103}
2104
ce42870e 2105static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 2106{
2107 struct wmi_cmd_hdr *cmd_hdr;
2108 enum wmi_event_id id;
2109 u16 len;
2110
2111 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2112 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2113
2114 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2115 return;
2116
2117 len = skb->len;
2118
2119 trace_ath10k_wmi_event(id, skb->data, skb->len);
2120
2121 switch (id) {
2122 case WMI_MGMT_RX_EVENTID:
2123 ath10k_wmi_event_mgmt_rx(ar, skb);
2124 /* mgmt_rx() owns the skb now! */
2125 return;
2126 case WMI_SCAN_EVENTID:
2127 ath10k_wmi_event_scan(ar, skb);
2128 break;
2129 case WMI_CHAN_INFO_EVENTID:
2130 ath10k_wmi_event_chan_info(ar, skb);
2131 break;
2132 case WMI_ECHO_EVENTID:
2133 ath10k_wmi_event_echo(ar, skb);
2134 break;
2135 case WMI_DEBUG_MESG_EVENTID:
2136 ath10k_wmi_event_debug_mesg(ar, skb);
2137 break;
2138 case WMI_UPDATE_STATS_EVENTID:
2139 ath10k_wmi_event_update_stats(ar, skb);
2140 break;
2141 case WMI_VDEV_START_RESP_EVENTID:
2142 ath10k_wmi_event_vdev_start_resp(ar, skb);
2143 break;
2144 case WMI_VDEV_STOPPED_EVENTID:
2145 ath10k_wmi_event_vdev_stopped(ar, skb);
2146 break;
2147 case WMI_PEER_STA_KICKOUT_EVENTID:
2148 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2149 break;
2150 case WMI_HOST_SWBA_EVENTID:
2151 ath10k_wmi_event_host_swba(ar, skb);
2152 break;
2153 case WMI_TBTTOFFSET_UPDATE_EVENTID:
2154 ath10k_wmi_event_tbttoffset_update(ar, skb);
2155 break;
2156 case WMI_PHYERR_EVENTID:
2157 ath10k_wmi_event_phyerr(ar, skb);
2158 break;
2159 case WMI_ROAM_EVENTID:
2160 ath10k_wmi_event_roam(ar, skb);
2161 break;
2162 case WMI_PROFILE_MATCH:
2163 ath10k_wmi_event_profile_match(ar, skb);
2164 break;
2165 case WMI_DEBUG_PRINT_EVENTID:
2166 ath10k_wmi_event_debug_print(ar, skb);
2167 break;
2168 case WMI_PDEV_QVIT_EVENTID:
2169 ath10k_wmi_event_pdev_qvit(ar, skb);
2170 break;
2171 case WMI_WLAN_PROFILE_DATA_EVENTID:
2172 ath10k_wmi_event_wlan_profile_data(ar, skb);
2173 break;
2174 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
2175 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2176 break;
2177 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
2178 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2179 break;
2180 case WMI_RTT_ERROR_REPORT_EVENTID:
2181 ath10k_wmi_event_rtt_error_report(ar, skb);
2182 break;
2183 case WMI_WOW_WAKEUP_HOST_EVENTID:
2184 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2185 break;
2186 case WMI_DCS_INTERFERENCE_EVENTID:
2187 ath10k_wmi_event_dcs_interference(ar, skb);
2188 break;
2189 case WMI_PDEV_TPC_CONFIG_EVENTID:
2190 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2191 break;
2192 case WMI_PDEV_FTM_INTG_EVENTID:
2193 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
2194 break;
2195 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
2196 ath10k_wmi_event_gtk_offload_status(ar, skb);
2197 break;
2198 case WMI_GTK_REKEY_FAIL_EVENTID:
2199 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
2200 break;
2201 case WMI_TX_DELBA_COMPLETE_EVENTID:
2202 ath10k_wmi_event_delba_complete(ar, skb);
2203 break;
2204 case WMI_TX_ADDBA_COMPLETE_EVENTID:
2205 ath10k_wmi_event_addba_complete(ar, skb);
2206 break;
2207 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
2208 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
2209 break;
2210 case WMI_SERVICE_READY_EVENTID:
2211 ath10k_wmi_service_ready_event_rx(ar, skb);
2212 break;
2213 case WMI_READY_EVENTID:
2214 ath10k_wmi_ready_event_rx(ar, skb);
2215 break;
2216 default:
2217 ath10k_warn("Unknown eventid: %d\n", id);
2218 break;
2219 }
2220
2221 dev_kfree_skb(skb);
2222}
2223
8a6618b0
BM		 2224static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
2225{
2226 struct wmi_cmd_hdr *cmd_hdr;
2227 enum wmi_10x_event_id id;
2228 u16 len;
2229
2230 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2231 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2232
2233 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2234 return;
2235
2236 len = skb->len;
2237
2238 trace_ath10k_wmi_event(id, skb->data, skb->len);
2239
2240 switch (id) {
2241 case WMI_10X_MGMT_RX_EVENTID:
2242 ath10k_wmi_event_mgmt_rx(ar, skb);
2243 /* mgmt_rx() owns the skb now! */
2244 return;
2245 case WMI_10X_SCAN_EVENTID:
2246 ath10k_wmi_event_scan(ar, skb);
2247 break;
2248 case WMI_10X_CHAN_INFO_EVENTID:
2249 ath10k_wmi_event_chan_info(ar, skb);
2250 break;
2251 case WMI_10X_ECHO_EVENTID:
2252 ath10k_wmi_event_echo(ar, skb);
2253 break;
2254 case WMI_10X_DEBUG_MESG_EVENTID:
2255 ath10k_wmi_event_debug_mesg(ar, skb);
2256 break;
2257 case WMI_10X_UPDATE_STATS_EVENTID:
2258 ath10k_wmi_event_update_stats(ar, skb);
2259 break;
2260 case WMI_10X_VDEV_START_RESP_EVENTID:
2261 ath10k_wmi_event_vdev_start_resp(ar, skb);
2262 break;
2263 case WMI_10X_VDEV_STOPPED_EVENTID:
2264 ath10k_wmi_event_vdev_stopped(ar, skb);
2265 break;
2266 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
2267 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2268 break;
2269 case WMI_10X_HOST_SWBA_EVENTID:
2270 ath10k_wmi_event_host_swba(ar, skb);
2271 break;
2272 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
2273 ath10k_wmi_event_tbttoffset_update(ar, skb);
2274 break;
2275 case WMI_10X_PHYERR_EVENTID:
2276 ath10k_wmi_event_phyerr(ar, skb);
2277 break;
2278 case WMI_10X_ROAM_EVENTID:
2279 ath10k_wmi_event_roam(ar, skb);
2280 break;
2281 case WMI_10X_PROFILE_MATCH:
2282 ath10k_wmi_event_profile_match(ar, skb);
2283 break;
2284 case WMI_10X_DEBUG_PRINT_EVENTID:
2285 ath10k_wmi_event_debug_print(ar, skb);
2286 break;
2287 case WMI_10X_PDEV_QVIT_EVENTID:
2288 ath10k_wmi_event_pdev_qvit(ar, skb);
2289 break;
2290 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
2291 ath10k_wmi_event_wlan_profile_data(ar, skb);
2292 break;
2293 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
2294 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2295 break;
2296 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
2297 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2298 break;
2299 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
2300 ath10k_wmi_event_rtt_error_report(ar, skb);
2301 break;
2302 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
2303 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2304 break;
2305 case WMI_10X_DCS_INTERFERENCE_EVENTID:
2306 ath10k_wmi_event_dcs_interference(ar, skb);
2307 break;
2308 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
2309 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2310 break;
2311 case WMI_10X_INST_RSSI_STATS_EVENTID:
2312 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2313 break;
2314 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
2315 ath10k_wmi_event_vdev_standby_req(ar, skb);
2316 break;
2317 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
2318 ath10k_wmi_event_vdev_resume_req(ar, skb);
2319 break;
2320 case WMI_10X_SERVICE_READY_EVENTID:
6f97d256 2321 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
8a6618b0
BM		 2322 break;
2323 case WMI_10X_READY_EVENTID:
2324 ath10k_wmi_ready_event_rx(ar, skb);
2325 break;
2326 default:
2327 ath10k_warn("Unknown eventid: %d\n", id);
2328 break;
2329 }
2330
2331 dev_kfree_skb(skb);
2332}
2333
2334
ce42870e
BM		 2335static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
2336{
2337 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
8a6618b0 2338 ath10k_wmi_10x_process_rx(ar, skb);
ce42870e
BM		 2339 else
2340 ath10k_wmi_main_process_rx(ar, skb);
2341}
2342
5e3dd157
KV		 2343/* WMI Initialization functions */
2344int ath10k_wmi_attach(struct ath10k *ar)
2345{
ce42870e 2346 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
b7e3adf9 2347 ar->wmi.cmd = &wmi_10x_cmd_map;
6d1506e7 2348 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
226a339b 2349 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
ce42870e
BM		 2350 } else {
2351 ar->wmi.cmd = &wmi_cmd_map;
6d1506e7 2352 ar->wmi.vdev_param = &wmi_vdev_param_map;
226a339b 2353 ar->wmi.pdev_param = &wmi_pdev_param_map;
ce42870e
BM		 2354 }
2355
5e3dd157
KV		 2356 init_completion(&ar->wmi.service_ready);
2357 init_completion(&ar->wmi.unified_ready);
be8b3943 2358 init_waitqueue_head(&ar->wmi.tx_credits_wq);
5e3dd157
KV		 2359
2360 return 0;
2361}
2362
2363void ath10k_wmi_detach(struct ath10k *ar)
2364{
b3effe61
BM		 2365 int i;
2366
2367 /* free the host memory chunks requested by firmware */
2368 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2369 dma_free_coherent(ar->dev,
2370 ar->wmi.mem_chunks[i].len,
2371 ar->wmi.mem_chunks[i].vaddr,
2372 ar->wmi.mem_chunks[i].paddr);
2373 }
2374
2375 ar->wmi.num_mem_chunks = 0;
5e3dd157
KV		 2376}
2377
2378int ath10k_wmi_connect_htc_service(struct ath10k *ar)
2379{
2380 int status;
2381 struct ath10k_htc_svc_conn_req conn_req;
2382 struct ath10k_htc_svc_conn_resp conn_resp;
2383
2384 memset(&conn_req, 0, sizeof(conn_req));
2385 memset(&conn_resp, 0, sizeof(conn_resp));
2386
2387 /* these fields are the same for all service endpoints */
2388 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
2389 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 2390 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV		 2391
2392 /* connect to control service */
2393 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
2394
cd003fad 2395 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157
KV		 2396 if (status) {
2397 ath10k_warn("failed to connect to WMI CONTROL service status: %d\n",
2398 status);
2399 return status;
2400 }
2401
2402 ar->wmi.eid = conn_resp.eid;
2403 return 0;
2404}
2405
821af6ae
MP		 2406static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2407 u16 rd2g, u16 rd5g, u16 ctl2g,
2408 u16 ctl5g)
5e3dd157
KV		 2409{
2410 struct wmi_pdev_set_regdomain_cmd *cmd;
2411 struct sk_buff *skb;
2412
2413 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2414 if (!skb)
2415 return -ENOMEM;
2416
2417 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
2418 cmd->reg_domain = __cpu_to_le32(rd);
2419 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2420 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2421 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2422 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2423
2424 ath10k_dbg(ATH10K_DBG_WMI,
2425 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
2426 rd, rd2g, rd5g, ctl2g, ctl5g);
2427
ce42870e
BM		 2428 return ath10k_wmi_cmd_send(ar, skb,
2429 ar->wmi.cmd->pdev_set_regdomain_cmdid);
5e3dd157
KV		 2430}
2431
821af6ae
MP		 2432static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2433 u16 rd2g, u16 rd5g,
2434 u16 ctl2g, u16 ctl5g,
2435 enum wmi_dfs_region dfs_reg)
2436{
2437 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
2438 struct sk_buff *skb;
2439
2440 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2441 if (!skb)
2442 return -ENOMEM;
2443
2444 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
2445 cmd->reg_domain = __cpu_to_le32(rd);
2446 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2447 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2448 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2449 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2450 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
2451
2452 ath10k_dbg(ATH10K_DBG_WMI,
2453 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
2454 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
2455
2456 return ath10k_wmi_cmd_send(ar, skb,
2457 ar->wmi.cmd->pdev_set_regdomain_cmdid);
2458}
2459
2460int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
2461 u16 rd5g, u16 ctl2g, u16 ctl5g,
2462 enum wmi_dfs_region dfs_reg)
2463{
2464 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2465 return ath10k_wmi_10x_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2466 ctl2g, ctl5g, dfs_reg);
2467 else
2468 return ath10k_wmi_main_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2469 ctl2g, ctl5g);
2470}
2471
5e3dd157
KV		 2472int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
2473 const struct wmi_channel_arg *arg)
2474{
2475 struct wmi_set_channel_cmd *cmd;
2476 struct sk_buff *skb;
e8a50f8b 2477 u32 ch_flags = 0;
5e3dd157
KV		 2478
2479 if (arg->passive)
2480 return -EINVAL;
2481
2482 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2483 if (!skb)
2484 return -ENOMEM;
2485
e8a50f8b
MP		 2486 if (arg->chan_radar)
2487 ch_flags |= WMI_CHAN_FLAG_DFS;
2488
5e3dd157
KV		 2489 cmd = (struct wmi_set_channel_cmd *)skb->data;
2490 cmd->chan.mhz = __cpu_to_le32(arg->freq);
2491 cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
2492 cmd->chan.mode = arg->mode;
e8a50f8b 2493 cmd->chan.flags |= __cpu_to_le32(ch_flags);
5e3dd157
KV		 2494 cmd->chan.min_power = arg->min_power;
2495 cmd->chan.max_power = arg->max_power;
2496 cmd->chan.reg_power = arg->max_reg_power;
2497 cmd->chan.reg_classid = arg->reg_class_id;
2498 cmd->chan.antenna_max = arg->max_antenna_gain;
2499
2500 ath10k_dbg(ATH10K_DBG_WMI,
2501 "wmi set channel mode %d freq %d\n",
2502 arg->mode, arg->freq);
2503
ce42870e
BM		 2504 return ath10k_wmi_cmd_send(ar, skb,
2505 ar->wmi.cmd->pdev_set_channel_cmdid);
5e3dd157
KV		 2506}
2507
00f5482b 2508int ath10k_wmi_pdev_suspend_target(struct ath10k *ar, u32 suspend_opt)
5e3dd157
KV		 2509{
2510 struct wmi_pdev_suspend_cmd *cmd;
2511 struct sk_buff *skb;
2512
2513 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2514 if (!skb)
2515 return -ENOMEM;
2516
2517 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
00f5482b 2518 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
5e3dd157 2519
ce42870e 2520 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
5e3dd157
KV		 2521}
2522
2523int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
2524{
2525 struct sk_buff *skb;
2526
2527 skb = ath10k_wmi_alloc_skb(0);
2528 if (skb == NULL)
2529 return -ENOMEM;
2530
ce42870e 2531 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
5e3dd157
KV		 2532}
2533
226a339b 2534int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV		 2535{
2536 struct wmi_pdev_set_param_cmd *cmd;
2537 struct sk_buff *skb;
2538
226a339b
BM		 2539 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
2540 ath10k_warn("pdev param %d not supported by firmware\n", id);
d544943a 2541 return -EOPNOTSUPP;
226a339b
BM		 2542 }
2543
5e3dd157
KV		 2544 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2545 if (!skb)
2546 return -ENOMEM;
2547
2548 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
2549 cmd->param_id = __cpu_to_le32(id);
2550 cmd->param_value = __cpu_to_le32(value);
2551
2552 ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
2553 id, value);
ce42870e 2554 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
5e3dd157
KV		 2555}
2556
12b2b9e3 2557static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
5e3dd157
KV		 2558{
2559 struct wmi_init_cmd *cmd;
2560 struct sk_buff *buf;
2561 struct wmi_resource_config config = {};
b3effe61
BM		 2562 u32 len, val;
2563 int i;
5e3dd157
KV		 2564
2565 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
2566 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
2567 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
2568
2569 config.num_offload_reorder_bufs =
2570 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
2571
2572 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
2573 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
2574 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
2575 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
2576 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
2577 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2578 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2579 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2580 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
2581 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
2582
2583 config.scan_max_pending_reqs =
2584 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
2585
2586 config.bmiss_offload_max_vdev =
2587 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
2588
2589 config.roam_offload_max_vdev =
2590 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
2591
2592 config.roam_offload_max_ap_profiles =
2593 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
2594
2595 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
2596 config.num_mcast_table_elems =
2597 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
2598
2599 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
2600 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
2601 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
2602 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
2603 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
2604
2605 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
2606 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
2607
2608 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
2609
2610 config.gtk_offload_max_vdev =
2611 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
2612
2613 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
2614 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
2615
b3effe61
BM		 2616 len = sizeof(*cmd) +
2617 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
2618
2619 buf = ath10k_wmi_alloc_skb(len);
5e3dd157
KV		 2620 if (!buf)
2621 return -ENOMEM;
2622
2623 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61
BM		 2624
2625 if (ar->wmi.num_mem_chunks == 0) {
2626 cmd->num_host_mem_chunks = 0;
2627 goto out;
2628 }
2629
2630 ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
5c54a7bf 2631 ar->wmi.num_mem_chunks);
b3effe61
BM		 2632
2633 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
2634
2635 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2636 cmd->host_mem_chunks[i].ptr =
2637 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
2638 cmd->host_mem_chunks[i].size =
2639 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
2640 cmd->host_mem_chunks[i].req_id =
2641 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
2642
2643 ath10k_dbg(ATH10K_DBG_WMI,
5c54a7bf 2644 "wmi chunk %d len %d requested, addr 0x%llx\n",
b3effe61 2645 i,
5c54a7bf
MK		 2646 ar->wmi.mem_chunks[i].len,
2647 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
b3effe61
BM		 2648 }
2649out:
5e3dd157
KV		 2650 memcpy(&cmd->resource_config, &config, sizeof(config));
2651
2652 ath10k_dbg(ATH10K_DBG_WMI, "wmi init\n");
ce42870e 2653 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
5e3dd157
KV		 2654}
2655
12b2b9e3
BM		 2656static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
2657{
2658 struct wmi_init_cmd_10x *cmd;
2659 struct sk_buff *buf;
2660 struct wmi_resource_config_10x config = {};
2661 u32 len, val;
2662 int i;
2663
ec6a73f0
BM		 2664 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
2665 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
2666 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
2667 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
2668 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
2669 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
2670 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
2671 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2672 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2673 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2674 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
2675 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
12b2b9e3
BM		 2676
2677 config.scan_max_pending_reqs =
ec6a73f0 2678 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM		 2679
2680 config.bmiss_offload_max_vdev =
ec6a73f0 2681 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 2682
2683 config.roam_offload_max_vdev =
ec6a73f0 2684 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 2685
2686 config.roam_offload_max_ap_profiles =
ec6a73f0 2687 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 2688
ec6a73f0 2689 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 2690 config.num_mcast_table_elems =
ec6a73f0 2691 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 2692
ec6a73f0
BM		 2693 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
2694 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
2695 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
2696 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
2697 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 2698
ec6a73f0 2699 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM		 2700 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
2701
ec6a73f0 2702 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 2703
ec6a73f0
BM		 2704 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
2705 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM		 2706
2707 len = sizeof(*cmd) +
2708 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
2709
2710 buf = ath10k_wmi_alloc_skb(len);
2711 if (!buf)
2712 return -ENOMEM;
2713
2714 cmd = (struct wmi_init_cmd_10x *)buf->data;
2715
2716 if (ar->wmi.num_mem_chunks == 0) {
2717 cmd->num_host_mem_chunks = 0;
2718 goto out;
2719 }
2720
2721 ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
5c54a7bf 2722 ar->wmi.num_mem_chunks);
12b2b9e3
BM		 2723
2724 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
2725
2726 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2727 cmd->host_mem_chunks[i].ptr =
2728 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
2729 cmd->host_mem_chunks[i].size =
2730 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
2731 cmd->host_mem_chunks[i].req_id =
2732 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
2733
2734 ath10k_dbg(ATH10K_DBG_WMI,
5c54a7bf 2735 "wmi chunk %d len %d requested, addr 0x%llx\n",
12b2b9e3 2736 i,
5c54a7bf
MK		 2737 ar->wmi.mem_chunks[i].len,
2738 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
12b2b9e3
BM		 2739 }
2740out:
2741 memcpy(&cmd->resource_config, &config, sizeof(config));
2742
2743 ath10k_dbg(ATH10K_DBG_WMI, "wmi init 10x\n");
2744 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
2745}
2746
2747int ath10k_wmi_cmd_init(struct ath10k *ar)
2748{
2749 int ret;
2750
2751 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2752 ret = ath10k_wmi_10x_cmd_init(ar);
2753 else
2754 ret = ath10k_wmi_main_cmd_init(ar);
2755
2756 return ret;
5e3dd157
KV		 2757}
2758
89b7e766
BM		 2759static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar,
2760 const struct wmi_start_scan_arg *arg)
5e3dd157
KV		 2761{
2762 int len;
2763
89b7e766
BM		 2764 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2765 len = sizeof(struct wmi_start_scan_cmd_10x);
2766 else
2767 len = sizeof(struct wmi_start_scan_cmd);
5e3dd157
KV		 2768
2769 if (arg->ie_len) {
2770 if (!arg->ie)
2771 return -EINVAL;
2772 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
2773 return -EINVAL;
2774
2775 len += sizeof(struct wmi_ie_data);
2776 len += roundup(arg->ie_len, 4);
2777 }
2778
2779 if (arg->n_channels) {
2780 if (!arg->channels)
2781 return -EINVAL;
2782 if (arg->n_channels > ARRAY_SIZE(arg->channels))
2783 return -EINVAL;
2784
2785 len += sizeof(struct wmi_chan_list);
2786 len += sizeof(__le32) * arg->n_channels;
2787 }
2788
2789 if (arg->n_ssids) {
2790 if (!arg->ssids)
2791 return -EINVAL;
2792 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
2793 return -EINVAL;
2794
2795 len += sizeof(struct wmi_ssid_list);
2796 len += sizeof(struct wmi_ssid) * arg->n_ssids;
2797 }
2798
2799 if (arg->n_bssids) {
2800 if (!arg->bssids)
2801 return -EINVAL;
2802 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
2803 return -EINVAL;
2804
2805 len += sizeof(struct wmi_bssid_list);
2806 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
2807 }
2808
2809 return len;
2810}
2811
2812int ath10k_wmi_start_scan(struct ath10k *ar,
2813 const struct wmi_start_scan_arg *arg)
2814{
2815 struct wmi_start_scan_cmd *cmd;
2816 struct sk_buff *skb;
2817 struct wmi_ie_data *ie;
2818 struct wmi_chan_list *channels;
2819 struct wmi_ssid_list *ssids;
2820 struct wmi_bssid_list *bssids;
2821 u32 scan_id;
2822 u32 scan_req_id;
2823 int off;
2824 int len = 0;
2825 int i;
2826
89b7e766 2827 len = ath10k_wmi_start_scan_calc_len(ar, arg);
5e3dd157
KV		 2828 if (len < 0)
2829 return len; /* len contains error code here */
2830
2831 skb = ath10k_wmi_alloc_skb(len);
2832 if (!skb)
2833 return -ENOMEM;
2834
2835 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
2836 scan_id |= arg->scan_id;
2837
2838 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
2839 scan_req_id |= arg->scan_req_id;
2840
2841 cmd = (struct wmi_start_scan_cmd *)skb->data;
2842 cmd->scan_id = __cpu_to_le32(scan_id);
2843 cmd->scan_req_id = __cpu_to_le32(scan_req_id);
2844 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
2845 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
2846 cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
2847 cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
2848 cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
2849 cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
2850 cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
2851 cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
2852 cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
2853 cmd->idle_time = __cpu_to_le32(arg->idle_time);
2854 cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
2855 cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
2856 cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
2857
2858 /* TLV list starts after fields included in the struct */
89b7e766
BM		 2859 /* There's just one filed that differes the two start_scan
2860 * structures - burst_duration, which we are not using btw,
2861 no point to make the split here, just shift the buffer to fit with
2862 given FW */
2863 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2864 off = sizeof(struct wmi_start_scan_cmd_10x);
2865 else
2866 off = sizeof(struct wmi_start_scan_cmd);
5e3dd157
KV		 2867
2868 if (arg->n_channels) {
2869 channels = (void *)skb->data + off;
2870 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
2871 channels->num_chan = __cpu_to_le32(arg->n_channels);
2872
2873 for (i = 0; i < arg->n_channels; i++)
2874 channels->channel_list[i] =
2875 __cpu_to_le32(arg->channels[i]);
2876
2877 off += sizeof(*channels);
2878 off += sizeof(__le32) * arg->n_channels;
2879 }
2880
2881 if (arg->n_ssids) {
2882 ssids = (void *)skb->data + off;
2883 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
2884 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
2885
2886 for (i = 0; i < arg->n_ssids; i++) {
2887 ssids->ssids[i].ssid_len =
2888 __cpu_to_le32(arg->ssids[i].len);
2889 memcpy(&ssids->ssids[i].ssid,
2890 arg->ssids[i].ssid,
2891 arg->ssids[i].len);
2892 }
2893
2894 off += sizeof(*ssids);
2895 off += sizeof(struct wmi_ssid) * arg->n_ssids;
2896 }
2897
2898 if (arg->n_bssids) {
2899 bssids = (void *)skb->data + off;
2900 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
2901 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
2902
2903 for (i = 0; i < arg->n_bssids; i++)
2904 memcpy(&bssids->bssid_list[i],
2905 arg->bssids[i].bssid,
2906 ETH_ALEN);
2907
2908 off += sizeof(*bssids);
2909 off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
2910 }
2911
2912 if (arg->ie_len) {
2913 ie = (void *)skb->data + off;
2914 ie->tag = __cpu_to_le32(WMI_IE_TAG);
2915 ie->ie_len = __cpu_to_le32(arg->ie_len);
2916 memcpy(ie->ie_data, arg->ie, arg->ie_len);
2917
2918 off += sizeof(*ie);
2919 off += roundup(arg->ie_len, 4);
2920 }
2921
2922 if (off != skb->len) {
2923 dev_kfree_skb(skb);
2924 return -EINVAL;
2925 }
2926
2927 ath10k_dbg(ATH10K_DBG_WMI, "wmi start scan\n");
ce42870e 2928 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
5e3dd157
KV		 2929}
2930
2931void ath10k_wmi_start_scan_init(struct ath10k *ar,
2932 struct wmi_start_scan_arg *arg)
2933{
2934 /* setup commonly used values */
2935 arg->scan_req_id = 1;
2936 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2937 arg->dwell_time_active = 50;
2938 arg->dwell_time_passive = 150;
2939 arg->min_rest_time = 50;
2940 arg->max_rest_time = 500;
2941 arg->repeat_probe_time = 0;
2942 arg->probe_spacing_time = 0;
2943 arg->idle_time = 0;
c322892f 2944 arg->max_scan_time = 20000;
5e3dd157
KV		 2945 arg->probe_delay = 5;
2946 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
2947 | WMI_SCAN_EVENT_COMPLETED
2948 | WMI_SCAN_EVENT_BSS_CHANNEL
2949 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
2950 | WMI_SCAN_EVENT_DEQUEUED;
2951 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
2952 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
2953 arg->n_bssids = 1;
2954 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
2955}
2956
2957int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
2958{
2959 struct wmi_stop_scan_cmd *cmd;
2960 struct sk_buff *skb;
2961 u32 scan_id;
2962 u32 req_id;
2963
2964 if (arg->req_id > 0xFFF)
2965 return -EINVAL;
2966 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
2967 return -EINVAL;
2968
2969 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2970 if (!skb)
2971 return -ENOMEM;
2972
2973 scan_id = arg->u.scan_id;
2974 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
2975
2976 req_id = arg->req_id;
2977 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
2978
2979 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2980 cmd->req_type = __cpu_to_le32(arg->req_type);
2981 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
2982 cmd->scan_id = __cpu_to_le32(scan_id);
2983 cmd->scan_req_id = __cpu_to_le32(req_id);
2984
2985 ath10k_dbg(ATH10K_DBG_WMI,
2986 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
2987 arg->req_id, arg->req_type, arg->u.scan_id);
ce42870e 2988 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
5e3dd157
KV		 2989}
2990
2991int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
2992 enum wmi_vdev_type type,
2993 enum wmi_vdev_subtype subtype,
2994 const u8 macaddr[ETH_ALEN])
2995{
2996 struct wmi_vdev_create_cmd *cmd;
2997 struct sk_buff *skb;
2998
2999 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3000 if (!skb)
3001 return -ENOMEM;
3002
3003 cmd = (struct wmi_vdev_create_cmd *)skb->data;
3004 cmd->vdev_id = __cpu_to_le32(vdev_id);
3005 cmd->vdev_type = __cpu_to_le32(type);
3006 cmd->vdev_subtype = __cpu_to_le32(subtype);
3007 memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN);
3008
3009 ath10k_dbg(ATH10K_DBG_WMI,
3010 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
3011 vdev_id, type, subtype, macaddr);
3012
ce42870e 3013 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
5e3dd157
KV		 3014}
3015
3016int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
3017{
3018 struct wmi_vdev_delete_cmd *cmd;
3019 struct sk_buff *skb;
3020
3021 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3022 if (!skb)
3023 return -ENOMEM;
3024
3025 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
3026 cmd->vdev_id = __cpu_to_le32(vdev_id);
3027
3028 ath10k_dbg(ATH10K_DBG_WMI,
3029 "WMI vdev delete id %d\n", vdev_id);
3030
ce42870e 3031 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
5e3dd157
KV		 3032}
3033
3034static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
3035 const struct wmi_vdev_start_request_arg *arg,
ce42870e 3036 u32 cmd_id)
5e3dd157
KV		 3037{
3038 struct wmi_vdev_start_request_cmd *cmd;
3039 struct sk_buff *skb;
3040 const char *cmdname;
3041 u32 flags = 0;
e8a50f8b 3042 u32 ch_flags = 0;
5e3dd157 3043
ce42870e
BM		 3044 if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
3045 cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 3046 return -EINVAL;
3047 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
3048 return -EINVAL;
3049 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
3050 return -EINVAL;
3051 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
3052 return -EINVAL;
3053
ce42870e 3054 if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
5e3dd157 3055 cmdname = "start";
ce42870e 3056 else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 3057 cmdname = "restart";
3058 else
3059 return -EINVAL; /* should not happen, we already check cmd_id */
3060
3061 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3062 if (!skb)
3063 return -ENOMEM;
3064
3065 if (arg->hidden_ssid)
3066 flags |= WMI_VDEV_START_HIDDEN_SSID;
3067 if (arg->pmf_enabled)
3068 flags |= WMI_VDEV_START_PMF_ENABLED;
e8a50f8b
MP		 3069 if (arg->channel.chan_radar)
3070 ch_flags |= WMI_CHAN_FLAG_DFS;
5e3dd157
KV		 3071
3072 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
3073 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3074 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
3075 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
3076 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
3077 cmd->flags = __cpu_to_le32(flags);
3078 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
3079 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
3080
3081 if (arg->ssid) {
3082 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
3083 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
3084 }
3085
3086 cmd->chan.mhz = __cpu_to_le32(arg->channel.freq);
3087
3088 cmd->chan.band_center_freq1 =
3089 __cpu_to_le32(arg->channel.band_center_freq1);
3090
3091 cmd->chan.mode = arg->channel.mode;
e8a50f8b 3092 cmd->chan.flags |= __cpu_to_le32(ch_flags);
5e3dd157
KV		 3093 cmd->chan.min_power = arg->channel.min_power;
3094 cmd->chan.max_power = arg->channel.max_power;
3095 cmd->chan.reg_power = arg->channel.max_reg_power;
3096 cmd->chan.reg_classid = arg->channel.reg_class_id;
3097 cmd->chan.antenna_max = arg->channel.max_antenna_gain;
3098
3099 ath10k_dbg(ATH10K_DBG_WMI,
e8a50f8b
MP		 3100 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, "
3101 "ch_flags: 0x%0X, max_power: %d\n", cmdname, arg->vdev_id,
3102 flags, arg->channel.freq, arg->channel.mode,
3103 cmd->chan.flags, arg->channel.max_power);
5e3dd157
KV		 3104
3105 return ath10k_wmi_cmd_send(ar, skb, cmd_id);
3106}
3107
3108int ath10k_wmi_vdev_start(struct ath10k *ar,
3109 const struct wmi_vdev_start_request_arg *arg)
3110{
ce42870e
BM		 3111 u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
3112
3113 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3114}
3115
3116int ath10k_wmi_vdev_restart(struct ath10k *ar,
3117 const struct wmi_vdev_start_request_arg *arg)
3118{
ce42870e
BM		 3119 u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
3120
3121 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3122}
3123
3124int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
3125{
3126 struct wmi_vdev_stop_cmd *cmd;
3127 struct sk_buff *skb;
3128
3129 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3130 if (!skb)
3131 return -ENOMEM;
3132
3133 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
3134 cmd->vdev_id = __cpu_to_le32(vdev_id);
3135
3136 ath10k_dbg(ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
3137
ce42870e 3138 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
5e3dd157
KV		 3139}
3140
3141int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
3142{
3143 struct wmi_vdev_up_cmd *cmd;
3144 struct sk_buff *skb;
3145
3146 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3147 if (!skb)
3148 return -ENOMEM;
3149
3150 cmd = (struct wmi_vdev_up_cmd *)skb->data;
3151 cmd->vdev_id = __cpu_to_le32(vdev_id);
3152 cmd->vdev_assoc_id = __cpu_to_le32(aid);
7b4371ea 3153 memcpy(&cmd->vdev_bssid.addr, bssid, ETH_ALEN);
5e3dd157
KV		 3154
3155 ath10k_dbg(ATH10K_DBG_WMI,
3156 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
3157 vdev_id, aid, bssid);
3158
ce42870e 3159 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
5e3dd157
KV		 3160}
3161
3162int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
3163{
3164 struct wmi_vdev_down_cmd *cmd;
3165 struct sk_buff *skb;
3166
3167 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3168 if (!skb)
3169 return -ENOMEM;
3170
3171 cmd = (struct wmi_vdev_down_cmd *)skb->data;
3172 cmd->vdev_id = __cpu_to_le32(vdev_id);
3173
3174 ath10k_dbg(ATH10K_DBG_WMI,
3175 "wmi mgmt vdev down id 0x%x\n", vdev_id);
3176
ce42870e 3177 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
5e3dd157
KV		 3178}
3179
3180int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
6d1506e7 3181 u32 param_id, u32 param_value)
5e3dd157
KV		 3182{
3183 struct wmi_vdev_set_param_cmd *cmd;
3184 struct sk_buff *skb;
3185
6d1506e7
BM		 3186 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
3187 ath10k_dbg(ATH10K_DBG_WMI,
3188 "vdev param %d not supported by firmware\n",
3189 param_id);
ebc9abdd 3190 return -EOPNOTSUPP;
6d1506e7
BM		 3191 }
3192
5e3dd157
KV		 3193 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3194 if (!skb)
3195 return -ENOMEM;
3196
3197 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
3198 cmd->vdev_id = __cpu_to_le32(vdev_id);
3199 cmd->param_id = __cpu_to_le32(param_id);
3200 cmd->param_value = __cpu_to_le32(param_value);
3201
3202 ath10k_dbg(ATH10K_DBG_WMI,
3203 "wmi vdev id 0x%x set param %d value %d\n",
3204 vdev_id, param_id, param_value);
3205
ce42870e 3206 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
5e3dd157
KV		 3207}
3208
3209int ath10k_wmi_vdev_install_key(struct ath10k *ar,
3210 const struct wmi_vdev_install_key_arg *arg)
3211{
3212 struct wmi_vdev_install_key_cmd *cmd;
3213 struct sk_buff *skb;
3214
3215 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
3216 return -EINVAL;
3217 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
3218 return -EINVAL;
3219
3220 skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->key_len);
3221 if (!skb)
3222 return -ENOMEM;
3223
3224 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
3225 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3226 cmd->key_idx = __cpu_to_le32(arg->key_idx);
3227 cmd->key_flags = __cpu_to_le32(arg->key_flags);
3228 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
3229 cmd->key_len = __cpu_to_le32(arg->key_len);
3230 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
3231 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
3232
3233 if (arg->macaddr)
3234 memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN);
3235 if (arg->key_data)
3236 memcpy(cmd->key_data, arg->key_data, arg->key_len);
3237
e0c508ab
MK		 3238 ath10k_dbg(ATH10K_DBG_WMI,
3239 "wmi vdev install key idx %d cipher %d len %d\n",
3240 arg->key_idx, arg->key_cipher, arg->key_len);
ce42870e
BM		 3241 return ath10k_wmi_cmd_send(ar, skb,
3242 ar->wmi.cmd->vdev_install_key_cmdid);
5e3dd157
KV		 3243}
3244
3245int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
3246 const u8 peer_addr[ETH_ALEN])
3247{
3248 struct wmi_peer_create_cmd *cmd;
3249 struct sk_buff *skb;
3250
3251 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3252 if (!skb)
3253 return -ENOMEM;
3254
3255 cmd = (struct wmi_peer_create_cmd *)skb->data;
3256 cmd->vdev_id = __cpu_to_le32(vdev_id);
3257 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3258
3259 ath10k_dbg(ATH10K_DBG_WMI,
3260 "wmi peer create vdev_id %d peer_addr %pM\n",
3261 vdev_id, peer_addr);
ce42870e 3262 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
5e3dd157
KV		 3263}
3264
3265int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
3266 const u8 peer_addr[ETH_ALEN])
3267{
3268 struct wmi_peer_delete_cmd *cmd;
3269 struct sk_buff *skb;
3270
3271 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3272 if (!skb)
3273 return -ENOMEM;
3274
3275 cmd = (struct wmi_peer_delete_cmd *)skb->data;
3276 cmd->vdev_id = __cpu_to_le32(vdev_id);
3277 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3278
3279 ath10k_dbg(ATH10K_DBG_WMI,
3280 "wmi peer delete vdev_id %d peer_addr %pM\n",
3281 vdev_id, peer_addr);
ce42870e 3282 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
5e3dd157
KV		 3283}
3284
3285int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
3286 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
3287{
3288 struct wmi_peer_flush_tids_cmd *cmd;
3289 struct sk_buff *skb;
3290
3291 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3292 if (!skb)
3293 return -ENOMEM;
3294
3295 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
3296 cmd->vdev_id = __cpu_to_le32(vdev_id);
3297 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
3298 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3299
3300 ath10k_dbg(ATH10K_DBG_WMI,
3301 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
3302 vdev_id, peer_addr, tid_bitmap);
ce42870e 3303 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
5e3dd157
KV		 3304}
3305
3306int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
3307 const u8 *peer_addr, enum wmi_peer_param param_id,
3308 u32 param_value)
3309{
3310 struct wmi_peer_set_param_cmd *cmd;
3311 struct sk_buff *skb;
3312
3313 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3314 if (!skb)
3315 return -ENOMEM;
3316
3317 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
3318 cmd->vdev_id = __cpu_to_le32(vdev_id);
3319 cmd->param_id = __cpu_to_le32(param_id);
3320 cmd->param_value = __cpu_to_le32(param_value);
d458cdf7 3321 memcpy(&cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
5e3dd157
KV		 3322
3323 ath10k_dbg(ATH10K_DBG_WMI,
3324 "wmi vdev %d peer 0x%pM set param %d value %d\n",
3325 vdev_id, peer_addr, param_id, param_value);
3326
ce42870e 3327 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
5e3dd157
KV		 3328}
3329
3330int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
3331 enum wmi_sta_ps_mode psmode)
3332{
3333 struct wmi_sta_powersave_mode_cmd *cmd;
3334 struct sk_buff *skb;
3335
3336 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3337 if (!skb)
3338 return -ENOMEM;
3339
3340 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
3341 cmd->vdev_id = __cpu_to_le32(vdev_id);
3342 cmd->sta_ps_mode = __cpu_to_le32(psmode);
3343
3344 ath10k_dbg(ATH10K_DBG_WMI,
3345 "wmi set powersave id 0x%x mode %d\n",
3346 vdev_id, psmode);
3347
ce42870e
BM		 3348 return ath10k_wmi_cmd_send(ar, skb,
3349 ar->wmi.cmd->sta_powersave_mode_cmdid);
5e3dd157
KV		 3350}
3351
3352int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
3353 enum wmi_sta_powersave_param param_id,
3354 u32 value)
3355{
3356 struct wmi_sta_powersave_param_cmd *cmd;
3357 struct sk_buff *skb;
3358
3359 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3360 if (!skb)
3361 return -ENOMEM;
3362
3363 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
3364 cmd->vdev_id = __cpu_to_le32(vdev_id);
3365 cmd->param_id = __cpu_to_le32(param_id);
3366 cmd->param_value = __cpu_to_le32(value);
3367
3368 ath10k_dbg(ATH10K_DBG_WMI,
3369 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
3370 vdev_id, param_id, value);
ce42870e
BM		 3371 return ath10k_wmi_cmd_send(ar, skb,
3372 ar->wmi.cmd->sta_powersave_param_cmdid);
5e3dd157
KV		 3373}
3374
3375int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
3376 enum wmi_ap_ps_peer_param param_id, u32 value)
3377{
3378 struct wmi_ap_ps_peer_cmd *cmd;
3379 struct sk_buff *skb;
3380
3381 if (!mac)
3382 return -EINVAL;
3383
3384 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3385 if (!skb)
3386 return -ENOMEM;
3387
3388 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
3389 cmd->vdev_id = __cpu_to_le32(vdev_id);
3390 cmd->param_id = __cpu_to_le32(param_id);
3391 cmd->param_value = __cpu_to_le32(value);
3392 memcpy(&cmd->peer_macaddr, mac, ETH_ALEN);
3393
3394 ath10k_dbg(ATH10K_DBG_WMI,
3395 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
3396 vdev_id, param_id, value, mac);
3397
ce42870e
BM		 3398 return ath10k_wmi_cmd_send(ar, skb,
3399 ar->wmi.cmd->ap_ps_peer_param_cmdid);
5e3dd157
KV		 3400}
3401
3402int ath10k_wmi_scan_chan_list(struct ath10k *ar,
3403 const struct wmi_scan_chan_list_arg *arg)
3404{
3405 struct wmi_scan_chan_list_cmd *cmd;
3406 struct sk_buff *skb;
3407 struct wmi_channel_arg *ch;
3408 struct wmi_channel *ci;
3409 int len;
3410 int i;
3411
3412 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
3413
3414 skb = ath10k_wmi_alloc_skb(len);
3415 if (!skb)
3416 return -EINVAL;
3417
3418 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
3419 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
3420
3421 for (i = 0; i < arg->n_channels; i++) {
3422 u32 flags = 0;
3423
3424 ch = &arg->channels[i];
3425 ci = &cmd->chan_info[i];
3426
3427 if (ch->passive)
3428 flags |= WMI_CHAN_FLAG_PASSIVE;
3429 if (ch->allow_ibss)
3430 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
3431 if (ch->allow_ht)
3432 flags |= WMI_CHAN_FLAG_ALLOW_HT;
3433 if (ch->allow_vht)
3434 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
3435 if (ch->ht40plus)
3436 flags |= WMI_CHAN_FLAG_HT40_PLUS;
e8a50f8b
MP		 3437 if (ch->chan_radar)
3438 flags |= WMI_CHAN_FLAG_DFS;
5e3dd157
KV		 3439
3440 ci->mhz = __cpu_to_le32(ch->freq);
3441 ci->band_center_freq1 = __cpu_to_le32(ch->freq);
3442 ci->band_center_freq2 = 0;
3443 ci->min_power = ch->min_power;
3444 ci->max_power = ch->max_power;
3445 ci->reg_power = ch->max_reg_power;
3446 ci->antenna_max = ch->max_antenna_gain;
5e3dd157
KV		 3447
3448 /* mode & flags share storage */
3449 ci->mode = ch->mode;
3450 ci->flags |= __cpu_to_le32(flags);
3451 }
3452
ce42870e 3453 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
5e3dd157
KV		 3454}
3455
3456int ath10k_wmi_peer_assoc(struct ath10k *ar,
3457 const struct wmi_peer_assoc_complete_arg *arg)
3458{
3459 struct wmi_peer_assoc_complete_cmd *cmd;
3460 struct sk_buff *skb;
3461
3462 if (arg->peer_mpdu_density > 16)
3463 return -EINVAL;
3464 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
3465 return -EINVAL;
3466 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
3467 return -EINVAL;
3468
3469 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3470 if (!skb)
3471 return -ENOMEM;
3472
3473 cmd = (struct wmi_peer_assoc_complete_cmd *)skb->data;
3474 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3475 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
3476 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
3477 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
3478 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
3479 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
3480 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
3481 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
3482 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
3483 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
3484 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
3485 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
3486 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
3487
3488 memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN);
3489
3490 cmd->peer_legacy_rates.num_rates =
3491 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
3492 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
3493 arg->peer_legacy_rates.num_rates);
3494
3495 cmd->peer_ht_rates.num_rates =
3496 __cpu_to_le32(arg->peer_ht_rates.num_rates);
3497 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
3498 arg->peer_ht_rates.num_rates);
3499
3500 cmd->peer_vht_rates.rx_max_rate =
3501 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
3502 cmd->peer_vht_rates.rx_mcs_set =
3503 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
3504 cmd->peer_vht_rates.tx_max_rate =
3505 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
3506 cmd->peer_vht_rates.tx_mcs_set =
3507 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
3508
e0c508ab 3509 ath10k_dbg(ATH10K_DBG_WMI,
44d6fa90
CYY		 3510 "wmi peer assoc vdev %d addr %pM (%s)\n",
3511 arg->vdev_id, arg->addr,
3512 arg->peer_reassoc ? "reassociate" : "new");
ce42870e 3513 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
5e3dd157
KV		 3514}
3515
748afc47
MK		 3516/* This function assumes the beacon is already DMA mapped */
3517int ath10k_wmi_beacon_send_ref_nowait(struct ath10k_vif *arvif)
5e3dd157 3518{
748afc47 3519 struct wmi_bcn_tx_ref_cmd *cmd;
5e3dd157 3520 struct sk_buff *skb;
748afc47
MK		 3521 struct sk_buff *beacon = arvif->beacon;
3522 struct ath10k *ar = arvif->ar;
3523 struct ieee80211_hdr *hdr;
e2045481 3524 int ret;
748afc47 3525 u16 fc;
5e3dd157 3526
748afc47 3527 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
5e3dd157
KV		 3528 if (!skb)
3529 return -ENOMEM;
3530
748afc47
MK		 3531 hdr = (struct ieee80211_hdr *)beacon->data;
3532 fc = le16_to_cpu(hdr->frame_control);
3533
3534 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
3535 cmd->vdev_id = __cpu_to_le32(arvif->vdev_id);
3536 cmd->data_len = __cpu_to_le32(beacon->len);
3537 cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr);
3538 cmd->msdu_id = 0;
3539 cmd->frame_control = __cpu_to_le32(fc);
3540 cmd->flags = 0;
3541
3542 if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero)
3543 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
3544
3545 if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab)
3546 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
3547
3548 ret = ath10k_wmi_cmd_send_nowait(ar, skb,
3549 ar->wmi.cmd->pdev_send_bcn_cmdid);
5e3dd157 3550
e2045481
MK		 3551 if (ret)
3552 dev_kfree_skb(skb);
3553
3554 return ret;
5e3dd157
KV		 3555}
3556
3557static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
3558 const struct wmi_wmm_params_arg *arg)
3559{
3560 params->cwmin = __cpu_to_le32(arg->cwmin);
3561 params->cwmax = __cpu_to_le32(arg->cwmax);
3562 params->aifs = __cpu_to_le32(arg->aifs);
3563 params->txop = __cpu_to_le32(arg->txop);
3564 params->acm = __cpu_to_le32(arg->acm);
3565 params->no_ack = __cpu_to_le32(arg->no_ack);
3566}
3567
3568int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
3569 const struct wmi_pdev_set_wmm_params_arg *arg)
3570{
3571 struct wmi_pdev_set_wmm_params *cmd;
3572 struct sk_buff *skb;
3573
3574 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3575 if (!skb)
3576 return -ENOMEM;
3577
3578 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
3579 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
3580 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
3581 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
3582 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
3583
3584 ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
ce42870e
BM		 3585 return ath10k_wmi_cmd_send(ar, skb,
3586 ar->wmi.cmd->pdev_set_wmm_params_cmdid);
5e3dd157
KV		 3587}
3588
3589int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
3590{
3591 struct wmi_request_stats_cmd *cmd;
3592 struct sk_buff *skb;
3593
3594 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3595 if (!skb)
3596 return -ENOMEM;
3597
3598 cmd = (struct wmi_request_stats_cmd *)skb->data;
3599 cmd->stats_id = __cpu_to_le32(stats_id);
3600
3601 ath10k_dbg(ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
ce42870e 3602 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
5e3dd157 3603}
9cfbce75
MK		 3604
3605int ath10k_wmi_force_fw_hang(struct ath10k *ar,
3606 enum wmi_force_fw_hang_type type, u32 delay_ms)
3607{
3608 struct wmi_force_fw_hang_cmd *cmd;
3609 struct sk_buff *skb;
3610
3611 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3612 if (!skb)
3613 return -ENOMEM;
3614
3615 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
3616 cmd->type = __cpu_to_le32(type);
3617 cmd->delay_ms = __cpu_to_le32(delay_ms);
3618
3619 ath10k_dbg(ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
3620 type, delay_ms);
ce42870e 3621 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
9cfbce75 3622}
f118a3e5
KV		 3623
3624int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable)
3625{
3626 struct wmi_dbglog_cfg_cmd *cmd;
3627 struct sk_buff *skb;
3628 u32 cfg;
3629
3630 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3631 if (!skb)
3632 return -ENOMEM;
3633
3634 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
3635
3636 if (module_enable) {
3637 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
3638 ATH10K_DBGLOG_CFG_LOG_LVL);
3639 } else {
3640 /* set back defaults, all modules with WARN level */
3641 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
3642 ATH10K_DBGLOG_CFG_LOG_LVL);
3643 module_enable = ~0;
3644 }
3645
3646 cmd->module_enable = __cpu_to_le32(module_enable);
3647 cmd->module_valid = __cpu_to_le32(~0);
3648 cmd->config_enable = __cpu_to_le32(cfg);
3649 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
3650
3651 ath10k_dbg(ATH10K_DBG_WMI,
3652 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
3653 __le32_to_cpu(cmd->module_enable),
3654 __le32_to_cpu(cmd->module_valid),
3655 __le32_to_cpu(cmd->config_enable),
3656 __le32_to_cpu(cmd->config_valid));
3657
3658 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid);
3659}
Linux kernel - Deliverables
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