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Merge ath-next from ath.git
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
5e3dd157
KV		 20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
ca996ec5 25#include "wmi-tlv.h"
5e3dd157 26#include "mac.h"
43d2a30f 27#include "testmode.h"
d7579d12 28#include "wmi-ops.h"
6a94888f 29#include "p2p.h"
587f7031 30#include "hw.h"
5e3dd157 31
ce42870e
BM		 32/* MAIN WMI cmd track */
33static struct wmi_cmd_map wmi_cmd_map = {
34 .init_cmdid = WMI_INIT_CMDID,
35 .start_scan_cmdid = WMI_START_SCAN_CMDID,
36 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
37 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
38 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
39 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
40 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
41 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
42 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
43 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
44 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
45 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
46 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
47 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
48 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
49 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
50 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
51 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
52 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
53 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
54 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
55 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
56 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
57 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
58 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
59 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
60 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
61 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
62 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
63 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
64 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
65 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
66 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
67 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
68 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
69 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
70 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
71 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
72 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
73 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
74 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
75 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
76 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
77 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
78 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
79 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
80 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
81 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
82 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
83 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
84 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
85 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
86 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
87 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
88 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
89 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
90 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
91 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
92 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
93 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
94 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
95 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
96 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
97 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
98 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
99 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
100 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
101 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
102 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
103 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
104 .wlan_profile_set_hist_intvl_cmdid =
105 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
106 .wlan_profile_get_profile_data_cmdid =
107 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
108 .wlan_profile_enable_profile_id_cmdid =
109 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
110 .wlan_profile_list_profile_id_cmdid =
111 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
112 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
113 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
114 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
115 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
116 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
117 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
118 .wow_enable_disable_wake_event_cmdid =
119 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
120 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
121 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
122 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
123 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
124 .vdev_spectral_scan_configure_cmdid =
125 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
126 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
127 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
128 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
129 .network_list_offload_config_cmdid =
130 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
131 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
132 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
133 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
134 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
135 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
136 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
137 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
138 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
139 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
140 .echo_cmdid = WMI_ECHO_CMDID,
141 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
142 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
143 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
144 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
145 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
146 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
147 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
148 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
149 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
a57a6a27 150 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 151 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
772b4aee
RM		 152 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
153 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
154 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
155 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
156 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
157 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
158 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
159 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
160 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
161 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
162 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
163 .nan_cmdid = WMI_CMD_UNSUPPORTED,
164 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
165 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
166 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
167 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
168 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
169 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
170 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
171 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
172 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
173 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
174 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
175 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
176 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
177 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
178 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
179 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
180 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
181 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
182 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
183 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
184 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
185 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
186 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
187 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
188 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
189 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
190 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
191 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
192 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
193 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
ce42870e
BM		 194};
195
b7e3adf9
BM		 196/* 10.X WMI cmd track */
197static struct wmi_cmd_map wmi_10x_cmd_map = {
198 .init_cmdid = WMI_10X_INIT_CMDID,
199 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
200 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
201 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 202 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 203 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
204 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
205 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
206 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
207 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
208 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
209 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
210 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
211 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
212 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
213 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
214 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
215 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
216 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
217 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
218 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
219 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
220 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
221 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
222 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
223 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
224 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
225 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
226 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
227 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
228 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
229 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
230 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
231 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
232 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
233 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
234 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 235 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 236 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
237 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
238 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 239 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 240 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
241 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
242 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
243 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
244 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
245 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
246 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
247 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
248 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
249 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
250 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
251 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
252 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
253 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
254 .roam_scan_rssi_change_threshold =
255 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
256 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
257 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
258 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
259 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
260 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
261 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
262 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
263 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 264 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 265 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 266 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 267 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
268 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
269 .wlan_profile_set_hist_intvl_cmdid =
270 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
271 .wlan_profile_get_profile_data_cmdid =
272 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
273 .wlan_profile_enable_profile_id_cmdid =
274 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
275 .wlan_profile_list_profile_id_cmdid =
276 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
277 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
278 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
279 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
280 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
281 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
282 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
283 .wow_enable_disable_wake_event_cmdid =
284 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
285 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
286 .wow_hostwakeup_from_sleep_cmdid =
287 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
288 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
289 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
290 .vdev_spectral_scan_configure_cmdid =
291 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
292 .vdev_spectral_scan_enable_cmdid =
293 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
294 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
34957b25
BM		 295 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
296 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
297 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
298 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
299 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
300 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
301 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
302 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
303 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
304 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
305 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 306 .echo_cmdid = WMI_10X_ECHO_CMDID,
307 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
308 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
309 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
34957b25
BM		 310 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
311 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
312 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
313 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 314 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
315 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
a57a6a27 316 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 317 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
772b4aee
RM		 318 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
319 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
320 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
321 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
322 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
323 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
324 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
325 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
326 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
327 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
328 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
329 .nan_cmdid = WMI_CMD_UNSUPPORTED,
330 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
331 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
332 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
333 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
334 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
335 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
336 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
337 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
338 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
339 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
340 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
341 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
342 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
343 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
344 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
345 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
346 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
347 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
348 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
349 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
350 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
351 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
352 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
353 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
354 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
355 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
356 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
357 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
358 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
359 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9 360};
ce42870e 361
4a16fbec
RM		 362/* 10.2.4 WMI cmd track */
363static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
364 .init_cmdid = WMI_10_2_INIT_CMDID,
365 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
366 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
367 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
368 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
369 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
370 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
371 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
372 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
373 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
374 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
375 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
376 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
377 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
378 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
379 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
380 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
381 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
382 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
383 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
384 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
385 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
386 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
387 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
388 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
389 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
390 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
391 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
392 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
393 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
394 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
395 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
396 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
397 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
398 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
399 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
400 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
401 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
402 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
403 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
404 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
405 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
406 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
407 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
408 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
409 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
410 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
411 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
412 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
413 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
414 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
415 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
416 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
417 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
418 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
419 .roam_scan_rssi_change_threshold =
420 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
421 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
422 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
423 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
424 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
425 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
426 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
427 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
428 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
429 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
430 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
431 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
432 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
433 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
434 .wlan_profile_set_hist_intvl_cmdid =
435 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
436 .wlan_profile_get_profile_data_cmdid =
437 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
438 .wlan_profile_enable_profile_id_cmdid =
439 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
440 .wlan_profile_list_profile_id_cmdid =
441 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
442 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
443 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
444 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
445 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
446 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
447 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
448 .wow_enable_disable_wake_event_cmdid =
449 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
450 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
451 .wow_hostwakeup_from_sleep_cmdid =
452 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
453 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
454 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
455 .vdev_spectral_scan_configure_cmdid =
456 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
457 .vdev_spectral_scan_enable_cmdid =
458 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
459 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
460 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
461 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
462 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
463 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
464 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
465 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
466 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
467 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
468 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
469 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
470 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
471 .echo_cmdid = WMI_10_2_ECHO_CMDID,
472 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
473 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
474 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
475 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
476 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
477 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
478 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
479 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
480 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
a57a6a27 481 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
62f77f09 482 .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
772b4aee
RM		 483 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
484 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
485 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
486 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
487 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
488 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
489 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
490 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
491 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
492 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
493 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
494 .nan_cmdid = WMI_CMD_UNSUPPORTED,
495 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
496 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
497 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
498 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
499 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
500 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
501 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
502 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
503 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
504 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
505 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
506 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
507 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
508 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
509 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
510 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
511 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
512 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
513 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
514 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
515 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
516 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
517 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
518 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
519 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
520 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
521 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
522 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
523 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
524 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
4a16fbec
RM		 525};
526
2d491e69
RM		 527/* 10.4 WMI cmd track */
528static struct wmi_cmd_map wmi_10_4_cmd_map = {
529 .init_cmdid = WMI_10_4_INIT_CMDID,
530 .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
531 .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
532 .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
533 .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
534 .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
535 .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
536 .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
537 .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
538 .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
539 .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
540 .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
541 .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
542 .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
543 .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
544 .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
545 .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
546 .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
547 .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
548 .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
549 .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
550 .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
551 .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
552 .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
553 .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
554 .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
555 .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
556 .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
557 .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
558 .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
559 .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
560 .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
561 .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
562 .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
563 .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
564 .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
565 .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
566 .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
567 .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
568 .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
569 .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
570 .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
571 .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
572 .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
573 .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
574 .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
575 .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
576 .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
577 .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
578 .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
579 .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
580 .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
581 .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
582 .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
583 .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
584 .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
585 .roam_scan_rssi_change_threshold =
586 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
587 .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
588 .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
589 .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
590 .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
591 .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
592 .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
593 .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
594 .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
595 .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
596 .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
597 .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
598 .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
599 .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
600 .wlan_profile_set_hist_intvl_cmdid =
601 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
602 .wlan_profile_get_profile_data_cmdid =
603 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
604 .wlan_profile_enable_profile_id_cmdid =
605 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
606 .wlan_profile_list_profile_id_cmdid =
607 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
608 .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
609 .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
610 .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
611 .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
612 .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
613 .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
614 .wow_enable_disable_wake_event_cmdid =
615 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
616 .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
617 .wow_hostwakeup_from_sleep_cmdid =
618 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
619 .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
620 .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
621 .vdev_spectral_scan_configure_cmdid =
622 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
623 .vdev_spectral_scan_enable_cmdid =
624 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
625 .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
626 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
627 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
628 .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
629 .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
630 .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
631 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
632 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
633 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
634 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
635 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
636 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
637 .echo_cmdid = WMI_10_4_ECHO_CMDID,
638 .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
639 .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
640 .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
641 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
642 .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
643 .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
644 .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
645 .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
646 .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
647 .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
648 .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
649 .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED,
650 .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED,
651 .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
652 .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
653 .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
654 .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
655 .wlan_peer_caching_add_peer_cmdid =
656 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
657 .wlan_peer_caching_evict_peer_cmdid =
658 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
659 .wlan_peer_caching_restore_peer_cmdid =
660 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
661 .wlan_peer_caching_print_all_peers_info_cmdid =
662 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
663 .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
664 .peer_add_proxy_sta_entry_cmdid =
665 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
666 .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
667 .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
668 .nan_cmdid = WMI_10_4_NAN_CMDID,
669 .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
670 .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
671 .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
672 .pdev_smart_ant_set_rx_antenna_cmdid =
673 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
674 .peer_smart_ant_set_tx_antenna_cmdid =
675 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
676 .peer_smart_ant_set_train_info_cmdid =
677 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
678 .peer_smart_ant_set_node_config_ops_cmdid =
679 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
680 .pdev_set_antenna_switch_table_cmdid =
681 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
682 .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
683 .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
684 .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
685 .pdev_ratepwr_chainmsk_table_cmdid =
686 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
687 .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
688 .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
689 .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
690 .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
691 .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
692 .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
693 .pdev_get_ani_ofdm_config_cmdid =
694 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
695 .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
696 .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
697 .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
698 .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
699 .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
700 .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
701 .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
702 .vdev_filter_neighbor_rx_packets_cmdid =
703 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
704 .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
705 .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
706 .pdev_bss_chan_info_request_cmdid =
707 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
47771902 708 .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
2d491e69
RM		 709};
710
6d1506e7
BM		 711/* MAIN WMI VDEV param map */
712static struct wmi_vdev_param_map wmi_vdev_param_map = {
713 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
714 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
715 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
716 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
717 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
718 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
719 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
720 .preamble = WMI_VDEV_PARAM_PREAMBLE,
721 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
722 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
723 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
724 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
725 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
726 .wmi_vdev_oc_scheduler_air_time_limit =
727 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
728 .wds = WMI_VDEV_PARAM_WDS,
729 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
730 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
731 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
732 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
733 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
734 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
735 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
736 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
737 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
738 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
739 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
740 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
741 .sgi = WMI_VDEV_PARAM_SGI,
742 .ldpc = WMI_VDEV_PARAM_LDPC,
743 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
744 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
745 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
746 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
747 .nss = WMI_VDEV_PARAM_NSS,
748 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
749 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
750 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
751 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
752 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
753 .ap_keepalive_min_idle_inactive_time_secs =
754 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
755 .ap_keepalive_max_idle_inactive_time_secs =
756 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
757 .ap_keepalive_max_unresponsive_time_secs =
758 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
759 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
760 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
761 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
762 .txbf = WMI_VDEV_PARAM_TXBF,
763 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
764 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
765 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
766 .ap_detect_out_of_sync_sleeping_sta_time_secs =
767 WMI_VDEV_PARAM_UNSUPPORTED,
93841a15
RM		 768 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
769 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
770 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
771 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
772 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
773 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
774 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
775 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
776 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
777 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
778 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
779 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
780 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
781 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
782 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
783 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 784 .set_tsf = WMI_VDEV_PARAM_UNSUPPORTED,
6d1506e7
BM		 785};
786
787/* 10.X WMI VDEV param map */
788static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
789 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
790 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
791 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
792 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
793 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
794 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
795 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
796 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
797 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
798 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
799 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
800 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
801 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
802 .wmi_vdev_oc_scheduler_air_time_limit =
803 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
804 .wds = WMI_10X_VDEV_PARAM_WDS,
805 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
806 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
807 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
808 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
809 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
810 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
811 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
812 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
813 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
814 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
815 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
816 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
817 .sgi = WMI_10X_VDEV_PARAM_SGI,
818 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
819 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
820 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
821 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
822 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
823 .nss = WMI_10X_VDEV_PARAM_NSS,
824 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
825 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
826 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
827 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
828 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
829 .ap_keepalive_min_idle_inactive_time_secs =
830 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
831 .ap_keepalive_max_idle_inactive_time_secs =
832 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
833 .ap_keepalive_max_unresponsive_time_secs =
834 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
835 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
836 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
837 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
838 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
839 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
840 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
841 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
842 .ap_detect_out_of_sync_sleeping_sta_time_secs =
843 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
93841a15
RM		 844 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
845 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
846 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
847 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
848 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
849 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
850 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
851 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
852 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
853 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
854 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
855 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
856 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
857 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
858 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
859 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 860 .set_tsf = WMI_VDEV_PARAM_UNSUPPORTED,
6d1506e7
BM		 861};
862
4a16fbec
RM		 863static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
864 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
865 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
866 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
867 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
868 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
869 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
870 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
871 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
872 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
873 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
874 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
875 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
876 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
877 .wmi_vdev_oc_scheduler_air_time_limit =
878 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
879 .wds = WMI_10X_VDEV_PARAM_WDS,
880 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
881 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
882 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
883 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
884 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
885 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
886 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
887 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
888 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
889 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
890 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
891 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
892 .sgi = WMI_10X_VDEV_PARAM_SGI,
893 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
894 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
895 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
896 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
897 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
898 .nss = WMI_10X_VDEV_PARAM_NSS,
899 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
900 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
901 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
902 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
903 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
904 .ap_keepalive_min_idle_inactive_time_secs =
905 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
906 .ap_keepalive_max_idle_inactive_time_secs =
907 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
908 .ap_keepalive_max_unresponsive_time_secs =
909 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
910 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
911 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
912 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
913 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
914 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
915 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
916 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
917 .ap_detect_out_of_sync_sleeping_sta_time_secs =
918 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
93841a15
RM		 919 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
920 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
921 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
922 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
923 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
924 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
925 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
926 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
927 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
928 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
929 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
930 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
931 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
932 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
933 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
934 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 935 .set_tsf = WMI_10X_VDEV_PARAM_TSF_INCREMENT,
93841a15
RM		 936};
937
938static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
939 .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
940 .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
941 .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
942 .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
943 .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
944 .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
945 .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
946 .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
947 .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
948 .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
949 .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
950 .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
951 .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
952 .wmi_vdev_oc_scheduler_air_time_limit =
953 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
954 .wds = WMI_10_4_VDEV_PARAM_WDS,
955 .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
956 .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
957 .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
958 .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
959 .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
960 .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
961 .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
962 .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
963 .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
964 .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
965 .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
966 .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
967 .sgi = WMI_10_4_VDEV_PARAM_SGI,
968 .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
969 .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
970 .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
971 .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
972 .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
973 .nss = WMI_10_4_VDEV_PARAM_NSS,
974 .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
975 .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
976 .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
977 .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
978 .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
979 .ap_keepalive_min_idle_inactive_time_secs =
980 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
981 .ap_keepalive_max_idle_inactive_time_secs =
982 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
983 .ap_keepalive_max_unresponsive_time_secs =
984 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
985 .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
986 .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
987 .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
988 .txbf = WMI_10_4_VDEV_PARAM_TXBF,
989 .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
990 .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
991 .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
992 .ap_detect_out_of_sync_sleeping_sta_time_secs =
993 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
994 .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
995 .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
996 .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
997 .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
998 .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
999 .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
1000 .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1001 .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1002 .early_rx_bmiss_sample_cycle =
1003 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1004 .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1005 .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1006 .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1007 .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
1008 .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
1009 .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
1010 .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
a606c0ee 1011 .set_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
4a16fbec
RM		 1012};
1013
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BM		 1014static struct wmi_pdev_param_map wmi_pdev_param_map = {
1015 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
1016 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
1017 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
1018 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
1019 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
1020 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
1021 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
1022 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1023 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
1024 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
1025 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1026 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
1027 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
1028 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1029 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
1030 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
1031 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
1032 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
1033 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
1034 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1035 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1036 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
1037 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1038 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
1039 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
1040 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1041 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1042 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1043 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1044 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1045 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1046 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1047 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1048 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
1049 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
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BM		 1050 .dcs = WMI_PDEV_PARAM_DCS,
1051 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
1052 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
1053 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
1054 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
1055 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
1056 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
1057 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
1058 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
1059 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
1060 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1061 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
1062 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
a7bd3e99 1063 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
d86561ff
RM		 1064 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1065 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1066 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1067 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1068 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1069 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1070 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1071 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1072 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1073 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1074 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1075 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1076 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1077 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1078 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1079 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1080 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1081 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1082 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1083 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1084 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1085 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1086 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1087 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1088 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1089 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1090 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1091 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1092 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1093 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1094 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1095 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1096 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1097 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1098 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1099 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1100 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1101 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1102 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1103 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1104 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1105 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
226a339b
BM		 1106};
1107
1108static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
1109 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1110 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1111 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1112 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1113 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1114 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1115 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1116 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1117 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1118 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1119 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1120 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1121 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1122 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1123 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1124 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1125 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1126 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1127 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1128 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1129 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1130 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1131 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1132 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1133 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1134 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1135 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1136 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1137 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1138 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1139 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1140 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1141 .bcnflt_stats_update_period =
1142 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1143 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
ab6258ed 1144 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
226a339b
BM		 1145 .dcs = WMI_10X_PDEV_PARAM_DCS,
1146 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1147 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1148 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1149 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1150 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1151 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1152 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1153 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1154 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1155 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1156 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1157 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
a7bd3e99 1158 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
d86561ff
RM		 1159 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1160 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1161 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1162 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1163 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1164 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1165 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1166 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1167 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1168 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1169 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1170 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1171 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1172 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1173 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1174 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1175 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1176 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1177 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1178 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1179 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1180 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1181 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1182 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1183 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1184 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1185 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1186 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1187 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1188 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1189 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1190 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1191 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1192 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1193 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1194 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1195 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1196 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1197 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1198 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1199 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1200 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
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BM		 1201};
1202
4a16fbec
RM		 1203static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
1204 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1205 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1206 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1207 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1208 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1209 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1210 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1211 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1212 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1213 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1214 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1215 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1216 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1217 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1218 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1219 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1220 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1221 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1222 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1223 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1224 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1225 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1226 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1227 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1228 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1229 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1230 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1231 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1232 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1233 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1234 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1235 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1236 .bcnflt_stats_update_period =
1237 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1238 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1239 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1240 .dcs = WMI_10X_PDEV_PARAM_DCS,
1241 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1242 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1243 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1244 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1245 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1246 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1247 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1248 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1249 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1250 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1251 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1252 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1253 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
d86561ff
RM		 1254 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1255 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1256 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1257 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1258 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1259 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1260 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1261 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1262 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1263 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1264 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1265 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1266 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1267 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1268 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1269 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1270 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1271 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1272 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1273 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1274 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1275 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1276 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1277 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1278 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1279 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1280 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1281 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1282 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1283 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1284 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1285 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1286 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1287 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1288 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1289 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1290 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1291 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1292 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1293 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1294 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1295 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
4a16fbec
RM		 1296};
1297
24c88f78
MK		 1298/* firmware 10.2 specific mappings */
1299static struct wmi_cmd_map wmi_10_2_cmd_map = {
1300 .init_cmdid = WMI_10_2_INIT_CMDID,
1301 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
1302 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
1303 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
1304 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
1305 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1306 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1307 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
1308 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1309 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1310 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1311 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1312 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1313 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1314 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1315 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1316 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1317 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
1318 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
1319 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
1320 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1321 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
1322 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
1323 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
1324 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
1325 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1326 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
1327 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
1328 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1329 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
1330 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
1331 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1332 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1333 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
1334 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
1335 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
1336 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1337 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
1338 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1339 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
1340 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1341 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1342 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
1343 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
1344 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
1345 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
1346 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1347 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1348 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1349 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1350 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1351 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1352 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
1353 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1354 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
1355 .roam_scan_rssi_change_threshold =
1356 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1357 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
1358 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1359 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1360 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
1361 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1362 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1363 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
1364 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1365 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
1366 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1367 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
1368 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1369 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1370 .wlan_profile_set_hist_intvl_cmdid =
1371 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1372 .wlan_profile_get_profile_data_cmdid =
1373 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1374 .wlan_profile_enable_profile_id_cmdid =
1375 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1376 .wlan_profile_list_profile_id_cmdid =
1377 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1378 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
1379 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
1380 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
1381 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
1382 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1383 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1384 .wow_enable_disable_wake_event_cmdid =
1385 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1386 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
1387 .wow_hostwakeup_from_sleep_cmdid =
1388 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1389 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
1390 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
1391 .vdev_spectral_scan_configure_cmdid =
1392 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1393 .vdev_spectral_scan_enable_cmdid =
1394 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1395 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
1396 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
1397 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
1398 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
1399 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
1400 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
1401 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
1402 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
1403 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
1404 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
1405 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
1406 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
1407 .echo_cmdid = WMI_10_2_ECHO_CMDID,
1408 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
1409 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
1410 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
1411 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
1412 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1413 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1414 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
1415 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
1416 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
a57a6a27 1417 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 1418 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
772b4aee
RM		 1419 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
1420 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
1421 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
1422 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
1423 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
1424 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
1425 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
1426 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
1427 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
1428 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1429 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
1430 .nan_cmdid = WMI_CMD_UNSUPPORTED,
1431 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
1432 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
1433 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
1434 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1435 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1436 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
1437 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
1438 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
1439 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
1440 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
1441 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
1442 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
1443 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
1444 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
1445 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
1446 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1447 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1448 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
1449 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
1450 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
24c88f78
MK		 1451};
1452
d86561ff
RM		 1453static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
1454 .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
1455 .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
1456 .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
1457 .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
1458 .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
1459 .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
1460 .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
1461 .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1462 .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
1463 .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
1464 .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1465 .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
1466 .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
1467 .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1468 .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
1469 .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
1470 .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
1471 .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
1472 .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
1473 .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1474 .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1475 .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
1476 .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1477 .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
1478 .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
1479 .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1480 .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
1481 .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1482 .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1483 .pdev_stats_update_period =
1484 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1485 .vdev_stats_update_period =
1486 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1487 .peer_stats_update_period =
1488 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1489 .bcnflt_stats_update_period =
1490 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1491 .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
1492 .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
1493 .dcs = WMI_10_4_PDEV_PARAM_DCS,
1494 .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
1495 .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
1496 .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
1497 .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
1498 .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
1499 .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
1500 .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
1501 .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
1502 .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
1503 .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
1504 .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
1505 .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
1506 .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
1507 .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
1508 .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
1509 .smart_antenna_default_antenna =
1510 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
1511 .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
1512 .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
1513 .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
1514 .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
1515 .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
1516 .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
1517 .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
1518 .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
1519 .remove_mcast2ucast_buffer =
1520 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
1521 .peer_sta_ps_statechg_enable =
1522 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
1523 .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
1524 .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
1525 .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
1526 .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
1527 .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
1528 .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
1529 .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
1530 .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
1531 .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
1532 .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
1533 .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
1534 .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
1535 .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
1536 .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
1537 .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
1538 .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
1539 .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
1540 .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
1541 .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
1542 .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
1543 .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
1544 .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
1545 .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
1546 .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
1547 .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
1548 .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
1549 .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
1550 .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
1551 .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
1552};
1553
3fab30f7
T		 1554static const struct wmi_peer_flags_map wmi_peer_flags_map = {
1555 .auth = WMI_PEER_AUTH,
1556 .qos = WMI_PEER_QOS,
1557 .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
1558 .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
1559 .apsd = WMI_PEER_APSD,
1560 .ht = WMI_PEER_HT,
1561 .bw40 = WMI_PEER_40MHZ,
1562 .stbc = WMI_PEER_STBC,
1563 .ldbc = WMI_PEER_LDPC,
1564 .dyn_mimops = WMI_PEER_DYN_MIMOPS,
1565 .static_mimops = WMI_PEER_STATIC_MIMOPS,
1566 .spatial_mux = WMI_PEER_SPATIAL_MUX,
1567 .vht = WMI_PEER_VHT,
1568 .bw80 = WMI_PEER_80MHZ,
1569 .vht_2g = WMI_PEER_VHT_2G,
1570 .pmf = WMI_PEER_PMF,
1571};
1572
1573static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
1574 .auth = WMI_10X_PEER_AUTH,
1575 .qos = WMI_10X_PEER_QOS,
1576 .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
1577 .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
1578 .apsd = WMI_10X_PEER_APSD,
1579 .ht = WMI_10X_PEER_HT,
1580 .bw40 = WMI_10X_PEER_40MHZ,
1581 .stbc = WMI_10X_PEER_STBC,
1582 .ldbc = WMI_10X_PEER_LDPC,
1583 .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
1584 .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
1585 .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
1586 .vht = WMI_10X_PEER_VHT,
1587 .bw80 = WMI_10X_PEER_80MHZ,
1588};
1589
1590static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
1591 .auth = WMI_10_2_PEER_AUTH,
1592 .qos = WMI_10_2_PEER_QOS,
1593 .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
1594 .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
1595 .apsd = WMI_10_2_PEER_APSD,
1596 .ht = WMI_10_2_PEER_HT,
1597 .bw40 = WMI_10_2_PEER_40MHZ,
1598 .stbc = WMI_10_2_PEER_STBC,
1599 .ldbc = WMI_10_2_PEER_LDPC,
1600 .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
1601 .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
1602 .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
1603 .vht = WMI_10_2_PEER_VHT,
1604 .bw80 = WMI_10_2_PEER_80MHZ,
1605 .vht_2g = WMI_10_2_PEER_VHT_2G,
1606 .pmf = WMI_10_2_PEER_PMF,
1607};
1608
0226d602
MK		 1609void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
1610 const struct wmi_channel_arg *arg)
2d66721c
MK		 1611{
1612 u32 flags = 0;
1613
1614 memset(ch, 0, sizeof(*ch));
1615
1616 if (arg->passive)
1617 flags |= WMI_CHAN_FLAG_PASSIVE;
1618 if (arg->allow_ibss)
1619 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
1620 if (arg->allow_ht)
1621 flags |= WMI_CHAN_FLAG_ALLOW_HT;
1622 if (arg->allow_vht)
1623 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
1624 if (arg->ht40plus)
1625 flags |= WMI_CHAN_FLAG_HT40_PLUS;
1626 if (arg->chan_radar)
1627 flags |= WMI_CHAN_FLAG_DFS;
1628
1629 ch->mhz = __cpu_to_le32(arg->freq);
1630 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
1631 ch->band_center_freq2 = 0;
1632 ch->min_power = arg->min_power;
1633 ch->max_power = arg->max_power;
1634 ch->reg_power = arg->max_reg_power;
1635 ch->antenna_max = arg->max_antenna_gain;
1636
1637 /* mode & flags share storage */
1638 ch->mode = arg->mode;
1639 ch->flags |= __cpu_to_le32(flags);
1640}
1641
5e3dd157
KV		 1642int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
1643{
9eea5689 1644 unsigned long time_left;
af762c0b 1645
9eea5689
NMG		 1646 time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
1647 WMI_SERVICE_READY_TIMEOUT_HZ);
1648 if (!time_left)
1649 return -ETIMEDOUT;
1650 return 0;
5e3dd157
KV		 1651}
1652
1653int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
1654{
9eea5689 1655 unsigned long time_left;
af762c0b 1656
9eea5689
NMG		 1657 time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
1658 WMI_UNIFIED_READY_TIMEOUT_HZ);
1659 if (!time_left)
1660 return -ETIMEDOUT;
1661 return 0;
5e3dd157
KV		 1662}
1663
666a73f3 1664struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
5e3dd157
KV		 1665{
1666 struct sk_buff *skb;
1667 u32 round_len = roundup(len, 4);
1668
7aa7a72a 1669 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
5e3dd157
KV		 1670 if (!skb)
1671 return NULL;
1672
1673 skb_reserve(skb, WMI_SKB_HEADROOM);
1674 if (!IS_ALIGNED((unsigned long)skb->data, 4))
7aa7a72a 1675 ath10k_warn(ar, "Unaligned WMI skb\n");
5e3dd157
KV		 1676
1677 skb_put(skb, round_len);
1678 memset(skb->data, 0, round_len);
1679
1680 return skb;
1681}
1682
1683static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
1684{
1685 dev_kfree_skb(skb);
5e3dd157
KV		 1686}
1687
d7579d12
MK		 1688int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
1689 u32 cmd_id)
5e3dd157
KV		 1690{
1691 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
1692 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 1693 int ret;
5e3dd157
KV		 1694 u32 cmd = 0;
1695
1696 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
1697 return -ENOMEM;
1698
1699 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
1700
1701 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
1702 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
1703
5e3dd157 1704 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943 1705 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
d35a6c18 1706 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
5e3dd157 1707
be8b3943
MK		 1708 if (ret)
1709 goto err_pull;
5e3dd157 1710
be8b3943
MK		 1711 return 0;
1712
1713err_pull:
1714 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
1715 return ret;
1716}
1717
ed54388a
MK		 1718static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
1719{
af21319f 1720 struct ath10k *ar = arvif->ar;
9ad50182 1721 struct ath10k_skb_cb *cb;
af21319f 1722 struct sk_buff *bcn;
66b8a010
MK		 1723 bool dtim_zero;
1724 bool deliver_cab;
ed54388a
MK		 1725 int ret;
1726
af21319f 1727 spin_lock_bh(&ar->data_lock);
ed54388a 1728
af21319f 1729 bcn = arvif->beacon;
ed54388a 1730
af21319f
MK		 1731 if (!bcn)
1732 goto unlock;
ed54388a 1733
9ad50182 1734 cb = ATH10K_SKB_CB(bcn);
ed54388a 1735
af21319f
MK		 1736 switch (arvif->beacon_state) {
1737 case ATH10K_BEACON_SENDING:
1738 case ATH10K_BEACON_SENT:
1739 break;
1740 case ATH10K_BEACON_SCHEDULED:
1741 arvif->beacon_state = ATH10K_BEACON_SENDING;
1742 spin_unlock_bh(&ar->data_lock);
1743
66b8a010
MK		 1744 dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
1745 deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
af21319f
MK		 1746 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
1747 arvif->vdev_id,
1748 bcn->data, bcn->len,
1749 cb->paddr,
66b8a010
MK		 1750 dtim_zero,
1751 deliver_cab);
af21319f
MK		 1752
1753 spin_lock_bh(&ar->data_lock);
1754
1755 if (ret == 0)
1756 arvif->beacon_state = ATH10K_BEACON_SENT;
1757 else
1758 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
1759 }
ed54388a 1760
af21319f
MK		 1761unlock:
1762 spin_unlock_bh(&ar->data_lock);
ed54388a
MK		 1763}
1764
1765static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1766 struct ieee80211_vif *vif)
1767{
1768 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
1769
1770 ath10k_wmi_tx_beacon_nowait(arvif);
1771}
1772
1773static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1774{
ed54388a
MK		 1775 ieee80211_iterate_active_interfaces_atomic(ar->hw,
1776 IEEE80211_IFACE_ITER_NORMAL,
1777 ath10k_wmi_tx_beacons_iter,
1778 NULL);
ed54388a
MK		 1779}
1780
12acbc43 1781static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 1782{
ed54388a
MK		 1783 /* try to send pending beacons first. they take priority */
1784 ath10k_wmi_tx_beacons_nowait(ar);
1785
be8b3943
MK		 1786 wake_up(&ar->wmi.tx_credits_wq);
1787}
1788
666a73f3 1789int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
be8b3943 1790{
34957b25 1791 int ret = -EOPNOTSUPP;
be8b3943 1792
56b84287
KV		 1793 might_sleep();
1794
34957b25 1795 if (cmd_id == WMI_CMD_UNSUPPORTED) {
7aa7a72a 1796 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
55321559
BM		 1797 cmd_id);
1798 return ret;
1799 }
be8b3943
MK		 1800
1801 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK		 1802 /* try to send pending beacons first. they take priority */
1803 ath10k_wmi_tx_beacons_nowait(ar);
1804
be8b3943 1805 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
7962b0d8
MK		 1806
1807 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1808 ret = -ESHUTDOWN;
1809
be8b3943 1810 (ret != -EAGAIN);
14e105cd 1811 }), 3 * HZ);
be8b3943
MK		 1812
1813 if (ret)
5e3dd157 1814 dev_kfree_skb_any(skb);
5e3dd157 1815
be8b3943 1816 return ret;
5e3dd157
KV		 1817}
1818
d7579d12
MK		 1819static struct sk_buff *
1820ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
5e00d31a 1821{
609db229
MK		 1822 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
1823 struct ath10k_vif *arvif = (void *)cb->vif->drv_priv;
5e00d31a
BM		 1824 struct wmi_mgmt_tx_cmd *cmd;
1825 struct ieee80211_hdr *hdr;
d7579d12 1826 struct sk_buff *skb;
5e00d31a 1827 int len;
609db229 1828 u32 vdev_id;
d7579d12 1829 u32 buf_len = msdu->len;
5e00d31a
BM		 1830 u16 fc;
1831
d7579d12 1832 hdr = (struct ieee80211_hdr *)msdu->data;
5e00d31a
BM		 1833 fc = le16_to_cpu(hdr->frame_control);
1834
609db229
MK		 1835 if (cb->vif)
1836 vdev_id = arvif->vdev_id;
1837 else
1838 vdev_id = 0;
1839
5e00d31a 1840 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
d7579d12 1841 return ERR_PTR(-EINVAL);
5e00d31a 1842
d7579d12 1843 len = sizeof(cmd->hdr) + msdu->len;
eeab266c
MK		 1844
1845 if ((ieee80211_is_action(hdr->frame_control) ||
1846 ieee80211_is_deauth(hdr->frame_control) ||
1847 ieee80211_is_disassoc(hdr->frame_control)) &&
1848 ieee80211_has_protected(hdr->frame_control)) {
1849 len += IEEE80211_CCMP_MIC_LEN;
1850 buf_len += IEEE80211_CCMP_MIC_LEN;
1851 }
1852
5e00d31a
BM		 1853 len = round_up(len, 4);
1854
d7579d12
MK		 1855 skb = ath10k_wmi_alloc_skb(ar, len);
1856 if (!skb)
1857 return ERR_PTR(-ENOMEM);
5e00d31a 1858
d7579d12 1859 cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
5e00d31a 1860
609db229 1861 cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
5e00d31a
BM		 1862 cmd->hdr.tx_rate = 0;
1863 cmd->hdr.tx_power = 0;
eeab266c 1864 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
5e00d31a 1865
b25f32cb 1866 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
d7579d12 1867 memcpy(cmd->buf, msdu->data, msdu->len);
5e00d31a 1868
7aa7a72a 1869 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
d7579d12 1870 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
5e00d31a 1871 fc & IEEE80211_FCTL_STYPE);
5ce8e7fd
RM		 1872 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
1873 trace_ath10k_tx_payload(ar, skb->data, skb->len);
5e00d31a 1874
d7579d12 1875 return skb;
5e00d31a
BM		 1876}
1877
5c81c7fd
MK		 1878static void ath10k_wmi_event_scan_started(struct ath10k *ar)
1879{
1880 lockdep_assert_held(&ar->data_lock);
1881
1882 switch (ar->scan.state) {
1883 case ATH10K_SCAN_IDLE:
1884 case ATH10K_SCAN_RUNNING:
1885 case ATH10K_SCAN_ABORTING:
7aa7a72a 1886 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1887 ath10k_scan_state_str(ar->scan.state),
1888 ar->scan.state);
1889 break;
1890 case ATH10K_SCAN_STARTING:
1891 ar->scan.state = ATH10K_SCAN_RUNNING;
1892
1893 if (ar->scan.is_roc)
1894 ieee80211_ready_on_channel(ar->hw);
1895
1896 complete(&ar->scan.started);
1897 break;
1898 }
1899}
1900
2f9eec0b
BG		 1901static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
1902{
1903 lockdep_assert_held(&ar->data_lock);
1904
1905 switch (ar->scan.state) {
1906 case ATH10K_SCAN_IDLE:
1907 case ATH10K_SCAN_RUNNING:
1908 case ATH10K_SCAN_ABORTING:
1909 ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
1910 ath10k_scan_state_str(ar->scan.state),
1911 ar->scan.state);
1912 break;
1913 case ATH10K_SCAN_STARTING:
1914 complete(&ar->scan.started);
1915 __ath10k_scan_finish(ar);
1916 break;
1917 }
1918}
1919
5c81c7fd
MK		 1920static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
1921{
1922 lockdep_assert_held(&ar->data_lock);
1923
1924 switch (ar->scan.state) {
1925 case ATH10K_SCAN_IDLE:
1926 case ATH10K_SCAN_STARTING:
1927 /* One suspected reason scan can be completed while starting is
1928 * if firmware fails to deliver all scan events to the host,
1929 * e.g. when transport pipe is full. This has been observed
1930 * with spectral scan phyerr events starving wmi transport
1931 * pipe. In such case the "scan completed" event should be (and
1932 * is) ignored by the host as it may be just firmware's scan
1933 * state machine recovering.
1934 */
7aa7a72a 1935 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1936 ath10k_scan_state_str(ar->scan.state),
1937 ar->scan.state);
1938 break;
1939 case ATH10K_SCAN_RUNNING:
1940 case ATH10K_SCAN_ABORTING:
1941 __ath10k_scan_finish(ar);
1942 break;
1943 }
1944}
1945
1946static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
1947{
1948 lockdep_assert_held(&ar->data_lock);
1949
1950 switch (ar->scan.state) {
1951 case ATH10K_SCAN_IDLE:
1952 case ATH10K_SCAN_STARTING:
7aa7a72a 1953 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1954 ath10k_scan_state_str(ar->scan.state),
1955 ar->scan.state);
1956 break;
1957 case ATH10K_SCAN_RUNNING:
1958 case ATH10K_SCAN_ABORTING:
1959 ar->scan_channel = NULL;
1960 break;
1961 }
1962}
1963
1964static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
1965{
1966 lockdep_assert_held(&ar->data_lock);
1967
1968 switch (ar->scan.state) {
1969 case ATH10K_SCAN_IDLE:
1970 case ATH10K_SCAN_STARTING:
7aa7a72a 1971 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1972 ath10k_scan_state_str(ar->scan.state),
1973 ar->scan.state);
1974 break;
1975 case ATH10K_SCAN_RUNNING:
1976 case ATH10K_SCAN_ABORTING:
1977 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
1978
1979 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
1980 complete(&ar->scan.on_channel);
1981 break;
1982 }
1983}
1984
9ff8b724
MK		 1985static const char *
1986ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
1987 enum wmi_scan_completion_reason reason)
1988{
1989 switch (type) {
1990 case WMI_SCAN_EVENT_STARTED:
1991 return "started";
1992 case WMI_SCAN_EVENT_COMPLETED:
1993 switch (reason) {
1994 case WMI_SCAN_REASON_COMPLETED:
1995 return "completed";
1996 case WMI_SCAN_REASON_CANCELLED:
1997 return "completed [cancelled]";
1998 case WMI_SCAN_REASON_PREEMPTED:
1999 return "completed [preempted]";
2000 case WMI_SCAN_REASON_TIMEDOUT:
2001 return "completed [timedout]";
b2297baa
RM		 2002 case WMI_SCAN_REASON_INTERNAL_FAILURE:
2003 return "completed [internal err]";
9ff8b724
MK		 2004 case WMI_SCAN_REASON_MAX:
2005 break;
2006 }
2007 return "completed [unknown]";
2008 case WMI_SCAN_EVENT_BSS_CHANNEL:
2009 return "bss channel";
2010 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2011 return "foreign channel";
2012 case WMI_SCAN_EVENT_DEQUEUED:
2013 return "dequeued";
2014 case WMI_SCAN_EVENT_PREEMPTED:
2015 return "preempted";
2016 case WMI_SCAN_EVENT_START_FAILED:
2017 return "start failed";
b2297baa
RM		 2018 case WMI_SCAN_EVENT_RESTARTED:
2019 return "restarted";
2020 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2021 return "foreign channel exit";
9ff8b724
MK		 2022 default:
2023 return "unknown";
2024 }
2025}
2026
d7579d12
MK		 2027static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
2028 struct wmi_scan_ev_arg *arg)
32653cf1
MK		 2029{
2030 struct wmi_scan_event *ev = (void *)skb->data;
2031
2032 if (skb->len < sizeof(*ev))
2033 return -EPROTO;
2034
2035 skb_pull(skb, sizeof(*ev));
2036 arg->event_type = ev->event_type;
2037 arg->reason = ev->reason;
2038 arg->channel_freq = ev->channel_freq;
2039 arg->scan_req_id = ev->scan_req_id;
2040 arg->scan_id = ev->scan_id;
2041 arg->vdev_id = ev->vdev_id;
2042
2043 return 0;
2044}
2045
0226d602 2046int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2047{
32653cf1 2048 struct wmi_scan_ev_arg arg = {};
5e3dd157
KV		 2049 enum wmi_scan_event_type event_type;
2050 enum wmi_scan_completion_reason reason;
2051 u32 freq;
2052 u32 req_id;
2053 u32 scan_id;
2054 u32 vdev_id;
32653cf1 2055 int ret;
5e3dd157 2056
d7579d12 2057 ret = ath10k_wmi_pull_scan(ar, skb, &arg);
32653cf1
MK		 2058 if (ret) {
2059 ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
2060 return ret;
2061 }
2062
2063 event_type = __le32_to_cpu(arg.event_type);
2064 reason = __le32_to_cpu(arg.reason);
2065 freq = __le32_to_cpu(arg.channel_freq);
2066 req_id = __le32_to_cpu(arg.scan_req_id);
2067 scan_id = __le32_to_cpu(arg.scan_id);
2068 vdev_id = __le32_to_cpu(arg.vdev_id);
5e3dd157 2069
5c81c7fd
MK		 2070 spin_lock_bh(&ar->data_lock);
2071
7aa7a72a 2072 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c81c7fd 2073 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
9ff8b724 2074 ath10k_wmi_event_scan_type_str(event_type, reason),
5c81c7fd
MK		 2075 event_type, reason, freq, req_id, scan_id, vdev_id,
2076 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
5e3dd157
KV		 2077
2078 switch (event_type) {
2079 case WMI_SCAN_EVENT_STARTED:
5c81c7fd 2080 ath10k_wmi_event_scan_started(ar);
5e3dd157
KV		 2081 break;
2082 case WMI_SCAN_EVENT_COMPLETED:
5c81c7fd 2083 ath10k_wmi_event_scan_completed(ar);
5e3dd157
KV		 2084 break;
2085 case WMI_SCAN_EVENT_BSS_CHANNEL:
5c81c7fd 2086 ath10k_wmi_event_scan_bss_chan(ar);
5e3dd157
KV		 2087 break;
2088 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
5c81c7fd
MK		 2089 ath10k_wmi_event_scan_foreign_chan(ar, freq);
2090 break;
2091 case WMI_SCAN_EVENT_START_FAILED:
7aa7a72a 2092 ath10k_warn(ar, "received scan start failure event\n");
2f9eec0b 2093 ath10k_wmi_event_scan_start_failed(ar);
5e3dd157
KV		 2094 break;
2095 case WMI_SCAN_EVENT_DEQUEUED:
5e3dd157 2096 case WMI_SCAN_EVENT_PREEMPTED:
b2297baa
RM		 2097 case WMI_SCAN_EVENT_RESTARTED:
2098 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
5e3dd157
KV		 2099 default:
2100 break;
2101 }
2102
2103 spin_unlock_bh(&ar->data_lock);
2104 return 0;
2105}
2106
504f6cdf
SM		 2107/* If keys are configured, HW decrypts all frames
2108 * with protected bit set. Mark such frames as decrypted.
2109 */
2110static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
2111 struct sk_buff *skb,
2112 struct ieee80211_rx_status *status)
2113{
2114 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2115 unsigned int hdrlen;
2116 bool peer_key;
2117 u8 *addr, keyidx;
2118
2119 if (!ieee80211_is_auth(hdr->frame_control) ||
2120 !ieee80211_has_protected(hdr->frame_control))
2121 return;
2122
2123 hdrlen = ieee80211_hdrlen(hdr->frame_control);
2124 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
2125 return;
2126
2127 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
2128 addr = ieee80211_get_SA(hdr);
2129
2130 spin_lock_bh(&ar->data_lock);
2131 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
2132 spin_unlock_bh(&ar->data_lock);
2133
2134 if (peer_key) {
2135 ath10k_dbg(ar, ATH10K_DBG_MAC,
2136 "mac wep key present for peer %pM\n", addr);
2137 status->flag |= RX_FLAG_DECRYPTED;
2138 }
2139}
2140
d7579d12
MK		 2141static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
2142 struct wmi_mgmt_rx_ev_arg *arg)
5e3dd157 2143{
0d9b0438
MK		 2144 struct wmi_mgmt_rx_event_v1 *ev_v1;
2145 struct wmi_mgmt_rx_event_v2 *ev_v2;
2146 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
8d130963 2147 struct wmi_mgmt_rx_ext_info *ext_info;
32653cf1
MK		 2148 size_t pull_len;
2149 u32 msdu_len;
8d130963 2150 u32 len;
32653cf1 2151
c4cdf753
KV		 2152 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
2153 ar->running_fw->fw_file.fw_features)) {
32653cf1
MK		 2154 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
2155 ev_hdr = &ev_v2->hdr.v1;
2156 pull_len = sizeof(*ev_v2);
2157 } else {
2158 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
2159 ev_hdr = &ev_v1->hdr;
2160 pull_len = sizeof(*ev_v1);
2161 }
2162
2163 if (skb->len < pull_len)
2164 return -EPROTO;
2165
2166 skb_pull(skb, pull_len);
2167 arg->channel = ev_hdr->channel;
2168 arg->buf_len = ev_hdr->buf_len;
2169 arg->status = ev_hdr->status;
2170 arg->snr = ev_hdr->snr;
2171 arg->phy_mode = ev_hdr->phy_mode;
2172 arg->rate = ev_hdr->rate;
2173
2174 msdu_len = __le32_to_cpu(arg->buf_len);
2175 if (skb->len < msdu_len)
2176 return -EPROTO;
2177
8d130963
PO		 2178 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2179 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2180 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2181 memcpy(&arg->ext_info, ext_info,
2182 sizeof(struct wmi_mgmt_rx_ext_info));
2183 }
32653cf1
MK		 2184 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
2185 * trailer with credit update. Trim the excess garbage.
2186 */
2187 skb_trim(skb, msdu_len);
2188
2189 return 0;
2190}
2191
1c092961
RM		 2192static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
2193 struct sk_buff *skb,
2194 struct wmi_mgmt_rx_ev_arg *arg)
2195{
2196 struct wmi_10_4_mgmt_rx_event *ev;
2197 struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
2198 size_t pull_len;
2199 u32 msdu_len;
7d5efd08
PO		 2200 struct wmi_mgmt_rx_ext_info *ext_info;
2201 u32 len;
1c092961
RM		 2202
2203 ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
2204 ev_hdr = &ev->hdr;
2205 pull_len = sizeof(*ev);
2206
2207 if (skb->len < pull_len)
2208 return -EPROTO;
2209
2210 skb_pull(skb, pull_len);
2211 arg->channel = ev_hdr->channel;
2212 arg->buf_len = ev_hdr->buf_len;
2213 arg->status = ev_hdr->status;
2214 arg->snr = ev_hdr->snr;
2215 arg->phy_mode = ev_hdr->phy_mode;
2216 arg->rate = ev_hdr->rate;
2217
2218 msdu_len = __le32_to_cpu(arg->buf_len);
2219 if (skb->len < msdu_len)
2220 return -EPROTO;
2221
7d5efd08
PO		 2222 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2223 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2224 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2225 memcpy(&arg->ext_info, ext_info,
2226 sizeof(struct wmi_mgmt_rx_ext_info));
2227 }
2228
1c092961
RM		 2229 /* Make sure bytes added for padding are removed. */
2230 skb_trim(skb, msdu_len);
2231
2232 return 0;
2233}
2234
0226d602 2235int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
32653cf1
MK		 2236{
2237 struct wmi_mgmt_rx_ev_arg arg = {};
5e3dd157
KV		 2238 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
2239 struct ieee80211_hdr *hdr;
01cebe1c 2240 struct ieee80211_supported_band *sband;
5e3dd157
KV		 2241 u32 rx_status;
2242 u32 channel;
2243 u32 phy_mode;
2244 u32 snr;
2245 u32 rate;
2246 u32 buf_len;
2247 u16 fc;
32653cf1 2248 int ret;
0d9b0438 2249
d7579d12 2250 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
32653cf1
MK		 2251 if (ret) {
2252 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
08603f2e 2253 dev_kfree_skb(skb);
32653cf1 2254 return ret;
0d9b0438 2255 }
5e3dd157 2256
32653cf1
MK		 2257 channel = __le32_to_cpu(arg.channel);
2258 buf_len = __le32_to_cpu(arg.buf_len);
2259 rx_status = __le32_to_cpu(arg.status);
2260 snr = __le32_to_cpu(arg.snr);
2261 phy_mode = __le32_to_cpu(arg.phy_mode);
2262 rate = __le32_to_cpu(arg.rate);
5e3dd157
KV		 2263
2264 memset(status, 0, sizeof(*status));
2265
7aa7a72a 2266 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 2267 "event mgmt rx status %08x\n", rx_status);
2268
2c9bcece
MP		 2269 if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
2270 (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
2271 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
d67d0a02
MK		 2272 dev_kfree_skb(skb);
2273 return 0;
2274 }
2275
5e3dd157
KV		 2276 if (rx_status & WMI_RX_STATUS_ERR_MIC)
2277 status->flag |= RX_FLAG_MMIC_ERROR;
2278
8d130963
PO		 2279 if (rx_status & WMI_RX_STATUS_EXT_INFO) {
2280 status->mactime =
2281 __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
2282 status->flag |= RX_FLAG_MACTIME_END;
2283 }
21040bf9 2284 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
453cdb61 2285 * MODE_11B. This means phy_mode is not a reliable source for the band
21040bf9
MK		 2286 * of mgmt rx.
2287 */
2288 if (channel >= 1 && channel <= 14) {
57fbcce3 2289 status->band = NL80211_BAND_2GHZ;
21040bf9 2290 } else if (channel >= 36 && channel <= 165) {
57fbcce3 2291 status->band = NL80211_BAND_5GHZ;
453cdb61 2292 } else {
21040bf9
MK		 2293 /* Shouldn't happen unless list of advertised channels to
2294 * mac80211 has been changed.
2295 */
2296 WARN_ON_ONCE(1);
2297 dev_kfree_skb(skb);
2298 return 0;
453cdb61
MK		 2299 }
2300
57fbcce3 2301 if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
21040bf9
MK		 2302 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
2303
01cebe1c
MK		 2304 sband = &ar->mac.sbands[status->band];
2305
5e3dd157
KV		 2306 status->freq = ieee80211_channel_to_frequency(channel, status->band);
2307 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
01cebe1c 2308 status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
5e3dd157 2309
5e3dd157
KV		 2310 hdr = (struct ieee80211_hdr *)skb->data;
2311 fc = le16_to_cpu(hdr->frame_control);
2312
60549cab
GB		 2313 /* Firmware is guaranteed to report all essential management frames via
2314 * WMI while it can deliver some extra via HTT. Since there can be
2315 * duplicates split the reporting wrt monitor/sniffing.
2316 */
2317 status->flag |= RX_FLAG_SKIP_MONITOR;
2318
504f6cdf
SM		 2319 ath10k_wmi_handle_wep_reauth(ar, skb, status);
2320
2b6a6a90
MK		 2321 /* FW delivers WEP Shared Auth frame with Protected Bit set and
2322 * encrypted payload. However in case of PMF it delivers decrypted
2323 * frames with Protected Bit set. */
2324 if (ieee80211_has_protected(hdr->frame_control) &&
2325 !ieee80211_is_auth(hdr->frame_control)) {
eeab266c
MK		 2326 status->flag |= RX_FLAG_DECRYPTED;
2327
2328 if (!ieee80211_is_action(hdr->frame_control) &&
2329 !ieee80211_is_deauth(hdr->frame_control) &&
2330 !ieee80211_is_disassoc(hdr->frame_control)) {
2331 status->flag |= RX_FLAG_IV_STRIPPED |
2332 RX_FLAG_MMIC_STRIPPED;
2333 hdr->frame_control = __cpu_to_le16(fc &
5e3dd157 2334 ~IEEE80211_FCTL_PROTECTED);
eeab266c 2335 }
5e3dd157
KV		 2336 }
2337
cc9904e6
MK		 2338 if (ieee80211_is_beacon(hdr->frame_control))
2339 ath10k_mac_handle_beacon(ar, skb);
2340
7aa7a72a 2341 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 2342 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
2343 skb, skb->len,
2344 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
2345
7aa7a72a 2346 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 2347 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
2348 status->freq, status->band, status->signal,
2349 status->rate_idx);
2350
5e3dd157
KV		 2351 ieee80211_rx(ar->hw, skb);
2352 return 0;
2353}
2354
2e1dea40
MK		 2355static int freq_to_idx(struct ath10k *ar, int freq)
2356{
2357 struct ieee80211_supported_band *sband;
2358 int band, ch, idx = 0;
2359
57fbcce3 2360 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
2e1dea40
MK		 2361 sband = ar->hw->wiphy->bands[band];
2362 if (!sband)
2363 continue;
2364
2365 for (ch = 0; ch < sband->n_channels; ch++, idx++)
2366 if (sband->channels[ch].center_freq == freq)
2367 goto exit;
2368 }
2369
2370exit:
2371 return idx;
2372}
2373
d7579d12
MK		 2374static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
2375 struct wmi_ch_info_ev_arg *arg)
32653cf1
MK		 2376{
2377 struct wmi_chan_info_event *ev = (void *)skb->data;
2378
2379 if (skb->len < sizeof(*ev))
2380 return -EPROTO;
2381
2382 skb_pull(skb, sizeof(*ev));
2383 arg->err_code = ev->err_code;
2384 arg->freq = ev->freq;
2385 arg->cmd_flags = ev->cmd_flags;
2386 arg->noise_floor = ev->noise_floor;
2387 arg->rx_clear_count = ev->rx_clear_count;
2388 arg->cycle_count = ev->cycle_count;
2389
2390 return 0;
2391}
2392
b2297baa
RM		 2393static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
2394 struct sk_buff *skb,
2395 struct wmi_ch_info_ev_arg *arg)
2396{
2397 struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
2398
2399 if (skb->len < sizeof(*ev))
2400 return -EPROTO;
2401
2402 skb_pull(skb, sizeof(*ev));
2403 arg->err_code = ev->err_code;
2404 arg->freq = ev->freq;
2405 arg->cmd_flags = ev->cmd_flags;
2406 arg->noise_floor = ev->noise_floor;
2407 arg->rx_clear_count = ev->rx_clear_count;
2408 arg->cycle_count = ev->cycle_count;
2409 arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
2410 arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
2411 arg->rx_frame_count = ev->rx_frame_count;
2412
2413 return 0;
2414}
2415
0226d602 2416void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2417{
32653cf1 2418 struct wmi_ch_info_ev_arg arg = {};
2e1dea40
MK		 2419 struct survey_info *survey;
2420 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
32653cf1 2421 int idx, ret;
2e1dea40 2422
d7579d12 2423 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
32653cf1
MK		 2424 if (ret) {
2425 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
2426 return;
2427 }
2e1dea40 2428
32653cf1
MK		 2429 err_code = __le32_to_cpu(arg.err_code);
2430 freq = __le32_to_cpu(arg.freq);
2431 cmd_flags = __le32_to_cpu(arg.cmd_flags);
2432 noise_floor = __le32_to_cpu(arg.noise_floor);
2433 rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
2434 cycle_count = __le32_to_cpu(arg.cycle_count);
2e1dea40 2435
7aa7a72a 2436 ath10k_dbg(ar, ATH10K_DBG_WMI,
2e1dea40
MK		 2437 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
2438 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
2439 cycle_count);
2440
2441 spin_lock_bh(&ar->data_lock);
2442
5c81c7fd
MK		 2443 switch (ar->scan.state) {
2444 case ATH10K_SCAN_IDLE:
2445 case ATH10K_SCAN_STARTING:
7aa7a72a 2446 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
2e1dea40 2447 goto exit;
5c81c7fd
MK		 2448 case ATH10K_SCAN_RUNNING:
2449 case ATH10K_SCAN_ABORTING:
2450 break;
2e1dea40
MK		 2451 }
2452
2453 idx = freq_to_idx(ar, freq);
2454 if (idx >= ARRAY_SIZE(ar->survey)) {
7aa7a72a 2455 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2e1dea40
MK		 2456 freq, idx);
2457 goto exit;
2458 }
2459
2460 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
44b7d483
MK		 2461 if (ar->ch_info_can_report_survey) {
2462 survey = &ar->survey[idx];
2463 survey->noise = noise_floor;
2464 survey->filled = SURVEY_INFO_NOISE_DBM;
2465
2466 ath10k_hw_fill_survey_time(ar,
2467 survey,
2468 cycle_count,
2469 rx_clear_count,
2470 ar->survey_last_cycle_count,
2471 ar->survey_last_rx_clear_count);
2472 }
2473
2474 ar->ch_info_can_report_survey = false;
2475 } else {
2476 ar->ch_info_can_report_survey = true;
2e1dea40
MK		 2477 }
2478
3d2a2e29
VT		 2479 if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
2480 ar->survey_last_rx_clear_count = rx_clear_count;
2481 ar->survey_last_cycle_count = cycle_count;
2482 }
2e1dea40
MK		 2483
2484exit:
2485 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 2486}
2487
0226d602 2488void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2489{
7aa7a72a 2490 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
5e3dd157
KV		 2491}
2492
0226d602 2493int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2494{
7aa7a72a 2495 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
869526b9
KV		 2496 skb->len);
2497
d35a6c18 2498 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
869526b9
KV		 2499
2500 return 0;
5e3dd157
KV		 2501}
2502
b91251fb
MK		 2503void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
2504 struct ath10k_fw_stats_pdev *dst)
d15fb520 2505{
d15fb520
MK		 2506 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
2507 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
2508 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
2509 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
2510 dst->cycle_count = __le32_to_cpu(src->cycle_count);
2511 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
2512 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
b91251fb 2513}
d15fb520 2514
b91251fb
MK		 2515void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
2516 struct ath10k_fw_stats_pdev *dst)
2517{
2518 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2519 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2520 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2521 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2522 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2523 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2524 dst->local_freed = __le32_to_cpu(src->local_freed);
2525 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2526 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2527 dst->underrun = __le32_to_cpu(src->underrun);
2528 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2529 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2530 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2531 dst->data_rc = __le32_to_cpu(src->data_rc);
2532 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2533 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2534 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2535 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2536 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2537 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2538 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2539 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2540}
d15fb520 2541
98dd2b92
MP		 2542static void
2543ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
2544 struct ath10k_fw_stats_pdev *dst)
2545{
2546 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2547 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2548 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2549 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2550 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2551 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2552 dst->local_freed = __le32_to_cpu(src->local_freed);
2553 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2554 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2555 dst->underrun = __le32_to_cpu(src->underrun);
2556 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2557 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2558 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2559 dst->data_rc = __le32_to_cpu(src->data_rc);
2560 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2561 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2562 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2563 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2564 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2565 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2566 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2567 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2568 dst->hw_paused = __le32_to_cpu(src->hw_paused);
2569 dst->seq_posted = __le32_to_cpu(src->seq_posted);
2570 dst->seq_failed_queueing =
2571 __le32_to_cpu(src->seq_failed_queueing);
2572 dst->seq_completed = __le32_to_cpu(src->seq_completed);
2573 dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
2574 dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
2575 dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
2576 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2577 dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
2578 dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
2579 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2580 dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
2581}
2582
b91251fb
MK		 2583void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
2584 struct ath10k_fw_stats_pdev *dst)
2585{
2586 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
2587 dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
2588 dst->r0_frags = __le32_to_cpu(src->r0_frags);
2589 dst->r1_frags = __le32_to_cpu(src->r1_frags);
2590 dst->r2_frags = __le32_to_cpu(src->r2_frags);
2591 dst->r3_frags = __le32_to_cpu(src->r3_frags);
2592 dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
2593 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
2594 dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
2595 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
2596 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
2597 dst->phy_errs = __le32_to_cpu(src->phy_errs);
2598 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
2599 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
2600}
2601
2602void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
2603 struct ath10k_fw_stats_pdev *dst)
2604{
2605 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
2606 dst->rts_bad = __le32_to_cpu(src->rts_bad);
2607 dst->rts_good = __le32_to_cpu(src->rts_good);
2608 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
2609 dst->no_beacons = __le32_to_cpu(src->no_beacons);
2610 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
d15fb520
MK		 2611}
2612
0226d602
MK		 2613void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
2614 struct ath10k_fw_stats_peer *dst)
d15fb520
MK		 2615{
2616 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2617 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2618 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2619}
2620
f9575793
MSS		 2621static void
2622ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
2623 struct ath10k_fw_stats_peer *dst)
2624{
2625 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2626 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2627 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2628 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2629}
2630
d7579d12
MK		 2631static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
2632 struct sk_buff *skb,
2633 struct ath10k_fw_stats *stats)
d15fb520
MK		 2634{
2635 const struct wmi_stats_event *ev = (void *)skb->data;
2636 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
2637 int i;
2638
2639 if (!skb_pull(skb, sizeof(*ev)))
2640 return -EPROTO;
2641
2642 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2643 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2644 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2645
5326849a 2646 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 2647 const struct wmi_pdev_stats *src;
5326849a 2648 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK		 2649
2650 src = (void *)skb->data;
2651 if (!skb_pull(skb, sizeof(*src)))
2652 return -EPROTO;
2653
5326849a
MK		 2654 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2655 if (!dst)
2656 continue;
2657
b91251fb
MK		 2658 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2659 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2660 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2661
5326849a 2662 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK		 2663 }
2664
2665 /* fw doesn't implement vdev stats */
2666
2667 for (i = 0; i < num_peer_stats; i++) {
2668 const struct wmi_peer_stats *src;
5326849a 2669 struct ath10k_fw_stats_peer *dst;
d15fb520
MK		 2670
2671 src = (void *)skb->data;
2672 if (!skb_pull(skb, sizeof(*src)))
2673 return -EPROTO;
2674
5326849a
MK		 2675 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2676 if (!dst)
2677 continue;
2678
2679 ath10k_wmi_pull_peer_stats(src, dst);
2680 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK		 2681 }
2682
2683 return 0;
2684}
2685
d7579d12
MK		 2686static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
2687 struct sk_buff *skb,
2688 struct ath10k_fw_stats *stats)
d15fb520
MK		 2689{
2690 const struct wmi_stats_event *ev = (void *)skb->data;
2691 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
2692 int i;
2693
2694 if (!skb_pull(skb, sizeof(*ev)))
2695 return -EPROTO;
2696
2697 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2698 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2699 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2700
5326849a 2701 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 2702 const struct wmi_10x_pdev_stats *src;
5326849a 2703 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK		 2704
2705 src = (void *)skb->data;
2706 if (!skb_pull(skb, sizeof(*src)))
2707 return -EPROTO;
2708
5326849a
MK		 2709 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2710 if (!dst)
2711 continue;
2712
b91251fb
MK		 2713 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2714 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2715 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2716 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
d15fb520 2717
5326849a 2718 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK		 2719 }
2720
2721 /* fw doesn't implement vdev stats */
2722
2723 for (i = 0; i < num_peer_stats; i++) {
2724 const struct wmi_10x_peer_stats *src;
5326849a 2725 struct ath10k_fw_stats_peer *dst;
d15fb520
MK		 2726
2727 src = (void *)skb->data;
2728 if (!skb_pull(skb, sizeof(*src)))
2729 return -EPROTO;
2730
5326849a
MK		 2731 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2732 if (!dst)
2733 continue;
2734
2735 ath10k_wmi_pull_peer_stats(&src->old, dst);
2736
2737 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
d15fb520 2738
5326849a 2739 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK		 2740 }
2741
2742 return 0;
2743}
2744
20de2229
MK		 2745static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
2746 struct sk_buff *skb,
2747 struct ath10k_fw_stats *stats)
2748{
2749 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2750 u32 num_pdev_stats;
2751 u32 num_pdev_ext_stats;
2752 u32 num_vdev_stats;
2753 u32 num_peer_stats;
2754 int i;
2755
2756 if (!skb_pull(skb, sizeof(*ev)))
2757 return -EPROTO;
2758
2759 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2760 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2761 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2762 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2763
2764 for (i = 0; i < num_pdev_stats; i++) {
2765 const struct wmi_10_2_pdev_stats *src;
2766 struct ath10k_fw_stats_pdev *dst;
2767
2768 src = (void *)skb->data;
2769 if (!skb_pull(skb, sizeof(*src)))
2770 return -EPROTO;
2771
2772 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2773 if (!dst)
2774 continue;
2775
2776 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2777 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2778 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2779 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2780 /* FIXME: expose 10.2 specific values */
2781
2782 list_add_tail(&dst->list, &stats->pdevs);
2783 }
2784
2785 for (i = 0; i < num_pdev_ext_stats; i++) {
2786 const struct wmi_10_2_pdev_ext_stats *src;
2787
2788 src = (void *)skb->data;
2789 if (!skb_pull(skb, sizeof(*src)))
2790 return -EPROTO;
2791
2792 /* FIXME: expose values to userspace
2793 *
2794 * Note: Even though this loop seems to do nothing it is
2795 * required to parse following sub-structures properly.
2796 */
2797 }
2798
2799 /* fw doesn't implement vdev stats */
2800
2801 for (i = 0; i < num_peer_stats; i++) {
2802 const struct wmi_10_2_peer_stats *src;
2803 struct ath10k_fw_stats_peer *dst;
2804
2805 src = (void *)skb->data;
2806 if (!skb_pull(skb, sizeof(*src)))
2807 return -EPROTO;
2808
2809 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2810 if (!dst)
2811 continue;
2812
2813 ath10k_wmi_pull_peer_stats(&src->old, dst);
2814
2815 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2816 /* FIXME: expose 10.2 specific values */
2817
2818 list_add_tail(&dst->list, &stats->peers);
2819 }
2820
2821 return 0;
2822}
2823
2824static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
2825 struct sk_buff *skb,
2826 struct ath10k_fw_stats *stats)
2827{
2828 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2829 u32 num_pdev_stats;
2830 u32 num_pdev_ext_stats;
2831 u32 num_vdev_stats;
2832 u32 num_peer_stats;
2833 int i;
2834
2835 if (!skb_pull(skb, sizeof(*ev)))
2836 return -EPROTO;
2837
2838 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2839 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2840 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2841 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2842
2843 for (i = 0; i < num_pdev_stats; i++) {
2844 const struct wmi_10_2_pdev_stats *src;
2845 struct ath10k_fw_stats_pdev *dst;
2846
2847 src = (void *)skb->data;
2848 if (!skb_pull(skb, sizeof(*src)))
2849 return -EPROTO;
2850
2851 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2852 if (!dst)
2853 continue;
2854
2855 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2856 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2857 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2858 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2859 /* FIXME: expose 10.2 specific values */
2860
2861 list_add_tail(&dst->list, &stats->pdevs);
2862 }
2863
2864 for (i = 0; i < num_pdev_ext_stats; i++) {
2865 const struct wmi_10_2_pdev_ext_stats *src;
2866
2867 src = (void *)skb->data;
2868 if (!skb_pull(skb, sizeof(*src)))
2869 return -EPROTO;
2870
2871 /* FIXME: expose values to userspace
2872 *
2873 * Note: Even though this loop seems to do nothing it is
2874 * required to parse following sub-structures properly.
2875 */
2876 }
2877
2878 /* fw doesn't implement vdev stats */
2879
2880 for (i = 0; i < num_peer_stats; i++) {
de46c015 2881 const struct wmi_10_2_4_ext_peer_stats *src;
20de2229 2882 struct ath10k_fw_stats_peer *dst;
de46c015 2883 int stats_len;
de46c015 2884
cc61a1bb 2885 if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
de46c015
MSS		 2886 stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
2887 else
2888 stats_len = sizeof(struct wmi_10_2_4_peer_stats);
20de2229
MK		 2889
2890 src = (void *)skb->data;
de46c015 2891 if (!skb_pull(skb, stats_len))
20de2229
MK		 2892 return -EPROTO;
2893
2894 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2895 if (!dst)
2896 continue;
2897
2898 ath10k_wmi_pull_peer_stats(&src->common.old, dst);
2899
2900 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
de46c015 2901
cc61a1bb 2902 if (ath10k_peer_stats_enabled(ar))
de46c015 2903 dst->rx_duration = __le32_to_cpu(src->rx_duration);
20de2229
MK		 2904 /* FIXME: expose 10.2 specific values */
2905
2906 list_add_tail(&dst->list, &stats->peers);
2907 }
2908
2909 return 0;
2910}
2911
98dd2b92
MP		 2912static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
2913 struct sk_buff *skb,
2914 struct ath10k_fw_stats *stats)
2915{
2916 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2917 u32 num_pdev_stats;
2918 u32 num_pdev_ext_stats;
2919 u32 num_vdev_stats;
2920 u32 num_peer_stats;
f9575793 2921 u32 stats_id;
98dd2b92
MP		 2922 int i;
2923
2924 if (!skb_pull(skb, sizeof(*ev)))
2925 return -EPROTO;
2926
2927 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2928 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2929 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2930 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
f9575793 2931 stats_id = __le32_to_cpu(ev->stats_id);
98dd2b92
MP		 2932
2933 for (i = 0; i < num_pdev_stats; i++) {
2934 const struct wmi_10_4_pdev_stats *src;
2935 struct ath10k_fw_stats_pdev *dst;
2936
2937 src = (void *)skb->data;
2938 if (!skb_pull(skb, sizeof(*src)))
2939 return -EPROTO;
2940
2941 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2942 if (!dst)
2943 continue;
2944
2945 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2946 ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
2947 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2948 dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
2949 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2950
2951 list_add_tail(&dst->list, &stats->pdevs);
2952 }
2953
2954 for (i = 0; i < num_pdev_ext_stats; i++) {
2955 const struct wmi_10_2_pdev_ext_stats *src;
2956
2957 src = (void *)skb->data;
2958 if (!skb_pull(skb, sizeof(*src)))
2959 return -EPROTO;
2960
2961 /* FIXME: expose values to userspace
2962 *
2963 * Note: Even though this loop seems to do nothing it is
2964 * required to parse following sub-structures properly.
2965 */
2966 }
2967
2968 /* fw doesn't implement vdev stats */
2969
2970 for (i = 0; i < num_peer_stats; i++) {
f9575793 2971 const struct wmi_10_4_peer_extd_stats *src;
98dd2b92 2972 struct ath10k_fw_stats_peer *dst;
f9575793
MSS		 2973 int stats_len;
2974 bool extd_peer_stats = !!(stats_id & WMI_10_4_STAT_PEER_EXTD);
2975
2976 if (extd_peer_stats)
2977 stats_len = sizeof(struct wmi_10_4_peer_extd_stats);
2978 else
2979 stats_len = sizeof(struct wmi_10_4_peer_stats);
98dd2b92
MP		 2980
2981 src = (void *)skb->data;
f9575793 2982 if (!skb_pull(skb, stats_len))
98dd2b92
MP		 2983 return -EPROTO;
2984
2985 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2986 if (!dst)
2987 continue;
2988
f9575793 2989 ath10k_wmi_10_4_pull_peer_stats(&src->common, dst);
98dd2b92 2990 /* FIXME: expose 10.4 specific values */
f9575793
MSS		 2991 if (extd_peer_stats)
2992 dst->rx_duration = __le32_to_cpu(src->rx_duration);
98dd2b92
MP		 2993
2994 list_add_tail(&dst->list, &stats->peers);
2995 }
2996
2997 return 0;
2998}
2999
0226d602 3000void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3001{
7aa7a72a 3002 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
60ef401a 3003 ath10k_debug_fw_stats_process(ar, skb);
5e3dd157
KV		 3004}
3005
d7579d12
MK		 3006static int
3007ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
3008 struct wmi_vdev_start_ev_arg *arg)
32653cf1
MK		 3009{
3010 struct wmi_vdev_start_response_event *ev = (void *)skb->data;
3011
3012 if (skb->len < sizeof(*ev))
3013 return -EPROTO;
3014
3015 skb_pull(skb, sizeof(*ev));
3016 arg->vdev_id = ev->vdev_id;
3017 arg->req_id = ev->req_id;
3018 arg->resp_type = ev->resp_type;
3019 arg->status = ev->status;
3020
3021 return 0;
3022}
3023
0226d602 3024void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3025{
32653cf1
MK		 3026 struct wmi_vdev_start_ev_arg arg = {};
3027 int ret;
5e3dd157 3028
7aa7a72a 3029 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
5e3dd157 3030
d7579d12 3031 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
32653cf1
MK		 3032 if (ret) {
3033 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
3034 return;
3035 }
5e3dd157 3036
32653cf1 3037 if (WARN_ON(__le32_to_cpu(arg.status)))
5e3dd157
KV		 3038 return;
3039
3040 complete(&ar->vdev_setup_done);
3041}
3042
0226d602 3043void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3044{
7aa7a72a 3045 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
5e3dd157
KV		 3046 complete(&ar->vdev_setup_done);
3047}
3048
d7579d12
MK		 3049static int
3050ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
3051 struct wmi_peer_kick_ev_arg *arg)
32653cf1
MK		 3052{
3053 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
3054
3055 if (skb->len < sizeof(*ev))
3056 return -EPROTO;
3057
3058 skb_pull(skb, sizeof(*ev));
3059 arg->mac_addr = ev->peer_macaddr.addr;
3060
3061 return 0;
3062}
3063
0226d602 3064void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3065{
32653cf1 3066 struct wmi_peer_kick_ev_arg arg = {};
5a13e76e 3067 struct ieee80211_sta *sta;
32653cf1 3068 int ret;
5a13e76e 3069
d7579d12 3070 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
32653cf1
MK		 3071 if (ret) {
3072 ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
3073 ret);
3074 return;
3075 }
5a13e76e 3076
7aa7a72a 3077 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
32653cf1 3078 arg.mac_addr);
5a13e76e
KV		 3079
3080 rcu_read_lock();
3081
32653cf1 3082 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
5a13e76e 3083 if (!sta) {
7aa7a72a 3084 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
32653cf1 3085 arg.mac_addr);
5a13e76e
KV		 3086 goto exit;
3087 }
3088
3089 ieee80211_report_low_ack(sta, 10);
3090
3091exit:
3092 rcu_read_unlock();
5e3dd157
KV		 3093}
3094
3095/*
3096 * FIXME
3097 *
3098 * We don't report to mac80211 sleep state of connected
3099 * stations. Due to this mac80211 can't fill in TIM IE
3100 * correctly.
3101 *
3102 * I know of no way of getting nullfunc frames that contain
3103 * sleep transition from connected stations - these do not
3104 * seem to be sent from the target to the host. There also
3105 * doesn't seem to be a dedicated event for that. So the
3106 * only way left to do this would be to read tim_bitmap
3107 * during SWBA.
3108 *
3109 * We could probably try using tim_bitmap from SWBA to tell
3110 * mac80211 which stations are asleep and which are not. The
3111 * problem here is calling mac80211 functions so many times
3112 * could take too long and make us miss the time to submit
3113 * the beacon to the target.
3114 *
3115 * So as a workaround we try to extend the TIM IE if there
3116 * is unicast buffered for stations with aid > 7 and fill it
3117 * in ourselves.
3118 */
3119static void ath10k_wmi_update_tim(struct ath10k *ar,
3120 struct ath10k_vif *arvif,
3121 struct sk_buff *bcn,
a03fee34 3122 const struct wmi_tim_info_arg *tim_info)
5e3dd157
KV		 3123{
3124 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
3125 struct ieee80211_tim_ie *tim;
3126 u8 *ies, *ie;
3127 u8 ie_len, pvm_len;
af762c0b 3128 __le32 t;
a03fee34
RM		 3129 u32 v, tim_len;
3130
3131 /* When FW reports 0 in tim_len, ensure atleast first byte
3132 * in tim_bitmap is considered for pvm calculation.
3133 */
3134 tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
5e3dd157
KV		 3135
3136 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
3137 * we must copy the bitmap upon change and reuse it later */
32653cf1 3138 if (__le32_to_cpu(tim_info->tim_changed)) {
5e3dd157
KV		 3139 int i;
3140
a03fee34
RM		 3141 if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
3142 ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
3143 tim_len, sizeof(arvif->u.ap.tim_bitmap));
3144 tim_len = sizeof(arvif->u.ap.tim_bitmap);
3145 }
5e3dd157 3146
a03fee34 3147 for (i = 0; i < tim_len; i++) {
32653cf1 3148 t = tim_info->tim_bitmap[i / 4];
af762c0b 3149 v = __le32_to_cpu(t);
5e3dd157
KV		 3150 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
3151 }
3152
a03fee34
RM		 3153 /* FW reports either length 0 or length based on max supported
3154 * station. so we calculate this on our own
3155 */
5e3dd157 3156 arvif->u.ap.tim_len = 0;
a03fee34 3157 for (i = 0; i < tim_len; i++)
5e3dd157
KV		 3158 if (arvif->u.ap.tim_bitmap[i])
3159 arvif->u.ap.tim_len = i;
3160
3161 arvif->u.ap.tim_len++;
3162 }
3163
3164 ies = bcn->data;
3165 ies += ieee80211_hdrlen(hdr->frame_control);
3166 ies += 12; /* fixed parameters */
3167
3168 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
3169 (u8 *)skb_tail_pointer(bcn) - ies);
3170 if (!ie) {
09af8f85 3171 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
7aa7a72a 3172 ath10k_warn(ar, "no tim ie found;\n");
5e3dd157
KV		 3173 return;
3174 }
3175
3176 tim = (void *)ie + 2;
3177 ie_len = ie[1];
3178 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
3179
3180 if (pvm_len < arvif->u.ap.tim_len) {
a03fee34 3181 int expand_size = tim_len - pvm_len;
5e3dd157
KV		 3182 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
3183 void *next_ie = ie + 2 + ie_len;
3184
3185 if (skb_put(bcn, expand_size)) {
3186 memmove(next_ie + expand_size, next_ie, move_size);
3187
3188 ie[1] += expand_size;
3189 ie_len += expand_size;
3190 pvm_len += expand_size;
3191 } else {
7aa7a72a 3192 ath10k_warn(ar, "tim expansion failed\n");
5e3dd157
KV		 3193 }
3194 }
3195
a03fee34 3196 if (pvm_len > tim_len) {
7aa7a72a 3197 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
5e3dd157
KV		 3198 return;
3199 }
3200
32653cf1 3201 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
5e3dd157
KV		 3202 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
3203
748afc47 3204 if (tim->dtim_count == 0) {
66b8a010 3205 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
748afc47 3206
32653cf1 3207 if (__le32_to_cpu(tim_info->tim_mcast) == 1)
66b8a010 3208 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
748afc47
MK		 3209 }
3210
7aa7a72a 3211 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
5e3dd157
KV		 3212 tim->dtim_count, tim->dtim_period,
3213 tim->bitmap_ctrl, pvm_len);
3214}
3215
5e3dd157
KV		 3216static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
3217 struct sk_buff *bcn,
32653cf1 3218 const struct wmi_p2p_noa_info *noa)
5e3dd157 3219{
08c27be1 3220 if (!arvif->vif->p2p)
5e3dd157
KV		 3221 return;
3222
7aa7a72a 3223 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
5e3dd157 3224
6a94888f
MK		 3225 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
3226 ath10k_p2p_noa_update(arvif, noa);
5e3dd157
KV		 3227
3228 if (arvif->u.ap.noa_data)
3229 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
3230 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
3231 arvif->u.ap.noa_data,
3232 arvif->u.ap.noa_len);
5e3dd157
KV		 3233}
3234
d7579d12
MK		 3235static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
3236 struct wmi_swba_ev_arg *arg)
32653cf1
MK		 3237{
3238 struct wmi_host_swba_event *ev = (void *)skb->data;
3239 u32 map;
3240 size_t i;
3241
3242 if (skb->len < sizeof(*ev))
3243 return -EPROTO;
3244
3245 skb_pull(skb, sizeof(*ev));
3246 arg->vdev_map = ev->vdev_map;
3247
3248 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3249 if (!(map & BIT(0)))
3250 continue;
3251
3252 /* If this happens there were some changes in firmware and
3253 * ath10k should update the max size of tim_info array.
3254 */
3255 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3256 break;
3257
a03fee34
RM		 3258 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3259 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3260 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3261 return -EPROTO;
3262 }
3263
3264 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3265 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3266 arg->tim_info[i].tim_bitmap =
3267 ev->bcn_info[i].tim_info.tim_bitmap;
3268 arg->tim_info[i].tim_changed =
3269 ev->bcn_info[i].tim_info.tim_changed;
3270 arg->tim_info[i].tim_num_ps_pending =
3271 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3272
32653cf1
MK		 3273 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
3274 i++;
3275 }
3276
3277 return 0;
3278}
3279
8b019fb0
YL		 3280static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
3281 struct sk_buff *skb,
3282 struct wmi_swba_ev_arg *arg)
3283{
3284 struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
3285 u32 map;
3286 size_t i;
3287
3288 if (skb->len < sizeof(*ev))
3289 return -EPROTO;
3290
3291 skb_pull(skb, sizeof(*ev));
3292 arg->vdev_map = ev->vdev_map;
3293
3294 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3295 if (!(map & BIT(0)))
3296 continue;
3297
3298 /* If this happens there were some changes in firmware and
3299 * ath10k should update the max size of tim_info array.
3300 */
3301 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3302 break;
3303
3304 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3305 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3306 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3307 return -EPROTO;
3308 }
3309
3310 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3311 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3312 arg->tim_info[i].tim_bitmap =
3313 ev->bcn_info[i].tim_info.tim_bitmap;
3314 arg->tim_info[i].tim_changed =
3315 ev->bcn_info[i].tim_info.tim_changed;
3316 arg->tim_info[i].tim_num_ps_pending =
3317 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3318 i++;
3319 }
3320
3321 return 0;
3322}
3323
3cec3be3
RM		 3324static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
3325 struct sk_buff *skb,
3326 struct wmi_swba_ev_arg *arg)
3327{
3328 struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
3329 u32 map, tim_len;
3330 size_t i;
3331
3332 if (skb->len < sizeof(*ev))
3333 return -EPROTO;
3334
3335 skb_pull(skb, sizeof(*ev));
3336 arg->vdev_map = ev->vdev_map;
3337
3338 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3339 if (!(map & BIT(0)))
3340 continue;
3341
3342 /* If this happens there were some changes in firmware and
3343 * ath10k should update the max size of tim_info array.
3344 */
3345 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3346 break;
3347
3348 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3349 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3350 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3351 return -EPROTO;
3352 }
3353
3354 tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
3355 if (tim_len) {
3356 /* Exclude 4 byte guard length */
3357 tim_len -= 4;
3358 arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
3359 } else {
3360 arg->tim_info[i].tim_len = 0;
3361 }
3362
3363 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3364 arg->tim_info[i].tim_bitmap =
3365 ev->bcn_info[i].tim_info.tim_bitmap;
3366 arg->tim_info[i].tim_changed =
3367 ev->bcn_info[i].tim_info.tim_changed;
3368 arg->tim_info[i].tim_num_ps_pending =
3369 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3370
3371 /* 10.4 firmware doesn't have p2p support. notice of absence
3372 * info can be ignored for now.
3373 */
3374
3375 i++;
3376 }
3377
3378 return 0;
3379}
3380
08e75ea8
VN		 3381static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
3382{
3383 return WMI_TXBF_CONF_BEFORE_ASSOC;
3384}
3385
0226d602 3386void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3387{
32653cf1 3388 struct wmi_swba_ev_arg arg = {};
5e3dd157
KV		 3389 u32 map;
3390 int i = -1;
a03fee34 3391 const struct wmi_tim_info_arg *tim_info;
32653cf1 3392 const struct wmi_p2p_noa_info *noa_info;
5e3dd157 3393 struct ath10k_vif *arvif;
5e3dd157 3394 struct sk_buff *bcn;
64badcb6 3395 dma_addr_t paddr;
767d34fc 3396 int ret, vdev_id = 0;
5e3dd157 3397
d7579d12 3398 ret = ath10k_wmi_pull_swba(ar, skb, &arg);
32653cf1
MK		 3399 if (ret) {
3400 ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
3401 return;
3402 }
3403
3404 map = __le32_to_cpu(arg.vdev_map);
5e3dd157 3405
7aa7a72a 3406 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
32653cf1 3407 map);
5e3dd157
KV		 3408
3409 for (; map; map >>= 1, vdev_id++) {
3410 if (!(map & 0x1))
3411 continue;
3412
3413 i++;
3414
3415 if (i >= WMI_MAX_AP_VDEV) {
7aa7a72a 3416 ath10k_warn(ar, "swba has corrupted vdev map\n");
5e3dd157
KV		 3417 break;
3418 }
3419
a03fee34 3420 tim_info = &arg.tim_info[i];
32653cf1 3421 noa_info = arg.noa_info[i];
5e3dd157 3422
7aa7a72a 3423 ath10k_dbg(ar, ATH10K_DBG_MGMT,
7a8a396b 3424 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
5e3dd157 3425 i,
32653cf1
MK		 3426 __le32_to_cpu(tim_info->tim_len),
3427 __le32_to_cpu(tim_info->tim_mcast),
3428 __le32_to_cpu(tim_info->tim_changed),
3429 __le32_to_cpu(tim_info->tim_num_ps_pending),
3430 __le32_to_cpu(tim_info->tim_bitmap[3]),
3431 __le32_to_cpu(tim_info->tim_bitmap[2]),
3432 __le32_to_cpu(tim_info->tim_bitmap[1]),
3433 __le32_to_cpu(tim_info->tim_bitmap[0]));
5e3dd157 3434
a03fee34
RM		 3435 /* TODO: Only first 4 word from tim_bitmap is dumped.
3436 * Extend debug code to dump full tim_bitmap.
3437 */
3438
5e3dd157
KV		 3439 arvif = ath10k_get_arvif(ar, vdev_id);
3440 if (arvif == NULL) {
7aa7a72a
MK		 3441 ath10k_warn(ar, "no vif for vdev_id %d found\n",
3442 vdev_id);
5e3dd157
KV		 3443 continue;
3444 }
3445
c2df44b3
MK		 3446 /* There are no completions for beacons so wait for next SWBA
3447 * before telling mac80211 to decrement CSA counter
3448 *
3449 * Once CSA counter is completed stop sending beacons until
3450 * actual channel switch is done */
3451 if (arvif->vif->csa_active &&
3452 ieee80211_csa_is_complete(arvif->vif)) {
3453 ieee80211_csa_finish(arvif->vif);
3454 continue;
3455 }
3456
5e3dd157
KV		 3457 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
3458 if (!bcn) {
7aa7a72a 3459 ath10k_warn(ar, "could not get mac80211 beacon\n");
5e3dd157
KV		 3460 continue;
3461 }
3462
4b604558 3463 ath10k_tx_h_seq_no(arvif->vif, bcn);
32653cf1
MK		 3464 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
3465 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
5e3dd157 3466
ed54388a 3467 spin_lock_bh(&ar->data_lock);
748afc47 3468
ed54388a 3469 if (arvif->beacon) {
af21319f
MK		 3470 switch (arvif->beacon_state) {
3471 case ATH10K_BEACON_SENT:
3472 break;
3473 case ATH10K_BEACON_SCHEDULED:
3474 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
3475 arvif->vdev_id);
3476 break;
3477 case ATH10K_BEACON_SENDING:
3478 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
748afc47 3479 arvif->vdev_id);
af21319f
MK		 3480 dev_kfree_skb(bcn);
3481 goto skip;
3482 }
748afc47 3483
64badcb6 3484 ath10k_mac_vif_beacon_free(arvif);
ed54388a 3485 }
5e3dd157 3486
64badcb6
MK		 3487 if (!arvif->beacon_buf) {
3488 paddr = dma_map_single(arvif->ar->dev, bcn->data,
3489 bcn->len, DMA_TO_DEVICE);
3490 ret = dma_mapping_error(arvif->ar->dev, paddr);
3491 if (ret) {
3492 ath10k_warn(ar, "failed to map beacon: %d\n",
3493 ret);
3494 dev_kfree_skb_any(bcn);
5e55e3cb 3495 ret = -EIO;
64badcb6
MK		 3496 goto skip;
3497 }
3498
3499 ATH10K_SKB_CB(bcn)->paddr = paddr;
3500 } else {
3501 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
3502 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
3503 bcn->len, IEEE80211_MAX_FRAME_LEN);
3504 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
3505 }
3506 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
3507 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
767d34fc 3508 }
748afc47 3509
ed54388a 3510 arvif->beacon = bcn;
af21319f 3511 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
5e3dd157 3512
5ce8e7fd
RM		 3513 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
3514 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
3515
767d34fc 3516skip:
ed54388a 3517 spin_unlock_bh(&ar->data_lock);
5e3dd157 3518 }
af21319f
MK		 3519
3520 ath10k_wmi_tx_beacons_nowait(ar);
5e3dd157
KV		 3521}
3522
0226d602 3523void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3524{
7aa7a72a 3525 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
5e3dd157
KV		 3526}
3527
9702c686 3528static void ath10k_dfs_radar_report(struct ath10k *ar,
991adf71 3529 struct wmi_phyerr_ev_arg *phyerr,
2332d0ae 3530 const struct phyerr_radar_report *rr,
9702c686
JD		 3531 u64 tsf)
3532{
3533 u32 reg0, reg1, tsf32l;
500ff9f9 3534 struct ieee80211_channel *ch;
9702c686
JD		 3535 struct pulse_event pe;
3536 u64 tsf64;
3537 u8 rssi, width;
3538
3539 reg0 = __le32_to_cpu(rr->reg0);
3540 reg1 = __le32_to_cpu(rr->reg1);
3541
7aa7a72a 3542 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3543 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
3544 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
3545 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
3546 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
3547 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
7aa7a72a 3548 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3549 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
3550 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
3551 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
3552 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
3553 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
3554 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
7aa7a72a 3555 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3556 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
3557 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
3558 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
3559
3560 if (!ar->dfs_detector)
3561 return;
3562
500ff9f9
MK		 3563 spin_lock_bh(&ar->data_lock);
3564 ch = ar->rx_channel;
3565 spin_unlock_bh(&ar->data_lock);
3566
3567 if (!ch) {
3568 ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
3569 goto radar_detected;
3570 }
3571
9702c686 3572 /* report event to DFS pattern detector */
991adf71 3573 tsf32l = phyerr->tsf_timestamp;
9702c686
JD		 3574 tsf64 = tsf & (~0xFFFFFFFFULL);
3575 tsf64 |= tsf32l;
3576
3577 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
2332d0ae 3578 rssi = phyerr->rssi_combined;
9702c686
JD		 3579
3580 /* hardware store this as 8 bit signed value,
3581 * set to zero if negative number
3582 */
3583 if (rssi & 0x80)
3584 rssi = 0;
3585
3586 pe.ts = tsf64;
500ff9f9 3587 pe.freq = ch->center_freq;
9702c686
JD		 3588 pe.width = width;
3589 pe.rssi = rssi;
2c3f26a0 3590 pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
7aa7a72a 3591 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3592 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
3593 pe.freq, pe.width, pe.rssi, pe.ts);
3594
3595 ATH10K_DFS_STAT_INC(ar, pulses_detected);
3596
3597 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
7aa7a72a 3598 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3599 "dfs no pulse pattern detected, yet\n");
3600 return;
3601 }
3602
500ff9f9 3603radar_detected:
7aa7a72a 3604 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
9702c686 3605 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP		 3606
3607 /* Control radar events reporting in debugfs file
3608 dfs_block_radar_events */
3609 if (ar->dfs_block_radar_events) {
7aa7a72a 3610 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
7d9b40b4
MP		 3611 return;
3612 }
3613
9702c686
JD		 3614 ieee80211_radar_detected(ar->hw);
3615}
3616
3617static int ath10k_dfs_fft_report(struct ath10k *ar,
991adf71 3618 struct wmi_phyerr_ev_arg *phyerr,
2332d0ae 3619 const struct phyerr_fft_report *fftr,
9702c686
JD		 3620 u64 tsf)
3621{
3622 u32 reg0, reg1;
3623 u8 rssi, peak_mag;
3624
3625 reg0 = __le32_to_cpu(fftr->reg0);
3626 reg1 = __le32_to_cpu(fftr->reg1);
2332d0ae 3627 rssi = phyerr->rssi_combined;
9702c686 3628
7aa7a72a 3629 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3630 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
3631 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
3632 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
3633 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
3634 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
7aa7a72a 3635 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3636 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
3637 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
3638 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
3639 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
3640 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
3641
3642 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
3643
3644 /* false event detection */
3645 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
3646 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
7aa7a72a 3647 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
9702c686
JD		 3648 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
3649 return -EINVAL;
3650 }
3651
3652 return 0;
3653}
3654
0226d602 3655void ath10k_wmi_event_dfs(struct ath10k *ar,
991adf71 3656 struct wmi_phyerr_ev_arg *phyerr,
0226d602 3657 u64 tsf)
9702c686
JD		 3658{
3659 int buf_len, tlv_len, res, i = 0;
2332d0ae
MK		 3660 const struct phyerr_tlv *tlv;
3661 const struct phyerr_radar_report *rr;
3662 const struct phyerr_fft_report *fftr;
3663 const u8 *tlv_buf;
9702c686 3664
991adf71 3665 buf_len = phyerr->buf_len;
7aa7a72a 3666 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686 3667 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
2332d0ae 3668 phyerr->phy_err_code, phyerr->rssi_combined,
991adf71 3669 phyerr->tsf_timestamp, tsf, buf_len);
9702c686
JD		 3670
3671 /* Skip event if DFS disabled */
3672 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
3673 return;
3674
3675 ATH10K_DFS_STAT_INC(ar, pulses_total);
3676
3677 while (i < buf_len) {
3678 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a
MK		 3679 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
3680 i);
9702c686
JD		 3681 return;
3682 }
3683
2332d0ae 3684 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
9702c686 3685 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 3686 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
7aa7a72a 3687 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3688 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
3689 tlv_len, tlv->tag, tlv->sig);
3690
3691 switch (tlv->tag) {
3692 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
3693 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
7aa7a72a 3694 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
9702c686
JD		 3695 i);
3696 return;
3697 }
3698
3699 rr = (struct phyerr_radar_report *)tlv_buf;
2332d0ae 3700 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
9702c686
JD		 3701 break;
3702 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
3703 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
7aa7a72a
MK		 3704 ath10k_warn(ar, "too short fft report (%d)\n",
3705 i);
9702c686
JD		 3706 return;
3707 }
3708
3709 fftr = (struct phyerr_fft_report *)tlv_buf;
2332d0ae 3710 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
9702c686
JD		 3711 if (res)
3712 return;
3713 break;
3714 }
3715
3716 i += sizeof(*tlv) + tlv_len;
3717 }
3718}
3719
0226d602 3720void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
991adf71 3721 struct wmi_phyerr_ev_arg *phyerr,
0226d602 3722 u64 tsf)
9702c686 3723{
855aed12
SW		 3724 int buf_len, tlv_len, res, i = 0;
3725 struct phyerr_tlv *tlv;
2332d0ae
MK		 3726 const void *tlv_buf;
3727 const struct phyerr_fft_report *fftr;
855aed12
SW		 3728 size_t fftr_len;
3729
991adf71 3730 buf_len = phyerr->buf_len;
855aed12
SW		 3731
3732 while (i < buf_len) {
3733 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a 3734 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
855aed12
SW		 3735 i);
3736 return;
3737 }
3738
2332d0ae 3739 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
855aed12 3740 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 3741 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
855aed12
SW		 3742
3743 if (i + sizeof(*tlv) + tlv_len > buf_len) {
7aa7a72a 3744 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
855aed12
SW		 3745 i);
3746 return;
3747 }
3748
3749 switch (tlv->tag) {
3750 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
3751 if (sizeof(*fftr) > tlv_len) {
7aa7a72a 3752 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
855aed12
SW		 3753 i);
3754 return;
3755 }
3756
3757 fftr_len = tlv_len - sizeof(*fftr);
2332d0ae
MK		 3758 fftr = tlv_buf;
3759 res = ath10k_spectral_process_fft(ar, phyerr,
855aed12
SW		 3760 fftr, fftr_len,
3761 tsf);
3762 if (res < 0) {
3413e97d 3763 ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
617b0f4d 3764 res);
855aed12
SW		 3765 return;
3766 }
3767 break;
3768 }
3769
3770 i += sizeof(*tlv) + tlv_len;
3771 }
9702c686
JD		 3772}
3773
991adf71
RM		 3774static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
3775 struct sk_buff *skb,
3776 struct wmi_phyerr_hdr_arg *arg)
32653cf1
MK		 3777{
3778 struct wmi_phyerr_event *ev = (void *)skb->data;
3779
3780 if (skb->len < sizeof(*ev))
3781 return -EPROTO;
3782
991adf71
RM		 3783 arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
3784 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
3785 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
3786 arg->buf_len = skb->len - sizeof(*ev);
32653cf1
MK		 3787 arg->phyerrs = ev->phyerrs;
3788
3789 return 0;
3790}
3791
2b0a2e0d
RM		 3792static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
3793 struct sk_buff *skb,
3794 struct wmi_phyerr_hdr_arg *arg)
3795{
3796 struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
3797
3798 if (skb->len < sizeof(*ev))
3799 return -EPROTO;
3800
3801 /* 10.4 firmware always reports only one phyerr */
3802 arg->num_phyerrs = 1;
3803
3804 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
3805 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
3806 arg->buf_len = skb->len;
3807 arg->phyerrs = skb->data;
3808
3809 return 0;
3810}
3811
991adf71
RM		 3812int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
3813 const void *phyerr_buf,
3814 int left_len,
3815 struct wmi_phyerr_ev_arg *arg)
3816{
3817 const struct wmi_phyerr *phyerr = phyerr_buf;
3818 int i;
3819
3820 if (left_len < sizeof(*phyerr)) {
ee92a209 3821 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
991adf71
RM		 3822 left_len, sizeof(*phyerr));
3823 return -EINVAL;
3824 }
3825
3826 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
3827 arg->freq1 = __le16_to_cpu(phyerr->freq1);
3828 arg->freq2 = __le16_to_cpu(phyerr->freq2);
3829 arg->rssi_combined = phyerr->rssi_combined;
3830 arg->chan_width_mhz = phyerr->chan_width_mhz;
3831 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
3832 arg->buf = phyerr->buf;
3833 arg->hdr_len = sizeof(*phyerr);
3834
3835 for (i = 0; i < 4; i++)
3836 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
3837
3838 switch (phyerr->phy_err_code) {
3839 case PHY_ERROR_GEN_SPECTRAL_SCAN:
3840 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
3841 break;
3842 case PHY_ERROR_GEN_FALSE_RADAR_EXT:
3843 arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
3844 break;
3845 case PHY_ERROR_GEN_RADAR:
3846 arg->phy_err_code = PHY_ERROR_RADAR;
3847 break;
3848 default:
3849 arg->phy_err_code = PHY_ERROR_UNKNOWN;
3850 break;
3851 }
3852
3853 return 0;
3854}
3855
2b0a2e0d
RM		 3856static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
3857 const void *phyerr_buf,
3858 int left_len,
3859 struct wmi_phyerr_ev_arg *arg)
3860{
3861 const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
3862 u32 phy_err_mask;
3863 int i;
3864
3865 if (left_len < sizeof(*phyerr)) {
ee92a209 3866 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
2b0a2e0d
RM		 3867 left_len, sizeof(*phyerr));
3868 return -EINVAL;
3869 }
3870
3871 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
3872 arg->freq1 = __le16_to_cpu(phyerr->freq1);
3873 arg->freq2 = __le16_to_cpu(phyerr->freq2);
3874 arg->rssi_combined = phyerr->rssi_combined;
3875 arg->chan_width_mhz = phyerr->chan_width_mhz;
3876 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
3877 arg->buf = phyerr->buf;
3878 arg->hdr_len = sizeof(*phyerr);
3879
3880 for (i = 0; i < 4; i++)
3881 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
3882
3883 phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
3884
3885 if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
3886 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
3887 else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
3888 arg->phy_err_code = PHY_ERROR_RADAR;
3889 else
3890 arg->phy_err_code = PHY_ERROR_UNKNOWN;
3891
3892 return 0;
3893}
3894
0226d602 3895void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3896{
991adf71
RM		 3897 struct wmi_phyerr_hdr_arg hdr_arg = {};
3898 struct wmi_phyerr_ev_arg phyerr_arg = {};
3899 const void *phyerr;
9702c686
JD		 3900 u32 count, i, buf_len, phy_err_code;
3901 u64 tsf;
32653cf1 3902 int left_len, ret;
9702c686
JD		 3903
3904 ATH10K_DFS_STAT_INC(ar, phy_errors);
3905
991adf71 3906 ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
32653cf1 3907 if (ret) {
991adf71 3908 ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
9702c686
JD		 3909 return;
3910 }
3911
9702c686 3912 /* Check number of included events */
991adf71 3913 count = hdr_arg.num_phyerrs;
9702c686 3914
991adf71
RM		 3915 left_len = hdr_arg.buf_len;
3916
3917 tsf = hdr_arg.tsf_u32;
9702c686 3918 tsf <<= 32;
991adf71 3919 tsf |= hdr_arg.tsf_l32;
9702c686 3920
7aa7a72a 3921 ath10k_dbg(ar, ATH10K_DBG_WMI,
9702c686
JD		 3922 "wmi event phyerr count %d tsf64 0x%llX\n",
3923 count, tsf);
3924
991adf71 3925 phyerr = hdr_arg.phyerrs;
9702c686 3926 for (i = 0; i < count; i++) {
991adf71
RM		 3927 ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
3928 if (ret) {
3929 ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
7aa7a72a 3930 i);
9702c686
JD		 3931 return;
3932 }
3933
991adf71
RM		 3934 left_len -= phyerr_arg.hdr_len;
3935 buf_len = phyerr_arg.buf_len;
3936 phy_err_code = phyerr_arg.phy_err_code;
9702c686
JD		 3937
3938 if (left_len < buf_len) {
7aa7a72a 3939 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
9702c686
JD		 3940 return;
3941 }
3942
3943 left_len -= buf_len;
3944
3945 switch (phy_err_code) {
3946 case PHY_ERROR_RADAR:
991adf71 3947 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
9702c686
JD		 3948 break;
3949 case PHY_ERROR_SPECTRAL_SCAN:
991adf71 3950 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
9702c686
JD		 3951 break;
3952 case PHY_ERROR_FALSE_RADAR_EXT:
991adf71
RM		 3953 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
3954 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
9702c686
JD		 3955 break;
3956 default:
3957 break;
3958 }
3959
991adf71 3960 phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
9702c686 3961 }
5e3dd157
KV		 3962}
3963
0226d602 3964void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3965{
c1a4654a
MK		 3966 struct wmi_roam_ev_arg arg = {};
3967 int ret;
3968 u32 vdev_id;
3969 u32 reason;
3970 s32 rssi;
3971
3972 ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
3973 if (ret) {
3974 ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
3975 return;
3976 }
3977
3978 vdev_id = __le32_to_cpu(arg.vdev_id);
3979 reason = __le32_to_cpu(arg.reason);
3980 rssi = __le32_to_cpu(arg.rssi);
3981 rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
3982
3983 ath10k_dbg(ar, ATH10K_DBG_WMI,
3984 "wmi roam event vdev %u reason 0x%08x rssi %d\n",
3985 vdev_id, reason, rssi);
3986
3987 if (reason >= WMI_ROAM_REASON_MAX)
3988 ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
3989 reason, vdev_id);
3990
3991 switch (reason) {
c1a4654a 3992 case WMI_ROAM_REASON_BEACON_MISS:
cc9904e6
MK		 3993 ath10k_mac_handle_beacon_miss(ar, vdev_id);
3994 break;
3995 case WMI_ROAM_REASON_BETTER_AP:
c1a4654a
MK		 3996 case WMI_ROAM_REASON_LOW_RSSI:
3997 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
3998 case WMI_ROAM_REASON_HO_FAILED:
3999 ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
4000 reason, vdev_id);
4001 break;
4002 }
5e3dd157
KV		 4003}
4004
0226d602 4005void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4006{
7aa7a72a 4007 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
5e3dd157
KV		 4008}
4009
0226d602 4010void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4011{
2fe5288c
KV		 4012 char buf[101], c;
4013 int i;
4014
4015 for (i = 0; i < sizeof(buf) - 1; i++) {
4016 if (i >= skb->len)
4017 break;
4018
4019 c = skb->data[i];
4020
4021 if (c == '\0')
4022 break;
4023
4024 if (isascii(c) && isprint(c))
4025 buf[i] = c;
4026 else
4027 buf[i] = '.';
4028 }
4029
4030 if (i == sizeof(buf) - 1)
7aa7a72a 4031 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2fe5288c
KV		 4032
4033 /* for some reason the debug prints end with \n, remove that */
4034 if (skb->data[i - 1] == '\n')
4035 i--;
4036
4037 /* the last byte is always reserved for the null character */
4038 buf[i] = '\0';
4039
3be004c3 4040 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
5e3dd157
KV		 4041}
4042
0226d602 4043void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4044{
7aa7a72a 4045 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
5e3dd157
KV		 4046}
4047
0226d602 4048void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4049{
7aa7a72a 4050 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
5e3dd157
KV		 4051}
4052
0226d602
MK		 4053void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
4054 struct sk_buff *skb)
5e3dd157 4055{
7aa7a72a 4056 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 4057}
4058
0226d602
MK		 4059void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
4060 struct sk_buff *skb)
5e3dd157 4061{
7aa7a72a 4062 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 4063}
4064
0226d602 4065void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4066{
7aa7a72a 4067 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
5e3dd157
KV		 4068}
4069
0226d602 4070void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4071{
5fd3ac3c
JD		 4072 struct wmi_wow_ev_arg ev = {};
4073 int ret;
4074
4075 complete(&ar->wow.wakeup_completed);
4076
4077 ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
4078 if (ret) {
4079 ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
4080 return;
4081 }
4082
4083 ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
4084 wow_reason(ev.wake_reason));
5e3dd157
KV		 4085}
4086
0226d602 4087void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4088{
7aa7a72a 4089 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
5e3dd157
KV		 4090}
4091
29542666
MK		 4092static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
4093 struct wmi_pdev_tpc_config_event *ev,
4094 u32 rate_idx, u32 num_chains,
4095 u32 rate_code, u8 type)
4096{
4097 u8 tpc, num_streams, preamble, ch, stm_idx;
4098
4099 num_streams = ATH10K_HW_NSS(rate_code);
4100 preamble = ATH10K_HW_PREAMBLE(rate_code);
4101 ch = num_chains - 1;
4102
4103 tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
4104
4105 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
4106 goto out;
4107
4108 if (preamble == WMI_RATE_PREAMBLE_CCK)
4109 goto out;
4110
4111 stm_idx = num_streams - 1;
4112 if (num_chains <= num_streams)
4113 goto out;
4114
4115 switch (type) {
4116 case WMI_TPC_TABLE_TYPE_STBC:
4117 tpc = min_t(u8, tpc,
4118 ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
4119 break;
4120 case WMI_TPC_TABLE_TYPE_TXBF:
4121 tpc = min_t(u8, tpc,
4122 ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
4123 break;
4124 case WMI_TPC_TABLE_TYPE_CDD:
4125 tpc = min_t(u8, tpc,
4126 ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
4127 break;
4128 default:
4129 ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
4130 tpc = 0;
4131 break;
4132 }
4133
4134out:
4135 return tpc;
4136}
4137
4138static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
4139 struct wmi_pdev_tpc_config_event *ev,
4140 struct ath10k_tpc_stats *tpc_stats,
4141 u8 *rate_code, u16 *pream_table, u8 type)
4142{
4143 u32 i, j, pream_idx, flags;
4144 u8 tpc[WMI_TPC_TX_N_CHAIN];
4145 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
4146 char buff[WMI_TPC_BUF_SIZE];
4147
4148 flags = __le32_to_cpu(ev->flags);
4149
4150 switch (type) {
4151 case WMI_TPC_TABLE_TYPE_CDD:
4152 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
4153 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
4154 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4155 return;
4156 }
4157 break;
4158 case WMI_TPC_TABLE_TYPE_STBC:
4159 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
4160 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
4161 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4162 return;
4163 }
4164 break;
4165 case WMI_TPC_TABLE_TYPE_TXBF:
4166 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
4167 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
4168 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4169 return;
4170 }
4171 break;
4172 default:
4173 ath10k_dbg(ar, ATH10K_DBG_WMI,
4174 "invalid table type in wmi tpc event: %d\n", type);
4175 return;
4176 }
4177
4178 pream_idx = 0;
4179 for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
4180 memset(tpc_value, 0, sizeof(tpc_value));
4181 memset(buff, 0, sizeof(buff));
4182 if (i == pream_table[pream_idx])
4183 pream_idx++;
4184
4185 for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
4186 if (j >= __le32_to_cpu(ev->num_tx_chain))
4187 break;
4188
4189 tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
4190 rate_code[i],
4191 type);
4192 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
4193 strncat(tpc_value, buff, strlen(buff));
4194 }
4195 tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
4196 tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
4197 memcpy(tpc_stats->tpc_table[type].tpc_value[i],
4198 tpc_value, sizeof(tpc_value));
4199 }
4200}
4201
0226d602 4202void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4203{
29542666
MK		 4204 u32 i, j, pream_idx, num_tx_chain;
4205 u8 rate_code[WMI_TPC_RATE_MAX], rate_idx;
4206 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
4207 struct wmi_pdev_tpc_config_event *ev;
4208 struct ath10k_tpc_stats *tpc_stats;
4209
4210 ev = (struct wmi_pdev_tpc_config_event *)skb->data;
4211
4212 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
4213 if (!tpc_stats)
4214 return;
4215
4216 /* Create the rate code table based on the chains supported */
4217 rate_idx = 0;
4218 pream_idx = 0;
4219
4220 /* Fill CCK rate code */
4221 for (i = 0; i < 4; i++) {
4222 rate_code[rate_idx] =
4223 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
4224 rate_idx++;
4225 }
4226 pream_table[pream_idx] = rate_idx;
4227 pream_idx++;
4228
4229 /* Fill OFDM rate code */
4230 for (i = 0; i < 8; i++) {
4231 rate_code[rate_idx] =
4232 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
4233 rate_idx++;
4234 }
4235 pream_table[pream_idx] = rate_idx;
4236 pream_idx++;
4237
4238 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4239
4240 /* Fill HT20 rate code */
4241 for (i = 0; i < num_tx_chain; i++) {
4242 for (j = 0; j < 8; j++) {
4243 rate_code[rate_idx] =
4244 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4245 rate_idx++;
4246 }
4247 }
4248 pream_table[pream_idx] = rate_idx;
4249 pream_idx++;
4250
4251 /* Fill HT40 rate code */
4252 for (i = 0; i < num_tx_chain; i++) {
4253 for (j = 0; j < 8; j++) {
4254 rate_code[rate_idx] =
4255 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4256 rate_idx++;
4257 }
4258 }
4259 pream_table[pream_idx] = rate_idx;
4260 pream_idx++;
4261
4262 /* Fill VHT20 rate code */
4263 for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) {
4264 for (j = 0; j < 10; j++) {
4265 rate_code[rate_idx] =
4266 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4267 rate_idx++;
4268 }
4269 }
4270 pream_table[pream_idx] = rate_idx;
4271 pream_idx++;
4272
4273 /* Fill VHT40 rate code */
4274 for (i = 0; i < num_tx_chain; i++) {
4275 for (j = 0; j < 10; j++) {
4276 rate_code[rate_idx] =
4277 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4278 rate_idx++;
4279 }
4280 }
4281 pream_table[pream_idx] = rate_idx;
4282 pream_idx++;
4283
4284 /* Fill VHT80 rate code */
4285 for (i = 0; i < num_tx_chain; i++) {
4286 for (j = 0; j < 10; j++) {
4287 rate_code[rate_idx] =
4288 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4289 rate_idx++;
4290 }
4291 }
4292 pream_table[pream_idx] = rate_idx;
4293 pream_idx++;
4294
4295 rate_code[rate_idx++] =
4296 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4297 rate_code[rate_idx++] =
4298 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4299 rate_code[rate_idx++] =
4300 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4301 rate_code[rate_idx++] =
4302 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4303 rate_code[rate_idx++] =
4304 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4305
4306 pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
4307
4308 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
4309 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
4310 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
4311 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
4312 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
4313 tpc_stats->twice_antenna_reduction =
4314 __le32_to_cpu(ev->twice_antenna_reduction);
4315 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
4316 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
4317 tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4318 tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
4319
4320 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4321 rate_code, pream_table,
4322 WMI_TPC_TABLE_TYPE_CDD);
4323 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4324 rate_code, pream_table,
4325 WMI_TPC_TABLE_TYPE_STBC);
4326 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4327 rate_code, pream_table,
4328 WMI_TPC_TABLE_TYPE_TXBF);
4329
4330 ath10k_debug_tpc_stats_process(ar, tpc_stats);
4331
4332 ath10k_dbg(ar, ATH10K_DBG_WMI,
4333 "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
4334 __le32_to_cpu(ev->chan_freq),
4335 __le32_to_cpu(ev->phy_mode),
4336 __le32_to_cpu(ev->ctl),
4337 __le32_to_cpu(ev->reg_domain),
4338 a_sle32_to_cpu(ev->twice_antenna_gain),
4339 __le32_to_cpu(ev->twice_antenna_reduction),
4340 __le32_to_cpu(ev->power_limit),
4341 __le32_to_cpu(ev->twice_max_rd_power) / 2,
4342 __le32_to_cpu(ev->num_tx_chain),
4343 __le32_to_cpu(ev->rate_max));
5e3dd157
KV		 4344}
4345
0226d602 4346void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4347{
7aa7a72a 4348 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5e3dd157
KV		 4349}
4350
0226d602 4351void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4352{
7aa7a72a 4353 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5e3dd157
KV		 4354}
4355
0226d602 4356void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4357{
7aa7a72a 4358 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5e3dd157
KV		 4359}
4360
0226d602 4361void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4362{
7aa7a72a 4363 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 4364}
4365
0226d602 4366void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4367{
7aa7a72a 4368 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 4369}
4370
0226d602
MK		 4371void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
4372 struct sk_buff *skb)
5e3dd157 4373{
7aa7a72a 4374 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5e3dd157
KV		 4375}
4376
0226d602 4377void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4378{
7aa7a72a 4379 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
8a6618b0
BM		 4380}
4381
0226d602 4382void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4383{
7aa7a72a 4384 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
8a6618b0
BM		 4385}
4386
0226d602 4387void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4388{
7aa7a72a 4389 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
8a6618b0
BM		 4390}
4391
b0578865
FF		 4392static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
4393 u32 num_units, u32 unit_len)
b3effe61
BM		 4394{
4395 dma_addr_t paddr;
b0578865 4396 u32 pool_size = 0;
b3effe61 4397 int idx = ar->wmi.num_mem_chunks;
b0578865 4398 void *vaddr = NULL;
b3effe61 4399
b0578865
FF		 4400 if (ar->wmi.num_mem_chunks == ARRAY_SIZE(ar->wmi.mem_chunks))
4401 return -ENOMEM;
b3effe61 4402
b0578865
FF		 4403 while (!vaddr && num_units) {
4404 pool_size = num_units * round_up(unit_len, 4);
4405 if (!pool_size)
4406 return -EINVAL;
b3effe61 4407
b0578865
FF		 4408 vaddr = kzalloc(pool_size, GFP_KERNEL | __GFP_NOWARN);
4409 if (!vaddr)
4410 num_units /= 2;
b3effe61
BM		 4411 }
4412
b0578865
FF		 4413 if (!num_units)
4414 return -ENOMEM;
4415
4416 paddr = dma_map_single(ar->dev, vaddr, pool_size, DMA_TO_DEVICE);
4417 if (dma_mapping_error(ar->dev, paddr)) {
4418 kfree(vaddr);
4419 return -ENOMEM;
4420 }
b3effe61 4421
b0578865 4422 ar->wmi.mem_chunks[idx].vaddr = vaddr;
b3effe61
BM		 4423 ar->wmi.mem_chunks[idx].paddr = paddr;
4424 ar->wmi.mem_chunks[idx].len = pool_size;
4425 ar->wmi.mem_chunks[idx].req_id = req_id;
4426 ar->wmi.num_mem_chunks++;
4427
b0578865
FF		 4428 return num_units;
4429}
4430
4431static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
4432 u32 num_units, u32 unit_len)
4433{
4434 int ret;
4435
4436 while (num_units) {
4437 ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
4438 if (ret < 0)
4439 return ret;
4440
4441 num_units -= ret;
4442 }
4443
b3effe61
BM		 4444 return 0;
4445}
4446
a925a376
VT		 4447static bool
4448ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
4449 const struct wlan_host_mem_req **mem_reqs,
4450 u32 num_mem_reqs)
4451{
4452 u32 req_id, num_units, unit_size, num_unit_info;
4453 u32 pool_size;
4454 int i, j;
4455 bool found;
4456
4457 if (ar->wmi.num_mem_chunks != num_mem_reqs)
4458 return false;
4459
4460 for (i = 0; i < num_mem_reqs; ++i) {
4461 req_id = __le32_to_cpu(mem_reqs[i]->req_id);
4462 num_units = __le32_to_cpu(mem_reqs[i]->num_units);
4463 unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
4464 num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
4465
4466 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
4467 if (ar->num_active_peers)
4468 num_units = ar->num_active_peers + 1;
4469 else
4470 num_units = ar->max_num_peers + 1;
4471 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
4472 num_units = ar->max_num_peers + 1;
4473 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
4474 num_units = ar->max_num_vdevs + 1;
4475 }
4476
4477 found = false;
4478 for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
4479 if (ar->wmi.mem_chunks[j].req_id == req_id) {
4480 pool_size = num_units * round_up(unit_size, 4);
4481 if (ar->wmi.mem_chunks[j].len == pool_size) {
4482 found = true;
4483 break;
4484 }
4485 }
4486 }
4487 if (!found)
4488 return false;
4489 }
4490
4491 return true;
4492}
4493
d7579d12
MK		 4494static int
4495ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4496 struct wmi_svc_rdy_ev_arg *arg)
5c01aa3d
MK		 4497{
4498 struct wmi_service_ready_event *ev;
4499 size_t i, n;
4500
4501 if (skb->len < sizeof(*ev))
4502 return -EPROTO;
4503
4504 ev = (void *)skb->data;
4505 skb_pull(skb, sizeof(*ev));
4506 arg->min_tx_power = ev->hw_min_tx_power;
4507 arg->max_tx_power = ev->hw_max_tx_power;
4508 arg->ht_cap = ev->ht_cap_info;
4509 arg->vht_cap = ev->vht_cap_info;
4510 arg->sw_ver0 = ev->sw_version;
4511 arg->sw_ver1 = ev->sw_version_1;
4512 arg->phy_capab = ev->phy_capability;
4513 arg->num_rf_chains = ev->num_rf_chains;
4514 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
4515 arg->num_mem_reqs = ev->num_mem_reqs;
4516 arg->service_map = ev->wmi_service_bitmap;
2a3e60d3 4517 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5c01aa3d
MK		 4518
4519 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
4520 ARRAY_SIZE(arg->mem_reqs));
4521 for (i = 0; i < n; i++)
4522 arg->mem_reqs[i] = &ev->mem_reqs[i];
4523
4524 if (skb->len <
4525 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
4526 return -EPROTO;
4527
4528 return 0;
4529}
4530
d7579d12
MK		 4531static int
4532ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4533 struct wmi_svc_rdy_ev_arg *arg)
5c01aa3d
MK		 4534{
4535 struct wmi_10x_service_ready_event *ev;
4536 int i, n;
4537
4538 if (skb->len < sizeof(*ev))
4539 return -EPROTO;
4540
4541 ev = (void *)skb->data;
4542 skb_pull(skb, sizeof(*ev));
4543 arg->min_tx_power = ev->hw_min_tx_power;
4544 arg->max_tx_power = ev->hw_max_tx_power;
4545 arg->ht_cap = ev->ht_cap_info;
4546 arg->vht_cap = ev->vht_cap_info;
4547 arg->sw_ver0 = ev->sw_version;
4548 arg->phy_capab = ev->phy_capability;
4549 arg->num_rf_chains = ev->num_rf_chains;
4550 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
4551 arg->num_mem_reqs = ev->num_mem_reqs;
4552 arg->service_map = ev->wmi_service_bitmap;
2a3e60d3 4553 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5c01aa3d
MK		 4554
4555 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
4556 ARRAY_SIZE(arg->mem_reqs));
4557 for (i = 0; i < n; i++)
4558 arg->mem_reqs[i] = &ev->mem_reqs[i];
4559
4560 if (skb->len <
4561 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
4562 return -EPROTO;
4563
4564 return 0;
4565}
4566
c8ecfc1c 4567static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
5e3dd157 4568{
c8ecfc1c
RM		 4569 struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
4570 struct sk_buff *skb = ar->svc_rdy_skb;
5c01aa3d
MK		 4571 struct wmi_svc_rdy_ev_arg arg = {};
4572 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
5c01aa3d 4573 int ret;
a925a376 4574 bool allocated;
5c01aa3d 4575
c8ecfc1c
RM		 4576 if (!skb) {
4577 ath10k_warn(ar, "invalid service ready event skb\n");
4578 return;
4579 }
4580
d7579d12 4581 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
5c01aa3d
MK		 4582 if (ret) {
4583 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5e3dd157
KV		 4584 return;
4585 }
4586
d7579d12
MK		 4587 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
4588 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
4589 arg.service_map_len);
4590
5c01aa3d
MK		 4591 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
4592 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
4593 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
4594 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5e3dd157 4595 ar->fw_version_major =
5c01aa3d
MK		 4596 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
4597 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5e3dd157 4598 ar->fw_version_release =
5c01aa3d
MK		 4599 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
4600 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
4601 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
4602 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
4603 ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
4604
5c01aa3d 4605 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
2a3e60d3 4606 arg.service_map, arg.service_map_len);
8865bee4 4607
5c8726ec 4608 if (ar->num_rf_chains > ar->max_spatial_stream) {
7aa7a72a 4609 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
5c8726ec
RM		 4610 ar->num_rf_chains, ar->max_spatial_stream);
4611 ar->num_rf_chains = ar->max_spatial_stream;
8865bee4 4612 }
5e3dd157 4613
166de3f1
RM		 4614 if (!ar->cfg_tx_chainmask) {
4615 ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
4616 ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
4617 }
fdb959c7 4618
5e3dd157
KV		 4619 if (strlen(ar->hw->wiphy->fw_version) == 0) {
4620 snprintf(ar->hw->wiphy->fw_version,
4621 sizeof(ar->hw->wiphy->fw_version),
4622 "%u.%u.%u.%u",
4623 ar->fw_version_major,
4624 ar->fw_version_minor,
4625 ar->fw_version_release,
4626 ar->fw_version_build);
4627 }
4628
5c01aa3d
MK		 4629 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
4630 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
7aa7a72a 4631 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
b3effe61
BM		 4632 num_mem_reqs);
4633 return;
6f97d256
BM		 4634 }
4635
b0399417 4636 if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
99ad1cba 4637 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
c4cdf753 4638 ar->running_fw->fw_file.fw_features))
99ad1cba
MK		 4639 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
4640 ar->max_num_vdevs;
4641 else
4642 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
4643 ar->max_num_vdevs;
4644
b0399417 4645 ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
5699a6f2 4646 ar->max_num_vdevs;
b0399417
RM		 4647 ar->num_tids = ar->num_active_peers * 2;
4648 ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
4649 }
4650
4651 /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
4652 * and WMI_SERVICE_IRAM_TIDS, etc.
4653 */
4654
a925a376
VT		 4655 allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
4656 num_mem_reqs);
4657 if (allocated)
4658 goto skip_mem_alloc;
4659
4660 /* Either this event is received during boot time or there is a change
4661 * in memory requirement from firmware when compared to last request.
4662 * Free any old memory and do a fresh allocation based on the current
4663 * memory requirement.
4664 */
4665 ath10k_wmi_free_host_mem(ar);
4666
b3effe61 4667 for (i = 0; i < num_mem_reqs; ++i) {
5c01aa3d
MK		 4668 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
4669 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
4670 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
4671 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
b3effe61 4672
b0399417
RM		 4673 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
4674 if (ar->num_active_peers)
4675 num_units = ar->num_active_peers + 1;
4676 else
4677 num_units = ar->max_num_peers + 1;
4678 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
b3effe61
BM		 4679 /* number of units to allocate is number of
4680 * peers, 1 extra for self peer on target */
4681 /* this needs to be tied, host and target
4682 * can get out of sync */
b0399417
RM		 4683 num_units = ar->max_num_peers + 1;
4684 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
4685 num_units = ar->max_num_vdevs + 1;
4686 }
b3effe61 4687
7aa7a72a 4688 ath10k_dbg(ar, ATH10K_DBG_WMI,
b3effe61
BM		 4689 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
4690 req_id,
5c01aa3d 4691 __le32_to_cpu(arg.mem_reqs[i]->num_units),
b3effe61
BM		 4692 num_unit_info,
4693 unit_size,
4694 num_units);
4695
4696 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
4697 unit_size);
4698 if (ret)
4699 return;
4700 }
4701
a925a376 4702skip_mem_alloc:
7aa7a72a 4703 ath10k_dbg(ar, ATH10K_DBG_WMI,
ca996ec5 4704 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
5c01aa3d
MK		 4705 __le32_to_cpu(arg.min_tx_power),
4706 __le32_to_cpu(arg.max_tx_power),
4707 __le32_to_cpu(arg.ht_cap),
4708 __le32_to_cpu(arg.vht_cap),
4709 __le32_to_cpu(arg.sw_ver0),
4710 __le32_to_cpu(arg.sw_ver1),
ca996ec5 4711 __le32_to_cpu(arg.fw_build),
5c01aa3d
MK		 4712 __le32_to_cpu(arg.phy_capab),
4713 __le32_to_cpu(arg.num_rf_chains),
4714 __le32_to_cpu(arg.eeprom_rd),
4715 __le32_to_cpu(arg.num_mem_reqs));
6f97d256 4716
c8ecfc1c
RM		 4717 dev_kfree_skb(skb);
4718 ar->svc_rdy_skb = NULL;
6f97d256
BM		 4719 complete(&ar->wmi.service_ready);
4720}
4721
c8ecfc1c
RM		 4722void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
4723{
4724 ar->svc_rdy_skb = skb;
4725 queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
4726}
4727
d7579d12
MK		 4728static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4729 struct wmi_rdy_ev_arg *arg)
5e3dd157 4730{
32653cf1 4731 struct wmi_ready_event *ev = (void *)skb->data;
5e3dd157 4732
32653cf1
MK		 4733 if (skb->len < sizeof(*ev))
4734 return -EPROTO;
4735
4736 skb_pull(skb, sizeof(*ev));
4737 arg->sw_version = ev->sw_version;
4738 arg->abi_version = ev->abi_version;
4739 arg->status = ev->status;
4740 arg->mac_addr = ev->mac_addr.addr;
4741
4742 return 0;
4743}
5e3dd157 4744
c1a4654a
MK		 4745static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
4746 struct wmi_roam_ev_arg *arg)
4747{
4748 struct wmi_roam_ev *ev = (void *)skb->data;
4749
4750 if (skb->len < sizeof(*ev))
4751 return -EPROTO;
4752
4753 skb_pull(skb, sizeof(*ev));
4754 arg->vdev_id = ev->vdev_id;
4755 arg->reason = ev->reason;
4756
4757 return 0;
4758}
4759
0226d602 4760int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
32653cf1
MK		 4761{
4762 struct wmi_rdy_ev_arg arg = {};
4763 int ret;
4764
d7579d12 4765 ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
32653cf1
MK		 4766 if (ret) {
4767 ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
4768 return ret;
4769 }
5e3dd157 4770
7aa7a72a 4771 ath10k_dbg(ar, ATH10K_DBG_WMI,
32653cf1
MK		 4772 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
4773 __le32_to_cpu(arg.sw_version),
4774 __le32_to_cpu(arg.abi_version),
4775 arg.mac_addr,
4776 __le32_to_cpu(arg.status));
5e3dd157 4777
32653cf1 4778 ether_addr_copy(ar->mac_addr, arg.mac_addr);
5e3dd157
KV		 4779 complete(&ar->wmi.unified_ready);
4780 return 0;
4781}
4782
a57a6a27
RM		 4783static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
4784{
4785 const struct wmi_pdev_temperature_event *ev;
4786
4787 ev = (struct wmi_pdev_temperature_event *)skb->data;
4788 if (WARN_ON(skb->len < sizeof(*ev)))
4789 return -EPROTO;
4790
ac2953fc 4791 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
a57a6a27
RM		 4792 return 0;
4793}
4794
d7579d12 4795static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 4796{
4797 struct wmi_cmd_hdr *cmd_hdr;
4798 enum wmi_event_id id;
5e3dd157
KV		 4799
4800 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
4801 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
4802
4803 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 4804 goto out;
5e3dd157 4805
d35a6c18 4806 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5e3dd157
KV		 4807
4808 switch (id) {
4809 case WMI_MGMT_RX_EVENTID:
4810 ath10k_wmi_event_mgmt_rx(ar, skb);
4811 /* mgmt_rx() owns the skb now! */
4812 return;
4813 case WMI_SCAN_EVENTID:
4814 ath10k_wmi_event_scan(ar, skb);
4815 break;
4816 case WMI_CHAN_INFO_EVENTID:
4817 ath10k_wmi_event_chan_info(ar, skb);
4818 break;
4819 case WMI_ECHO_EVENTID:
4820 ath10k_wmi_event_echo(ar, skb);
4821 break;
4822 case WMI_DEBUG_MESG_EVENTID:
4823 ath10k_wmi_event_debug_mesg(ar, skb);
4824 break;
4825 case WMI_UPDATE_STATS_EVENTID:
4826 ath10k_wmi_event_update_stats(ar, skb);
4827 break;
4828 case WMI_VDEV_START_RESP_EVENTID:
4829 ath10k_wmi_event_vdev_start_resp(ar, skb);
4830 break;
4831 case WMI_VDEV_STOPPED_EVENTID:
4832 ath10k_wmi_event_vdev_stopped(ar, skb);
4833 break;
4834 case WMI_PEER_STA_KICKOUT_EVENTID:
4835 ath10k_wmi_event_peer_sta_kickout(ar, skb);
4836 break;
4837 case WMI_HOST_SWBA_EVENTID:
4838 ath10k_wmi_event_host_swba(ar, skb);
4839 break;
4840 case WMI_TBTTOFFSET_UPDATE_EVENTID:
4841 ath10k_wmi_event_tbttoffset_update(ar, skb);
4842 break;
4843 case WMI_PHYERR_EVENTID:
4844 ath10k_wmi_event_phyerr(ar, skb);
4845 break;
4846 case WMI_ROAM_EVENTID:
4847 ath10k_wmi_event_roam(ar, skb);
4848 break;
4849 case WMI_PROFILE_MATCH:
4850 ath10k_wmi_event_profile_match(ar, skb);
4851 break;
4852 case WMI_DEBUG_PRINT_EVENTID:
4853 ath10k_wmi_event_debug_print(ar, skb);
4854 break;
4855 case WMI_PDEV_QVIT_EVENTID:
4856 ath10k_wmi_event_pdev_qvit(ar, skb);
4857 break;
4858 case WMI_WLAN_PROFILE_DATA_EVENTID:
4859 ath10k_wmi_event_wlan_profile_data(ar, skb);
4860 break;
4861 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
4862 ath10k_wmi_event_rtt_measurement_report(ar, skb);
4863 break;
4864 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
4865 ath10k_wmi_event_tsf_measurement_report(ar, skb);
4866 break;
4867 case WMI_RTT_ERROR_REPORT_EVENTID:
4868 ath10k_wmi_event_rtt_error_report(ar, skb);
4869 break;
4870 case WMI_WOW_WAKEUP_HOST_EVENTID:
4871 ath10k_wmi_event_wow_wakeup_host(ar, skb);
4872 break;
4873 case WMI_DCS_INTERFERENCE_EVENTID:
4874 ath10k_wmi_event_dcs_interference(ar, skb);
4875 break;
4876 case WMI_PDEV_TPC_CONFIG_EVENTID:
4877 ath10k_wmi_event_pdev_tpc_config(ar, skb);
4878 break;
4879 case WMI_PDEV_FTM_INTG_EVENTID:
4880 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
4881 break;
4882 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
4883 ath10k_wmi_event_gtk_offload_status(ar, skb);
4884 break;
4885 case WMI_GTK_REKEY_FAIL_EVENTID:
4886 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
4887 break;
4888 case WMI_TX_DELBA_COMPLETE_EVENTID:
4889 ath10k_wmi_event_delba_complete(ar, skb);
4890 break;
4891 case WMI_TX_ADDBA_COMPLETE_EVENTID:
4892 ath10k_wmi_event_addba_complete(ar, skb);
4893 break;
4894 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
4895 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
4896 break;
4897 case WMI_SERVICE_READY_EVENTID:
b34d2b3d 4898 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 4899 return;
5e3dd157 4900 case WMI_READY_EVENTID:
b34d2b3d 4901 ath10k_wmi_event_ready(ar, skb);
5e3dd157
KV		 4902 break;
4903 default:
7aa7a72a 4904 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5e3dd157
KV		 4905 break;
4906 }
4907
469d479f 4908out:
5e3dd157
KV		 4909 dev_kfree_skb(skb);
4910}
4911
d7579d12 4912static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
8a6618b0
BM		 4913{
4914 struct wmi_cmd_hdr *cmd_hdr;
4915 enum wmi_10x_event_id id;
43d2a30f 4916 bool consumed;
8a6618b0
BM		 4917
4918 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
4919 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
4920
4921 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 4922 goto out;
8a6618b0 4923
d35a6c18 4924 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
8a6618b0 4925
43d2a30f
KV		 4926 consumed = ath10k_tm_event_wmi(ar, id, skb);
4927
4928 /* Ready event must be handled normally also in UTF mode so that we
4929 * know the UTF firmware has booted, others we are just bypass WMI
4930 * events to testmode.
4931 */
4932 if (consumed && id != WMI_10X_READY_EVENTID) {
4933 ath10k_dbg(ar, ATH10K_DBG_WMI,
4934 "wmi testmode consumed 0x%x\n", id);
4935 goto out;
4936 }
4937
8a6618b0
BM		 4938 switch (id) {
4939 case WMI_10X_MGMT_RX_EVENTID:
4940 ath10k_wmi_event_mgmt_rx(ar, skb);
4941 /* mgmt_rx() owns the skb now! */
4942 return;
4943 case WMI_10X_SCAN_EVENTID:
4944 ath10k_wmi_event_scan(ar, skb);
4945 break;
4946 case WMI_10X_CHAN_INFO_EVENTID:
4947 ath10k_wmi_event_chan_info(ar, skb);
4948 break;
4949 case WMI_10X_ECHO_EVENTID:
4950 ath10k_wmi_event_echo(ar, skb);
4951 break;
4952 case WMI_10X_DEBUG_MESG_EVENTID:
4953 ath10k_wmi_event_debug_mesg(ar, skb);
4954 break;
4955 case WMI_10X_UPDATE_STATS_EVENTID:
4956 ath10k_wmi_event_update_stats(ar, skb);
4957 break;
4958 case WMI_10X_VDEV_START_RESP_EVENTID:
4959 ath10k_wmi_event_vdev_start_resp(ar, skb);
4960 break;
4961 case WMI_10X_VDEV_STOPPED_EVENTID:
4962 ath10k_wmi_event_vdev_stopped(ar, skb);
4963 break;
4964 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
4965 ath10k_wmi_event_peer_sta_kickout(ar, skb);
4966 break;
4967 case WMI_10X_HOST_SWBA_EVENTID:
4968 ath10k_wmi_event_host_swba(ar, skb);
4969 break;
4970 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
4971 ath10k_wmi_event_tbttoffset_update(ar, skb);
4972 break;
4973 case WMI_10X_PHYERR_EVENTID:
4974 ath10k_wmi_event_phyerr(ar, skb);
4975 break;
4976 case WMI_10X_ROAM_EVENTID:
4977 ath10k_wmi_event_roam(ar, skb);
4978 break;
4979 case WMI_10X_PROFILE_MATCH:
4980 ath10k_wmi_event_profile_match(ar, skb);
4981 break;
4982 case WMI_10X_DEBUG_PRINT_EVENTID:
4983 ath10k_wmi_event_debug_print(ar, skb);
4984 break;
4985 case WMI_10X_PDEV_QVIT_EVENTID:
4986 ath10k_wmi_event_pdev_qvit(ar, skb);
4987 break;
4988 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
4989 ath10k_wmi_event_wlan_profile_data(ar, skb);
4990 break;
4991 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
4992 ath10k_wmi_event_rtt_measurement_report(ar, skb);
4993 break;
4994 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
4995 ath10k_wmi_event_tsf_measurement_report(ar, skb);
4996 break;
4997 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
4998 ath10k_wmi_event_rtt_error_report(ar, skb);
4999 break;
5000 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
5001 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5002 break;
5003 case WMI_10X_DCS_INTERFERENCE_EVENTID:
5004 ath10k_wmi_event_dcs_interference(ar, skb);
5005 break;
5006 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
5007 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5008 break;
5009 case WMI_10X_INST_RSSI_STATS_EVENTID:
5010 ath10k_wmi_event_inst_rssi_stats(ar, skb);
5011 break;
5012 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
5013 ath10k_wmi_event_vdev_standby_req(ar, skb);
5014 break;
5015 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
5016 ath10k_wmi_event_vdev_resume_req(ar, skb);
5017 break;
5018 case WMI_10X_SERVICE_READY_EVENTID:
b34d2b3d 5019 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5020 return;
8a6618b0 5021 case WMI_10X_READY_EVENTID:
b34d2b3d 5022 ath10k_wmi_event_ready(ar, skb);
8a6618b0 5023 break;
43d2a30f
KV		 5024 case WMI_10X_PDEV_UTF_EVENTID:
5025 /* ignore utf events */
5026 break;
8a6618b0 5027 default:
7aa7a72a 5028 ath10k_warn(ar, "Unknown eventid: %d\n", id);
8a6618b0
BM		 5029 break;
5030 }
5031
43d2a30f 5032out:
8a6618b0
BM		 5033 dev_kfree_skb(skb);
5034}
5035
d7579d12 5036static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
24c88f78
MK		 5037{
5038 struct wmi_cmd_hdr *cmd_hdr;
5039 enum wmi_10_2_event_id id;
5040
5041 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5042 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5043
5044 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 5045 goto out;
24c88f78 5046
d35a6c18 5047 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
24c88f78
MK		 5048
5049 switch (id) {
5050 case WMI_10_2_MGMT_RX_EVENTID:
5051 ath10k_wmi_event_mgmt_rx(ar, skb);
5052 /* mgmt_rx() owns the skb now! */
5053 return;
5054 case WMI_10_2_SCAN_EVENTID:
5055 ath10k_wmi_event_scan(ar, skb);
5056 break;
5057 case WMI_10_2_CHAN_INFO_EVENTID:
5058 ath10k_wmi_event_chan_info(ar, skb);
5059 break;
5060 case WMI_10_2_ECHO_EVENTID:
5061 ath10k_wmi_event_echo(ar, skb);
5062 break;
5063 case WMI_10_2_DEBUG_MESG_EVENTID:
5064 ath10k_wmi_event_debug_mesg(ar, skb);
5065 break;
5066 case WMI_10_2_UPDATE_STATS_EVENTID:
5067 ath10k_wmi_event_update_stats(ar, skb);
5068 break;
5069 case WMI_10_2_VDEV_START_RESP_EVENTID:
5070 ath10k_wmi_event_vdev_start_resp(ar, skb);
5071 break;
5072 case WMI_10_2_VDEV_STOPPED_EVENTID:
5073 ath10k_wmi_event_vdev_stopped(ar, skb);
5074 break;
5075 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
5076 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5077 break;
5078 case WMI_10_2_HOST_SWBA_EVENTID:
5079 ath10k_wmi_event_host_swba(ar, skb);
5080 break;
5081 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
5082 ath10k_wmi_event_tbttoffset_update(ar, skb);
5083 break;
5084 case WMI_10_2_PHYERR_EVENTID:
5085 ath10k_wmi_event_phyerr(ar, skb);
5086 break;
5087 case WMI_10_2_ROAM_EVENTID:
5088 ath10k_wmi_event_roam(ar, skb);
5089 break;
5090 case WMI_10_2_PROFILE_MATCH:
5091 ath10k_wmi_event_profile_match(ar, skb);
5092 break;
5093 case WMI_10_2_DEBUG_PRINT_EVENTID:
5094 ath10k_wmi_event_debug_print(ar, skb);
5095 break;
5096 case WMI_10_2_PDEV_QVIT_EVENTID:
5097 ath10k_wmi_event_pdev_qvit(ar, skb);
5098 break;
5099 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
5100 ath10k_wmi_event_wlan_profile_data(ar, skb);
5101 break;
5102 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
5103 ath10k_wmi_event_rtt_measurement_report(ar, skb);
5104 break;
5105 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
5106 ath10k_wmi_event_tsf_measurement_report(ar, skb);
5107 break;
5108 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
5109 ath10k_wmi_event_rtt_error_report(ar, skb);
5110 break;
5111 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
5112 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5113 break;
5114 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
5115 ath10k_wmi_event_dcs_interference(ar, skb);
5116 break;
5117 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
5118 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5119 break;
5120 case WMI_10_2_INST_RSSI_STATS_EVENTID:
5121 ath10k_wmi_event_inst_rssi_stats(ar, skb);
5122 break;
5123 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
5124 ath10k_wmi_event_vdev_standby_req(ar, skb);
5125 break;
5126 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
5127 ath10k_wmi_event_vdev_resume_req(ar, skb);
5128 break;
5129 case WMI_10_2_SERVICE_READY_EVENTID:
b34d2b3d 5130 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5131 return;
24c88f78 5132 case WMI_10_2_READY_EVENTID:
b34d2b3d 5133 ath10k_wmi_event_ready(ar, skb);
24c88f78 5134 break;
a57a6a27
RM		 5135 case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
5136 ath10k_wmi_event_temperature(ar, skb);
5137 break;
24c88f78
MK		 5138 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
5139 case WMI_10_2_GPIO_INPUT_EVENTID:
5140 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
5141 case WMI_10_2_GENERIC_BUFFER_EVENTID:
5142 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
5143 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
5144 case WMI_10_2_WDS_PEER_EVENTID:
7aa7a72a 5145 ath10k_dbg(ar, ATH10K_DBG_WMI,
24c88f78
MK		 5146 "received event id %d not implemented\n", id);
5147 break;
5148 default:
7aa7a72a 5149 ath10k_warn(ar, "Unknown eventid: %d\n", id);
24c88f78
MK		 5150 break;
5151 }
5152
469d479f 5153out:
24c88f78
MK		 5154 dev_kfree_skb(skb);
5155}
8a6618b0 5156
1c092961
RM		 5157static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
5158{
5159 struct wmi_cmd_hdr *cmd_hdr;
5160 enum wmi_10_4_event_id id;
5161
5162 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5163 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5164
5165 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
5166 goto out;
5167
5168 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5169
5170 switch (id) {
5171 case WMI_10_4_MGMT_RX_EVENTID:
5172 ath10k_wmi_event_mgmt_rx(ar, skb);
5173 /* mgmt_rx() owns the skb now! */
5174 return;
373b48cf
RM		 5175 case WMI_10_4_ECHO_EVENTID:
5176 ath10k_wmi_event_echo(ar, skb);
5177 break;
5178 case WMI_10_4_DEBUG_MESG_EVENTID:
5179 ath10k_wmi_event_debug_mesg(ar, skb);
5180 break;
5181 case WMI_10_4_SERVICE_READY_EVENTID:
5182 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5183 return;
b2297baa
RM		 5184 case WMI_10_4_SCAN_EVENTID:
5185 ath10k_wmi_event_scan(ar, skb);
5186 break;
5187 case WMI_10_4_CHAN_INFO_EVENTID:
5188 ath10k_wmi_event_chan_info(ar, skb);
5189 break;
2b0a2e0d
RM		 5190 case WMI_10_4_PHYERR_EVENTID:
5191 ath10k_wmi_event_phyerr(ar, skb);
5192 break;
d02e752f
RM		 5193 case WMI_10_4_READY_EVENTID:
5194 ath10k_wmi_event_ready(ar, skb);
5195 break;
373b48cf
RM		 5196 case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
5197 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5198 break;
3cec3be3
RM		 5199 case WMI_10_4_HOST_SWBA_EVENTID:
5200 ath10k_wmi_event_host_swba(ar, skb);
5201 break;
373b48cf
RM		 5202 case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
5203 ath10k_wmi_event_tbttoffset_update(ar, skb);
5204 break;
5205 case WMI_10_4_DEBUG_PRINT_EVENTID:
5206 ath10k_wmi_event_debug_print(ar, skb);
5207 break;
5208 case WMI_10_4_VDEV_START_RESP_EVENTID:
5209 ath10k_wmi_event_vdev_start_resp(ar, skb);
5210 break;
5211 case WMI_10_4_VDEV_STOPPED_EVENTID:
5212 ath10k_wmi_event_vdev_stopped(ar, skb);
5213 break;
5214 case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
5215 ath10k_dbg(ar, ATH10K_DBG_WMI,
5216 "received event id %d not implemented\n", id);
5217 break;
98dd2b92
MP		 5218 case WMI_10_4_UPDATE_STATS_EVENTID:
5219 ath10k_wmi_event_update_stats(ar, skb);
5220 break;
6dd46348
T		 5221 case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
5222 ath10k_wmi_event_temperature(ar, skb);
5223 break;
1c092961
RM		 5224 default:
5225 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5226 break;
5227 }
5228
5229out:
5230 dev_kfree_skb(skb);
5231}
5232
ce42870e
BM		 5233static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
5234{
d7579d12
MK		 5235 int ret;
5236
5237 ret = ath10k_wmi_rx(ar, skb);
5238 if (ret)
5239 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
ce42870e
BM		 5240}
5241
95bf21f9 5242int ath10k_wmi_connect(struct ath10k *ar)
5e3dd157
KV		 5243{
5244 int status;
5245 struct ath10k_htc_svc_conn_req conn_req;
5246 struct ath10k_htc_svc_conn_resp conn_resp;
5247
5248 memset(&conn_req, 0, sizeof(conn_req));
5249 memset(&conn_resp, 0, sizeof(conn_resp));
5250
5251 /* these fields are the same for all service endpoints */
5252 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
5253 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 5254 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV		 5255
5256 /* connect to control service */
5257 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
5258
cd003fad 5259 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157 5260 if (status) {
7aa7a72a 5261 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
5e3dd157
KV		 5262 status);
5263 return status;
5264 }
5265
5266 ar->wmi.eid = conn_resp.eid;
5267 return 0;
5268}
5269
d7579d12
MK		 5270static struct sk_buff *
5271ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
5272 u16 ctl2g, u16 ctl5g,
5273 enum wmi_dfs_region dfs_reg)
5e3dd157
KV		 5274{
5275 struct wmi_pdev_set_regdomain_cmd *cmd;
5276 struct sk_buff *skb;
5277
7aa7a72a 5278 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5279 if (!skb)
d7579d12 5280 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5281
5282 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
5283 cmd->reg_domain = __cpu_to_le32(rd);
5284 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
5285 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
5286 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
5287 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
5288
7aa7a72a 5289 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 5290 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
5291 rd, rd2g, rd5g, ctl2g, ctl5g);
d7579d12 5292 return skb;
5e3dd157
KV		 5293}
5294
d7579d12
MK		 5295static struct sk_buff *
5296ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
5297 rd5g, u16 ctl2g, u16 ctl5g,
5298 enum wmi_dfs_region dfs_reg)
821af6ae
MP		 5299{
5300 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
5301 struct sk_buff *skb;
5302
7aa7a72a 5303 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
821af6ae 5304 if (!skb)
d7579d12 5305 return ERR_PTR(-ENOMEM);
821af6ae
MP		 5306
5307 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
5308 cmd->reg_domain = __cpu_to_le32(rd);
5309 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
5310 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
5311 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
5312 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
5313 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
5314
7aa7a72a 5315 ath10k_dbg(ar, ATH10K_DBG_WMI,
821af6ae
MP		 5316 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
5317 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
d7579d12 5318 return skb;
821af6ae
MP		 5319}
5320
d7579d12
MK		 5321static struct sk_buff *
5322ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
5e3dd157
KV		 5323{
5324 struct wmi_pdev_suspend_cmd *cmd;
5325 struct sk_buff *skb;
5326
7aa7a72a 5327 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5328 if (!skb)
d7579d12 5329 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5330
5331 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
00f5482b 5332 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
5e3dd157 5333
d7579d12 5334 return skb;
5e3dd157
KV		 5335}
5336
d7579d12
MK		 5337static struct sk_buff *
5338ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
5e3dd157
KV		 5339{
5340 struct sk_buff *skb;
5341
7aa7a72a 5342 skb = ath10k_wmi_alloc_skb(ar, 0);
d7579d12
MK		 5343 if (!skb)
5344 return ERR_PTR(-ENOMEM);
5e3dd157 5345
d7579d12 5346 return skb;
5e3dd157
KV		 5347}
5348
d7579d12
MK		 5349static struct sk_buff *
5350ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV		 5351{
5352 struct wmi_pdev_set_param_cmd *cmd;
5353 struct sk_buff *skb;
5354
226a339b 5355 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
7aa7a72a
MK		 5356 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
5357 id);
d7579d12 5358 return ERR_PTR(-EOPNOTSUPP);
226a339b
BM		 5359 }
5360
7aa7a72a 5361 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5362 if (!skb)
d7579d12 5363 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5364
5365 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
5366 cmd->param_id = __cpu_to_le32(id);
5367 cmd->param_value = __cpu_to_le32(value);
5368
7aa7a72a 5369 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
5e3dd157 5370 id, value);
d7579d12 5371 return skb;
5e3dd157
KV		 5372}
5373
0226d602
MK		 5374void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
5375 struct wmi_host_mem_chunks *chunks)
cf9fca8f
MK		 5376{
5377 struct host_memory_chunk *chunk;
5378 int i;
5379
5380 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
5381
5382 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
5383 chunk = &chunks->items[i];
5384 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
5385 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
5386 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
5387
5388 ath10k_dbg(ar, ATH10K_DBG_WMI,
5389 "wmi chunk %d len %d requested, addr 0x%llx\n",
5390 i,
5391 ar->wmi.mem_chunks[i].len,
5392 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
5393 }
5394}
5395
d7579d12 5396static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
5e3dd157
KV		 5397{
5398 struct wmi_init_cmd *cmd;
5399 struct sk_buff *buf;
5400 struct wmi_resource_config config = {};
b3effe61 5401 u32 len, val;
5e3dd157
KV		 5402
5403 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
cfd1061e 5404 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
5e3dd157
KV		 5405 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
5406
5407 config.num_offload_reorder_bufs =
5408 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
5409
5410 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
5411 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
5412 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
5413 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
5414 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
5415 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5416 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5417 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5418 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
ccec9038 5419 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
5e3dd157
KV		 5420 config.scan_max_pending_reqs =
5421 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
5422
5423 config.bmiss_offload_max_vdev =
5424 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
5425
5426 config.roam_offload_max_vdev =
5427 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
5428
5429 config.roam_offload_max_ap_profiles =
5430 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
5431
5432 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
5433 config.num_mcast_table_elems =
5434 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
5435
5436 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
5437 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
5438 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
5439 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
5440 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
5441
5442 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
5443 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5444
5445 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
5446
5447 config.gtk_offload_max_vdev =
5448 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
5449
5450 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
5451 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
5452
b3effe61
BM		 5453 len = sizeof(*cmd) +
5454 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5455
7aa7a72a 5456 buf = ath10k_wmi_alloc_skb(ar, len);
5e3dd157 5457 if (!buf)
d7579d12 5458 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5459
5460 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61 5461
5e3dd157 5462 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 5463 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
5e3dd157 5464
7aa7a72a 5465 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
d7579d12 5466 return buf;
5e3dd157
KV		 5467}
5468
d7579d12 5469static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
12b2b9e3
BM		 5470{
5471 struct wmi_init_cmd_10x *cmd;
5472 struct sk_buff *buf;
5473 struct wmi_resource_config_10x config = {};
5474 u32 len, val;
12b2b9e3 5475
ec6a73f0
BM		 5476 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
5477 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
5478 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
5479 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
5480 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
5481 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
5482 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
5483 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5484 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5485 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5486 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
ccec9038 5487 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
12b2b9e3 5488 config.scan_max_pending_reqs =
ec6a73f0 5489 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM		 5490
5491 config.bmiss_offload_max_vdev =
ec6a73f0 5492 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 5493
5494 config.roam_offload_max_vdev =
ec6a73f0 5495 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 5496
5497 config.roam_offload_max_ap_profiles =
ec6a73f0 5498 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 5499
ec6a73f0 5500 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 5501 config.num_mcast_table_elems =
ec6a73f0 5502 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 5503
ec6a73f0
BM		 5504 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
5505 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
5506 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
5507 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
5508 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 5509
ec6a73f0 5510 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM		 5511 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5512
ec6a73f0 5513 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 5514
ec6a73f0
BM		 5515 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
5516 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM		 5517
5518 len = sizeof(*cmd) +
5519 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5520
7aa7a72a 5521 buf = ath10k_wmi_alloc_skb(ar, len);
12b2b9e3 5522 if (!buf)
d7579d12 5523 return ERR_PTR(-ENOMEM);
12b2b9e3
BM		 5524
5525 cmd = (struct wmi_init_cmd_10x *)buf->data;
5526
12b2b9e3 5527 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 5528 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
12b2b9e3 5529
7aa7a72a 5530 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
d7579d12 5531 return buf;
12b2b9e3
BM		 5532}
5533
d7579d12 5534static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
24c88f78
MK		 5535{
5536 struct wmi_init_cmd_10_2 *cmd;
5537 struct sk_buff *buf;
5538 struct wmi_resource_config_10x config = {};
b6c8e287 5539 u32 len, val, features;
24c88f78
MK		 5540
5541 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
24c88f78 5542 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
cc61a1bb
MSS		 5543
5544 if (ath10k_peer_stats_enabled(ar)) {
af9a6a3a
AK		 5545 config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
5546 config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
5547 } else {
5548 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
5549 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
5550 }
5551
24c88f78
MK		 5552 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
5553 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
5554 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
5555 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5556 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5557 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5558 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
ccec9038 5559 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
24c88f78
MK		 5560
5561 config.scan_max_pending_reqs =
5562 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
5563
5564 config.bmiss_offload_max_vdev =
5565 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
5566
5567 config.roam_offload_max_vdev =
5568 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
5569
5570 config.roam_offload_max_ap_profiles =
5571 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
5572
5573 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
5574 config.num_mcast_table_elems =
5575 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
5576
5577 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
5578 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
5579 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
f6603ff2 5580 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
24c88f78
MK		 5581 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
5582
5583 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
5584 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5585
5586 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
5587
5588 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
5589 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
5590
5591 len = sizeof(*cmd) +
5592 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5593
7aa7a72a 5594 buf = ath10k_wmi_alloc_skb(ar, len);
24c88f78 5595 if (!buf)
d7579d12 5596 return ERR_PTR(-ENOMEM);
24c88f78
MK		 5597
5598 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
5599
b6c8e287 5600 features = WMI_10_2_RX_BATCH_MODE;
844fa572
YL		 5601
5602 if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
5603 test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
de0c789b 5604 features |= WMI_10_2_COEX_GPIO;
844fa572 5605
cc61a1bb 5606 if (ath10k_peer_stats_enabled(ar))
de46c015
MSS		 5607 features |= WMI_10_2_PEER_STATS;
5608
b6c8e287
SM		 5609 cmd->resource_config.feature_mask = __cpu_to_le32(features);
5610
24c88f78 5611 memcpy(&cmd->resource_config.common, &config, sizeof(config));
cf9fca8f 5612 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
24c88f78 5613
7aa7a72a 5614 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
d7579d12 5615 return buf;
5e3dd157
KV		 5616}
5617
d1e52a8e
RM		 5618static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
5619{
5620 struct wmi_init_cmd_10_4 *cmd;
5621 struct sk_buff *buf;
5622 struct wmi_resource_config_10_4 config = {};
5623 u32 len;
5624
5625 config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
5626 config.num_peers = __cpu_to_le32(ar->max_num_peers);
5627 config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
5628 config.num_tids = __cpu_to_le32(ar->num_tids);
5629
5630 config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
5631 config.num_offload_reorder_buffs =
5632 __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
5633 config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
5634 config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
5699a6f2
RM		 5635 config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
5636 config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
d1e52a8e
RM		 5637
5638 config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5639 config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5640 config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5641 config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
5642
bc27e8cd 5643 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
d1e52a8e
RM		 5644 config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
5645 config.bmiss_offload_max_vdev =
5646 __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
5647 config.roam_offload_max_vdev =
5648 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
5649 config.roam_offload_max_ap_profiles =
5650 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
5651 config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
5652 config.num_mcast_table_elems =
5653 __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
5654
5655 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
5656 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
5657 config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
5658 config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
5659 config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
5660
5661 config.rx_skip_defrag_timeout_dup_detection_check =
5662 __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
5663
5664 config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
5665 config.gtk_offload_max_vdev =
5666 __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
5699a6f2 5667 config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
d1e52a8e
RM		 5668 config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
5669 config.max_peer_ext_stats =
5670 __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
5671 config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
5672
5673 config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
5674 config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
5675 config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
5676 config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
5677
5678 config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
5679 config.tt_support =
5680 __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
5681 config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
5682 config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
5683 config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
5684
5685 len = sizeof(*cmd) +
5686 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5687
5688 buf = ath10k_wmi_alloc_skb(ar, len);
5689 if (!buf)
5690 return ERR_PTR(-ENOMEM);
5691
5692 cmd = (struct wmi_init_cmd_10_4 *)buf->data;
5693 memcpy(&cmd->resource_config, &config, sizeof(config));
5694 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
5695
5696 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
5697 return buf;
5698}
5699
0226d602 5700int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
5e3dd157 5701{
a6aa5da3
MK		 5702 if (arg->ie_len && !arg->ie)
5703 return -EINVAL;
5704 if (arg->n_channels && !arg->channels)
5705 return -EINVAL;
5706 if (arg->n_ssids && !arg->ssids)
5707 return -EINVAL;
5708 if (arg->n_bssids && !arg->bssids)
5709 return -EINVAL;
5e3dd157 5710
a6aa5da3
MK		 5711 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
5712 return -EINVAL;
5713 if (arg->n_channels > ARRAY_SIZE(arg->channels))
5714 return -EINVAL;
5715 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
5716 return -EINVAL;
5717 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
5718 return -EINVAL;
5e3dd157 5719
a6aa5da3
MK		 5720 return 0;
5721}
5e3dd157 5722
a6aa5da3
MK		 5723static size_t
5724ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
5725{
5726 int len = 0;
5727
5728 if (arg->ie_len) {
5e3dd157
KV		 5729 len += sizeof(struct wmi_ie_data);
5730 len += roundup(arg->ie_len, 4);
5731 }
5732
5733 if (arg->n_channels) {
5e3dd157
KV		 5734 len += sizeof(struct wmi_chan_list);
5735 len += sizeof(__le32) * arg->n_channels;
5736 }
5737
5738 if (arg->n_ssids) {
5e3dd157
KV		 5739 len += sizeof(struct wmi_ssid_list);
5740 len += sizeof(struct wmi_ssid) * arg->n_ssids;
5741 }
5742
5743 if (arg->n_bssids) {
5e3dd157
KV		 5744 len += sizeof(struct wmi_bssid_list);
5745 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
5746 }
5747
5748 return len;
5749}
5750
0226d602
MK		 5751void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
5752 const struct wmi_start_scan_arg *arg)
5e3dd157 5753{
5e3dd157
KV		 5754 u32 scan_id;
5755 u32 scan_req_id;
5e3dd157
KV		 5756
5757 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
5758 scan_id |= arg->scan_id;
5759
5760 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
5761 scan_req_id |= arg->scan_req_id;
5762
a6aa5da3
MK		 5763 cmn->scan_id = __cpu_to_le32(scan_id);
5764 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
5765 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
5766 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
5767 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
5768 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
5769 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
5770 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
5771 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
5772 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
5773 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
5774 cmn->idle_time = __cpu_to_le32(arg->idle_time);
5775 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
5776 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
5777 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
5778}
5779
5780static void
5781ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
5782 const struct wmi_start_scan_arg *arg)
5783{
5784 struct wmi_ie_data *ie;
5785 struct wmi_chan_list *channels;
5786 struct wmi_ssid_list *ssids;
5787 struct wmi_bssid_list *bssids;
5788 void *ptr = tlvs->tlvs;
5789 int i;
5e3dd157
KV		 5790
5791 if (arg->n_channels) {
a6aa5da3 5792 channels = ptr;
5e3dd157
KV		 5793 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
5794 channels->num_chan = __cpu_to_le32(arg->n_channels);
5795
5796 for (i = 0; i < arg->n_channels; i++)
24c88f78
MK		 5797 channels->channel_list[i].freq =
5798 __cpu_to_le16(arg->channels[i]);
5e3dd157 5799
a6aa5da3
MK		 5800 ptr += sizeof(*channels);
5801 ptr += sizeof(__le32) * arg->n_channels;
5e3dd157
KV		 5802 }
5803
5804 if (arg->n_ssids) {
a6aa5da3 5805 ssids = ptr;
5e3dd157
KV		 5806 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
5807 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
5808
5809 for (i = 0; i < arg->n_ssids; i++) {
5810 ssids->ssids[i].ssid_len =
5811 __cpu_to_le32(arg->ssids[i].len);
5812 memcpy(&ssids->ssids[i].ssid,
5813 arg->ssids[i].ssid,
5814 arg->ssids[i].len);
5815 }
5816
a6aa5da3
MK		 5817 ptr += sizeof(*ssids);
5818 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
5e3dd157
KV		 5819 }
5820
5821 if (arg->n_bssids) {
a6aa5da3 5822 bssids = ptr;
5e3dd157
KV		 5823 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
5824 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
5825
5826 for (i = 0; i < arg->n_bssids; i++)
8f4ffb7d
KV		 5827 ether_addr_copy(bssids->bssid_list[i].addr,
5828 arg->bssids[i].bssid);
5e3dd157 5829
a6aa5da3
MK		 5830 ptr += sizeof(*bssids);
5831 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
5e3dd157
KV		 5832 }
5833
5834 if (arg->ie_len) {
a6aa5da3 5835 ie = ptr;
5e3dd157
KV		 5836 ie->tag = __cpu_to_le32(WMI_IE_TAG);
5837 ie->ie_len = __cpu_to_le32(arg->ie_len);
5838 memcpy(ie->ie_data, arg->ie, arg->ie_len);
5839
a6aa5da3
MK		 5840 ptr += sizeof(*ie);
5841 ptr += roundup(arg->ie_len, 4);
5e3dd157 5842 }
a6aa5da3 5843}
5e3dd157 5844
d7579d12
MK		 5845static struct sk_buff *
5846ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
5847 const struct wmi_start_scan_arg *arg)
a6aa5da3 5848{
d7579d12 5849 struct wmi_start_scan_cmd *cmd;
a6aa5da3
MK		 5850 struct sk_buff *skb;
5851 size_t len;
5852 int ret;
5853
5854 ret = ath10k_wmi_start_scan_verify(arg);
5855 if (ret)
d7579d12 5856 return ERR_PTR(ret);
a6aa5da3 5857
d7579d12 5858 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
a6aa5da3
MK		 5859 skb = ath10k_wmi_alloc_skb(ar, len);
5860 if (!skb)
d7579d12 5861 return ERR_PTR(-ENOMEM);
a6aa5da3 5862
d7579d12 5863 cmd = (struct wmi_start_scan_cmd *)skb->data;
a6aa5da3 5864
d7579d12
MK		 5865 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
5866 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
a6aa5da3 5867
d7579d12 5868 cmd->burst_duration_ms = __cpu_to_le32(0);
5e3dd157 5869
7aa7a72a 5870 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
d7579d12
MK		 5871 return skb;
5872}
5873
5874static struct sk_buff *
5875ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
5876 const struct wmi_start_scan_arg *arg)
5877{
5878 struct wmi_10x_start_scan_cmd *cmd;
5879 struct sk_buff *skb;
5880 size_t len;
5881 int ret;
5882
5883 ret = ath10k_wmi_start_scan_verify(arg);
5884 if (ret)
5885 return ERR_PTR(ret);
5886
5887 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
5888 skb = ath10k_wmi_alloc_skb(ar, len);
5889 if (!skb)
5890 return ERR_PTR(-ENOMEM);
5891
5892 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
5893
5894 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
5895 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
5896
5897 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
5898 return skb;
5e3dd157
KV		 5899}
5900
5901void ath10k_wmi_start_scan_init(struct ath10k *ar,
5902 struct wmi_start_scan_arg *arg)
5903{
5904 /* setup commonly used values */
5905 arg->scan_req_id = 1;
5906 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
5907 arg->dwell_time_active = 50;
5908 arg->dwell_time_passive = 150;
5909 arg->min_rest_time = 50;
5910 arg->max_rest_time = 500;
5911 arg->repeat_probe_time = 0;
5912 arg->probe_spacing_time = 0;
5913 arg->idle_time = 0;
c322892f 5914 arg->max_scan_time = 20000;
5e3dd157
KV		 5915 arg->probe_delay = 5;
5916 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
5917 | WMI_SCAN_EVENT_COMPLETED
5918 | WMI_SCAN_EVENT_BSS_CHANNEL
5919 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
5920 | WMI_SCAN_EVENT_DEQUEUED;
5e3dd157
KV		 5921 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
5922 arg->n_bssids = 1;
5923 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
5924}
5925
d7579d12
MK		 5926static struct sk_buff *
5927ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
5928 const struct wmi_stop_scan_arg *arg)
5e3dd157
KV		 5929{
5930 struct wmi_stop_scan_cmd *cmd;
5931 struct sk_buff *skb;
5932 u32 scan_id;
5933 u32 req_id;
5934
5935 if (arg->req_id > 0xFFF)
d7579d12 5936 return ERR_PTR(-EINVAL);
5e3dd157 5937 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
d7579d12 5938 return ERR_PTR(-EINVAL);
5e3dd157 5939
7aa7a72a 5940 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5941 if (!skb)
d7579d12 5942 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5943
5944 scan_id = arg->u.scan_id;
5945 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
5946
5947 req_id = arg->req_id;
5948 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
5949
5950 cmd = (struct wmi_stop_scan_cmd *)skb->data;
5951 cmd->req_type = __cpu_to_le32(arg->req_type);
5952 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
5953 cmd->scan_id = __cpu_to_le32(scan_id);
5954 cmd->scan_req_id = __cpu_to_le32(req_id);
5955
7aa7a72a 5956 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 5957 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
5958 arg->req_id, arg->req_type, arg->u.scan_id);
d7579d12 5959 return skb;
5e3dd157
KV		 5960}
5961
d7579d12
MK		 5962static struct sk_buff *
5963ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
5964 enum wmi_vdev_type type,
5965 enum wmi_vdev_subtype subtype,
5966 const u8 macaddr[ETH_ALEN])
5e3dd157
KV		 5967{
5968 struct wmi_vdev_create_cmd *cmd;
5969 struct sk_buff *skb;
5970
7aa7a72a 5971 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5972 if (!skb)
d7579d12 5973 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5974
5975 cmd = (struct wmi_vdev_create_cmd *)skb->data;
5976 cmd->vdev_id = __cpu_to_le32(vdev_id);
5977 cmd->vdev_type = __cpu_to_le32(type);
5978 cmd->vdev_subtype = __cpu_to_le32(subtype);
b25f32cb 5979 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
5e3dd157 5980
7aa7a72a 5981 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 5982 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
5983 vdev_id, type, subtype, macaddr);
d7579d12 5984 return skb;
5e3dd157
KV		 5985}
5986
d7579d12
MK		 5987static struct sk_buff *
5988ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 5989{
5990 struct wmi_vdev_delete_cmd *cmd;
5991 struct sk_buff *skb;
5992
7aa7a72a 5993 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5994 if (!skb)
d7579d12 5995 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5996
5997 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
5998 cmd->vdev_id = __cpu_to_le32(vdev_id);
5999
7aa7a72a 6000 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157 6001 "WMI vdev delete id %d\n", vdev_id);
d7579d12 6002 return skb;
5e3dd157
KV		 6003}
6004
d7579d12
MK		 6005static struct sk_buff *
6006ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
6007 const struct wmi_vdev_start_request_arg *arg,
6008 bool restart)
5e3dd157
KV		 6009{
6010 struct wmi_vdev_start_request_cmd *cmd;
6011 struct sk_buff *skb;
6012 const char *cmdname;
6013 u32 flags = 0;
6014
5e3dd157 6015 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
d7579d12 6016 return ERR_PTR(-EINVAL);
5e3dd157 6017 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
d7579d12 6018 return ERR_PTR(-EINVAL);
5e3dd157 6019
d7579d12 6020 if (restart)
5e3dd157
KV		 6021 cmdname = "restart";
6022 else
d7579d12 6023 cmdname = "start";
5e3dd157 6024
7aa7a72a 6025 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6026 if (!skb)
d7579d12 6027 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6028
6029 if (arg->hidden_ssid)
6030 flags |= WMI_VDEV_START_HIDDEN_SSID;
6031 if (arg->pmf_enabled)
6032 flags |= WMI_VDEV_START_PMF_ENABLED;
6033
6034 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
6035 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6036 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
6037 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
6038 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
6039 cmd->flags = __cpu_to_le32(flags);
6040 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
6041 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
6042
6043 if (arg->ssid) {
6044 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
6045 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
6046 }
6047
2d66721c 6048 ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
5e3dd157 6049
7aa7a72a 6050 ath10k_dbg(ar, ATH10K_DBG_WMI,
8cc7f26c
KV		 6051 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
6052 cmdname, arg->vdev_id,
e8a50f8b
MP		 6053 flags, arg->channel.freq, arg->channel.mode,
6054 cmd->chan.flags, arg->channel.max_power);
5e3dd157 6055
d7579d12 6056 return skb;
5e3dd157
KV		 6057}
6058
d7579d12
MK		 6059static struct sk_buff *
6060ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 6061{
6062 struct wmi_vdev_stop_cmd *cmd;
6063 struct sk_buff *skb;
6064
7aa7a72a 6065 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6066 if (!skb)
d7579d12 6067 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6068
6069 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
6070 cmd->vdev_id = __cpu_to_le32(vdev_id);
6071
7aa7a72a 6072 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
d7579d12 6073 return skb;
5e3dd157
KV		 6074}
6075
d7579d12
MK		 6076static struct sk_buff *
6077ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
6078 const u8 *bssid)
5e3dd157
KV		 6079{
6080 struct wmi_vdev_up_cmd *cmd;
6081 struct sk_buff *skb;
6082
7aa7a72a 6083 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6084 if (!skb)
d7579d12 6085 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6086
6087 cmd = (struct wmi_vdev_up_cmd *)skb->data;
6088 cmd->vdev_id = __cpu_to_le32(vdev_id);
6089 cmd->vdev_assoc_id = __cpu_to_le32(aid);
b25f32cb 6090 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
5e3dd157 6091
7aa7a72a 6092 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6093 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
6094 vdev_id, aid, bssid);
d7579d12 6095 return skb;
5e3dd157
KV		 6096}
6097
d7579d12
MK		 6098static struct sk_buff *
6099ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 6100{
6101 struct wmi_vdev_down_cmd *cmd;
6102 struct sk_buff *skb;
6103
7aa7a72a 6104 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6105 if (!skb)
d7579d12 6106 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6107
6108 cmd = (struct wmi_vdev_down_cmd *)skb->data;
6109 cmd->vdev_id = __cpu_to_le32(vdev_id);
6110
7aa7a72a 6111 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157 6112 "wmi mgmt vdev down id 0x%x\n", vdev_id);
d7579d12 6113 return skb;
5e3dd157
KV		 6114}
6115
d7579d12
MK		 6116static struct sk_buff *
6117ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
6118 u32 param_id, u32 param_value)
5e3dd157
KV		 6119{
6120 struct wmi_vdev_set_param_cmd *cmd;
6121 struct sk_buff *skb;
6122
6d1506e7 6123 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7aa7a72a 6124 ath10k_dbg(ar, ATH10K_DBG_WMI,
6d1506e7
BM		 6125 "vdev param %d not supported by firmware\n",
6126 param_id);
d7579d12 6127 return ERR_PTR(-EOPNOTSUPP);
6d1506e7
BM		 6128 }
6129
7aa7a72a 6130 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6131 if (!skb)
d7579d12 6132 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6133
6134 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
6135 cmd->vdev_id = __cpu_to_le32(vdev_id);
6136 cmd->param_id = __cpu_to_le32(param_id);
6137 cmd->param_value = __cpu_to_le32(param_value);
6138
7aa7a72a 6139 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6140 "wmi vdev id 0x%x set param %d value %d\n",
6141 vdev_id, param_id, param_value);
d7579d12 6142 return skb;
5e3dd157
KV		 6143}
6144
d7579d12
MK		 6145static struct sk_buff *
6146ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
6147 const struct wmi_vdev_install_key_arg *arg)
5e3dd157
KV		 6148{
6149 struct wmi_vdev_install_key_cmd *cmd;
6150 struct sk_buff *skb;
6151
6152 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
d7579d12 6153 return ERR_PTR(-EINVAL);
5e3dd157 6154 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
d7579d12 6155 return ERR_PTR(-EINVAL);
5e3dd157 6156
7aa7a72a 6157 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
5e3dd157 6158 if (!skb)
d7579d12 6159 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6160
6161 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
6162 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6163 cmd->key_idx = __cpu_to_le32(arg->key_idx);
6164 cmd->key_flags = __cpu_to_le32(arg->key_flags);
6165 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
6166 cmd->key_len = __cpu_to_le32(arg->key_len);
6167 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
6168 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
6169
6170 if (arg->macaddr)
b25f32cb 6171 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
5e3dd157
KV		 6172 if (arg->key_data)
6173 memcpy(cmd->key_data, arg->key_data, arg->key_len);
6174
7aa7a72a 6175 ath10k_dbg(ar, ATH10K_DBG_WMI,
e0c508ab
MK		 6176 "wmi vdev install key idx %d cipher %d len %d\n",
6177 arg->key_idx, arg->key_cipher, arg->key_len);
d7579d12 6178 return skb;
5e3dd157
KV		 6179}
6180
d7579d12
MK		 6181static struct sk_buff *
6182ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
6183 const struct wmi_vdev_spectral_conf_arg *arg)
855aed12
SW		 6184{
6185 struct wmi_vdev_spectral_conf_cmd *cmd;
6186 struct sk_buff *skb;
855aed12 6187
7aa7a72a 6188 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12 6189 if (!skb)
d7579d12 6190 return ERR_PTR(-ENOMEM);
855aed12
SW		 6191
6192 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
6193 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6194 cmd->scan_count = __cpu_to_le32(arg->scan_count);
6195 cmd->scan_period = __cpu_to_le32(arg->scan_period);
6196 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
6197 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
6198 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
6199 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
6200 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
6201 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
6202 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
6203 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
6204 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
6205 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
6206 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
6207 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
6208 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
6209 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
6210 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
6211 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
6212
d7579d12 6213 return skb;
855aed12
SW		 6214}
6215
d7579d12
MK		 6216static struct sk_buff *
6217ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
6218 u32 trigger, u32 enable)
855aed12
SW		 6219{
6220 struct wmi_vdev_spectral_enable_cmd *cmd;
6221 struct sk_buff *skb;
855aed12 6222
7aa7a72a 6223 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12 6224 if (!skb)
d7579d12 6225 return ERR_PTR(-ENOMEM);
855aed12
SW		 6226
6227 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
6228 cmd->vdev_id = __cpu_to_le32(vdev_id);
6229 cmd->trigger_cmd = __cpu_to_le32(trigger);
6230 cmd->enable_cmd = __cpu_to_le32(enable);
6231
d7579d12 6232 return skb;
855aed12
SW		 6233}
6234
d7579d12
MK		 6235static struct sk_buff *
6236ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
7390ed34
MP		 6237 const u8 peer_addr[ETH_ALEN],
6238 enum wmi_peer_type peer_type)
5e3dd157
KV		 6239{
6240 struct wmi_peer_create_cmd *cmd;
6241 struct sk_buff *skb;
6242
7aa7a72a 6243 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6244 if (!skb)
d7579d12 6245 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6246
6247 cmd = (struct wmi_peer_create_cmd *)skb->data;
6248 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 6249 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6250
7aa7a72a 6251 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6252 "wmi peer create vdev_id %d peer_addr %pM\n",
6253 vdev_id, peer_addr);
d7579d12 6254 return skb;
5e3dd157
KV		 6255}
6256
d7579d12
MK		 6257static struct sk_buff *
6258ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
6259 const u8 peer_addr[ETH_ALEN])
5e3dd157
KV		 6260{
6261 struct wmi_peer_delete_cmd *cmd;
6262 struct sk_buff *skb;
6263
7aa7a72a 6264 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6265 if (!skb)
d7579d12 6266 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6267
6268 cmd = (struct wmi_peer_delete_cmd *)skb->data;
6269 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 6270 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6271
7aa7a72a 6272 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6273 "wmi peer delete vdev_id %d peer_addr %pM\n",
6274 vdev_id, peer_addr);
d7579d12 6275 return skb;
5e3dd157
KV		 6276}
6277
d7579d12
MK		 6278static struct sk_buff *
6279ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
6280 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
5e3dd157
KV		 6281{
6282 struct wmi_peer_flush_tids_cmd *cmd;
6283 struct sk_buff *skb;
6284
7aa7a72a 6285 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6286 if (!skb)
d7579d12 6287 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6288
6289 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
6290 cmd->vdev_id = __cpu_to_le32(vdev_id);
6291 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
b25f32cb 6292 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6293
7aa7a72a 6294 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6295 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
6296 vdev_id, peer_addr, tid_bitmap);
d7579d12 6297 return skb;
5e3dd157
KV		 6298}
6299
d7579d12
MK		 6300static struct sk_buff *
6301ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
6302 const u8 *peer_addr,
6303 enum wmi_peer_param param_id,
6304 u32 param_value)
5e3dd157
KV		 6305{
6306 struct wmi_peer_set_param_cmd *cmd;
6307 struct sk_buff *skb;
6308
7aa7a72a 6309 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6310 if (!skb)
d7579d12 6311 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6312
6313 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
6314 cmd->vdev_id = __cpu_to_le32(vdev_id);
6315 cmd->param_id = __cpu_to_le32(param_id);
6316 cmd->param_value = __cpu_to_le32(param_value);
b25f32cb 6317 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6318
7aa7a72a 6319 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6320 "wmi vdev %d peer 0x%pM set param %d value %d\n",
6321 vdev_id, peer_addr, param_id, param_value);
d7579d12 6322 return skb;
5e3dd157
KV		 6323}
6324
d7579d12
MK		 6325static struct sk_buff *
6326ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
6327 enum wmi_sta_ps_mode psmode)
5e3dd157
KV		 6328{
6329 struct wmi_sta_powersave_mode_cmd *cmd;
6330 struct sk_buff *skb;
6331
7aa7a72a 6332 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6333 if (!skb)
d7579d12 6334 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6335
6336 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
6337 cmd->vdev_id = __cpu_to_le32(vdev_id);
6338 cmd->sta_ps_mode = __cpu_to_le32(psmode);
6339
7aa7a72a 6340 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6341 "wmi set powersave id 0x%x mode %d\n",
6342 vdev_id, psmode);
d7579d12 6343 return skb;
5e3dd157
KV		 6344}
6345
d7579d12
MK		 6346static struct sk_buff *
6347ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
6348 enum wmi_sta_powersave_param param_id,
6349 u32 value)
5e3dd157
KV		 6350{
6351 struct wmi_sta_powersave_param_cmd *cmd;
6352 struct sk_buff *skb;
6353
7aa7a72a 6354 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6355 if (!skb)
d7579d12 6356 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6357
6358 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
6359 cmd->vdev_id = __cpu_to_le32(vdev_id);
6360 cmd->param_id = __cpu_to_le32(param_id);
6361 cmd->param_value = __cpu_to_le32(value);
6362
7aa7a72a 6363 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6364 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
6365 vdev_id, param_id, value);
d7579d12 6366 return skb;
5e3dd157
KV		 6367}
6368
d7579d12
MK		 6369static struct sk_buff *
6370ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6371 enum wmi_ap_ps_peer_param param_id, u32 value)
5e3dd157
KV		 6372{
6373 struct wmi_ap_ps_peer_cmd *cmd;
6374 struct sk_buff *skb;
6375
6376 if (!mac)
d7579d12 6377 return ERR_PTR(-EINVAL);
5e3dd157 6378
7aa7a72a 6379 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6380 if (!skb)
d7579d12 6381 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6382
6383 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
6384 cmd->vdev_id = __cpu_to_le32(vdev_id);
6385 cmd->param_id = __cpu_to_le32(param_id);
6386 cmd->param_value = __cpu_to_le32(value);
b25f32cb 6387 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5e3dd157 6388
7aa7a72a 6389 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6390 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
6391 vdev_id, param_id, value, mac);
d7579d12 6392 return skb;
5e3dd157
KV		 6393}
6394
d7579d12
MK		 6395static struct sk_buff *
6396ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
6397 const struct wmi_scan_chan_list_arg *arg)
5e3dd157
KV		 6398{
6399 struct wmi_scan_chan_list_cmd *cmd;
6400 struct sk_buff *skb;
6401 struct wmi_channel_arg *ch;
6402 struct wmi_channel *ci;
6403 int len;
6404 int i;
6405
6406 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
6407
7aa7a72a 6408 skb = ath10k_wmi_alloc_skb(ar, len);
5e3dd157 6409 if (!skb)
d7579d12 6410 return ERR_PTR(-EINVAL);
5e3dd157
KV		 6411
6412 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
6413 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
6414
6415 for (i = 0; i < arg->n_channels; i++) {
5e3dd157
KV		 6416 ch = &arg->channels[i];
6417 ci = &cmd->chan_info[i];
6418
2d66721c 6419 ath10k_wmi_put_wmi_channel(ci, ch);
5e3dd157
KV		 6420 }
6421
d7579d12 6422 return skb;
5e3dd157
KV		 6423}
6424
24c88f78
MK		 6425static void
6426ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
6427 const struct wmi_peer_assoc_complete_arg *arg)
5e3dd157 6428{
24c88f78 6429 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
5e3dd157 6430
5e3dd157
KV		 6431 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6432 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
6433 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
6434 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
6435 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
6436 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
6437 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
6438 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
6439 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
6440 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
6441 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
6442 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
6443 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
6444
b25f32cb 6445 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
5e3dd157
KV		 6446
6447 cmd->peer_legacy_rates.num_rates =
6448 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
6449 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
6450 arg->peer_legacy_rates.num_rates);
6451
6452 cmd->peer_ht_rates.num_rates =
6453 __cpu_to_le32(arg->peer_ht_rates.num_rates);
6454 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
6455 arg->peer_ht_rates.num_rates);
6456
6457 cmd->peer_vht_rates.rx_max_rate =
6458 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
6459 cmd->peer_vht_rates.rx_mcs_set =
6460 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
6461 cmd->peer_vht_rates.tx_max_rate =
6462 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
6463 cmd->peer_vht_rates.tx_mcs_set =
6464 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
24c88f78
MK		 6465}
6466
6467static void
6468ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
6469 const struct wmi_peer_assoc_complete_arg *arg)
6470{
6471 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
6472
6473 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6474 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
6475}
6476
6477static void
6478ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
6479 const struct wmi_peer_assoc_complete_arg *arg)
6480{
6481 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6482}
6483
6484static void
6485ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
6486 const struct wmi_peer_assoc_complete_arg *arg)
6487{
6488 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
6489 int max_mcs, max_nss;
6490 u32 info0;
6491
6492 /* TODO: Is using max values okay with firmware? */
6493 max_mcs = 0xf;
6494 max_nss = 0xf;
6495
6496 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
6497 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
6498
6499 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6500 cmd->info0 = __cpu_to_le32(info0);
6501}
6502
b54e16f1
VT		 6503static void
6504ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
6505 const struct wmi_peer_assoc_complete_arg *arg)
6506{
6507 struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
6508
6509 ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
6510 cmd->peer_bw_rxnss_override = 0;
6511}
6512
d7579d12
MK		 6513static int
6514ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
24c88f78 6515{
24c88f78
MK		 6516 if (arg->peer_mpdu_density > 16)
6517 return -EINVAL;
6518 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
6519 return -EINVAL;
6520 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
6521 return -EINVAL;
6522
d7579d12
MK		 6523 return 0;
6524}
6525
6526static struct sk_buff *
6527ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
6528 const struct wmi_peer_assoc_complete_arg *arg)
6529{
6530 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
6531 struct sk_buff *skb;
6532 int ret;
6533
6534 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6535 if (ret)
6536 return ERR_PTR(ret);
24c88f78 6537
7aa7a72a 6538 skb = ath10k_wmi_alloc_skb(ar, len);
24c88f78 6539 if (!skb)
d7579d12 6540 return ERR_PTR(-ENOMEM);
24c88f78 6541
d7579d12
MK		 6542 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
6543
6544 ath10k_dbg(ar, ATH10K_DBG_WMI,
6545 "wmi peer assoc vdev %d addr %pM (%s)\n",
6546 arg->vdev_id, arg->addr,
6547 arg->peer_reassoc ? "reassociate" : "new");
6548 return skb;
6549}
6550
6551static struct sk_buff *
6552ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
6553 const struct wmi_peer_assoc_complete_arg *arg)
6554{
6555 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
6556 struct sk_buff *skb;
6557 int ret;
6558
6559 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6560 if (ret)
6561 return ERR_PTR(ret);
6562
6563 skb = ath10k_wmi_alloc_skb(ar, len);
6564 if (!skb)
6565 return ERR_PTR(-ENOMEM);
6566
6567 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
6568
6569 ath10k_dbg(ar, ATH10K_DBG_WMI,
6570 "wmi peer assoc vdev %d addr %pM (%s)\n",
6571 arg->vdev_id, arg->addr,
6572 arg->peer_reassoc ? "reassociate" : "new");
6573 return skb;
6574}
6575
6576static struct sk_buff *
6577ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
6578 const struct wmi_peer_assoc_complete_arg *arg)
6579{
6580 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
6581 struct sk_buff *skb;
6582 int ret;
6583
6584 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6585 if (ret)
6586 return ERR_PTR(ret);
6587
6588 skb = ath10k_wmi_alloc_skb(ar, len);
6589 if (!skb)
6590 return ERR_PTR(-ENOMEM);
6591
6592 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
5e3dd157 6593
7aa7a72a 6594 ath10k_dbg(ar, ATH10K_DBG_WMI,
44d6fa90
CYY		 6595 "wmi peer assoc vdev %d addr %pM (%s)\n",
6596 arg->vdev_id, arg->addr,
6597 arg->peer_reassoc ? "reassociate" : "new");
d7579d12 6598 return skb;
5e3dd157
KV		 6599}
6600
b54e16f1
VT		 6601static struct sk_buff *
6602ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
6603 const struct wmi_peer_assoc_complete_arg *arg)
6604{
6605 size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
6606 struct sk_buff *skb;
6607 int ret;
6608
6609 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6610 if (ret)
6611 return ERR_PTR(ret);
6612
6613 skb = ath10k_wmi_alloc_skb(ar, len);
6614 if (!skb)
6615 return ERR_PTR(-ENOMEM);
6616
6617 ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
6618
6619 ath10k_dbg(ar, ATH10K_DBG_WMI,
6620 "wmi peer assoc vdev %d addr %pM (%s)\n",
6621 arg->vdev_id, arg->addr,
6622 arg->peer_reassoc ? "reassociate" : "new");
6623 return skb;
6624}
6625
a57a6a27
RM		 6626static struct sk_buff *
6627ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
6628{
6629 struct sk_buff *skb;
6630
6631 skb = ath10k_wmi_alloc_skb(ar, 0);
6632 if (!skb)
6633 return ERR_PTR(-ENOMEM);
6634
6635 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
6636 return skb;
6637}
6638
748afc47 6639/* This function assumes the beacon is already DMA mapped */
d7579d12 6640static struct sk_buff *
9ad50182
MK		 6641ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
6642 size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
6643 bool deliver_cab)
5e3dd157 6644{
748afc47 6645 struct wmi_bcn_tx_ref_cmd *cmd;
5e3dd157 6646 struct sk_buff *skb;
748afc47 6647 struct ieee80211_hdr *hdr;
748afc47 6648 u16 fc;
5e3dd157 6649
7aa7a72a 6650 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6651 if (!skb)
d7579d12 6652 return ERR_PTR(-ENOMEM);
5e3dd157 6653
9ad50182 6654 hdr = (struct ieee80211_hdr *)bcn;
748afc47
MK		 6655 fc = le16_to_cpu(hdr->frame_control);
6656
6657 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
9ad50182
MK		 6658 cmd->vdev_id = __cpu_to_le32(vdev_id);
6659 cmd->data_len = __cpu_to_le32(bcn_len);
6660 cmd->data_ptr = __cpu_to_le32(bcn_paddr);
748afc47
MK		 6661 cmd->msdu_id = 0;
6662 cmd->frame_control = __cpu_to_le32(fc);
6663 cmd->flags = 0;
24c88f78 6664 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
748afc47 6665
9ad50182 6666 if (dtim_zero)
748afc47
MK		 6667 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
6668
9ad50182 6669 if (deliver_cab)
748afc47
MK		 6670 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
6671
d7579d12 6672 return skb;
5e3dd157
KV		 6673}
6674
5e752e42
MK		 6675void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
6676 const struct wmi_wmm_params_arg *arg)
5e3dd157
KV		 6677{
6678 params->cwmin = __cpu_to_le32(arg->cwmin);
6679 params->cwmax = __cpu_to_le32(arg->cwmax);
6680 params->aifs = __cpu_to_le32(arg->aifs);
6681 params->txop = __cpu_to_le32(arg->txop);
6682 params->acm = __cpu_to_le32(arg->acm);
6683 params->no_ack = __cpu_to_le32(arg->no_ack);
6684}
6685
d7579d12
MK		 6686static struct sk_buff *
6687ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
5e752e42 6688 const struct wmi_wmm_params_all_arg *arg)
5e3dd157
KV		 6689{
6690 struct wmi_pdev_set_wmm_params *cmd;
6691 struct sk_buff *skb;
6692
7aa7a72a 6693 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6694 if (!skb)
d7579d12 6695 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6696
6697 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
5e752e42
MK		 6698 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
6699 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
6700 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
6701 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
5e3dd157 6702
7aa7a72a 6703 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
d7579d12 6704 return skb;
5e3dd157
KV		 6705}
6706
d7579d12 6707static struct sk_buff *
de23d3ef 6708ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
5e3dd157
KV		 6709{
6710 struct wmi_request_stats_cmd *cmd;
6711 struct sk_buff *skb;
6712
7aa7a72a 6713 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6714 if (!skb)
d7579d12 6715 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6716
6717 cmd = (struct wmi_request_stats_cmd *)skb->data;
de23d3ef 6718 cmd->stats_id = __cpu_to_le32(stats_mask);
5e3dd157 6719
de23d3ef
MK		 6720 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
6721 stats_mask);
d7579d12 6722 return skb;
5e3dd157 6723}
9cfbce75 6724
d7579d12
MK		 6725static struct sk_buff *
6726ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
6727 enum wmi_force_fw_hang_type type, u32 delay_ms)
9cfbce75
MK		 6728{
6729 struct wmi_force_fw_hang_cmd *cmd;
6730 struct sk_buff *skb;
6731
7aa7a72a 6732 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9cfbce75 6733 if (!skb)
d7579d12 6734 return ERR_PTR(-ENOMEM);
9cfbce75
MK		 6735
6736 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
6737 cmd->type = __cpu_to_le32(type);
6738 cmd->delay_ms = __cpu_to_le32(delay_ms);
6739
7aa7a72a 6740 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
9cfbce75 6741 type, delay_ms);
d7579d12 6742 return skb;
9cfbce75 6743}
f118a3e5 6744
d7579d12 6745static struct sk_buff *
467210a6
SJ		 6746ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable,
6747 u32 log_level)
f118a3e5
KV		 6748{
6749 struct wmi_dbglog_cfg_cmd *cmd;
6750 struct sk_buff *skb;
6751 u32 cfg;
6752
7aa7a72a 6753 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
f118a3e5 6754 if (!skb)
d7579d12 6755 return ERR_PTR(-ENOMEM);
f118a3e5
KV		 6756
6757 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
6758
6759 if (module_enable) {
467210a6 6760 cfg = SM(log_level,
f118a3e5
KV		 6761 ATH10K_DBGLOG_CFG_LOG_LVL);
6762 } else {
6763 /* set back defaults, all modules with WARN level */
6764 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
6765 ATH10K_DBGLOG_CFG_LOG_LVL);
6766 module_enable = ~0;
6767 }
6768
6769 cmd->module_enable = __cpu_to_le32(module_enable);
6770 cmd->module_valid = __cpu_to_le32(~0);
6771 cmd->config_enable = __cpu_to_le32(cfg);
6772 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
6773
7aa7a72a 6774 ath10k_dbg(ar, ATH10K_DBG_WMI,
f118a3e5
KV		 6775 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
6776 __le32_to_cpu(cmd->module_enable),
6777 __le32_to_cpu(cmd->module_valid),
6778 __le32_to_cpu(cmd->config_enable),
6779 __le32_to_cpu(cmd->config_valid));
d7579d12 6780 return skb;
f118a3e5 6781}
b79b9baa 6782
d7579d12
MK		 6783static struct sk_buff *
6784ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
90174455
RM		 6785{
6786 struct wmi_pdev_pktlog_enable_cmd *cmd;
6787 struct sk_buff *skb;
6788
6789 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6790 if (!skb)
d7579d12 6791 return ERR_PTR(-ENOMEM);
90174455
RM		 6792
6793 ev_bitmap &= ATH10K_PKTLOG_ANY;
90174455
RM		 6794
6795 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
6796 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
d7579d12
MK		 6797
6798 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
6799 ev_bitmap);
6800 return skb;
90174455
RM		 6801}
6802
d7579d12
MK		 6803static struct sk_buff *
6804ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
90174455
RM		 6805{
6806 struct sk_buff *skb;
6807
6808 skb = ath10k_wmi_alloc_skb(ar, 0);
6809 if (!skb)
d7579d12 6810 return ERR_PTR(-ENOMEM);
90174455
RM		 6811
6812 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
d7579d12 6813 return skb;
90174455
RM		 6814}
6815
ffdd738d
RM		 6816static struct sk_buff *
6817ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
6818 u32 duration, u32 next_offset,
6819 u32 enabled)
6820{
6821 struct wmi_pdev_set_quiet_cmd *cmd;
6822 struct sk_buff *skb;
6823
6824 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6825 if (!skb)
6826 return ERR_PTR(-ENOMEM);
6827
6828 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
6829 cmd->period = __cpu_to_le32(period);
6830 cmd->duration = __cpu_to_le32(duration);
6831 cmd->next_start = __cpu_to_le32(next_offset);
6832 cmd->enabled = __cpu_to_le32(enabled);
6833
6834 ath10k_dbg(ar, ATH10K_DBG_WMI,
6835 "wmi quiet param: period %u duration %u enabled %d\n",
6836 period, duration, enabled);
6837 return skb;
6838}
6839
dc8ab278
RM		 6840static struct sk_buff *
6841ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
6842 const u8 *mac)
6843{
6844 struct wmi_addba_clear_resp_cmd *cmd;
6845 struct sk_buff *skb;
6846
6847 if (!mac)
6848 return ERR_PTR(-EINVAL);
6849
6850 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6851 if (!skb)
6852 return ERR_PTR(-ENOMEM);
6853
6854 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
6855 cmd->vdev_id = __cpu_to_le32(vdev_id);
6856 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6857
6858 ath10k_dbg(ar, ATH10K_DBG_WMI,
6859 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
6860 vdev_id, mac);
6861 return skb;
6862}
6863
65c0893d
RM		 6864static struct sk_buff *
6865ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6866 u32 tid, u32 buf_size)
6867{
6868 struct wmi_addba_send_cmd *cmd;
6869 struct sk_buff *skb;
6870
6871 if (!mac)
6872 return ERR_PTR(-EINVAL);
6873
6874 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6875 if (!skb)
6876 return ERR_PTR(-ENOMEM);
6877
6878 cmd = (struct wmi_addba_send_cmd *)skb->data;
6879 cmd->vdev_id = __cpu_to_le32(vdev_id);
6880 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6881 cmd->tid = __cpu_to_le32(tid);
6882 cmd->buffersize = __cpu_to_le32(buf_size);
6883
6884 ath10k_dbg(ar, ATH10K_DBG_WMI,
6885 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
6886 vdev_id, mac, tid, buf_size);
6887 return skb;
6888}
6889
11597413
RM		 6890static struct sk_buff *
6891ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6892 u32 tid, u32 status)
6893{
6894 struct wmi_addba_setresponse_cmd *cmd;
6895 struct sk_buff *skb;
6896
6897 if (!mac)
6898 return ERR_PTR(-EINVAL);
6899
6900 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6901 if (!skb)
6902 return ERR_PTR(-ENOMEM);
6903
6904 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
6905 cmd->vdev_id = __cpu_to_le32(vdev_id);
6906 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6907 cmd->tid = __cpu_to_le32(tid);
6908 cmd->statuscode = __cpu_to_le32(status);
6909
6910 ath10k_dbg(ar, ATH10K_DBG_WMI,
6911 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
6912 vdev_id, mac, tid, status);
6913 return skb;
6914}
6915
50abef85
RM		 6916static struct sk_buff *
6917ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6918 u32 tid, u32 initiator, u32 reason)
6919{
6920 struct wmi_delba_send_cmd *cmd;
6921 struct sk_buff *skb;
6922
6923 if (!mac)
6924 return ERR_PTR(-EINVAL);
6925
6926 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6927 if (!skb)
6928 return ERR_PTR(-ENOMEM);
6929
6930 cmd = (struct wmi_delba_send_cmd *)skb->data;
6931 cmd->vdev_id = __cpu_to_le32(vdev_id);
6932 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6933 cmd->tid = __cpu_to_le32(tid);
6934 cmd->initiator = __cpu_to_le32(initiator);
6935 cmd->reasoncode = __cpu_to_le32(reason);
6936
6937 ath10k_dbg(ar, ATH10K_DBG_WMI,
6938 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
6939 vdev_id, mac, tid, initiator, reason);
6940 return skb;
6941}
6942
29542666
MK		 6943static struct sk_buff *
6944ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
6945{
6946 struct wmi_pdev_get_tpc_config_cmd *cmd;
6947 struct sk_buff *skb;
6948
6949 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6950 if (!skb)
6951 return ERR_PTR(-ENOMEM);
6952
6953 cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
6954 cmd->param = __cpu_to_le32(param);
6955
6956 ath10k_dbg(ar, ATH10K_DBG_WMI,
6957 "wmi pdev get tcp config param:%d\n", param);
6958 return skb;
6959}
6960
bc6f9ae6
MP		 6961size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
6962{
6963 struct ath10k_fw_stats_peer *i;
6964 size_t num = 0;
6965
6966 list_for_each_entry(i, head, list)
6967 ++num;
6968
6969 return num;
6970}
6971
6972size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
6973{
6974 struct ath10k_fw_stats_vdev *i;
6975 size_t num = 0;
6976
6977 list_for_each_entry(i, head, list)
6978 ++num;
6979
6980 return num;
6981}
6982
6983static void
6984ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
6985 char *buf, u32 *length)
6986{
6987 u32 len = *length;
6988 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
6989
6990 len += scnprintf(buf + len, buf_len - len, "\n");
6991 len += scnprintf(buf + len, buf_len - len, "%30s\n",
6992 "ath10k PDEV stats");
6993 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
6994 "=================");
6995
6996 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
6997 "Channel noise floor", pdev->ch_noise_floor);
6998 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
6999 "Channel TX power", pdev->chan_tx_power);
7000 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7001 "TX frame count", pdev->tx_frame_count);
7002 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7003 "RX frame count", pdev->rx_frame_count);
7004 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7005 "RX clear count", pdev->rx_clear_count);
7006 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7007 "Cycle count", pdev->cycle_count);
7008 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7009 "PHY error count", pdev->phy_err_count);
7010
7011 *length = len;
7012}
7013
7014static void
7015ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7016 char *buf, u32 *length)
7017{
7018 u32 len = *length;
7019 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7020
7021 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7022 "RTS bad count", pdev->rts_bad);
7023 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7024 "RTS good count", pdev->rts_good);
7025 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7026 "FCS bad count", pdev->fcs_bad);
7027 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7028 "No beacon count", pdev->no_beacons);
7029 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7030 "MIB int count", pdev->mib_int_count);
7031
7032 len += scnprintf(buf + len, buf_len - len, "\n");
7033 *length = len;
7034}
7035
7036static void
7037ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7038 char *buf, u32 *length)
7039{
7040 u32 len = *length;
7041 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7042
7043 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7044 "ath10k PDEV TX stats");
7045 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7046 "=================");
7047
7048 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7049 "HTT cookies queued", pdev->comp_queued);
7050 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7051 "HTT cookies disp.", pdev->comp_delivered);
7052 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7053 "MSDU queued", pdev->msdu_enqued);
7054 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7055 "MPDU queued", pdev->mpdu_enqued);
7056 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7057 "MSDUs dropped", pdev->wmm_drop);
7058 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7059 "Local enqued", pdev->local_enqued);
7060 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7061 "Local freed", pdev->local_freed);
7062 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7063 "HW queued", pdev->hw_queued);
7064 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7065 "PPDUs reaped", pdev->hw_reaped);
7066 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7067 "Num underruns", pdev->underrun);
7068 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7069 "PPDUs cleaned", pdev->tx_abort);
7070 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7071 "MPDUs requed", pdev->mpdus_requed);
7072 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7073 "Excessive retries", pdev->tx_ko);
7074 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7075 "HW rate", pdev->data_rc);
7076 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7077 "Sched self tiggers", pdev->self_triggers);
7078 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7079 "Dropped due to SW retries",
7080 pdev->sw_retry_failure);
7081 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7082 "Illegal rate phy errors",
7083 pdev->illgl_rate_phy_err);
7084 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7085 "Pdev continuous xretry", pdev->pdev_cont_xretry);
7086 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7087 "TX timeout", pdev->pdev_tx_timeout);
7088 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7089 "PDEV resets", pdev->pdev_resets);
7090 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7091 "PHY underrun", pdev->phy_underrun);
7092 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7093 "MPDU is more than txop limit", pdev->txop_ovf);
7094 *length = len;
7095}
7096
7097static void
7098ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7099 char *buf, u32 *length)
7100{
7101 u32 len = *length;
7102 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7103
7104 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7105 "ath10k PDEV RX stats");
7106 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7107 "=================");
7108
7109 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7110 "Mid PPDU route change",
7111 pdev->mid_ppdu_route_change);
7112 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7113 "Tot. number of statuses", pdev->status_rcvd);
7114 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7115 "Extra frags on rings 0", pdev->r0_frags);
7116 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7117 "Extra frags on rings 1", pdev->r1_frags);
7118 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7119 "Extra frags on rings 2", pdev->r2_frags);
7120 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7121 "Extra frags on rings 3", pdev->r3_frags);
7122 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7123 "MSDUs delivered to HTT", pdev->htt_msdus);
7124 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7125 "MPDUs delivered to HTT", pdev->htt_mpdus);
7126 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7127 "MSDUs delivered to stack", pdev->loc_msdus);
7128 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7129 "MPDUs delivered to stack", pdev->loc_mpdus);
7130 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7131 "Oversized AMSUs", pdev->oversize_amsdu);
7132 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7133 "PHY errors", pdev->phy_errs);
7134 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7135 "PHY errors drops", pdev->phy_err_drop);
7136 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7137 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
7138 *length = len;
7139}
7140
7141static void
7142ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
7143 char *buf, u32 *length)
7144{
7145 u32 len = *length;
7146 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7147 int i;
7148
7149 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7150 "vdev id", vdev->vdev_id);
7151 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7152 "beacon snr", vdev->beacon_snr);
7153 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7154 "data snr", vdev->data_snr);
7155 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7156 "num rx frames", vdev->num_rx_frames);
7157 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7158 "num rts fail", vdev->num_rts_fail);
7159 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7160 "num rts success", vdev->num_rts_success);
7161 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7162 "num rx err", vdev->num_rx_err);
7163 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7164 "num rx discard", vdev->num_rx_discard);
7165 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7166 "num tx not acked", vdev->num_tx_not_acked);
7167
7168 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
7169 len += scnprintf(buf + len, buf_len - len,
7170 "%25s [%02d] %u\n",
7171 "num tx frames", i,
7172 vdev->num_tx_frames[i]);
7173
7174 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
7175 len += scnprintf(buf + len, buf_len - len,
7176 "%25s [%02d] %u\n",
7177 "num tx frames retries", i,
7178 vdev->num_tx_frames_retries[i]);
7179
7180 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
7181 len += scnprintf(buf + len, buf_len - len,
7182 "%25s [%02d] %u\n",
7183 "num tx frames failures", i,
7184 vdev->num_tx_frames_failures[i]);
7185
7186 for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
7187 len += scnprintf(buf + len, buf_len - len,
7188 "%25s [%02d] 0x%08x\n",
7189 "tx rate history", i,
7190 vdev->tx_rate_history[i]);
7191
7192 for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
7193 len += scnprintf(buf + len, buf_len - len,
7194 "%25s [%02d] %u\n",
7195 "beacon rssi history", i,
7196 vdev->beacon_rssi_history[i]);
7197
7198 len += scnprintf(buf + len, buf_len - len, "\n");
7199 *length = len;
7200}
7201
7202static void
7203ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
7204 char *buf, u32 *length)
7205{
7206 u32 len = *length;
7207 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7208
7209 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7210 "Peer MAC address", peer->peer_macaddr);
7211 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7212 "Peer RSSI", peer->peer_rssi);
7213 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7214 "Peer TX rate", peer->peer_tx_rate);
7215 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7216 "Peer RX rate", peer->peer_rx_rate);
de46c015
MSS		 7217 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7218 "Peer RX duration", peer->rx_duration);
7219
bc6f9ae6
MP		 7220 len += scnprintf(buf + len, buf_len - len, "\n");
7221 *length = len;
7222}
7223
7224void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7225 struct ath10k_fw_stats *fw_stats,
7226 char *buf)
7227{
7228 u32 len = 0;
7229 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7230 const struct ath10k_fw_stats_pdev *pdev;
7231 const struct ath10k_fw_stats_vdev *vdev;
7232 const struct ath10k_fw_stats_peer *peer;
7233 size_t num_peers;
7234 size_t num_vdevs;
7235
7236 spin_lock_bh(&ar->data_lock);
7237
7238 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7239 struct ath10k_fw_stats_pdev, list);
7240 if (!pdev) {
7241 ath10k_warn(ar, "failed to get pdev stats\n");
7242 goto unlock;
7243 }
7244
7245 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7246 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7247
7248 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7249 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7250 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7251
7252 len += scnprintf(buf + len, buf_len - len, "\n");
7253 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7254 "ath10k VDEV stats", num_vdevs);
7255 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7256 "=================");
7257
7258 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7259 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7260 }
7261
7262 len += scnprintf(buf + len, buf_len - len, "\n");
7263 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7264 "ath10k PEER stats", num_peers);
7265 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7266 "=================");
7267
7268 list_for_each_entry(peer, &fw_stats->peers, list) {
7269 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7270 }
7271
7272unlock:
7273 spin_unlock_bh(&ar->data_lock);
7274
7275 if (len >= buf_len)
7276 buf[len - 1] = 0;
7277 else
7278 buf[len] = 0;
7279}
7280
7281void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7282 struct ath10k_fw_stats *fw_stats,
7283 char *buf)
7284{
7285 unsigned int len = 0;
7286 unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
7287 const struct ath10k_fw_stats_pdev *pdev;
7288 const struct ath10k_fw_stats_vdev *vdev;
7289 const struct ath10k_fw_stats_peer *peer;
7290 size_t num_peers;
7291 size_t num_vdevs;
7292
7293 spin_lock_bh(&ar->data_lock);
7294
7295 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7296 struct ath10k_fw_stats_pdev, list);
7297 if (!pdev) {
7298 ath10k_warn(ar, "failed to get pdev stats\n");
7299 goto unlock;
7300 }
7301
7302 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7303 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7304
7305 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7306 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
7307 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7308 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7309
7310 len += scnprintf(buf + len, buf_len - len, "\n");
7311 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7312 "ath10k VDEV stats", num_vdevs);
7313 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7314 "=================");
7315
7316 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7317 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7318 }
7319
7320 len += scnprintf(buf + len, buf_len - len, "\n");
7321 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7322 "ath10k PEER stats", num_peers);
7323 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7324 "=================");
7325
7326 list_for_each_entry(peer, &fw_stats->peers, list) {
7327 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7328 }
7329
7330unlock:
7331 spin_unlock_bh(&ar->data_lock);
7332
7333 if (len >= buf_len)
7334 buf[len - 1] = 0;
7335 else
7336 buf[len] = 0;
7337}
7338
62f77f09
M		 7339static struct sk_buff *
7340ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
7341 u32 detect_level, u32 detect_margin)
7342{
7343 struct wmi_pdev_set_adaptive_cca_params *cmd;
7344 struct sk_buff *skb;
7345
7346 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7347 if (!skb)
7348 return ERR_PTR(-ENOMEM);
7349
7350 cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
7351 cmd->enable = __cpu_to_le32(enable);
7352 cmd->cca_detect_level = __cpu_to_le32(detect_level);
7353 cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
7354
7355 ath10k_dbg(ar, ATH10K_DBG_WMI,
7356 "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
7357 enable, detect_level, detect_margin);
7358 return skb;
7359}
7360
98dd2b92
MP		 7361void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
7362 struct ath10k_fw_stats *fw_stats,
7363 char *buf)
7364{
7365 u32 len = 0;
7366 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7367 const struct ath10k_fw_stats_pdev *pdev;
7368 const struct ath10k_fw_stats_vdev *vdev;
7369 const struct ath10k_fw_stats_peer *peer;
7370 size_t num_peers;
7371 size_t num_vdevs;
7372
7373 spin_lock_bh(&ar->data_lock);
7374
7375 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7376 struct ath10k_fw_stats_pdev, list);
7377 if (!pdev) {
7378 ath10k_warn(ar, "failed to get pdev stats\n");
7379 goto unlock;
7380 }
7381
7382 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7383 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7384
7385 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7386 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
7387 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7388
7389 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7390 "HW paused", pdev->hw_paused);
7391 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7392 "Seqs posted", pdev->seq_posted);
7393 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7394 "Seqs failed queueing", pdev->seq_failed_queueing);
7395 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7396 "Seqs completed", pdev->seq_completed);
7397 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7398 "Seqs restarted", pdev->seq_restarted);
7399 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7400 "MU Seqs posted", pdev->mu_seq_posted);
7401 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7402 "MPDUs SW flushed", pdev->mpdus_sw_flush);
7403 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7404 "MPDUs HW filtered", pdev->mpdus_hw_filter);
7405 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7406 "MPDUs truncated", pdev->mpdus_truncated);
7407 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7408 "MPDUs receive no ACK", pdev->mpdus_ack_failed);
7409 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7410 "MPDUs expired", pdev->mpdus_expired);
7411
7412 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7413 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7414 "Num Rx Overflow errors", pdev->rx_ovfl_errs);
7415
7416 len += scnprintf(buf + len, buf_len - len, "\n");
7417 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7418 "ath10k VDEV stats", num_vdevs);
7419 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7420 "=================");
7421
7422 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7423 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7424 }
7425
7426 len += scnprintf(buf + len, buf_len - len, "\n");
7427 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7428 "ath10k PEER stats", num_peers);
7429 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7430 "=================");
7431
7432 list_for_each_entry(peer, &fw_stats->peers, list) {
7433 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7434 }
7435
7436unlock:
7437 spin_unlock_bh(&ar->data_lock);
7438
7439 if (len >= buf_len)
7440 buf[len - 1] = 0;
7441 else
7442 buf[len] = 0;
7443}
7444
6e4de1a4
PO		 7445int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
7446 enum wmi_vdev_subtype subtype)
7447{
7448 switch (subtype) {
7449 case WMI_VDEV_SUBTYPE_NONE:
7450 return WMI_VDEV_SUBTYPE_LEGACY_NONE;
7451 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7452 return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
7453 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7454 return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
7455 case WMI_VDEV_SUBTYPE_P2P_GO:
7456 return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
7457 case WMI_VDEV_SUBTYPE_PROXY_STA:
7458 return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
7459 case WMI_VDEV_SUBTYPE_MESH_11S:
7460 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7461 return -ENOTSUPP;
7462 }
7463 return -ENOTSUPP;
7464}
7465
7466static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
7467 enum wmi_vdev_subtype subtype)
7468{
7469 switch (subtype) {
7470 case WMI_VDEV_SUBTYPE_NONE:
7471 return WMI_VDEV_SUBTYPE_10_2_4_NONE;
7472 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7473 return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
7474 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7475 return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
7476 case WMI_VDEV_SUBTYPE_P2P_GO:
7477 return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
7478 case WMI_VDEV_SUBTYPE_PROXY_STA:
7479 return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
7480 case WMI_VDEV_SUBTYPE_MESH_11S:
7481 return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
7482 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7483 return -ENOTSUPP;
7484 }
7485 return -ENOTSUPP;
7486}
7487
7488static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
7489 enum wmi_vdev_subtype subtype)
7490{
7491 switch (subtype) {
7492 case WMI_VDEV_SUBTYPE_NONE:
7493 return WMI_VDEV_SUBTYPE_10_4_NONE;
7494 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7495 return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
7496 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7497 return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
7498 case WMI_VDEV_SUBTYPE_P2P_GO:
7499 return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
7500 case WMI_VDEV_SUBTYPE_PROXY_STA:
7501 return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
7502 case WMI_VDEV_SUBTYPE_MESH_11S:
7503 return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
7504 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7505 return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
7506 }
7507 return -ENOTSUPP;
7508}
7509
47771902
RM		 7510static struct sk_buff *
7511ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
7512 enum wmi_host_platform_type type,
7513 u32 fw_feature_bitmap)
7514{
7515 struct wmi_ext_resource_config_10_4_cmd *cmd;
7516 struct sk_buff *skb;
7517
7518 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7519 if (!skb)
7520 return ERR_PTR(-ENOMEM);
7521
7522 cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
7523 cmd->host_platform_config = __cpu_to_le32(type);
7524 cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
7525
7526 ath10k_dbg(ar, ATH10K_DBG_WMI,
7527 "wmi ext resource config host type %d firmware feature bitmap %08x\n",
7528 type, fw_feature_bitmap);
7529 return skb;
7530}
7531
d7579d12
MK		 7532static const struct wmi_ops wmi_ops = {
7533 .rx = ath10k_wmi_op_rx,
7534 .map_svc = wmi_main_svc_map,
7535
7536 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7537 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7538 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7539 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7540 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7541 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7542 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK		 7543 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7544 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
7545 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
7546 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
c1a4654a 7547 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK		 7548
7549 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7550 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7551 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
7552 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7553 .gen_init = ath10k_wmi_op_gen_init,
7554 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
7555 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7556 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7557 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7558 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7559 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7560 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7561 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7562 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7563 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7564 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7565 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7566 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 7567 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7568 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7569 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7570 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7571 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
7572 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7573 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7574 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7575 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7576 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7577 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7578 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7579 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7580 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7581 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7582 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7583 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7584 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
a57a6a27 7585 /* .gen_pdev_get_temperature not implemented */
dc8ab278 7586 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7587 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7588 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7589 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7590 .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
6e4de1a4 7591 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
be9ce9d8 7592 /* .gen_bcn_tmpl not implemented */
4c4955fe 7593 /* .gen_prb_tmpl not implemented */
369242b4 7594 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7595 /* .gen_adaptive_qcs not implemented */
62f77f09 7596 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK		 7597};
7598
7599static const struct wmi_ops wmi_10_1_ops = {
7600 .rx = ath10k_wmi_10_1_op_rx,
7601 .map_svc = wmi_10x_svc_map,
7602 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
7603 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
7604 .gen_init = ath10k_wmi_10_1_op_gen_init,
7605 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7606 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7607 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
a57a6a27 7608 /* .gen_pdev_get_temperature not implemented */
d7579d12
MK		 7609
7610 /* shared with main branch */
7611 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7612 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7613 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7614 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7615 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7616 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7617 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK		 7618 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7619 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7620 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK		 7621
7622 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7623 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7624 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7625 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7626 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7627 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7628 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7629 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7630 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7631 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7632 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7633 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7634 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7635 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7636 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 7637 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7638 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7639 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7640 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7641 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7642 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7643 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7644 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7645 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7646 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7647 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7648 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7649 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7650 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7651 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7652 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7653 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7654 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7655 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7656 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7657 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7658 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
6e4de1a4 7659 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
be9ce9d8 7660 /* .gen_bcn_tmpl not implemented */
4c4955fe 7661 /* .gen_prb_tmpl not implemented */
369242b4 7662 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7663 /* .gen_adaptive_qcs not implemented */
62f77f09 7664 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK		 7665};
7666
7667static const struct wmi_ops wmi_10_2_ops = {
7668 .rx = ath10k_wmi_10_2_op_rx,
20de2229 7669 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
d7579d12
MK		 7670 .gen_init = ath10k_wmi_10_2_op_gen_init,
7671 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
a57a6a27 7672 /* .gen_pdev_get_temperature not implemented */
d7579d12
MK		 7673
7674 /* shared with 10.1 */
7675 .map_svc = wmi_10x_svc_map,
7676 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
d7579d12
MK		 7677 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7678 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7679
7680 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7681 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7682 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7683 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7684 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7685 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7686 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK		 7687 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7688 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7689 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK		 7690
7691 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7692 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7693 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7694 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7695 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7696 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7697 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7698 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7699 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7700 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7701 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7702 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7703 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7704 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7705 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 7706 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7707 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7708 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7709 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7710 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7711 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7712 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7713 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7714 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7715 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7716 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7717 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7718 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7719 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7720 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7721 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7722 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7723 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7724 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7725 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7726 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7727 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
6e4de1a4 7728 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
62f77f09 7729 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK		 7730};
7731
4a16fbec
RM		 7732static const struct wmi_ops wmi_10_2_4_ops = {
7733 .rx = ath10k_wmi_10_2_op_rx,
20de2229 7734 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
4a16fbec
RM		 7735 .gen_init = ath10k_wmi_10_2_op_gen_init,
7736 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
a57a6a27 7737 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
4a16fbec
RM		 7738
7739 /* shared with 10.1 */
7740 .map_svc = wmi_10x_svc_map,
7741 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
4a16fbec
RM		 7742 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7743 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7744
7745 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7746 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7747 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7748 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7749 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
8b019fb0 7750 .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
991adf71 7751 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
4a16fbec
RM		 7752 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7753 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7754 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
4a16fbec
RM		 7755
7756 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7757 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7758 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7759 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7760 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7761 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7762 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7763 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7764 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7765 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7766 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7767 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7768 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7769 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
7770 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7771 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7772 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7773 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7774 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7775 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7776 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7777 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7778 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7779 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7780 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7781 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7782 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7783 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7784 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7785 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7786 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7787 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7788 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7789 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7790 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
29542666 7791 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
bc6f9ae6 7792 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
62f77f09
M		 7793 .gen_pdev_enable_adaptive_cca =
7794 ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
6e4de1a4 7795 .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
be9ce9d8 7796 /* .gen_bcn_tmpl not implemented */
4c4955fe 7797 /* .gen_prb_tmpl not implemented */
369242b4 7798 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7799 /* .gen_adaptive_qcs not implemented */
4a16fbec
RM		 7800};
7801
840357cc 7802static const struct wmi_ops wmi_10_4_ops = {
1c092961 7803 .rx = ath10k_wmi_10_4_op_rx,
840357cc 7804 .map_svc = wmi_10_4_svc_map,
b2297baa 7805
98dd2b92 7806 .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
b2297baa 7807 .pull_scan = ath10k_wmi_op_pull_scan_ev,
1c092961 7808 .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
b2297baa 7809 .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
373b48cf
RM		 7810 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7811 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
3cec3be3 7812 .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
2b0a2e0d
RM		 7813 .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
7814 .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
1c092961 7815 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
d02e752f 7816 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
08e75ea8 7817 .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
373b48cf
RM		 7818
7819 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7820 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7821 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7822 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
d1e52a8e 7823 .gen_init = ath10k_wmi_10_4_op_gen_init,
b2297baa
RM		 7824 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
7825 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
373b48cf
RM		 7826 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7827 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7828 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7829 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7830 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7831 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7832 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7833 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
4535edbd
RM		 7834 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7835 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
373b48cf
RM		 7836 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7837 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7838 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7839 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
b54e16f1 7840 .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
373b48cf
RM		 7841 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7842 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7843 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7844 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7845 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7846 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7847 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7848 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7849 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7850 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7851 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
7852 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
b2887410
VT		 7853 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
7854 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
7855 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
7856 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
98dd2b92 7857 .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
47771902 7858 .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
373b48cf
RM		 7859
7860 /* shared with 10.2 */
98dd2b92 7861 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
6dd46348 7862 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
6e4de1a4 7863 .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
840357cc
RM		 7864};
7865
b79b9baa
MK		 7866int ath10k_wmi_attach(struct ath10k *ar)
7867{
bf3c13ab 7868 switch (ar->running_fw->fw_file.wmi_op_version) {
9bd21322 7869 case ATH10K_FW_WMI_OP_VERSION_10_4:
840357cc 7870 ar->wmi.ops = &wmi_10_4_ops;
2d491e69 7871 ar->wmi.cmd = &wmi_10_4_cmd_map;
93841a15 7872 ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
d86561ff 7873 ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
3fab30f7 7874 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9bd21322 7875 break;
4a16fbec
RM		 7876 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
7877 ar->wmi.cmd = &wmi_10_2_4_cmd_map;
7878 ar->wmi.ops = &wmi_10_2_4_ops;
7879 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
7880 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
3fab30f7 7881 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
4a16fbec 7882 break;
d7579d12
MK		 7883 case ATH10K_FW_WMI_OP_VERSION_10_2:
7884 ar->wmi.cmd = &wmi_10_2_cmd_map;
7885 ar->wmi.ops = &wmi_10_2_ops;
b79b9baa
MK		 7886 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
7887 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
3fab30f7 7888 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
d7579d12
MK		 7889 break;
7890 case ATH10K_FW_WMI_OP_VERSION_10_1:
7891 ar->wmi.cmd = &wmi_10x_cmd_map;
7892 ar->wmi.ops = &wmi_10_1_ops;
7893 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
7894 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
3fab30f7 7895 ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
d7579d12
MK		 7896 break;
7897 case ATH10K_FW_WMI_OP_VERSION_MAIN:
b79b9baa 7898 ar->wmi.cmd = &wmi_cmd_map;
d7579d12 7899 ar->wmi.ops = &wmi_ops;
b79b9baa
MK		 7900 ar->wmi.vdev_param = &wmi_vdev_param_map;
7901 ar->wmi.pdev_param = &wmi_pdev_param_map;
3fab30f7 7902 ar->wmi.peer_flags = &wmi_peer_flags_map;
d7579d12 7903 break;
ca996ec5
MK		 7904 case ATH10K_FW_WMI_OP_VERSION_TLV:
7905 ath10k_wmi_tlv_attach(ar);
7906 break;
d7579d12
MK		 7907 case ATH10K_FW_WMI_OP_VERSION_UNSET:
7908 case ATH10K_FW_WMI_OP_VERSION_MAX:
7909 ath10k_err(ar, "unsupported WMI op version: %d\n",
bf3c13ab 7910 ar->running_fw->fw_file.wmi_op_version);
d7579d12 7911 return -EINVAL;
b79b9baa
MK		 7912 }
7913
7914 init_completion(&ar->wmi.service_ready);
7915 init_completion(&ar->wmi.unified_ready);
b79b9baa 7916
c8ecfc1c
RM		 7917 INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
7918
b79b9baa
MK		 7919 return 0;
7920}
7921
a925a376 7922void ath10k_wmi_free_host_mem(struct ath10k *ar)
b79b9baa
MK		 7923{
7924 int i;
7925
7926 /* free the host memory chunks requested by firmware */
7927 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
b0578865
FF		 7928 dma_unmap_single(ar->dev,
7929 ar->wmi.mem_chunks[i].paddr,
7930 ar->wmi.mem_chunks[i].len,
7931 DMA_TO_DEVICE);
7932 kfree(ar->wmi.mem_chunks[i].vaddr);
b79b9baa
MK		 7933 }
7934
7935 ar->wmi.num_mem_chunks = 0;
7936}
a925a376
VT		 7937
7938void ath10k_wmi_detach(struct ath10k *ar)
7939{
7940 cancel_work_sync(&ar->svc_rdy_work);
7941
7942 if (ar->svc_rdy_skb)
7943 dev_kfree_skb(ar->svc_rdy_skb);
7944}
Linux kernel - Deliverables
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