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Merge branch 'drm-nouveau-fixes-3.8' of git://anongit.freedesktop.org/git/nouveau...
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / ar9003_calib.c
CommitLineData
795f5e2c 1/*
5b68138e 2 * Copyright (c) 2010-2011 Atheros Communications Inc.
795f5e2c
LR		 3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include "hw.h"
18#include "hw-ops.h"
19#include "ar9003_phy.h"
324c74ad 20#include "ar9003_rtt.h"
3ebfcdc4 21#include "ar9003_mci.h"
795f5e2c 22
5f0c04ea 23#define MAX_MEASUREMENT MAX_IQCAL_MEASUREMENT
3782c69d
RM		 24#define MAX_MAG_DELTA 11
25#define MAX_PHS_DELTA 10
858b7e36
VT		 26
27struct coeff {
3782c69d
RM		 28 int mag_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT];
29 int phs_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT];
858b7e36
VT		 30 int iqc_coeff[2];
31};
32
6497827f
FF		 33enum ar9003_cal_types {
34 IQ_MISMATCH_CAL = BIT(0),
35 TEMP_COMP_CAL = BIT(1),
36};
37
795f5e2c
LR		 38static void ar9003_hw_setup_calibration(struct ath_hw *ah,
39 struct ath9k_cal_list *currCal)
40{
4b01931e
LR		 41 struct ath_common *common = ath9k_hw_common(ah);
42
43 /* Select calibration to run */
44 switch (currCal->calData->calType) {
45 case IQ_MISMATCH_CAL:
46 /*
47 * Start calibration with
48 * 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples
49 */
50 REG_RMW_FIELD(ah, AR_PHY_TIMING4,
51 AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX,
52 currCal->calData->calCountMax);
53 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
54
d2182b69 55 ath_dbg(common, CALIBRATE,
226afe68 56 "starting IQ Mismatch Calibration\n");
4b01931e
LR		 57
58 /* Kick-off cal */
59 REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
60 break;
61 case TEMP_COMP_CAL:
62 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
63 AR_PHY_65NM_CH0_THERM_LOCAL, 1);
64 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
65 AR_PHY_65NM_CH0_THERM_START, 1);
66
d2182b69 67 ath_dbg(common, CALIBRATE,
226afe68 68 "starting Temperature Compensation Calibration\n");
4b01931e 69 break;
4b01931e 70 }
795f5e2c
LR		 71}
72
df23acaa
LR		 73/*
74 * Generic calibration routine.
75 * Recalibrate the lower PHY chips to account for temperature/environment
76 * changes.
77 */
78static bool ar9003_hw_per_calibration(struct ath_hw *ah,
79 struct ath9k_channel *ichan,
80 u8 rxchainmask,
81 struct ath9k_cal_list *currCal)
82{
20bd2a09 83 struct ath9k_hw_cal_data *caldata = ah->caldata;
df23acaa
LR		 84 /* Cal is assumed not done until explicitly set below */
85 bool iscaldone = false;
86
87 /* Calibration in progress. */
88 if (currCal->calState == CAL_RUNNING) {
89 /* Check to see if it has finished. */
90 if (!(REG_READ(ah, AR_PHY_TIMING4) & AR_PHY_TIMING4_DO_CAL)) {
91 /*
92 * Accumulate cal measures for active chains
93 */
94 currCal->calData->calCollect(ah);
95 ah->cal_samples++;
96
97 if (ah->cal_samples >=
98 currCal->calData->calNumSamples) {
99 unsigned int i, numChains = 0;
100 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
101 if (rxchainmask & (1 << i))
102 numChains++;
103 }
104
105 /*
106 * Process accumulated data
107 */
108 currCal->calData->calPostProc(ah, numChains);
109
110 /* Calibration has finished. */
20bd2a09 111 caldata->CalValid |= currCal->calData->calType;
df23acaa
LR		 112 currCal->calState = CAL_DONE;
113 iscaldone = true;
114 } else {
115 /*
116 * Set-up collection of another sub-sample until we
117 * get desired number
118 */
119 ar9003_hw_setup_calibration(ah, currCal);
120 }
121 }
20bd2a09 122 } else if (!(caldata->CalValid & currCal->calData->calType)) {
df23acaa
LR		 123 /* If current cal is marked invalid in channel, kick it off */
124 ath9k_hw_reset_calibration(ah, currCal);
125 }
126
127 return iscaldone;
128}
129
795f5e2c
LR		 130static bool ar9003_hw_calibrate(struct ath_hw *ah,
131 struct ath9k_channel *chan,
132 u8 rxchainmask,
133 bool longcal)
134{
df23acaa
LR		 135 bool iscaldone = true;
136 struct ath9k_cal_list *currCal = ah->cal_list_curr;
137
138 /*
139 * For given calibration:
140 * 1. Call generic cal routine
141 * 2. When this cal is done (isCalDone) if we have more cals waiting
142 * (eg after reset), mask this to upper layers by not propagating
143 * isCalDone if it is set to TRUE.
144 * Instead, change isCalDone to FALSE and setup the waiting cal(s)
145 * to be run.
146 */
147 if (currCal &&
148 (currCal->calState == CAL_RUNNING ||
149 currCal->calState == CAL_WAITING)) {
150 iscaldone = ar9003_hw_per_calibration(ah, chan,
151 rxchainmask, currCal);
152 if (iscaldone) {
153 ah->cal_list_curr = currCal = currCal->calNext;
154
155 if (currCal->calState == CAL_WAITING) {
156 iscaldone = false;
157 ath9k_hw_reset_calibration(ah, currCal);
158 }
159 }
160 }
795f5e2c 161
54717e53
RM		 162 /*
163 * Do NF cal only at longer intervals. Get the value from
164 * the previous NF cal and update history buffer.
165 */
166 if (longcal && ath9k_hw_getnf(ah, chan)) {
df23acaa
LR		 167 /*
168 * Load the NF from history buffer of the current channel.
169 * NF is slow time-variant, so it is OK to use a historical
170 * value.
171 */
172 ath9k_hw_loadnf(ah, ah->curchan);
173
174 /* start NF calibration, without updating BB NF register */
00c86590 175 ath9k_hw_start_nfcal(ah, false);
df23acaa
LR		 176 }
177
178 return iscaldone;
795f5e2c
LR		 179}
180
590b7d2f
LR		 181static void ar9003_hw_iqcal_collect(struct ath_hw *ah)
182{
183 int i;
184
185 /* Accumulate IQ cal measures for active chains */
186 for (i = 0; i < AR5416_MAX_CHAINS; i++) {
5d48ae78
VT		 187 if (ah->txchainmask & BIT(i)) {
188 ah->totalPowerMeasI[i] +=
189 REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
190 ah->totalPowerMeasQ[i] +=
191 REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
192 ah->totalIqCorrMeas[i] +=
193 (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
d2182b69 194 ath_dbg(ath9k_hw_common(ah), CALIBRATE,
5d48ae78
VT		 195 "%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
196 ah->cal_samples, i, ah->totalPowerMeasI[i],
197 ah->totalPowerMeasQ[i],
198 ah->totalIqCorrMeas[i]);
199 }
590b7d2f
LR		 200 }
201}
202
203static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
204{
205 struct ath_common *common = ath9k_hw_common(ah);
206 u32 powerMeasQ, powerMeasI, iqCorrMeas;
207 u32 qCoffDenom, iCoffDenom;
208 int32_t qCoff, iCoff;
209 int iqCorrNeg, i;
07b2fa5a 210 static const u_int32_t offset_array[3] = {
590b7d2f
LR		 211 AR_PHY_RX_IQCAL_CORR_B0,
212 AR_PHY_RX_IQCAL_CORR_B1,
213 AR_PHY_RX_IQCAL_CORR_B2,
214 };
215
216 for (i = 0; i < numChains; i++) {
217 powerMeasI = ah->totalPowerMeasI[i];
218 powerMeasQ = ah->totalPowerMeasQ[i];
219 iqCorrMeas = ah->totalIqCorrMeas[i];
220
d2182b69
JP		 221 ath_dbg(common, CALIBRATE,
222 "Starting IQ Cal and Correction for Chain %d\n", i);
590b7d2f 223
d2182b69 224 ath_dbg(common, CALIBRATE,
a9b2ce03 225 "Original: Chn %d iq_corr_meas = 0x%08x\n",
226afe68 226 i, ah->totalIqCorrMeas[i]);
590b7d2f
LR		 227
228 iqCorrNeg = 0;
229
230 if (iqCorrMeas > 0x80000000) {
231 iqCorrMeas = (0xffffffff - iqCorrMeas) + 1;
232 iqCorrNeg = 1;
233 }
234
d2182b69
JP		 235 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_i = 0x%08x\n",
236 i, powerMeasI);
237 ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_q = 0x%08x\n",
238 i, powerMeasQ);
239 ath_dbg(common, CALIBRATE, "iqCorrNeg is 0x%08x\n", iqCorrNeg);
590b7d2f
LR		 240
241 iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 256;
242 qCoffDenom = powerMeasQ / 64;
243
244 if ((iCoffDenom != 0) && (qCoffDenom != 0)) {
245 iCoff = iqCorrMeas / iCoffDenom;
246 qCoff = powerMeasI / qCoffDenom - 64;
d2182b69
JP		 247 ath_dbg(common, CALIBRATE, "Chn %d iCoff = 0x%08x\n",
248 i, iCoff);
249 ath_dbg(common, CALIBRATE, "Chn %d qCoff = 0x%08x\n",
250 i, qCoff);
590b7d2f
LR		 251
252 /* Force bounds on iCoff */
253 if (iCoff >= 63)
254 iCoff = 63;
255 else if (iCoff <= -63)
256 iCoff = -63;
257
258 /* Negate iCoff if iqCorrNeg == 0 */
259 if (iqCorrNeg == 0x0)
260 iCoff = -iCoff;
261
262 /* Force bounds on qCoff */
263 if (qCoff >= 63)
264 qCoff = 63;
265 else if (qCoff <= -63)
266 qCoff = -63;
267
268 iCoff = iCoff & 0x7f;
269 qCoff = qCoff & 0x7f;
270
d2182b69 271 ath_dbg(common, CALIBRATE,
226afe68
JP		 272 "Chn %d : iCoff = 0x%x qCoff = 0x%x\n",
273 i, iCoff, qCoff);
d2182b69 274 ath_dbg(common, CALIBRATE,
226afe68
JP		 275 "Register offset (0x%04x) before update = 0x%x\n",
276 offset_array[i],
277 REG_READ(ah, offset_array[i]));
590b7d2f 278
6f37ff96
RM		 279 if (AR_SREV_9565(ah) &&
280 (iCoff == 63 || qCoff == 63 ||
281 iCoff == -63 || qCoff == -63))
282 return;
283
590b7d2f
LR		 284 REG_RMW_FIELD(ah, offset_array[i],
285 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
286 iCoff);
287 REG_RMW_FIELD(ah, offset_array[i],
288 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
289 qCoff);
d2182b69 290 ath_dbg(common, CALIBRATE,
226afe68
JP		 291 "Register offset (0x%04x) QI COFF (bitfields 0x%08x) after update = 0x%x\n",
292 offset_array[i],
293 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
294 REG_READ(ah, offset_array[i]));
d2182b69 295 ath_dbg(common, CALIBRATE,
226afe68
JP		 296 "Register offset (0x%04x) QQ COFF (bitfields 0x%08x) after update = 0x%x\n",
297 offset_array[i],
298 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
299 REG_READ(ah, offset_array[i]));
300
d2182b69 301 ath_dbg(common, CALIBRATE,
226afe68 302 "IQ Cal and Correction done for Chain %d\n", i);
590b7d2f
LR		 303 }
304 }
305
306 REG_SET_BIT(ah, AR_PHY_RX_IQCAL_CORR_B0,
307 AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE);
d2182b69 308 ath_dbg(common, CALIBRATE,
226afe68
JP		 309 "IQ Cal and Correction (offset 0x%04x) enabled (bit position 0x%08x). New Value 0x%08x\n",
310 (unsigned) (AR_PHY_RX_IQCAL_CORR_B0),
311 AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE,
312 REG_READ(ah, AR_PHY_RX_IQCAL_CORR_B0));
590b7d2f
LR		 313}
314
315static const struct ath9k_percal_data iq_cal_single_sample = {
316 IQ_MISMATCH_CAL,
317 MIN_CAL_SAMPLES,
318 PER_MAX_LOG_COUNT,
319 ar9003_hw_iqcal_collect,
320 ar9003_hw_iqcalibrate
321};
322
795f5e2c
LR		 323static void ar9003_hw_init_cal_settings(struct ath_hw *ah)
324{
590b7d2f 325 ah->iq_caldata.calData = &iq_cal_single_sample;
795f5e2c
LR		 326}
327
df23acaa
LR		 328/*
329 * solve 4x4 linear equation used in loopback iq cal.
330 */
331static bool ar9003_hw_solve_iq_cal(struct ath_hw *ah,
332 s32 sin_2phi_1,
333 s32 cos_2phi_1,
334 s32 sin_2phi_2,
335 s32 cos_2phi_2,
336 s32 mag_a0_d0,
337 s32 phs_a0_d0,
338 s32 mag_a1_d0,
339 s32 phs_a1_d0,
340 s32 solved_eq[])
341{
342 s32 f1 = cos_2phi_1 - cos_2phi_2,
343 f3 = sin_2phi_1 - sin_2phi_2,
344 f2;
345 s32 mag_tx, phs_tx, mag_rx, phs_rx;
346 const s32 result_shift = 1 << 15;
347 struct ath_common *common = ath9k_hw_common(ah);
348
349 f2 = (f1 * f1 + f3 * f3) / result_shift;
350
351 if (!f2) {
d2182b69 352 ath_dbg(common, CALIBRATE, "Divide by 0\n");
df23acaa
LR		 353 return false;
354 }
355
356 /* mag mismatch, tx */
357 mag_tx = f1 * (mag_a0_d0 - mag_a1_d0) + f3 * (phs_a0_d0 - phs_a1_d0);
358 /* phs mismatch, tx */
359 phs_tx = f3 * (-mag_a0_d0 + mag_a1_d0) + f1 * (phs_a0_d0 - phs_a1_d0);
360
361 mag_tx = (mag_tx / f2);
362 phs_tx = (phs_tx / f2);
363
364 /* mag mismatch, rx */
365 mag_rx = mag_a0_d0 - (cos_2phi_1 * mag_tx + sin_2phi_1 * phs_tx) /
366 result_shift;
367 /* phs mismatch, rx */
368 phs_rx = phs_a0_d0 + (sin_2phi_1 * mag_tx - cos_2phi_1 * phs_tx) /
369 result_shift;
370
371 solved_eq[0] = mag_tx;
372 solved_eq[1] = phs_tx;
373 solved_eq[2] = mag_rx;
374 solved_eq[3] = phs_rx;
375
376 return true;
377}
378
379static s32 ar9003_hw_find_mag_approx(struct ath_hw *ah, s32 in_re, s32 in_im)
77d6d39a 380{
df23acaa
LR		 381 s32 abs_i = abs(in_re),
382 abs_q = abs(in_im),
383 max_abs, min_abs;
384
385 if (abs_i > abs_q) {
386 max_abs = abs_i;
387 min_abs = abs_q;
388 } else {
389 max_abs = abs_q;
390 min_abs = abs_i;
391 }
392
393 return max_abs - (max_abs / 32) + (min_abs / 8) + (min_abs / 4);
394}
395
396#define DELPT 32
397
398static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
399 s32 chain_idx,
400 const s32 iq_res[],
401 s32 iqc_coeff[])
402{
403 s32 i2_m_q2_a0_d0, i2_p_q2_a0_d0, iq_corr_a0_d0,
404 i2_m_q2_a0_d1, i2_p_q2_a0_d1, iq_corr_a0_d1,
405 i2_m_q2_a1_d0, i2_p_q2_a1_d0, iq_corr_a1_d0,
406 i2_m_q2_a1_d1, i2_p_q2_a1_d1, iq_corr_a1_d1;
407 s32 mag_a0_d0, mag_a1_d0, mag_a0_d1, mag_a1_d1,
408 phs_a0_d0, phs_a1_d0, phs_a0_d1, phs_a1_d1,
409 sin_2phi_1, cos_2phi_1,
410 sin_2phi_2, cos_2phi_2;
411 s32 mag_tx, phs_tx, mag_rx, phs_rx;
412 s32 solved_eq[4], mag_corr_tx, phs_corr_tx, mag_corr_rx, phs_corr_rx,
413 q_q_coff, q_i_coff;
414 const s32 res_scale = 1 << 15;
415 const s32 delpt_shift = 1 << 8;
416 s32 mag1, mag2;
417 struct ath_common *common = ath9k_hw_common(ah);
418
419 i2_m_q2_a0_d0 = iq_res[0] & 0xfff;
420 i2_p_q2_a0_d0 = (iq_res[0] >> 12) & 0xfff;
421 iq_corr_a0_d0 = ((iq_res[0] >> 24) & 0xff) + ((iq_res[1] & 0xf) << 8);
422
423 if (i2_m_q2_a0_d0 > 0x800)
424 i2_m_q2_a0_d0 = -((0xfff - i2_m_q2_a0_d0) + 1);
425
426 if (i2_p_q2_a0_d0 > 0x800)
427 i2_p_q2_a0_d0 = -((0xfff - i2_p_q2_a0_d0) + 1);
428
429 if (iq_corr_a0_d0 > 0x800)
430 iq_corr_a0_d0 = -((0xfff - iq_corr_a0_d0) + 1);
431
432 i2_m_q2_a0_d1 = (iq_res[1] >> 4) & 0xfff;
433 i2_p_q2_a0_d1 = (iq_res[2] & 0xfff);
434 iq_corr_a0_d1 = (iq_res[2] >> 12) & 0xfff;
435
436 if (i2_m_q2_a0_d1 > 0x800)
437 i2_m_q2_a0_d1 = -((0xfff - i2_m_q2_a0_d1) + 1);
438
439 if (i2_p_q2_a0_d1 > 0x800)
440 i2_p_q2_a0_d1 = -((0xfff - i2_p_q2_a0_d1) + 1);
441
442 if (iq_corr_a0_d1 > 0x800)
443 iq_corr_a0_d1 = -((0xfff - iq_corr_a0_d1) + 1);
444
445 i2_m_q2_a1_d0 = ((iq_res[2] >> 24) & 0xff) + ((iq_res[3] & 0xf) << 8);
446 i2_p_q2_a1_d0 = (iq_res[3] >> 4) & 0xfff;
447 iq_corr_a1_d0 = iq_res[4] & 0xfff;
448
449 if (i2_m_q2_a1_d0 > 0x800)
450 i2_m_q2_a1_d0 = -((0xfff - i2_m_q2_a1_d0) + 1);
451
452 if (i2_p_q2_a1_d0 > 0x800)
453 i2_p_q2_a1_d0 = -((0xfff - i2_p_q2_a1_d0) + 1);
454
455 if (iq_corr_a1_d0 > 0x800)
456 iq_corr_a1_d0 = -((0xfff - iq_corr_a1_d0) + 1);
457
458 i2_m_q2_a1_d1 = (iq_res[4] >> 12) & 0xfff;
459 i2_p_q2_a1_d1 = ((iq_res[4] >> 24) & 0xff) + ((iq_res[5] & 0xf) << 8);
460 iq_corr_a1_d1 = (iq_res[5] >> 4) & 0xfff;
461
462 if (i2_m_q2_a1_d1 > 0x800)
463 i2_m_q2_a1_d1 = -((0xfff - i2_m_q2_a1_d1) + 1);
464
465 if (i2_p_q2_a1_d1 > 0x800)
466 i2_p_q2_a1_d1 = -((0xfff - i2_p_q2_a1_d1) + 1);
467
468 if (iq_corr_a1_d1 > 0x800)
469 iq_corr_a1_d1 = -((0xfff - iq_corr_a1_d1) + 1);
470
471 if ((i2_p_q2_a0_d0 == 0) || (i2_p_q2_a0_d1 == 0) ||
472 (i2_p_q2_a1_d0 == 0) || (i2_p_q2_a1_d1 == 0)) {
d2182b69 473 ath_dbg(common, CALIBRATE,
226afe68
JP		 474 "Divide by 0:\n"
475 "a0_d0=%d\n"
476 "a0_d1=%d\n"
477 "a2_d0=%d\n"
478 "a1_d1=%d\n",
479 i2_p_q2_a0_d0, i2_p_q2_a0_d1,
480 i2_p_q2_a1_d0, i2_p_q2_a1_d1);
df23acaa
LR		 481 return false;
482 }
483
484 mag_a0_d0 = (i2_m_q2_a0_d0 * res_scale) / i2_p_q2_a0_d0;
485 phs_a0_d0 = (iq_corr_a0_d0 * res_scale) / i2_p_q2_a0_d0;
486
487 mag_a0_d1 = (i2_m_q2_a0_d1 * res_scale) / i2_p_q2_a0_d1;
488 phs_a0_d1 = (iq_corr_a0_d1 * res_scale) / i2_p_q2_a0_d1;
489
490 mag_a1_d0 = (i2_m_q2_a1_d0 * res_scale) / i2_p_q2_a1_d0;
491 phs_a1_d0 = (iq_corr_a1_d0 * res_scale) / i2_p_q2_a1_d0;
492
493 mag_a1_d1 = (i2_m_q2_a1_d1 * res_scale) / i2_p_q2_a1_d1;
494 phs_a1_d1 = (iq_corr_a1_d1 * res_scale) / i2_p_q2_a1_d1;
495
496 /* w/o analog phase shift */
497 sin_2phi_1 = (((mag_a0_d0 - mag_a0_d1) * delpt_shift) / DELPT);
498 /* w/o analog phase shift */
499 cos_2phi_1 = (((phs_a0_d1 - phs_a0_d0) * delpt_shift) / DELPT);
500 /* w/ analog phase shift */
501 sin_2phi_2 = (((mag_a1_d0 - mag_a1_d1) * delpt_shift) / DELPT);
502 /* w/ analog phase shift */
503 cos_2phi_2 = (((phs_a1_d1 - phs_a1_d0) * delpt_shift) / DELPT);
504
505 /*
506 * force sin^2 + cos^2 = 1;
507 * find magnitude by approximation
508 */
509 mag1 = ar9003_hw_find_mag_approx(ah, cos_2phi_1, sin_2phi_1);
510 mag2 = ar9003_hw_find_mag_approx(ah, cos_2phi_2, sin_2phi_2);
511
512 if ((mag1 == 0) || (mag2 == 0)) {
d2182b69 513 ath_dbg(common, CALIBRATE, "Divide by 0: mag1=%d, mag2=%d\n",
226afe68 514 mag1, mag2);
df23acaa
LR		 515 return false;
516 }
517
518 /* normalization sin and cos by mag */
519 sin_2phi_1 = (sin_2phi_1 * res_scale / mag1);
520 cos_2phi_1 = (cos_2phi_1 * res_scale / mag1);
521 sin_2phi_2 = (sin_2phi_2 * res_scale / mag2);
522 cos_2phi_2 = (cos_2phi_2 * res_scale / mag2);
523
524 /* calculate IQ mismatch */
525 if (!ar9003_hw_solve_iq_cal(ah,
526 sin_2phi_1, cos_2phi_1,
527 sin_2phi_2, cos_2phi_2,
528 mag_a0_d0, phs_a0_d0,
529 mag_a1_d0,
530 phs_a1_d0, solved_eq)) {
d2182b69
JP		 531 ath_dbg(common, CALIBRATE,
532 "Call to ar9003_hw_solve_iq_cal() failed\n");
df23acaa
LR		 533 return false;
534 }
535
536 mag_tx = solved_eq[0];
537 phs_tx = solved_eq[1];
538 mag_rx = solved_eq[2];
539 phs_rx = solved_eq[3];
540
d2182b69 541 ath_dbg(common, CALIBRATE,
226afe68
JP		 542 "chain %d: mag mismatch=%d phase mismatch=%d\n",
543 chain_idx, mag_tx/res_scale, phs_tx/res_scale);
df23acaa
LR		 544
545 if (res_scale == mag_tx) {
d2182b69 546 ath_dbg(common, CALIBRATE,
226afe68
JP		 547 "Divide by 0: mag_tx=%d, res_scale=%d\n",
548 mag_tx, res_scale);
df23acaa
LR		 549 return false;
550 }
551
552 /* calculate and quantize Tx IQ correction factor */
553 mag_corr_tx = (mag_tx * res_scale) / (res_scale - mag_tx);
554 phs_corr_tx = -phs_tx;
555
556 q_q_coff = (mag_corr_tx * 128 / res_scale);
557 q_i_coff = (phs_corr_tx * 256 / res_scale);
558
d2182b69 559 ath_dbg(common, CALIBRATE, "tx chain %d: mag corr=%d phase corr=%d\n",
226afe68 560 chain_idx, q_q_coff, q_i_coff);
df23acaa
LR		 561
562 if (q_i_coff < -63)
563 q_i_coff = -63;
564 if (q_i_coff > 63)
565 q_i_coff = 63;
566 if (q_q_coff < -63)
567 q_q_coff = -63;
568 if (q_q_coff > 63)
569 q_q_coff = 63;
570
571 iqc_coeff[0] = (q_q_coff * 128) + q_i_coff;
572
d2182b69 573 ath_dbg(common, CALIBRATE, "tx chain %d: iq corr coeff=%x\n",
226afe68 574 chain_idx, iqc_coeff[0]);
df23acaa
LR		 575
576 if (-mag_rx == res_scale) {
d2182b69 577 ath_dbg(common, CALIBRATE,
226afe68
JP		 578 "Divide by 0: mag_rx=%d, res_scale=%d\n",
579 mag_rx, res_scale);
df23acaa
LR		 580 return false;
581 }
582
583 /* calculate and quantize Rx IQ correction factors */
584 mag_corr_rx = (-mag_rx * res_scale) / (res_scale + mag_rx);
585 phs_corr_rx = -phs_rx;
586
587 q_q_coff = (mag_corr_rx * 128 / res_scale);
588 q_i_coff = (phs_corr_rx * 256 / res_scale);
589
d2182b69 590 ath_dbg(common, CALIBRATE, "rx chain %d: mag corr=%d phase corr=%d\n",
226afe68 591 chain_idx, q_q_coff, q_i_coff);
df23acaa
LR		 592
593 if (q_i_coff < -63)
594 q_i_coff = -63;
595 if (q_i_coff > 63)
596 q_i_coff = 63;
597 if (q_q_coff < -63)
598 q_q_coff = -63;
599 if (q_q_coff > 63)
600 q_q_coff = 63;
601
602 iqc_coeff[1] = (q_q_coff * 128) + q_i_coff;
603
d2182b69 604 ath_dbg(common, CALIBRATE, "rx chain %d: iq corr coeff=%x\n",
226afe68 605 chain_idx, iqc_coeff[1]);
df23acaa
LR		 606
607 return true;
608}
609
3782c69d
RM		 610static void ar9003_hw_detect_outlier(int *mp_coeff, int nmeasurement,
611 int max_delta)
858b7e36 612{
3782c69d
RM		 613 int mp_max = -64, max_idx = 0;
614 int mp_min = 63, min_idx = 0;
e948b99d 615 int mp_avg = 0, i, outlier_idx = 0, mp_count = 0;
3782c69d
RM		 616
617 /* find min/max mismatch across all calibrated gains */
618 for (i = 0; i < nmeasurement; i++) {
3782c69d
RM		 619 if (mp_coeff[i] > mp_max) {
620 mp_max = mp_coeff[i];
621 max_idx = i;
622 } else if (mp_coeff[i] < mp_min) {
623 mp_min = mp_coeff[i];
624 min_idx = i;
625 }
626 }
858b7e36 627
3782c69d
RM		 628 /* find average (exclude max abs value) */
629 for (i = 0; i < nmeasurement; i++) {
630 if ((abs(mp_coeff[i]) < abs(mp_max)) ||
e948b99d 631 (abs(mp_coeff[i]) < abs(mp_min))) {
3782c69d 632 mp_avg += mp_coeff[i];
e948b99d
RM		 633 mp_count++;
634 }
3782c69d 635 }
e948b99d
RM		 636
637 /*
638 * finding mean magnitude/phase if possible, otherwise
639 * just use the last value as the mean
640 */
641 if (mp_count)
642 mp_avg /= mp_count;
643 else
644 mp_avg = mp_coeff[nmeasurement - 1];
858b7e36 645
3782c69d
RM		 646 /* detect outlier */
647 if (abs(mp_max - mp_min) > max_delta) {
648 if (abs(mp_max - mp_avg) > abs(mp_min - mp_avg))
649 outlier_idx = max_idx;
650 else
651 outlier_idx = min_idx;
e9c10469
RM		 652
653 mp_coeff[outlier_idx] = mp_avg;
3782c69d 654 }
858b7e36
VT		 655}
656
657static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah,
34013524
RM		 658 struct coeff *coeff,
659 bool is_reusable)
858b7e36 660{
858b7e36 661 int i, im, nmeasurement;
858b7e36 662 u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
5f0c04ea 663 struct ath9k_hw_cal_data *caldata = ah->caldata;
858b7e36
VT		 664
665 memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
666 for (i = 0; i < MAX_MEASUREMENT / 2; i++) {
667 tx_corr_coeff[i * 2][0] = tx_corr_coeff[(i * 2) + 1][0] =
668 AR_PHY_TX_IQCAL_CORR_COEFF_B0(i);
669 if (!AR_SREV_9485(ah)) {
670 tx_corr_coeff[i * 2][1] =
671 tx_corr_coeff[(i * 2) + 1][1] =
672 AR_PHY_TX_IQCAL_CORR_COEFF_B1(i);
673
674 tx_corr_coeff[i * 2][2] =
675 tx_corr_coeff[(i * 2) + 1][2] =
676 AR_PHY_TX_IQCAL_CORR_COEFF_B2(i);
677 }
678 }
679
680 /* Load the average of 2 passes */
4fb7175b
RM		 681 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
682 if (!(ah->txchainmask & (1 << i)))
683 continue;
3782c69d
RM		 684 nmeasurement = REG_READ_FIELD(ah,
685 AR_PHY_TX_IQCAL_STATUS_B0,
686 AR_PHY_CALIBRATED_GAINS_0);
858b7e36
VT		 687
688 if (nmeasurement > MAX_MEASUREMENT)
689 nmeasurement = MAX_MEASUREMENT;
690
3782c69d
RM		 691 /* detect outlier only if nmeasurement > 1 */
692 if (nmeasurement > 1) {
693 /* Detect magnitude outlier */
694 ar9003_hw_detect_outlier(coeff->mag_coeff[i],
695 nmeasurement, MAX_MAG_DELTA);
858b7e36 696
3782c69d
RM		 697 /* Detect phase outlier */
698 ar9003_hw_detect_outlier(coeff->phs_coeff[i],
699 nmeasurement, MAX_PHS_DELTA);
700 }
858b7e36 701
3782c69d
RM		 702 for (im = 0; im < nmeasurement; im++) {
703
704 coeff->iqc_coeff[0] = (coeff->mag_coeff[i][im] & 0x7f) |
705 ((coeff->phs_coeff[i][im] & 0x7f) << 7);
858b7e36
VT		 706
707 if ((im % 2) == 0)
708 REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
709 AR_PHY_TX_IQCAL_CORR_COEFF_00_COEFF_TABLE,
710 coeff->iqc_coeff[0]);
711 else
712 REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
713 AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
714 coeff->iqc_coeff[0]);
5f0c04ea
RM		 715
716 if (caldata)
717 caldata->tx_corr_coeff[im][i] =
718 coeff->iqc_coeff[0];
858b7e36 719 }
5f0c04ea
RM		 720 if (caldata)
721 caldata->num_measures[i] = nmeasurement;
858b7e36
VT		 722 }
723
724 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
725 AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1);
726 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
727 AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
34013524 728
5f0c04ea 729 if (caldata)
34013524 730 caldata->done_txiqcal_once = is_reusable;
858b7e36
VT		 731
732 return;
858b7e36
VT		 733}
734
3782c69d 735static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
0b2084bc
VT		 736{
737 struct ath_common *common = ath9k_hw_common(ah);
858b7e36
VT		 738 u8 tx_gain_forced;
739
858b7e36
VT		 740 tx_gain_forced = REG_READ_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
741 AR_PHY_TXGAIN_FORCE);
742 if (tx_gain_forced)
743 REG_RMW_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
744 AR_PHY_TXGAIN_FORCE, 0);
745
3782c69d
RM		 746 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
747 AR_PHY_TX_IQCAL_START_DO_CAL, 1);
748
749 if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
750 AR_PHY_TX_IQCAL_START_DO_CAL, 0,
751 AH_WAIT_TIMEOUT)) {
d2182b69 752 ath_dbg(common, CALIBRATE, "Tx IQ Cal is not completed\n");
3782c69d
RM		 753 return false;
754 }
755 return true;
858b7e36
VT		 756}
757
34013524 758static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah, bool is_reusable)
858b7e36
VT		 759{
760 struct ath_common *common = ath9k_hw_common(ah);
761 const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
3782c69d 762 AR_PHY_TX_IQCAL_STATUS_B0,
858b7e36
VT		 763 AR_PHY_TX_IQCAL_STATUS_B1,
764 AR_PHY_TX_IQCAL_STATUS_B2,
765 };
766 const u_int32_t chan_info_tab[] = {
767 AR_PHY_CHAN_INFO_TAB_0,
768 AR_PHY_CHAN_INFO_TAB_1,
769 AR_PHY_CHAN_INFO_TAB_2,
770 };
771 struct coeff coeff;
772 s32 iq_res[6];
3782c69d 773 int i, im, j;
858b7e36
VT		 774 int nmeasurement;
775
776 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
4fb7175b
RM		 777 if (!(ah->txchainmask & (1 << i)))
778 continue;
858b7e36 779
3782c69d
RM		 780 nmeasurement = REG_READ_FIELD(ah,
781 AR_PHY_TX_IQCAL_STATUS_B0,
782 AR_PHY_CALIBRATED_GAINS_0);
783 if (nmeasurement > MAX_MEASUREMENT)
784 nmeasurement = MAX_MEASUREMENT;
858b7e36 785
3782c69d 786 for (im = 0; im < nmeasurement; im++) {
d2182b69
JP		 787 ath_dbg(common, CALIBRATE,
788 "Doing Tx IQ Cal for chain %d\n", i);
858b7e36 789
3782c69d
RM		 790 if (REG_READ(ah, txiqcal_status[i]) &
791 AR_PHY_TX_IQCAL_STATUS_FAILED) {
d2182b69
JP		 792 ath_dbg(common, CALIBRATE,
793 "Tx IQ Cal failed for chain %d\n", i);
3782c69d
RM		 794 goto tx_iqcal_fail;
795 }
858b7e36 796
3782c69d
RM		 797 for (j = 0; j < 3; j++) {
798 u32 idx = 2 * j, offset = 4 * (3 * im + j);
858b7e36 799
3782c69d 800 REG_RMW_FIELD(ah,
858b7e36
VT		 801 AR_PHY_CHAN_INFO_MEMORY,
802 AR_PHY_CHAN_INFO_TAB_S2_READ,
803 0);
804
3782c69d
RM		 805 /* 32 bits */
806 iq_res[idx] = REG_READ(ah,
807 chan_info_tab[i] +
808 offset);
858b7e36 809
3782c69d 810 REG_RMW_FIELD(ah,
858b7e36
VT		 811 AR_PHY_CHAN_INFO_MEMORY,
812 AR_PHY_CHAN_INFO_TAB_S2_READ,
813 1);
814
3782c69d
RM		 815 /* 16 bits */
816 iq_res[idx + 1] = 0xffff & REG_READ(ah,
817 chan_info_tab[i] + offset);
858b7e36 818
d2182b69
JP		 819 ath_dbg(common, CALIBRATE,
820 "IQ_RES[%d]=0x%x IQ_RES[%d]=0x%x\n",
3782c69d
RM		 821 idx, iq_res[idx], idx + 1,
822 iq_res[idx + 1]);
823 }
858b7e36 824
3782c69d
RM		 825 if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
826 coeff.iqc_coeff)) {
d2182b69
JP		 827 ath_dbg(common, CALIBRATE,
828 "Failed in calculation of IQ correction\n");
3782c69d
RM		 829 goto tx_iqcal_fail;
830 }
858b7e36 831
3782c69d
RM		 832 coeff.mag_coeff[i][im] = coeff.iqc_coeff[0] & 0x7f;
833 coeff.phs_coeff[i][im] =
834 (coeff.iqc_coeff[0] >> 7) & 0x7f;
858b7e36 835
3782c69d
RM		 836 if (coeff.mag_coeff[i][im] > 63)
837 coeff.mag_coeff[i][im] -= 128;
838 if (coeff.phs_coeff[i][im] > 63)
839 coeff.phs_coeff[i][im] -= 128;
858b7e36
VT		 840 }
841 }
4fb7175b 842 ar9003_hw_tx_iqcal_load_avg_2_passes(ah, &coeff, is_reusable);
858b7e36
VT		 843
844 return;
845
846tx_iqcal_fail:
d2182b69 847 ath_dbg(common, CALIBRATE, "Tx IQ Cal failed\n");
858b7e36
VT		 848 return;
849}
5f0c04ea
RM		 850
851static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah)
852{
853 struct ath9k_hw_cal_data *caldata = ah->caldata;
854 u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
855 int i, im;
856
857 memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
858 for (i = 0; i < MAX_MEASUREMENT / 2; i++) {
859 tx_corr_coeff[i * 2][0] = tx_corr_coeff[(i * 2) + 1][0] =
860 AR_PHY_TX_IQCAL_CORR_COEFF_B0(i);
861 if (!AR_SREV_9485(ah)) {
862 tx_corr_coeff[i * 2][1] =
863 tx_corr_coeff[(i * 2) + 1][1] =
864 AR_PHY_TX_IQCAL_CORR_COEFF_B1(i);
865
866 tx_corr_coeff[i * 2][2] =
867 tx_corr_coeff[(i * 2) + 1][2] =
868 AR_PHY_TX_IQCAL_CORR_COEFF_B2(i);
869 }
870 }
871
872 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
873 if (!(ah->txchainmask & (1 << i)))
874 continue;
875
876 for (im = 0; im < caldata->num_measures[i]; im++) {
877 if ((im % 2) == 0)
878 REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
879 AR_PHY_TX_IQCAL_CORR_COEFF_00_COEFF_TABLE,
880 caldata->tx_corr_coeff[im][i]);
881 else
882 REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
883 AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
884 caldata->tx_corr_coeff[im][i]);
885 }
886 }
887
888 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
889 AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1);
890 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
891 AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
892}
893
0b6eb366
RM		 894static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
895{
896 int offset[8], total = 0, test;
897 int agc_out, i;
898
899 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
900 AR_PHY_65NM_RXRF_GAINSTAGES_RX_OVERRIDE, 0x1);
901 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
902 AR_PHY_65NM_RXRF_GAINSTAGES_LNAON_CALDC, 0x0);
903 if (is_2g)
904 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
905 AR_PHY_65NM_RXRF_GAINSTAGES_LNA2G_GAIN_OVR, 0x0);
906 else
907 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
908 AR_PHY_65NM_RXRF_GAINSTAGES_LNA5G_GAIN_OVR, 0x0);
909
910 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain),
911 AR_PHY_65NM_RXTX2_RXON_OVR, 0x1);
912 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain),
913 AR_PHY_65NM_RXTX2_RXON, 0x0);
914
915 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
916 AR_PHY_65NM_RXRF_AGC_AGC_OVERRIDE, 0x1);
917 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
918 AR_PHY_65NM_RXRF_AGC_AGC_ON_OVR, 0x1);
919 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
920 AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0x1);
921 if (is_2g)
922 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
923 AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR, 0x0);
924 else
925 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
926 AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR, 0x0);
927
928 for (i = 6; i > 0; i--) {
929 offset[i] = BIT(i - 1);
930 test = total + offset[i];
931
932 if (is_2g)
933 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
934 AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR,
935 test);
936 else
937 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
938 AR_PHY_65NM_RXRF_AGC_AGC5G_CALDAC_OVR,
939 test);
940 udelay(100);
941 agc_out = REG_READ_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
942 AR_PHY_65NM_RXRF_AGC_AGC_OUT);
943 offset[i] = (agc_out) ? 0 : 1;
944 total += (offset[i] << (i - 1));
945 }
946
947 if (is_2g)
948 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
949 AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR, total);
950 else
951 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
952 AR_PHY_65NM_RXRF_AGC_AGC5G_CALDAC_OVR, total);
953
954 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
955 AR_PHY_65NM_RXRF_GAINSTAGES_RX_OVERRIDE, 0);
956 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain),
957 AR_PHY_65NM_RXTX2_RXON_OVR, 0);
958 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
959 AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0);
960}
961
df23acaa
LR		 962static bool ar9003_hw_init_cal(struct ath_hw *ah,
963 struct ath9k_channel *chan)
964{
965 struct ath_common *common = ath9k_hw_common(ah);
5f0c04ea 966 struct ath9k_hw_cal_data *caldata = ah->caldata;
77a5a664 967 bool txiqcal_done = false, txclcal_done = false;
324c74ad
RM		 968 bool is_reusable = true, status = true;
969 bool run_rtt_cal = false, run_agc_cal;
970 bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
971 u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
972 AR_PHY_AGC_CONTROL_FLTR_CAL |
973 AR_PHY_AGC_CONTROL_PKDET_CAL;
8ad74c4d 974 int i, j;
77a5a664
RM		 975 u32 cl_idx[AR9300_MAX_CHAINS] = { AR_PHY_CL_TAB_0,
976 AR_PHY_CL_TAB_1,
977 AR_PHY_CL_TAB_2 };
978
4a8f1995
FF		 979 ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
980
324c74ad
RM		 981 if (rtt) {
982 if (!ar9003_hw_rtt_restore(ah, chan))
983 run_rtt_cal = true;
984
8a90555f
SM		 985 if (run_rtt_cal)
986 ath_dbg(common, CALIBRATE, "RTT calibration to be done\n");
324c74ad 987 }
8a90555f 988
324c74ad
RM		 989 run_agc_cal = run_rtt_cal;
990
991 if (run_rtt_cal) {
992 ar9003_hw_rtt_enable(ah);
993 ar9003_hw_rtt_set_mask(ah, 0x00);
994 ar9003_hw_rtt_clear_hist(ah);
995 }
996
997 if (rtt && !run_rtt_cal) {
998 agc_ctrl = REG_READ(ah, AR_PHY_AGC_CONTROL);
999 agc_supp_cals &= agc_ctrl;
1000 agc_ctrl &= ~(AR_PHY_AGC_CONTROL_OFFSET_CAL |
1001 AR_PHY_AGC_CONTROL_FLTR_CAL |
1002 AR_PHY_AGC_CONTROL_PKDET_CAL);
1003 REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl);
1004 }
1005
8ad74c4d 1006 if (ah->enabled_cals & TX_CL_CAL) {
77a5a664
RM		 1007 if (caldata && caldata->done_txclcal_once)
1008 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL,
1009 AR_PHY_CL_CAL_ENABLE);
324c74ad 1010 else {
77a5a664
RM		 1011 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL,
1012 AR_PHY_CL_CAL_ENABLE);
324c74ad
RM		 1013 run_agc_cal = true;
1014 }
77a5a664 1015 }
df23acaa 1016
8ad74c4d
RM		 1017 if (!(ah->enabled_cals & TX_IQ_CAL))
1018 goto skip_tx_iqcal;
1019
c5395b67 1020 /* Do Tx IQ Calibration */
3782c69d
RM		 1021 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
1022 AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
1023 DELPT);
858b7e36 1024
3782c69d
RM		 1025 /*
1026 * For AR9485 or later chips, TxIQ cal runs as part of
1027 * AGC calibration
1028 */
8ad74c4d 1029 if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) {
5f0c04ea
RM		 1030 if (caldata && !caldata->done_txiqcal_once)
1031 REG_SET_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
1032 AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
1033 else
1034 REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
1035 AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
324c74ad 1036 txiqcal_done = run_agc_cal = true;
8ad74c4d 1037 goto skip_tx_iqcal;
324c74ad
RM		 1038 } else if (caldata && !caldata->done_txiqcal_once)
1039 run_agc_cal = true;
1040
5955b2b0 1041 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
f2f408ef 1042 ar9003_mci_init_cal_req(ah, &is_reusable);
3ebfcdc4 1043
e5d821a4
FF		 1044 if (!(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))) {
1045 txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
1046 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
1047 udelay(5);
1048 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
1049 }
c5395b67 1050
8ad74c4d 1051skip_tx_iqcal:
a126ff51 1052 if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
324c74ad
RM		 1053 /* Calibrate the AGC */
1054 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
1055 REG_READ(ah, AR_PHY_AGC_CONTROL) |
1056 AR_PHY_AGC_CONTROL_CAL);
1057
1058 /* Poll for offset calibration complete */
1059 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
1060 AR_PHY_AGC_CONTROL_CAL,
1061 0, AH_WAIT_TIMEOUT);
0b6eb366
RM		 1062 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
1063 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
1064 if (!(ah->rxchainmask & (1 << i)))
1065 continue;
1066 ar9003_hw_manual_peak_cal(ah, i,
1067 IS_CHAN_2GHZ(chan));
1068 }
1069 }
324c74ad 1070 }
3ebfcdc4 1071
5955b2b0 1072 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
f2f408ef 1073 ar9003_mci_init_cal_done(ah);
3ebfcdc4 1074
324c74ad
RM		 1075 if (rtt && !run_rtt_cal) {
1076 agc_ctrl |= agc_supp_cals;
1077 REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl);
1078 }
1079
1080 if (!status) {
1081 if (run_rtt_cal)
1082 ar9003_hw_rtt_disable(ah);
1083
d2182b69
JP		 1084 ath_dbg(common, CALIBRATE,
1085 "offset calibration failed to complete in 1ms; noisy environment?\n");
df23acaa
LR		 1086 return false;
1087 }
1088
3782c69d 1089 if (txiqcal_done)
34013524 1090 ar9003_hw_tx_iq_cal_post_proc(ah, is_reusable);
5f0c04ea
RM		 1091 else if (caldata && caldata->done_txiqcal_once)
1092 ar9003_hw_tx_iq_cal_reload(ah);
858b7e36 1093
77a5a664 1094#define CL_TAB_ENTRY(reg_base) (reg_base + (4 * j))
8ad74c4d 1095 if (caldata && (ah->enabled_cals & TX_CL_CAL)) {
77a5a664
RM		 1096 txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL) &
1097 AR_PHY_AGC_CONTROL_CLC_SUCCESS);
1098 if (caldata->done_txclcal_once) {
1099 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
1100 if (!(ah->txchainmask & (1 << i)))
1101 continue;
1102 for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
1103 REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]),
1104 caldata->tx_clcal[i][j]);
1105 }
1106 } else if (is_reusable && txclcal_done) {
1107 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
1108 if (!(ah->txchainmask & (1 << i)))
1109 continue;
1110 for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
1111 caldata->tx_clcal[i][j] =
1112 REG_READ(ah,
1113 CL_TAB_ENTRY(cl_idx[i]));
1114 }
1115 caldata->done_txclcal_once = true;
1116 }
1117 }
1118#undef CL_TAB_ENTRY
1119
324c74ad 1120 if (run_rtt_cal && caldata) {
8a90555f
SM		 1121 if (is_reusable) {
1122 if (!ath9k_hw_rfbus_req(ah))
1123 ath_err(ath9k_hw_common(ah),
1124 "Could not stop baseband\n");
1125 else
1126 ar9003_hw_rtt_fill_hist(ah);
324c74ad 1127
8a90555f 1128 ath9k_hw_rfbus_done(ah);
324c74ad
RM		 1129 }
1130
1131 ar9003_hw_rtt_disable(ah);
1132 }
1133
df23acaa
LR		 1134 /* Initialize list pointers */
1135 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
6497827f 1136 ah->supp_cals = IQ_MISMATCH_CAL;
df23acaa 1137
6497827f 1138 if (ah->supp_cals & IQ_MISMATCH_CAL) {
df23acaa
LR		 1139 INIT_CAL(&ah->iq_caldata);
1140 INSERT_CAL(ah, &ah->iq_caldata);
d2182b69 1141 ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
df23acaa
LR		 1142 }
1143
6497827f 1144 if (ah->supp_cals & TEMP_COMP_CAL) {
df23acaa
LR		 1145 INIT_CAL(&ah->tempCompCalData);
1146 INSERT_CAL(ah, &ah->tempCompCalData);
d2182b69
JP		 1147 ath_dbg(common, CALIBRATE,
1148 "enabling Temperature Compensation Calibration\n");
df23acaa
LR		 1149 }
1150
1151 /* Initialize current pointer to first element in list */
1152 ah->cal_list_curr = ah->cal_list;
1153
1154 if (ah->cal_list_curr)
1155 ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
1156
5f0c04ea
RM		 1157 if (caldata)
1158 caldata->CalValid = 0;
df23acaa
LR		 1159
1160 return true;
77d6d39a
LR		 1161}
1162
795f5e2c
LR		 1163void ar9003_hw_attach_calib_ops(struct ath_hw *ah)
1164{
1165 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
1166 struct ath_hw_ops *ops = ath9k_hw_ops(ah);
1167
1168 priv_ops->init_cal_settings = ar9003_hw_init_cal_settings;
1169 priv_ops->init_cal = ar9003_hw_init_cal;
1170 priv_ops->setup_calibration = ar9003_hw_setup_calibration;
795f5e2c
LR		 1171
1172 ops->calibrate = ar9003_hw_calibrate;
1173}
Linux kernel - Deliverables
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