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ath9k_hw: handle rx key miss
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / htc_drv_init.c
CommitLineData
fb9987d0
S		 1/*
2 * Copyright (c) 2010 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include "htc.h"
18
19MODULE_AUTHOR("Atheros Communications");
20MODULE_LICENSE("Dual BSD/GPL");
21MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
22
23static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
24module_param_named(debug, ath9k_debug, uint, 0);
25MODULE_PARM_DESC(debug, "Debugging mask");
26
e1572c5e
S		 27int htc_modparam_nohwcrypt;
28module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
fb9987d0
S		 29MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
30
31#define CHAN2G(_freq, _idx) { \
32 .center_freq = (_freq), \
33 .hw_value = (_idx), \
34 .max_power = 20, \
35}
36
ea46e644
S		 37#define CHAN5G(_freq, _idx) { \
38 .band = IEEE80211_BAND_5GHZ, \
39 .center_freq = (_freq), \
40 .hw_value = (_idx), \
41 .max_power = 20, \
42}
43
21cb9879
VN		 44#define ATH_HTC_BTCOEX_PRODUCT_ID "wb193"
45
fb9987d0
S		 46static struct ieee80211_channel ath9k_2ghz_channels[] = {
47 CHAN2G(2412, 0), /* Channel 1 */
48 CHAN2G(2417, 1), /* Channel 2 */
49 CHAN2G(2422, 2), /* Channel 3 */
50 CHAN2G(2427, 3), /* Channel 4 */
51 CHAN2G(2432, 4), /* Channel 5 */
52 CHAN2G(2437, 5), /* Channel 6 */
53 CHAN2G(2442, 6), /* Channel 7 */
54 CHAN2G(2447, 7), /* Channel 8 */
55 CHAN2G(2452, 8), /* Channel 9 */
56 CHAN2G(2457, 9), /* Channel 10 */
57 CHAN2G(2462, 10), /* Channel 11 */
58 CHAN2G(2467, 11), /* Channel 12 */
59 CHAN2G(2472, 12), /* Channel 13 */
60 CHAN2G(2484, 13), /* Channel 14 */
61};
62
ea46e644
S		 63static struct ieee80211_channel ath9k_5ghz_channels[] = {
64 /* _We_ call this UNII 1 */
65 CHAN5G(5180, 14), /* Channel 36 */
66 CHAN5G(5200, 15), /* Channel 40 */
67 CHAN5G(5220, 16), /* Channel 44 */
68 CHAN5G(5240, 17), /* Channel 48 */
69 /* _We_ call this UNII 2 */
70 CHAN5G(5260, 18), /* Channel 52 */
71 CHAN5G(5280, 19), /* Channel 56 */
72 CHAN5G(5300, 20), /* Channel 60 */
73 CHAN5G(5320, 21), /* Channel 64 */
74 /* _We_ call this "Middle band" */
75 CHAN5G(5500, 22), /* Channel 100 */
76 CHAN5G(5520, 23), /* Channel 104 */
77 CHAN5G(5540, 24), /* Channel 108 */
78 CHAN5G(5560, 25), /* Channel 112 */
79 CHAN5G(5580, 26), /* Channel 116 */
80 CHAN5G(5600, 27), /* Channel 120 */
81 CHAN5G(5620, 28), /* Channel 124 */
82 CHAN5G(5640, 29), /* Channel 128 */
83 CHAN5G(5660, 30), /* Channel 132 */
84 CHAN5G(5680, 31), /* Channel 136 */
85 CHAN5G(5700, 32), /* Channel 140 */
86 /* _We_ call this UNII 3 */
87 CHAN5G(5745, 33), /* Channel 149 */
88 CHAN5G(5765, 34), /* Channel 153 */
89 CHAN5G(5785, 35), /* Channel 157 */
90 CHAN5G(5805, 36), /* Channel 161 */
91 CHAN5G(5825, 37), /* Channel 165 */
92};
93
fb9987d0
S		 94/* Atheros hardware rate code addition for short premble */
95#define SHPCHECK(__hw_rate, __flags) \
96 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
97
98#define RATE(_bitrate, _hw_rate, _flags) { \
99 .bitrate = (_bitrate), \
100 .flags = (_flags), \
101 .hw_value = (_hw_rate), \
102 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
103}
104
105static struct ieee80211_rate ath9k_legacy_rates[] = {
106 RATE(10, 0x1b, 0),
107 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
108 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
109 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
110 RATE(60, 0x0b, 0),
111 RATE(90, 0x0f, 0),
112 RATE(120, 0x0a, 0),
113 RATE(180, 0x0e, 0),
114 RATE(240, 0x09, 0),
115 RATE(360, 0x0d, 0),
116 RATE(480, 0x08, 0),
117 RATE(540, 0x0c, 0),
118};
119
120static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
121{
122 int time_left;
123
d8c49ffb
SM		 124 if (atomic_read(&priv->htc->tgt_ready) > 0) {
125 atomic_dec(&priv->htc->tgt_ready);
126 return 0;
127 }
128
fb9987d0
S		 129 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
130 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
131 if (!time_left) {
132 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
133 return -ETIMEDOUT;
134 }
135
d8c49ffb
SM		 136 atomic_dec(&priv->htc->tgt_ready);
137
fb9987d0
S		 138 return 0;
139}
140
141static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
142{
e1572c5e 143 ath9k_htc_exit_debug(priv->ah);
fb9987d0
S		 144 ath9k_hw_deinit(priv->ah);
145 tasklet_kill(&priv->wmi_tasklet);
146 tasklet_kill(&priv->rx_tasklet);
147 tasklet_kill(&priv->tx_tasklet);
148 kfree(priv->ah);
149 priv->ah = NULL;
150}
151
152static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
153{
154 struct ieee80211_hw *hw = priv->hw;
155
156 wiphy_rfkill_stop_polling(hw->wiphy);
157 ath9k_deinit_leds(priv);
158 ieee80211_unregister_hw(hw);
159 ath9k_rx_cleanup(priv);
160 ath9k_tx_cleanup(priv);
161 ath9k_deinit_priv(priv);
162}
163
164static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
165 u16 service_id,
166 void (*tx) (void *,
167 struct sk_buff *,
168 enum htc_endpoint_id,
169 bool txok),
170 enum htc_endpoint_id *ep_id)
171{
172 struct htc_service_connreq req;
173
174 memset(&req, 0, sizeof(struct htc_service_connreq));
175
176 req.service_id = service_id;
177 req.ep_callbacks.priv = priv;
178 req.ep_callbacks.rx = ath9k_htc_rxep;
179 req.ep_callbacks.tx = tx;
180
181 return htc_connect_service(priv->htc, &req, ep_id);
182}
183
6267dc70 184static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid)
fb9987d0
S		 185{
186 int ret;
187
188 /* WMI CMD*/
189 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
190 if (ret)
191 goto err;
192
193 /* Beacon */
9c6dda4e 194 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
fb9987d0
S		 195 &priv->beacon_ep);
196 if (ret)
197 goto err;
198
199 /* CAB */
200 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
201 &priv->cab_ep);
202 if (ret)
203 goto err;
204
205
206 /* UAPSD */
207 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
208 &priv->uapsd_ep);
209 if (ret)
210 goto err;
211
212 /* MGMT */
213 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
214 &priv->mgmt_ep);
215 if (ret)
216 goto err;
217
218 /* DATA BE */
219 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
220 &priv->data_be_ep);
221 if (ret)
222 goto err;
223
224 /* DATA BK */
225 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
226 &priv->data_bk_ep);
227 if (ret)
228 goto err;
229
230 /* DATA VI */
231 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
232 &priv->data_vi_ep);
233 if (ret)
234 goto err;
235
236 /* DATA VO */
237 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
238 &priv->data_vo_ep);
239 if (ret)
240 goto err;
241
6267dc70
S		 242 /*
243 * Setup required credits before initializing HTC.
244 * This is a bit hacky, but, since queuing is done in
245 * the HIF layer, shouldn't matter much.
246 */
247
248 switch(devid) {
6267dc70 249 case 0x7010:
ca6cff1f 250 case 0x7015:
4e63f768 251 case 0x9018:
6267dc70
S		 252 priv->htc->credits = 45;
253 break;
254 default:
4e63f768 255 priv->htc->credits = 33;
6267dc70
S		 256 }
257
fb9987d0
S		 258 ret = htc_init(priv->htc);
259 if (ret)
260 goto err;
261
6267dc70
S		 262 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
263 priv->htc->credits);
264
fb9987d0
S		 265 return 0;
266
267err:
268 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
269 return ret;
270}
271
272static int ath9k_reg_notifier(struct wiphy *wiphy,
273 struct regulatory_request *request)
274{
275 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
276 struct ath9k_htc_priv *priv = hw->priv;
277
278 return ath_reg_notifier_apply(wiphy, request,
279 ath9k_hw_regulatory(priv->ah));
280}
281
4a22fe10 282static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
fb9987d0
S		 283{
284 struct ath_hw *ah = (struct ath_hw *) hw_priv;
285 struct ath_common *common = ath9k_hw_common(ah);
286 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
287 __be32 val, reg = cpu_to_be32(reg_offset);
288 int r;
289
290 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
291 (u8 *) &reg, sizeof(reg),
292 (u8 *) &val, sizeof(val),
293 100);
294 if (unlikely(r)) {
295 ath_print(common, ATH_DBG_WMI,
296 "REGISTER READ FAILED: (0x%04x, %d)\n",
297 reg_offset, r);
298 return -EIO;
299 }
300
301 return be32_to_cpu(val);
302}
303
4a22fe10 304static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
fb9987d0
S		 305{
306 struct ath_hw *ah = (struct ath_hw *) hw_priv;
307 struct ath_common *common = ath9k_hw_common(ah);
308 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
309 __be32 buf[2] = {
310 cpu_to_be32(reg_offset),
311 cpu_to_be32(val),
312 };
313 int r;
314
315 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
316 (u8 *) &buf, sizeof(buf),
317 (u8 *) &val, sizeof(val),
318 100);
319 if (unlikely(r)) {
320 ath_print(common, ATH_DBG_WMI,
321 "REGISTER WRITE FAILED:(0x%04x, %d)\n",
322 reg_offset, r);
323 }
324}
325
4a22fe10
S		 326static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
327{
328 struct ath_hw *ah = (struct ath_hw *) hw_priv;
329 struct ath_common *common = ath9k_hw_common(ah);
330 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
331 u32 rsp_status;
332 int r;
333
334 mutex_lock(&priv->wmi->multi_write_mutex);
335
336 /* Store the register/value */
337 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
338 cpu_to_be32(reg_offset);
339 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
340 cpu_to_be32(val);
341
342 priv->wmi->multi_write_idx++;
343
344 /* If the buffer is full, send it out. */
345 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
346 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
347 (u8 *) &priv->wmi->multi_write,
348 sizeof(struct register_write) * priv->wmi->multi_write_idx,
349 (u8 *) &rsp_status, sizeof(rsp_status),
350 100);
351 if (unlikely(r)) {
352 ath_print(common, ATH_DBG_WMI,
353 "REGISTER WRITE FAILED, multi len: %d\n",
354 priv->wmi->multi_write_idx);
355 }
356 priv->wmi->multi_write_idx = 0;
357 }
358
359 mutex_unlock(&priv->wmi->multi_write_mutex);
360}
361
362static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
363{
364 struct ath_hw *ah = (struct ath_hw *) hw_priv;
365 struct ath_common *common = ath9k_hw_common(ah);
366 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
367
368 if (atomic_read(&priv->wmi->mwrite_cnt))
369 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
370 else
371 ath9k_regwrite_single(hw_priv, val, reg_offset);
372}
373
374static void ath9k_enable_regwrite_buffer(void *hw_priv)
375{
376 struct ath_hw *ah = (struct ath_hw *) hw_priv;
377 struct ath_common *common = ath9k_hw_common(ah);
378 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
379
380 atomic_inc(&priv->wmi->mwrite_cnt);
381}
382
383static void ath9k_disable_regwrite_buffer(void *hw_priv)
384{
385 struct ath_hw *ah = (struct ath_hw *) hw_priv;
386 struct ath_common *common = ath9k_hw_common(ah);
387 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
388
389 atomic_dec(&priv->wmi->mwrite_cnt);
390}
391
392static void ath9k_regwrite_flush(void *hw_priv)
393{
394 struct ath_hw *ah = (struct ath_hw *) hw_priv;
395 struct ath_common *common = ath9k_hw_common(ah);
396 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
397 u32 rsp_status;
398 int r;
399
400 mutex_lock(&priv->wmi->multi_write_mutex);
401
402 if (priv->wmi->multi_write_idx) {
403 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
404 (u8 *) &priv->wmi->multi_write,
405 sizeof(struct register_write) * priv->wmi->multi_write_idx,
406 (u8 *) &rsp_status, sizeof(rsp_status),
407 100);
408 if (unlikely(r)) {
409 ath_print(common, ATH_DBG_WMI,
410 "REGISTER WRITE FAILED, multi len: %d\n",
411 priv->wmi->multi_write_idx);
412 }
413 priv->wmi->multi_write_idx = 0;
414 }
415
416 mutex_unlock(&priv->wmi->multi_write_mutex);
417}
418
fb9987d0 419static const struct ath_ops ath9k_common_ops = {
4a22fe10
S		 420 .read = ath9k_regread,
421 .write = ath9k_regwrite,
422 .enable_write_buffer = ath9k_enable_regwrite_buffer,
423 .disable_write_buffer = ath9k_disable_regwrite_buffer,
424 .write_flush = ath9k_regwrite_flush,
fb9987d0
S		 425};
426
427static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
428{
429 *csz = L1_CACHE_BYTES >> 2;
430}
431
432static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
433{
434 struct ath_hw *ah = (struct ath_hw *) common->ah;
435
436 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
437
438 if (!ath9k_hw_wait(ah,
439 AR_EEPROM_STATUS_DATA,
440 AR_EEPROM_STATUS_DATA_BUSY |
441 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
442 AH_WAIT_TIMEOUT))
443 return false;
444
445 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
446 AR_EEPROM_STATUS_DATA_VAL);
447
448 return true;
449}
450
451static const struct ath_bus_ops ath9k_usb_bus_ops = {
497ad9ad 452 .ath_bus_type = ATH_USB,
fb9987d0
S		 453 .read_cachesize = ath_usb_read_cachesize,
454 .eeprom_read = ath_usb_eeprom_read,
455};
456
457static void setup_ht_cap(struct ath9k_htc_priv *priv,
458 struct ieee80211_sta_ht_cap *ht_info)
459{
6debecad
S		 460 struct ath_common *common = ath9k_hw_common(priv->ah);
461 u8 tx_streams, rx_streams;
462 int i;
463
fb9987d0
S		 464 ht_info->ht_supported = true;
465 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
466 IEEE80211_HT_CAP_SM_PS |
467 IEEE80211_HT_CAP_SGI_40 |
468 IEEE80211_HT_CAP_DSSSCCK40;
469
b4dec5e8
S		 470 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
471 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
472
17525f96
S		 473 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
474
fb9987d0
S		 475 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
476 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
477
478 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
6debecad
S		 479
480 /* ath9k_htc supports only 1 or 2 stream devices */
481 tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
482 rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
483
484 ath_print(common, ATH_DBG_CONFIG,
485 "TX streams %d, RX streams: %d\n",
486 tx_streams, rx_streams);
487
488 if (tx_streams != rx_streams) {
489 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
490 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
491 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
492 }
493
494 for (i = 0; i < rx_streams; i++)
495 ht_info->mcs.rx_mask[i] = 0xff;
496
fb9987d0
S		 497 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
498}
499
500static int ath9k_init_queues(struct ath9k_htc_priv *priv)
501{
502 struct ath_common *common = ath9k_hw_common(priv->ah);
503 int i;
504
505 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
506 priv->hwq_map[i] = -1;
507
ca74b83b
S		 508 priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
509 if (priv->beaconq == -1) {
510 ath_print(common, ATH_DBG_FATAL,
511 "Unable to setup BEACON xmit queue\n");
512 goto err;
513 }
514
515 priv->cabq = ath9k_htc_cabq_setup(priv);
516 if (priv->cabq == -1) {
517 ath_print(common, ATH_DBG_FATAL,
518 "Unable to setup CAB xmit queue\n");
519 goto err;
520 }
521
e8c35a77 522 if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
fb9987d0
S		 523 ath_print(common, ATH_DBG_FATAL,
524 "Unable to setup xmit queue for BE traffic\n");
525 goto err;
526 }
527
e8c35a77 528 if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
fb9987d0
S		 529 ath_print(common, ATH_DBG_FATAL,
530 "Unable to setup xmit queue for BK traffic\n");
531 goto err;
532 }
e8c35a77 533 if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
fb9987d0
S		 534 ath_print(common, ATH_DBG_FATAL,
535 "Unable to setup xmit queue for VI traffic\n");
536 goto err;
537 }
e8c35a77 538 if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
fb9987d0
S		 539 ath_print(common, ATH_DBG_FATAL,
540 "Unable to setup xmit queue for VO traffic\n");
541 goto err;
542 }
543
544 return 0;
545
546err:
547 return -EINVAL;
548}
549
550static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
551{
552 struct ath_common *common = ath9k_hw_common(priv->ah);
553 int i = 0;
554
555 /* Get the hardware key cache size. */
556 common->keymax = priv->ah->caps.keycache_size;
557 if (common->keymax > ATH_KEYMAX) {
558 ath_print(common, ATH_DBG_ANY,
559 "Warning, using only %u entries in %u key cache\n",
560 ATH_KEYMAX, common->keymax);
561 common->keymax = ATH_KEYMAX;
562 }
563
564 /*
565 * Reset the key cache since some parts do not
566 * reset the contents on initial power up.
567 */
568 for (i = 0; i < common->keymax; i++)
569 ath9k_hw_keyreset(priv->ah, (u16) i);
fb9987d0
S		 570}
571
572static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
573{
574 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) {
575 priv->sbands[IEEE80211_BAND_2GHZ].channels =
576 ath9k_2ghz_channels;
577 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
578 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
579 ARRAY_SIZE(ath9k_2ghz_channels);
580 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
581 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
582 ARRAY_SIZE(ath9k_legacy_rates);
583 }
ea46e644
S		 584
585 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) {
586 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
587 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
588 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
589 ARRAY_SIZE(ath9k_5ghz_channels);
590 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
591 ath9k_legacy_rates + 4;
592 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
593 ARRAY_SIZE(ath9k_legacy_rates) - 4;
594 }
fb9987d0
S		 595}
596
597static void ath9k_init_misc(struct ath9k_htc_priv *priv)
598{
599 struct ath_common *common = ath9k_hw_common(priv->ah);
600
601 common->tx_chainmask = priv->ah->caps.tx_chainmask;
602 common->rx_chainmask = priv->ah->caps.rx_chainmask;
603
604 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
605 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
606
9f01a84e 607 priv->ah->opmode = NL80211_IFTYPE_STATION;
fb9987d0
S		 608}
609
21cb9879
VN		 610static void ath9k_init_btcoex(struct ath9k_htc_priv *priv)
611{
612 int qnum;
613
614 switch (priv->ah->btcoex_hw.scheme) {
615 case ATH_BTCOEX_CFG_NONE:
616 break;
617 case ATH_BTCOEX_CFG_3WIRE:
618 priv->ah->btcoex_hw.btactive_gpio = 7;
619 priv->ah->btcoex_hw.btpriority_gpio = 6;
620 priv->ah->btcoex_hw.wlanactive_gpio = 8;
621 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
622 ath9k_hw_btcoex_init_3wire(priv->ah);
623 ath_htc_init_btcoex_work(priv);
624 qnum = priv->hwq_map[WME_AC_BE];
625 ath9k_hw_init_btcoex_hw(priv->ah, qnum);
626 break;
627 default:
628 WARN_ON(1);
629 break;
630 }
631}
632
633static int ath9k_init_priv(struct ath9k_htc_priv *priv,
634 u16 devid, char *product)
fb9987d0
S		 635{
636 struct ath_hw *ah = NULL;
637 struct ath_common *common;
638 int ret = 0, csz = 0;
639
640 priv->op_flags |= OP_INVALID;
641
642 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
643 if (!ah)
644 return -ENOMEM;
645
646 ah->hw_version.devid = devid;
647 ah->hw_version.subsysid = 0; /* FIXME */
648 priv->ah = ah;
649
650 common = ath9k_hw_common(ah);
651 common->ops = &ath9k_common_ops;
652 common->bus_ops = &ath9k_usb_bus_ops;
653 common->ah = ah;
654 common->hw = priv->hw;
655 common->priv = priv;
656 common->debug_mask = ath9k_debug;
657
658 spin_lock_init(&priv->wmi->wmi_lock);
659 spin_lock_init(&priv->beacon_lock);
7757dfed 660 spin_lock_init(&priv->tx_lock);
fb9987d0 661 mutex_init(&priv->mutex);
bde748a4 662 mutex_init(&priv->htc_pm_lock);
fb9987d0
S		 663 tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
664 (unsigned long)priv);
665 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
666 (unsigned long)priv);
667 tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
fb9987d0 668 INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
bde748a4 669 INIT_WORK(&priv->ps_work, ath9k_ps_work);
fb9987d0
S		 670
671 /*
672 * Cache line size is used to size and align various
673 * structures used to communicate with the hardware.
674 */
675 ath_read_cachesize(common, &csz);
676 common->cachelsz = csz << 2; /* convert to bytes */
677
678 ret = ath9k_hw_init(ah);
679 if (ret) {
680 ath_print(common, ATH_DBG_FATAL,
681 "Unable to initialize hardware; "
682 "initialization status: %d\n", ret);
683 goto err_hw;
684 }
685
e1572c5e 686 ret = ath9k_htc_init_debug(ah);
fb9987d0
S		 687 if (ret) {
688 ath_print(common, ATH_DBG_FATAL,
689 "Unable to create debugfs files\n");
690 goto err_debug;
691 }
692
693 ret = ath9k_init_queues(priv);
694 if (ret)
695 goto err_queues;
696
697 ath9k_init_crypto(priv);
698 ath9k_init_channels_rates(priv);
699 ath9k_init_misc(priv);
700
21cb9879
VN		 701 if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) {
702 ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE;
703 ath9k_init_btcoex(priv);
704 }
705
fb9987d0
S		 706 return 0;
707
708err_queues:
e1572c5e 709 ath9k_htc_exit_debug(ah);
fb9987d0
S		 710err_debug:
711 ath9k_hw_deinit(ah);
712err_hw:
713
714 kfree(ah);
715 priv->ah = NULL;
716
717 return ret;
718}
719
720static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
721 struct ieee80211_hw *hw)
722{
723 struct ath_common *common = ath9k_hw_common(priv->ah);
724
725 hw->flags = IEEE80211_HW_SIGNAL_DBM |
726 IEEE80211_HW_AMPDU_AGGREGATION |
727 IEEE80211_HW_SPECTRUM_MGMT |
32fbccaf 728 IEEE80211_HW_HAS_RATE_CONTROL |
bde748a4
VN		 729 IEEE80211_HW_RX_INCLUDES_FCS |
730 IEEE80211_HW_SUPPORTS_PS |
731 IEEE80211_HW_PS_NULLFUNC_STACK;
fb9987d0
S		 732
733 hw->wiphy->interface_modes =
734 BIT(NL80211_IFTYPE_STATION) |
735 BIT(NL80211_IFTYPE_ADHOC);
736
bde748a4
VN		 737 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
738
fb9987d0
S		 739 hw->queues = 4;
740 hw->channel_change_time = 5000;
741 hw->max_listen_interval = 10;
742 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
743 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
744
745 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
746 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
747 sizeof(struct htc_frame_hdr) + 4;
748
749 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
750 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
751 &priv->sbands[IEEE80211_BAND_2GHZ];
ea46e644
S		 752 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
753 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
754 &priv->sbands[IEEE80211_BAND_5GHZ];
fb9987d0
S		 755
756 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
757 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
758 setup_ht_cap(priv,
759 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
ea46e644
S		 760 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
761 setup_ht_cap(priv,
762 &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
fb9987d0
S		 763 }
764
765 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
766}
767
21cb9879
VN		 768static int ath9k_init_device(struct ath9k_htc_priv *priv,
769 u16 devid, char *product)
fb9987d0
S		 770{
771 struct ieee80211_hw *hw = priv->hw;
772 struct ath_common *common;
773 struct ath_hw *ah;
774 int error = 0;
775 struct ath_regulatory *reg;
776
777 /* Bring up device */
21cb9879 778 error = ath9k_init_priv(priv, devid, product);
fb9987d0
S		 779 if (error != 0)
780 goto err_init;
781
782 ah = priv->ah;
783 common = ath9k_hw_common(ah);
784 ath9k_set_hw_capab(priv, hw);
785
786 /* Initialize regulatory */
787 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
788 ath9k_reg_notifier);
789 if (error)
790 goto err_regd;
791
792 reg = &common->regulatory;
793
794 /* Setup TX */
795 error = ath9k_tx_init(priv);
796 if (error != 0)
797 goto err_tx;
798
799 /* Setup RX */
800 error = ath9k_rx_init(priv);
801 if (error != 0)
802 goto err_rx;
803
804 /* Register with mac80211 */
805 error = ieee80211_register_hw(hw);
806 if (error)
807 goto err_register;
808
809 /* Handle world regulatory */
810 if (!ath_is_world_regd(reg)) {
811 error = regulatory_hint(hw->wiphy, reg->alpha2);
812 if (error)
813 goto err_world;
814 }
815
816 ath9k_init_leds(priv);
817 ath9k_start_rfkill_poll(priv);
818
819 return 0;
820
821err_world:
822 ieee80211_unregister_hw(hw);
823err_register:
824 ath9k_rx_cleanup(priv);
825err_rx:
826 ath9k_tx_cleanup(priv);
827err_tx:
828 /* Nothing */
829err_regd:
830 ath9k_deinit_priv(priv);
831err_init:
832 return error;
833}
834
835int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
21cb9879 836 u16 devid, char *product)
fb9987d0
S		 837{
838 struct ieee80211_hw *hw;
839 struct ath9k_htc_priv *priv;
840 int ret;
841
842 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
843 if (!hw)
844 return -ENOMEM;
845
846 priv = hw->priv;
847 priv->hw = hw;
848 priv->htc = htc_handle;
849 priv->dev = dev;
850 htc_handle->drv_priv = priv;
851 SET_IEEE80211_DEV(hw, priv->dev);
852
853 ret = ath9k_htc_wait_for_target(priv);
854 if (ret)
855 goto err_free;
856
857 priv->wmi = ath9k_init_wmi(priv);
858 if (!priv->wmi) {
859 ret = -EINVAL;
860 goto err_free;
861 }
862
6267dc70 863 ret = ath9k_init_htc_services(priv, devid);
fb9987d0
S		 864 if (ret)
865 goto err_init;
866
a3be14b7
S		 867 /* The device may have been unplugged earlier. */
868 priv->op_flags &= ~OP_UNPLUGGED;
869
21cb9879 870 ret = ath9k_init_device(priv, devid, product);
fb9987d0
S		 871 if (ret)
872 goto err_init;
873
874 return 0;
875
876err_init:
877 ath9k_deinit_wmi(priv);
878err_free:
879 ieee80211_free_hw(hw);
880 return ret;
881}
882
883void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
884{
885 if (htc_handle->drv_priv) {
a3be14b7
S		 886
887 /* Check if the device has been yanked out. */
888 if (hotunplug)
889 htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
890
fb9987d0
S		 891 ath9k_deinit_device(htc_handle->drv_priv);
892 ath9k_deinit_wmi(htc_handle->drv_priv);
893 ieee80211_free_hw(htc_handle->drv_priv->hw);
894 }
895}
896
897#ifdef CONFIG_PM
898int ath9k_htc_resume(struct htc_target *htc_handle)
899{
900 int ret;
901
902 ret = ath9k_htc_wait_for_target(htc_handle->drv_priv);
903 if (ret)
904 return ret;
905
6267dc70
S		 906 ret = ath9k_init_htc_services(htc_handle->drv_priv,
907 htc_handle->drv_priv->ah->hw_version.devid);
fb9987d0
S		 908 return ret;
909}
910#endif
911
912static int __init ath9k_htc_init(void)
913{
914 int error;
915
e1572c5e 916 error = ath9k_htc_debug_create_root();
fb9987d0
S		 917 if (error < 0) {
918 printk(KERN_ERR
919 "ath9k_htc: Unable to create debugfs root: %d\n",
920 error);
921 goto err_dbg;
922 }
923
924 error = ath9k_hif_usb_init();
925 if (error < 0) {
926 printk(KERN_ERR
927 "ath9k_htc: No USB devices found,"
928 " driver not installed.\n");
929 error = -ENODEV;
930 goto err_usb;
931 }
932
933 return 0;
934
935err_usb:
e1572c5e 936 ath9k_htc_debug_remove_root();
fb9987d0
S		 937err_dbg:
938 return error;
939}
940module_init(ath9k_htc_init);
941
942static void __exit ath9k_htc_exit(void)
943{
944 ath9k_hif_usb_exit();
e1572c5e 945 ath9k_htc_debug_remove_root();
fb9987d0
S		 946 printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
947}
948module_exit(ath9k_htc_exit);
Linux kernel - Deliverables
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