Commit | Line | Data |
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fb9987d0 S |
1 | /* |
2 | * Copyright (c) 2010 Atheros Communications Inc. | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #include "htc.h" | |
18 | ||
19 | MODULE_AUTHOR("Atheros Communications"); | |
20 | MODULE_LICENSE("Dual BSD/GPL"); | |
21 | MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices"); | |
22 | ||
23 | static unsigned int ath9k_debug = ATH_DBG_DEFAULT; | |
24 | module_param_named(debug, ath9k_debug, uint, 0); | |
25 | MODULE_PARM_DESC(debug, "Debugging mask"); | |
26 | ||
e1572c5e S |
27 | int htc_modparam_nohwcrypt; |
28 | module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444); | |
fb9987d0 S |
29 | MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption"); |
30 | ||
31 | #define CHAN2G(_freq, _idx) { \ | |
32 | .center_freq = (_freq), \ | |
33 | .hw_value = (_idx), \ | |
34 | .max_power = 20, \ | |
35 | } | |
36 | ||
37 | static struct ieee80211_channel ath9k_2ghz_channels[] = { | |
38 | CHAN2G(2412, 0), /* Channel 1 */ | |
39 | CHAN2G(2417, 1), /* Channel 2 */ | |
40 | CHAN2G(2422, 2), /* Channel 3 */ | |
41 | CHAN2G(2427, 3), /* Channel 4 */ | |
42 | CHAN2G(2432, 4), /* Channel 5 */ | |
43 | CHAN2G(2437, 5), /* Channel 6 */ | |
44 | CHAN2G(2442, 6), /* Channel 7 */ | |
45 | CHAN2G(2447, 7), /* Channel 8 */ | |
46 | CHAN2G(2452, 8), /* Channel 9 */ | |
47 | CHAN2G(2457, 9), /* Channel 10 */ | |
48 | CHAN2G(2462, 10), /* Channel 11 */ | |
49 | CHAN2G(2467, 11), /* Channel 12 */ | |
50 | CHAN2G(2472, 12), /* Channel 13 */ | |
51 | CHAN2G(2484, 13), /* Channel 14 */ | |
52 | }; | |
53 | ||
54 | /* Atheros hardware rate code addition for short premble */ | |
55 | #define SHPCHECK(__hw_rate, __flags) \ | |
56 | ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0) | |
57 | ||
58 | #define RATE(_bitrate, _hw_rate, _flags) { \ | |
59 | .bitrate = (_bitrate), \ | |
60 | .flags = (_flags), \ | |
61 | .hw_value = (_hw_rate), \ | |
62 | .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \ | |
63 | } | |
64 | ||
65 | static struct ieee80211_rate ath9k_legacy_rates[] = { | |
66 | RATE(10, 0x1b, 0), | |
67 | RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */ | |
68 | RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */ | |
69 | RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */ | |
70 | RATE(60, 0x0b, 0), | |
71 | RATE(90, 0x0f, 0), | |
72 | RATE(120, 0x0a, 0), | |
73 | RATE(180, 0x0e, 0), | |
74 | RATE(240, 0x09, 0), | |
75 | RATE(360, 0x0d, 0), | |
76 | RATE(480, 0x08, 0), | |
77 | RATE(540, 0x0c, 0), | |
78 | }; | |
79 | ||
80 | static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv) | |
81 | { | |
82 | int time_left; | |
83 | ||
84 | /* Firmware can take up to 50ms to get ready, to be safe use 1 second */ | |
85 | time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ); | |
86 | if (!time_left) { | |
87 | dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n"); | |
88 | return -ETIMEDOUT; | |
89 | } | |
90 | ||
91 | return 0; | |
92 | } | |
93 | ||
94 | static void ath9k_deinit_priv(struct ath9k_htc_priv *priv) | |
95 | { | |
e1572c5e | 96 | ath9k_htc_exit_debug(priv->ah); |
fb9987d0 S |
97 | ath9k_hw_deinit(priv->ah); |
98 | tasklet_kill(&priv->wmi_tasklet); | |
99 | tasklet_kill(&priv->rx_tasklet); | |
100 | tasklet_kill(&priv->tx_tasklet); | |
101 | kfree(priv->ah); | |
102 | priv->ah = NULL; | |
103 | } | |
104 | ||
105 | static void ath9k_deinit_device(struct ath9k_htc_priv *priv) | |
106 | { | |
107 | struct ieee80211_hw *hw = priv->hw; | |
108 | ||
109 | wiphy_rfkill_stop_polling(hw->wiphy); | |
110 | ath9k_deinit_leds(priv); | |
111 | ieee80211_unregister_hw(hw); | |
112 | ath9k_rx_cleanup(priv); | |
113 | ath9k_tx_cleanup(priv); | |
114 | ath9k_deinit_priv(priv); | |
115 | } | |
116 | ||
117 | static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv, | |
118 | u16 service_id, | |
119 | void (*tx) (void *, | |
120 | struct sk_buff *, | |
121 | enum htc_endpoint_id, | |
122 | bool txok), | |
123 | enum htc_endpoint_id *ep_id) | |
124 | { | |
125 | struct htc_service_connreq req; | |
126 | ||
127 | memset(&req, 0, sizeof(struct htc_service_connreq)); | |
128 | ||
129 | req.service_id = service_id; | |
130 | req.ep_callbacks.priv = priv; | |
131 | req.ep_callbacks.rx = ath9k_htc_rxep; | |
132 | req.ep_callbacks.tx = tx; | |
133 | ||
134 | return htc_connect_service(priv->htc, &req, ep_id); | |
135 | } | |
136 | ||
137 | static int ath9k_init_htc_services(struct ath9k_htc_priv *priv) | |
138 | { | |
139 | int ret; | |
140 | ||
141 | /* WMI CMD*/ | |
142 | ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep); | |
143 | if (ret) | |
144 | goto err; | |
145 | ||
146 | /* Beacon */ | |
147 | ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, NULL, | |
148 | &priv->beacon_ep); | |
149 | if (ret) | |
150 | goto err; | |
151 | ||
152 | /* CAB */ | |
153 | ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep, | |
154 | &priv->cab_ep); | |
155 | if (ret) | |
156 | goto err; | |
157 | ||
158 | ||
159 | /* UAPSD */ | |
160 | ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep, | |
161 | &priv->uapsd_ep); | |
162 | if (ret) | |
163 | goto err; | |
164 | ||
165 | /* MGMT */ | |
166 | ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep, | |
167 | &priv->mgmt_ep); | |
168 | if (ret) | |
169 | goto err; | |
170 | ||
171 | /* DATA BE */ | |
172 | ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep, | |
173 | &priv->data_be_ep); | |
174 | if (ret) | |
175 | goto err; | |
176 | ||
177 | /* DATA BK */ | |
178 | ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep, | |
179 | &priv->data_bk_ep); | |
180 | if (ret) | |
181 | goto err; | |
182 | ||
183 | /* DATA VI */ | |
184 | ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep, | |
185 | &priv->data_vi_ep); | |
186 | if (ret) | |
187 | goto err; | |
188 | ||
189 | /* DATA VO */ | |
190 | ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep, | |
191 | &priv->data_vo_ep); | |
192 | if (ret) | |
193 | goto err; | |
194 | ||
195 | ret = htc_init(priv->htc); | |
196 | if (ret) | |
197 | goto err; | |
198 | ||
199 | return 0; | |
200 | ||
201 | err: | |
202 | dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n"); | |
203 | return ret; | |
204 | } | |
205 | ||
206 | static int ath9k_reg_notifier(struct wiphy *wiphy, | |
207 | struct regulatory_request *request) | |
208 | { | |
209 | struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); | |
210 | struct ath9k_htc_priv *priv = hw->priv; | |
211 | ||
212 | return ath_reg_notifier_apply(wiphy, request, | |
213 | ath9k_hw_regulatory(priv->ah)); | |
214 | } | |
215 | ||
216 | static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset) | |
217 | { | |
218 | struct ath_hw *ah = (struct ath_hw *) hw_priv; | |
219 | struct ath_common *common = ath9k_hw_common(ah); | |
220 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; | |
221 | __be32 val, reg = cpu_to_be32(reg_offset); | |
222 | int r; | |
223 | ||
224 | r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID, | |
225 | (u8 *) ®, sizeof(reg), | |
226 | (u8 *) &val, sizeof(val), | |
227 | 100); | |
228 | if (unlikely(r)) { | |
229 | ath_print(common, ATH_DBG_WMI, | |
230 | "REGISTER READ FAILED: (0x%04x, %d)\n", | |
231 | reg_offset, r); | |
232 | return -EIO; | |
233 | } | |
234 | ||
235 | return be32_to_cpu(val); | |
236 | } | |
237 | ||
238 | static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset) | |
239 | { | |
240 | struct ath_hw *ah = (struct ath_hw *) hw_priv; | |
241 | struct ath_common *common = ath9k_hw_common(ah); | |
242 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; | |
243 | __be32 buf[2] = { | |
244 | cpu_to_be32(reg_offset), | |
245 | cpu_to_be32(val), | |
246 | }; | |
247 | int r; | |
248 | ||
249 | r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID, | |
250 | (u8 *) &buf, sizeof(buf), | |
251 | (u8 *) &val, sizeof(val), | |
252 | 100); | |
253 | if (unlikely(r)) { | |
254 | ath_print(common, ATH_DBG_WMI, | |
255 | "REGISTER WRITE FAILED:(0x%04x, %d)\n", | |
256 | reg_offset, r); | |
257 | } | |
258 | } | |
259 | ||
260 | static const struct ath_ops ath9k_common_ops = { | |
261 | .read = ath9k_ioread32, | |
262 | .write = ath9k_iowrite32, | |
263 | }; | |
264 | ||
265 | static void ath_usb_read_cachesize(struct ath_common *common, int *csz) | |
266 | { | |
267 | *csz = L1_CACHE_BYTES >> 2; | |
268 | } | |
269 | ||
270 | static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data) | |
271 | { | |
272 | struct ath_hw *ah = (struct ath_hw *) common->ah; | |
273 | ||
274 | (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S)); | |
275 | ||
276 | if (!ath9k_hw_wait(ah, | |
277 | AR_EEPROM_STATUS_DATA, | |
278 | AR_EEPROM_STATUS_DATA_BUSY | | |
279 | AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0, | |
280 | AH_WAIT_TIMEOUT)) | |
281 | return false; | |
282 | ||
283 | *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA), | |
284 | AR_EEPROM_STATUS_DATA_VAL); | |
285 | ||
286 | return true; | |
287 | } | |
288 | ||
289 | static const struct ath_bus_ops ath9k_usb_bus_ops = { | |
290 | .read_cachesize = ath_usb_read_cachesize, | |
291 | .eeprom_read = ath_usb_eeprom_read, | |
292 | }; | |
293 | ||
294 | static void setup_ht_cap(struct ath9k_htc_priv *priv, | |
295 | struct ieee80211_sta_ht_cap *ht_info) | |
296 | { | |
297 | ht_info->ht_supported = true; | |
298 | ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | | |
299 | IEEE80211_HT_CAP_SM_PS | | |
300 | IEEE80211_HT_CAP_SGI_40 | | |
301 | IEEE80211_HT_CAP_DSSSCCK40; | |
302 | ||
303 | ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; | |
304 | ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; | |
305 | ||
306 | memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); | |
307 | ht_info->mcs.rx_mask[0] = 0xff; | |
308 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; | |
309 | } | |
310 | ||
311 | static int ath9k_init_queues(struct ath9k_htc_priv *priv) | |
312 | { | |
313 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
314 | int i; | |
315 | ||
316 | for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++) | |
317 | priv->hwq_map[i] = -1; | |
318 | ||
319 | if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BE)) { | |
320 | ath_print(common, ATH_DBG_FATAL, | |
321 | "Unable to setup xmit queue for BE traffic\n"); | |
322 | goto err; | |
323 | } | |
324 | ||
325 | if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BK)) { | |
326 | ath_print(common, ATH_DBG_FATAL, | |
327 | "Unable to setup xmit queue for BK traffic\n"); | |
328 | goto err; | |
329 | } | |
330 | if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_VI)) { | |
331 | ath_print(common, ATH_DBG_FATAL, | |
332 | "Unable to setup xmit queue for VI traffic\n"); | |
333 | goto err; | |
334 | } | |
335 | if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_VO)) { | |
336 | ath_print(common, ATH_DBG_FATAL, | |
337 | "Unable to setup xmit queue for VO traffic\n"); | |
338 | goto err; | |
339 | } | |
340 | ||
341 | return 0; | |
342 | ||
343 | err: | |
344 | return -EINVAL; | |
345 | } | |
346 | ||
347 | static void ath9k_init_crypto(struct ath9k_htc_priv *priv) | |
348 | { | |
349 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
350 | int i = 0; | |
351 | ||
352 | /* Get the hardware key cache size. */ | |
353 | common->keymax = priv->ah->caps.keycache_size; | |
354 | if (common->keymax > ATH_KEYMAX) { | |
355 | ath_print(common, ATH_DBG_ANY, | |
356 | "Warning, using only %u entries in %u key cache\n", | |
357 | ATH_KEYMAX, common->keymax); | |
358 | common->keymax = ATH_KEYMAX; | |
359 | } | |
360 | ||
361 | /* | |
362 | * Reset the key cache since some parts do not | |
363 | * reset the contents on initial power up. | |
364 | */ | |
365 | for (i = 0; i < common->keymax; i++) | |
366 | ath9k_hw_keyreset(priv->ah, (u16) i); | |
367 | ||
368 | if (ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER, | |
369 | ATH9K_CIPHER_TKIP, NULL)) { | |
370 | /* | |
371 | * Whether we should enable h/w TKIP MIC. | |
372 | * XXX: if we don't support WME TKIP MIC, then we wouldn't | |
373 | * report WMM capable, so it's always safe to turn on | |
374 | * TKIP MIC in this case. | |
375 | */ | |
376 | ath9k_hw_setcapability(priv->ah, ATH9K_CAP_TKIP_MIC, 0, 1, NULL); | |
377 | } | |
378 | ||
379 | /* | |
380 | * Check whether the separate key cache entries | |
381 | * are required to handle both tx+rx MIC keys. | |
382 | * With split mic keys the number of stations is limited | |
383 | * to 27 otherwise 59. | |
384 | */ | |
385 | if (ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER, | |
386 | ATH9K_CIPHER_TKIP, NULL) | |
387 | && ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER, | |
388 | ATH9K_CIPHER_MIC, NULL) | |
389 | && ath9k_hw_getcapability(priv->ah, ATH9K_CAP_TKIP_SPLIT, | |
390 | 0, NULL)) | |
391 | common->splitmic = 1; | |
392 | ||
393 | /* turn on mcast key search if possible */ | |
394 | if (!ath9k_hw_getcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL)) | |
395 | (void)ath9k_hw_setcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH, | |
396 | 1, 1, NULL); | |
397 | } | |
398 | ||
399 | static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) | |
400 | { | |
401 | if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) { | |
402 | priv->sbands[IEEE80211_BAND_2GHZ].channels = | |
403 | ath9k_2ghz_channels; | |
404 | priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; | |
405 | priv->sbands[IEEE80211_BAND_2GHZ].n_channels = | |
406 | ARRAY_SIZE(ath9k_2ghz_channels); | |
407 | priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates; | |
408 | priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates = | |
409 | ARRAY_SIZE(ath9k_legacy_rates); | |
410 | } | |
411 | } | |
412 | ||
413 | static void ath9k_init_misc(struct ath9k_htc_priv *priv) | |
414 | { | |
415 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
416 | ||
417 | common->tx_chainmask = priv->ah->caps.tx_chainmask; | |
418 | common->rx_chainmask = priv->ah->caps.rx_chainmask; | |
419 | ||
420 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) | |
421 | memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); | |
422 | ||
423 | priv->op_flags |= OP_TXAGGR; | |
424 | } | |
425 | ||
426 | static int ath9k_init_priv(struct ath9k_htc_priv *priv, u16 devid) | |
427 | { | |
428 | struct ath_hw *ah = NULL; | |
429 | struct ath_common *common; | |
430 | int ret = 0, csz = 0; | |
431 | ||
432 | priv->op_flags |= OP_INVALID; | |
433 | ||
434 | ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL); | |
435 | if (!ah) | |
436 | return -ENOMEM; | |
437 | ||
438 | ah->hw_version.devid = devid; | |
439 | ah->hw_version.subsysid = 0; /* FIXME */ | |
440 | priv->ah = ah; | |
441 | ||
442 | common = ath9k_hw_common(ah); | |
443 | common->ops = &ath9k_common_ops; | |
444 | common->bus_ops = &ath9k_usb_bus_ops; | |
445 | common->ah = ah; | |
446 | common->hw = priv->hw; | |
447 | common->priv = priv; | |
448 | common->debug_mask = ath9k_debug; | |
449 | ||
450 | spin_lock_init(&priv->wmi->wmi_lock); | |
451 | spin_lock_init(&priv->beacon_lock); | |
452 | mutex_init(&priv->mutex); | |
453 | mutex_init(&priv->aggr_work.mutex); | |
454 | tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet, | |
455 | (unsigned long)priv); | |
456 | tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet, | |
457 | (unsigned long)priv); | |
458 | tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv); | |
459 | INIT_DELAYED_WORK(&priv->ath9k_aggr_work, ath9k_htc_aggr_work); | |
460 | INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work); | |
461 | ||
462 | /* | |
463 | * Cache line size is used to size and align various | |
464 | * structures used to communicate with the hardware. | |
465 | */ | |
466 | ath_read_cachesize(common, &csz); | |
467 | common->cachelsz = csz << 2; /* convert to bytes */ | |
468 | ||
469 | ret = ath9k_hw_init(ah); | |
470 | if (ret) { | |
471 | ath_print(common, ATH_DBG_FATAL, | |
472 | "Unable to initialize hardware; " | |
473 | "initialization status: %d\n", ret); | |
474 | goto err_hw; | |
475 | } | |
476 | ||
e1572c5e | 477 | ret = ath9k_htc_init_debug(ah); |
fb9987d0 S |
478 | if (ret) { |
479 | ath_print(common, ATH_DBG_FATAL, | |
480 | "Unable to create debugfs files\n"); | |
481 | goto err_debug; | |
482 | } | |
483 | ||
484 | ret = ath9k_init_queues(priv); | |
485 | if (ret) | |
486 | goto err_queues; | |
487 | ||
488 | ath9k_init_crypto(priv); | |
489 | ath9k_init_channels_rates(priv); | |
490 | ath9k_init_misc(priv); | |
491 | ||
492 | return 0; | |
493 | ||
494 | err_queues: | |
e1572c5e | 495 | ath9k_htc_exit_debug(ah); |
fb9987d0 S |
496 | err_debug: |
497 | ath9k_hw_deinit(ah); | |
498 | err_hw: | |
499 | ||
500 | kfree(ah); | |
501 | priv->ah = NULL; | |
502 | ||
503 | return ret; | |
504 | } | |
505 | ||
506 | static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv, | |
507 | struct ieee80211_hw *hw) | |
508 | { | |
509 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
510 | ||
511 | hw->flags = IEEE80211_HW_SIGNAL_DBM | | |
512 | IEEE80211_HW_AMPDU_AGGREGATION | | |
513 | IEEE80211_HW_SPECTRUM_MGMT | | |
514 | IEEE80211_HW_HAS_RATE_CONTROL; | |
515 | ||
516 | hw->wiphy->interface_modes = | |
517 | BIT(NL80211_IFTYPE_STATION) | | |
518 | BIT(NL80211_IFTYPE_ADHOC); | |
519 | ||
520 | hw->queues = 4; | |
521 | hw->channel_change_time = 5000; | |
522 | hw->max_listen_interval = 10; | |
523 | hw->vif_data_size = sizeof(struct ath9k_htc_vif); | |
524 | hw->sta_data_size = sizeof(struct ath9k_htc_sta); | |
525 | ||
526 | /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */ | |
527 | hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) + | |
528 | sizeof(struct htc_frame_hdr) + 4; | |
529 | ||
530 | if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) | |
531 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | |
532 | &priv->sbands[IEEE80211_BAND_2GHZ]; | |
533 | ||
534 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) { | |
535 | if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) | |
536 | setup_ht_cap(priv, | |
537 | &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap); | |
538 | } | |
539 | ||
540 | SET_IEEE80211_PERM_ADDR(hw, common->macaddr); | |
541 | } | |
542 | ||
543 | static int ath9k_init_device(struct ath9k_htc_priv *priv, u16 devid) | |
544 | { | |
545 | struct ieee80211_hw *hw = priv->hw; | |
546 | struct ath_common *common; | |
547 | struct ath_hw *ah; | |
548 | int error = 0; | |
549 | struct ath_regulatory *reg; | |
550 | ||
551 | /* Bring up device */ | |
552 | error = ath9k_init_priv(priv, devid); | |
553 | if (error != 0) | |
554 | goto err_init; | |
555 | ||
556 | ah = priv->ah; | |
557 | common = ath9k_hw_common(ah); | |
558 | ath9k_set_hw_capab(priv, hw); | |
559 | ||
560 | /* Initialize regulatory */ | |
561 | error = ath_regd_init(&common->regulatory, priv->hw->wiphy, | |
562 | ath9k_reg_notifier); | |
563 | if (error) | |
564 | goto err_regd; | |
565 | ||
566 | reg = &common->regulatory; | |
567 | ||
568 | /* Setup TX */ | |
569 | error = ath9k_tx_init(priv); | |
570 | if (error != 0) | |
571 | goto err_tx; | |
572 | ||
573 | /* Setup RX */ | |
574 | error = ath9k_rx_init(priv); | |
575 | if (error != 0) | |
576 | goto err_rx; | |
577 | ||
578 | /* Register with mac80211 */ | |
579 | error = ieee80211_register_hw(hw); | |
580 | if (error) | |
581 | goto err_register; | |
582 | ||
583 | /* Handle world regulatory */ | |
584 | if (!ath_is_world_regd(reg)) { | |
585 | error = regulatory_hint(hw->wiphy, reg->alpha2); | |
586 | if (error) | |
587 | goto err_world; | |
588 | } | |
589 | ||
590 | ath9k_init_leds(priv); | |
591 | ath9k_start_rfkill_poll(priv); | |
592 | ||
593 | return 0; | |
594 | ||
595 | err_world: | |
596 | ieee80211_unregister_hw(hw); | |
597 | err_register: | |
598 | ath9k_rx_cleanup(priv); | |
599 | err_rx: | |
600 | ath9k_tx_cleanup(priv); | |
601 | err_tx: | |
602 | /* Nothing */ | |
603 | err_regd: | |
604 | ath9k_deinit_priv(priv); | |
605 | err_init: | |
606 | return error; | |
607 | } | |
608 | ||
609 | int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, | |
610 | u16 devid) | |
611 | { | |
612 | struct ieee80211_hw *hw; | |
613 | struct ath9k_htc_priv *priv; | |
614 | int ret; | |
615 | ||
616 | hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops); | |
617 | if (!hw) | |
618 | return -ENOMEM; | |
619 | ||
620 | priv = hw->priv; | |
621 | priv->hw = hw; | |
622 | priv->htc = htc_handle; | |
623 | priv->dev = dev; | |
624 | htc_handle->drv_priv = priv; | |
625 | SET_IEEE80211_DEV(hw, priv->dev); | |
626 | ||
627 | ret = ath9k_htc_wait_for_target(priv); | |
628 | if (ret) | |
629 | goto err_free; | |
630 | ||
631 | priv->wmi = ath9k_init_wmi(priv); | |
632 | if (!priv->wmi) { | |
633 | ret = -EINVAL; | |
634 | goto err_free; | |
635 | } | |
636 | ||
637 | ret = ath9k_init_htc_services(priv); | |
638 | if (ret) | |
639 | goto err_init; | |
640 | ||
641 | ret = ath9k_init_device(priv, devid); | |
642 | if (ret) | |
643 | goto err_init; | |
644 | ||
645 | return 0; | |
646 | ||
647 | err_init: | |
648 | ath9k_deinit_wmi(priv); | |
649 | err_free: | |
650 | ieee80211_free_hw(hw); | |
651 | return ret; | |
652 | } | |
653 | ||
654 | void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug) | |
655 | { | |
656 | if (htc_handle->drv_priv) { | |
657 | ath9k_deinit_device(htc_handle->drv_priv); | |
658 | ath9k_deinit_wmi(htc_handle->drv_priv); | |
659 | ieee80211_free_hw(htc_handle->drv_priv->hw); | |
660 | } | |
661 | } | |
662 | ||
663 | #ifdef CONFIG_PM | |
664 | int ath9k_htc_resume(struct htc_target *htc_handle) | |
665 | { | |
666 | int ret; | |
667 | ||
668 | ret = ath9k_htc_wait_for_target(htc_handle->drv_priv); | |
669 | if (ret) | |
670 | return ret; | |
671 | ||
672 | ret = ath9k_init_htc_services(htc_handle->drv_priv); | |
673 | return ret; | |
674 | } | |
675 | #endif | |
676 | ||
677 | static int __init ath9k_htc_init(void) | |
678 | { | |
679 | int error; | |
680 | ||
e1572c5e | 681 | error = ath9k_htc_debug_create_root(); |
fb9987d0 S |
682 | if (error < 0) { |
683 | printk(KERN_ERR | |
684 | "ath9k_htc: Unable to create debugfs root: %d\n", | |
685 | error); | |
686 | goto err_dbg; | |
687 | } | |
688 | ||
689 | error = ath9k_hif_usb_init(); | |
690 | if (error < 0) { | |
691 | printk(KERN_ERR | |
692 | "ath9k_htc: No USB devices found," | |
693 | " driver not installed.\n"); | |
694 | error = -ENODEV; | |
695 | goto err_usb; | |
696 | } | |
697 | ||
698 | return 0; | |
699 | ||
700 | err_usb: | |
e1572c5e | 701 | ath9k_htc_debug_remove_root(); |
fb9987d0 S |
702 | err_dbg: |
703 | return error; | |
704 | } | |
705 | module_init(ath9k_htc_init); | |
706 | ||
707 | static void __exit ath9k_htc_exit(void) | |
708 | { | |
709 | ath9k_hif_usb_exit(); | |
e1572c5e | 710 | ath9k_htc_debug_remove_root(); |
fb9987d0 S |
711 | printk(KERN_INFO "ath9k_htc: Driver unloaded\n"); |
712 | } | |
713 | module_exit(ath9k_htc_exit); |