[deliverable/linux.git] / drivers / net / wireless / b43 / phy_common.h

#ifndef LINUX_B43_PHY_COMMON_H_
#define LINUX_B43_PHY_COMMON_H_

#include <linux/types.h>
#include <linux/nl80211.h>

struct b43_wldev;

/* Complex number using 2 32-bit signed integers */
struct b43_c32 { s32 i, q; };

#define CORDIC_CONVERT(value)	(((value) >= 0) ? \
				 ((((value) >> 15) + 1) >> 1) : \
				 -((((-(value)) >> 15) + 1) >> 1))

/* PHY register routing bits */
#define B43_PHYROUTE			0x0C00 /* PHY register routing bits mask */
#define  B43_PHYROUTE_BASE		0x0000 /* Base registers */
#define  B43_PHYROUTE_OFDM_GPHY		0x0400 /* OFDM register routing for G-PHYs */
#define  B43_PHYROUTE_EXT_GPHY		0x0800 /* Extended G-PHY registers */
#define  B43_PHYROUTE_N_BMODE		0x0C00 /* N-PHY BMODE registers */

/* CCK (B-PHY) registers. */
#define B43_PHY_CCK(reg)		((reg) | B43_PHYROUTE_BASE)
/* N-PHY registers. */
#define B43_PHY_N(reg)			((reg) | B43_PHYROUTE_BASE)
/* N-PHY BMODE registers. */
#define B43_PHY_N_BMODE(reg)		((reg) | B43_PHYROUTE_N_BMODE)
/* OFDM (A-PHY) registers. */
#define B43_PHY_OFDM(reg)		((reg) | B43_PHYROUTE_OFDM_GPHY)
/* Extended G-PHY registers. */
#define B43_PHY_EXTG(reg)		((reg) | B43_PHYROUTE_EXT_GPHY)


/* Masks for the PHY versioning registers. */
#define B43_PHYVER_ANALOG		0xF000
#define B43_PHYVER_ANALOG_SHIFT		12
#define B43_PHYVER_TYPE			0x0F00
#define B43_PHYVER_TYPE_SHIFT		8
#define B43_PHYVER_VERSION		0x00FF

/**
 * enum b43_interference_mitigation - Interference Mitigation mode
 *
 * @B43_INTERFMODE_NONE:	Disabled
 * @B43_INTERFMODE_NONWLAN:	Non-WLAN Interference Mitigation
 * @B43_INTERFMODE_MANUALWLAN:	WLAN Interference Mitigation
 * @B43_INTERFMODE_AUTOWLAN:	Automatic WLAN Interference Mitigation
 */
enum b43_interference_mitigation {
	B43_INTERFMODE_NONE,
	B43_INTERFMODE_NONWLAN,
	B43_INTERFMODE_MANUALWLAN,
	B43_INTERFMODE_AUTOWLAN,
};

/* Antenna identifiers */
enum {
	B43_ANTENNA0 = 0,	/* Antenna 0 */
	B43_ANTENNA1 = 1,	/* Antenna 1 */
	B43_ANTENNA_AUTO0 = 2,	/* Automatic, starting with antenna 0 */
	B43_ANTENNA_AUTO1 = 3,	/* Automatic, starting with antenna 1 */
	B43_ANTENNA2 = 4,
	B43_ANTENNA3 = 8,

	B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
	B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
};

/**
 * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
 *
 * @B43_TXPWR_RES_NEED_ADJUST:	Values changed. Hardware adjustment is needed.
 * @B43_TXPWR_RES_DONE:		No more work to do. Everything is done.
 */
enum b43_txpwr_result {
	B43_TXPWR_RES_NEED_ADJUST,
	B43_TXPWR_RES_DONE,
};

/**
 * struct b43_phy_operations - Function pointers for PHY ops.
 *
 * @allocate:		Allocate and initialise the PHY data structures.
 * 			Must not be NULL.
 * @free:		Destroy and free the PHY data structures.
 * 			Must not be NULL.
 *
 * @prepare_structs:	Prepare the PHY data structures.
 * 			The data structures allocated in @allocate are
 * 			initialized here.
 * 			Must not be NULL.
 * @prepare_hardware:	Prepare the PHY. This is called before b43_chip_init to
 * 			do some early early PHY hardware init.
 * 			Can be NULL, if not required.
 * @init:		Initialize the PHY.
 * 			Must not be NULL.
 * @exit:		Shutdown the PHY.
 * 			Can be NULL, if not required.
 *
 * @phy_read:		Read from a PHY register.
 * 			Must not be NULL.
 * @phy_write:		Write to a PHY register.
 * 			Must not be NULL.
 * @phy_maskset:	Maskset a PHY register, taking shortcuts.
 *			If it is NULL, a generic algorithm is used.
 * @radio_read:		Read from a Radio register.
 * 			Must not be NULL.
 * @radio_write:	Write to a Radio register.
 * 			Must not be NULL.
 *
 * @supports_hwpctl:	Returns a boolean whether Hardware Power Control
 * 			is supported or not.
 * 			If NULL, hwpctl is assumed to be never supported.
 * @software_rfkill:	Turn the radio ON or OFF.
 * 			Possible state values are
 * 			RFKILL_STATE_SOFT_BLOCKED or
 * 			RFKILL_STATE_UNBLOCKED
 * 			Must not be NULL.
 * @switch_analog:	Turn the Analog on/off.
 * 			Must not be NULL.
 * @switch_channel:	Switch the radio to another channel.
 * 			Must not be NULL.
 * @get_default_chan:	Just returns the default channel number.
 * 			Must not be NULL.
 * @set_rx_antenna:	Set the antenna used for RX.
 * 			Can be NULL, if not supported.
 * @interf_mitigation:	Switch the Interference Mitigation mode.
 * 			Can be NULL, if not supported.
 *
 * @recalc_txpower:	Recalculate the transmission power parameters.
 * 			This callback has to recalculate the TX power settings,
 * 			but does not need to write them to the hardware, yet.
 * 			Returns enum b43_txpwr_result to indicate whether the hardware
 * 			needs to be adjusted.
 * 			If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
 * 			will be called later.
 * 			If the parameter "ignore_tssi" is true, the TSSI values should
 * 			be ignored and a recalculation of the power settings should be
 * 			done even if the TSSI values did not change.
 * 			This function may sleep, but should not.
 * 			Must not be NULL.
 * @adjust_txpower:	Write the previously calculated TX power settings
 * 			(from @recalc_txpower) to the hardware.
 * 			This function may sleep.
 * 			Can be NULL, if (and ONLY if) @recalc_txpower _always_
 * 			returns B43_TXPWR_RES_DONE.
 *
 * @pwork_15sec:	Periodic work. Called every 15 seconds.
 * 			Can be NULL, if not required.
 * @pwork_60sec:	Periodic work. Called every 60 seconds.
 * 			Can be NULL, if not required.
 */
struct b43_phy_operations {
	/* Initialisation */
	int (*allocate)(struct b43_wldev *dev);
	void (*free)(struct b43_wldev *dev);
	void (*prepare_structs)(struct b43_wldev *dev);
	int (*prepare_hardware)(struct b43_wldev *dev);
	int (*init)(struct b43_wldev *dev);
	void (*exit)(struct b43_wldev *dev);

	/* Register access */
	u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
	void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
	void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
	u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
	void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);

	/* Radio */
	bool (*supports_hwpctl)(struct b43_wldev *dev);
	void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
	void (*switch_analog)(struct b43_wldev *dev, bool on);
	int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
	unsigned int (*get_default_chan)(struct b43_wldev *dev);
	void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
	int (*interf_mitigation)(struct b43_wldev *dev,
				 enum b43_interference_mitigation new_mode);

	/* Transmission power adjustment */
	enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
						bool ignore_tssi);
	void (*adjust_txpower)(struct b43_wldev *dev);

	/* Misc */
	void (*pwork_15sec)(struct b43_wldev *dev);
	void (*pwork_60sec)(struct b43_wldev *dev);
};

struct b43_phy_a;
struct b43_phy_g;
struct b43_phy_n;
struct b43_phy_lp;

struct b43_phy {
	/* Hardware operation callbacks. */
	const struct b43_phy_operations *ops;

	/* Most hardware context information is stored in the standard-
	 * specific data structures pointed to by the pointers below.
	 * Only one of them is valid (the currently enabled PHY). */
#ifdef CONFIG_B43_DEBUG
	/* No union for debug build to force NULL derefs in buggy code. */
	struct {
#else
	union {
#endif
		/* A-PHY specific information */
		struct b43_phy_a *a;
		/* G-PHY specific information */
		struct b43_phy_g *g;
		/* N-PHY specific information */
		struct b43_phy_n *n;
		/* LP-PHY specific information */
		struct b43_phy_lp *lp;
	};

	/* Band support flags. */
	bool supports_2ghz;
	bool supports_5ghz;

	/* HT info */
	bool is_40mhz;

	/* GMODE bit enabled? */
	bool gmode;

	/* Analog Type */
	u8 analog;
	/* B43_PHYTYPE_ */
	u8 type;
	/* PHY revision number. */
	u8 rev;

	/* Radio versioning */
	u16 radio_manuf;	/* Radio manufacturer */
	u16 radio_ver;		/* Radio version */
	u8 radio_rev;		/* Radio revision */

	/* Software state of the radio */
	bool radio_on;

	/* Desired TX power level (in dBm).
	 * This is set by the user and adjusted in b43_phy_xmitpower(). */
	int desired_txpower;

	/* Hardware Power Control enabled? */
	bool hardware_power_control;

	/* The time (in absolute jiffies) when the next TX power output
	 * check is needed. */
	unsigned long next_txpwr_check_time;

	/* Current channel */
	unsigned int channel;
	u16 channel_freq;
	enum nl80211_channel_type channel_type;

	/* PHY TX errors counter. */
	atomic_t txerr_cnt;

#ifdef CONFIG_B43_DEBUG
	/* PHY registers locked (w.r.t. firmware) */
	bool phy_locked;
	/* Radio registers locked (w.r.t. firmware) */
	bool radio_locked;
#endif /* B43_DEBUG */
};


/**
 * b43_phy_allocate - Allocate PHY structs
 * Allocate the PHY data structures, based on the current dev->phy.type
 */
int b43_phy_allocate(struct b43_wldev *dev);

/**
 * b43_phy_free - Free PHY structs
 */
void b43_phy_free(struct b43_wldev *dev);

/**
 * b43_phy_init - Initialise the PHY
 */
int b43_phy_init(struct b43_wldev *dev);

/**
 * b43_phy_exit - Cleanup PHY
 */
void b43_phy_exit(struct b43_wldev *dev);

/**
 * b43_has_hardware_pctl - Hardware Power Control supported?
 * Returns a boolean, whether hardware power control is supported.
 */
bool b43_has_hardware_pctl(struct b43_wldev *dev);

/**
 * b43_phy_read - 16bit PHY register read access
 */
u16 b43_phy_read(struct b43_wldev *dev, u16 reg);

/**
 * b43_phy_write - 16bit PHY register write access
 */
void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);

/**
 * b43_phy_copy - copy contents of 16bit PHY register to another
 */
void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);

/**
 * b43_phy_mask - Mask a PHY register with a mask
 */
void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);

/**
 * b43_phy_set - OR a PHY register with a bitmap
 */
void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);

/**
 * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
 */
void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);

/**
 * b43_radio_read - 16bit Radio register read access
 */
u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
#define b43_radio_read16	b43_radio_read /* DEPRECATED */

/**
 * b43_radio_write - 16bit Radio register write access
 */
void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
#define b43_radio_write16	b43_radio_write /* DEPRECATED */

/**
 * b43_radio_mask - Mask a 16bit radio register with a mask
 */
void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);

/**
 * b43_radio_set - OR a 16bit radio register with a bitmap
 */
void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);

/**
 * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
 */
void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);

/**
 * b43_radio_lock - Lock firmware radio register access
 */
void b43_radio_lock(struct b43_wldev *dev);

/**
 * b43_radio_unlock - Unlock firmware radio register access
 */
void b43_radio_unlock(struct b43_wldev *dev);

/**
 * b43_phy_lock - Lock firmware PHY register access
 */
void b43_phy_lock(struct b43_wldev *dev);

/**
 * b43_phy_unlock - Unlock firmware PHY register access
 */
void b43_phy_unlock(struct b43_wldev *dev);

/**
 * b43_switch_channel - Switch to another channel
 */
int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
/**
 * B43_DEFAULT_CHANNEL - Switch to the default channel.
 */
#define B43_DEFAULT_CHANNEL	UINT_MAX

/**
 * b43_software_rfkill - Turn the radio ON or OFF in software.
 */
void b43_software_rfkill(struct b43_wldev *dev, bool blocked);

/**
 * b43_phy_txpower_check - Check TX power output.
 *
 * Compare the current TX power output to the desired power emission
 * and schedule an adjustment in case it mismatches.
 *
 * @flags:	OR'ed enum b43_phy_txpower_check_flags flags.
 * 		See the docs below.
 */
void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
/**
 * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
 *
 * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
 *                         the check now.
 * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
 *                         TSSI did not change.
 */
enum b43_phy_txpower_check_flags {
	B43_TXPWR_IGNORE_TIME		= (1 << 0),
	B43_TXPWR_IGNORE_TSSI		= (1 << 1),
};

struct work_struct;
void b43_phy_txpower_adjust_work(struct work_struct *work);

/**
 * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
 *
 * @shm_offset:		The SHM address to read the values from.
 *
 * Returns the average of the 4 TSSI values, or a negative error code.
 */
int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);

/**
 * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
 *
 * It does the switching based on the PHY0 core register.
 * Do _not_ call this directly. Only use it as a switch_analog callback
 * for struct b43_phy_operations.
 */
void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);

struct b43_c32 b43_cordic(int theta);

#endif /* LINUX_B43_PHY_COMMON_H_ */
Commit	Line	Data
ef1a628d MB	1	#ifndef LINUX_B43_PHY_COMMON_H_
	2	#define LINUX_B43_PHY_COMMON_H_
	3
f41f3f37	4	#include <linux/types.h>
e5c407f9	5	#include <linux/nl80211.h>
ef1a628d MB	6
	7	struct b43_wldev;
	8
98650454 RM	9	/* Complex number using 2 32-bit signed integers */
98650454 RM	10	struct b43_c32 { s32 i, q; };
ef1a628d	11
6f98e62a RM	12	#define CORDIC_CONVERT(value) (((value) >= 0) ? \
	13	((((value) >> 15) + 1) >> 1) : \
	14	-((((-(value)) >> 15) + 1) >> 1))
	15
ef1a628d MB	16	/* PHY register routing bits */
	17	#define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
	18	#define B43_PHYROUTE_BASE 0x0000 /* Base registers */
	19	#define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
	20	#define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
	21	#define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
	22
	23	/* CCK (B-PHY) registers. */
	24	#define B43_PHY_CCK(reg) ((reg) \| B43_PHYROUTE_BASE)
	25	/* N-PHY registers. */
	26	#define B43_PHY_N(reg) ((reg) \| B43_PHYROUTE_BASE)
	27	/* N-PHY BMODE registers. */
	28	#define B43_PHY_N_BMODE(reg) ((reg) \| B43_PHYROUTE_N_BMODE)
	29	/* OFDM (A-PHY) registers. */
	30	#define B43_PHY_OFDM(reg) ((reg) \| B43_PHYROUTE_OFDM_GPHY)
	31	/* Extended G-PHY registers. */
	32	#define B43_PHY_EXTG(reg) ((reg) \| B43_PHYROUTE_EXT_GPHY)
	33
	34
	35	/* Masks for the PHY versioning registers. */
	36	#define B43_PHYVER_ANALOG 0xF000
	37	#define B43_PHYVER_ANALOG_SHIFT 12
	38	#define B43_PHYVER_TYPE 0x0F00
	39	#define B43_PHYVER_TYPE_SHIFT 8
	40	#define B43_PHYVER_VERSION 0x00FF
	41
	42	/**
	43	* enum b43_interference_mitigation - Interference Mitigation mode
	44	*
	45	* @B43_INTERFMODE_NONE: Disabled
	46	* @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
	47	* @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
	48	* @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
	49	*/
	50	enum b43_interference_mitigation {
	51	B43_INTERFMODE_NONE,
	52	B43_INTERFMODE_NONWLAN,
	53	B43_INTERFMODE_MANUALWLAN,
	54	B43_INTERFMODE_AUTOWLAN,
	55	};
	56
	57	/* Antenna identifiers */
	58	enum {
64e368bf GS	59	B43_ANTENNA0 = 0, /* Antenna 0 */
	60	B43_ANTENNA1 = 1, /* Antenna 1 */
	61	B43_ANTENNA_AUTO0 = 2, /* Automatic, starting with antenna 0 */
	62	B43_ANTENNA_AUTO1 = 3, /* Automatic, starting with antenna 1 */
	63	B43_ANTENNA2 = 4,
ef1a628d MB	64	B43_ANTENNA3 = 8,
	65
	66	B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
	67	B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
	68	};
	69
18c8adeb MB	70	/**
	71	* enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
	72	*
	73	* @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed.
	74	* @B43_TXPWR_RES_DONE: No more work to do. Everything is done.
	75	*/
	76	enum b43_txpwr_result {
	77	B43_TXPWR_RES_NEED_ADJUST,
	78	B43_TXPWR_RES_DONE,
	79	};
	80
ef1a628d MB	81	/**
	82	* struct b43_phy_operations - Function pointers for PHY ops.
	83	*
fb11137a MB	84	* @allocate: Allocate and initialise the PHY data structures.
	85	* Must not be NULL.
	86	* @free: Destroy and free the PHY data structures.
	87	* Must not be NULL.
	88	*
	89	* @prepare_structs: Prepare the PHY data structures.
	90	* The data structures allocated in @allocate are
	91	* initialized here.
	92	* Must not be NULL.
	93	* @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to
	94	* do some early early PHY hardware init.
ef1a628d MB	95	* Can be NULL, if not required.
	96	* @init: Initialize the PHY.
	97	* Must not be NULL.
fb11137a	98	* @exit: Shutdown the PHY.
ef1a628d MB	99	* Can be NULL, if not required.
	100	*
	101	* @phy_read: Read from a PHY register.
	102	* Must not be NULL.
	103	* @phy_write: Write to a PHY register.
	104	* Must not be NULL.
68ec5329 GS	105	* @phy_maskset: Maskset a PHY register, taking shortcuts.
68ec5329 GS	106	* If it is NULL, a generic algorithm is used.
ef1a628d MB	107	* @radio_read: Read from a Radio register.
	108	* Must not be NULL.
	109	* @radio_write: Write to a Radio register.
	110	* Must not be NULL.
	111	*
	112	* @supports_hwpctl: Returns a boolean whether Hardware Power Control
	113	* is supported or not.
	114	* If NULL, hwpctl is assumed to be never supported.
	115	* @software_rfkill: Turn the radio ON or OFF.
	116	* Possible state values are
	117	* RFKILL_STATE_SOFT_BLOCKED or
	118	* RFKILL_STATE_UNBLOCKED
	119	* Must not be NULL.
cb24f57f MB	120	* @switch_analog: Turn the Analog on/off.
cb24f57f MB	121	* Must not be NULL.
ef1a628d MB	122	* @switch_channel: Switch the radio to another channel.
	123	* Must not be NULL.
	124	* @get_default_chan: Just returns the default channel number.
	125	* Must not be NULL.
	126	* @set_rx_antenna: Set the antenna used for RX.
	127	* Can be NULL, if not supported.
	128	* @interf_mitigation: Switch the Interference Mitigation mode.
	129	* Can be NULL, if not supported.
	130	*
18c8adeb MB	131	* @recalc_txpower: Recalculate the transmission power parameters.
	132	* This callback has to recalculate the TX power settings,
	133	* but does not need to write them to the hardware, yet.
	134	* Returns enum b43_txpwr_result to indicate whether the hardware
	135	* needs to be adjusted.
	136	* If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
	137	* will be called later.
	138	* If the parameter "ignore_tssi" is true, the TSSI values should
	139	* be ignored and a recalculation of the power settings should be
	140	* done even if the TSSI values did not change.
36dbd954	141	* This function may sleep, but should not.
ef1a628d	142	* Must not be NULL.
18c8adeb MB	143	* @adjust_txpower: Write the previously calculated TX power settings
	144	* (from @recalc_txpower) to the hardware.
	145	* This function may sleep.
	146	* Can be NULL, if (and ONLY if) @recalc_txpower _always_
	147	* returns B43_TXPWR_RES_DONE.
ef1a628d MB	148	*
	149	* @pwork_15sec: Periodic work. Called every 15 seconds.
	150	* Can be NULL, if not required.
	151	* @pwork_60sec: Periodic work. Called every 60 seconds.
	152	* Can be NULL, if not required.
	153	*/
	154	struct b43_phy_operations {
	155	/* Initialisation */
	156	int (allocate)(struct b43_wldev dev);
fb11137a MB	157	void (free)(struct b43_wldev dev);
	158	void (prepare_structs)(struct b43_wldev dev);
	159	int (prepare_hardware)(struct b43_wldev dev);
ef1a628d MB	160	int (init)(struct b43_wldev dev);
	161	void (exit)(struct b43_wldev dev);
	162
	163	/* Register access */
	164	u16 (phy_read)(struct b43_wldev dev, u16 reg);
	165	void (phy_write)(struct b43_wldev dev, u16 reg, u16 value);
68ec5329	166	void (phy_maskset)(struct b43_wldev dev, u16 reg, u16 mask, u16 set);
ef1a628d MB	167	u16 (radio_read)(struct b43_wldev dev, u16 reg);
	168	void (radio_write)(struct b43_wldev dev, u16 reg, u16 value);
	169
	170	/* Radio */
	171	bool (supports_hwpctl)(struct b43_wldev dev);
19d337df	172	void (software_rfkill)(struct b43_wldev dev, bool blocked);
cb24f57f	173	void (switch_analog)(struct b43_wldev dev, bool on);
ef1a628d MB	174	int (switch_channel)(struct b43_wldev dev, unsigned int new_channel);
	175	unsigned int (get_default_chan)(struct b43_wldev dev);
	176	void (set_rx_antenna)(struct b43_wldev dev, int antenna);
	177	int (interf_mitigation)(struct b43_wldev dev,
	178	enum b43_interference_mitigation new_mode);
	179
	180	/* Transmission power adjustment */
18c8adeb MB	181	enum b43_txpwr_result (recalc_txpower)(struct b43_wldev dev,
	182	bool ignore_tssi);
	183	void (adjust_txpower)(struct b43_wldev dev);
ef1a628d MB	184
	185	/* Misc */
	186	void (pwork_15sec)(struct b43_wldev dev);
	187	void (pwork_60sec)(struct b43_wldev dev);
	188	};
	189
	190	struct b43_phy_a;
	191	struct b43_phy_g;
	192	struct b43_phy_n;
e63e4363	193	struct b43_phy_lp;
ef1a628d MB	194
	195	struct b43_phy {
	196	/* Hardware operation callbacks. */
	197	const struct b43_phy_operations *ops;
	198
	199	/* Most hardware context information is stored in the standard-
	200	* specific data structures pointed to by the pointers below.
	201	* Only one of them is valid (the currently enabled PHY). */
	202	#ifdef CONFIG_B43_DEBUG
	203	/* No union for debug build to force NULL derefs in buggy code. */
	204	struct {
	205	#else
	206	union {
	207	#endif
	208	/* A-PHY specific information */
	209	struct b43_phy_a *a;
	210	/* G-PHY specific information */
	211	struct b43_phy_g *g;
	212	/* N-PHY specific information */
	213	struct b43_phy_n *n;
e63e4363 MB	214	/* LP-PHY specific information */
e63e4363 MB	215	struct b43_phy_lp *lp;
ef1a628d MB	216	};
	217
	218	/* Band support flags. */
	219	bool supports_2ghz;
	220	bool supports_5ghz;
	221
aa4c7b2a RM	222	/* HT info */
	223	bool is_40mhz;
	224
ef1a628d MB	225	/* GMODE bit enabled? */
	226	bool gmode;
	227
	228	/* Analog Type */
	229	u8 analog;
	230	/* B43_PHYTYPE_ */
	231	u8 type;
	232	/* PHY revision number. */
	233	u8 rev;
	234
	235	/* Radio versioning */
	236	u16 radio_manuf; /* Radio manufacturer */
	237	u16 radio_ver; /* Radio version */
	238	u8 radio_rev; /* Radio revision */
	239
	240	/* Software state of the radio */
	241	bool radio_on;
	242
	243	/* Desired TX power level (in dBm).
	244	* This is set by the user and adjusted in b43_phy_xmitpower(). */
18c8adeb	245	int desired_txpower;
ef1a628d MB	246
	247	/* Hardware Power Control enabled? */
	248	bool hardware_power_control;
	249
18c8adeb MB	250	/* The time (in absolute jiffies) when the next TX power output
	251	* check is needed. */
	252	unsigned long next_txpwr_check_time;
	253
e5c407f9	254	/* Current channel */
ef1a628d	255	unsigned int channel;
204a665b	256	u16 channel_freq;
e5c407f9	257	enum nl80211_channel_type channel_type;
ef1a628d MB	258
	259	/* PHY TX errors counter. */
	260	atomic_t txerr_cnt;
	261
	262	#ifdef CONFIG_B43_DEBUG
591f3dc2	263	/* PHY registers locked (w.r.t. firmware) */
ef1a628d	264	bool phy_locked;
591f3dc2 MB	265	/* Radio registers locked (w.r.t. firmware) */
591f3dc2 MB	266	bool radio_locked;
ef1a628d MB	267	#endif /* B43_DEBUG */
	268	};
	269
	270
	271	/**
fb11137a MB	272	* b43_phy_allocate - Allocate PHY structs
	273	* Allocate the PHY data structures, based on the current dev->phy.type
	274	*/
	275	int b43_phy_allocate(struct b43_wldev *dev);
	276
	277	/**
	278	* b43_phy_free - Free PHY structs
ef1a628d	279	*/
fb11137a	280	void b43_phy_free(struct b43_wldev *dev);
ef1a628d MB	281
	282	/**
	283	* b43_phy_init - Initialise the PHY
	284	*/
	285	int b43_phy_init(struct b43_wldev *dev);
	286
	287	/**
	288	* b43_phy_exit - Cleanup PHY
	289	*/
	290	void b43_phy_exit(struct b43_wldev *dev);
	291
	292	/**
	293	* b43_has_hardware_pctl - Hardware Power Control supported?
	294	* Returns a boolean, whether hardware power control is supported.
	295	*/
	296	bool b43_has_hardware_pctl(struct b43_wldev *dev);
	297
	298	/**
	299	* b43_phy_read - 16bit PHY register read access
	300	*/
	301	u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
	302
	303	/**
	304	* b43_phy_write - 16bit PHY register write access
	305	*/
	306	void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
	307
738f0f43 GS	308	/**
	309	* b43_phy_copy - copy contents of 16bit PHY register to another
	310	*/
	311	void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);
	312
ef1a628d MB	313	/**
	314	* b43_phy_mask - Mask a PHY register with a mask
	315	*/
	316	void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
	317
	318	/**
	319	* b43_phy_set - OR a PHY register with a bitmap
	320	*/
	321	void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
	322
	323	/**
	324	* b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
	325	*/
	326	void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
	327
	328	/**
	329	* b43_radio_read - 16bit Radio register read access
	330	*/
	331	u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
	332	#define b43_radio_read16 b43_radio_read /* DEPRECATED */
	333
	334	/**
	335	* b43_radio_write - 16bit Radio register write access
	336	*/
	337	void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
	338	#define b43_radio_write16 b43_radio_write /* DEPRECATED */
	339
	340	/**
	341	* b43_radio_mask - Mask a 16bit radio register with a mask
	342	*/
	343	void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
	344
	345	/**
	346	* b43_radio_set - OR a 16bit radio register with a bitmap
	347	*/
	348	void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
	349
	350	/**
	351	* b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
	352	*/
	353	void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
	354
	355	/**
	356	* b43_radio_lock - Lock firmware radio register access
	357	*/
	358	void b43_radio_lock(struct b43_wldev *dev);
	359
	360	/**
	361	* b43_radio_unlock - Unlock firmware radio register access
	362	*/
	363	void b43_radio_unlock(struct b43_wldev *dev);
	364
	365	/**
	366	* b43_phy_lock - Lock firmware PHY register access
	367	*/
	368	void b43_phy_lock(struct b43_wldev *dev);
	369
	370	/**
	371	* b43_phy_unlock - Unlock firmware PHY register access
	372	*/
	373	void b43_phy_unlock(struct b43_wldev *dev);
	374
	375	/**
	376	* b43_switch_channel - Switch to another channel
377	*/
378	int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
379	/**
380	* B43_DEFAULT_CHANNEL - Switch to the default channel.
381	*/
382	#define B43_DEFAULT_CHANNEL UINT_MAX
383
384	/**
385	* b43_software_rfkill - Turn the radio ON or OFF in software.
386	*/
19d337df	387	void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
ef1a628d	388
18c8adeb MB	389	/**
	390	* b43_phy_txpower_check - Check TX power output.
	391	*
	392	* Compare the current TX power output to the desired power emission
	393	* and schedule an adjustment in case it mismatches.
18c8adeb MB	394	*
	395	* @flags: OR'ed enum b43_phy_txpower_check_flags flags.
	396	* See the docs below.
	397	*/
	398	void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
	399	/**
	400	* enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
	401	*
	402	* @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
	403	* the check now.
	404	* @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
	405	* TSSI did not change.
	406	*/
	407	enum b43_phy_txpower_check_flags {
	408	B43_TXPWR_IGNORE_TIME = (1 << 0),
	409	B43_TXPWR_IGNORE_TSSI = (1 << 1),
	410	};
	411
	412	struct work_struct;
	413	void b43_phy_txpower_adjust_work(struct work_struct *work);
	414
	415	/**
	416	* b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
	417	*
	418	* @shm_offset: The SHM address to read the values from.
	419	*
	420	* Returns the average of the 4 TSSI values, or a negative error code.
	421	*/
	422	int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
	423
cb24f57f MB	424	/**
	425	* b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
	426	*
	427	* It does the switching based on the PHY0 core register.
	428	* Do _not_ call this directly. Only use it as a switch_analog callback
	429	* for struct b43_phy_operations.
	430	*/
	431	void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
	432
98650454	433	struct b43_c32 b43_cordic(int theta);
18c8adeb	434
ef1a628d	435	#endif /* LINUX_B43_PHY_COMMON_H_ */