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e4d6b795 MB |
1 | /* |
2 | ||
3 | Broadcom B43 wireless driver | |
4 | ||
5 | Transmission (TX/RX) related functions. | |
6 | ||
7 | Copyright (C) 2005 Martin Langer <martin-langer@gmx.de> | |
1f21ad2a | 8 | Copyright (C) 2005 Stefano Brivio <stefano.brivio@polimi.it> |
eb032b98 | 9 | Copyright (C) 2005, 2006 Michael Buesch <m@bues.ch> |
e4d6b795 MB |
10 | Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org> |
11 | Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> | |
12 | ||
13 | This program is free software; you can redistribute it and/or modify | |
14 | it under the terms of the GNU General Public License as published by | |
15 | the Free Software Foundation; either version 2 of the License, or | |
16 | (at your option) any later version. | |
17 | ||
18 | This program is distributed in the hope that it will be useful, | |
19 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | GNU General Public License for more details. | |
22 | ||
23 | You should have received a copy of the GNU General Public License | |
24 | along with this program; see the file COPYING. If not, write to | |
25 | the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, | |
26 | Boston, MA 02110-1301, USA. | |
27 | ||
28 | */ | |
29 | ||
88499ab3 | 30 | #include "xmit.h" |
ef1a628d | 31 | #include "phy_common.h" |
e4d6b795 | 32 | #include "dma.h" |
5100d5ac | 33 | #include "pio.h" |
03b29773 | 34 | |
3311abbb RM |
35 | static const struct b43_tx_legacy_rate_phy_ctl_entry b43_tx_legacy_rate_phy_ctl[] = { |
36 | { B43_CCK_RATE_1MB, 0x0, 0x0 }, | |
37 | { B43_CCK_RATE_2MB, 0x0, 0x1 }, | |
38 | { B43_CCK_RATE_5MB, 0x0, 0x2 }, | |
39 | { B43_CCK_RATE_11MB, 0x0, 0x3 }, | |
40 | { B43_OFDM_RATE_6MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_BPSK }, | |
41 | { B43_OFDM_RATE_9MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_BPSK }, | |
42 | { B43_OFDM_RATE_12MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QPSK }, | |
43 | { B43_OFDM_RATE_18MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QPSK }, | |
44 | { B43_OFDM_RATE_24MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QAM16 }, | |
45 | { B43_OFDM_RATE_36MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM16 }, | |
46 | { B43_OFDM_RATE_48MB, B43_TXH_PHY1_CRATE_2_3, B43_TXH_PHY1_MODUL_QAM64 }, | |
47 | { B43_OFDM_RATE_54MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM64 }, | |
48 | }; | |
49 | ||
50 | static const struct b43_tx_legacy_rate_phy_ctl_entry * | |
51 | b43_tx_legacy_rate_phy_ctl_ent(u8 bitrate) | |
52 | { | |
53 | const struct b43_tx_legacy_rate_phy_ctl_entry *e; | |
54 | unsigned int i; | |
55 | ||
56 | for (i = 0; i < ARRAY_SIZE(b43_tx_legacy_rate_phy_ctl); i++) { | |
57 | e = &(b43_tx_legacy_rate_phy_ctl[i]); | |
58 | if (e->bitrate == bitrate) | |
59 | return e; | |
60 | } | |
61 | ||
62 | B43_WARN_ON(1); | |
63 | return NULL; | |
64 | } | |
e4d6b795 | 65 | |
8318d78a JB |
66 | /* Extract the bitrate index out of a CCK PLCP header. */ |
67 | static int b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 *plcp) | |
e4d6b795 MB |
68 | { |
69 | switch (plcp->raw[0]) { | |
70 | case 0x0A: | |
8318d78a | 71 | return 0; |
e4d6b795 | 72 | case 0x14: |
8318d78a | 73 | return 1; |
e4d6b795 | 74 | case 0x37: |
8318d78a | 75 | return 2; |
e4d6b795 | 76 | case 0x6E: |
8318d78a | 77 | return 3; |
e4d6b795 | 78 | } |
8318d78a | 79 | return -1; |
e4d6b795 MB |
80 | } |
81 | ||
8318d78a | 82 | /* Extract the bitrate index out of an OFDM PLCP header. */ |
a3c0b87c | 83 | static int b43_plcp_get_bitrate_idx_ofdm(struct b43_plcp_hdr6 *plcp, bool aphy) |
e4d6b795 | 84 | { |
8318d78a JB |
85 | int base = aphy ? 0 : 4; |
86 | ||
e4d6b795 MB |
87 | switch (plcp->raw[0] & 0xF) { |
88 | case 0xB: | |
8318d78a | 89 | return base + 0; |
e4d6b795 | 90 | case 0xF: |
8318d78a | 91 | return base + 1; |
e4d6b795 | 92 | case 0xA: |
8318d78a | 93 | return base + 2; |
e4d6b795 | 94 | case 0xE: |
8318d78a | 95 | return base + 3; |
e4d6b795 | 96 | case 0x9: |
8318d78a | 97 | return base + 4; |
e4d6b795 | 98 | case 0xD: |
8318d78a | 99 | return base + 5; |
e4d6b795 | 100 | case 0x8: |
8318d78a | 101 | return base + 6; |
e4d6b795 | 102 | case 0xC: |
8318d78a | 103 | return base + 7; |
e4d6b795 | 104 | } |
8318d78a | 105 | return -1; |
e4d6b795 MB |
106 | } |
107 | ||
108 | u8 b43_plcp_get_ratecode_cck(const u8 bitrate) | |
109 | { | |
110 | switch (bitrate) { | |
111 | case B43_CCK_RATE_1MB: | |
112 | return 0x0A; | |
113 | case B43_CCK_RATE_2MB: | |
114 | return 0x14; | |
115 | case B43_CCK_RATE_5MB: | |
116 | return 0x37; | |
117 | case B43_CCK_RATE_11MB: | |
118 | return 0x6E; | |
119 | } | |
120 | B43_WARN_ON(1); | |
121 | return 0; | |
122 | } | |
123 | ||
124 | u8 b43_plcp_get_ratecode_ofdm(const u8 bitrate) | |
125 | { | |
126 | switch (bitrate) { | |
127 | case B43_OFDM_RATE_6MB: | |
128 | return 0xB; | |
129 | case B43_OFDM_RATE_9MB: | |
130 | return 0xF; | |
131 | case B43_OFDM_RATE_12MB: | |
132 | return 0xA; | |
133 | case B43_OFDM_RATE_18MB: | |
134 | return 0xE; | |
135 | case B43_OFDM_RATE_24MB: | |
136 | return 0x9; | |
137 | case B43_OFDM_RATE_36MB: | |
138 | return 0xD; | |
139 | case B43_OFDM_RATE_48MB: | |
140 | return 0x8; | |
141 | case B43_OFDM_RATE_54MB: | |
142 | return 0xC; | |
143 | } | |
144 | B43_WARN_ON(1); | |
145 | return 0; | |
146 | } | |
147 | ||
148 | void b43_generate_plcp_hdr(struct b43_plcp_hdr4 *plcp, | |
149 | const u16 octets, const u8 bitrate) | |
150 | { | |
e4d6b795 MB |
151 | __u8 *raw = plcp->raw; |
152 | ||
153 | if (b43_is_ofdm_rate(bitrate)) { | |
1a09404a MB |
154 | u32 d; |
155 | ||
156 | d = b43_plcp_get_ratecode_ofdm(bitrate); | |
e4d6b795 | 157 | B43_WARN_ON(octets & 0xF000); |
1a09404a | 158 | d |= (octets << 5); |
b52a033c | 159 | plcp->data = cpu_to_le32(d); |
e4d6b795 MB |
160 | } else { |
161 | u32 plen; | |
162 | ||
163 | plen = octets * 16 / bitrate; | |
164 | if ((octets * 16 % bitrate) > 0) { | |
165 | plen++; | |
166 | if ((bitrate == B43_CCK_RATE_11MB) | |
167 | && ((octets * 8 % 11) < 4)) { | |
168 | raw[1] = 0x84; | |
169 | } else | |
170 | raw[1] = 0x04; | |
171 | } else | |
172 | raw[1] = 0x04; | |
b52a033c | 173 | plcp->data |= cpu_to_le32(plen << 16); |
e4d6b795 MB |
174 | raw[0] = b43_plcp_get_ratecode_cck(bitrate); |
175 | } | |
176 | } | |
177 | ||
3311abbb RM |
178 | static u16 b43_generate_tx_phy_ctl1(struct b43_wldev *dev, u8 bitrate) |
179 | { | |
180 | const struct b43_phy *phy = &dev->phy; | |
181 | const struct b43_tx_legacy_rate_phy_ctl_entry *e; | |
182 | u16 control = 0; | |
183 | u16 bw; | |
184 | ||
185 | if (phy->type == B43_PHYTYPE_LP) | |
186 | bw = B43_TXH_PHY1_BW_20; | |
187 | else /* FIXME */ | |
188 | bw = B43_TXH_PHY1_BW_20; | |
189 | ||
190 | if (0) { /* FIXME: MIMO */ | |
191 | } else if (b43_is_cck_rate(bitrate) && phy->type != B43_PHYTYPE_LP) { | |
192 | control = bw; | |
193 | } else { | |
194 | control = bw; | |
195 | e = b43_tx_legacy_rate_phy_ctl_ent(bitrate); | |
196 | if (e) { | |
197 | control |= e->coding_rate; | |
198 | control |= e->modulation; | |
199 | } | |
200 | control |= B43_TXH_PHY1_MODE_SISO; | |
201 | } | |
202 | ||
203 | return control; | |
204 | } | |
205 | ||
e4d6b795 MB |
206 | static u8 b43_calc_fallback_rate(u8 bitrate) |
207 | { | |
208 | switch (bitrate) { | |
209 | case B43_CCK_RATE_1MB: | |
210 | return B43_CCK_RATE_1MB; | |
211 | case B43_CCK_RATE_2MB: | |
212 | return B43_CCK_RATE_1MB; | |
213 | case B43_CCK_RATE_5MB: | |
214 | return B43_CCK_RATE_2MB; | |
215 | case B43_CCK_RATE_11MB: | |
216 | return B43_CCK_RATE_5MB; | |
217 | case B43_OFDM_RATE_6MB: | |
218 | return B43_CCK_RATE_5MB; | |
219 | case B43_OFDM_RATE_9MB: | |
220 | return B43_OFDM_RATE_6MB; | |
221 | case B43_OFDM_RATE_12MB: | |
222 | return B43_OFDM_RATE_9MB; | |
223 | case B43_OFDM_RATE_18MB: | |
224 | return B43_OFDM_RATE_12MB; | |
225 | case B43_OFDM_RATE_24MB: | |
226 | return B43_OFDM_RATE_18MB; | |
227 | case B43_OFDM_RATE_36MB: | |
228 | return B43_OFDM_RATE_24MB; | |
229 | case B43_OFDM_RATE_48MB: | |
230 | return B43_OFDM_RATE_36MB; | |
231 | case B43_OFDM_RATE_54MB: | |
232 | return B43_OFDM_RATE_48MB; | |
233 | } | |
234 | B43_WARN_ON(1); | |
235 | return 0; | |
236 | } | |
237 | ||
eb189d8b | 238 | /* Generate a TX data header. */ |
09552ccd MB |
239 | int b43_generate_txhdr(struct b43_wldev *dev, |
240 | u8 *_txhdr, | |
035d0243 | 241 | struct sk_buff *skb_frag, |
e6a9854b | 242 | struct ieee80211_tx_info *info, |
09552ccd | 243 | u16 cookie) |
e4d6b795 | 244 | { |
035d0243 | 245 | const unsigned char *fragment_data = skb_frag->data; |
246 | unsigned int fragment_len = skb_frag->len; | |
eb189d8b | 247 | struct b43_txhdr *txhdr = (struct b43_txhdr *)_txhdr; |
e4d6b795 MB |
248 | const struct b43_phy *phy = &dev->phy; |
249 | const struct ieee80211_hdr *wlhdr = | |
250 | (const struct ieee80211_hdr *)fragment_data; | |
d0f09804 | 251 | int use_encryption = !!info->control.hw_key; |
f37d9234 | 252 | __le16 fctl = wlhdr->frame_control; |
8318d78a | 253 | struct ieee80211_rate *fbrate; |
e4d6b795 MB |
254 | u8 rate, rate_fb; |
255 | int rate_ofdm, rate_fb_ofdm; | |
256 | unsigned int plcp_fragment_len; | |
257 | u32 mac_ctl = 0; | |
258 | u16 phy_ctl = 0; | |
259 | u8 extra_ft = 0; | |
2e92e6f2 | 260 | struct ieee80211_rate *txrate; |
e6a9854b | 261 | struct ieee80211_tx_rate *rates; |
e4d6b795 MB |
262 | |
263 | memset(txhdr, 0, sizeof(*txhdr)); | |
264 | ||
e039fa4a | 265 | txrate = ieee80211_get_tx_rate(dev->wl->hw, info); |
2e92e6f2 | 266 | rate = txrate ? txrate->hw_value : B43_CCK_RATE_1MB; |
e4d6b795 | 267 | rate_ofdm = b43_is_ofdm_rate(rate); |
870abdf6 | 268 | fbrate = ieee80211_get_alt_retry_rate(dev->wl->hw, info, 0) ? : txrate; |
8318d78a | 269 | rate_fb = fbrate->hw_value; |
e4d6b795 MB |
270 | rate_fb_ofdm = b43_is_ofdm_rate(rate_fb); |
271 | ||
272 | if (rate_ofdm) | |
273 | txhdr->phy_rate = b43_plcp_get_ratecode_ofdm(rate); | |
274 | else | |
275 | txhdr->phy_rate = b43_plcp_get_ratecode_cck(rate); | |
276 | txhdr->mac_frame_ctl = wlhdr->frame_control; | |
277 | memcpy(txhdr->tx_receiver, wlhdr->addr1, 6); | |
278 | ||
279 | /* Calculate duration for fallback rate */ | |
280 | if ((rate_fb == rate) || | |
281 | (wlhdr->duration_id & cpu_to_le16(0x8000)) || | |
282 | (wlhdr->duration_id == cpu_to_le16(0))) { | |
283 | /* If the fallback rate equals the normal rate or the | |
284 | * dur_id field contains an AID, CFP magic or 0, | |
285 | * use the original dur_id field. */ | |
286 | txhdr->dur_fb = wlhdr->duration_id; | |
287 | } else { | |
e039fa4a JB |
288 | txhdr->dur_fb = ieee80211_generic_frame_duration( |
289 | dev->wl->hw, info->control.vif, fragment_len, fbrate); | |
e4d6b795 MB |
290 | } |
291 | ||
292 | plcp_fragment_len = fragment_len + FCS_LEN; | |
293 | if (use_encryption) { | |
e039fa4a | 294 | u8 key_idx = info->control.hw_key->hw_key_idx; |
e4d6b795 MB |
295 | struct b43_key *key; |
296 | int wlhdr_len; | |
297 | size_t iv_len; | |
298 | ||
66d2d089 | 299 | B43_WARN_ON(key_idx >= ARRAY_SIZE(dev->key)); |
e4d6b795 | 300 | key = &(dev->key[key_idx]); |
7be1bb6b | 301 | |
09552ccd MB |
302 | if (unlikely(!key->keyconf)) { |
303 | /* This key is invalid. This might only happen | |
304 | * in a short timeframe after machine resume before | |
305 | * we were able to reconfigure keys. | |
306 | * Drop this packet completely. Do not transmit it | |
307 | * unencrypted to avoid leaking information. */ | |
308 | return -ENOKEY; | |
7be1bb6b | 309 | } |
09552ccd MB |
310 | |
311 | /* Hardware appends ICV. */ | |
76708dee | 312 | plcp_fragment_len += info->control.hw_key->icv_len; |
09552ccd MB |
313 | |
314 | key_idx = b43_kidx_to_fw(dev, key_idx); | |
315 | mac_ctl |= (key_idx << B43_TXH_MAC_KEYIDX_SHIFT) & | |
316 | B43_TXH_MAC_KEYIDX; | |
317 | mac_ctl |= (key->algorithm << B43_TXH_MAC_KEYALG_SHIFT) & | |
318 | B43_TXH_MAC_KEYALG; | |
f37d9234 | 319 | wlhdr_len = ieee80211_hdrlen(fctl); |
035d0243 | 320 | if (key->algorithm == B43_SEC_ALGO_TKIP) { |
321 | u16 phase1key[5]; | |
322 | int i; | |
323 | /* we give the phase1key and iv16 here, the key is stored in | |
324 | * shm. With that the hardware can do phase 2 and encryption. | |
325 | */ | |
523b02ea | 326 | ieee80211_get_tkip_p1k(info->control.hw_key, skb_frag, phase1key); |
cde1b55b MB |
327 | /* phase1key is in host endian. Copy to little-endian txhdr->iv. */ |
328 | for (i = 0; i < 5; i++) { | |
329 | txhdr->iv[i * 2 + 0] = phase1key[i]; | |
330 | txhdr->iv[i * 2 + 1] = phase1key[i] >> 8; | |
331 | } | |
035d0243 | 332 | /* iv16 */ |
333 | memcpy(txhdr->iv + 10, ((u8 *) wlhdr) + wlhdr_len, 3); | |
334 | } else { | |
335 | iv_len = min((size_t) info->control.hw_key->iv_len, | |
336 | ARRAY_SIZE(txhdr->iv)); | |
337 | memcpy(txhdr->iv, ((u8 *) wlhdr) + wlhdr_len, iv_len); | |
338 | } | |
e4d6b795 | 339 | } |
efe0249b | 340 | switch (dev->fw.hdr_format) { |
5d852905 RM |
341 | case B43_FW_HDR_598: |
342 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_598.plcp), | |
343 | plcp_fragment_len, rate); | |
344 | break; | |
efe0249b | 345 | case B43_FW_HDR_351: |
2391b7e8 | 346 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_351.plcp), |
eb189d8b | 347 | plcp_fragment_len, rate); |
efe0249b RM |
348 | break; |
349 | case B43_FW_HDR_410: | |
2391b7e8 | 350 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_410.plcp), |
eb189d8b | 351 | plcp_fragment_len, rate); |
efe0249b | 352 | break; |
eb189d8b | 353 | } |
e4d6b795 MB |
354 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->plcp_fb), |
355 | plcp_fragment_len, rate_fb); | |
356 | ||
357 | /* Extra Frame Types */ | |
358 | if (rate_fb_ofdm) | |
eb189d8b MB |
359 | extra_ft |= B43_TXH_EFT_FB_OFDM; |
360 | else | |
361 | extra_ft |= B43_TXH_EFT_FB_CCK; | |
e4d6b795 MB |
362 | |
363 | /* Set channel radio code. Note that the micrcode ORs 0x100 to | |
364 | * this value before comparing it to the value in SHM, if this | |
365 | * is a 5Ghz packet. | |
366 | */ | |
367 | txhdr->chan_radio_code = phy->channel; | |
368 | ||
369 | /* PHY TX Control word */ | |
370 | if (rate_ofdm) | |
eb189d8b MB |
371 | phy_ctl |= B43_TXH_PHY_ENC_OFDM; |
372 | else | |
373 | phy_ctl |= B43_TXH_PHY_ENC_CCK; | |
e6a9854b | 374 | if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) |
eb189d8b | 375 | phy_ctl |= B43_TXH_PHY_SHORTPRMBL; |
9db1f6d7 | 376 | |
e039fa4a | 377 | switch (b43_ieee80211_antenna_sanitize(dev, info->antenna_sel_tx)) { |
9db1f6d7 | 378 | case 0: /* Default */ |
eb189d8b | 379 | phy_ctl |= B43_TXH_PHY_ANT01AUTO; |
e4d6b795 | 380 | break; |
9db1f6d7 | 381 | case 1: /* Antenna 0 */ |
eb189d8b | 382 | phy_ctl |= B43_TXH_PHY_ANT0; |
e4d6b795 | 383 | break; |
9db1f6d7 | 384 | case 2: /* Antenna 1 */ |
eb189d8b MB |
385 | phy_ctl |= B43_TXH_PHY_ANT1; |
386 | break; | |
387 | case 3: /* Antenna 2 */ | |
388 | phy_ctl |= B43_TXH_PHY_ANT2; | |
389 | break; | |
390 | case 4: /* Antenna 3 */ | |
391 | phy_ctl |= B43_TXH_PHY_ANT3; | |
e4d6b795 MB |
392 | break; |
393 | default: | |
394 | B43_WARN_ON(1); | |
395 | } | |
396 | ||
e6a9854b | 397 | rates = info->control.rates; |
e4d6b795 | 398 | /* MAC control */ |
e039fa4a | 399 | if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) |
eb189d8b | 400 | mac_ctl |= B43_TXH_MAC_ACK; |
f591fa5d JB |
401 | /* use hardware sequence counter as the non-TID counter */ |
402 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) | |
eb189d8b | 403 | mac_ctl |= B43_TXH_MAC_HWSEQ; |
e039fa4a | 404 | if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) |
eb189d8b | 405 | mac_ctl |= B43_TXH_MAC_STMSDU; |
e4d6b795 | 406 | if (phy->type == B43_PHYTYPE_A) |
eb189d8b | 407 | mac_ctl |= B43_TXH_MAC_5GHZ; |
e6a9854b JB |
408 | |
409 | /* Overwrite rates[0].count to make the retry calculation | |
410 | * in the tx status easier. need the actual retry limit to | |
411 | * detect whether the fallback rate was used. | |
412 | */ | |
413 | if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) || | |
414 | (rates[0].count <= dev->wl->hw->conf.long_frame_max_tx_count)) { | |
415 | rates[0].count = dev->wl->hw->conf.long_frame_max_tx_count; | |
eb189d8b | 416 | mac_ctl |= B43_TXH_MAC_LONGFRAME; |
e6a9854b JB |
417 | } else { |
418 | rates[0].count = dev->wl->hw->conf.short_frame_max_tx_count; | |
419 | } | |
e4d6b795 MB |
420 | |
421 | /* Generate the RTS or CTS-to-self frame */ | |
e6a9854b JB |
422 | if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) || |
423 | (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)) { | |
e4d6b795 | 424 | unsigned int len; |
efe0249b | 425 | struct ieee80211_hdr *uninitialized_var(hdr); |
e4d6b795 MB |
426 | int rts_rate, rts_rate_fb; |
427 | int rts_rate_ofdm, rts_rate_fb_ofdm; | |
efe0249b | 428 | struct b43_plcp_hdr6 *uninitialized_var(plcp); |
2e92e6f2 | 429 | struct ieee80211_rate *rts_cts_rate; |
e4d6b795 | 430 | |
e039fa4a | 431 | rts_cts_rate = ieee80211_get_rts_cts_rate(dev->wl->hw, info); |
2e92e6f2 JB |
432 | |
433 | rts_rate = rts_cts_rate ? rts_cts_rate->hw_value : B43_CCK_RATE_1MB; | |
e4d6b795 MB |
434 | rts_rate_ofdm = b43_is_ofdm_rate(rts_rate); |
435 | rts_rate_fb = b43_calc_fallback_rate(rts_rate); | |
436 | rts_rate_fb_ofdm = b43_is_ofdm_rate(rts_rate_fb); | |
437 | ||
e6a9854b | 438 | if (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
efe0249b | 439 | struct ieee80211_cts *uninitialized_var(cts); |
eb189d8b | 440 | |
efe0249b | 441 | switch (dev->fw.hdr_format) { |
5d852905 RM |
442 | case B43_FW_HDR_598: |
443 | cts = (struct ieee80211_cts *) | |
444 | (txhdr->format_598.rts_frame); | |
445 | break; | |
efe0249b | 446 | case B43_FW_HDR_351: |
eb189d8b | 447 | cts = (struct ieee80211_cts *) |
2391b7e8 | 448 | (txhdr->format_351.rts_frame); |
efe0249b RM |
449 | break; |
450 | case B43_FW_HDR_410: | |
eb189d8b | 451 | cts = (struct ieee80211_cts *) |
2391b7e8 | 452 | (txhdr->format_410.rts_frame); |
efe0249b | 453 | break; |
eb189d8b | 454 | } |
e039fa4a | 455 | ieee80211_ctstoself_get(dev->wl->hw, info->control.vif, |
e4d6b795 | 456 | fragment_data, fragment_len, |
e039fa4a | 457 | info, cts); |
eb189d8b | 458 | mac_ctl |= B43_TXH_MAC_SENDCTS; |
e4d6b795 MB |
459 | len = sizeof(struct ieee80211_cts); |
460 | } else { | |
efe0249b | 461 | struct ieee80211_rts *uninitialized_var(rts); |
eb189d8b | 462 | |
efe0249b | 463 | switch (dev->fw.hdr_format) { |
5d852905 RM |
464 | case B43_FW_HDR_598: |
465 | rts = (struct ieee80211_rts *) | |
466 | (txhdr->format_598.rts_frame); | |
467 | break; | |
efe0249b | 468 | case B43_FW_HDR_351: |
eb189d8b | 469 | rts = (struct ieee80211_rts *) |
2391b7e8 | 470 | (txhdr->format_351.rts_frame); |
efe0249b RM |
471 | break; |
472 | case B43_FW_HDR_410: | |
eb189d8b | 473 | rts = (struct ieee80211_rts *) |
2391b7e8 | 474 | (txhdr->format_410.rts_frame); |
efe0249b | 475 | break; |
eb189d8b | 476 | } |
e039fa4a | 477 | ieee80211_rts_get(dev->wl->hw, info->control.vif, |
eb189d8b | 478 | fragment_data, fragment_len, |
e039fa4a | 479 | info, rts); |
eb189d8b | 480 | mac_ctl |= B43_TXH_MAC_SENDRTS; |
e4d6b795 MB |
481 | len = sizeof(struct ieee80211_rts); |
482 | } | |
483 | len += FCS_LEN; | |
eb189d8b MB |
484 | |
485 | /* Generate the PLCP headers for the RTS/CTS frame */ | |
efe0249b | 486 | switch (dev->fw.hdr_format) { |
5d852905 RM |
487 | case B43_FW_HDR_598: |
488 | plcp = &txhdr->format_598.rts_plcp; | |
489 | break; | |
efe0249b | 490 | case B43_FW_HDR_351: |
2391b7e8 | 491 | plcp = &txhdr->format_351.rts_plcp; |
efe0249b RM |
492 | break; |
493 | case B43_FW_HDR_410: | |
2391b7e8 | 494 | plcp = &txhdr->format_410.rts_plcp; |
efe0249b RM |
495 | break; |
496 | } | |
eb189d8b MB |
497 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp, |
498 | len, rts_rate); | |
499 | plcp = &txhdr->rts_plcp_fb; | |
500 | b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp, | |
e4d6b795 | 501 | len, rts_rate_fb); |
eb189d8b | 502 | |
efe0249b | 503 | switch (dev->fw.hdr_format) { |
5d852905 RM |
504 | case B43_FW_HDR_598: |
505 | hdr = (struct ieee80211_hdr *) | |
506 | (&txhdr->format_598.rts_frame); | |
507 | break; | |
efe0249b | 508 | case B43_FW_HDR_351: |
eb189d8b | 509 | hdr = (struct ieee80211_hdr *) |
2391b7e8 | 510 | (&txhdr->format_351.rts_frame); |
efe0249b RM |
511 | break; |
512 | case B43_FW_HDR_410: | |
eb189d8b | 513 | hdr = (struct ieee80211_hdr *) |
2391b7e8 | 514 | (&txhdr->format_410.rts_frame); |
efe0249b | 515 | break; |
eb189d8b | 516 | } |
e4d6b795 | 517 | txhdr->rts_dur_fb = hdr->duration_id; |
eb189d8b | 518 | |
e4d6b795 | 519 | if (rts_rate_ofdm) { |
eb189d8b | 520 | extra_ft |= B43_TXH_EFT_RTS_OFDM; |
e4d6b795 MB |
521 | txhdr->phy_rate_rts = |
522 | b43_plcp_get_ratecode_ofdm(rts_rate); | |
eb189d8b MB |
523 | } else { |
524 | extra_ft |= B43_TXH_EFT_RTS_CCK; | |
e4d6b795 MB |
525 | txhdr->phy_rate_rts = |
526 | b43_plcp_get_ratecode_cck(rts_rate); | |
eb189d8b | 527 | } |
e4d6b795 | 528 | if (rts_rate_fb_ofdm) |
eb189d8b MB |
529 | extra_ft |= B43_TXH_EFT_RTSFB_OFDM; |
530 | else | |
531 | extra_ft |= B43_TXH_EFT_RTSFB_CCK; | |
3311abbb RM |
532 | |
533 | if (rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS && | |
534 | phy->type == B43_PHYTYPE_N) { | |
535 | txhdr->phy_ctl1_rts = cpu_to_le16( | |
536 | b43_generate_tx_phy_ctl1(dev, rts_rate)); | |
537 | txhdr->phy_ctl1_rts_fb = cpu_to_le16( | |
538 | b43_generate_tx_phy_ctl1(dev, rts_rate_fb)); | |
539 | } | |
e4d6b795 MB |
540 | } |
541 | ||
542 | /* Magic cookie */ | |
efe0249b | 543 | switch (dev->fw.hdr_format) { |
5d852905 RM |
544 | case B43_FW_HDR_598: |
545 | txhdr->format_598.cookie = cpu_to_le16(cookie); | |
546 | break; | |
efe0249b | 547 | case B43_FW_HDR_351: |
2391b7e8 | 548 | txhdr->format_351.cookie = cpu_to_le16(cookie); |
efe0249b RM |
549 | break; |
550 | case B43_FW_HDR_410: | |
2391b7e8 | 551 | txhdr->format_410.cookie = cpu_to_le16(cookie); |
efe0249b RM |
552 | break; |
553 | } | |
e4d6b795 | 554 | |
3311abbb RM |
555 | if (phy->type == B43_PHYTYPE_N) { |
556 | txhdr->phy_ctl1 = | |
557 | cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate)); | |
558 | txhdr->phy_ctl1_fb = | |
559 | cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate_fb)); | |
560 | } | |
561 | ||
e4d6b795 MB |
562 | /* Apply the bitfields */ |
563 | txhdr->mac_ctl = cpu_to_le32(mac_ctl); | |
564 | txhdr->phy_ctl = cpu_to_le16(phy_ctl); | |
565 | txhdr->extra_ft = extra_ft; | |
e4d6b795 | 566 | |
09552ccd | 567 | return 0; |
e4d6b795 MB |
568 | } |
569 | ||
570 | static s8 b43_rssi_postprocess(struct b43_wldev *dev, | |
571 | u8 in_rssi, int ofdm, | |
572 | int adjust_2053, int adjust_2050) | |
573 | { | |
574 | struct b43_phy *phy = &dev->phy; | |
ef1a628d | 575 | struct b43_phy_g *gphy = phy->g; |
e4d6b795 MB |
576 | s32 tmp; |
577 | ||
578 | switch (phy->radio_ver) { | |
579 | case 0x2050: | |
580 | if (ofdm) { | |
581 | tmp = in_rssi; | |
582 | if (tmp > 127) | |
583 | tmp -= 256; | |
584 | tmp *= 73; | |
585 | tmp /= 64; | |
586 | if (adjust_2050) | |
587 | tmp += 25; | |
588 | else | |
589 | tmp -= 3; | |
590 | } else { | |
0581483a | 591 | if (dev->dev->bus_sprom-> |
e4d6b795 MB |
592 | boardflags_lo & B43_BFL_RSSI) { |
593 | if (in_rssi > 63) | |
594 | in_rssi = 63; | |
ef1a628d MB |
595 | B43_WARN_ON(phy->type != B43_PHYTYPE_G); |
596 | tmp = gphy->nrssi_lt[in_rssi]; | |
e4d6b795 MB |
597 | tmp = 31 - tmp; |
598 | tmp *= -131; | |
599 | tmp /= 128; | |
600 | tmp -= 57; | |
601 | } else { | |
602 | tmp = in_rssi; | |
603 | tmp = 31 - tmp; | |
604 | tmp *= -149; | |
605 | tmp /= 128; | |
606 | tmp -= 68; | |
607 | } | |
608 | if (phy->type == B43_PHYTYPE_G && adjust_2050) | |
609 | tmp += 25; | |
610 | } | |
611 | break; | |
612 | case 0x2060: | |
613 | if (in_rssi > 127) | |
614 | tmp = in_rssi - 256; | |
615 | else | |
616 | tmp = in_rssi; | |
617 | break; | |
618 | default: | |
619 | tmp = in_rssi; | |
620 | tmp -= 11; | |
621 | tmp *= 103; | |
622 | tmp /= 64; | |
623 | if (adjust_2053) | |
624 | tmp -= 109; | |
625 | else | |
626 | tmp -= 83; | |
627 | } | |
628 | ||
629 | return (s8) tmp; | |
630 | } | |
631 | ||
632 | //TODO | |
633 | #if 0 | |
634 | static s8 b43_rssinoise_postprocess(struct b43_wldev *dev, u8 in_rssi) | |
635 | { | |
636 | struct b43_phy *phy = &dev->phy; | |
637 | s8 ret; | |
638 | ||
639 | if (phy->type == B43_PHYTYPE_A) { | |
640 | //TODO: Incomplete specs. | |
641 | ret = 0; | |
642 | } else | |
643 | ret = b43_rssi_postprocess(dev, in_rssi, 0, 1, 1); | |
644 | ||
645 | return ret; | |
646 | } | |
647 | #endif | |
648 | ||
649 | void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr) | |
650 | { | |
651 | struct ieee80211_rx_status status; | |
652 | struct b43_plcp_hdr6 *plcp; | |
653 | struct ieee80211_hdr *wlhdr; | |
654 | const struct b43_rxhdr_fw4 *rxhdr = _rxhdr; | |
f37d9234 | 655 | __le16 fctl; |
e4d6b795 MB |
656 | u16 phystat0, phystat3, chanstat, mactime; |
657 | u32 macstat; | |
658 | u16 chanid; | |
8318d78a | 659 | u16 phytype; |
e4d6b795 MB |
660 | int padding; |
661 | ||
662 | memset(&status, 0, sizeof(status)); | |
663 | ||
664 | /* Get metadata about the frame from the header. */ | |
665 | phystat0 = le16_to_cpu(rxhdr->phy_status0); | |
666 | phystat3 = le16_to_cpu(rxhdr->phy_status3); | |
e4d6b795 MB |
667 | macstat = le32_to_cpu(rxhdr->mac_status); |
668 | mactime = le16_to_cpu(rxhdr->mac_time); | |
669 | chanstat = le16_to_cpu(rxhdr->channel); | |
8318d78a | 670 | phytype = chanstat & B43_RX_CHAN_PHYTYPE; |
e4d6b795 | 671 | |
ce4fbdbf | 672 | if (unlikely(macstat & B43_RX_MAC_FCSERR)) { |
e4d6b795 | 673 | dev->wl->ieee_stats.dot11FCSErrorCount++; |
ce4fbdbf MB |
674 | status.flag |= RX_FLAG_FAILED_FCS_CRC; |
675 | } | |
676 | if (unlikely(phystat0 & (B43_RX_PHYST0_PLCPHCF | B43_RX_PHYST0_PLCPFV))) | |
677 | status.flag |= RX_FLAG_FAILED_PLCP_CRC; | |
678 | if (phystat0 & B43_RX_PHYST0_SHORTPRMBL) | |
679 | status.flag |= RX_FLAG_SHORTPRE; | |
e4d6b795 MB |
680 | if (macstat & B43_RX_MAC_DECERR) { |
681 | /* Decryption with the given key failed. | |
682 | * Drop the packet. We also won't be able to decrypt it with | |
683 | * the key in software. */ | |
684 | goto drop; | |
685 | } | |
686 | ||
687 | /* Skip PLCP and padding */ | |
688 | padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0; | |
689 | if (unlikely(skb->len < (sizeof(struct b43_plcp_hdr6) + padding))) { | |
690 | b43dbg(dev->wl, "RX: Packet size underrun (1)\n"); | |
691 | goto drop; | |
692 | } | |
693 | plcp = (struct b43_plcp_hdr6 *)(skb->data + padding); | |
694 | skb_pull(skb, sizeof(struct b43_plcp_hdr6) + padding); | |
695 | /* The skb contains the Wireless Header + payload data now */ | |
696 | if (unlikely(skb->len < (2 + 2 + 6 /*minimum hdr */ + FCS_LEN))) { | |
697 | b43dbg(dev->wl, "RX: Packet size underrun (2)\n"); | |
698 | goto drop; | |
699 | } | |
700 | wlhdr = (struct ieee80211_hdr *)(skb->data); | |
f37d9234 | 701 | fctl = wlhdr->frame_control; |
e4d6b795 MB |
702 | |
703 | if (macstat & B43_RX_MAC_DEC) { | |
704 | unsigned int keyidx; | |
705 | int wlhdr_len; | |
706 | ||
707 | keyidx = ((macstat & B43_RX_MAC_KEYIDX) | |
708 | >> B43_RX_MAC_KEYIDX_SHIFT); | |
709 | /* We must adjust the key index here. We want the "physical" | |
710 | * key index, but the ucode passed it slightly different. | |
711 | */ | |
712 | keyidx = b43_kidx_to_raw(dev, keyidx); | |
66d2d089 | 713 | B43_WARN_ON(keyidx >= ARRAY_SIZE(dev->key)); |
e4d6b795 MB |
714 | |
715 | if (dev->key[keyidx].algorithm != B43_SEC_ALGO_NONE) { | |
f37d9234 | 716 | wlhdr_len = ieee80211_hdrlen(fctl); |
e4d6b795 MB |
717 | if (unlikely(skb->len < (wlhdr_len + 3))) { |
718 | b43dbg(dev->wl, | |
719 | "RX: Packet size underrun (3)\n"); | |
720 | goto drop; | |
721 | } | |
722 | status.flag |= RX_FLAG_DECRYPTED; | |
723 | } | |
724 | } | |
725 | ||
7b584163 | 726 | /* Link quality statistics */ |
7b584163 MB |
727 | if ((chanstat & B43_RX_CHAN_PHYTYPE) == B43_PHYTYPE_N) { |
728 | // s8 rssi = max(rxhdr->power0, rxhdr->power1); | |
729 | //TODO: Find out what the rssi value is (dBm or percentage?) | |
730 | // and also find out what the maximum possible value is. | |
731 | // Fill status.ssi and status.signal fields. | |
732 | } else { | |
566bfe5a | 733 | status.signal = b43_rssi_postprocess(dev, rxhdr->jssi, |
7b584163 MB |
734 | (phystat0 & B43_RX_PHYST0_OFDM), |
735 | (phystat0 & B43_RX_PHYST0_GAINCTL), | |
736 | (phystat3 & B43_RX_PHYST3_TRSTATE)); | |
7b584163 MB |
737 | } |
738 | ||
e4d6b795 | 739 | if (phystat0 & B43_RX_PHYST0_OFDM) |
8318d78a JB |
740 | status.rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp, |
741 | phytype == B43_PHYTYPE_A); | |
e4d6b795 | 742 | else |
8318d78a | 743 | status.rate_idx = b43_plcp_get_bitrate_idx_cck(plcp); |
ce4fbdbf MB |
744 | if (unlikely(status.rate_idx == -1)) { |
745 | /* PLCP seems to be corrupted. | |
746 | * Drop the frame, if we are not interested in corrupted frames. */ | |
747 | if (!(dev->wl->filter_flags & FIF_PLCPFAIL)) | |
748 | goto drop; | |
749 | } | |
e4d6b795 | 750 | status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT); |
c0ddd04d JL |
751 | |
752 | /* | |
d007b7f4 JB |
753 | * All frames on monitor interfaces and beacons always need a full |
754 | * 64-bit timestamp. Monitor interfaces need it for diagnostic | |
755 | * purposes and beacons for IBSS merging. | |
756 | * This code assumes we get to process the packet within 16 bits | |
757 | * of timestamp, i.e. about 65 milliseconds after the PHY received | |
758 | * the first symbol. | |
c0ddd04d | 759 | */ |
f37d9234 | 760 | if (ieee80211_is_beacon(fctl) || dev->wl->radiotap_enabled) { |
c0ddd04d JL |
761 | u16 low_mactime_now; |
762 | ||
763 | b43_tsf_read(dev, &status.mactime); | |
764 | low_mactime_now = status.mactime; | |
765 | status.mactime = status.mactime & ~0xFFFFULL; | |
766 | status.mactime += mactime; | |
767 | if (low_mactime_now <= mactime) | |
768 | status.mactime -= 0x10000; | |
6ebacbb7 | 769 | status.flag |= RX_FLAG_MACTIME_MPDU; |
c0ddd04d | 770 | } |
e4d6b795 MB |
771 | |
772 | chanid = (chanstat & B43_RX_CHAN_ID) >> B43_RX_CHAN_ID_SHIFT; | |
773 | switch (chanstat & B43_RX_CHAN_PHYTYPE) { | |
774 | case B43_PHYTYPE_A: | |
8318d78a | 775 | status.band = IEEE80211_BAND_5GHZ; |
d987160b MB |
776 | B43_WARN_ON(1); |
777 | /* FIXME: We don't really know which value the "chanid" contains. | |
778 | * So the following assignment might be wrong. */ | |
8318d78a | 779 | status.freq = b43_channel_to_freq_5ghz(chanid); |
e4d6b795 MB |
780 | break; |
781 | case B43_PHYTYPE_G: | |
8318d78a | 782 | status.band = IEEE80211_BAND_2GHZ; |
d987160b MB |
783 | /* chanid is the radio channel cookie value as used |
784 | * to tune the radio. */ | |
e4d6b795 | 785 | status.freq = chanid + 2400; |
d987160b MB |
786 | break; |
787 | case B43_PHYTYPE_N: | |
826ee706 | 788 | case B43_PHYTYPE_LP: |
d987160b MB |
789 | /* chanid is the SHM channel cookie. Which is the plain |
790 | * channel number in b43. */ | |
8318d78a JB |
791 | if (chanstat & B43_RX_CHAN_5GHZ) { |
792 | status.band = IEEE80211_BAND_5GHZ; | |
793 | status.freq = b43_freq_to_channel_5ghz(chanid); | |
794 | } else { | |
795 | status.band = IEEE80211_BAND_2GHZ; | |
796 | status.freq = b43_freq_to_channel_2ghz(chanid); | |
797 | } | |
e4d6b795 MB |
798 | break; |
799 | default: | |
800 | B43_WARN_ON(1); | |
d987160b | 801 | goto drop; |
e4d6b795 MB |
802 | } |
803 | ||
f1d58c25 | 804 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
72f5f457 | 805 | ieee80211_rx_ni(dev->wl->hw, skb); |
e4d6b795 | 806 | |
990b86f4 MB |
807 | #if B43_DEBUG |
808 | dev->rx_count++; | |
809 | #endif | |
e4d6b795 MB |
810 | return; |
811 | drop: | |
812 | b43dbg(dev->wl, "RX: Packet dropped\n"); | |
813 | dev_kfree_skb_any(skb); | |
814 | } | |
815 | ||
816 | void b43_handle_txstatus(struct b43_wldev *dev, | |
817 | const struct b43_txstatus *status) | |
818 | { | |
819 | b43_debugfs_log_txstat(dev, status); | |
820 | ||
821 | if (status->intermediate) | |
822 | return; | |
823 | if (status->for_ampdu) | |
824 | return; | |
825 | if (!status->acked) | |
826 | dev->wl->ieee_stats.dot11ACKFailureCount++; | |
827 | if (status->rts_count) { | |
828 | if (status->rts_count == 0xF) //FIXME | |
829 | dev->wl->ieee_stats.dot11RTSFailureCount++; | |
830 | else | |
831 | dev->wl->ieee_stats.dot11RTSSuccessCount++; | |
832 | } | |
833 | ||
5100d5ac MB |
834 | if (b43_using_pio_transfers(dev)) |
835 | b43_pio_handle_txstatus(dev, status); | |
836 | else | |
837 | b43_dma_handle_txstatus(dev, status); | |
18c8adeb MB |
838 | |
839 | b43_phy_txpower_check(dev, 0); | |
e4d6b795 MB |
840 | } |
841 | ||
5100d5ac MB |
842 | /* Fill out the mac80211 TXstatus report based on the b43-specific |
843 | * txstatus report data. This returns a boolean whether the frame was | |
844 | * successfully transmitted. */ | |
e6a9854b JB |
845 | bool b43_fill_txstatus_report(struct b43_wldev *dev, |
846 | struct ieee80211_tx_info *report, | |
5100d5ac | 847 | const struct b43_txstatus *status) |
e4d6b795 | 848 | { |
5100d5ac | 849 | bool frame_success = 1; |
e6a9854b JB |
850 | int retry_limit; |
851 | ||
852 | /* preserve the confiured retry limit before clearing the status | |
853 | * The xmit function has overwritten the rc's value with the actual | |
854 | * retry limit done by the hardware */ | |
855 | retry_limit = report->status.rates[0].count; | |
856 | ieee80211_tx_info_clear_status(report); | |
5100d5ac MB |
857 | |
858 | if (status->acked) { | |
859 | /* The frame was ACKed. */ | |
e039fa4a | 860 | report->flags |= IEEE80211_TX_STAT_ACK; |
5100d5ac MB |
861 | } else { |
862 | /* The frame was not ACKed... */ | |
e039fa4a | 863 | if (!(report->flags & IEEE80211_TX_CTL_NO_ACK)) { |
5100d5ac MB |
864 | /* ...but we expected an ACK. */ |
865 | frame_success = 0; | |
5100d5ac MB |
866 | } |
867 | } | |
868 | if (status->frame_count == 0) { | |
869 | /* The frame was not transmitted at all. */ | |
e6a9854b JB |
870 | report->status.rates[0].count = 0; |
871 | } else if (status->rts_count > dev->wl->hw->conf.short_frame_max_tx_count) { | |
872 | /* | |
873 | * If the short retries (RTS, not data frame) have exceeded | |
874 | * the limit, the hw will not have tried the selected rate, | |
875 | * but will have used the fallback rate instead. | |
876 | * Don't let the rate control count attempts for the selected | |
877 | * rate in this case, otherwise the statistics will be off. | |
878 | */ | |
879 | report->status.rates[0].count = 0; | |
880 | report->status.rates[1].count = status->frame_count; | |
881 | } else { | |
882 | if (status->frame_count > retry_limit) { | |
883 | report->status.rates[0].count = retry_limit; | |
884 | report->status.rates[1].count = status->frame_count - | |
885 | retry_limit; | |
886 | ||
887 | } else { | |
888 | report->status.rates[0].count = status->frame_count; | |
889 | report->status.rates[1].idx = -1; | |
890 | } | |
891 | } | |
5100d5ac MB |
892 | |
893 | return frame_success; | |
e4d6b795 MB |
894 | } |
895 | ||
896 | /* Stop any TX operation on the device (suspend the hardware queues) */ | |
897 | void b43_tx_suspend(struct b43_wldev *dev) | |
898 | { | |
5100d5ac MB |
899 | if (b43_using_pio_transfers(dev)) |
900 | b43_pio_tx_suspend(dev); | |
901 | else | |
902 | b43_dma_tx_suspend(dev); | |
e4d6b795 MB |
903 | } |
904 | ||
905 | /* Resume any TX operation on the device (resume the hardware queues) */ | |
906 | void b43_tx_resume(struct b43_wldev *dev) | |
907 | { | |
5100d5ac MB |
908 | if (b43_using_pio_transfers(dev)) |
909 | b43_pio_tx_resume(dev); | |
910 | else | |
911 | b43_dma_tx_resume(dev); | |
e4d6b795 | 912 | } |