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5b435de0 AS |
1 | /* |
2 | * Copyright (c) 2010 Broadcom Corporation | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | |
11 | * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION | |
13 | * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN | |
14 | * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
02f77195 JP |
17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
18 | ||
5b435de0 AS |
19 | #include <linux/types.h> |
20 | #include <linux/kernel.h> | |
21 | #include <linux/kthread.h> | |
22 | #include <linux/printk.h> | |
23 | #include <linux/pci_ids.h> | |
24 | #include <linux/netdevice.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/sched.h> | |
27 | #include <linux/mmc/sdio.h> | |
28 | #include <linux/mmc/sdio_func.h> | |
29 | #include <linux/mmc/card.h> | |
30 | #include <linux/semaphore.h> | |
31 | #include <linux/firmware.h> | |
b7a57e76 | 32 | #include <linux/module.h> |
99ba15cd | 33 | #include <linux/bcma/bcma.h> |
4fc0d016 | 34 | #include <linux/debugfs.h> |
8dc01811 | 35 | #include <linux/vmalloc.h> |
5b435de0 AS |
36 | #include <asm/unaligned.h> |
37 | #include <defs.h> | |
38 | #include <brcmu_wifi.h> | |
39 | #include <brcmu_utils.h> | |
40 | #include <brcm_hw_ids.h> | |
41 | #include <soc.h> | |
42 | #include "sdio_host.h" | |
a83369b6 | 43 | #include "sdio_chip.h" |
5b435de0 AS |
44 | |
45 | #define DCMD_RESP_TIMEOUT 2000 /* In milli second */ | |
46 | ||
8ae74654 | 47 | #ifdef DEBUG |
5b435de0 AS |
48 | |
49 | #define BRCMF_TRAP_INFO_SIZE 80 | |
50 | ||
51 | #define CBUF_LEN (128) | |
52 | ||
4fc0d016 AS |
53 | /* Device console log buffer state */ |
54 | #define CONSOLE_BUFFER_MAX 2024 | |
55 | ||
5b435de0 AS |
56 | struct rte_log_le { |
57 | __le32 buf; /* Can't be pointer on (64-bit) hosts */ | |
58 | __le32 buf_size; | |
59 | __le32 idx; | |
60 | char *_buf_compat; /* Redundant pointer for backward compat. */ | |
61 | }; | |
62 | ||
63 | struct rte_console { | |
64 | /* Virtual UART | |
65 | * When there is no UART (e.g. Quickturn), | |
66 | * the host should write a complete | |
67 | * input line directly into cbuf and then write | |
68 | * the length into vcons_in. | |
69 | * This may also be used when there is a real UART | |
70 | * (at risk of conflicting with | |
71 | * the real UART). vcons_out is currently unused. | |
72 | */ | |
73 | uint vcons_in; | |
74 | uint vcons_out; | |
75 | ||
76 | /* Output (logging) buffer | |
77 | * Console output is written to a ring buffer log_buf at index log_idx. | |
78 | * The host may read the output when it sees log_idx advance. | |
79 | * Output will be lost if the output wraps around faster than the host | |
80 | * polls. | |
81 | */ | |
82 | struct rte_log_le log_le; | |
83 | ||
84 | /* Console input line buffer | |
85 | * Characters are read one at a time into cbuf | |
86 | * until <CR> is received, then | |
87 | * the buffer is processed as a command line. | |
88 | * Also used for virtual UART. | |
89 | */ | |
90 | uint cbuf_idx; | |
91 | char cbuf[CBUF_LEN]; | |
92 | }; | |
93 | ||
8ae74654 | 94 | #endif /* DEBUG */ |
5b435de0 AS |
95 | #include <chipcommon.h> |
96 | ||
5b435de0 | 97 | #include "dhd_bus.h" |
5b435de0 | 98 | #include "dhd_dbg.h" |
5b435de0 AS |
99 | |
100 | #define TXQLEN 2048 /* bulk tx queue length */ | |
101 | #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */ | |
102 | #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */ | |
103 | #define PRIOMASK 7 | |
104 | ||
105 | #define TXRETRIES 2 /* # of retries for tx frames */ | |
106 | ||
107 | #define BRCMF_RXBOUND 50 /* Default for max rx frames in | |
108 | one scheduling */ | |
109 | ||
110 | #define BRCMF_TXBOUND 20 /* Default for max tx frames in | |
111 | one scheduling */ | |
112 | ||
113 | #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */ | |
114 | ||
115 | #define MEMBLOCK 2048 /* Block size used for downloading | |
116 | of dongle image */ | |
117 | #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold | |
118 | biggest possible glom */ | |
119 | ||
120 | #define BRCMF_FIRSTREAD (1 << 6) | |
121 | ||
122 | ||
123 | /* SBSDIO_DEVICE_CTL */ | |
124 | ||
125 | /* 1: device will assert busy signal when receiving CMD53 */ | |
126 | #define SBSDIO_DEVCTL_SETBUSY 0x01 | |
127 | /* 1: assertion of sdio interrupt is synchronous to the sdio clock */ | |
128 | #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 | |
129 | /* 1: mask all interrupts to host except the chipActive (rev 8) */ | |
130 | #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 | |
131 | /* 1: isolate internal sdio signals, put external pads in tri-state; requires | |
132 | * sdio bus power cycle to clear (rev 9) */ | |
133 | #define SBSDIO_DEVCTL_PADS_ISO 0x08 | |
134 | /* Force SD->SB reset mapping (rev 11) */ | |
135 | #define SBSDIO_DEVCTL_SB_RST_CTL 0x30 | |
136 | /* Determined by CoreControl bit */ | |
137 | #define SBSDIO_DEVCTL_RST_CORECTL 0x00 | |
138 | /* Force backplane reset */ | |
139 | #define SBSDIO_DEVCTL_RST_BPRESET 0x10 | |
140 | /* Force no backplane reset */ | |
141 | #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 | |
142 | ||
5b435de0 AS |
143 | /* direct(mapped) cis space */ |
144 | ||
145 | /* MAPPED common CIS address */ | |
146 | #define SBSDIO_CIS_BASE_COMMON 0x1000 | |
147 | /* maximum bytes in one CIS */ | |
148 | #define SBSDIO_CIS_SIZE_LIMIT 0x200 | |
149 | /* cis offset addr is < 17 bits */ | |
150 | #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF | |
151 | ||
152 | /* manfid tuple length, include tuple, link bytes */ | |
153 | #define SBSDIO_CIS_MANFID_TUPLE_LEN 6 | |
154 | ||
155 | /* intstatus */ | |
156 | #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */ | |
157 | #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */ | |
158 | #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */ | |
159 | #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */ | |
160 | #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */ | |
161 | #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */ | |
162 | #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */ | |
163 | #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */ | |
164 | #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */ | |
165 | #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */ | |
166 | #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */ | |
167 | #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */ | |
168 | #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */ | |
169 | #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */ | |
170 | #define I_PC (1 << 10) /* descriptor error */ | |
171 | #define I_PD (1 << 11) /* data error */ | |
172 | #define I_DE (1 << 12) /* Descriptor protocol Error */ | |
173 | #define I_RU (1 << 13) /* Receive descriptor Underflow */ | |
174 | #define I_RO (1 << 14) /* Receive fifo Overflow */ | |
175 | #define I_XU (1 << 15) /* Transmit fifo Underflow */ | |
176 | #define I_RI (1 << 16) /* Receive Interrupt */ | |
177 | #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */ | |
178 | #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */ | |
179 | #define I_XI (1 << 24) /* Transmit Interrupt */ | |
180 | #define I_RF_TERM (1 << 25) /* Read Frame Terminate */ | |
181 | #define I_WF_TERM (1 << 26) /* Write Frame Terminate */ | |
182 | #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */ | |
183 | #define I_SBINT (1 << 28) /* sbintstatus Interrupt */ | |
184 | #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */ | |
185 | #define I_SRESET (1 << 30) /* CCCR RES interrupt */ | |
186 | #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */ | |
187 | #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) | |
188 | #define I_DMA (I_RI | I_XI | I_ERRORS) | |
189 | ||
190 | /* corecontrol */ | |
191 | #define CC_CISRDY (1 << 0) /* CIS Ready */ | |
192 | #define CC_BPRESEN (1 << 1) /* CCCR RES signal */ | |
193 | #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */ | |
194 | #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */ | |
195 | #define CC_XMTDATAAVAIL_MODE (1 << 4) | |
196 | #define CC_XMTDATAAVAIL_CTRL (1 << 5) | |
197 | ||
198 | /* SDA_FRAMECTRL */ | |
199 | #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */ | |
200 | #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */ | |
201 | #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */ | |
202 | #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */ | |
203 | ||
204 | /* HW frame tag */ | |
205 | #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */ | |
206 | ||
207 | /* Total length of frame header for dongle protocol */ | |
208 | #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN) | |
209 | #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN) | |
210 | ||
211 | /* | |
212 | * Software allocation of To SB Mailbox resources | |
213 | */ | |
214 | ||
215 | /* tosbmailbox bits corresponding to intstatus bits */ | |
216 | #define SMB_NAK (1 << 0) /* Frame NAK */ | |
217 | #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */ | |
218 | #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */ | |
219 | #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */ | |
220 | ||
221 | /* tosbmailboxdata */ | |
222 | #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */ | |
223 | ||
224 | /* | |
225 | * Software allocation of To Host Mailbox resources | |
226 | */ | |
227 | ||
228 | /* intstatus bits */ | |
229 | #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */ | |
230 | #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */ | |
231 | #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */ | |
232 | #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */ | |
233 | ||
234 | /* tohostmailboxdata */ | |
235 | #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */ | |
236 | #define HMB_DATA_DEVREADY 2 /* talk to host after enable */ | |
237 | #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */ | |
238 | #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */ | |
239 | ||
240 | #define HMB_DATA_FCDATA_MASK 0xff000000 | |
241 | #define HMB_DATA_FCDATA_SHIFT 24 | |
242 | ||
243 | #define HMB_DATA_VERSION_MASK 0x00ff0000 | |
244 | #define HMB_DATA_VERSION_SHIFT 16 | |
245 | ||
246 | /* | |
247 | * Software-defined protocol header | |
248 | */ | |
249 | ||
250 | /* Current protocol version */ | |
251 | #define SDPCM_PROT_VERSION 4 | |
252 | ||
253 | /* SW frame header */ | |
254 | #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff) | |
255 | ||
256 | #define SDPCM_CHANNEL_MASK 0x00000f00 | |
257 | #define SDPCM_CHANNEL_SHIFT 8 | |
258 | #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f) | |
259 | ||
260 | #define SDPCM_NEXTLEN_OFFSET 2 | |
261 | ||
262 | /* Data Offset from SOF (HW Tag, SW Tag, Pad) */ | |
263 | #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ | |
264 | #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) | |
265 | #define SDPCM_DOFFSET_MASK 0xff000000 | |
266 | #define SDPCM_DOFFSET_SHIFT 24 | |
267 | #define SDPCM_FCMASK_OFFSET 4 /* Flow control */ | |
268 | #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff) | |
269 | #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ | |
270 | #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) | |
271 | ||
272 | #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ | |
273 | ||
274 | /* logical channel numbers */ | |
275 | #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */ | |
276 | #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ | |
277 | #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ | |
278 | #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */ | |
279 | #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ | |
280 | ||
281 | #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */ | |
282 | ||
283 | #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80) | |
284 | ||
285 | /* | |
286 | * Shared structure between dongle and the host. | |
287 | * The structure contains pointers to trap or assert information. | |
288 | */ | |
4fc0d016 | 289 | #define SDPCM_SHARED_VERSION 0x0003 |
5b435de0 AS |
290 | #define SDPCM_SHARED_VERSION_MASK 0x00FF |
291 | #define SDPCM_SHARED_ASSERT_BUILT 0x0100 | |
292 | #define SDPCM_SHARED_ASSERT 0x0200 | |
293 | #define SDPCM_SHARED_TRAP 0x0400 | |
294 | ||
295 | /* Space for header read, limit for data packets */ | |
296 | #define MAX_HDR_READ (1 << 6) | |
297 | #define MAX_RX_DATASZ 2048 | |
298 | ||
299 | /* Maximum milliseconds to wait for F2 to come up */ | |
300 | #define BRCMF_WAIT_F2RDY 3000 | |
301 | ||
302 | /* Bump up limit on waiting for HT to account for first startup; | |
303 | * if the image is doing a CRC calculation before programming the PMU | |
304 | * for HT availability, it could take a couple hundred ms more, so | |
305 | * max out at a 1 second (1000000us). | |
306 | */ | |
307 | #undef PMU_MAX_TRANSITION_DLY | |
308 | #define PMU_MAX_TRANSITION_DLY 1000000 | |
309 | ||
310 | /* Value for ChipClockCSR during initial setup */ | |
311 | #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \ | |
312 | SBSDIO_ALP_AVAIL_REQ) | |
313 | ||
314 | /* Flags for SDH calls */ | |
315 | #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED) | |
316 | ||
52e1409f AS |
317 | #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin" |
318 | #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt" | |
319 | MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME); | |
320 | MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME); | |
8dd939ca | 321 | |
382a9e0f FL |
322 | #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */ |
323 | #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change | |
324 | * when idle | |
325 | */ | |
326 | #define BRCMF_IDLE_INTERVAL 1 | |
327 | ||
5b435de0 AS |
328 | /* |
329 | * Conversion of 802.1D priority to precedence level | |
330 | */ | |
331 | static uint prio2prec(u32 prio) | |
332 | { | |
333 | return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ? | |
334 | (prio^2) : prio; | |
335 | } | |
336 | ||
5b435de0 AS |
337 | /* core registers */ |
338 | struct sdpcmd_regs { | |
339 | u32 corecontrol; /* 0x00, rev8 */ | |
340 | u32 corestatus; /* rev8 */ | |
341 | u32 PAD[1]; | |
342 | u32 biststatus; /* rev8 */ | |
343 | ||
344 | /* PCMCIA access */ | |
345 | u16 pcmciamesportaladdr; /* 0x010, rev8 */ | |
346 | u16 PAD[1]; | |
347 | u16 pcmciamesportalmask; /* rev8 */ | |
348 | u16 PAD[1]; | |
349 | u16 pcmciawrframebc; /* rev8 */ | |
350 | u16 PAD[1]; | |
351 | u16 pcmciaunderflowtimer; /* rev8 */ | |
352 | u16 PAD[1]; | |
353 | ||
354 | /* interrupt */ | |
355 | u32 intstatus; /* 0x020, rev8 */ | |
356 | u32 hostintmask; /* rev8 */ | |
357 | u32 intmask; /* rev8 */ | |
358 | u32 sbintstatus; /* rev8 */ | |
359 | u32 sbintmask; /* rev8 */ | |
360 | u32 funcintmask; /* rev4 */ | |
361 | u32 PAD[2]; | |
362 | u32 tosbmailbox; /* 0x040, rev8 */ | |
363 | u32 tohostmailbox; /* rev8 */ | |
364 | u32 tosbmailboxdata; /* rev8 */ | |
365 | u32 tohostmailboxdata; /* rev8 */ | |
366 | ||
367 | /* synchronized access to registers in SDIO clock domain */ | |
368 | u32 sdioaccess; /* 0x050, rev8 */ | |
369 | u32 PAD[3]; | |
370 | ||
371 | /* PCMCIA frame control */ | |
372 | u8 pcmciaframectrl; /* 0x060, rev8 */ | |
373 | u8 PAD[3]; | |
374 | u8 pcmciawatermark; /* rev8 */ | |
375 | u8 PAD[155]; | |
376 | ||
377 | /* interrupt batching control */ | |
378 | u32 intrcvlazy; /* 0x100, rev8 */ | |
379 | u32 PAD[3]; | |
380 | ||
381 | /* counters */ | |
382 | u32 cmd52rd; /* 0x110, rev8 */ | |
383 | u32 cmd52wr; /* rev8 */ | |
384 | u32 cmd53rd; /* rev8 */ | |
385 | u32 cmd53wr; /* rev8 */ | |
386 | u32 abort; /* rev8 */ | |
387 | u32 datacrcerror; /* rev8 */ | |
388 | u32 rdoutofsync; /* rev8 */ | |
389 | u32 wroutofsync; /* rev8 */ | |
390 | u32 writebusy; /* rev8 */ | |
391 | u32 readwait; /* rev8 */ | |
392 | u32 readterm; /* rev8 */ | |
393 | u32 writeterm; /* rev8 */ | |
394 | u32 PAD[40]; | |
395 | u32 clockctlstatus; /* rev8 */ | |
396 | u32 PAD[7]; | |
397 | ||
398 | u32 PAD[128]; /* DMA engines */ | |
399 | ||
400 | /* SDIO/PCMCIA CIS region */ | |
401 | char cis[512]; /* 0x400-0x5ff, rev6 */ | |
402 | ||
403 | /* PCMCIA function control registers */ | |
404 | char pcmciafcr[256]; /* 0x600-6ff, rev6 */ | |
405 | u16 PAD[55]; | |
406 | ||
407 | /* PCMCIA backplane access */ | |
408 | u16 backplanecsr; /* 0x76E, rev6 */ | |
409 | u16 backplaneaddr0; /* rev6 */ | |
410 | u16 backplaneaddr1; /* rev6 */ | |
411 | u16 backplaneaddr2; /* rev6 */ | |
412 | u16 backplaneaddr3; /* rev6 */ | |
413 | u16 backplanedata0; /* rev6 */ | |
414 | u16 backplanedata1; /* rev6 */ | |
415 | u16 backplanedata2; /* rev6 */ | |
416 | u16 backplanedata3; /* rev6 */ | |
417 | u16 PAD[31]; | |
418 | ||
419 | /* sprom "size" & "blank" info */ | |
420 | u16 spromstatus; /* 0x7BE, rev2 */ | |
421 | u32 PAD[464]; | |
422 | ||
423 | u16 PAD[0x80]; | |
424 | }; | |
425 | ||
8ae74654 | 426 | #ifdef DEBUG |
5b435de0 AS |
427 | /* Device console log buffer state */ |
428 | struct brcmf_console { | |
429 | uint count; /* Poll interval msec counter */ | |
430 | uint log_addr; /* Log struct address (fixed) */ | |
431 | struct rte_log_le log_le; /* Log struct (host copy) */ | |
432 | uint bufsize; /* Size of log buffer */ | |
433 | u8 *buf; /* Log buffer (host copy) */ | |
434 | uint last; /* Last buffer read index */ | |
435 | }; | |
4fc0d016 AS |
436 | |
437 | struct brcmf_trap_info { | |
438 | __le32 type; | |
439 | __le32 epc; | |
440 | __le32 cpsr; | |
441 | __le32 spsr; | |
442 | __le32 r0; /* a1 */ | |
443 | __le32 r1; /* a2 */ | |
444 | __le32 r2; /* a3 */ | |
445 | __le32 r3; /* a4 */ | |
446 | __le32 r4; /* v1 */ | |
447 | __le32 r5; /* v2 */ | |
448 | __le32 r6; /* v3 */ | |
449 | __le32 r7; /* v4 */ | |
450 | __le32 r8; /* v5 */ | |
451 | __le32 r9; /* sb/v6 */ | |
452 | __le32 r10; /* sl/v7 */ | |
453 | __le32 r11; /* fp/v8 */ | |
454 | __le32 r12; /* ip */ | |
455 | __le32 r13; /* sp */ | |
456 | __le32 r14; /* lr */ | |
457 | __le32 pc; /* r15 */ | |
458 | }; | |
8ae74654 | 459 | #endif /* DEBUG */ |
5b435de0 AS |
460 | |
461 | struct sdpcm_shared { | |
462 | u32 flags; | |
463 | u32 trap_addr; | |
464 | u32 assert_exp_addr; | |
465 | u32 assert_file_addr; | |
466 | u32 assert_line; | |
467 | u32 console_addr; /* Address of struct rte_console */ | |
468 | u32 msgtrace_addr; | |
469 | u8 tag[32]; | |
4fc0d016 | 470 | u32 brpt_addr; |
5b435de0 AS |
471 | }; |
472 | ||
473 | struct sdpcm_shared_le { | |
474 | __le32 flags; | |
475 | __le32 trap_addr; | |
476 | __le32 assert_exp_addr; | |
477 | __le32 assert_file_addr; | |
478 | __le32 assert_line; | |
479 | __le32 console_addr; /* Address of struct rte_console */ | |
480 | __le32 msgtrace_addr; | |
481 | u8 tag[32]; | |
4fc0d016 | 482 | __le32 brpt_addr; |
5b435de0 AS |
483 | }; |
484 | ||
485 | ||
486 | /* misc chip info needed by some of the routines */ | |
5b435de0 | 487 | /* Private data for SDIO bus interaction */ |
e92eedf4 | 488 | struct brcmf_sdio { |
5b435de0 AS |
489 | struct brcmf_sdio_dev *sdiodev; /* sdio device handler */ |
490 | struct chip_info *ci; /* Chip info struct */ | |
491 | char *vars; /* Variables (from CIS and/or other) */ | |
492 | uint varsz; /* Size of variables buffer */ | |
493 | ||
494 | u32 ramsize; /* Size of RAM in SOCRAM (bytes) */ | |
495 | ||
496 | u32 hostintmask; /* Copy of Host Interrupt Mask */ | |
497 | u32 intstatus; /* Intstatus bits (events) pending */ | |
498 | bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */ | |
499 | bool fcstate; /* State of dongle flow-control */ | |
500 | ||
501 | uint blocksize; /* Block size of SDIO transfers */ | |
502 | uint roundup; /* Max roundup limit */ | |
503 | ||
504 | struct pktq txq; /* Queue length used for flow-control */ | |
505 | u8 flowcontrol; /* per prio flow control bitmask */ | |
506 | u8 tx_seq; /* Transmit sequence number (next) */ | |
507 | u8 tx_max; /* Maximum transmit sequence allowed */ | |
508 | ||
509 | u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN]; | |
510 | u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */ | |
511 | u16 nextlen; /* Next Read Len from last header */ | |
512 | u8 rx_seq; /* Receive sequence number (expected) */ | |
513 | bool rxskip; /* Skip receive (awaiting NAK ACK) */ | |
514 | ||
515 | uint rxbound; /* Rx frames to read before resched */ | |
516 | uint txbound; /* Tx frames to send before resched */ | |
517 | uint txminmax; | |
518 | ||
519 | struct sk_buff *glomd; /* Packet containing glomming descriptor */ | |
b83db862 | 520 | struct sk_buff_head glom; /* Packet list for glommed superframe */ |
5b435de0 AS |
521 | uint glomerr; /* Glom packet read errors */ |
522 | ||
523 | u8 *rxbuf; /* Buffer for receiving control packets */ | |
524 | uint rxblen; /* Allocated length of rxbuf */ | |
525 | u8 *rxctl; /* Aligned pointer into rxbuf */ | |
526 | u8 *databuf; /* Buffer for receiving big glom packet */ | |
527 | u8 *dataptr; /* Aligned pointer into databuf */ | |
528 | uint rxlen; /* Length of valid data in buffer */ | |
529 | ||
530 | u8 sdpcm_ver; /* Bus protocol reported by dongle */ | |
531 | ||
532 | bool intr; /* Use interrupts */ | |
533 | bool poll; /* Use polling */ | |
534 | bool ipend; /* Device interrupt is pending */ | |
5b435de0 AS |
535 | uint spurious; /* Count of spurious interrupts */ |
536 | uint pollrate; /* Ticks between device polls */ | |
537 | uint polltick; /* Tick counter */ | |
5b435de0 | 538 | |
8ae74654 | 539 | #ifdef DEBUG |
5b435de0 AS |
540 | uint console_interval; |
541 | struct brcmf_console console; /* Console output polling support */ | |
542 | uint console_addr; /* Console address from shared struct */ | |
8ae74654 | 543 | #endif /* DEBUG */ |
5b435de0 | 544 | |
5b435de0 AS |
545 | uint clkstate; /* State of sd and backplane clock(s) */ |
546 | bool activity; /* Activity flag for clock down */ | |
547 | s32 idletime; /* Control for activity timeout */ | |
548 | s32 idlecount; /* Activity timeout counter */ | |
549 | s32 idleclock; /* How to set bus driver when idle */ | |
550 | s32 sd_rxchain; | |
551 | bool use_rxchain; /* If brcmf should use PKT chains */ | |
5b435de0 AS |
552 | bool rxflow_mode; /* Rx flow control mode */ |
553 | bool rxflow; /* Is rx flow control on */ | |
554 | bool alp_only; /* Don't use HT clock (ALP only) */ | |
555 | /* Field to decide if rx of control frames happen in rxbuf or lb-pool */ | |
556 | bool usebufpool; | |
557 | ||
5b435de0 AS |
558 | u8 *ctrl_frame_buf; |
559 | u32 ctrl_frame_len; | |
560 | bool ctrl_frame_stat; | |
561 | ||
562 | spinlock_t txqlock; | |
563 | wait_queue_head_t ctrl_wait; | |
564 | wait_queue_head_t dcmd_resp_wait; | |
565 | ||
566 | struct timer_list timer; | |
567 | struct completion watchdog_wait; | |
568 | struct task_struct *watchdog_tsk; | |
569 | bool wd_timer_valid; | |
570 | uint save_ms; | |
571 | ||
572 | struct task_struct *dpc_tsk; | |
573 | struct completion dpc_wait; | |
b948a85c FL |
574 | struct list_head dpc_tsklst; |
575 | spinlock_t dpc_tl_lock; | |
5b435de0 AS |
576 | |
577 | struct semaphore sdsem; | |
578 | ||
5b435de0 | 579 | const struct firmware *firmware; |
5b435de0 | 580 | u32 fw_ptr; |
c8bf3484 FL |
581 | |
582 | bool txoff; /* Transmit flow-controlled */ | |
80969836 | 583 | struct brcmf_sdio_count sdcnt; |
5b435de0 AS |
584 | }; |
585 | ||
5b435de0 AS |
586 | /* clkstate */ |
587 | #define CLK_NONE 0 | |
588 | #define CLK_SDONLY 1 | |
589 | #define CLK_PENDING 2 /* Not used yet */ | |
590 | #define CLK_AVAIL 3 | |
591 | ||
8ae74654 | 592 | #ifdef DEBUG |
5b435de0 AS |
593 | static int qcount[NUMPRIO]; |
594 | static int tx_packets[NUMPRIO]; | |
8ae74654 | 595 | #endif /* DEBUG */ |
5b435de0 AS |
596 | |
597 | #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */ | |
598 | ||
599 | #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL) | |
600 | ||
601 | /* Retry count for register access failures */ | |
602 | static const uint retry_limit = 2; | |
603 | ||
604 | /* Limit on rounding up frames */ | |
605 | static const uint max_roundup = 512; | |
606 | ||
607 | #define ALIGNMENT 4 | |
608 | ||
609 | static void pkt_align(struct sk_buff *p, int len, int align) | |
610 | { | |
611 | uint datalign; | |
612 | datalign = (unsigned long)(p->data); | |
613 | datalign = roundup(datalign, (align)) - datalign; | |
614 | if (datalign) | |
615 | skb_pull(p, datalign); | |
616 | __skb_trim(p, len); | |
617 | } | |
618 | ||
619 | /* To check if there's window offered */ | |
e92eedf4 | 620 | static bool data_ok(struct brcmf_sdio *bus) |
5b435de0 AS |
621 | { |
622 | return (u8)(bus->tx_max - bus->tx_seq) != 0 && | |
623 | ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0; | |
624 | } | |
625 | ||
626 | /* | |
627 | * Reads a register in the SDIO hardware block. This block occupies a series of | |
628 | * adresses on the 32 bit backplane bus. | |
629 | */ | |
58692750 FL |
630 | static int |
631 | r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset) | |
5b435de0 | 632 | { |
99ba15cd | 633 | u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV); |
79ae3957 | 634 | int ret; |
58692750 FL |
635 | |
636 | *regvar = brcmf_sdio_regrl(bus->sdiodev, | |
637 | bus->ci->c_inf[idx].base + offset, &ret); | |
638 | ||
639 | return ret; | |
5b435de0 AS |
640 | } |
641 | ||
58692750 FL |
642 | static int |
643 | w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset) | |
5b435de0 | 644 | { |
99ba15cd | 645 | u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV); |
e13ce26b | 646 | int ret; |
58692750 FL |
647 | |
648 | brcmf_sdio_regwl(bus->sdiodev, | |
649 | bus->ci->c_inf[idx].base + reg_offset, | |
650 | regval, &ret); | |
651 | ||
652 | return ret; | |
5b435de0 AS |
653 | } |
654 | ||
655 | #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND) | |
656 | ||
657 | #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE) | |
658 | ||
659 | /* Packet free applicable unconditionally for sdio and sdspi. | |
660 | * Conditional if bufpool was present for gspi bus. | |
661 | */ | |
e92eedf4 | 662 | static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt) |
5b435de0 AS |
663 | { |
664 | if (bus->usebufpool) | |
665 | brcmu_pkt_buf_free_skb(pkt); | |
666 | } | |
667 | ||
668 | /* Turn backplane clock on or off */ | |
e92eedf4 | 669 | static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok) |
5b435de0 AS |
670 | { |
671 | int err; | |
672 | u8 clkctl, clkreq, devctl; | |
673 | unsigned long timeout; | |
674 | ||
675 | brcmf_dbg(TRACE, "Enter\n"); | |
676 | ||
677 | clkctl = 0; | |
678 | ||
679 | if (on) { | |
680 | /* Request HT Avail */ | |
681 | clkreq = | |
682 | bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ; | |
683 | ||
3bba829f FL |
684 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, |
685 | clkreq, &err); | |
5b435de0 AS |
686 | if (err) { |
687 | brcmf_dbg(ERROR, "HT Avail request error: %d\n", err); | |
688 | return -EBADE; | |
689 | } | |
690 | ||
5b435de0 | 691 | /* Check current status */ |
45db339c FL |
692 | clkctl = brcmf_sdio_regrb(bus->sdiodev, |
693 | SBSDIO_FUNC1_CHIPCLKCSR, &err); | |
5b435de0 AS |
694 | if (err) { |
695 | brcmf_dbg(ERROR, "HT Avail read error: %d\n", err); | |
696 | return -EBADE; | |
697 | } | |
698 | ||
699 | /* Go to pending and await interrupt if appropriate */ | |
700 | if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) { | |
701 | /* Allow only clock-available interrupt */ | |
45db339c FL |
702 | devctl = brcmf_sdio_regrb(bus->sdiodev, |
703 | SBSDIO_DEVICE_CTL, &err); | |
5b435de0 AS |
704 | if (err) { |
705 | brcmf_dbg(ERROR, "Devctl error setting CA: %d\n", | |
706 | err); | |
707 | return -EBADE; | |
708 | } | |
709 | ||
710 | devctl |= SBSDIO_DEVCTL_CA_INT_ONLY; | |
3bba829f FL |
711 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL, |
712 | devctl, &err); | |
5b435de0 AS |
713 | brcmf_dbg(INFO, "CLKCTL: set PENDING\n"); |
714 | bus->clkstate = CLK_PENDING; | |
715 | ||
716 | return 0; | |
717 | } else if (bus->clkstate == CLK_PENDING) { | |
718 | /* Cancel CA-only interrupt filter */ | |
45db339c | 719 | devctl = brcmf_sdio_regrb(bus->sdiodev, |
5b435de0 AS |
720 | SBSDIO_DEVICE_CTL, &err); |
721 | devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; | |
3bba829f FL |
722 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL, |
723 | devctl, &err); | |
5b435de0 AS |
724 | } |
725 | ||
726 | /* Otherwise, wait here (polling) for HT Avail */ | |
727 | timeout = jiffies + | |
728 | msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000); | |
729 | while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) { | |
45db339c FL |
730 | clkctl = brcmf_sdio_regrb(bus->sdiodev, |
731 | SBSDIO_FUNC1_CHIPCLKCSR, | |
732 | &err); | |
5b435de0 AS |
733 | if (time_after(jiffies, timeout)) |
734 | break; | |
735 | else | |
736 | usleep_range(5000, 10000); | |
737 | } | |
738 | if (err) { | |
739 | brcmf_dbg(ERROR, "HT Avail request error: %d\n", err); | |
740 | return -EBADE; | |
741 | } | |
742 | if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) { | |
743 | brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n", | |
744 | PMU_MAX_TRANSITION_DLY, clkctl); | |
745 | return -EBADE; | |
746 | } | |
747 | ||
748 | /* Mark clock available */ | |
749 | bus->clkstate = CLK_AVAIL; | |
750 | brcmf_dbg(INFO, "CLKCTL: turned ON\n"); | |
751 | ||
8ae74654 | 752 | #if defined(DEBUG) |
23677ce3 | 753 | if (!bus->alp_only) { |
5b435de0 AS |
754 | if (SBSDIO_ALPONLY(clkctl)) |
755 | brcmf_dbg(ERROR, "HT Clock should be on\n"); | |
756 | } | |
8ae74654 | 757 | #endif /* defined (DEBUG) */ |
5b435de0 AS |
758 | |
759 | bus->activity = true; | |
760 | } else { | |
761 | clkreq = 0; | |
762 | ||
763 | if (bus->clkstate == CLK_PENDING) { | |
764 | /* Cancel CA-only interrupt filter */ | |
45db339c FL |
765 | devctl = brcmf_sdio_regrb(bus->sdiodev, |
766 | SBSDIO_DEVICE_CTL, &err); | |
5b435de0 | 767 | devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; |
3bba829f FL |
768 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL, |
769 | devctl, &err); | |
5b435de0 AS |
770 | } |
771 | ||
772 | bus->clkstate = CLK_SDONLY; | |
3bba829f FL |
773 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, |
774 | clkreq, &err); | |
5b435de0 AS |
775 | brcmf_dbg(INFO, "CLKCTL: turned OFF\n"); |
776 | if (err) { | |
777 | brcmf_dbg(ERROR, "Failed access turning clock off: %d\n", | |
778 | err); | |
779 | return -EBADE; | |
780 | } | |
781 | } | |
782 | return 0; | |
783 | } | |
784 | ||
785 | /* Change idle/active SD state */ | |
e92eedf4 | 786 | static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on) |
5b435de0 AS |
787 | { |
788 | brcmf_dbg(TRACE, "Enter\n"); | |
789 | ||
790 | if (on) | |
791 | bus->clkstate = CLK_SDONLY; | |
792 | else | |
793 | bus->clkstate = CLK_NONE; | |
794 | ||
795 | return 0; | |
796 | } | |
797 | ||
798 | /* Transition SD and backplane clock readiness */ | |
e92eedf4 | 799 | static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok) |
5b435de0 | 800 | { |
8ae74654 | 801 | #ifdef DEBUG |
5b435de0 | 802 | uint oldstate = bus->clkstate; |
8ae74654 | 803 | #endif /* DEBUG */ |
5b435de0 AS |
804 | |
805 | brcmf_dbg(TRACE, "Enter\n"); | |
806 | ||
807 | /* Early exit if we're already there */ | |
808 | if (bus->clkstate == target) { | |
809 | if (target == CLK_AVAIL) { | |
810 | brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS); | |
811 | bus->activity = true; | |
812 | } | |
813 | return 0; | |
814 | } | |
815 | ||
816 | switch (target) { | |
817 | case CLK_AVAIL: | |
818 | /* Make sure SD clock is available */ | |
819 | if (bus->clkstate == CLK_NONE) | |
820 | brcmf_sdbrcm_sdclk(bus, true); | |
821 | /* Now request HT Avail on the backplane */ | |
822 | brcmf_sdbrcm_htclk(bus, true, pendok); | |
823 | brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS); | |
824 | bus->activity = true; | |
825 | break; | |
826 | ||
827 | case CLK_SDONLY: | |
828 | /* Remove HT request, or bring up SD clock */ | |
829 | if (bus->clkstate == CLK_NONE) | |
830 | brcmf_sdbrcm_sdclk(bus, true); | |
831 | else if (bus->clkstate == CLK_AVAIL) | |
832 | brcmf_sdbrcm_htclk(bus, false, false); | |
833 | else | |
834 | brcmf_dbg(ERROR, "request for %d -> %d\n", | |
835 | bus->clkstate, target); | |
836 | brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS); | |
837 | break; | |
838 | ||
839 | case CLK_NONE: | |
840 | /* Make sure to remove HT request */ | |
841 | if (bus->clkstate == CLK_AVAIL) | |
842 | brcmf_sdbrcm_htclk(bus, false, false); | |
843 | /* Now remove the SD clock */ | |
844 | brcmf_sdbrcm_sdclk(bus, false); | |
845 | brcmf_sdbrcm_wd_timer(bus, 0); | |
846 | break; | |
847 | } | |
8ae74654 | 848 | #ifdef DEBUG |
5b435de0 | 849 | brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate); |
8ae74654 | 850 | #endif /* DEBUG */ |
5b435de0 AS |
851 | |
852 | return 0; | |
853 | } | |
854 | ||
e92eedf4 | 855 | static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus) |
5b435de0 AS |
856 | { |
857 | u32 intstatus = 0; | |
858 | u32 hmb_data; | |
859 | u8 fcbits; | |
58692750 | 860 | int ret; |
5b435de0 AS |
861 | |
862 | brcmf_dbg(TRACE, "Enter\n"); | |
863 | ||
864 | /* Read mailbox data and ack that we did so */ | |
58692750 FL |
865 | ret = r_sdreg32(bus, &hmb_data, |
866 | offsetof(struct sdpcmd_regs, tohostmailboxdata)); | |
5b435de0 | 867 | |
58692750 | 868 | if (ret == 0) |
5b435de0 | 869 | w_sdreg32(bus, SMB_INT_ACK, |
58692750 | 870 | offsetof(struct sdpcmd_regs, tosbmailbox)); |
80969836 | 871 | bus->sdcnt.f1regdata += 2; |
5b435de0 AS |
872 | |
873 | /* Dongle recomposed rx frames, accept them again */ | |
874 | if (hmb_data & HMB_DATA_NAKHANDLED) { | |
875 | brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n", | |
876 | bus->rx_seq); | |
877 | if (!bus->rxskip) | |
878 | brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n"); | |
879 | ||
880 | bus->rxskip = false; | |
881 | intstatus |= I_HMB_FRAME_IND; | |
882 | } | |
883 | ||
884 | /* | |
885 | * DEVREADY does not occur with gSPI. | |
886 | */ | |
887 | if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) { | |
888 | bus->sdpcm_ver = | |
889 | (hmb_data & HMB_DATA_VERSION_MASK) >> | |
890 | HMB_DATA_VERSION_SHIFT; | |
891 | if (bus->sdpcm_ver != SDPCM_PROT_VERSION) | |
892 | brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, " | |
893 | "expecting %d\n", | |
894 | bus->sdpcm_ver, SDPCM_PROT_VERSION); | |
895 | else | |
896 | brcmf_dbg(INFO, "Dongle ready, protocol version %d\n", | |
897 | bus->sdpcm_ver); | |
898 | } | |
899 | ||
900 | /* | |
901 | * Flow Control has been moved into the RX headers and this out of band | |
902 | * method isn't used any more. | |
903 | * remaining backward compatible with older dongles. | |
904 | */ | |
905 | if (hmb_data & HMB_DATA_FC) { | |
906 | fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >> | |
907 | HMB_DATA_FCDATA_SHIFT; | |
908 | ||
909 | if (fcbits & ~bus->flowcontrol) | |
80969836 | 910 | bus->sdcnt.fc_xoff++; |
5b435de0 AS |
911 | |
912 | if (bus->flowcontrol & ~fcbits) | |
80969836 | 913 | bus->sdcnt.fc_xon++; |
5b435de0 | 914 | |
80969836 | 915 | bus->sdcnt.fc_rcvd++; |
5b435de0 AS |
916 | bus->flowcontrol = fcbits; |
917 | } | |
918 | ||
919 | /* Shouldn't be any others */ | |
920 | if (hmb_data & ~(HMB_DATA_DEVREADY | | |
921 | HMB_DATA_NAKHANDLED | | |
922 | HMB_DATA_FC | | |
923 | HMB_DATA_FWREADY | | |
924 | HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK)) | |
925 | brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n", | |
926 | hmb_data); | |
927 | ||
928 | return intstatus; | |
929 | } | |
930 | ||
e92eedf4 | 931 | static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx) |
5b435de0 AS |
932 | { |
933 | uint retries = 0; | |
934 | u16 lastrbc; | |
935 | u8 hi, lo; | |
936 | int err; | |
937 | ||
938 | brcmf_dbg(ERROR, "%sterminate frame%s\n", | |
939 | abort ? "abort command, " : "", | |
940 | rtx ? ", send NAK" : ""); | |
941 | ||
942 | if (abort) | |
943 | brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); | |
944 | ||
3bba829f FL |
945 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, |
946 | SFC_RF_TERM, &err); | |
80969836 | 947 | bus->sdcnt.f1regdata++; |
5b435de0 AS |
948 | |
949 | /* Wait until the packet has been flushed (device/FIFO stable) */ | |
950 | for (lastrbc = retries = 0xffff; retries > 0; retries--) { | |
45db339c | 951 | hi = brcmf_sdio_regrb(bus->sdiodev, |
5c15c23a | 952 | SBSDIO_FUNC1_RFRAMEBCHI, &err); |
45db339c | 953 | lo = brcmf_sdio_regrb(bus->sdiodev, |
5c15c23a | 954 | SBSDIO_FUNC1_RFRAMEBCLO, &err); |
80969836 | 955 | bus->sdcnt.f1regdata += 2; |
5b435de0 AS |
956 | |
957 | if ((hi == 0) && (lo == 0)) | |
958 | break; | |
959 | ||
960 | if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) { | |
961 | brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n", | |
962 | lastrbc, (hi << 8) + lo); | |
963 | } | |
964 | lastrbc = (hi << 8) + lo; | |
965 | } | |
966 | ||
967 | if (!retries) | |
968 | brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc); | |
969 | else | |
970 | brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries); | |
971 | ||
972 | if (rtx) { | |
80969836 | 973 | bus->sdcnt.rxrtx++; |
58692750 FL |
974 | err = w_sdreg32(bus, SMB_NAK, |
975 | offsetof(struct sdpcmd_regs, tosbmailbox)); | |
5b435de0 | 976 | |
80969836 | 977 | bus->sdcnt.f1regdata++; |
58692750 | 978 | if (err == 0) |
5b435de0 AS |
979 | bus->rxskip = true; |
980 | } | |
981 | ||
982 | /* Clear partial in any case */ | |
983 | bus->nextlen = 0; | |
984 | ||
985 | /* If we can't reach the device, signal failure */ | |
5c15c23a | 986 | if (err) |
712ac5b3 | 987 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
988 | } |
989 | ||
20e5ca16 | 990 | /* copy a buffer into a pkt buffer chain */ |
e92eedf4 | 991 | static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len) |
20e5ca16 AS |
992 | { |
993 | uint n, ret = 0; | |
994 | struct sk_buff *p; | |
995 | u8 *buf; | |
996 | ||
20e5ca16 AS |
997 | buf = bus->dataptr; |
998 | ||
999 | /* copy the data */ | |
b83db862 | 1000 | skb_queue_walk(&bus->glom, p) { |
20e5ca16 AS |
1001 | n = min_t(uint, p->len, len); |
1002 | memcpy(p->data, buf, n); | |
1003 | buf += n; | |
1004 | len -= n; | |
1005 | ret += n; | |
b83db862 AS |
1006 | if (!len) |
1007 | break; | |
20e5ca16 AS |
1008 | } |
1009 | ||
1010 | return ret; | |
1011 | } | |
1012 | ||
9a95e60e | 1013 | /* return total length of buffer chain */ |
e92eedf4 | 1014 | static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus) |
9a95e60e AS |
1015 | { |
1016 | struct sk_buff *p; | |
1017 | uint total; | |
1018 | ||
1019 | total = 0; | |
1020 | skb_queue_walk(&bus->glom, p) | |
1021 | total += p->len; | |
1022 | return total; | |
1023 | } | |
1024 | ||
e92eedf4 | 1025 | static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus) |
046808da AS |
1026 | { |
1027 | struct sk_buff *cur, *next; | |
1028 | ||
1029 | skb_queue_walk_safe(&bus->glom, cur, next) { | |
1030 | skb_unlink(cur, &bus->glom); | |
1031 | brcmu_pkt_buf_free_skb(cur); | |
1032 | } | |
1033 | } | |
1034 | ||
e92eedf4 | 1035 | static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq) |
5b435de0 AS |
1036 | { |
1037 | u16 dlen, totlen; | |
1038 | u8 *dptr, num = 0; | |
1039 | ||
1040 | u16 sublen, check; | |
0b45bf74 | 1041 | struct sk_buff *pfirst, *pnext; |
5b435de0 AS |
1042 | |
1043 | int errcode; | |
1044 | u8 chan, seq, doff, sfdoff; | |
1045 | u8 txmax; | |
1046 | ||
1047 | int ifidx = 0; | |
1048 | bool usechain = bus->use_rxchain; | |
1049 | ||
1050 | /* If packets, issue read(s) and send up packet chain */ | |
1051 | /* Return sequence numbers consumed? */ | |
1052 | ||
b83db862 AS |
1053 | brcmf_dbg(TRACE, "start: glomd %p glom %p\n", |
1054 | bus->glomd, skb_peek(&bus->glom)); | |
5b435de0 AS |
1055 | |
1056 | /* If there's a descriptor, generate the packet chain */ | |
1057 | if (bus->glomd) { | |
0b45bf74 | 1058 | pfirst = pnext = NULL; |
5b435de0 AS |
1059 | dlen = (u16) (bus->glomd->len); |
1060 | dptr = bus->glomd->data; | |
1061 | if (!dlen || (dlen & 1)) { | |
1062 | brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n", | |
1063 | dlen); | |
1064 | dlen = 0; | |
1065 | } | |
1066 | ||
1067 | for (totlen = num = 0; dlen; num++) { | |
1068 | /* Get (and move past) next length */ | |
1069 | sublen = get_unaligned_le16(dptr); | |
1070 | dlen -= sizeof(u16); | |
1071 | dptr += sizeof(u16); | |
1072 | if ((sublen < SDPCM_HDRLEN) || | |
1073 | ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) { | |
1074 | brcmf_dbg(ERROR, "descriptor len %d bad: %d\n", | |
1075 | num, sublen); | |
1076 | pnext = NULL; | |
1077 | break; | |
1078 | } | |
1079 | if (sublen % BRCMF_SDALIGN) { | |
1080 | brcmf_dbg(ERROR, "sublen %d not multiple of %d\n", | |
1081 | sublen, BRCMF_SDALIGN); | |
1082 | usechain = false; | |
1083 | } | |
1084 | totlen += sublen; | |
1085 | ||
1086 | /* For last frame, adjust read len so total | |
1087 | is a block multiple */ | |
1088 | if (!dlen) { | |
1089 | sublen += | |
1090 | (roundup(totlen, bus->blocksize) - totlen); | |
1091 | totlen = roundup(totlen, bus->blocksize); | |
1092 | } | |
1093 | ||
1094 | /* Allocate/chain packet for next subframe */ | |
1095 | pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN); | |
1096 | if (pnext == NULL) { | |
1097 | brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n", | |
1098 | num, sublen); | |
1099 | break; | |
1100 | } | |
b83db862 | 1101 | skb_queue_tail(&bus->glom, pnext); |
5b435de0 AS |
1102 | |
1103 | /* Adhere to start alignment requirements */ | |
1104 | pkt_align(pnext, sublen, BRCMF_SDALIGN); | |
1105 | } | |
1106 | ||
1107 | /* If all allocations succeeded, save packet chain | |
1108 | in bus structure */ | |
1109 | if (pnext) { | |
1110 | brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n", | |
1111 | totlen, num); | |
1112 | if (BRCMF_GLOM_ON() && bus->nextlen && | |
1113 | totlen != bus->nextlen) { | |
1114 | brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n", | |
1115 | bus->nextlen, totlen, rxseq); | |
1116 | } | |
5b435de0 AS |
1117 | pfirst = pnext = NULL; |
1118 | } else { | |
046808da | 1119 | brcmf_sdbrcm_free_glom(bus); |
5b435de0 AS |
1120 | num = 0; |
1121 | } | |
1122 | ||
1123 | /* Done with descriptor packet */ | |
1124 | brcmu_pkt_buf_free_skb(bus->glomd); | |
1125 | bus->glomd = NULL; | |
1126 | bus->nextlen = 0; | |
1127 | } | |
1128 | ||
1129 | /* Ok -- either we just generated a packet chain, | |
1130 | or had one from before */ | |
b83db862 | 1131 | if (!skb_queue_empty(&bus->glom)) { |
5b435de0 AS |
1132 | if (BRCMF_GLOM_ON()) { |
1133 | brcmf_dbg(GLOM, "try superframe read, packet chain:\n"); | |
b83db862 | 1134 | skb_queue_walk(&bus->glom, pnext) { |
5b435de0 AS |
1135 | brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n", |
1136 | pnext, (u8 *) (pnext->data), | |
1137 | pnext->len, pnext->len); | |
1138 | } | |
1139 | } | |
1140 | ||
b83db862 | 1141 | pfirst = skb_peek(&bus->glom); |
9a95e60e | 1142 | dlen = (u16) brcmf_sdbrcm_glom_len(bus); |
5b435de0 AS |
1143 | |
1144 | /* Do an SDIO read for the superframe. Configurable iovar to | |
1145 | * read directly into the chained packet, or allocate a large | |
1146 | * packet and and copy into the chain. | |
1147 | */ | |
1148 | if (usechain) { | |
5adfeb63 | 1149 | errcode = brcmf_sdcard_recv_chain(bus->sdiodev, |
5b435de0 | 1150 | bus->sdiodev->sbwad, |
5adfeb63 | 1151 | SDIO_FUNC_2, F2SYNC, &bus->glom); |
5b435de0 AS |
1152 | } else if (bus->dataptr) { |
1153 | errcode = brcmf_sdcard_recv_buf(bus->sdiodev, | |
1154 | bus->sdiodev->sbwad, | |
5adfeb63 AS |
1155 | SDIO_FUNC_2, F2SYNC, |
1156 | bus->dataptr, dlen); | |
20e5ca16 | 1157 | sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen); |
5b435de0 AS |
1158 | if (sublen != dlen) { |
1159 | brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n", | |
1160 | dlen, sublen); | |
1161 | errcode = -1; | |
1162 | } | |
1163 | pnext = NULL; | |
1164 | } else { | |
1165 | brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n", | |
1166 | dlen); | |
1167 | errcode = -1; | |
1168 | } | |
80969836 | 1169 | bus->sdcnt.f2rxdata++; |
5b435de0 AS |
1170 | |
1171 | /* On failure, kill the superframe, allow a couple retries */ | |
1172 | if (errcode < 0) { | |
1173 | brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n", | |
1174 | dlen, errcode); | |
719f2733 | 1175 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1176 | |
1177 | if (bus->glomerr++ < 3) { | |
1178 | brcmf_sdbrcm_rxfail(bus, true, true); | |
1179 | } else { | |
1180 | bus->glomerr = 0; | |
1181 | brcmf_sdbrcm_rxfail(bus, true, false); | |
80969836 | 1182 | bus->sdcnt.rxglomfail++; |
046808da | 1183 | brcmf_sdbrcm_free_glom(bus); |
5b435de0 AS |
1184 | } |
1185 | return 0; | |
1186 | } | |
1e023829 JP |
1187 | |
1188 | brcmf_dbg_hex_dump(BRCMF_GLOM_ON(), | |
1189 | pfirst->data, min_t(int, pfirst->len, 48), | |
1190 | "SUPERFRAME:\n"); | |
5b435de0 AS |
1191 | |
1192 | /* Validate the superframe header */ | |
1193 | dptr = (u8 *) (pfirst->data); | |
1194 | sublen = get_unaligned_le16(dptr); | |
1195 | check = get_unaligned_le16(dptr + sizeof(u16)); | |
1196 | ||
1197 | chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]); | |
1198 | seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1199 | bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET]; | |
1200 | if ((bus->nextlen << 4) > MAX_RX_DATASZ) { | |
1201 | brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n", | |
1202 | bus->nextlen, seq); | |
1203 | bus->nextlen = 0; | |
1204 | } | |
1205 | doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1206 | txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1207 | ||
1208 | errcode = 0; | |
1209 | if ((u16)~(sublen ^ check)) { | |
1210 | brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n", | |
1211 | sublen, check); | |
1212 | errcode = -1; | |
1213 | } else if (roundup(sublen, bus->blocksize) != dlen) { | |
1214 | brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n", | |
1215 | sublen, roundup(sublen, bus->blocksize), | |
1216 | dlen); | |
1217 | errcode = -1; | |
1218 | } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) != | |
1219 | SDPCM_GLOM_CHANNEL) { | |
1220 | brcmf_dbg(ERROR, "(superframe): bad channel %d\n", | |
1221 | SDPCM_PACKET_CHANNEL( | |
1222 | &dptr[SDPCM_FRAMETAG_LEN])); | |
1223 | errcode = -1; | |
1224 | } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) { | |
1225 | brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n"); | |
1226 | errcode = -1; | |
1227 | } else if ((doff < SDPCM_HDRLEN) || | |
1228 | (doff > (pfirst->len - SDPCM_HDRLEN))) { | |
1229 | brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n", | |
1230 | doff, sublen, pfirst->len, SDPCM_HDRLEN); | |
1231 | errcode = -1; | |
1232 | } | |
1233 | ||
1234 | /* Check sequence number of superframe SW header */ | |
1235 | if (rxseq != seq) { | |
1236 | brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n", | |
1237 | seq, rxseq); | |
80969836 | 1238 | bus->sdcnt.rx_badseq++; |
5b435de0 AS |
1239 | rxseq = seq; |
1240 | } | |
1241 | ||
1242 | /* Check window for sanity */ | |
1243 | if ((u8) (txmax - bus->tx_seq) > 0x40) { | |
1244 | brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n", | |
1245 | txmax, bus->tx_seq); | |
1246 | txmax = bus->tx_seq + 2; | |
1247 | } | |
1248 | bus->tx_max = txmax; | |
1249 | ||
1250 | /* Remove superframe header, remember offset */ | |
1251 | skb_pull(pfirst, doff); | |
1252 | sfdoff = doff; | |
0b45bf74 | 1253 | num = 0; |
5b435de0 AS |
1254 | |
1255 | /* Validate all the subframe headers */ | |
0b45bf74 AS |
1256 | skb_queue_walk(&bus->glom, pnext) { |
1257 | /* leave when invalid subframe is found */ | |
1258 | if (errcode) | |
1259 | break; | |
1260 | ||
5b435de0 AS |
1261 | dptr = (u8 *) (pnext->data); |
1262 | dlen = (u16) (pnext->len); | |
1263 | sublen = get_unaligned_le16(dptr); | |
1264 | check = get_unaligned_le16(dptr + sizeof(u16)); | |
1265 | chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]); | |
1266 | doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1e023829 JP |
1267 | brcmf_dbg_hex_dump(BRCMF_GLOM_ON(), |
1268 | dptr, 32, "subframe:\n"); | |
5b435de0 AS |
1269 | |
1270 | if ((u16)~(sublen ^ check)) { | |
1271 | brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n", | |
1272 | num, sublen, check); | |
1273 | errcode = -1; | |
1274 | } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) { | |
1275 | brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n", | |
1276 | num, sublen, dlen); | |
1277 | errcode = -1; | |
1278 | } else if ((chan != SDPCM_DATA_CHANNEL) && | |
1279 | (chan != SDPCM_EVENT_CHANNEL)) { | |
1280 | brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n", | |
1281 | num, chan); | |
1282 | errcode = -1; | |
1283 | } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) { | |
1284 | brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n", | |
1285 | num, doff, sublen, SDPCM_HDRLEN); | |
1286 | errcode = -1; | |
1287 | } | |
0b45bf74 AS |
1288 | /* increase the subframe count */ |
1289 | num++; | |
5b435de0 AS |
1290 | } |
1291 | ||
1292 | if (errcode) { | |
1293 | /* Terminate frame on error, request | |
1294 | a couple retries */ | |
1295 | if (bus->glomerr++ < 3) { | |
1296 | /* Restore superframe header space */ | |
1297 | skb_push(pfirst, sfdoff); | |
1298 | brcmf_sdbrcm_rxfail(bus, true, true); | |
1299 | } else { | |
1300 | bus->glomerr = 0; | |
1301 | brcmf_sdbrcm_rxfail(bus, true, false); | |
80969836 | 1302 | bus->sdcnt.rxglomfail++; |
046808da | 1303 | brcmf_sdbrcm_free_glom(bus); |
5b435de0 AS |
1304 | } |
1305 | bus->nextlen = 0; | |
1306 | return 0; | |
1307 | } | |
1308 | ||
1309 | /* Basic SD framing looks ok - process each packet (header) */ | |
5b435de0 | 1310 | |
0b45bf74 | 1311 | skb_queue_walk_safe(&bus->glom, pfirst, pnext) { |
5b435de0 AS |
1312 | dptr = (u8 *) (pfirst->data); |
1313 | sublen = get_unaligned_le16(dptr); | |
1314 | chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]); | |
1315 | seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1316 | doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); | |
1317 | ||
1318 | brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n", | |
1319 | num, pfirst, pfirst->data, | |
1320 | pfirst->len, sublen, chan, seq); | |
1321 | ||
1322 | /* precondition: chan == SDPCM_DATA_CHANNEL || | |
1323 | chan == SDPCM_EVENT_CHANNEL */ | |
1324 | ||
1325 | if (rxseq != seq) { | |
1326 | brcmf_dbg(GLOM, "rx_seq %d, expected %d\n", | |
1327 | seq, rxseq); | |
80969836 | 1328 | bus->sdcnt.rx_badseq++; |
5b435de0 AS |
1329 | rxseq = seq; |
1330 | } | |
0b45bf74 AS |
1331 | rxseq++; |
1332 | ||
1e023829 JP |
1333 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(), |
1334 | dptr, dlen, "Rx Subframe Data:\n"); | |
5b435de0 AS |
1335 | |
1336 | __skb_trim(pfirst, sublen); | |
1337 | skb_pull(pfirst, doff); | |
1338 | ||
1339 | if (pfirst->len == 0) { | |
0b45bf74 | 1340 | skb_unlink(pfirst, &bus->glom); |
5b435de0 | 1341 | brcmu_pkt_buf_free_skb(pfirst); |
5b435de0 | 1342 | continue; |
d5625ee6 FL |
1343 | } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, |
1344 | &ifidx, pfirst) != 0) { | |
5b435de0 | 1345 | brcmf_dbg(ERROR, "rx protocol error\n"); |
719f2733 | 1346 | bus->sdiodev->bus_if->dstats.rx_errors++; |
0b45bf74 | 1347 | skb_unlink(pfirst, &bus->glom); |
5b435de0 | 1348 | brcmu_pkt_buf_free_skb(pfirst); |
5b435de0 AS |
1349 | continue; |
1350 | } | |
1351 | ||
1e023829 JP |
1352 | brcmf_dbg_hex_dump(BRCMF_GLOM_ON(), |
1353 | pfirst->data, | |
1354 | min_t(int, pfirst->len, 32), | |
1355 | "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n", | |
1356 | bus->glom.qlen, pfirst, pfirst->data, | |
1357 | pfirst->len, pfirst->next, | |
1358 | pfirst->prev); | |
5b435de0 | 1359 | } |
0b45bf74 AS |
1360 | /* sent any remaining packets up */ |
1361 | if (bus->glom.qlen) { | |
5b435de0 | 1362 | up(&bus->sdsem); |
228bb43d | 1363 | brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom); |
5b435de0 AS |
1364 | down(&bus->sdsem); |
1365 | } | |
1366 | ||
80969836 AS |
1367 | bus->sdcnt.rxglomframes++; |
1368 | bus->sdcnt.rxglompkts += bus->glom.qlen; | |
5b435de0 AS |
1369 | } |
1370 | return num; | |
1371 | } | |
1372 | ||
e92eedf4 | 1373 | static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition, |
5b435de0 AS |
1374 | bool *pending) |
1375 | { | |
1376 | DECLARE_WAITQUEUE(wait, current); | |
1377 | int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT); | |
1378 | ||
1379 | /* Wait until control frame is available */ | |
1380 | add_wait_queue(&bus->dcmd_resp_wait, &wait); | |
1381 | set_current_state(TASK_INTERRUPTIBLE); | |
1382 | ||
1383 | while (!(*condition) && (!signal_pending(current) && timeout)) | |
1384 | timeout = schedule_timeout(timeout); | |
1385 | ||
1386 | if (signal_pending(current)) | |
1387 | *pending = true; | |
1388 | ||
1389 | set_current_state(TASK_RUNNING); | |
1390 | remove_wait_queue(&bus->dcmd_resp_wait, &wait); | |
1391 | ||
1392 | return timeout; | |
1393 | } | |
1394 | ||
e92eedf4 | 1395 | static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus) |
5b435de0 AS |
1396 | { |
1397 | if (waitqueue_active(&bus->dcmd_resp_wait)) | |
1398 | wake_up_interruptible(&bus->dcmd_resp_wait); | |
1399 | ||
1400 | return 0; | |
1401 | } | |
1402 | static void | |
e92eedf4 | 1403 | brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff) |
5b435de0 AS |
1404 | { |
1405 | uint rdlen, pad; | |
1406 | ||
1407 | int sdret; | |
1408 | ||
1409 | brcmf_dbg(TRACE, "Enter\n"); | |
1410 | ||
1411 | /* Set rxctl for frame (w/optional alignment) */ | |
1412 | bus->rxctl = bus->rxbuf; | |
1413 | bus->rxctl += BRCMF_FIRSTREAD; | |
1414 | pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN); | |
1415 | if (pad) | |
1416 | bus->rxctl += (BRCMF_SDALIGN - pad); | |
1417 | bus->rxctl -= BRCMF_FIRSTREAD; | |
1418 | ||
1419 | /* Copy the already-read portion over */ | |
1420 | memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD); | |
1421 | if (len <= BRCMF_FIRSTREAD) | |
1422 | goto gotpkt; | |
1423 | ||
1424 | /* Raise rdlen to next SDIO block to avoid tail command */ | |
1425 | rdlen = len - BRCMF_FIRSTREAD; | |
1426 | if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) { | |
1427 | pad = bus->blocksize - (rdlen % bus->blocksize); | |
1428 | if ((pad <= bus->roundup) && (pad < bus->blocksize) && | |
b01a6b3c | 1429 | ((len + pad) < bus->sdiodev->bus_if->maxctl)) |
5b435de0 AS |
1430 | rdlen += pad; |
1431 | } else if (rdlen % BRCMF_SDALIGN) { | |
1432 | rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN); | |
1433 | } | |
1434 | ||
1435 | /* Satisfy length-alignment requirements */ | |
1436 | if (rdlen & (ALIGNMENT - 1)) | |
1437 | rdlen = roundup(rdlen, ALIGNMENT); | |
1438 | ||
1439 | /* Drop if the read is too big or it exceeds our maximum */ | |
b01a6b3c | 1440 | if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) { |
5b435de0 | 1441 | brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n", |
b01a6b3c | 1442 | rdlen, bus->sdiodev->bus_if->maxctl); |
719f2733 | 1443 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1444 | brcmf_sdbrcm_rxfail(bus, false, false); |
1445 | goto done; | |
1446 | } | |
1447 | ||
b01a6b3c | 1448 | if ((len - doff) > bus->sdiodev->bus_if->maxctl) { |
5b435de0 | 1449 | brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n", |
b01a6b3c | 1450 | len, len - doff, bus->sdiodev->bus_if->maxctl); |
719f2733 | 1451 | bus->sdiodev->bus_if->dstats.rx_errors++; |
80969836 | 1452 | bus->sdcnt.rx_toolong++; |
5b435de0 AS |
1453 | brcmf_sdbrcm_rxfail(bus, false, false); |
1454 | goto done; | |
1455 | } | |
1456 | ||
1457 | /* Read remainder of frame body into the rxctl buffer */ | |
1458 | sdret = brcmf_sdcard_recv_buf(bus->sdiodev, | |
1459 | bus->sdiodev->sbwad, | |
1460 | SDIO_FUNC_2, | |
5adfeb63 | 1461 | F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen); |
80969836 | 1462 | bus->sdcnt.f2rxdata++; |
5b435de0 AS |
1463 | |
1464 | /* Control frame failures need retransmission */ | |
1465 | if (sdret < 0) { | |
1466 | brcmf_dbg(ERROR, "read %d control bytes failed: %d\n", | |
1467 | rdlen, sdret); | |
80969836 | 1468 | bus->sdcnt.rxc_errors++; |
5b435de0 AS |
1469 | brcmf_sdbrcm_rxfail(bus, true, true); |
1470 | goto done; | |
1471 | } | |
1472 | ||
1473 | gotpkt: | |
1474 | ||
1e023829 JP |
1475 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(), |
1476 | bus->rxctl, len, "RxCtrl:\n"); | |
5b435de0 AS |
1477 | |
1478 | /* Point to valid data and indicate its length */ | |
1479 | bus->rxctl += doff; | |
1480 | bus->rxlen = len - doff; | |
1481 | ||
1482 | done: | |
1483 | /* Awake any waiters */ | |
1484 | brcmf_sdbrcm_dcmd_resp_wake(bus); | |
1485 | } | |
1486 | ||
1487 | /* Pad read to blocksize for efficiency */ | |
e92eedf4 | 1488 | static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen) |
5b435de0 AS |
1489 | { |
1490 | if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) { | |
1491 | *pad = bus->blocksize - (*rdlen % bus->blocksize); | |
1492 | if (*pad <= bus->roundup && *pad < bus->blocksize && | |
1493 | *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ) | |
1494 | *rdlen += *pad; | |
1495 | } else if (*rdlen % BRCMF_SDALIGN) { | |
1496 | *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN); | |
1497 | } | |
1498 | } | |
1499 | ||
1500 | static void | |
e92eedf4 | 1501 | brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen, |
5b435de0 AS |
1502 | struct sk_buff **pkt, u8 **rxbuf) |
1503 | { | |
1504 | int sdret; /* Return code from calls */ | |
1505 | ||
1506 | *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN); | |
1507 | if (*pkt == NULL) | |
1508 | return; | |
1509 | ||
1510 | pkt_align(*pkt, rdlen, BRCMF_SDALIGN); | |
1511 | *rxbuf = (u8 *) ((*pkt)->data); | |
1512 | /* Read the entire frame */ | |
5adfeb63 AS |
1513 | sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad, |
1514 | SDIO_FUNC_2, F2SYNC, *pkt); | |
80969836 | 1515 | bus->sdcnt.f2rxdata++; |
5b435de0 AS |
1516 | |
1517 | if (sdret < 0) { | |
1518 | brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n", | |
1519 | rdlen, sdret); | |
1520 | brcmu_pkt_buf_free_skb(*pkt); | |
719f2733 | 1521 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1522 | /* Force retry w/normal header read. |
1523 | * Don't attempt NAK for | |
1524 | * gSPI | |
1525 | */ | |
1526 | brcmf_sdbrcm_rxfail(bus, true, true); | |
1527 | *pkt = NULL; | |
1528 | } | |
1529 | } | |
1530 | ||
1531 | /* Checks the header */ | |
1532 | static int | |
e92eedf4 | 1533 | brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf, |
5b435de0 AS |
1534 | u8 rxseq, u16 nextlen, u16 *len) |
1535 | { | |
1536 | u16 check; | |
1537 | bool len_consistent; /* Result of comparing readahead len and | |
1538 | len from hw-hdr */ | |
1539 | ||
1540 | memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN); | |
1541 | ||
1542 | /* Extract hardware header fields */ | |
1543 | *len = get_unaligned_le16(bus->rxhdr); | |
1544 | check = get_unaligned_le16(bus->rxhdr + sizeof(u16)); | |
1545 | ||
1546 | /* All zeros means readahead info was bad */ | |
1547 | if (!(*len | check)) { | |
1548 | brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n"); | |
1549 | goto fail; | |
1550 | } | |
1551 | ||
1552 | /* Validate check bytes */ | |
1553 | if ((u16)~(*len ^ check)) { | |
1554 | brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n", | |
1555 | nextlen, *len, check); | |
80969836 | 1556 | bus->sdcnt.rx_badhdr++; |
5b435de0 AS |
1557 | brcmf_sdbrcm_rxfail(bus, false, false); |
1558 | goto fail; | |
1559 | } | |
1560 | ||
1561 | /* Validate frame length */ | |
1562 | if (*len < SDPCM_HDRLEN) { | |
1563 | brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n", | |
1564 | *len); | |
1565 | goto fail; | |
1566 | } | |
1567 | ||
1568 | /* Check for consistency with readahead info */ | |
1569 | len_consistent = (nextlen != (roundup(*len, 16) >> 4)); | |
1570 | if (len_consistent) { | |
1571 | /* Mismatch, force retry w/normal | |
1572 | header (may be >4K) */ | |
1573 | brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n", | |
1574 | nextlen, *len, roundup(*len, 16), | |
1575 | rxseq); | |
1576 | brcmf_sdbrcm_rxfail(bus, true, true); | |
1577 | goto fail; | |
1578 | } | |
1579 | ||
1580 | return 0; | |
1581 | ||
1582 | fail: | |
1583 | brcmf_sdbrcm_pktfree2(bus, pkt); | |
1584 | return -EINVAL; | |
1585 | } | |
1586 | ||
1587 | /* Return true if there may be more frames to read */ | |
1588 | static uint | |
e92eedf4 | 1589 | brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished) |
5b435de0 AS |
1590 | { |
1591 | u16 len, check; /* Extracted hardware header fields */ | |
1592 | u8 chan, seq, doff; /* Extracted software header fields */ | |
1593 | u8 fcbits; /* Extracted fcbits from software header */ | |
1594 | ||
1595 | struct sk_buff *pkt; /* Packet for event or data frames */ | |
1596 | u16 pad; /* Number of pad bytes to read */ | |
1597 | u16 rdlen; /* Total number of bytes to read */ | |
1598 | u8 rxseq; /* Next sequence number to expect */ | |
1599 | uint rxleft = 0; /* Remaining number of frames allowed */ | |
1600 | int sdret; /* Return code from calls */ | |
1601 | u8 txmax; /* Maximum tx sequence offered */ | |
1602 | u8 *rxbuf; | |
1603 | int ifidx = 0; | |
1604 | uint rxcount = 0; /* Total frames read */ | |
1605 | ||
1606 | brcmf_dbg(TRACE, "Enter\n"); | |
1607 | ||
1608 | /* Not finished unless we encounter no more frames indication */ | |
1609 | *finished = false; | |
1610 | ||
1611 | for (rxseq = bus->rx_seq, rxleft = maxframes; | |
8d169aa0 | 1612 | !bus->rxskip && rxleft && |
712ac5b3 | 1613 | bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN; |
5b435de0 AS |
1614 | rxseq++, rxleft--) { |
1615 | ||
1616 | /* Handle glomming separately */ | |
b83db862 | 1617 | if (bus->glomd || !skb_queue_empty(&bus->glom)) { |
5b435de0 AS |
1618 | u8 cnt; |
1619 | brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n", | |
b83db862 | 1620 | bus->glomd, skb_peek(&bus->glom)); |
5b435de0 AS |
1621 | cnt = brcmf_sdbrcm_rxglom(bus, rxseq); |
1622 | brcmf_dbg(GLOM, "rxglom returned %d\n", cnt); | |
1623 | rxseq += cnt - 1; | |
1624 | rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1; | |
1625 | continue; | |
1626 | } | |
1627 | ||
1628 | /* Try doing single read if we can */ | |
1629 | if (bus->nextlen) { | |
1630 | u16 nextlen = bus->nextlen; | |
1631 | bus->nextlen = 0; | |
1632 | ||
1633 | rdlen = len = nextlen << 4; | |
1634 | brcmf_pad(bus, &pad, &rdlen); | |
1635 | ||
1636 | /* | |
1637 | * After the frame is received we have to | |
1638 | * distinguish whether it is data | |
1639 | * or non-data frame. | |
1640 | */ | |
1641 | brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf); | |
1642 | if (pkt == NULL) { | |
1643 | /* Give up on data, request rtx of events */ | |
1644 | brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n", | |
1645 | len, rdlen, rxseq); | |
1646 | continue; | |
1647 | } | |
1648 | ||
1649 | if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen, | |
1650 | &len) < 0) | |
1651 | continue; | |
1652 | ||
1653 | /* Extract software header fields */ | |
1654 | chan = SDPCM_PACKET_CHANNEL( | |
1655 | &bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1656 | seq = SDPCM_PACKET_SEQUENCE( | |
1657 | &bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1658 | doff = SDPCM_DOFFSET_VALUE( | |
1659 | &bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1660 | txmax = SDPCM_WINDOW_VALUE( | |
1661 | &bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1662 | ||
1663 | bus->nextlen = | |
1664 | bus->rxhdr[SDPCM_FRAMETAG_LEN + | |
1665 | SDPCM_NEXTLEN_OFFSET]; | |
1666 | if ((bus->nextlen << 4) > MAX_RX_DATASZ) { | |
1667 | brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n", | |
1668 | bus->nextlen, seq); | |
1669 | bus->nextlen = 0; | |
1670 | } | |
1671 | ||
80969836 | 1672 | bus->sdcnt.rx_readahead_cnt++; |
5b435de0 AS |
1673 | |
1674 | /* Handle Flow Control */ | |
1675 | fcbits = SDPCM_FCMASK_VALUE( | |
1676 | &bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1677 | ||
1678 | if (bus->flowcontrol != fcbits) { | |
1679 | if (~bus->flowcontrol & fcbits) | |
80969836 | 1680 | bus->sdcnt.fc_xoff++; |
5b435de0 AS |
1681 | |
1682 | if (bus->flowcontrol & ~fcbits) | |
80969836 | 1683 | bus->sdcnt.fc_xon++; |
5b435de0 | 1684 | |
80969836 | 1685 | bus->sdcnt.fc_rcvd++; |
5b435de0 AS |
1686 | bus->flowcontrol = fcbits; |
1687 | } | |
1688 | ||
1689 | /* Check and update sequence number */ | |
1690 | if (rxseq != seq) { | |
1691 | brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n", | |
1692 | seq, rxseq); | |
80969836 | 1693 | bus->sdcnt.rx_badseq++; |
5b435de0 AS |
1694 | rxseq = seq; |
1695 | } | |
1696 | ||
1697 | /* Check window for sanity */ | |
1698 | if ((u8) (txmax - bus->tx_seq) > 0x40) { | |
1699 | brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n", | |
1700 | txmax, bus->tx_seq); | |
1701 | txmax = bus->tx_seq + 2; | |
1702 | } | |
1703 | bus->tx_max = txmax; | |
1704 | ||
1e023829 JP |
1705 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(), |
1706 | rxbuf, len, "Rx Data:\n"); | |
1707 | brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && | |
1708 | BRCMF_DATA_ON()) && | |
1709 | BRCMF_HDRS_ON(), | |
1710 | bus->rxhdr, SDPCM_HDRLEN, | |
1711 | "RxHdr:\n"); | |
5b435de0 AS |
1712 | |
1713 | if (chan == SDPCM_CONTROL_CHANNEL) { | |
1714 | brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n", | |
1715 | seq); | |
1716 | /* Force retry w/normal header read */ | |
1717 | bus->nextlen = 0; | |
1718 | brcmf_sdbrcm_rxfail(bus, false, true); | |
1719 | brcmf_sdbrcm_pktfree2(bus, pkt); | |
1720 | continue; | |
1721 | } | |
1722 | ||
1723 | /* Validate data offset */ | |
1724 | if ((doff < SDPCM_HDRLEN) || (doff > len)) { | |
1725 | brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n", | |
1726 | doff, len, SDPCM_HDRLEN); | |
1727 | brcmf_sdbrcm_rxfail(bus, false, false); | |
1728 | brcmf_sdbrcm_pktfree2(bus, pkt); | |
1729 | continue; | |
1730 | } | |
1731 | ||
1732 | /* All done with this one -- now deliver the packet */ | |
1733 | goto deliver; | |
1734 | } | |
1735 | ||
1736 | /* Read frame header (hardware and software) */ | |
1737 | sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad, | |
1738 | SDIO_FUNC_2, F2SYNC, bus->rxhdr, | |
5adfeb63 | 1739 | BRCMF_FIRSTREAD); |
80969836 | 1740 | bus->sdcnt.f2rxhdrs++; |
5b435de0 AS |
1741 | |
1742 | if (sdret < 0) { | |
1743 | brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret); | |
80969836 | 1744 | bus->sdcnt.rx_hdrfail++; |
5b435de0 AS |
1745 | brcmf_sdbrcm_rxfail(bus, true, true); |
1746 | continue; | |
1747 | } | |
1e023829 JP |
1748 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(), |
1749 | bus->rxhdr, SDPCM_HDRLEN, "RxHdr:\n"); | |
1750 | ||
5b435de0 AS |
1751 | |
1752 | /* Extract hardware header fields */ | |
1753 | len = get_unaligned_le16(bus->rxhdr); | |
1754 | check = get_unaligned_le16(bus->rxhdr + sizeof(u16)); | |
1755 | ||
1756 | /* All zeros means no more frames */ | |
1757 | if (!(len | check)) { | |
1758 | *finished = true; | |
1759 | break; | |
1760 | } | |
1761 | ||
1762 | /* Validate check bytes */ | |
1763 | if ((u16) ~(len ^ check)) { | |
1764 | brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n", | |
1765 | len, check); | |
80969836 | 1766 | bus->sdcnt.rx_badhdr++; |
5b435de0 AS |
1767 | brcmf_sdbrcm_rxfail(bus, false, false); |
1768 | continue; | |
1769 | } | |
1770 | ||
1771 | /* Validate frame length */ | |
1772 | if (len < SDPCM_HDRLEN) { | |
1773 | brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len); | |
1774 | continue; | |
1775 | } | |
1776 | ||
1777 | /* Extract software header fields */ | |
1778 | chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1779 | seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1780 | doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1781 | txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1782 | ||
1783 | /* Validate data offset */ | |
1784 | if ((doff < SDPCM_HDRLEN) || (doff > len)) { | |
1785 | brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n", | |
1786 | doff, len, SDPCM_HDRLEN, seq); | |
80969836 | 1787 | bus->sdcnt.rx_badhdr++; |
5b435de0 AS |
1788 | brcmf_sdbrcm_rxfail(bus, false, false); |
1789 | continue; | |
1790 | } | |
1791 | ||
1792 | /* Save the readahead length if there is one */ | |
1793 | bus->nextlen = | |
1794 | bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET]; | |
1795 | if ((bus->nextlen << 4) > MAX_RX_DATASZ) { | |
1796 | brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n", | |
1797 | bus->nextlen, seq); | |
1798 | bus->nextlen = 0; | |
1799 | } | |
1800 | ||
1801 | /* Handle Flow Control */ | |
1802 | fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]); | |
1803 | ||
1804 | if (bus->flowcontrol != fcbits) { | |
1805 | if (~bus->flowcontrol & fcbits) | |
80969836 | 1806 | bus->sdcnt.fc_xoff++; |
5b435de0 AS |
1807 | |
1808 | if (bus->flowcontrol & ~fcbits) | |
80969836 | 1809 | bus->sdcnt.fc_xon++; |
5b435de0 | 1810 | |
80969836 | 1811 | bus->sdcnt.fc_rcvd++; |
5b435de0 AS |
1812 | bus->flowcontrol = fcbits; |
1813 | } | |
1814 | ||
1815 | /* Check and update sequence number */ | |
1816 | if (rxseq != seq) { | |
1817 | brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq); | |
80969836 | 1818 | bus->sdcnt.rx_badseq++; |
5b435de0 AS |
1819 | rxseq = seq; |
1820 | } | |
1821 | ||
1822 | /* Check window for sanity */ | |
1823 | if ((u8) (txmax - bus->tx_seq) > 0x40) { | |
1824 | brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n", | |
1825 | txmax, bus->tx_seq); | |
1826 | txmax = bus->tx_seq + 2; | |
1827 | } | |
1828 | bus->tx_max = txmax; | |
1829 | ||
1830 | /* Call a separate function for control frames */ | |
1831 | if (chan == SDPCM_CONTROL_CHANNEL) { | |
1832 | brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff); | |
1833 | continue; | |
1834 | } | |
1835 | ||
1836 | /* precondition: chan is either SDPCM_DATA_CHANNEL, | |
1837 | SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or | |
1838 | SDPCM_GLOM_CHANNEL */ | |
1839 | ||
1840 | /* Length to read */ | |
1841 | rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0; | |
1842 | ||
1843 | /* May pad read to blocksize for efficiency */ | |
1844 | if (bus->roundup && bus->blocksize && | |
1845 | (rdlen > bus->blocksize)) { | |
1846 | pad = bus->blocksize - (rdlen % bus->blocksize); | |
1847 | if ((pad <= bus->roundup) && (pad < bus->blocksize) && | |
1848 | ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ)) | |
1849 | rdlen += pad; | |
1850 | } else if (rdlen % BRCMF_SDALIGN) { | |
1851 | rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN); | |
1852 | } | |
1853 | ||
1854 | /* Satisfy length-alignment requirements */ | |
1855 | if (rdlen & (ALIGNMENT - 1)) | |
1856 | rdlen = roundup(rdlen, ALIGNMENT); | |
1857 | ||
1858 | if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) { | |
1859 | /* Too long -- skip this frame */ | |
1860 | brcmf_dbg(ERROR, "too long: len %d rdlen %d\n", | |
1861 | len, rdlen); | |
719f2733 | 1862 | bus->sdiodev->bus_if->dstats.rx_errors++; |
80969836 | 1863 | bus->sdcnt.rx_toolong++; |
5b435de0 AS |
1864 | brcmf_sdbrcm_rxfail(bus, false, false); |
1865 | continue; | |
1866 | } | |
1867 | ||
1868 | pkt = brcmu_pkt_buf_get_skb(rdlen + | |
1869 | BRCMF_FIRSTREAD + BRCMF_SDALIGN); | |
1870 | if (!pkt) { | |
1871 | /* Give up on data, request rtx of events */ | |
1872 | brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n", | |
1873 | rdlen, chan); | |
719f2733 | 1874 | bus->sdiodev->bus_if->dstats.rx_dropped++; |
5b435de0 AS |
1875 | brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan)); |
1876 | continue; | |
1877 | } | |
1878 | ||
1879 | /* Leave room for what we already read, and align remainder */ | |
1880 | skb_pull(pkt, BRCMF_FIRSTREAD); | |
1881 | pkt_align(pkt, rdlen, BRCMF_SDALIGN); | |
1882 | ||
1883 | /* Read the remaining frame data */ | |
5adfeb63 AS |
1884 | sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad, |
1885 | SDIO_FUNC_2, F2SYNC, pkt); | |
80969836 | 1886 | bus->sdcnt.f2rxdata++; |
5b435de0 AS |
1887 | |
1888 | if (sdret < 0) { | |
1889 | brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen, | |
1890 | ((chan == SDPCM_EVENT_CHANNEL) ? "event" | |
1891 | : ((chan == SDPCM_DATA_CHANNEL) ? "data" | |
1892 | : "test")), sdret); | |
1893 | brcmu_pkt_buf_free_skb(pkt); | |
719f2733 | 1894 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1895 | brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan)); |
1896 | continue; | |
1897 | } | |
1898 | ||
1899 | /* Copy the already-read portion */ | |
1900 | skb_push(pkt, BRCMF_FIRSTREAD); | |
1901 | memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD); | |
1902 | ||
1e023829 JP |
1903 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(), |
1904 | pkt->data, len, "Rx Data:\n"); | |
5b435de0 AS |
1905 | |
1906 | deliver: | |
1907 | /* Save superframe descriptor and allocate packet frame */ | |
1908 | if (chan == SDPCM_GLOM_CHANNEL) { | |
1909 | if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) { | |
1910 | brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n", | |
1911 | len); | |
1e023829 JP |
1912 | brcmf_dbg_hex_dump(BRCMF_GLOM_ON(), |
1913 | pkt->data, len, | |
1914 | "Glom Data:\n"); | |
5b435de0 AS |
1915 | __skb_trim(pkt, len); |
1916 | skb_pull(pkt, SDPCM_HDRLEN); | |
1917 | bus->glomd = pkt; | |
1918 | } else { | |
1919 | brcmf_dbg(ERROR, "%s: glom superframe w/o " | |
1920 | "descriptor!\n", __func__); | |
1921 | brcmf_sdbrcm_rxfail(bus, false, false); | |
1922 | } | |
1923 | continue; | |
1924 | } | |
1925 | ||
1926 | /* Fill in packet len and prio, deliver upward */ | |
1927 | __skb_trim(pkt, len); | |
1928 | skb_pull(pkt, doff); | |
1929 | ||
1930 | if (pkt->len == 0) { | |
1931 | brcmu_pkt_buf_free_skb(pkt); | |
1932 | continue; | |
d5625ee6 FL |
1933 | } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx, |
1934 | pkt) != 0) { | |
5b435de0 AS |
1935 | brcmf_dbg(ERROR, "rx protocol error\n"); |
1936 | brcmu_pkt_buf_free_skb(pkt); | |
719f2733 | 1937 | bus->sdiodev->bus_if->dstats.rx_errors++; |
5b435de0 AS |
1938 | continue; |
1939 | } | |
1940 | ||
1941 | /* Unlock during rx call */ | |
1942 | up(&bus->sdsem); | |
228bb43d | 1943 | brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt); |
5b435de0 AS |
1944 | down(&bus->sdsem); |
1945 | } | |
1946 | rxcount = maxframes - rxleft; | |
5b435de0 AS |
1947 | /* Message if we hit the limit */ |
1948 | if (!rxleft) | |
1949 | brcmf_dbg(DATA, "hit rx limit of %d frames\n", | |
1950 | maxframes); | |
1951 | else | |
5b435de0 AS |
1952 | brcmf_dbg(DATA, "processed %d frames\n", rxcount); |
1953 | /* Back off rxseq if awaiting rtx, update rx_seq */ | |
1954 | if (bus->rxskip) | |
1955 | rxseq--; | |
1956 | bus->rx_seq = rxseq; | |
1957 | ||
1958 | return rxcount; | |
1959 | } | |
1960 | ||
5b435de0 | 1961 | static void |
e92eedf4 | 1962 | brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar) |
5b435de0 AS |
1963 | { |
1964 | up(&bus->sdsem); | |
23677ce3 | 1965 | wait_event_interruptible_timeout(bus->ctrl_wait, !*lockvar, HZ * 2); |
5b435de0 AS |
1966 | down(&bus->sdsem); |
1967 | return; | |
1968 | } | |
1969 | ||
1970 | static void | |
e92eedf4 | 1971 | brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus) |
5b435de0 AS |
1972 | { |
1973 | if (waitqueue_active(&bus->ctrl_wait)) | |
1974 | wake_up_interruptible(&bus->ctrl_wait); | |
1975 | return; | |
1976 | } | |
1977 | ||
1978 | /* Writes a HW/SW header into the packet and sends it. */ | |
1979 | /* Assumes: (a) header space already there, (b) caller holds lock */ | |
e92eedf4 | 1980 | static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt, |
5b435de0 AS |
1981 | uint chan, bool free_pkt) |
1982 | { | |
1983 | int ret; | |
1984 | u8 *frame; | |
1985 | u16 len, pad = 0; | |
1986 | u32 swheader; | |
1987 | struct sk_buff *new; | |
1988 | int i; | |
1989 | ||
1990 | brcmf_dbg(TRACE, "Enter\n"); | |
1991 | ||
1992 | frame = (u8 *) (pkt->data); | |
1993 | ||
1994 | /* Add alignment padding, allocate new packet if needed */ | |
1995 | pad = ((unsigned long)frame % BRCMF_SDALIGN); | |
1996 | if (pad) { | |
1997 | if (skb_headroom(pkt) < pad) { | |
1998 | brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n", | |
1999 | skb_headroom(pkt), pad); | |
9c1a043a | 2000 | bus->sdiodev->bus_if->tx_realloc++; |
5b435de0 AS |
2001 | new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN); |
2002 | if (!new) { | |
2003 | brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n", | |
2004 | pkt->len + BRCMF_SDALIGN); | |
2005 | ret = -ENOMEM; | |
2006 | goto done; | |
2007 | } | |
2008 | ||
2009 | pkt_align(new, pkt->len, BRCMF_SDALIGN); | |
2010 | memcpy(new->data, pkt->data, pkt->len); | |
2011 | if (free_pkt) | |
2012 | brcmu_pkt_buf_free_skb(pkt); | |
2013 | /* free the pkt if canned one is not used */ | |
2014 | free_pkt = true; | |
2015 | pkt = new; | |
2016 | frame = (u8 *) (pkt->data); | |
2017 | /* precondition: (frame % BRCMF_SDALIGN) == 0) */ | |
2018 | pad = 0; | |
2019 | } else { | |
2020 | skb_push(pkt, pad); | |
2021 | frame = (u8 *) (pkt->data); | |
2022 | /* precondition: pad + SDPCM_HDRLEN <= pkt->len */ | |
2023 | memset(frame, 0, pad + SDPCM_HDRLEN); | |
2024 | } | |
2025 | } | |
2026 | /* precondition: pad < BRCMF_SDALIGN */ | |
2027 | ||
2028 | /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */ | |
2029 | len = (u16) (pkt->len); | |
2030 | *(__le16 *) frame = cpu_to_le16(len); | |
2031 | *(((__le16 *) frame) + 1) = cpu_to_le16(~len); | |
2032 | ||
2033 | /* Software tag: channel, sequence number, data offset */ | |
2034 | swheader = | |
2035 | ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq | | |
2036 | (((pad + | |
2037 | SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK); | |
2038 | ||
2039 | put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN); | |
2040 | put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader)); | |
2041 | ||
8ae74654 | 2042 | #ifdef DEBUG |
5b435de0 | 2043 | tx_packets[pkt->priority]++; |
18aad4f8 | 2044 | #endif |
1e023829 JP |
2045 | |
2046 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && | |
2047 | ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) || | |
2048 | (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)), | |
2049 | frame, len, "Tx Frame:\n"); | |
2050 | brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && | |
2051 | ((BRCMF_CTL_ON() && | |
2052 | chan == SDPCM_CONTROL_CHANNEL) || | |
2053 | (BRCMF_DATA_ON() && | |
2054 | chan != SDPCM_CONTROL_CHANNEL))) && | |
2055 | BRCMF_HDRS_ON(), | |
2056 | frame, min_t(u16, len, 16), "TxHdr:\n"); | |
5b435de0 AS |
2057 | |
2058 | /* Raise len to next SDIO block to eliminate tail command */ | |
2059 | if (bus->roundup && bus->blocksize && (len > bus->blocksize)) { | |
2060 | u16 pad = bus->blocksize - (len % bus->blocksize); | |
2061 | if ((pad <= bus->roundup) && (pad < bus->blocksize)) | |
2062 | len += pad; | |
2063 | } else if (len % BRCMF_SDALIGN) { | |
2064 | len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN); | |
2065 | } | |
2066 | ||
2067 | /* Some controllers have trouble with odd bytes -- round to even */ | |
2068 | if (len & (ALIGNMENT - 1)) | |
2069 | len = roundup(len, ALIGNMENT); | |
2070 | ||
5adfeb63 AS |
2071 | ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad, |
2072 | SDIO_FUNC_2, F2SYNC, pkt); | |
80969836 | 2073 | bus->sdcnt.f2txdata++; |
5b435de0 AS |
2074 | |
2075 | if (ret < 0) { | |
2076 | /* On failure, abort the command and terminate the frame */ | |
2077 | brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n", | |
2078 | ret); | |
80969836 | 2079 | bus->sdcnt.tx_sderrs++; |
5b435de0 AS |
2080 | |
2081 | brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); | |
3bba829f FL |
2082 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, |
2083 | SFC_WF_TERM, NULL); | |
80969836 | 2084 | bus->sdcnt.f1regdata++; |
5b435de0 AS |
2085 | |
2086 | for (i = 0; i < 3; i++) { | |
2087 | u8 hi, lo; | |
45db339c FL |
2088 | hi = brcmf_sdio_regrb(bus->sdiodev, |
2089 | SBSDIO_FUNC1_WFRAMEBCHI, NULL); | |
2090 | lo = brcmf_sdio_regrb(bus->sdiodev, | |
2091 | SBSDIO_FUNC1_WFRAMEBCLO, NULL); | |
80969836 | 2092 | bus->sdcnt.f1regdata += 2; |
5b435de0 AS |
2093 | if ((hi == 0) && (lo == 0)) |
2094 | break; | |
2095 | } | |
2096 | ||
2097 | } | |
2098 | if (ret == 0) | |
2099 | bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP; | |
2100 | ||
2101 | done: | |
2102 | /* restore pkt buffer pointer before calling tx complete routine */ | |
2103 | skb_pull(pkt, SDPCM_HDRLEN + pad); | |
2104 | up(&bus->sdsem); | |
c995788f | 2105 | brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0); |
5b435de0 AS |
2106 | down(&bus->sdsem); |
2107 | ||
2108 | if (free_pkt) | |
2109 | brcmu_pkt_buf_free_skb(pkt); | |
2110 | ||
2111 | return ret; | |
2112 | } | |
2113 | ||
e92eedf4 | 2114 | static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes) |
5b435de0 AS |
2115 | { |
2116 | struct sk_buff *pkt; | |
2117 | u32 intstatus = 0; | |
5b435de0 AS |
2118 | int ret = 0, prec_out; |
2119 | uint cnt = 0; | |
2120 | uint datalen; | |
2121 | u8 tx_prec_map; | |
2122 | ||
5b435de0 AS |
2123 | brcmf_dbg(TRACE, "Enter\n"); |
2124 | ||
2125 | tx_prec_map = ~bus->flowcontrol; | |
2126 | ||
2127 | /* Send frames until the limit or some other event */ | |
2128 | for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) { | |
2129 | spin_lock_bh(&bus->txqlock); | |
2130 | pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out); | |
2131 | if (pkt == NULL) { | |
2132 | spin_unlock_bh(&bus->txqlock); | |
2133 | break; | |
2134 | } | |
2135 | spin_unlock_bh(&bus->txqlock); | |
2136 | datalen = pkt->len - SDPCM_HDRLEN; | |
2137 | ||
2138 | ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true); | |
2139 | if (ret) | |
719f2733 | 2140 | bus->sdiodev->bus_if->dstats.tx_errors++; |
5b435de0 | 2141 | else |
719f2733 | 2142 | bus->sdiodev->bus_if->dstats.tx_bytes += datalen; |
5b435de0 AS |
2143 | |
2144 | /* In poll mode, need to check for other events */ | |
2145 | if (!bus->intr && cnt) { | |
2146 | /* Check device status, signal pending interrupt */ | |
5c15c23a FL |
2147 | ret = r_sdreg32(bus, &intstatus, |
2148 | offsetof(struct sdpcmd_regs, | |
2149 | intstatus)); | |
80969836 | 2150 | bus->sdcnt.f2txdata++; |
5c15c23a | 2151 | if (ret != 0) |
5b435de0 AS |
2152 | break; |
2153 | if (intstatus & bus->hostintmask) | |
2154 | bus->ipend = true; | |
2155 | } | |
2156 | } | |
2157 | ||
2158 | /* Deflow-control stack if needed */ | |
712ac5b3 FL |
2159 | if (bus->sdiodev->bus_if->drvr_up && |
2160 | (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) && | |
c8bf3484 | 2161 | bus->txoff && (pktq_len(&bus->txq) < TXLOW)) { |
90d03ff7 HM |
2162 | bus->txoff = false; |
2163 | brcmf_txflowblock(bus->sdiodev->dev, false); | |
c8bf3484 | 2164 | } |
5b435de0 AS |
2165 | |
2166 | return cnt; | |
2167 | } | |
2168 | ||
a9ffda88 FL |
2169 | static void brcmf_sdbrcm_bus_stop(struct device *dev) |
2170 | { | |
2171 | u32 local_hostintmask; | |
2172 | u8 saveclk; | |
a9ffda88 FL |
2173 | int err; |
2174 | struct brcmf_bus *bus_if = dev_get_drvdata(dev); | |
0a332e46 | 2175 | struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio; |
a9ffda88 FL |
2176 | struct brcmf_sdio *bus = sdiodev->bus; |
2177 | ||
2178 | brcmf_dbg(TRACE, "Enter\n"); | |
2179 | ||
2180 | if (bus->watchdog_tsk) { | |
2181 | send_sig(SIGTERM, bus->watchdog_tsk, 1); | |
2182 | kthread_stop(bus->watchdog_tsk); | |
2183 | bus->watchdog_tsk = NULL; | |
2184 | } | |
2185 | ||
2186 | if (bus->dpc_tsk && bus->dpc_tsk != current) { | |
2187 | send_sig(SIGTERM, bus->dpc_tsk, 1); | |
2188 | kthread_stop(bus->dpc_tsk); | |
2189 | bus->dpc_tsk = NULL; | |
2190 | } | |
2191 | ||
2192 | down(&bus->sdsem); | |
2193 | ||
a9ffda88 FL |
2194 | /* Enable clock for device interrupts */ |
2195 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
2196 | ||
2197 | /* Disable and clear interrupts at the chip level also */ | |
58692750 | 2198 | w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask)); |
a9ffda88 FL |
2199 | local_hostintmask = bus->hostintmask; |
2200 | bus->hostintmask = 0; | |
2201 | ||
2202 | /* Change our idea of bus state */ | |
2203 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; | |
2204 | ||
2205 | /* Force clocks on backplane to be sure F2 interrupt propagates */ | |
45db339c FL |
2206 | saveclk = brcmf_sdio_regrb(bus->sdiodev, |
2207 | SBSDIO_FUNC1_CHIPCLKCSR, &err); | |
a9ffda88 | 2208 | if (!err) { |
3bba829f FL |
2209 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, |
2210 | (saveclk | SBSDIO_FORCE_HT), &err); | |
a9ffda88 FL |
2211 | } |
2212 | if (err) | |
2213 | brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err); | |
2214 | ||
2215 | /* Turn off the bus (F2), free any pending packets */ | |
2216 | brcmf_dbg(INTR, "disable SDIO interrupts\n"); | |
3bba829f FL |
2217 | brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1, |
2218 | NULL); | |
a9ffda88 FL |
2219 | |
2220 | /* Clear any pending interrupts now that F2 is disabled */ | |
2221 | w_sdreg32(bus, local_hostintmask, | |
58692750 | 2222 | offsetof(struct sdpcmd_regs, intstatus)); |
a9ffda88 FL |
2223 | |
2224 | /* Turn off the backplane clock (only) */ | |
2225 | brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); | |
2226 | ||
2227 | /* Clear the data packet queues */ | |
2228 | brcmu_pktq_flush(&bus->txq, true, NULL, NULL); | |
2229 | ||
2230 | /* Clear any held glomming stuff */ | |
2231 | if (bus->glomd) | |
2232 | brcmu_pkt_buf_free_skb(bus->glomd); | |
2233 | brcmf_sdbrcm_free_glom(bus); | |
2234 | ||
2235 | /* Clear rx control and wake any waiters */ | |
2236 | bus->rxlen = 0; | |
2237 | brcmf_sdbrcm_dcmd_resp_wake(bus); | |
2238 | ||
2239 | /* Reset some F2 state stuff */ | |
2240 | bus->rxskip = false; | |
2241 | bus->tx_seq = bus->rx_seq = 0; | |
2242 | ||
2243 | up(&bus->sdsem); | |
2244 | } | |
2245 | ||
ba89bf19 FL |
2246 | #ifdef CONFIG_BRCMFMAC_SDIO_OOB |
2247 | static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus) | |
2248 | { | |
2249 | unsigned long flags; | |
2250 | ||
2251 | spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags); | |
2252 | if (!bus->sdiodev->irq_en && !bus->ipend) { | |
2253 | enable_irq(bus->sdiodev->irq); | |
2254 | bus->sdiodev->irq_en = true; | |
2255 | } | |
2256 | spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags); | |
2257 | } | |
2258 | #else | |
2259 | static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus) | |
2260 | { | |
2261 | } | |
2262 | #endif /* CONFIG_BRCMFMAC_SDIO_OOB */ | |
2263 | ||
e92eedf4 | 2264 | static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus) |
5b435de0 AS |
2265 | { |
2266 | u32 intstatus, newstatus = 0; | |
5b435de0 AS |
2267 | uint rxlimit = bus->rxbound; /* Rx frames to read before resched */ |
2268 | uint txlimit = bus->txbound; /* Tx frames to send before resched */ | |
2269 | uint framecnt = 0; /* Temporary counter of tx/rx frames */ | |
2270 | bool rxdone = true; /* Flag for no more read data */ | |
2271 | bool resched = false; /* Flag indicating resched wanted */ | |
5c15c23a | 2272 | int err; |
5b435de0 AS |
2273 | |
2274 | brcmf_dbg(TRACE, "Enter\n"); | |
2275 | ||
2276 | /* Start with leftover status bits */ | |
2277 | intstatus = bus->intstatus; | |
2278 | ||
2279 | down(&bus->sdsem); | |
2280 | ||
2281 | /* If waiting for HTAVAIL, check status */ | |
2282 | if (bus->clkstate == CLK_PENDING) { | |
5b435de0 AS |
2283 | u8 clkctl, devctl = 0; |
2284 | ||
8ae74654 | 2285 | #ifdef DEBUG |
5b435de0 | 2286 | /* Check for inconsistent device control */ |
45db339c FL |
2287 | devctl = brcmf_sdio_regrb(bus->sdiodev, |
2288 | SBSDIO_DEVICE_CTL, &err); | |
5b435de0 AS |
2289 | if (err) { |
2290 | brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err); | |
712ac5b3 | 2291 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 | 2292 | } |
8ae74654 | 2293 | #endif /* DEBUG */ |
5b435de0 AS |
2294 | |
2295 | /* Read CSR, if clock on switch to AVAIL, else ignore */ | |
45db339c FL |
2296 | clkctl = brcmf_sdio_regrb(bus->sdiodev, |
2297 | SBSDIO_FUNC1_CHIPCLKCSR, &err); | |
5b435de0 AS |
2298 | if (err) { |
2299 | brcmf_dbg(ERROR, "error reading CSR: %d\n", | |
2300 | err); | |
712ac5b3 | 2301 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
2302 | } |
2303 | ||
2304 | brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n", | |
2305 | devctl, clkctl); | |
2306 | ||
2307 | if (SBSDIO_HTAV(clkctl)) { | |
45db339c FL |
2308 | devctl = brcmf_sdio_regrb(bus->sdiodev, |
2309 | SBSDIO_DEVICE_CTL, &err); | |
5b435de0 AS |
2310 | if (err) { |
2311 | brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", | |
2312 | err); | |
712ac5b3 | 2313 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
2314 | } |
2315 | devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; | |
3bba829f FL |
2316 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL, |
2317 | devctl, &err); | |
5b435de0 AS |
2318 | if (err) { |
2319 | brcmf_dbg(ERROR, "error writing DEVCTL: %d\n", | |
2320 | err); | |
712ac5b3 | 2321 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
2322 | } |
2323 | bus->clkstate = CLK_AVAIL; | |
2324 | } else { | |
2325 | goto clkwait; | |
2326 | } | |
2327 | } | |
2328 | ||
5b435de0 AS |
2329 | /* Make sure backplane clock is on */ |
2330 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true); | |
2331 | if (bus->clkstate == CLK_PENDING) | |
2332 | goto clkwait; | |
2333 | ||
2334 | /* Pending interrupt indicates new device status */ | |
2335 | if (bus->ipend) { | |
2336 | bus->ipend = false; | |
5c15c23a FL |
2337 | err = r_sdreg32(bus, &newstatus, |
2338 | offsetof(struct sdpcmd_regs, intstatus)); | |
80969836 | 2339 | bus->sdcnt.f1regdata++; |
5c15c23a | 2340 | if (err != 0) |
5b435de0 AS |
2341 | newstatus = 0; |
2342 | newstatus &= bus->hostintmask; | |
2343 | bus->fcstate = !!(newstatus & I_HMB_FC_STATE); | |
2344 | if (newstatus) { | |
5c15c23a FL |
2345 | err = w_sdreg32(bus, newstatus, |
2346 | offsetof(struct sdpcmd_regs, | |
2347 | intstatus)); | |
80969836 | 2348 | bus->sdcnt.f1regdata++; |
5b435de0 AS |
2349 | } |
2350 | } | |
2351 | ||
2352 | /* Merge new bits with previous */ | |
2353 | intstatus |= newstatus; | |
2354 | bus->intstatus = 0; | |
2355 | ||
2356 | /* Handle flow-control change: read new state in case our ack | |
2357 | * crossed another change interrupt. If change still set, assume | |
2358 | * FC ON for safety, let next loop through do the debounce. | |
2359 | */ | |
2360 | if (intstatus & I_HMB_FC_CHANGE) { | |
2361 | intstatus &= ~I_HMB_FC_CHANGE; | |
5c15c23a FL |
2362 | err = w_sdreg32(bus, I_HMB_FC_CHANGE, |
2363 | offsetof(struct sdpcmd_regs, intstatus)); | |
5b435de0 | 2364 | |
5c15c23a FL |
2365 | err = r_sdreg32(bus, &newstatus, |
2366 | offsetof(struct sdpcmd_regs, intstatus)); | |
80969836 | 2367 | bus->sdcnt.f1regdata += 2; |
5b435de0 AS |
2368 | bus->fcstate = |
2369 | !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)); | |
2370 | intstatus |= (newstatus & bus->hostintmask); | |
2371 | } | |
2372 | ||
2373 | /* Handle host mailbox indication */ | |
2374 | if (intstatus & I_HMB_HOST_INT) { | |
2375 | intstatus &= ~I_HMB_HOST_INT; | |
2376 | intstatus |= brcmf_sdbrcm_hostmail(bus); | |
2377 | } | |
2378 | ||
2379 | /* Generally don't ask for these, can get CRC errors... */ | |
2380 | if (intstatus & I_WR_OOSYNC) { | |
2381 | brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n"); | |
2382 | intstatus &= ~I_WR_OOSYNC; | |
2383 | } | |
2384 | ||
2385 | if (intstatus & I_RD_OOSYNC) { | |
2386 | brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n"); | |
2387 | intstatus &= ~I_RD_OOSYNC; | |
2388 | } | |
2389 | ||
2390 | if (intstatus & I_SBINT) { | |
2391 | brcmf_dbg(ERROR, "Dongle reports SBINT\n"); | |
2392 | intstatus &= ~I_SBINT; | |
2393 | } | |
2394 | ||
2395 | /* Would be active due to wake-wlan in gSPI */ | |
2396 | if (intstatus & I_CHIPACTIVE) { | |
2397 | brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n"); | |
2398 | intstatus &= ~I_CHIPACTIVE; | |
2399 | } | |
2400 | ||
2401 | /* Ignore frame indications if rxskip is set */ | |
2402 | if (bus->rxskip) | |
2403 | intstatus &= ~I_HMB_FRAME_IND; | |
2404 | ||
2405 | /* On frame indication, read available frames */ | |
2406 | if (PKT_AVAILABLE()) { | |
2407 | framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone); | |
2408 | if (rxdone || bus->rxskip) | |
2409 | intstatus &= ~I_HMB_FRAME_IND; | |
2410 | rxlimit -= min(framecnt, rxlimit); | |
2411 | } | |
2412 | ||
2413 | /* Keep still-pending events for next scheduling */ | |
2414 | bus->intstatus = intstatus; | |
2415 | ||
2416 | clkwait: | |
ba89bf19 FL |
2417 | brcmf_sdbrcm_clrintr(bus); |
2418 | ||
5b435de0 AS |
2419 | if (data_ok(bus) && bus->ctrl_frame_stat && |
2420 | (bus->clkstate == CLK_AVAIL)) { | |
2421 | int ret, i; | |
2422 | ||
5adfeb63 | 2423 | ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad, |
2c208890 | 2424 | SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf, |
5adfeb63 | 2425 | (u32) bus->ctrl_frame_len); |
5b435de0 AS |
2426 | |
2427 | if (ret < 0) { | |
2428 | /* On failure, abort the command and | |
2429 | terminate the frame */ | |
2430 | brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n", | |
2431 | ret); | |
80969836 | 2432 | bus->sdcnt.tx_sderrs++; |
5b435de0 AS |
2433 | |
2434 | brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); | |
2435 | ||
3bba829f | 2436 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, |
5c15c23a | 2437 | SFC_WF_TERM, &err); |
80969836 | 2438 | bus->sdcnt.f1regdata++; |
5b435de0 AS |
2439 | |
2440 | for (i = 0; i < 3; i++) { | |
2441 | u8 hi, lo; | |
45db339c FL |
2442 | hi = brcmf_sdio_regrb(bus->sdiodev, |
2443 | SBSDIO_FUNC1_WFRAMEBCHI, | |
5c15c23a | 2444 | &err); |
45db339c FL |
2445 | lo = brcmf_sdio_regrb(bus->sdiodev, |
2446 | SBSDIO_FUNC1_WFRAMEBCLO, | |
5c15c23a | 2447 | &err); |
80969836 | 2448 | bus->sdcnt.f1regdata += 2; |
5b435de0 AS |
2449 | if ((hi == 0) && (lo == 0)) |
2450 | break; | |
2451 | } | |
2452 | ||
2453 | } | |
2454 | if (ret == 0) | |
2455 | bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP; | |
2456 | ||
2457 | brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret); | |
2458 | bus->ctrl_frame_stat = false; | |
2459 | brcmf_sdbrcm_wait_event_wakeup(bus); | |
2460 | } | |
2461 | /* Send queued frames (limit 1 if rx may still be pending) */ | |
2462 | else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate && | |
2463 | brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit | |
2464 | && data_ok(bus)) { | |
2465 | framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax); | |
2466 | framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt); | |
2467 | txlimit -= framecnt; | |
2468 | } | |
2469 | ||
2470 | /* Resched if events or tx frames are pending, | |
2471 | else await next interrupt */ | |
2472 | /* On failed register access, all bets are off: | |
2473 | no resched or interrupts */ | |
5c15c23a FL |
2474 | if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) { |
2475 | brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation\n"); | |
712ac5b3 | 2476 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
2477 | bus->intstatus = 0; |
2478 | } else if (bus->clkstate == CLK_PENDING) { | |
2479 | brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n"); | |
2480 | resched = true; | |
2481 | } else if (bus->intstatus || bus->ipend || | |
2482 | (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) | |
2483 | && data_ok(bus)) || PKT_AVAILABLE()) { | |
2484 | resched = true; | |
2485 | } | |
2486 | ||
2487 | bus->dpc_sched = resched; | |
2488 | ||
2489 | /* If we're done for now, turn off clock request. */ | |
2490 | if ((bus->clkstate != CLK_PENDING) | |
2491 | && bus->idletime == BRCMF_IDLE_IMMEDIATE) { | |
2492 | bus->activity = false; | |
2493 | brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); | |
2494 | } | |
2495 | ||
2496 | up(&bus->sdsem); | |
2497 | ||
2498 | return resched; | |
2499 | } | |
2500 | ||
b948a85c FL |
2501 | static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus) |
2502 | { | |
2503 | struct list_head *new_hd; | |
2504 | unsigned long flags; | |
2505 | ||
2506 | if (in_interrupt()) | |
2507 | new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC); | |
2508 | else | |
2509 | new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL); | |
2510 | if (new_hd == NULL) | |
2511 | return; | |
2512 | ||
2513 | spin_lock_irqsave(&bus->dpc_tl_lock, flags); | |
2514 | list_add_tail(new_hd, &bus->dpc_tsklst); | |
2515 | spin_unlock_irqrestore(&bus->dpc_tl_lock, flags); | |
2516 | } | |
2517 | ||
5b435de0 AS |
2518 | static int brcmf_sdbrcm_dpc_thread(void *data) |
2519 | { | |
e92eedf4 | 2520 | struct brcmf_sdio *bus = (struct brcmf_sdio *) data; |
b948a85c FL |
2521 | struct list_head *cur_hd, *tmp_hd; |
2522 | unsigned long flags; | |
5b435de0 AS |
2523 | |
2524 | allow_signal(SIGTERM); | |
2525 | /* Run until signal received */ | |
2526 | while (1) { | |
2527 | if (kthread_should_stop()) | |
2528 | break; | |
b948a85c FL |
2529 | |
2530 | if (list_empty(&bus->dpc_tsklst)) | |
2531 | if (wait_for_completion_interruptible(&bus->dpc_wait)) | |
2532 | break; | |
2533 | ||
2534 | spin_lock_irqsave(&bus->dpc_tl_lock, flags); | |
2535 | list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) { | |
2536 | spin_unlock_irqrestore(&bus->dpc_tl_lock, flags); | |
2537 | ||
2538 | if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) { | |
5b435de0 | 2539 | /* after stopping the bus, exit thread */ |
94c2fb82 | 2540 | brcmf_sdbrcm_bus_stop(bus->sdiodev->dev); |
5b435de0 | 2541 | bus->dpc_tsk = NULL; |
cf043172 | 2542 | spin_lock_irqsave(&bus->dpc_tl_lock, flags); |
5b435de0 AS |
2543 | break; |
2544 | } | |
b948a85c FL |
2545 | |
2546 | if (brcmf_sdbrcm_dpc(bus)) | |
2547 | brcmf_sdbrcm_adddpctsk(bus); | |
2548 | ||
2549 | spin_lock_irqsave(&bus->dpc_tl_lock, flags); | |
2550 | list_del(cur_hd); | |
2551 | kfree(cur_hd); | |
2552 | } | |
2553 | spin_unlock_irqrestore(&bus->dpc_tl_lock, flags); | |
5b435de0 AS |
2554 | } |
2555 | return 0; | |
2556 | } | |
2557 | ||
b9692d17 | 2558 | static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt) |
5b435de0 AS |
2559 | { |
2560 | int ret = -EBADE; | |
2561 | uint datalen, prec; | |
bf347bb9 | 2562 | struct brcmf_bus *bus_if = dev_get_drvdata(dev); |
0a332e46 | 2563 | struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio; |
bf347bb9 | 2564 | struct brcmf_sdio *bus = sdiodev->bus; |
5b435de0 AS |
2565 | |
2566 | brcmf_dbg(TRACE, "Enter\n"); | |
2567 | ||
2568 | datalen = pkt->len; | |
2569 | ||
2570 | /* Add space for the header */ | |
2571 | skb_push(pkt, SDPCM_HDRLEN); | |
2572 | /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */ | |
2573 | ||
2574 | prec = prio2prec((pkt->priority & PRIOMASK)); | |
2575 | ||
2576 | /* Check for existing queue, current flow-control, | |
2577 | pending event, or pending clock */ | |
2578 | brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq)); | |
80969836 | 2579 | bus->sdcnt.fcqueued++; |
5b435de0 AS |
2580 | |
2581 | /* Priority based enq */ | |
2582 | spin_lock_bh(&bus->txqlock); | |
23677ce3 | 2583 | if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) { |
5b435de0 | 2584 | skb_pull(pkt, SDPCM_HDRLEN); |
c995788f | 2585 | brcmf_txcomplete(bus->sdiodev->dev, pkt, false); |
5b435de0 AS |
2586 | brcmu_pkt_buf_free_skb(pkt); |
2587 | brcmf_dbg(ERROR, "out of bus->txq !!!\n"); | |
2588 | ret = -ENOSR; | |
2589 | } else { | |
2590 | ret = 0; | |
2591 | } | |
2592 | spin_unlock_bh(&bus->txqlock); | |
2593 | ||
c8bf3484 | 2594 | if (pktq_len(&bus->txq) >= TXHI) { |
90d03ff7 HM |
2595 | bus->txoff = true; |
2596 | brcmf_txflowblock(bus->sdiodev->dev, true); | |
c8bf3484 | 2597 | } |
5b435de0 | 2598 | |
8ae74654 | 2599 | #ifdef DEBUG |
5b435de0 AS |
2600 | if (pktq_plen(&bus->txq, prec) > qcount[prec]) |
2601 | qcount[prec] = pktq_plen(&bus->txq, prec); | |
2602 | #endif | |
2603 | /* Schedule DPC if needed to send queued packet(s) */ | |
2604 | if (!bus->dpc_sched) { | |
2605 | bus->dpc_sched = true; | |
b948a85c FL |
2606 | if (bus->dpc_tsk) { |
2607 | brcmf_sdbrcm_adddpctsk(bus); | |
5b435de0 | 2608 | complete(&bus->dpc_wait); |
b948a85c | 2609 | } |
5b435de0 AS |
2610 | } |
2611 | ||
2612 | return ret; | |
2613 | } | |
2614 | ||
2615 | static int | |
e92eedf4 | 2616 | brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data, |
5b435de0 AS |
2617 | uint size) |
2618 | { | |
2619 | int bcmerror = 0; | |
2620 | u32 sdaddr; | |
2621 | uint dsize; | |
2622 | ||
2623 | /* Determine initial transfer parameters */ | |
2624 | sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK; | |
2625 | if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK) | |
2626 | dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr); | |
2627 | else | |
2628 | dsize = size; | |
2629 | ||
2630 | /* Set the backplane window to include the start address */ | |
2631 | bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address); | |
2632 | if (bcmerror) { | |
2633 | brcmf_dbg(ERROR, "window change failed\n"); | |
2634 | goto xfer_done; | |
2635 | } | |
2636 | ||
2637 | /* Do the transfer(s) */ | |
2638 | while (size) { | |
2639 | brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n", | |
2640 | write ? "write" : "read", dsize, | |
2641 | sdaddr, address & SBSDIO_SBWINDOW_MASK); | |
2642 | bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write, | |
2643 | sdaddr, data, dsize); | |
2644 | if (bcmerror) { | |
2645 | brcmf_dbg(ERROR, "membytes transfer failed\n"); | |
2646 | break; | |
2647 | } | |
2648 | ||
2649 | /* Adjust for next transfer (if any) */ | |
2650 | size -= dsize; | |
2651 | if (size) { | |
2652 | data += dsize; | |
2653 | address += dsize; | |
2654 | bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, | |
2655 | address); | |
2656 | if (bcmerror) { | |
2657 | brcmf_dbg(ERROR, "window change failed\n"); | |
2658 | break; | |
2659 | } | |
2660 | sdaddr = 0; | |
2661 | dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size); | |
2662 | } | |
2663 | } | |
2664 | ||
2665 | xfer_done: | |
2666 | /* Return the window to backplane enumeration space for core access */ | |
2667 | if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad)) | |
2668 | brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n", | |
2669 | bus->sdiodev->sbwad); | |
2670 | ||
2671 | return bcmerror; | |
2672 | } | |
2673 | ||
8ae74654 | 2674 | #ifdef DEBUG |
5b435de0 AS |
2675 | #define CONSOLE_LINE_MAX 192 |
2676 | ||
e92eedf4 | 2677 | static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus) |
5b435de0 AS |
2678 | { |
2679 | struct brcmf_console *c = &bus->console; | |
2680 | u8 line[CONSOLE_LINE_MAX], ch; | |
2681 | u32 n, idx, addr; | |
2682 | int rv; | |
2683 | ||
2684 | /* Don't do anything until FWREADY updates console address */ | |
2685 | if (bus->console_addr == 0) | |
2686 | return 0; | |
2687 | ||
2688 | /* Read console log struct */ | |
2689 | addr = bus->console_addr + offsetof(struct rte_console, log_le); | |
2690 | rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le, | |
2691 | sizeof(c->log_le)); | |
2692 | if (rv < 0) | |
2693 | return rv; | |
2694 | ||
2695 | /* Allocate console buffer (one time only) */ | |
2696 | if (c->buf == NULL) { | |
2697 | c->bufsize = le32_to_cpu(c->log_le.buf_size); | |
2698 | c->buf = kmalloc(c->bufsize, GFP_ATOMIC); | |
2699 | if (c->buf == NULL) | |
2700 | return -ENOMEM; | |
2701 | } | |
2702 | ||
2703 | idx = le32_to_cpu(c->log_le.idx); | |
2704 | ||
2705 | /* Protect against corrupt value */ | |
2706 | if (idx > c->bufsize) | |
2707 | return -EBADE; | |
2708 | ||
2709 | /* Skip reading the console buffer if the index pointer | |
2710 | has not moved */ | |
2711 | if (idx == c->last) | |
2712 | return 0; | |
2713 | ||
2714 | /* Read the console buffer */ | |
2715 | addr = le32_to_cpu(c->log_le.buf); | |
2716 | rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize); | |
2717 | if (rv < 0) | |
2718 | return rv; | |
2719 | ||
2720 | while (c->last != idx) { | |
2721 | for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) { | |
2722 | if (c->last == idx) { | |
2723 | /* This would output a partial line. | |
2724 | * Instead, back up | |
2725 | * the buffer pointer and output this | |
2726 | * line next time around. | |
2727 | */ | |
2728 | if (c->last >= n) | |
2729 | c->last -= n; | |
2730 | else | |
2731 | c->last = c->bufsize - n; | |
2732 | goto break2; | |
2733 | } | |
2734 | ch = c->buf[c->last]; | |
2735 | c->last = (c->last + 1) % c->bufsize; | |
2736 | if (ch == '\n') | |
2737 | break; | |
2738 | line[n] = ch; | |
2739 | } | |
2740 | ||
2741 | if (n > 0) { | |
2742 | if (line[n - 1] == '\r') | |
2743 | n--; | |
2744 | line[n] = 0; | |
18aad4f8 | 2745 | pr_debug("CONSOLE: %s\n", line); |
5b435de0 AS |
2746 | } |
2747 | } | |
2748 | break2: | |
2749 | ||
2750 | return 0; | |
2751 | } | |
8ae74654 | 2752 | #endif /* DEBUG */ |
5b435de0 | 2753 | |
e92eedf4 | 2754 | static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len) |
5b435de0 AS |
2755 | { |
2756 | int i; | |
2757 | int ret; | |
2758 | ||
2759 | bus->ctrl_frame_stat = false; | |
5adfeb63 AS |
2760 | ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad, |
2761 | SDIO_FUNC_2, F2SYNC, frame, len); | |
5b435de0 AS |
2762 | |
2763 | if (ret < 0) { | |
2764 | /* On failure, abort the command and terminate the frame */ | |
2765 | brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n", | |
2766 | ret); | |
80969836 | 2767 | bus->sdcnt.tx_sderrs++; |
5b435de0 AS |
2768 | |
2769 | brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); | |
2770 | ||
3bba829f FL |
2771 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, |
2772 | SFC_WF_TERM, NULL); | |
80969836 | 2773 | bus->sdcnt.f1regdata++; |
5b435de0 AS |
2774 | |
2775 | for (i = 0; i < 3; i++) { | |
2776 | u8 hi, lo; | |
45db339c FL |
2777 | hi = brcmf_sdio_regrb(bus->sdiodev, |
2778 | SBSDIO_FUNC1_WFRAMEBCHI, NULL); | |
2779 | lo = brcmf_sdio_regrb(bus->sdiodev, | |
2780 | SBSDIO_FUNC1_WFRAMEBCLO, NULL); | |
80969836 | 2781 | bus->sdcnt.f1regdata += 2; |
5b435de0 AS |
2782 | if (hi == 0 && lo == 0) |
2783 | break; | |
2784 | } | |
2785 | return ret; | |
2786 | } | |
2787 | ||
2788 | bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP; | |
2789 | ||
2790 | return ret; | |
2791 | } | |
2792 | ||
fcf094f4 | 2793 | static int |
47a1ce78 | 2794 | brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen) |
5b435de0 AS |
2795 | { |
2796 | u8 *frame; | |
2797 | u16 len; | |
2798 | u32 swheader; | |
2799 | uint retries = 0; | |
2800 | u8 doff = 0; | |
2801 | int ret = -1; | |
47a1ce78 | 2802 | struct brcmf_bus *bus_if = dev_get_drvdata(dev); |
0a332e46 | 2803 | struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio; |
47a1ce78 | 2804 | struct brcmf_sdio *bus = sdiodev->bus; |
5b435de0 AS |
2805 | |
2806 | brcmf_dbg(TRACE, "Enter\n"); | |
2807 | ||
2808 | /* Back the pointer to make a room for bus header */ | |
2809 | frame = msg - SDPCM_HDRLEN; | |
2810 | len = (msglen += SDPCM_HDRLEN); | |
2811 | ||
2812 | /* Add alignment padding (optional for ctl frames) */ | |
2813 | doff = ((unsigned long)frame % BRCMF_SDALIGN); | |
2814 | if (doff) { | |
2815 | frame -= doff; | |
2816 | len += doff; | |
2817 | msglen += doff; | |
2818 | memset(frame, 0, doff + SDPCM_HDRLEN); | |
2819 | } | |
2820 | /* precondition: doff < BRCMF_SDALIGN */ | |
2821 | doff += SDPCM_HDRLEN; | |
2822 | ||
2823 | /* Round send length to next SDIO block */ | |
2824 | if (bus->roundup && bus->blocksize && (len > bus->blocksize)) { | |
2825 | u16 pad = bus->blocksize - (len % bus->blocksize); | |
2826 | if ((pad <= bus->roundup) && (pad < bus->blocksize)) | |
2827 | len += pad; | |
2828 | } else if (len % BRCMF_SDALIGN) { | |
2829 | len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN); | |
2830 | } | |
2831 | ||
2832 | /* Satisfy length-alignment requirements */ | |
2833 | if (len & (ALIGNMENT - 1)) | |
2834 | len = roundup(len, ALIGNMENT); | |
2835 | ||
2836 | /* precondition: IS_ALIGNED((unsigned long)frame, 2) */ | |
2837 | ||
2838 | /* Need to lock here to protect txseq and SDIO tx calls */ | |
2839 | down(&bus->sdsem); | |
2840 | ||
5b435de0 AS |
2841 | /* Make sure backplane clock is on */ |
2842 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
2843 | ||
2844 | /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */ | |
2845 | *(__le16 *) frame = cpu_to_le16((u16) msglen); | |
2846 | *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen); | |
2847 | ||
2848 | /* Software tag: channel, sequence number, data offset */ | |
2849 | swheader = | |
2850 | ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) & | |
2851 | SDPCM_CHANNEL_MASK) | |
2852 | | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) & | |
2853 | SDPCM_DOFFSET_MASK); | |
2854 | put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN); | |
2855 | put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader)); | |
2856 | ||
2857 | if (!data_ok(bus)) { | |
2858 | brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n", | |
2859 | bus->tx_max, bus->tx_seq); | |
2860 | bus->ctrl_frame_stat = true; | |
2861 | /* Send from dpc */ | |
2862 | bus->ctrl_frame_buf = frame; | |
2863 | bus->ctrl_frame_len = len; | |
2864 | ||
2865 | brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat); | |
2866 | ||
23677ce3 | 2867 | if (!bus->ctrl_frame_stat) { |
5b435de0 AS |
2868 | brcmf_dbg(INFO, "ctrl_frame_stat == false\n"); |
2869 | ret = 0; | |
2870 | } else { | |
2871 | brcmf_dbg(INFO, "ctrl_frame_stat == true\n"); | |
2872 | ret = -1; | |
2873 | } | |
2874 | } | |
2875 | ||
2876 | if (ret == -1) { | |
1e023829 JP |
2877 | brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(), |
2878 | frame, len, "Tx Frame:\n"); | |
2879 | brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) && | |
2880 | BRCMF_HDRS_ON(), | |
2881 | frame, min_t(u16, len, 16), "TxHdr:\n"); | |
5b435de0 AS |
2882 | |
2883 | do { | |
2884 | ret = brcmf_tx_frame(bus, frame, len); | |
2885 | } while (ret < 0 && retries++ < TXRETRIES); | |
2886 | } | |
2887 | ||
2888 | if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) { | |
2889 | bus->activity = false; | |
2890 | brcmf_sdbrcm_clkctl(bus, CLK_NONE, true); | |
2891 | } | |
2892 | ||
2893 | up(&bus->sdsem); | |
2894 | ||
2895 | if (ret) | |
80969836 | 2896 | bus->sdcnt.tx_ctlerrs++; |
5b435de0 | 2897 | else |
80969836 | 2898 | bus->sdcnt.tx_ctlpkts++; |
5b435de0 AS |
2899 | |
2900 | return ret ? -EIO : 0; | |
2901 | } | |
2902 | ||
80969836 | 2903 | #ifdef DEBUG |
4fc0d016 AS |
2904 | static inline bool brcmf_sdio_valid_shared_address(u32 addr) |
2905 | { | |
2906 | return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff)); | |
2907 | } | |
2908 | ||
2909 | static int brcmf_sdio_readshared(struct brcmf_sdio *bus, | |
2910 | struct sdpcm_shared *sh) | |
2911 | { | |
2912 | u32 addr; | |
2913 | int rv; | |
2914 | u32 shaddr = 0; | |
2915 | struct sdpcm_shared_le sh_le; | |
2916 | __le32 addr_le; | |
2917 | ||
2918 | shaddr = bus->ramsize - 4; | |
2919 | ||
2920 | /* | |
2921 | * Read last word in socram to determine | |
2922 | * address of sdpcm_shared structure | |
2923 | */ | |
2924 | rv = brcmf_sdbrcm_membytes(bus, false, shaddr, | |
2925 | (u8 *)&addr_le, 4); | |
2926 | if (rv < 0) | |
2927 | return rv; | |
2928 | ||
2929 | addr = le32_to_cpu(addr_le); | |
2930 | ||
2931 | brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr); | |
2932 | ||
2933 | /* | |
2934 | * Check if addr is valid. | |
2935 | * NVRAM length at the end of memory should have been overwritten. | |
2936 | */ | |
2937 | if (!brcmf_sdio_valid_shared_address(addr)) { | |
2938 | brcmf_dbg(ERROR, "invalid sdpcm_shared address 0x%08X\n", | |
2939 | addr); | |
2940 | return -EINVAL; | |
2941 | } | |
2942 | ||
2943 | /* Read hndrte_shared structure */ | |
2944 | rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&sh_le, | |
2945 | sizeof(struct sdpcm_shared_le)); | |
2946 | if (rv < 0) | |
2947 | return rv; | |
2948 | ||
2949 | /* Endianness */ | |
2950 | sh->flags = le32_to_cpu(sh_le.flags); | |
2951 | sh->trap_addr = le32_to_cpu(sh_le.trap_addr); | |
2952 | sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr); | |
2953 | sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr); | |
2954 | sh->assert_line = le32_to_cpu(sh_le.assert_line); | |
2955 | sh->console_addr = le32_to_cpu(sh_le.console_addr); | |
2956 | sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr); | |
2957 | ||
2958 | if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) { | |
2959 | brcmf_dbg(ERROR, | |
2960 | "sdpcm_shared version mismatch: dhd %d dongle %d\n", | |
2961 | SDPCM_SHARED_VERSION, | |
2962 | sh->flags & SDPCM_SHARED_VERSION_MASK); | |
2963 | return -EPROTO; | |
2964 | } | |
2965 | ||
2966 | return 0; | |
2967 | } | |
2968 | ||
2969 | static int brcmf_sdio_dump_console(struct brcmf_sdio *bus, | |
2970 | struct sdpcm_shared *sh, char __user *data, | |
2971 | size_t count) | |
2972 | { | |
2973 | u32 addr, console_ptr, console_size, console_index; | |
2974 | char *conbuf = NULL; | |
2975 | __le32 sh_val; | |
2976 | int rv; | |
2977 | loff_t pos = 0; | |
2978 | int nbytes = 0; | |
2979 | ||
2980 | /* obtain console information from device memory */ | |
2981 | addr = sh->console_addr + offsetof(struct rte_console, log_le); | |
2982 | rv = brcmf_sdbrcm_membytes(bus, false, addr, | |
2983 | (u8 *)&sh_val, sizeof(u32)); | |
2984 | if (rv < 0) | |
2985 | return rv; | |
2986 | console_ptr = le32_to_cpu(sh_val); | |
2987 | ||
2988 | addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size); | |
2989 | rv = brcmf_sdbrcm_membytes(bus, false, addr, | |
2990 | (u8 *)&sh_val, sizeof(u32)); | |
2991 | if (rv < 0) | |
2992 | return rv; | |
2993 | console_size = le32_to_cpu(sh_val); | |
2994 | ||
2995 | addr = sh->console_addr + offsetof(struct rte_console, log_le.idx); | |
2996 | rv = brcmf_sdbrcm_membytes(bus, false, addr, | |
2997 | (u8 *)&sh_val, sizeof(u32)); | |
2998 | if (rv < 0) | |
2999 | return rv; | |
3000 | console_index = le32_to_cpu(sh_val); | |
3001 | ||
3002 | /* allocate buffer for console data */ | |
3003 | if (console_size <= CONSOLE_BUFFER_MAX) | |
3004 | conbuf = vzalloc(console_size+1); | |
3005 | ||
3006 | if (!conbuf) | |
3007 | return -ENOMEM; | |
3008 | ||
3009 | /* obtain the console data from device */ | |
3010 | conbuf[console_size] = '\0'; | |
3011 | rv = brcmf_sdbrcm_membytes(bus, false, console_ptr, (u8 *)conbuf, | |
3012 | console_size); | |
3013 | if (rv < 0) | |
3014 | goto done; | |
3015 | ||
3016 | rv = simple_read_from_buffer(data, count, &pos, | |
3017 | conbuf + console_index, | |
3018 | console_size - console_index); | |
3019 | if (rv < 0) | |
3020 | goto done; | |
3021 | ||
3022 | nbytes = rv; | |
3023 | if (console_index > 0) { | |
3024 | pos = 0; | |
3025 | rv = simple_read_from_buffer(data+nbytes, count, &pos, | |
3026 | conbuf, console_index - 1); | |
3027 | if (rv < 0) | |
3028 | goto done; | |
3029 | rv += nbytes; | |
3030 | } | |
3031 | done: | |
3032 | vfree(conbuf); | |
3033 | return rv; | |
3034 | } | |
3035 | ||
3036 | static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh, | |
3037 | char __user *data, size_t count) | |
3038 | { | |
3039 | int error, res; | |
3040 | char buf[350]; | |
3041 | struct brcmf_trap_info tr; | |
3042 | int nbytes; | |
3043 | loff_t pos = 0; | |
3044 | ||
3045 | if ((sh->flags & SDPCM_SHARED_TRAP) == 0) | |
3046 | return 0; | |
3047 | ||
3048 | error = brcmf_sdbrcm_membytes(bus, false, sh->trap_addr, (u8 *)&tr, | |
3049 | sizeof(struct brcmf_trap_info)); | |
3050 | if (error < 0) | |
3051 | return error; | |
3052 | ||
3053 | nbytes = brcmf_sdio_dump_console(bus, sh, data, count); | |
3054 | if (nbytes < 0) | |
3055 | return nbytes; | |
3056 | ||
3057 | res = scnprintf(buf, sizeof(buf), | |
3058 | "dongle trap info: type 0x%x @ epc 0x%08x\n" | |
3059 | " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n" | |
3060 | " lr 0x%08x pc 0x%08x offset 0x%x\n" | |
3061 | " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n" | |
3062 | " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n", | |
3063 | le32_to_cpu(tr.type), le32_to_cpu(tr.epc), | |
3064 | le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr), | |
3065 | le32_to_cpu(tr.r13), le32_to_cpu(tr.r14), | |
9bd02c6b | 3066 | le32_to_cpu(tr.pc), sh->trap_addr, |
4fc0d016 AS |
3067 | le32_to_cpu(tr.r0), le32_to_cpu(tr.r1), |
3068 | le32_to_cpu(tr.r2), le32_to_cpu(tr.r3), | |
3069 | le32_to_cpu(tr.r4), le32_to_cpu(tr.r5), | |
3070 | le32_to_cpu(tr.r6), le32_to_cpu(tr.r7)); | |
3071 | ||
3072 | error = simple_read_from_buffer(data+nbytes, count, &pos, buf, res); | |
3073 | if (error < 0) | |
3074 | return error; | |
3075 | ||
3076 | nbytes += error; | |
3077 | return nbytes; | |
3078 | } | |
3079 | ||
3080 | static int brcmf_sdio_assert_info(struct brcmf_sdio *bus, | |
3081 | struct sdpcm_shared *sh, char __user *data, | |
3082 | size_t count) | |
3083 | { | |
3084 | int error = 0; | |
3085 | char buf[200]; | |
3086 | char file[80] = "?"; | |
3087 | char expr[80] = "<???>"; | |
3088 | int res; | |
3089 | loff_t pos = 0; | |
3090 | ||
3091 | if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) { | |
3092 | brcmf_dbg(INFO, "firmware not built with -assert\n"); | |
3093 | return 0; | |
3094 | } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) { | |
3095 | brcmf_dbg(INFO, "no assert in dongle\n"); | |
3096 | return 0; | |
3097 | } | |
3098 | ||
3099 | if (sh->assert_file_addr != 0) { | |
3100 | error = brcmf_sdbrcm_membytes(bus, false, sh->assert_file_addr, | |
3101 | (u8 *)file, 80); | |
3102 | if (error < 0) | |
3103 | return error; | |
3104 | } | |
3105 | if (sh->assert_exp_addr != 0) { | |
3106 | error = brcmf_sdbrcm_membytes(bus, false, sh->assert_exp_addr, | |
3107 | (u8 *)expr, 80); | |
3108 | if (error < 0) | |
3109 | return error; | |
3110 | } | |
3111 | ||
3112 | res = scnprintf(buf, sizeof(buf), | |
3113 | "dongle assert: %s:%d: assert(%s)\n", | |
3114 | file, sh->assert_line, expr); | |
3115 | return simple_read_from_buffer(data, count, &pos, buf, res); | |
3116 | } | |
3117 | ||
3118 | static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus) | |
3119 | { | |
3120 | int error; | |
3121 | struct sdpcm_shared sh; | |
3122 | ||
3123 | down(&bus->sdsem); | |
3124 | error = brcmf_sdio_readshared(bus, &sh); | |
3125 | up(&bus->sdsem); | |
3126 | ||
3127 | if (error < 0) | |
3128 | return error; | |
3129 | ||
3130 | if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0) | |
3131 | brcmf_dbg(INFO, "firmware not built with -assert\n"); | |
3132 | else if (sh.flags & SDPCM_SHARED_ASSERT) | |
3133 | brcmf_dbg(ERROR, "assertion in dongle\n"); | |
3134 | ||
3135 | if (sh.flags & SDPCM_SHARED_TRAP) | |
3136 | brcmf_dbg(ERROR, "firmware trap in dongle\n"); | |
3137 | ||
3138 | return 0; | |
3139 | } | |
3140 | ||
3141 | static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data, | |
3142 | size_t count, loff_t *ppos) | |
3143 | { | |
3144 | int error = 0; | |
3145 | struct sdpcm_shared sh; | |
3146 | int nbytes = 0; | |
3147 | loff_t pos = *ppos; | |
3148 | ||
3149 | if (pos != 0) | |
3150 | return 0; | |
3151 | ||
3152 | down(&bus->sdsem); | |
3153 | error = brcmf_sdio_readshared(bus, &sh); | |
3154 | if (error < 0) | |
3155 | goto done; | |
3156 | ||
3157 | error = brcmf_sdio_assert_info(bus, &sh, data, count); | |
3158 | if (error < 0) | |
3159 | goto done; | |
3160 | ||
3161 | nbytes = error; | |
3162 | error = brcmf_sdio_trap_info(bus, &sh, data, count); | |
3163 | if (error < 0) | |
3164 | goto done; | |
3165 | ||
3166 | error += nbytes; | |
3167 | *ppos += error; | |
3168 | done: | |
3169 | up(&bus->sdsem); | |
3170 | return error; | |
3171 | } | |
3172 | ||
3173 | static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data, | |
3174 | size_t count, loff_t *ppos) | |
3175 | { | |
3176 | struct brcmf_sdio *bus = f->private_data; | |
3177 | int res; | |
3178 | ||
3179 | res = brcmf_sdbrcm_died_dump(bus, data, count, ppos); | |
3180 | if (res > 0) | |
3181 | *ppos += res; | |
3182 | return (ssize_t)res; | |
3183 | } | |
3184 | ||
3185 | static const struct file_operations brcmf_sdio_forensic_ops = { | |
3186 | .owner = THIS_MODULE, | |
3187 | .open = simple_open, | |
3188 | .read = brcmf_sdio_forensic_read | |
3189 | }; | |
3190 | ||
80969836 AS |
3191 | static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus) |
3192 | { | |
3193 | struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr; | |
4fc0d016 | 3194 | struct dentry *dentry = brcmf_debugfs_get_devdir(drvr); |
80969836 | 3195 | |
4fc0d016 AS |
3196 | if (IS_ERR_OR_NULL(dentry)) |
3197 | return; | |
3198 | ||
3199 | debugfs_create_file("forensics", S_IRUGO, dentry, bus, | |
3200 | &brcmf_sdio_forensic_ops); | |
80969836 AS |
3201 | brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt); |
3202 | } | |
3203 | #else | |
4fc0d016 AS |
3204 | static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus) |
3205 | { | |
3206 | return 0; | |
3207 | } | |
3208 | ||
80969836 AS |
3209 | static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus) |
3210 | { | |
3211 | } | |
3212 | #endif /* DEBUG */ | |
3213 | ||
fcf094f4 | 3214 | static int |
532cdd3b | 3215 | brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen) |
5b435de0 AS |
3216 | { |
3217 | int timeleft; | |
3218 | uint rxlen = 0; | |
3219 | bool pending; | |
532cdd3b | 3220 | struct brcmf_bus *bus_if = dev_get_drvdata(dev); |
0a332e46 | 3221 | struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio; |
532cdd3b | 3222 | struct brcmf_sdio *bus = sdiodev->bus; |
5b435de0 AS |
3223 | |
3224 | brcmf_dbg(TRACE, "Enter\n"); | |
3225 | ||
3226 | /* Wait until control frame is available */ | |
3227 | timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending); | |
3228 | ||
3229 | down(&bus->sdsem); | |
3230 | rxlen = bus->rxlen; | |
3231 | memcpy(msg, bus->rxctl, min(msglen, rxlen)); | |
3232 | bus->rxlen = 0; | |
3233 | up(&bus->sdsem); | |
3234 | ||
3235 | if (rxlen) { | |
3236 | brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n", | |
3237 | rxlen, msglen); | |
3238 | } else if (timeleft == 0) { | |
3239 | brcmf_dbg(ERROR, "resumed on timeout\n"); | |
4fc0d016 | 3240 | brcmf_sdbrcm_checkdied(bus); |
23677ce3 | 3241 | } else if (pending) { |
5b435de0 AS |
3242 | brcmf_dbg(CTL, "cancelled\n"); |
3243 | return -ERESTARTSYS; | |
3244 | } else { | |
3245 | brcmf_dbg(CTL, "resumed for unknown reason?\n"); | |
4fc0d016 | 3246 | brcmf_sdbrcm_checkdied(bus); |
5b435de0 AS |
3247 | } |
3248 | ||
3249 | if (rxlen) | |
80969836 | 3250 | bus->sdcnt.rx_ctlpkts++; |
5b435de0 | 3251 | else |
80969836 | 3252 | bus->sdcnt.rx_ctlerrs++; |
5b435de0 AS |
3253 | |
3254 | return rxlen ? (int)rxlen : -ETIMEDOUT; | |
3255 | } | |
3256 | ||
e92eedf4 | 3257 | static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus) |
5b435de0 AS |
3258 | { |
3259 | int bcmerror = 0; | |
5b435de0 | 3260 | u32 varaddr; |
5b435de0 AS |
3261 | u32 varsizew; |
3262 | __le32 varsizew_le; | |
8ae74654 | 3263 | #ifdef DEBUG |
5b435de0 | 3264 | char *nvram_ularray; |
8ae74654 | 3265 | #endif /* DEBUG */ |
5b435de0 AS |
3266 | |
3267 | /* Even if there are no vars are to be written, we still | |
3268 | need to set the ramsize. */ | |
6d4ef680 | 3269 | varaddr = (bus->ramsize - 4) - bus->varsz; |
5b435de0 AS |
3270 | |
3271 | if (bus->vars) { | |
5b435de0 | 3272 | /* Write the vars list */ |
6d4ef680 AS |
3273 | bcmerror = brcmf_sdbrcm_membytes(bus, true, varaddr, |
3274 | bus->vars, bus->varsz); | |
8ae74654 | 3275 | #ifdef DEBUG |
5b435de0 | 3276 | /* Verify NVRAM bytes */ |
6d4ef680 AS |
3277 | brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n", |
3278 | bus->varsz); | |
3279 | nvram_ularray = kmalloc(bus->varsz, GFP_ATOMIC); | |
3280 | if (!nvram_ularray) | |
5b435de0 AS |
3281 | return -ENOMEM; |
3282 | ||
3283 | /* Upload image to verify downloaded contents. */ | |
6d4ef680 | 3284 | memset(nvram_ularray, 0xaa, bus->varsz); |
5b435de0 AS |
3285 | |
3286 | /* Read the vars list to temp buffer for comparison */ | |
6d4ef680 AS |
3287 | bcmerror = brcmf_sdbrcm_membytes(bus, false, varaddr, |
3288 | nvram_ularray, bus->varsz); | |
5b435de0 AS |
3289 | if (bcmerror) { |
3290 | brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n", | |
6d4ef680 | 3291 | bcmerror, bus->varsz, varaddr); |
5b435de0 AS |
3292 | } |
3293 | /* Compare the org NVRAM with the one read from RAM */ | |
6d4ef680 | 3294 | if (memcmp(bus->vars, nvram_ularray, bus->varsz)) |
5b435de0 AS |
3295 | brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n"); |
3296 | else | |
3297 | brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n"); | |
3298 | ||
3299 | kfree(nvram_ularray); | |
8ae74654 | 3300 | #endif /* DEBUG */ |
5b435de0 AS |
3301 | } |
3302 | ||
3303 | /* adjust to the user specified RAM */ | |
3304 | brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize); | |
3305 | brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n", | |
6d4ef680 | 3306 | varaddr, bus->varsz); |
5b435de0 AS |
3307 | |
3308 | /* | |
3309 | * Determine the length token: | |
3310 | * Varsize, converted to words, in lower 16-bits, checksum | |
3311 | * in upper 16-bits. | |
3312 | */ | |
3313 | if (bcmerror) { | |
3314 | varsizew = 0; | |
3315 | varsizew_le = cpu_to_le32(0); | |
3316 | } else { | |
6d4ef680 | 3317 | varsizew = bus->varsz / 4; |
5b435de0 AS |
3318 | varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF); |
3319 | varsizew_le = cpu_to_le32(varsizew); | |
3320 | } | |
3321 | ||
3322 | brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n", | |
6d4ef680 | 3323 | bus->varsz, varsizew); |
5b435de0 AS |
3324 | |
3325 | /* Write the length token to the last word */ | |
3326 | bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4), | |
3327 | (u8 *)&varsizew_le, 4); | |
3328 | ||
3329 | return bcmerror; | |
3330 | } | |
3331 | ||
e92eedf4 | 3332 | static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter) |
5b435de0 | 3333 | { |
5b435de0 | 3334 | int bcmerror = 0; |
99ba15cd | 3335 | struct chip_info *ci = bus->ci; |
5b435de0 AS |
3336 | |
3337 | /* To enter download state, disable ARM and reset SOCRAM. | |
3338 | * To exit download state, simply reset ARM (default is RAM boot). | |
3339 | */ | |
3340 | if (enter) { | |
3341 | bus->alp_only = true; | |
3342 | ||
086a2e0a | 3343 | ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3); |
5b435de0 | 3344 | |
d77e70ff | 3345 | ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM); |
5b435de0 AS |
3346 | |
3347 | /* Clear the top bit of memory */ | |
3348 | if (bus->ramsize) { | |
3349 | u32 zeros = 0; | |
3350 | brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4, | |
3351 | (u8 *)&zeros, 4); | |
3352 | } | |
3353 | } else { | |
6ca687d9 | 3354 | if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) { |
5b435de0 AS |
3355 | brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n"); |
3356 | bcmerror = -EBADE; | |
3357 | goto fail; | |
3358 | } | |
3359 | ||
3360 | bcmerror = brcmf_sdbrcm_write_vars(bus); | |
3361 | if (bcmerror) { | |
3362 | brcmf_dbg(ERROR, "no vars written to RAM\n"); | |
3363 | bcmerror = 0; | |
3364 | } | |
3365 | ||
3366 | w_sdreg32(bus, 0xFFFFFFFF, | |
58692750 | 3367 | offsetof(struct sdpcmd_regs, intstatus)); |
5b435de0 | 3368 | |
d77e70ff | 3369 | ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3); |
5b435de0 AS |
3370 | |
3371 | /* Allow HT Clock now that the ARM is running. */ | |
3372 | bus->alp_only = false; | |
3373 | ||
712ac5b3 | 3374 | bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD; |
5b435de0 AS |
3375 | } |
3376 | fail: | |
3377 | return bcmerror; | |
3378 | } | |
3379 | ||
e92eedf4 | 3380 | static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus) |
5b435de0 AS |
3381 | { |
3382 | if (bus->firmware->size < bus->fw_ptr + len) | |
3383 | len = bus->firmware->size - bus->fw_ptr; | |
3384 | ||
3385 | memcpy(buf, &bus->firmware->data[bus->fw_ptr], len); | |
3386 | bus->fw_ptr += len; | |
3387 | return len; | |
3388 | } | |
3389 | ||
e92eedf4 | 3390 | static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus) |
5b435de0 AS |
3391 | { |
3392 | int offset = 0; | |
3393 | uint len; | |
3394 | u8 *memblock = NULL, *memptr; | |
3395 | int ret; | |
3396 | ||
3397 | brcmf_dbg(INFO, "Enter\n"); | |
3398 | ||
52e1409f | 3399 | ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME, |
5b435de0 AS |
3400 | &bus->sdiodev->func[2]->dev); |
3401 | if (ret) { | |
3402 | brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret); | |
3403 | return ret; | |
3404 | } | |
3405 | bus->fw_ptr = 0; | |
3406 | ||
3407 | memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC); | |
3408 | if (memblock == NULL) { | |
3409 | ret = -ENOMEM; | |
3410 | goto err; | |
3411 | } | |
3412 | if ((u32)(unsigned long)memblock % BRCMF_SDALIGN) | |
3413 | memptr += (BRCMF_SDALIGN - | |
3414 | ((u32)(unsigned long)memblock % BRCMF_SDALIGN)); | |
3415 | ||
3416 | /* Download image */ | |
3417 | while ((len = | |
3418 | brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) { | |
3419 | ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len); | |
3420 | if (ret) { | |
3421 | brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n", | |
3422 | ret, MEMBLOCK, offset); | |
3423 | goto err; | |
3424 | } | |
3425 | ||
3426 | offset += MEMBLOCK; | |
3427 | } | |
3428 | ||
3429 | err: | |
3430 | kfree(memblock); | |
3431 | ||
3432 | release_firmware(bus->firmware); | |
3433 | bus->fw_ptr = 0; | |
3434 | ||
3435 | return ret; | |
3436 | } | |
3437 | ||
3438 | /* | |
3439 | * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file | |
3440 | * and ending in a NUL. | |
3441 | * Removes carriage returns, empty lines, comment lines, and converts | |
3442 | * newlines to NULs. | |
3443 | * Shortens buffer as needed and pads with NULs. End of buffer is marked | |
3444 | * by two NULs. | |
3445 | */ | |
3446 | ||
d610cde3 | 3447 | static int brcmf_process_nvram_vars(struct brcmf_sdio *bus) |
5b435de0 | 3448 | { |
d610cde3 | 3449 | char *varbuf; |
5b435de0 AS |
3450 | char *dp; |
3451 | bool findNewline; | |
3452 | int column; | |
d610cde3 FL |
3453 | int ret = 0; |
3454 | uint buf_len, n, len; | |
3455 | ||
3456 | len = bus->firmware->size; | |
3457 | varbuf = vmalloc(len); | |
3458 | if (!varbuf) | |
3459 | return -ENOMEM; | |
5b435de0 | 3460 | |
d610cde3 | 3461 | memcpy(varbuf, bus->firmware->data, len); |
5b435de0 AS |
3462 | dp = varbuf; |
3463 | ||
3464 | findNewline = false; | |
3465 | column = 0; | |
3466 | ||
3467 | for (n = 0; n < len; n++) { | |
3468 | if (varbuf[n] == 0) | |
3469 | break; | |
3470 | if (varbuf[n] == '\r') | |
3471 | continue; | |
3472 | if (findNewline && varbuf[n] != '\n') | |
3473 | continue; | |
3474 | findNewline = false; | |
3475 | if (varbuf[n] == '#') { | |
3476 | findNewline = true; | |
3477 | continue; | |
3478 | } | |
3479 | if (varbuf[n] == '\n') { | |
3480 | if (column == 0) | |
3481 | continue; | |
3482 | *dp++ = 0; | |
3483 | column = 0; | |
3484 | continue; | |
3485 | } | |
3486 | *dp++ = varbuf[n]; | |
3487 | column++; | |
3488 | } | |
3489 | buf_len = dp - varbuf; | |
5b435de0 AS |
3490 | while (dp < varbuf + n) |
3491 | *dp++ = 0; | |
3492 | ||
d610cde3 | 3493 | kfree(bus->vars); |
6d4ef680 AS |
3494 | /* roundup needed for download to device */ |
3495 | bus->varsz = roundup(buf_len + 1, 4); | |
d610cde3 FL |
3496 | bus->vars = kmalloc(bus->varsz, GFP_KERNEL); |
3497 | if (bus->vars == NULL) { | |
3498 | bus->varsz = 0; | |
3499 | ret = -ENOMEM; | |
3500 | goto err; | |
3501 | } | |
3502 | ||
3503 | /* copy the processed variables and add null termination */ | |
3504 | memcpy(bus->vars, varbuf, buf_len); | |
3505 | bus->vars[buf_len] = 0; | |
3506 | err: | |
3507 | vfree(varbuf); | |
3508 | return ret; | |
5b435de0 AS |
3509 | } |
3510 | ||
e92eedf4 | 3511 | static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus) |
5b435de0 | 3512 | { |
5b435de0 AS |
3513 | int ret; |
3514 | ||
d610cde3 FL |
3515 | if (bus->sdiodev->bus_if->drvr_up) |
3516 | return -EISCONN; | |
3517 | ||
52e1409f | 3518 | ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME, |
5b435de0 AS |
3519 | &bus->sdiodev->func[2]->dev); |
3520 | if (ret) { | |
3521 | brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret); | |
3522 | return ret; | |
3523 | } | |
5b435de0 | 3524 | |
d610cde3 | 3525 | ret = brcmf_process_nvram_vars(bus); |
5b435de0 AS |
3526 | |
3527 | release_firmware(bus->firmware); | |
5b435de0 AS |
3528 | |
3529 | return ret; | |
3530 | } | |
3531 | ||
e92eedf4 | 3532 | static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus) |
5b435de0 AS |
3533 | { |
3534 | int bcmerror = -1; | |
3535 | ||
3536 | /* Keep arm in reset */ | |
3537 | if (brcmf_sdbrcm_download_state(bus, true)) { | |
3538 | brcmf_dbg(ERROR, "error placing ARM core in reset\n"); | |
3539 | goto err; | |
3540 | } | |
3541 | ||
3542 | /* External image takes precedence if specified */ | |
3543 | if (brcmf_sdbrcm_download_code_file(bus)) { | |
3544 | brcmf_dbg(ERROR, "dongle image file download failed\n"); | |
3545 | goto err; | |
3546 | } | |
3547 | ||
3548 | /* External nvram takes precedence if specified */ | |
3549 | if (brcmf_sdbrcm_download_nvram(bus)) | |
3550 | brcmf_dbg(ERROR, "dongle nvram file download failed\n"); | |
3551 | ||
3552 | /* Take arm out of reset */ | |
3553 | if (brcmf_sdbrcm_download_state(bus, false)) { | |
3554 | brcmf_dbg(ERROR, "error getting out of ARM core reset\n"); | |
3555 | goto err; | |
3556 | } | |
3557 | ||
3558 | bcmerror = 0; | |
3559 | ||
3560 | err: | |
3561 | return bcmerror; | |
3562 | } | |
3563 | ||
3564 | static bool | |
e92eedf4 | 3565 | brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus) |
5b435de0 AS |
3566 | { |
3567 | bool ret; | |
3568 | ||
3569 | /* Download the firmware */ | |
3570 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
3571 | ||
3572 | ret = _brcmf_sdbrcm_download_firmware(bus) == 0; | |
3573 | ||
3574 | brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); | |
3575 | ||
3576 | return ret; | |
3577 | } | |
3578 | ||
99a0b8ff | 3579 | static int brcmf_sdbrcm_bus_init(struct device *dev) |
5b435de0 | 3580 | { |
fa20b911 | 3581 | struct brcmf_bus *bus_if = dev_get_drvdata(dev); |
0a332e46 | 3582 | struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio; |
fa20b911 | 3583 | struct brcmf_sdio *bus = sdiodev->bus; |
5b435de0 | 3584 | unsigned long timeout; |
5b435de0 AS |
3585 | u8 ready, enable; |
3586 | int err, ret = 0; | |
3587 | u8 saveclk; | |
3588 | ||
3589 | brcmf_dbg(TRACE, "Enter\n"); | |
3590 | ||
3591 | /* try to download image and nvram to the dongle */ | |
fa20b911 | 3592 | if (bus_if->state == BRCMF_BUS_DOWN) { |
5b435de0 AS |
3593 | if (!(brcmf_sdbrcm_download_firmware(bus))) |
3594 | return -1; | |
3595 | } | |
3596 | ||
712ac5b3 | 3597 | if (!bus->sdiodev->bus_if->drvr) |
5b435de0 AS |
3598 | return 0; |
3599 | ||
3600 | /* Start the watchdog timer */ | |
80969836 | 3601 | bus->sdcnt.tickcnt = 0; |
5b435de0 AS |
3602 | brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS); |
3603 | ||
3604 | down(&bus->sdsem); | |
3605 | ||
3606 | /* Make sure backplane clock is on, needed to generate F2 interrupt */ | |
3607 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
3608 | if (bus->clkstate != CLK_AVAIL) | |
3609 | goto exit; | |
3610 | ||
3611 | /* Force clocks on backplane to be sure F2 interrupt propagates */ | |
45db339c FL |
3612 | saveclk = brcmf_sdio_regrb(bus->sdiodev, |
3613 | SBSDIO_FUNC1_CHIPCLKCSR, &err); | |
5b435de0 | 3614 | if (!err) { |
3bba829f FL |
3615 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, |
3616 | (saveclk | SBSDIO_FORCE_HT), &err); | |
5b435de0 AS |
3617 | } |
3618 | if (err) { | |
3619 | brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err); | |
3620 | goto exit; | |
3621 | } | |
3622 | ||
3623 | /* Enable function 2 (frame transfers) */ | |
3624 | w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT, | |
58692750 | 3625 | offsetof(struct sdpcmd_regs, tosbmailboxdata)); |
5b435de0 AS |
3626 | enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2); |
3627 | ||
3bba829f | 3628 | brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL); |
5b435de0 AS |
3629 | |
3630 | timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY); | |
3631 | ready = 0; | |
3632 | while (enable != ready) { | |
45db339c FL |
3633 | ready = brcmf_sdio_regrb(bus->sdiodev, |
3634 | SDIO_CCCR_IORx, NULL); | |
5b435de0 AS |
3635 | if (time_after(jiffies, timeout)) |
3636 | break; | |
3637 | else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50)) | |
3638 | /* prevent busy waiting if it takes too long */ | |
3639 | msleep_interruptible(20); | |
3640 | } | |
3641 | ||
3642 | brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready); | |
3643 | ||
3644 | /* If F2 successfully enabled, set core and enable interrupts */ | |
3645 | if (ready == enable) { | |
3646 | /* Set up the interrupt mask and enable interrupts */ | |
3647 | bus->hostintmask = HOSTINTMASK; | |
3648 | w_sdreg32(bus, bus->hostintmask, | |
58692750 | 3649 | offsetof(struct sdpcmd_regs, hostintmask)); |
5b435de0 | 3650 | |
3bba829f | 3651 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err); |
c0e89f08 | 3652 | } else { |
5b435de0 AS |
3653 | /* Disable F2 again */ |
3654 | enable = SDIO_FUNC_ENABLE_1; | |
3bba829f | 3655 | brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL); |
c0e89f08 | 3656 | ret = -ENODEV; |
5b435de0 AS |
3657 | } |
3658 | ||
3659 | /* Restore previous clock setting */ | |
3bba829f | 3660 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err); |
5b435de0 | 3661 | |
e2f93cc3 | 3662 | if (ret == 0) { |
ba89bf19 | 3663 | ret = brcmf_sdio_intr_register(bus->sdiodev); |
e2f93cc3 FL |
3664 | if (ret != 0) |
3665 | brcmf_dbg(ERROR, "intr register failed:%d\n", ret); | |
3666 | } | |
3667 | ||
5b435de0 | 3668 | /* If we didn't come up, turn off backplane clock */ |
d9126e0c | 3669 | if (bus_if->state != BRCMF_BUS_DATA) |
5b435de0 AS |
3670 | brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); |
3671 | ||
3672 | exit: | |
3673 | up(&bus->sdsem); | |
3674 | ||
3675 | return ret; | |
3676 | } | |
3677 | ||
3678 | void brcmf_sdbrcm_isr(void *arg) | |
3679 | { | |
e92eedf4 | 3680 | struct brcmf_sdio *bus = (struct brcmf_sdio *) arg; |
5b435de0 AS |
3681 | |
3682 | brcmf_dbg(TRACE, "Enter\n"); | |
3683 | ||
3684 | if (!bus) { | |
3685 | brcmf_dbg(ERROR, "bus is null pointer, exiting\n"); | |
3686 | return; | |
3687 | } | |
3688 | ||
712ac5b3 | 3689 | if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) { |
5b435de0 AS |
3690 | brcmf_dbg(ERROR, "bus is down. we have nothing to do\n"); |
3691 | return; | |
3692 | } | |
3693 | /* Count the interrupt call */ | |
80969836 | 3694 | bus->sdcnt.intrcount++; |
5b435de0 AS |
3695 | bus->ipend = true; |
3696 | ||
5b435de0 AS |
3697 | /* Disable additional interrupts (is this needed now)? */ |
3698 | if (!bus->intr) | |
3699 | brcmf_dbg(ERROR, "isr w/o interrupt configured!\n"); | |
3700 | ||
3701 | bus->dpc_sched = true; | |
b948a85c FL |
3702 | if (bus->dpc_tsk) { |
3703 | brcmf_sdbrcm_adddpctsk(bus); | |
5b435de0 | 3704 | complete(&bus->dpc_wait); |
b948a85c | 3705 | } |
5b435de0 AS |
3706 | } |
3707 | ||
cad2b26b | 3708 | static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus) |
5b435de0 | 3709 | { |
8ae74654 | 3710 | #ifdef DEBUG |
cad2b26b | 3711 | struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev); |
8ae74654 | 3712 | #endif /* DEBUG */ |
5b435de0 AS |
3713 | |
3714 | brcmf_dbg(TIMER, "Enter\n"); | |
3715 | ||
5b435de0 AS |
3716 | down(&bus->sdsem); |
3717 | ||
3718 | /* Poll period: check device if appropriate. */ | |
3719 | if (bus->poll && (++bus->polltick >= bus->pollrate)) { | |
3720 | u32 intstatus = 0; | |
3721 | ||
3722 | /* Reset poll tick */ | |
3723 | bus->polltick = 0; | |
3724 | ||
3725 | /* Check device if no interrupts */ | |
80969836 AS |
3726 | if (!bus->intr || |
3727 | (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) { | |
5b435de0 AS |
3728 | |
3729 | if (!bus->dpc_sched) { | |
3730 | u8 devpend; | |
45db339c FL |
3731 | devpend = brcmf_sdio_regrb(bus->sdiodev, |
3732 | SDIO_CCCR_INTx, | |
3733 | NULL); | |
5b435de0 AS |
3734 | intstatus = |
3735 | devpend & (INTR_STATUS_FUNC1 | | |
3736 | INTR_STATUS_FUNC2); | |
3737 | } | |
3738 | ||
3739 | /* If there is something, make like the ISR and | |
3740 | schedule the DPC */ | |
3741 | if (intstatus) { | |
80969836 | 3742 | bus->sdcnt.pollcnt++; |
5b435de0 AS |
3743 | bus->ipend = true; |
3744 | ||
3745 | bus->dpc_sched = true; | |
b948a85c FL |
3746 | if (bus->dpc_tsk) { |
3747 | brcmf_sdbrcm_adddpctsk(bus); | |
5b435de0 | 3748 | complete(&bus->dpc_wait); |
b948a85c | 3749 | } |
5b435de0 AS |
3750 | } |
3751 | } | |
3752 | ||
3753 | /* Update interrupt tracking */ | |
80969836 | 3754 | bus->sdcnt.lastintrs = bus->sdcnt.intrcount; |
5b435de0 | 3755 | } |
8ae74654 | 3756 | #ifdef DEBUG |
5b435de0 | 3757 | /* Poll for console output periodically */ |
cad2b26b | 3758 | if (bus_if->state == BRCMF_BUS_DATA && |
8d169aa0 | 3759 | bus->console_interval != 0) { |
5b435de0 AS |
3760 | bus->console.count += BRCMF_WD_POLL_MS; |
3761 | if (bus->console.count >= bus->console_interval) { | |
3762 | bus->console.count -= bus->console_interval; | |
3763 | /* Make sure backplane clock is on */ | |
3764 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
3765 | if (brcmf_sdbrcm_readconsole(bus) < 0) | |
3766 | /* stop on error */ | |
3767 | bus->console_interval = 0; | |
3768 | } | |
3769 | } | |
8ae74654 | 3770 | #endif /* DEBUG */ |
5b435de0 AS |
3771 | |
3772 | /* On idle timeout clear activity flag and/or turn off clock */ | |
3773 | if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) { | |
3774 | if (++bus->idlecount >= bus->idletime) { | |
3775 | bus->idlecount = 0; | |
3776 | if (bus->activity) { | |
3777 | bus->activity = false; | |
3778 | brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS); | |
3779 | } else { | |
3780 | brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); | |
3781 | } | |
3782 | } | |
3783 | } | |
3784 | ||
3785 | up(&bus->sdsem); | |
3786 | ||
3787 | return bus->ipend; | |
3788 | } | |
3789 | ||
3790 | static bool brcmf_sdbrcm_chipmatch(u16 chipid) | |
3791 | { | |
4a1c02ce FL |
3792 | if (chipid == BCM43241_CHIP_ID) |
3793 | return true; | |
5b435de0 AS |
3794 | if (chipid == BCM4329_CHIP_ID) |
3795 | return true; | |
ce2d7d7e FL |
3796 | if (chipid == BCM4330_CHIP_ID) |
3797 | return true; | |
85a4a1c3 | 3798 | if (chipid == BCM4334_CHIP_ID) |
ce2d7d7e | 3799 | return true; |
5b435de0 AS |
3800 | return false; |
3801 | } | |
3802 | ||
e92eedf4 | 3803 | static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus) |
5b435de0 AS |
3804 | { |
3805 | brcmf_dbg(TRACE, "Enter\n"); | |
3806 | ||
3807 | kfree(bus->rxbuf); | |
3808 | bus->rxctl = bus->rxbuf = NULL; | |
3809 | bus->rxlen = 0; | |
3810 | ||
3811 | kfree(bus->databuf); | |
3812 | bus->databuf = NULL; | |
3813 | } | |
3814 | ||
e92eedf4 | 3815 | static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus) |
5b435de0 AS |
3816 | { |
3817 | brcmf_dbg(TRACE, "Enter\n"); | |
3818 | ||
b01a6b3c | 3819 | if (bus->sdiodev->bus_if->maxctl) { |
5b435de0 | 3820 | bus->rxblen = |
b01a6b3c | 3821 | roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN), |
5b435de0 AS |
3822 | ALIGNMENT) + BRCMF_SDALIGN; |
3823 | bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC); | |
3824 | if (!(bus->rxbuf)) | |
3825 | goto fail; | |
3826 | } | |
3827 | ||
3828 | /* Allocate buffer to receive glomed packet */ | |
3829 | bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC); | |
3830 | if (!(bus->databuf)) { | |
3831 | /* release rxbuf which was already located as above */ | |
3832 | if (!bus->rxblen) | |
3833 | kfree(bus->rxbuf); | |
3834 | goto fail; | |
3835 | } | |
3836 | ||
3837 | /* Align the buffer */ | |
3838 | if ((unsigned long)bus->databuf % BRCMF_SDALIGN) | |
3839 | bus->dataptr = bus->databuf + (BRCMF_SDALIGN - | |
3840 | ((unsigned long)bus->databuf % BRCMF_SDALIGN)); | |
3841 | else | |
3842 | bus->dataptr = bus->databuf; | |
3843 | ||
3844 | return true; | |
3845 | ||
3846 | fail: | |
3847 | return false; | |
3848 | } | |
3849 | ||
5b435de0 | 3850 | static bool |
e92eedf4 | 3851 | brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva) |
5b435de0 AS |
3852 | { |
3853 | u8 clkctl = 0; | |
3854 | int err = 0; | |
3855 | int reg_addr; | |
3856 | u32 reg_val; | |
99ba15cd | 3857 | u8 idx; |
5b435de0 AS |
3858 | |
3859 | bus->alp_only = true; | |
3860 | ||
18aad4f8 | 3861 | pr_debug("F1 signature read @0x18000000=0x%4x\n", |
79ae3957 | 3862 | brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL)); |
5b435de0 AS |
3863 | |
3864 | /* | |
a97e4fc5 | 3865 | * Force PLL off until brcmf_sdio_chip_attach() |
5b435de0 AS |
3866 | * programs PLL control regs |
3867 | */ | |
3868 | ||
3bba829f FL |
3869 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, |
3870 | BRCMF_INIT_CLKCTL1, &err); | |
5b435de0 | 3871 | if (!err) |
45db339c | 3872 | clkctl = brcmf_sdio_regrb(bus->sdiodev, |
5b435de0 AS |
3873 | SBSDIO_FUNC1_CHIPCLKCSR, &err); |
3874 | ||
3875 | if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) { | |
3876 | brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n", | |
3877 | err, BRCMF_INIT_CLKCTL1, clkctl); | |
3878 | goto fail; | |
3879 | } | |
3880 | ||
a97e4fc5 FL |
3881 | if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) { |
3882 | brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n"); | |
5b435de0 AS |
3883 | goto fail; |
3884 | } | |
3885 | ||
3886 | if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) { | |
3887 | brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip); | |
3888 | goto fail; | |
3889 | } | |
3890 | ||
e12afb6c FL |
3891 | brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, |
3892 | SDIO_DRIVE_STRENGTH); | |
5b435de0 | 3893 | |
454d2a88 | 3894 | /* Get info on the SOCRAM cores... */ |
5b435de0 AS |
3895 | bus->ramsize = bus->ci->ramsize; |
3896 | if (!(bus->ramsize)) { | |
3897 | brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n"); | |
3898 | goto fail; | |
3899 | } | |
3900 | ||
3901 | /* Set core control so an SDIO reset does a backplane reset */ | |
99ba15cd FL |
3902 | idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV); |
3903 | reg_addr = bus->ci->c_inf[idx].base + | |
5b435de0 | 3904 | offsetof(struct sdpcmd_regs, corecontrol); |
79ae3957 | 3905 | reg_val = brcmf_sdio_regrl(bus->sdiodev, reg_addr, NULL); |
e13ce26b | 3906 | brcmf_sdio_regwl(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN, NULL); |
5b435de0 AS |
3907 | |
3908 | brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN); | |
3909 | ||
3910 | /* Locate an appropriately-aligned portion of hdrbuf */ | |
3911 | bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0], | |
3912 | BRCMF_SDALIGN); | |
3913 | ||
3914 | /* Set the poll and/or interrupt flags */ | |
3915 | bus->intr = true; | |
3916 | bus->poll = false; | |
3917 | if (bus->poll) | |
3918 | bus->pollrate = 1; | |
3919 | ||
3920 | return true; | |
3921 | ||
3922 | fail: | |
3923 | return false; | |
3924 | } | |
3925 | ||
e92eedf4 | 3926 | static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus) |
5b435de0 AS |
3927 | { |
3928 | brcmf_dbg(TRACE, "Enter\n"); | |
3929 | ||
3930 | /* Disable F2 to clear any intermediate frame state on the dongle */ | |
3bba829f FL |
3931 | brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, |
3932 | SDIO_FUNC_ENABLE_1, NULL); | |
5b435de0 | 3933 | |
712ac5b3 | 3934 | bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; |
5b435de0 AS |
3935 | bus->rxflow = false; |
3936 | ||
3937 | /* Done with backplane-dependent accesses, can drop clock... */ | |
3bba829f | 3938 | brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL); |
5b435de0 AS |
3939 | |
3940 | /* ...and initialize clock/power states */ | |
3941 | bus->clkstate = CLK_SDONLY; | |
3942 | bus->idletime = BRCMF_IDLE_INTERVAL; | |
3943 | bus->idleclock = BRCMF_IDLE_ACTIVE; | |
3944 | ||
3945 | /* Query the F2 block size, set roundup accordingly */ | |
3946 | bus->blocksize = bus->sdiodev->func[2]->cur_blksize; | |
3947 | bus->roundup = min(max_roundup, bus->blocksize); | |
3948 | ||
3949 | /* bus module does not support packet chaining */ | |
3950 | bus->use_rxchain = false; | |
3951 | bus->sd_rxchain = false; | |
3952 | ||
3953 | return true; | |
3954 | } | |
3955 | ||
3956 | static int | |
3957 | brcmf_sdbrcm_watchdog_thread(void *data) | |
3958 | { | |
e92eedf4 | 3959 | struct brcmf_sdio *bus = (struct brcmf_sdio *)data; |
5b435de0 AS |
3960 | |
3961 | allow_signal(SIGTERM); | |
3962 | /* Run until signal received */ | |
3963 | while (1) { | |
3964 | if (kthread_should_stop()) | |
3965 | break; | |
3966 | if (!wait_for_completion_interruptible(&bus->watchdog_wait)) { | |
cad2b26b | 3967 | brcmf_sdbrcm_bus_watchdog(bus); |
5b435de0 | 3968 | /* Count the tick for reference */ |
80969836 | 3969 | bus->sdcnt.tickcnt++; |
5b435de0 AS |
3970 | } else |
3971 | break; | |
3972 | } | |
3973 | return 0; | |
3974 | } | |
3975 | ||
3976 | static void | |
3977 | brcmf_sdbrcm_watchdog(unsigned long data) | |
3978 | { | |
e92eedf4 | 3979 | struct brcmf_sdio *bus = (struct brcmf_sdio *)data; |
5b435de0 AS |
3980 | |
3981 | if (bus->watchdog_tsk) { | |
3982 | complete(&bus->watchdog_wait); | |
3983 | /* Reschedule the watchdog */ | |
3984 | if (bus->wd_timer_valid) | |
3985 | mod_timer(&bus->timer, | |
3986 | jiffies + BRCMF_WD_POLL_MS * HZ / 1000); | |
3987 | } | |
3988 | } | |
3989 | ||
e92eedf4 | 3990 | static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus) |
5b435de0 AS |
3991 | { |
3992 | brcmf_dbg(TRACE, "Enter\n"); | |
3993 | ||
3994 | if (bus->ci) { | |
3995 | brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); | |
3996 | brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); | |
a8a6c045 | 3997 | brcmf_sdio_chip_detach(&bus->ci); |
5b435de0 AS |
3998 | if (bus->vars && bus->varsz) |
3999 | kfree(bus->vars); | |
4000 | bus->vars = NULL; | |
4001 | } | |
4002 | ||
4003 | brcmf_dbg(TRACE, "Disconnected\n"); | |
4004 | } | |
4005 | ||
4006 | /* Detach and free everything */ | |
e92eedf4 | 4007 | static void brcmf_sdbrcm_release(struct brcmf_sdio *bus) |
5b435de0 AS |
4008 | { |
4009 | brcmf_dbg(TRACE, "Enter\n"); | |
4fc0d016 | 4010 | |
5b435de0 AS |
4011 | if (bus) { |
4012 | /* De-register interrupt handler */ | |
ba89bf19 | 4013 | brcmf_sdio_intr_unregister(bus->sdiodev); |
5b435de0 | 4014 | |
5f947ad9 FL |
4015 | if (bus->sdiodev->bus_if->drvr) { |
4016 | brcmf_detach(bus->sdiodev->dev); | |
5b435de0 | 4017 | brcmf_sdbrcm_release_dongle(bus); |
5b435de0 AS |
4018 | } |
4019 | ||
4020 | brcmf_sdbrcm_release_malloc(bus); | |
4021 | ||
4022 | kfree(bus); | |
4023 | } | |
4024 | ||
4025 | brcmf_dbg(TRACE, "Disconnected\n"); | |
4026 | } | |
4027 | ||
4175b88b | 4028 | void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev) |
5b435de0 AS |
4029 | { |
4030 | int ret; | |
e92eedf4 | 4031 | struct brcmf_sdio *bus; |
bbfd6a66 FL |
4032 | struct brcmf_bus_dcmd *dlst; |
4033 | u32 dngl_txglom; | |
c3d2bc35 | 4034 | u32 dngl_txglomalign; |
bbfd6a66 | 4035 | u8 idx; |
5b435de0 | 4036 | |
5b435de0 AS |
4037 | brcmf_dbg(TRACE, "Enter\n"); |
4038 | ||
4039 | /* We make an assumption about address window mappings: | |
4040 | * regsva == SI_ENUM_BASE*/ | |
4041 | ||
4042 | /* Allocate private bus interface state */ | |
e92eedf4 | 4043 | bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC); |
5b435de0 AS |
4044 | if (!bus) |
4045 | goto fail; | |
4046 | ||
4047 | bus->sdiodev = sdiodev; | |
4048 | sdiodev->bus = bus; | |
b83db862 | 4049 | skb_queue_head_init(&bus->glom); |
5b435de0 AS |
4050 | bus->txbound = BRCMF_TXBOUND; |
4051 | bus->rxbound = BRCMF_RXBOUND; | |
4052 | bus->txminmax = BRCMF_TXMINMAX; | |
4053 | bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1; | |
4054 | bus->usebufpool = false; /* Use bufpool if allocated, | |
4055 | else use locally malloced rxbuf */ | |
4056 | ||
4057 | /* attempt to attach to the dongle */ | |
4058 | if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) { | |
4059 | brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n"); | |
4060 | goto fail; | |
4061 | } | |
4062 | ||
4063 | spin_lock_init(&bus->txqlock); | |
4064 | init_waitqueue_head(&bus->ctrl_wait); | |
4065 | init_waitqueue_head(&bus->dcmd_resp_wait); | |
4066 | ||
4067 | /* Set up the watchdog timer */ | |
4068 | init_timer(&bus->timer); | |
4069 | bus->timer.data = (unsigned long)bus; | |
4070 | bus->timer.function = brcmf_sdbrcm_watchdog; | |
4071 | ||
4072 | /* Initialize thread based operation and lock */ | |
4073 | sema_init(&bus->sdsem, 1); | |
4074 | ||
4075 | /* Initialize watchdog thread */ | |
4076 | init_completion(&bus->watchdog_wait); | |
4077 | bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread, | |
4078 | bus, "brcmf_watchdog"); | |
4079 | if (IS_ERR(bus->watchdog_tsk)) { | |
02f77195 | 4080 | pr_warn("brcmf_watchdog thread failed to start\n"); |
5b435de0 AS |
4081 | bus->watchdog_tsk = NULL; |
4082 | } | |
4083 | /* Initialize DPC thread */ | |
4084 | init_completion(&bus->dpc_wait); | |
b948a85c FL |
4085 | INIT_LIST_HEAD(&bus->dpc_tsklst); |
4086 | spin_lock_init(&bus->dpc_tl_lock); | |
5b435de0 AS |
4087 | bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread, |
4088 | bus, "brcmf_dpc"); | |
4089 | if (IS_ERR(bus->dpc_tsk)) { | |
02f77195 | 4090 | pr_warn("brcmf_dpc thread failed to start\n"); |
5b435de0 AS |
4091 | bus->dpc_tsk = NULL; |
4092 | } | |
4093 | ||
a9ffda88 FL |
4094 | /* Assign bus interface call back */ |
4095 | bus->sdiodev->bus_if->brcmf_bus_stop = brcmf_sdbrcm_bus_stop; | |
99a0b8ff | 4096 | bus->sdiodev->bus_if->brcmf_bus_init = brcmf_sdbrcm_bus_init; |
b9692d17 | 4097 | bus->sdiodev->bus_if->brcmf_bus_txdata = brcmf_sdbrcm_bus_txdata; |
fcf094f4 FL |
4098 | bus->sdiodev->bus_if->brcmf_bus_txctl = brcmf_sdbrcm_bus_txctl; |
4099 | bus->sdiodev->bus_if->brcmf_bus_rxctl = brcmf_sdbrcm_bus_rxctl; | |
5b435de0 | 4100 | /* Attach to the brcmf/OS/network interface */ |
2447ffb0 | 4101 | ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev); |
712ac5b3 | 4102 | if (ret != 0) { |
5b435de0 AS |
4103 | brcmf_dbg(ERROR, "brcmf_attach failed\n"); |
4104 | goto fail; | |
4105 | } | |
4106 | ||
4107 | /* Allocate buffers */ | |
4108 | if (!(brcmf_sdbrcm_probe_malloc(bus))) { | |
4109 | brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n"); | |
4110 | goto fail; | |
4111 | } | |
4112 | ||
4113 | if (!(brcmf_sdbrcm_probe_init(bus))) { | |
4114 | brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n"); | |
4115 | goto fail; | |
4116 | } | |
4117 | ||
80969836 | 4118 | brcmf_sdio_debugfs_create(bus); |
5b435de0 AS |
4119 | brcmf_dbg(INFO, "completed!!\n"); |
4120 | ||
bbfd6a66 FL |
4121 | /* sdio bus core specific dcmd */ |
4122 | idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV); | |
4123 | dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL); | |
c3d2bc35 FL |
4124 | if (dlst) { |
4125 | if (bus->ci->c_inf[idx].rev < 12) { | |
4126 | /* for sdio core rev < 12, disable txgloming */ | |
4127 | dngl_txglom = 0; | |
4128 | dlst->name = "bus:txglom"; | |
4129 | dlst->param = (char *)&dngl_txglom; | |
4130 | dlst->param_len = sizeof(u32); | |
4131 | } else { | |
4132 | /* otherwise, set txglomalign */ | |
4133 | dngl_txglomalign = bus->sdiodev->bus_if->align; | |
4134 | dlst->name = "bus:txglomalign"; | |
4135 | dlst->param = (char *)&dngl_txglomalign; | |
4136 | dlst->param_len = sizeof(u32); | |
4137 | } | |
bbfd6a66 FL |
4138 | list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list); |
4139 | } | |
4140 | ||
5b435de0 | 4141 | /* if firmware path present try to download and bring up bus */ |
ed683c98 | 4142 | ret = brcmf_bus_start(bus->sdiodev->dev); |
5b435de0 AS |
4143 | if (ret != 0) { |
4144 | if (ret == -ENOLINK) { | |
4145 | brcmf_dbg(ERROR, "dongle is not responding\n"); | |
4146 | goto fail; | |
4147 | } | |
4148 | } | |
15d45b6f | 4149 | |
5b435de0 AS |
4150 | return bus; |
4151 | ||
4152 | fail: | |
4153 | brcmf_sdbrcm_release(bus); | |
4154 | return NULL; | |
4155 | } | |
4156 | ||
4157 | void brcmf_sdbrcm_disconnect(void *ptr) | |
4158 | { | |
e92eedf4 | 4159 | struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr; |
5b435de0 AS |
4160 | |
4161 | brcmf_dbg(TRACE, "Enter\n"); | |
4162 | ||
4163 | if (bus) | |
4164 | brcmf_sdbrcm_release(bus); | |
4165 | ||
4166 | brcmf_dbg(TRACE, "Disconnected\n"); | |
4167 | } | |
4168 | ||
5b435de0 | 4169 | void |
e92eedf4 | 4170 | brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick) |
5b435de0 | 4171 | { |
5b435de0 | 4172 | /* Totally stop the timer */ |
23677ce3 | 4173 | if (!wdtick && bus->wd_timer_valid) { |
5b435de0 AS |
4174 | del_timer_sync(&bus->timer); |
4175 | bus->wd_timer_valid = false; | |
4176 | bus->save_ms = wdtick; | |
4177 | return; | |
4178 | } | |
4179 | ||
ece960ea | 4180 | /* don't start the wd until fw is loaded */ |
712ac5b3 | 4181 | if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) |
ece960ea FL |
4182 | return; |
4183 | ||
5b435de0 AS |
4184 | if (wdtick) { |
4185 | if (bus->save_ms != BRCMF_WD_POLL_MS) { | |
23677ce3 | 4186 | if (bus->wd_timer_valid) |
5b435de0 AS |
4187 | /* Stop timer and restart at new value */ |
4188 | del_timer_sync(&bus->timer); | |
4189 | ||
4190 | /* Create timer again when watchdog period is | |
4191 | dynamically changed or in the first instance | |
4192 | */ | |
4193 | bus->timer.expires = | |
4194 | jiffies + BRCMF_WD_POLL_MS * HZ / 1000; | |
4195 | add_timer(&bus->timer); | |
4196 | ||
4197 | } else { | |
4198 | /* Re arm the timer, at last watchdog period */ | |
4199 | mod_timer(&bus->timer, | |
4200 | jiffies + BRCMF_WD_POLL_MS * HZ / 1000); | |
4201 | } | |
4202 | ||
4203 | bus->wd_timer_valid = true; | |
4204 | bus->save_ms = wdtick; | |
4205 | } | |
4206 | } |