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c85eb619 EG |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. |
8d193ca2 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
c85eb619 EG |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of version 2 of the GNU General Public License as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but | |
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
23 | * USA | |
24 | * | |
25 | * The full GNU General Public License is included in this distribution | |
410dc5aa | 26 | * in the file called COPYING. |
c85eb619 EG |
27 | * |
28 | * Contact Information: | |
cb2f8277 | 29 | * Intel Linux Wireless <linuxwifi@intel.com> |
c85eb619 EG |
30 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
31 | * | |
32 | * BSD LICENSE | |
33 | * | |
51368bf7 | 34 | * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. |
8d193ca2 | 35 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
c85eb619 EG |
36 | * All rights reserved. |
37 | * | |
38 | * Redistribution and use in source and binary forms, with or without | |
39 | * modification, are permitted provided that the following conditions | |
40 | * are met: | |
41 | * | |
42 | * * Redistributions of source code must retain the above copyright | |
43 | * notice, this list of conditions and the following disclaimer. | |
44 | * * Redistributions in binary form must reproduce the above copyright | |
45 | * notice, this list of conditions and the following disclaimer in | |
46 | * the documentation and/or other materials provided with the | |
47 | * distribution. | |
48 | * * Neither the name Intel Corporation nor the names of its | |
49 | * contributors may be used to endorse or promote products derived | |
50 | * from this software without specific prior written permission. | |
51 | * | |
52 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
53 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
54 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
55 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
56 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
57 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
58 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
59 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
60 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
61 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
62 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
63 | * | |
64 | *****************************************************************************/ | |
41c50542 EG |
65 | #ifndef __iwl_trans_h__ |
66 | #define __iwl_trans_h__ | |
253a634c | 67 | |
e679378d | 68 | #include <linux/ieee80211.h> |
930dfd5f | 69 | #include <linux/mm.h> /* for page_address */ |
2bfb5092 | 70 | #include <linux/lockdep.h> |
39bdb17e | 71 | #include <linux/kernel.h> |
a72b8b08 | 72 | |
69655ebf | 73 | #include "iwl-debug.h" |
6238b008 JB |
74 | #include "iwl-config.h" |
75 | #include "iwl-fw.h" | |
2a988e98 | 76 | #include "iwl-op-mode.h" |
87e5666c | 77 | |
60396183 EG |
78 | /** |
79 | * DOC: Transport layer - what is it ? | |
80 | * | |
0d365ae5 | 81 | * The transport layer is the layer that deals with the HW directly. It provides |
60396183 EG |
82 | * an abstraction of the underlying HW to the upper layer. The transport layer |
83 | * doesn't provide any policy, algorithm or anything of this kind, but only | |
0d365ae5 | 84 | * mechanisms to make the HW do something. It is not completely stateless but |
60396183 EG |
85 | * close to it. |
86 | * We will have an implementation for each different supported bus. | |
87 | */ | |
88 | ||
89 | /** | |
90 | * DOC: Life cycle of the transport layer | |
91 | * | |
92 | * The transport layer has a very precise life cycle. | |
93 | * | |
94 | * 1) A helper function is called during the module initialization and | |
95 | * registers the bus driver's ops with the transport's alloc function. | |
96 | * 2) Bus's probe calls to the transport layer's allocation functions. | |
97 | * Of course this function is bus specific. | |
98 | * 3) This allocation functions will spawn the upper layer which will | |
99 | * register mac80211. | |
100 | * | |
101 | * 4) At some point (i.e. mac80211's start call), the op_mode will call | |
102 | * the following sequence: | |
103 | * start_hw | |
104 | * start_fw | |
105 | * | |
106 | * 5) Then when finished (or reset): | |
a4082843 | 107 | * stop_device |
60396183 EG |
108 | * |
109 | * 6) Eventually, the free function will be called. | |
110 | */ | |
111 | ||
60396183 EG |
112 | /** |
113 | * DOC: Host command section | |
114 | * | |
0d365ae5 | 115 | * A host command is a command issued by the upper layer to the fw. There are |
60396183 EG |
116 | * several versions of fw that have several APIs. The transport layer is |
117 | * completely agnostic to these differences. | |
0d365ae5 | 118 | * The transport does provide helper functionality (i.e. SYNC / ASYNC mode), |
60396183 | 119 | */ |
f8d7c1a1 JB |
120 | #define SEQ_TO_QUEUE(s) (((s) >> 8) & 0x1f) |
121 | #define QUEUE_TO_SEQ(q) (((q) & 0x1f) << 8) | |
122 | #define SEQ_TO_INDEX(s) ((s) & 0xff) | |
123 | #define INDEX_TO_SEQ(i) ((i) & 0xff) | |
124 | #define SEQ_RX_FRAME cpu_to_le16(0x8000) | |
125 | ||
ab02165c AE |
126 | /* |
127 | * those functions retrieve specific information from | |
128 | * the id field in the iwl_host_cmd struct which contains | |
129 | * the command id, the group id and the version of the command | |
130 | * and vice versa | |
131 | */ | |
132 | static inline u8 iwl_cmd_opcode(u32 cmdid) | |
133 | { | |
134 | return cmdid & 0xFF; | |
135 | } | |
136 | ||
137 | static inline u8 iwl_cmd_groupid(u32 cmdid) | |
138 | { | |
139 | return ((cmdid & 0xFF00) >> 8); | |
140 | } | |
141 | ||
142 | static inline u8 iwl_cmd_version(u32 cmdid) | |
143 | { | |
144 | return ((cmdid & 0xFF0000) >> 16); | |
145 | } | |
146 | ||
147 | static inline u32 iwl_cmd_id(u8 opcode, u8 groupid, u8 version) | |
148 | { | |
149 | return opcode + (groupid << 8) + (version << 16); | |
150 | } | |
151 | ||
6eb031d2 SS |
152 | /* make u16 wide id out of u8 group and opcode */ |
153 | #define WIDE_ID(grp, opcode) ((grp << 8) | opcode) | |
154 | ||
88742c9e JB |
155 | /* due to the conversion, this group is special; new groups |
156 | * should be defined in the appropriate fw-api header files | |
157 | */ | |
158 | #define IWL_ALWAYS_LONG_GROUP 1 | |
159 | ||
f8d7c1a1 JB |
160 | /** |
161 | * struct iwl_cmd_header | |
162 | * | |
163 | * This header format appears in the beginning of each command sent from the | |
164 | * driver, and each response/notification received from uCode. | |
165 | */ | |
166 | struct iwl_cmd_header { | |
167 | u8 cmd; /* Command ID: REPLY_RXON, etc. */ | |
ab02165c | 168 | u8 group_id; |
f8d7c1a1 JB |
169 | /* |
170 | * The driver sets up the sequence number to values of its choosing. | |
171 | * uCode does not use this value, but passes it back to the driver | |
172 | * when sending the response to each driver-originated command, so | |
173 | * the driver can match the response to the command. Since the values | |
174 | * don't get used by uCode, the driver may set up an arbitrary format. | |
175 | * | |
176 | * There is one exception: uCode sets bit 15 when it originates | |
177 | * the response/notification, i.e. when the response/notification | |
178 | * is not a direct response to a command sent by the driver. For | |
179 | * example, uCode issues REPLY_RX when it sends a received frame | |
180 | * to the driver; it is not a direct response to any driver command. | |
181 | * | |
182 | * The Linux driver uses the following format: | |
183 | * | |
184 | * 0:7 tfd index - position within TX queue | |
185 | * 8:12 TX queue id | |
186 | * 13:14 reserved | |
187 | * 15 unsolicited RX or uCode-originated notification | |
188 | */ | |
189 | __le16 sequence; | |
190 | } __packed; | |
191 | ||
ab02165c AE |
192 | /** |
193 | * struct iwl_cmd_header_wide | |
194 | * | |
195 | * This header format appears in the beginning of each command sent from the | |
196 | * driver, and each response/notification received from uCode. | |
197 | * this is the wide version that contains more information about the command | |
198 | * like length, version and command type | |
199 | */ | |
200 | struct iwl_cmd_header_wide { | |
201 | u8 cmd; | |
202 | u8 group_id; | |
203 | __le16 sequence; | |
204 | __le16 length; | |
205 | u8 reserved; | |
206 | u8 version; | |
207 | } __packed; | |
208 | ||
f8d7c1a1 | 209 | #define FH_RSCSR_FRAME_SIZE_MSK 0x00003FFF /* bits 0-13 */ |
0c19744c JB |
210 | #define FH_RSCSR_FRAME_INVALID 0x55550000 |
211 | #define FH_RSCSR_FRAME_ALIGN 0x40 | |
f8d7c1a1 JB |
212 | |
213 | struct iwl_rx_packet { | |
214 | /* | |
215 | * The first 4 bytes of the RX frame header contain both the RX frame | |
216 | * size and some flags. | |
217 | * Bit fields: | |
218 | * 31: flag flush RB request | |
219 | * 30: flag ignore TC (terminal counter) request | |
220 | * 29: flag fast IRQ request | |
221 | * 28-14: Reserved | |
222 | * 13-00: RX frame size | |
223 | */ | |
224 | __le32 len_n_flags; | |
225 | struct iwl_cmd_header hdr; | |
226 | u8 data[]; | |
227 | } __packed; | |
522376d2 | 228 | |
65b30348 JB |
229 | static inline u32 iwl_rx_packet_len(const struct iwl_rx_packet *pkt) |
230 | { | |
231 | return le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; | |
232 | } | |
233 | ||
234 | static inline u32 iwl_rx_packet_payload_len(const struct iwl_rx_packet *pkt) | |
235 | { | |
236 | return iwl_rx_packet_len(pkt) - sizeof(pkt->hdr); | |
237 | } | |
238 | ||
60396183 EG |
239 | /** |
240 | * enum CMD_MODE - how to send the host commands ? | |
241 | * | |
e89044d7 | 242 | * @CMD_ASYNC: Return right away and don't wait for the response |
a1022927 EG |
243 | * @CMD_WANT_SKB: Not valid with CMD_ASYNC. The caller needs the buffer of |
244 | * the response. The caller needs to call iwl_free_resp when done. | |
98ee7783 | 245 | * @CMD_HIGH_PRIO: The command is high priority - it goes to the front of the |
0d365ae5 | 246 | * command queue, but after other high priority commands. Valid only |
98ee7783 AN |
247 | * with CMD_ASYNC. |
248 | * @CMD_SEND_IN_IDLE: The command should be sent even when the trans is idle. | |
249 | * @CMD_MAKE_TRANS_IDLE: The command response should mark the trans as idle. | |
250 | * @CMD_WAKE_UP_TRANS: The command response should wake up the trans | |
251 | * (i.e. mark it as non-idle). | |
dcbb4746 EG |
252 | * @CMD_WANT_ASYNC_CALLBACK: the op_mode's async callback function must be |
253 | * called after this command completes. Valid only with CMD_ASYNC. | |
206eea78 JB |
254 | * @CMD_TB_BITMAP_POS: Position of the first bit for the TB bitmap. We need to |
255 | * check that we leave enough room for the TBs bitmap which needs 20 bits. | |
60396183 EG |
256 | */ |
257 | enum CMD_MODE { | |
4a4ee101 JB |
258 | CMD_ASYNC = BIT(0), |
259 | CMD_WANT_SKB = BIT(1), | |
4f59334b | 260 | CMD_SEND_IN_RFKILL = BIT(2), |
98ee7783 AN |
261 | CMD_HIGH_PRIO = BIT(3), |
262 | CMD_SEND_IN_IDLE = BIT(4), | |
263 | CMD_MAKE_TRANS_IDLE = BIT(5), | |
264 | CMD_WAKE_UP_TRANS = BIT(6), | |
dcbb4746 | 265 | CMD_WANT_ASYNC_CALLBACK = BIT(7), |
206eea78 JB |
266 | |
267 | CMD_TB_BITMAP_POS = 11, | |
522376d2 EG |
268 | }; |
269 | ||
270 | #define DEF_CMD_PAYLOAD_SIZE 320 | |
271 | ||
272 | /** | |
273 | * struct iwl_device_cmd | |
274 | * | |
275 | * For allocation of the command and tx queues, this establishes the overall | |
276 | * size of the largest command we send to uCode, except for commands that | |
277 | * aren't fully copied and use other TFD space. | |
278 | */ | |
279 | struct iwl_device_cmd { | |
ab02165c AE |
280 | union { |
281 | struct { | |
282 | struct iwl_cmd_header hdr; /* uCode API */ | |
283 | u8 payload[DEF_CMD_PAYLOAD_SIZE]; | |
284 | }; | |
285 | struct { | |
286 | struct iwl_cmd_header_wide hdr_wide; | |
287 | u8 payload_wide[DEF_CMD_PAYLOAD_SIZE - | |
288 | sizeof(struct iwl_cmd_header_wide) + | |
289 | sizeof(struct iwl_cmd_header)]; | |
290 | }; | |
291 | }; | |
522376d2 EG |
292 | } __packed; |
293 | ||
294 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) | |
295 | ||
1afbfb60 JB |
296 | /* |
297 | * number of transfer buffers (fragments) per transmit frame descriptor; | |
298 | * this is just the driver's idea, the hardware supports 20 | |
299 | */ | |
300 | #define IWL_MAX_CMD_TBS_PER_TFD 2 | |
522376d2 | 301 | |
60396183 EG |
302 | /** |
303 | * struct iwl_hcmd_dataflag - flag for each one of the chunks of the command | |
304 | * | |
f4feb8ac | 305 | * @IWL_HCMD_DFL_NOCOPY: By default, the command is copied to the host command's |
60396183 | 306 | * ring. The transport layer doesn't map the command's buffer to DMA, but |
e89044d7 | 307 | * rather copies it to a previously allocated DMA buffer. This flag tells |
60396183 | 308 | * the transport layer not to copy the command, but to map the existing |
3e2c1592 JB |
309 | * buffer (that is passed in) instead. This saves the memcpy and allows |
310 | * commands that are bigger than the fixed buffer to be submitted. | |
311 | * Note that a TFD entry after a NOCOPY one cannot be a normal copied one. | |
f4feb8ac JB |
312 | * @IWL_HCMD_DFL_DUP: Only valid without NOCOPY, duplicate the memory for this |
313 | * chunk internally and free it again after the command completes. This | |
314 | * can (currently) be used only once per command. | |
3e2c1592 | 315 | * Note that a TFD entry after a DUP one cannot be a normal copied one. |
60396183 | 316 | */ |
522376d2 EG |
317 | enum iwl_hcmd_dataflag { |
318 | IWL_HCMD_DFL_NOCOPY = BIT(0), | |
f4feb8ac | 319 | IWL_HCMD_DFL_DUP = BIT(1), |
522376d2 EG |
320 | }; |
321 | ||
322 | /** | |
323 | * struct iwl_host_cmd - Host command to the uCode | |
60396183 | 324 | * |
522376d2 | 325 | * @data: array of chunks that composes the data of the host command |
65b94a4a JB |
326 | * @resp_pkt: response packet, if %CMD_WANT_SKB was set |
327 | * @_rx_page_order: (internally used to free response packet) | |
328 | * @_rx_page_addr: (internally used to free response packet) | |
60396183 | 329 | * @flags: can be CMD_* |
e89044d7 | 330 | * @len: array of the lengths of the chunks in data |
60396183 | 331 | * @dataflags: IWL_HCMD_DFL_* |
ab02165c AE |
332 | * @id: command id of the host command, for wide commands encoding the |
333 | * version and group as well | |
522376d2 EG |
334 | */ |
335 | struct iwl_host_cmd { | |
1afbfb60 | 336 | const void *data[IWL_MAX_CMD_TBS_PER_TFD]; |
65b94a4a JB |
337 | struct iwl_rx_packet *resp_pkt; |
338 | unsigned long _rx_page_addr; | |
339 | u32 _rx_page_order; | |
247c61d6 | 340 | |
522376d2 | 341 | u32 flags; |
ab02165c | 342 | u32 id; |
1afbfb60 JB |
343 | u16 len[IWL_MAX_CMD_TBS_PER_TFD]; |
344 | u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD]; | |
522376d2 | 345 | }; |
41c50542 | 346 | |
65b94a4a JB |
347 | static inline void iwl_free_resp(struct iwl_host_cmd *cmd) |
348 | { | |
349 | free_pages(cmd->_rx_page_addr, cmd->_rx_page_order); | |
350 | } | |
351 | ||
930dfd5f JB |
352 | struct iwl_rx_cmd_buffer { |
353 | struct page *_page; | |
0c19744c JB |
354 | int _offset; |
355 | bool _page_stolen; | |
d13f1862 | 356 | u32 _rx_page_order; |
ed90542b | 357 | unsigned int truesize; |
930dfd5f JB |
358 | }; |
359 | ||
360 | static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r) | |
361 | { | |
0c19744c JB |
362 | return (void *)((unsigned long)page_address(r->_page) + r->_offset); |
363 | } | |
364 | ||
365 | static inline int rxb_offset(struct iwl_rx_cmd_buffer *r) | |
366 | { | |
367 | return r->_offset; | |
930dfd5f JB |
368 | } |
369 | ||
370 | static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r) | |
371 | { | |
0c19744c JB |
372 | r->_page_stolen = true; |
373 | get_page(r->_page); | |
374 | return r->_page; | |
930dfd5f JB |
375 | } |
376 | ||
d13f1862 EG |
377 | static inline void iwl_free_rxb(struct iwl_rx_cmd_buffer *r) |
378 | { | |
379 | __free_pages(r->_page, r->_rx_page_order); | |
380 | } | |
381 | ||
d663ee73 JB |
382 | #define MAX_NO_RECLAIM_CMDS 6 |
383 | ||
6eb5e529 EG |
384 | /* |
385 | * The first entry in driver_data array in ieee80211_tx_info | |
386 | * that can be used by the transport. | |
387 | */ | |
388 | #define IWL_TRANS_FIRST_DRIVER_DATA 2 | |
ff110c8f GG |
389 | #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo)))) |
390 | ||
9eae88fa JB |
391 | /* |
392 | * Maximum number of HW queues the transport layer | |
393 | * currently supports | |
394 | */ | |
395 | #define IWL_MAX_HW_QUEUES 32 | |
b04db9ac EG |
396 | #define IWL_MAX_TID_COUNT 8 |
397 | #define IWL_FRAME_LIMIT 64 | |
56882e6c | 398 | #define IWL_MAX_RX_HW_QUEUES 16 |
9eae88fa | 399 | |
ddaf5a5b JB |
400 | /** |
401 | * enum iwl_wowlan_status - WoWLAN image/device status | |
402 | * @IWL_D3_STATUS_ALIVE: firmware is still running after resume | |
403 | * @IWL_D3_STATUS_RESET: device was reset while suspended | |
404 | */ | |
405 | enum iwl_d3_status { | |
406 | IWL_D3_STATUS_ALIVE, | |
407 | IWL_D3_STATUS_RESET, | |
408 | }; | |
409 | ||
eb7ff77e AN |
410 | /** |
411 | * enum iwl_trans_status: transport status flags | |
412 | * @STATUS_SYNC_HCMD_ACTIVE: a SYNC command is being processed | |
413 | * @STATUS_DEVICE_ENABLED: APM is enabled | |
414 | * @STATUS_TPOWER_PMI: the device might be asleep (need to wake it up) | |
415 | * @STATUS_INT_ENABLED: interrupts are enabled | |
416 | * @STATUS_RFKILL: the HW RFkill switch is in KILL position | |
417 | * @STATUS_FW_ERROR: the fw is in error state | |
98ee7783 AN |
418 | * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands |
419 | * are sent | |
420 | * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent | |
053225de | 421 | * @STATUS_TRANS_DEAD: trans is dead - avoid any read/write operation |
eb7ff77e AN |
422 | */ |
423 | enum iwl_trans_status { | |
424 | STATUS_SYNC_HCMD_ACTIVE, | |
425 | STATUS_DEVICE_ENABLED, | |
426 | STATUS_TPOWER_PMI, | |
427 | STATUS_INT_ENABLED, | |
428 | STATUS_RFKILL, | |
429 | STATUS_FW_ERROR, | |
98ee7783 AN |
430 | STATUS_TRANS_GOING_IDLE, |
431 | STATUS_TRANS_IDLE, | |
053225de | 432 | STATUS_TRANS_DEAD, |
eb7ff77e AN |
433 | }; |
434 | ||
6c4fbcbc EG |
435 | static inline int |
436 | iwl_trans_get_rb_size_order(enum iwl_amsdu_size rb_size) | |
437 | { | |
438 | switch (rb_size) { | |
439 | case IWL_AMSDU_4K: | |
440 | return get_order(4 * 1024); | |
441 | case IWL_AMSDU_8K: | |
442 | return get_order(8 * 1024); | |
443 | case IWL_AMSDU_12K: | |
444 | return get_order(12 * 1024); | |
445 | default: | |
446 | WARN_ON(1); | |
447 | return -1; | |
448 | } | |
449 | } | |
450 | ||
39bdb17e SD |
451 | struct iwl_hcmd_names { |
452 | u8 cmd_id; | |
453 | const char *const cmd_name; | |
454 | }; | |
455 | ||
456 | #define HCMD_NAME(x) \ | |
457 | { .cmd_id = x, .cmd_name = #x } | |
458 | ||
459 | struct iwl_hcmd_arr { | |
460 | const struct iwl_hcmd_names *arr; | |
461 | int size; | |
462 | }; | |
463 | ||
464 | #define HCMD_ARR(x) \ | |
465 | { .arr = x, .size = ARRAY_SIZE(x) } | |
466 | ||
92d743ae MV |
467 | /** |
468 | * struct iwl_trans_config - transport configuration | |
469 | * | |
470 | * @op_mode: pointer to the upper layer. | |
c6f600fc MV |
471 | * @cmd_queue: the index of the command queue. |
472 | * Must be set before start_fw. | |
b04db9ac | 473 | * @cmd_fifo: the fifo for host commands |
4cf677fd | 474 | * @cmd_q_wdg_timeout: the timeout of the watchdog timer for the command queue. |
d663ee73 JB |
475 | * @no_reclaim_cmds: Some devices erroneously don't set the |
476 | * SEQ_RX_FRAME bit on some notifications, this is the | |
477 | * list of such notifications to filter. Max length is | |
478 | * %MAX_NO_RECLAIM_CMDS. | |
479 | * @n_no_reclaim_cmds: # of commands in list | |
6c4fbcbc | 480 | * @rx_buf_size: RX buffer size needed for A-MSDUs |
b2cf410c | 481 | * if unset 4k will be the RX buffer size |
046db346 EG |
482 | * @bc_table_dword: set to true if the BC table expects the byte count to be |
483 | * in DWORD (as opposed to bytes) | |
3a736bcb | 484 | * @scd_set_active: should the transport configure the SCD for HCMD queue |
ab02165c | 485 | * @wide_cmd_header: firmware supports wide host command header |
41837ca9 | 486 | * @sw_csum_tx: transport should compute the TCP checksum |
39bdb17e SD |
487 | * @command_groups: array of command groups, each member is an array of the |
488 | * commands in the group; for debugging only | |
489 | * @command_groups_size: number of command groups, to avoid illegal access | |
b4821767 LK |
490 | * @sdio_adma_addr: the default address to set for the ADMA in SDIO mode until |
491 | * we get the ALIVE from the uCode | |
92d743ae MV |
492 | */ |
493 | struct iwl_trans_config { | |
494 | struct iwl_op_mode *op_mode; | |
9eae88fa | 495 | |
c6f600fc | 496 | u8 cmd_queue; |
b04db9ac | 497 | u8 cmd_fifo; |
4cf677fd | 498 | unsigned int cmd_q_wdg_timeout; |
d663ee73 | 499 | const u8 *no_reclaim_cmds; |
84cf0e62 | 500 | unsigned int n_no_reclaim_cmds; |
b2cf410c | 501 | |
6c4fbcbc | 502 | enum iwl_amsdu_size rx_buf_size; |
046db346 | 503 | bool bc_table_dword; |
3a736bcb | 504 | bool scd_set_active; |
ab02165c | 505 | bool wide_cmd_header; |
41837ca9 | 506 | bool sw_csum_tx; |
39bdb17e SD |
507 | const struct iwl_hcmd_arr *command_groups; |
508 | int command_groups_size; | |
509 | ||
b4821767 | 510 | u32 sdio_adma_addr; |
92d743ae MV |
511 | }; |
512 | ||
48eb7b34 EG |
513 | struct iwl_trans_dump_data { |
514 | u32 len; | |
515 | u8 data[]; | |
516 | }; | |
517 | ||
87ce05a2 EG |
518 | struct iwl_trans; |
519 | ||
fea7795f JB |
520 | struct iwl_trans_txq_scd_cfg { |
521 | u8 fifo; | |
522 | s8 sta_id; | |
523 | u8 tid; | |
64ba8930 | 524 | bool aggregate; |
fea7795f JB |
525 | int frame_limit; |
526 | }; | |
527 | ||
41c50542 EG |
528 | /** |
529 | * struct iwl_trans_ops - transport specific operations | |
60396183 EG |
530 | * |
531 | * All the handlers MUST be implemented | |
532 | * | |
8d193ca2 EH |
533 | * @start_hw: starts the HW. If low_power is true, the NIC needs to be taken |
534 | * out of a low power state. From that point on, the HW can send | |
535 | * interrupts. May sleep. | |
a4082843 | 536 | * @op_mode_leave: Turn off the HW RF kill indication if on |
60396183 | 537 | * May sleep |
cf614297 | 538 | * @start_fw: allocates and inits all the resources for the transport |
60396183 EG |
539 | * layer. Also kick a fw image. |
540 | * May sleep | |
adca1235 EG |
541 | * @fw_alive: called when the fw sends alive notification. If the fw provides |
542 | * the SCD base address in SRAM, then provide it here, or 0 otherwise. | |
60396183 | 543 | * May sleep |
a4082843 | 544 | * @stop_device: stops the whole device (embedded CPU put to reset) and stops |
8d193ca2 EH |
545 | * the HW. If low_power is true, the NIC will be put in low power state. |
546 | * From that point on, the HW will be stopped but will still issue an | |
547 | * interrupt if the HW RF kill switch is triggered. | |
548 | * This callback must do the right thing and not crash even if %start_hw() | |
549 | * was called but not &start_fw(). May sleep. | |
ddaf5a5b | 550 | * @d3_suspend: put the device into the correct mode for WoWLAN during |
2dd4f9f7 JB |
551 | * suspend. This is optional, if not implemented WoWLAN will not be |
552 | * supported. This callback may sleep. | |
ddaf5a5b JB |
553 | * @d3_resume: resume the device after WoWLAN, enabling the opmode to |
554 | * talk to the WoWLAN image to get its status. This is optional, if not | |
555 | * implemented WoWLAN will not be supported. This callback may sleep. | |
f946b529 EG |
556 | * @send_cmd:send a host command. Must return -ERFKILL if RFkill is asserted. |
557 | * If RFkill is asserted in the middle of a SYNC host command, it must | |
558 | * return -ERFKILL straight away. | |
a1022927 | 559 | * May sleep only if CMD_ASYNC is not set |
3f73b8ca | 560 | * @tx: send an skb. The transport relies on the op_mode to zero the |
6eb5e529 EG |
561 | * the ieee80211_tx_info->driver_data. If the MPDU is an A-MSDU, all |
562 | * the CSUM will be taken care of (TCP CSUM and IP header in case of | |
563 | * IPv4). If the MPDU is a single MSDU, the op_mode must compute the IP | |
564 | * header if it is IPv4. | |
60396183 | 565 | * Must be atomic |
a0eaad71 | 566 | * @reclaim: free packet until ssn. Returns a list of freed packets. |
60396183 | 567 | * Must be atomic |
b04db9ac EG |
568 | * @txq_enable: setup a queue. To setup an AC queue, use the |
569 | * iwl_trans_ac_txq_enable wrapper. fw_alive must have been called before | |
d4578ea8 JB |
570 | * this one. The op_mode must not configure the HCMD queue. The scheduler |
571 | * configuration may be %NULL, in which case the hardware will not be | |
572 | * configured. May sleep. | |
d0624be6 | 573 | * @txq_disable: de-configure a Tx queue to send AMPDUs |
b0b46192 | 574 | * Must be atomic |
3cafdbe6 | 575 | * @wait_tx_queue_empty: wait until tx queues are empty. May sleep. |
e0b8d405 EG |
576 | * @freeze_txq_timer: prevents the timer of the queue from firing until the |
577 | * queue is set to awake. Must be atomic. | |
0cd58eaa EG |
578 | * @block_txq_ptrs: stop updating the write pointers of the Tx queues. Note |
579 | * that the transport needs to refcount the calls since this function | |
580 | * will be called several times with block = true, and then the queues | |
581 | * need to be unblocked only after the same number of calls with | |
582 | * block = false. | |
03905495 EG |
583 | * @write8: write a u8 to a register at offset ofs from the BAR |
584 | * @write32: write a u32 to a register at offset ofs from the BAR | |
585 | * @read32: read a u32 register at offset ofs from the BAR | |
6a06b6c1 EG |
586 | * @read_prph: read a DWORD from a periphery register |
587 | * @write_prph: write a DWORD to a periphery register | |
4fd442db | 588 | * @read_mem: read device's SRAM in DWORD |
01387ffd EG |
589 | * @write_mem: write device's SRAM in DWORD. If %buf is %NULL, then the memory |
590 | * will be zeroed. | |
c6f600fc | 591 | * @configure: configure parameters required by the transport layer from |
3dc420be EG |
592 | * the op_mode. May be called several times before start_fw, can't be |
593 | * called after that. | |
47107e84 | 594 | * @set_pmi: set the power pmi state |
e56b04ef LE |
595 | * @grab_nic_access: wake the NIC to be able to access non-HBUS regs. |
596 | * Sleeping is not allowed between grab_nic_access and | |
597 | * release_nic_access. | |
598 | * @release_nic_access: let the NIC go to sleep. The "flags" parameter | |
599 | * must be the same one that was sent before to the grab_nic_access. | |
e139dc4a | 600 | * @set_bits_mask - set SRAM register according to value and mask. |
440c411d EP |
601 | * @ref: grab a reference to the transport/FW layers, disallowing |
602 | * certain low power states | |
603 | * @unref: release a reference previously taken with @ref. Note that | |
604 | * initially the reference count is 1, making an initial @unref | |
605 | * necessary to allow low power states. | |
48eb7b34 EG |
606 | * @dump_data: return a vmalloc'ed buffer with debug data, maybe containing last |
607 | * TX'ed commands and similar. The buffer will be vfree'd by the caller. | |
4d075007 | 608 | * Note that the transport must fill in the proper file headers. |
41c50542 EG |
609 | */ |
610 | struct iwl_trans_ops { | |
611 | ||
8d193ca2 | 612 | int (*start_hw)(struct iwl_trans *iwl_trans, bool low_power); |
a4082843 | 613 | void (*op_mode_leave)(struct iwl_trans *iwl_trans); |
6ae02f3e EG |
614 | int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw, |
615 | bool run_in_rfkill); | |
91479b64 EH |
616 | int (*update_sf)(struct iwl_trans *trans, |
617 | struct iwl_sf_region *st_fwrd_space); | |
adca1235 | 618 | void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr); |
8d193ca2 | 619 | void (*stop_device)(struct iwl_trans *trans, bool low_power); |
41c50542 | 620 | |
debff618 JB |
621 | void (*d3_suspend)(struct iwl_trans *trans, bool test); |
622 | int (*d3_resume)(struct iwl_trans *trans, enum iwl_d3_status *status, | |
623 | bool test); | |
2dd4f9f7 | 624 | |
6d8f6eeb | 625 | int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd); |
41c50542 | 626 | |
e13c0c59 | 627 | int (*tx)(struct iwl_trans *trans, struct sk_buff *skb, |
9eae88fa JB |
628 | struct iwl_device_cmd *dev_cmd, int queue); |
629 | void (*reclaim)(struct iwl_trans *trans, int queue, int ssn, | |
630 | struct sk_buff_head *skbs); | |
631 | ||
fea7795f | 632 | void (*txq_enable)(struct iwl_trans *trans, int queue, u16 ssn, |
4cf677fd EG |
633 | const struct iwl_trans_txq_scd_cfg *cfg, |
634 | unsigned int queue_wdg_timeout); | |
d4578ea8 JB |
635 | void (*txq_disable)(struct iwl_trans *trans, int queue, |
636 | bool configure_scd); | |
41c50542 | 637 | |
3cafdbe6 | 638 | int (*wait_tx_queue_empty)(struct iwl_trans *trans, u32 txq_bm); |
e0b8d405 EG |
639 | void (*freeze_txq_timer)(struct iwl_trans *trans, unsigned long txqs, |
640 | bool freeze); | |
0cd58eaa | 641 | void (*block_txq_ptrs)(struct iwl_trans *trans, bool block); |
5fdda047 | 642 | |
03905495 EG |
643 | void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val); |
644 | void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val); | |
645 | u32 (*read32)(struct iwl_trans *trans, u32 ofs); | |
6a06b6c1 EG |
646 | u32 (*read_prph)(struct iwl_trans *trans, u32 ofs); |
647 | void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val); | |
4fd442db EG |
648 | int (*read_mem)(struct iwl_trans *trans, u32 addr, |
649 | void *buf, int dwords); | |
650 | int (*write_mem)(struct iwl_trans *trans, u32 addr, | |
bf0fd5da | 651 | const void *buf, int dwords); |
c6f600fc MV |
652 | void (*configure)(struct iwl_trans *trans, |
653 | const struct iwl_trans_config *trans_cfg); | |
47107e84 | 654 | void (*set_pmi)(struct iwl_trans *trans, bool state); |
23ba9340 | 655 | bool (*grab_nic_access)(struct iwl_trans *trans, unsigned long *flags); |
e56b04ef LE |
656 | void (*release_nic_access)(struct iwl_trans *trans, |
657 | unsigned long *flags); | |
e139dc4a LE |
658 | void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask, |
659 | u32 value); | |
440c411d EP |
660 | void (*ref)(struct iwl_trans *trans); |
661 | void (*unref)(struct iwl_trans *trans); | |
c43fe907 | 662 | int (*suspend)(struct iwl_trans *trans); |
8e551e50 | 663 | void (*resume)(struct iwl_trans *trans); |
4d075007 | 664 | |
36fb9017 | 665 | struct iwl_trans_dump_data *(*dump_data)(struct iwl_trans *trans, |
a80c7a69 | 666 | const struct iwl_fw_dbg_trigger_tlv |
36fb9017 | 667 | *trigger); |
41c50542 EG |
668 | }; |
669 | ||
69655ebf EG |
670 | /** |
671 | * enum iwl_trans_state - state of the transport layer | |
672 | * | |
673 | * @IWL_TRANS_NO_FW: no fw has sent an alive response | |
674 | * @IWL_TRANS_FW_ALIVE: a fw has sent an alive response | |
675 | */ | |
676 | enum iwl_trans_state { | |
677 | IWL_TRANS_NO_FW = 0, | |
678 | IWL_TRANS_FW_ALIVE = 1, | |
679 | }; | |
680 | ||
0f8f93d6 | 681 | /** |
b7282643 LC |
682 | * DOC: Platform power management |
683 | * | |
684 | * There are two types of platform power management: system-wide | |
685 | * (WoWLAN) and runtime. | |
686 | * | |
687 | * In system-wide power management the entire platform goes into a low | |
688 | * power state (e.g. idle or suspend to RAM) at the same time and the | |
689 | * device is configured as a wakeup source for the entire platform. | |
690 | * This is usually triggered by userspace activity (e.g. the user | |
691 | * presses the suspend button or a power management daemon decides to | |
692 | * put the platform in low power mode). The device's behavior in this | |
693 | * mode is dictated by the wake-on-WLAN configuration. | |
694 | * | |
695 | * In runtime power management, only the devices which are themselves | |
696 | * idle enter a low power state. This is done at runtime, which means | |
697 | * that the entire system is still running normally. This mode is | |
698 | * usually triggered automatically by the device driver and requires | |
699 | * the ability to enter and exit the low power modes in a very short | |
700 | * time, so there is not much impact in usability. | |
701 | * | |
702 | * The terms used for the device's behavior are as follows: | |
703 | * | |
704 | * - D0: the device is fully powered and the host is awake; | |
705 | * - D3: the device is in low power mode and only reacts to | |
706 | * specific events (e.g. magic-packet received or scan | |
707 | * results found); | |
708 | * - D0I3: the device is in low power mode and reacts to any | |
709 | * activity (e.g. RX); | |
710 | * | |
711 | * These terms reflect the power modes in the firmware and are not to | |
712 | * be confused with the physical device power state. The NIC can be | |
713 | * in D0I3 mode even if, for instance, the PCI device is in D3 state. | |
0f8f93d6 | 714 | */ |
b7282643 LC |
715 | |
716 | /** | |
717 | * enum iwl_plat_pm_mode - platform power management mode | |
718 | * | |
719 | * This enumeration describes the device's platform power management | |
720 | * behavior when in idle mode (i.e. runtime power management) or when | |
721 | * in system-wide suspend (i.e WoWLAN). | |
722 | * | |
723 | * @IWL_PLAT_PM_MODE_DISABLED: power management is disabled for this | |
724 | * device. At runtime, this means that nothing happens and the | |
725 | * device always remains in active. In system-wide suspend mode, | |
726 | * it means that the all connections will be closed automatically | |
727 | * by mac80211 before the platform is suspended. | |
728 | * @IWL_PLAT_PM_MODE_D3: the device goes into D3 mode (i.e. WoWLAN). | |
729 | * For runtime power management, this mode is not officially | |
730 | * supported. | |
731 | * @IWL_PLAT_PM_MODE_D0I3: the device goes into D0I3 mode. | |
732 | */ | |
733 | enum iwl_plat_pm_mode { | |
734 | IWL_PLAT_PM_MODE_DISABLED, | |
735 | IWL_PLAT_PM_MODE_D3, | |
736 | IWL_PLAT_PM_MODE_D0I3, | |
0f8f93d6 EP |
737 | }; |
738 | ||
6fbfae8e EG |
739 | /** |
740 | * struct iwl_trans - transport common data | |
60396183 | 741 | * |
6fbfae8e | 742 | * @ops - pointer to iwl_trans_ops |
ed277c93 | 743 | * @op_mode - pointer to the op_mode |
035f7ff2 | 744 | * @cfg - pointer to the configuration |
eb7ff77e | 745 | * @status: a bit-mask of transport status flags |
a42a1844 | 746 | * @dev - pointer to struct device * that represents the device |
206eea78 JB |
747 | * @max_skb_frags: maximum number of fragments an SKB can have when transmitted. |
748 | * 0 indicates that frag SKBs (NETIF_F_SG) aren't supported. | |
0d365ae5 | 749 | * @hw_id: a u32 with the ID of the device / sub-device. |
60396183 | 750 | * Set during transport allocation. |
9ca85961 | 751 | * @hw_id_str: a string with info about HW ID. Set during transport allocation. |
f6d0e9be | 752 | * @pm_support: set to true in start_hw if link pm is supported |
9180ac50 | 753 | * @ltr_enabled: set to true if the LTR is enabled |
56882e6c JB |
754 | * @num_rx_queues: number of RX queues allocated by the transport; |
755 | * the transport must set this before calling iwl_drv_start() | |
59c647b6 EG |
756 | * @dev_cmd_pool: pool for Tx cmd allocation - for internal use only. |
757 | * The user should use iwl_trans_{alloc,free}_tx_cmd. | |
758 | * @dev_cmd_headroom: room needed for the transport's private use before the | |
759 | * device_cmd for Tx - for internal use only | |
760 | * The user should use iwl_trans_{alloc,free}_tx_cmd. | |
f042c2eb JB |
761 | * @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before |
762 | * starting the firmware, used for tracing | |
763 | * @rx_mpdu_cmd_hdr_size: used for tracing, amount of data before the | |
764 | * start of the 802.11 header in the @rx_mpdu_cmd | |
bcb079a1 | 765 | * @dflt_pwr_limit: default power limit fetched from the platform (ACPI) |
09e350f7 LK |
766 | * @dbg_dest_tlv: points to the destination TLV for debug |
767 | * @dbg_conf_tlv: array of pointers to configuration TLVs for debug | |
d2709ad7 | 768 | * @dbg_trigger_tlv: array of pointers to triggers TLVs for debug |
09e350f7 | 769 | * @dbg_dest_reg_num: num of reg_ops in %dbg_dest_tlv |
e1120187 MG |
770 | * @paging_req_addr: The location were the FW will upload / download the pages |
771 | * from. The address is set by the opmode | |
772 | * @paging_db: Pointer to the opmode paging data base, the pointer is set by | |
773 | * the opmode. | |
774 | * @paging_download_buf: Buffer used for copying all of the pages before | |
775 | * downloading them to the FW. The buffer is allocated in the opmode | |
b7282643 LC |
776 | * @system_pm_mode: the system-wide power management mode in use. |
777 | * This mode is set dynamically, depending on the WoWLAN values | |
778 | * configured from the userspace at runtime. | |
779 | * @runtime_pm_mode: the runtime power management mode in use. This | |
780 | * mode is set during the initialization phase and is not | |
781 | * supposed to change during runtime. | |
6fbfae8e | 782 | */ |
41c50542 EG |
783 | struct iwl_trans { |
784 | const struct iwl_trans_ops *ops; | |
ed277c93 | 785 | struct iwl_op_mode *op_mode; |
035f7ff2 | 786 | const struct iwl_cfg *cfg; |
69655ebf | 787 | enum iwl_trans_state state; |
eb7ff77e | 788 | unsigned long status; |
e6bb4c9c | 789 | |
a42a1844 | 790 | struct device *dev; |
206eea78 | 791 | u32 max_skb_frags; |
08079a49 | 792 | u32 hw_rev; |
99673ee5 | 793 | u32 hw_id; |
9ca85961 | 794 | char hw_id_str[52]; |
a42a1844 | 795 | |
f042c2eb JB |
796 | u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size; |
797 | ||
f6d0e9be | 798 | bool pm_support; |
9180ac50 | 799 | bool ltr_enabled; |
97b52cfd | 800 | |
39bdb17e SD |
801 | const struct iwl_hcmd_arr *command_groups; |
802 | int command_groups_size; | |
803 | ||
56882e6c JB |
804 | u8 num_rx_queues; |
805 | ||
59c647b6 EG |
806 | /* The following fields are internal only */ |
807 | struct kmem_cache *dev_cmd_pool; | |
808 | size_t dev_cmd_headroom; | |
3ec45882 | 809 | char dev_cmd_pool_name[50]; |
59c647b6 | 810 | |
9da987ac MV |
811 | struct dentry *dbgfs_dir; |
812 | ||
2bfb5092 JB |
813 | #ifdef CONFIG_LOCKDEP |
814 | struct lockdep_map sync_cmd_lockdep_map; | |
815 | #endif | |
816 | ||
bcb079a1 IY |
817 | u64 dflt_pwr_limit; |
818 | ||
09e350f7 | 819 | const struct iwl_fw_dbg_dest_tlv *dbg_dest_tlv; |
d2709ad7 EG |
820 | const struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX]; |
821 | struct iwl_fw_dbg_trigger_tlv * const *dbg_trigger_tlv; | |
09e350f7 LK |
822 | u8 dbg_dest_reg_num; |
823 | ||
e1120187 MG |
824 | /* |
825 | * Paging parameters - All of the parameters should be set by the | |
826 | * opmode when paging is enabled | |
827 | */ | |
828 | u32 paging_req_addr; | |
829 | struct iwl_fw_paging *paging_db; | |
830 | void *paging_download_buf; | |
831 | ||
b7282643 LC |
832 | enum iwl_plat_pm_mode system_pm_mode; |
833 | enum iwl_plat_pm_mode runtime_pm_mode; | |
54154618 | 834 | |
e6bb4c9c EG |
835 | /* pointer to trans specific struct */ |
836 | /*Ensure that this pointer will always be aligned to sizeof pointer */ | |
cbe6ab4e | 837 | char trans_specific[0] __aligned(sizeof(void *)); |
41c50542 EG |
838 | }; |
839 | ||
39bdb17e SD |
840 | const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id); |
841 | int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans); | |
842 | ||
ed277c93 | 843 | static inline void iwl_trans_configure(struct iwl_trans *trans, |
92d743ae | 844 | const struct iwl_trans_config *trans_cfg) |
ed277c93 | 845 | { |
92d743ae | 846 | trans->op_mode = trans_cfg->op_mode; |
c6f600fc MV |
847 | |
848 | trans->ops->configure(trans, trans_cfg); | |
39bdb17e | 849 | WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg)); |
ed277c93 EG |
850 | } |
851 | ||
8d193ca2 | 852 | static inline int _iwl_trans_start_hw(struct iwl_trans *trans, bool low_power) |
e6bb4c9c | 853 | { |
60396183 EG |
854 | might_sleep(); |
855 | ||
8d193ca2 EH |
856 | return trans->ops->start_hw(trans, low_power); |
857 | } | |
858 | ||
859 | static inline int iwl_trans_start_hw(struct iwl_trans *trans) | |
860 | { | |
861 | return trans->ops->start_hw(trans, true); | |
e6bb4c9c EG |
862 | } |
863 | ||
a4082843 | 864 | static inline void iwl_trans_op_mode_leave(struct iwl_trans *trans) |
cc56feb2 | 865 | { |
60396183 EG |
866 | might_sleep(); |
867 | ||
a4082843 AN |
868 | if (trans->ops->op_mode_leave) |
869 | trans->ops->op_mode_leave(trans); | |
69655ebf | 870 | |
a4082843 | 871 | trans->op_mode = NULL; |
b4991f3f | 872 | |
69655ebf | 873 | trans->state = IWL_TRANS_NO_FW; |
cc56feb2 EG |
874 | } |
875 | ||
adca1235 | 876 | static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr) |
ed6a3803 | 877 | { |
60396183 EG |
878 | might_sleep(); |
879 | ||
69655ebf | 880 | trans->state = IWL_TRANS_FW_ALIVE; |
b04db9ac | 881 | |
adca1235 | 882 | trans->ops->fw_alive(trans, scd_addr); |
ed6a3803 EG |
883 | } |
884 | ||
0692fe41 | 885 | static inline int iwl_trans_start_fw(struct iwl_trans *trans, |
6ae02f3e EG |
886 | const struct fw_img *fw, |
887 | bool run_in_rfkill) | |
bdfbf092 | 888 | { |
cf614297 EG |
889 | might_sleep(); |
890 | ||
f042c2eb JB |
891 | WARN_ON_ONCE(!trans->rx_mpdu_cmd); |
892 | ||
efbf6e3b | 893 | clear_bit(STATUS_FW_ERROR, &trans->status); |
6ae02f3e | 894 | return trans->ops->start_fw(trans, fw, run_in_rfkill); |
bdfbf092 EG |
895 | } |
896 | ||
91479b64 EH |
897 | static inline int iwl_trans_update_sf(struct iwl_trans *trans, |
898 | struct iwl_sf_region *st_fwrd_space) | |
899 | { | |
900 | might_sleep(); | |
901 | ||
902 | if (trans->ops->update_sf) | |
903 | return trans->ops->update_sf(trans, st_fwrd_space); | |
904 | ||
905 | return 0; | |
906 | } | |
907 | ||
8d193ca2 EH |
908 | static inline void _iwl_trans_stop_device(struct iwl_trans *trans, |
909 | bool low_power) | |
bdfbf092 | 910 | { |
60396183 EG |
911 | might_sleep(); |
912 | ||
8d193ca2 | 913 | trans->ops->stop_device(trans, low_power); |
69655ebf EG |
914 | |
915 | trans->state = IWL_TRANS_NO_FW; | |
bdfbf092 EG |
916 | } |
917 | ||
8d193ca2 EH |
918 | static inline void iwl_trans_stop_device(struct iwl_trans *trans) |
919 | { | |
920 | _iwl_trans_stop_device(trans, true); | |
921 | } | |
922 | ||
debff618 | 923 | static inline void iwl_trans_d3_suspend(struct iwl_trans *trans, bool test) |
ddaf5a5b JB |
924 | { |
925 | might_sleep(); | |
80de4321 EP |
926 | if (trans->ops->d3_suspend) |
927 | trans->ops->d3_suspend(trans, test); | |
ddaf5a5b JB |
928 | } |
929 | ||
930 | static inline int iwl_trans_d3_resume(struct iwl_trans *trans, | |
debff618 JB |
931 | enum iwl_d3_status *status, |
932 | bool test) | |
2dd4f9f7 JB |
933 | { |
934 | might_sleep(); | |
80de4321 EP |
935 | if (!trans->ops->d3_resume) |
936 | return 0; | |
937 | ||
debff618 | 938 | return trans->ops->d3_resume(trans, status, test); |
2dd4f9f7 JB |
939 | } |
940 | ||
440c411d EP |
941 | static inline void iwl_trans_ref(struct iwl_trans *trans) |
942 | { | |
943 | if (trans->ops->ref) | |
944 | trans->ops->ref(trans); | |
945 | } | |
946 | ||
947 | static inline void iwl_trans_unref(struct iwl_trans *trans) | |
948 | { | |
949 | if (trans->ops->unref) | |
950 | trans->ops->unref(trans); | |
951 | } | |
952 | ||
c43fe907 | 953 | static inline int iwl_trans_suspend(struct iwl_trans *trans) |
8e551e50 | 954 | { |
c43fe907 EP |
955 | if (!trans->ops->suspend) |
956 | return 0; | |
957 | ||
958 | return trans->ops->suspend(trans); | |
8e551e50 EP |
959 | } |
960 | ||
961 | static inline void iwl_trans_resume(struct iwl_trans *trans) | |
962 | { | |
963 | if (trans->ops->resume) | |
964 | trans->ops->resume(trans); | |
965 | } | |
966 | ||
48eb7b34 | 967 | static inline struct iwl_trans_dump_data * |
36fb9017 | 968 | iwl_trans_dump_data(struct iwl_trans *trans, |
a80c7a69 | 969 | const struct iwl_fw_dbg_trigger_tlv *trigger) |
4d075007 JB |
970 | { |
971 | if (!trans->ops->dump_data) | |
48eb7b34 | 972 | return NULL; |
36fb9017 | 973 | return trans->ops->dump_data(trans, trigger); |
4d075007 | 974 | } |
4d075007 | 975 | |
59c647b6 EG |
976 | static inline struct iwl_device_cmd * |
977 | iwl_trans_alloc_tx_cmd(struct iwl_trans *trans) | |
978 | { | |
979 | u8 *dev_cmd_ptr = kmem_cache_alloc(trans->dev_cmd_pool, GFP_ATOMIC); | |
980 | ||
981 | if (unlikely(dev_cmd_ptr == NULL)) | |
982 | return NULL; | |
983 | ||
984 | return (struct iwl_device_cmd *) | |
985 | (dev_cmd_ptr + trans->dev_cmd_headroom); | |
986 | } | |
987 | ||
92fe8343 EG |
988 | int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd); |
989 | ||
59c647b6 EG |
990 | static inline void iwl_trans_free_tx_cmd(struct iwl_trans *trans, |
991 | struct iwl_device_cmd *dev_cmd) | |
992 | { | |
993 | u8 *dev_cmd_ptr = (u8 *)dev_cmd - trans->dev_cmd_headroom; | |
994 | ||
995 | kmem_cache_free(trans->dev_cmd_pool, dev_cmd_ptr); | |
996 | } | |
997 | ||
e6bb4c9c | 998 | static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb, |
9eae88fa | 999 | struct iwl_device_cmd *dev_cmd, int queue) |
a0eaad71 | 1000 | { |
3fc07953 AN |
1001 | if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status))) |
1002 | return -EIO; | |
1003 | ||
e5d15cb5 | 1004 | if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { |
3c6acb61 | 1005 | IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); |
e5d15cb5 EP |
1006 | return -EIO; |
1007 | } | |
69655ebf | 1008 | |
9eae88fa | 1009 | return trans->ops->tx(trans, skb, dev_cmd, queue); |
a0eaad71 EG |
1010 | } |
1011 | ||
9eae88fa JB |
1012 | static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue, |
1013 | int ssn, struct sk_buff_head *skbs) | |
48d42c42 | 1014 | { |
e5d15cb5 | 1015 | if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { |
3c6acb61 | 1016 | IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); |
e5d15cb5 EP |
1017 | return; |
1018 | } | |
69655ebf | 1019 | |
9eae88fa | 1020 | trans->ops->reclaim(trans, queue, ssn, skbs); |
48d42c42 EG |
1021 | } |
1022 | ||
d4578ea8 JB |
1023 | static inline void iwl_trans_txq_disable(struct iwl_trans *trans, int queue, |
1024 | bool configure_scd) | |
288712a6 | 1025 | { |
d4578ea8 JB |
1026 | trans->ops->txq_disable(trans, queue, configure_scd); |
1027 | } | |
1028 | ||
1029 | static inline void | |
1030 | iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn, | |
4cf677fd EG |
1031 | const struct iwl_trans_txq_scd_cfg *cfg, |
1032 | unsigned int queue_wdg_timeout) | |
d4578ea8 JB |
1033 | { |
1034 | might_sleep(); | |
1035 | ||
e5d15cb5 | 1036 | if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { |
d4578ea8 | 1037 | IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); |
e5d15cb5 EP |
1038 | return; |
1039 | } | |
d4578ea8 | 1040 | |
4cf677fd | 1041 | trans->ops->txq_enable(trans, queue, ssn, cfg, queue_wdg_timeout); |
288712a6 EG |
1042 | } |
1043 | ||
4beaf6c2 EG |
1044 | static inline void iwl_trans_txq_enable(struct iwl_trans *trans, int queue, |
1045 | int fifo, int sta_id, int tid, | |
4cf677fd EG |
1046 | int frame_limit, u16 ssn, |
1047 | unsigned int queue_wdg_timeout) | |
48d42c42 | 1048 | { |
fea7795f JB |
1049 | struct iwl_trans_txq_scd_cfg cfg = { |
1050 | .fifo = fifo, | |
1051 | .sta_id = sta_id, | |
1052 | .tid = tid, | |
1053 | .frame_limit = frame_limit, | |
64ba8930 | 1054 | .aggregate = sta_id >= 0, |
fea7795f JB |
1055 | }; |
1056 | ||
4cf677fd | 1057 | iwl_trans_txq_enable_cfg(trans, queue, ssn, &cfg, queue_wdg_timeout); |
48d42c42 EG |
1058 | } |
1059 | ||
4cf677fd EG |
1060 | static inline |
1061 | void iwl_trans_ac_txq_enable(struct iwl_trans *trans, int queue, int fifo, | |
1062 | unsigned int queue_wdg_timeout) | |
b04db9ac | 1063 | { |
d4578ea8 JB |
1064 | struct iwl_trans_txq_scd_cfg cfg = { |
1065 | .fifo = fifo, | |
1066 | .sta_id = -1, | |
1067 | .tid = IWL_MAX_TID_COUNT, | |
1068 | .frame_limit = IWL_FRAME_LIMIT, | |
64ba8930 | 1069 | .aggregate = false, |
d4578ea8 JB |
1070 | }; |
1071 | ||
4cf677fd | 1072 | iwl_trans_txq_enable_cfg(trans, queue, 0, &cfg, queue_wdg_timeout); |
d4578ea8 JB |
1073 | } |
1074 | ||
e0b8d405 EG |
1075 | static inline void iwl_trans_freeze_txq_timer(struct iwl_trans *trans, |
1076 | unsigned long txqs, | |
1077 | bool freeze) | |
1078 | { | |
e5d15cb5 | 1079 | if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { |
e0b8d405 | 1080 | IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); |
e5d15cb5 EP |
1081 | return; |
1082 | } | |
e0b8d405 EG |
1083 | |
1084 | if (trans->ops->freeze_txq_timer) | |
1085 | trans->ops->freeze_txq_timer(trans, txqs, freeze); | |
1086 | } | |
1087 | ||
0cd58eaa EG |
1088 | static inline void iwl_trans_block_txq_ptrs(struct iwl_trans *trans, |
1089 | bool block) | |
1090 | { | |
e5d15cb5 | 1091 | if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { |
0cd58eaa | 1092 | IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); |
e5d15cb5 EP |
1093 | return; |
1094 | } | |
0cd58eaa EG |
1095 | |
1096 | if (trans->ops->block_txq_ptrs) | |
1097 | trans->ops->block_txq_ptrs(trans, block); | |
1098 | } | |
1099 | ||
3cafdbe6 | 1100 | static inline int iwl_trans_wait_tx_queue_empty(struct iwl_trans *trans, |
4cf677fd | 1101 | u32 txqs) |
5f178cd2 | 1102 | { |
e5d15cb5 | 1103 | if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { |
3c6acb61 | 1104 | IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); |
e5d15cb5 EP |
1105 | return -EIO; |
1106 | } | |
69655ebf | 1107 | |
4cf677fd | 1108 | return trans->ops->wait_tx_queue_empty(trans, txqs); |
5f178cd2 EG |
1109 | } |
1110 | ||
03905495 EG |
1111 | static inline void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val) |
1112 | { | |
1113 | trans->ops->write8(trans, ofs, val); | |
1114 | } | |
1115 | ||
1116 | static inline void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val) | |
1117 | { | |
1118 | trans->ops->write32(trans, ofs, val); | |
1119 | } | |
1120 | ||
1121 | static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs) | |
1122 | { | |
1123 | return trans->ops->read32(trans, ofs); | |
1124 | } | |
1125 | ||
6a06b6c1 EG |
1126 | static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs) |
1127 | { | |
1128 | return trans->ops->read_prph(trans, ofs); | |
1129 | } | |
1130 | ||
1131 | static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs, | |
1132 | u32 val) | |
1133 | { | |
1134 | return trans->ops->write_prph(trans, ofs, val); | |
1135 | } | |
1136 | ||
4fd442db EG |
1137 | static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr, |
1138 | void *buf, int dwords) | |
1139 | { | |
1140 | return trans->ops->read_mem(trans, addr, buf, dwords); | |
1141 | } | |
1142 | ||
1143 | #define iwl_trans_read_mem_bytes(trans, addr, buf, bufsize) \ | |
1144 | do { \ | |
1145 | if (__builtin_constant_p(bufsize)) \ | |
1146 | BUILD_BUG_ON((bufsize) % sizeof(u32)); \ | |
1147 | iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\ | |
1148 | } while (0) | |
1149 | ||
1150 | static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr) | |
1151 | { | |
1152 | u32 value; | |
1153 | ||
1154 | if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1))) | |
1155 | return 0xa5a5a5a5; | |
1156 | ||
1157 | return value; | |
1158 | } | |
1159 | ||
1160 | static inline int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr, | |
bf0fd5da | 1161 | const void *buf, int dwords) |
4fd442db EG |
1162 | { |
1163 | return trans->ops->write_mem(trans, addr, buf, dwords); | |
1164 | } | |
1165 | ||
1166 | static inline u32 iwl_trans_write_mem32(struct iwl_trans *trans, u32 addr, | |
1167 | u32 val) | |
1168 | { | |
1169 | return iwl_trans_write_mem(trans, addr, &val, 1); | |
1170 | } | |
1171 | ||
47107e84 DF |
1172 | static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state) |
1173 | { | |
128cb89e AN |
1174 | if (trans->ops->set_pmi) |
1175 | trans->ops->set_pmi(trans, state); | |
47107e84 DF |
1176 | } |
1177 | ||
e139dc4a LE |
1178 | static inline void |
1179 | iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value) | |
1180 | { | |
1181 | trans->ops->set_bits_mask(trans, reg, mask, value); | |
1182 | } | |
1183 | ||
23ba9340 | 1184 | #define iwl_trans_grab_nic_access(trans, flags) \ |
abae2386 | 1185 | __cond_lock(nic_access, \ |
23ba9340 | 1186 | likely((trans)->ops->grab_nic_access(trans, flags))) |
7a65d170 | 1187 | |
abae2386 | 1188 | static inline void __releases(nic_access) |
e56b04ef | 1189 | iwl_trans_release_nic_access(struct iwl_trans *trans, unsigned long *flags) |
7a65d170 | 1190 | { |
e56b04ef | 1191 | trans->ops->release_nic_access(trans, flags); |
abae2386 | 1192 | __release(nic_access); |
7a65d170 EG |
1193 | } |
1194 | ||
2a988e98 AN |
1195 | static inline void iwl_trans_fw_error(struct iwl_trans *trans) |
1196 | { | |
1197 | if (WARN_ON_ONCE(!trans->op_mode)) | |
1198 | return; | |
1199 | ||
1200 | /* prevent double restarts due to the same erroneous FW */ | |
1201 | if (!test_and_set_bit(STATUS_FW_ERROR, &trans->status)) | |
1202 | iwl_op_mode_nic_error(trans->op_mode); | |
1203 | } | |
1204 | ||
7b501d10 JB |
1205 | /***************************************************** |
1206 | * transport helper functions | |
1207 | *****************************************************/ | |
1208 | struct iwl_trans *iwl_trans_alloc(unsigned int priv_size, | |
1209 | struct device *dev, | |
1210 | const struct iwl_cfg *cfg, | |
1211 | const struct iwl_trans_ops *ops, | |
1212 | size_t dev_cmd_headroom); | |
1213 | void iwl_trans_free(struct iwl_trans *trans); | |
1214 | ||
b52e7ea1 | 1215 | /***************************************************** |
d1ff5253 | 1216 | * driver (transport) register/unregister functions |
b52e7ea1 | 1217 | ******************************************************/ |
36a79223 EG |
1218 | int __must_check iwl_pci_register_driver(void); |
1219 | void iwl_pci_unregister_driver(void); | |
b52e7ea1 | 1220 | |
41c50542 | 1221 | #endif /* __iwl_trans_h__ */ |