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43f66a6c | 1 | /****************************************************************************** |
bf79451e | 2 | |
171e7b2f | 3 | Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved. |
43f66a6c JK |
4 | |
5 | 802.11 status code portion of this file from ethereal-0.10.6: | |
6 | Copyright 2000, Axis Communications AB | |
7 | Ethereal - Network traffic analyzer | |
8 | By Gerald Combs <gerald@ethereal.com> | |
9 | Copyright 1998 Gerald Combs | |
10 | ||
bf79451e JG |
11 | This program is free software; you can redistribute it and/or modify it |
12 | under the terms of version 2 of the GNU General Public License as | |
43f66a6c | 13 | published by the Free Software Foundation. |
bf79451e JG |
14 | |
15 | This program is distributed in the hope that it will be useful, but WITHOUT | |
16 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
17 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
43f66a6c | 18 | more details. |
bf79451e | 19 | |
43f66a6c | 20 | You should have received a copy of the GNU General Public License along with |
bf79451e | 21 | this program; if not, write to the Free Software Foundation, Inc., 59 |
43f66a6c | 22 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
bf79451e | 23 | |
43f66a6c JK |
24 | The full GNU General Public License is included in this distribution in the |
25 | file called LICENSE. | |
bf79451e | 26 | |
43f66a6c JK |
27 | Contact Information: |
28 | James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
29 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
30 | ||
31 | ******************************************************************************/ | |
32 | ||
33 | #include "ipw2200.h" | |
733482e4 | 34 | #include <linux/version.h> |
43f66a6c | 35 | |
7c567894 | 36 | #define IPW2200_VERSION "git-1.1.1" |
43f66a6c | 37 | #define DRV_DESCRIPTION "Intel(R) PRO/Wireless 2200/2915 Network Driver" |
171e7b2f | 38 | #define DRV_COPYRIGHT "Copyright(c) 2003-2006 Intel Corporation" |
43f66a6c JK |
39 | #define DRV_VERSION IPW2200_VERSION |
40 | ||
b095c381 JK |
41 | #define ETH_P_80211_STATS (ETH_P_80211_RAW + 1) |
42 | ||
43f66a6c JK |
43 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
44 | MODULE_VERSION(DRV_VERSION); | |
45 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
46 | MODULE_LICENSE("GPL"); | |
47 | ||
f6c5cb7c | 48 | static int cmdlog = 0; |
43f66a6c JK |
49 | static int debug = 0; |
50 | static int channel = 0; | |
43f66a6c JK |
51 | static int mode = 0; |
52 | ||
53 | static u32 ipw_debug_level; | |
54 | static int associate = 1; | |
55 | static int auto_create = 1; | |
a613bffd | 56 | static int led = 0; |
43f66a6c | 57 | static int disable = 0; |
810dabd4 | 58 | static int bt_coexist = 0; |
bde37d03 | 59 | static int hwcrypto = 0; |
4bfdb91d | 60 | static int roaming = 1; |
43f66a6c JK |
61 | static const char ipw_modes[] = { |
62 | 'a', 'b', 'g', '?' | |
63 | }; | |
64 | ||
b095c381 JK |
65 | #ifdef CONFIG_IPW_QOS |
66 | static int qos_enable = 0; | |
67 | static int qos_burst_enable = 0; | |
68 | static int qos_no_ack_mask = 0; | |
69 | static int burst_duration_CCK = 0; | |
70 | static int burst_duration_OFDM = 0; | |
71 | ||
72 | static struct ieee80211_qos_parameters def_qos_parameters_OFDM = { | |
73 | {QOS_TX0_CW_MIN_OFDM, QOS_TX1_CW_MIN_OFDM, QOS_TX2_CW_MIN_OFDM, | |
74 | QOS_TX3_CW_MIN_OFDM}, | |
75 | {QOS_TX0_CW_MAX_OFDM, QOS_TX1_CW_MAX_OFDM, QOS_TX2_CW_MAX_OFDM, | |
76 | QOS_TX3_CW_MAX_OFDM}, | |
77 | {QOS_TX0_AIFS, QOS_TX1_AIFS, QOS_TX2_AIFS, QOS_TX3_AIFS}, | |
78 | {QOS_TX0_ACM, QOS_TX1_ACM, QOS_TX2_ACM, QOS_TX3_ACM}, | |
79 | {QOS_TX0_TXOP_LIMIT_OFDM, QOS_TX1_TXOP_LIMIT_OFDM, | |
80 | QOS_TX2_TXOP_LIMIT_OFDM, QOS_TX3_TXOP_LIMIT_OFDM} | |
81 | }; | |
82 | ||
83 | static struct ieee80211_qos_parameters def_qos_parameters_CCK = { | |
84 | {QOS_TX0_CW_MIN_CCK, QOS_TX1_CW_MIN_CCK, QOS_TX2_CW_MIN_CCK, | |
85 | QOS_TX3_CW_MIN_CCK}, | |
86 | {QOS_TX0_CW_MAX_CCK, QOS_TX1_CW_MAX_CCK, QOS_TX2_CW_MAX_CCK, | |
87 | QOS_TX3_CW_MAX_CCK}, | |
88 | {QOS_TX0_AIFS, QOS_TX1_AIFS, QOS_TX2_AIFS, QOS_TX3_AIFS}, | |
89 | {QOS_TX0_ACM, QOS_TX1_ACM, QOS_TX2_ACM, QOS_TX3_ACM}, | |
90 | {QOS_TX0_TXOP_LIMIT_CCK, QOS_TX1_TXOP_LIMIT_CCK, QOS_TX2_TXOP_LIMIT_CCK, | |
91 | QOS_TX3_TXOP_LIMIT_CCK} | |
92 | }; | |
93 | ||
94 | static struct ieee80211_qos_parameters def_parameters_OFDM = { | |
95 | {DEF_TX0_CW_MIN_OFDM, DEF_TX1_CW_MIN_OFDM, DEF_TX2_CW_MIN_OFDM, | |
96 | DEF_TX3_CW_MIN_OFDM}, | |
97 | {DEF_TX0_CW_MAX_OFDM, DEF_TX1_CW_MAX_OFDM, DEF_TX2_CW_MAX_OFDM, | |
98 | DEF_TX3_CW_MAX_OFDM}, | |
99 | {DEF_TX0_AIFS, DEF_TX1_AIFS, DEF_TX2_AIFS, DEF_TX3_AIFS}, | |
100 | {DEF_TX0_ACM, DEF_TX1_ACM, DEF_TX2_ACM, DEF_TX3_ACM}, | |
101 | {DEF_TX0_TXOP_LIMIT_OFDM, DEF_TX1_TXOP_LIMIT_OFDM, | |
102 | DEF_TX2_TXOP_LIMIT_OFDM, DEF_TX3_TXOP_LIMIT_OFDM} | |
103 | }; | |
104 | ||
105 | static struct ieee80211_qos_parameters def_parameters_CCK = { | |
106 | {DEF_TX0_CW_MIN_CCK, DEF_TX1_CW_MIN_CCK, DEF_TX2_CW_MIN_CCK, | |
107 | DEF_TX3_CW_MIN_CCK}, | |
108 | {DEF_TX0_CW_MAX_CCK, DEF_TX1_CW_MAX_CCK, DEF_TX2_CW_MAX_CCK, | |
109 | DEF_TX3_CW_MAX_CCK}, | |
110 | {DEF_TX0_AIFS, DEF_TX1_AIFS, DEF_TX2_AIFS, DEF_TX3_AIFS}, | |
111 | {DEF_TX0_ACM, DEF_TX1_ACM, DEF_TX2_ACM, DEF_TX3_ACM}, | |
112 | {DEF_TX0_TXOP_LIMIT_CCK, DEF_TX1_TXOP_LIMIT_CCK, DEF_TX2_TXOP_LIMIT_CCK, | |
113 | DEF_TX3_TXOP_LIMIT_CCK} | |
114 | }; | |
115 | ||
116 | static u8 qos_oui[QOS_OUI_LEN] = { 0x00, 0x50, 0xF2 }; | |
117 | ||
118 | static int from_priority_to_tx_queue[] = { | |
119 | IPW_TX_QUEUE_1, IPW_TX_QUEUE_2, IPW_TX_QUEUE_2, IPW_TX_QUEUE_1, | |
120 | IPW_TX_QUEUE_3, IPW_TX_QUEUE_3, IPW_TX_QUEUE_4, IPW_TX_QUEUE_4 | |
121 | }; | |
122 | ||
123 | static u32 ipw_qos_get_burst_duration(struct ipw_priv *priv); | |
124 | ||
125 | static int ipw_send_qos_params_command(struct ipw_priv *priv, struct ieee80211_qos_parameters | |
126 | *qos_param); | |
127 | static int ipw_send_qos_info_command(struct ipw_priv *priv, struct ieee80211_qos_information_element | |
128 | *qos_param); | |
129 | #endif /* CONFIG_IPW_QOS */ | |
130 | ||
97a78ca9 | 131 | static struct iw_statistics *ipw_get_wireless_stats(struct net_device *dev); |
b095c381 | 132 | static void ipw_remove_current_network(struct ipw_priv *priv); |
43f66a6c | 133 | static void ipw_rx(struct ipw_priv *priv); |
bf79451e | 134 | static int ipw_queue_tx_reclaim(struct ipw_priv *priv, |
43f66a6c JK |
135 | struct clx2_tx_queue *txq, int qindex); |
136 | static int ipw_queue_reset(struct ipw_priv *priv); | |
137 | ||
138 | static int ipw_queue_tx_hcmd(struct ipw_priv *priv, int hcmd, void *buf, | |
139 | int len, int sync); | |
140 | ||
141 | static void ipw_tx_queue_free(struct ipw_priv *); | |
142 | ||
143 | static struct ipw_rx_queue *ipw_rx_queue_alloc(struct ipw_priv *); | |
144 | static void ipw_rx_queue_free(struct ipw_priv *, struct ipw_rx_queue *); | |
145 | static void ipw_rx_queue_replenish(void *); | |
43f66a6c | 146 | static int ipw_up(struct ipw_priv *); |
c848d0af | 147 | static void ipw_bg_up(void *); |
43f66a6c | 148 | static void ipw_down(struct ipw_priv *); |
c848d0af | 149 | static void ipw_bg_down(void *); |
43f66a6c | 150 | static int ipw_config(struct ipw_priv *); |
0edd5b44 JG |
151 | static int init_supported_rates(struct ipw_priv *priv, |
152 | struct ipw_supported_rates *prates); | |
b095c381 JK |
153 | static void ipw_set_hwcrypto_keys(struct ipw_priv *); |
154 | static void ipw_send_wep_keys(struct ipw_priv *, int); | |
43f66a6c | 155 | |
f6c5cb7c JK |
156 | static int snprint_line(char *buf, size_t count, |
157 | const u8 * data, u32 len, u32 ofs) | |
43f66a6c JK |
158 | { |
159 | int out, i, j, l; | |
160 | char c; | |
bf79451e | 161 | |
43f66a6c JK |
162 | out = snprintf(buf, count, "%08X", ofs); |
163 | ||
164 | for (l = 0, i = 0; i < 2; i++) { | |
165 | out += snprintf(buf + out, count - out, " "); | |
bf79451e JG |
166 | for (j = 0; j < 8 && l < len; j++, l++) |
167 | out += snprintf(buf + out, count - out, "%02X ", | |
43f66a6c JK |
168 | data[(i * 8 + j)]); |
169 | for (; j < 8; j++) | |
170 | out += snprintf(buf + out, count - out, " "); | |
171 | } | |
bf79451e | 172 | |
43f66a6c JK |
173 | out += snprintf(buf + out, count - out, " "); |
174 | for (l = 0, i = 0; i < 2; i++) { | |
175 | out += snprintf(buf + out, count - out, " "); | |
176 | for (j = 0; j < 8 && l < len; j++, l++) { | |
177 | c = data[(i * 8 + j)]; | |
178 | if (!isascii(c) || !isprint(c)) | |
179 | c = '.'; | |
bf79451e | 180 | |
43f66a6c JK |
181 | out += snprintf(buf + out, count - out, "%c", c); |
182 | } | |
183 | ||
184 | for (; j < 8; j++) | |
185 | out += snprintf(buf + out, count - out, " "); | |
186 | } | |
bf79451e | 187 | |
f6c5cb7c | 188 | return out; |
43f66a6c JK |
189 | } |
190 | ||
0edd5b44 | 191 | static void printk_buf(int level, const u8 * data, u32 len) |
43f66a6c JK |
192 | { |
193 | char line[81]; | |
194 | u32 ofs = 0; | |
195 | if (!(ipw_debug_level & level)) | |
196 | return; | |
197 | ||
198 | while (len) { | |
f6c5cb7c JK |
199 | snprint_line(line, sizeof(line), &data[ofs], |
200 | min(len, 16U), ofs); | |
201 | printk(KERN_DEBUG "%s\n", line); | |
43f66a6c JK |
202 | ofs += 16; |
203 | len -= min(len, 16U); | |
204 | } | |
205 | } | |
206 | ||
f6c5cb7c JK |
207 | static int snprintk_buf(u8 * output, size_t size, const u8 * data, size_t len) |
208 | { | |
209 | size_t out = size; | |
210 | u32 ofs = 0; | |
211 | int total = 0; | |
212 | ||
213 | while (size && len) { | |
214 | out = snprint_line(output, size, &data[ofs], | |
215 | min_t(size_t, len, 16U), ofs); | |
216 | ||
217 | ofs += 16; | |
218 | output += out; | |
219 | size -= out; | |
220 | len -= min_t(size_t, len, 16U); | |
221 | total += out; | |
222 | } | |
223 | return total; | |
224 | } | |
225 | ||
c8fe6679 | 226 | /* alias for 32-bit indirect read (for SRAM/reg above 4K), with debug wrapper */ |
43f66a6c JK |
227 | static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg); |
228 | #define ipw_read_reg32(a, b) _ipw_read_reg32(a, b) | |
229 | ||
c8fe6679 | 230 | /* alias for 8-bit indirect read (for SRAM/reg above 4K), with debug wrapper */ |
43f66a6c JK |
231 | static u8 _ipw_read_reg8(struct ipw_priv *ipw, u32 reg); |
232 | #define ipw_read_reg8(a, b) _ipw_read_reg8(a, b) | |
233 | ||
c8fe6679 | 234 | /* 8-bit indirect write (for SRAM/reg above 4K), with debug wrapper */ |
43f66a6c JK |
235 | static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value); |
236 | static inline void ipw_write_reg8(struct ipw_priv *a, u32 b, u8 c) | |
237 | { | |
0edd5b44 JG |
238 | IPW_DEBUG_IO("%s %d: write_indirect8(0x%08X, 0x%08X)\n", __FILE__, |
239 | __LINE__, (u32) (b), (u32) (c)); | |
43f66a6c JK |
240 | _ipw_write_reg8(a, b, c); |
241 | } | |
242 | ||
c8fe6679 | 243 | /* 16-bit indirect write (for SRAM/reg above 4K), with debug wrapper */ |
43f66a6c JK |
244 | static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value); |
245 | static inline void ipw_write_reg16(struct ipw_priv *a, u32 b, u16 c) | |
246 | { | |
0edd5b44 JG |
247 | IPW_DEBUG_IO("%s %d: write_indirect16(0x%08X, 0x%08X)\n", __FILE__, |
248 | __LINE__, (u32) (b), (u32) (c)); | |
43f66a6c JK |
249 | _ipw_write_reg16(a, b, c); |
250 | } | |
251 | ||
c8fe6679 | 252 | /* 32-bit indirect write (for SRAM/reg above 4K), with debug wrapper */ |
43f66a6c JK |
253 | static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value); |
254 | static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c) | |
255 | { | |
0edd5b44 JG |
256 | IPW_DEBUG_IO("%s %d: write_indirect32(0x%08X, 0x%08X)\n", __FILE__, |
257 | __LINE__, (u32) (b), (u32) (c)); | |
43f66a6c JK |
258 | _ipw_write_reg32(a, b, c); |
259 | } | |
260 | ||
c8fe6679 | 261 | /* 8-bit direct write (low 4K) */ |
43f66a6c | 262 | #define _ipw_write8(ipw, ofs, val) writeb((val), (ipw)->hw_base + (ofs)) |
c8fe6679 ZY |
263 | |
264 | /* 8-bit direct write (for low 4K of SRAM/regs), with debug wrapper */ | |
43f66a6c JK |
265 | #define ipw_write8(ipw, ofs, val) \ |
266 | IPW_DEBUG_IO("%s %d: write_direct8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \ | |
267 | _ipw_write8(ipw, ofs, val) | |
268 | ||
c8fe6679 | 269 | /* 16-bit direct write (low 4K) */ |
43f66a6c | 270 | #define _ipw_write16(ipw, ofs, val) writew((val), (ipw)->hw_base + (ofs)) |
c8fe6679 ZY |
271 | |
272 | /* 16-bit direct write (for low 4K of SRAM/regs), with debug wrapper */ | |
43f66a6c JK |
273 | #define ipw_write16(ipw, ofs, val) \ |
274 | IPW_DEBUG_IO("%s %d: write_direct16(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \ | |
275 | _ipw_write16(ipw, ofs, val) | |
276 | ||
c8fe6679 | 277 | /* 32-bit direct write (low 4K) */ |
43f66a6c | 278 | #define _ipw_write32(ipw, ofs, val) writel((val), (ipw)->hw_base + (ofs)) |
c8fe6679 ZY |
279 | |
280 | /* 32-bit direct write (for low 4K of SRAM/regs), with debug wrapper */ | |
43f66a6c JK |
281 | #define ipw_write32(ipw, ofs, val) \ |
282 | IPW_DEBUG_IO("%s %d: write_direct32(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \ | |
283 | _ipw_write32(ipw, ofs, val) | |
284 | ||
c8fe6679 | 285 | /* 8-bit direct read (low 4K) */ |
43f66a6c | 286 | #define _ipw_read8(ipw, ofs) readb((ipw)->hw_base + (ofs)) |
c8fe6679 ZY |
287 | |
288 | /* 8-bit direct read (low 4K), with debug wrapper */ | |
0edd5b44 JG |
289 | static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) |
290 | { | |
291 | IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32) (ofs)); | |
43f66a6c JK |
292 | return _ipw_read8(ipw, ofs); |
293 | } | |
0edd5b44 | 294 | |
c8fe6679 | 295 | /* alias to 8-bit direct read (low 4K of SRAM/regs), with debug wrapper */ |
43f66a6c JK |
296 | #define ipw_read8(ipw, ofs) __ipw_read8(__FILE__, __LINE__, ipw, ofs) |
297 | ||
c8fe6679 | 298 | /* 16-bit direct read (low 4K) */ |
43f66a6c | 299 | #define _ipw_read16(ipw, ofs) readw((ipw)->hw_base + (ofs)) |
c8fe6679 ZY |
300 | |
301 | /* 16-bit direct read (low 4K), with debug wrapper */ | |
0edd5b44 JG |
302 | static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) |
303 | { | |
304 | IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32) (ofs)); | |
43f66a6c JK |
305 | return _ipw_read16(ipw, ofs); |
306 | } | |
0edd5b44 | 307 | |
c8fe6679 | 308 | /* alias to 16-bit direct read (low 4K of SRAM/regs), with debug wrapper */ |
43f66a6c JK |
309 | #define ipw_read16(ipw, ofs) __ipw_read16(__FILE__, __LINE__, ipw, ofs) |
310 | ||
c8fe6679 | 311 | /* 32-bit direct read (low 4K) */ |
43f66a6c | 312 | #define _ipw_read32(ipw, ofs) readl((ipw)->hw_base + (ofs)) |
c8fe6679 ZY |
313 | |
314 | /* 32-bit direct read (low 4K), with debug wrapper */ | |
0edd5b44 JG |
315 | static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) |
316 | { | |
317 | IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32) (ofs)); | |
43f66a6c JK |
318 | return _ipw_read32(ipw, ofs); |
319 | } | |
0edd5b44 | 320 | |
c8fe6679 | 321 | /* alias to 32-bit direct read (low 4K of SRAM/regs), with debug wrapper */ |
43f66a6c JK |
322 | #define ipw_read32(ipw, ofs) __ipw_read32(__FILE__, __LINE__, ipw, ofs) |
323 | ||
c8fe6679 | 324 | /* multi-byte read (above 4K), with debug wrapper */ |
43f66a6c | 325 | static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int); |
f6c5cb7c JK |
326 | static inline void __ipw_read_indirect(const char *f, int l, |
327 | struct ipw_priv *a, u32 b, u8 * c, int d) | |
328 | { | |
329 | IPW_DEBUG_IO("%s %d: read_indirect(0x%08X) %d bytes\n", f, l, (u32) (b), | |
330 | d); | |
331 | _ipw_read_indirect(a, b, c, d); | |
332 | } | |
333 | ||
c8fe6679 | 334 | /* alias to multi-byte read (SRAM/regs above 4K), with debug wrapper */ |
f6c5cb7c | 335 | #define ipw_read_indirect(a, b, c, d) __ipw_read_indirect(__FILE__, __LINE__, a, b, c, d) |
43f66a6c | 336 | |
c8fe6679 | 337 | /* alias to multi-byte read (SRAM/regs above 4K), with debug wrapper */ |
0edd5b44 JG |
338 | static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * data, |
339 | int num); | |
43f66a6c JK |
340 | #define ipw_write_indirect(a, b, c, d) \ |
341 | IPW_DEBUG_IO("%s %d: write_indirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \ | |
afbf30a2 | 342 | _ipw_write_indirect(a, b, c, d) |
43f66a6c | 343 | |
c8fe6679 | 344 | /* 32-bit indirect write (above 4K) */ |
0edd5b44 | 345 | static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value) |
43f66a6c | 346 | { |
0edd5b44 | 347 | IPW_DEBUG_IO(" %p : reg = 0x%8X : value = 0x%8X\n", priv, reg, value); |
b095c381 JK |
348 | _ipw_write32(priv, IPW_INDIRECT_ADDR, reg); |
349 | _ipw_write32(priv, IPW_INDIRECT_DATA, value); | |
43f66a6c JK |
350 | } |
351 | ||
c8fe6679 | 352 | /* 8-bit indirect write (above 4K) */ |
43f66a6c JK |
353 | static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value) |
354 | { | |
2638bc39 | 355 | u32 aligned_addr = reg & IPW_INDIRECT_ADDR_MASK; /* dword align */ |
c8fe6679 ZY |
356 | u32 dif_len = reg - aligned_addr; |
357 | ||
43f66a6c | 358 | IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value); |
c8fe6679 ZY |
359 | _ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr); |
360 | _ipw_write8(priv, IPW_INDIRECT_DATA + dif_len, value); | |
43f66a6c JK |
361 | } |
362 | ||
c8fe6679 | 363 | /* 16-bit indirect write (above 4K) */ |
0edd5b44 | 364 | static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value) |
43f66a6c | 365 | { |
2638bc39 | 366 | u32 aligned_addr = reg & IPW_INDIRECT_ADDR_MASK; /* dword align */ |
c8fe6679 ZY |
367 | u32 dif_len = (reg - aligned_addr) & (~0x1ul); |
368 | ||
43f66a6c | 369 | IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value); |
c8fe6679 ZY |
370 | _ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr); |
371 | _ipw_write16(priv, IPW_INDIRECT_DATA + dif_len, value); | |
43f66a6c JK |
372 | } |
373 | ||
c8fe6679 | 374 | /* 8-bit indirect read (above 4K) */ |
43f66a6c JK |
375 | static u8 _ipw_read_reg8(struct ipw_priv *priv, u32 reg) |
376 | { | |
377 | u32 word; | |
b095c381 | 378 | _ipw_write32(priv, IPW_INDIRECT_ADDR, reg & IPW_INDIRECT_ADDR_MASK); |
43f66a6c | 379 | IPW_DEBUG_IO(" reg = 0x%8X : \n", reg); |
b095c381 | 380 | word = _ipw_read32(priv, IPW_INDIRECT_DATA); |
0edd5b44 | 381 | return (word >> ((reg & 0x3) * 8)) & 0xff; |
43f66a6c JK |
382 | } |
383 | ||
c8fe6679 | 384 | /* 32-bit indirect read (above 4K) */ |
43f66a6c JK |
385 | static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg) |
386 | { | |
387 | u32 value; | |
388 | ||
389 | IPW_DEBUG_IO("%p : reg = 0x%08x\n", priv, reg); | |
390 | ||
b095c381 JK |
391 | _ipw_write32(priv, IPW_INDIRECT_ADDR, reg); |
392 | value = _ipw_read32(priv, IPW_INDIRECT_DATA); | |
43f66a6c JK |
393 | IPW_DEBUG_IO(" reg = 0x%4X : value = 0x%4x \n", reg, value); |
394 | return value; | |
395 | } | |
396 | ||
c8fe6679 ZY |
397 | /* General purpose, no alignment requirement, iterative (multi-byte) read, */ |
398 | /* for area above 1st 4K of SRAM/reg space */ | |
43f66a6c JK |
399 | static void _ipw_read_indirect(struct ipw_priv *priv, u32 addr, u8 * buf, |
400 | int num) | |
401 | { | |
2638bc39 | 402 | u32 aligned_addr = addr & IPW_INDIRECT_ADDR_MASK; /* dword align */ |
43f66a6c | 403 | u32 dif_len = addr - aligned_addr; |
43f66a6c | 404 | u32 i; |
bf79451e | 405 | |
43f66a6c JK |
406 | IPW_DEBUG_IO("addr = %i, buf = %p, num = %i\n", addr, buf, num); |
407 | ||
ea2b26e0 JK |
408 | if (num <= 0) { |
409 | return; | |
410 | } | |
411 | ||
c8fe6679 | 412 | /* Read the first dword (or portion) byte by byte */ |
43f66a6c | 413 | if (unlikely(dif_len)) { |
b095c381 | 414 | _ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr); |
43f66a6c | 415 | /* Start reading at aligned_addr + dif_len */ |
ea2b26e0 | 416 | for (i = dif_len; ((i < 4) && (num > 0)); i++, num--) |
b095c381 | 417 | *buf++ = _ipw_read8(priv, IPW_INDIRECT_DATA + i); |
43f66a6c JK |
418 | aligned_addr += 4; |
419 | } | |
420 | ||
c8fe6679 | 421 | /* Read all of the middle dwords as dwords, with auto-increment */ |
b095c381 | 422 | _ipw_write32(priv, IPW_AUTOINC_ADDR, aligned_addr); |
ea2b26e0 | 423 | for (; num >= 4; buf += 4, aligned_addr += 4, num -= 4) |
b095c381 | 424 | *(u32 *) buf = _ipw_read32(priv, IPW_AUTOINC_DATA); |
bf79451e | 425 | |
c8fe6679 | 426 | /* Read the last dword (or portion) byte by byte */ |
ea2b26e0 | 427 | if (unlikely(num)) { |
b095c381 | 428 | _ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr); |
ea2b26e0 | 429 | for (i = 0; num > 0; i++, num--) |
b095c381 | 430 | *buf++ = ipw_read8(priv, IPW_INDIRECT_DATA + i); |
ea2b26e0 | 431 | } |
43f66a6c JK |
432 | } |
433 | ||
c8fe6679 ZY |
434 | /* General purpose, no alignment requirement, iterative (multi-byte) write, */ |
435 | /* for area above 1st 4K of SRAM/reg space */ | |
0edd5b44 | 436 | static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * buf, |
43f66a6c JK |
437 | int num) |
438 | { | |
2638bc39 | 439 | u32 aligned_addr = addr & IPW_INDIRECT_ADDR_MASK; /* dword align */ |
43f66a6c | 440 | u32 dif_len = addr - aligned_addr; |
43f66a6c | 441 | u32 i; |
bf79451e | 442 | |
43f66a6c | 443 | IPW_DEBUG_IO("addr = %i, buf = %p, num = %i\n", addr, buf, num); |
bf79451e | 444 | |
ea2b26e0 JK |
445 | if (num <= 0) { |
446 | return; | |
447 | } | |
448 | ||
c8fe6679 | 449 | /* Write the first dword (or portion) byte by byte */ |
43f66a6c | 450 | if (unlikely(dif_len)) { |
b095c381 | 451 | _ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr); |
c8fe6679 | 452 | /* Start writing at aligned_addr + dif_len */ |
ea2b26e0 | 453 | for (i = dif_len; ((i < 4) && (num > 0)); i++, num--, buf++) |
b095c381 | 454 | _ipw_write8(priv, IPW_INDIRECT_DATA + i, *buf); |
43f66a6c JK |
455 | aligned_addr += 4; |
456 | } | |
bf79451e | 457 | |
c8fe6679 | 458 | /* Write all of the middle dwords as dwords, with auto-increment */ |
b095c381 | 459 | _ipw_write32(priv, IPW_AUTOINC_ADDR, aligned_addr); |
ea2b26e0 | 460 | for (; num >= 4; buf += 4, aligned_addr += 4, num -= 4) |
b095c381 | 461 | _ipw_write32(priv, IPW_AUTOINC_DATA, *(u32 *) buf); |
bf79451e | 462 | |
c8fe6679 | 463 | /* Write the last dword (or portion) byte by byte */ |
ea2b26e0 | 464 | if (unlikely(num)) { |
b095c381 | 465 | _ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr); |
ea2b26e0 | 466 | for (i = 0; num > 0; i++, num--, buf++) |
b095c381 | 467 | _ipw_write8(priv, IPW_INDIRECT_DATA + i, *buf); |
ea2b26e0 | 468 | } |
43f66a6c JK |
469 | } |
470 | ||
c8fe6679 ZY |
471 | /* General purpose, no alignment requirement, iterative (multi-byte) write, */ |
472 | /* for 1st 4K of SRAM/regs space */ | |
bf79451e | 473 | static void ipw_write_direct(struct ipw_priv *priv, u32 addr, void *buf, |
43f66a6c JK |
474 | int num) |
475 | { | |
476 | memcpy_toio((priv->hw_base + addr), buf, num); | |
477 | } | |
478 | ||
c8fe6679 | 479 | /* Set bit(s) in low 4K of SRAM/regs */ |
43f66a6c JK |
480 | static inline void ipw_set_bit(struct ipw_priv *priv, u32 reg, u32 mask) |
481 | { | |
482 | ipw_write32(priv, reg, ipw_read32(priv, reg) | mask); | |
483 | } | |
484 | ||
c8fe6679 | 485 | /* Clear bit(s) in low 4K of SRAM/regs */ |
43f66a6c JK |
486 | static inline void ipw_clear_bit(struct ipw_priv *priv, u32 reg, u32 mask) |
487 | { | |
488 | ipw_write32(priv, reg, ipw_read32(priv, reg) & ~mask); | |
489 | } | |
490 | ||
491 | static inline void ipw_enable_interrupts(struct ipw_priv *priv) | |
492 | { | |
493 | if (priv->status & STATUS_INT_ENABLED) | |
494 | return; | |
495 | priv->status |= STATUS_INT_ENABLED; | |
b095c381 | 496 | ipw_write32(priv, IPW_INTA_MASK_R, IPW_INTA_MASK_ALL); |
43f66a6c JK |
497 | } |
498 | ||
499 | static inline void ipw_disable_interrupts(struct ipw_priv *priv) | |
500 | { | |
501 | if (!(priv->status & STATUS_INT_ENABLED)) | |
502 | return; | |
503 | priv->status &= ~STATUS_INT_ENABLED; | |
b095c381 | 504 | ipw_write32(priv, IPW_INTA_MASK_R, ~IPW_INTA_MASK_ALL); |
43f66a6c JK |
505 | } |
506 | ||
0f52bf90 | 507 | #ifdef CONFIG_IPW2200_DEBUG |
43f66a6c JK |
508 | static char *ipw_error_desc(u32 val) |
509 | { | |
510 | switch (val) { | |
bf79451e | 511 | case IPW_FW_ERROR_OK: |
43f66a6c | 512 | return "ERROR_OK"; |
bf79451e | 513 | case IPW_FW_ERROR_FAIL: |
43f66a6c | 514 | return "ERROR_FAIL"; |
bf79451e | 515 | case IPW_FW_ERROR_MEMORY_UNDERFLOW: |
43f66a6c | 516 | return "MEMORY_UNDERFLOW"; |
bf79451e | 517 | case IPW_FW_ERROR_MEMORY_OVERFLOW: |
43f66a6c | 518 | return "MEMORY_OVERFLOW"; |
bf79451e | 519 | case IPW_FW_ERROR_BAD_PARAM: |
b095c381 | 520 | return "BAD_PARAM"; |
bf79451e | 521 | case IPW_FW_ERROR_BAD_CHECKSUM: |
b095c381 | 522 | return "BAD_CHECKSUM"; |
bf79451e | 523 | case IPW_FW_ERROR_NMI_INTERRUPT: |
b095c381 | 524 | return "NMI_INTERRUPT"; |
bf79451e | 525 | case IPW_FW_ERROR_BAD_DATABASE: |
b095c381 | 526 | return "BAD_DATABASE"; |
bf79451e | 527 | case IPW_FW_ERROR_ALLOC_FAIL: |
b095c381 | 528 | return "ALLOC_FAIL"; |
bf79451e | 529 | case IPW_FW_ERROR_DMA_UNDERRUN: |
b095c381 | 530 | return "DMA_UNDERRUN"; |
bf79451e | 531 | case IPW_FW_ERROR_DMA_STATUS: |
b095c381 JK |
532 | return "DMA_STATUS"; |
533 | case IPW_FW_ERROR_DINO_ERROR: | |
534 | return "DINO_ERROR"; | |
535 | case IPW_FW_ERROR_EEPROM_ERROR: | |
536 | return "EEPROM_ERROR"; | |
bf79451e | 537 | case IPW_FW_ERROR_SYSASSERT: |
b095c381 | 538 | return "SYSASSERT"; |
bf79451e | 539 | case IPW_FW_ERROR_FATAL_ERROR: |
b095c381 | 540 | return "FATAL_ERROR"; |
bf79451e | 541 | default: |
b095c381 | 542 | return "UNKNOWN_ERROR"; |
43f66a6c JK |
543 | } |
544 | } | |
545 | ||
b39860c6 JK |
546 | static void ipw_dump_error_log(struct ipw_priv *priv, |
547 | struct ipw_fw_error *error) | |
43f66a6c | 548 | { |
b39860c6 | 549 | u32 i; |
bf79451e | 550 | |
b39860c6 JK |
551 | if (!error) { |
552 | IPW_ERROR("Error allocating and capturing error log. " | |
553 | "Nothing to dump.\n"); | |
554 | return; | |
43f66a6c JK |
555 | } |
556 | ||
b39860c6 JK |
557 | IPW_ERROR("Start IPW Error Log Dump:\n"); |
558 | IPW_ERROR("Status: 0x%08X, Config: %08X\n", | |
559 | error->status, error->config); | |
43f66a6c | 560 | |
b39860c6 | 561 | for (i = 0; i < error->elem_len; i++) |
0edd5b44 | 562 | IPW_ERROR("%s %i 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", |
b39860c6 JK |
563 | ipw_error_desc(error->elem[i].desc), |
564 | error->elem[i].time, | |
565 | error->elem[i].blink1, | |
566 | error->elem[i].blink2, | |
567 | error->elem[i].link1, | |
568 | error->elem[i].link2, error->elem[i].data); | |
569 | for (i = 0; i < error->log_len; i++) | |
570 | IPW_ERROR("%i\t0x%08x\t%i\n", | |
571 | error->log[i].time, | |
286568ab | 572 | error->log[i].data, error->log[i].event); |
43f66a6c | 573 | } |
43f66a6c | 574 | #endif |
43f66a6c | 575 | |
c848d0af | 576 | static inline int ipw_is_init(struct ipw_priv *priv) |
43f66a6c | 577 | { |
c848d0af | 578 | return (priv->status & STATUS_INIT) ? 1 : 0; |
43f66a6c JK |
579 | } |
580 | ||
0edd5b44 | 581 | static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, u32 * len) |
43f66a6c JK |
582 | { |
583 | u32 addr, field_info, field_len, field_count, total_len; | |
584 | ||
585 | IPW_DEBUG_ORD("ordinal = %i\n", ord); | |
586 | ||
587 | if (!priv || !val || !len) { | |
588 | IPW_DEBUG_ORD("Invalid argument\n"); | |
589 | return -EINVAL; | |
590 | } | |
bf79451e | 591 | |
43f66a6c JK |
592 | /* verify device ordinal tables have been initialized */ |
593 | if (!priv->table0_addr || !priv->table1_addr || !priv->table2_addr) { | |
594 | IPW_DEBUG_ORD("Access ordinals before initialization\n"); | |
595 | return -EINVAL; | |
596 | } | |
597 | ||
598 | switch (IPW_ORD_TABLE_ID_MASK & ord) { | |
599 | case IPW_ORD_TABLE_0_MASK: | |
600 | /* | |
601 | * TABLE 0: Direct access to a table of 32 bit values | |
602 | * | |
bf79451e | 603 | * This is a very simple table with the data directly |
43f66a6c JK |
604 | * read from the table |
605 | */ | |
606 | ||
607 | /* remove the table id from the ordinal */ | |
608 | ord &= IPW_ORD_TABLE_VALUE_MASK; | |
609 | ||
610 | /* boundary check */ | |
611 | if (ord > priv->table0_len) { | |
612 | IPW_DEBUG_ORD("ordinal value (%i) longer then " | |
613 | "max (%i)\n", ord, priv->table0_len); | |
614 | return -EINVAL; | |
615 | } | |
616 | ||
617 | /* verify we have enough room to store the value */ | |
618 | if (*len < sizeof(u32)) { | |
619 | IPW_DEBUG_ORD("ordinal buffer length too small, " | |
aaa4d308 | 620 | "need %zd\n", sizeof(u32)); |
43f66a6c JK |
621 | return -EINVAL; |
622 | } | |
623 | ||
624 | IPW_DEBUG_ORD("Reading TABLE0[%i] from offset 0x%08x\n", | |
0edd5b44 | 625 | ord, priv->table0_addr + (ord << 2)); |
43f66a6c JK |
626 | |
627 | *len = sizeof(u32); | |
628 | ord <<= 2; | |
0edd5b44 | 629 | *((u32 *) val) = ipw_read32(priv, priv->table0_addr + ord); |
43f66a6c JK |
630 | break; |
631 | ||
632 | case IPW_ORD_TABLE_1_MASK: | |
633 | /* | |
634 | * TABLE 1: Indirect access to a table of 32 bit values | |
bf79451e JG |
635 | * |
636 | * This is a fairly large table of u32 values each | |
43f66a6c JK |
637 | * representing starting addr for the data (which is |
638 | * also a u32) | |
639 | */ | |
640 | ||
641 | /* remove the table id from the ordinal */ | |
642 | ord &= IPW_ORD_TABLE_VALUE_MASK; | |
bf79451e | 643 | |
43f66a6c JK |
644 | /* boundary check */ |
645 | if (ord > priv->table1_len) { | |
646 | IPW_DEBUG_ORD("ordinal value too long\n"); | |
647 | return -EINVAL; | |
648 | } | |
649 | ||
650 | /* verify we have enough room to store the value */ | |
651 | if (*len < sizeof(u32)) { | |
652 | IPW_DEBUG_ORD("ordinal buffer length too small, " | |
aaa4d308 | 653 | "need %zd\n", sizeof(u32)); |
43f66a6c JK |
654 | return -EINVAL; |
655 | } | |
656 | ||
0edd5b44 JG |
657 | *((u32 *) val) = |
658 | ipw_read_reg32(priv, (priv->table1_addr + (ord << 2))); | |
43f66a6c JK |
659 | *len = sizeof(u32); |
660 | break; | |
661 | ||
662 | case IPW_ORD_TABLE_2_MASK: | |
663 | /* | |
664 | * TABLE 2: Indirect access to a table of variable sized values | |
665 | * | |
666 | * This table consist of six values, each containing | |
667 | * - dword containing the starting offset of the data | |
668 | * - dword containing the lengh in the first 16bits | |
669 | * and the count in the second 16bits | |
670 | */ | |
671 | ||
672 | /* remove the table id from the ordinal */ | |
673 | ord &= IPW_ORD_TABLE_VALUE_MASK; | |
674 | ||
675 | /* boundary check */ | |
676 | if (ord > priv->table2_len) { | |
677 | IPW_DEBUG_ORD("ordinal value too long\n"); | |
678 | return -EINVAL; | |
679 | } | |
680 | ||
681 | /* get the address of statistic */ | |
682 | addr = ipw_read_reg32(priv, priv->table2_addr + (ord << 3)); | |
bf79451e JG |
683 | |
684 | /* get the second DW of statistics ; | |
43f66a6c | 685 | * two 16-bit words - first is length, second is count */ |
0edd5b44 JG |
686 | field_info = |
687 | ipw_read_reg32(priv, | |
688 | priv->table2_addr + (ord << 3) + | |
689 | sizeof(u32)); | |
bf79451e | 690 | |
43f66a6c | 691 | /* get each entry length */ |
0edd5b44 | 692 | field_len = *((u16 *) & field_info); |
bf79451e | 693 | |
43f66a6c | 694 | /* get number of entries */ |
0edd5b44 | 695 | field_count = *(((u16 *) & field_info) + 1); |
bf79451e | 696 | |
43f66a6c JK |
697 | /* abort if not enought memory */ |
698 | total_len = field_len * field_count; | |
699 | if (total_len > *len) { | |
700 | *len = total_len; | |
701 | return -EINVAL; | |
702 | } | |
bf79451e | 703 | |
43f66a6c JK |
704 | *len = total_len; |
705 | if (!total_len) | |
706 | return 0; | |
707 | ||
708 | IPW_DEBUG_ORD("addr = 0x%08x, total_len = %i, " | |
bf79451e | 709 | "field_info = 0x%08x\n", |
43f66a6c JK |
710 | addr, total_len, field_info); |
711 | ipw_read_indirect(priv, addr, val, total_len); | |
712 | break; | |
713 | ||
714 | default: | |
715 | IPW_DEBUG_ORD("Invalid ordinal!\n"); | |
716 | return -EINVAL; | |
717 | ||
718 | } | |
719 | ||
43f66a6c JK |
720 | return 0; |
721 | } | |
722 | ||
723 | static void ipw_init_ordinals(struct ipw_priv *priv) | |
724 | { | |
725 | priv->table0_addr = IPW_ORDINALS_TABLE_LOWER; | |
bf79451e | 726 | priv->table0_len = ipw_read32(priv, priv->table0_addr); |
43f66a6c JK |
727 | |
728 | IPW_DEBUG_ORD("table 0 offset at 0x%08x, len = %i\n", | |
729 | priv->table0_addr, priv->table0_len); | |
730 | ||
731 | priv->table1_addr = ipw_read32(priv, IPW_ORDINALS_TABLE_1); | |
732 | priv->table1_len = ipw_read_reg32(priv, priv->table1_addr); | |
733 | ||
734 | IPW_DEBUG_ORD("table 1 offset at 0x%08x, len = %i\n", | |
735 | priv->table1_addr, priv->table1_len); | |
736 | ||
737 | priv->table2_addr = ipw_read32(priv, IPW_ORDINALS_TABLE_2); | |
738 | priv->table2_len = ipw_read_reg32(priv, priv->table2_addr); | |
0edd5b44 | 739 | priv->table2_len &= 0x0000ffff; /* use first two bytes */ |
43f66a6c JK |
740 | |
741 | IPW_DEBUG_ORD("table 2 offset at 0x%08x, len = %i\n", | |
742 | priv->table2_addr, priv->table2_len); | |
743 | ||
744 | } | |
745 | ||
a73e22b2 | 746 | static u32 ipw_register_toggle(u32 reg) |
a613bffd | 747 | { |
b095c381 JK |
748 | reg &= ~IPW_START_STANDBY; |
749 | if (reg & IPW_GATE_ODMA) | |
750 | reg &= ~IPW_GATE_ODMA; | |
751 | if (reg & IPW_GATE_IDMA) | |
752 | reg &= ~IPW_GATE_IDMA; | |
753 | if (reg & IPW_GATE_ADMA) | |
754 | reg &= ~IPW_GATE_ADMA; | |
a613bffd JK |
755 | return reg; |
756 | } | |
757 | ||
758 | /* | |
759 | * LED behavior: | |
760 | * - On radio ON, turn on any LEDs that require to be on during start | |
761 | * - On initialization, start unassociated blink | |
762 | * - On association, disable unassociated blink | |
763 | * - On disassociation, start unassociated blink | |
764 | * - On radio OFF, turn off any LEDs started during radio on | |
765 | * | |
766 | */ | |
ede6111c ZY |
767 | #define LD_TIME_LINK_ON msecs_to_jiffies(300) |
768 | #define LD_TIME_LINK_OFF msecs_to_jiffies(2700) | |
769 | #define LD_TIME_ACT_ON msecs_to_jiffies(250) | |
a613bffd | 770 | |
a73e22b2 | 771 | static void ipw_led_link_on(struct ipw_priv *priv) |
a613bffd JK |
772 | { |
773 | unsigned long flags; | |
774 | u32 led; | |
775 | ||
776 | /* If configured to not use LEDs, or nic_type is 1, | |
777 | * then we don't toggle a LINK led */ | |
778 | if (priv->config & CFG_NO_LED || priv->nic_type == EEPROM_NIC_TYPE_1) | |
779 | return; | |
780 | ||
781 | spin_lock_irqsave(&priv->lock, flags); | |
782 | ||
783 | if (!(priv->status & STATUS_RF_KILL_MASK) && | |
784 | !(priv->status & STATUS_LED_LINK_ON)) { | |
785 | IPW_DEBUG_LED("Link LED On\n"); | |
b095c381 | 786 | led = ipw_read_reg32(priv, IPW_EVENT_REG); |
a613bffd JK |
787 | led |= priv->led_association_on; |
788 | ||
789 | led = ipw_register_toggle(led); | |
790 | ||
791 | IPW_DEBUG_LED("Reg: 0x%08X\n", led); | |
b095c381 | 792 | ipw_write_reg32(priv, IPW_EVENT_REG, led); |
a613bffd JK |
793 | |
794 | priv->status |= STATUS_LED_LINK_ON; | |
795 | ||
796 | /* If we aren't associated, schedule turning the LED off */ | |
797 | if (!(priv->status & STATUS_ASSOCIATED)) | |
798 | queue_delayed_work(priv->workqueue, | |
799 | &priv->led_link_off, | |
800 | LD_TIME_LINK_ON); | |
801 | } | |
802 | ||
803 | spin_unlock_irqrestore(&priv->lock, flags); | |
804 | } | |
805 | ||
c848d0af JK |
806 | static void ipw_bg_led_link_on(void *data) |
807 | { | |
808 | struct ipw_priv *priv = data; | |
4644151b | 809 | mutex_lock(&priv->mutex); |
c848d0af | 810 | ipw_led_link_on(data); |
4644151b | 811 | mutex_unlock(&priv->mutex); |
c848d0af JK |
812 | } |
813 | ||
a73e22b2 | 814 | static void ipw_led_link_off(struct ipw_priv *priv) |
a613bffd JK |
815 | { |
816 | unsigned long flags; | |
817 | u32 led; | |
818 | ||
819 | /* If configured not to use LEDs, or nic type is 1, | |
820 | * then we don't goggle the LINK led. */ | |
821 | if (priv->config & CFG_NO_LED || priv->nic_type == EEPROM_NIC_TYPE_1) | |
822 | return; | |
823 | ||
824 | spin_lock_irqsave(&priv->lock, flags); | |
825 | ||
826 | if (priv->status & STATUS_LED_LINK_ON) { | |
b095c381 | 827 | led = ipw_read_reg32(priv, IPW_EVENT_REG); |
a613bffd JK |
828 | led &= priv->led_association_off; |
829 | led = ipw_register_toggle(led); | |
830 | ||
831 | IPW_DEBUG_LED("Reg: 0x%08X\n", led); | |
b095c381 | 832 | ipw_write_reg32(priv, IPW_EVENT_REG, led); |
a613bffd JK |
833 | |
834 | IPW_DEBUG_LED("Link LED Off\n"); | |
835 | ||
836 | priv->status &= ~STATUS_LED_LINK_ON; | |
837 | ||
838 | /* If we aren't associated and the radio is on, schedule | |
839 | * turning the LED on (blink while unassociated) */ | |
840 | if (!(priv->status & STATUS_RF_KILL_MASK) && | |
841 | !(priv->status & STATUS_ASSOCIATED)) | |
842 | queue_delayed_work(priv->workqueue, &priv->led_link_on, | |
843 | LD_TIME_LINK_OFF); | |
844 | ||
845 | } | |
846 | ||
847 | spin_unlock_irqrestore(&priv->lock, flags); | |
848 | } | |
849 | ||
c848d0af JK |
850 | static void ipw_bg_led_link_off(void *data) |
851 | { | |
852 | struct ipw_priv *priv = data; | |
4644151b | 853 | mutex_lock(&priv->mutex); |
c848d0af | 854 | ipw_led_link_off(data); |
4644151b | 855 | mutex_unlock(&priv->mutex); |
c848d0af JK |
856 | } |
857 | ||
858119e1 | 858 | static void __ipw_led_activity_on(struct ipw_priv *priv) |
a613bffd | 859 | { |
a613bffd JK |
860 | u32 led; |
861 | ||
862 | if (priv->config & CFG_NO_LED) | |
863 | return; | |
864 | ||
b095c381 | 865 | if (priv->status & STATUS_RF_KILL_MASK) |
a613bffd | 866 | return; |
a613bffd JK |
867 | |
868 | if (!(priv->status & STATUS_LED_ACT_ON)) { | |
b095c381 | 869 | led = ipw_read_reg32(priv, IPW_EVENT_REG); |
a613bffd JK |
870 | led |= priv->led_activity_on; |
871 | ||
872 | led = ipw_register_toggle(led); | |
873 | ||
874 | IPW_DEBUG_LED("Reg: 0x%08X\n", led); | |
b095c381 | 875 | ipw_write_reg32(priv, IPW_EVENT_REG, led); |
a613bffd JK |
876 | |
877 | IPW_DEBUG_LED("Activity LED On\n"); | |
878 | ||
879 | priv->status |= STATUS_LED_ACT_ON; | |
880 | ||
c848d0af | 881 | cancel_delayed_work(&priv->led_act_off); |
a613bffd JK |
882 | queue_delayed_work(priv->workqueue, &priv->led_act_off, |
883 | LD_TIME_ACT_ON); | |
884 | } else { | |
885 | /* Reschedule LED off for full time period */ | |
886 | cancel_delayed_work(&priv->led_act_off); | |
887 | queue_delayed_work(priv->workqueue, &priv->led_act_off, | |
888 | LD_TIME_ACT_ON); | |
889 | } | |
b095c381 | 890 | } |
a613bffd | 891 | |
a73e22b2 | 892 | #if 0 |
b095c381 JK |
893 | void ipw_led_activity_on(struct ipw_priv *priv) |
894 | { | |
895 | unsigned long flags; | |
896 | spin_lock_irqsave(&priv->lock, flags); | |
897 | __ipw_led_activity_on(priv); | |
a613bffd JK |
898 | spin_unlock_irqrestore(&priv->lock, flags); |
899 | } | |
a73e22b2 | 900 | #endif /* 0 */ |
a613bffd | 901 | |
a73e22b2 | 902 | static void ipw_led_activity_off(struct ipw_priv *priv) |
a613bffd JK |
903 | { |
904 | unsigned long flags; | |
905 | u32 led; | |
906 | ||
907 | if (priv->config & CFG_NO_LED) | |
908 | return; | |
909 | ||
910 | spin_lock_irqsave(&priv->lock, flags); | |
911 | ||
912 | if (priv->status & STATUS_LED_ACT_ON) { | |
b095c381 | 913 | led = ipw_read_reg32(priv, IPW_EVENT_REG); |
a613bffd JK |
914 | led &= priv->led_activity_off; |
915 | ||
916 | led = ipw_register_toggle(led); | |
917 | ||
918 | IPW_DEBUG_LED("Reg: 0x%08X\n", led); | |
b095c381 | 919 | ipw_write_reg32(priv, IPW_EVENT_REG, led); |
a613bffd JK |
920 | |
921 | IPW_DEBUG_LED("Activity LED Off\n"); | |
922 | ||
923 | priv->status &= ~STATUS_LED_ACT_ON; | |
924 | } | |
925 | ||
926 | spin_unlock_irqrestore(&priv->lock, flags); | |
927 | } | |
928 | ||
c848d0af JK |
929 | static void ipw_bg_led_activity_off(void *data) |
930 | { | |
931 | struct ipw_priv *priv = data; | |
4644151b | 932 | mutex_lock(&priv->mutex); |
c848d0af | 933 | ipw_led_activity_off(data); |
4644151b | 934 | mutex_unlock(&priv->mutex); |
c848d0af JK |
935 | } |
936 | ||
a73e22b2 | 937 | static void ipw_led_band_on(struct ipw_priv *priv) |
a613bffd JK |
938 | { |
939 | unsigned long flags; | |
940 | u32 led; | |
941 | ||
942 | /* Only nic type 1 supports mode LEDs */ | |
c848d0af JK |
943 | if (priv->config & CFG_NO_LED || |
944 | priv->nic_type != EEPROM_NIC_TYPE_1 || !priv->assoc_network) | |
a613bffd JK |
945 | return; |
946 | ||
947 | spin_lock_irqsave(&priv->lock, flags); | |
948 | ||
b095c381 | 949 | led = ipw_read_reg32(priv, IPW_EVENT_REG); |
a613bffd JK |
950 | if (priv->assoc_network->mode == IEEE_A) { |
951 | led |= priv->led_ofdm_on; | |
952 | led &= priv->led_association_off; | |
953 | IPW_DEBUG_LED("Mode LED On: 802.11a\n"); | |
954 | } else if (priv->assoc_network->mode == IEEE_G) { | |
955 | led |= priv->led_ofdm_on; | |
956 | led |= priv->led_association_on; | |
957 | IPW_DEBUG_LED("Mode LED On: 802.11g\n"); | |
958 | } else { | |
959 | led &= priv->led_ofdm_off; | |
960 | led |= priv->led_association_on; | |
961 | IPW_DEBUG_LED("Mode LED On: 802.11b\n"); | |
962 | } | |
963 | ||
964 | led = ipw_register_toggle(led); | |
965 | ||
966 | IPW_DEBUG_LED("Reg: 0x%08X\n", led); | |
b095c381 | 967 | ipw_write_reg32(priv, IPW_EVENT_REG, led); |
a613bffd JK |
968 | |
969 | spin_unlock_irqrestore(&priv->lock, flags); | |
970 | } | |
971 | ||
a73e22b2 | 972 | static void ipw_led_band_off(struct ipw_priv *priv) |
a613bffd JK |
973 | { |
974 | unsigned long flags; | |
975 | u32 led; | |
976 | ||
977 | /* Only nic type 1 supports mode LEDs */ | |
978 | if (priv->config & CFG_NO_LED || priv->nic_type != EEPROM_NIC_TYPE_1) | |
979 | return; | |
980 | ||
981 | spin_lock_irqsave(&priv->lock, flags); | |
982 | ||
b095c381 | 983 | led = ipw_read_reg32(priv, IPW_EVENT_REG); |
a613bffd JK |
984 | led &= priv->led_ofdm_off; |
985 | led &= priv->led_association_off; | |
986 | ||
987 | led = ipw_register_toggle(led); | |
988 | ||
989 | IPW_DEBUG_LED("Reg: 0x%08X\n", led); | |
b095c381 | 990 | ipw_write_reg32(priv, IPW_EVENT_REG, led); |
a613bffd JK |
991 | |
992 | spin_unlock_irqrestore(&priv->lock, flags); | |
993 | } | |
994 | ||
a73e22b2 | 995 | static void ipw_led_radio_on(struct ipw_priv *priv) |
a613bffd JK |
996 | { |
997 | ipw_led_link_on(priv); | |
998 | } | |
999 | ||
a73e22b2 | 1000 | static void ipw_led_radio_off(struct ipw_priv *priv) |
a613bffd JK |
1001 | { |
1002 | ipw_led_activity_off(priv); | |
1003 | ipw_led_link_off(priv); | |
1004 | } | |
1005 | ||
a73e22b2 | 1006 | static void ipw_led_link_up(struct ipw_priv *priv) |
a613bffd JK |
1007 | { |
1008 | /* Set the Link Led on for all nic types */ | |
1009 | ipw_led_link_on(priv); | |
1010 | } | |
1011 | ||
a73e22b2 | 1012 | static void ipw_led_link_down(struct ipw_priv *priv) |
a613bffd JK |
1013 | { |
1014 | ipw_led_activity_off(priv); | |
1015 | ipw_led_link_off(priv); | |
1016 | ||
1017 | if (priv->status & STATUS_RF_KILL_MASK) | |
1018 | ipw_led_radio_off(priv); | |
1019 | } | |
1020 | ||
a73e22b2 | 1021 | static void ipw_led_init(struct ipw_priv *priv) |
a613bffd JK |
1022 | { |
1023 | priv->nic_type = priv->eeprom[EEPROM_NIC_TYPE]; | |
1024 | ||
1025 | /* Set the default PINs for the link and activity leds */ | |
b095c381 JK |
1026 | priv->led_activity_on = IPW_ACTIVITY_LED; |
1027 | priv->led_activity_off = ~(IPW_ACTIVITY_LED); | |
a613bffd | 1028 | |
b095c381 JK |
1029 | priv->led_association_on = IPW_ASSOCIATED_LED; |
1030 | priv->led_association_off = ~(IPW_ASSOCIATED_LED); | |
a613bffd JK |
1031 | |
1032 | /* Set the default PINs for the OFDM leds */ | |
b095c381 JK |
1033 | priv->led_ofdm_on = IPW_OFDM_LED; |
1034 | priv->led_ofdm_off = ~(IPW_OFDM_LED); | |
a613bffd JK |
1035 | |
1036 | switch (priv->nic_type) { | |
1037 | case EEPROM_NIC_TYPE_1: | |
1038 | /* In this NIC type, the LEDs are reversed.... */ | |
b095c381 JK |
1039 | priv->led_activity_on = IPW_ASSOCIATED_LED; |
1040 | priv->led_activity_off = ~(IPW_ASSOCIATED_LED); | |
1041 | priv->led_association_on = IPW_ACTIVITY_LED; | |
1042 | priv->led_association_off = ~(IPW_ACTIVITY_LED); | |
a613bffd JK |
1043 | |
1044 | if (!(priv->config & CFG_NO_LED)) | |
1045 | ipw_led_band_on(priv); | |
1046 | ||
1047 | /* And we don't blink link LEDs for this nic, so | |
1048 | * just return here */ | |
1049 | return; | |
1050 | ||
1051 | case EEPROM_NIC_TYPE_3: | |
1052 | case EEPROM_NIC_TYPE_2: | |
1053 | case EEPROM_NIC_TYPE_4: | |
1054 | case EEPROM_NIC_TYPE_0: | |
1055 | break; | |
1056 | ||
1057 | default: | |
1058 | IPW_DEBUG_INFO("Unknown NIC type from EEPROM: %d\n", | |
1059 | priv->nic_type); | |
1060 | priv->nic_type = EEPROM_NIC_TYPE_0; | |
1061 | break; | |
1062 | } | |
1063 | ||
1064 | if (!(priv->config & CFG_NO_LED)) { | |
1065 | if (priv->status & STATUS_ASSOCIATED) | |
1066 | ipw_led_link_on(priv); | |
1067 | else | |
1068 | ipw_led_link_off(priv); | |
1069 | } | |
1070 | } | |
1071 | ||
a73e22b2 | 1072 | static void ipw_led_shutdown(struct ipw_priv *priv) |
a613bffd | 1073 | { |
a613bffd JK |
1074 | ipw_led_activity_off(priv); |
1075 | ipw_led_link_off(priv); | |
1076 | ipw_led_band_off(priv); | |
afbf30a2 JK |
1077 | cancel_delayed_work(&priv->led_link_on); |
1078 | cancel_delayed_work(&priv->led_link_off); | |
1079 | cancel_delayed_work(&priv->led_act_off); | |
a613bffd JK |
1080 | } |
1081 | ||
43f66a6c JK |
1082 | /* |
1083 | * The following adds a new attribute to the sysfs representation | |
1084 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/ipw/) | |
1085 | * used for controling the debug level. | |
bf79451e | 1086 | * |
43f66a6c JK |
1087 | * See the level definitions in ipw for details. |
1088 | */ | |
1089 | static ssize_t show_debug_level(struct device_driver *d, char *buf) | |
1090 | { | |
1091 | return sprintf(buf, "0x%08X\n", ipw_debug_level); | |
1092 | } | |
a613bffd JK |
1093 | |
1094 | static ssize_t store_debug_level(struct device_driver *d, const char *buf, | |
1095 | size_t count) | |
43f66a6c JK |
1096 | { |
1097 | char *p = (char *)buf; | |
1098 | u32 val; | |
1099 | ||
1100 | if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') { | |
1101 | p++; | |
1102 | if (p[0] == 'x' || p[0] == 'X') | |
1103 | p++; | |
1104 | val = simple_strtoul(p, &p, 16); | |
1105 | } else | |
1106 | val = simple_strtoul(p, &p, 10); | |
bf79451e JG |
1107 | if (p == buf) |
1108 | printk(KERN_INFO DRV_NAME | |
43f66a6c JK |
1109 | ": %s is not in hex or decimal form.\n", buf); |
1110 | else | |
1111 | ipw_debug_level = val; | |
1112 | ||
1113 | return strnlen(buf, count); | |
1114 | } | |
1115 | ||
bf79451e | 1116 | static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, |
43f66a6c JK |
1117 | show_debug_level, store_debug_level); |
1118 | ||
b39860c6 | 1119 | static inline u32 ipw_get_event_log_len(struct ipw_priv *priv) |
43f66a6c | 1120 | { |
c8fe6679 | 1121 | /* length = 1st dword in log */ |
b39860c6 | 1122 | return ipw_read_reg32(priv, ipw_read32(priv, IPW_EVENT_LOG)); |
43f66a6c | 1123 | } |
0edd5b44 | 1124 | |
b39860c6 JK |
1125 | static void ipw_capture_event_log(struct ipw_priv *priv, |
1126 | u32 log_len, struct ipw_event *log) | |
43f66a6c | 1127 | { |
b39860c6 | 1128 | u32 base; |
0edd5b44 | 1129 | |
b39860c6 JK |
1130 | if (log_len) { |
1131 | base = ipw_read32(priv, IPW_EVENT_LOG); | |
1132 | ipw_read_indirect(priv, base + sizeof(base) + sizeof(u32), | |
1133 | (u8 *) log, sizeof(*log) * log_len); | |
1134 | } | |
1135 | } | |
43f66a6c | 1136 | |
b39860c6 | 1137 | static struct ipw_fw_error *ipw_alloc_error_log(struct ipw_priv *priv) |
43f66a6c | 1138 | { |
b39860c6 JK |
1139 | struct ipw_fw_error *error; |
1140 | u32 log_len = ipw_get_event_log_len(priv); | |
1141 | u32 base = ipw_read32(priv, IPW_ERROR_LOG); | |
1142 | u32 elem_len = ipw_read_reg32(priv, base); | |
43f66a6c | 1143 | |
b39860c6 JK |
1144 | error = kmalloc(sizeof(*error) + |
1145 | sizeof(*error->elem) * elem_len + | |
1146 | sizeof(*error->log) * log_len, GFP_ATOMIC); | |
1147 | if (!error) { | |
1148 | IPW_ERROR("Memory allocation for firmware error log " | |
1149 | "failed.\n"); | |
1150 | return NULL; | |
43f66a6c | 1151 | } |
f6c5cb7c | 1152 | error->jiffies = jiffies; |
b39860c6 JK |
1153 | error->status = priv->status; |
1154 | error->config = priv->config; | |
1155 | error->elem_len = elem_len; | |
1156 | error->log_len = log_len; | |
1157 | error->elem = (struct ipw_error_elem *)error->payload; | |
3b26b110 | 1158 | error->log = (struct ipw_event *)(error->elem + elem_len); |
b39860c6 JK |
1159 | |
1160 | ipw_capture_event_log(priv, log_len, error->log); | |
bf79451e | 1161 | |
b39860c6 JK |
1162 | if (elem_len) |
1163 | ipw_read_indirect(priv, base + sizeof(base), (u8 *) error->elem, | |
1164 | sizeof(*error->elem) * elem_len); | |
1165 | ||
1166 | return error; | |
43f66a6c | 1167 | } |
0edd5b44 | 1168 | |
b39860c6 JK |
1169 | static void ipw_free_error_log(struct ipw_fw_error *error) |
1170 | { | |
1171 | if (error) | |
1172 | kfree(error); | |
1173 | } | |
43f66a6c | 1174 | |
b39860c6 JK |
1175 | static ssize_t show_event_log(struct device *d, |
1176 | struct device_attribute *attr, char *buf) | |
43f66a6c | 1177 | { |
b39860c6 JK |
1178 | struct ipw_priv *priv = dev_get_drvdata(d); |
1179 | u32 log_len = ipw_get_event_log_len(priv); | |
1180 | struct ipw_event log[log_len]; | |
1181 | u32 len = 0, i; | |
43f66a6c | 1182 | |
b39860c6 | 1183 | ipw_capture_event_log(priv, log_len, log); |
43f66a6c | 1184 | |
b39860c6 JK |
1185 | len += snprintf(buf + len, PAGE_SIZE - len, "%08X", log_len); |
1186 | for (i = 0; i < log_len; i++) | |
1187 | len += snprintf(buf + len, PAGE_SIZE - len, | |
1188 | "\n%08X%08X%08X", | |
1189 | log[i].time, log[i].event, log[i].data); | |
1190 | len += snprintf(buf + len, PAGE_SIZE - len, "\n"); | |
1191 | return len; | |
43f66a6c | 1192 | } |
0edd5b44 | 1193 | |
b39860c6 | 1194 | static DEVICE_ATTR(event_log, S_IRUGO, show_event_log, NULL); |
43f66a6c | 1195 | |
b39860c6 JK |
1196 | static ssize_t show_error(struct device *d, |
1197 | struct device_attribute *attr, char *buf) | |
43f66a6c | 1198 | { |
b39860c6 JK |
1199 | struct ipw_priv *priv = dev_get_drvdata(d); |
1200 | u32 len = 0, i; | |
1201 | if (!priv->error) | |
1202 | return 0; | |
1203 | len += snprintf(buf + len, PAGE_SIZE - len, | |
f6c5cb7c JK |
1204 | "%08lX%08X%08X%08X", |
1205 | priv->error->jiffies, | |
b39860c6 JK |
1206 | priv->error->status, |
1207 | priv->error->config, priv->error->elem_len); | |
1208 | for (i = 0; i < priv->error->elem_len; i++) | |
1209 | len += snprintf(buf + len, PAGE_SIZE - len, | |
1210 | "\n%08X%08X%08X%08X%08X%08X%08X", | |
1211 | priv->error->elem[i].time, | |
1212 | priv->error->elem[i].desc, | |
1213 | priv->error->elem[i].blink1, | |
1214 | priv->error->elem[i].blink2, | |
1215 | priv->error->elem[i].link1, | |
1216 | priv->error->elem[i].link2, | |
1217 | priv->error->elem[i].data); | |
1218 | ||
1219 | len += snprintf(buf + len, PAGE_SIZE - len, | |
1220 | "\n%08X", priv->error->log_len); | |
1221 | for (i = 0; i < priv->error->log_len; i++) | |
1222 | len += snprintf(buf + len, PAGE_SIZE - len, | |
1223 | "\n%08X%08X%08X", | |
1224 | priv->error->log[i].time, | |
1225 | priv->error->log[i].event, | |
1226 | priv->error->log[i].data); | |
1227 | len += snprintf(buf + len, PAGE_SIZE - len, "\n"); | |
1228 | return len; | |
1229 | } | |
1230 | ||
1231 | static ssize_t clear_error(struct device *d, | |
1232 | struct device_attribute *attr, | |
1233 | const char *buf, size_t count) | |
1234 | { | |
1235 | struct ipw_priv *priv = dev_get_drvdata(d); | |
1236 | if (priv->error) { | |
1237 | ipw_free_error_log(priv->error); | |
1238 | priv->error = NULL; | |
1239 | } | |
1240 | return count; | |
1241 | } | |
43f66a6c | 1242 | |
b39860c6 | 1243 | static DEVICE_ATTR(error, S_IRUGO | S_IWUSR, show_error, clear_error); |
43f66a6c | 1244 | |
f6c5cb7c JK |
1245 | static ssize_t show_cmd_log(struct device *d, |
1246 | struct device_attribute *attr, char *buf) | |
1247 | { | |
1248 | struct ipw_priv *priv = dev_get_drvdata(d); | |
1249 | u32 len = 0, i; | |
1250 | if (!priv->cmdlog) | |
1251 | return 0; | |
1252 | for (i = (priv->cmdlog_pos + 1) % priv->cmdlog_len; | |
1253 | (i != priv->cmdlog_pos) && (PAGE_SIZE - len); | |
1254 | i = (i + 1) % priv->cmdlog_len) { | |
1255 | len += | |
1256 | snprintf(buf + len, PAGE_SIZE - len, | |
1257 | "\n%08lX%08X%08X%08X\n", priv->cmdlog[i].jiffies, | |
1258 | priv->cmdlog[i].retcode, priv->cmdlog[i].cmd.cmd, | |
1259 | priv->cmdlog[i].cmd.len); | |
1260 | len += | |
1261 | snprintk_buf(buf + len, PAGE_SIZE - len, | |
1262 | (u8 *) priv->cmdlog[i].cmd.param, | |
1263 | priv->cmdlog[i].cmd.len); | |
1264 | len += snprintf(buf + len, PAGE_SIZE - len, "\n"); | |
1265 | } | |
1266 | len += snprintf(buf + len, PAGE_SIZE - len, "\n"); | |
1267 | return len; | |
43f66a6c | 1268 | } |
0edd5b44 | 1269 | |
f6c5cb7c | 1270 | static DEVICE_ATTR(cmd_log, S_IRUGO, show_cmd_log, NULL); |
43f66a6c | 1271 | |
a613bffd JK |
1272 | static ssize_t show_scan_age(struct device *d, struct device_attribute *attr, |
1273 | char *buf) | |
43f66a6c | 1274 | { |
a613bffd JK |
1275 | struct ipw_priv *priv = dev_get_drvdata(d); |
1276 | return sprintf(buf, "%d\n", priv->ieee->scan_age); | |
1277 | } | |
1278 | ||
1279 | static ssize_t store_scan_age(struct device *d, struct device_attribute *attr, | |
1280 | const char *buf, size_t count) | |
1281 | { | |
1282 | struct ipw_priv *priv = dev_get_drvdata(d); | |
0f52bf90 | 1283 | #ifdef CONFIG_IPW2200_DEBUG |
a613bffd | 1284 | struct net_device *dev = priv->net_dev; |
c848d0af | 1285 | #endif |
a613bffd JK |
1286 | char buffer[] = "00000000"; |
1287 | unsigned long len = | |
1288 | (sizeof(buffer) - 1) > count ? count : sizeof(buffer) - 1; | |
1289 | unsigned long val; | |
1290 | char *p = buffer; | |
1291 | ||
1292 | IPW_DEBUG_INFO("enter\n"); | |
1293 | ||
1294 | strncpy(buffer, buf, len); | |
1295 | buffer[len] = 0; | |
1296 | ||
1297 | if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') { | |
1298 | p++; | |
1299 | if (p[0] == 'x' || p[0] == 'X') | |
1300 | p++; | |
1301 | val = simple_strtoul(p, &p, 16); | |
1302 | } else | |
1303 | val = simple_strtoul(p, &p, 10); | |
1304 | if (p == buffer) { | |
1305 | IPW_DEBUG_INFO("%s: user supplied invalid value.\n", dev->name); | |
1306 | } else { | |
1307 | priv->ieee->scan_age = val; | |
1308 | IPW_DEBUG_INFO("set scan_age = %u\n", priv->ieee->scan_age); | |
1309 | } | |
1310 | ||
1311 | IPW_DEBUG_INFO("exit\n"); | |
1312 | return len; | |
1313 | } | |
1314 | ||
1315 | static DEVICE_ATTR(scan_age, S_IWUSR | S_IRUGO, show_scan_age, store_scan_age); | |
1316 | ||
1317 | static ssize_t show_led(struct device *d, struct device_attribute *attr, | |
1318 | char *buf) | |
1319 | { | |
1320 | struct ipw_priv *priv = dev_get_drvdata(d); | |
1321 | return sprintf(buf, "%d\n", (priv->config & CFG_NO_LED) ? 0 : 1); | |
1322 | } | |
1323 | ||
1324 | static ssize_t store_led(struct device *d, struct device_attribute *attr, | |
1325 | const char *buf, size_t count) | |
1326 | { | |
1327 | struct ipw_priv *priv = dev_get_drvdata(d); | |
1328 | ||
1329 | IPW_DEBUG_INFO("enter\n"); | |
1330 | ||
1331 | if (count == 0) | |
1332 | return 0; | |
1333 | ||
1334 | if (*buf == 0) { | |
1335 | IPW_DEBUG_LED("Disabling LED control.\n"); | |
1336 | priv->config |= CFG_NO_LED; | |
1337 | ipw_led_shutdown(priv); | |
1338 | } else { | |
1339 | IPW_DEBUG_LED("Enabling LED control.\n"); | |
1340 | priv->config &= ~CFG_NO_LED; | |
1341 | ipw_led_init(priv); | |
1342 | } | |
1343 | ||
1344 | IPW_DEBUG_INFO("exit\n"); | |
1345 | return count; | |
1346 | } | |
1347 | ||
1348 | static DEVICE_ATTR(led, S_IWUSR | S_IRUGO, show_led, store_led); | |
1349 | ||
ad3fee56 | 1350 | static ssize_t show_status(struct device *d, |
0edd5b44 | 1351 | struct device_attribute *attr, char *buf) |
43f66a6c | 1352 | { |
ad3fee56 | 1353 | struct ipw_priv *p = d->driver_data; |
43f66a6c JK |
1354 | return sprintf(buf, "0x%08x\n", (int)p->status); |
1355 | } | |
0edd5b44 | 1356 | |
43f66a6c JK |
1357 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); |
1358 | ||
ad3fee56 AM |
1359 | static ssize_t show_cfg(struct device *d, struct device_attribute *attr, |
1360 | char *buf) | |
43f66a6c | 1361 | { |
ad3fee56 | 1362 | struct ipw_priv *p = d->driver_data; |
43f66a6c JK |
1363 | return sprintf(buf, "0x%08x\n", (int)p->config); |
1364 | } | |
0edd5b44 | 1365 | |
43f66a6c JK |
1366 | static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL); |
1367 | ||
ad3fee56 | 1368 | static ssize_t show_nic_type(struct device *d, |
0edd5b44 | 1369 | struct device_attribute *attr, char *buf) |
43f66a6c | 1370 | { |
a613bffd JK |
1371 | struct ipw_priv *priv = d->driver_data; |
1372 | return sprintf(buf, "TYPE: %d\n", priv->nic_type); | |
43f66a6c | 1373 | } |
0edd5b44 | 1374 | |
43f66a6c JK |
1375 | static DEVICE_ATTR(nic_type, S_IRUGO, show_nic_type, NULL); |
1376 | ||
ad3fee56 | 1377 | static ssize_t show_ucode_version(struct device *d, |
0edd5b44 | 1378 | struct device_attribute *attr, char *buf) |
43f66a6c JK |
1379 | { |
1380 | u32 len = sizeof(u32), tmp = 0; | |
ad3fee56 | 1381 | struct ipw_priv *p = d->driver_data; |
43f66a6c | 1382 | |
0edd5b44 | 1383 | if (ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len)) |
43f66a6c JK |
1384 | return 0; |
1385 | ||
1386 | return sprintf(buf, "0x%08x\n", tmp); | |
1387 | } | |
0edd5b44 JG |
1388 | |
1389 | static DEVICE_ATTR(ucode_version, S_IWUSR | S_IRUGO, show_ucode_version, NULL); | |
43f66a6c | 1390 | |
ad3fee56 AM |
1391 | static ssize_t show_rtc(struct device *d, struct device_attribute *attr, |
1392 | char *buf) | |
43f66a6c JK |
1393 | { |
1394 | u32 len = sizeof(u32), tmp = 0; | |
ad3fee56 | 1395 | struct ipw_priv *p = d->driver_data; |
43f66a6c | 1396 | |
0edd5b44 | 1397 | if (ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len)) |
43f66a6c JK |
1398 | return 0; |
1399 | ||
1400 | return sprintf(buf, "0x%08x\n", tmp); | |
1401 | } | |
0edd5b44 JG |
1402 | |
1403 | static DEVICE_ATTR(rtc, S_IWUSR | S_IRUGO, show_rtc, NULL); | |
43f66a6c JK |
1404 | |
1405 | /* | |
1406 | * Add a device attribute to view/control the delay between eeprom | |
1407 | * operations. | |
1408 | */ | |
ad3fee56 | 1409 | static ssize_t show_eeprom_delay(struct device *d, |
0edd5b44 | 1410 | struct device_attribute *attr, char *buf) |
43f66a6c | 1411 | { |
0edd5b44 | 1412 | int n = ((struct ipw_priv *)d->driver_data)->eeprom_delay; |
43f66a6c JK |
1413 | return sprintf(buf, "%i\n", n); |
1414 | } | |
ad3fee56 | 1415 | static ssize_t store_eeprom_delay(struct device *d, |
0edd5b44 JG |
1416 | struct device_attribute *attr, |
1417 | const char *buf, size_t count) | |
43f66a6c | 1418 | { |
ad3fee56 | 1419 | struct ipw_priv *p = d->driver_data; |
43f66a6c JK |
1420 | sscanf(buf, "%i", &p->eeprom_delay); |
1421 | return strnlen(buf, count); | |
1422 | } | |
0edd5b44 JG |
1423 | |
1424 | static DEVICE_ATTR(eeprom_delay, S_IWUSR | S_IRUGO, | |
1425 | show_eeprom_delay, store_eeprom_delay); | |
43f66a6c | 1426 | |
ad3fee56 | 1427 | static ssize_t show_command_event_reg(struct device *d, |
0edd5b44 | 1428 | struct device_attribute *attr, char *buf) |
43f66a6c JK |
1429 | { |
1430 | u32 reg = 0; | |
ad3fee56 | 1431 | struct ipw_priv *p = d->driver_data; |
43f66a6c | 1432 | |
b095c381 | 1433 | reg = ipw_read_reg32(p, IPW_INTERNAL_CMD_EVENT); |
43f66a6c JK |
1434 | return sprintf(buf, "0x%08x\n", reg); |
1435 | } | |
ad3fee56 | 1436 | static ssize_t store_command_event_reg(struct device *d, |
0edd5b44 JG |
1437 | struct device_attribute *attr, |
1438 | const char *buf, size_t count) | |
43f66a6c JK |
1439 | { |
1440 | u32 reg; | |
ad3fee56 | 1441 | struct ipw_priv *p = d->driver_data; |
43f66a6c JK |
1442 | |
1443 | sscanf(buf, "%x", ®); | |
b095c381 | 1444 | ipw_write_reg32(p, IPW_INTERNAL_CMD_EVENT, reg); |
43f66a6c JK |
1445 | return strnlen(buf, count); |
1446 | } | |
0edd5b44 JG |
1447 | |
1448 | static DEVICE_ATTR(command_event_reg, S_IWUSR | S_IRUGO, | |
1449 | show_command_event_reg, store_command_event_reg); | |
43f66a6c | 1450 | |
ad3fee56 | 1451 | static ssize_t show_mem_gpio_reg(struct device *d, |
0edd5b44 | 1452 | struct device_attribute *attr, char *buf) |
43f66a6c JK |
1453 | { |
1454 | u32 reg = 0; | |
ad3fee56 | 1455 | struct ipw_priv *p = d->driver_data; |
43f66a6c JK |
1456 | |
1457 | reg = ipw_read_reg32(p, 0x301100); | |
1458 | return sprintf(buf, "0x%08x\n", reg); | |
1459 | } | |
ad3fee56 | 1460 | static ssize_t store_mem_gpio_reg(struct device *d, |
0edd5b44 JG |
1461 | struct device_attribute *attr, |
1462 | const char *buf, size_t count) | |
43f66a6c JK |
1463 | { |
1464 | u32 reg; | |
ad3fee56 | 1465 | struct ipw_priv *p = d->driver_data; |
43f66a6c JK |
1466 | |
1467 | sscanf(buf, "%x", ®); | |
1468 | ipw_write_reg32(p, 0x301100, reg); | |
1469 | return strnlen(buf, count); | |
1470 | } | |
0edd5b44 JG |
1471 | |
1472 | static DEVICE_ATTR(mem_gpio_reg, S_IWUSR | S_IRUGO, | |
1473 | show_mem_gpio_reg, store_mem_gpio_reg); | |
43f66a6c | 1474 | |
ad3fee56 | 1475 | static ssize_t show_indirect_dword(struct device *d, |
0edd5b44 | 1476 | struct device_attribute *attr, char *buf) |
43f66a6c JK |
1477 | { |
1478 | u32 reg = 0; | |
ad3fee56 | 1479 | struct ipw_priv *priv = d->driver_data; |
afbf30a2 | 1480 | |
bf79451e | 1481 | if (priv->status & STATUS_INDIRECT_DWORD) |
43f66a6c | 1482 | reg = ipw_read_reg32(priv, priv->indirect_dword); |
bf79451e | 1483 | else |
43f66a6c | 1484 | reg = 0; |
bf79451e | 1485 | |
43f66a6c JK |
1486 | return sprintf(buf, "0x%08x\n", reg); |
1487 | } | |
ad3fee56 | 1488 | static ssize_t store_indirect_dword(struct device *d, |
0edd5b44 JG |
1489 | struct device_attribute *attr, |
1490 | const char *buf, size_t count) | |
43f66a6c | 1491 | { |
ad3fee56 | 1492 | struct ipw_priv *priv = d->driver_data; |
43f66a6c JK |
1493 | |
1494 | sscanf(buf, "%x", &priv->indirect_dword); | |
1495 | priv->status |= STATUS_INDIRECT_DWORD; | |
1496 | return strnlen(buf, count); | |
1497 | } | |
0edd5b44 JG |
1498 | |
1499 | static DEVICE_ATTR(indirect_dword, S_IWUSR | S_IRUGO, | |
1500 | show_indirect_dword, store_indirect_dword); | |
43f66a6c | 1501 | |
ad3fee56 | 1502 | static ssize_t show_indirect_byte(struct device *d, |
0edd5b44 | 1503 | struct device_attribute *attr, char *buf) |
43f66a6c JK |
1504 | { |
1505 | u8 reg = 0; | |
ad3fee56 | 1506 | struct ipw_priv *priv = d->driver_data; |
afbf30a2 | 1507 | |
bf79451e | 1508 | if (priv->status & STATUS_INDIRECT_BYTE) |
43f66a6c | 1509 | reg = ipw_read_reg8(priv, priv->indirect_byte); |
bf79451e | 1510 | else |
43f66a6c JK |
1511 | reg = 0; |
1512 | ||
1513 | return sprintf(buf, "0x%02x\n", reg); | |
1514 | } | |
ad3fee56 | 1515 | static ssize_t store_indirect_byte(struct device *d, |
0edd5b44 JG |
1516 | struct device_attribute *attr, |
1517 | const char *buf, size_t count) | |
43f66a6c | 1518 | { |
ad3fee56 | 1519 | struct ipw_priv *priv = d->driver_data; |
43f66a6c JK |
1520 | |
1521 | sscanf(buf, "%x", &priv->indirect_byte); | |
1522 | priv->status |= STATUS_INDIRECT_BYTE; | |
1523 | return strnlen(buf, count); | |
1524 | } | |
0edd5b44 JG |
1525 | |
1526 | static DEVICE_ATTR(indirect_byte, S_IWUSR | S_IRUGO, | |
43f66a6c JK |
1527 | show_indirect_byte, store_indirect_byte); |
1528 | ||
ad3fee56 | 1529 | static ssize_t show_direct_dword(struct device *d, |
0edd5b44 | 1530 | struct device_attribute *attr, char *buf) |
43f66a6c JK |
1531 | { |
1532 | u32 reg = 0; | |
ad3fee56 | 1533 | struct ipw_priv *priv = d->driver_data; |
43f66a6c | 1534 | |
bf79451e | 1535 | if (priv->status & STATUS_DIRECT_DWORD) |
43f66a6c | 1536 | reg = ipw_read32(priv, priv->direct_dword); |
bf79451e | 1537 | else |
43f66a6c JK |
1538 | reg = 0; |
1539 | ||
1540 | return sprintf(buf, "0x%08x\n", reg); | |
1541 | } | |
ad3fee56 | 1542 | static ssize_t store_direct_dword(struct device *d, |
0edd5b44 JG |
1543 | struct device_attribute *attr, |
1544 | const char *buf, size_t count) | |
43f66a6c | 1545 | { |
ad3fee56 | 1546 | struct ipw_priv *priv = d->driver_data; |
43f66a6c JK |
1547 | |
1548 | sscanf(buf, "%x", &priv->direct_dword); | |
1549 | priv->status |= STATUS_DIRECT_DWORD; | |
1550 | return strnlen(buf, count); | |
1551 | } | |
43f66a6c | 1552 | |
0edd5b44 JG |
1553 | static DEVICE_ATTR(direct_dword, S_IWUSR | S_IRUGO, |
1554 | show_direct_dword, store_direct_dword); | |
43f66a6c | 1555 | |
858119e1 | 1556 | static int rf_kill_active(struct ipw_priv *priv) |
43f66a6c JK |
1557 | { |
1558 | if (0 == (ipw_read32(priv, 0x30) & 0x10000)) | |
1559 | priv->status |= STATUS_RF_KILL_HW; | |
1560 | else | |
1561 | priv->status &= ~STATUS_RF_KILL_HW; | |
1562 | ||
1563 | return (priv->status & STATUS_RF_KILL_HW) ? 1 : 0; | |
1564 | } | |
1565 | ||
ad3fee56 | 1566 | static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr, |
0edd5b44 | 1567 | char *buf) |
43f66a6c JK |
1568 | { |
1569 | /* 0 - RF kill not enabled | |
bf79451e | 1570 | 1 - SW based RF kill active (sysfs) |
43f66a6c JK |
1571 | 2 - HW based RF kill active |
1572 | 3 - Both HW and SW baed RF kill active */ | |
ad3fee56 | 1573 | struct ipw_priv *priv = d->driver_data; |
43f66a6c | 1574 | int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) | |
0edd5b44 | 1575 | (rf_kill_active(priv) ? 0x2 : 0x0); |
43f66a6c JK |
1576 | return sprintf(buf, "%i\n", val); |
1577 | } | |
1578 | ||
1579 | static int ipw_radio_kill_sw(struct ipw_priv *priv, int disable_radio) | |
1580 | { | |
bf79451e | 1581 | if ((disable_radio ? 1 : 0) == |
ea2b26e0 | 1582 | ((priv->status & STATUS_RF_KILL_SW) ? 1 : 0)) |
0edd5b44 | 1583 | return 0; |
43f66a6c JK |
1584 | |
1585 | IPW_DEBUG_RF_KILL("Manual SW RF Kill set to: RADIO %s\n", | |
1586 | disable_radio ? "OFF" : "ON"); | |
1587 | ||
1588 | if (disable_radio) { | |
1589 | priv->status |= STATUS_RF_KILL_SW; | |
1590 | ||
a613bffd | 1591 | if (priv->workqueue) |
43f66a6c | 1592 | cancel_delayed_work(&priv->request_scan); |
43f66a6c JK |
1593 | queue_work(priv->workqueue, &priv->down); |
1594 | } else { | |
1595 | priv->status &= ~STATUS_RF_KILL_SW; | |
1596 | if (rf_kill_active(priv)) { | |
1597 | IPW_DEBUG_RF_KILL("Can not turn radio back on - " | |
1598 | "disabled by HW switch\n"); | |
1599 | /* Make sure the RF_KILL check timer is running */ | |
1600 | cancel_delayed_work(&priv->rf_kill); | |
bf79451e | 1601 | queue_delayed_work(priv->workqueue, &priv->rf_kill, |
43f66a6c | 1602 | 2 * HZ); |
bf79451e | 1603 | } else |
43f66a6c JK |
1604 | queue_work(priv->workqueue, &priv->up); |
1605 | } | |
1606 | ||
1607 | return 1; | |
1608 | } | |
1609 | ||
0edd5b44 JG |
1610 | static ssize_t store_rf_kill(struct device *d, struct device_attribute *attr, |
1611 | const char *buf, size_t count) | |
43f66a6c | 1612 | { |
ad3fee56 | 1613 | struct ipw_priv *priv = d->driver_data; |
bf79451e | 1614 | |
43f66a6c JK |
1615 | ipw_radio_kill_sw(priv, buf[0] == '1'); |
1616 | ||
1617 | return count; | |
1618 | } | |
0edd5b44 JG |
1619 | |
1620 | static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill); | |
43f66a6c | 1621 | |
b095c381 JK |
1622 | static ssize_t show_speed_scan(struct device *d, struct device_attribute *attr, |
1623 | char *buf) | |
1624 | { | |
1625 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | |
1626 | int pos = 0, len = 0; | |
1627 | if (priv->config & CFG_SPEED_SCAN) { | |
1628 | while (priv->speed_scan[pos] != 0) | |
1629 | len += sprintf(&buf[len], "%d ", | |
1630 | priv->speed_scan[pos++]); | |
1631 | return len + sprintf(&buf[len], "\n"); | |
1632 | } | |
1633 | ||
1634 | return sprintf(buf, "0\n"); | |
1635 | } | |
1636 | ||
1637 | static ssize_t store_speed_scan(struct device *d, struct device_attribute *attr, | |
1638 | const char *buf, size_t count) | |
1639 | { | |
1640 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | |
1641 | int channel, pos = 0; | |
1642 | const char *p = buf; | |
1643 | ||
1644 | /* list of space separated channels to scan, optionally ending with 0 */ | |
1645 | while ((channel = simple_strtol(p, NULL, 0))) { | |
1646 | if (pos == MAX_SPEED_SCAN - 1) { | |
1647 | priv->speed_scan[pos] = 0; | |
1648 | break; | |
1649 | } | |
1650 | ||
1867b117 | 1651 | if (ieee80211_is_valid_channel(priv->ieee, channel)) |
b095c381 JK |
1652 | priv->speed_scan[pos++] = channel; |
1653 | else | |
1654 | IPW_WARNING("Skipping invalid channel request: %d\n", | |
1655 | channel); | |
1656 | p = strchr(p, ' '); | |
1657 | if (!p) | |
1658 | break; | |
1659 | while (*p == ' ' || *p == '\t') | |
1660 | p++; | |
1661 | } | |
1662 | ||
1663 | if (pos == 0) | |
1664 | priv->config &= ~CFG_SPEED_SCAN; | |
1665 | else { | |
1666 | priv->speed_scan_pos = 0; | |
1667 | priv->config |= CFG_SPEED_SCAN; | |
1668 | } | |
1669 | ||
1670 | return count; | |
1671 | } | |
1672 | ||
1673 | static DEVICE_ATTR(speed_scan, S_IWUSR | S_IRUGO, show_speed_scan, | |
1674 | store_speed_scan); | |
1675 | ||
1676 | static ssize_t show_net_stats(struct device *d, struct device_attribute *attr, | |
1677 | char *buf) | |
1678 | { | |
1679 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | |
1680 | return sprintf(buf, "%c\n", (priv->config & CFG_NET_STATS) ? '1' : '0'); | |
1681 | } | |
1682 | ||
1683 | static ssize_t store_net_stats(struct device *d, struct device_attribute *attr, | |
1684 | const char *buf, size_t count) | |
1685 | { | |
1686 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | |
1687 | if (buf[0] == '1') | |
1688 | priv->config |= CFG_NET_STATS; | |
1689 | else | |
1690 | priv->config &= ~CFG_NET_STATS; | |
1691 | ||
1692 | return count; | |
1693 | } | |
1694 | ||
afbf30a2 JK |
1695 | static DEVICE_ATTR(net_stats, S_IWUSR | S_IRUGO, |
1696 | show_net_stats, store_net_stats); | |
b095c381 | 1697 | |
ea2b26e0 JK |
1698 | static void notify_wx_assoc_event(struct ipw_priv *priv) |
1699 | { | |
1700 | union iwreq_data wrqu; | |
1701 | wrqu.ap_addr.sa_family = ARPHRD_ETHER; | |
1702 | if (priv->status & STATUS_ASSOCIATED) | |
1703 | memcpy(wrqu.ap_addr.sa_data, priv->bssid, ETH_ALEN); | |
1704 | else | |
1705 | memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN); | |
1706 | wireless_send_event(priv->net_dev, SIOCGIWAP, &wrqu, NULL); | |
1707 | } | |
1708 | ||
43f66a6c JK |
1709 | static void ipw_irq_tasklet(struct ipw_priv *priv) |
1710 | { | |
1711 | u32 inta, inta_mask, handled = 0; | |
1712 | unsigned long flags; | |
1713 | int rc = 0; | |
1714 | ||
1715 | spin_lock_irqsave(&priv->lock, flags); | |
1716 | ||
b095c381 JK |
1717 | inta = ipw_read32(priv, IPW_INTA_RW); |
1718 | inta_mask = ipw_read32(priv, IPW_INTA_MASK_R); | |
1719 | inta &= (IPW_INTA_MASK_ALL & inta_mask); | |
43f66a6c JK |
1720 | |
1721 | /* Add any cached INTA values that need to be handled */ | |
1722 | inta |= priv->isr_inta; | |
1723 | ||
1724 | /* handle all the justifications for the interrupt */ | |
b095c381 | 1725 | if (inta & IPW_INTA_BIT_RX_TRANSFER) { |
43f66a6c | 1726 | ipw_rx(priv); |
b095c381 | 1727 | handled |= IPW_INTA_BIT_RX_TRANSFER; |
43f66a6c JK |
1728 | } |
1729 | ||
b095c381 | 1730 | if (inta & IPW_INTA_BIT_TX_CMD_QUEUE) { |
43f66a6c | 1731 | IPW_DEBUG_HC("Command completed.\n"); |
0edd5b44 | 1732 | rc = ipw_queue_tx_reclaim(priv, &priv->txq_cmd, -1); |
43f66a6c JK |
1733 | priv->status &= ~STATUS_HCMD_ACTIVE; |
1734 | wake_up_interruptible(&priv->wait_command_queue); | |
b095c381 | 1735 | handled |= IPW_INTA_BIT_TX_CMD_QUEUE; |
43f66a6c JK |
1736 | } |
1737 | ||
b095c381 | 1738 | if (inta & IPW_INTA_BIT_TX_QUEUE_1) { |
43f66a6c | 1739 | IPW_DEBUG_TX("TX_QUEUE_1\n"); |
0edd5b44 | 1740 | rc = ipw_queue_tx_reclaim(priv, &priv->txq[0], 0); |
b095c381 | 1741 | handled |= IPW_INTA_BIT_TX_QUEUE_1; |
43f66a6c JK |
1742 | } |
1743 | ||
b095c381 | 1744 | if (inta & IPW_INTA_BIT_TX_QUEUE_2) { |
43f66a6c | 1745 | IPW_DEBUG_TX("TX_QUEUE_2\n"); |
0edd5b44 | 1746 | rc = ipw_queue_tx_reclaim(priv, &priv->txq[1], 1); |
b095c381 | 1747 | handled |= IPW_INTA_BIT_TX_QUEUE_2; |
43f66a6c JK |
1748 | } |
1749 | ||
b095c381 | 1750 | if (inta & IPW_INTA_BIT_TX_QUEUE_3) { |
43f66a6c | 1751 | IPW_DEBUG_TX("TX_QUEUE_3\n"); |
0edd5b44 | 1752 | rc = ipw_queue_tx_reclaim(priv, &priv->txq[2], 2); |
b095c381 | 1753 | handled |= IPW_INTA_BIT_TX_QUEUE_3; |
43f66a6c JK |
1754 | } |
1755 | ||
b095c381 | 1756 | if (inta & IPW_INTA_BIT_TX_QUEUE_4) { |
43f66a6c | 1757 | IPW_DEBUG_TX("TX_QUEUE_4\n"); |
0edd5b44 | 1758 | rc = ipw_queue_tx_reclaim(priv, &priv->txq[3], 3); |
b095c381 | 1759 | handled |= IPW_INTA_BIT_TX_QUEUE_4; |
43f66a6c JK |
1760 | } |
1761 | ||
b095c381 | 1762 | if (inta & IPW_INTA_BIT_STATUS_CHANGE) { |
43f66a6c | 1763 | IPW_WARNING("STATUS_CHANGE\n"); |
b095c381 | 1764 | handled |= IPW_INTA_BIT_STATUS_CHANGE; |
43f66a6c JK |
1765 | } |
1766 | ||
b095c381 | 1767 | if (inta & IPW_INTA_BIT_BEACON_PERIOD_EXPIRED) { |
43f66a6c | 1768 | IPW_WARNING("TX_PERIOD_EXPIRED\n"); |
b095c381 | 1769 | handled |= IPW_INTA_BIT_BEACON_PERIOD_EXPIRED; |
43f66a6c JK |
1770 | } |
1771 | ||
b095c381 | 1772 | if (inta & IPW_INTA_BIT_SLAVE_MODE_HOST_CMD_DONE) { |
43f66a6c | 1773 | IPW_WARNING("HOST_CMD_DONE\n"); |
b095c381 | 1774 | handled |= IPW_INTA_BIT_SLAVE_MODE_HOST_CMD_DONE; |
43f66a6c JK |
1775 | } |
1776 | ||
b095c381 | 1777 | if (inta & IPW_INTA_BIT_FW_INITIALIZATION_DONE) { |
43f66a6c | 1778 | IPW_WARNING("FW_INITIALIZATION_DONE\n"); |
b095c381 | 1779 | handled |= IPW_INTA_BIT_FW_INITIALIZATION_DONE; |
43f66a6c JK |
1780 | } |
1781 | ||
b095c381 | 1782 | if (inta & IPW_INTA_BIT_FW_CARD_DISABLE_PHY_OFF_DONE) { |
43f66a6c | 1783 | IPW_WARNING("PHY_OFF_DONE\n"); |
b095c381 | 1784 | handled |= IPW_INTA_BIT_FW_CARD_DISABLE_PHY_OFF_DONE; |
43f66a6c JK |
1785 | } |
1786 | ||
b095c381 | 1787 | if (inta & IPW_INTA_BIT_RF_KILL_DONE) { |
43f66a6c JK |
1788 | IPW_DEBUG_RF_KILL("RF_KILL_DONE\n"); |
1789 | priv->status |= STATUS_RF_KILL_HW; | |
1790 | wake_up_interruptible(&priv->wait_command_queue); | |
ea2b26e0 | 1791 | priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING); |
43f66a6c | 1792 | cancel_delayed_work(&priv->request_scan); |
a613bffd | 1793 | schedule_work(&priv->link_down); |
43f66a6c | 1794 | queue_delayed_work(priv->workqueue, &priv->rf_kill, 2 * HZ); |
b095c381 | 1795 | handled |= IPW_INTA_BIT_RF_KILL_DONE; |
43f66a6c | 1796 | } |
bf79451e | 1797 | |
b095c381 | 1798 | if (inta & IPW_INTA_BIT_FATAL_ERROR) { |
1d1b09eb | 1799 | IPW_WARNING("Firmware error detected. Restarting.\n"); |
b39860c6 | 1800 | if (priv->error) { |
1d1b09eb | 1801 | IPW_DEBUG_FW("Sysfs 'error' log already exists.\n"); |
0f52bf90 | 1802 | #ifdef CONFIG_IPW2200_DEBUG |
b39860c6 JK |
1803 | if (ipw_debug_level & IPW_DL_FW_ERRORS) { |
1804 | struct ipw_fw_error *error = | |
1805 | ipw_alloc_error_log(priv); | |
1806 | ipw_dump_error_log(priv, error); | |
1807 | if (error) | |
1808 | ipw_free_error_log(error); | |
1809 | } | |
1810 | #endif | |
1811 | } else { | |
1812 | priv->error = ipw_alloc_error_log(priv); | |
1813 | if (priv->error) | |
1d1b09eb | 1814 | IPW_DEBUG_FW("Sysfs 'error' log captured.\n"); |
b39860c6 | 1815 | else |
1d1b09eb ZY |
1816 | IPW_DEBUG_FW("Error allocating sysfs 'error' " |
1817 | "log.\n"); | |
0f52bf90 | 1818 | #ifdef CONFIG_IPW2200_DEBUG |
b39860c6 JK |
1819 | if (ipw_debug_level & IPW_DL_FW_ERRORS) |
1820 | ipw_dump_error_log(priv, priv->error); | |
43f66a6c | 1821 | #endif |
b39860c6 JK |
1822 | } |
1823 | ||
b095c381 JK |
1824 | /* XXX: If hardware encryption is for WPA/WPA2, |
1825 | * we have to notify the supplicant. */ | |
1826 | if (priv->ieee->sec.encrypt) { | |
1827 | priv->status &= ~STATUS_ASSOCIATED; | |
1828 | notify_wx_assoc_event(priv); | |
1829 | } | |
1830 | ||
1831 | /* Keep the restart process from trying to send host | |
1832 | * commands by clearing the INIT status bit */ | |
1833 | priv->status &= ~STATUS_INIT; | |
afbf30a2 JK |
1834 | |
1835 | /* Cancel currently queued command. */ | |
1836 | priv->status &= ~STATUS_HCMD_ACTIVE; | |
1837 | wake_up_interruptible(&priv->wait_command_queue); | |
1838 | ||
43f66a6c | 1839 | queue_work(priv->workqueue, &priv->adapter_restart); |
b095c381 | 1840 | handled |= IPW_INTA_BIT_FATAL_ERROR; |
43f66a6c JK |
1841 | } |
1842 | ||
b095c381 | 1843 | if (inta & IPW_INTA_BIT_PARITY_ERROR) { |
43f66a6c | 1844 | IPW_ERROR("Parity error\n"); |
b095c381 | 1845 | handled |= IPW_INTA_BIT_PARITY_ERROR; |
43f66a6c JK |
1846 | } |
1847 | ||
1848 | if (handled != inta) { | |
0edd5b44 | 1849 | IPW_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); |
43f66a6c JK |
1850 | } |
1851 | ||
1852 | /* enable all interrupts */ | |
1853 | ipw_enable_interrupts(priv); | |
1854 | ||
1855 | spin_unlock_irqrestore(&priv->lock, flags); | |
1856 | } | |
bf79451e | 1857 | |
43f66a6c JK |
1858 | #define IPW_CMD(x) case IPW_CMD_ ## x : return #x |
1859 | static char *get_cmd_string(u8 cmd) | |
1860 | { | |
1861 | switch (cmd) { | |
1862 | IPW_CMD(HOST_COMPLETE); | |
bf79451e JG |
1863 | IPW_CMD(POWER_DOWN); |
1864 | IPW_CMD(SYSTEM_CONFIG); | |
1865 | IPW_CMD(MULTICAST_ADDRESS); | |
1866 | IPW_CMD(SSID); | |
1867 | IPW_CMD(ADAPTER_ADDRESS); | |
1868 | IPW_CMD(PORT_TYPE); | |
1869 | IPW_CMD(RTS_THRESHOLD); | |
1870 | IPW_CMD(FRAG_THRESHOLD); | |
1871 | IPW_CMD(POWER_MODE); | |
1872 | IPW_CMD(WEP_KEY); | |
1873 | IPW_CMD(TGI_TX_KEY); | |
1874 | IPW_CMD(SCAN_REQUEST); | |
1875 | IPW_CMD(SCAN_REQUEST_EXT); | |
1876 | IPW_CMD(ASSOCIATE); | |
1877 | IPW_CMD(SUPPORTED_RATES); | |
1878 | IPW_CMD(SCAN_ABORT); | |
1879 | IPW_CMD(TX_FLUSH); | |
1880 | IPW_CMD(QOS_PARAMETERS); | |
1881 | IPW_CMD(DINO_CONFIG); | |
1882 | IPW_CMD(RSN_CAPABILITIES); | |
1883 | IPW_CMD(RX_KEY); | |
1884 | IPW_CMD(CARD_DISABLE); | |
1885 | IPW_CMD(SEED_NUMBER); | |
1886 | IPW_CMD(TX_POWER); | |
1887 | IPW_CMD(COUNTRY_INFO); | |
1888 | IPW_CMD(AIRONET_INFO); | |
1889 | IPW_CMD(AP_TX_POWER); | |
1890 | IPW_CMD(CCKM_INFO); | |
1891 | IPW_CMD(CCX_VER_INFO); | |
1892 | IPW_CMD(SET_CALIBRATION); | |
1893 | IPW_CMD(SENSITIVITY_CALIB); | |
1894 | IPW_CMD(RETRY_LIMIT); | |
1895 | IPW_CMD(IPW_PRE_POWER_DOWN); | |
1896 | IPW_CMD(VAP_BEACON_TEMPLATE); | |
1897 | IPW_CMD(VAP_DTIM_PERIOD); | |
1898 | IPW_CMD(EXT_SUPPORTED_RATES); | |
1899 | IPW_CMD(VAP_LOCAL_TX_PWR_CONSTRAINT); | |
1900 | IPW_CMD(VAP_QUIET_INTERVALS); | |
1901 | IPW_CMD(VAP_CHANNEL_SWITCH); | |
1902 | IPW_CMD(VAP_MANDATORY_CHANNELS); | |
1903 | IPW_CMD(VAP_CELL_PWR_LIMIT); | |
1904 | IPW_CMD(VAP_CF_PARAM_SET); | |
1905 | IPW_CMD(VAP_SET_BEACONING_STATE); | |
1906 | IPW_CMD(MEASUREMENT); | |
1907 | IPW_CMD(POWER_CAPABILITY); | |
1908 | IPW_CMD(SUPPORTED_CHANNELS); | |
1909 | IPW_CMD(TPC_REPORT); | |
1910 | IPW_CMD(WME_INFO); | |
1911 | IPW_CMD(PRODUCTION_COMMAND); | |
1912 | default: | |
43f66a6c JK |
1913 | return "UNKNOWN"; |
1914 | } | |
1915 | } | |
43f66a6c JK |
1916 | |
1917 | #define HOST_COMPLETE_TIMEOUT HZ | |
0a7bcf26 ZY |
1918 | |
1919 | static int __ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd) | |
43f66a6c JK |
1920 | { |
1921 | int rc = 0; | |
a613bffd | 1922 | unsigned long flags; |
43f66a6c | 1923 | |
a613bffd | 1924 | spin_lock_irqsave(&priv->lock, flags); |
43f66a6c | 1925 | if (priv->status & STATUS_HCMD_ACTIVE) { |
9ddf84f6 JK |
1926 | IPW_ERROR("Failed to send %s: Already sending a command.\n", |
1927 | get_cmd_string(cmd->cmd)); | |
a613bffd | 1928 | spin_unlock_irqrestore(&priv->lock, flags); |
9ddf84f6 | 1929 | return -EAGAIN; |
43f66a6c JK |
1930 | } |
1931 | ||
1932 | priv->status |= STATUS_HCMD_ACTIVE; | |
bf79451e | 1933 | |
f6c5cb7c JK |
1934 | if (priv->cmdlog) { |
1935 | priv->cmdlog[priv->cmdlog_pos].jiffies = jiffies; | |
1936 | priv->cmdlog[priv->cmdlog_pos].cmd.cmd = cmd->cmd; | |
1937 | priv->cmdlog[priv->cmdlog_pos].cmd.len = cmd->len; | |
1938 | memcpy(priv->cmdlog[priv->cmdlog_pos].cmd.param, cmd->param, | |
1939 | cmd->len); | |
1940 | priv->cmdlog[priv->cmdlog_pos].retcode = -1; | |
1941 | } | |
1942 | ||
b095c381 JK |
1943 | IPW_DEBUG_HC("%s command (#%d) %d bytes: 0x%08X\n", |
1944 | get_cmd_string(cmd->cmd), cmd->cmd, cmd->len, | |
1945 | priv->status); | |
f516dbcd ZY |
1946 | |
1947 | #ifndef DEBUG_CMD_WEP_KEY | |
1948 | if (cmd->cmd == IPW_CMD_WEP_KEY) | |
1949 | IPW_DEBUG_HC("WEP_KEY command masked out for secure.\n"); | |
1950 | else | |
1951 | #endif | |
1952 | printk_buf(IPW_DL_HOST_COMMAND, (u8 *) cmd->param, cmd->len); | |
1953 | ||
0a7bcf26 | 1954 | rc = ipw_queue_tx_hcmd(priv, cmd->cmd, cmd->param, cmd->len, 0); |
a613bffd JK |
1955 | if (rc) { |
1956 | priv->status &= ~STATUS_HCMD_ACTIVE; | |
9ddf84f6 JK |
1957 | IPW_ERROR("Failed to send %s: Reason %d\n", |
1958 | get_cmd_string(cmd->cmd), rc); | |
a613bffd | 1959 | spin_unlock_irqrestore(&priv->lock, flags); |
f6c5cb7c | 1960 | goto exit; |
a613bffd JK |
1961 | } |
1962 | spin_unlock_irqrestore(&priv->lock, flags); | |
43f66a6c | 1963 | |
0edd5b44 JG |
1964 | rc = wait_event_interruptible_timeout(priv->wait_command_queue, |
1965 | !(priv-> | |
1966 | status & STATUS_HCMD_ACTIVE), | |
1967 | HOST_COMPLETE_TIMEOUT); | |
43f66a6c | 1968 | if (rc == 0) { |
a613bffd JK |
1969 | spin_lock_irqsave(&priv->lock, flags); |
1970 | if (priv->status & STATUS_HCMD_ACTIVE) { | |
9ddf84f6 JK |
1971 | IPW_ERROR("Failed to send %s: Command timed out.\n", |
1972 | get_cmd_string(cmd->cmd)); | |
a613bffd JK |
1973 | priv->status &= ~STATUS_HCMD_ACTIVE; |
1974 | spin_unlock_irqrestore(&priv->lock, flags); | |
f6c5cb7c JK |
1975 | rc = -EIO; |
1976 | goto exit; | |
a613bffd JK |
1977 | } |
1978 | spin_unlock_irqrestore(&priv->lock, flags); | |
3b9990cb JK |
1979 | } else |
1980 | rc = 0; | |
a613bffd | 1981 | |
b095c381 | 1982 | if (priv->status & STATUS_RF_KILL_HW) { |
9ddf84f6 JK |
1983 | IPW_ERROR("Failed to send %s: Aborted due to RF kill switch.\n", |
1984 | get_cmd_string(cmd->cmd)); | |
f6c5cb7c JK |
1985 | rc = -EIO; |
1986 | goto exit; | |
43f66a6c JK |
1987 | } |
1988 | ||
2638bc39 | 1989 | exit: |
f6c5cb7c JK |
1990 | if (priv->cmdlog) { |
1991 | priv->cmdlog[priv->cmdlog_pos++].retcode = rc; | |
1992 | priv->cmdlog_pos %= priv->cmdlog_len; | |
1993 | } | |
1994 | return rc; | |
43f66a6c JK |
1995 | } |
1996 | ||
0a7bcf26 ZY |
1997 | static int ipw_send_cmd_simple(struct ipw_priv *priv, u8 command) |
1998 | { | |
1999 | struct host_cmd cmd = { | |
2000 | .cmd = command, | |
2001 | }; | |
2002 | ||
2003 | return __ipw_send_cmd(priv, &cmd); | |
2004 | } | |
2005 | ||
2006 | static int ipw_send_cmd_pdu(struct ipw_priv *priv, u8 command, u8 len, | |
2007 | void *data) | |
43f66a6c JK |
2008 | { |
2009 | struct host_cmd cmd = { | |
0a7bcf26 ZY |
2010 | .cmd = command, |
2011 | .len = len, | |
2012 | .param = data, | |
43f66a6c JK |
2013 | }; |
2014 | ||
0a7bcf26 ZY |
2015 | return __ipw_send_cmd(priv, &cmd); |
2016 | } | |
2017 | ||
2018 | static int ipw_send_host_complete(struct ipw_priv *priv) | |
2019 | { | |
43f66a6c JK |
2020 | if (!priv) { |
2021 | IPW_ERROR("Invalid args\n"); | |
2022 | return -1; | |
2023 | } | |
2024 | ||
0a7bcf26 | 2025 | return ipw_send_cmd_simple(priv, IPW_CMD_HOST_COMPLETE); |
43f66a6c JK |
2026 | } |
2027 | ||
bf79451e | 2028 | static int ipw_send_system_config(struct ipw_priv *priv, |
43f66a6c JK |
2029 | struct ipw_sys_config *config) |
2030 | { | |
43f66a6c JK |
2031 | if (!priv || !config) { |
2032 | IPW_ERROR("Invalid args\n"); | |
2033 | return -1; | |
2034 | } | |
2035 | ||
0a7bcf26 | 2036 | return ipw_send_cmd_pdu(priv, IPW_CMD_SYSTEM_CONFIG, sizeof(*config), |
2638bc39 | 2037 | config); |
43f66a6c JK |
2038 | } |
2039 | ||
0edd5b44 | 2040 | static int ipw_send_ssid(struct ipw_priv *priv, u8 * ssid, int len) |
43f66a6c | 2041 | { |
43f66a6c JK |
2042 | if (!priv || !ssid) { |
2043 | IPW_ERROR("Invalid args\n"); | |
2044 | return -1; | |
2045 | } | |
2046 | ||
0a7bcf26 | 2047 | return ipw_send_cmd_pdu(priv, IPW_CMD_SSID, min(len, IW_ESSID_MAX_SIZE), |
2638bc39 | 2048 | ssid); |
43f66a6c JK |
2049 | } |
2050 | ||
0edd5b44 | 2051 | static int ipw_send_adapter_address(struct ipw_priv *priv, u8 * mac) |
43f66a6c | 2052 | { |
43f66a6c JK |
2053 | if (!priv || !mac) { |
2054 | IPW_ERROR("Invalid args\n"); | |
2055 | return -1; | |
2056 | } | |
2057 | ||
2058 | IPW_DEBUG_INFO("%s: Setting MAC to " MAC_FMT "\n", | |
2059 | priv->net_dev->name, MAC_ARG(mac)); | |
2060 | ||
2638bc39 | 2061 | return ipw_send_cmd_pdu(priv, IPW_CMD_ADAPTER_ADDRESS, ETH_ALEN, mac); |
43f66a6c JK |
2062 | } |
2063 | ||
a613bffd JK |
2064 | /* |
2065 | * NOTE: This must be executed from our workqueue as it results in udelay | |
2066 | * being called which may corrupt the keyboard if executed on default | |
2067 | * workqueue | |
2068 | */ | |
43f66a6c JK |
2069 | static void ipw_adapter_restart(void *adapter) |
2070 | { | |
2071 | struct ipw_priv *priv = adapter; | |
2072 | ||
2073 | if (priv->status & STATUS_RF_KILL_MASK) | |
2074 | return; | |
2075 | ||
2076 | ipw_down(priv); | |
b095c381 JK |
2077 | |
2078 | if (priv->assoc_network && | |
2079 | (priv->assoc_network->capability & WLAN_CAPABILITY_IBSS)) | |
2080 | ipw_remove_current_network(priv); | |
2081 | ||
43f66a6c JK |
2082 | if (ipw_up(priv)) { |
2083 | IPW_ERROR("Failed to up device\n"); | |
2084 | return; | |
2085 | } | |
2086 | } | |
2087 | ||
c848d0af JK |
2088 | static void ipw_bg_adapter_restart(void *data) |
2089 | { | |
2090 | struct ipw_priv *priv = data; | |
4644151b | 2091 | mutex_lock(&priv->mutex); |
c848d0af | 2092 | ipw_adapter_restart(data); |
4644151b | 2093 | mutex_unlock(&priv->mutex); |
c848d0af JK |
2094 | } |
2095 | ||
43f66a6c JK |
2096 | #define IPW_SCAN_CHECK_WATCHDOG (5 * HZ) |
2097 | ||
2098 | static void ipw_scan_check(void *data) | |
2099 | { | |
2100 | struct ipw_priv *priv = data; | |
2101 | if (priv->status & (STATUS_SCANNING | STATUS_SCAN_ABORTING)) { | |
2102 | IPW_DEBUG_SCAN("Scan completion watchdog resetting " | |
c7b6a674 ZY |
2103 | "adapter after (%dms).\n", |
2104 | jiffies_to_msecs(IPW_SCAN_CHECK_WATCHDOG)); | |
a613bffd | 2105 | queue_work(priv->workqueue, &priv->adapter_restart); |
43f66a6c JK |
2106 | } |
2107 | } | |
2108 | ||
c848d0af JK |
2109 | static void ipw_bg_scan_check(void *data) |
2110 | { | |
2111 | struct ipw_priv *priv = data; | |
4644151b | 2112 | mutex_lock(&priv->mutex); |
c848d0af | 2113 | ipw_scan_check(data); |
4644151b | 2114 | mutex_unlock(&priv->mutex); |
c848d0af JK |
2115 | } |
2116 | ||
43f66a6c JK |
2117 | static int ipw_send_scan_request_ext(struct ipw_priv *priv, |
2118 | struct ipw_scan_request_ext *request) | |
2119 | { | |
0a7bcf26 | 2120 | return ipw_send_cmd_pdu(priv, IPW_CMD_SCAN_REQUEST_EXT, |
2638bc39 | 2121 | sizeof(*request), request); |
43f66a6c JK |
2122 | } |
2123 | ||
2124 | static int ipw_send_scan_abort(struct ipw_priv *priv) | |
2125 | { | |
43f66a6c JK |
2126 | if (!priv) { |
2127 | IPW_ERROR("Invalid args\n"); | |
2128 | return -1; | |
2129 | } | |
2130 | ||
0a7bcf26 | 2131 | return ipw_send_cmd_simple(priv, IPW_CMD_SCAN_ABORT); |
43f66a6c JK |
2132 | } |
2133 | ||
2134 | static int ipw_set_sensitivity(struct ipw_priv *priv, u16 sens) | |
2135 | { | |
0a7bcf26 ZY |
2136 | struct ipw_sensitivity_calib calib = { |
2137 | .beacon_rssi_raw = sens, | |
43f66a6c | 2138 | }; |
0a7bcf26 ZY |
2139 | |
2140 | return ipw_send_cmd_pdu(priv, IPW_CMD_SENSITIVITY_CALIB, sizeof(calib), | |
2638bc39 | 2141 | &calib); |
43f66a6c JK |
2142 | } |
2143 | ||
2144 | static int ipw_send_associate(struct ipw_priv *priv, | |
2145 | struct ipw_associate *associate) | |
2146 | { | |
a613bffd | 2147 | struct ipw_associate tmp_associate; |
0a7bcf26 ZY |
2148 | |
2149 | if (!priv || !associate) { | |
2150 | IPW_ERROR("Invalid args\n"); | |
2151 | return -1; | |
2152 | } | |
2153 | ||
a613bffd JK |
2154 | memcpy(&tmp_associate, associate, sizeof(*associate)); |
2155 | tmp_associate.policy_support = | |
2156 | cpu_to_le16(tmp_associate.policy_support); | |
2157 | tmp_associate.assoc_tsf_msw = cpu_to_le32(tmp_associate.assoc_tsf_msw); | |
2158 | tmp_associate.assoc_tsf_lsw = cpu_to_le32(tmp_associate.assoc_tsf_lsw); | |
2159 | tmp_associate.capability = cpu_to_le16(tmp_associate.capability); | |
2160 | tmp_associate.listen_interval = | |
2161 | cpu_to_le16(tmp_associate.listen_interval); | |
2162 | tmp_associate.beacon_interval = | |
2163 | cpu_to_le16(tmp_associate.beacon_interval); | |
2164 | tmp_associate.atim_window = cpu_to_le16(tmp_associate.atim_window); | |
2165 | ||
0a7bcf26 | 2166 | return ipw_send_cmd_pdu(priv, IPW_CMD_ASSOCIATE, sizeof(tmp_associate), |
2638bc39 | 2167 | &tmp_associate); |
43f66a6c JK |
2168 | } |
2169 | ||
2170 | static int ipw_send_supported_rates(struct ipw_priv *priv, | |
2171 | struct ipw_supported_rates *rates) | |
2172 | { | |
43f66a6c JK |
2173 | if (!priv || !rates) { |
2174 | IPW_ERROR("Invalid args\n"); | |
2175 | return -1; | |
2176 | } | |
2177 | ||
0a7bcf26 | 2178 | return ipw_send_cmd_pdu(priv, IPW_CMD_SUPPORTED_RATES, sizeof(*rates), |
2638bc39 | 2179 | rates); |
43f66a6c JK |
2180 | } |
2181 | ||
2182 | static int ipw_set_random_seed(struct ipw_priv *priv) | |
2183 | { | |
0a7bcf26 | 2184 | u32 val; |
43f66a6c JK |
2185 | |
2186 | if (!priv) { | |
2187 | IPW_ERROR("Invalid args\n"); | |
2188 | return -1; | |
2189 | } | |
2190 | ||
0a7bcf26 | 2191 | get_random_bytes(&val, sizeof(val)); |
43f66a6c | 2192 | |
0a7bcf26 | 2193 | return ipw_send_cmd_pdu(priv, IPW_CMD_SEED_NUMBER, sizeof(val), &val); |
43f66a6c JK |
2194 | } |
2195 | ||
43f66a6c JK |
2196 | static int ipw_send_card_disable(struct ipw_priv *priv, u32 phy_off) |
2197 | { | |
43f66a6c JK |
2198 | if (!priv) { |
2199 | IPW_ERROR("Invalid args\n"); | |
2200 | return -1; | |
2201 | } | |
2202 | ||
0a7bcf26 | 2203 | return ipw_send_cmd_pdu(priv, IPW_CMD_CARD_DISABLE, sizeof(phy_off), |
2638bc39 | 2204 | &phy_off); |
43f66a6c | 2205 | } |
43f66a6c | 2206 | |
0edd5b44 | 2207 | static int ipw_send_tx_power(struct ipw_priv *priv, struct ipw_tx_power *power) |
43f66a6c | 2208 | { |
43f66a6c JK |
2209 | if (!priv || !power) { |
2210 | IPW_ERROR("Invalid args\n"); | |
2211 | return -1; | |
2212 | } | |
2213 | ||
2638bc39 | 2214 | return ipw_send_cmd_pdu(priv, IPW_CMD_TX_POWER, sizeof(*power), power); |
43f66a6c JK |
2215 | } |
2216 | ||
6de9f7f2 ZY |
2217 | static int ipw_set_tx_power(struct ipw_priv *priv) |
2218 | { | |
1867b117 | 2219 | const struct ieee80211_geo *geo = ieee80211_get_geo(priv->ieee); |
6de9f7f2 ZY |
2220 | struct ipw_tx_power tx_power; |
2221 | s8 max_power; | |
2222 | int i; | |
2223 | ||
2224 | memset(&tx_power, 0, sizeof(tx_power)); | |
2225 | ||
2226 | /* configure device for 'G' band */ | |
2227 | tx_power.ieee_mode = IPW_G_MODE; | |
2228 | tx_power.num_channels = geo->bg_channels; | |
2229 | for (i = 0; i < geo->bg_channels; i++) { | |
2230 | max_power = geo->bg[i].max_power; | |
2231 | tx_power.channels_tx_power[i].channel_number = | |
2232 | geo->bg[i].channel; | |
2233 | tx_power.channels_tx_power[i].tx_power = max_power ? | |
2234 | min(max_power, priv->tx_power) : priv->tx_power; | |
43f66a6c | 2235 | } |
6de9f7f2 ZY |
2236 | if (ipw_send_tx_power(priv, &tx_power)) |
2237 | return -EIO; | |
2238 | ||
2239 | /* configure device to also handle 'B' band */ | |
2240 | tx_power.ieee_mode = IPW_B_MODE; | |
2241 | if (ipw_send_tx_power(priv, &tx_power)) | |
2242 | return -EIO; | |
bf79451e | 2243 | |
6de9f7f2 ZY |
2244 | /* configure device to also handle 'A' band */ |
2245 | if (priv->ieee->abg_true) { | |
2246 | tx_power.ieee_mode = IPW_A_MODE; | |
2247 | tx_power.num_channels = geo->a_channels; | |
2248 | for (i = 0; i < tx_power.num_channels; i++) { | |
2249 | max_power = geo->a[i].max_power; | |
2250 | tx_power.channels_tx_power[i].channel_number = | |
2251 | geo->a[i].channel; | |
2252 | tx_power.channels_tx_power[i].tx_power = max_power ? | |
2253 | min(max_power, priv->tx_power) : priv->tx_power; | |
2254 | } | |
2255 | if (ipw_send_tx_power(priv, &tx_power)) | |
2256 | return -EIO; | |
2257 | } | |
43f66a6c JK |
2258 | return 0; |
2259 | } | |
2260 | ||
2261 | static int ipw_send_rts_threshold(struct ipw_priv *priv, u16 rts) | |
2262 | { | |
2263 | struct ipw_rts_threshold rts_threshold = { | |
2264 | .rts_threshold = rts, | |
2265 | }; | |
43f66a6c JK |
2266 | |
2267 | if (!priv) { | |
2268 | IPW_ERROR("Invalid args\n"); | |
2269 | return -1; | |
2270 | } | |
2271 | ||
0a7bcf26 ZY |
2272 | return ipw_send_cmd_pdu(priv, IPW_CMD_RTS_THRESHOLD, |
2273 | sizeof(rts_threshold), &rts_threshold); | |
43f66a6c JK |
2274 | } |
2275 | ||
2276 | static int ipw_send_frag_threshold(struct ipw_priv *priv, u16 frag) | |
2277 | { | |
2278 | struct ipw_frag_threshold frag_threshold = { | |
2279 | .frag_threshold = frag, | |
2280 | }; | |
43f66a6c JK |
2281 | |
2282 | if (!priv) { | |
2283 | IPW_ERROR("Invalid args\n"); | |
2284 | return -1; | |
2285 | } | |
2286 | ||
0a7bcf26 ZY |
2287 | return ipw_send_cmd_pdu(priv, IPW_CMD_FRAG_THRESHOLD, |
2288 | sizeof(frag_threshold), &frag_threshold); | |
43f66a6c JK |
2289 | } |
2290 | ||
2291 | static int ipw_send_power_mode(struct ipw_priv *priv, u32 mode) | |
2292 | { | |
0a7bcf26 | 2293 | u32 param; |
43f66a6c JK |
2294 | |
2295 | if (!priv) { | |
2296 | IPW_ERROR("Invalid args\n"); | |
2297 | return -1; | |
2298 | } | |
bf79451e | 2299 | |
43f66a6c JK |
2300 | /* If on battery, set to 3, if AC set to CAM, else user |
2301 | * level */ | |
2302 | switch (mode) { | |
2303 | case IPW_POWER_BATTERY: | |
0a7bcf26 | 2304 | param = IPW_POWER_INDEX_3; |
43f66a6c JK |
2305 | break; |
2306 | case IPW_POWER_AC: | |
0a7bcf26 | 2307 | param = IPW_POWER_MODE_CAM; |
43f66a6c JK |
2308 | break; |
2309 | default: | |
0a7bcf26 | 2310 | param = mode; |
43f66a6c JK |
2311 | break; |
2312 | } | |
2313 | ||
0a7bcf26 | 2314 | return ipw_send_cmd_pdu(priv, IPW_CMD_POWER_MODE, sizeof(param), |
2638bc39 | 2315 | ¶m); |
43f66a6c JK |
2316 | } |
2317 | ||
afbf30a2 JK |
2318 | static int ipw_send_retry_limit(struct ipw_priv *priv, u8 slimit, u8 llimit) |
2319 | { | |
2320 | struct ipw_retry_limit retry_limit = { | |
2321 | .short_retry_limit = slimit, | |
2322 | .long_retry_limit = llimit | |
2323 | }; | |
afbf30a2 JK |
2324 | |
2325 | if (!priv) { | |
2326 | IPW_ERROR("Invalid args\n"); | |
2327 | return -1; | |
2328 | } | |
2329 | ||
0a7bcf26 | 2330 | return ipw_send_cmd_pdu(priv, IPW_CMD_RETRY_LIMIT, sizeof(retry_limit), |
2638bc39 | 2331 | &retry_limit); |
afbf30a2 JK |
2332 | } |
2333 | ||
43f66a6c JK |
2334 | /* |
2335 | * The IPW device contains a Microwire compatible EEPROM that stores | |
2336 | * various data like the MAC address. Usually the firmware has exclusive | |
2337 | * access to the eeprom, but during device initialization (before the | |
2338 | * device driver has sent the HostComplete command to the firmware) the | |
2339 | * device driver has read access to the EEPROM by way of indirect addressing | |
2340 | * through a couple of memory mapped registers. | |
2341 | * | |
2342 | * The following is a simplified implementation for pulling data out of the | |
2343 | * the eeprom, along with some helper functions to find information in | |
2344 | * the per device private data's copy of the eeprom. | |
2345 | * | |
2346 | * NOTE: To better understand how these functions work (i.e what is a chip | |
2347 | * select and why do have to keep driving the eeprom clock?), read | |
2348 | * just about any data sheet for a Microwire compatible EEPROM. | |
2349 | */ | |
2350 | ||
2351 | /* write a 32 bit value into the indirect accessor register */ | |
2352 | static inline void eeprom_write_reg(struct ipw_priv *p, u32 data) | |
2353 | { | |
2354 | ipw_write_reg32(p, FW_MEM_REG_EEPROM_ACCESS, data); | |
bf79451e | 2355 | |
43f66a6c JK |
2356 | /* the eeprom requires some time to complete the operation */ |
2357 | udelay(p->eeprom_delay); | |
2358 | ||
2359 | return; | |
2360 | } | |
2361 | ||
2362 | /* perform a chip select operation */ | |
858119e1 | 2363 | static void eeprom_cs(struct ipw_priv *priv) |
43f66a6c | 2364 | { |
0edd5b44 JG |
2365 | eeprom_write_reg(priv, 0); |
2366 | eeprom_write_reg(priv, EEPROM_BIT_CS); | |
2367 | eeprom_write_reg(priv, EEPROM_BIT_CS | EEPROM_BIT_SK); | |
2368 | eeprom_write_reg(priv, EEPROM_BIT_CS); | |
43f66a6c JK |
2369 | } |
2370 | ||
2371 | /* perform a chip select operation */ | |
858119e1 | 2372 | static void eeprom_disable_cs(struct ipw_priv *priv) |
43f66a6c | 2373 | { |
0edd5b44 JG |
2374 | eeprom_write_reg(priv, EEPROM_BIT_CS); |
2375 | eeprom_write_reg(priv, 0); | |
2376 | eeprom_write_reg(priv, EEPROM_BIT_SK); | |
43f66a6c JK |
2377 | } |
2378 | ||
2379 | /* push a single bit down to the eeprom */ | |
0edd5b44 | 2380 | static inline void eeprom_write_bit(struct ipw_priv *p, u8 bit) |
43f66a6c | 2381 | { |
0edd5b44 JG |
2382 | int d = (bit ? EEPROM_BIT_DI : 0); |
2383 | eeprom_write_reg(p, EEPROM_BIT_CS | d); | |
2384 | eeprom_write_reg(p, EEPROM_BIT_CS | d | EEPROM_BIT_SK); | |
43f66a6c JK |
2385 | } |
2386 | ||
2387 | /* push an opcode followed by an address down to the eeprom */ | |
0edd5b44 | 2388 | static void eeprom_op(struct ipw_priv *priv, u8 op, u8 addr) |
43f66a6c JK |
2389 | { |
2390 | int i; | |
2391 | ||
2392 | eeprom_cs(priv); | |
0edd5b44 JG |
2393 | eeprom_write_bit(priv, 1); |
2394 | eeprom_write_bit(priv, op & 2); | |
2395 | eeprom_write_bit(priv, op & 1); | |
2396 | for (i = 7; i >= 0; i--) { | |
2397 | eeprom_write_bit(priv, addr & (1 << i)); | |
43f66a6c JK |
2398 | } |
2399 | } | |
2400 | ||
2401 | /* pull 16 bits off the eeprom, one bit at a time */ | |
0edd5b44 | 2402 | static u16 eeprom_read_u16(struct ipw_priv *priv, u8 addr) |
43f66a6c JK |
2403 | { |
2404 | int i; | |
0edd5b44 | 2405 | u16 r = 0; |
bf79451e | 2406 | |
43f66a6c | 2407 | /* Send READ Opcode */ |
0edd5b44 | 2408 | eeprom_op(priv, EEPROM_CMD_READ, addr); |
43f66a6c JK |
2409 | |
2410 | /* Send dummy bit */ | |
0edd5b44 | 2411 | eeprom_write_reg(priv, EEPROM_BIT_CS); |
43f66a6c JK |
2412 | |
2413 | /* Read the byte off the eeprom one bit at a time */ | |
0edd5b44 | 2414 | for (i = 0; i < 16; i++) { |
43f66a6c | 2415 | u32 data = 0; |
0edd5b44 JG |
2416 | eeprom_write_reg(priv, EEPROM_BIT_CS | EEPROM_BIT_SK); |
2417 | eeprom_write_reg(priv, EEPROM_BIT_CS); | |
2418 | data = ipw_read_reg32(priv, FW_MEM_REG_EEPROM_ACCESS); | |
2419 | r = (r << 1) | ((data & EEPROM_BIT_DO) ? 1 : 0); | |
43f66a6c | 2420 | } |
bf79451e | 2421 | |
43f66a6c | 2422 | /* Send another dummy bit */ |
0edd5b44 | 2423 | eeprom_write_reg(priv, 0); |
43f66a6c | 2424 | eeprom_disable_cs(priv); |
bf79451e | 2425 | |
43f66a6c JK |
2426 | return r; |
2427 | } | |
2428 | ||
2429 | /* helper function for pulling the mac address out of the private */ | |
2430 | /* data's copy of the eeprom data */ | |
0edd5b44 | 2431 | static void eeprom_parse_mac(struct ipw_priv *priv, u8 * mac) |
43f66a6c | 2432 | { |
afbf30a2 | 2433 | memcpy(mac, &priv->eeprom[EEPROM_MAC_ADDRESS], 6); |
43f66a6c JK |
2434 | } |
2435 | ||
2436 | /* | |
2437 | * Either the device driver (i.e. the host) or the firmware can | |
2438 | * load eeprom data into the designated region in SRAM. If neither | |
2439 | * happens then the FW will shutdown with a fatal error. | |
2440 | * | |
2441 | * In order to signal the FW to load the EEPROM, the EEPROM_LOAD_DISABLE | |
2442 | * bit needs region of shared SRAM needs to be non-zero. | |
2443 | */ | |
2444 | static void ipw_eeprom_init_sram(struct ipw_priv *priv) | |
2445 | { | |
2446 | int i; | |
0edd5b44 | 2447 | u16 *eeprom = (u16 *) priv->eeprom; |
bf79451e | 2448 | |
43f66a6c JK |
2449 | IPW_DEBUG_TRACE(">>\n"); |
2450 | ||
2451 | /* read entire contents of eeprom into private buffer */ | |
0edd5b44 | 2452 | for (i = 0; i < 128; i++) |
a613bffd | 2453 | eeprom[i] = le16_to_cpu(eeprom_read_u16(priv, (u8) i)); |
43f66a6c | 2454 | |
bf79451e JG |
2455 | /* |
2456 | If the data looks correct, then copy it to our private | |
43f66a6c | 2457 | copy. Otherwise let the firmware know to perform the operation |
c7b6a674 | 2458 | on its own. |
0edd5b44 | 2459 | */ |
386093ef | 2460 | if (priv->eeprom[EEPROM_VERSION] != 0) { |
43f66a6c JK |
2461 | IPW_DEBUG_INFO("Writing EEPROM data into SRAM\n"); |
2462 | ||
2463 | /* write the eeprom data to sram */ | |
b095c381 | 2464 | for (i = 0; i < IPW_EEPROM_IMAGE_SIZE; i++) |
0edd5b44 | 2465 | ipw_write8(priv, IPW_EEPROM_DATA + i, priv->eeprom[i]); |
43f66a6c JK |
2466 | |
2467 | /* Do not load eeprom data on fatal error or suspend */ | |
2468 | ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 0); | |
2469 | } else { | |
2470 | IPW_DEBUG_INFO("Enabling FW initializationg of SRAM\n"); | |
2471 | ||
2472 | /* Load eeprom data on fatal error or suspend */ | |
2473 | ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 1); | |
2474 | } | |
2475 | ||
2476 | IPW_DEBUG_TRACE("<<\n"); | |
2477 | } | |
2478 | ||
858119e1 | 2479 | static void ipw_zero_memory(struct ipw_priv *priv, u32 start, u32 count) |
43f66a6c JK |
2480 | { |
2481 | count >>= 2; | |
0edd5b44 JG |
2482 | if (!count) |
2483 | return; | |
b095c381 | 2484 | _ipw_write32(priv, IPW_AUTOINC_ADDR, start); |
bf79451e | 2485 | while (count--) |
b095c381 | 2486 | _ipw_write32(priv, IPW_AUTOINC_DATA, 0); |
43f66a6c JK |
2487 | } |
2488 | ||
2489 | static inline void ipw_fw_dma_reset_command_blocks(struct ipw_priv *priv) | |
2490 | { | |
b095c381 | 2491 | ipw_zero_memory(priv, IPW_SHARED_SRAM_DMA_CONTROL, |
bf79451e | 2492 | CB_NUMBER_OF_ELEMENTS_SMALL * |
43f66a6c JK |
2493 | sizeof(struct command_block)); |
2494 | } | |
2495 | ||
2496 | static int ipw_fw_dma_enable(struct ipw_priv *priv) | |
0edd5b44 | 2497 | { /* start dma engine but no transfers yet */ |
43f66a6c JK |
2498 | |
2499 | IPW_DEBUG_FW(">> : \n"); | |
bf79451e | 2500 | |
43f66a6c JK |
2501 | /* Start the dma */ |
2502 | ipw_fw_dma_reset_command_blocks(priv); | |
bf79451e | 2503 | |
43f66a6c | 2504 | /* Write CB base address */ |
b095c381 | 2505 | ipw_write_reg32(priv, IPW_DMA_I_CB_BASE, IPW_SHARED_SRAM_DMA_CONTROL); |
43f66a6c JK |
2506 | |
2507 | IPW_DEBUG_FW("<< : \n"); | |
2508 | return 0; | |
2509 | } | |
2510 | ||
2511 | static void ipw_fw_dma_abort(struct ipw_priv *priv) | |
2512 | { | |
2513 | u32 control = 0; | |
2514 | ||
2515 | IPW_DEBUG_FW(">> :\n"); | |
bf79451e JG |
2516 | |
2517 | //set the Stop and Abort bit | |
43f66a6c | 2518 | control = DMA_CONTROL_SMALL_CB_CONST_VALUE | DMA_CB_STOP_AND_ABORT; |
b095c381 | 2519 | ipw_write_reg32(priv, IPW_DMA_I_DMA_CONTROL, control); |
43f66a6c | 2520 | priv->sram_desc.last_cb_index = 0; |
bf79451e | 2521 | |
43f66a6c JK |
2522 | IPW_DEBUG_FW("<< \n"); |
2523 | } | |
2524 | ||
0edd5b44 JG |
2525 | static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index, |
2526 | struct command_block *cb) | |
43f66a6c | 2527 | { |
0edd5b44 | 2528 | u32 address = |
b095c381 | 2529 | IPW_SHARED_SRAM_DMA_CONTROL + |
0edd5b44 | 2530 | (sizeof(struct command_block) * index); |
43f66a6c JK |
2531 | IPW_DEBUG_FW(">> :\n"); |
2532 | ||
0edd5b44 JG |
2533 | ipw_write_indirect(priv, address, (u8 *) cb, |
2534 | (int)sizeof(struct command_block)); | |
43f66a6c JK |
2535 | |
2536 | IPW_DEBUG_FW("<< :\n"); | |
2537 | return 0; | |
2538 | ||
2539 | } | |
2540 | ||
2541 | static int ipw_fw_dma_kick(struct ipw_priv *priv) | |
2542 | { | |
2543 | u32 control = 0; | |
0edd5b44 | 2544 | u32 index = 0; |
43f66a6c JK |
2545 | |
2546 | IPW_DEBUG_FW(">> :\n"); | |
bf79451e | 2547 | |
43f66a6c | 2548 | for (index = 0; index < priv->sram_desc.last_cb_index; index++) |
0edd5b44 JG |
2549 | ipw_fw_dma_write_command_block(priv, index, |
2550 | &priv->sram_desc.cb_list[index]); | |
43f66a6c JK |
2551 | |
2552 | /* Enable the DMA in the CSR register */ | |
b095c381 JK |
2553 | ipw_clear_bit(priv, IPW_RESET_REG, |
2554 | IPW_RESET_REG_MASTER_DISABLED | | |
2555 | IPW_RESET_REG_STOP_MASTER); | |
bf79451e | 2556 | |
0edd5b44 | 2557 | /* Set the Start bit. */ |
43f66a6c | 2558 | control = DMA_CONTROL_SMALL_CB_CONST_VALUE | DMA_CB_START; |
b095c381 | 2559 | ipw_write_reg32(priv, IPW_DMA_I_DMA_CONTROL, control); |
43f66a6c JK |
2560 | |
2561 | IPW_DEBUG_FW("<< :\n"); | |
2562 | return 0; | |
2563 | } | |
2564 | ||
2565 | static void ipw_fw_dma_dump_command_block(struct ipw_priv *priv) | |
2566 | { | |
2567 | u32 address; | |
0edd5b44 JG |
2568 | u32 register_value = 0; |
2569 | u32 cb_fields_address = 0; | |
43f66a6c JK |
2570 | |
2571 | IPW_DEBUG_FW(">> :\n"); | |
b095c381 | 2572 | address = ipw_read_reg32(priv, IPW_DMA_I_CURRENT_CB); |
0edd5b44 | 2573 | IPW_DEBUG_FW_INFO("Current CB is 0x%x \n", address); |
43f66a6c JK |
2574 | |
2575 | /* Read the DMA Controlor register */ | |
b095c381 JK |
2576 | register_value = ipw_read_reg32(priv, IPW_DMA_I_DMA_CONTROL); |
2577 | IPW_DEBUG_FW_INFO("IPW_DMA_I_DMA_CONTROL is 0x%x \n", register_value); | |
43f66a6c | 2578 | |
0edd5b44 | 2579 | /* Print the CB values */ |
43f66a6c JK |
2580 | cb_fields_address = address; |
2581 | register_value = ipw_read_reg32(priv, cb_fields_address); | |
0edd5b44 | 2582 | IPW_DEBUG_FW_INFO("Current CB ControlField is 0x%x \n", register_value); |
43f66a6c JK |
2583 | |
2584 | cb_fields_address += sizeof(u32); | |
2585 | register_value = ipw_read_reg32(priv, cb_fields_address); | |
0edd5b44 | 2586 | IPW_DEBUG_FW_INFO("Current CB Source Field is 0x%x \n", register_value); |
43f66a6c JK |
2587 | |
2588 | cb_fields_address += sizeof(u32); | |
2589 | register_value = ipw_read_reg32(priv, cb_fields_address); | |
2590 | IPW_DEBUG_FW_INFO("Current CB Destination Field is 0x%x \n", | |
2591 | register_value); | |
2592 | ||
2593 | cb_fields_address += sizeof(u32); | |
2594 | register_value = ipw_read_reg32(priv, cb_fields_address); | |
0edd5b44 | 2595 | IPW_DEBUG_FW_INFO("Current CB Status Field is 0x%x \n", register_value); |
43f66a6c JK |
2596 | |
2597 | IPW_DEBUG_FW(">> :\n"); | |
2598 | } | |
2599 | ||
2600 | static int ipw_fw_dma_command_block_index(struct ipw_priv *priv) | |
2601 | { | |
2602 | u32 current_cb_address = 0; | |
2603 | u32 current_cb_index = 0; | |
2604 | ||
2605 | IPW_DEBUG_FW("<< :\n"); | |
b095c381 | 2606 | current_cb_address = ipw_read_reg32(priv, IPW_DMA_I_CURRENT_CB); |
bf79451e | 2607 | |
b095c381 | 2608 | current_cb_index = (current_cb_address - IPW_SHARED_SRAM_DMA_CONTROL) / |
0edd5b44 | 2609 | sizeof(struct command_block); |
bf79451e | 2610 | |
43f66a6c | 2611 | IPW_DEBUG_FW_INFO("Current CB index 0x%x address = 0x%X \n", |
0edd5b44 | 2612 | current_cb_index, current_cb_address); |
43f66a6c JK |
2613 | |
2614 | IPW_DEBUG_FW(">> :\n"); | |
2615 | return current_cb_index; | |
2616 | ||
2617 | } | |
2618 | ||
2619 | static int ipw_fw_dma_add_command_block(struct ipw_priv *priv, | |
2620 | u32 src_address, | |
2621 | u32 dest_address, | |
2622 | u32 length, | |
0edd5b44 | 2623 | int interrupt_enabled, int is_last) |
43f66a6c JK |
2624 | { |
2625 | ||
bf79451e | 2626 | u32 control = CB_VALID | CB_SRC_LE | CB_DEST_LE | CB_SRC_AUTOINC | |
0edd5b44 JG |
2627 | CB_SRC_IO_GATED | CB_DEST_AUTOINC | CB_SRC_SIZE_LONG | |
2628 | CB_DEST_SIZE_LONG; | |
43f66a6c | 2629 | struct command_block *cb; |
0edd5b44 | 2630 | u32 last_cb_element = 0; |
43f66a6c JK |
2631 | |
2632 | IPW_DEBUG_FW_INFO("src_address=0x%x dest_address=0x%x length=0x%x\n", | |
2633 | src_address, dest_address, length); | |
2634 | ||
2635 | if (priv->sram_desc.last_cb_index >= CB_NUMBER_OF_ELEMENTS_SMALL) | |
2636 | return -1; | |
2637 | ||
2638 | last_cb_element = priv->sram_desc.last_cb_index; | |
2639 | cb = &priv->sram_desc.cb_list[last_cb_element]; | |
2640 | priv->sram_desc.last_cb_index++; | |
2641 | ||
2642 | /* Calculate the new CB control word */ | |
0edd5b44 | 2643 | if (interrupt_enabled) |
43f66a6c JK |
2644 | control |= CB_INT_ENABLED; |
2645 | ||
2646 | if (is_last) | |
2647 | control |= CB_LAST_VALID; | |
bf79451e | 2648 | |
43f66a6c JK |
2649 | control |= length; |
2650 | ||
2651 | /* Calculate the CB Element's checksum value */ | |
0edd5b44 | 2652 | cb->status = control ^ src_address ^ dest_address; |
43f66a6c JK |
2653 | |
2654 | /* Copy the Source and Destination addresses */ | |
2655 | cb->dest_addr = dest_address; | |
2656 | cb->source_addr = src_address; | |
2657 | ||
2658 | /* Copy the Control Word last */ | |
2659 | cb->control = control; | |
2660 | ||
2661 | return 0; | |
2662 | } | |
2663 | ||
2664 | static int ipw_fw_dma_add_buffer(struct ipw_priv *priv, | |
0edd5b44 | 2665 | u32 src_phys, u32 dest_address, u32 length) |
43f66a6c JK |
2666 | { |
2667 | u32 bytes_left = length; | |
0edd5b44 JG |
2668 | u32 src_offset = 0; |
2669 | u32 dest_offset = 0; | |
43f66a6c JK |
2670 | int status = 0; |
2671 | IPW_DEBUG_FW(">> \n"); | |
2672 | IPW_DEBUG_FW_INFO("src_phys=0x%x dest_address=0x%x length=0x%x\n", | |
2673 | src_phys, dest_address, length); | |
2674 | while (bytes_left > CB_MAX_LENGTH) { | |
0edd5b44 JG |
2675 | status = ipw_fw_dma_add_command_block(priv, |
2676 | src_phys + src_offset, | |
2677 | dest_address + | |
2678 | dest_offset, | |
2679 | CB_MAX_LENGTH, 0, 0); | |
43f66a6c JK |
2680 | if (status) { |
2681 | IPW_DEBUG_FW_INFO(": Failed\n"); | |
2682 | return -1; | |
bf79451e | 2683 | } else |
43f66a6c JK |
2684 | IPW_DEBUG_FW_INFO(": Added new cb\n"); |
2685 | ||
2686 | src_offset += CB_MAX_LENGTH; | |
2687 | dest_offset += CB_MAX_LENGTH; | |
2688 | bytes_left -= CB_MAX_LENGTH; | |
2689 | } | |
2690 | ||
2691 | /* add the buffer tail */ | |
2692 | if (bytes_left > 0) { | |
0edd5b44 JG |
2693 | status = |
2694 | ipw_fw_dma_add_command_block(priv, src_phys + src_offset, | |
2695 | dest_address + dest_offset, | |
2696 | bytes_left, 0, 0); | |
43f66a6c JK |
2697 | if (status) { |
2698 | IPW_DEBUG_FW_INFO(": Failed on the buffer tail\n"); | |
2699 | return -1; | |
bf79451e | 2700 | } else |
0edd5b44 JG |
2701 | IPW_DEBUG_FW_INFO |
2702 | (": Adding new cb - the buffer tail\n"); | |
43f66a6c | 2703 | } |
bf79451e | 2704 | |
43f66a6c JK |
2705 | IPW_DEBUG_FW("<< \n"); |
2706 | return 0; | |
2707 | } | |
2708 | ||
2709 | static int ipw_fw_dma_wait(struct ipw_priv *priv) | |
2710 | { | |
397ae121 | 2711 | u32 current_index = 0, previous_index; |
43f66a6c JK |
2712 | u32 watchdog = 0; |
2713 | ||
2714 | IPW_DEBUG_FW(">> : \n"); | |
2715 | ||
2716 | current_index = ipw_fw_dma_command_block_index(priv); | |
397ae121 | 2717 | IPW_DEBUG_FW_INFO("sram_desc.last_cb_index:0x%08X\n", |
0edd5b44 | 2718 | (int)priv->sram_desc.last_cb_index); |
43f66a6c JK |
2719 | |
2720 | while (current_index < priv->sram_desc.last_cb_index) { | |
2721 | udelay(50); | |
397ae121 | 2722 | previous_index = current_index; |
43f66a6c JK |
2723 | current_index = ipw_fw_dma_command_block_index(priv); |
2724 | ||
397ae121 ZY |
2725 | if (previous_index < current_index) { |
2726 | watchdog = 0; | |
2727 | continue; | |
2728 | } | |
2729 | if (++watchdog > 400) { | |
43f66a6c JK |
2730 | IPW_DEBUG_FW_INFO("Timeout\n"); |
2731 | ipw_fw_dma_dump_command_block(priv); | |
2732 | ipw_fw_dma_abort(priv); | |
2733 | return -1; | |
2734 | } | |
2735 | } | |
2736 | ||
2737 | ipw_fw_dma_abort(priv); | |
2738 | ||
0edd5b44 | 2739 | /*Disable the DMA in the CSR register */ |
b095c381 JK |
2740 | ipw_set_bit(priv, IPW_RESET_REG, |
2741 | IPW_RESET_REG_MASTER_DISABLED | IPW_RESET_REG_STOP_MASTER); | |
43f66a6c JK |
2742 | |
2743 | IPW_DEBUG_FW("<< dmaWaitSync \n"); | |
2744 | return 0; | |
2745 | } | |
2746 | ||
bf79451e | 2747 | static void ipw_remove_current_network(struct ipw_priv *priv) |
43f66a6c JK |
2748 | { |
2749 | struct list_head *element, *safe; | |
bf79451e | 2750 | struct ieee80211_network *network = NULL; |
a613bffd JK |
2751 | unsigned long flags; |
2752 | ||
2753 | spin_lock_irqsave(&priv->ieee->lock, flags); | |
43f66a6c JK |
2754 | list_for_each_safe(element, safe, &priv->ieee->network_list) { |
2755 | network = list_entry(element, struct ieee80211_network, list); | |
2756 | if (!memcmp(network->bssid, priv->bssid, ETH_ALEN)) { | |
2757 | list_del(element); | |
bf79451e | 2758 | list_add_tail(&network->list, |
43f66a6c JK |
2759 | &priv->ieee->network_free_list); |
2760 | } | |
2761 | } | |
a613bffd | 2762 | spin_unlock_irqrestore(&priv->ieee->lock, flags); |
43f66a6c JK |
2763 | } |
2764 | ||
2765 | /** | |
bf79451e | 2766 | * Check that card is still alive. |
43f66a6c JK |
2767 | * Reads debug register from domain0. |
2768 | * If card is present, pre-defined value should | |
2769 | * be found there. | |
bf79451e | 2770 | * |
43f66a6c JK |
2771 | * @param priv |
2772 | * @return 1 if card is present, 0 otherwise | |
2773 | */ | |
2774 | static inline int ipw_alive(struct ipw_priv *priv) | |
2775 | { | |
2776 | return ipw_read32(priv, 0x90) == 0xd55555d5; | |
2777 | } | |
2778 | ||
c7b6a674 | 2779 | /* timeout in msec, attempted in 10-msec quanta */ |
858119e1 | 2780 | static int ipw_poll_bit(struct ipw_priv *priv, u32 addr, u32 mask, |
43f66a6c JK |
2781 | int timeout) |
2782 | { | |
2783 | int i = 0; | |
2784 | ||
2785 | do { | |
bf79451e | 2786 | if ((ipw_read32(priv, addr) & mask) == mask) |
43f66a6c JK |
2787 | return i; |
2788 | mdelay(10); | |
2789 | i += 10; | |
2790 | } while (i < timeout); | |
bf79451e | 2791 | |
43f66a6c JK |
2792 | return -ETIME; |
2793 | } | |
2794 | ||
bf79451e | 2795 | /* These functions load the firmware and micro code for the operation of |
43f66a6c JK |
2796 | * the ipw hardware. It assumes the buffer has all the bits for the |
2797 | * image and the caller is handling the memory allocation and clean up. | |
2798 | */ | |
2799 | ||
0edd5b44 | 2800 | static int ipw_stop_master(struct ipw_priv *priv) |
43f66a6c JK |
2801 | { |
2802 | int rc; | |
bf79451e | 2803 | |
43f66a6c JK |
2804 | IPW_DEBUG_TRACE(">> \n"); |
2805 | /* stop master. typical delay - 0 */ | |
b095c381 | 2806 | ipw_set_bit(priv, IPW_RESET_REG, IPW_RESET_REG_STOP_MASTER); |
43f66a6c | 2807 | |
c7b6a674 | 2808 | /* timeout is in msec, polled in 10-msec quanta */ |
b095c381 JK |
2809 | rc = ipw_poll_bit(priv, IPW_RESET_REG, |
2810 | IPW_RESET_REG_MASTER_DISABLED, 100); | |
43f66a6c | 2811 | if (rc < 0) { |
c7b6a674 | 2812 | IPW_ERROR("wait for stop master failed after 100ms\n"); |
43f66a6c JK |
2813 | return -1; |
2814 | } | |
2815 | ||
2816 | IPW_DEBUG_INFO("stop master %dms\n", rc); | |
2817 | ||
2818 | return rc; | |
2819 | } | |
2820 | ||
2821 | static void ipw_arc_release(struct ipw_priv *priv) | |
2822 | { | |
2823 | IPW_DEBUG_TRACE(">> \n"); | |
2824 | mdelay(5); | |
2825 | ||
b095c381 | 2826 | ipw_clear_bit(priv, IPW_RESET_REG, CBD_RESET_REG_PRINCETON_RESET); |
43f66a6c JK |
2827 | |
2828 | /* no one knows timing, for safety add some delay */ | |
2829 | mdelay(5); | |
2830 | } | |
2831 | ||
43f66a6c JK |
2832 | struct fw_chunk { |
2833 | u32 address; | |
2834 | u32 length; | |
2835 | }; | |
2836 | ||
0edd5b44 | 2837 | static int ipw_load_ucode(struct ipw_priv *priv, u8 * data, size_t len) |
43f66a6c JK |
2838 | { |
2839 | int rc = 0, i, addr; | |
2840 | u8 cr = 0; | |
2841 | u16 *image; | |
2842 | ||
0edd5b44 | 2843 | image = (u16 *) data; |
bf79451e | 2844 | |
43f66a6c JK |
2845 | IPW_DEBUG_TRACE(">> \n"); |
2846 | ||
2847 | rc = ipw_stop_master(priv); | |
2848 | ||
2849 | if (rc < 0) | |
2850 | return rc; | |
bf79451e | 2851 | |
0edd5b44 | 2852 | // spin_lock_irqsave(&priv->lock, flags); |
bf79451e | 2853 | |
b095c381 JK |
2854 | for (addr = IPW_SHARED_LOWER_BOUND; |
2855 | addr < IPW_REGISTER_DOMAIN1_END; addr += 4) { | |
43f66a6c JK |
2856 | ipw_write32(priv, addr, 0); |
2857 | } | |
2858 | ||
2859 | /* no ucode (yet) */ | |
2860 | memset(&priv->dino_alive, 0, sizeof(priv->dino_alive)); | |
2861 | /* destroy DMA queues */ | |
2862 | /* reset sequence */ | |
2863 | ||
b095c381 | 2864 | ipw_write_reg32(priv, IPW_MEM_HALT_AND_RESET, IPW_BIT_HALT_RESET_ON); |
43f66a6c | 2865 | ipw_arc_release(priv); |
b095c381 | 2866 | ipw_write_reg32(priv, IPW_MEM_HALT_AND_RESET, IPW_BIT_HALT_RESET_OFF); |
43f66a6c JK |
2867 | mdelay(1); |
2868 | ||
2869 | /* reset PHY */ | |
b095c381 | 2870 | ipw_write_reg32(priv, IPW_INTERNAL_CMD_EVENT, IPW_BASEBAND_POWER_DOWN); |
43f66a6c | 2871 | mdelay(1); |
bf79451e | 2872 | |
b095c381 | 2873 | ipw_write_reg32(priv, IPW_INTERNAL_CMD_EVENT, 0); |
43f66a6c | 2874 | mdelay(1); |
bf79451e | 2875 | |
43f66a6c | 2876 | /* enable ucode store */ |
c8fe6679 ZY |
2877 | ipw_write_reg8(priv, IPW_BASEBAND_CONTROL_STATUS, 0x0); |
2878 | ipw_write_reg8(priv, IPW_BASEBAND_CONTROL_STATUS, DINO_ENABLE_CS); | |
43f66a6c JK |
2879 | mdelay(1); |
2880 | ||
2881 | /* write ucode */ | |
2882 | /** | |
2883 | * @bug | |
2884 | * Do NOT set indirect address register once and then | |
2885 | * store data to indirect data register in the loop. | |
2886 | * It seems very reasonable, but in this case DINO do not | |
2887 | * accept ucode. It is essential to set address each time. | |
2888 | */ | |
2889 | /* load new ipw uCode */ | |
2890 | for (i = 0; i < len / 2; i++) | |
b095c381 | 2891 | ipw_write_reg16(priv, IPW_BASEBAND_CONTROL_STORE, |
a613bffd | 2892 | cpu_to_le16(image[i])); |
43f66a6c | 2893 | |
43f66a6c | 2894 | /* enable DINO */ |
b095c381 JK |
2895 | ipw_write_reg8(priv, IPW_BASEBAND_CONTROL_STATUS, 0); |
2896 | ipw_write_reg8(priv, IPW_BASEBAND_CONTROL_STATUS, DINO_ENABLE_SYSTEM); | |
43f66a6c | 2897 | |
0edd5b44 | 2898 | /* this is where the igx / win driver deveates from the VAP driver. */ |
43f66a6c JK |
2899 | |
2900 | /* wait for alive response */ | |
2901 | for (i = 0; i < 100; i++) { | |
2902 | /* poll for incoming data */ | |
b095c381 | 2903 | cr = ipw_read_reg8(priv, IPW_BASEBAND_CONTROL_STATUS); |
43f66a6c JK |
2904 | if (cr & DINO_RXFIFO_DATA) |
2905 | break; | |
2906 | mdelay(1); | |
2907 | } | |
2908 | ||
2909 | if (cr & DINO_RXFIFO_DATA) { | |
2910 | /* alive_command_responce size is NOT multiple of 4 */ | |
2911 | u32 response_buffer[(sizeof(priv->dino_alive) + 3) / 4]; | |
bf79451e JG |
2912 | |
2913 | for (i = 0; i < ARRAY_SIZE(response_buffer); i++) | |
43f66a6c | 2914 | response_buffer[i] = |
a613bffd | 2915 | le32_to_cpu(ipw_read_reg32(priv, |
b095c381 | 2916 | IPW_BASEBAND_RX_FIFO_READ)); |
43f66a6c JK |
2917 | memcpy(&priv->dino_alive, response_buffer, |
2918 | sizeof(priv->dino_alive)); | |
2919 | if (priv->dino_alive.alive_command == 1 | |
2920 | && priv->dino_alive.ucode_valid == 1) { | |
2921 | rc = 0; | |
0edd5b44 JG |
2922 | IPW_DEBUG_INFO |
2923 | ("Microcode OK, rev. %d (0x%x) dev. %d (0x%x) " | |
2924 | "of %02d/%02d/%02d %02d:%02d\n", | |
2925 | priv->dino_alive.software_revision, | |
2926 | priv->dino_alive.software_revision, | |
2927 | priv->dino_alive.device_identifier, | |
2928 | priv->dino_alive.device_identifier, | |
2929 | priv->dino_alive.time_stamp[0], | |
2930 | priv->dino_alive.time_stamp[1], | |
2931 | priv->dino_alive.time_stamp[2], | |
2932 | priv->dino_alive.time_stamp[3], | |
2933 | priv->dino_alive.time_stamp[4]); | |
43f66a6c JK |
2934 | } else { |
2935 | IPW_DEBUG_INFO("Microcode is not alive\n"); | |
2936 | rc = -EINVAL; | |
2937 | } | |
2938 | } else { | |
2939 | IPW_DEBUG_INFO("No alive response from DINO\n"); | |
2940 | rc = -ETIME; | |
2941 | } | |
2942 | ||
2943 | /* disable DINO, otherwise for some reason | |
2944 | firmware have problem getting alive resp. */ | |
b095c381 | 2945 | ipw_write_reg8(priv, IPW_BASEBAND_CONTROL_STATUS, 0); |
43f66a6c | 2946 | |
0edd5b44 | 2947 | // spin_unlock_irqrestore(&priv->lock, flags); |
43f66a6c JK |
2948 | |
2949 | return rc; | |
2950 | } | |
2951 | ||
0edd5b44 | 2952 | static int ipw_load_firmware(struct ipw_priv *priv, u8 * data, size_t len) |
43f66a6c JK |
2953 | { |
2954 | int rc = -1; | |
2955 | int offset = 0; | |
2956 | struct fw_chunk *chunk; | |
2957 | dma_addr_t shared_phys; | |
2958 | u8 *shared_virt; | |
2959 | ||
2960 | IPW_DEBUG_TRACE("<< : \n"); | |
2961 | shared_virt = pci_alloc_consistent(priv->pci_dev, len, &shared_phys); | |
2962 | ||
2963 | if (!shared_virt) | |
2964 | return -ENOMEM; | |
2965 | ||
2966 | memmove(shared_virt, data, len); | |
2967 | ||
2968 | /* Start the Dma */ | |
2969 | rc = ipw_fw_dma_enable(priv); | |
2970 | ||
2971 | if (priv->sram_desc.last_cb_index > 0) { | |
2972 | /* the DMA is already ready this would be a bug. */ | |
2973 | BUG(); | |
2974 | goto out; | |
2975 | } | |
2976 | ||
2977 | do { | |
2978 | chunk = (struct fw_chunk *)(data + offset); | |
2979 | offset += sizeof(struct fw_chunk); | |
2980 | /* build DMA packet and queue up for sending */ | |
bf79451e | 2981 | /* dma to chunk->address, the chunk->length bytes from data + |
43f66a6c JK |
2982 | * offeset*/ |
2983 | /* Dma loading */ | |
2984 | rc = ipw_fw_dma_add_buffer(priv, shared_phys + offset, | |
a613bffd JK |
2985 | le32_to_cpu(chunk->address), |
2986 | le32_to_cpu(chunk->length)); | |
43f66a6c JK |
2987 | if (rc) { |
2988 | IPW_DEBUG_INFO("dmaAddBuffer Failed\n"); | |
2989 | goto out; | |
2990 | } | |
bf79451e | 2991 | |
a613bffd | 2992 | offset += le32_to_cpu(chunk->length); |
43f66a6c JK |
2993 | } while (offset < len); |
2994 | ||
0edd5b44 | 2995 | /* Run the DMA and wait for the answer */ |
43f66a6c JK |
2996 | rc = ipw_fw_dma_kick(priv); |
2997 | if (rc) { | |
2998 | IPW_ERROR("dmaKick Failed\n"); | |
2999 | goto out; | |
3000 | } | |
3001 | ||
3002 | rc = ipw_fw_dma_wait(priv); | |
3003 | if (rc) { | |
3004 | IPW_ERROR("dmaWaitSync Failed\n"); | |
3005 | goto out; | |
3006 | } | |
0edd5b44 JG |
3007 | out: |
3008 | pci_free_consistent(priv->pci_dev, len, shared_virt, shared_phys); | |
43f66a6c JK |
3009 | return rc; |
3010 | } | |
3011 | ||
3012 | /* stop nic */ | |
3013 | static int ipw_stop_nic(struct ipw_priv *priv) | |
3014 | { | |
3015 | int rc = 0; | |
3016 | ||
0edd5b44 | 3017 | /* stop */ |
b095c381 | 3018 | ipw_write32(priv, IPW_RESET_REG, IPW_RESET_REG_STOP_MASTER); |
bf79451e | 3019 | |
b095c381 JK |
3020 | rc = ipw_poll_bit(priv, IPW_RESET_REG, |
3021 | IPW_RESET_REG_MASTER_DISABLED, 500); | |
43f66a6c | 3022 | if (rc < 0) { |
c7b6a674 | 3023 | IPW_ERROR("wait for reg master disabled failed after 500ms\n"); |
43f66a6c | 3024 | return rc; |
bf79451e | 3025 | } |
43f66a6c | 3026 | |
b095c381 | 3027 | ipw_set_bit(priv, IPW_RESET_REG, CBD_RESET_REG_PRINCETON_RESET); |
bf79451e | 3028 | |
43f66a6c JK |
3029 | return rc; |
3030 | } | |
3031 | ||
3032 | static void ipw_start_nic(struct ipw_priv *priv) | |
3033 | { | |
3034 | IPW_DEBUG_TRACE(">>\n"); | |
3035 | ||
0edd5b44 | 3036 | /* prvHwStartNic release ARC */ |
b095c381 JK |
3037 | ipw_clear_bit(priv, IPW_RESET_REG, |
3038 | IPW_RESET_REG_MASTER_DISABLED | | |
3039 | IPW_RESET_REG_STOP_MASTER | | |
43f66a6c | 3040 | CBD_RESET_REG_PRINCETON_RESET); |
bf79451e | 3041 | |
43f66a6c | 3042 | /* enable power management */ |
b095c381 JK |
3043 | ipw_set_bit(priv, IPW_GP_CNTRL_RW, |
3044 | IPW_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY); | |
43f66a6c JK |
3045 | |
3046 | IPW_DEBUG_TRACE("<<\n"); | |
3047 | } | |
bf79451e | 3048 | |
43f66a6c JK |
3049 | static int ipw_init_nic(struct ipw_priv *priv) |
3050 | { | |
3051 | int rc; | |
3052 | ||
3053 | IPW_DEBUG_TRACE(">>\n"); | |
bf79451e | 3054 | /* reset */ |
43f66a6c JK |
3055 | /*prvHwInitNic */ |
3056 | /* set "initialization complete" bit to move adapter to D0 state */ | |
b095c381 | 3057 | ipw_set_bit(priv, IPW_GP_CNTRL_RW, IPW_GP_CNTRL_BIT_INIT_DONE); |
43f66a6c JK |
3058 | |
3059 | /* low-level PLL activation */ | |
b095c381 JK |
3060 | ipw_write32(priv, IPW_READ_INT_REGISTER, |
3061 | IPW_BIT_INT_HOST_SRAM_READ_INT_REGISTER); | |
43f66a6c JK |
3062 | |
3063 | /* wait for clock stabilization */ | |
b095c381 JK |
3064 | rc = ipw_poll_bit(priv, IPW_GP_CNTRL_RW, |
3065 | IPW_GP_CNTRL_BIT_CLOCK_READY, 250); | |
0edd5b44 | 3066 | if (rc < 0) |
43f66a6c JK |
3067 | IPW_DEBUG_INFO("FAILED wait for clock stablization\n"); |
3068 | ||
3069 | /* assert SW reset */ | |
b095c381 | 3070 | ipw_set_bit(priv, IPW_RESET_REG, IPW_RESET_REG_SW_RESET); |
43f66a6c JK |
3071 | |
3072 | udelay(10); | |
3073 | ||
3074 | /* set "initialization complete" bit to move adapter to D0 state */ | |
b095c381 | 3075 | ipw_set_bit(priv, IPW_GP_CNTRL_RW, IPW_GP_CNTRL_BIT_INIT_DONE); |
43f66a6c JK |
3076 | |
3077 | IPW_DEBUG_TRACE(">>\n"); | |
3078 | return 0; | |
3079 | } | |
3080 | ||
bf79451e | 3081 | /* Call this function from process context, it will sleep in request_firmware. |
43f66a6c JK |
3082 | * Probe is an ok place to call this from. |
3083 | */ | |
3084 | static int ipw_reset_nic(struct ipw_priv *priv) | |
3085 | { | |
3086 | int rc = 0; | |
a613bffd | 3087 | unsigned long flags; |
43f66a6c JK |
3088 | |
3089 | IPW_DEBUG_TRACE(">>\n"); | |
bf79451e | 3090 | |
43f66a6c | 3091 | rc = ipw_init_nic(priv); |
bf79451e | 3092 | |
a613bffd | 3093 | spin_lock_irqsave(&priv->lock, flags); |
43f66a6c JK |
3094 | /* Clear the 'host command active' bit... */ |
3095 | priv->status &= ~STATUS_HCMD_ACTIVE; | |
3096 | wake_up_interruptible(&priv->wait_command_queue); | |
afbf30a2 JK |
3097 | priv->status &= ~(STATUS_SCANNING | STATUS_SCAN_ABORTING); |
3098 | wake_up_interruptible(&priv->wait_state); | |
a613bffd | 3099 | spin_unlock_irqrestore(&priv->lock, flags); |
43f66a6c JK |
3100 | |
3101 | IPW_DEBUG_TRACE("<<\n"); | |
3102 | return rc; | |
bf79451e | 3103 | } |
43f66a6c | 3104 | |
9006ea75 JK |
3105 | |
3106 | struct ipw_fw { | |
3107 | u32 ver; | |
3108 | u32 boot_size; | |
3109 | u32 ucode_size; | |
3110 | u32 fw_size; | |
3111 | u8 data[0]; | |
3112 | }; | |
3113 | ||
bf79451e | 3114 | static int ipw_get_fw(struct ipw_priv *priv, |
9006ea75 | 3115 | const struct firmware **raw, const char *name) |
43f66a6c | 3116 | { |
9006ea75 | 3117 | struct ipw_fw *fw; |
43f66a6c JK |
3118 | int rc; |
3119 | ||
3120 | /* ask firmware_class module to get the boot firmware off disk */ | |
9006ea75 | 3121 | rc = request_firmware(raw, name, &priv->pci_dev->dev); |
43f66a6c | 3122 | if (rc < 0) { |
9006ea75 | 3123 | IPW_ERROR("%s request_firmware failed: Reason %d\n", name, rc); |
43f66a6c | 3124 | return rc; |
bf79451e | 3125 | } |
43f66a6c | 3126 | |
9006ea75 JK |
3127 | if ((*raw)->size < sizeof(*fw)) { |
3128 | IPW_ERROR("%s is too small (%zd)\n", name, (*raw)->size); | |
3129 | return -EINVAL; | |
3130 | } | |
3131 | ||
3132 | fw = (void *)(*raw)->data; | |
3133 | ||
3134 | if ((*raw)->size < sizeof(*fw) + | |
3135 | fw->boot_size + fw->ucode_size + fw->fw_size) { | |
3136 | IPW_ERROR("%s is too small or corrupt (%zd)\n", | |
3137 | name, (*raw)->size); | |
43f66a6c JK |
3138 | return -EINVAL; |
3139 | } | |
3140 | ||
9006ea75 | 3141 | IPW_DEBUG_INFO("Read firmware '%s' image v%d.%d (%zd bytes)\n", |
43f66a6c | 3142 | name, |
9006ea75 JK |
3143 | le32_to_cpu(fw->ver) >> 16, |
3144 | le32_to_cpu(fw->ver) & 0xff, | |
3145 | (*raw)->size - sizeof(*fw)); | |
43f66a6c JK |
3146 | return 0; |
3147 | } | |
3148 | ||
b095c381 | 3149 | #define IPW_RX_BUF_SIZE (3000) |
43f66a6c | 3150 | |
858119e1 | 3151 | static void ipw_rx_queue_reset(struct ipw_priv *priv, |
43f66a6c JK |
3152 | struct ipw_rx_queue *rxq) |
3153 | { | |
3154 | unsigned long flags; | |
3155 | int i; | |
3156 | ||
3157 | spin_lock_irqsave(&rxq->lock, flags); | |
3158 | ||
3159 | INIT_LIST_HEAD(&rxq->rx_free); | |
3160 | INIT_LIST_HEAD(&rxq->rx_used); | |
3161 | ||
3162 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | |
3163 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { | |
3164 | /* In the reset function, these buffers may have been allocated | |
3165 | * to an SKB, so we need to unmap and free potential storage */ | |
3166 | if (rxq->pool[i].skb != NULL) { | |
3167 | pci_unmap_single(priv->pci_dev, rxq->pool[i].dma_addr, | |
b095c381 | 3168 | IPW_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
43f66a6c | 3169 | dev_kfree_skb(rxq->pool[i].skb); |
a613bffd | 3170 | rxq->pool[i].skb = NULL; |
43f66a6c JK |
3171 | } |
3172 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | |
3173 | } | |
bf79451e | 3174 | |
43f66a6c JK |
3175 | /* Set us so that we have processed and used all buffers, but have |
3176 | * not restocked the Rx queue with fresh buffers */ | |
3177 | rxq->read = rxq->write = 0; | |
3178 | rxq->processed = RX_QUEUE_SIZE - 1; | |
3179 | rxq->free_count = 0; | |
3180 | spin_unlock_irqrestore(&rxq->lock, flags); | |
3181 | } | |
3182 | ||
3183 | #ifdef CONFIG_PM | |
3184 | static int fw_loaded = 0; | |
9006ea75 | 3185 | static const struct firmware *raw = NULL; |
afbf30a2 JK |
3186 | |
3187 | static void free_firmware(void) | |
3188 | { | |
3189 | if (fw_loaded) { | |
9006ea75 JK |
3190 | release_firmware(raw); |
3191 | raw = NULL; | |
afbf30a2 JK |
3192 | fw_loaded = 0; |
3193 | } | |
3194 | } | |
3195 | #else | |
3196 | #define free_firmware() do {} while (0) | |
43f66a6c JK |
3197 | #endif |
3198 | ||
3199 | static int ipw_load(struct ipw_priv *priv) | |
3200 | { | |
3201 | #ifndef CONFIG_PM | |
9006ea75 | 3202 | const struct firmware *raw = NULL; |
43f66a6c | 3203 | #endif |
9006ea75 JK |
3204 | struct ipw_fw *fw; |
3205 | u8 *boot_img, *ucode_img, *fw_img; | |
3206 | u8 *name = NULL; | |
43f66a6c JK |
3207 | int rc = 0, retries = 3; |
3208 | ||
397ae121 ZY |
3209 | switch (priv->ieee->iw_mode) { |
3210 | case IW_MODE_ADHOC: | |
9006ea75 | 3211 | name = "ipw2200-ibss.fw"; |
397ae121 | 3212 | break; |
b095c381 | 3213 | #ifdef CONFIG_IPW2200_MONITOR |
397ae121 | 3214 | case IW_MODE_MONITOR: |
9006ea75 | 3215 | name = "ipw2200-sniffer.fw"; |
397ae121 | 3216 | break; |
43f66a6c | 3217 | #endif |
397ae121 | 3218 | case IW_MODE_INFRA: |
9006ea75 | 3219 | name = "ipw2200-bss.fw"; |
397ae121 | 3220 | break; |
9006ea75 JK |
3221 | } |
3222 | ||
3223 | if (!name) { | |
397ae121 | 3224 | rc = -EINVAL; |
9006ea75 JK |
3225 | goto error; |
3226 | } | |
3227 | ||
3228 | #ifdef CONFIG_PM | |
3229 | if (!fw_loaded) { | |
3230 | #endif | |
3231 | rc = ipw_get_fw(priv, &raw, name); | |
3232 | if (rc < 0) | |
3233 | goto error; | |
3234 | #ifdef CONFIG_PM | |
43f66a6c | 3235 | } |
9006ea75 JK |
3236 | #endif |
3237 | ||
3238 | fw = (void *)raw->data; | |
3239 | boot_img = &fw->data[0]; | |
3240 | ucode_img = &fw->data[fw->boot_size]; | |
3241 | fw_img = &fw->data[fw->boot_size + fw->ucode_size]; | |
397ae121 ZY |
3242 | |
3243 | if (rc < 0) | |
3244 | goto error; | |
43f66a6c JK |
3245 | |
3246 | if (!priv->rxq) | |
3247 | priv->rxq = ipw_rx_queue_alloc(priv); | |
3248 | else | |
3249 | ipw_rx_queue_reset(priv, priv->rxq); | |
3250 | if (!priv->rxq) { | |
3251 | IPW_ERROR("Unable to initialize Rx queue\n"); | |
3252 | goto error; | |
3253 | } | |
3254 | ||
0edd5b44 | 3255 | retry: |
43f66a6c | 3256 | /* Ensure interrupts are disabled */ |
b095c381 | 3257 | ipw_write32(priv, IPW_INTA_MASK_R, ~IPW_INTA_MASK_ALL); |
43f66a6c JK |
3258 | priv->status &= ~STATUS_INT_ENABLED; |
3259 | ||
3260 | /* ack pending interrupts */ | |
b095c381 | 3261 | ipw_write32(priv, IPW_INTA_RW, IPW_INTA_MASK_ALL); |
bf79451e | 3262 | |
43f66a6c JK |
3263 | ipw_stop_nic(priv); |
3264 | ||
3265 | rc = ipw_reset_nic(priv); | |
397ae121 | 3266 | if (rc < 0) { |
43f66a6c JK |
3267 | IPW_ERROR("Unable to reset NIC\n"); |
3268 | goto error; | |
3269 | } | |
3270 | ||
b095c381 JK |
3271 | ipw_zero_memory(priv, IPW_NIC_SRAM_LOWER_BOUND, |
3272 | IPW_NIC_SRAM_UPPER_BOUND - IPW_NIC_SRAM_LOWER_BOUND); | |
43f66a6c JK |
3273 | |
3274 | /* DMA the initial boot firmware into the device */ | |
9006ea75 | 3275 | rc = ipw_load_firmware(priv, boot_img, fw->boot_size); |
43f66a6c | 3276 | if (rc < 0) { |
a4f6bbb3 | 3277 | IPW_ERROR("Unable to load boot firmware: %d\n", rc); |
43f66a6c JK |
3278 | goto error; |
3279 | } | |
3280 | ||
3281 | /* kick start the device */ | |
3282 | ipw_start_nic(priv); | |
3283 | ||
c7b6a674 | 3284 | /* wait for the device to finish its initial startup sequence */ |
b095c381 JK |
3285 | rc = ipw_poll_bit(priv, IPW_INTA_RW, |
3286 | IPW_INTA_BIT_FW_INITIALIZATION_DONE, 500); | |
43f66a6c JK |
3287 | if (rc < 0) { |
3288 | IPW_ERROR("device failed to boot initial fw image\n"); | |
3289 | goto error; | |
3290 | } | |
3291 | IPW_DEBUG_INFO("initial device response after %dms\n", rc); | |
3292 | ||
bf79451e | 3293 | /* ack fw init done interrupt */ |
b095c381 | 3294 | ipw_write32(priv, IPW_INTA_RW, IPW_INTA_BIT_FW_INITIALIZATION_DONE); |
43f66a6c JK |
3295 | |
3296 | /* DMA the ucode into the device */ | |
9006ea75 | 3297 | rc = ipw_load_ucode(priv, ucode_img, fw->ucode_size); |
43f66a6c | 3298 | if (rc < 0) { |
a4f6bbb3 | 3299 | IPW_ERROR("Unable to load ucode: %d\n", rc); |
43f66a6c JK |
3300 | goto error; |
3301 | } | |
bf79451e | 3302 | |
43f66a6c JK |
3303 | /* stop nic */ |
3304 | ipw_stop_nic(priv); | |
3305 | ||
3306 | /* DMA bss firmware into the device */ | |
9006ea75 | 3307 | rc = ipw_load_firmware(priv, fw_img, fw->fw_size); |
0edd5b44 | 3308 | if (rc < 0) { |
a4f6bbb3 | 3309 | IPW_ERROR("Unable to load firmware: %d\n", rc); |
43f66a6c JK |
3310 | goto error; |
3311 | } | |
397ae121 ZY |
3312 | #ifdef CONFIG_PM |
3313 | fw_loaded = 1; | |
3314 | #endif | |
3315 | ||
43f66a6c JK |
3316 | ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 0); |
3317 | ||
3318 | rc = ipw_queue_reset(priv); | |
397ae121 | 3319 | if (rc < 0) { |
43f66a6c JK |
3320 | IPW_ERROR("Unable to initialize queues\n"); |
3321 | goto error; | |
3322 | } | |
3323 | ||
3324 | /* Ensure interrupts are disabled */ | |
b095c381 | 3325 | ipw_write32(priv, IPW_INTA_MASK_R, ~IPW_INTA_MASK_ALL); |
c848d0af | 3326 | /* ack pending interrupts */ |
b095c381 | 3327 | ipw_write32(priv, IPW_INTA_RW, IPW_INTA_MASK_ALL); |
bf79451e | 3328 | |
43f66a6c JK |
3329 | /* kick start the device */ |
3330 | ipw_start_nic(priv); | |
3331 | ||
b095c381 | 3332 | if (ipw_read32(priv, IPW_INTA_RW) & IPW_INTA_BIT_PARITY_ERROR) { |
43f66a6c JK |
3333 | if (retries > 0) { |
3334 | IPW_WARNING("Parity error. Retrying init.\n"); | |
3335 | retries--; | |
3336 | goto retry; | |
3337 | } | |
3338 | ||
3339 | IPW_ERROR("TODO: Handle parity error -- schedule restart?\n"); | |
3340 | rc = -EIO; | |
3341 | goto error; | |
3342 | } | |
3343 | ||
3344 | /* wait for the device */ | |
b095c381 JK |
3345 | rc = ipw_poll_bit(priv, IPW_INTA_RW, |
3346 | IPW_INTA_BIT_FW_INITIALIZATION_DONE, 500); | |
43f66a6c | 3347 | if (rc < 0) { |
c7b6a674 | 3348 | IPW_ERROR("device failed to start within 500ms\n"); |
43f66a6c JK |
3349 | goto error; |
3350 | } | |
3351 | IPW_DEBUG_INFO("device response after %dms\n", rc); | |
3352 | ||
3353 | /* ack fw init done interrupt */ | |
b095c381 | 3354 | ipw_write32(priv, IPW_INTA_RW, IPW_INTA_BIT_FW_INITIALIZATION_DONE); |
43f66a6c JK |
3355 | |
3356 | /* read eeprom data and initialize the eeprom region of sram */ | |
3357 | priv->eeprom_delay = 1; | |
bf79451e | 3358 | ipw_eeprom_init_sram(priv); |
43f66a6c JK |
3359 | |
3360 | /* enable interrupts */ | |
3361 | ipw_enable_interrupts(priv); | |
3362 | ||
3363 | /* Ensure our queue has valid packets */ | |
3364 | ipw_rx_queue_replenish(priv); | |
3365 | ||
b095c381 | 3366 | ipw_write32(priv, IPW_RX_READ_INDEX, priv->rxq->read); |
43f66a6c JK |
3367 | |
3368 | /* ack pending interrupts */ | |
b095c381 | 3369 | ipw_write32(priv, IPW_INTA_RW, IPW_INTA_MASK_ALL); |
43f66a6c JK |
3370 | |
3371 | #ifndef CONFIG_PM | |
9006ea75 | 3372 | release_firmware(raw); |
43f66a6c JK |
3373 | #endif |
3374 | return 0; | |
3375 | ||
0edd5b44 | 3376 | error: |
43f66a6c JK |
3377 | if (priv->rxq) { |
3378 | ipw_rx_queue_free(priv, priv->rxq); | |
3379 | priv->rxq = NULL; | |
3380 | } | |
3381 | ipw_tx_queue_free(priv); | |
9006ea75 JK |
3382 | if (raw) |
3383 | release_firmware(raw); | |
43f66a6c JK |
3384 | #ifdef CONFIG_PM |
3385 | fw_loaded = 0; | |
9006ea75 | 3386 | raw = NULL; |
43f66a6c JK |
3387 | #endif |
3388 | ||
3389 | return rc; | |
3390 | } | |
3391 | ||
bf79451e | 3392 | /** |
43f66a6c JK |
3393 | * DMA services |
3394 | * | |
3395 | * Theory of operation | |
3396 | * | |
3397 | * A queue is a circular buffers with 'Read' and 'Write' pointers. | |
3398 | * 2 empty entries always kept in the buffer to protect from overflow. | |
3399 | * | |
3400 | * For Tx queue, there are low mark and high mark limits. If, after queuing | |
bf79451e JG |
3401 | * the packet for Tx, free space become < low mark, Tx queue stopped. When |
3402 | * reclaiming packets (on 'tx done IRQ), if free space become > high mark, | |
43f66a6c JK |
3403 | * Tx queue resumed. |
3404 | * | |
3405 | * The IPW operates with six queues, one receive queue in the device's | |
3406 | * sram, one transmit queue for sending commands to the device firmware, | |
bf79451e | 3407 | * and four transmit queues for data. |
43f66a6c | 3408 | * |
bf79451e | 3409 | * The four transmit queues allow for performing quality of service (qos) |
43f66a6c | 3410 | * transmissions as per the 802.11 protocol. Currently Linux does not |
bf79451e | 3411 | * provide a mechanism to the user for utilizing prioritized queues, so |
43f66a6c JK |
3412 | * we only utilize the first data transmit queue (queue1). |
3413 | */ | |
3414 | ||
3415 | /** | |
3416 | * Driver allocates buffers of this size for Rx | |
3417 | */ | |
3418 | ||
3419 | static inline int ipw_queue_space(const struct clx2_queue *q) | |
3420 | { | |
3421 | int s = q->last_used - q->first_empty; | |
3422 | if (s <= 0) | |
3423 | s += q->n_bd; | |
3424 | s -= 2; /* keep some reserve to not confuse empty and full situations */ | |
3425 | if (s < 0) | |
3426 | s = 0; | |
3427 | return s; | |
3428 | } | |
3429 | ||
3430 | static inline int ipw_queue_inc_wrap(int index, int n_bd) | |
3431 | { | |
3432 | return (++index == n_bd) ? 0 : index; | |
3433 | } | |
3434 | ||
3435 | /** | |
3436 | * Initialize common DMA queue structure | |
bf79451e | 3437 | * |
43f66a6c JK |
3438 | * @param q queue to init |
3439 | * @param count Number of BD's to allocate. Should be power of 2 | |
3440 | * @param read_register Address for 'read' register | |
3441 | * (not offset within BAR, full address) | |
3442 | * @param write_register Address for 'write' register | |
3443 | * (not offset within BAR, full address) | |
3444 | * @param base_register Address for 'base' register | |
3445 | * (not offset within BAR, full address) | |
3446 | * @param size Address for 'size' register | |
3447 | * (not offset within BAR, full address) | |
3448 | */ | |
bf79451e | 3449 | static void ipw_queue_init(struct ipw_priv *priv, struct clx2_queue *q, |
0edd5b44 | 3450 | int count, u32 read, u32 write, u32 base, u32 size) |
43f66a6c JK |
3451 | { |
3452 | q->n_bd = count; | |
3453 | ||
3454 | q->low_mark = q->n_bd / 4; | |
3455 | if (q->low_mark < 4) | |
3456 | q->low_mark = 4; | |
3457 | ||
3458 | q->high_mark = q->n_bd / 8; | |
3459 | if (q->high_mark < 2) | |
3460 | q->high_mark = 2; | |
3461 | ||
3462 | q->first_empty = q->last_used = 0; | |
3463 | q->reg_r = read; | |
3464 | q->reg_w = write; | |
3465 | ||
3466 | ipw_write32(priv, base, q->dma_addr); | |
3467 | ipw_write32(priv, size, count); | |
3468 | ipw_write32(priv, read, 0); | |
3469 | ipw_write32(priv, write, 0); | |
3470 | ||
3471 | _ipw_read32(priv, 0x90); | |
3472 | } | |
3473 | ||
bf79451e | 3474 | static int ipw_queue_tx_init(struct ipw_priv *priv, |
43f66a6c | 3475 | struct clx2_tx_queue *q, |
0edd5b44 | 3476 | int count, u32 read, u32 write, u32 base, u32 size) |
43f66a6c JK |
3477 | { |
3478 | struct pci_dev *dev = priv->pci_dev; | |
3479 | ||
3480 | q->txb = kmalloc(sizeof(q->txb[0]) * count, GFP_KERNEL); | |
3481 | if (!q->txb) { | |
3482 | IPW_ERROR("vmalloc for auxilary BD structures failed\n"); | |
3483 | return -ENOMEM; | |
3484 | } | |
3485 | ||
0edd5b44 JG |
3486 | q->bd = |
3487 | pci_alloc_consistent(dev, sizeof(q->bd[0]) * count, &q->q.dma_addr); | |
43f66a6c | 3488 | if (!q->bd) { |
aaa4d308 | 3489 | IPW_ERROR("pci_alloc_consistent(%zd) failed\n", |
0edd5b44 | 3490 | sizeof(q->bd[0]) * count); |
43f66a6c JK |
3491 | kfree(q->txb); |
3492 | q->txb = NULL; | |
3493 | return -ENOMEM; | |
3494 | } | |
3495 | ||
3496 | ipw_queue_init(priv, &q->q, count, read, write, base, size); | |
3497 | return 0; | |
3498 | } | |
3499 | ||
3500 | /** | |
3501 | * Free one TFD, those at index [txq->q.last_used]. | |
3502 | * Do NOT advance any indexes | |
bf79451e | 3503 | * |
43f66a6c JK |
3504 | * @param dev |
3505 | * @param txq | |
3506 | */ | |
3507 | static void ipw_queue_tx_free_tfd(struct ipw_priv *priv, | |
3508 | struct clx2_tx_queue *txq) | |
3509 | { | |
3510 | struct tfd_frame *bd = &txq->bd[txq->q.last_used]; | |
3511 | struct pci_dev *dev = priv->pci_dev; | |
3512 | int i; | |
bf79451e | 3513 | |
43f66a6c JK |
3514 | /* classify bd */ |
3515 | if (bd->control_flags.message_type == TX_HOST_COMMAND_TYPE) | |
3516 | /* nothing to cleanup after for host commands */ | |
3517 | return; | |
3518 | ||
3519 | /* sanity check */ | |
a613bffd JK |
3520 | if (le32_to_cpu(bd->u.data.num_chunks) > NUM_TFD_CHUNKS) { |
3521 | IPW_ERROR("Too many chunks: %i\n", | |
3522 | le32_to_cpu(bd->u.data.num_chunks)); | |
43f66a6c JK |
3523 | /** @todo issue fatal error, it is quite serious situation */ |
3524 | return; | |
3525 | } | |
3526 | ||
3527 | /* unmap chunks if any */ | |
a613bffd JK |
3528 | for (i = 0; i < le32_to_cpu(bd->u.data.num_chunks); i++) { |
3529 | pci_unmap_single(dev, le32_to_cpu(bd->u.data.chunk_ptr[i]), | |
3530 | le16_to_cpu(bd->u.data.chunk_len[i]), | |
3531 | PCI_DMA_TODEVICE); | |
43f66a6c JK |
3532 | if (txq->txb[txq->q.last_used]) { |
3533 | ieee80211_txb_free(txq->txb[txq->q.last_used]); | |
3534 | txq->txb[txq->q.last_used] = NULL; | |
3535 | } | |
3536 | } | |
3537 | } | |
3538 | ||
3539 | /** | |
3540 | * Deallocate DMA queue. | |
bf79451e | 3541 | * |
43f66a6c JK |
3542 | * Empty queue by removing and destroying all BD's. |
3543 | * Free all buffers. | |
bf79451e | 3544 | * |
43f66a6c JK |
3545 | * @param dev |
3546 | * @param q | |
3547 | */ | |
0edd5b44 | 3548 | static void ipw_queue_tx_free(struct ipw_priv *priv, struct clx2_tx_queue *txq) |
43f66a6c JK |
3549 | { |
3550 | struct clx2_queue *q = &txq->q; | |
3551 | struct pci_dev *dev = priv->pci_dev; | |
3552 | ||
bf79451e JG |
3553 | if (q->n_bd == 0) |
3554 | return; | |
43f66a6c JK |
3555 | |
3556 | /* first, empty all BD's */ | |
3557 | for (; q->first_empty != q->last_used; | |
3558 | q->last_used = ipw_queue_inc_wrap(q->last_used, q->n_bd)) { | |
3559 | ipw_queue_tx_free_tfd(priv, txq); | |
3560 | } | |
bf79451e | 3561 | |
43f66a6c | 3562 | /* free buffers belonging to queue itself */ |
0edd5b44 | 3563 | pci_free_consistent(dev, sizeof(txq->bd[0]) * q->n_bd, txq->bd, |
43f66a6c JK |
3564 | q->dma_addr); |
3565 | kfree(txq->txb); | |
3566 | ||
3567 | /* 0 fill whole structure */ | |
3568 | memset(txq, 0, sizeof(*txq)); | |
3569 | } | |
3570 | ||
43f66a6c JK |
3571 | /** |
3572 | * Destroy all DMA queues and structures | |
bf79451e | 3573 | * |
43f66a6c JK |
3574 | * @param priv |
3575 | */ | |
3576 | static void ipw_tx_queue_free(struct ipw_priv *priv) | |
3577 | { | |
3578 | /* Tx CMD queue */ | |
3579 | ipw_queue_tx_free(priv, &priv->txq_cmd); | |
3580 | ||
3581 | /* Tx queues */ | |
3582 | ipw_queue_tx_free(priv, &priv->txq[0]); | |
3583 | ipw_queue_tx_free(priv, &priv->txq[1]); | |
3584 | ipw_queue_tx_free(priv, &priv->txq[2]); | |
3585 | ipw_queue_tx_free(priv, &priv->txq[3]); | |
3586 | } | |
3587 | ||
858119e1 | 3588 | static void ipw_create_bssid(struct ipw_priv *priv, u8 * bssid) |
43f66a6c JK |
3589 | { |
3590 | /* First 3 bytes are manufacturer */ | |
3591 | bssid[0] = priv->mac_addr[0]; | |
3592 | bssid[1] = priv->mac_addr[1]; | |
3593 | bssid[2] = priv->mac_addr[2]; | |
3594 | ||
3595 | /* Last bytes are random */ | |
0edd5b44 | 3596 | get_random_bytes(&bssid[3], ETH_ALEN - 3); |
43f66a6c | 3597 | |
0edd5b44 JG |
3598 | bssid[0] &= 0xfe; /* clear multicast bit */ |
3599 | bssid[0] |= 0x02; /* set local assignment bit (IEEE802) */ | |
43f66a6c JK |
3600 | } |
3601 | ||
858119e1 | 3602 | static u8 ipw_add_station(struct ipw_priv *priv, u8 * bssid) |
43f66a6c JK |
3603 | { |
3604 | struct ipw_station_entry entry; | |
3605 | int i; | |
3606 | ||
3607 | for (i = 0; i < priv->num_stations; i++) { | |
3608 | if (!memcmp(priv->stations[i], bssid, ETH_ALEN)) { | |
3609 | /* Another node is active in network */ | |
3610 | priv->missed_adhoc_beacons = 0; | |
3611 | if (!(priv->config & CFG_STATIC_CHANNEL)) | |
3612 | /* when other nodes drop out, we drop out */ | |
3613 | priv->config &= ~CFG_ADHOC_PERSIST; | |
3614 | ||
3615 | return i; | |
3616 | } | |
3617 | } | |
3618 | ||
3619 | if (i == MAX_STATIONS) | |
3620 | return IPW_INVALID_STATION; | |
3621 | ||
3622 | IPW_DEBUG_SCAN("Adding AdHoc station: " MAC_FMT "\n", MAC_ARG(bssid)); | |
3623 | ||
3624 | entry.reserved = 0; | |
3625 | entry.support_mode = 0; | |
3626 | memcpy(entry.mac_addr, bssid, ETH_ALEN); | |
3627 | memcpy(priv->stations[i], bssid, ETH_ALEN); | |
3628 | ipw_write_direct(priv, IPW_STATION_TABLE_LOWER + i * sizeof(entry), | |
0edd5b44 | 3629 | &entry, sizeof(entry)); |
43f66a6c JK |
3630 | priv->num_stations++; |
3631 | ||
3632 | return i; | |
3633 | } | |
3634 | ||
858119e1 | 3635 | static u8 ipw_find_station(struct ipw_priv *priv, u8 * bssid) |
43f66a6c JK |
3636 | { |
3637 | int i; | |
3638 | ||
bf79451e JG |
3639 | for (i = 0; i < priv->num_stations; i++) |
3640 | if (!memcmp(priv->stations[i], bssid, ETH_ALEN)) | |
43f66a6c JK |
3641 | return i; |
3642 | ||
3643 | return IPW_INVALID_STATION; | |
3644 | } | |
3645 | ||
3646 | static void ipw_send_disassociate(struct ipw_priv *priv, int quiet) | |
3647 | { | |
3648 | int err; | |
3649 | ||
7b99659f HL |
3650 | if (priv->status & STATUS_ASSOCIATING) { |
3651 | IPW_DEBUG_ASSOC("Disassociating while associating.\n"); | |
3652 | queue_work(priv->workqueue, &priv->disassociate); | |
3653 | return; | |
3654 | } | |
3655 | ||
3656 | if (!(priv->status & STATUS_ASSOCIATED)) { | |
43f66a6c JK |
3657 | IPW_DEBUG_ASSOC("Disassociating while not associated.\n"); |
3658 | return; | |
3659 | } | |
3660 | ||
3661 | IPW_DEBUG_ASSOC("Disassocation attempt from " MAC_FMT " " | |
3662 | "on channel %d.\n", | |
bf79451e | 3663 | MAC_ARG(priv->assoc_request.bssid), |
43f66a6c JK |
3664 | priv->assoc_request.channel); |
3665 | ||
3666 | priv->status &= ~(STATUS_ASSOCIATING | STATUS_ASSOCIATED); | |
3667 | priv->status |= STATUS_DISASSOCIATING; | |
3668 | ||
3669 | if (quiet) | |
3670 | priv->assoc_request.assoc_type = HC_DISASSOC_QUIET; | |
3671 | else | |
3672 | priv->assoc_request.assoc_type = HC_DISASSOCIATE; | |
e6324726 | 3673 | |
43f66a6c JK |
3674 | err = ipw_send_associate(priv, &priv->assoc_request); |
3675 | if (err) { | |
3676 | IPW_DEBUG_HC("Attempt to send [dis]associate command " | |
3677 | "failed.\n"); | |
3678 | return; | |
3679 | } | |
3680 | ||
3681 | } | |
3682 | ||
c848d0af | 3683 | static int ipw_disassociate(void *data) |
43f66a6c | 3684 | { |
c848d0af JK |
3685 | struct ipw_priv *priv = data; |
3686 | if (!(priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING))) | |
3687 | return 0; | |
43f66a6c | 3688 | ipw_send_disassociate(data, 0); |
c848d0af | 3689 | return 1; |
43f66a6c JK |
3690 | } |
3691 | ||
c848d0af | 3692 | static void ipw_bg_disassociate(void *data) |
43f66a6c | 3693 | { |
c848d0af | 3694 | struct ipw_priv *priv = data; |
4644151b | 3695 | mutex_lock(&priv->mutex); |
c848d0af | 3696 | ipw_disassociate(data); |
4644151b | 3697 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
3698 | } |
3699 | ||
d8bad6df ZY |
3700 | static void ipw_system_config(void *data) |
3701 | { | |
3702 | struct ipw_priv *priv = data; | |
3703 | ipw_send_system_config(priv, &priv->sys_config); | |
43f66a6c JK |
3704 | } |
3705 | ||
3706 | struct ipw_status_code { | |
3707 | u16 status; | |
3708 | const char *reason; | |
3709 | }; | |
3710 | ||
3711 | static const struct ipw_status_code ipw_status_codes[] = { | |
3712 | {0x00, "Successful"}, | |
3713 | {0x01, "Unspecified failure"}, | |
3714 | {0x0A, "Cannot support all requested capabilities in the " | |
3715 | "Capability information field"}, | |
3716 | {0x0B, "Reassociation denied due to inability to confirm that " | |
3717 | "association exists"}, | |
3718 | {0x0C, "Association denied due to reason outside the scope of this " | |
3719 | "standard"}, | |
0edd5b44 JG |
3720 | {0x0D, |
3721 | "Responding station does not support the specified authentication " | |
43f66a6c | 3722 | "algorithm"}, |
0edd5b44 JG |
3723 | {0x0E, |
3724 | "Received an Authentication frame with authentication sequence " | |
43f66a6c JK |
3725 | "transaction sequence number out of expected sequence"}, |
3726 | {0x0F, "Authentication rejected because of challenge failure"}, | |
3727 | {0x10, "Authentication rejected due to timeout waiting for next " | |
3728 | "frame in sequence"}, | |
3729 | {0x11, "Association denied because AP is unable to handle additional " | |
3730 | "associated stations"}, | |
0edd5b44 JG |
3731 | {0x12, |
3732 | "Association denied due to requesting station not supporting all " | |
43f66a6c | 3733 | "of the datarates in the BSSBasicServiceSet Parameter"}, |
0edd5b44 JG |
3734 | {0x13, |
3735 | "Association denied due to requesting station not supporting " | |
43f66a6c | 3736 | "short preamble operation"}, |
0edd5b44 JG |
3737 | {0x14, |
3738 | "Association denied due to requesting station not supporting " | |
43f66a6c | 3739 | "PBCC encoding"}, |
0edd5b44 JG |
3740 | {0x15, |
3741 | "Association denied due to requesting station not supporting " | |
43f66a6c | 3742 | "channel agility"}, |
0edd5b44 JG |
3743 | {0x19, |
3744 | "Association denied due to requesting station not supporting " | |
43f66a6c | 3745 | "short slot operation"}, |
0edd5b44 JG |
3746 | {0x1A, |
3747 | "Association denied due to requesting station not supporting " | |
43f66a6c JK |
3748 | "DSSS-OFDM operation"}, |
3749 | {0x28, "Invalid Information Element"}, | |
3750 | {0x29, "Group Cipher is not valid"}, | |
3751 | {0x2A, "Pairwise Cipher is not valid"}, | |
3752 | {0x2B, "AKMP is not valid"}, | |
3753 | {0x2C, "Unsupported RSN IE version"}, | |
3754 | {0x2D, "Invalid RSN IE Capabilities"}, | |
3755 | {0x2E, "Cipher suite is rejected per security policy"}, | |
3756 | }; | |
3757 | ||
0f52bf90 | 3758 | #ifdef CONFIG_IPW2200_DEBUG |
bf79451e | 3759 | static const char *ipw_get_status_code(u16 status) |
43f66a6c JK |
3760 | { |
3761 | int i; | |
bf79451e | 3762 | for (i = 0; i < ARRAY_SIZE(ipw_status_codes); i++) |
ea2b26e0 | 3763 | if (ipw_status_codes[i].status == (status & 0xff)) |
43f66a6c JK |
3764 | return ipw_status_codes[i].reason; |
3765 | return "Unknown status value."; | |
3766 | } | |
3767 | #endif | |
3768 | ||
3769 | static void inline average_init(struct average *avg) | |
3770 | { | |
3771 | memset(avg, 0, sizeof(*avg)); | |
3772 | } | |
3773 | ||
00d21de5 ZY |
3774 | #define DEPTH_RSSI 8 |
3775 | #define DEPTH_NOISE 16 | |
3776 | static s16 exponential_average(s16 prev_avg, s16 val, u8 depth) | |
3777 | { | |
3778 | return ((depth-1)*prev_avg + val)/depth; | |
3779 | } | |
3780 | ||
858119e1 | 3781 | static void average_add(struct average *avg, s16 val) |
43f66a6c JK |
3782 | { |
3783 | avg->sum -= avg->entries[avg->pos]; | |
3784 | avg->sum += val; | |
3785 | avg->entries[avg->pos++] = val; | |
3786 | if (unlikely(avg->pos == AVG_ENTRIES)) { | |
3787 | avg->init = 1; | |
3788 | avg->pos = 0; | |
3789 | } | |
3790 | } | |
3791 | ||
858119e1 | 3792 | static s16 average_value(struct average *avg) |
43f66a6c JK |
3793 | { |
3794 | if (!unlikely(avg->init)) { | |
3795 | if (avg->pos) | |
3796 | return avg->sum / avg->pos; | |
3797 | return 0; | |
3798 | } | |
3799 | ||
3800 | return avg->sum / AVG_ENTRIES; | |
3801 | } | |
3802 | ||
3803 | static void ipw_reset_stats(struct ipw_priv *priv) | |
3804 | { | |
3805 | u32 len = sizeof(u32); | |
3806 | ||
3807 | priv->quality = 0; | |
3808 | ||
3809 | average_init(&priv->average_missed_beacons); | |
00d21de5 ZY |
3810 | priv->exp_avg_rssi = -60; |
3811 | priv->exp_avg_noise = -85 + 0x100; | |
43f66a6c JK |
3812 | |
3813 | priv->last_rate = 0; | |
3814 | priv->last_missed_beacons = 0; | |
3815 | priv->last_rx_packets = 0; | |
3816 | priv->last_tx_packets = 0; | |
3817 | priv->last_tx_failures = 0; | |
bf79451e | 3818 | |
43f66a6c JK |
3819 | /* Firmware managed, reset only when NIC is restarted, so we have to |
3820 | * normalize on the current value */ | |
bf79451e | 3821 | ipw_get_ordinal(priv, IPW_ORD_STAT_RX_ERR_CRC, |
43f66a6c | 3822 | &priv->last_rx_err, &len); |
bf79451e | 3823 | ipw_get_ordinal(priv, IPW_ORD_STAT_TX_FAILURE, |
43f66a6c JK |
3824 | &priv->last_tx_failures, &len); |
3825 | ||
3826 | /* Driver managed, reset with each association */ | |
3827 | priv->missed_adhoc_beacons = 0; | |
3828 | priv->missed_beacons = 0; | |
3829 | priv->tx_packets = 0; | |
3830 | priv->rx_packets = 0; | |
3831 | ||
3832 | } | |
3833 | ||
858119e1 | 3834 | static u32 ipw_get_max_rate(struct ipw_priv *priv) |
43f66a6c JK |
3835 | { |
3836 | u32 i = 0x80000000; | |
3837 | u32 mask = priv->rates_mask; | |
3838 | /* If currently associated in B mode, restrict the maximum | |
3839 | * rate match to B rates */ | |
3840 | if (priv->assoc_request.ieee_mode == IPW_B_MODE) | |
3841 | mask &= IEEE80211_CCK_RATES_MASK; | |
3842 | ||
3843 | /* TODO: Verify that the rate is supported by the current rates | |
3844 | * list. */ | |
3845 | ||
0edd5b44 JG |
3846 | while (i && !(mask & i)) |
3847 | i >>= 1; | |
43f66a6c | 3848 | switch (i) { |
ea2b26e0 JK |
3849 | case IEEE80211_CCK_RATE_1MB_MASK: |
3850 | return 1000000; | |
3851 | case IEEE80211_CCK_RATE_2MB_MASK: | |
3852 | return 2000000; | |
3853 | case IEEE80211_CCK_RATE_5MB_MASK: | |
3854 | return 5500000; | |
3855 | case IEEE80211_OFDM_RATE_6MB_MASK: | |
3856 | return 6000000; | |
3857 | case IEEE80211_OFDM_RATE_9MB_MASK: | |
3858 | return 9000000; | |
3859 | case IEEE80211_CCK_RATE_11MB_MASK: | |
3860 | return 11000000; | |
3861 | case IEEE80211_OFDM_RATE_12MB_MASK: | |
3862 | return 12000000; | |
3863 | case IEEE80211_OFDM_RATE_18MB_MASK: | |
3864 | return 18000000; | |
3865 | case IEEE80211_OFDM_RATE_24MB_MASK: | |
3866 | return 24000000; | |
3867 | case IEEE80211_OFDM_RATE_36MB_MASK: | |
3868 | return 36000000; | |
3869 | case IEEE80211_OFDM_RATE_48MB_MASK: | |
3870 | return 48000000; | |
3871 | case IEEE80211_OFDM_RATE_54MB_MASK: | |
3872 | return 54000000; | |
43f66a6c JK |
3873 | } |
3874 | ||
bf79451e | 3875 | if (priv->ieee->mode == IEEE_B) |
43f66a6c JK |
3876 | return 11000000; |
3877 | else | |
3878 | return 54000000; | |
3879 | } | |
3880 | ||
3881 | static u32 ipw_get_current_rate(struct ipw_priv *priv) | |
3882 | { | |
3883 | u32 rate, len = sizeof(rate); | |
3884 | int err; | |
3885 | ||
bf79451e | 3886 | if (!(priv->status & STATUS_ASSOCIATED)) |
43f66a6c JK |
3887 | return 0; |
3888 | ||
3889 | if (priv->tx_packets > IPW_REAL_RATE_RX_PACKET_THRESHOLD) { | |
bf79451e | 3890 | err = ipw_get_ordinal(priv, IPW_ORD_STAT_TX_CURR_RATE, &rate, |
43f66a6c JK |
3891 | &len); |
3892 | if (err) { | |
3893 | IPW_DEBUG_INFO("failed querying ordinals.\n"); | |
3894 | return 0; | |
3895 | } | |
bf79451e | 3896 | } else |
43f66a6c JK |
3897 | return ipw_get_max_rate(priv); |
3898 | ||
3899 | switch (rate) { | |
ea2b26e0 JK |
3900 | case IPW_TX_RATE_1MB: |
3901 | return 1000000; | |
3902 | case IPW_TX_RATE_2MB: | |
3903 | return 2000000; | |
3904 | case IPW_TX_RATE_5MB: | |
3905 | return 5500000; | |
3906 | case IPW_TX_RATE_6MB: | |
3907 | return 6000000; | |
3908 | case IPW_TX_RATE_9MB: | |
3909 | return 9000000; | |
3910 | case IPW_TX_RATE_11MB: | |
3911 | return 11000000; | |
3912 | case IPW_TX_RATE_12MB: | |
3913 | return 12000000; | |
3914 | case IPW_TX_RATE_18MB: | |
3915 | return 18000000; | |
3916 | case IPW_TX_RATE_24MB: | |
3917 | return 24000000; | |
3918 | case IPW_TX_RATE_36MB: | |
3919 | return 36000000; | |
3920 | case IPW_TX_RATE_48MB: | |
3921 | return 48000000; | |
3922 | case IPW_TX_RATE_54MB: | |
3923 | return 54000000; | |
43f66a6c JK |
3924 | } |
3925 | ||
3926 | return 0; | |
3927 | } | |
3928 | ||
43f66a6c JK |
3929 | #define IPW_STATS_INTERVAL (2 * HZ) |
3930 | static void ipw_gather_stats(struct ipw_priv *priv) | |
3931 | { | |
3932 | u32 rx_err, rx_err_delta, rx_packets_delta; | |
3933 | u32 tx_failures, tx_failures_delta, tx_packets_delta; | |
3934 | u32 missed_beacons_percent, missed_beacons_delta; | |
3935 | u32 quality = 0; | |
3936 | u32 len = sizeof(u32); | |
3937 | s16 rssi; | |
bf79451e | 3938 | u32 beacon_quality, signal_quality, tx_quality, rx_quality, |
0edd5b44 | 3939 | rate_quality; |
ea2b26e0 | 3940 | u32 max_rate; |
43f66a6c JK |
3941 | |
3942 | if (!(priv->status & STATUS_ASSOCIATED)) { | |
3943 | priv->quality = 0; | |
3944 | return; | |
3945 | } | |
3946 | ||
3947 | /* Update the statistics */ | |
bf79451e | 3948 | ipw_get_ordinal(priv, IPW_ORD_STAT_MISSED_BEACONS, |
43f66a6c | 3949 | &priv->missed_beacons, &len); |
0edd5b44 | 3950 | missed_beacons_delta = priv->missed_beacons - priv->last_missed_beacons; |
43f66a6c JK |
3951 | priv->last_missed_beacons = priv->missed_beacons; |
3952 | if (priv->assoc_request.beacon_interval) { | |
3953 | missed_beacons_percent = missed_beacons_delta * | |
0edd5b44 JG |
3954 | (HZ * priv->assoc_request.beacon_interval) / |
3955 | (IPW_STATS_INTERVAL * 10); | |
43f66a6c JK |
3956 | } else { |
3957 | missed_beacons_percent = 0; | |
3958 | } | |
3959 | average_add(&priv->average_missed_beacons, missed_beacons_percent); | |
3960 | ||
3961 | ipw_get_ordinal(priv, IPW_ORD_STAT_RX_ERR_CRC, &rx_err, &len); | |
3962 | rx_err_delta = rx_err - priv->last_rx_err; | |
3963 | priv->last_rx_err = rx_err; | |
3964 | ||
3965 | ipw_get_ordinal(priv, IPW_ORD_STAT_TX_FAILURE, &tx_failures, &len); | |
3966 | tx_failures_delta = tx_failures - priv->last_tx_failures; | |
3967 | priv->last_tx_failures = tx_failures; | |
3968 | ||
3969 | rx_packets_delta = priv->rx_packets - priv->last_rx_packets; | |
3970 | priv->last_rx_packets = priv->rx_packets; | |
3971 | ||
3972 | tx_packets_delta = priv->tx_packets - priv->last_tx_packets; | |
3973 | priv->last_tx_packets = priv->tx_packets; | |
3974 | ||
3975 | /* Calculate quality based on the following: | |
bf79451e | 3976 | * |
43f66a6c JK |
3977 | * Missed beacon: 100% = 0, 0% = 70% missed |
3978 | * Rate: 60% = 1Mbs, 100% = Max | |
3979 | * Rx and Tx errors represent a straight % of total Rx/Tx | |
3980 | * RSSI: 100% = > -50, 0% = < -80 | |
3981 | * Rx errors: 100% = 0, 0% = 50% missed | |
bf79451e | 3982 | * |
43f66a6c JK |
3983 | * The lowest computed quality is used. |
3984 | * | |
3985 | */ | |
3986 | #define BEACON_THRESHOLD 5 | |
3987 | beacon_quality = 100 - missed_beacons_percent; | |
3988 | if (beacon_quality < BEACON_THRESHOLD) | |
3989 | beacon_quality = 0; | |
3990 | else | |
bf79451e | 3991 | beacon_quality = (beacon_quality - BEACON_THRESHOLD) * 100 / |
0edd5b44 | 3992 | (100 - BEACON_THRESHOLD); |
bf79451e | 3993 | IPW_DEBUG_STATS("Missed beacon: %3d%% (%d%%)\n", |
43f66a6c | 3994 | beacon_quality, missed_beacons_percent); |
bf79451e | 3995 | |
43f66a6c | 3996 | priv->last_rate = ipw_get_current_rate(priv); |
ea2b26e0 JK |
3997 | max_rate = ipw_get_max_rate(priv); |
3998 | rate_quality = priv->last_rate * 40 / max_rate + 60; | |
43f66a6c JK |
3999 | IPW_DEBUG_STATS("Rate quality : %3d%% (%dMbs)\n", |
4000 | rate_quality, priv->last_rate / 1000000); | |
bf79451e | 4001 | |
0edd5b44 | 4002 | if (rx_packets_delta > 100 && rx_packets_delta + rx_err_delta) |
bf79451e | 4003 | rx_quality = 100 - (rx_err_delta * 100) / |
0edd5b44 | 4004 | (rx_packets_delta + rx_err_delta); |
43f66a6c JK |
4005 | else |
4006 | rx_quality = 100; | |
4007 | IPW_DEBUG_STATS("Rx quality : %3d%% (%u errors, %u packets)\n", | |
4008 | rx_quality, rx_err_delta, rx_packets_delta); | |
bf79451e | 4009 | |
0edd5b44 | 4010 | if (tx_packets_delta > 100 && tx_packets_delta + tx_failures_delta) |
bf79451e | 4011 | tx_quality = 100 - (tx_failures_delta * 100) / |
0edd5b44 | 4012 | (tx_packets_delta + tx_failures_delta); |
43f66a6c JK |
4013 | else |
4014 | tx_quality = 100; | |
4015 | IPW_DEBUG_STATS("Tx quality : %3d%% (%u errors, %u packets)\n", | |
4016 | tx_quality, tx_failures_delta, tx_packets_delta); | |
bf79451e | 4017 | |
00d21de5 | 4018 | rssi = priv->exp_avg_rssi; |
c848d0af JK |
4019 | signal_quality = |
4020 | (100 * | |
4021 | (priv->ieee->perfect_rssi - priv->ieee->worst_rssi) * | |
4022 | (priv->ieee->perfect_rssi - priv->ieee->worst_rssi) - | |
4023 | (priv->ieee->perfect_rssi - rssi) * | |
4024 | (15 * (priv->ieee->perfect_rssi - priv->ieee->worst_rssi) + | |
4025 | 62 * (priv->ieee->perfect_rssi - rssi))) / | |
4026 | ((priv->ieee->perfect_rssi - priv->ieee->worst_rssi) * | |
4027 | (priv->ieee->perfect_rssi - priv->ieee->worst_rssi)); | |
4028 | if (signal_quality > 100) | |
43f66a6c | 4029 | signal_quality = 100; |
c848d0af | 4030 | else if (signal_quality < 1) |
43f66a6c | 4031 | signal_quality = 0; |
ea2b26e0 | 4032 | |
00d21de5 | 4033 | IPW_ERROR("Signal level : %3d%% (%d dBm)\n", |
43f66a6c | 4034 | signal_quality, rssi); |
bf79451e JG |
4035 | |
4036 | quality = min(beacon_quality, | |
43f66a6c JK |
4037 | min(rate_quality, |
4038 | min(tx_quality, min(rx_quality, signal_quality)))); | |
4039 | if (quality == beacon_quality) | |
0edd5b44 JG |
4040 | IPW_DEBUG_STATS("Quality (%d%%): Clamped to missed beacons.\n", |
4041 | quality); | |
43f66a6c | 4042 | if (quality == rate_quality) |
0edd5b44 JG |
4043 | IPW_DEBUG_STATS("Quality (%d%%): Clamped to rate quality.\n", |
4044 | quality); | |
43f66a6c | 4045 | if (quality == tx_quality) |
0edd5b44 JG |
4046 | IPW_DEBUG_STATS("Quality (%d%%): Clamped to Tx quality.\n", |
4047 | quality); | |
43f66a6c | 4048 | if (quality == rx_quality) |
0edd5b44 JG |
4049 | IPW_DEBUG_STATS("Quality (%d%%): Clamped to Rx quality.\n", |
4050 | quality); | |
43f66a6c | 4051 | if (quality == signal_quality) |
0edd5b44 JG |
4052 | IPW_DEBUG_STATS("Quality (%d%%): Clamped to signal quality.\n", |
4053 | quality); | |
43f66a6c JK |
4054 | |
4055 | priv->quality = quality; | |
bf79451e JG |
4056 | |
4057 | queue_delayed_work(priv->workqueue, &priv->gather_stats, | |
43f66a6c JK |
4058 | IPW_STATS_INTERVAL); |
4059 | } | |
4060 | ||
c848d0af JK |
4061 | static void ipw_bg_gather_stats(void *data) |
4062 | { | |
4063 | struct ipw_priv *priv = data; | |
4644151b | 4064 | mutex_lock(&priv->mutex); |
c848d0af | 4065 | ipw_gather_stats(data); |
4644151b | 4066 | mutex_unlock(&priv->mutex); |
c848d0af JK |
4067 | } |
4068 | ||
e7582561 BC |
4069 | /* Missed beacon behavior: |
4070 | * 1st missed -> roaming_threshold, just wait, don't do any scan/roam. | |
4071 | * roaming_threshold -> disassociate_threshold, scan and roam for better signal. | |
4072 | * Above disassociate threshold, give up and stop scanning. | |
4073 | * Roaming is disabled if disassociate_threshold <= roaming_threshold */ | |
858119e1 | 4074 | static void ipw_handle_missed_beacon(struct ipw_priv *priv, |
ea2b26e0 JK |
4075 | int missed_count) |
4076 | { | |
4077 | priv->notif_missed_beacons = missed_count; | |
4078 | ||
afbf30a2 | 4079 | if (missed_count > priv->disassociate_threshold && |
ea2b26e0 JK |
4080 | priv->status & STATUS_ASSOCIATED) { |
4081 | /* If associated and we've hit the missed | |
4082 | * beacon threshold, disassociate, turn | |
4083 | * off roaming, and abort any active scans */ | |
4084 | IPW_DEBUG(IPW_DL_INFO | IPW_DL_NOTIF | | |
afbf30a2 | 4085 | IPW_DL_STATE | IPW_DL_ASSOC, |
ea2b26e0 JK |
4086 | "Missed beacon: %d - disassociate\n", missed_count); |
4087 | priv->status &= ~STATUS_ROAMING; | |
a613bffd JK |
4088 | if (priv->status & STATUS_SCANNING) { |
4089 | IPW_DEBUG(IPW_DL_INFO | IPW_DL_NOTIF | | |
4090 | IPW_DL_STATE, | |
4091 | "Aborting scan with missed beacon.\n"); | |
ea2b26e0 | 4092 | queue_work(priv->workqueue, &priv->abort_scan); |
a613bffd JK |
4093 | } |
4094 | ||
ea2b26e0 JK |
4095 | queue_work(priv->workqueue, &priv->disassociate); |
4096 | return; | |
4097 | } | |
4098 | ||
4099 | if (priv->status & STATUS_ROAMING) { | |
4100 | /* If we are currently roaming, then just | |
4101 | * print a debug statement... */ | |
4102 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE, | |
4103 | "Missed beacon: %d - roam in progress\n", | |
4104 | missed_count); | |
4105 | return; | |
4106 | } | |
4107 | ||
4bfdb91d ZY |
4108 | if (roaming && |
4109 | (missed_count > priv->roaming_threshold && | |
4110 | missed_count <= priv->disassociate_threshold)) { | |
ea2b26e0 | 4111 | /* If we are not already roaming, set the ROAM |
e7582561 BC |
4112 | * bit in the status and kick off a scan. |
4113 | * This can happen several times before we reach | |
4114 | * disassociate_threshold. */ | |
ea2b26e0 JK |
4115 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE, |
4116 | "Missed beacon: %d - initiate " | |
4117 | "roaming\n", missed_count); | |
4118 | if (!(priv->status & STATUS_ROAMING)) { | |
4119 | priv->status |= STATUS_ROAMING; | |
4120 | if (!(priv->status & STATUS_SCANNING)) | |
4121 | queue_work(priv->workqueue, | |
4122 | &priv->request_scan); | |
4123 | } | |
4124 | return; | |
4125 | } | |
4126 | ||
4127 | if (priv->status & STATUS_SCANNING) { | |
4128 | /* Stop scan to keep fw from getting | |
4129 | * stuck (only if we aren't roaming -- | |
4130 | * otherwise we'll never scan more than 2 or 3 | |
4131 | * channels..) */ | |
b095c381 JK |
4132 | IPW_DEBUG(IPW_DL_INFO | IPW_DL_NOTIF | IPW_DL_STATE, |
4133 | "Aborting scan with missed beacon.\n"); | |
ea2b26e0 JK |
4134 | queue_work(priv->workqueue, &priv->abort_scan); |
4135 | } | |
4136 | ||
4137 | IPW_DEBUG_NOTIF("Missed beacon: %d\n", missed_count); | |
ea2b26e0 JK |
4138 | } |
4139 | ||
43f66a6c JK |
4140 | /** |
4141 | * Handle host notification packet. | |
4142 | * Called from interrupt routine | |
4143 | */ | |
858119e1 | 4144 | static void ipw_rx_notification(struct ipw_priv *priv, |
43f66a6c JK |
4145 | struct ipw_rx_notification *notif) |
4146 | { | |
a613bffd JK |
4147 | notif->size = le16_to_cpu(notif->size); |
4148 | ||
0edd5b44 | 4149 | IPW_DEBUG_NOTIF("type = %i (%d bytes)\n", notif->subtype, notif->size); |
bf79451e | 4150 | |
43f66a6c | 4151 | switch (notif->subtype) { |
0edd5b44 JG |
4152 | case HOST_NOTIFICATION_STATUS_ASSOCIATED:{ |
4153 | struct notif_association *assoc = ¬if->u.assoc; | |
4154 | ||
4155 | switch (assoc->state) { | |
4156 | case CMAS_ASSOCIATED:{ | |
4157 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4158 | IPW_DL_ASSOC, | |
4159 | "associated: '%s' " MAC_FMT | |
4160 | " \n", | |
4161 | escape_essid(priv->essid, | |
4162 | priv->essid_len), | |
4163 | MAC_ARG(priv->bssid)); | |
4164 | ||
4165 | switch (priv->ieee->iw_mode) { | |
4166 | case IW_MODE_INFRA: | |
4167 | memcpy(priv->ieee->bssid, | |
4168 | priv->bssid, ETH_ALEN); | |
4169 | break; | |
4170 | ||
4171 | case IW_MODE_ADHOC: | |
4172 | memcpy(priv->ieee->bssid, | |
4173 | priv->bssid, ETH_ALEN); | |
4174 | ||
4175 | /* clear out the station table */ | |
4176 | priv->num_stations = 0; | |
4177 | ||
4178 | IPW_DEBUG_ASSOC | |
4179 | ("queueing adhoc check\n"); | |
4180 | queue_delayed_work(priv-> | |
4181 | workqueue, | |
4182 | &priv-> | |
4183 | adhoc_check, | |
4184 | priv-> | |
4185 | assoc_request. | |
4186 | beacon_interval); | |
4187 | break; | |
4188 | } | |
4189 | ||
4190 | priv->status &= ~STATUS_ASSOCIATING; | |
4191 | priv->status |= STATUS_ASSOCIATED; | |
d8bad6df ZY |
4192 | queue_work(priv->workqueue, |
4193 | &priv->system_config); | |
0edd5b44 | 4194 | |
b095c381 | 4195 | #ifdef CONFIG_IPW_QOS |
afbf30a2 JK |
4196 | #define IPW_GET_PACKET_STYPE(x) WLAN_FC_GET_STYPE( \ |
4197 | le16_to_cpu(((struct ieee80211_hdr *)(x))->frame_ctl)) | |
4198 | if ((priv->status & STATUS_AUTH) && | |
4199 | (IPW_GET_PACKET_STYPE(¬if->u.raw) | |
4200 | == IEEE80211_STYPE_ASSOC_RESP)) { | |
b095c381 JK |
4201 | if ((sizeof |
4202 | (struct | |
2b184d5b | 4203 | ieee80211_assoc_response) |
b095c381 JK |
4204 | <= notif->size) |
4205 | && (notif->size <= 2314)) { | |
4206 | struct | |
4207 | ieee80211_rx_stats | |
4208 | stats = { | |
4209 | .len = | |
4210 | notif-> | |
4211 | size - 1, | |
4212 | }; | |
4213 | ||
4214 | IPW_DEBUG_QOS | |
4215 | ("QoS Associate " | |
4216 | "size %d\n", | |
4217 | notif->size); | |
4218 | ieee80211_rx_mgt(priv-> | |
4219 | ieee, | |
4220 | (struct | |
2b184d5b | 4221 | ieee80211_hdr_4addr |
b095c381 JK |
4222 | *) |
4223 | ¬if->u.raw, &stats); | |
4224 | } | |
0edd5b44 | 4225 | } |
b095c381 | 4226 | #endif |
0edd5b44 | 4227 | |
a613bffd | 4228 | schedule_work(&priv->link_up); |
43f66a6c | 4229 | |
0edd5b44 JG |
4230 | break; |
4231 | } | |
bf79451e | 4232 | |
0edd5b44 JG |
4233 | case CMAS_AUTHENTICATED:{ |
4234 | if (priv-> | |
4235 | status & (STATUS_ASSOCIATED | | |
4236 | STATUS_AUTH)) { | |
0f52bf90 | 4237 | #ifdef CONFIG_IPW2200_DEBUG |
0edd5b44 JG |
4238 | struct notif_authenticate *auth |
4239 | = ¬if->u.auth; | |
4240 | IPW_DEBUG(IPW_DL_NOTIF | | |
4241 | IPW_DL_STATE | | |
4242 | IPW_DL_ASSOC, | |
4243 | "deauthenticated: '%s' " | |
4244 | MAC_FMT | |
4245 | ": (0x%04X) - %s \n", | |
4246 | escape_essid(priv-> | |
4247 | essid, | |
4248 | priv-> | |
4249 | essid_len), | |
4250 | MAC_ARG(priv->bssid), | |
4251 | ntohs(auth->status), | |
4252 | ipw_get_status_code | |
4253 | (ntohs | |
4254 | (auth->status))); | |
43f66a6c JK |
4255 | #endif |
4256 | ||
0edd5b44 JG |
4257 | priv->status &= |
4258 | ~(STATUS_ASSOCIATING | | |
4259 | STATUS_AUTH | | |
4260 | STATUS_ASSOCIATED); | |
4261 | ||
a613bffd | 4262 | schedule_work(&priv->link_down); |
0edd5b44 JG |
4263 | break; |
4264 | } | |
4265 | ||
4266 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4267 | IPW_DL_ASSOC, | |
4268 | "authenticated: '%s' " MAC_FMT | |
4269 | "\n", | |
4270 | escape_essid(priv->essid, | |
4271 | priv->essid_len), | |
4272 | MAC_ARG(priv->bssid)); | |
4273 | break; | |
4274 | } | |
4275 | ||
4276 | case CMAS_INIT:{ | |
ea2b26e0 JK |
4277 | if (priv->status & STATUS_AUTH) { |
4278 | struct | |
4279 | ieee80211_assoc_response | |
4280 | *resp; | |
4281 | resp = | |
4282 | (struct | |
4283 | ieee80211_assoc_response | |
4284 | *)¬if->u.raw; | |
4285 | IPW_DEBUG(IPW_DL_NOTIF | | |
4286 | IPW_DL_STATE | | |
4287 | IPW_DL_ASSOC, | |
4288 | "association failed (0x%04X): %s\n", | |
4289 | ntohs(resp->status), | |
4290 | ipw_get_status_code | |
4291 | (ntohs | |
4292 | (resp->status))); | |
4293 | } | |
4294 | ||
0edd5b44 JG |
4295 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | |
4296 | IPW_DL_ASSOC, | |
4297 | "disassociated: '%s' " MAC_FMT | |
4298 | " \n", | |
4299 | escape_essid(priv->essid, | |
4300 | priv->essid_len), | |
4301 | MAC_ARG(priv->bssid)); | |
4302 | ||
4303 | priv->status &= | |
4304 | ~(STATUS_DISASSOCIATING | | |
4305 | STATUS_ASSOCIATING | | |
4306 | STATUS_ASSOCIATED | STATUS_AUTH); | |
b095c381 JK |
4307 | if (priv->assoc_network |
4308 | && (priv->assoc_network-> | |
4309 | capability & | |
4310 | WLAN_CAPABILITY_IBSS)) | |
4311 | ipw_remove_current_network | |
4312 | (priv); | |
0edd5b44 | 4313 | |
a613bffd | 4314 | schedule_work(&priv->link_down); |
0edd5b44 | 4315 | |
0edd5b44 JG |
4316 | break; |
4317 | } | |
43f66a6c | 4318 | |
b095c381 JK |
4319 | case CMAS_RX_ASSOC_RESP: |
4320 | break; | |
4321 | ||
0edd5b44 JG |
4322 | default: |
4323 | IPW_ERROR("assoc: unknown (%d)\n", | |
4324 | assoc->state); | |
43f66a6c | 4325 | break; |
bf79451e | 4326 | } |
43f66a6c | 4327 | |
43f66a6c JK |
4328 | break; |
4329 | } | |
bf79451e | 4330 | |
0edd5b44 JG |
4331 | case HOST_NOTIFICATION_STATUS_AUTHENTICATE:{ |
4332 | struct notif_authenticate *auth = ¬if->u.auth; | |
4333 | switch (auth->state) { | |
4334 | case CMAS_AUTHENTICATED: | |
4335 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE, | |
4336 | "authenticated: '%s' " MAC_FMT " \n", | |
4337 | escape_essid(priv->essid, | |
4338 | priv->essid_len), | |
4339 | MAC_ARG(priv->bssid)); | |
4340 | priv->status |= STATUS_AUTH; | |
4341 | break; | |
43f66a6c | 4342 | |
0edd5b44 JG |
4343 | case CMAS_INIT: |
4344 | if (priv->status & STATUS_AUTH) { | |
4345 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4346 | IPW_DL_ASSOC, | |
4347 | "authentication failed (0x%04X): %s\n", | |
4348 | ntohs(auth->status), | |
4349 | ipw_get_status_code(ntohs | |
4350 | (auth-> | |
4351 | status))); | |
4352 | } | |
4353 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4354 | IPW_DL_ASSOC, | |
4355 | "deauthenticated: '%s' " MAC_FMT "\n", | |
4356 | escape_essid(priv->essid, | |
4357 | priv->essid_len), | |
4358 | MAC_ARG(priv->bssid)); | |
bf79451e | 4359 | |
0edd5b44 JG |
4360 | priv->status &= ~(STATUS_ASSOCIATING | |
4361 | STATUS_AUTH | | |
4362 | STATUS_ASSOCIATED); | |
43f66a6c | 4363 | |
a613bffd | 4364 | schedule_work(&priv->link_down); |
0edd5b44 | 4365 | break; |
43f66a6c | 4366 | |
0edd5b44 JG |
4367 | case CMAS_TX_AUTH_SEQ_1: |
4368 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4369 | IPW_DL_ASSOC, "AUTH_SEQ_1\n"); | |
4370 | break; | |
4371 | case CMAS_RX_AUTH_SEQ_2: | |
4372 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4373 | IPW_DL_ASSOC, "AUTH_SEQ_2\n"); | |
4374 | break; | |
4375 | case CMAS_AUTH_SEQ_1_PASS: | |
4376 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4377 | IPW_DL_ASSOC, "AUTH_SEQ_1_PASS\n"); | |
4378 | break; | |
4379 | case CMAS_AUTH_SEQ_1_FAIL: | |
4380 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4381 | IPW_DL_ASSOC, "AUTH_SEQ_1_FAIL\n"); | |
4382 | break; | |
4383 | case CMAS_TX_AUTH_SEQ_3: | |
4384 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4385 | IPW_DL_ASSOC, "AUTH_SEQ_3\n"); | |
4386 | break; | |
4387 | case CMAS_RX_AUTH_SEQ_4: | |
4388 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4389 | IPW_DL_ASSOC, "RX_AUTH_SEQ_4\n"); | |
4390 | break; | |
4391 | case CMAS_AUTH_SEQ_2_PASS: | |
4392 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4393 | IPW_DL_ASSOC, "AUTH_SEQ_2_PASS\n"); | |
4394 | break; | |
4395 | case CMAS_AUTH_SEQ_2_FAIL: | |
4396 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4397 | IPW_DL_ASSOC, "AUT_SEQ_2_FAIL\n"); | |
4398 | break; | |
4399 | case CMAS_TX_ASSOC: | |
4400 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4401 | IPW_DL_ASSOC, "TX_ASSOC\n"); | |
4402 | break; | |
4403 | case CMAS_RX_ASSOC_RESP: | |
4404 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4405 | IPW_DL_ASSOC, "RX_ASSOC_RESP\n"); | |
b095c381 | 4406 | |
0edd5b44 JG |
4407 | break; |
4408 | case CMAS_ASSOCIATED: | |
4409 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | |
4410 | IPW_DL_ASSOC, "ASSOCIATED\n"); | |
4411 | break; | |
4412 | default: | |
4413 | IPW_DEBUG_NOTIF("auth: failure - %d\n", | |
4414 | auth->state); | |
4415 | break; | |
43f66a6c | 4416 | } |
43f66a6c JK |
4417 | break; |
4418 | } | |
4419 | ||
0edd5b44 JG |
4420 | case HOST_NOTIFICATION_STATUS_SCAN_CHANNEL_RESULT:{ |
4421 | struct notif_channel_result *x = | |
4422 | ¬if->u.channel_result; | |
43f66a6c | 4423 | |
0edd5b44 JG |
4424 | if (notif->size == sizeof(*x)) { |
4425 | IPW_DEBUG_SCAN("Scan result for channel %d\n", | |
4426 | x->channel_num); | |
4427 | } else { | |
4428 | IPW_DEBUG_SCAN("Scan result of wrong size %d " | |
4429 | "(should be %zd)\n", | |
4430 | notif->size, sizeof(*x)); | |
bf79451e | 4431 | } |
43f66a6c JK |
4432 | break; |
4433 | } | |
43f66a6c | 4434 | |
0edd5b44 JG |
4435 | case HOST_NOTIFICATION_STATUS_SCAN_COMPLETED:{ |
4436 | struct notif_scan_complete *x = ¬if->u.scan_complete; | |
4437 | if (notif->size == sizeof(*x)) { | |
4438 | IPW_DEBUG_SCAN | |
4439 | ("Scan completed: type %d, %d channels, " | |
4440 | "%d status\n", x->scan_type, | |
4441 | x->num_channels, x->status); | |
4442 | } else { | |
4443 | IPW_ERROR("Scan completed of wrong size %d " | |
4444 | "(should be %zd)\n", | |
4445 | notif->size, sizeof(*x)); | |
4446 | } | |
43f66a6c | 4447 | |
0edd5b44 JG |
4448 | priv->status &= |
4449 | ~(STATUS_SCANNING | STATUS_SCAN_ABORTING); | |
4450 | ||
a0e04ab3 | 4451 | wake_up_interruptible(&priv->wait_state); |
0edd5b44 JG |
4452 | cancel_delayed_work(&priv->scan_check); |
4453 | ||
b095c381 JK |
4454 | if (priv->status & STATUS_EXIT_PENDING) |
4455 | break; | |
4456 | ||
4457 | priv->ieee->scans++; | |
4458 | ||
4459 | #ifdef CONFIG_IPW2200_MONITOR | |
4460 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { | |
afbf30a2 | 4461 | priv->status |= STATUS_SCAN_FORCED; |
b095c381 JK |
4462 | queue_work(priv->workqueue, |
4463 | &priv->request_scan); | |
4464 | break; | |
4465 | } | |
afbf30a2 | 4466 | priv->status &= ~STATUS_SCAN_FORCED; |
b095c381 JK |
4467 | #endif /* CONFIG_IPW2200_MONITOR */ |
4468 | ||
0edd5b44 JG |
4469 | if (!(priv->status & (STATUS_ASSOCIATED | |
4470 | STATUS_ASSOCIATING | | |
4471 | STATUS_ROAMING | | |
4472 | STATUS_DISASSOCIATING))) | |
4473 | queue_work(priv->workqueue, &priv->associate); | |
4474 | else if (priv->status & STATUS_ROAMING) { | |
e7582561 BC |
4475 | if (x->status == SCAN_COMPLETED_STATUS_COMPLETE) |
4476 | /* If a scan completed and we are in roam mode, then | |
4477 | * the scan that completed was the one requested as a | |
4478 | * result of entering roam... so, schedule the | |
4479 | * roam work */ | |
4480 | queue_work(priv->workqueue, | |
4481 | &priv->roam); | |
4482 | else | |
4483 | /* Don't schedule if we aborted the scan */ | |
4484 | priv->status &= ~STATUS_ROAMING; | |
0edd5b44 JG |
4485 | } else if (priv->status & STATUS_SCAN_PENDING) |
4486 | queue_work(priv->workqueue, | |
4487 | &priv->request_scan); | |
a613bffd JK |
4488 | else if (priv->config & CFG_BACKGROUND_SCAN |
4489 | && priv->status & STATUS_ASSOCIATED) | |
4490 | queue_delayed_work(priv->workqueue, | |
4491 | &priv->request_scan, HZ); | |
0edd5b44 | 4492 | break; |
43f66a6c | 4493 | } |
43f66a6c | 4494 | |
0edd5b44 JG |
4495 | case HOST_NOTIFICATION_STATUS_FRAG_LENGTH:{ |
4496 | struct notif_frag_length *x = ¬if->u.frag_len; | |
43f66a6c | 4497 | |
a613bffd JK |
4498 | if (notif->size == sizeof(*x)) |
4499 | IPW_ERROR("Frag length: %d\n", | |
4500 | le16_to_cpu(x->frag_length)); | |
4501 | else | |
0edd5b44 JG |
4502 | IPW_ERROR("Frag length of wrong size %d " |
4503 | "(should be %zd)\n", | |
4504 | notif->size, sizeof(*x)); | |
0edd5b44 | 4505 | break; |
43f66a6c | 4506 | } |
43f66a6c | 4507 | |
0edd5b44 JG |
4508 | case HOST_NOTIFICATION_STATUS_LINK_DETERIORATION:{ |
4509 | struct notif_link_deterioration *x = | |
4510 | ¬if->u.link_deterioration; | |
afbf30a2 | 4511 | |
0edd5b44 JG |
4512 | if (notif->size == sizeof(*x)) { |
4513 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE, | |
12977154 CB |
4514 | "link deterioration: type %d, cnt %d\n", |
4515 | x->silence_notification_type, | |
4516 | x->silence_count); | |
0edd5b44 JG |
4517 | memcpy(&priv->last_link_deterioration, x, |
4518 | sizeof(*x)); | |
4519 | } else { | |
4520 | IPW_ERROR("Link Deterioration of wrong size %d " | |
4521 | "(should be %zd)\n", | |
4522 | notif->size, sizeof(*x)); | |
4523 | } | |
43f66a6c JK |
4524 | break; |
4525 | } | |
4526 | ||
0edd5b44 JG |
4527 | case HOST_NOTIFICATION_DINO_CONFIG_RESPONSE:{ |
4528 | IPW_ERROR("Dino config\n"); | |
4529 | if (priv->hcmd | |
a613bffd | 4530 | && priv->hcmd->cmd != HOST_CMD_DINO_CONFIG) |
0edd5b44 | 4531 | IPW_ERROR("Unexpected DINO_CONFIG_RESPONSE\n"); |
a613bffd | 4532 | |
0edd5b44 JG |
4533 | break; |
4534 | } | |
43f66a6c | 4535 | |
0edd5b44 JG |
4536 | case HOST_NOTIFICATION_STATUS_BEACON_STATE:{ |
4537 | struct notif_beacon_state *x = ¬if->u.beacon_state; | |
4538 | if (notif->size != sizeof(*x)) { | |
4539 | IPW_ERROR | |
4540 | ("Beacon state of wrong size %d (should " | |
4541 | "be %zd)\n", notif->size, sizeof(*x)); | |
4542 | break; | |
43f66a6c JK |
4543 | } |
4544 | ||
a613bffd JK |
4545 | if (le32_to_cpu(x->state) == |
4546 | HOST_NOTIFICATION_STATUS_BEACON_MISSING) | |
4547 | ipw_handle_missed_beacon(priv, | |
4548 | le32_to_cpu(x-> | |
4549 | number)); | |
43f66a6c | 4550 | |
0edd5b44 JG |
4551 | break; |
4552 | } | |
43f66a6c | 4553 | |
0edd5b44 JG |
4554 | case HOST_NOTIFICATION_STATUS_TGI_TX_KEY:{ |
4555 | struct notif_tgi_tx_key *x = ¬if->u.tgi_tx_key; | |
4556 | if (notif->size == sizeof(*x)) { | |
4557 | IPW_ERROR("TGi Tx Key: state 0x%02x sec type " | |
4558 | "0x%02x station %d\n", | |
4559 | x->key_state, x->security_type, | |
4560 | x->station_index); | |
4561 | break; | |
4562 | } | |
43f66a6c | 4563 | |
0edd5b44 JG |
4564 | IPW_ERROR |
4565 | ("TGi Tx Key of wrong size %d (should be %zd)\n", | |
4566 | notif->size, sizeof(*x)); | |
43f66a6c | 4567 | break; |
bf79451e | 4568 | } |
43f66a6c | 4569 | |
0edd5b44 JG |
4570 | case HOST_NOTIFICATION_CALIB_KEEP_RESULTS:{ |
4571 | struct notif_calibration *x = ¬if->u.calibration; | |
43f66a6c | 4572 | |
0edd5b44 JG |
4573 | if (notif->size == sizeof(*x)) { |
4574 | memcpy(&priv->calib, x, sizeof(*x)); | |
4575 | IPW_DEBUG_INFO("TODO: Calibration\n"); | |
4576 | break; | |
4577 | } | |
43f66a6c | 4578 | |
0edd5b44 JG |
4579 | IPW_ERROR |
4580 | ("Calibration of wrong size %d (should be %zd)\n", | |
4581 | notif->size, sizeof(*x)); | |
43f66a6c | 4582 | break; |
bf79451e JG |
4583 | } |
4584 | ||
0edd5b44 JG |
4585 | case HOST_NOTIFICATION_NOISE_STATS:{ |
4586 | if (notif->size == sizeof(u32)) { | |
00d21de5 ZY |
4587 | priv->exp_avg_noise = |
4588 | exponential_average(priv->exp_avg_noise, | |
4589 | (u8) (le32_to_cpu(notif->u.noise.value) & 0xff), | |
4590 | DEPTH_NOISE); | |
0edd5b44 JG |
4591 | break; |
4592 | } | |
43f66a6c | 4593 | |
0edd5b44 JG |
4594 | IPW_ERROR |
4595 | ("Noise stat is wrong size %d (should be %zd)\n", | |
4596 | notif->size, sizeof(u32)); | |
43f66a6c JK |
4597 | break; |
4598 | } | |
4599 | ||
43f66a6c | 4600 | default: |
1dd31b6c ZY |
4601 | IPW_DEBUG_NOTIF("Unknown notification: " |
4602 | "subtype=%d,flags=0x%2x,size=%d\n", | |
4603 | notif->subtype, notif->flags, notif->size); | |
43f66a6c JK |
4604 | } |
4605 | } | |
4606 | ||
4607 | /** | |
4608 | * Destroys all DMA structures and initialise them again | |
bf79451e | 4609 | * |
43f66a6c JK |
4610 | * @param priv |
4611 | * @return error code | |
4612 | */ | |
4613 | static int ipw_queue_reset(struct ipw_priv *priv) | |
4614 | { | |
4615 | int rc = 0; | |
4616 | /** @todo customize queue sizes */ | |
4617 | int nTx = 64, nTxCmd = 8; | |
4618 | ipw_tx_queue_free(priv); | |
4619 | /* Tx CMD queue */ | |
4620 | rc = ipw_queue_tx_init(priv, &priv->txq_cmd, nTxCmd, | |
b095c381 JK |
4621 | IPW_TX_CMD_QUEUE_READ_INDEX, |
4622 | IPW_TX_CMD_QUEUE_WRITE_INDEX, | |
4623 | IPW_TX_CMD_QUEUE_BD_BASE, | |
4624 | IPW_TX_CMD_QUEUE_BD_SIZE); | |
43f66a6c JK |
4625 | if (rc) { |
4626 | IPW_ERROR("Tx Cmd queue init failed\n"); | |
4627 | goto error; | |
4628 | } | |
4629 | /* Tx queue(s) */ | |
4630 | rc = ipw_queue_tx_init(priv, &priv->txq[0], nTx, | |
b095c381 JK |
4631 | IPW_TX_QUEUE_0_READ_INDEX, |
4632 | IPW_TX_QUEUE_0_WRITE_INDEX, | |
4633 | IPW_TX_QUEUE_0_BD_BASE, IPW_TX_QUEUE_0_BD_SIZE); | |
43f66a6c JK |
4634 | if (rc) { |
4635 | IPW_ERROR("Tx 0 queue init failed\n"); | |
4636 | goto error; | |
4637 | } | |
4638 | rc = ipw_queue_tx_init(priv, &priv->txq[1], nTx, | |
b095c381 JK |
4639 | IPW_TX_QUEUE_1_READ_INDEX, |
4640 | IPW_TX_QUEUE_1_WRITE_INDEX, | |
4641 | IPW_TX_QUEUE_1_BD_BASE, IPW_TX_QUEUE_1_BD_SIZE); | |
43f66a6c JK |
4642 | if (rc) { |
4643 | IPW_ERROR("Tx 1 queue init failed\n"); | |
4644 | goto error; | |
4645 | } | |
4646 | rc = ipw_queue_tx_init(priv, &priv->txq[2], nTx, | |
b095c381 JK |
4647 | IPW_TX_QUEUE_2_READ_INDEX, |
4648 | IPW_TX_QUEUE_2_WRITE_INDEX, | |
4649 | IPW_TX_QUEUE_2_BD_BASE, IPW_TX_QUEUE_2_BD_SIZE); | |
43f66a6c JK |
4650 | if (rc) { |
4651 | IPW_ERROR("Tx 2 queue init failed\n"); | |
4652 | goto error; | |
4653 | } | |
4654 | rc = ipw_queue_tx_init(priv, &priv->txq[3], nTx, | |
b095c381 JK |
4655 | IPW_TX_QUEUE_3_READ_INDEX, |
4656 | IPW_TX_QUEUE_3_WRITE_INDEX, | |
4657 | IPW_TX_QUEUE_3_BD_BASE, IPW_TX_QUEUE_3_BD_SIZE); | |
43f66a6c JK |
4658 | if (rc) { |
4659 | IPW_ERROR("Tx 3 queue init failed\n"); | |
4660 | goto error; | |
4661 | } | |
4662 | /* statistics */ | |
4663 | priv->rx_bufs_min = 0; | |
4664 | priv->rx_pend_max = 0; | |
4665 | return rc; | |
4666 | ||
0edd5b44 | 4667 | error: |
43f66a6c JK |
4668 | ipw_tx_queue_free(priv); |
4669 | return rc; | |
4670 | } | |
4671 | ||
4672 | /** | |
4673 | * Reclaim Tx queue entries no more used by NIC. | |
bf79451e | 4674 | * |
43f66a6c JK |
4675 | * When FW adwances 'R' index, all entries between old and |
4676 | * new 'R' index need to be reclaimed. As result, some free space | |
4677 | * forms. If there is enough free space (> low mark), wake Tx queue. | |
bf79451e | 4678 | * |
43f66a6c JK |
4679 | * @note Need to protect against garbage in 'R' index |
4680 | * @param priv | |
4681 | * @param txq | |
4682 | * @param qindex | |
4683 | * @return Number of used entries remains in the queue | |
4684 | */ | |
bf79451e | 4685 | static int ipw_queue_tx_reclaim(struct ipw_priv *priv, |
43f66a6c JK |
4686 | struct clx2_tx_queue *txq, int qindex) |
4687 | { | |
4688 | u32 hw_tail; | |
4689 | int used; | |
4690 | struct clx2_queue *q = &txq->q; | |
4691 | ||
4692 | hw_tail = ipw_read32(priv, q->reg_r); | |
4693 | if (hw_tail >= q->n_bd) { | |
4694 | IPW_ERROR | |
0edd5b44 JG |
4695 | ("Read index for DMA queue (%d) is out of range [0-%d)\n", |
4696 | hw_tail, q->n_bd); | |
43f66a6c JK |
4697 | goto done; |
4698 | } | |
4699 | for (; q->last_used != hw_tail; | |
4700 | q->last_used = ipw_queue_inc_wrap(q->last_used, q->n_bd)) { | |
4701 | ipw_queue_tx_free_tfd(priv, txq); | |
4702 | priv->tx_packets++; | |
4703 | } | |
0edd5b44 | 4704 | done: |
9ddf84f6 JK |
4705 | if ((ipw_queue_space(q) > q->low_mark) && |
4706 | (qindex >= 0) && | |
4707 | (priv->status & STATUS_ASSOCIATED) && netif_running(priv->net_dev)) | |
4708 | netif_wake_queue(priv->net_dev); | |
43f66a6c JK |
4709 | used = q->first_empty - q->last_used; |
4710 | if (used < 0) | |
4711 | used += q->n_bd; | |
4712 | ||
4713 | return used; | |
4714 | } | |
4715 | ||
4716 | static int ipw_queue_tx_hcmd(struct ipw_priv *priv, int hcmd, void *buf, | |
4717 | int len, int sync) | |
4718 | { | |
4719 | struct clx2_tx_queue *txq = &priv->txq_cmd; | |
4720 | struct clx2_queue *q = &txq->q; | |
4721 | struct tfd_frame *tfd; | |
4722 | ||
4723 | if (ipw_queue_space(q) < (sync ? 1 : 2)) { | |
4724 | IPW_ERROR("No space for Tx\n"); | |
4725 | return -EBUSY; | |
4726 | } | |
4727 | ||
4728 | tfd = &txq->bd[q->first_empty]; | |
4729 | txq->txb[q->first_empty] = NULL; | |
4730 | ||
4731 | memset(tfd, 0, sizeof(*tfd)); | |
4732 | tfd->control_flags.message_type = TX_HOST_COMMAND_TYPE; | |
4733 | tfd->control_flags.control_bits = TFD_NEED_IRQ_MASK; | |
4734 | priv->hcmd_seq++; | |
4735 | tfd->u.cmd.index = hcmd; | |
4736 | tfd->u.cmd.length = len; | |
4737 | memcpy(tfd->u.cmd.payload, buf, len); | |
4738 | q->first_empty = ipw_queue_inc_wrap(q->first_empty, q->n_bd); | |
4739 | ipw_write32(priv, q->reg_w, q->first_empty); | |
4740 | _ipw_read32(priv, 0x90); | |
4741 | ||
4742 | return 0; | |
4743 | } | |
4744 | ||
bf79451e | 4745 | /* |
43f66a6c JK |
4746 | * Rx theory of operation |
4747 | * | |
4748 | * The host allocates 32 DMA target addresses and passes the host address | |
b095c381 | 4749 | * to the firmware at register IPW_RFDS_TABLE_LOWER + N * RFD_SIZE where N is |
43f66a6c JK |
4750 | * 0 to 31 |
4751 | * | |
4752 | * Rx Queue Indexes | |
4753 | * The host/firmware share two index registers for managing the Rx buffers. | |
4754 | * | |
bf79451e JG |
4755 | * The READ index maps to the first position that the firmware may be writing |
4756 | * to -- the driver can read up to (but not including) this position and get | |
4757 | * good data. | |
43f66a6c JK |
4758 | * The READ index is managed by the firmware once the card is enabled. |
4759 | * | |
4760 | * The WRITE index maps to the last position the driver has read from -- the | |
4761 | * position preceding WRITE is the last slot the firmware can place a packet. | |
4762 | * | |
4763 | * The queue is empty (no good data) if WRITE = READ - 1, and is full if | |
bf79451e | 4764 | * WRITE = READ. |
43f66a6c | 4765 | * |
bf79451e | 4766 | * During initialization the host sets up the READ queue position to the first |
43f66a6c JK |
4767 | * INDEX position, and WRITE to the last (READ - 1 wrapped) |
4768 | * | |
4769 | * When the firmware places a packet in a buffer it will advance the READ index | |
4770 | * and fire the RX interrupt. The driver can then query the READ index and | |
4771 | * process as many packets as possible, moving the WRITE index forward as it | |
4772 | * resets the Rx queue buffers with new memory. | |
bf79451e | 4773 | * |
43f66a6c | 4774 | * The management in the driver is as follows: |
bf79451e | 4775 | * + A list of pre-allocated SKBs is stored in ipw->rxq->rx_free. When |
43f66a6c | 4776 | * ipw->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled |
bf79451e | 4777 | * to replensish the ipw->rxq->rx_free. |
43f66a6c JK |
4778 | * + In ipw_rx_queue_replenish (scheduled) if 'processed' != 'read' then the |
4779 | * ipw->rxq is replenished and the READ INDEX is updated (updating the | |
4780 | * 'processed' and 'read' driver indexes as well) | |
4781 | * + A received packet is processed and handed to the kernel network stack, | |
4782 | * detached from the ipw->rxq. The driver 'processed' index is updated. | |
4783 | * + The Host/Firmware ipw->rxq is replenished at tasklet time from the rx_free | |
bf79451e JG |
4784 | * list. If there are no allocated buffers in ipw->rxq->rx_free, the READ |
4785 | * INDEX is not incremented and ipw->status(RX_STALLED) is set. If there | |
43f66a6c JK |
4786 | * were enough free buffers and RX_STALLED is set it is cleared. |
4787 | * | |
4788 | * | |
4789 | * Driver sequence: | |
4790 | * | |
bf79451e | 4791 | * ipw_rx_queue_alloc() Allocates rx_free |
43f66a6c JK |
4792 | * ipw_rx_queue_replenish() Replenishes rx_free list from rx_used, and calls |
4793 | * ipw_rx_queue_restock | |
4794 | * ipw_rx_queue_restock() Moves available buffers from rx_free into Rx | |
4795 | * queue, updates firmware pointers, and updates | |
4796 | * the WRITE index. If insufficient rx_free buffers | |
4797 | * are available, schedules ipw_rx_queue_replenish | |
4798 | * | |
4799 | * -- enable interrupts -- | |
4800 | * ISR - ipw_rx() Detach ipw_rx_mem_buffers from pool up to the | |
bf79451e | 4801 | * READ INDEX, detaching the SKB from the pool. |
43f66a6c JK |
4802 | * Moves the packet buffer from queue to rx_used. |
4803 | * Calls ipw_rx_queue_restock to refill any empty | |
4804 | * slots. | |
4805 | * ... | |
4806 | * | |
4807 | */ | |
4808 | ||
bf79451e | 4809 | /* |
43f66a6c JK |
4810 | * If there are slots in the RX queue that need to be restocked, |
4811 | * and we have free pre-allocated buffers, fill the ranks as much | |
4812 | * as we can pulling from rx_free. | |
4813 | * | |
4814 | * This moves the 'write' index forward to catch up with 'processed', and | |
4815 | * also updates the memory address in the firmware to reference the new | |
4816 | * target buffer. | |
4817 | */ | |
4818 | static void ipw_rx_queue_restock(struct ipw_priv *priv) | |
4819 | { | |
4820 | struct ipw_rx_queue *rxq = priv->rxq; | |
4821 | struct list_head *element; | |
4822 | struct ipw_rx_mem_buffer *rxb; | |
4823 | unsigned long flags; | |
4824 | int write; | |
4825 | ||
4826 | spin_lock_irqsave(&rxq->lock, flags); | |
4827 | write = rxq->write; | |
4828 | while ((rxq->write != rxq->processed) && (rxq->free_count)) { | |
4829 | element = rxq->rx_free.next; | |
4830 | rxb = list_entry(element, struct ipw_rx_mem_buffer, list); | |
4831 | list_del(element); | |
4832 | ||
b095c381 | 4833 | ipw_write32(priv, IPW_RFDS_TABLE_LOWER + rxq->write * RFD_SIZE, |
43f66a6c JK |
4834 | rxb->dma_addr); |
4835 | rxq->queue[rxq->write] = rxb; | |
4836 | rxq->write = (rxq->write + 1) % RX_QUEUE_SIZE; | |
4837 | rxq->free_count--; | |
4838 | } | |
4839 | spin_unlock_irqrestore(&rxq->lock, flags); | |
4840 | ||
bf79451e | 4841 | /* If the pre-allocated buffer pool is dropping low, schedule to |
43f66a6c JK |
4842 | * refill it */ |
4843 | if (rxq->free_count <= RX_LOW_WATERMARK) | |
4844 | queue_work(priv->workqueue, &priv->rx_replenish); | |
4845 | ||
4846 | /* If we've added more space for the firmware to place data, tell it */ | |
bf79451e | 4847 | if (write != rxq->write) |
b095c381 | 4848 | ipw_write32(priv, IPW_RX_WRITE_INDEX, rxq->write); |
43f66a6c JK |
4849 | } |
4850 | ||
4851 | /* | |
4852 | * Move all used packet from rx_used to rx_free, allocating a new SKB for each. | |
bf79451e JG |
4853 | * Also restock the Rx queue via ipw_rx_queue_restock. |
4854 | * | |
43f66a6c JK |
4855 | * This is called as a scheduled work item (except for during intialization) |
4856 | */ | |
4857 | static void ipw_rx_queue_replenish(void *data) | |
4858 | { | |
4859 | struct ipw_priv *priv = data; | |
4860 | struct ipw_rx_queue *rxq = priv->rxq; | |
4861 | struct list_head *element; | |
4862 | struct ipw_rx_mem_buffer *rxb; | |
4863 | unsigned long flags; | |
4864 | ||
4865 | spin_lock_irqsave(&rxq->lock, flags); | |
4866 | while (!list_empty(&rxq->rx_used)) { | |
4867 | element = rxq->rx_used.next; | |
4868 | rxb = list_entry(element, struct ipw_rx_mem_buffer, list); | |
b095c381 | 4869 | rxb->skb = alloc_skb(IPW_RX_BUF_SIZE, GFP_ATOMIC); |
43f66a6c JK |
4870 | if (!rxb->skb) { |
4871 | printk(KERN_CRIT "%s: Can not allocate SKB buffers.\n", | |
4872 | priv->net_dev->name); | |
4873 | /* We don't reschedule replenish work here -- we will | |
4874 | * call the restock method and if it still needs | |
4875 | * more buffers it will schedule replenish */ | |
4876 | break; | |
4877 | } | |
4878 | list_del(element); | |
bf79451e | 4879 | |
43f66a6c | 4880 | rxb->rxb = (struct ipw_rx_buffer *)rxb->skb->data; |
0edd5b44 JG |
4881 | rxb->dma_addr = |
4882 | pci_map_single(priv->pci_dev, rxb->skb->data, | |
b095c381 | 4883 | IPW_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
bf79451e | 4884 | |
43f66a6c JK |
4885 | list_add_tail(&rxb->list, &rxq->rx_free); |
4886 | rxq->free_count++; | |
4887 | } | |
4888 | spin_unlock_irqrestore(&rxq->lock, flags); | |
4889 | ||
4890 | ipw_rx_queue_restock(priv); | |
4891 | } | |
4892 | ||
c848d0af JK |
4893 | static void ipw_bg_rx_queue_replenish(void *data) |
4894 | { | |
4895 | struct ipw_priv *priv = data; | |
4644151b | 4896 | mutex_lock(&priv->mutex); |
c848d0af | 4897 | ipw_rx_queue_replenish(data); |
4644151b | 4898 | mutex_unlock(&priv->mutex); |
c848d0af JK |
4899 | } |
4900 | ||
43f66a6c | 4901 | /* Assumes that the skb field of the buffers in 'pool' is kept accurate. |
c7b6a674 | 4902 | * If an SKB has been detached, the POOL needs to have its SKB set to NULL |
bf79451e | 4903 | * This free routine walks the list of POOL entries and if SKB is set to |
43f66a6c JK |
4904 | * non NULL it is unmapped and freed |
4905 | */ | |
0edd5b44 | 4906 | static void ipw_rx_queue_free(struct ipw_priv *priv, struct ipw_rx_queue *rxq) |
43f66a6c JK |
4907 | { |
4908 | int i; | |
4909 | ||
4910 | if (!rxq) | |
4911 | return; | |
bf79451e | 4912 | |
43f66a6c JK |
4913 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { |
4914 | if (rxq->pool[i].skb != NULL) { | |
4915 | pci_unmap_single(priv->pci_dev, rxq->pool[i].dma_addr, | |
b095c381 | 4916 | IPW_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
43f66a6c JK |
4917 | dev_kfree_skb(rxq->pool[i].skb); |
4918 | } | |
4919 | } | |
4920 | ||
4921 | kfree(rxq); | |
4922 | } | |
4923 | ||
4924 | static struct ipw_rx_queue *ipw_rx_queue_alloc(struct ipw_priv *priv) | |
4925 | { | |
4926 | struct ipw_rx_queue *rxq; | |
4927 | int i; | |
4928 | ||
c75f4742 | 4929 | rxq = kzalloc(sizeof(*rxq), GFP_KERNEL); |
ad18b0ea PI |
4930 | if (unlikely(!rxq)) { |
4931 | IPW_ERROR("memory allocation failed\n"); | |
4932 | return NULL; | |
4933 | } | |
43f66a6c JK |
4934 | spin_lock_init(&rxq->lock); |
4935 | INIT_LIST_HEAD(&rxq->rx_free); | |
4936 | INIT_LIST_HEAD(&rxq->rx_used); | |
4937 | ||
4938 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | |
bf79451e | 4939 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) |
43f66a6c JK |
4940 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); |
4941 | ||
4942 | /* Set us so that we have processed and used all buffers, but have | |
4943 | * not restocked the Rx queue with fresh buffers */ | |
4944 | rxq->read = rxq->write = 0; | |
4945 | rxq->processed = RX_QUEUE_SIZE - 1; | |
4946 | rxq->free_count = 0; | |
4947 | ||
4948 | return rxq; | |
4949 | } | |
4950 | ||
4951 | static int ipw_is_rate_in_mask(struct ipw_priv *priv, int ieee_mode, u8 rate) | |
4952 | { | |
4953 | rate &= ~IEEE80211_BASIC_RATE_MASK; | |
4954 | if (ieee_mode == IEEE_A) { | |
4955 | switch (rate) { | |
bf79451e JG |
4956 | case IEEE80211_OFDM_RATE_6MB: |
4957 | return priv->rates_mask & IEEE80211_OFDM_RATE_6MB_MASK ? | |
0edd5b44 | 4958 | 1 : 0; |
bf79451e JG |
4959 | case IEEE80211_OFDM_RATE_9MB: |
4960 | return priv->rates_mask & IEEE80211_OFDM_RATE_9MB_MASK ? | |
0edd5b44 | 4961 | 1 : 0; |
bf79451e | 4962 | case IEEE80211_OFDM_RATE_12MB: |
0edd5b44 JG |
4963 | return priv-> |
4964 | rates_mask & IEEE80211_OFDM_RATE_12MB_MASK ? 1 : 0; | |
bf79451e | 4965 | case IEEE80211_OFDM_RATE_18MB: |
0edd5b44 JG |
4966 | return priv-> |
4967 | rates_mask & IEEE80211_OFDM_RATE_18MB_MASK ? 1 : 0; | |
bf79451e | 4968 | case IEEE80211_OFDM_RATE_24MB: |
0edd5b44 JG |
4969 | return priv-> |
4970 | rates_mask & IEEE80211_OFDM_RATE_24MB_MASK ? 1 : 0; | |
bf79451e | 4971 | case IEEE80211_OFDM_RATE_36MB: |
0edd5b44 JG |
4972 | return priv-> |
4973 | rates_mask & IEEE80211_OFDM_RATE_36MB_MASK ? 1 : 0; | |
bf79451e | 4974 | case IEEE80211_OFDM_RATE_48MB: |
0edd5b44 JG |
4975 | return priv-> |
4976 | rates_mask & IEEE80211_OFDM_RATE_48MB_MASK ? 1 : 0; | |
bf79451e | 4977 | case IEEE80211_OFDM_RATE_54MB: |
0edd5b44 JG |
4978 | return priv-> |
4979 | rates_mask & IEEE80211_OFDM_RATE_54MB_MASK ? 1 : 0; | |
43f66a6c JK |
4980 | default: |
4981 | return 0; | |
4982 | } | |
4983 | } | |
bf79451e | 4984 | |
43f66a6c JK |
4985 | /* B and G mixed */ |
4986 | switch (rate) { | |
bf79451e | 4987 | case IEEE80211_CCK_RATE_1MB: |
43f66a6c | 4988 | return priv->rates_mask & IEEE80211_CCK_RATE_1MB_MASK ? 1 : 0; |
bf79451e | 4989 | case IEEE80211_CCK_RATE_2MB: |
43f66a6c | 4990 | return priv->rates_mask & IEEE80211_CCK_RATE_2MB_MASK ? 1 : 0; |
bf79451e | 4991 | case IEEE80211_CCK_RATE_5MB: |
43f66a6c | 4992 | return priv->rates_mask & IEEE80211_CCK_RATE_5MB_MASK ? 1 : 0; |
bf79451e | 4993 | case IEEE80211_CCK_RATE_11MB: |
43f66a6c JK |
4994 | return priv->rates_mask & IEEE80211_CCK_RATE_11MB_MASK ? 1 : 0; |
4995 | } | |
4996 | ||
4997 | /* If we are limited to B modulations, bail at this point */ | |
4998 | if (ieee_mode == IEEE_B) | |
4999 | return 0; | |
5000 | ||
5001 | /* G */ | |
5002 | switch (rate) { | |
bf79451e | 5003 | case IEEE80211_OFDM_RATE_6MB: |
43f66a6c | 5004 | return priv->rates_mask & IEEE80211_OFDM_RATE_6MB_MASK ? 1 : 0; |
bf79451e | 5005 | case IEEE80211_OFDM_RATE_9MB: |
43f66a6c | 5006 | return priv->rates_mask & IEEE80211_OFDM_RATE_9MB_MASK ? 1 : 0; |
bf79451e | 5007 | case IEEE80211_OFDM_RATE_12MB: |
43f66a6c | 5008 | return priv->rates_mask & IEEE80211_OFDM_RATE_12MB_MASK ? 1 : 0; |
bf79451e | 5009 | case IEEE80211_OFDM_RATE_18MB: |
43f66a6c | 5010 | return priv->rates_mask & IEEE80211_OFDM_RATE_18MB_MASK ? 1 : 0; |
bf79451e | 5011 | case IEEE80211_OFDM_RATE_24MB: |
43f66a6c | 5012 | return priv->rates_mask & IEEE80211_OFDM_RATE_24MB_MASK ? 1 : 0; |
bf79451e | 5013 | case IEEE80211_OFDM_RATE_36MB: |
43f66a6c | 5014 | return priv->rates_mask & IEEE80211_OFDM_RATE_36MB_MASK ? 1 : 0; |
bf79451e | 5015 | case IEEE80211_OFDM_RATE_48MB: |
43f66a6c | 5016 | return priv->rates_mask & IEEE80211_OFDM_RATE_48MB_MASK ? 1 : 0; |
bf79451e | 5017 | case IEEE80211_OFDM_RATE_54MB: |
43f66a6c JK |
5018 | return priv->rates_mask & IEEE80211_OFDM_RATE_54MB_MASK ? 1 : 0; |
5019 | } | |
5020 | ||
5021 | return 0; | |
5022 | } | |
5023 | ||
bf79451e | 5024 | static int ipw_compatible_rates(struct ipw_priv *priv, |
43f66a6c JK |
5025 | const struct ieee80211_network *network, |
5026 | struct ipw_supported_rates *rates) | |
5027 | { | |
5028 | int num_rates, i; | |
5029 | ||
5030 | memset(rates, 0, sizeof(*rates)); | |
0edd5b44 | 5031 | num_rates = min(network->rates_len, (u8) IPW_MAX_RATES); |
43f66a6c JK |
5032 | rates->num_rates = 0; |
5033 | for (i = 0; i < num_rates; i++) { | |
a613bffd JK |
5034 | if (!ipw_is_rate_in_mask(priv, network->mode, |
5035 | network->rates[i])) { | |
5036 | ||
ea2b26e0 | 5037 | if (network->rates[i] & IEEE80211_BASIC_RATE_MASK) { |
a613bffd JK |
5038 | IPW_DEBUG_SCAN("Adding masked mandatory " |
5039 | "rate %02X\n", | |
5040 | network->rates[i]); | |
5041 | rates->supported_rates[rates->num_rates++] = | |
5042 | network->rates[i]; | |
5043 | continue; | |
ea2b26e0 JK |
5044 | } |
5045 | ||
43f66a6c JK |
5046 | IPW_DEBUG_SCAN("Rate %02X masked : 0x%08X\n", |
5047 | network->rates[i], priv->rates_mask); | |
5048 | continue; | |
5049 | } | |
bf79451e | 5050 | |
43f66a6c JK |
5051 | rates->supported_rates[rates->num_rates++] = network->rates[i]; |
5052 | } | |
5053 | ||
a613bffd JK |
5054 | num_rates = min(network->rates_ex_len, |
5055 | (u8) (IPW_MAX_RATES - num_rates)); | |
43f66a6c | 5056 | for (i = 0; i < num_rates; i++) { |
a613bffd JK |
5057 | if (!ipw_is_rate_in_mask(priv, network->mode, |
5058 | network->rates_ex[i])) { | |
ea2b26e0 | 5059 | if (network->rates_ex[i] & IEEE80211_BASIC_RATE_MASK) { |
a613bffd JK |
5060 | IPW_DEBUG_SCAN("Adding masked mandatory " |
5061 | "rate %02X\n", | |
5062 | network->rates_ex[i]); | |
5063 | rates->supported_rates[rates->num_rates++] = | |
5064 | network->rates[i]; | |
5065 | continue; | |
ea2b26e0 JK |
5066 | } |
5067 | ||
43f66a6c JK |
5068 | IPW_DEBUG_SCAN("Rate %02X masked : 0x%08X\n", |
5069 | network->rates_ex[i], priv->rates_mask); | |
5070 | continue; | |
5071 | } | |
bf79451e | 5072 | |
0edd5b44 JG |
5073 | rates->supported_rates[rates->num_rates++] = |
5074 | network->rates_ex[i]; | |
43f66a6c JK |
5075 | } |
5076 | ||
ea2b26e0 | 5077 | return 1; |
43f66a6c JK |
5078 | } |
5079 | ||
858119e1 | 5080 | static void ipw_copy_rates(struct ipw_supported_rates *dest, |
43f66a6c JK |
5081 | const struct ipw_supported_rates *src) |
5082 | { | |
5083 | u8 i; | |
5084 | for (i = 0; i < src->num_rates; i++) | |
5085 | dest->supported_rates[i] = src->supported_rates[i]; | |
5086 | dest->num_rates = src->num_rates; | |
5087 | } | |
5088 | ||
5089 | /* TODO: Look at sniffed packets in the air to determine if the basic rate | |
5090 | * mask should ever be used -- right now all callers to add the scan rates are | |
5091 | * set with the modulation = CCK, so BASIC_RATE_MASK is never set... */ | |
5092 | static void ipw_add_cck_scan_rates(struct ipw_supported_rates *rates, | |
0edd5b44 | 5093 | u8 modulation, u32 rate_mask) |
43f66a6c | 5094 | { |
bf79451e | 5095 | u8 basic_mask = (IEEE80211_OFDM_MODULATION == modulation) ? |
0edd5b44 | 5096 | IEEE80211_BASIC_RATE_MASK : 0; |
bf79451e | 5097 | |
43f66a6c | 5098 | if (rate_mask & IEEE80211_CCK_RATE_1MB_MASK) |
bf79451e | 5099 | rates->supported_rates[rates->num_rates++] = |
0edd5b44 | 5100 | IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB; |
43f66a6c JK |
5101 | |
5102 | if (rate_mask & IEEE80211_CCK_RATE_2MB_MASK) | |
bf79451e | 5103 | rates->supported_rates[rates->num_rates++] = |
0edd5b44 | 5104 | IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB; |
43f66a6c JK |
5105 | |
5106 | if (rate_mask & IEEE80211_CCK_RATE_5MB_MASK) | |
bf79451e | 5107 | rates->supported_rates[rates->num_rates++] = basic_mask | |
0edd5b44 | 5108 | IEEE80211_CCK_RATE_5MB; |
43f66a6c JK |
5109 | |
5110 | if (rate_mask & IEEE80211_CCK_RATE_11MB_MASK) | |
bf79451e | 5111 | rates->supported_rates[rates->num_rates++] = basic_mask | |
0edd5b44 | 5112 | IEEE80211_CCK_RATE_11MB; |
43f66a6c JK |
5113 | } |
5114 | ||
5115 | static void ipw_add_ofdm_scan_rates(struct ipw_supported_rates *rates, | |
0edd5b44 | 5116 | u8 modulation, u32 rate_mask) |
43f66a6c | 5117 | { |
bf79451e | 5118 | u8 basic_mask = (IEEE80211_OFDM_MODULATION == modulation) ? |
0edd5b44 | 5119 | IEEE80211_BASIC_RATE_MASK : 0; |
43f66a6c JK |
5120 | |
5121 | if (rate_mask & IEEE80211_OFDM_RATE_6MB_MASK) | |
bf79451e | 5122 | rates->supported_rates[rates->num_rates++] = basic_mask | |
0edd5b44 | 5123 | IEEE80211_OFDM_RATE_6MB; |
43f66a6c JK |
5124 | |
5125 | if (rate_mask & IEEE80211_OFDM_RATE_9MB_MASK) | |
bf79451e | 5126 | rates->supported_rates[rates->num_rates++] = |
0edd5b44 | 5127 | IEEE80211_OFDM_RATE_9MB; |
43f66a6c JK |
5128 | |
5129 | if (rate_mask & IEEE80211_OFDM_RATE_12MB_MASK) | |
bf79451e | 5130 | rates->supported_rates[rates->num_rates++] = basic_mask | |
0edd5b44 | 5131 | IEEE80211_OFDM_RATE_12MB; |
43f66a6c JK |
5132 | |
5133 | if (rate_mask & IEEE80211_OFDM_RATE_18MB_MASK) | |
bf79451e | 5134 | rates->supported_rates[rates->num_rates++] = |
0edd5b44 | 5135 | IEEE80211_OFDM_RATE_18MB; |
43f66a6c JK |
5136 | |
5137 | if (rate_mask & IEEE80211_OFDM_RATE_24MB_MASK) | |
bf79451e | 5138 | rates->supported_rates[rates->num_rates++] = basic_mask | |
0edd5b44 | 5139 | IEEE80211_OFDM_RATE_24MB; |
43f66a6c JK |
5140 | |
5141 | if (rate_mask & IEEE80211_OFDM_RATE_36MB_MASK) | |
bf79451e | 5142 | rates->supported_rates[rates->num_rates++] = |
0edd5b44 | 5143 | IEEE80211_OFDM_RATE_36MB; |
43f66a6c JK |
5144 | |
5145 | if (rate_mask & IEEE80211_OFDM_RATE_48MB_MASK) | |
bf79451e | 5146 | rates->supported_rates[rates->num_rates++] = |
0edd5b44 | 5147 | IEEE80211_OFDM_RATE_48MB; |
43f66a6c JK |
5148 | |
5149 | if (rate_mask & IEEE80211_OFDM_RATE_54MB_MASK) | |
bf79451e | 5150 | rates->supported_rates[rates->num_rates++] = |
0edd5b44 | 5151 | IEEE80211_OFDM_RATE_54MB; |
43f66a6c JK |
5152 | } |
5153 | ||
5154 | struct ipw_network_match { | |
5155 | struct ieee80211_network *network; | |
5156 | struct ipw_supported_rates rates; | |
5157 | }; | |
5158 | ||
c848d0af JK |
5159 | static int ipw_find_adhoc_network(struct ipw_priv *priv, |
5160 | struct ipw_network_match *match, | |
5161 | struct ieee80211_network *network, | |
5162 | int roaming) | |
43f66a6c JK |
5163 | { |
5164 | struct ipw_supported_rates rates; | |
5165 | ||
5166 | /* Verify that this network's capability is compatible with the | |
5167 | * current mode (AdHoc or Infrastructure) */ | |
c848d0af | 5168 | if ((priv->ieee->iw_mode == IW_MODE_ADHOC && |
43f66a6c | 5169 | !(network->capability & WLAN_CAPABILITY_IBSS))) { |
c848d0af | 5170 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded due to " |
bf79451e | 5171 | "capability mismatch.\n", |
43f66a6c JK |
5172 | escape_essid(network->ssid, network->ssid_len), |
5173 | MAC_ARG(network->bssid)); | |
5174 | return 0; | |
5175 | } | |
5176 | ||
5177 | /* If we do not have an ESSID for this AP, we can not associate with | |
5178 | * it */ | |
5179 | if (network->flags & NETWORK_EMPTY_ESSID) { | |
c848d0af | 5180 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded " |
43f66a6c JK |
5181 | "because of hidden ESSID.\n", |
5182 | escape_essid(network->ssid, network->ssid_len), | |
5183 | MAC_ARG(network->bssid)); | |
5184 | return 0; | |
5185 | } | |
bf79451e | 5186 | |
43f66a6c JK |
5187 | if (unlikely(roaming)) { |
5188 | /* If we are roaming, then ensure check if this is a valid | |
5189 | * network to try and roam to */ | |
5190 | if ((network->ssid_len != match->network->ssid_len) || | |
bf79451e | 5191 | memcmp(network->ssid, match->network->ssid, |
43f66a6c | 5192 | network->ssid_len)) { |
c848d0af | 5193 | IPW_DEBUG_MERGE("Netowrk '%s (" MAC_FMT ")' excluded " |
43f66a6c | 5194 | "because of non-network ESSID.\n", |
bf79451e | 5195 | escape_essid(network->ssid, |
43f66a6c JK |
5196 | network->ssid_len), |
5197 | MAC_ARG(network->bssid)); | |
5198 | return 0; | |
5199 | } | |
5200 | } else { | |
bf79451e JG |
5201 | /* If an ESSID has been configured then compare the broadcast |
5202 | * ESSID to ours */ | |
5203 | if ((priv->config & CFG_STATIC_ESSID) && | |
43f66a6c | 5204 | ((network->ssid_len != priv->essid_len) || |
bf79451e | 5205 | memcmp(network->ssid, priv->essid, |
43f66a6c JK |
5206 | min(network->ssid_len, priv->essid_len)))) { |
5207 | char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; | |
afbf30a2 | 5208 | |
0edd5b44 JG |
5209 | strncpy(escaped, |
5210 | escape_essid(network->ssid, network->ssid_len), | |
43f66a6c | 5211 | sizeof(escaped)); |
c848d0af | 5212 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded " |
bf79451e | 5213 | "because of ESSID mismatch: '%s'.\n", |
43f66a6c | 5214 | escaped, MAC_ARG(network->bssid), |
0edd5b44 JG |
5215 | escape_essid(priv->essid, |
5216 | priv->essid_len)); | |
43f66a6c JK |
5217 | return 0; |
5218 | } | |
5219 | } | |
5220 | ||
5221 | /* If the old network rate is better than this one, don't bother | |
5222 | * testing everything else. */ | |
c848d0af JK |
5223 | |
5224 | if (network->time_stamp[0] < match->network->time_stamp[0]) { | |
afbf30a2 JK |
5225 | IPW_DEBUG_MERGE("Network '%s excluded because newer than " |
5226 | "current network.\n", | |
43f66a6c | 5227 | escape_essid(match->network->ssid, |
afbf30a2 | 5228 | match->network->ssid_len)); |
43f66a6c | 5229 | return 0; |
c848d0af | 5230 | } else if (network->time_stamp[1] < match->network->time_stamp[1]) { |
afbf30a2 JK |
5231 | IPW_DEBUG_MERGE("Network '%s excluded because newer than " |
5232 | "current network.\n", | |
5233 | escape_essid(match->network->ssid, | |
5234 | match->network->ssid_len)); | |
43f66a6c JK |
5235 | return 0; |
5236 | } | |
5237 | ||
5238 | /* Now go through and see if the requested network is valid... */ | |
bf79451e | 5239 | if (priv->ieee->scan_age != 0 && |
c848d0af JK |
5240 | time_after(jiffies, network->last_scanned + priv->ieee->scan_age)) { |
5241 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded " | |
c7b6a674 | 5242 | "because of age: %ums.\n", |
43f66a6c JK |
5243 | escape_essid(network->ssid, network->ssid_len), |
5244 | MAC_ARG(network->bssid), | |
2638bc39 ZY |
5245 | jiffies_to_msecs(jiffies - |
5246 | network->last_scanned)); | |
43f66a6c | 5247 | return 0; |
bf79451e | 5248 | } |
43f66a6c | 5249 | |
bf79451e | 5250 | if ((priv->config & CFG_STATIC_CHANNEL) && |
43f66a6c | 5251 | (network->channel != priv->channel)) { |
c848d0af | 5252 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded " |
43f66a6c JK |
5253 | "because of channel mismatch: %d != %d.\n", |
5254 | escape_essid(network->ssid, network->ssid_len), | |
5255 | MAC_ARG(network->bssid), | |
5256 | network->channel, priv->channel); | |
5257 | return 0; | |
5258 | } | |
bf79451e | 5259 | |
43f66a6c | 5260 | /* Verify privacy compatability */ |
bf79451e | 5261 | if (((priv->capability & CAP_PRIVACY_ON) ? 1 : 0) != |
43f66a6c | 5262 | ((network->capability & WLAN_CAPABILITY_PRIVACY) ? 1 : 0)) { |
c848d0af | 5263 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded " |
43f66a6c JK |
5264 | "because of privacy mismatch: %s != %s.\n", |
5265 | escape_essid(network->ssid, network->ssid_len), | |
5266 | MAC_ARG(network->bssid), | |
afbf30a2 JK |
5267 | priv-> |
5268 | capability & CAP_PRIVACY_ON ? "on" : "off", | |
5269 | network-> | |
5270 | capability & WLAN_CAPABILITY_PRIVACY ? "on" : | |
5271 | "off"); | |
43f66a6c JK |
5272 | return 0; |
5273 | } | |
bf79451e | 5274 | |
c848d0af JK |
5275 | if (!memcmp(network->bssid, priv->bssid, ETH_ALEN)) { |
5276 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded " | |
5277 | "because of the same BSSID match: " MAC_FMT | |
5278 | ".\n", escape_essid(network->ssid, | |
5279 | network->ssid_len), | |
0edd5b44 | 5280 | MAC_ARG(network->bssid), MAC_ARG(priv->bssid)); |
43f66a6c JK |
5281 | return 0; |
5282 | } | |
bf79451e | 5283 | |
43f66a6c JK |
5284 | /* Filter out any incompatible freq / mode combinations */ |
5285 | if (!ieee80211_is_valid_mode(priv->ieee, network->mode)) { | |
c848d0af | 5286 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded " |
43f66a6c JK |
5287 | "because of invalid frequency/mode " |
5288 | "combination.\n", | |
5289 | escape_essid(network->ssid, network->ssid_len), | |
5290 | MAC_ARG(network->bssid)); | |
5291 | return 0; | |
5292 | } | |
bf79451e | 5293 | |
c848d0af JK |
5294 | /* Ensure that the rates supported by the driver are compatible with |
5295 | * this AP, including verification of basic rates (mandatory) */ | |
5296 | if (!ipw_compatible_rates(priv, network, &rates)) { | |
5297 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded " | |
5298 | "because configured rate mask excludes " | |
5299 | "AP mandatory rate.\n", | |
5300 | escape_essid(network->ssid, network->ssid_len), | |
5301 | MAC_ARG(network->bssid)); | |
5302 | return 0; | |
5303 | } | |
5304 | ||
43f66a6c | 5305 | if (rates.num_rates == 0) { |
c848d0af | 5306 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded " |
43f66a6c JK |
5307 | "because of no compatible rates.\n", |
5308 | escape_essid(network->ssid, network->ssid_len), | |
5309 | MAC_ARG(network->bssid)); | |
5310 | return 0; | |
5311 | } | |
bf79451e | 5312 | |
43f66a6c JK |
5313 | /* TODO: Perform any further minimal comparititive tests. We do not |
5314 | * want to put too much policy logic here; intelligent scan selection | |
5315 | * should occur within a generic IEEE 802.11 user space tool. */ | |
5316 | ||
5317 | /* Set up 'new' AP to this network */ | |
5318 | ipw_copy_rates(&match->rates, &rates); | |
5319 | match->network = network; | |
c848d0af | 5320 | IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' is a viable match.\n", |
43f66a6c JK |
5321 | escape_essid(network->ssid, network->ssid_len), |
5322 | MAC_ARG(network->bssid)); | |
5323 | ||
5324 | return 1; | |
5325 | } | |
5326 | ||
c848d0af | 5327 | static void ipw_merge_adhoc_network(void *data) |
43f66a6c | 5328 | { |
c848d0af JK |
5329 | struct ipw_priv *priv = data; |
5330 | struct ieee80211_network *network = NULL; | |
5331 | struct ipw_network_match match = { | |
5332 | .network = priv->assoc_network | |
5333 | }; | |
5334 | ||
afbf30a2 JK |
5335 | if ((priv->status & STATUS_ASSOCIATED) && |
5336 | (priv->ieee->iw_mode == IW_MODE_ADHOC)) { | |
c848d0af JK |
5337 | /* First pass through ROAM process -- look for a better |
5338 | * network */ | |
5339 | unsigned long flags; | |
5340 | ||
5341 | spin_lock_irqsave(&priv->ieee->lock, flags); | |
5342 | list_for_each_entry(network, &priv->ieee->network_list, list) { | |
5343 | if (network != priv->assoc_network) | |
5344 | ipw_find_adhoc_network(priv, &match, network, | |
5345 | 1); | |
5346 | } | |
5347 | spin_unlock_irqrestore(&priv->ieee->lock, flags); | |
5348 | ||
5349 | if (match.network == priv->assoc_network) { | |
5350 | IPW_DEBUG_MERGE("No better ADHOC in this network to " | |
5351 | "merge to.\n"); | |
5352 | return; | |
5353 | } | |
5354 | ||
4644151b | 5355 | mutex_lock(&priv->mutex); |
c848d0af JK |
5356 | if ((priv->ieee->iw_mode == IW_MODE_ADHOC)) { |
5357 | IPW_DEBUG_MERGE("remove network %s\n", | |
5358 | escape_essid(priv->essid, | |
5359 | priv->essid_len)); | |
5360 | ipw_remove_current_network(priv); | |
43f66a6c | 5361 | } |
c848d0af JK |
5362 | |
5363 | ipw_disassociate(priv); | |
5364 | priv->assoc_network = match.network; | |
4644151b | 5365 | mutex_unlock(&priv->mutex); |
c848d0af | 5366 | return; |
43f66a6c | 5367 | } |
c848d0af | 5368 | } |
43f66a6c | 5369 | |
0edd5b44 JG |
5370 | static int ipw_best_network(struct ipw_priv *priv, |
5371 | struct ipw_network_match *match, | |
5372 | struct ieee80211_network *network, int roaming) | |
43f66a6c JK |
5373 | { |
5374 | struct ipw_supported_rates rates; | |
5375 | ||
5376 | /* Verify that this network's capability is compatible with the | |
5377 | * current mode (AdHoc or Infrastructure) */ | |
5378 | if ((priv->ieee->iw_mode == IW_MODE_INFRA && | |
2474385e | 5379 | !(network->capability & WLAN_CAPABILITY_ESS)) || |
43f66a6c JK |
5380 | (priv->ieee->iw_mode == IW_MODE_ADHOC && |
5381 | !(network->capability & WLAN_CAPABILITY_IBSS))) { | |
5382 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded due to " | |
bf79451e | 5383 | "capability mismatch.\n", |
43f66a6c JK |
5384 | escape_essid(network->ssid, network->ssid_len), |
5385 | MAC_ARG(network->bssid)); | |
5386 | return 0; | |
5387 | } | |
5388 | ||
5389 | /* If we do not have an ESSID for this AP, we can not associate with | |
5390 | * it */ | |
5391 | if (network->flags & NETWORK_EMPTY_ESSID) { | |
5392 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | |
5393 | "because of hidden ESSID.\n", | |
5394 | escape_essid(network->ssid, network->ssid_len), | |
5395 | MAC_ARG(network->bssid)); | |
5396 | return 0; | |
5397 | } | |
bf79451e | 5398 | |
43f66a6c JK |
5399 | if (unlikely(roaming)) { |
5400 | /* If we are roaming, then ensure check if this is a valid | |
5401 | * network to try and roam to */ | |
5402 | if ((network->ssid_len != match->network->ssid_len) || | |
bf79451e | 5403 | memcmp(network->ssid, match->network->ssid, |
43f66a6c JK |
5404 | network->ssid_len)) { |
5405 | IPW_DEBUG_ASSOC("Netowrk '%s (" MAC_FMT ")' excluded " | |
5406 | "because of non-network ESSID.\n", | |
bf79451e | 5407 | escape_essid(network->ssid, |
43f66a6c JK |
5408 | network->ssid_len), |
5409 | MAC_ARG(network->bssid)); | |
5410 | return 0; | |
5411 | } | |
5412 | } else { | |
bf79451e JG |
5413 | /* If an ESSID has been configured then compare the broadcast |
5414 | * ESSID to ours */ | |
5415 | if ((priv->config & CFG_STATIC_ESSID) && | |
43f66a6c | 5416 | ((network->ssid_len != priv->essid_len) || |
bf79451e | 5417 | memcmp(network->ssid, priv->essid, |
43f66a6c JK |
5418 | min(network->ssid_len, priv->essid_len)))) { |
5419 | char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; | |
0edd5b44 JG |
5420 | strncpy(escaped, |
5421 | escape_essid(network->ssid, network->ssid_len), | |
43f66a6c JK |
5422 | sizeof(escaped)); |
5423 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | |
bf79451e | 5424 | "because of ESSID mismatch: '%s'.\n", |
43f66a6c | 5425 | escaped, MAC_ARG(network->bssid), |
0edd5b44 JG |
5426 | escape_essid(priv->essid, |
5427 | priv->essid_len)); | |
43f66a6c JK |
5428 | return 0; |
5429 | } | |
5430 | } | |
5431 | ||
5432 | /* If the old network rate is better than this one, don't bother | |
5433 | * testing everything else. */ | |
0edd5b44 | 5434 | if (match->network && match->network->stats.rssi > network->stats.rssi) { |
43f66a6c | 5435 | char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; |
bf79451e JG |
5436 | strncpy(escaped, |
5437 | escape_essid(network->ssid, network->ssid_len), | |
43f66a6c JK |
5438 | sizeof(escaped)); |
5439 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded because " | |
5440 | "'%s (" MAC_FMT ")' has a stronger signal.\n", | |
5441 | escaped, MAC_ARG(network->bssid), | |
5442 | escape_essid(match->network->ssid, | |
5443 | match->network->ssid_len), | |
5444 | MAC_ARG(match->network->bssid)); | |
5445 | return 0; | |
5446 | } | |
bf79451e | 5447 | |
43f66a6c JK |
5448 | /* If this network has already had an association attempt within the |
5449 | * last 3 seconds, do not try and associate again... */ | |
5450 | if (network->last_associate && | |
ea2b26e0 | 5451 | time_after(network->last_associate + (HZ * 3UL), jiffies)) { |
43f66a6c | 5452 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " |
c7b6a674 | 5453 | "because of storming (%ums since last " |
43f66a6c JK |
5454 | "assoc attempt).\n", |
5455 | escape_essid(network->ssid, network->ssid_len), | |
5456 | MAC_ARG(network->bssid), | |
2638bc39 ZY |
5457 | jiffies_to_msecs(jiffies - |
5458 | network->last_associate)); | |
43f66a6c JK |
5459 | return 0; |
5460 | } | |
5461 | ||
5462 | /* Now go through and see if the requested network is valid... */ | |
bf79451e | 5463 | if (priv->ieee->scan_age != 0 && |
ea2b26e0 | 5464 | time_after(jiffies, network->last_scanned + priv->ieee->scan_age)) { |
43f66a6c | 5465 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " |
c7b6a674 | 5466 | "because of age: %ums.\n", |
43f66a6c JK |
5467 | escape_essid(network->ssid, network->ssid_len), |
5468 | MAC_ARG(network->bssid), | |
2638bc39 ZY |
5469 | jiffies_to_msecs(jiffies - |
5470 | network->last_scanned)); | |
43f66a6c | 5471 | return 0; |
bf79451e | 5472 | } |
43f66a6c | 5473 | |
bf79451e | 5474 | if ((priv->config & CFG_STATIC_CHANNEL) && |
43f66a6c JK |
5475 | (network->channel != priv->channel)) { |
5476 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | |
5477 | "because of channel mismatch: %d != %d.\n", | |
5478 | escape_essid(network->ssid, network->ssid_len), | |
5479 | MAC_ARG(network->bssid), | |
5480 | network->channel, priv->channel); | |
5481 | return 0; | |
5482 | } | |
bf79451e | 5483 | |
43f66a6c | 5484 | /* Verify privacy compatability */ |
bf79451e | 5485 | if (((priv->capability & CAP_PRIVACY_ON) ? 1 : 0) != |
43f66a6c JK |
5486 | ((network->capability & WLAN_CAPABILITY_PRIVACY) ? 1 : 0)) { |
5487 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | |
5488 | "because of privacy mismatch: %s != %s.\n", | |
5489 | escape_essid(network->ssid, network->ssid_len), | |
5490 | MAC_ARG(network->bssid), | |
bf79451e | 5491 | priv->capability & CAP_PRIVACY_ON ? "on" : |
43f66a6c | 5492 | "off", |
bf79451e | 5493 | network->capability & |
0edd5b44 | 5494 | WLAN_CAPABILITY_PRIVACY ? "on" : "off"); |
43f66a6c JK |
5495 | return 0; |
5496 | } | |
bf79451e JG |
5497 | |
5498 | if ((priv->config & CFG_STATIC_BSSID) && | |
43f66a6c JK |
5499 | memcmp(network->bssid, priv->bssid, ETH_ALEN)) { |
5500 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | |
5501 | "because of BSSID mismatch: " MAC_FMT ".\n", | |
5502 | escape_essid(network->ssid, network->ssid_len), | |
0edd5b44 | 5503 | MAC_ARG(network->bssid), MAC_ARG(priv->bssid)); |
43f66a6c JK |
5504 | return 0; |
5505 | } | |
bf79451e | 5506 | |
43f66a6c JK |
5507 | /* Filter out any incompatible freq / mode combinations */ |
5508 | if (!ieee80211_is_valid_mode(priv->ieee, network->mode)) { | |
5509 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | |
5510 | "because of invalid frequency/mode " | |
5511 | "combination.\n", | |
5512 | escape_essid(network->ssid, network->ssid_len), | |
5513 | MAC_ARG(network->bssid)); | |
5514 | return 0; | |
5515 | } | |
bf79451e | 5516 | |
1fe0adb4 | 5517 | /* Filter out invalid channel in current GEO */ |
1867b117 | 5518 | if (!ieee80211_is_valid_channel(priv->ieee, network->channel)) { |
1fe0adb4 LH |
5519 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " |
5520 | "because of invalid channel in current GEO\n", | |
5521 | escape_essid(network->ssid, network->ssid_len), | |
5522 | MAC_ARG(network->bssid)); | |
5523 | return 0; | |
5524 | } | |
5525 | ||
ea2b26e0 JK |
5526 | /* Ensure that the rates supported by the driver are compatible with |
5527 | * this AP, including verification of basic rates (mandatory) */ | |
5528 | if (!ipw_compatible_rates(priv, network, &rates)) { | |
5529 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | |
5530 | "because configured rate mask excludes " | |
5531 | "AP mandatory rate.\n", | |
5532 | escape_essid(network->ssid, network->ssid_len), | |
5533 | MAC_ARG(network->bssid)); | |
5534 | return 0; | |
5535 | } | |
5536 | ||
43f66a6c JK |
5537 | if (rates.num_rates == 0) { |
5538 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | |
5539 | "because of no compatible rates.\n", | |
5540 | escape_essid(network->ssid, network->ssid_len), | |
5541 | MAC_ARG(network->bssid)); | |
5542 | return 0; | |
5543 | } | |
bf79451e | 5544 | |
43f66a6c JK |
5545 | /* TODO: Perform any further minimal comparititive tests. We do not |
5546 | * want to put too much policy logic here; intelligent scan selection | |
5547 | * should occur within a generic IEEE 802.11 user space tool. */ | |
5548 | ||
5549 | /* Set up 'new' AP to this network */ | |
5550 | ipw_copy_rates(&match->rates, &rates); | |
5551 | match->network = network; | |
5552 | ||
5553 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' is a viable match.\n", | |
5554 | escape_essid(network->ssid, network->ssid_len), | |
5555 | MAC_ARG(network->bssid)); | |
5556 | ||
5557 | return 1; | |
5558 | } | |
5559 | ||
bf79451e | 5560 | static void ipw_adhoc_create(struct ipw_priv *priv, |
0edd5b44 | 5561 | struct ieee80211_network *network) |
43f66a6c | 5562 | { |
1867b117 | 5563 | const struct ieee80211_geo *geo = ieee80211_get_geo(priv->ieee); |
afbf30a2 JK |
5564 | int i; |
5565 | ||
43f66a6c JK |
5566 | /* |
5567 | * For the purposes of scanning, we can set our wireless mode | |
5568 | * to trigger scans across combinations of bands, but when it | |
5569 | * comes to creating a new ad-hoc network, we have tell the FW | |
5570 | * exactly which band to use. | |
5571 | * | |
bf79451e | 5572 | * We also have the possibility of an invalid channel for the |
43f66a6c JK |
5573 | * chossen band. Attempting to create a new ad-hoc network |
5574 | * with an invalid channel for wireless mode will trigger a | |
5575 | * FW fatal error. | |
afbf30a2 | 5576 | * |
43f66a6c | 5577 | */ |
1867b117 | 5578 | switch (ieee80211_is_valid_channel(priv->ieee, priv->channel)) { |
afbf30a2 JK |
5579 | case IEEE80211_52GHZ_BAND: |
5580 | network->mode = IEEE_A; | |
1867b117 | 5581 | i = ieee80211_channel_to_index(priv->ieee, priv->channel); |
5d9428de | 5582 | BUG_ON(i == -1); |
afbf30a2 JK |
5583 | if (geo->a[i].flags & IEEE80211_CH_PASSIVE_ONLY) { |
5584 | IPW_WARNING("Overriding invalid channel\n"); | |
5585 | priv->channel = geo->a[0].channel; | |
5586 | } | |
5587 | break; | |
5588 | ||
5589 | case IEEE80211_24GHZ_BAND: | |
5590 | if (priv->ieee->mode & IEEE_G) | |
5591 | network->mode = IEEE_G; | |
5592 | else | |
5593 | network->mode = IEEE_B; | |
1867b117 | 5594 | i = ieee80211_channel_to_index(priv->ieee, priv->channel); |
5d9428de | 5595 | BUG_ON(i == -1); |
1fe0adb4 LH |
5596 | if (geo->bg[i].flags & IEEE80211_CH_PASSIVE_ONLY) { |
5597 | IPW_WARNING("Overriding invalid channel\n"); | |
5598 | priv->channel = geo->bg[0].channel; | |
5599 | } | |
afbf30a2 JK |
5600 | break; |
5601 | ||
5602 | default: | |
43f66a6c JK |
5603 | IPW_WARNING("Overriding invalid channel\n"); |
5604 | if (priv->ieee->mode & IEEE_A) { | |
5605 | network->mode = IEEE_A; | |
b095c381 | 5606 | priv->channel = geo->a[0].channel; |
43f66a6c JK |
5607 | } else if (priv->ieee->mode & IEEE_G) { |
5608 | network->mode = IEEE_G; | |
b095c381 | 5609 | priv->channel = geo->bg[0].channel; |
43f66a6c JK |
5610 | } else { |
5611 | network->mode = IEEE_B; | |
b095c381 | 5612 | priv->channel = geo->bg[0].channel; |
43f66a6c | 5613 | } |
afbf30a2 JK |
5614 | break; |
5615 | } | |
43f66a6c JK |
5616 | |
5617 | network->channel = priv->channel; | |
5618 | priv->config |= CFG_ADHOC_PERSIST; | |
5619 | ipw_create_bssid(priv, network->bssid); | |
5620 | network->ssid_len = priv->essid_len; | |
5621 | memcpy(network->ssid, priv->essid, priv->essid_len); | |
5622 | memset(&network->stats, 0, sizeof(network->stats)); | |
5623 | network->capability = WLAN_CAPABILITY_IBSS; | |
ea2b26e0 JK |
5624 | if (!(priv->config & CFG_PREAMBLE_LONG)) |
5625 | network->capability |= WLAN_CAPABILITY_SHORT_PREAMBLE; | |
43f66a6c JK |
5626 | if (priv->capability & CAP_PRIVACY_ON) |
5627 | network->capability |= WLAN_CAPABILITY_PRIVACY; | |
5628 | network->rates_len = min(priv->rates.num_rates, MAX_RATES_LENGTH); | |
0edd5b44 | 5629 | memcpy(network->rates, priv->rates.supported_rates, network->rates_len); |
43f66a6c | 5630 | network->rates_ex_len = priv->rates.num_rates - network->rates_len; |
bf79451e | 5631 | memcpy(network->rates_ex, |
43f66a6c JK |
5632 | &priv->rates.supported_rates[network->rates_len], |
5633 | network->rates_ex_len); | |
5634 | network->last_scanned = 0; | |
5635 | network->flags = 0; | |
5636 | network->last_associate = 0; | |
5637 | network->time_stamp[0] = 0; | |
5638 | network->time_stamp[1] = 0; | |
0edd5b44 JG |
5639 | network->beacon_interval = 100; /* Default */ |
5640 | network->listen_interval = 10; /* Default */ | |
5641 | network->atim_window = 0; /* Default */ | |
43f66a6c JK |
5642 | network->wpa_ie_len = 0; |
5643 | network->rsn_ie_len = 0; | |
43f66a6c JK |
5644 | } |
5645 | ||
b095c381 JK |
5646 | static void ipw_send_tgi_tx_key(struct ipw_priv *priv, int type, int index) |
5647 | { | |
0a7bcf26 | 5648 | struct ipw_tgi_tx_key key; |
b095c381 JK |
5649 | |
5650 | if (!(priv->ieee->sec.flags & (1 << index))) | |
5651 | return; | |
5652 | ||
0a7bcf26 ZY |
5653 | key.key_id = index; |
5654 | memcpy(key.key, priv->ieee->sec.keys[index], SCM_TEMPORAL_KEY_LENGTH); | |
5655 | key.security_type = type; | |
5656 | key.station_index = 0; /* always 0 for BSS */ | |
5657 | key.flags = 0; | |
b095c381 | 5658 | /* 0 for new key; previous value of counter (after fatal error) */ |
0a7bcf26 ZY |
5659 | key.tx_counter[0] = 0; |
5660 | key.tx_counter[1] = 0; | |
b095c381 | 5661 | |
0a7bcf26 | 5662 | ipw_send_cmd_pdu(priv, IPW_CMD_TGI_TX_KEY, sizeof(key), &key); |
b095c381 JK |
5663 | } |
5664 | ||
5665 | static void ipw_send_wep_keys(struct ipw_priv *priv, int type) | |
43f66a6c | 5666 | { |
0a7bcf26 | 5667 | struct ipw_wep_key key; |
43f66a6c | 5668 | int i; |
43f66a6c | 5669 | |
0a7bcf26 ZY |
5670 | key.cmd_id = DINO_CMD_WEP_KEY; |
5671 | key.seq_num = 0; | |
43f66a6c | 5672 | |
b095c381 JK |
5673 | /* Note: AES keys cannot be set for multiple times. |
5674 | * Only set it at the first time. */ | |
bf79451e | 5675 | for (i = 0; i < 4; i++) { |
0a7bcf26 | 5676 | key.key_index = i | type; |
b095c381 | 5677 | if (!(priv->ieee->sec.flags & (1 << i))) { |
0a7bcf26 | 5678 | key.key_size = 0; |
b095c381 | 5679 | continue; |
43f66a6c JK |
5680 | } |
5681 | ||
0a7bcf26 ZY |
5682 | key.key_size = priv->ieee->sec.key_sizes[i]; |
5683 | memcpy(key.key, priv->ieee->sec.keys[i], key.key_size); | |
b095c381 | 5684 | |
0a7bcf26 | 5685 | ipw_send_cmd_pdu(priv, IPW_CMD_WEP_KEY, sizeof(key), &key); |
bf79451e | 5686 | } |
43f66a6c JK |
5687 | } |
5688 | ||
1fbfea54 | 5689 | static void ipw_set_hw_decrypt_unicast(struct ipw_priv *priv, int level) |
43f66a6c | 5690 | { |
1fbfea54 | 5691 | if (priv->ieee->host_encrypt) |
43f66a6c | 5692 | return; |
43f66a6c | 5693 | |
1fbfea54 ZY |
5694 | switch (level) { |
5695 | case SEC_LEVEL_3: | |
5696 | priv->sys_config.disable_unicast_decryption = 0; | |
5697 | priv->ieee->host_decrypt = 0; | |
5698 | break; | |
5699 | case SEC_LEVEL_2: | |
5700 | priv->sys_config.disable_unicast_decryption = 1; | |
5701 | priv->ieee->host_decrypt = 1; | |
5702 | break; | |
5703 | case SEC_LEVEL_1: | |
5704 | priv->sys_config.disable_unicast_decryption = 0; | |
5705 | priv->ieee->host_decrypt = 0; | |
5706 | break; | |
5707 | case SEC_LEVEL_0: | |
5708 | priv->sys_config.disable_unicast_decryption = 1; | |
5709 | break; | |
5710 | default: | |
5711 | break; | |
5712 | } | |
5713 | } | |
5714 | ||
5715 | static void ipw_set_hw_decrypt_multicast(struct ipw_priv *priv, int level) | |
5716 | { | |
5717 | if (priv->ieee->host_encrypt) | |
5718 | return; | |
5719 | ||
5720 | switch (level) { | |
5721 | case SEC_LEVEL_3: | |
5722 | priv->sys_config.disable_multicast_decryption = 0; | |
5723 | break; | |
5724 | case SEC_LEVEL_2: | |
5725 | priv->sys_config.disable_multicast_decryption = 1; | |
5726 | break; | |
5727 | case SEC_LEVEL_1: | |
5728 | priv->sys_config.disable_multicast_decryption = 0; | |
5729 | break; | |
5730 | case SEC_LEVEL_0: | |
5731 | priv->sys_config.disable_multicast_decryption = 1; | |
5732 | break; | |
5733 | default: | |
5734 | break; | |
5735 | } | |
5736 | } | |
5737 | ||
b095c381 JK |
5738 | static void ipw_set_hwcrypto_keys(struct ipw_priv *priv) |
5739 | { | |
5740 | switch (priv->ieee->sec.level) { | |
5741 | case SEC_LEVEL_3: | |
d8bad6df ZY |
5742 | if (priv->ieee->sec.flags & SEC_ACTIVE_KEY) |
5743 | ipw_send_tgi_tx_key(priv, | |
5744 | DCT_FLAG_EXT_SECURITY_CCM, | |
5745 | priv->ieee->sec.active_key); | |
afbf30a2 | 5746 | |
567deaf6 HL |
5747 | if (!priv->ieee->host_mc_decrypt) |
5748 | ipw_send_wep_keys(priv, DCW_WEP_KEY_SEC_TYPE_CCM); | |
b095c381 JK |
5749 | break; |
5750 | case SEC_LEVEL_2: | |
d8bad6df ZY |
5751 | if (priv->ieee->sec.flags & SEC_ACTIVE_KEY) |
5752 | ipw_send_tgi_tx_key(priv, | |
5753 | DCT_FLAG_EXT_SECURITY_TKIP, | |
5754 | priv->ieee->sec.active_key); | |
b095c381 JK |
5755 | break; |
5756 | case SEC_LEVEL_1: | |
5757 | ipw_send_wep_keys(priv, DCW_WEP_KEY_SEC_TYPE_WEP); | |
29cb843e HL |
5758 | ipw_set_hw_decrypt_unicast(priv, priv->ieee->sec.level); |
5759 | ipw_set_hw_decrypt_multicast(priv, priv->ieee->sec.level); | |
b095c381 JK |
5760 | break; |
5761 | case SEC_LEVEL_0: | |
5762 | default: | |
5763 | break; | |
5764 | } | |
5765 | } | |
5766 | ||
43f66a6c JK |
5767 | static void ipw_adhoc_check(void *data) |
5768 | { | |
5769 | struct ipw_priv *priv = data; | |
bf79451e | 5770 | |
afbf30a2 | 5771 | if (priv->missed_adhoc_beacons++ > priv->disassociate_threshold && |
43f66a6c | 5772 | !(priv->config & CFG_ADHOC_PERSIST)) { |
afbf30a2 JK |
5773 | IPW_DEBUG(IPW_DL_INFO | IPW_DL_NOTIF | |
5774 | IPW_DL_STATE | IPW_DL_ASSOC, | |
5775 | "Missed beacon: %d - disassociate\n", | |
5776 | priv->missed_adhoc_beacons); | |
43f66a6c JK |
5777 | ipw_remove_current_network(priv); |
5778 | ipw_disassociate(priv); | |
5779 | return; | |
5780 | } | |
5781 | ||
bf79451e | 5782 | queue_delayed_work(priv->workqueue, &priv->adhoc_check, |
43f66a6c JK |
5783 | priv->assoc_request.beacon_interval); |
5784 | } | |
5785 | ||
c848d0af JK |
5786 | static void ipw_bg_adhoc_check(void *data) |
5787 | { | |
5788 | struct ipw_priv *priv = data; | |
4644151b | 5789 | mutex_lock(&priv->mutex); |
c848d0af | 5790 | ipw_adhoc_check(data); |
4644151b | 5791 | mutex_unlock(&priv->mutex); |
c848d0af JK |
5792 | } |
5793 | ||
0f52bf90 | 5794 | #ifdef CONFIG_IPW2200_DEBUG |
43f66a6c JK |
5795 | static void ipw_debug_config(struct ipw_priv *priv) |
5796 | { | |
5797 | IPW_DEBUG_INFO("Scan completed, no valid APs matched " | |
5798 | "[CFG 0x%08X]\n", priv->config); | |
5799 | if (priv->config & CFG_STATIC_CHANNEL) | |
0edd5b44 | 5800 | IPW_DEBUG_INFO("Channel locked to %d\n", priv->channel); |
43f66a6c JK |
5801 | else |
5802 | IPW_DEBUG_INFO("Channel unlocked.\n"); | |
5803 | if (priv->config & CFG_STATIC_ESSID) | |
bf79451e | 5804 | IPW_DEBUG_INFO("ESSID locked to '%s'\n", |
0edd5b44 | 5805 | escape_essid(priv->essid, priv->essid_len)); |
43f66a6c JK |
5806 | else |
5807 | IPW_DEBUG_INFO("ESSID unlocked.\n"); | |
5808 | if (priv->config & CFG_STATIC_BSSID) | |
ea2b26e0 JK |
5809 | IPW_DEBUG_INFO("BSSID locked to " MAC_FMT "\n", |
5810 | MAC_ARG(priv->bssid)); | |
43f66a6c JK |
5811 | else |
5812 | IPW_DEBUG_INFO("BSSID unlocked.\n"); | |
5813 | if (priv->capability & CAP_PRIVACY_ON) | |
5814 | IPW_DEBUG_INFO("PRIVACY on\n"); | |
5815 | else | |
5816 | IPW_DEBUG_INFO("PRIVACY off\n"); | |
5817 | IPW_DEBUG_INFO("RATE MASK: 0x%08X\n", priv->rates_mask); | |
5818 | } | |
5819 | #else | |
8d45ff7d | 5820 | #define ipw_debug_config(x) do {} while (0) |
43f66a6c JK |
5821 | #endif |
5822 | ||
858119e1 | 5823 | static void ipw_set_fixed_rate(struct ipw_priv *priv, int mode) |
43f66a6c JK |
5824 | { |
5825 | /* TODO: Verify that this works... */ | |
5826 | struct ipw_fixed_rate fr = { | |
5827 | .tx_rates = priv->rates_mask | |
5828 | }; | |
5829 | u32 reg; | |
5830 | u16 mask = 0; | |
5831 | ||
bf79451e | 5832 | /* Identify 'current FW band' and match it with the fixed |
43f66a6c | 5833 | * Tx rates */ |
bf79451e | 5834 | |
43f66a6c | 5835 | switch (priv->ieee->freq_band) { |
0edd5b44 | 5836 | case IEEE80211_52GHZ_BAND: /* A only */ |
43f66a6c JK |
5837 | /* IEEE_A */ |
5838 | if (priv->rates_mask & ~IEEE80211_OFDM_RATES_MASK) { | |
5839 | /* Invalid fixed rate mask */ | |
ea2b26e0 JK |
5840 | IPW_DEBUG_WX |
5841 | ("invalid fixed rate mask in ipw_set_fixed_rate\n"); | |
43f66a6c JK |
5842 | fr.tx_rates = 0; |
5843 | break; | |
5844 | } | |
bf79451e | 5845 | |
43f66a6c JK |
5846 | fr.tx_rates >>= IEEE80211_OFDM_SHIFT_MASK_A; |
5847 | break; | |
5848 | ||
0edd5b44 | 5849 | default: /* 2.4Ghz or Mixed */ |
43f66a6c | 5850 | /* IEEE_B */ |
b095c381 | 5851 | if (mode == IEEE_B) { |
43f66a6c JK |
5852 | if (fr.tx_rates & ~IEEE80211_CCK_RATES_MASK) { |
5853 | /* Invalid fixed rate mask */ | |
ea2b26e0 JK |
5854 | IPW_DEBUG_WX |
5855 | ("invalid fixed rate mask in ipw_set_fixed_rate\n"); | |
43f66a6c JK |
5856 | fr.tx_rates = 0; |
5857 | } | |
5858 | break; | |
bf79451e | 5859 | } |
43f66a6c JK |
5860 | |
5861 | /* IEEE_G */ | |
5862 | if (fr.tx_rates & ~(IEEE80211_CCK_RATES_MASK | | |
5863 | IEEE80211_OFDM_RATES_MASK)) { | |
5864 | /* Invalid fixed rate mask */ | |
ea2b26e0 JK |
5865 | IPW_DEBUG_WX |
5866 | ("invalid fixed rate mask in ipw_set_fixed_rate\n"); | |
43f66a6c JK |
5867 | fr.tx_rates = 0; |
5868 | break; | |
5869 | } | |
bf79451e | 5870 | |
43f66a6c JK |
5871 | if (IEEE80211_OFDM_RATE_6MB_MASK & fr.tx_rates) { |
5872 | mask |= (IEEE80211_OFDM_RATE_6MB_MASK >> 1); | |
5873 | fr.tx_rates &= ~IEEE80211_OFDM_RATE_6MB_MASK; | |
5874 | } | |
bf79451e | 5875 | |
43f66a6c JK |
5876 | if (IEEE80211_OFDM_RATE_9MB_MASK & fr.tx_rates) { |
5877 | mask |= (IEEE80211_OFDM_RATE_9MB_MASK >> 1); | |
5878 | fr.tx_rates &= ~IEEE80211_OFDM_RATE_9MB_MASK; | |
5879 | } | |
bf79451e | 5880 | |
43f66a6c JK |
5881 | if (IEEE80211_OFDM_RATE_12MB_MASK & fr.tx_rates) { |
5882 | mask |= (IEEE80211_OFDM_RATE_12MB_MASK >> 1); | |
5883 | fr.tx_rates &= ~IEEE80211_OFDM_RATE_12MB_MASK; | |
5884 | } | |
bf79451e | 5885 | |
43f66a6c JK |
5886 | fr.tx_rates |= mask; |
5887 | break; | |
5888 | } | |
5889 | ||
5890 | reg = ipw_read32(priv, IPW_MEM_FIXED_OVERRIDE); | |
0edd5b44 | 5891 | ipw_write_reg32(priv, reg, *(u32 *) & fr); |
43f66a6c JK |
5892 | } |
5893 | ||
ea2b26e0 | 5894 | static void ipw_abort_scan(struct ipw_priv *priv) |
43f66a6c JK |
5895 | { |
5896 | int err; | |
5897 | ||
ea2b26e0 JK |
5898 | if (priv->status & STATUS_SCAN_ABORTING) { |
5899 | IPW_DEBUG_HC("Ignoring concurrent scan abort request.\n"); | |
5900 | return; | |
5901 | } | |
5902 | priv->status |= STATUS_SCAN_ABORTING; | |
43f66a6c | 5903 | |
ea2b26e0 JK |
5904 | err = ipw_send_scan_abort(priv); |
5905 | if (err) | |
5906 | IPW_DEBUG_HC("Request to abort scan failed.\n"); | |
5907 | } | |
5908 | ||
afbf30a2 JK |
5909 | static void ipw_add_scan_channels(struct ipw_priv *priv, |
5910 | struct ipw_scan_request_ext *scan, | |
5911 | int scan_type) | |
ea2b26e0 | 5912 | { |
ea2b26e0 | 5913 | int channel_index = 0; |
b095c381 | 5914 | const struct ieee80211_geo *geo; |
afbf30a2 | 5915 | int i; |
b095c381 | 5916 | |
1867b117 | 5917 | geo = ieee80211_get_geo(priv->ieee); |
43f66a6c | 5918 | |
afbf30a2 JK |
5919 | if (priv->ieee->freq_band & IEEE80211_52GHZ_BAND) { |
5920 | int start = channel_index; | |
5921 | for (i = 0; i < geo->a_channels; i++) { | |
5922 | if ((priv->status & STATUS_ASSOCIATED) && | |
5923 | geo->a[i].channel == priv->channel) | |
5924 | continue; | |
5925 | channel_index++; | |
5926 | scan->channels_list[channel_index] = geo->a[i].channel; | |
1fe0adb4 LH |
5927 | ipw_set_scan_type(scan, channel_index, |
5928 | geo->a[i]. | |
5929 | flags & IEEE80211_CH_PASSIVE_ONLY ? | |
5930 | IPW_SCAN_PASSIVE_FULL_DWELL_SCAN : | |
5931 | scan_type); | |
afbf30a2 JK |
5932 | } |
5933 | ||
5934 | if (start != channel_index) { | |
5935 | scan->channels_list[start] = (u8) (IPW_A_MODE << 6) | | |
5936 | (channel_index - start); | |
5937 | channel_index++; | |
5938 | } | |
5939 | } | |
5940 | ||
5941 | if (priv->ieee->freq_band & IEEE80211_24GHZ_BAND) { | |
5942 | int start = channel_index; | |
5943 | if (priv->config & CFG_SPEED_SCAN) { | |
1fe0adb4 | 5944 | int index; |
afbf30a2 JK |
5945 | u8 channels[IEEE80211_24GHZ_CHANNELS] = { |
5946 | /* nop out the list */ | |
5947 | [0] = 0 | |
5948 | }; | |
5949 | ||
5950 | u8 channel; | |
5951 | while (channel_index < IPW_SCAN_CHANNELS) { | |
5952 | channel = | |
5953 | priv->speed_scan[priv->speed_scan_pos]; | |
5954 | if (channel == 0) { | |
5955 | priv->speed_scan_pos = 0; | |
5956 | channel = priv->speed_scan[0]; | |
5957 | } | |
5958 | if ((priv->status & STATUS_ASSOCIATED) && | |
5959 | channel == priv->channel) { | |
5960 | priv->speed_scan_pos++; | |
5961 | continue; | |
5962 | } | |
5963 | ||
5964 | /* If this channel has already been | |
5965 | * added in scan, break from loop | |
5966 | * and this will be the first channel | |
5967 | * in the next scan. | |
5968 | */ | |
5969 | if (channels[channel - 1] != 0) | |
5970 | break; | |
5971 | ||
5972 | channels[channel - 1] = 1; | |
5973 | priv->speed_scan_pos++; | |
5974 | channel_index++; | |
5975 | scan->channels_list[channel_index] = channel; | |
1fe0adb4 | 5976 | index = |
1867b117 | 5977 | ieee80211_channel_to_index(priv->ieee, channel); |
afbf30a2 | 5978 | ipw_set_scan_type(scan, channel_index, |
1fe0adb4 LH |
5979 | geo->bg[index]. |
5980 | flags & | |
5981 | IEEE80211_CH_PASSIVE_ONLY ? | |
5982 | IPW_SCAN_PASSIVE_FULL_DWELL_SCAN | |
5983 | : scan_type); | |
afbf30a2 JK |
5984 | } |
5985 | } else { | |
5986 | for (i = 0; i < geo->bg_channels; i++) { | |
5987 | if ((priv->status & STATUS_ASSOCIATED) && | |
5988 | geo->bg[i].channel == priv->channel) | |
5989 | continue; | |
5990 | channel_index++; | |
5991 | scan->channels_list[channel_index] = | |
5992 | geo->bg[i].channel; | |
5993 | ipw_set_scan_type(scan, channel_index, | |
1fe0adb4 LH |
5994 | geo->bg[i]. |
5995 | flags & | |
5996 | IEEE80211_CH_PASSIVE_ONLY ? | |
5997 | IPW_SCAN_PASSIVE_FULL_DWELL_SCAN | |
5998 | : scan_type); | |
afbf30a2 JK |
5999 | } |
6000 | } | |
6001 | ||
6002 | if (start != channel_index) { | |
6003 | scan->channels_list[start] = (u8) (IPW_B_MODE << 6) | | |
6004 | (channel_index - start); | |
6005 | } | |
6006 | } | |
6007 | } | |
6008 | ||
6009 | static int ipw_request_scan(struct ipw_priv *priv) | |
6010 | { | |
6011 | struct ipw_scan_request_ext scan; | |
6012 | int err = 0, scan_type; | |
6013 | ||
6014 | if (!(priv->status & STATUS_INIT) || | |
6015 | (priv->status & STATUS_EXIT_PENDING)) | |
6016 | return 0; | |
6017 | ||
4644151b | 6018 | mutex_lock(&priv->mutex); |
afbf30a2 | 6019 | |
ea2b26e0 | 6020 | if (priv->status & STATUS_SCANNING) { |
a613bffd | 6021 | IPW_DEBUG_HC("Concurrent scan requested. Ignoring.\n"); |
ea2b26e0 | 6022 | priv->status |= STATUS_SCAN_PENDING; |
b095c381 | 6023 | goto done; |
ea2b26e0 | 6024 | } |
43f66a6c | 6025 | |
afbf30a2 JK |
6026 | if (!(priv->status & STATUS_SCAN_FORCED) && |
6027 | priv->status & STATUS_SCAN_ABORTING) { | |
ea2b26e0 JK |
6028 | IPW_DEBUG_HC("Scan request while abort pending. Queuing.\n"); |
6029 | priv->status |= STATUS_SCAN_PENDING; | |
b095c381 | 6030 | goto done; |
43f66a6c JK |
6031 | } |
6032 | ||
ea2b26e0 JK |
6033 | if (priv->status & STATUS_RF_KILL_MASK) { |
6034 | IPW_DEBUG_HC("Aborting scan due to RF Kill activation\n"); | |
6035 | priv->status |= STATUS_SCAN_PENDING; | |
b095c381 | 6036 | goto done; |
ea2b26e0 | 6037 | } |
43f66a6c | 6038 | |
ea2b26e0 | 6039 | memset(&scan, 0, sizeof(scan)); |
43f66a6c | 6040 | |
b095c381 JK |
6041 | if (priv->config & CFG_SPEED_SCAN) |
6042 | scan.dwell_time[IPW_SCAN_ACTIVE_BROADCAST_SCAN] = | |
6043 | cpu_to_le16(30); | |
6044 | else | |
6045 | scan.dwell_time[IPW_SCAN_ACTIVE_BROADCAST_SCAN] = | |
6046 | cpu_to_le16(20); | |
6047 | ||
a613bffd JK |
6048 | scan.dwell_time[IPW_SCAN_ACTIVE_BROADCAST_AND_DIRECT_SCAN] = |
6049 | cpu_to_le16(20); | |
1fe0adb4 | 6050 | scan.dwell_time[IPW_SCAN_PASSIVE_FULL_DWELL_SCAN] = cpu_to_le16(120); |
43f66a6c | 6051 | |
a613bffd | 6052 | scan.full_scan_index = cpu_to_le32(ieee80211_get_scans(priv->ieee)); |
43f66a6c | 6053 | |
b095c381 | 6054 | #ifdef CONFIG_IPW2200_MONITOR |
ea2b26e0 | 6055 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { |
afbf30a2 | 6056 | u8 channel; |
b095c381 | 6057 | u8 band = 0; |
43f66a6c | 6058 | |
1867b117 | 6059 | switch (ieee80211_is_valid_channel(priv->ieee, priv->channel)) { |
b095c381 | 6060 | case IEEE80211_52GHZ_BAND: |
ea2b26e0 | 6061 | band = (u8) (IPW_A_MODE << 6) | 1; |
b095c381 JK |
6062 | channel = priv->channel; |
6063 | break; | |
ea2b26e0 | 6064 | |
b095c381 | 6065 | case IEEE80211_24GHZ_BAND: |
ea2b26e0 | 6066 | band = (u8) (IPW_B_MODE << 6) | 1; |
b095c381 JK |
6067 | channel = priv->channel; |
6068 | break; | |
ea2b26e0 | 6069 | |
b095c381 | 6070 | default: |
ea2b26e0 JK |
6071 | band = (u8) (IPW_B_MODE << 6) | 1; |
6072 | channel = 9; | |
b095c381 | 6073 | break; |
ea2b26e0 JK |
6074 | } |
6075 | ||
b095c381 JK |
6076 | scan.channels_list[0] = band; |
6077 | scan.channels_list[1] = channel; | |
6078 | ipw_set_scan_type(&scan, 1, IPW_SCAN_PASSIVE_FULL_DWELL_SCAN); | |
ea2b26e0 | 6079 | |
b095c381 JK |
6080 | /* NOTE: The card will sit on this channel for this time |
6081 | * period. Scan aborts are timing sensitive and frequently | |
6082 | * result in firmware restarts. As such, it is best to | |
6083 | * set a small dwell_time here and just keep re-issuing | |
6084 | * scans. Otherwise fast channel hopping will not actually | |
6085 | * hop channels. | |
6086 | * | |
6087 | * TODO: Move SPEED SCAN support to all modes and bands */ | |
a613bffd JK |
6088 | scan.dwell_time[IPW_SCAN_PASSIVE_FULL_DWELL_SCAN] = |
6089 | cpu_to_le16(2000); | |
43f66a6c | 6090 | } else { |
b095c381 JK |
6091 | #endif /* CONFIG_IPW2200_MONITOR */ |
6092 | /* If we are roaming, then make this a directed scan for the | |
6093 | * current network. Otherwise, ensure that every other scan | |
6094 | * is a fast channel hop scan */ | |
6095 | if ((priv->status & STATUS_ROAMING) | |
6096 | || (!(priv->status & STATUS_ASSOCIATED) | |
6097 | && (priv->config & CFG_STATIC_ESSID) | |
6098 | && (le32_to_cpu(scan.full_scan_index) % 2))) { | |
ea2b26e0 JK |
6099 | err = ipw_send_ssid(priv, priv->essid, priv->essid_len); |
6100 | if (err) { | |
b095c381 JK |
6101 | IPW_DEBUG_HC("Attempt to send SSID command " |
6102 | "failed.\n"); | |
6103 | goto done; | |
ea2b26e0 | 6104 | } |
43f66a6c | 6105 | |
ea2b26e0 | 6106 | scan_type = IPW_SCAN_ACTIVE_BROADCAST_AND_DIRECT_SCAN; |
afbf30a2 | 6107 | } else |
ea2b26e0 | 6108 | scan_type = IPW_SCAN_ACTIVE_BROADCAST_SCAN; |
ea2b26e0 | 6109 | |
afbf30a2 | 6110 | ipw_add_scan_channels(priv, &scan, scan_type); |
b095c381 | 6111 | #ifdef CONFIG_IPW2200_MONITOR |
43f66a6c | 6112 | } |
ea2b26e0 | 6113 | #endif |
bf79451e | 6114 | |
ea2b26e0 | 6115 | err = ipw_send_scan_request_ext(priv, &scan); |
43f66a6c | 6116 | if (err) { |
ea2b26e0 | 6117 | IPW_DEBUG_HC("Sending scan command failed: %08X\n", err); |
b095c381 | 6118 | goto done; |
43f66a6c JK |
6119 | } |
6120 | ||
ea2b26e0 JK |
6121 | priv->status |= STATUS_SCANNING; |
6122 | priv->status &= ~STATUS_SCAN_PENDING; | |
afbf30a2 JK |
6123 | queue_delayed_work(priv->workqueue, &priv->scan_check, |
6124 | IPW_SCAN_CHECK_WATCHDOG); | |
b095c381 | 6125 | done: |
4644151b | 6126 | mutex_unlock(&priv->mutex); |
b095c381 | 6127 | return err; |
c848d0af JK |
6128 | } |
6129 | ||
6130 | static void ipw_bg_abort_scan(void *data) | |
6131 | { | |
6132 | struct ipw_priv *priv = data; | |
4644151b | 6133 | mutex_lock(&priv->mutex); |
c848d0af | 6134 | ipw_abort_scan(data); |
4644151b | 6135 | mutex_unlock(&priv->mutex); |
c848d0af JK |
6136 | } |
6137 | ||
ea2b26e0 JK |
6138 | static int ipw_wpa_enable(struct ipw_priv *priv, int value) |
6139 | { | |
b095c381 JK |
6140 | /* This is called when wpa_supplicant loads and closes the driver |
6141 | * interface. */ | |
cdd1fa1e | 6142 | priv->ieee->wpa_enabled = value; |
b095c381 | 6143 | return 0; |
ea2b26e0 JK |
6144 | } |
6145 | ||
ea2b26e0 JK |
6146 | static int ipw_wpa_set_auth_algs(struct ipw_priv *priv, int value) |
6147 | { | |
6148 | struct ieee80211_device *ieee = priv->ieee; | |
6149 | struct ieee80211_security sec = { | |
6150 | .flags = SEC_AUTH_MODE, | |
6151 | }; | |
6152 | int ret = 0; | |
6153 | ||
afbf30a2 | 6154 | if (value & IW_AUTH_ALG_SHARED_KEY) { |
ea2b26e0 JK |
6155 | sec.auth_mode = WLAN_AUTH_SHARED_KEY; |
6156 | ieee->open_wep = 0; | |
afbf30a2 | 6157 | } else if (value & IW_AUTH_ALG_OPEN_SYSTEM) { |
ea2b26e0 JK |
6158 | sec.auth_mode = WLAN_AUTH_OPEN; |
6159 | ieee->open_wep = 1; | |
3e234b4e ZY |
6160 | } else if (value & IW_AUTH_ALG_LEAP) { |
6161 | sec.auth_mode = WLAN_AUTH_LEAP; | |
6162 | ieee->open_wep = 1; | |
afbf30a2 JK |
6163 | } else |
6164 | return -EINVAL; | |
ea2b26e0 JK |
6165 | |
6166 | if (ieee->set_security) | |
6167 | ieee->set_security(ieee->dev, &sec); | |
6168 | else | |
6169 | ret = -EOPNOTSUPP; | |
6170 | ||
6171 | return ret; | |
6172 | } | |
6173 | ||
a73e22b2 AB |
6174 | static void ipw_wpa_assoc_frame(struct ipw_priv *priv, char *wpa_ie, |
6175 | int wpa_ie_len) | |
afbf30a2 JK |
6176 | { |
6177 | /* make sure WPA is enabled */ | |
6178 | ipw_wpa_enable(priv, 1); | |
6179 | ||
6180 | ipw_disassociate(priv); | |
6181 | } | |
6182 | ||
6183 | static int ipw_set_rsn_capa(struct ipw_priv *priv, | |
6184 | char *capabilities, int length) | |
6185 | { | |
afbf30a2 JK |
6186 | IPW_DEBUG_HC("HOST_CMD_RSN_CAPABILITIES\n"); |
6187 | ||
0a7bcf26 | 6188 | return ipw_send_cmd_pdu(priv, IPW_CMD_RSN_CAPABILITIES, length, |
2638bc39 | 6189 | capabilities); |
afbf30a2 JK |
6190 | } |
6191 | ||
b095c381 | 6192 | /* |
afbf30a2 JK |
6193 | * WE-18 support |
6194 | */ | |
6195 | ||
6196 | /* SIOCSIWGENIE */ | |
6197 | static int ipw_wx_set_genie(struct net_device *dev, | |
6198 | struct iw_request_info *info, | |
6199 | union iwreq_data *wrqu, char *extra) | |
ea2b26e0 | 6200 | { |
afbf30a2 JK |
6201 | struct ipw_priv *priv = ieee80211_priv(dev); |
6202 | struct ieee80211_device *ieee = priv->ieee; | |
6203 | u8 *buf; | |
6204 | int err = 0; | |
ea2b26e0 | 6205 | |
afbf30a2 JK |
6206 | if (wrqu->data.length > MAX_WPA_IE_LEN || |
6207 | (wrqu->data.length && extra == NULL)) | |
6208 | return -EINVAL; | |
ea2b26e0 | 6209 | |
4644151b | 6210 | //mutex_lock(&priv->mutex); |
afbf30a2 JK |
6211 | |
6212 | //if (!ieee->wpa_enabled) { | |
6213 | // err = -EOPNOTSUPP; | |
6214 | // goto out; | |
6215 | //} | |
6216 | ||
6217 | if (wrqu->data.length) { | |
6218 | buf = kmalloc(wrqu->data.length, GFP_KERNEL); | |
6219 | if (buf == NULL) { | |
6220 | err = -ENOMEM; | |
6221 | goto out; | |
6222 | } | |
6223 | ||
6224 | memcpy(buf, extra, wrqu->data.length); | |
6225 | kfree(ieee->wpa_ie); | |
6226 | ieee->wpa_ie = buf; | |
6227 | ieee->wpa_ie_len = wrqu->data.length; | |
b095c381 | 6228 | } else { |
afbf30a2 JK |
6229 | kfree(ieee->wpa_ie); |
6230 | ieee->wpa_ie = NULL; | |
6231 | ieee->wpa_ie_len = 0; | |
ea2b26e0 | 6232 | } |
afbf30a2 JK |
6233 | |
6234 | ipw_wpa_assoc_frame(priv, ieee->wpa_ie, ieee->wpa_ie_len); | |
6235 | out: | |
4644151b | 6236 | //mutex_unlock(&priv->mutex); |
afbf30a2 JK |
6237 | return err; |
6238 | } | |
6239 | ||
6240 | /* SIOCGIWGENIE */ | |
6241 | static int ipw_wx_get_genie(struct net_device *dev, | |
6242 | struct iw_request_info *info, | |
6243 | union iwreq_data *wrqu, char *extra) | |
6244 | { | |
6245 | struct ipw_priv *priv = ieee80211_priv(dev); | |
6246 | struct ieee80211_device *ieee = priv->ieee; | |
6247 | int err = 0; | |
6248 | ||
4644151b | 6249 | //mutex_lock(&priv->mutex); |
afbf30a2 JK |
6250 | |
6251 | //if (!ieee->wpa_enabled) { | |
6252 | // err = -EOPNOTSUPP; | |
6253 | // goto out; | |
6254 | //} | |
6255 | ||
6256 | if (ieee->wpa_ie_len == 0 || ieee->wpa_ie == NULL) { | |
6257 | wrqu->data.length = 0; | |
6258 | goto out; | |
6259 | } | |
6260 | ||
6261 | if (wrqu->data.length < ieee->wpa_ie_len) { | |
6262 | err = -E2BIG; | |
6263 | goto out; | |
6264 | } | |
6265 | ||
6266 | wrqu->data.length = ieee->wpa_ie_len; | |
6267 | memcpy(extra, ieee->wpa_ie, ieee->wpa_ie_len); | |
6268 | ||
6269 | out: | |
4644151b | 6270 | //mutex_unlock(&priv->mutex); |
afbf30a2 JK |
6271 | return err; |
6272 | } | |
6273 | ||
1fbfea54 ZY |
6274 | static int wext_cipher2level(int cipher) |
6275 | { | |
6276 | switch (cipher) { | |
6277 | case IW_AUTH_CIPHER_NONE: | |
6278 | return SEC_LEVEL_0; | |
6279 | case IW_AUTH_CIPHER_WEP40: | |
6280 | case IW_AUTH_CIPHER_WEP104: | |
6281 | return SEC_LEVEL_1; | |
6282 | case IW_AUTH_CIPHER_TKIP: | |
6283 | return SEC_LEVEL_2; | |
6284 | case IW_AUTH_CIPHER_CCMP: | |
6285 | return SEC_LEVEL_3; | |
6286 | default: | |
6287 | return -1; | |
6288 | } | |
6289 | } | |
6290 | ||
afbf30a2 JK |
6291 | /* SIOCSIWAUTH */ |
6292 | static int ipw_wx_set_auth(struct net_device *dev, | |
6293 | struct iw_request_info *info, | |
6294 | union iwreq_data *wrqu, char *extra) | |
6295 | { | |
6296 | struct ipw_priv *priv = ieee80211_priv(dev); | |
6297 | struct ieee80211_device *ieee = priv->ieee; | |
6298 | struct iw_param *param = &wrqu->param; | |
6299 | struct ieee80211_crypt_data *crypt; | |
6300 | unsigned long flags; | |
6301 | int ret = 0; | |
6302 | ||
6303 | switch (param->flags & IW_AUTH_INDEX) { | |
6304 | case IW_AUTH_WPA_VERSION: | |
1fbfea54 | 6305 | break; |
afbf30a2 | 6306 | case IW_AUTH_CIPHER_PAIRWISE: |
1fbfea54 ZY |
6307 | ipw_set_hw_decrypt_unicast(priv, |
6308 | wext_cipher2level(param->value)); | |
6309 | break; | |
afbf30a2 | 6310 | case IW_AUTH_CIPHER_GROUP: |
1fbfea54 ZY |
6311 | ipw_set_hw_decrypt_multicast(priv, |
6312 | wext_cipher2level(param->value)); | |
6313 | break; | |
afbf30a2 JK |
6314 | case IW_AUTH_KEY_MGMT: |
6315 | /* | |
6316 | * ipw2200 does not use these parameters | |
6317 | */ | |
6318 | break; | |
6319 | ||
6320 | case IW_AUTH_TKIP_COUNTERMEASURES: | |
6321 | crypt = priv->ieee->crypt[priv->ieee->tx_keyidx]; | |
991d1cc5 | 6322 | if (!crypt || !crypt->ops->set_flags || !crypt->ops->get_flags) |
afbf30a2 | 6323 | break; |
afbf30a2 JK |
6324 | |
6325 | flags = crypt->ops->get_flags(crypt->priv); | |
6326 | ||
6327 | if (param->value) | |
6328 | flags |= IEEE80211_CRYPTO_TKIP_COUNTERMEASURES; | |
6329 | else | |
6330 | flags &= ~IEEE80211_CRYPTO_TKIP_COUNTERMEASURES; | |
6331 | ||
6332 | crypt->ops->set_flags(flags, crypt->priv); | |
6333 | ||
6334 | break; | |
6335 | ||
6336 | case IW_AUTH_DROP_UNENCRYPTED:{ | |
6337 | /* HACK: | |
6338 | * | |
6339 | * wpa_supplicant calls set_wpa_enabled when the driver | |
6340 | * is loaded and unloaded, regardless of if WPA is being | |
6341 | * used. No other calls are made which can be used to | |
6342 | * determine if encryption will be used or not prior to | |
6343 | * association being expected. If encryption is not being | |
6344 | * used, drop_unencrypted is set to false, else true -- we | |
6345 | * can use this to determine if the CAP_PRIVACY_ON bit should | |
6346 | * be set. | |
6347 | */ | |
6348 | struct ieee80211_security sec = { | |
6349 | .flags = SEC_ENABLED, | |
6350 | .enabled = param->value, | |
6351 | }; | |
6352 | priv->ieee->drop_unencrypted = param->value; | |
6353 | /* We only change SEC_LEVEL for open mode. Others | |
6354 | * are set by ipw_wpa_set_encryption. | |
6355 | */ | |
6356 | if (!param->value) { | |
6357 | sec.flags |= SEC_LEVEL; | |
6358 | sec.level = SEC_LEVEL_0; | |
6359 | } else { | |
6360 | sec.flags |= SEC_LEVEL; | |
6361 | sec.level = SEC_LEVEL_1; | |
6362 | } | |
6363 | if (priv->ieee->set_security) | |
6364 | priv->ieee->set_security(priv->ieee->dev, &sec); | |
6365 | break; | |
6366 | } | |
6367 | ||
6368 | case IW_AUTH_80211_AUTH_ALG: | |
6369 | ret = ipw_wpa_set_auth_algs(priv, param->value); | |
6370 | break; | |
6371 | ||
6372 | case IW_AUTH_WPA_ENABLED: | |
6373 | ret = ipw_wpa_enable(priv, param->value); | |
6374 | break; | |
6375 | ||
6376 | case IW_AUTH_RX_UNENCRYPTED_EAPOL: | |
6377 | ieee->ieee802_1x = param->value; | |
6378 | break; | |
6379 | ||
6380 | //case IW_AUTH_ROAMING_CONTROL: | |
6381 | case IW_AUTH_PRIVACY_INVOKED: | |
6382 | ieee->privacy_invoked = param->value; | |
6383 | break; | |
6384 | ||
6385 | default: | |
6386 | return -EOPNOTSUPP; | |
6387 | } | |
6388 | return ret; | |
6389 | } | |
6390 | ||
6391 | /* SIOCGIWAUTH */ | |
6392 | static int ipw_wx_get_auth(struct net_device *dev, | |
6393 | struct iw_request_info *info, | |
6394 | union iwreq_data *wrqu, char *extra) | |
6395 | { | |
6396 | struct ipw_priv *priv = ieee80211_priv(dev); | |
6397 | struct ieee80211_device *ieee = priv->ieee; | |
6398 | struct ieee80211_crypt_data *crypt; | |
6399 | struct iw_param *param = &wrqu->param; | |
6400 | int ret = 0; | |
6401 | ||
6402 | switch (param->flags & IW_AUTH_INDEX) { | |
6403 | case IW_AUTH_WPA_VERSION: | |
6404 | case IW_AUTH_CIPHER_PAIRWISE: | |
6405 | case IW_AUTH_CIPHER_GROUP: | |
6406 | case IW_AUTH_KEY_MGMT: | |
6407 | /* | |
6408 | * wpa_supplicant will control these internally | |
6409 | */ | |
6410 | ret = -EOPNOTSUPP; | |
6411 | break; | |
6412 | ||
6413 | case IW_AUTH_TKIP_COUNTERMEASURES: | |
6414 | crypt = priv->ieee->crypt[priv->ieee->tx_keyidx]; | |
991d1cc5 | 6415 | if (!crypt || !crypt->ops->get_flags) |
afbf30a2 | 6416 | break; |
afbf30a2 JK |
6417 | |
6418 | param->value = (crypt->ops->get_flags(crypt->priv) & | |
6419 | IEEE80211_CRYPTO_TKIP_COUNTERMEASURES) ? 1 : 0; | |
6420 | ||
6421 | break; | |
6422 | ||
6423 | case IW_AUTH_DROP_UNENCRYPTED: | |
6424 | param->value = ieee->drop_unencrypted; | |
6425 | break; | |
6426 | ||
6427 | case IW_AUTH_80211_AUTH_ALG: | |
6428 | param->value = ieee->sec.auth_mode; | |
6429 | break; | |
6430 | ||
6431 | case IW_AUTH_WPA_ENABLED: | |
6432 | param->value = ieee->wpa_enabled; | |
6433 | break; | |
6434 | ||
6435 | case IW_AUTH_RX_UNENCRYPTED_EAPOL: | |
6436 | param->value = ieee->ieee802_1x; | |
6437 | break; | |
6438 | ||
6439 | case IW_AUTH_ROAMING_CONTROL: | |
6440 | case IW_AUTH_PRIVACY_INVOKED: | |
6441 | param->value = ieee->privacy_invoked; | |
6442 | break; | |
6443 | ||
6444 | default: | |
6445 | return -EOPNOTSUPP; | |
6446 | } | |
6447 | return 0; | |
6448 | } | |
6449 | ||
6450 | /* SIOCSIWENCODEEXT */ | |
6451 | static int ipw_wx_set_encodeext(struct net_device *dev, | |
6452 | struct iw_request_info *info, | |
6453 | union iwreq_data *wrqu, char *extra) | |
6454 | { | |
6455 | struct ipw_priv *priv = ieee80211_priv(dev); | |
6456 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; | |
6457 | ||
6458 | if (hwcrypto) { | |
afbf30a2 | 6459 | if (ext->alg == IW_ENCODE_ALG_TKIP) { |
567deaf6 HL |
6460 | /* IPW HW can't build TKIP MIC, |
6461 | host decryption still needed */ | |
6462 | if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) | |
6463 | priv->ieee->host_mc_decrypt = 1; | |
6464 | else { | |
6465 | priv->ieee->host_encrypt = 0; | |
6466 | priv->ieee->host_encrypt_msdu = 1; | |
6467 | priv->ieee->host_decrypt = 1; | |
6468 | } | |
afbf30a2 JK |
6469 | } else { |
6470 | priv->ieee->host_encrypt = 0; | |
6471 | priv->ieee->host_encrypt_msdu = 0; | |
6472 | priv->ieee->host_decrypt = 0; | |
567deaf6 | 6473 | priv->ieee->host_mc_decrypt = 0; |
afbf30a2 JK |
6474 | } |
6475 | } | |
6476 | ||
6477 | return ieee80211_wx_set_encodeext(priv->ieee, info, wrqu, extra); | |
6478 | } | |
6479 | ||
6480 | /* SIOCGIWENCODEEXT */ | |
6481 | static int ipw_wx_get_encodeext(struct net_device *dev, | |
6482 | struct iw_request_info *info, | |
6483 | union iwreq_data *wrqu, char *extra) | |
6484 | { | |
6485 | struct ipw_priv *priv = ieee80211_priv(dev); | |
6486 | return ieee80211_wx_get_encodeext(priv->ieee, info, wrqu, extra); | |
6487 | } | |
6488 | ||
6489 | /* SIOCSIWMLME */ | |
6490 | static int ipw_wx_set_mlme(struct net_device *dev, | |
6491 | struct iw_request_info *info, | |
6492 | union iwreq_data *wrqu, char *extra) | |
6493 | { | |
6494 | struct ipw_priv *priv = ieee80211_priv(dev); | |
6495 | struct iw_mlme *mlme = (struct iw_mlme *)extra; | |
6496 | u16 reason; | |
6497 | ||
6498 | reason = cpu_to_le16(mlme->reason_code); | |
6499 | ||
6500 | switch (mlme->cmd) { | |
6501 | case IW_MLME_DEAUTH: | |
6502 | // silently ignore | |
6503 | break; | |
6504 | ||
6505 | case IW_MLME_DISASSOC: | |
6506 | ipw_disassociate(priv); | |
6507 | break; | |
6508 | ||
6509 | default: | |
6510 | return -EOPNOTSUPP; | |
6511 | } | |
6512 | return 0; | |
6513 | } | |
afbf30a2 JK |
6514 | |
6515 | #ifdef CONFIG_IPW_QOS | |
6516 | ||
6517 | /* QoS */ | |
6518 | /* | |
6519 | * get the modulation type of the current network or | |
6520 | * the card current mode | |
6521 | */ | |
53d0bcf8 | 6522 | static u8 ipw_qos_current_mode(struct ipw_priv * priv) |
afbf30a2 JK |
6523 | { |
6524 | u8 mode = 0; | |
6525 | ||
6526 | if (priv->status & STATUS_ASSOCIATED) { | |
6527 | unsigned long flags; | |
6528 | ||
6529 | spin_lock_irqsave(&priv->ieee->lock, flags); | |
6530 | mode = priv->assoc_network->mode; | |
6531 | spin_unlock_irqrestore(&priv->ieee->lock, flags); | |
6532 | } else { | |
6533 | mode = priv->ieee->mode; | |
6534 | } | |
6535 | IPW_DEBUG_QOS("QoS network/card mode %d \n", mode); | |
6536 | return mode; | |
b095c381 | 6537 | } |
ea2b26e0 | 6538 | |
b095c381 JK |
6539 | /* |
6540 | * Handle management frame beacon and probe response | |
6541 | */ | |
3b9990cb JK |
6542 | static int ipw_qos_handle_probe_response(struct ipw_priv *priv, |
6543 | int active_network, | |
6544 | struct ieee80211_network *network) | |
b095c381 JK |
6545 | { |
6546 | u32 size = sizeof(struct ieee80211_qos_parameters); | |
6547 | ||
afbf30a2 | 6548 | if (network->capability & WLAN_CAPABILITY_IBSS) |
b095c381 JK |
6549 | network->qos_data.active = network->qos_data.supported; |
6550 | ||
6551 | if (network->flags & NETWORK_HAS_QOS_MASK) { | |
afbf30a2 JK |
6552 | if (active_network && |
6553 | (network->flags & NETWORK_HAS_QOS_PARAMETERS)) | |
b095c381 JK |
6554 | network->qos_data.active = network->qos_data.supported; |
6555 | ||
6556 | if ((network->qos_data.active == 1) && (active_network == 1) && | |
6557 | (network->flags & NETWORK_HAS_QOS_PARAMETERS) && | |
6558 | (network->qos_data.old_param_count != | |
6559 | network->qos_data.param_count)) { | |
6560 | network->qos_data.old_param_count = | |
6561 | network->qos_data.param_count; | |
6562 | schedule_work(&priv->qos_activate); | |
afbf30a2 JK |
6563 | IPW_DEBUG_QOS("QoS parameters change call " |
6564 | "qos_activate\n"); | |
b095c381 | 6565 | } |
ea2b26e0 | 6566 | } else { |
afbf30a2 JK |
6567 | if ((priv->ieee->mode == IEEE_B) || (network->mode == IEEE_B)) |
6568 | memcpy(&network->qos_data.parameters, | |
b095c381 | 6569 | &def_parameters_CCK, size); |
afbf30a2 JK |
6570 | else |
6571 | memcpy(&network->qos_data.parameters, | |
b095c381 | 6572 | &def_parameters_OFDM, size); |
afbf30a2 | 6573 | |
b095c381 JK |
6574 | if ((network->qos_data.active == 1) && (active_network == 1)) { |
6575 | IPW_DEBUG_QOS("QoS was disabled call qos_activate \n"); | |
6576 | schedule_work(&priv->qos_activate); | |
6577 | } | |
6578 | ||
6579 | network->qos_data.active = 0; | |
6580 | network->qos_data.supported = 0; | |
ea2b26e0 | 6581 | } |
afbf30a2 JK |
6582 | if ((priv->status & STATUS_ASSOCIATED) && |
6583 | (priv->ieee->iw_mode == IW_MODE_ADHOC) && (active_network == 0)) { | |
6584 | if (memcmp(network->bssid, priv->bssid, ETH_ALEN)) | |
6585 | if ((network->capability & WLAN_CAPABILITY_IBSS) && | |
6586 | !(network->flags & NETWORK_EMPTY_ESSID)) | |
b095c381 | 6587 | if ((network->ssid_len == |
afbf30a2 JK |
6588 | priv->assoc_network->ssid_len) && |
6589 | !memcmp(network->ssid, | |
6590 | priv->assoc_network->ssid, | |
6591 | network->ssid_len)) { | |
b095c381 JK |
6592 | queue_work(priv->workqueue, |
6593 | &priv->merge_networks); | |
6594 | } | |
b095c381 | 6595 | } |
ea2b26e0 | 6596 | |
b095c381 JK |
6597 | return 0; |
6598 | } | |
6599 | ||
6600 | /* | |
6601 | * This function set up the firmware to support QoS. It sends | |
6602 | * IPW_CMD_QOS_PARAMETERS and IPW_CMD_WME_INFO | |
6603 | */ | |
6604 | static int ipw_qos_activate(struct ipw_priv *priv, | |
6605 | struct ieee80211_qos_data *qos_network_data) | |
6606 | { | |
6607 | int err; | |
6608 | struct ieee80211_qos_parameters qos_parameters[QOS_QOS_SETS]; | |
6609 | struct ieee80211_qos_parameters *active_one = NULL; | |
6610 | u32 size = sizeof(struct ieee80211_qos_parameters); | |
6611 | u32 burst_duration; | |
6612 | int i; | |
6613 | u8 type; | |
6614 | ||
6615 | type = ipw_qos_current_mode(priv); | |
6616 | ||
6617 | active_one = &(qos_parameters[QOS_PARAM_SET_DEF_CCK]); | |
6618 | memcpy(active_one, priv->qos_data.def_qos_parm_CCK, size); | |
6619 | active_one = &(qos_parameters[QOS_PARAM_SET_DEF_OFDM]); | |
6620 | memcpy(active_one, priv->qos_data.def_qos_parm_OFDM, size); | |
6621 | ||
6622 | if (qos_network_data == NULL) { | |
6623 | if (type == IEEE_B) { | |
6624 | IPW_DEBUG_QOS("QoS activate network mode %d\n", type); | |
6625 | active_one = &def_parameters_CCK; | |
6626 | } else | |
6627 | active_one = &def_parameters_OFDM; | |
6628 | ||
afbf30a2 | 6629 | memcpy(&qos_parameters[QOS_PARAM_SET_ACTIVE], active_one, size); |
b095c381 JK |
6630 | burst_duration = ipw_qos_get_burst_duration(priv); |
6631 | for (i = 0; i < QOS_QUEUE_NUM; i++) | |
afbf30a2 JK |
6632 | qos_parameters[QOS_PARAM_SET_ACTIVE].tx_op_limit[i] = |
6633 | (u16) burst_duration; | |
6634 | } else if (priv->ieee->iw_mode == IW_MODE_ADHOC) { | |
b095c381 JK |
6635 | if (type == IEEE_B) { |
6636 | IPW_DEBUG_QOS("QoS activate IBSS nework mode %d\n", | |
6637 | type); | |
6638 | if (priv->qos_data.qos_enable == 0) | |
6639 | active_one = &def_parameters_CCK; | |
6640 | else | |
6641 | active_one = priv->qos_data.def_qos_parm_CCK; | |
6642 | } else { | |
6643 | if (priv->qos_data.qos_enable == 0) | |
6644 | active_one = &def_parameters_OFDM; | |
6645 | else | |
6646 | active_one = priv->qos_data.def_qos_parm_OFDM; | |
6647 | } | |
afbf30a2 | 6648 | memcpy(&qos_parameters[QOS_PARAM_SET_ACTIVE], active_one, size); |
b095c381 JK |
6649 | } else { |
6650 | unsigned long flags; | |
6651 | int active; | |
6652 | ||
6653 | spin_lock_irqsave(&priv->ieee->lock, flags); | |
6654 | active_one = &(qos_network_data->parameters); | |
6655 | qos_network_data->old_param_count = | |
6656 | qos_network_data->param_count; | |
afbf30a2 | 6657 | memcpy(&qos_parameters[QOS_PARAM_SET_ACTIVE], active_one, size); |
b095c381 JK |
6658 | active = qos_network_data->supported; |
6659 | spin_unlock_irqrestore(&priv->ieee->lock, flags); | |
6660 | ||
6661 | if (active == 0) { | |
6662 | burst_duration = ipw_qos_get_burst_duration(priv); | |
6663 | for (i = 0; i < QOS_QUEUE_NUM; i++) | |
6664 | qos_parameters[QOS_PARAM_SET_ACTIVE]. | |
6665 | tx_op_limit[i] = (u16) burst_duration; | |
6666 | } | |
6667 | } | |
6668 | ||
6669 | IPW_DEBUG_QOS("QoS sending IPW_CMD_QOS_PARAMETERS\n"); | |
afbf30a2 JK |
6670 | err = ipw_send_qos_params_command(priv, |
6671 | (struct ieee80211_qos_parameters *) | |
6672 | &(qos_parameters[0])); | |
b095c381 JK |
6673 | if (err) |
6674 | IPW_DEBUG_QOS("QoS IPW_CMD_QOS_PARAMETERS failed\n"); | |
6675 | ||
6676 | return err; | |
6677 | } | |
6678 | ||
6679 | /* | |
6680 | * send IPW_CMD_WME_INFO to the firmware | |
6681 | */ | |
6682 | static int ipw_qos_set_info_element(struct ipw_priv *priv) | |
6683 | { | |
6684 | int ret = 0; | |
6685 | struct ieee80211_qos_information_element qos_info; | |
6686 | ||
6687 | if (priv == NULL) | |
6688 | return -1; | |
6689 | ||
6690 | qos_info.elementID = QOS_ELEMENT_ID; | |
6691 | qos_info.length = sizeof(struct ieee80211_qos_information_element) - 2; | |
6692 | ||
6693 | qos_info.version = QOS_VERSION_1; | |
6694 | qos_info.ac_info = 0; | |
6695 | ||
6696 | memcpy(qos_info.qui, qos_oui, QOS_OUI_LEN); | |
6697 | qos_info.qui_type = QOS_OUI_TYPE; | |
6698 | qos_info.qui_subtype = QOS_OUI_INFO_SUB_TYPE; | |
6699 | ||
6700 | ret = ipw_send_qos_info_command(priv, &qos_info); | |
6701 | if (ret != 0) { | |
6702 | IPW_DEBUG_QOS("QoS error calling ipw_send_qos_info_command\n"); | |
6703 | } | |
6704 | return ret; | |
6705 | } | |
6706 | ||
6707 | /* | |
6708 | * Set the QoS parameter with the association request structure | |
6709 | */ | |
6710 | static int ipw_qos_association(struct ipw_priv *priv, | |
6711 | struct ieee80211_network *network) | |
6712 | { | |
6713 | int err = 0; | |
6714 | struct ieee80211_qos_data *qos_data = NULL; | |
6715 | struct ieee80211_qos_data ibss_data = { | |
6716 | .supported = 1, | |
6717 | .active = 1, | |
6718 | }; | |
6719 | ||
6720 | switch (priv->ieee->iw_mode) { | |
6721 | case IW_MODE_ADHOC: | |
5d9428de | 6722 | BUG_ON(!(network->capability & WLAN_CAPABILITY_IBSS)); |
b095c381 JK |
6723 | |
6724 | qos_data = &ibss_data; | |
6725 | break; | |
6726 | ||
6727 | case IW_MODE_INFRA: | |
6728 | qos_data = &network->qos_data; | |
6729 | break; | |
6730 | ||
6731 | default: | |
6732 | BUG(); | |
6733 | break; | |
6734 | } | |
6735 | ||
6736 | err = ipw_qos_activate(priv, qos_data); | |
6737 | if (err) { | |
6738 | priv->assoc_request.policy_support &= ~HC_QOS_SUPPORT_ASSOC; | |
6739 | return err; | |
6740 | } | |
6741 | ||
6742 | if (priv->qos_data.qos_enable && qos_data->supported) { | |
6743 | IPW_DEBUG_QOS("QoS will be enabled for this association\n"); | |
6744 | priv->assoc_request.policy_support |= HC_QOS_SUPPORT_ASSOC; | |
6745 | return ipw_qos_set_info_element(priv); | |
6746 | } | |
6747 | ||
6748 | return 0; | |
6749 | } | |
6750 | ||
6751 | /* | |
6752 | * handling the beaconing responces. if we get different QoS setting | |
6753 | * of the network from the the associated setting adjust the QoS | |
6754 | * setting | |
6755 | */ | |
6756 | static int ipw_qos_association_resp(struct ipw_priv *priv, | |
6757 | struct ieee80211_network *network) | |
6758 | { | |
6759 | int ret = 0; | |
6760 | unsigned long flags; | |
6761 | u32 size = sizeof(struct ieee80211_qos_parameters); | |
6762 | int set_qos_param = 0; | |
6763 | ||
afbf30a2 JK |
6764 | if ((priv == NULL) || (network == NULL) || |
6765 | (priv->assoc_network == NULL)) | |
b095c381 JK |
6766 | return ret; |
6767 | ||
6768 | if (!(priv->status & STATUS_ASSOCIATED)) | |
6769 | return ret; | |
6770 | ||
afbf30a2 | 6771 | if ((priv->ieee->iw_mode != IW_MODE_INFRA)) |
b095c381 | 6772 | return ret; |
b095c381 JK |
6773 | |
6774 | spin_lock_irqsave(&priv->ieee->lock, flags); | |
6775 | if (network->flags & NETWORK_HAS_QOS_PARAMETERS) { | |
afbf30a2 | 6776 | memcpy(&priv->assoc_network->qos_data, &network->qos_data, |
b095c381 JK |
6777 | sizeof(struct ieee80211_qos_data)); |
6778 | priv->assoc_network->qos_data.active = 1; | |
6779 | if ((network->qos_data.old_param_count != | |
6780 | network->qos_data.param_count)) { | |
6781 | set_qos_param = 1; | |
6782 | network->qos_data.old_param_count = | |
6783 | network->qos_data.param_count; | |
6784 | } | |
6785 | ||
6786 | } else { | |
afbf30a2 JK |
6787 | if ((network->mode == IEEE_B) || (priv->ieee->mode == IEEE_B)) |
6788 | memcpy(&priv->assoc_network->qos_data.parameters, | |
b095c381 | 6789 | &def_parameters_CCK, size); |
afbf30a2 JK |
6790 | else |
6791 | memcpy(&priv->assoc_network->qos_data.parameters, | |
b095c381 | 6792 | &def_parameters_OFDM, size); |
b095c381 JK |
6793 | priv->assoc_network->qos_data.active = 0; |
6794 | priv->assoc_network->qos_data.supported = 0; | |
6795 | set_qos_param = 1; | |
6796 | } | |
6797 | ||
6798 | spin_unlock_irqrestore(&priv->ieee->lock, flags); | |
6799 | ||
6800 | if (set_qos_param == 1) | |
6801 | schedule_work(&priv->qos_activate); | |
6802 | ||
6803 | return ret; | |
6804 | } | |
6805 | ||
6806 | static u32 ipw_qos_get_burst_duration(struct ipw_priv *priv) | |
6807 | { | |
6808 | u32 ret = 0; | |
6809 | ||
6810 | if ((priv == NULL)) | |
6811 | return 0; | |
6812 | ||
afbf30a2 | 6813 | if (!(priv->ieee->modulation & IEEE80211_OFDM_MODULATION)) |
b095c381 | 6814 | ret = priv->qos_data.burst_duration_CCK; |
afbf30a2 | 6815 | else |
b095c381 | 6816 | ret = priv->qos_data.burst_duration_OFDM; |
afbf30a2 | 6817 | |
b095c381 JK |
6818 | return ret; |
6819 | } | |
6820 | ||
6821 | /* | |
6822 | * Initialize the setting of QoS global | |
6823 | */ | |
6824 | static void ipw_qos_init(struct ipw_priv *priv, int enable, | |
6825 | int burst_enable, u32 burst_duration_CCK, | |
6826 | u32 burst_duration_OFDM) | |
6827 | { | |
6828 | priv->qos_data.qos_enable = enable; | |
6829 | ||
6830 | if (priv->qos_data.qos_enable) { | |
6831 | priv->qos_data.def_qos_parm_CCK = &def_qos_parameters_CCK; | |
6832 | priv->qos_data.def_qos_parm_OFDM = &def_qos_parameters_OFDM; | |
6833 | IPW_DEBUG_QOS("QoS is enabled\n"); | |
6834 | } else { | |
6835 | priv->qos_data.def_qos_parm_CCK = &def_parameters_CCK; | |
6836 | priv->qos_data.def_qos_parm_OFDM = &def_parameters_OFDM; | |
6837 | IPW_DEBUG_QOS("QoS is not enabled\n"); | |
6838 | } | |
6839 | ||
6840 | priv->qos_data.burst_enable = burst_enable; | |
6841 | ||
6842 | if (burst_enable) { | |
6843 | priv->qos_data.burst_duration_CCK = burst_duration_CCK; | |
6844 | priv->qos_data.burst_duration_OFDM = burst_duration_OFDM; | |
6845 | } else { | |
6846 | priv->qos_data.burst_duration_CCK = 0; | |
6847 | priv->qos_data.burst_duration_OFDM = 0; | |
6848 | } | |
6849 | } | |
6850 | ||
6851 | /* | |
6852 | * map the packet priority to the right TX Queue | |
6853 | */ | |
6854 | static int ipw_get_tx_queue_number(struct ipw_priv *priv, u16 priority) | |
6855 | { | |
6856 | if (priority > 7 || !priv->qos_data.qos_enable) | |
6857 | priority = 0; | |
6858 | ||
6859 | return from_priority_to_tx_queue[priority] - 1; | |
6860 | } | |
6861 | ||
6862 | /* | |
6863 | * add QoS parameter to the TX command | |
6864 | */ | |
6865 | static int ipw_qos_set_tx_queue_command(struct ipw_priv *priv, | |
6866 | u16 priority, | |
6867 | struct tfd_data *tfd, u8 unicast) | |
6868 | { | |
6869 | int ret = 0; | |
6870 | int tx_queue_id = 0; | |
6871 | struct ieee80211_qos_data *qos_data = NULL; | |
6872 | int active, supported; | |
6873 | unsigned long flags; | |
6874 | ||
6875 | if (!(priv->status & STATUS_ASSOCIATED)) | |
6876 | return 0; | |
6877 | ||
6878 | qos_data = &priv->assoc_network->qos_data; | |
6879 | ||
6880 | spin_lock_irqsave(&priv->ieee->lock, flags); | |
6881 | ||
6882 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) { | |
6883 | if (unicast == 0) | |
6884 | qos_data->active = 0; | |
6885 | else | |
6886 | qos_data->active = qos_data->supported; | |
6887 | } | |
6888 | ||
6889 | active = qos_data->active; | |
6890 | supported = qos_data->supported; | |
6891 | ||
6892 | spin_unlock_irqrestore(&priv->ieee->lock, flags); | |
6893 | ||
afbf30a2 JK |
6894 | IPW_DEBUG_QOS("QoS %d network is QoS active %d supported %d " |
6895 | "unicast %d\n", | |
6896 | priv->qos_data.qos_enable, active, supported, unicast); | |
b095c381 JK |
6897 | if (active && priv->qos_data.qos_enable) { |
6898 | ret = from_priority_to_tx_queue[priority]; | |
6899 | tx_queue_id = ret - 1; | |
6900 | IPW_DEBUG_QOS("QoS packet priority is %d \n", priority); | |
6901 | if (priority <= 7) { | |
6902 | tfd->tx_flags_ext |= DCT_FLAG_EXT_QOS_ENABLED; | |
6903 | tfd->tfd.tfd_26.mchdr.qos_ctrl = priority; | |
6904 | tfd->tfd.tfd_26.mchdr.frame_ctl |= | |
6905 | IEEE80211_STYPE_QOS_DATA; | |
6906 | ||
6907 | if (priv->qos_data.qos_no_ack_mask & | |
6908 | (1UL << tx_queue_id)) { | |
6909 | tfd->tx_flags &= ~DCT_FLAG_ACK_REQD; | |
6910 | tfd->tfd.tfd_26.mchdr.qos_ctrl |= | |
6911 | CTRL_QOS_NO_ACK; | |
6912 | } | |
6913 | } | |
6914 | } | |
6915 | ||
6916 | return ret; | |
6917 | } | |
6918 | ||
6919 | /* | |
6920 | * background support to run QoS activate functionality | |
6921 | */ | |
6922 | static void ipw_bg_qos_activate(void *data) | |
6923 | { | |
6924 | struct ipw_priv *priv = data; | |
6925 | ||
6926 | if (priv == NULL) | |
6927 | return; | |
6928 | ||
4644151b | 6929 | mutex_lock(&priv->mutex); |
b095c381 JK |
6930 | |
6931 | if (priv->status & STATUS_ASSOCIATED) | |
6932 | ipw_qos_activate(priv, &(priv->assoc_network->qos_data)); | |
6933 | ||
4644151b | 6934 | mutex_unlock(&priv->mutex); |
b095c381 JK |
6935 | } |
6936 | ||
3b9990cb JK |
6937 | static int ipw_handle_probe_response(struct net_device *dev, |
6938 | struct ieee80211_probe_response *resp, | |
6939 | struct ieee80211_network *network) | |
b095c381 JK |
6940 | { |
6941 | struct ipw_priv *priv = ieee80211_priv(dev); | |
3b9990cb JK |
6942 | int active_network = ((priv->status & STATUS_ASSOCIATED) && |
6943 | (network == priv->assoc_network)); | |
43f66a6c | 6944 | |
3b9990cb | 6945 | ipw_qos_handle_probe_response(priv, active_network, network); |
43f66a6c | 6946 | |
3b9990cb JK |
6947 | return 0; |
6948 | } | |
43f66a6c | 6949 | |
3b9990cb JK |
6950 | static int ipw_handle_beacon(struct net_device *dev, |
6951 | struct ieee80211_beacon *resp, | |
6952 | struct ieee80211_network *network) | |
6953 | { | |
6954 | struct ipw_priv *priv = ieee80211_priv(dev); | |
6955 | int active_network = ((priv->status & STATUS_ASSOCIATED) && | |
6956 | (network == priv->assoc_network)); | |
bf79451e | 6957 | |
3b9990cb | 6958 | ipw_qos_handle_probe_response(priv, active_network, network); |
bf79451e | 6959 | |
b095c381 JK |
6960 | return 0; |
6961 | } | |
bf79451e | 6962 | |
3b9990cb JK |
6963 | static int ipw_handle_assoc_response(struct net_device *dev, |
6964 | struct ieee80211_assoc_response *resp, | |
6965 | struct ieee80211_network *network) | |
6966 | { | |
6967 | struct ipw_priv *priv = ieee80211_priv(dev); | |
6968 | ipw_qos_association_resp(priv, network); | |
6969 | return 0; | |
6970 | } | |
43f66a6c | 6971 | |
b095c381 JK |
6972 | static int ipw_send_qos_params_command(struct ipw_priv *priv, struct ieee80211_qos_parameters |
6973 | *qos_param) | |
6974 | { | |
4e22699f ZY |
6975 | return ipw_send_cmd_pdu(priv, IPW_CMD_QOS_PARAMETERS, |
6976 | sizeof(*qos_param) * 3, qos_param); | |
b095c381 JK |
6977 | } |
6978 | ||
6979 | static int ipw_send_qos_info_command(struct ipw_priv *priv, struct ieee80211_qos_information_element | |
6980 | *qos_param) | |
6981 | { | |
4e22699f ZY |
6982 | return ipw_send_cmd_pdu(priv, IPW_CMD_WME_INFO, sizeof(*qos_param), |
6983 | qos_param); | |
43f66a6c JK |
6984 | } |
6985 | ||
b095c381 JK |
6986 | #endif /* CONFIG_IPW_QOS */ |
6987 | ||
43f66a6c JK |
6988 | static int ipw_associate_network(struct ipw_priv *priv, |
6989 | struct ieee80211_network *network, | |
0edd5b44 | 6990 | struct ipw_supported_rates *rates, int roaming) |
43f66a6c JK |
6991 | { |
6992 | int err; | |
6993 | ||
6994 | if (priv->config & CFG_FIXED_RATE) | |
b095c381 | 6995 | ipw_set_fixed_rate(priv, network->mode); |
43f66a6c JK |
6996 | |
6997 | if (!(priv->config & CFG_STATIC_ESSID)) { | |
bf79451e | 6998 | priv->essid_len = min(network->ssid_len, |
0edd5b44 | 6999 | (u8) IW_ESSID_MAX_SIZE); |
43f66a6c JK |
7000 | memcpy(priv->essid, network->ssid, priv->essid_len); |
7001 | } | |
7002 | ||
7003 | network->last_associate = jiffies; | |
7004 | ||
7005 | memset(&priv->assoc_request, 0, sizeof(priv->assoc_request)); | |
7006 | priv->assoc_request.channel = network->channel; | |
3e234b4e ZY |
7007 | priv->assoc_request.auth_key = 0; |
7008 | ||
43f66a6c | 7009 | if ((priv->capability & CAP_PRIVACY_ON) && |
3e234b4e | 7010 | (priv->ieee->sec.auth_mode == WLAN_AUTH_SHARED_KEY)) { |
43f66a6c | 7011 | priv->assoc_request.auth_type = AUTH_SHARED_KEY; |
b095c381 JK |
7012 | priv->assoc_request.auth_key = priv->ieee->sec.active_key; |
7013 | ||
1ba61e05 | 7014 | if (priv->ieee->sec.level == SEC_LEVEL_1) |
b095c381 | 7015 | ipw_send_wep_keys(priv, DCW_WEP_KEY_SEC_TYPE_WEP); |
3e234b4e ZY |
7016 | |
7017 | } else if ((priv->capability & CAP_PRIVACY_ON) && | |
7018 | (priv->ieee->sec.auth_mode == WLAN_AUTH_LEAP)) | |
7019 | priv->assoc_request.auth_type = AUTH_LEAP; | |
7020 | else | |
43f66a6c | 7021 | priv->assoc_request.auth_type = AUTH_OPEN; |
43f66a6c | 7022 | |
b095c381 | 7023 | if (priv->ieee->wpa_ie_len) { |
ea2b26e0 JK |
7024 | priv->assoc_request.policy_support = 0x02; /* RSN active */ |
7025 | ipw_set_rsn_capa(priv, priv->ieee->wpa_ie, | |
7026 | priv->ieee->wpa_ie_len); | |
7027 | } | |
43f66a6c | 7028 | |
bf79451e JG |
7029 | /* |
7030 | * It is valid for our ieee device to support multiple modes, but | |
7031 | * when it comes to associating to a given network we have to choose | |
43f66a6c JK |
7032 | * just one mode. |
7033 | */ | |
7034 | if (network->mode & priv->ieee->mode & IEEE_A) | |
7035 | priv->assoc_request.ieee_mode = IPW_A_MODE; | |
7036 | else if (network->mode & priv->ieee->mode & IEEE_G) | |
7037 | priv->assoc_request.ieee_mode = IPW_G_MODE; | |
7038 | else if (network->mode & priv->ieee->mode & IEEE_B) | |
7039 | priv->assoc_request.ieee_mode = IPW_B_MODE; | |
7040 | ||
ea2b26e0 JK |
7041 | priv->assoc_request.capability = network->capability; |
7042 | if ((network->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
7043 | && !(priv->config & CFG_PREAMBLE_LONG)) { | |
7044 | priv->assoc_request.preamble_length = DCT_FLAG_SHORT_PREAMBLE; | |
7045 | } else { | |
7046 | priv->assoc_request.preamble_length = DCT_FLAG_LONG_PREAMBLE; | |
7047 | ||
7048 | /* Clear the short preamble if we won't be supporting it */ | |
7049 | priv->assoc_request.capability &= | |
7050 | ~WLAN_CAPABILITY_SHORT_PREAMBLE; | |
7051 | } | |
7052 | ||
afbf30a2 JK |
7053 | /* Clear capability bits that aren't used in Ad Hoc */ |
7054 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) | |
7055 | priv->assoc_request.capability &= | |
7056 | ~WLAN_CAPABILITY_SHORT_SLOT_TIME; | |
7057 | ||
43f66a6c | 7058 | IPW_DEBUG_ASSOC("%sssocation attempt: '%s', channel %d, " |
ea2b26e0 | 7059 | "802.11%c [%d], %s[:%s], enc=%s%s%s%c%c\n", |
43f66a6c | 7060 | roaming ? "Rea" : "A", |
bf79451e JG |
7061 | escape_essid(priv->essid, priv->essid_len), |
7062 | network->channel, | |
7063 | ipw_modes[priv->assoc_request.ieee_mode], | |
7064 | rates->num_rates, | |
ea2b26e0 JK |
7065 | (priv->assoc_request.preamble_length == |
7066 | DCT_FLAG_LONG_PREAMBLE) ? "long" : "short", | |
7067 | network->capability & | |
7068 | WLAN_CAPABILITY_SHORT_PREAMBLE ? "short" : "long", | |
43f66a6c | 7069 | priv->capability & CAP_PRIVACY_ON ? "on " : "off", |
bf79451e JG |
7070 | priv->capability & CAP_PRIVACY_ON ? |
7071 | (priv->capability & CAP_SHARED_KEY ? "(shared)" : | |
43f66a6c JK |
7072 | "(open)") : "", |
7073 | priv->capability & CAP_PRIVACY_ON ? " key=" : "", | |
bf79451e | 7074 | priv->capability & CAP_PRIVACY_ON ? |
b095c381 | 7075 | '1' + priv->ieee->sec.active_key : '.', |
0edd5b44 | 7076 | priv->capability & CAP_PRIVACY_ON ? '.' : ' '); |
43f66a6c JK |
7077 | |
7078 | priv->assoc_request.beacon_interval = network->beacon_interval; | |
7079 | if ((priv->ieee->iw_mode == IW_MODE_ADHOC) && | |
0edd5b44 | 7080 | (network->time_stamp[0] == 0) && (network->time_stamp[1] == 0)) { |
43f66a6c JK |
7081 | priv->assoc_request.assoc_type = HC_IBSS_START; |
7082 | priv->assoc_request.assoc_tsf_msw = 0; | |
7083 | priv->assoc_request.assoc_tsf_lsw = 0; | |
7084 | } else { | |
7085 | if (unlikely(roaming)) | |
7086 | priv->assoc_request.assoc_type = HC_REASSOCIATE; | |
7087 | else | |
7088 | priv->assoc_request.assoc_type = HC_ASSOCIATE; | |
7089 | priv->assoc_request.assoc_tsf_msw = network->time_stamp[1]; | |
7090 | priv->assoc_request.assoc_tsf_lsw = network->time_stamp[0]; | |
7091 | } | |
7092 | ||
afbf30a2 | 7093 | memcpy(priv->assoc_request.bssid, network->bssid, ETH_ALEN); |
43f66a6c JK |
7094 | |
7095 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) { | |
7096 | memset(&priv->assoc_request.dest, 0xFF, ETH_ALEN); | |
7097 | priv->assoc_request.atim_window = network->atim_window; | |
7098 | } else { | |
afbf30a2 | 7099 | memcpy(priv->assoc_request.dest, network->bssid, ETH_ALEN); |
43f66a6c JK |
7100 | priv->assoc_request.atim_window = 0; |
7101 | } | |
7102 | ||
43f66a6c | 7103 | priv->assoc_request.listen_interval = network->listen_interval; |
bf79451e | 7104 | |
43f66a6c JK |
7105 | err = ipw_send_ssid(priv, priv->essid, priv->essid_len); |
7106 | if (err) { | |
7107 | IPW_DEBUG_HC("Attempt to send SSID command failed.\n"); | |
7108 | return err; | |
7109 | } | |
7110 | ||
7111 | rates->ieee_mode = priv->assoc_request.ieee_mode; | |
7112 | rates->purpose = IPW_RATE_CONNECT; | |
7113 | ipw_send_supported_rates(priv, rates); | |
bf79451e | 7114 | |
43f66a6c JK |
7115 | if (priv->assoc_request.ieee_mode == IPW_G_MODE) |
7116 | priv->sys_config.dot11g_auto_detection = 1; | |
7117 | else | |
7118 | priv->sys_config.dot11g_auto_detection = 0; | |
c848d0af JK |
7119 | |
7120 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) | |
7121 | priv->sys_config.answer_broadcast_ssid_probe = 1; | |
7122 | else | |
7123 | priv->sys_config.answer_broadcast_ssid_probe = 0; | |
7124 | ||
43f66a6c JK |
7125 | err = ipw_send_system_config(priv, &priv->sys_config); |
7126 | if (err) { | |
7127 | IPW_DEBUG_HC("Attempt to send sys config command failed.\n"); | |
7128 | return err; | |
7129 | } | |
bf79451e | 7130 | |
43f66a6c | 7131 | IPW_DEBUG_ASSOC("Association sensitivity: %d\n", network->stats.rssi); |
ea2b26e0 | 7132 | err = ipw_set_sensitivity(priv, network->stats.rssi + IPW_RSSI_TO_DBM); |
43f66a6c JK |
7133 | if (err) { |
7134 | IPW_DEBUG_HC("Attempt to send associate command failed.\n"); | |
7135 | return err; | |
7136 | } | |
7137 | ||
7138 | /* | |
7139 | * If preemption is enabled, it is possible for the association | |
7140 | * to complete before we return from ipw_send_associate. Therefore | |
7141 | * we have to be sure and update our priviate data first. | |
7142 | */ | |
7143 | priv->channel = network->channel; | |
7144 | memcpy(priv->bssid, network->bssid, ETH_ALEN); | |
bf79451e | 7145 | priv->status |= STATUS_ASSOCIATING; |
43f66a6c JK |
7146 | priv->status &= ~STATUS_SECURITY_UPDATED; |
7147 | ||
7148 | priv->assoc_network = network; | |
7149 | ||
b095c381 JK |
7150 | #ifdef CONFIG_IPW_QOS |
7151 | ipw_qos_association(priv, network); | |
7152 | #endif | |
7153 | ||
43f66a6c JK |
7154 | err = ipw_send_associate(priv, &priv->assoc_request); |
7155 | if (err) { | |
7156 | IPW_DEBUG_HC("Attempt to send associate command failed.\n"); | |
7157 | return err; | |
7158 | } | |
bf79451e JG |
7159 | |
7160 | IPW_DEBUG(IPW_DL_STATE, "associating: '%s' " MAC_FMT " \n", | |
43f66a6c JK |
7161 | escape_essid(priv->essid, priv->essid_len), |
7162 | MAC_ARG(priv->bssid)); | |
7163 | ||
7164 | return 0; | |
7165 | } | |
7166 | ||
7167 | static void ipw_roam(void *data) | |
7168 | { | |
7169 | struct ipw_priv *priv = data; | |
7170 | struct ieee80211_network *network = NULL; | |
7171 | struct ipw_network_match match = { | |
7172 | .network = priv->assoc_network | |
7173 | }; | |
7174 | ||
7175 | /* The roaming process is as follows: | |
bf79451e JG |
7176 | * |
7177 | * 1. Missed beacon threshold triggers the roaming process by | |
43f66a6c JK |
7178 | * setting the status ROAM bit and requesting a scan. |
7179 | * 2. When the scan completes, it schedules the ROAM work | |
7180 | * 3. The ROAM work looks at all of the known networks for one that | |
7181 | * is a better network than the currently associated. If none | |
7182 | * found, the ROAM process is over (ROAM bit cleared) | |
7183 | * 4. If a better network is found, a disassociation request is | |
7184 | * sent. | |
7185 | * 5. When the disassociation completes, the roam work is again | |
7186 | * scheduled. The second time through, the driver is no longer | |
7187 | * associated, and the newly selected network is sent an | |
bf79451e | 7188 | * association request. |
43f66a6c JK |
7189 | * 6. At this point ,the roaming process is complete and the ROAM |
7190 | * status bit is cleared. | |
7191 | */ | |
7192 | ||
7193 | /* If we are no longer associated, and the roaming bit is no longer | |
7194 | * set, then we are not actively roaming, so just return */ | |
7195 | if (!(priv->status & (STATUS_ASSOCIATED | STATUS_ROAMING))) | |
7196 | return; | |
bf79451e | 7197 | |
43f66a6c | 7198 | if (priv->status & STATUS_ASSOCIATED) { |
bf79451e | 7199 | /* First pass through ROAM process -- look for a better |
43f66a6c | 7200 | * network */ |
a613bffd | 7201 | unsigned long flags; |
43f66a6c JK |
7202 | u8 rssi = priv->assoc_network->stats.rssi; |
7203 | priv->assoc_network->stats.rssi = -128; | |
a613bffd | 7204 | spin_lock_irqsave(&priv->ieee->lock, flags); |
43f66a6c JK |
7205 | list_for_each_entry(network, &priv->ieee->network_list, list) { |
7206 | if (network != priv->assoc_network) | |
7207 | ipw_best_network(priv, &match, network, 1); | |
7208 | } | |
a613bffd | 7209 | spin_unlock_irqrestore(&priv->ieee->lock, flags); |
43f66a6c | 7210 | priv->assoc_network->stats.rssi = rssi; |
bf79451e | 7211 | |
43f66a6c JK |
7212 | if (match.network == priv->assoc_network) { |
7213 | IPW_DEBUG_ASSOC("No better APs in this network to " | |
7214 | "roam to.\n"); | |
7215 | priv->status &= ~STATUS_ROAMING; | |
7216 | ipw_debug_config(priv); | |
7217 | return; | |
7218 | } | |
bf79451e | 7219 | |
43f66a6c JK |
7220 | ipw_send_disassociate(priv, 1); |
7221 | priv->assoc_network = match.network; | |
7222 | ||
7223 | return; | |
bf79451e | 7224 | } |
43f66a6c JK |
7225 | |
7226 | /* Second pass through ROAM process -- request association */ | |
7227 | ipw_compatible_rates(priv, priv->assoc_network, &match.rates); | |
7228 | ipw_associate_network(priv, priv->assoc_network, &match.rates, 1); | |
7229 | priv->status &= ~STATUS_ROAMING; | |
7230 | } | |
7231 | ||
c848d0af JK |
7232 | static void ipw_bg_roam(void *data) |
7233 | { | |
7234 | struct ipw_priv *priv = data; | |
4644151b | 7235 | mutex_lock(&priv->mutex); |
c848d0af | 7236 | ipw_roam(data); |
4644151b | 7237 | mutex_unlock(&priv->mutex); |
c848d0af JK |
7238 | } |
7239 | ||
7240 | static int ipw_associate(void *data) | |
43f66a6c JK |
7241 | { |
7242 | struct ipw_priv *priv = data; | |
7243 | ||
7244 | struct ieee80211_network *network = NULL; | |
7245 | struct ipw_network_match match = { | |
7246 | .network = NULL | |
7247 | }; | |
7248 | struct ipw_supported_rates *rates; | |
7249 | struct list_head *element; | |
a613bffd | 7250 | unsigned long flags; |
43f66a6c | 7251 | |
b095c381 JK |
7252 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { |
7253 | IPW_DEBUG_ASSOC("Not attempting association (monitor mode)\n"); | |
7254 | return 0; | |
7255 | } | |
7256 | ||
c848d0af | 7257 | if (priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) { |
afbf30a2 JK |
7258 | IPW_DEBUG_ASSOC("Not attempting association (already in " |
7259 | "progress)\n"); | |
c848d0af JK |
7260 | return 0; |
7261 | } | |
7262 | ||
e6324726 HL |
7263 | if (priv->status & STATUS_DISASSOCIATING) { |
7264 | IPW_DEBUG_ASSOC("Not attempting association (in " | |
7265 | "disassociating)\n "); | |
7266 | queue_work(priv->workqueue, &priv->associate); | |
7267 | return 0; | |
7268 | } | |
7269 | ||
c848d0af | 7270 | if (!ipw_is_init(priv) || (priv->status & STATUS_SCANNING)) { |
afbf30a2 JK |
7271 | IPW_DEBUG_ASSOC("Not attempting association (scanning or not " |
7272 | "initialized)\n"); | |
c848d0af JK |
7273 | return 0; |
7274 | } | |
43f66a6c JK |
7275 | |
7276 | if (!(priv->config & CFG_ASSOCIATE) && | |
7277 | !(priv->config & (CFG_STATIC_ESSID | | |
0edd5b44 | 7278 | CFG_STATIC_CHANNEL | CFG_STATIC_BSSID))) { |
43f66a6c | 7279 | IPW_DEBUG_ASSOC("Not attempting association (associate=0)\n"); |
c848d0af | 7280 | return 0; |
43f66a6c JK |
7281 | } |
7282 | ||
a613bffd JK |
7283 | /* Protect our use of the network_list */ |
7284 | spin_lock_irqsave(&priv->ieee->lock, flags); | |
bf79451e | 7285 | list_for_each_entry(network, &priv->ieee->network_list, list) |
0edd5b44 | 7286 | ipw_best_network(priv, &match, network, 0); |
43f66a6c JK |
7287 | |
7288 | network = match.network; | |
7289 | rates = &match.rates; | |
7290 | ||
7291 | if (network == NULL && | |
7292 | priv->ieee->iw_mode == IW_MODE_ADHOC && | |
7293 | priv->config & CFG_ADHOC_CREATE && | |
7294 | priv->config & CFG_STATIC_ESSID && | |
a613bffd | 7295 | priv->config & CFG_STATIC_CHANNEL && |
43f66a6c JK |
7296 | !list_empty(&priv->ieee->network_free_list)) { |
7297 | element = priv->ieee->network_free_list.next; | |
0edd5b44 | 7298 | network = list_entry(element, struct ieee80211_network, list); |
43f66a6c JK |
7299 | ipw_adhoc_create(priv, network); |
7300 | rates = &priv->rates; | |
7301 | list_del(element); | |
7302 | list_add_tail(&network->list, &priv->ieee->network_list); | |
7303 | } | |
a613bffd | 7304 | spin_unlock_irqrestore(&priv->ieee->lock, flags); |
bf79451e | 7305 | |
43f66a6c JK |
7306 | /* If we reached the end of the list, then we don't have any valid |
7307 | * matching APs */ | |
7308 | if (!network) { | |
7309 | ipw_debug_config(priv); | |
7310 | ||
b095c381 JK |
7311 | if (!(priv->status & STATUS_SCANNING)) { |
7312 | if (!(priv->config & CFG_SPEED_SCAN)) | |
7313 | queue_delayed_work(priv->workqueue, | |
7314 | &priv->request_scan, | |
7315 | SCAN_INTERVAL); | |
7316 | else | |
7317 | queue_work(priv->workqueue, | |
7318 | &priv->request_scan); | |
7319 | } | |
bf79451e | 7320 | |
c848d0af | 7321 | return 0; |
43f66a6c JK |
7322 | } |
7323 | ||
7324 | ipw_associate_network(priv, network, rates, 0); | |
c848d0af JK |
7325 | |
7326 | return 1; | |
7327 | } | |
7328 | ||
7329 | static void ipw_bg_associate(void *data) | |
7330 | { | |
7331 | struct ipw_priv *priv = data; | |
4644151b | 7332 | mutex_lock(&priv->mutex); |
c848d0af | 7333 | ipw_associate(data); |
4644151b | 7334 | mutex_unlock(&priv->mutex); |
43f66a6c | 7335 | } |
bf79451e | 7336 | |
b095c381 JK |
7337 | static void ipw_rebuild_decrypted_skb(struct ipw_priv *priv, |
7338 | struct sk_buff *skb) | |
7339 | { | |
7340 | struct ieee80211_hdr *hdr; | |
7341 | u16 fc; | |
7342 | ||
7343 | hdr = (struct ieee80211_hdr *)skb->data; | |
7344 | fc = le16_to_cpu(hdr->frame_ctl); | |
7345 | if (!(fc & IEEE80211_FCTL_PROTECTED)) | |
7346 | return; | |
7347 | ||
7348 | fc &= ~IEEE80211_FCTL_PROTECTED; | |
7349 | hdr->frame_ctl = cpu_to_le16(fc); | |
7350 | switch (priv->ieee->sec.level) { | |
7351 | case SEC_LEVEL_3: | |
7352 | /* Remove CCMP HDR */ | |
7353 | memmove(skb->data + IEEE80211_3ADDR_LEN, | |
7354 | skb->data + IEEE80211_3ADDR_LEN + 8, | |
7355 | skb->len - IEEE80211_3ADDR_LEN - 8); | |
f4ff497d | 7356 | skb_trim(skb, skb->len - 16); /* CCMP_HDR_LEN + CCMP_MIC_LEN */ |
b095c381 JK |
7357 | break; |
7358 | case SEC_LEVEL_2: | |
7359 | break; | |
7360 | case SEC_LEVEL_1: | |
7361 | /* Remove IV */ | |
7362 | memmove(skb->data + IEEE80211_3ADDR_LEN, | |
7363 | skb->data + IEEE80211_3ADDR_LEN + 4, | |
7364 | skb->len - IEEE80211_3ADDR_LEN - 4); | |
f4ff497d | 7365 | skb_trim(skb, skb->len - 8); /* IV + ICV */ |
b095c381 JK |
7366 | break; |
7367 | case SEC_LEVEL_0: | |
7368 | break; | |
7369 | default: | |
7370 | printk(KERN_ERR "Unknow security level %d\n", | |
7371 | priv->ieee->sec.level); | |
7372 | break; | |
7373 | } | |
43f66a6c | 7374 | } |
bf79451e | 7375 | |
b095c381 JK |
7376 | static void ipw_handle_data_packet(struct ipw_priv *priv, |
7377 | struct ipw_rx_mem_buffer *rxb, | |
7378 | struct ieee80211_rx_stats *stats) | |
43f66a6c | 7379 | { |
567deaf6 | 7380 | struct ieee80211_hdr_4addr *hdr; |
43f66a6c JK |
7381 | struct ipw_rx_packet *pkt = (struct ipw_rx_packet *)rxb->skb->data; |
7382 | ||
7383 | /* We received data from the HW, so stop the watchdog */ | |
7384 | priv->net_dev->trans_start = jiffies; | |
7385 | ||
bf79451e | 7386 | /* We only process data packets if the |
43f66a6c | 7387 | * interface is open */ |
a613bffd | 7388 | if (unlikely((le16_to_cpu(pkt->u.frame.length) + IPW_RX_FRAME_SIZE) > |
43f66a6c JK |
7389 | skb_tailroom(rxb->skb))) { |
7390 | priv->ieee->stats.rx_errors++; | |
7391 | priv->wstats.discard.misc++; | |
7392 | IPW_DEBUG_DROP("Corruption detected! Oh no!\n"); | |
7393 | return; | |
7394 | } else if (unlikely(!netif_running(priv->net_dev))) { | |
7395 | priv->ieee->stats.rx_dropped++; | |
7396 | priv->wstats.discard.misc++; | |
7397 | IPW_DEBUG_DROP("Dropping packet while interface is not up.\n"); | |
7398 | return; | |
7399 | } | |
7400 | ||
7401 | /* Advance skb->data to the start of the actual payload */ | |
aaa4d308 | 7402 | skb_reserve(rxb->skb, offsetof(struct ipw_rx_packet, u.frame.data)); |
43f66a6c JK |
7403 | |
7404 | /* Set the size of the skb to the size of the frame */ | |
a613bffd | 7405 | skb_put(rxb->skb, le16_to_cpu(pkt->u.frame.length)); |
43f66a6c JK |
7406 | |
7407 | IPW_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len); | |
7408 | ||
b095c381 | 7409 | /* HW decrypt will not clear the WEP bit, MIC, PN, etc. */ |
567deaf6 HL |
7410 | hdr = (struct ieee80211_hdr_4addr *)rxb->skb->data; |
7411 | if (priv->ieee->iw_mode != IW_MODE_MONITOR && | |
3c19065a | 7412 | (is_multicast_ether_addr(hdr->addr1) ? |
567deaf6 | 7413 | !priv->ieee->host_mc_decrypt : !priv->ieee->host_decrypt)) |
b095c381 JK |
7414 | ipw_rebuild_decrypted_skb(priv, rxb->skb); |
7415 | ||
bf79451e | 7416 | if (!ieee80211_rx(priv->ieee, rxb->skb, stats)) |
43f66a6c | 7417 | priv->ieee->stats.rx_errors++; |
a613bffd | 7418 | else { /* ieee80211_rx succeeded, so it now owns the SKB */ |
43f66a6c | 7419 | rxb->skb = NULL; |
b095c381 | 7420 | __ipw_led_activity_on(priv); |
a613bffd | 7421 | } |
43f66a6c JK |
7422 | } |
7423 | ||
24a47dbd MK |
7424 | #ifdef CONFIG_IEEE80211_RADIOTAP |
7425 | static void ipw_handle_data_packet_monitor(struct ipw_priv *priv, | |
7426 | struct ipw_rx_mem_buffer *rxb, | |
7427 | struct ieee80211_rx_stats *stats) | |
7428 | { | |
7429 | struct ipw_rx_packet *pkt = (struct ipw_rx_packet *)rxb->skb->data; | |
7430 | struct ipw_rx_frame *frame = &pkt->u.frame; | |
7431 | ||
7432 | /* initial pull of some data */ | |
7433 | u16 received_channel = frame->received_channel; | |
7434 | u8 antennaAndPhy = frame->antennaAndPhy; | |
7435 | s8 antsignal = frame->rssi_dbm - IPW_RSSI_TO_DBM; /* call it signed anyhow */ | |
7436 | u16 pktrate = frame->rate; | |
7437 | ||
7438 | /* Magic struct that slots into the radiotap header -- no reason | |
7439 | * to build this manually element by element, we can write it much | |
7440 | * more efficiently than we can parse it. ORDER MATTERS HERE */ | |
7441 | struct ipw_rt_hdr { | |
7442 | struct ieee80211_radiotap_header rt_hdr; | |
7443 | u8 rt_flags; /* radiotap packet flags */ | |
7444 | u8 rt_rate; /* rate in 500kb/s */ | |
7445 | u16 rt_channel; /* channel in mhz */ | |
7446 | u16 rt_chbitmask; /* channel bitfield */ | |
7447 | s8 rt_dbmsignal; /* signal in dbM, kluged to signed */ | |
7448 | u8 rt_antenna; /* antenna number */ | |
7449 | } *ipw_rt; | |
7450 | ||
7451 | short len = le16_to_cpu(pkt->u.frame.length); | |
7452 | ||
7453 | /* We received data from the HW, so stop the watchdog */ | |
7454 | priv->net_dev->trans_start = jiffies; | |
7455 | ||
7456 | /* We only process data packets if the | |
7457 | * interface is open */ | |
7458 | if (unlikely((le16_to_cpu(pkt->u.frame.length) + IPW_RX_FRAME_SIZE) > | |
7459 | skb_tailroom(rxb->skb))) { | |
7460 | priv->ieee->stats.rx_errors++; | |
7461 | priv->wstats.discard.misc++; | |
7462 | IPW_DEBUG_DROP("Corruption detected! Oh no!\n"); | |
7463 | return; | |
7464 | } else if (unlikely(!netif_running(priv->net_dev))) { | |
7465 | priv->ieee->stats.rx_dropped++; | |
7466 | priv->wstats.discard.misc++; | |
7467 | IPW_DEBUG_DROP("Dropping packet while interface is not up.\n"); | |
7468 | return; | |
7469 | } | |
7470 | ||
7471 | /* Libpcap 0.9.3+ can handle variable length radiotap, so we'll use | |
7472 | * that now */ | |
7473 | if (len > IPW_RX_BUF_SIZE - sizeof(struct ipw_rt_hdr)) { | |
7474 | /* FIXME: Should alloc bigger skb instead */ | |
7475 | priv->ieee->stats.rx_dropped++; | |
7476 | priv->wstats.discard.misc++; | |
7477 | IPW_DEBUG_DROP("Dropping too large packet in monitor\n"); | |
7478 | return; | |
7479 | } | |
7480 | ||
7481 | /* copy the frame itself */ | |
7482 | memmove(rxb->skb->data + sizeof(struct ipw_rt_hdr), | |
7483 | rxb->skb->data + IPW_RX_FRAME_SIZE, len); | |
7484 | ||
7485 | /* Zero the radiotap static buffer ... We only need to zero the bytes NOT | |
7486 | * part of our real header, saves a little time. | |
7487 | * | |
7488 | * No longer necessary since we fill in all our data. Purge before merging | |
7489 | * patch officially. | |
7490 | * memset(rxb->skb->data + sizeof(struct ipw_rt_hdr), 0, | |
7491 | * IEEE80211_RADIOTAP_HDRLEN - sizeof(struct ipw_rt_hdr)); | |
7492 | */ | |
7493 | ||
7494 | ipw_rt = (struct ipw_rt_hdr *)rxb->skb->data; | |
7495 | ||
7496 | ipw_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION; | |
7497 | ipw_rt->rt_hdr.it_pad = 0; /* always good to zero */ | |
7498 | ipw_rt->rt_hdr.it_len = sizeof(struct ipw_rt_hdr); /* total header+data */ | |
7499 | ||
7500 | /* Big bitfield of all the fields we provide in radiotap */ | |
7501 | ipw_rt->rt_hdr.it_present = | |
7502 | ((1 << IEEE80211_RADIOTAP_FLAGS) | | |
7503 | (1 << IEEE80211_RADIOTAP_RATE) | | |
7504 | (1 << IEEE80211_RADIOTAP_CHANNEL) | | |
7505 | (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | | |
7506 | (1 << IEEE80211_RADIOTAP_ANTENNA)); | |
7507 | ||
7508 | /* Zero the flags, we'll add to them as we go */ | |
7509 | ipw_rt->rt_flags = 0; | |
7510 | ||
7511 | /* Convert signal to DBM */ | |
7512 | ipw_rt->rt_dbmsignal = antsignal; | |
7513 | ||
7514 | /* Convert the channel data and set the flags */ | |
7515 | ipw_rt->rt_channel = cpu_to_le16(ieee80211chan2mhz(received_channel)); | |
7516 | if (received_channel > 14) { /* 802.11a */ | |
7517 | ipw_rt->rt_chbitmask = | |
7518 | cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ)); | |
7519 | } else if (antennaAndPhy & 32) { /* 802.11b */ | |
7520 | ipw_rt->rt_chbitmask = | |
7521 | cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ)); | |
7522 | } else { /* 802.11g */ | |
7523 | ipw_rt->rt_chbitmask = | |
7524 | (IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ); | |
7525 | } | |
7526 | ||
7527 | /* set the rate in multiples of 500k/s */ | |
7528 | switch (pktrate) { | |
7529 | case IPW_TX_RATE_1MB: | |
7530 | ipw_rt->rt_rate = 2; | |
7531 | break; | |
7532 | case IPW_TX_RATE_2MB: | |
7533 | ipw_rt->rt_rate = 4; | |
7534 | break; | |
7535 | case IPW_TX_RATE_5MB: | |
7536 | ipw_rt->rt_rate = 10; | |
7537 | break; | |
7538 | case IPW_TX_RATE_6MB: | |
7539 | ipw_rt->rt_rate = 12; | |
7540 | break; | |
7541 | case IPW_TX_RATE_9MB: | |
7542 | ipw_rt->rt_rate = 18; | |
7543 | break; | |
7544 | case IPW_TX_RATE_11MB: | |
7545 | ipw_rt->rt_rate = 22; | |
7546 | break; | |
7547 | case IPW_TX_RATE_12MB: | |
7548 | ipw_rt->rt_rate = 24; | |
7549 | break; | |
7550 | case IPW_TX_RATE_18MB: | |
7551 | ipw_rt->rt_rate = 36; | |
7552 | break; | |
7553 | case IPW_TX_RATE_24MB: | |
7554 | ipw_rt->rt_rate = 48; | |
7555 | break; | |
7556 | case IPW_TX_RATE_36MB: | |
7557 | ipw_rt->rt_rate = 72; | |
7558 | break; | |
7559 | case IPW_TX_RATE_48MB: | |
7560 | ipw_rt->rt_rate = 96; | |
7561 | break; | |
7562 | case IPW_TX_RATE_54MB: | |
7563 | ipw_rt->rt_rate = 108; | |
7564 | break; | |
7565 | default: | |
7566 | ipw_rt->rt_rate = 0; | |
7567 | break; | |
7568 | } | |
7569 | ||
7570 | /* antenna number */ | |
7571 | ipw_rt->rt_antenna = (antennaAndPhy & 3); /* Is this right? */ | |
7572 | ||
7573 | /* set the preamble flag if we have it */ | |
7574 | if ((antennaAndPhy & 64)) | |
7575 | ipw_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; | |
7576 | ||
7577 | /* Set the size of the skb to the size of the frame */ | |
7578 | skb_put(rxb->skb, len + sizeof(struct ipw_rt_hdr)); | |
43f66a6c JK |
7579 | |
7580 | IPW_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len); | |
7581 | ||
bf79451e | 7582 | if (!ieee80211_rx(priv->ieee, rxb->skb, stats)) |
43f66a6c | 7583 | priv->ieee->stats.rx_errors++; |
24a47dbd MK |
7584 | else { /* ieee80211_rx succeeded, so it now owns the SKB */ |
7585 | rxb->skb = NULL; | |
7586 | /* no LED during capture */ | |
7587 | } | |
7588 | } | |
7589 | #endif | |
7590 | ||
858119e1 | 7591 | static int is_network_packet(struct ipw_priv *priv, |
ea2b26e0 JK |
7592 | struct ieee80211_hdr_4addr *header) |
7593 | { | |
7594 | /* Filter incoming packets to determine if they are targetted toward | |
7595 | * this network, discarding packets coming from ourselves */ | |
7596 | switch (priv->ieee->iw_mode) { | |
a613bffd | 7597 | case IW_MODE_ADHOC: /* Header: Dest. | Source | BSSID */ |
c848d0af JK |
7598 | /* packets from our adapter are dropped (echo) */ |
7599 | if (!memcmp(header->addr2, priv->net_dev->dev_addr, ETH_ALEN)) | |
7600 | return 0; | |
7601 | ||
90700fd9 | 7602 | /* {broad,multi}cast packets to our BSSID go through */ |
3c19065a | 7603 | if (is_multicast_ether_addr(header->addr1)) |
ea2b26e0 | 7604 | return !memcmp(header->addr3, priv->bssid, ETH_ALEN); |
a613bffd JK |
7605 | |
7606 | /* packets to our adapter go through */ | |
7607 | return !memcmp(header->addr1, priv->net_dev->dev_addr, | |
7608 | ETH_ALEN); | |
a613bffd | 7609 | |
90700fd9 | 7610 | case IW_MODE_INFRA: /* Header: Dest. | BSSID | Source */ |
c848d0af JK |
7611 | /* packets from our adapter are dropped (echo) */ |
7612 | if (!memcmp(header->addr3, priv->net_dev->dev_addr, ETH_ALEN)) | |
7613 | return 0; | |
7614 | ||
90700fd9 | 7615 | /* {broad,multi}cast packets to our BSS go through */ |
3c19065a | 7616 | if (is_multicast_ether_addr(header->addr1)) |
a613bffd JK |
7617 | return !memcmp(header->addr2, priv->bssid, ETH_ALEN); |
7618 | ||
7619 | /* packets to our adapter go through */ | |
7620 | return !memcmp(header->addr1, priv->net_dev->dev_addr, | |
7621 | ETH_ALEN); | |
ea2b26e0 | 7622 | } |
a613bffd | 7623 | |
ea2b26e0 JK |
7624 | return 1; |
7625 | } | |
7626 | ||
afbf30a2 JK |
7627 | #define IPW_PACKET_RETRY_TIME HZ |
7628 | ||
858119e1 | 7629 | static int is_duplicate_packet(struct ipw_priv *priv, |
afbf30a2 JK |
7630 | struct ieee80211_hdr_4addr *header) |
7631 | { | |
afbf30a2 JK |
7632 | u16 sc = le16_to_cpu(header->seq_ctl); |
7633 | u16 seq = WLAN_GET_SEQ_SEQ(sc); | |
7634 | u16 frag = WLAN_GET_SEQ_FRAG(sc); | |
7635 | u16 *last_seq, *last_frag; | |
7636 | unsigned long *last_time; | |
7637 | ||
7638 | switch (priv->ieee->iw_mode) { | |
7639 | case IW_MODE_ADHOC: | |
7640 | { | |
7641 | struct list_head *p; | |
7642 | struct ipw_ibss_seq *entry = NULL; | |
7643 | u8 *mac = header->addr2; | |
7644 | int index = mac[5] % IPW_IBSS_MAC_HASH_SIZE; | |
7645 | ||
7646 | __list_for_each(p, &priv->ibss_mac_hash[index]) { | |
7647 | entry = | |
7648 | list_entry(p, struct ipw_ibss_seq, list); | |
7649 | if (!memcmp(entry->mac, mac, ETH_ALEN)) | |
7650 | break; | |
7651 | } | |
7652 | if (p == &priv->ibss_mac_hash[index]) { | |
7653 | entry = kmalloc(sizeof(*entry), GFP_ATOMIC); | |
7654 | if (!entry) { | |
7655 | IPW_ERROR | |
7656 | ("Cannot malloc new mac entry\n"); | |
7657 | return 0; | |
7658 | } | |
7659 | memcpy(entry->mac, mac, ETH_ALEN); | |
7660 | entry->seq_num = seq; | |
7661 | entry->frag_num = frag; | |
7662 | entry->packet_time = jiffies; | |
7663 | list_add(&entry->list, | |
7664 | &priv->ibss_mac_hash[index]); | |
7665 | return 0; | |
7666 | } | |
7667 | last_seq = &entry->seq_num; | |
7668 | last_frag = &entry->frag_num; | |
7669 | last_time = &entry->packet_time; | |
7670 | break; | |
7671 | } | |
7672 | case IW_MODE_INFRA: | |
7673 | last_seq = &priv->last_seq_num; | |
7674 | last_frag = &priv->last_frag_num; | |
7675 | last_time = &priv->last_packet_time; | |
7676 | break; | |
7677 | default: | |
7678 | return 0; | |
7679 | } | |
7680 | if ((*last_seq == seq) && | |
7681 | time_after(*last_time + IPW_PACKET_RETRY_TIME, jiffies)) { | |
7682 | if (*last_frag == frag) | |
7683 | goto drop; | |
7684 | if (*last_frag + 1 != frag) | |
7685 | /* out-of-order fragment */ | |
7686 | goto drop; | |
afbf30a2 JK |
7687 | } else |
7688 | *last_seq = seq; | |
7689 | ||
f57ce7ce | 7690 | *last_frag = frag; |
afbf30a2 JK |
7691 | *last_time = jiffies; |
7692 | return 0; | |
7693 | ||
7694 | drop: | |
87b016cb ZY |
7695 | /* Comment this line now since we observed the card receives |
7696 | * duplicate packets but the FCTL_RETRY bit is not set in the | |
7697 | * IBSS mode with fragmentation enabled. | |
7698 | BUG_ON(!(le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_RETRY)); */ | |
afbf30a2 JK |
7699 | return 1; |
7700 | } | |
7701 | ||
b095c381 JK |
7702 | static void ipw_handle_mgmt_packet(struct ipw_priv *priv, |
7703 | struct ipw_rx_mem_buffer *rxb, | |
7704 | struct ieee80211_rx_stats *stats) | |
7705 | { | |
7706 | struct sk_buff *skb = rxb->skb; | |
7707 | struct ipw_rx_packet *pkt = (struct ipw_rx_packet *)skb->data; | |
7708 | struct ieee80211_hdr_4addr *header = (struct ieee80211_hdr_4addr *) | |
7709 | (skb->data + IPW_RX_FRAME_SIZE); | |
7710 | ||
7711 | ieee80211_rx_mgt(priv->ieee, header, stats); | |
7712 | ||
7713 | if (priv->ieee->iw_mode == IW_MODE_ADHOC && | |
7714 | ((WLAN_FC_GET_STYPE(le16_to_cpu(header->frame_ctl)) == | |
7715 | IEEE80211_STYPE_PROBE_RESP) || | |
7716 | (WLAN_FC_GET_STYPE(le16_to_cpu(header->frame_ctl)) == | |
7717 | IEEE80211_STYPE_BEACON))) { | |
7718 | if (!memcmp(header->addr3, priv->bssid, ETH_ALEN)) | |
7719 | ipw_add_station(priv, header->addr2); | |
7720 | } | |
7721 | ||
7722 | if (priv->config & CFG_NET_STATS) { | |
7723 | IPW_DEBUG_HC("sending stat packet\n"); | |
7724 | ||
7725 | /* Set the size of the skb to the size of the full | |
7726 | * ipw header and 802.11 frame */ | |
7727 | skb_put(skb, le16_to_cpu(pkt->u.frame.length) + | |
7728 | IPW_RX_FRAME_SIZE); | |
7729 | ||
7730 | /* Advance past the ipw packet header to the 802.11 frame */ | |
7731 | skb_pull(skb, IPW_RX_FRAME_SIZE); | |
7732 | ||
7733 | /* Push the ieee80211_rx_stats before the 802.11 frame */ | |
7734 | memcpy(skb_push(skb, sizeof(*stats)), stats, sizeof(*stats)); | |
7735 | ||
7736 | skb->dev = priv->ieee->dev; | |
7737 | ||
7738 | /* Point raw at the ieee80211_stats */ | |
7739 | skb->mac.raw = skb->data; | |
7740 | ||
7741 | skb->pkt_type = PACKET_OTHERHOST; | |
7742 | skb->protocol = __constant_htons(ETH_P_80211_STATS); | |
7743 | memset(skb->cb, 0, sizeof(rxb->skb->cb)); | |
7744 | netif_rx(skb); | |
43f66a6c | 7745 | rxb->skb = NULL; |
b095c381 | 7746 | } |
43f66a6c JK |
7747 | } |
7748 | ||
43f66a6c JK |
7749 | /* |
7750 | * Main entry function for recieving a packet with 80211 headers. This | |
7751 | * should be called when ever the FW has notified us that there is a new | |
7752 | * skb in the recieve queue. | |
7753 | */ | |
7754 | static void ipw_rx(struct ipw_priv *priv) | |
7755 | { | |
7756 | struct ipw_rx_mem_buffer *rxb; | |
7757 | struct ipw_rx_packet *pkt; | |
0dacca1f | 7758 | struct ieee80211_hdr_4addr *header; |
43f66a6c JK |
7759 | u32 r, w, i; |
7760 | u8 network_packet; | |
7761 | ||
b095c381 JK |
7762 | r = ipw_read32(priv, IPW_RX_READ_INDEX); |
7763 | w = ipw_read32(priv, IPW_RX_WRITE_INDEX); | |
43f66a6c JK |
7764 | i = (priv->rxq->processed + 1) % RX_QUEUE_SIZE; |
7765 | ||
7766 | while (i != r) { | |
7767 | rxb = priv->rxq->queue[i]; | |
43f66a6c JK |
7768 | if (unlikely(rxb == NULL)) { |
7769 | printk(KERN_CRIT "Queue not allocated!\n"); | |
7770 | break; | |
7771 | } | |
43f66a6c JK |
7772 | priv->rxq->queue[i] = NULL; |
7773 | ||
7774 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
b095c381 | 7775 | IPW_RX_BUF_SIZE, |
43f66a6c JK |
7776 | PCI_DMA_FROMDEVICE); |
7777 | ||
7778 | pkt = (struct ipw_rx_packet *)rxb->skb->data; | |
7779 | IPW_DEBUG_RX("Packet: type=%02X seq=%02X bits=%02X\n", | |
7780 | pkt->header.message_type, | |
0edd5b44 | 7781 | pkt->header.rx_seq_num, pkt->header.control_bits); |
43f66a6c JK |
7782 | |
7783 | switch (pkt->header.message_type) { | |
0edd5b44 JG |
7784 | case RX_FRAME_TYPE: /* 802.11 frame */ { |
7785 | struct ieee80211_rx_stats stats = { | |
c848d0af JK |
7786 | .rssi = |
7787 | le16_to_cpu(pkt->u.frame.rssi_dbm) - | |
0edd5b44 | 7788 | IPW_RSSI_TO_DBM, |
c848d0af | 7789 | .signal = |
b191608a BM |
7790 | le16_to_cpu(pkt->u.frame.rssi_dbm) - |
7791 | IPW_RSSI_TO_DBM + 0x100, | |
c848d0af JK |
7792 | .noise = |
7793 | le16_to_cpu(pkt->u.frame.noise), | |
0edd5b44 JG |
7794 | .rate = pkt->u.frame.rate, |
7795 | .mac_time = jiffies, | |
7796 | .received_channel = | |
7797 | pkt->u.frame.received_channel, | |
7798 | .freq = | |
7799 | (pkt->u.frame. | |
7800 | control & (1 << 0)) ? | |
7801 | IEEE80211_24GHZ_BAND : | |
7802 | IEEE80211_52GHZ_BAND, | |
a613bffd | 7803 | .len = le16_to_cpu(pkt->u.frame.length), |
0edd5b44 JG |
7804 | }; |
7805 | ||
7806 | if (stats.rssi != 0) | |
7807 | stats.mask |= IEEE80211_STATMASK_RSSI; | |
7808 | if (stats.signal != 0) | |
7809 | stats.mask |= IEEE80211_STATMASK_SIGNAL; | |
c848d0af JK |
7810 | if (stats.noise != 0) |
7811 | stats.mask |= IEEE80211_STATMASK_NOISE; | |
0edd5b44 JG |
7812 | if (stats.rate != 0) |
7813 | stats.mask |= IEEE80211_STATMASK_RATE; | |
7814 | ||
7815 | priv->rx_packets++; | |
43f66a6c | 7816 | |
b095c381 | 7817 | #ifdef CONFIG_IPW2200_MONITOR |
0edd5b44 | 7818 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { |
24a47dbd MK |
7819 | #ifdef CONFIG_IEEE80211_RADIOTAP |
7820 | ipw_handle_data_packet_monitor(priv, | |
7821 | rxb, | |
7822 | &stats); | |
7823 | #else | |
0edd5b44 JG |
7824 | ipw_handle_data_packet(priv, rxb, |
7825 | &stats); | |
24a47dbd | 7826 | #endif |
0edd5b44 JG |
7827 | break; |
7828 | } | |
43f66a6c | 7829 | #endif |
bf79451e | 7830 | |
0edd5b44 | 7831 | header = |
0dacca1f JK |
7832 | (struct ieee80211_hdr_4addr *)(rxb->skb-> |
7833 | data + | |
7834 | IPW_RX_FRAME_SIZE); | |
43f66a6c JK |
7835 | /* TODO: Check Ad-Hoc dest/source and make sure |
7836 | * that we are actually parsing these packets | |
bf79451e | 7837 | * correctly -- we should probably use the |
43f66a6c JK |
7838 | * frame control of the packet and disregard |
7839 | * the current iw_mode */ | |
0edd5b44 | 7840 | |
ea2b26e0 JK |
7841 | network_packet = |
7842 | is_network_packet(priv, header); | |
0edd5b44 JG |
7843 | if (network_packet && priv->assoc_network) { |
7844 | priv->assoc_network->stats.rssi = | |
7845 | stats.rssi; | |
00d21de5 ZY |
7846 | priv->exp_avg_rssi = |
7847 | exponential_average(priv->exp_avg_rssi, | |
7848 | stats.rssi, DEPTH_RSSI); | |
0edd5b44 JG |
7849 | } |
7850 | ||
7851 | IPW_DEBUG_RX("Frame: len=%u\n", | |
a613bffd | 7852 | le16_to_cpu(pkt->u.frame.length)); |
0edd5b44 | 7853 | |
a613bffd | 7854 | if (le16_to_cpu(pkt->u.frame.length) < |
9d0be03a ZY |
7855 | ieee80211_get_hdrlen(le16_to_cpu( |
7856 | header->frame_ctl))) { | |
0edd5b44 JG |
7857 | IPW_DEBUG_DROP |
7858 | ("Received packet is too small. " | |
7859 | "Dropping.\n"); | |
7860 | priv->ieee->stats.rx_errors++; | |
7861 | priv->wstats.discard.misc++; | |
7862 | break; | |
7863 | } | |
7864 | ||
a613bffd JK |
7865 | switch (WLAN_FC_GET_TYPE |
7866 | (le16_to_cpu(header->frame_ctl))) { | |
b095c381 | 7867 | |
0edd5b44 | 7868 | case IEEE80211_FTYPE_MGMT: |
b095c381 JK |
7869 | ipw_handle_mgmt_packet(priv, rxb, |
7870 | &stats); | |
0edd5b44 JG |
7871 | break; |
7872 | ||
7873 | case IEEE80211_FTYPE_CTL: | |
7874 | break; | |
7875 | ||
7876 | case IEEE80211_FTYPE_DATA: | |
afbf30a2 JK |
7877 | if (unlikely(!network_packet || |
7878 | is_duplicate_packet(priv, | |
7879 | header))) | |
7880 | { | |
0edd5b44 JG |
7881 | IPW_DEBUG_DROP("Dropping: " |
7882 | MAC_FMT ", " | |
7883 | MAC_FMT ", " | |
7884 | MAC_FMT "\n", | |
7885 | MAC_ARG(header-> | |
7886 | addr1), | |
7887 | MAC_ARG(header-> | |
7888 | addr2), | |
7889 | MAC_ARG(header-> | |
7890 | addr3)); | |
b095c381 JK |
7891 | break; |
7892 | } | |
7893 | ||
7894 | ipw_handle_data_packet(priv, rxb, | |
7895 | &stats); | |
7896 | ||
0edd5b44 JG |
7897 | break; |
7898 | } | |
43f66a6c JK |
7899 | break; |
7900 | } | |
bf79451e | 7901 | |
0edd5b44 JG |
7902 | case RX_HOST_NOTIFICATION_TYPE:{ |
7903 | IPW_DEBUG_RX | |
7904 | ("Notification: subtype=%02X flags=%02X size=%d\n", | |
43f66a6c JK |
7905 | pkt->u.notification.subtype, |
7906 | pkt->u.notification.flags, | |
7907 | pkt->u.notification.size); | |
0edd5b44 JG |
7908 | ipw_rx_notification(priv, &pkt->u.notification); |
7909 | break; | |
7910 | } | |
43f66a6c JK |
7911 | |
7912 | default: | |
7913 | IPW_DEBUG_RX("Bad Rx packet of type %d\n", | |
7914 | pkt->header.message_type); | |
7915 | break; | |
7916 | } | |
bf79451e JG |
7917 | |
7918 | /* For now we just don't re-use anything. We can tweak this | |
7919 | * later to try and re-use notification packets and SKBs that | |
43f66a6c JK |
7920 | * fail to Rx correctly */ |
7921 | if (rxb->skb != NULL) { | |
7922 | dev_kfree_skb_any(rxb->skb); | |
7923 | rxb->skb = NULL; | |
7924 | } | |
bf79451e | 7925 | |
43f66a6c | 7926 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, |
b095c381 | 7927 | IPW_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
43f66a6c | 7928 | list_add_tail(&rxb->list, &priv->rxq->rx_used); |
bf79451e | 7929 | |
43f66a6c JK |
7930 | i = (i + 1) % RX_QUEUE_SIZE; |
7931 | } | |
7932 | ||
7933 | /* Backtrack one entry */ | |
7934 | priv->rxq->processed = (i ? i : RX_QUEUE_SIZE) - 1; | |
7935 | ||
7936 | ipw_rx_queue_restock(priv); | |
7937 | } | |
7938 | ||
afbf30a2 JK |
7939 | #define DEFAULT_RTS_THRESHOLD 2304U |
7940 | #define MIN_RTS_THRESHOLD 1U | |
7941 | #define MAX_RTS_THRESHOLD 2304U | |
7942 | #define DEFAULT_BEACON_INTERVAL 100U | |
7943 | #define DEFAULT_SHORT_RETRY_LIMIT 7U | |
7944 | #define DEFAULT_LONG_RETRY_LIMIT 4U | |
7945 | ||
d6d5b5c1 ZY |
7946 | /** |
7947 | * ipw_sw_reset | |
7948 | * @option: options to control different reset behaviour | |
7949 | * 0 = reset everything except the 'disable' module_param | |
7950 | * 1 = reset everything and print out driver info (for probe only) | |
7951 | * 2 = reset everything | |
7952 | */ | |
7953 | static int ipw_sw_reset(struct ipw_priv *priv, int option) | |
43f66a6c | 7954 | { |
afbf30a2 JK |
7955 | int band, modulation; |
7956 | int old_mode = priv->ieee->iw_mode; | |
43f66a6c | 7957 | |
afbf30a2 JK |
7958 | /* Initialize module parameter values here */ |
7959 | priv->config = 0; | |
43f66a6c | 7960 | |
afbf30a2 JK |
7961 | /* We default to disabling the LED code as right now it causes |
7962 | * too many systems to lock up... */ | |
7963 | if (!led) | |
7964 | priv->config |= CFG_NO_LED; | |
43f66a6c | 7965 | |
afbf30a2 JK |
7966 | if (associate) |
7967 | priv->config |= CFG_ASSOCIATE; | |
7968 | else | |
7969 | IPW_DEBUG_INFO("Auto associate disabled.\n"); | |
bf79451e | 7970 | |
afbf30a2 JK |
7971 | if (auto_create) |
7972 | priv->config |= CFG_ADHOC_CREATE; | |
7973 | else | |
7974 | IPW_DEBUG_INFO("Auto adhoc creation disabled.\n"); | |
43f66a6c | 7975 | |
17ed081d ZY |
7976 | priv->config &= ~CFG_STATIC_ESSID; |
7977 | priv->essid_len = 0; | |
7978 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
7979 | ||
d6d5b5c1 | 7980 | if (disable && option) { |
afbf30a2 JK |
7981 | priv->status |= STATUS_RF_KILL_SW; |
7982 | IPW_DEBUG_INFO("Radio disabled.\n"); | |
43f66a6c | 7983 | } |
bf79451e | 7984 | |
afbf30a2 JK |
7985 | if (channel != 0) { |
7986 | priv->config |= CFG_STATIC_CHANNEL; | |
7987 | priv->channel = channel; | |
7988 | IPW_DEBUG_INFO("Bind to static channel %d\n", channel); | |
7989 | /* TODO: Validate that provided channel is in range */ | |
43f66a6c | 7990 | } |
afbf30a2 JK |
7991 | #ifdef CONFIG_IPW_QOS |
7992 | ipw_qos_init(priv, qos_enable, qos_burst_enable, | |
7993 | burst_duration_CCK, burst_duration_OFDM); | |
7994 | #endif /* CONFIG_IPW_QOS */ | |
43f66a6c | 7995 | |
afbf30a2 JK |
7996 | switch (mode) { |
7997 | case 1: | |
7998 | priv->ieee->iw_mode = IW_MODE_ADHOC; | |
7999 | priv->net_dev->type = ARPHRD_ETHER; | |
8000 | ||
8001 | break; | |
8002 | #ifdef CONFIG_IPW2200_MONITOR | |
8003 | case 2: | |
8004 | priv->ieee->iw_mode = IW_MODE_MONITOR; | |
24a47dbd MK |
8005 | #ifdef CONFIG_IEEE80211_RADIOTAP |
8006 | priv->net_dev->type = ARPHRD_IEEE80211_RADIOTAP; | |
8007 | #else | |
afbf30a2 | 8008 | priv->net_dev->type = ARPHRD_IEEE80211; |
24a47dbd | 8009 | #endif |
afbf30a2 JK |
8010 | break; |
8011 | #endif | |
8012 | default: | |
8013 | case 0: | |
8014 | priv->net_dev->type = ARPHRD_ETHER; | |
8015 | priv->ieee->iw_mode = IW_MODE_INFRA; | |
8016 | break; | |
43f66a6c JK |
8017 | } |
8018 | ||
afbf30a2 JK |
8019 | if (hwcrypto) { |
8020 | priv->ieee->host_encrypt = 0; | |
8021 | priv->ieee->host_encrypt_msdu = 0; | |
8022 | priv->ieee->host_decrypt = 0; | |
567deaf6 | 8023 | priv->ieee->host_mc_decrypt = 0; |
afbf30a2 JK |
8024 | } |
8025 | IPW_DEBUG_INFO("Hardware crypto [%s]\n", hwcrypto ? "on" : "off"); | |
43f66a6c | 8026 | |
e402c937 ZY |
8027 | /* IPW2200/2915 is abled to do hardware fragmentation. */ |
8028 | priv->ieee->host_open_frag = 0; | |
bf79451e | 8029 | |
afbf30a2 JK |
8030 | if ((priv->pci_dev->device == 0x4223) || |
8031 | (priv->pci_dev->device == 0x4224)) { | |
e8c69e27 | 8032 | if (option == 1) |
afbf30a2 JK |
8033 | printk(KERN_INFO DRV_NAME |
8034 | ": Detected Intel PRO/Wireless 2915ABG Network " | |
8035 | "Connection\n"); | |
8036 | priv->ieee->abg_true = 1; | |
8037 | band = IEEE80211_52GHZ_BAND | IEEE80211_24GHZ_BAND; | |
8038 | modulation = IEEE80211_OFDM_MODULATION | | |
8039 | IEEE80211_CCK_MODULATION; | |
8040 | priv->adapter = IPW_2915ABG; | |
8041 | priv->ieee->mode = IEEE_A | IEEE_G | IEEE_B; | |
43f66a6c | 8042 | } else { |
e8c69e27 | 8043 | if (option == 1) |
afbf30a2 JK |
8044 | printk(KERN_INFO DRV_NAME |
8045 | ": Detected Intel PRO/Wireless 2200BG Network " | |
8046 | "Connection\n"); | |
bf79451e | 8047 | |
afbf30a2 JK |
8048 | priv->ieee->abg_true = 0; |
8049 | band = IEEE80211_24GHZ_BAND; | |
8050 | modulation = IEEE80211_OFDM_MODULATION | | |
8051 | IEEE80211_CCK_MODULATION; | |
8052 | priv->adapter = IPW_2200BG; | |
8053 | priv->ieee->mode = IEEE_G | IEEE_B; | |
43f66a6c JK |
8054 | } |
8055 | ||
afbf30a2 JK |
8056 | priv->ieee->freq_band = band; |
8057 | priv->ieee->modulation = modulation; | |
43f66a6c | 8058 | |
afbf30a2 | 8059 | priv->rates_mask = IEEE80211_DEFAULT_RATES_MASK; |
bf79451e | 8060 | |
afbf30a2 JK |
8061 | priv->disassociate_threshold = IPW_MB_DISASSOCIATE_THRESHOLD_DEFAULT; |
8062 | priv->roaming_threshold = IPW_MB_ROAMING_THRESHOLD_DEFAULT; | |
43f66a6c | 8063 | |
afbf30a2 JK |
8064 | priv->rts_threshold = DEFAULT_RTS_THRESHOLD; |
8065 | priv->short_retry_limit = DEFAULT_SHORT_RETRY_LIMIT; | |
8066 | priv->long_retry_limit = DEFAULT_LONG_RETRY_LIMIT; | |
43f66a6c | 8067 | |
afbf30a2 JK |
8068 | /* If power management is turned on, default to AC mode */ |
8069 | priv->power_mode = IPW_POWER_AC; | |
8070 | priv->tx_power = IPW_TX_POWER_DEFAULT; | |
8071 | ||
0ece35b5 | 8072 | return old_mode == priv->ieee->iw_mode; |
43f66a6c JK |
8073 | } |
8074 | ||
8075 | /* | |
8076 | * This file defines the Wireless Extension handlers. It does not | |
8077 | * define any methods of hardware manipulation and relies on the | |
8078 | * functions defined in ipw_main to provide the HW interaction. | |
bf79451e JG |
8079 | * |
8080 | * The exception to this is the use of the ipw_get_ordinal() | |
43f66a6c JK |
8081 | * function used to poll the hardware vs. making unecessary calls. |
8082 | * | |
8083 | */ | |
8084 | ||
bf79451e JG |
8085 | static int ipw_wx_get_name(struct net_device *dev, |
8086 | struct iw_request_info *info, | |
43f66a6c JK |
8087 | union iwreq_data *wrqu, char *extra) |
8088 | { | |
8089 | struct ipw_priv *priv = ieee80211_priv(dev); | |
4644151b | 8090 | mutex_lock(&priv->mutex); |
c848d0af | 8091 | if (priv->status & STATUS_RF_KILL_MASK) |
a613bffd | 8092 | strcpy(wrqu->name, "radio off"); |
c848d0af | 8093 | else if (!(priv->status & STATUS_ASSOCIATED)) |
43f66a6c | 8094 | strcpy(wrqu->name, "unassociated"); |
bf79451e | 8095 | else |
43f66a6c JK |
8096 | snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11%c", |
8097 | ipw_modes[priv->assoc_request.ieee_mode]); | |
8098 | IPW_DEBUG_WX("Name: %s\n", wrqu->name); | |
4644151b | 8099 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8100 | return 0; |
8101 | } | |
8102 | ||
8103 | static int ipw_set_channel(struct ipw_priv *priv, u8 channel) | |
8104 | { | |
8105 | if (channel == 0) { | |
8106 | IPW_DEBUG_INFO("Setting channel to ANY (0)\n"); | |
8107 | priv->config &= ~CFG_STATIC_CHANNEL; | |
c848d0af JK |
8108 | IPW_DEBUG_ASSOC("Attempting to associate with new " |
8109 | "parameters.\n"); | |
8110 | ipw_associate(priv); | |
43f66a6c JK |
8111 | return 0; |
8112 | } | |
8113 | ||
8114 | priv->config |= CFG_STATIC_CHANNEL; | |
8115 | ||
8116 | if (priv->channel == channel) { | |
0edd5b44 JG |
8117 | IPW_DEBUG_INFO("Request to set channel to current value (%d)\n", |
8118 | channel); | |
43f66a6c JK |
8119 | return 0; |
8120 | } | |
8121 | ||
8122 | IPW_DEBUG_INFO("Setting channel to %i\n", (int)channel); | |
8123 | priv->channel = channel; | |
8124 | ||
b095c381 JK |
8125 | #ifdef CONFIG_IPW2200_MONITOR |
8126 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { | |
afbf30a2 | 8127 | int i; |
b095c381 | 8128 | if (priv->status & STATUS_SCANNING) { |
afbf30a2 | 8129 | IPW_DEBUG_SCAN("Scan abort triggered due to " |
b095c381 | 8130 | "channel change.\n"); |
afbf30a2 | 8131 | ipw_abort_scan(priv); |
b095c381 JK |
8132 | } |
8133 | ||
8134 | for (i = 1000; i && (priv->status & STATUS_SCANNING); i--) | |
8135 | udelay(10); | |
8136 | ||
8137 | if (priv->status & STATUS_SCANNING) | |
8138 | IPW_DEBUG_SCAN("Still scanning...\n"); | |
8139 | else | |
8140 | IPW_DEBUG_SCAN("Took %dms to abort current scan\n", | |
8141 | 1000 - i); | |
8142 | ||
8143 | return 0; | |
43f66a6c | 8144 | } |
b095c381 JK |
8145 | #endif /* CONFIG_IPW2200_MONITOR */ |
8146 | ||
c848d0af JK |
8147 | /* Network configuration changed -- force [re]association */ |
8148 | IPW_DEBUG_ASSOC("[re]association triggered due to channel change.\n"); | |
8149 | if (!ipw_disassociate(priv)) | |
43f66a6c | 8150 | ipw_associate(priv); |
43f66a6c JK |
8151 | |
8152 | return 0; | |
8153 | } | |
8154 | ||
bf79451e JG |
8155 | static int ipw_wx_set_freq(struct net_device *dev, |
8156 | struct iw_request_info *info, | |
8157 | union iwreq_data *wrqu, char *extra) | |
43f66a6c JK |
8158 | { |
8159 | struct ipw_priv *priv = ieee80211_priv(dev); | |
1867b117 | 8160 | const struct ieee80211_geo *geo = ieee80211_get_geo(priv->ieee); |
43f66a6c | 8161 | struct iw_freq *fwrq = &wrqu->freq; |
afbf30a2 | 8162 | int ret = 0, i; |
1fe0adb4 LH |
8163 | u8 channel, flags; |
8164 | int band; | |
b095c381 JK |
8165 | |
8166 | if (fwrq->m == 0) { | |
8167 | IPW_DEBUG_WX("SET Freq/Channel -> any\n"); | |
4644151b | 8168 | mutex_lock(&priv->mutex); |
b095c381 | 8169 | ret = ipw_set_channel(priv, 0); |
4644151b | 8170 | mutex_unlock(&priv->mutex); |
b095c381 JK |
8171 | return ret; |
8172 | } | |
43f66a6c JK |
8173 | /* if setting by freq convert to channel */ |
8174 | if (fwrq->e == 1) { | |
1867b117 | 8175 | channel = ieee80211_freq_to_channel(priv->ieee, fwrq->m); |
b095c381 JK |
8176 | if (channel == 0) |
8177 | return -EINVAL; | |
8178 | } else | |
8179 | channel = fwrq->m; | |
bf79451e | 8180 | |
1867b117 | 8181 | if (!(band = ieee80211_is_valid_channel(priv->ieee, channel))) |
b095c381 | 8182 | return -EINVAL; |
43f66a6c | 8183 | |
1fe0adb4 | 8184 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) { |
1867b117 | 8185 | i = ieee80211_channel_to_index(priv->ieee, channel); |
afbf30a2 JK |
8186 | if (i == -1) |
8187 | return -EINVAL; | |
bf79451e | 8188 | |
1fe0adb4 LH |
8189 | flags = (band == IEEE80211_24GHZ_BAND) ? |
8190 | geo->bg[i].flags : geo->a[i].flags; | |
8191 | if (flags & IEEE80211_CH_PASSIVE_ONLY) { | |
afbf30a2 JK |
8192 | IPW_DEBUG_WX("Invalid Ad-Hoc channel for 802.11a\n"); |
8193 | return -EINVAL; | |
43f66a6c JK |
8194 | } |
8195 | } | |
bf79451e | 8196 | |
43f66a6c | 8197 | IPW_DEBUG_WX("SET Freq/Channel -> %d \n", fwrq->m); |
4644151b | 8198 | mutex_lock(&priv->mutex); |
b095c381 | 8199 | ret = ipw_set_channel(priv, channel); |
4644151b | 8200 | mutex_unlock(&priv->mutex); |
c848d0af | 8201 | return ret; |
43f66a6c JK |
8202 | } |
8203 | ||
bf79451e JG |
8204 | static int ipw_wx_get_freq(struct net_device *dev, |
8205 | struct iw_request_info *info, | |
43f66a6c JK |
8206 | union iwreq_data *wrqu, char *extra) |
8207 | { | |
8208 | struct ipw_priv *priv = ieee80211_priv(dev); | |
8209 | ||
8210 | wrqu->freq.e = 0; | |
8211 | ||
8212 | /* If we are associated, trying to associate, or have a statically | |
8213 | * configured CHANNEL then return that; otherwise return ANY */ | |
4644151b | 8214 | mutex_lock(&priv->mutex); |
43f66a6c JK |
8215 | if (priv->config & CFG_STATIC_CHANNEL || |
8216 | priv->status & (STATUS_ASSOCIATING | STATUS_ASSOCIATED)) | |
8217 | wrqu->freq.m = priv->channel; | |
bf79451e | 8218 | else |
43f66a6c JK |
8219 | wrqu->freq.m = 0; |
8220 | ||
4644151b | 8221 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8222 | IPW_DEBUG_WX("GET Freq/Channel -> %d \n", priv->channel); |
8223 | return 0; | |
8224 | } | |
8225 | ||
bf79451e JG |
8226 | static int ipw_wx_set_mode(struct net_device *dev, |
8227 | struct iw_request_info *info, | |
43f66a6c JK |
8228 | union iwreq_data *wrqu, char *extra) |
8229 | { | |
8230 | struct ipw_priv *priv = ieee80211_priv(dev); | |
8231 | int err = 0; | |
8232 | ||
8233 | IPW_DEBUG_WX("Set MODE: %d\n", wrqu->mode); | |
8234 | ||
43f66a6c | 8235 | switch (wrqu->mode) { |
b095c381 | 8236 | #ifdef CONFIG_IPW2200_MONITOR |
43f66a6c JK |
8237 | case IW_MODE_MONITOR: |
8238 | #endif | |
8239 | case IW_MODE_ADHOC: | |
8240 | case IW_MODE_INFRA: | |
8241 | break; | |
8242 | case IW_MODE_AUTO: | |
8243 | wrqu->mode = IW_MODE_INFRA; | |
8244 | break; | |
8245 | default: | |
8246 | return -EINVAL; | |
8247 | } | |
b095c381 JK |
8248 | if (wrqu->mode == priv->ieee->iw_mode) |
8249 | return 0; | |
43f66a6c | 8250 | |
4644151b | 8251 | mutex_lock(&priv->mutex); |
43f66a6c | 8252 | |
afbf30a2 JK |
8253 | ipw_sw_reset(priv, 0); |
8254 | ||
b095c381 | 8255 | #ifdef CONFIG_IPW2200_MONITOR |
bf79451e | 8256 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) |
43f66a6c | 8257 | priv->net_dev->type = ARPHRD_ETHER; |
bf79451e JG |
8258 | |
8259 | if (wrqu->mode == IW_MODE_MONITOR) | |
24a47dbd MK |
8260 | #ifdef CONFIG_IEEE80211_RADIOTAP |
8261 | priv->net_dev->type = ARPHRD_IEEE80211_RADIOTAP; | |
8262 | #else | |
43f66a6c | 8263 | priv->net_dev->type = ARPHRD_IEEE80211; |
24a47dbd | 8264 | #endif |
b095c381 | 8265 | #endif /* CONFIG_IPW2200_MONITOR */ |
bf79451e | 8266 | |
bf79451e | 8267 | /* Free the existing firmware and reset the fw_loaded |
43f66a6c | 8268 | * flag so ipw_load() will bring in the new firmawre */ |
afbf30a2 | 8269 | free_firmware(); |
43f66a6c JK |
8270 | |
8271 | priv->ieee->iw_mode = wrqu->mode; | |
bf79451e | 8272 | |
c848d0af | 8273 | queue_work(priv->workqueue, &priv->adapter_restart); |
4644151b | 8274 | mutex_unlock(&priv->mutex); |
0edd5b44 | 8275 | return err; |
43f66a6c JK |
8276 | } |
8277 | ||
bf79451e | 8278 | static int ipw_wx_get_mode(struct net_device *dev, |
0edd5b44 JG |
8279 | struct iw_request_info *info, |
8280 | union iwreq_data *wrqu, char *extra) | |
43f66a6c JK |
8281 | { |
8282 | struct ipw_priv *priv = ieee80211_priv(dev); | |
4644151b | 8283 | mutex_lock(&priv->mutex); |
43f66a6c JK |
8284 | wrqu->mode = priv->ieee->iw_mode; |
8285 | IPW_DEBUG_WX("Get MODE -> %d\n", wrqu->mode); | |
4644151b | 8286 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8287 | return 0; |
8288 | } | |
8289 | ||
43f66a6c JK |
8290 | /* Values are in microsecond */ |
8291 | static const s32 timeout_duration[] = { | |
8292 | 350000, | |
8293 | 250000, | |
8294 | 75000, | |
8295 | 37000, | |
8296 | 25000, | |
8297 | }; | |
8298 | ||
8299 | static const s32 period_duration[] = { | |
8300 | 400000, | |
8301 | 700000, | |
8302 | 1000000, | |
8303 | 1000000, | |
8304 | 1000000 | |
8305 | }; | |
8306 | ||
bf79451e JG |
8307 | static int ipw_wx_get_range(struct net_device *dev, |
8308 | struct iw_request_info *info, | |
43f66a6c JK |
8309 | union iwreq_data *wrqu, char *extra) |
8310 | { | |
8311 | struct ipw_priv *priv = ieee80211_priv(dev); | |
8312 | struct iw_range *range = (struct iw_range *)extra; | |
1867b117 | 8313 | const struct ieee80211_geo *geo = ieee80211_get_geo(priv->ieee); |
b095c381 | 8314 | int i = 0, j; |
43f66a6c JK |
8315 | |
8316 | wrqu->data.length = sizeof(*range); | |
8317 | memset(range, 0, sizeof(*range)); | |
8318 | ||
8319 | /* 54Mbs == ~27 Mb/s real (802.11g) */ | |
bf79451e | 8320 | range->throughput = 27 * 1000 * 1000; |
43f66a6c JK |
8321 | |
8322 | range->max_qual.qual = 100; | |
8323 | /* TODO: Find real max RSSI and stick here */ | |
8324 | range->max_qual.level = 0; | |
b191608a | 8325 | range->max_qual.noise = 0; |
0edd5b44 | 8326 | range->max_qual.updated = 7; /* Updated all three */ |
43f66a6c JK |
8327 | |
8328 | range->avg_qual.qual = 70; | |
8329 | /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ | |
0edd5b44 | 8330 | range->avg_qual.level = 0; /* FIXME to real average level */ |
43f66a6c | 8331 | range->avg_qual.noise = 0; |
0edd5b44 | 8332 | range->avg_qual.updated = 7; /* Updated all three */ |
4644151b | 8333 | mutex_lock(&priv->mutex); |
0edd5b44 | 8334 | range->num_bitrates = min(priv->rates.num_rates, (u8) IW_MAX_BITRATES); |
43f66a6c | 8335 | |
bf79451e JG |
8336 | for (i = 0; i < range->num_bitrates; i++) |
8337 | range->bitrate[i] = (priv->rates.supported_rates[i] & 0x7F) * | |
0edd5b44 | 8338 | 500000; |
bf79451e | 8339 | |
43f66a6c JK |
8340 | range->max_rts = DEFAULT_RTS_THRESHOLD; |
8341 | range->min_frag = MIN_FRAG_THRESHOLD; | |
8342 | range->max_frag = MAX_FRAG_THRESHOLD; | |
8343 | ||
8344 | range->encoding_size[0] = 5; | |
bf79451e | 8345 | range->encoding_size[1] = 13; |
43f66a6c JK |
8346 | range->num_encoding_sizes = 2; |
8347 | range->max_encoding_tokens = WEP_KEYS; | |
8348 | ||
8349 | /* Set the Wireless Extension versions */ | |
8350 | range->we_version_compiled = WIRELESS_EXT; | |
f1b50863 | 8351 | range->we_version_source = 18; |
43f66a6c | 8352 | |
b095c381 JK |
8353 | i = 0; |
8354 | if (priv->ieee->mode & (IEEE_B | IEEE_G)) { | |
e815de42 ZY |
8355 | for (j = 0; j < geo->bg_channels && i < IW_MAX_FREQUENCIES; j++) { |
8356 | if ((priv->ieee->iw_mode == IW_MODE_ADHOC) && | |
8357 | (geo->bg[j].flags & IEEE80211_CH_PASSIVE_ONLY)) | |
8358 | continue; | |
8359 | ||
b095c381 JK |
8360 | range->freq[i].i = geo->bg[j].channel; |
8361 | range->freq[i].m = geo->bg[j].freq * 100000; | |
8362 | range->freq[i].e = 1; | |
e815de42 | 8363 | i++; |
b095c381 JK |
8364 | } |
8365 | } | |
43f66a6c | 8366 | |
b095c381 | 8367 | if (priv->ieee->mode & IEEE_A) { |
e815de42 ZY |
8368 | for (j = 0; j < geo->a_channels && i < IW_MAX_FREQUENCIES; j++) { |
8369 | if ((priv->ieee->iw_mode == IW_MODE_ADHOC) && | |
8370 | (geo->a[j].flags & IEEE80211_CH_PASSIVE_ONLY)) | |
8371 | continue; | |
8372 | ||
b095c381 JK |
8373 | range->freq[i].i = geo->a[j].channel; |
8374 | range->freq[i].m = geo->a[j].freq * 100000; | |
8375 | range->freq[i].e = 1; | |
e815de42 | 8376 | i++; |
b095c381 | 8377 | } |
43f66a6c | 8378 | } |
b095c381 JK |
8379 | |
8380 | range->num_channels = i; | |
8381 | range->num_frequency = i; | |
8382 | ||
4644151b | 8383 | mutex_unlock(&priv->mutex); |
97a78ca9 BB |
8384 | |
8385 | /* Event capability (kernel + driver) */ | |
8386 | range->event_capa[0] = (IW_EVENT_CAPA_K_0 | | |
8387 | IW_EVENT_CAPA_MASK(SIOCGIWTHRSPY) | | |
8388 | IW_EVENT_CAPA_MASK(SIOCGIWAP)); | |
8389 | range->event_capa[1] = IW_EVENT_CAPA_K_1; | |
43f66a6c | 8390 | |
f1b50863 DW |
8391 | range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 | |
8392 | IW_ENC_CAPA_CIPHER_TKIP | IW_ENC_CAPA_CIPHER_CCMP; | |
8393 | ||
43f66a6c JK |
8394 | IPW_DEBUG_WX("GET Range\n"); |
8395 | return 0; | |
8396 | } | |
8397 | ||
bf79451e JG |
8398 | static int ipw_wx_set_wap(struct net_device *dev, |
8399 | struct iw_request_info *info, | |
43f66a6c JK |
8400 | union iwreq_data *wrqu, char *extra) |
8401 | { | |
8402 | struct ipw_priv *priv = ieee80211_priv(dev); | |
8403 | ||
8404 | static const unsigned char any[] = { | |
8405 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff | |
8406 | }; | |
8407 | static const unsigned char off[] = { | |
8408 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | |
8409 | }; | |
8410 | ||
bf79451e | 8411 | if (wrqu->ap_addr.sa_family != ARPHRD_ETHER) |
43f66a6c | 8412 | return -EINVAL; |
4644151b | 8413 | mutex_lock(&priv->mutex); |
43f66a6c JK |
8414 | if (!memcmp(any, wrqu->ap_addr.sa_data, ETH_ALEN) || |
8415 | !memcmp(off, wrqu->ap_addr.sa_data, ETH_ALEN)) { | |
8416 | /* we disable mandatory BSSID association */ | |
8417 | IPW_DEBUG_WX("Setting AP BSSID to ANY\n"); | |
8418 | priv->config &= ~CFG_STATIC_BSSID; | |
c848d0af JK |
8419 | IPW_DEBUG_ASSOC("Attempting to associate with new " |
8420 | "parameters.\n"); | |
8421 | ipw_associate(priv); | |
4644151b | 8422 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8423 | return 0; |
8424 | } | |
8425 | ||
8426 | priv->config |= CFG_STATIC_BSSID; | |
8427 | if (!memcmp(priv->bssid, wrqu->ap_addr.sa_data, ETH_ALEN)) { | |
8428 | IPW_DEBUG_WX("BSSID set to current BSSID.\n"); | |
4644151b | 8429 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8430 | return 0; |
8431 | } | |
8432 | ||
8433 | IPW_DEBUG_WX("Setting mandatory BSSID to " MAC_FMT "\n", | |
8434 | MAC_ARG(wrqu->ap_addr.sa_data)); | |
8435 | ||
8436 | memcpy(priv->bssid, wrqu->ap_addr.sa_data, ETH_ALEN); | |
8437 | ||
c848d0af JK |
8438 | /* Network configuration changed -- force [re]association */ |
8439 | IPW_DEBUG_ASSOC("[re]association triggered due to BSSID change.\n"); | |
8440 | if (!ipw_disassociate(priv)) | |
43f66a6c | 8441 | ipw_associate(priv); |
43f66a6c | 8442 | |
4644151b | 8443 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8444 | return 0; |
8445 | } | |
8446 | ||
bf79451e JG |
8447 | static int ipw_wx_get_wap(struct net_device *dev, |
8448 | struct iw_request_info *info, | |
43f66a6c JK |
8449 | union iwreq_data *wrqu, char *extra) |
8450 | { | |
8451 | struct ipw_priv *priv = ieee80211_priv(dev); | |
8452 | /* If we are associated, trying to associate, or have a statically | |
8453 | * configured BSSID then return that; otherwise return ANY */ | |
4644151b | 8454 | mutex_lock(&priv->mutex); |
bf79451e | 8455 | if (priv->config & CFG_STATIC_BSSID || |
43f66a6c JK |
8456 | priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) { |
8457 | wrqu->ap_addr.sa_family = ARPHRD_ETHER; | |
afbf30a2 | 8458 | memcpy(wrqu->ap_addr.sa_data, priv->bssid, ETH_ALEN); |
43f66a6c JK |
8459 | } else |
8460 | memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); | |
8461 | ||
8462 | IPW_DEBUG_WX("Getting WAP BSSID: " MAC_FMT "\n", | |
8463 | MAC_ARG(wrqu->ap_addr.sa_data)); | |
4644151b | 8464 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8465 | return 0; |
8466 | } | |
8467 | ||
bf79451e JG |
8468 | static int ipw_wx_set_essid(struct net_device *dev, |
8469 | struct iw_request_info *info, | |
43f66a6c JK |
8470 | union iwreq_data *wrqu, char *extra) |
8471 | { | |
8472 | struct ipw_priv *priv = ieee80211_priv(dev); | |
0edd5b44 | 8473 | char *essid = ""; /* ANY */ |
43f66a6c | 8474 | int length = 0; |
4644151b | 8475 | mutex_lock(&priv->mutex); |
43f66a6c JK |
8476 | if (wrqu->essid.flags && wrqu->essid.length) { |
8477 | length = wrqu->essid.length - 1; | |
8478 | essid = extra; | |
8479 | } | |
8480 | if (length == 0) { | |
8481 | IPW_DEBUG_WX("Setting ESSID to ANY\n"); | |
afbf30a2 JK |
8482 | if ((priv->config & CFG_STATIC_ESSID) && |
8483 | !(priv->status & (STATUS_ASSOCIATED | | |
43f66a6c JK |
8484 | STATUS_ASSOCIATING))) { |
8485 | IPW_DEBUG_ASSOC("Attempting to associate with new " | |
8486 | "parameters.\n"); | |
afbf30a2 | 8487 | priv->config &= ~CFG_STATIC_ESSID; |
43f66a6c JK |
8488 | ipw_associate(priv); |
8489 | } | |
4644151b | 8490 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8491 | return 0; |
8492 | } | |
8493 | ||
8494 | length = min(length, IW_ESSID_MAX_SIZE); | |
8495 | ||
8496 | priv->config |= CFG_STATIC_ESSID; | |
8497 | ||
8498 | if (priv->essid_len == length && !memcmp(priv->essid, extra, length)) { | |
8499 | IPW_DEBUG_WX("ESSID set to current ESSID.\n"); | |
4644151b | 8500 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8501 | return 0; |
8502 | } | |
8503 | ||
8504 | IPW_DEBUG_WX("Setting ESSID: '%s' (%d)\n", escape_essid(essid, length), | |
8505 | length); | |
8506 | ||
8507 | priv->essid_len = length; | |
8508 | memcpy(priv->essid, essid, priv->essid_len); | |
bf79451e | 8509 | |
c848d0af JK |
8510 | /* Network configuration changed -- force [re]association */ |
8511 | IPW_DEBUG_ASSOC("[re]association triggered due to ESSID change.\n"); | |
8512 | if (!ipw_disassociate(priv)) | |
43f66a6c | 8513 | ipw_associate(priv); |
43f66a6c | 8514 | |
4644151b | 8515 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8516 | return 0; |
8517 | } | |
8518 | ||
bf79451e JG |
8519 | static int ipw_wx_get_essid(struct net_device *dev, |
8520 | struct iw_request_info *info, | |
43f66a6c JK |
8521 | union iwreq_data *wrqu, char *extra) |
8522 | { | |
8523 | struct ipw_priv *priv = ieee80211_priv(dev); | |
8524 | ||
8525 | /* If we are associated, trying to associate, or have a statically | |
8526 | * configured ESSID then return that; otherwise return ANY */ | |
4644151b | 8527 | mutex_lock(&priv->mutex); |
43f66a6c | 8528 | if (priv->config & CFG_STATIC_ESSID || |
bf79451e JG |
8529 | priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) { |
8530 | IPW_DEBUG_WX("Getting essid: '%s'\n", | |
43f66a6c | 8531 | escape_essid(priv->essid, priv->essid_len)); |
bf79451e | 8532 | memcpy(extra, priv->essid, priv->essid_len); |
43f66a6c | 8533 | wrqu->essid.length = priv->essid_len; |
0edd5b44 | 8534 | wrqu->essid.flags = 1; /* active */ |
43f66a6c JK |
8535 | } else { |
8536 | IPW_DEBUG_WX("Getting essid: ANY\n"); | |
8537 | wrqu->essid.length = 0; | |
0edd5b44 | 8538 | wrqu->essid.flags = 0; /* active */ |
43f66a6c | 8539 | } |
4644151b | 8540 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8541 | return 0; |
8542 | } | |
8543 | ||
bf79451e JG |
8544 | static int ipw_wx_set_nick(struct net_device *dev, |
8545 | struct iw_request_info *info, | |
43f66a6c | 8546 | union iwreq_data *wrqu, char *extra) |
bf79451e | 8547 | { |
43f66a6c JK |
8548 | struct ipw_priv *priv = ieee80211_priv(dev); |
8549 | ||
8550 | IPW_DEBUG_WX("Setting nick to '%s'\n", extra); | |
8551 | if (wrqu->data.length > IW_ESSID_MAX_SIZE) | |
8552 | return -E2BIG; | |
4644151b | 8553 | mutex_lock(&priv->mutex); |
0edd5b44 | 8554 | wrqu->data.length = min((size_t) wrqu->data.length, sizeof(priv->nick)); |
43f66a6c | 8555 | memset(priv->nick, 0, sizeof(priv->nick)); |
0edd5b44 | 8556 | memcpy(priv->nick, extra, wrqu->data.length); |
43f66a6c | 8557 | IPW_DEBUG_TRACE("<<\n"); |
4644151b | 8558 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8559 | return 0; |
8560 | ||
8561 | } | |
8562 | ||
bf79451e JG |
8563 | static int ipw_wx_get_nick(struct net_device *dev, |
8564 | struct iw_request_info *info, | |
43f66a6c | 8565 | union iwreq_data *wrqu, char *extra) |
bf79451e | 8566 | { |
43f66a6c JK |
8567 | struct ipw_priv *priv = ieee80211_priv(dev); |
8568 | IPW_DEBUG_WX("Getting nick\n"); | |
4644151b | 8569 | mutex_lock(&priv->mutex); |
43f66a6c JK |
8570 | wrqu->data.length = strlen(priv->nick) + 1; |
8571 | memcpy(extra, priv->nick, wrqu->data.length); | |
0edd5b44 | 8572 | wrqu->data.flags = 1; /* active */ |
4644151b | 8573 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8574 | return 0; |
8575 | } | |
8576 | ||
651be26f OH |
8577 | static int ipw_wx_set_sens(struct net_device *dev, |
8578 | struct iw_request_info *info, | |
8579 | union iwreq_data *wrqu, char *extra) | |
8580 | { | |
8581 | struct ipw_priv *priv = ieee80211_priv(dev); | |
8582 | int err = 0; | |
8583 | ||
8584 | IPW_DEBUG_WX("Setting roaming threshold to %d\n", wrqu->sens.value); | |
8585 | IPW_DEBUG_WX("Setting disassociate threshold to %d\n", 3*wrqu->sens.value); | |
8586 | mutex_lock(&priv->mutex); | |
8587 | ||
8588 | if (wrqu->sens.fixed == 0) | |
8589 | { | |
8590 | priv->roaming_threshold = IPW_MB_ROAMING_THRESHOLD_DEFAULT; | |
8591 | priv->disassociate_threshold = IPW_MB_DISASSOCIATE_THRESHOLD_DEFAULT; | |
8592 | goto out; | |
8593 | } | |
8594 | if ((wrqu->sens.value > IPW_MB_ROAMING_THRESHOLD_MAX) || | |
8595 | (wrqu->sens.value < IPW_MB_ROAMING_THRESHOLD_MIN)) { | |
8596 | err = -EINVAL; | |
8597 | goto out; | |
8598 | } | |
8599 | ||
8600 | priv->roaming_threshold = wrqu->sens.value; | |
8601 | priv->disassociate_threshold = 3*wrqu->sens.value; | |
8602 | out: | |
8603 | mutex_unlock(&priv->mutex); | |
8604 | return err; | |
8605 | } | |
8606 | ||
8607 | static int ipw_wx_get_sens(struct net_device *dev, | |
8608 | struct iw_request_info *info, | |
8609 | union iwreq_data *wrqu, char *extra) | |
8610 | { | |
8611 | struct ipw_priv *priv = ieee80211_priv(dev); | |
8612 | mutex_lock(&priv->mutex); | |
8613 | wrqu->sens.fixed = 1; | |
8614 | wrqu->sens.value = priv->roaming_threshold; | |
8615 | mutex_unlock(&priv->mutex); | |
8616 | ||
8617 | IPW_DEBUG_WX("GET roaming threshold -> %s %d \n", | |
8618 | wrqu->power.disabled ? "OFF" : "ON", wrqu->power.value); | |
8619 | ||
8620 | return 0; | |
8621 | } | |
8622 | ||
43f66a6c JK |
8623 | static int ipw_wx_set_rate(struct net_device *dev, |
8624 | struct iw_request_info *info, | |
8625 | union iwreq_data *wrqu, char *extra) | |
bf79451e | 8626 | { |
ea2b26e0 JK |
8627 | /* TODO: We should use semaphores or locks for access to priv */ |
8628 | struct ipw_priv *priv = ieee80211_priv(dev); | |
8629 | u32 target_rate = wrqu->bitrate.value; | |
8630 | u32 fixed, mask; | |
8631 | ||
8632 | /* value = -1, fixed = 0 means auto only, so we should use all rates offered by AP */ | |
8633 | /* value = X, fixed = 1 means only rate X */ | |
8634 | /* value = X, fixed = 0 means all rates lower equal X */ | |
8635 | ||
8636 | if (target_rate == -1) { | |
8637 | fixed = 0; | |
8638 | mask = IEEE80211_DEFAULT_RATES_MASK; | |
8639 | /* Now we should reassociate */ | |
8640 | goto apply; | |
8641 | } | |
8642 | ||
8643 | mask = 0; | |
8644 | fixed = wrqu->bitrate.fixed; | |
8645 | ||
8646 | if (target_rate == 1000000 || !fixed) | |
8647 | mask |= IEEE80211_CCK_RATE_1MB_MASK; | |
8648 | if (target_rate == 1000000) | |
8649 | goto apply; | |
8650 | ||
8651 | if (target_rate == 2000000 || !fixed) | |
8652 | mask |= IEEE80211_CCK_RATE_2MB_MASK; | |
8653 | if (target_rate == 2000000) | |
8654 | goto apply; | |
8655 | ||
8656 | if (target_rate == 5500000 || !fixed) | |
8657 | mask |= IEEE80211_CCK_RATE_5MB_MASK; | |
8658 | if (target_rate == 5500000) | |
8659 | goto apply; | |
8660 | ||
8661 | if (target_rate == 6000000 || !fixed) | |
8662 | mask |= IEEE80211_OFDM_RATE_6MB_MASK; | |
8663 | if (target_rate == 6000000) | |
8664 | goto apply; | |
8665 | ||
8666 | if (target_rate == 9000000 || !fixed) | |
8667 | mask |= IEEE80211_OFDM_RATE_9MB_MASK; | |
8668 | if (target_rate == 9000000) | |
8669 | goto apply; | |
8670 | ||
8671 | if (target_rate == 11000000 || !fixed) | |
8672 | mask |= IEEE80211_CCK_RATE_11MB_MASK; | |
8673 | if (target_rate == 11000000) | |
8674 | goto apply; | |
8675 | ||
8676 | if (target_rate == 12000000 || !fixed) | |
8677 | mask |= IEEE80211_OFDM_RATE_12MB_MASK; | |
8678 | if (target_rate == 12000000) | |
8679 | goto apply; | |
8680 | ||
8681 | if (target_rate == 18000000 || !fixed) | |
8682 | mask |= IEEE80211_OFDM_RATE_18MB_MASK; | |
8683 | if (target_rate == 18000000) | |
8684 | goto apply; | |
8685 | ||
8686 | if (target_rate == 24000000 || !fixed) | |
8687 | mask |= IEEE80211_OFDM_RATE_24MB_MASK; | |
8688 | if (target_rate == 24000000) | |
8689 | goto apply; | |
8690 | ||
8691 | if (target_rate == 36000000 || !fixed) | |
8692 | mask |= IEEE80211_OFDM_RATE_36MB_MASK; | |
8693 | if (target_rate == 36000000) | |
8694 | goto apply; | |
8695 | ||
8696 | if (target_rate == 48000000 || !fixed) | |
8697 | mask |= IEEE80211_OFDM_RATE_48MB_MASK; | |
8698 | if (target_rate == 48000000) | |
8699 | goto apply; | |
8700 | ||
8701 | if (target_rate == 54000000 || !fixed) | |
8702 | mask |= IEEE80211_OFDM_RATE_54MB_MASK; | |
8703 | if (target_rate == 54000000) | |
8704 | goto apply; | |
8705 | ||
8706 | IPW_DEBUG_WX("invalid rate specified, returning error\n"); | |
8707 | return -EINVAL; | |
8708 | ||
8709 | apply: | |
8710 | IPW_DEBUG_WX("Setting rate mask to 0x%08X [%s]\n", | |
8711 | mask, fixed ? "fixed" : "sub-rates"); | |
4644151b | 8712 | mutex_lock(&priv->mutex); |
b095c381 | 8713 | if (mask == IEEE80211_DEFAULT_RATES_MASK) { |
ea2b26e0 | 8714 | priv->config &= ~CFG_FIXED_RATE; |
b095c381 JK |
8715 | ipw_set_fixed_rate(priv, priv->ieee->mode); |
8716 | } else | |
ea2b26e0 JK |
8717 | priv->config |= CFG_FIXED_RATE; |
8718 | ||
c848d0af JK |
8719 | if (priv->rates_mask == mask) { |
8720 | IPW_DEBUG_WX("Mask set to current mask.\n"); | |
4644151b | 8721 | mutex_unlock(&priv->mutex); |
c848d0af | 8722 | return 0; |
ea2b26e0 JK |
8723 | } |
8724 | ||
c848d0af JK |
8725 | priv->rates_mask = mask; |
8726 | ||
8727 | /* Network configuration changed -- force [re]association */ | |
8728 | IPW_DEBUG_ASSOC("[re]association triggered due to rates change.\n"); | |
8729 | if (!ipw_disassociate(priv)) | |
8730 | ipw_associate(priv); | |
8731 | ||
4644151b | 8732 | mutex_unlock(&priv->mutex); |
ea2b26e0 | 8733 | return 0; |
43f66a6c JK |
8734 | } |
8735 | ||
bf79451e JG |
8736 | static int ipw_wx_get_rate(struct net_device *dev, |
8737 | struct iw_request_info *info, | |
43f66a6c | 8738 | union iwreq_data *wrqu, char *extra) |
bf79451e | 8739 | { |
0edd5b44 | 8740 | struct ipw_priv *priv = ieee80211_priv(dev); |
4644151b | 8741 | mutex_lock(&priv->mutex); |
43f66a6c | 8742 | wrqu->bitrate.value = priv->last_rate; |
4644151b | 8743 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8744 | IPW_DEBUG_WX("GET Rate -> %d \n", wrqu->bitrate.value); |
8745 | return 0; | |
8746 | } | |
8747 | ||
bf79451e JG |
8748 | static int ipw_wx_set_rts(struct net_device *dev, |
8749 | struct iw_request_info *info, | |
43f66a6c | 8750 | union iwreq_data *wrqu, char *extra) |
bf79451e | 8751 | { |
43f66a6c | 8752 | struct ipw_priv *priv = ieee80211_priv(dev); |
4644151b | 8753 | mutex_lock(&priv->mutex); |
43f66a6c JK |
8754 | if (wrqu->rts.disabled) |
8755 | priv->rts_threshold = DEFAULT_RTS_THRESHOLD; | |
8756 | else { | |
8757 | if (wrqu->rts.value < MIN_RTS_THRESHOLD || | |
c848d0af | 8758 | wrqu->rts.value > MAX_RTS_THRESHOLD) { |
4644151b | 8759 | mutex_unlock(&priv->mutex); |
43f66a6c | 8760 | return -EINVAL; |
c848d0af | 8761 | } |
43f66a6c JK |
8762 | priv->rts_threshold = wrqu->rts.value; |
8763 | } | |
8764 | ||
8765 | ipw_send_rts_threshold(priv, priv->rts_threshold); | |
4644151b | 8766 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8767 | IPW_DEBUG_WX("SET RTS Threshold -> %d \n", priv->rts_threshold); |
8768 | return 0; | |
8769 | } | |
8770 | ||
bf79451e JG |
8771 | static int ipw_wx_get_rts(struct net_device *dev, |
8772 | struct iw_request_info *info, | |
43f66a6c | 8773 | union iwreq_data *wrqu, char *extra) |
bf79451e | 8774 | { |
43f66a6c | 8775 | struct ipw_priv *priv = ieee80211_priv(dev); |
4644151b | 8776 | mutex_lock(&priv->mutex); |
43f66a6c JK |
8777 | wrqu->rts.value = priv->rts_threshold; |
8778 | wrqu->rts.fixed = 0; /* no auto select */ | |
0edd5b44 | 8779 | wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD); |
4644151b | 8780 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8781 | IPW_DEBUG_WX("GET RTS Threshold -> %d \n", wrqu->rts.value); |
8782 | return 0; | |
8783 | } | |
8784 | ||
bf79451e JG |
8785 | static int ipw_wx_set_txpow(struct net_device *dev, |
8786 | struct iw_request_info *info, | |
43f66a6c | 8787 | union iwreq_data *wrqu, char *extra) |
bf79451e | 8788 | { |
43f66a6c | 8789 | struct ipw_priv *priv = ieee80211_priv(dev); |
6de9f7f2 | 8790 | int err = 0; |
43f66a6c | 8791 | |
4644151b | 8792 | mutex_lock(&priv->mutex); |
c848d0af | 8793 | if (ipw_radio_kill_sw(priv, wrqu->power.disabled)) { |
6de9f7f2 ZY |
8794 | err = -EINPROGRESS; |
8795 | goto out; | |
43f66a6c | 8796 | } |
43f66a6c | 8797 | |
b095c381 JK |
8798 | if (!wrqu->power.fixed) |
8799 | wrqu->power.value = IPW_TX_POWER_DEFAULT; | |
8800 | ||
c848d0af | 8801 | if (wrqu->power.flags != IW_TXPOW_DBM) { |
6de9f7f2 ZY |
8802 | err = -EINVAL; |
8803 | goto out; | |
c848d0af | 8804 | } |
43f66a6c | 8805 | |
b095c381 | 8806 | if ((wrqu->power.value > IPW_TX_POWER_MAX) || |
afbf30a2 | 8807 | (wrqu->power.value < IPW_TX_POWER_MIN)) { |
6de9f7f2 ZY |
8808 | err = -EINVAL; |
8809 | goto out; | |
c848d0af | 8810 | } |
43f66a6c | 8811 | |
43f66a6c | 8812 | priv->tx_power = wrqu->power.value; |
6de9f7f2 ZY |
8813 | err = ipw_set_tx_power(priv); |
8814 | out: | |
4644151b | 8815 | mutex_unlock(&priv->mutex); |
6de9f7f2 | 8816 | return err; |
43f66a6c JK |
8817 | } |
8818 | ||
bf79451e JG |
8819 | static int ipw_wx_get_txpow(struct net_device *dev, |
8820 | struct iw_request_info *info, | |
43f66a6c | 8821 | union iwreq_data *wrqu, char *extra) |
bf79451e | 8822 | { |
43f66a6c | 8823 | struct ipw_priv *priv = ieee80211_priv(dev); |
4644151b | 8824 | mutex_lock(&priv->mutex); |
43f66a6c JK |
8825 | wrqu->power.value = priv->tx_power; |
8826 | wrqu->power.fixed = 1; | |
8827 | wrqu->power.flags = IW_TXPOW_DBM; | |
8828 | wrqu->power.disabled = (priv->status & STATUS_RF_KILL_MASK) ? 1 : 0; | |
4644151b | 8829 | mutex_unlock(&priv->mutex); |
43f66a6c | 8830 | |
bf79451e | 8831 | IPW_DEBUG_WX("GET TX Power -> %s %d \n", |
22501c8e | 8832 | wrqu->power.disabled ? "OFF" : "ON", wrqu->power.value); |
43f66a6c JK |
8833 | |
8834 | return 0; | |
8835 | } | |
8836 | ||
bf79451e | 8837 | static int ipw_wx_set_frag(struct net_device *dev, |
0edd5b44 JG |
8838 | struct iw_request_info *info, |
8839 | union iwreq_data *wrqu, char *extra) | |
43f66a6c JK |
8840 | { |
8841 | struct ipw_priv *priv = ieee80211_priv(dev); | |
4644151b | 8842 | mutex_lock(&priv->mutex); |
43f66a6c JK |
8843 | if (wrqu->frag.disabled) |
8844 | priv->ieee->fts = DEFAULT_FTS; | |
8845 | else { | |
8846 | if (wrqu->frag.value < MIN_FRAG_THRESHOLD || | |
b095c381 | 8847 | wrqu->frag.value > MAX_FRAG_THRESHOLD) { |
4644151b | 8848 | mutex_unlock(&priv->mutex); |
43f66a6c | 8849 | return -EINVAL; |
b095c381 | 8850 | } |
bf79451e | 8851 | |
43f66a6c JK |
8852 | priv->ieee->fts = wrqu->frag.value & ~0x1; |
8853 | } | |
8854 | ||
8855 | ipw_send_frag_threshold(priv, wrqu->frag.value); | |
4644151b | 8856 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8857 | IPW_DEBUG_WX("SET Frag Threshold -> %d \n", wrqu->frag.value); |
8858 | return 0; | |
8859 | } | |
8860 | ||
bf79451e | 8861 | static int ipw_wx_get_frag(struct net_device *dev, |
0edd5b44 JG |
8862 | struct iw_request_info *info, |
8863 | union iwreq_data *wrqu, char *extra) | |
43f66a6c JK |
8864 | { |
8865 | struct ipw_priv *priv = ieee80211_priv(dev); | |
4644151b | 8866 | mutex_lock(&priv->mutex); |
43f66a6c JK |
8867 | wrqu->frag.value = priv->ieee->fts; |
8868 | wrqu->frag.fixed = 0; /* no auto select */ | |
0edd5b44 | 8869 | wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FTS); |
4644151b | 8870 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
8871 | IPW_DEBUG_WX("GET Frag Threshold -> %d \n", wrqu->frag.value); |
8872 | ||
8873 | return 0; | |
8874 | } | |
8875 | ||
bf79451e JG |
8876 | static int ipw_wx_set_retry(struct net_device *dev, |
8877 | struct iw_request_info *info, | |
43f66a6c | 8878 | union iwreq_data *wrqu, char *extra) |
bf79451e | 8879 | { |
afbf30a2 JK |
8880 | struct ipw_priv *priv = ieee80211_priv(dev); |
8881 | ||
8882 | if (wrqu->retry.flags & IW_RETRY_LIFETIME || wrqu->retry.disabled) | |
8883 | return -EINVAL; | |
8884 | ||
8885 | if (!(wrqu->retry.flags & IW_RETRY_LIMIT)) | |
8886 | return 0; | |
8887 | ||
8888 | if (wrqu->retry.value < 0 || wrqu->retry.value > 255) | |
8889 | return -EINVAL; | |
8890 | ||
4644151b | 8891 | mutex_lock(&priv->mutex); |
afbf30a2 JK |
8892 | if (wrqu->retry.flags & IW_RETRY_MIN) |
8893 | priv->short_retry_limit = (u8) wrqu->retry.value; | |
8894 | else if (wrqu->retry.flags & IW_RETRY_MAX) | |
8895 | priv->long_retry_limit = (u8) wrqu->retry.value; | |
8896 | else { | |
8897 | priv->short_retry_limit = (u8) wrqu->retry.value; | |
8898 | priv->long_retry_limit = (u8) wrqu->retry.value; | |
8899 | } | |
8900 | ||
8901 | ipw_send_retry_limit(priv, priv->short_retry_limit, | |
8902 | priv->long_retry_limit); | |
4644151b | 8903 | mutex_unlock(&priv->mutex); |
afbf30a2 JK |
8904 | IPW_DEBUG_WX("SET retry limit -> short:%d long:%d\n", |
8905 | priv->short_retry_limit, priv->long_retry_limit); | |
8906 | return 0; | |
43f66a6c JK |
8907 | } |
8908 | ||
bf79451e JG |
8909 | static int ipw_wx_get_retry(struct net_device *dev, |
8910 | struct iw_request_info *info, | |
43f66a6c | 8911 | union iwreq_data *wrqu, char *extra) |
bf79451e | 8912 | { |
afbf30a2 JK |
8913 | struct ipw_priv *priv = ieee80211_priv(dev); |
8914 | ||
4644151b | 8915 | mutex_lock(&priv->mutex); |
afbf30a2 JK |
8916 | wrqu->retry.disabled = 0; |
8917 | ||
8918 | if ((wrqu->retry.flags & IW_RETRY_TYPE) == IW_RETRY_LIFETIME) { | |
4644151b | 8919 | mutex_unlock(&priv->mutex); |
afbf30a2 JK |
8920 | return -EINVAL; |
8921 | } | |
8922 | ||
8923 | if (wrqu->retry.flags & IW_RETRY_MAX) { | |
8924 | wrqu->retry.flags = IW_RETRY_LIMIT | IW_RETRY_MAX; | |
8925 | wrqu->retry.value = priv->long_retry_limit; | |
8926 | } else if (wrqu->retry.flags & IW_RETRY_MIN) { | |
8927 | wrqu->retry.flags = IW_RETRY_LIMIT | IW_RETRY_MIN; | |
8928 | wrqu->retry.value = priv->short_retry_limit; | |
8929 | } else { | |
8930 | wrqu->retry.flags = IW_RETRY_LIMIT; | |
8931 | wrqu->retry.value = priv->short_retry_limit; | |
8932 | } | |
4644151b | 8933 | mutex_unlock(&priv->mutex); |
afbf30a2 JK |
8934 | |
8935 | IPW_DEBUG_WX("GET retry -> %d \n", wrqu->retry.value); | |
8936 | ||
8937 | return 0; | |
8938 | } | |
8939 | ||
afbf30a2 JK |
8940 | static int ipw_request_direct_scan(struct ipw_priv *priv, char *essid, |
8941 | int essid_len) | |
8942 | { | |
8943 | struct ipw_scan_request_ext scan; | |
8944 | int err = 0, scan_type; | |
8945 | ||
efb3442c PE |
8946 | if (!(priv->status & STATUS_INIT) || |
8947 | (priv->status & STATUS_EXIT_PENDING)) | |
8948 | return 0; | |
8949 | ||
4644151b | 8950 | mutex_lock(&priv->mutex); |
afbf30a2 JK |
8951 | |
8952 | if (priv->status & STATUS_RF_KILL_MASK) { | |
8953 | IPW_DEBUG_HC("Aborting scan due to RF kill activation\n"); | |
8954 | priv->status |= STATUS_SCAN_PENDING; | |
8955 | goto done; | |
8956 | } | |
8957 | ||
8958 | IPW_DEBUG_HC("starting request direct scan!\n"); | |
8959 | ||
8960 | if (priv->status & (STATUS_SCANNING | STATUS_SCAN_ABORTING)) { | |
d834a41c OK |
8961 | /* We should not sleep here; otherwise we will block most |
8962 | * of the system (for instance, we hold rtnl_lock when we | |
8963 | * get here). | |
8964 | */ | |
8965 | err = -EAGAIN; | |
8966 | goto done; | |
afbf30a2 JK |
8967 | } |
8968 | memset(&scan, 0, sizeof(scan)); | |
8969 | ||
8970 | if (priv->config & CFG_SPEED_SCAN) | |
8971 | scan.dwell_time[IPW_SCAN_ACTIVE_BROADCAST_SCAN] = | |
8972 | cpu_to_le16(30); | |
8973 | else | |
8974 | scan.dwell_time[IPW_SCAN_ACTIVE_BROADCAST_SCAN] = | |
8975 | cpu_to_le16(20); | |
8976 | ||
8977 | scan.dwell_time[IPW_SCAN_ACTIVE_BROADCAST_AND_DIRECT_SCAN] = | |
8978 | cpu_to_le16(20); | |
1fe0adb4 | 8979 | scan.dwell_time[IPW_SCAN_PASSIVE_FULL_DWELL_SCAN] = cpu_to_le16(120); |
afbf30a2 JK |
8980 | scan.dwell_time[IPW_SCAN_ACTIVE_DIRECT_SCAN] = cpu_to_le16(20); |
8981 | ||
8982 | scan.full_scan_index = cpu_to_le32(ieee80211_get_scans(priv->ieee)); | |
8983 | ||
8984 | err = ipw_send_ssid(priv, essid, essid_len); | |
8985 | if (err) { | |
8986 | IPW_DEBUG_HC("Attempt to send SSID command failed\n"); | |
8987 | goto done; | |
8988 | } | |
8989 | scan_type = IPW_SCAN_ACTIVE_BROADCAST_AND_DIRECT_SCAN; | |
8990 | ||
8991 | ipw_add_scan_channels(priv, &scan, scan_type); | |
8992 | ||
8993 | err = ipw_send_scan_request_ext(priv, &scan); | |
8994 | if (err) { | |
8995 | IPW_DEBUG_HC("Sending scan command failed: %08X\n", err); | |
8996 | goto done; | |
8997 | } | |
8998 | ||
8999 | priv->status |= STATUS_SCANNING; | |
9000 | ||
9001 | done: | |
4644151b | 9002 | mutex_unlock(&priv->mutex); |
afbf30a2 | 9003 | return err; |
43f66a6c JK |
9004 | } |
9005 | ||
bf79451e JG |
9006 | static int ipw_wx_set_scan(struct net_device *dev, |
9007 | struct iw_request_info *info, | |
43f66a6c JK |
9008 | union iwreq_data *wrqu, char *extra) |
9009 | { | |
9010 | struct ipw_priv *priv = ieee80211_priv(dev); | |
afbf30a2 JK |
9011 | struct iw_scan_req *req = NULL; |
9012 | if (wrqu->data.length | |
9013 | && wrqu->data.length == sizeof(struct iw_scan_req)) { | |
9014 | req = (struct iw_scan_req *)extra; | |
9015 | if (wrqu->data.flags & IW_SCAN_THIS_ESSID) { | |
9016 | ipw_request_direct_scan(priv, req->essid, | |
9017 | req->essid_len); | |
9018 | return 0; | |
9019 | } | |
9020 | } | |
8935f39e | 9021 | |
43f66a6c | 9022 | IPW_DEBUG_WX("Start scan\n"); |
b095c381 JK |
9023 | |
9024 | queue_work(priv->workqueue, &priv->request_scan); | |
9025 | ||
43f66a6c JK |
9026 | return 0; |
9027 | } | |
9028 | ||
bf79451e JG |
9029 | static int ipw_wx_get_scan(struct net_device *dev, |
9030 | struct iw_request_info *info, | |
43f66a6c | 9031 | union iwreq_data *wrqu, char *extra) |
bf79451e | 9032 | { |
43f66a6c JK |
9033 | struct ipw_priv *priv = ieee80211_priv(dev); |
9034 | return ieee80211_wx_get_scan(priv->ieee, info, wrqu, extra); | |
9035 | } | |
9036 | ||
bf79451e | 9037 | static int ipw_wx_set_encode(struct net_device *dev, |
0edd5b44 JG |
9038 | struct iw_request_info *info, |
9039 | union iwreq_data *wrqu, char *key) | |
43f66a6c JK |
9040 | { |
9041 | struct ipw_priv *priv = ieee80211_priv(dev); | |
afbf30a2 | 9042 | int ret; |
caeff81b | 9043 | u32 cap = priv->capability; |
afbf30a2 | 9044 | |
4644151b | 9045 | mutex_lock(&priv->mutex); |
afbf30a2 | 9046 | ret = ieee80211_wx_set_encode(priv->ieee, info, wrqu, key); |
afbf30a2 | 9047 | |
caeff81b HL |
9048 | /* In IBSS mode, we need to notify the firmware to update |
9049 | * the beacon info after we changed the capability. */ | |
9050 | if (cap != priv->capability && | |
9051 | priv->ieee->iw_mode == IW_MODE_ADHOC && | |
9052 | priv->status & STATUS_ASSOCIATED) | |
9053 | ipw_disassociate(priv); | |
9054 | ||
4644151b | 9055 | mutex_unlock(&priv->mutex); |
afbf30a2 | 9056 | return ret; |
43f66a6c JK |
9057 | } |
9058 | ||
bf79451e | 9059 | static int ipw_wx_get_encode(struct net_device *dev, |
0edd5b44 JG |
9060 | struct iw_request_info *info, |
9061 | union iwreq_data *wrqu, char *key) | |
43f66a6c JK |
9062 | { |
9063 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9064 | return ieee80211_wx_get_encode(priv->ieee, info, wrqu, key); | |
9065 | } | |
9066 | ||
bf79451e | 9067 | static int ipw_wx_set_power(struct net_device *dev, |
0edd5b44 JG |
9068 | struct iw_request_info *info, |
9069 | union iwreq_data *wrqu, char *extra) | |
43f66a6c JK |
9070 | { |
9071 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9072 | int err; | |
4644151b | 9073 | mutex_lock(&priv->mutex); |
43f66a6c JK |
9074 | if (wrqu->power.disabled) { |
9075 | priv->power_mode = IPW_POWER_LEVEL(priv->power_mode); | |
9076 | err = ipw_send_power_mode(priv, IPW_POWER_MODE_CAM); | |
9077 | if (err) { | |
9078 | IPW_DEBUG_WX("failed setting power mode.\n"); | |
4644151b | 9079 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
9080 | return err; |
9081 | } | |
43f66a6c | 9082 | IPW_DEBUG_WX("SET Power Management Mode -> off\n"); |
4644151b | 9083 | mutex_unlock(&priv->mutex); |
43f66a6c | 9084 | return 0; |
bf79451e | 9085 | } |
43f66a6c JK |
9086 | |
9087 | switch (wrqu->power.flags & IW_POWER_MODE) { | |
0edd5b44 JG |
9088 | case IW_POWER_ON: /* If not specified */ |
9089 | case IW_POWER_MODE: /* If set all mask */ | |
9090 | case IW_POWER_ALL_R: /* If explicitely state all */ | |
43f66a6c | 9091 | break; |
0edd5b44 | 9092 | default: /* Otherwise we don't support it */ |
43f66a6c JK |
9093 | IPW_DEBUG_WX("SET PM Mode: %X not supported.\n", |
9094 | wrqu->power.flags); | |
4644151b | 9095 | mutex_unlock(&priv->mutex); |
bf79451e | 9096 | return -EOPNOTSUPP; |
43f66a6c | 9097 | } |
bf79451e | 9098 | |
43f66a6c JK |
9099 | /* If the user hasn't specified a power management mode yet, default |
9100 | * to BATTERY */ | |
0edd5b44 | 9101 | if (IPW_POWER_LEVEL(priv->power_mode) == IPW_POWER_AC) |
43f66a6c | 9102 | priv->power_mode = IPW_POWER_ENABLED | IPW_POWER_BATTERY; |
bf79451e | 9103 | else |
43f66a6c JK |
9104 | priv->power_mode = IPW_POWER_ENABLED | priv->power_mode; |
9105 | err = ipw_send_power_mode(priv, IPW_POWER_LEVEL(priv->power_mode)); | |
9106 | if (err) { | |
9107 | IPW_DEBUG_WX("failed setting power mode.\n"); | |
4644151b | 9108 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
9109 | return err; |
9110 | } | |
9111 | ||
0edd5b44 | 9112 | IPW_DEBUG_WX("SET Power Management Mode -> 0x%02X\n", priv->power_mode); |
4644151b | 9113 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
9114 | return 0; |
9115 | } | |
9116 | ||
bf79451e | 9117 | static int ipw_wx_get_power(struct net_device *dev, |
0edd5b44 JG |
9118 | struct iw_request_info *info, |
9119 | union iwreq_data *wrqu, char *extra) | |
43f66a6c JK |
9120 | { |
9121 | struct ipw_priv *priv = ieee80211_priv(dev); | |
4644151b | 9122 | mutex_lock(&priv->mutex); |
a613bffd | 9123 | if (!(priv->power_mode & IPW_POWER_ENABLED)) |
43f66a6c | 9124 | wrqu->power.disabled = 1; |
a613bffd | 9125 | else |
43f66a6c | 9126 | wrqu->power.disabled = 0; |
43f66a6c | 9127 | |
4644151b | 9128 | mutex_unlock(&priv->mutex); |
43f66a6c | 9129 | IPW_DEBUG_WX("GET Power Management Mode -> %02X\n", priv->power_mode); |
bf79451e | 9130 | |
43f66a6c JK |
9131 | return 0; |
9132 | } | |
9133 | ||
bf79451e | 9134 | static int ipw_wx_set_powermode(struct net_device *dev, |
0edd5b44 JG |
9135 | struct iw_request_info *info, |
9136 | union iwreq_data *wrqu, char *extra) | |
43f66a6c JK |
9137 | { |
9138 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9139 | int mode = *(int *)extra; | |
9140 | int err; | |
4644151b | 9141 | mutex_lock(&priv->mutex); |
43f66a6c JK |
9142 | if ((mode < 1) || (mode > IPW_POWER_LIMIT)) { |
9143 | mode = IPW_POWER_AC; | |
9144 | priv->power_mode = mode; | |
9145 | } else { | |
9146 | priv->power_mode = IPW_POWER_ENABLED | mode; | |
9147 | } | |
bf79451e | 9148 | |
43f66a6c JK |
9149 | if (priv->power_mode != mode) { |
9150 | err = ipw_send_power_mode(priv, mode); | |
bf79451e | 9151 | |
43f66a6c JK |
9152 | if (err) { |
9153 | IPW_DEBUG_WX("failed setting power mode.\n"); | |
4644151b | 9154 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
9155 | return err; |
9156 | } | |
9157 | } | |
4644151b | 9158 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
9159 | return 0; |
9160 | } | |
9161 | ||
9162 | #define MAX_WX_STRING 80 | |
bf79451e | 9163 | static int ipw_wx_get_powermode(struct net_device *dev, |
0edd5b44 JG |
9164 | struct iw_request_info *info, |
9165 | union iwreq_data *wrqu, char *extra) | |
43f66a6c JK |
9166 | { |
9167 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9168 | int level = IPW_POWER_LEVEL(priv->power_mode); | |
9169 | char *p = extra; | |
9170 | ||
9171 | p += snprintf(p, MAX_WX_STRING, "Power save level: %d ", level); | |
9172 | ||
9173 | switch (level) { | |
9174 | case IPW_POWER_AC: | |
9175 | p += snprintf(p, MAX_WX_STRING - (p - extra), "(AC)"); | |
9176 | break; | |
9177 | case IPW_POWER_BATTERY: | |
9178 | p += snprintf(p, MAX_WX_STRING - (p - extra), "(BATTERY)"); | |
9179 | break; | |
9180 | default: | |
9181 | p += snprintf(p, MAX_WX_STRING - (p - extra), | |
bf79451e | 9182 | "(Timeout %dms, Period %dms)", |
43f66a6c JK |
9183 | timeout_duration[level - 1] / 1000, |
9184 | period_duration[level - 1] / 1000); | |
9185 | } | |
9186 | ||
9187 | if (!(priv->power_mode & IPW_POWER_ENABLED)) | |
0edd5b44 | 9188 | p += snprintf(p, MAX_WX_STRING - (p - extra), " OFF"); |
43f66a6c JK |
9189 | |
9190 | wrqu->data.length = p - extra + 1; | |
9191 | ||
9192 | return 0; | |
9193 | } | |
9194 | ||
9195 | static int ipw_wx_set_wireless_mode(struct net_device *dev, | |
0edd5b44 JG |
9196 | struct iw_request_info *info, |
9197 | union iwreq_data *wrqu, char *extra) | |
43f66a6c | 9198 | { |
0edd5b44 | 9199 | struct ipw_priv *priv = ieee80211_priv(dev); |
43f66a6c JK |
9200 | int mode = *(int *)extra; |
9201 | u8 band = 0, modulation = 0; | |
9202 | ||
9203 | if (mode == 0 || mode & ~IEEE_MODE_MASK) { | |
0edd5b44 | 9204 | IPW_WARNING("Attempt to set invalid wireless mode: %d\n", mode); |
43f66a6c JK |
9205 | return -EINVAL; |
9206 | } | |
4644151b | 9207 | mutex_lock(&priv->mutex); |
43f66a6c | 9208 | if (priv->adapter == IPW_2915ABG) { |
a33a1982 | 9209 | priv->ieee->abg_true = 1; |
43f66a6c JK |
9210 | if (mode & IEEE_A) { |
9211 | band |= IEEE80211_52GHZ_BAND; | |
9212 | modulation |= IEEE80211_OFDM_MODULATION; | |
9213 | } else | |
a33a1982 | 9214 | priv->ieee->abg_true = 0; |
43f66a6c JK |
9215 | } else { |
9216 | if (mode & IEEE_A) { | |
9217 | IPW_WARNING("Attempt to set 2200BG into " | |
9218 | "802.11a mode\n"); | |
4644151b | 9219 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
9220 | return -EINVAL; |
9221 | } | |
9222 | ||
a33a1982 | 9223 | priv->ieee->abg_true = 0; |
43f66a6c JK |
9224 | } |
9225 | ||
9226 | if (mode & IEEE_B) { | |
9227 | band |= IEEE80211_24GHZ_BAND; | |
9228 | modulation |= IEEE80211_CCK_MODULATION; | |
9229 | } else | |
a33a1982 | 9230 | priv->ieee->abg_true = 0; |
bf79451e | 9231 | |
43f66a6c JK |
9232 | if (mode & IEEE_G) { |
9233 | band |= IEEE80211_24GHZ_BAND; | |
9234 | modulation |= IEEE80211_OFDM_MODULATION; | |
9235 | } else | |
a33a1982 | 9236 | priv->ieee->abg_true = 0; |
43f66a6c JK |
9237 | |
9238 | priv->ieee->mode = mode; | |
9239 | priv->ieee->freq_band = band; | |
9240 | priv->ieee->modulation = modulation; | |
0edd5b44 | 9241 | init_supported_rates(priv, &priv->rates); |
43f66a6c | 9242 | |
c848d0af JK |
9243 | /* Network configuration changed -- force [re]association */ |
9244 | IPW_DEBUG_ASSOC("[re]association triggered due to mode change.\n"); | |
9245 | if (!ipw_disassociate(priv)) { | |
43f66a6c | 9246 | ipw_send_supported_rates(priv, &priv->rates); |
c848d0af JK |
9247 | ipw_associate(priv); |
9248 | } | |
43f66a6c | 9249 | |
a613bffd JK |
9250 | /* Update the band LEDs */ |
9251 | ipw_led_band_on(priv); | |
43f66a6c | 9252 | |
bf79451e | 9253 | IPW_DEBUG_WX("PRIV SET MODE: %c%c%c\n", |
43f66a6c | 9254 | mode & IEEE_A ? 'a' : '.', |
0edd5b44 | 9255 | mode & IEEE_B ? 'b' : '.', mode & IEEE_G ? 'g' : '.'); |
4644151b | 9256 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
9257 | return 0; |
9258 | } | |
9259 | ||
9260 | static int ipw_wx_get_wireless_mode(struct net_device *dev, | |
0edd5b44 JG |
9261 | struct iw_request_info *info, |
9262 | union iwreq_data *wrqu, char *extra) | |
43f66a6c | 9263 | { |
0edd5b44 | 9264 | struct ipw_priv *priv = ieee80211_priv(dev); |
4644151b | 9265 | mutex_lock(&priv->mutex); |
ea2b26e0 JK |
9266 | switch (priv->ieee->mode) { |
9267 | case IEEE_A: | |
43f66a6c JK |
9268 | strncpy(extra, "802.11a (1)", MAX_WX_STRING); |
9269 | break; | |
ea2b26e0 JK |
9270 | case IEEE_B: |
9271 | strncpy(extra, "802.11b (2)", MAX_WX_STRING); | |
9272 | break; | |
9273 | case IEEE_A | IEEE_B: | |
9274 | strncpy(extra, "802.11ab (3)", MAX_WX_STRING); | |
9275 | break; | |
9276 | case IEEE_G: | |
9277 | strncpy(extra, "802.11g (4)", MAX_WX_STRING); | |
9278 | break; | |
9279 | case IEEE_A | IEEE_G: | |
9280 | strncpy(extra, "802.11ag (5)", MAX_WX_STRING); | |
9281 | break; | |
9282 | case IEEE_B | IEEE_G: | |
9283 | strncpy(extra, "802.11bg (6)", MAX_WX_STRING); | |
9284 | break; | |
9285 | case IEEE_A | IEEE_B | IEEE_G: | |
9286 | strncpy(extra, "802.11abg (7)", MAX_WX_STRING); | |
9287 | break; | |
9288 | default: | |
9289 | strncpy(extra, "unknown", MAX_WX_STRING); | |
43f66a6c | 9290 | break; |
bf79451e JG |
9291 | } |
9292 | ||
43f66a6c JK |
9293 | IPW_DEBUG_WX("PRIV GET MODE: %s\n", extra); |
9294 | ||
0edd5b44 | 9295 | wrqu->data.length = strlen(extra) + 1; |
4644151b | 9296 | mutex_unlock(&priv->mutex); |
b095c381 JK |
9297 | |
9298 | return 0; | |
9299 | } | |
9300 | ||
9301 | static int ipw_wx_set_preamble(struct net_device *dev, | |
9302 | struct iw_request_info *info, | |
9303 | union iwreq_data *wrqu, char *extra) | |
9304 | { | |
9305 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9306 | int mode = *(int *)extra; | |
4644151b | 9307 | mutex_lock(&priv->mutex); |
b095c381 JK |
9308 | /* Switching from SHORT -> LONG requires a disassociation */ |
9309 | if (mode == 1) { | |
9310 | if (!(priv->config & CFG_PREAMBLE_LONG)) { | |
9311 | priv->config |= CFG_PREAMBLE_LONG; | |
9312 | ||
9313 | /* Network configuration changed -- force [re]association */ | |
9314 | IPW_DEBUG_ASSOC | |
9315 | ("[re]association triggered due to preamble change.\n"); | |
9316 | if (!ipw_disassociate(priv)) | |
9317 | ipw_associate(priv); | |
9318 | } | |
9319 | goto done; | |
9320 | } | |
43f66a6c | 9321 | |
b095c381 JK |
9322 | if (mode == 0) { |
9323 | priv->config &= ~CFG_PREAMBLE_LONG; | |
9324 | goto done; | |
9325 | } | |
4644151b | 9326 | mutex_unlock(&priv->mutex); |
b095c381 JK |
9327 | return -EINVAL; |
9328 | ||
9329 | done: | |
4644151b | 9330 | mutex_unlock(&priv->mutex); |
b095c381 JK |
9331 | return 0; |
9332 | } | |
9333 | ||
9334 | static int ipw_wx_get_preamble(struct net_device *dev, | |
9335 | struct iw_request_info *info, | |
9336 | union iwreq_data *wrqu, char *extra) | |
9337 | { | |
9338 | struct ipw_priv *priv = ieee80211_priv(dev); | |
4644151b | 9339 | mutex_lock(&priv->mutex); |
b095c381 JK |
9340 | if (priv->config & CFG_PREAMBLE_LONG) |
9341 | snprintf(wrqu->name, IFNAMSIZ, "long (1)"); | |
9342 | else | |
9343 | snprintf(wrqu->name, IFNAMSIZ, "auto (0)"); | |
4644151b | 9344 | mutex_unlock(&priv->mutex); |
0edd5b44 | 9345 | return 0; |
43f66a6c JK |
9346 | } |
9347 | ||
b095c381 JK |
9348 | #ifdef CONFIG_IPW2200_MONITOR |
9349 | static int ipw_wx_set_monitor(struct net_device *dev, | |
bf79451e | 9350 | struct iw_request_info *info, |
43f66a6c | 9351 | union iwreq_data *wrqu, char *extra) |
bf79451e | 9352 | { |
43f66a6c JK |
9353 | struct ipw_priv *priv = ieee80211_priv(dev); |
9354 | int *parms = (int *)extra; | |
9355 | int enable = (parms[0] > 0); | |
4644151b | 9356 | mutex_lock(&priv->mutex); |
b095c381 | 9357 | IPW_DEBUG_WX("SET MONITOR: %d %d\n", enable, parms[1]); |
43f66a6c JK |
9358 | if (enable) { |
9359 | if (priv->ieee->iw_mode != IW_MODE_MONITOR) { | |
24a47dbd MK |
9360 | #ifdef CONFIG_IEEE80211_RADIOTAP |
9361 | priv->net_dev->type = ARPHRD_IEEE80211_RADIOTAP; | |
9362 | #else | |
43f66a6c | 9363 | priv->net_dev->type = ARPHRD_IEEE80211; |
24a47dbd | 9364 | #endif |
b095c381 | 9365 | queue_work(priv->workqueue, &priv->adapter_restart); |
43f66a6c | 9366 | } |
bf79451e | 9367 | |
43f66a6c JK |
9368 | ipw_set_channel(priv, parms[1]); |
9369 | } else { | |
b095c381 | 9370 | if (priv->ieee->iw_mode != IW_MODE_MONITOR) { |
4644151b | 9371 | mutex_unlock(&priv->mutex); |
43f66a6c | 9372 | return 0; |
b095c381 | 9373 | } |
43f66a6c | 9374 | priv->net_dev->type = ARPHRD_ETHER; |
b095c381 | 9375 | queue_work(priv->workqueue, &priv->adapter_restart); |
43f66a6c | 9376 | } |
4644151b | 9377 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
9378 | return 0; |
9379 | } | |
9380 | ||
b095c381 JK |
9381 | #endif // CONFIG_IPW2200_MONITOR |
9382 | ||
bf79451e JG |
9383 | static int ipw_wx_reset(struct net_device *dev, |
9384 | struct iw_request_info *info, | |
43f66a6c | 9385 | union iwreq_data *wrqu, char *extra) |
bf79451e | 9386 | { |
43f66a6c JK |
9387 | struct ipw_priv *priv = ieee80211_priv(dev); |
9388 | IPW_DEBUG_WX("RESET\n"); | |
b095c381 JK |
9389 | queue_work(priv->workqueue, &priv->adapter_restart); |
9390 | return 0; | |
9391 | } | |
9392 | ||
b095c381 JK |
9393 | static int ipw_wx_sw_reset(struct net_device *dev, |
9394 | struct iw_request_info *info, | |
9395 | union iwreq_data *wrqu, char *extra) | |
ea2b26e0 JK |
9396 | { |
9397 | struct ipw_priv *priv = ieee80211_priv(dev); | |
b095c381 JK |
9398 | union iwreq_data wrqu_sec = { |
9399 | .encoding = { | |
9400 | .flags = IW_ENCODE_DISABLED, | |
9401 | }, | |
9402 | }; | |
afbf30a2 | 9403 | int ret; |
c848d0af | 9404 | |
b095c381 | 9405 | IPW_DEBUG_WX("SW_RESET\n"); |
ea2b26e0 | 9406 | |
4644151b | 9407 | mutex_lock(&priv->mutex); |
ea2b26e0 | 9408 | |
d6d5b5c1 | 9409 | ret = ipw_sw_reset(priv, 2); |
afbf30a2 JK |
9410 | if (!ret) { |
9411 | free_firmware(); | |
9412 | ipw_adapter_restart(priv); | |
9413 | } | |
ea2b26e0 | 9414 | |
b095c381 JK |
9415 | /* The SW reset bit might have been toggled on by the 'disable' |
9416 | * module parameter, so take appropriate action */ | |
9417 | ipw_radio_kill_sw(priv, priv->status & STATUS_RF_KILL_SW); | |
ea2b26e0 | 9418 | |
4644151b | 9419 | mutex_unlock(&priv->mutex); |
b095c381 | 9420 | ieee80211_wx_set_encode(priv->ieee, info, &wrqu_sec, NULL); |
4644151b | 9421 | mutex_lock(&priv->mutex); |
bf79451e | 9422 | |
b095c381 JK |
9423 | if (!(priv->status & STATUS_RF_KILL_MASK)) { |
9424 | /* Configuration likely changed -- force [re]association */ | |
9425 | IPW_DEBUG_ASSOC("[re]association triggered due to sw " | |
9426 | "reset.\n"); | |
9427 | if (!ipw_disassociate(priv)) | |
9428 | ipw_associate(priv); | |
43f66a6c | 9429 | } |
b095c381 | 9430 | |
4644151b | 9431 | mutex_unlock(&priv->mutex); |
43f66a6c | 9432 | |
43f66a6c JK |
9433 | return 0; |
9434 | } | |
43f66a6c JK |
9435 | |
9436 | /* Rebase the WE IOCTLs to zero for the handler array */ | |
9437 | #define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT] | |
0edd5b44 | 9438 | static iw_handler ipw_wx_handlers[] = { |
ea2b26e0 JK |
9439 | IW_IOCTL(SIOCGIWNAME) = ipw_wx_get_name, |
9440 | IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq, | |
9441 | IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq, | |
9442 | IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode, | |
9443 | IW_IOCTL(SIOCGIWMODE) = ipw_wx_get_mode, | |
651be26f OH |
9444 | IW_IOCTL(SIOCSIWSENS) = ipw_wx_set_sens, |
9445 | IW_IOCTL(SIOCGIWSENS) = ipw_wx_get_sens, | |
ea2b26e0 JK |
9446 | IW_IOCTL(SIOCGIWRANGE) = ipw_wx_get_range, |
9447 | IW_IOCTL(SIOCSIWAP) = ipw_wx_set_wap, | |
9448 | IW_IOCTL(SIOCGIWAP) = ipw_wx_get_wap, | |
9449 | IW_IOCTL(SIOCSIWSCAN) = ipw_wx_set_scan, | |
9450 | IW_IOCTL(SIOCGIWSCAN) = ipw_wx_get_scan, | |
9451 | IW_IOCTL(SIOCSIWESSID) = ipw_wx_set_essid, | |
9452 | IW_IOCTL(SIOCGIWESSID) = ipw_wx_get_essid, | |
9453 | IW_IOCTL(SIOCSIWNICKN) = ipw_wx_set_nick, | |
9454 | IW_IOCTL(SIOCGIWNICKN) = ipw_wx_get_nick, | |
9455 | IW_IOCTL(SIOCSIWRATE) = ipw_wx_set_rate, | |
9456 | IW_IOCTL(SIOCGIWRATE) = ipw_wx_get_rate, | |
9457 | IW_IOCTL(SIOCSIWRTS) = ipw_wx_set_rts, | |
9458 | IW_IOCTL(SIOCGIWRTS) = ipw_wx_get_rts, | |
9459 | IW_IOCTL(SIOCSIWFRAG) = ipw_wx_set_frag, | |
9460 | IW_IOCTL(SIOCGIWFRAG) = ipw_wx_get_frag, | |
9461 | IW_IOCTL(SIOCSIWTXPOW) = ipw_wx_set_txpow, | |
9462 | IW_IOCTL(SIOCGIWTXPOW) = ipw_wx_get_txpow, | |
9463 | IW_IOCTL(SIOCSIWRETRY) = ipw_wx_set_retry, | |
9464 | IW_IOCTL(SIOCGIWRETRY) = ipw_wx_get_retry, | |
9465 | IW_IOCTL(SIOCSIWENCODE) = ipw_wx_set_encode, | |
9466 | IW_IOCTL(SIOCGIWENCODE) = ipw_wx_get_encode, | |
9467 | IW_IOCTL(SIOCSIWPOWER) = ipw_wx_set_power, | |
9468 | IW_IOCTL(SIOCGIWPOWER) = ipw_wx_get_power, | |
a613bffd JK |
9469 | IW_IOCTL(SIOCSIWSPY) = iw_handler_set_spy, |
9470 | IW_IOCTL(SIOCGIWSPY) = iw_handler_get_spy, | |
9471 | IW_IOCTL(SIOCSIWTHRSPY) = iw_handler_set_thrspy, | |
9472 | IW_IOCTL(SIOCGIWTHRSPY) = iw_handler_get_thrspy, | |
afbf30a2 JK |
9473 | IW_IOCTL(SIOCSIWGENIE) = ipw_wx_set_genie, |
9474 | IW_IOCTL(SIOCGIWGENIE) = ipw_wx_get_genie, | |
9475 | IW_IOCTL(SIOCSIWMLME) = ipw_wx_set_mlme, | |
9476 | IW_IOCTL(SIOCSIWAUTH) = ipw_wx_set_auth, | |
9477 | IW_IOCTL(SIOCGIWAUTH) = ipw_wx_get_auth, | |
9478 | IW_IOCTL(SIOCSIWENCODEEXT) = ipw_wx_set_encodeext, | |
9479 | IW_IOCTL(SIOCGIWENCODEEXT) = ipw_wx_get_encodeext, | |
43f66a6c JK |
9480 | }; |
9481 | ||
b095c381 JK |
9482 | enum { |
9483 | IPW_PRIV_SET_POWER = SIOCIWFIRSTPRIV, | |
9484 | IPW_PRIV_GET_POWER, | |
9485 | IPW_PRIV_SET_MODE, | |
9486 | IPW_PRIV_GET_MODE, | |
9487 | IPW_PRIV_SET_PREAMBLE, | |
9488 | IPW_PRIV_GET_PREAMBLE, | |
9489 | IPW_PRIV_RESET, | |
9490 | IPW_PRIV_SW_RESET, | |
9491 | #ifdef CONFIG_IPW2200_MONITOR | |
9492 | IPW_PRIV_SET_MONITOR, | |
9493 | #endif | |
9494 | }; | |
43f66a6c | 9495 | |
bf79451e | 9496 | static struct iw_priv_args ipw_priv_args[] = { |
43f66a6c | 9497 | { |
0edd5b44 JG |
9498 | .cmd = IPW_PRIV_SET_POWER, |
9499 | .set_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | |
9500 | .name = "set_power"}, | |
43f66a6c | 9501 | { |
0edd5b44 JG |
9502 | .cmd = IPW_PRIV_GET_POWER, |
9503 | .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_WX_STRING, | |
9504 | .name = "get_power"}, | |
43f66a6c | 9505 | { |
0edd5b44 JG |
9506 | .cmd = IPW_PRIV_SET_MODE, |
9507 | .set_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | |
9508 | .name = "set_mode"}, | |
43f66a6c | 9509 | { |
0edd5b44 JG |
9510 | .cmd = IPW_PRIV_GET_MODE, |
9511 | .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_WX_STRING, | |
9512 | .name = "get_mode"}, | |
43f66a6c | 9513 | { |
ea2b26e0 JK |
9514 | .cmd = IPW_PRIV_SET_PREAMBLE, |
9515 | .set_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | |
9516 | .name = "set_preamble"}, | |
9517 | { | |
9518 | .cmd = IPW_PRIV_GET_PREAMBLE, | |
9519 | .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, | |
9520 | .name = "get_preamble"}, | |
43f66a6c | 9521 | { |
0edd5b44 JG |
9522 | IPW_PRIV_RESET, |
9523 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 0, 0, "reset"}, | |
b095c381 JK |
9524 | { |
9525 | IPW_PRIV_SW_RESET, | |
9526 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 0, 0, "sw_reset"}, | |
9527 | #ifdef CONFIG_IPW2200_MONITOR | |
9528 | { | |
9529 | IPW_PRIV_SET_MONITOR, | |
9530 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "monitor"}, | |
9531 | #endif /* CONFIG_IPW2200_MONITOR */ | |
43f66a6c JK |
9532 | }; |
9533 | ||
9534 | static iw_handler ipw_priv_handler[] = { | |
9535 | ipw_wx_set_powermode, | |
9536 | ipw_wx_get_powermode, | |
9537 | ipw_wx_set_wireless_mode, | |
9538 | ipw_wx_get_wireless_mode, | |
ea2b26e0 JK |
9539 | ipw_wx_set_preamble, |
9540 | ipw_wx_get_preamble, | |
bf79451e | 9541 | ipw_wx_reset, |
b095c381 JK |
9542 | ipw_wx_sw_reset, |
9543 | #ifdef CONFIG_IPW2200_MONITOR | |
9544 | ipw_wx_set_monitor, | |
43f66a6c JK |
9545 | #endif |
9546 | }; | |
9547 | ||
0edd5b44 | 9548 | static struct iw_handler_def ipw_wx_handler_def = { |
ea2b26e0 JK |
9549 | .standard = ipw_wx_handlers, |
9550 | .num_standard = ARRAY_SIZE(ipw_wx_handlers), | |
9551 | .num_private = ARRAY_SIZE(ipw_priv_handler), | |
9552 | .num_private_args = ARRAY_SIZE(ipw_priv_args), | |
9553 | .private = ipw_priv_handler, | |
9554 | .private_args = ipw_priv_args, | |
97a78ca9 | 9555 | .get_wireless_stats = ipw_get_wireless_stats, |
43f66a6c JK |
9556 | }; |
9557 | ||
43f66a6c JK |
9558 | /* |
9559 | * Get wireless statistics. | |
9560 | * Called by /proc/net/wireless | |
9561 | * Also called by SIOCGIWSTATS | |
9562 | */ | |
0edd5b44 | 9563 | static struct iw_statistics *ipw_get_wireless_stats(struct net_device *dev) |
43f66a6c JK |
9564 | { |
9565 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9566 | struct iw_statistics *wstats; | |
bf79451e | 9567 | |
43f66a6c JK |
9568 | wstats = &priv->wstats; |
9569 | ||
ea2b26e0 | 9570 | /* if hw is disabled, then ipw_get_ordinal() can't be called. |
afbf30a2 | 9571 | * netdev->get_wireless_stats seems to be called before fw is |
43f66a6c JK |
9572 | * initialized. STATUS_ASSOCIATED will only be set if the hw is up |
9573 | * and associated; if not associcated, the values are all meaningless | |
9574 | * anyway, so set them all to NULL and INVALID */ | |
9575 | if (!(priv->status & STATUS_ASSOCIATED)) { | |
9576 | wstats->miss.beacon = 0; | |
9577 | wstats->discard.retries = 0; | |
9578 | wstats->qual.qual = 0; | |
9579 | wstats->qual.level = 0; | |
9580 | wstats->qual.noise = 0; | |
9581 | wstats->qual.updated = 7; | |
9582 | wstats->qual.updated |= IW_QUAL_NOISE_INVALID | | |
0edd5b44 | 9583 | IW_QUAL_QUAL_INVALID | IW_QUAL_LEVEL_INVALID; |
43f66a6c | 9584 | return wstats; |
bf79451e | 9585 | } |
43f66a6c JK |
9586 | |
9587 | wstats->qual.qual = priv->quality; | |
00d21de5 ZY |
9588 | wstats->qual.level = priv->exp_avg_rssi; |
9589 | wstats->qual.noise = priv->exp_avg_noise; | |
43f66a6c | 9590 | wstats->qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED | |
b191608a | 9591 | IW_QUAL_NOISE_UPDATED | IW_QUAL_DBM; |
43f66a6c JK |
9592 | |
9593 | wstats->miss.beacon = average_value(&priv->average_missed_beacons); | |
9594 | wstats->discard.retries = priv->last_tx_failures; | |
9595 | wstats->discard.code = priv->ieee->ieee_stats.rx_discards_undecryptable; | |
bf79451e | 9596 | |
43f66a6c JK |
9597 | /* if (ipw_get_ordinal(priv, IPW_ORD_STAT_TX_RETRY, &tx_retry, &len)) |
9598 | goto fail_get_ordinal; | |
9599 | wstats->discard.retries += tx_retry; */ | |
bf79451e | 9600 | |
43f66a6c JK |
9601 | return wstats; |
9602 | } | |
9603 | ||
43f66a6c JK |
9604 | /* net device stuff */ |
9605 | ||
858119e1 | 9606 | static void init_sys_config(struct ipw_sys_config *sys_config) |
43f66a6c | 9607 | { |
0edd5b44 | 9608 | memset(sys_config, 0, sizeof(struct ipw_sys_config)); |
810dabd4 | 9609 | sys_config->bt_coexistence = 0; |
43f66a6c JK |
9610 | sys_config->answer_broadcast_ssid_probe = 0; |
9611 | sys_config->accept_all_data_frames = 0; | |
9612 | sys_config->accept_non_directed_frames = 1; | |
9613 | sys_config->exclude_unicast_unencrypted = 0; | |
9614 | sys_config->disable_unicast_decryption = 1; | |
9615 | sys_config->exclude_multicast_unencrypted = 0; | |
9616 | sys_config->disable_multicast_decryption = 1; | |
71de1f3d | 9617 | sys_config->antenna_diversity = CFG_SYS_ANTENNA_SLOW_DIV; |
0edd5b44 | 9618 | sys_config->pass_crc_to_host = 0; /* TODO: See if 1 gives us FCS */ |
43f66a6c | 9619 | sys_config->dot11g_auto_detection = 0; |
bf79451e | 9620 | sys_config->enable_cts_to_self = 0; |
43f66a6c | 9621 | sys_config->bt_coexist_collision_thr = 0; |
c848d0af | 9622 | sys_config->pass_noise_stats_to_host = 1; //1 -- fix for 256 |
12977154 | 9623 | sys_config->silence_threshold = 0x1e; |
43f66a6c JK |
9624 | } |
9625 | ||
9626 | static int ipw_net_open(struct net_device *dev) | |
9627 | { | |
9628 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9629 | IPW_DEBUG_INFO("dev->open\n"); | |
9630 | /* we should be verifying the device is ready to be opened */ | |
4644151b | 9631 | mutex_lock(&priv->mutex); |
bf79451e JG |
9632 | if (!(priv->status & STATUS_RF_KILL_MASK) && |
9633 | (priv->status & STATUS_ASSOCIATED)) | |
43f66a6c | 9634 | netif_start_queue(dev); |
4644151b | 9635 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
9636 | return 0; |
9637 | } | |
9638 | ||
9639 | static int ipw_net_stop(struct net_device *dev) | |
9640 | { | |
9641 | IPW_DEBUG_INFO("dev->close\n"); | |
9642 | netif_stop_queue(dev); | |
9643 | return 0; | |
9644 | } | |
9645 | ||
9646 | /* | |
9647 | todo: | |
9648 | ||
9649 | modify to send one tfd per fragment instead of using chunking. otherwise | |
9650 | we need to heavily modify the ieee80211_skb_to_txb. | |
9651 | */ | |
9652 | ||
858119e1 | 9653 | static int ipw_tx_skb(struct ipw_priv *priv, struct ieee80211_txb *txb, |
227d2dc1 | 9654 | int pri) |
43f66a6c | 9655 | { |
0dacca1f | 9656 | struct ieee80211_hdr_3addr *hdr = (struct ieee80211_hdr_3addr *) |
0edd5b44 | 9657 | txb->fragments[0]->data; |
43f66a6c JK |
9658 | int i = 0; |
9659 | struct tfd_frame *tfd; | |
b095c381 JK |
9660 | #ifdef CONFIG_IPW_QOS |
9661 | int tx_id = ipw_get_tx_queue_number(priv, pri); | |
9662 | struct clx2_tx_queue *txq = &priv->txq[tx_id]; | |
9663 | #else | |
43f66a6c | 9664 | struct clx2_tx_queue *txq = &priv->txq[0]; |
b095c381 | 9665 | #endif |
43f66a6c JK |
9666 | struct clx2_queue *q = &txq->q; |
9667 | u8 id, hdr_len, unicast; | |
9668 | u16 remaining_bytes; | |
c848d0af | 9669 | int fc; |
43f66a6c JK |
9670 | |
9671 | switch (priv->ieee->iw_mode) { | |
9672 | case IW_MODE_ADHOC: | |
9673 | hdr_len = IEEE80211_3ADDR_LEN; | |
3c19065a | 9674 | unicast = !is_multicast_ether_addr(hdr->addr1); |
43f66a6c JK |
9675 | id = ipw_find_station(priv, hdr->addr1); |
9676 | if (id == IPW_INVALID_STATION) { | |
9677 | id = ipw_add_station(priv, hdr->addr1); | |
9678 | if (id == IPW_INVALID_STATION) { | |
9679 | IPW_WARNING("Attempt to send data to " | |
bf79451e | 9680 | "invalid cell: " MAC_FMT "\n", |
43f66a6c JK |
9681 | MAC_ARG(hdr->addr1)); |
9682 | goto drop; | |
9683 | } | |
9684 | } | |
9685 | break; | |
9686 | ||
9687 | case IW_MODE_INFRA: | |
9688 | default: | |
3c19065a | 9689 | unicast = !is_multicast_ether_addr(hdr->addr3); |
43f66a6c JK |
9690 | hdr_len = IEEE80211_3ADDR_LEN; |
9691 | id = 0; | |
9692 | break; | |
9693 | } | |
9694 | ||
9695 | tfd = &txq->bd[q->first_empty]; | |
9696 | txq->txb[q->first_empty] = txb; | |
9697 | memset(tfd, 0, sizeof(*tfd)); | |
9698 | tfd->u.data.station_number = id; | |
9699 | ||
9700 | tfd->control_flags.message_type = TX_FRAME_TYPE; | |
9701 | tfd->control_flags.control_bits = TFD_NEED_IRQ_MASK; | |
9702 | ||
9703 | tfd->u.data.cmd_id = DINO_CMD_TX; | |
a613bffd | 9704 | tfd->u.data.len = cpu_to_le16(txb->payload_size); |
43f66a6c | 9705 | remaining_bytes = txb->payload_size; |
bf79451e | 9706 | |
43f66a6c | 9707 | if (priv->assoc_request.ieee_mode == IPW_B_MODE) |
b095c381 | 9708 | tfd->u.data.tx_flags_ext |= DCT_FLAG_EXT_MODE_CCK; |
43f66a6c | 9709 | else |
b095c381 | 9710 | tfd->u.data.tx_flags_ext |= DCT_FLAG_EXT_MODE_OFDM; |
43f66a6c | 9711 | |
ea2b26e0 JK |
9712 | if (priv->assoc_request.preamble_length == DCT_FLAG_SHORT_PREAMBLE) |
9713 | tfd->u.data.tx_flags |= DCT_FLAG_SHORT_PREAMBLE; | |
43f66a6c | 9714 | |
c848d0af JK |
9715 | fc = le16_to_cpu(hdr->frame_ctl); |
9716 | hdr->frame_ctl = cpu_to_le16(fc & ~IEEE80211_FCTL_MOREFRAGS); | |
43f66a6c JK |
9717 | |
9718 | memcpy(&tfd->u.data.tfd.tfd_24.mchdr, hdr, hdr_len); | |
9719 | ||
b095c381 JK |
9720 | if (likely(unicast)) |
9721 | tfd->u.data.tx_flags |= DCT_FLAG_ACK_REQD; | |
9722 | ||
9723 | if (txb->encrypted && !priv->ieee->host_encrypt) { | |
9724 | switch (priv->ieee->sec.level) { | |
9725 | case SEC_LEVEL_3: | |
9726 | tfd->u.data.tfd.tfd_24.mchdr.frame_ctl |= | |
9727 | IEEE80211_FCTL_PROTECTED; | |
9728 | /* XXX: ACK flag must be set for CCMP even if it | |
9729 | * is a multicast/broadcast packet, because CCMP | |
9730 | * group communication encrypted by GTK is | |
9731 | * actually done by the AP. */ | |
9732 | if (!unicast) | |
9733 | tfd->u.data.tx_flags |= DCT_FLAG_ACK_REQD; | |
9734 | ||
9735 | tfd->u.data.tx_flags &= ~DCT_FLAG_NO_WEP; | |
9736 | tfd->u.data.tx_flags_ext |= DCT_FLAG_EXT_SECURITY_CCM; | |
9737 | tfd->u.data.key_index = 0; | |
9738 | tfd->u.data.key_index |= DCT_WEP_INDEX_USE_IMMEDIATE; | |
9739 | break; | |
9740 | case SEC_LEVEL_2: | |
9741 | tfd->u.data.tfd.tfd_24.mchdr.frame_ctl |= | |
9742 | IEEE80211_FCTL_PROTECTED; | |
9743 | tfd->u.data.tx_flags &= ~DCT_FLAG_NO_WEP; | |
9744 | tfd->u.data.tx_flags_ext |= DCT_FLAG_EXT_SECURITY_TKIP; | |
9745 | tfd->u.data.key_index = DCT_WEP_INDEX_USE_IMMEDIATE; | |
9746 | break; | |
9747 | case SEC_LEVEL_1: | |
9748 | tfd->u.data.tfd.tfd_24.mchdr.frame_ctl |= | |
9749 | IEEE80211_FCTL_PROTECTED; | |
9750 | tfd->u.data.key_index = priv->ieee->tx_keyidx; | |
9751 | if (priv->ieee->sec.key_sizes[priv->ieee->tx_keyidx] <= | |
9752 | 40) | |
9753 | tfd->u.data.key_index |= DCT_WEP_KEY_64Bit; | |
9754 | else | |
9755 | tfd->u.data.key_index |= DCT_WEP_KEY_128Bit; | |
9756 | break; | |
9757 | case SEC_LEVEL_0: | |
9758 | break; | |
9759 | default: | |
9760 | printk(KERN_ERR "Unknow security level %d\n", | |
9761 | priv->ieee->sec.level); | |
9762 | break; | |
9763 | } | |
9764 | } else | |
9765 | /* No hardware encryption */ | |
9766 | tfd->u.data.tx_flags |= DCT_FLAG_NO_WEP; | |
9767 | ||
9768 | #ifdef CONFIG_IPW_QOS | |
9769 | ipw_qos_set_tx_queue_command(priv, pri, &(tfd->u.data), unicast); | |
9770 | #endif /* CONFIG_IPW_QOS */ | |
9771 | ||
43f66a6c | 9772 | /* payload */ |
a613bffd JK |
9773 | tfd->u.data.num_chunks = cpu_to_le32(min((u8) (NUM_TFD_CHUNKS - 2), |
9774 | txb->nr_frags)); | |
9775 | IPW_DEBUG_FRAG("%i fragments being sent as %i chunks.\n", | |
9776 | txb->nr_frags, le32_to_cpu(tfd->u.data.num_chunks)); | |
9777 | for (i = 0; i < le32_to_cpu(tfd->u.data.num_chunks); i++) { | |
9778 | IPW_DEBUG_FRAG("Adding fragment %i of %i (%d bytes).\n", | |
9779 | i, le32_to_cpu(tfd->u.data.num_chunks), | |
9780 | txb->fragments[i]->len - hdr_len); | |
bf79451e | 9781 | IPW_DEBUG_TX("Dumping TX packet frag %i of %i (%d bytes):\n", |
43f66a6c JK |
9782 | i, tfd->u.data.num_chunks, |
9783 | txb->fragments[i]->len - hdr_len); | |
bf79451e | 9784 | printk_buf(IPW_DL_TX, txb->fragments[i]->data + hdr_len, |
43f66a6c JK |
9785 | txb->fragments[i]->len - hdr_len); |
9786 | ||
0edd5b44 | 9787 | tfd->u.data.chunk_ptr[i] = |
a613bffd JK |
9788 | cpu_to_le32(pci_map_single |
9789 | (priv->pci_dev, | |
9790 | txb->fragments[i]->data + hdr_len, | |
9791 | txb->fragments[i]->len - hdr_len, | |
9792 | PCI_DMA_TODEVICE)); | |
9793 | tfd->u.data.chunk_len[i] = | |
9794 | cpu_to_le16(txb->fragments[i]->len - hdr_len); | |
43f66a6c JK |
9795 | } |
9796 | ||
9797 | if (i != txb->nr_frags) { | |
9798 | struct sk_buff *skb; | |
9799 | u16 remaining_bytes = 0; | |
9800 | int j; | |
9801 | ||
9802 | for (j = i; j < txb->nr_frags; j++) | |
9803 | remaining_bytes += txb->fragments[j]->len - hdr_len; | |
9804 | ||
9805 | printk(KERN_INFO "Trying to reallocate for %d bytes\n", | |
9806 | remaining_bytes); | |
9807 | skb = alloc_skb(remaining_bytes, GFP_ATOMIC); | |
9808 | if (skb != NULL) { | |
a613bffd | 9809 | tfd->u.data.chunk_len[i] = cpu_to_le16(remaining_bytes); |
43f66a6c JK |
9810 | for (j = i; j < txb->nr_frags; j++) { |
9811 | int size = txb->fragments[j]->len - hdr_len; | |
afbf30a2 | 9812 | |
43f66a6c | 9813 | printk(KERN_INFO "Adding frag %d %d...\n", |
0edd5b44 | 9814 | j, size); |
43f66a6c | 9815 | memcpy(skb_put(skb, size), |
0edd5b44 | 9816 | txb->fragments[j]->data + hdr_len, size); |
43f66a6c JK |
9817 | } |
9818 | dev_kfree_skb_any(txb->fragments[i]); | |
9819 | txb->fragments[i] = skb; | |
0edd5b44 | 9820 | tfd->u.data.chunk_ptr[i] = |
a613bffd JK |
9821 | cpu_to_le32(pci_map_single |
9822 | (priv->pci_dev, skb->data, | |
9823 | tfd->u.data.chunk_len[i], | |
9824 | PCI_DMA_TODEVICE)); | |
9825 | ||
9826 | tfd->u.data.num_chunks = | |
9827 | cpu_to_le32(le32_to_cpu(tfd->u.data.num_chunks) + | |
9828 | 1); | |
bf79451e | 9829 | } |
43f66a6c JK |
9830 | } |
9831 | ||
9832 | /* kick DMA */ | |
9833 | q->first_empty = ipw_queue_inc_wrap(q->first_empty, q->n_bd); | |
9834 | ipw_write32(priv, q->reg_w, q->first_empty); | |
9835 | ||
f697014a JK |
9836 | if (ipw_queue_space(q) < q->high_mark) |
9837 | netif_stop_queue(priv->net_dev); | |
9838 | ||
227d2dc1 | 9839 | return NETDEV_TX_OK; |
43f66a6c | 9840 | |
0edd5b44 | 9841 | drop: |
43f66a6c JK |
9842 | IPW_DEBUG_DROP("Silently dropping Tx packet.\n"); |
9843 | ieee80211_txb_free(txb); | |
227d2dc1 JK |
9844 | return NETDEV_TX_OK; |
9845 | } | |
9846 | ||
9847 | static int ipw_net_is_queue_full(struct net_device *dev, int pri) | |
9848 | { | |
9849 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9850 | #ifdef CONFIG_IPW_QOS | |
9851 | int tx_id = ipw_get_tx_queue_number(priv, pri); | |
9852 | struct clx2_tx_queue *txq = &priv->txq[tx_id]; | |
9853 | #else | |
9854 | struct clx2_tx_queue *txq = &priv->txq[0]; | |
9855 | #endif /* CONFIG_IPW_QOS */ | |
9856 | ||
9857 | if (ipw_queue_space(&txq->q) < txq->q.high_mark) | |
9858 | return 1; | |
9859 | ||
9860 | return 0; | |
43f66a6c JK |
9861 | } |
9862 | ||
9863 | static int ipw_net_hard_start_xmit(struct ieee80211_txb *txb, | |
c8d42d1a | 9864 | struct net_device *dev, int pri) |
43f66a6c JK |
9865 | { |
9866 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9867 | unsigned long flags; | |
227d2dc1 | 9868 | int ret; |
43f66a6c JK |
9869 | |
9870 | IPW_DEBUG_TX("dev->xmit(%d bytes)\n", txb->payload_size); | |
43f66a6c JK |
9871 | spin_lock_irqsave(&priv->lock, flags); |
9872 | ||
9873 | if (!(priv->status & STATUS_ASSOCIATED)) { | |
9874 | IPW_DEBUG_INFO("Tx attempt while not associated.\n"); | |
9875 | priv->ieee->stats.tx_carrier_errors++; | |
9876 | netif_stop_queue(dev); | |
9877 | goto fail_unlock; | |
9878 | } | |
9879 | ||
227d2dc1 JK |
9880 | ret = ipw_tx_skb(priv, txb, pri); |
9881 | if (ret == NETDEV_TX_OK) | |
9882 | __ipw_led_activity_on(priv); | |
43f66a6c | 9883 | spin_unlock_irqrestore(&priv->lock, flags); |
43f66a6c | 9884 | |
227d2dc1 | 9885 | return ret; |
43f66a6c | 9886 | |
0edd5b44 | 9887 | fail_unlock: |
43f66a6c JK |
9888 | spin_unlock_irqrestore(&priv->lock, flags); |
9889 | return 1; | |
9890 | } | |
9891 | ||
9892 | static struct net_device_stats *ipw_net_get_stats(struct net_device *dev) | |
9893 | { | |
9894 | struct ipw_priv *priv = ieee80211_priv(dev); | |
bf79451e | 9895 | |
43f66a6c JK |
9896 | priv->ieee->stats.tx_packets = priv->tx_packets; |
9897 | priv->ieee->stats.rx_packets = priv->rx_packets; | |
9898 | return &priv->ieee->stats; | |
9899 | } | |
9900 | ||
9901 | static void ipw_net_set_multicast_list(struct net_device *dev) | |
9902 | { | |
9903 | ||
9904 | } | |
9905 | ||
9906 | static int ipw_net_set_mac_address(struct net_device *dev, void *p) | |
9907 | { | |
9908 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9909 | struct sockaddr *addr = p; | |
9910 | if (!is_valid_ether_addr(addr->sa_data)) | |
9911 | return -EADDRNOTAVAIL; | |
4644151b | 9912 | mutex_lock(&priv->mutex); |
43f66a6c JK |
9913 | priv->config |= CFG_CUSTOM_MAC; |
9914 | memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN); | |
9915 | printk(KERN_INFO "%s: Setting MAC to " MAC_FMT "\n", | |
9916 | priv->net_dev->name, MAC_ARG(priv->mac_addr)); | |
a613bffd | 9917 | queue_work(priv->workqueue, &priv->adapter_restart); |
4644151b | 9918 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
9919 | return 0; |
9920 | } | |
9921 | ||
bf79451e | 9922 | static void ipw_ethtool_get_drvinfo(struct net_device *dev, |
43f66a6c JK |
9923 | struct ethtool_drvinfo *info) |
9924 | { | |
9925 | struct ipw_priv *p = ieee80211_priv(dev); | |
9926 | char vers[64]; | |
9927 | char date[32]; | |
9928 | u32 len; | |
9929 | ||
9930 | strcpy(info->driver, DRV_NAME); | |
9931 | strcpy(info->version, DRV_VERSION); | |
9932 | ||
9933 | len = sizeof(vers); | |
9934 | ipw_get_ordinal(p, IPW_ORD_STAT_FW_VERSION, vers, &len); | |
9935 | len = sizeof(date); | |
9936 | ipw_get_ordinal(p, IPW_ORD_STAT_FW_DATE, date, &len); | |
9937 | ||
0edd5b44 | 9938 | snprintf(info->fw_version, sizeof(info->fw_version), "%s (%s)", |
43f66a6c JK |
9939 | vers, date); |
9940 | strcpy(info->bus_info, pci_name(p->pci_dev)); | |
b095c381 | 9941 | info->eedump_len = IPW_EEPROM_IMAGE_SIZE; |
43f66a6c JK |
9942 | } |
9943 | ||
9944 | static u32 ipw_ethtool_get_link(struct net_device *dev) | |
9945 | { | |
9946 | struct ipw_priv *priv = ieee80211_priv(dev); | |
9947 | return (priv->status & STATUS_ASSOCIATED) != 0; | |
9948 | } | |
9949 | ||
9950 | static int ipw_ethtool_get_eeprom_len(struct net_device *dev) | |
9951 | { | |
b095c381 | 9952 | return IPW_EEPROM_IMAGE_SIZE; |
43f66a6c JK |
9953 | } |
9954 | ||
9955 | static int ipw_ethtool_get_eeprom(struct net_device *dev, | |
0edd5b44 | 9956 | struct ethtool_eeprom *eeprom, u8 * bytes) |
43f66a6c JK |
9957 | { |
9958 | struct ipw_priv *p = ieee80211_priv(dev); | |
9959 | ||
b095c381 | 9960 | if (eeprom->offset + eeprom->len > IPW_EEPROM_IMAGE_SIZE) |
43f66a6c | 9961 | return -EINVAL; |
4644151b | 9962 | mutex_lock(&p->mutex); |
afbf30a2 | 9963 | memcpy(bytes, &p->eeprom[eeprom->offset], eeprom->len); |
4644151b | 9964 | mutex_unlock(&p->mutex); |
43f66a6c JK |
9965 | return 0; |
9966 | } | |
9967 | ||
9968 | static int ipw_ethtool_set_eeprom(struct net_device *dev, | |
0edd5b44 | 9969 | struct ethtool_eeprom *eeprom, u8 * bytes) |
43f66a6c JK |
9970 | { |
9971 | struct ipw_priv *p = ieee80211_priv(dev); | |
9972 | int i; | |
9973 | ||
b095c381 | 9974 | if (eeprom->offset + eeprom->len > IPW_EEPROM_IMAGE_SIZE) |
43f66a6c | 9975 | return -EINVAL; |
4644151b | 9976 | mutex_lock(&p->mutex); |
afbf30a2 | 9977 | memcpy(&p->eeprom[eeprom->offset], bytes, eeprom->len); |
71e585fc AB |
9978 | for (i = 0; i < IPW_EEPROM_IMAGE_SIZE; i++) |
9979 | ipw_write8(p, i + IPW_EEPROM_DATA, p->eeprom[i]); | |
4644151b | 9980 | mutex_unlock(&p->mutex); |
43f66a6c JK |
9981 | return 0; |
9982 | } | |
9983 | ||
9984 | static struct ethtool_ops ipw_ethtool_ops = { | |
ea2b26e0 JK |
9985 | .get_link = ipw_ethtool_get_link, |
9986 | .get_drvinfo = ipw_ethtool_get_drvinfo, | |
9987 | .get_eeprom_len = ipw_ethtool_get_eeprom_len, | |
9988 | .get_eeprom = ipw_ethtool_get_eeprom, | |
9989 | .set_eeprom = ipw_ethtool_set_eeprom, | |
43f66a6c JK |
9990 | }; |
9991 | ||
9992 | static irqreturn_t ipw_isr(int irq, void *data, struct pt_regs *regs) | |
9993 | { | |
9994 | struct ipw_priv *priv = data; | |
9995 | u32 inta, inta_mask; | |
bf79451e | 9996 | |
43f66a6c JK |
9997 | if (!priv) |
9998 | return IRQ_NONE; | |
9999 | ||
10000 | spin_lock(&priv->lock); | |
10001 | ||
10002 | if (!(priv->status & STATUS_INT_ENABLED)) { | |
10003 | /* Shared IRQ */ | |
10004 | goto none; | |
10005 | } | |
10006 | ||
b095c381 JK |
10007 | inta = ipw_read32(priv, IPW_INTA_RW); |
10008 | inta_mask = ipw_read32(priv, IPW_INTA_MASK_R); | |
bf79451e | 10009 | |
43f66a6c JK |
10010 | if (inta == 0xFFFFFFFF) { |
10011 | /* Hardware disappeared */ | |
10012 | IPW_WARNING("IRQ INTA == 0xFFFFFFFF\n"); | |
10013 | goto none; | |
10014 | } | |
10015 | ||
b095c381 | 10016 | if (!(inta & (IPW_INTA_MASK_ALL & inta_mask))) { |
43f66a6c JK |
10017 | /* Shared interrupt */ |
10018 | goto none; | |
10019 | } | |
10020 | ||
10021 | /* tell the device to stop sending interrupts */ | |
10022 | ipw_disable_interrupts(priv); | |
bf79451e | 10023 | |
43f66a6c | 10024 | /* ack current interrupts */ |
b095c381 JK |
10025 | inta &= (IPW_INTA_MASK_ALL & inta_mask); |
10026 | ipw_write32(priv, IPW_INTA_RW, inta); | |
bf79451e | 10027 | |
43f66a6c JK |
10028 | /* Cache INTA value for our tasklet */ |
10029 | priv->isr_inta = inta; | |
10030 | ||
10031 | tasklet_schedule(&priv->irq_tasklet); | |
10032 | ||
0edd5b44 | 10033 | spin_unlock(&priv->lock); |
43f66a6c JK |
10034 | |
10035 | return IRQ_HANDLED; | |
0edd5b44 | 10036 | none: |
43f66a6c JK |
10037 | spin_unlock(&priv->lock); |
10038 | return IRQ_NONE; | |
10039 | } | |
10040 | ||
10041 | static void ipw_rf_kill(void *adapter) | |
10042 | { | |
10043 | struct ipw_priv *priv = adapter; | |
10044 | unsigned long flags; | |
bf79451e | 10045 | |
43f66a6c JK |
10046 | spin_lock_irqsave(&priv->lock, flags); |
10047 | ||
10048 | if (rf_kill_active(priv)) { | |
10049 | IPW_DEBUG_RF_KILL("RF Kill active, rescheduling GPIO check\n"); | |
10050 | if (priv->workqueue) | |
10051 | queue_delayed_work(priv->workqueue, | |
10052 | &priv->rf_kill, 2 * HZ); | |
10053 | goto exit_unlock; | |
10054 | } | |
10055 | ||
10056 | /* RF Kill is now disabled, so bring the device back up */ | |
10057 | ||
10058 | if (!(priv->status & STATUS_RF_KILL_MASK)) { | |
10059 | IPW_DEBUG_RF_KILL("HW RF Kill no longer active, restarting " | |
10060 | "device\n"); | |
10061 | ||
10062 | /* we can not do an adapter restart while inside an irq lock */ | |
10063 | queue_work(priv->workqueue, &priv->adapter_restart); | |
bf79451e | 10064 | } else |
43f66a6c JK |
10065 | IPW_DEBUG_RF_KILL("HW RF Kill deactivated. SW RF Kill still " |
10066 | "enabled\n"); | |
10067 | ||
0edd5b44 | 10068 | exit_unlock: |
43f66a6c JK |
10069 | spin_unlock_irqrestore(&priv->lock, flags); |
10070 | } | |
10071 | ||
c848d0af JK |
10072 | static void ipw_bg_rf_kill(void *data) |
10073 | { | |
10074 | struct ipw_priv *priv = data; | |
4644151b | 10075 | mutex_lock(&priv->mutex); |
c848d0af | 10076 | ipw_rf_kill(data); |
4644151b | 10077 | mutex_unlock(&priv->mutex); |
c848d0af JK |
10078 | } |
10079 | ||
a73e22b2 | 10080 | static void ipw_link_up(struct ipw_priv *priv) |
a613bffd | 10081 | { |
afbf30a2 JK |
10082 | priv->last_seq_num = -1; |
10083 | priv->last_frag_num = -1; | |
10084 | priv->last_packet_time = 0; | |
10085 | ||
a613bffd JK |
10086 | netif_carrier_on(priv->net_dev); |
10087 | if (netif_queue_stopped(priv->net_dev)) { | |
10088 | IPW_DEBUG_NOTIF("waking queue\n"); | |
10089 | netif_wake_queue(priv->net_dev); | |
10090 | } else { | |
10091 | IPW_DEBUG_NOTIF("starting queue\n"); | |
10092 | netif_start_queue(priv->net_dev); | |
10093 | } | |
10094 | ||
c848d0af | 10095 | cancel_delayed_work(&priv->request_scan); |
a613bffd JK |
10096 | ipw_reset_stats(priv); |
10097 | /* Ensure the rate is updated immediately */ | |
10098 | priv->last_rate = ipw_get_current_rate(priv); | |
10099 | ipw_gather_stats(priv); | |
10100 | ipw_led_link_up(priv); | |
10101 | notify_wx_assoc_event(priv); | |
10102 | ||
10103 | if (priv->config & CFG_BACKGROUND_SCAN) | |
10104 | queue_delayed_work(priv->workqueue, &priv->request_scan, HZ); | |
10105 | } | |
10106 | ||
c848d0af JK |
10107 | static void ipw_bg_link_up(void *data) |
10108 | { | |
10109 | struct ipw_priv *priv = data; | |
4644151b | 10110 | mutex_lock(&priv->mutex); |
c848d0af | 10111 | ipw_link_up(data); |
4644151b | 10112 | mutex_unlock(&priv->mutex); |
c848d0af JK |
10113 | } |
10114 | ||
a73e22b2 | 10115 | static void ipw_link_down(struct ipw_priv *priv) |
a613bffd JK |
10116 | { |
10117 | ipw_led_link_down(priv); | |
10118 | netif_carrier_off(priv->net_dev); | |
10119 | netif_stop_queue(priv->net_dev); | |
10120 | notify_wx_assoc_event(priv); | |
10121 | ||
10122 | /* Cancel any queued work ... */ | |
10123 | cancel_delayed_work(&priv->request_scan); | |
10124 | cancel_delayed_work(&priv->adhoc_check); | |
10125 | cancel_delayed_work(&priv->gather_stats); | |
10126 | ||
10127 | ipw_reset_stats(priv); | |
10128 | ||
afbf30a2 JK |
10129 | if (!(priv->status & STATUS_EXIT_PENDING)) { |
10130 | /* Queue up another scan... */ | |
10131 | queue_work(priv->workqueue, &priv->request_scan); | |
10132 | } | |
a613bffd JK |
10133 | } |
10134 | ||
c848d0af JK |
10135 | static void ipw_bg_link_down(void *data) |
10136 | { | |
10137 | struct ipw_priv *priv = data; | |
4644151b | 10138 | mutex_lock(&priv->mutex); |
c848d0af | 10139 | ipw_link_down(data); |
4644151b | 10140 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
10141 | } |
10142 | ||
10143 | static int ipw_setup_deferred_work(struct ipw_priv *priv) | |
10144 | { | |
10145 | int ret = 0; | |
10146 | ||
43f66a6c | 10147 | priv->workqueue = create_workqueue(DRV_NAME); |
43f66a6c | 10148 | init_waitqueue_head(&priv->wait_command_queue); |
afbf30a2 | 10149 | init_waitqueue_head(&priv->wait_state); |
43f66a6c | 10150 | |
c848d0af JK |
10151 | INIT_WORK(&priv->adhoc_check, ipw_bg_adhoc_check, priv); |
10152 | INIT_WORK(&priv->associate, ipw_bg_associate, priv); | |
10153 | INIT_WORK(&priv->disassociate, ipw_bg_disassociate, priv); | |
d8bad6df | 10154 | INIT_WORK(&priv->system_config, ipw_system_config, priv); |
c848d0af JK |
10155 | INIT_WORK(&priv->rx_replenish, ipw_bg_rx_queue_replenish, priv); |
10156 | INIT_WORK(&priv->adapter_restart, ipw_bg_adapter_restart, priv); | |
10157 | INIT_WORK(&priv->rf_kill, ipw_bg_rf_kill, priv); | |
10158 | INIT_WORK(&priv->up, (void (*)(void *))ipw_bg_up, priv); | |
10159 | INIT_WORK(&priv->down, (void (*)(void *))ipw_bg_down, priv); | |
bf79451e | 10160 | INIT_WORK(&priv->request_scan, |
43f66a6c | 10161 | (void (*)(void *))ipw_request_scan, priv); |
bf79451e | 10162 | INIT_WORK(&priv->gather_stats, |
c848d0af JK |
10163 | (void (*)(void *))ipw_bg_gather_stats, priv); |
10164 | INIT_WORK(&priv->abort_scan, (void (*)(void *))ipw_bg_abort_scan, priv); | |
10165 | INIT_WORK(&priv->roam, ipw_bg_roam, priv); | |
10166 | INIT_WORK(&priv->scan_check, ipw_bg_scan_check, priv); | |
10167 | INIT_WORK(&priv->link_up, (void (*)(void *))ipw_bg_link_up, priv); | |
10168 | INIT_WORK(&priv->link_down, (void (*)(void *))ipw_bg_link_down, priv); | |
10169 | INIT_WORK(&priv->led_link_on, (void (*)(void *))ipw_bg_led_link_on, | |
10170 | priv); | |
10171 | INIT_WORK(&priv->led_link_off, (void (*)(void *))ipw_bg_led_link_off, | |
a613bffd | 10172 | priv); |
c848d0af | 10173 | INIT_WORK(&priv->led_act_off, (void (*)(void *))ipw_bg_led_activity_off, |
a613bffd | 10174 | priv); |
c848d0af JK |
10175 | INIT_WORK(&priv->merge_networks, |
10176 | (void (*)(void *))ipw_merge_adhoc_network, priv); | |
43f66a6c | 10177 | |
b095c381 JK |
10178 | #ifdef CONFIG_IPW_QOS |
10179 | INIT_WORK(&priv->qos_activate, (void (*)(void *))ipw_bg_qos_activate, | |
10180 | priv); | |
10181 | #endif /* CONFIG_IPW_QOS */ | |
43f66a6c JK |
10182 | |
10183 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
10184 | ipw_irq_tasklet, (unsigned long)priv); | |
10185 | ||
10186 | return ret; | |
10187 | } | |
10188 | ||
43f66a6c JK |
10189 | static void shim__set_security(struct net_device *dev, |
10190 | struct ieee80211_security *sec) | |
10191 | { | |
10192 | struct ipw_priv *priv = ieee80211_priv(dev); | |
10193 | int i; | |
bf79451e | 10194 | for (i = 0; i < 4; i++) { |
43f66a6c | 10195 | if (sec->flags & (1 << i)) { |
afbf30a2 | 10196 | priv->ieee->sec.encode_alg[i] = sec->encode_alg[i]; |
b095c381 | 10197 | priv->ieee->sec.key_sizes[i] = sec->key_sizes[i]; |
43f66a6c | 10198 | if (sec->key_sizes[i] == 0) |
b095c381 JK |
10199 | priv->ieee->sec.flags &= ~(1 << i); |
10200 | else { | |
10201 | memcpy(priv->ieee->sec.keys[i], sec->keys[i], | |
43f66a6c | 10202 | sec->key_sizes[i]); |
b095c381 JK |
10203 | priv->ieee->sec.flags |= (1 << i); |
10204 | } | |
43f66a6c | 10205 | priv->status |= STATUS_SECURITY_UPDATED; |
b095c381 JK |
10206 | } else if (sec->level != SEC_LEVEL_1) |
10207 | priv->ieee->sec.flags &= ~(1 << i); | |
43f66a6c JK |
10208 | } |
10209 | ||
b095c381 | 10210 | if (sec->flags & SEC_ACTIVE_KEY) { |
43f66a6c | 10211 | if (sec->active_key <= 3) { |
b095c381 JK |
10212 | priv->ieee->sec.active_key = sec->active_key; |
10213 | priv->ieee->sec.flags |= SEC_ACTIVE_KEY; | |
bf79451e | 10214 | } else |
b095c381 | 10215 | priv->ieee->sec.flags &= ~SEC_ACTIVE_KEY; |
43f66a6c | 10216 | priv->status |= STATUS_SECURITY_UPDATED; |
b095c381 JK |
10217 | } else |
10218 | priv->ieee->sec.flags &= ~SEC_ACTIVE_KEY; | |
43f66a6c JK |
10219 | |
10220 | if ((sec->flags & SEC_AUTH_MODE) && | |
b095c381 JK |
10221 | (priv->ieee->sec.auth_mode != sec->auth_mode)) { |
10222 | priv->ieee->sec.auth_mode = sec->auth_mode; | |
10223 | priv->ieee->sec.flags |= SEC_AUTH_MODE; | |
43f66a6c JK |
10224 | if (sec->auth_mode == WLAN_AUTH_SHARED_KEY) |
10225 | priv->capability |= CAP_SHARED_KEY; | |
10226 | else | |
10227 | priv->capability &= ~CAP_SHARED_KEY; | |
10228 | priv->status |= STATUS_SECURITY_UPDATED; | |
10229 | } | |
bf79451e | 10230 | |
b095c381 JK |
10231 | if (sec->flags & SEC_ENABLED && priv->ieee->sec.enabled != sec->enabled) { |
10232 | priv->ieee->sec.flags |= SEC_ENABLED; | |
10233 | priv->ieee->sec.enabled = sec->enabled; | |
43f66a6c | 10234 | priv->status |= STATUS_SECURITY_UPDATED; |
bf79451e | 10235 | if (sec->enabled) |
43f66a6c JK |
10236 | priv->capability |= CAP_PRIVACY_ON; |
10237 | else | |
10238 | priv->capability &= ~CAP_PRIVACY_ON; | |
10239 | } | |
bf79451e | 10240 | |
afbf30a2 JK |
10241 | if (sec->flags & SEC_ENCRYPT) |
10242 | priv->ieee->sec.encrypt = sec->encrypt; | |
bf79451e | 10243 | |
b095c381 JK |
10244 | if (sec->flags & SEC_LEVEL && priv->ieee->sec.level != sec->level) { |
10245 | priv->ieee->sec.level = sec->level; | |
10246 | priv->ieee->sec.flags |= SEC_LEVEL; | |
43f66a6c JK |
10247 | priv->status |= STATUS_SECURITY_UPDATED; |
10248 | } | |
10249 | ||
1fbfea54 ZY |
10250 | if (!priv->ieee->host_encrypt && (sec->flags & SEC_ENCRYPT)) |
10251 | ipw_set_hwcrypto_keys(priv); | |
10252 | ||
bf79451e JG |
10253 | /* To match current functionality of ipw2100 (which works well w/ |
10254 | * various supplicants, we don't force a disassociate if the | |
43f66a6c JK |
10255 | * privacy capability changes ... */ |
10256 | #if 0 | |
10257 | if ((priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) && | |
bf79451e | 10258 | (((priv->assoc_request.capability & |
43f66a6c | 10259 | WLAN_CAPABILITY_PRIVACY) && !sec->enabled) || |
bf79451e | 10260 | (!(priv->assoc_request.capability & |
0edd5b44 | 10261 | WLAN_CAPABILITY_PRIVACY) && sec->enabled))) { |
43f66a6c JK |
10262 | IPW_DEBUG_ASSOC("Disassociating due to capability " |
10263 | "change.\n"); | |
10264 | ipw_disassociate(priv); | |
10265 | } | |
10266 | #endif | |
10267 | } | |
10268 | ||
bf79451e | 10269 | static int init_supported_rates(struct ipw_priv *priv, |
43f66a6c JK |
10270 | struct ipw_supported_rates *rates) |
10271 | { | |
10272 | /* TODO: Mask out rates based on priv->rates_mask */ | |
10273 | ||
10274 | memset(rates, 0, sizeof(*rates)); | |
0edd5b44 | 10275 | /* configure supported rates */ |
43f66a6c JK |
10276 | switch (priv->ieee->freq_band) { |
10277 | case IEEE80211_52GHZ_BAND: | |
10278 | rates->ieee_mode = IPW_A_MODE; | |
10279 | rates->purpose = IPW_RATE_CAPABILITIES; | |
10280 | ipw_add_ofdm_scan_rates(rates, IEEE80211_CCK_MODULATION, | |
10281 | IEEE80211_OFDM_DEFAULT_RATES_MASK); | |
10282 | break; | |
10283 | ||
0edd5b44 | 10284 | default: /* Mixed or 2.4Ghz */ |
43f66a6c JK |
10285 | rates->ieee_mode = IPW_G_MODE; |
10286 | rates->purpose = IPW_RATE_CAPABILITIES; | |
10287 | ipw_add_cck_scan_rates(rates, IEEE80211_CCK_MODULATION, | |
10288 | IEEE80211_CCK_DEFAULT_RATES_MASK); | |
10289 | if (priv->ieee->modulation & IEEE80211_OFDM_MODULATION) { | |
10290 | ipw_add_ofdm_scan_rates(rates, IEEE80211_CCK_MODULATION, | |
10291 | IEEE80211_OFDM_DEFAULT_RATES_MASK); | |
10292 | } | |
10293 | break; | |
10294 | } | |
10295 | ||
10296 | return 0; | |
10297 | } | |
10298 | ||
bf79451e | 10299 | static int ipw_config(struct ipw_priv *priv) |
43f66a6c | 10300 | { |
43f66a6c JK |
10301 | /* This is only called from ipw_up, which resets/reloads the firmware |
10302 | so, we don't need to first disable the card before we configure | |
10303 | it */ | |
6de9f7f2 | 10304 | if (ipw_set_tx_power(priv)) |
43f66a6c JK |
10305 | goto error; |
10306 | ||
10307 | /* initialize adapter address */ | |
10308 | if (ipw_send_adapter_address(priv, priv->net_dev->dev_addr)) | |
10309 | goto error; | |
10310 | ||
10311 | /* set basic system config settings */ | |
10312 | init_sys_config(&priv->sys_config); | |
810dabd4 ZY |
10313 | |
10314 | /* Support Bluetooth if we have BT h/w on board, and user wants to. | |
10315 | * Does not support BT priority yet (don't abort or defer our Tx) */ | |
10316 | if (bt_coexist) { | |
2638bc39 | 10317 | unsigned char bt_caps = priv->eeprom[EEPROM_SKU_CAPABILITY]; |
810dabd4 ZY |
10318 | |
10319 | if (bt_caps & EEPROM_SKU_CAP_BT_CHANNEL_SIG) | |
10320 | priv->sys_config.bt_coexistence | |
2638bc39 | 10321 | |= CFG_BT_COEXISTENCE_SIGNAL_CHNL; |
810dabd4 ZY |
10322 | if (bt_caps & EEPROM_SKU_CAP_BT_OOB) |
10323 | priv->sys_config.bt_coexistence | |
2638bc39 | 10324 | |= CFG_BT_COEXISTENCE_OOB; |
810dabd4 ZY |
10325 | } |
10326 | ||
c848d0af JK |
10327 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) |
10328 | priv->sys_config.answer_broadcast_ssid_probe = 1; | |
10329 | else | |
10330 | priv->sys_config.answer_broadcast_ssid_probe = 0; | |
10331 | ||
43f66a6c JK |
10332 | if (ipw_send_system_config(priv, &priv->sys_config)) |
10333 | goto error; | |
10334 | ||
0edd5b44 JG |
10335 | init_supported_rates(priv, &priv->rates); |
10336 | if (ipw_send_supported_rates(priv, &priv->rates)) | |
43f66a6c JK |
10337 | goto error; |
10338 | ||
10339 | /* Set request-to-send threshold */ | |
10340 | if (priv->rts_threshold) { | |
10341 | if (ipw_send_rts_threshold(priv, priv->rts_threshold)) | |
10342 | goto error; | |
10343 | } | |
b095c381 JK |
10344 | #ifdef CONFIG_IPW_QOS |
10345 | IPW_DEBUG_QOS("QoS: call ipw_qos_activate\n"); | |
10346 | ipw_qos_activate(priv, NULL); | |
10347 | #endif /* CONFIG_IPW_QOS */ | |
43f66a6c JK |
10348 | |
10349 | if (ipw_set_random_seed(priv)) | |
10350 | goto error; | |
bf79451e | 10351 | |
43f66a6c JK |
10352 | /* final state transition to the RUN state */ |
10353 | if (ipw_send_host_complete(priv)) | |
10354 | goto error; | |
10355 | ||
e666619e JK |
10356 | priv->status |= STATUS_INIT; |
10357 | ||
10358 | ipw_led_init(priv); | |
10359 | ipw_led_radio_on(priv); | |
10360 | priv->notif_missed_beacons = 0; | |
10361 | ||
10362 | /* Set hardware WEP key if it is configured. */ | |
10363 | if ((priv->capability & CAP_PRIVACY_ON) && | |
10364 | (priv->ieee->sec.level == SEC_LEVEL_1) && | |
10365 | !(priv->ieee->host_encrypt || priv->ieee->host_decrypt)) | |
10366 | ipw_set_hwcrypto_keys(priv); | |
43f66a6c JK |
10367 | |
10368 | return 0; | |
bf79451e | 10369 | |
0edd5b44 | 10370 | error: |
43f66a6c JK |
10371 | return -EIO; |
10372 | } | |
10373 | ||
4f36f808 JK |
10374 | /* |
10375 | * NOTE: | |
10376 | * | |
10377 | * These tables have been tested in conjunction with the | |
10378 | * Intel PRO/Wireless 2200BG and 2915ABG Network Connection Adapters. | |
10379 | * | |
10380 | * Altering this values, using it on other hardware, or in geographies | |
10381 | * not intended for resale of the above mentioned Intel adapters has | |
10382 | * not been tested. | |
10383 | * | |
48a84770 HBA |
10384 | * Remember to update the table in README.ipw2200 when changing this |
10385 | * table. | |
10386 | * | |
4f36f808 JK |
10387 | */ |
10388 | static const struct ieee80211_geo ipw_geos[] = { | |
10389 | { /* Restricted */ | |
10390 | "---", | |
10391 | .bg_channels = 11, | |
10392 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10393 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10394 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10395 | {2457, 10}, {2462, 11}}, | |
10396 | }, | |
10397 | ||
10398 | { /* Custom US/Canada */ | |
10399 | "ZZF", | |
10400 | .bg_channels = 11, | |
10401 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10402 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10403 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10404 | {2457, 10}, {2462, 11}}, | |
10405 | .a_channels = 8, | |
10406 | .a = {{5180, 36}, | |
10407 | {5200, 40}, | |
10408 | {5220, 44}, | |
10409 | {5240, 48}, | |
10410 | {5260, 52, IEEE80211_CH_PASSIVE_ONLY}, | |
10411 | {5280, 56, IEEE80211_CH_PASSIVE_ONLY}, | |
10412 | {5300, 60, IEEE80211_CH_PASSIVE_ONLY}, | |
10413 | {5320, 64, IEEE80211_CH_PASSIVE_ONLY}}, | |
10414 | }, | |
10415 | ||
10416 | { /* Rest of World */ | |
10417 | "ZZD", | |
10418 | .bg_channels = 13, | |
10419 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10420 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10421 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10422 | {2457, 10}, {2462, 11}, {2467, 12}, | |
10423 | {2472, 13}}, | |
10424 | }, | |
10425 | ||
10426 | { /* Custom USA & Europe & High */ | |
10427 | "ZZA", | |
10428 | .bg_channels = 11, | |
10429 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10430 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10431 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10432 | {2457, 10}, {2462, 11}}, | |
10433 | .a_channels = 13, | |
10434 | .a = {{5180, 36}, | |
10435 | {5200, 40}, | |
10436 | {5220, 44}, | |
10437 | {5240, 48}, | |
10438 | {5260, 52, IEEE80211_CH_PASSIVE_ONLY}, | |
10439 | {5280, 56, IEEE80211_CH_PASSIVE_ONLY}, | |
10440 | {5300, 60, IEEE80211_CH_PASSIVE_ONLY}, | |
10441 | {5320, 64, IEEE80211_CH_PASSIVE_ONLY}, | |
10442 | {5745, 149}, | |
10443 | {5765, 153}, | |
10444 | {5785, 157}, | |
10445 | {5805, 161}, | |
10446 | {5825, 165}}, | |
10447 | }, | |
10448 | ||
10449 | { /* Custom NA & Europe */ | |
10450 | "ZZB", | |
10451 | .bg_channels = 11, | |
10452 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10453 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10454 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10455 | {2457, 10}, {2462, 11}}, | |
10456 | .a_channels = 13, | |
10457 | .a = {{5180, 36}, | |
10458 | {5200, 40}, | |
10459 | {5220, 44}, | |
10460 | {5240, 48}, | |
10461 | {5260, 52, IEEE80211_CH_PASSIVE_ONLY}, | |
10462 | {5280, 56, IEEE80211_CH_PASSIVE_ONLY}, | |
10463 | {5300, 60, IEEE80211_CH_PASSIVE_ONLY}, | |
10464 | {5320, 64, IEEE80211_CH_PASSIVE_ONLY}, | |
10465 | {5745, 149, IEEE80211_CH_PASSIVE_ONLY}, | |
10466 | {5765, 153, IEEE80211_CH_PASSIVE_ONLY}, | |
10467 | {5785, 157, IEEE80211_CH_PASSIVE_ONLY}, | |
10468 | {5805, 161, IEEE80211_CH_PASSIVE_ONLY}, | |
10469 | {5825, 165, IEEE80211_CH_PASSIVE_ONLY}}, | |
10470 | }, | |
10471 | ||
10472 | { /* Custom Japan */ | |
10473 | "ZZC", | |
10474 | .bg_channels = 11, | |
10475 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10476 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10477 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10478 | {2457, 10}, {2462, 11}}, | |
10479 | .a_channels = 4, | |
10480 | .a = {{5170, 34}, {5190, 38}, | |
10481 | {5210, 42}, {5230, 46}}, | |
10482 | }, | |
10483 | ||
10484 | { /* Custom */ | |
10485 | "ZZM", | |
10486 | .bg_channels = 11, | |
10487 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10488 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10489 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10490 | {2457, 10}, {2462, 11}}, | |
10491 | }, | |
10492 | ||
10493 | { /* Europe */ | |
10494 | "ZZE", | |
10495 | .bg_channels = 13, | |
10496 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10497 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10498 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10499 | {2457, 10}, {2462, 11}, {2467, 12}, | |
10500 | {2472, 13}}, | |
10501 | .a_channels = 19, | |
10502 | .a = {{5180, 36}, | |
10503 | {5200, 40}, | |
10504 | {5220, 44}, | |
10505 | {5240, 48}, | |
10506 | {5260, 52, IEEE80211_CH_PASSIVE_ONLY}, | |
10507 | {5280, 56, IEEE80211_CH_PASSIVE_ONLY}, | |
10508 | {5300, 60, IEEE80211_CH_PASSIVE_ONLY}, | |
10509 | {5320, 64, IEEE80211_CH_PASSIVE_ONLY}, | |
10510 | {5500, 100, IEEE80211_CH_PASSIVE_ONLY}, | |
10511 | {5520, 104, IEEE80211_CH_PASSIVE_ONLY}, | |
10512 | {5540, 108, IEEE80211_CH_PASSIVE_ONLY}, | |
10513 | {5560, 112, IEEE80211_CH_PASSIVE_ONLY}, | |
10514 | {5580, 116, IEEE80211_CH_PASSIVE_ONLY}, | |
10515 | {5600, 120, IEEE80211_CH_PASSIVE_ONLY}, | |
10516 | {5620, 124, IEEE80211_CH_PASSIVE_ONLY}, | |
10517 | {5640, 128, IEEE80211_CH_PASSIVE_ONLY}, | |
10518 | {5660, 132, IEEE80211_CH_PASSIVE_ONLY}, | |
10519 | {5680, 136, IEEE80211_CH_PASSIVE_ONLY}, | |
10520 | {5700, 140, IEEE80211_CH_PASSIVE_ONLY}}, | |
10521 | }, | |
10522 | ||
10523 | { /* Custom Japan */ | |
10524 | "ZZJ", | |
10525 | .bg_channels = 14, | |
10526 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10527 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10528 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10529 | {2457, 10}, {2462, 11}, {2467, 12}, | |
10530 | {2472, 13}, {2484, 14, IEEE80211_CH_B_ONLY}}, | |
10531 | .a_channels = 4, | |
10532 | .a = {{5170, 34}, {5190, 38}, | |
10533 | {5210, 42}, {5230, 46}}, | |
10534 | }, | |
10535 | ||
03520576 JK |
10536 | { /* Rest of World */ |
10537 | "ZZR", | |
10538 | .bg_channels = 14, | |
10539 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10540 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10541 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10542 | {2457, 10}, {2462, 11}, {2467, 12}, | |
10543 | {2472, 13}, {2484, 14, IEEE80211_CH_B_ONLY | | |
10544 | IEEE80211_CH_PASSIVE_ONLY}}, | |
10545 | }, | |
10546 | ||
4f36f808 JK |
10547 | { /* High Band */ |
10548 | "ZZH", | |
10549 | .bg_channels = 13, | |
10550 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10551 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10552 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10553 | {2457, 10}, {2462, 11}, | |
10554 | {2467, 12, IEEE80211_CH_PASSIVE_ONLY}, | |
10555 | {2472, 13, IEEE80211_CH_PASSIVE_ONLY}}, | |
10556 | .a_channels = 4, | |
10557 | .a = {{5745, 149}, {5765, 153}, | |
10558 | {5785, 157}, {5805, 161}}, | |
10559 | }, | |
10560 | ||
10561 | { /* Custom Europe */ | |
10562 | "ZZG", | |
10563 | .bg_channels = 13, | |
10564 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10565 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10566 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10567 | {2457, 10}, {2462, 11}, | |
10568 | {2467, 12}, {2472, 13}}, | |
10569 | .a_channels = 4, | |
10570 | .a = {{5180, 36}, {5200, 40}, | |
10571 | {5220, 44}, {5240, 48}}, | |
10572 | }, | |
10573 | ||
10574 | { /* Europe */ | |
10575 | "ZZK", | |
10576 | .bg_channels = 13, | |
10577 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10578 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10579 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10580 | {2457, 10}, {2462, 11}, | |
10581 | {2467, 12, IEEE80211_CH_PASSIVE_ONLY}, | |
10582 | {2472, 13, IEEE80211_CH_PASSIVE_ONLY}}, | |
10583 | .a_channels = 24, | |
10584 | .a = {{5180, 36, IEEE80211_CH_PASSIVE_ONLY}, | |
10585 | {5200, 40, IEEE80211_CH_PASSIVE_ONLY}, | |
10586 | {5220, 44, IEEE80211_CH_PASSIVE_ONLY}, | |
10587 | {5240, 48, IEEE80211_CH_PASSIVE_ONLY}, | |
10588 | {5260, 52, IEEE80211_CH_PASSIVE_ONLY}, | |
10589 | {5280, 56, IEEE80211_CH_PASSIVE_ONLY}, | |
10590 | {5300, 60, IEEE80211_CH_PASSIVE_ONLY}, | |
10591 | {5320, 64, IEEE80211_CH_PASSIVE_ONLY}, | |
10592 | {5500, 100, IEEE80211_CH_PASSIVE_ONLY}, | |
10593 | {5520, 104, IEEE80211_CH_PASSIVE_ONLY}, | |
10594 | {5540, 108, IEEE80211_CH_PASSIVE_ONLY}, | |
10595 | {5560, 112, IEEE80211_CH_PASSIVE_ONLY}, | |
10596 | {5580, 116, IEEE80211_CH_PASSIVE_ONLY}, | |
10597 | {5600, 120, IEEE80211_CH_PASSIVE_ONLY}, | |
10598 | {5620, 124, IEEE80211_CH_PASSIVE_ONLY}, | |
10599 | {5640, 128, IEEE80211_CH_PASSIVE_ONLY}, | |
10600 | {5660, 132, IEEE80211_CH_PASSIVE_ONLY}, | |
10601 | {5680, 136, IEEE80211_CH_PASSIVE_ONLY}, | |
10602 | {5700, 140, IEEE80211_CH_PASSIVE_ONLY}, | |
10603 | {5745, 149, IEEE80211_CH_PASSIVE_ONLY}, | |
10604 | {5765, 153, IEEE80211_CH_PASSIVE_ONLY}, | |
10605 | {5785, 157, IEEE80211_CH_PASSIVE_ONLY}, | |
10606 | {5805, 161, IEEE80211_CH_PASSIVE_ONLY}, | |
10607 | {5825, 165, IEEE80211_CH_PASSIVE_ONLY}}, | |
10608 | }, | |
10609 | ||
10610 | { /* Europe */ | |
10611 | "ZZL", | |
10612 | .bg_channels = 11, | |
10613 | .bg = {{2412, 1}, {2417, 2}, {2422, 3}, | |
10614 | {2427, 4}, {2432, 5}, {2437, 6}, | |
10615 | {2442, 7}, {2447, 8}, {2452, 9}, | |
10616 | {2457, 10}, {2462, 11}}, | |
10617 | .a_channels = 13, | |
10618 | .a = {{5180, 36, IEEE80211_CH_PASSIVE_ONLY}, | |
10619 | {5200, 40, IEEE80211_CH_PASSIVE_ONLY}, | |
10620 | {5220, 44, IEEE80211_CH_PASSIVE_ONLY}, | |
10621 | {5240, 48, IEEE80211_CH_PASSIVE_ONLY}, | |
10622 | {5260, 52, IEEE80211_CH_PASSIVE_ONLY}, | |
10623 | {5280, 56, IEEE80211_CH_PASSIVE_ONLY}, | |
10624 | {5300, 60, IEEE80211_CH_PASSIVE_ONLY}, | |
10625 | {5320, 64, IEEE80211_CH_PASSIVE_ONLY}, | |
10626 | {5745, 149, IEEE80211_CH_PASSIVE_ONLY}, | |
10627 | {5765, 153, IEEE80211_CH_PASSIVE_ONLY}, | |
10628 | {5785, 157, IEEE80211_CH_PASSIVE_ONLY}, | |
10629 | {5805, 161, IEEE80211_CH_PASSIVE_ONLY}, | |
10630 | {5825, 165, IEEE80211_CH_PASSIVE_ONLY}}, | |
10631 | } | |
afbf30a2 JK |
10632 | }; |
10633 | ||
43f66a6c JK |
10634 | #define MAX_HW_RESTARTS 5 |
10635 | static int ipw_up(struct ipw_priv *priv) | |
10636 | { | |
4f36f808 | 10637 | int rc, i, j; |
43f66a6c JK |
10638 | |
10639 | if (priv->status & STATUS_EXIT_PENDING) | |
10640 | return -EIO; | |
10641 | ||
f6c5cb7c JK |
10642 | if (cmdlog && !priv->cmdlog) { |
10643 | priv->cmdlog = kmalloc(sizeof(*priv->cmdlog) * cmdlog, | |
10644 | GFP_KERNEL); | |
10645 | if (priv->cmdlog == NULL) { | |
10646 | IPW_ERROR("Error allocating %d command log entries.\n", | |
10647 | cmdlog); | |
10648 | } else { | |
10649 | memset(priv->cmdlog, 0, sizeof(*priv->cmdlog) * cmdlog); | |
10650 | priv->cmdlog_len = cmdlog; | |
10651 | } | |
10652 | } | |
10653 | ||
0edd5b44 | 10654 | for (i = 0; i < MAX_HW_RESTARTS; i++) { |
bf79451e | 10655 | /* Load the microcode, firmware, and eeprom. |
43f66a6c JK |
10656 | * Also start the clocks. */ |
10657 | rc = ipw_load(priv); | |
10658 | if (rc) { | |
a4f6bbb3 | 10659 | IPW_ERROR("Unable to load firmware: %d\n", rc); |
43f66a6c JK |
10660 | return rc; |
10661 | } | |
10662 | ||
10663 | ipw_init_ordinals(priv); | |
10664 | if (!(priv->config & CFG_CUSTOM_MAC)) | |
10665 | eeprom_parse_mac(priv, priv->mac_addr); | |
10666 | memcpy(priv->net_dev->dev_addr, priv->mac_addr, ETH_ALEN); | |
10667 | ||
4f36f808 JK |
10668 | for (j = 0; j < ARRAY_SIZE(ipw_geos); j++) { |
10669 | if (!memcmp(&priv->eeprom[EEPROM_COUNTRY_CODE], | |
10670 | ipw_geos[j].name, 3)) | |
10671 | break; | |
10672 | } | |
03520576 JK |
10673 | if (j == ARRAY_SIZE(ipw_geos)) { |
10674 | IPW_WARNING("SKU [%c%c%c] not recognized.\n", | |
10675 | priv->eeprom[EEPROM_COUNTRY_CODE + 0], | |
10676 | priv->eeprom[EEPROM_COUNTRY_CODE + 1], | |
10677 | priv->eeprom[EEPROM_COUNTRY_CODE + 2]); | |
4f36f808 | 10678 | j = 0; |
03520576 | 10679 | } |
1867b117 | 10680 | if (ieee80211_set_geo(priv->ieee, &ipw_geos[j])) { |
4f36f808 JK |
10681 | IPW_WARNING("Could not set geography."); |
10682 | return 0; | |
10683 | } | |
10684 | ||
b095c381 JK |
10685 | if (priv->status & STATUS_RF_KILL_SW) { |
10686 | IPW_WARNING("Radio disabled by module parameter.\n"); | |
10687 | return 0; | |
10688 | } else if (rf_kill_active(priv)) { | |
10689 | IPW_WARNING("Radio Frequency Kill Switch is On:\n" | |
10690 | "Kill switch must be turned off for " | |
10691 | "wireless networking to work.\n"); | |
10692 | queue_delayed_work(priv->workqueue, &priv->rf_kill, | |
10693 | 2 * HZ); | |
43f66a6c | 10694 | return 0; |
c848d0af | 10695 | } |
43f66a6c JK |
10696 | |
10697 | rc = ipw_config(priv); | |
10698 | if (!rc) { | |
10699 | IPW_DEBUG_INFO("Configured device on count %i\n", i); | |
e666619e JK |
10700 | |
10701 | /* If configure to try and auto-associate, kick | |
10702 | * off a scan. */ | |
10703 | queue_work(priv->workqueue, &priv->request_scan); | |
afbf30a2 | 10704 | |
43f66a6c | 10705 | return 0; |
43f66a6c | 10706 | } |
bf79451e | 10707 | |
c848d0af | 10708 | IPW_DEBUG_INFO("Device configuration failed: 0x%08X\n", rc); |
43f66a6c JK |
10709 | IPW_DEBUG_INFO("Failed to config device on retry %d of %d\n", |
10710 | i, MAX_HW_RESTARTS); | |
10711 | ||
10712 | /* We had an error bringing up the hardware, so take it | |
10713 | * all the way back down so we can try again */ | |
10714 | ipw_down(priv); | |
10715 | } | |
10716 | ||
bf79451e | 10717 | /* tried to restart and config the device for as long as our |
43f66a6c | 10718 | * patience could withstand */ |
0edd5b44 | 10719 | IPW_ERROR("Unable to initialize device after %d attempts.\n", i); |
c848d0af | 10720 | |
43f66a6c JK |
10721 | return -EIO; |
10722 | } | |
10723 | ||
c848d0af JK |
10724 | static void ipw_bg_up(void *data) |
10725 | { | |
10726 | struct ipw_priv *priv = data; | |
4644151b | 10727 | mutex_lock(&priv->mutex); |
c848d0af | 10728 | ipw_up(data); |
4644151b | 10729 | mutex_unlock(&priv->mutex); |
c848d0af JK |
10730 | } |
10731 | ||
b095c381 | 10732 | static void ipw_deinit(struct ipw_priv *priv) |
43f66a6c | 10733 | { |
b095c381 JK |
10734 | int i; |
10735 | ||
10736 | if (priv->status & STATUS_SCANNING) { | |
10737 | IPW_DEBUG_INFO("Aborting scan during shutdown.\n"); | |
10738 | ipw_abort_scan(priv); | |
10739 | } | |
10740 | ||
10741 | if (priv->status & STATUS_ASSOCIATED) { | |
10742 | IPW_DEBUG_INFO("Disassociating during shutdown.\n"); | |
10743 | ipw_disassociate(priv); | |
10744 | } | |
10745 | ||
10746 | ipw_led_shutdown(priv); | |
10747 | ||
10748 | /* Wait up to 1s for status to change to not scanning and not | |
10749 | * associated (disassociation can take a while for a ful 802.11 | |
10750 | * exchange */ | |
10751 | for (i = 1000; i && (priv->status & | |
10752 | (STATUS_DISASSOCIATING | | |
10753 | STATUS_ASSOCIATED | STATUS_SCANNING)); i--) | |
10754 | udelay(10); | |
10755 | ||
10756 | if (priv->status & (STATUS_DISASSOCIATING | | |
10757 | STATUS_ASSOCIATED | STATUS_SCANNING)) | |
10758 | IPW_DEBUG_INFO("Still associated or scanning...\n"); | |
10759 | else | |
10760 | IPW_DEBUG_INFO("Took %dms to de-init\n", 1000 - i); | |
10761 | ||
43f66a6c | 10762 | /* Attempt to disable the card */ |
43f66a6c | 10763 | ipw_send_card_disable(priv, 0); |
b095c381 JK |
10764 | |
10765 | priv->status &= ~STATUS_INIT; | |
10766 | } | |
10767 | ||
10768 | static void ipw_down(struct ipw_priv *priv) | |
10769 | { | |
10770 | int exit_pending = priv->status & STATUS_EXIT_PENDING; | |
10771 | ||
10772 | priv->status |= STATUS_EXIT_PENDING; | |
10773 | ||
10774 | if (ipw_is_init(priv)) | |
10775 | ipw_deinit(priv); | |
10776 | ||
10777 | /* Wipe out the EXIT_PENDING status bit if we are not actually | |
10778 | * exiting the module */ | |
10779 | if (!exit_pending) | |
10780 | priv->status &= ~STATUS_EXIT_PENDING; | |
43f66a6c JK |
10781 | |
10782 | /* tell the device to stop sending interrupts */ | |
10783 | ipw_disable_interrupts(priv); | |
10784 | ||
10785 | /* Clear all bits but the RF Kill */ | |
b095c381 | 10786 | priv->status &= STATUS_RF_KILL_MASK | STATUS_EXIT_PENDING; |
43f66a6c JK |
10787 | netif_carrier_off(priv->net_dev); |
10788 | netif_stop_queue(priv->net_dev); | |
10789 | ||
10790 | ipw_stop_nic(priv); | |
a613bffd JK |
10791 | |
10792 | ipw_led_radio_off(priv); | |
43f66a6c JK |
10793 | } |
10794 | ||
c848d0af JK |
10795 | static void ipw_bg_down(void *data) |
10796 | { | |
10797 | struct ipw_priv *priv = data; | |
4644151b | 10798 | mutex_lock(&priv->mutex); |
c848d0af | 10799 | ipw_down(data); |
4644151b | 10800 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
10801 | } |
10802 | ||
10803 | /* Called by register_netdev() */ | |
10804 | static int ipw_net_init(struct net_device *dev) | |
10805 | { | |
10806 | struct ipw_priv *priv = ieee80211_priv(dev); | |
4644151b | 10807 | mutex_lock(&priv->mutex); |
43f66a6c | 10808 | |
c848d0af | 10809 | if (ipw_up(priv)) { |
4644151b | 10810 | mutex_unlock(&priv->mutex); |
43f66a6c | 10811 | return -EIO; |
c848d0af | 10812 | } |
43f66a6c | 10813 | |
4644151b | 10814 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
10815 | return 0; |
10816 | } | |
10817 | ||
10818 | /* PCI driver stuff */ | |
10819 | static struct pci_device_id card_ids[] = { | |
10820 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2701, 0, 0, 0}, | |
10821 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2702, 0, 0, 0}, | |
10822 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2711, 0, 0, 0}, | |
10823 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2712, 0, 0, 0}, | |
10824 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2721, 0, 0, 0}, | |
10825 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2722, 0, 0, 0}, | |
10826 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2731, 0, 0, 0}, | |
10827 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2732, 0, 0, 0}, | |
10828 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2741, 0, 0, 0}, | |
10829 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x103c, 0x2741, 0, 0, 0}, | |
10830 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2742, 0, 0, 0}, | |
10831 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2751, 0, 0, 0}, | |
10832 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2752, 0, 0, 0}, | |
10833 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2753, 0, 0, 0}, | |
10834 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2754, 0, 0, 0}, | |
10835 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2761, 0, 0, 0}, | |
10836 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2762, 0, 0, 0}, | |
10837 | {PCI_VENDOR_ID_INTEL, 0x104f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
0edd5b44 | 10838 | {PCI_VENDOR_ID_INTEL, 0x4220, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* BG */ |
a613bffd | 10839 | {PCI_VENDOR_ID_INTEL, 0x4221, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* BG */ |
0edd5b44 JG |
10840 | {PCI_VENDOR_ID_INTEL, 0x4223, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* ABG */ |
10841 | {PCI_VENDOR_ID_INTEL, 0x4224, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* ABG */ | |
bf79451e | 10842 | |
43f66a6c JK |
10843 | /* required last entry */ |
10844 | {0,} | |
10845 | }; | |
10846 | ||
10847 | MODULE_DEVICE_TABLE(pci, card_ids); | |
10848 | ||
10849 | static struct attribute *ipw_sysfs_entries[] = { | |
10850 | &dev_attr_rf_kill.attr, | |
10851 | &dev_attr_direct_dword.attr, | |
10852 | &dev_attr_indirect_byte.attr, | |
10853 | &dev_attr_indirect_dword.attr, | |
10854 | &dev_attr_mem_gpio_reg.attr, | |
10855 | &dev_attr_command_event_reg.attr, | |
10856 | &dev_attr_nic_type.attr, | |
10857 | &dev_attr_status.attr, | |
10858 | &dev_attr_cfg.attr, | |
b39860c6 JK |
10859 | &dev_attr_error.attr, |
10860 | &dev_attr_event_log.attr, | |
f6c5cb7c | 10861 | &dev_attr_cmd_log.attr, |
43f66a6c JK |
10862 | &dev_attr_eeprom_delay.attr, |
10863 | &dev_attr_ucode_version.attr, | |
10864 | &dev_attr_rtc.attr, | |
a613bffd JK |
10865 | &dev_attr_scan_age.attr, |
10866 | &dev_attr_led.attr, | |
b095c381 JK |
10867 | &dev_attr_speed_scan.attr, |
10868 | &dev_attr_net_stats.attr, | |
43f66a6c JK |
10869 | NULL |
10870 | }; | |
10871 | ||
10872 | static struct attribute_group ipw_attribute_group = { | |
10873 | .name = NULL, /* put in device directory */ | |
0edd5b44 | 10874 | .attrs = ipw_sysfs_entries, |
43f66a6c JK |
10875 | }; |
10876 | ||
0edd5b44 | 10877 | static int ipw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
43f66a6c JK |
10878 | { |
10879 | int err = 0; | |
10880 | struct net_device *net_dev; | |
10881 | void __iomem *base; | |
10882 | u32 length, val; | |
10883 | struct ipw_priv *priv; | |
afbf30a2 | 10884 | int i; |
43f66a6c JK |
10885 | |
10886 | net_dev = alloc_ieee80211(sizeof(struct ipw_priv)); | |
10887 | if (net_dev == NULL) { | |
10888 | err = -ENOMEM; | |
10889 | goto out; | |
10890 | } | |
10891 | ||
10892 | priv = ieee80211_priv(net_dev); | |
10893 | priv->ieee = netdev_priv(net_dev); | |
a613bffd | 10894 | |
43f66a6c JK |
10895 | priv->net_dev = net_dev; |
10896 | priv->pci_dev = pdev; | |
0f52bf90 | 10897 | #ifdef CONFIG_IPW2200_DEBUG |
43f66a6c JK |
10898 | ipw_debug_level = debug; |
10899 | #endif | |
10900 | spin_lock_init(&priv->lock); | |
afbf30a2 JK |
10901 | for (i = 0; i < IPW_IBSS_MAC_HASH_SIZE; i++) |
10902 | INIT_LIST_HEAD(&priv->ibss_mac_hash[i]); | |
43f66a6c | 10903 | |
4644151b | 10904 | mutex_init(&priv->mutex); |
43f66a6c JK |
10905 | if (pci_enable_device(pdev)) { |
10906 | err = -ENODEV; | |
10907 | goto out_free_ieee80211; | |
10908 | } | |
10909 | ||
10910 | pci_set_master(pdev); | |
10911 | ||
0e08b44e | 10912 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
bf79451e | 10913 | if (!err) |
0e08b44e | 10914 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); |
43f66a6c JK |
10915 | if (err) { |
10916 | printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n"); | |
10917 | goto out_pci_disable_device; | |
10918 | } | |
10919 | ||
10920 | pci_set_drvdata(pdev, priv); | |
10921 | ||
10922 | err = pci_request_regions(pdev, DRV_NAME); | |
bf79451e | 10923 | if (err) |
43f66a6c JK |
10924 | goto out_pci_disable_device; |
10925 | ||
bf79451e | 10926 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
43f66a6c | 10927 | * PCI Tx retries from interfering with C3 CPU state */ |
bf79451e JG |
10928 | pci_read_config_dword(pdev, 0x40, &val); |
10929 | if ((val & 0x0000ff00) != 0) | |
43f66a6c | 10930 | pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); |
bf79451e | 10931 | |
43f66a6c JK |
10932 | length = pci_resource_len(pdev, 0); |
10933 | priv->hw_len = length; | |
bf79451e | 10934 | |
43f66a6c JK |
10935 | base = ioremap_nocache(pci_resource_start(pdev, 0), length); |
10936 | if (!base) { | |
10937 | err = -ENODEV; | |
10938 | goto out_pci_release_regions; | |
10939 | } | |
10940 | ||
10941 | priv->hw_base = base; | |
10942 | IPW_DEBUG_INFO("pci_resource_len = 0x%08x\n", length); | |
10943 | IPW_DEBUG_INFO("pci_resource_base = %p\n", base); | |
10944 | ||
10945 | err = ipw_setup_deferred_work(priv); | |
10946 | if (err) { | |
10947 | IPW_ERROR("Unable to setup deferred work\n"); | |
10948 | goto out_iounmap; | |
10949 | } | |
10950 | ||
b095c381 | 10951 | ipw_sw_reset(priv, 1); |
43f66a6c | 10952 | |
0edd5b44 | 10953 | err = request_irq(pdev->irq, ipw_isr, SA_SHIRQ, DRV_NAME, priv); |
43f66a6c JK |
10954 | if (err) { |
10955 | IPW_ERROR("Error allocating IRQ %d\n", pdev->irq); | |
10956 | goto out_destroy_workqueue; | |
10957 | } | |
10958 | ||
10959 | SET_MODULE_OWNER(net_dev); | |
10960 | SET_NETDEV_DEV(net_dev, &pdev->dev); | |
10961 | ||
4644151b | 10962 | mutex_lock(&priv->mutex); |
c848d0af | 10963 | |
43f66a6c JK |
10964 | priv->ieee->hard_start_xmit = ipw_net_hard_start_xmit; |
10965 | priv->ieee->set_security = shim__set_security; | |
227d2dc1 | 10966 | priv->ieee->is_queue_full = ipw_net_is_queue_full; |
43f66a6c | 10967 | |
b095c381 | 10968 | #ifdef CONFIG_IPW_QOS |
3b9990cb JK |
10969 | priv->ieee->handle_probe_response = ipw_handle_beacon; |
10970 | priv->ieee->handle_beacon = ipw_handle_probe_response; | |
10971 | priv->ieee->handle_assoc_response = ipw_handle_assoc_response; | |
b095c381 JK |
10972 | #endif /* CONFIG_IPW_QOS */ |
10973 | ||
c848d0af JK |
10974 | priv->ieee->perfect_rssi = -20; |
10975 | priv->ieee->worst_rssi = -85; | |
43f66a6c JK |
10976 | |
10977 | net_dev->open = ipw_net_open; | |
10978 | net_dev->stop = ipw_net_stop; | |
10979 | net_dev->init = ipw_net_init; | |
10980 | net_dev->get_stats = ipw_net_get_stats; | |
10981 | net_dev->set_multicast_list = ipw_net_set_multicast_list; | |
10982 | net_dev->set_mac_address = ipw_net_set_mac_address; | |
97a78ca9 | 10983 | priv->wireless_data.spy_data = &priv->ieee->spy_data; |
97a78ca9 | 10984 | net_dev->wireless_data = &priv->wireless_data; |
43f66a6c JK |
10985 | net_dev->wireless_handlers = &ipw_wx_handler_def; |
10986 | net_dev->ethtool_ops = &ipw_ethtool_ops; | |
10987 | net_dev->irq = pdev->irq; | |
0edd5b44 | 10988 | net_dev->base_addr = (unsigned long)priv->hw_base; |
43f66a6c JK |
10989 | net_dev->mem_start = pci_resource_start(pdev, 0); |
10990 | net_dev->mem_end = net_dev->mem_start + pci_resource_len(pdev, 0) - 1; | |
10991 | ||
10992 | err = sysfs_create_group(&pdev->dev.kobj, &ipw_attribute_group); | |
10993 | if (err) { | |
10994 | IPW_ERROR("failed to create sysfs device attributes\n"); | |
4644151b | 10995 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
10996 | goto out_release_irq; |
10997 | } | |
10998 | ||
4644151b | 10999 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
11000 | err = register_netdev(net_dev); |
11001 | if (err) { | |
11002 | IPW_ERROR("failed to register network device\n"); | |
a613bffd | 11003 | goto out_remove_sysfs; |
43f66a6c | 11004 | } |
48a84770 HBA |
11005 | |
11006 | printk(KERN_INFO DRV_NAME ": Detected geography %s (%d 802.11bg " | |
11007 | "channels, %d 802.11a channels)\n", | |
11008 | priv->ieee->geo.name, priv->ieee->geo.bg_channels, | |
11009 | priv->ieee->geo.a_channels); | |
11010 | ||
43f66a6c JK |
11011 | return 0; |
11012 | ||
a613bffd | 11013 | out_remove_sysfs: |
43f66a6c | 11014 | sysfs_remove_group(&pdev->dev.kobj, &ipw_attribute_group); |
0edd5b44 | 11015 | out_release_irq: |
43f66a6c | 11016 | free_irq(pdev->irq, priv); |
0edd5b44 | 11017 | out_destroy_workqueue: |
43f66a6c JK |
11018 | destroy_workqueue(priv->workqueue); |
11019 | priv->workqueue = NULL; | |
0edd5b44 | 11020 | out_iounmap: |
43f66a6c | 11021 | iounmap(priv->hw_base); |
0edd5b44 | 11022 | out_pci_release_regions: |
43f66a6c | 11023 | pci_release_regions(pdev); |
0edd5b44 | 11024 | out_pci_disable_device: |
43f66a6c JK |
11025 | pci_disable_device(pdev); |
11026 | pci_set_drvdata(pdev, NULL); | |
0edd5b44 | 11027 | out_free_ieee80211: |
43f66a6c | 11028 | free_ieee80211(priv->net_dev); |
0edd5b44 | 11029 | out: |
43f66a6c JK |
11030 | return err; |
11031 | } | |
11032 | ||
11033 | static void ipw_pci_remove(struct pci_dev *pdev) | |
11034 | { | |
11035 | struct ipw_priv *priv = pci_get_drvdata(pdev); | |
afbf30a2 JK |
11036 | struct list_head *p, *q; |
11037 | int i; | |
b095c381 | 11038 | |
43f66a6c JK |
11039 | if (!priv) |
11040 | return; | |
11041 | ||
4644151b | 11042 | mutex_lock(&priv->mutex); |
43f66a6c | 11043 | |
afbf30a2 | 11044 | priv->status |= STATUS_EXIT_PENDING; |
43f66a6c | 11045 | ipw_down(priv); |
43f66a6c JK |
11046 | sysfs_remove_group(&pdev->dev.kobj, &ipw_attribute_group); |
11047 | ||
4644151b | 11048 | mutex_unlock(&priv->mutex); |
43f66a6c JK |
11049 | |
11050 | unregister_netdev(priv->net_dev); | |
11051 | ||
11052 | if (priv->rxq) { | |
11053 | ipw_rx_queue_free(priv, priv->rxq); | |
11054 | priv->rxq = NULL; | |
11055 | } | |
11056 | ipw_tx_queue_free(priv); | |
11057 | ||
f6c5cb7c JK |
11058 | if (priv->cmdlog) { |
11059 | kfree(priv->cmdlog); | |
11060 | priv->cmdlog = NULL; | |
11061 | } | |
43f66a6c JK |
11062 | /* ipw_down will ensure that there is no more pending work |
11063 | * in the workqueue's, so we can safely remove them now. */ | |
a613bffd JK |
11064 | cancel_delayed_work(&priv->adhoc_check); |
11065 | cancel_delayed_work(&priv->gather_stats); | |
11066 | cancel_delayed_work(&priv->request_scan); | |
11067 | cancel_delayed_work(&priv->rf_kill); | |
11068 | cancel_delayed_work(&priv->scan_check); | |
11069 | destroy_workqueue(priv->workqueue); | |
11070 | priv->workqueue = NULL; | |
43f66a6c | 11071 | |
afbf30a2 JK |
11072 | /* Free MAC hash list for ADHOC */ |
11073 | for (i = 0; i < IPW_IBSS_MAC_HASH_SIZE; i++) { | |
11074 | list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) { | |
afbf30a2 | 11075 | list_del(p); |
489f4458 | 11076 | kfree(list_entry(p, struct ipw_ibss_seq, list)); |
afbf30a2 JK |
11077 | } |
11078 | } | |
11079 | ||
b39860c6 JK |
11080 | if (priv->error) { |
11081 | ipw_free_error_log(priv->error); | |
11082 | priv->error = NULL; | |
43f66a6c JK |
11083 | } |
11084 | ||
11085 | free_irq(pdev->irq, priv); | |
11086 | iounmap(priv->hw_base); | |
11087 | pci_release_regions(pdev); | |
11088 | pci_disable_device(pdev); | |
11089 | pci_set_drvdata(pdev, NULL); | |
11090 | free_ieee80211(priv->net_dev); | |
afbf30a2 | 11091 | free_firmware(); |
43f66a6c JK |
11092 | } |
11093 | ||
43f66a6c | 11094 | #ifdef CONFIG_PM |
583a4e88 | 11095 | static int ipw_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
43f66a6c JK |
11096 | { |
11097 | struct ipw_priv *priv = pci_get_drvdata(pdev); | |
11098 | struct net_device *dev = priv->net_dev; | |
11099 | ||
11100 | printk(KERN_INFO "%s: Going into suspend...\n", dev->name); | |
11101 | ||
0edd5b44 | 11102 | /* Take down the device; powers it off, etc. */ |
43f66a6c JK |
11103 | ipw_down(priv); |
11104 | ||
11105 | /* Remove the PRESENT state of the device */ | |
11106 | netif_device_detach(dev); | |
11107 | ||
43f66a6c | 11108 | pci_save_state(pdev); |
43f66a6c | 11109 | pci_disable_device(pdev); |
583a4e88 | 11110 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
bf79451e | 11111 | |
43f66a6c JK |
11112 | return 0; |
11113 | } | |
11114 | ||
11115 | static int ipw_pci_resume(struct pci_dev *pdev) | |
11116 | { | |
11117 | struct ipw_priv *priv = pci_get_drvdata(pdev); | |
11118 | struct net_device *dev = priv->net_dev; | |
11119 | u32 val; | |
bf79451e | 11120 | |
43f66a6c JK |
11121 | printk(KERN_INFO "%s: Coming out of suspend...\n", dev->name); |
11122 | ||
ea2b26e0 | 11123 | pci_set_power_state(pdev, PCI_D0); |
43f66a6c | 11124 | pci_enable_device(pdev); |
43f66a6c | 11125 | pci_restore_state(pdev); |
ea2b26e0 | 11126 | |
43f66a6c JK |
11127 | /* |
11128 | * Suspend/Resume resets the PCI configuration space, so we have to | |
11129 | * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries | |
11130 | * from interfering with C3 CPU state. pci_restore_state won't help | |
11131 | * here since it only restores the first 64 bytes pci config header. | |
11132 | */ | |
bf79451e JG |
11133 | pci_read_config_dword(pdev, 0x40, &val); |
11134 | if ((val & 0x0000ff00) != 0) | |
43f66a6c JK |
11135 | pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); |
11136 | ||
11137 | /* Set the device back into the PRESENT state; this will also wake | |
11138 | * the queue of needed */ | |
11139 | netif_device_attach(dev); | |
11140 | ||
11141 | /* Bring the device back up */ | |
11142 | queue_work(priv->workqueue, &priv->up); | |
bf79451e | 11143 | |
43f66a6c JK |
11144 | return 0; |
11145 | } | |
11146 | #endif | |
11147 | ||
11148 | /* driver initialization stuff */ | |
11149 | static struct pci_driver ipw_driver = { | |
11150 | .name = DRV_NAME, | |
11151 | .id_table = card_ids, | |
11152 | .probe = ipw_pci_probe, | |
11153 | .remove = __devexit_p(ipw_pci_remove), | |
11154 | #ifdef CONFIG_PM | |
11155 | .suspend = ipw_pci_suspend, | |
11156 | .resume = ipw_pci_resume, | |
11157 | #endif | |
11158 | }; | |
11159 | ||
11160 | static int __init ipw_init(void) | |
11161 | { | |
11162 | int ret; | |
11163 | ||
11164 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
11165 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
11166 | ||
11167 | ret = pci_module_init(&ipw_driver); | |
11168 | if (ret) { | |
11169 | IPW_ERROR("Unable to initialize PCI module\n"); | |
11170 | return ret; | |
11171 | } | |
11172 | ||
0edd5b44 | 11173 | ret = driver_create_file(&ipw_driver.driver, &driver_attr_debug_level); |
43f66a6c JK |
11174 | if (ret) { |
11175 | IPW_ERROR("Unable to create driver sysfs file\n"); | |
11176 | pci_unregister_driver(&ipw_driver); | |
11177 | return ret; | |
11178 | } | |
11179 | ||
11180 | return ret; | |
11181 | } | |
11182 | ||
11183 | static void __exit ipw_exit(void) | |
11184 | { | |
11185 | driver_remove_file(&ipw_driver.driver, &driver_attr_debug_level); | |
11186 | pci_unregister_driver(&ipw_driver); | |
11187 | } | |
11188 | ||
11189 | module_param(disable, int, 0444); | |
11190 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); | |
11191 | ||
11192 | module_param(associate, int, 0444); | |
11193 | MODULE_PARM_DESC(associate, "auto associate when scanning (default on)"); | |
11194 | ||
11195 | module_param(auto_create, int, 0444); | |
11196 | MODULE_PARM_DESC(auto_create, "auto create adhoc network (default on)"); | |
11197 | ||
a613bffd | 11198 | module_param(led, int, 0444); |
c848d0af | 11199 | MODULE_PARM_DESC(led, "enable led control on some systems (default 0 off)\n"); |
a613bffd | 11200 | |
3e1555ba | 11201 | #ifdef CONFIG_IPW2200_DEBUG |
43f66a6c JK |
11202 | module_param(debug, int, 0444); |
11203 | MODULE_PARM_DESC(debug, "debug output mask"); | |
3e1555ba | 11204 | #endif |
43f66a6c JK |
11205 | |
11206 | module_param(channel, int, 0444); | |
bf79451e | 11207 | MODULE_PARM_DESC(channel, "channel to limit associate to (default 0 [ANY])"); |
43f66a6c | 11208 | |
b095c381 JK |
11209 | #ifdef CONFIG_IPW_QOS |
11210 | module_param(qos_enable, int, 0444); | |
11211 | MODULE_PARM_DESC(qos_enable, "enable all QoS functionalitis"); | |
11212 | ||
11213 | module_param(qos_burst_enable, int, 0444); | |
11214 | MODULE_PARM_DESC(qos_burst_enable, "enable QoS burst mode"); | |
11215 | ||
11216 | module_param(qos_no_ack_mask, int, 0444); | |
11217 | MODULE_PARM_DESC(qos_no_ack_mask, "mask Tx_Queue to no ack"); | |
43f66a6c | 11218 | |
b095c381 JK |
11219 | module_param(burst_duration_CCK, int, 0444); |
11220 | MODULE_PARM_DESC(burst_duration_CCK, "set CCK burst value"); | |
11221 | ||
11222 | module_param(burst_duration_OFDM, int, 0444); | |
11223 | MODULE_PARM_DESC(burst_duration_OFDM, "set OFDM burst value"); | |
11224 | #endif /* CONFIG_IPW_QOS */ | |
11225 | ||
11226 | #ifdef CONFIG_IPW2200_MONITOR | |
43f66a6c JK |
11227 | module_param(mode, int, 0444); |
11228 | MODULE_PARM_DESC(mode, "network mode (0=BSS,1=IBSS,2=Monitor)"); | |
11229 | #else | |
11230 | module_param(mode, int, 0444); | |
11231 | MODULE_PARM_DESC(mode, "network mode (0=BSS,1=IBSS)"); | |
11232 | #endif | |
11233 | ||
810dabd4 ZY |
11234 | module_param(bt_coexist, int, 0444); |
11235 | MODULE_PARM_DESC(bt_coexist, "enable bluetooth coexistence (default off)"); | |
11236 | ||
b095c381 | 11237 | module_param(hwcrypto, int, 0444); |
bde37d03 | 11238 | MODULE_PARM_DESC(hwcrypto, "enable hardware crypto (default off)"); |
b095c381 | 11239 | |
f6c5cb7c JK |
11240 | module_param(cmdlog, int, 0444); |
11241 | MODULE_PARM_DESC(cmdlog, | |
11242 | "allocate a ring buffer for logging firmware commands"); | |
11243 | ||
4bfdb91d ZY |
11244 | module_param(roaming, int, 0444); |
11245 | MODULE_PARM_DESC(roaming, "enable roaming support (default on)"); | |
11246 | ||
43f66a6c JK |
11247 | module_exit(ipw_exit); |
11248 | module_init(ipw_init); |