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4bc85c13 WYG |
1 | /****************************************************************************** |
2 | * | |
be663ab6 | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4bc85c13 WYG |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called LICENSE. | |
20 | * | |
21 | * Contact Information: | |
22 | * Intel Linux Wireless <ilw@linux.intel.com> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | *****************************************************************************/ | |
26 | ||
27 | #include <linux/kernel.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/pci.h> | |
31 | #include <linux/dma-mapping.h> | |
32 | #include <linux/delay.h> | |
33 | #include <linux/sched.h> | |
34 | #include <linux/skbuff.h> | |
35 | #include <linux/netdevice.h> | |
4bc85c13 WYG |
36 | #include <net/mac80211.h> |
37 | #include <linux/etherdevice.h> | |
38 | #include <asm/unaligned.h> | |
39 | ||
40 | #include "iwl-eeprom.h" | |
41 | #include "iwl-dev.h" | |
42 | #include "iwl-core.h" | |
43 | #include "iwl-io.h" | |
44 | #include "iwl-helpers.h" | |
be663ab6 | 45 | #include "iwl-4965-calib.h" |
4bc85c13 | 46 | #include "iwl-sta.h" |
be663ab6 WYG |
47 | #include "iwl-4965-led.h" |
48 | #include "iwl-4965.h" | |
49 | #include "iwl-4965-debugfs.h" | |
4bc85c13 | 50 | |
46bc8d4b SG |
51 | static int il4965_send_tx_power(struct il_priv *il); |
52 | static int il4965_hw_get_temperature(struct il_priv *il); | |
4bc85c13 WYG |
53 | |
54 | /* Highest firmware API version supported */ | |
d3175167 | 55 | #define IL4965_UCODE_API_MAX 2 |
4bc85c13 WYG |
56 | |
57 | /* Lowest firmware API version supported */ | |
d3175167 | 58 | #define IL4965_UCODE_API_MIN 2 |
4bc85c13 | 59 | |
d3175167 SG |
60 | #define IL4965_FW_PRE "iwlwifi-4965-" |
61 | #define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode" | |
62 | #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api) | |
4bc85c13 WYG |
63 | |
64 | /* check contents of special bootstrap uCode SRAM */ | |
46bc8d4b | 65 | static int il4965_verify_bsm(struct il_priv *il) |
4bc85c13 | 66 | { |
46bc8d4b SG |
67 | __le32 *image = il->ucode_boot.v_addr; |
68 | u32 len = il->ucode_boot.len; | |
4bc85c13 WYG |
69 | u32 reg; |
70 | u32 val; | |
71 | ||
58de00a4 | 72 | D_INFO("Begin verify bsm\n"); |
4bc85c13 WYG |
73 | |
74 | /* verify BSM SRAM contents */ | |
db54eb57 | 75 | val = il_rd_prph(il, BSM_WR_DWCOUNT_REG); |
4bc85c13 WYG |
76 | for (reg = BSM_SRAM_LOWER_BOUND; |
77 | reg < BSM_SRAM_LOWER_BOUND + len; | |
78 | reg += sizeof(u32), image++) { | |
db54eb57 | 79 | val = il_rd_prph(il, reg); |
4bc85c13 | 80 | if (val != le32_to_cpu(*image)) { |
9406f797 | 81 | IL_ERR("BSM uCode verification failed at " |
4bc85c13 WYG |
82 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", |
83 | BSM_SRAM_LOWER_BOUND, | |
84 | reg - BSM_SRAM_LOWER_BOUND, len, | |
85 | val, le32_to_cpu(*image)); | |
86 | return -EIO; | |
87 | } | |
88 | } | |
89 | ||
58de00a4 | 90 | D_INFO("BSM bootstrap uCode image OK\n"); |
4bc85c13 WYG |
91 | |
92 | return 0; | |
93 | } | |
94 | ||
95 | /** | |
e2ebc833 | 96 | * il4965_load_bsm - Load bootstrap instructions |
4bc85c13 WYG |
97 | * |
98 | * BSM operation: | |
99 | * | |
100 | * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program | |
101 | * in special SRAM that does not power down during RFKILL. When powering back | |
102 | * up after power-saving sleeps (or during initial uCode load), the BSM loads | |
103 | * the bootstrap program into the on-board processor, and starts it. | |
104 | * | |
105 | * The bootstrap program loads (via DMA) instructions and data for a new | |
106 | * program from host DRAM locations indicated by the host driver in the | |
107 | * BSM_DRAM_* registers. Once the new program is loaded, it starts | |
108 | * automatically. | |
109 | * | |
110 | * When initializing the NIC, the host driver points the BSM to the | |
111 | * "initialize" uCode image. This uCode sets up some internal data, then | |
112 | * notifies host via "initialize alive" that it is complete. | |
113 | * | |
114 | * The host then replaces the BSM_DRAM_* pointer values to point to the | |
115 | * normal runtime uCode instructions and a backup uCode data cache buffer | |
116 | * (filled initially with starting data values for the on-board processor), | |
117 | * then triggers the "initialize" uCode to load and launch the runtime uCode, | |
118 | * which begins normal operation. | |
119 | * | |
120 | * When doing a power-save shutdown, runtime uCode saves data SRAM into | |
121 | * the backup data cache in DRAM before SRAM is powered down. | |
122 | * | |
123 | * When powering back up, the BSM loads the bootstrap program. This reloads | |
124 | * the runtime uCode instructions and the backup data cache into SRAM, | |
125 | * and re-launches the runtime uCode from where it left off. | |
126 | */ | |
46bc8d4b | 127 | static int il4965_load_bsm(struct il_priv *il) |
4bc85c13 | 128 | { |
46bc8d4b SG |
129 | __le32 *image = il->ucode_boot.v_addr; |
130 | u32 len = il->ucode_boot.len; | |
4bc85c13 WYG |
131 | dma_addr_t pinst; |
132 | dma_addr_t pdata; | |
133 | u32 inst_len; | |
134 | u32 data_len; | |
135 | int i; | |
136 | u32 done; | |
137 | u32 reg_offset; | |
138 | int ret; | |
139 | ||
58de00a4 | 140 | D_INFO("Begin load bsm\n"); |
4bc85c13 | 141 | |
46bc8d4b | 142 | il->ucode_type = UCODE_RT; |
4bc85c13 WYG |
143 | |
144 | /* make sure bootstrap program is no larger than BSM's SRAM size */ | |
d3175167 | 145 | if (len > IL49_MAX_BSM_SIZE) |
4bc85c13 WYG |
146 | return -EINVAL; |
147 | ||
148 | /* Tell bootstrap uCode where to find the "Initialize" uCode | |
149 | * in host DRAM ... host DRAM physical address bits 35:4 for 4965. | |
e2ebc833 | 150 | * NOTE: il_init_alive_start() will replace these values, |
4bc85c13 WYG |
151 | * after the "initialize" uCode has run, to point to |
152 | * runtime/protocol instructions and backup data cache. | |
153 | */ | |
46bc8d4b SG |
154 | pinst = il->ucode_init.p_addr >> 4; |
155 | pdata = il->ucode_init_data.p_addr >> 4; | |
156 | inst_len = il->ucode_init.len; | |
157 | data_len = il->ucode_init_data.len; | |
4bc85c13 | 158 | |
db54eb57 SG |
159 | il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); |
160 | il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); | |
161 | il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); | |
162 | il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); | |
4bc85c13 WYG |
163 | |
164 | /* Fill BSM memory with bootstrap instructions */ | |
165 | for (reg_offset = BSM_SRAM_LOWER_BOUND; | |
166 | reg_offset < BSM_SRAM_LOWER_BOUND + len; | |
167 | reg_offset += sizeof(u32), image++) | |
db54eb57 | 168 | _il_wr_prph(il, reg_offset, le32_to_cpu(*image)); |
4bc85c13 | 169 | |
46bc8d4b | 170 | ret = il4965_verify_bsm(il); |
4bc85c13 WYG |
171 | if (ret) |
172 | return ret; | |
173 | ||
174 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | |
db54eb57 SG |
175 | il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0); |
176 | il_wr_prph(il, | |
d3175167 | 177 | BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND); |
db54eb57 | 178 | il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); |
4bc85c13 WYG |
179 | |
180 | /* Load bootstrap code into instruction SRAM now, | |
181 | * to prepare to load "initialize" uCode */ | |
db54eb57 | 182 | il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START); |
4bc85c13 WYG |
183 | |
184 | /* Wait for load of bootstrap uCode to finish */ | |
185 | for (i = 0; i < 100; i++) { | |
db54eb57 | 186 | done = il_rd_prph(il, BSM_WR_CTRL_REG); |
4bc85c13 WYG |
187 | if (!(done & BSM_WR_CTRL_REG_BIT_START)) |
188 | break; | |
189 | udelay(10); | |
190 | } | |
191 | if (i < 100) | |
58de00a4 | 192 | D_INFO("BSM write complete, poll %d iterations\n", i); |
4bc85c13 | 193 | else { |
9406f797 | 194 | IL_ERR("BSM write did not complete!\n"); |
4bc85c13 WYG |
195 | return -EIO; |
196 | } | |
197 | ||
198 | /* Enable future boot loads whenever power management unit triggers it | |
199 | * (e.g. when powering back up after power-save shutdown) */ | |
db54eb57 | 200 | il_wr_prph(il, |
be663ab6 | 201 | BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); |
4bc85c13 WYG |
202 | |
203 | ||
204 | return 0; | |
205 | } | |
206 | ||
207 | /** | |
e2ebc833 | 208 | * il4965_set_ucode_ptrs - Set uCode address location |
4bc85c13 WYG |
209 | * |
210 | * Tell initialization uCode where to find runtime uCode. | |
211 | * | |
212 | * BSM registers initially contain pointers to initialization uCode. | |
213 | * We need to replace them to load runtime uCode inst and data, | |
214 | * and to save runtime data when powering down. | |
215 | */ | |
46bc8d4b | 216 | static int il4965_set_ucode_ptrs(struct il_priv *il) |
4bc85c13 WYG |
217 | { |
218 | dma_addr_t pinst; | |
219 | dma_addr_t pdata; | |
220 | int ret = 0; | |
221 | ||
222 | /* bits 35:4 for 4965 */ | |
46bc8d4b SG |
223 | pinst = il->ucode_code.p_addr >> 4; |
224 | pdata = il->ucode_data_backup.p_addr >> 4; | |
4bc85c13 WYG |
225 | |
226 | /* Tell bootstrap uCode where to find image to load */ | |
db54eb57 SG |
227 | il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); |
228 | il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); | |
229 | il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, | |
46bc8d4b | 230 | il->ucode_data.len); |
4bc85c13 WYG |
231 | |
232 | /* Inst byte count must be last to set up, bit 31 signals uCode | |
233 | * that all new ptr/size info is in place */ | |
db54eb57 | 234 | il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, |
46bc8d4b | 235 | il->ucode_code.len | BSM_DRAM_INST_LOAD); |
58de00a4 | 236 | D_INFO("Runtime uCode pointers are set.\n"); |
4bc85c13 WYG |
237 | |
238 | return ret; | |
239 | } | |
240 | ||
241 | /** | |
e2ebc833 | 242 | * il4965_init_alive_start - Called after REPLY_ALIVE notification received |
4bc85c13 WYG |
243 | * |
244 | * Called after REPLY_ALIVE notification received from "initialize" uCode. | |
245 | * | |
246 | * The 4965 "initialize" ALIVE reply contains calibration data for: | |
46bc8d4b | 247 | * Voltage, temperature, and MIMO tx gain correction, now stored in il |
4bc85c13 WYG |
248 | * (3945 does not contain this data). |
249 | * | |
250 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | |
251 | */ | |
46bc8d4b | 252 | static void il4965_init_alive_start(struct il_priv *il) |
4bc85c13 WYG |
253 | { |
254 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. | |
255 | * This is a paranoid check, because we would not have gotten the | |
256 | * "initialize" alive if code weren't properly loaded. */ | |
46bc8d4b | 257 | if (il4965_verify_ucode(il)) { |
4bc85c13 WYG |
258 | /* Runtime instruction load was bad; |
259 | * take it all the way back down so we can try again */ | |
58de00a4 | 260 | D_INFO("Bad \"initialize\" uCode load.\n"); |
4bc85c13 WYG |
261 | goto restart; |
262 | } | |
263 | ||
264 | /* Calculate temperature */ | |
46bc8d4b | 265 | il->temperature = il4965_hw_get_temperature(il); |
4bc85c13 WYG |
266 | |
267 | /* Send pointers to protocol/runtime uCode image ... init code will | |
268 | * load and launch runtime uCode, which will send us another "Alive" | |
269 | * notification. */ | |
58de00a4 | 270 | D_INFO("Initialization Alive received.\n"); |
46bc8d4b | 271 | if (il4965_set_ucode_ptrs(il)) { |
4bc85c13 WYG |
272 | /* Runtime instruction load won't happen; |
273 | * take it all the way back down so we can try again */ | |
58de00a4 | 274 | D_INFO("Couldn't set up uCode pointers.\n"); |
4bc85c13 WYG |
275 | goto restart; |
276 | } | |
277 | return; | |
278 | ||
279 | restart: | |
46bc8d4b | 280 | queue_work(il->workqueue, &il->restart); |
4bc85c13 WYG |
281 | } |
282 | ||
be663ab6 | 283 | static bool iw4965_is_ht40_channel(__le32 rxon_flags) |
4bc85c13 WYG |
284 | { |
285 | int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK) | |
286 | >> RXON_FLG_CHANNEL_MODE_POS; | |
232913b5 SG |
287 | return (chan_mod == CHANNEL_MODE_PURE_40 || |
288 | chan_mod == CHANNEL_MODE_MIXED); | |
4bc85c13 WYG |
289 | } |
290 | ||
46bc8d4b | 291 | static void il4965_nic_config(struct il_priv *il) |
4bc85c13 WYG |
292 | { |
293 | unsigned long flags; | |
294 | u16 radio_cfg; | |
295 | ||
46bc8d4b | 296 | spin_lock_irqsave(&il->lock, flags); |
4bc85c13 | 297 | |
46bc8d4b | 298 | radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG); |
4bc85c13 WYG |
299 | |
300 | /* write radio config values to register */ | |
301 | if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX) | |
46bc8d4b | 302 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
4bc85c13 WYG |
303 | EEPROM_RF_CFG_TYPE_MSK(radio_cfg) | |
304 | EEPROM_RF_CFG_STEP_MSK(radio_cfg) | | |
305 | EEPROM_RF_CFG_DASH_MSK(radio_cfg)); | |
306 | ||
307 | /* set CSR_HW_CONFIG_REG for uCode use */ | |
46bc8d4b | 308 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
4bc85c13 WYG |
309 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | |
310 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); | |
311 | ||
46bc8d4b SG |
312 | il->calib_info = (struct il_eeprom_calib_info *) |
313 | il_eeprom_query_addr(il, | |
be663ab6 | 314 | EEPROM_4965_CALIB_TXPOWER_OFFSET); |
4bc85c13 | 315 | |
46bc8d4b | 316 | spin_unlock_irqrestore(&il->lock, flags); |
4bc85c13 WYG |
317 | } |
318 | ||
319 | /* Reset differential Rx gains in NIC to prepare for chain noise calibration. | |
320 | * Called after every association, but this runs only once! | |
321 | * ... once chain noise is calibrated the first time, it's good forever. */ | |
46bc8d4b | 322 | static void il4965_chain_noise_reset(struct il_priv *il) |
4bc85c13 | 323 | { |
46bc8d4b | 324 | struct il_chain_noise_data *data = &(il->chain_noise_data); |
4bc85c13 | 325 | |
232913b5 | 326 | if (data->state == IL_CHAIN_NOISE_ALIVE && |
46bc8d4b | 327 | il_is_any_associated(il)) { |
e2ebc833 | 328 | struct il_calib_diff_gain_cmd cmd; |
4bc85c13 WYG |
329 | |
330 | /* clear data for chain noise calibration algorithm */ | |
331 | data->chain_noise_a = 0; | |
332 | data->chain_noise_b = 0; | |
333 | data->chain_noise_c = 0; | |
334 | data->chain_signal_a = 0; | |
335 | data->chain_signal_b = 0; | |
336 | data->chain_signal_c = 0; | |
337 | data->beacon_count = 0; | |
338 | ||
339 | memset(&cmd, 0, sizeof(cmd)); | |
e2ebc833 | 340 | cmd.hdr.op_code = IL_PHY_CALIBRATE_DIFF_GAIN_CMD; |
4bc85c13 WYG |
341 | cmd.diff_gain_a = 0; |
342 | cmd.diff_gain_b = 0; | |
343 | cmd.diff_gain_c = 0; | |
46bc8d4b | 344 | if (il_send_cmd_pdu(il, REPLY_PHY_CALIBRATION_CMD, |
4bc85c13 | 345 | sizeof(cmd), &cmd)) |
9406f797 | 346 | IL_ERR( |
4bc85c13 | 347 | "Could not send REPLY_PHY_CALIBRATION_CMD\n"); |
e2ebc833 | 348 | data->state = IL_CHAIN_NOISE_ACCUMULATE; |
58de00a4 | 349 | D_CALIB("Run chain_noise_calibrate\n"); |
4bc85c13 WYG |
350 | } |
351 | } | |
352 | ||
e2ebc833 | 353 | static struct il_sensitivity_ranges il4965_sensitivity = { |
4bc85c13 WYG |
354 | .min_nrg_cck = 97, |
355 | .max_nrg_cck = 0, /* not used, set to 0 */ | |
356 | ||
357 | .auto_corr_min_ofdm = 85, | |
358 | .auto_corr_min_ofdm_mrc = 170, | |
359 | .auto_corr_min_ofdm_x1 = 105, | |
360 | .auto_corr_min_ofdm_mrc_x1 = 220, | |
361 | ||
362 | .auto_corr_max_ofdm = 120, | |
363 | .auto_corr_max_ofdm_mrc = 210, | |
364 | .auto_corr_max_ofdm_x1 = 140, | |
365 | .auto_corr_max_ofdm_mrc_x1 = 270, | |
366 | ||
367 | .auto_corr_min_cck = 125, | |
368 | .auto_corr_max_cck = 200, | |
369 | .auto_corr_min_cck_mrc = 200, | |
370 | .auto_corr_max_cck_mrc = 400, | |
371 | ||
372 | .nrg_th_cck = 100, | |
373 | .nrg_th_ofdm = 100, | |
374 | ||
375 | .barker_corr_th_min = 190, | |
376 | .barker_corr_th_min_mrc = 390, | |
377 | .nrg_th_cca = 62, | |
378 | }; | |
379 | ||
46bc8d4b | 380 | static void il4965_set_ct_threshold(struct il_priv *il) |
4bc85c13 WYG |
381 | { |
382 | /* want Kelvin */ | |
46bc8d4b | 383 | il->hw_params.ct_kill_threshold = |
4bc85c13 WYG |
384 | CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY); |
385 | } | |
386 | ||
387 | /** | |
e2ebc833 | 388 | * il4965_hw_set_hw_params |
4bc85c13 WYG |
389 | * |
390 | * Called when initializing driver | |
391 | */ | |
46bc8d4b | 392 | static int il4965_hw_set_hw_params(struct il_priv *il) |
4bc85c13 | 393 | { |
46bc8d4b | 394 | if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES && |
d3175167 | 395 | il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES) |
46bc8d4b SG |
396 | il->cfg->base_params->num_of_queues = |
397 | il->cfg->mod_params->num_of_queues; | |
398 | ||
399 | il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues; | |
400 | il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM; | |
401 | il->hw_params.scd_bc_tbls_size = | |
402 | il->cfg->base_params->num_of_queues * | |
e2ebc833 | 403 | sizeof(struct il4965_scd_bc_tbl); |
46bc8d4b | 404 | il->hw_params.tfd_size = sizeof(struct il_tfd); |
d3175167 | 405 | il->hw_params.max_stations = IL4965_STATION_COUNT; |
7c2cde2e | 406 | il->ctx.bcast_sta_id = IL4965_BROADCAST_ID; |
d3175167 SG |
407 | il->hw_params.max_data_size = IL49_RTC_DATA_SIZE; |
408 | il->hw_params.max_inst_size = IL49_RTC_INST_SIZE; | |
46bc8d4b SG |
409 | il->hw_params.max_bsm_size = BSM_SRAM_SIZE; |
410 | il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ); | |
4bc85c13 | 411 | |
46bc8d4b | 412 | il->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; |
4bc85c13 | 413 | |
46bc8d4b SG |
414 | il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant); |
415 | il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant); | |
416 | il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant; | |
417 | il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant; | |
4bc85c13 | 418 | |
46bc8d4b | 419 | il4965_set_ct_threshold(il); |
4bc85c13 | 420 | |
46bc8d4b | 421 | il->hw_params.sens = &il4965_sensitivity; |
d3175167 | 422 | il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS; |
4bc85c13 WYG |
423 | |
424 | return 0; | |
425 | } | |
426 | ||
e2ebc833 | 427 | static s32 il4965_math_div_round(s32 num, s32 denom, s32 *res) |
4bc85c13 WYG |
428 | { |
429 | s32 sign = 1; | |
430 | ||
431 | if (num < 0) { | |
432 | sign = -sign; | |
433 | num = -num; | |
434 | } | |
435 | if (denom < 0) { | |
436 | sign = -sign; | |
437 | denom = -denom; | |
438 | } | |
439 | *res = 1; | |
440 | *res = ((num * 2 + denom) / (denom * 2)) * sign; | |
441 | ||
442 | return 1; | |
443 | } | |
444 | ||
445 | /** | |
e2ebc833 | 446 | * il4965_get_voltage_compensation - Power supply voltage comp for txpower |
4bc85c13 WYG |
447 | * |
448 | * Determines power supply voltage compensation for txpower calculations. | |
449 | * Returns number of 1/2-dB steps to subtract from gain table index, | |
450 | * to compensate for difference between power supply voltage during | |
451 | * factory measurements, vs. current power supply voltage. | |
452 | * | |
453 | * Voltage indication is higher for lower voltage. | |
454 | * Lower voltage requires more gain (lower gain table index). | |
455 | */ | |
e2ebc833 | 456 | static s32 il4965_get_voltage_compensation(s32 eeprom_voltage, |
4bc85c13 WYG |
457 | s32 current_voltage) |
458 | { | |
459 | s32 comp = 0; | |
460 | ||
232913b5 SG |
461 | if (TX_POWER_IL_ILLEGAL_VOLTAGE == eeprom_voltage || |
462 | TX_POWER_IL_ILLEGAL_VOLTAGE == current_voltage) | |
4bc85c13 WYG |
463 | return 0; |
464 | ||
e2ebc833 SG |
465 | il4965_math_div_round(current_voltage - eeprom_voltage, |
466 | TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp); | |
4bc85c13 WYG |
467 | |
468 | if (current_voltage > eeprom_voltage) | |
469 | comp *= 2; | |
470 | if ((comp < -2) || (comp > 2)) | |
471 | comp = 0; | |
472 | ||
473 | return comp; | |
474 | } | |
475 | ||
e2ebc833 | 476 | static s32 il4965_get_tx_atten_grp(u16 channel) |
4bc85c13 | 477 | { |
e2ebc833 SG |
478 | if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH && |
479 | channel <= CALIB_IL_TX_ATTEN_GR5_LCH) | |
4bc85c13 WYG |
480 | return CALIB_CH_GROUP_5; |
481 | ||
e2ebc833 SG |
482 | if (channel >= CALIB_IL_TX_ATTEN_GR1_FCH && |
483 | channel <= CALIB_IL_TX_ATTEN_GR1_LCH) | |
4bc85c13 WYG |
484 | return CALIB_CH_GROUP_1; |
485 | ||
e2ebc833 SG |
486 | if (channel >= CALIB_IL_TX_ATTEN_GR2_FCH && |
487 | channel <= CALIB_IL_TX_ATTEN_GR2_LCH) | |
4bc85c13 WYG |
488 | return CALIB_CH_GROUP_2; |
489 | ||
e2ebc833 SG |
490 | if (channel >= CALIB_IL_TX_ATTEN_GR3_FCH && |
491 | channel <= CALIB_IL_TX_ATTEN_GR3_LCH) | |
4bc85c13 WYG |
492 | return CALIB_CH_GROUP_3; |
493 | ||
e2ebc833 SG |
494 | if (channel >= CALIB_IL_TX_ATTEN_GR4_FCH && |
495 | channel <= CALIB_IL_TX_ATTEN_GR4_LCH) | |
4bc85c13 WYG |
496 | return CALIB_CH_GROUP_4; |
497 | ||
8e638188 | 498 | return -EINVAL; |
4bc85c13 WYG |
499 | } |
500 | ||
46bc8d4b | 501 | static u32 il4965_get_sub_band(const struct il_priv *il, u32 channel) |
4bc85c13 WYG |
502 | { |
503 | s32 b = -1; | |
504 | ||
505 | for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) { | |
46bc8d4b | 506 | if (il->calib_info->band_info[b].ch_from == 0) |
4bc85c13 WYG |
507 | continue; |
508 | ||
232913b5 SG |
509 | if (channel >= il->calib_info->band_info[b].ch_from && |
510 | channel <= il->calib_info->band_info[b].ch_to) | |
4bc85c13 WYG |
511 | break; |
512 | } | |
513 | ||
514 | return b; | |
515 | } | |
516 | ||
e2ebc833 | 517 | static s32 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2) |
4bc85c13 WYG |
518 | { |
519 | s32 val; | |
520 | ||
521 | if (x2 == x1) | |
522 | return y1; | |
523 | else { | |
e2ebc833 | 524 | il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val); |
4bc85c13 WYG |
525 | return val + y2; |
526 | } | |
527 | } | |
528 | ||
529 | /** | |
e2ebc833 | 530 | * il4965_interpolate_chan - Interpolate factory measurements for one channel |
4bc85c13 WYG |
531 | * |
532 | * Interpolates factory measurements from the two sample channels within a | |
533 | * sub-band, to apply to channel of interest. Interpolation is proportional to | |
534 | * differences in channel frequencies, which is proportional to differences | |
535 | * in channel number. | |
536 | */ | |
46bc8d4b | 537 | static int il4965_interpolate_chan(struct il_priv *il, u32 channel, |
e2ebc833 | 538 | struct il_eeprom_calib_ch_info *chan_info) |
4bc85c13 WYG |
539 | { |
540 | s32 s = -1; | |
541 | u32 c; | |
542 | u32 m; | |
e2ebc833 SG |
543 | const struct il_eeprom_calib_measure *m1; |
544 | const struct il_eeprom_calib_measure *m2; | |
545 | struct il_eeprom_calib_measure *omeas; | |
4bc85c13 WYG |
546 | u32 ch_i1; |
547 | u32 ch_i2; | |
548 | ||
46bc8d4b | 549 | s = il4965_get_sub_band(il, channel); |
4bc85c13 | 550 | if (s >= EEPROM_TX_POWER_BANDS) { |
9406f797 | 551 | IL_ERR("Tx Power can not find channel %d\n", channel); |
4bc85c13 WYG |
552 | return -1; |
553 | } | |
554 | ||
46bc8d4b SG |
555 | ch_i1 = il->calib_info->band_info[s].ch1.ch_num; |
556 | ch_i2 = il->calib_info->band_info[s].ch2.ch_num; | |
4bc85c13 WYG |
557 | chan_info->ch_num = (u8) channel; |
558 | ||
58de00a4 | 559 | D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n", |
4bc85c13 WYG |
560 | channel, s, ch_i1, ch_i2); |
561 | ||
562 | for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) { | |
563 | for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) { | |
46bc8d4b | 564 | m1 = &(il->calib_info->band_info[s].ch1. |
4bc85c13 | 565 | measurements[c][m]); |
46bc8d4b | 566 | m2 = &(il->calib_info->band_info[s].ch2. |
4bc85c13 WYG |
567 | measurements[c][m]); |
568 | omeas = &(chan_info->measurements[c][m]); | |
569 | ||
570 | omeas->actual_pow = | |
e2ebc833 | 571 | (u8) il4965_interpolate_value(channel, ch_i1, |
4bc85c13 WYG |
572 | m1->actual_pow, |
573 | ch_i2, | |
574 | m2->actual_pow); | |
575 | omeas->gain_idx = | |
e2ebc833 | 576 | (u8) il4965_interpolate_value(channel, ch_i1, |
4bc85c13 WYG |
577 | m1->gain_idx, ch_i2, |
578 | m2->gain_idx); | |
579 | omeas->temperature = | |
e2ebc833 | 580 | (u8) il4965_interpolate_value(channel, ch_i1, |
4bc85c13 WYG |
581 | m1->temperature, |
582 | ch_i2, | |
583 | m2->temperature); | |
584 | omeas->pa_det = | |
e2ebc833 | 585 | (s8) il4965_interpolate_value(channel, ch_i1, |
4bc85c13 WYG |
586 | m1->pa_det, ch_i2, |
587 | m2->pa_det); | |
588 | ||
58de00a4 | 589 | D_TXPOWER( |
4bc85c13 WYG |
590 | "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m, |
591 | m1->actual_pow, m2->actual_pow, omeas->actual_pow); | |
58de00a4 | 592 | D_TXPOWER( |
4bc85c13 WYG |
593 | "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m, |
594 | m1->gain_idx, m2->gain_idx, omeas->gain_idx); | |
58de00a4 | 595 | D_TXPOWER( |
4bc85c13 WYG |
596 | "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m, |
597 | m1->pa_det, m2->pa_det, omeas->pa_det); | |
58de00a4 | 598 | D_TXPOWER( |
4bc85c13 WYG |
599 | "chain %d meas %d T1=%d T2=%d T=%d\n", c, m, |
600 | m1->temperature, m2->temperature, | |
601 | omeas->temperature); | |
602 | } | |
603 | } | |
604 | ||
605 | return 0; | |
606 | } | |
607 | ||
608 | /* bit-rate-dependent table to prevent Tx distortion, in half-dB units, | |
609 | * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */ | |
610 | static s32 back_off_table[] = { | |
611 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */ | |
612 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */ | |
613 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */ | |
614 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */ | |
615 | 10 /* CCK */ | |
616 | }; | |
617 | ||
618 | /* Thermal compensation values for txpower for various frequency ranges ... | |
619 | * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */ | |
e2ebc833 | 620 | static struct il4965_txpower_comp_entry { |
4bc85c13 WYG |
621 | s32 degrees_per_05db_a; |
622 | s32 degrees_per_05db_a_denom; | |
623 | } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = { | |
624 | {9, 2}, /* group 0 5.2, ch 34-43 */ | |
625 | {4, 1}, /* group 1 5.2, ch 44-70 */ | |
626 | {4, 1}, /* group 2 5.2, ch 71-124 */ | |
627 | {4, 1}, /* group 3 5.2, ch 125-200 */ | |
628 | {3, 1} /* group 4 2.4, ch all */ | |
629 | }; | |
630 | ||
631 | static s32 get_min_power_index(s32 rate_power_index, u32 band) | |
632 | { | |
633 | if (!band) { | |
634 | if ((rate_power_index & 7) <= 4) | |
635 | return MIN_TX_GAIN_INDEX_52GHZ_EXT; | |
636 | } | |
637 | return MIN_TX_GAIN_INDEX; | |
638 | } | |
639 | ||
640 | struct gain_entry { | |
641 | u8 dsp; | |
642 | u8 radio; | |
643 | }; | |
644 | ||
645 | static const struct gain_entry gain_table[2][108] = { | |
646 | /* 5.2GHz power gain index table */ | |
647 | { | |
648 | {123, 0x3F}, /* highest txpower */ | |
649 | {117, 0x3F}, | |
650 | {110, 0x3F}, | |
651 | {104, 0x3F}, | |
652 | {98, 0x3F}, | |
653 | {110, 0x3E}, | |
654 | {104, 0x3E}, | |
655 | {98, 0x3E}, | |
656 | {110, 0x3D}, | |
657 | {104, 0x3D}, | |
658 | {98, 0x3D}, | |
659 | {110, 0x3C}, | |
660 | {104, 0x3C}, | |
661 | {98, 0x3C}, | |
662 | {110, 0x3B}, | |
663 | {104, 0x3B}, | |
664 | {98, 0x3B}, | |
665 | {110, 0x3A}, | |
666 | {104, 0x3A}, | |
667 | {98, 0x3A}, | |
668 | {110, 0x39}, | |
669 | {104, 0x39}, | |
670 | {98, 0x39}, | |
671 | {110, 0x38}, | |
672 | {104, 0x38}, | |
673 | {98, 0x38}, | |
674 | {110, 0x37}, | |
675 | {104, 0x37}, | |
676 | {98, 0x37}, | |
677 | {110, 0x36}, | |
678 | {104, 0x36}, | |
679 | {98, 0x36}, | |
680 | {110, 0x35}, | |
681 | {104, 0x35}, | |
682 | {98, 0x35}, | |
683 | {110, 0x34}, | |
684 | {104, 0x34}, | |
685 | {98, 0x34}, | |
686 | {110, 0x33}, | |
687 | {104, 0x33}, | |
688 | {98, 0x33}, | |
689 | {110, 0x32}, | |
690 | {104, 0x32}, | |
691 | {98, 0x32}, | |
692 | {110, 0x31}, | |
693 | {104, 0x31}, | |
694 | {98, 0x31}, | |
695 | {110, 0x30}, | |
696 | {104, 0x30}, | |
697 | {98, 0x30}, | |
698 | {110, 0x25}, | |
699 | {104, 0x25}, | |
700 | {98, 0x25}, | |
701 | {110, 0x24}, | |
702 | {104, 0x24}, | |
703 | {98, 0x24}, | |
704 | {110, 0x23}, | |
705 | {104, 0x23}, | |
706 | {98, 0x23}, | |
707 | {110, 0x22}, | |
708 | {104, 0x18}, | |
709 | {98, 0x18}, | |
710 | {110, 0x17}, | |
711 | {104, 0x17}, | |
712 | {98, 0x17}, | |
713 | {110, 0x16}, | |
714 | {104, 0x16}, | |
715 | {98, 0x16}, | |
716 | {110, 0x15}, | |
717 | {104, 0x15}, | |
718 | {98, 0x15}, | |
719 | {110, 0x14}, | |
720 | {104, 0x14}, | |
721 | {98, 0x14}, | |
722 | {110, 0x13}, | |
723 | {104, 0x13}, | |
724 | {98, 0x13}, | |
725 | {110, 0x12}, | |
726 | {104, 0x08}, | |
727 | {98, 0x08}, | |
728 | {110, 0x07}, | |
729 | {104, 0x07}, | |
730 | {98, 0x07}, | |
731 | {110, 0x06}, | |
732 | {104, 0x06}, | |
733 | {98, 0x06}, | |
734 | {110, 0x05}, | |
735 | {104, 0x05}, | |
736 | {98, 0x05}, | |
737 | {110, 0x04}, | |
738 | {104, 0x04}, | |
739 | {98, 0x04}, | |
740 | {110, 0x03}, | |
741 | {104, 0x03}, | |
742 | {98, 0x03}, | |
743 | {110, 0x02}, | |
744 | {104, 0x02}, | |
745 | {98, 0x02}, | |
746 | {110, 0x01}, | |
747 | {104, 0x01}, | |
748 | {98, 0x01}, | |
749 | {110, 0x00}, | |
750 | {104, 0x00}, | |
751 | {98, 0x00}, | |
752 | {93, 0x00}, | |
753 | {88, 0x00}, | |
754 | {83, 0x00}, | |
755 | {78, 0x00}, | |
756 | }, | |
757 | /* 2.4GHz power gain index table */ | |
758 | { | |
759 | {110, 0x3f}, /* highest txpower */ | |
760 | {104, 0x3f}, | |
761 | {98, 0x3f}, | |
762 | {110, 0x3e}, | |
763 | {104, 0x3e}, | |
764 | {98, 0x3e}, | |
765 | {110, 0x3d}, | |
766 | {104, 0x3d}, | |
767 | {98, 0x3d}, | |
768 | {110, 0x3c}, | |
769 | {104, 0x3c}, | |
770 | {98, 0x3c}, | |
771 | {110, 0x3b}, | |
772 | {104, 0x3b}, | |
773 | {98, 0x3b}, | |
774 | {110, 0x3a}, | |
775 | {104, 0x3a}, | |
776 | {98, 0x3a}, | |
777 | {110, 0x39}, | |
778 | {104, 0x39}, | |
779 | {98, 0x39}, | |
780 | {110, 0x38}, | |
781 | {104, 0x38}, | |
782 | {98, 0x38}, | |
783 | {110, 0x37}, | |
784 | {104, 0x37}, | |
785 | {98, 0x37}, | |
786 | {110, 0x36}, | |
787 | {104, 0x36}, | |
788 | {98, 0x36}, | |
789 | {110, 0x35}, | |
790 | {104, 0x35}, | |
791 | {98, 0x35}, | |
792 | {110, 0x34}, | |
793 | {104, 0x34}, | |
794 | {98, 0x34}, | |
795 | {110, 0x33}, | |
796 | {104, 0x33}, | |
797 | {98, 0x33}, | |
798 | {110, 0x32}, | |
799 | {104, 0x32}, | |
800 | {98, 0x32}, | |
801 | {110, 0x31}, | |
802 | {104, 0x31}, | |
803 | {98, 0x31}, | |
804 | {110, 0x30}, | |
805 | {104, 0x30}, | |
806 | {98, 0x30}, | |
807 | {110, 0x6}, | |
808 | {104, 0x6}, | |
809 | {98, 0x6}, | |
810 | {110, 0x5}, | |
811 | {104, 0x5}, | |
812 | {98, 0x5}, | |
813 | {110, 0x4}, | |
814 | {104, 0x4}, | |
815 | {98, 0x4}, | |
816 | {110, 0x3}, | |
817 | {104, 0x3}, | |
818 | {98, 0x3}, | |
819 | {110, 0x2}, | |
820 | {104, 0x2}, | |
821 | {98, 0x2}, | |
822 | {110, 0x1}, | |
823 | {104, 0x1}, | |
824 | {98, 0x1}, | |
825 | {110, 0x0}, | |
826 | {104, 0x0}, | |
827 | {98, 0x0}, | |
828 | {97, 0}, | |
829 | {96, 0}, | |
830 | {95, 0}, | |
831 | {94, 0}, | |
832 | {93, 0}, | |
833 | {92, 0}, | |
834 | {91, 0}, | |
835 | {90, 0}, | |
836 | {89, 0}, | |
837 | {88, 0}, | |
838 | {87, 0}, | |
839 | {86, 0}, | |
840 | {85, 0}, | |
841 | {84, 0}, | |
842 | {83, 0}, | |
843 | {82, 0}, | |
844 | {81, 0}, | |
845 | {80, 0}, | |
846 | {79, 0}, | |
847 | {78, 0}, | |
848 | {77, 0}, | |
849 | {76, 0}, | |
850 | {75, 0}, | |
851 | {74, 0}, | |
852 | {73, 0}, | |
853 | {72, 0}, | |
854 | {71, 0}, | |
855 | {70, 0}, | |
856 | {69, 0}, | |
857 | {68, 0}, | |
858 | {67, 0}, | |
859 | {66, 0}, | |
860 | {65, 0}, | |
861 | {64, 0}, | |
862 | {63, 0}, | |
863 | {62, 0}, | |
864 | {61, 0}, | |
865 | {60, 0}, | |
866 | {59, 0}, | |
867 | } | |
868 | }; | |
869 | ||
46bc8d4b | 870 | static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, |
4bc85c13 | 871 | u8 is_ht40, u8 ctrl_chan_high, |
e2ebc833 | 872 | struct il4965_tx_power_db *tx_power_tbl) |
4bc85c13 WYG |
873 | { |
874 | u8 saturation_power; | |
875 | s32 target_power; | |
876 | s32 user_target_power; | |
877 | s32 power_limit; | |
878 | s32 current_temp; | |
879 | s32 reg_limit; | |
880 | s32 current_regulatory; | |
881 | s32 txatten_grp = CALIB_CH_GROUP_MAX; | |
882 | int i; | |
883 | int c; | |
e2ebc833 SG |
884 | const struct il_channel_info *ch_info = NULL; |
885 | struct il_eeprom_calib_ch_info ch_eeprom_info; | |
886 | const struct il_eeprom_calib_measure *measurement; | |
4bc85c13 WYG |
887 | s16 voltage; |
888 | s32 init_voltage; | |
889 | s32 voltage_compensation; | |
890 | s32 degrees_per_05db_num; | |
891 | s32 degrees_per_05db_denom; | |
892 | s32 factory_temp; | |
893 | s32 temperature_comp[2]; | |
894 | s32 factory_gain_index[2]; | |
895 | s32 factory_actual_pwr[2]; | |
896 | s32 power_index; | |
897 | ||
898 | /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units | |
899 | * are used for indexing into txpower table) */ | |
46bc8d4b | 900 | user_target_power = 2 * il->tx_power_user_lmt; |
4bc85c13 WYG |
901 | |
902 | /* Get current (RXON) channel, band, width */ | |
58de00a4 | 903 | D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band, |
4bc85c13 WYG |
904 | is_ht40); |
905 | ||
46bc8d4b | 906 | ch_info = il_get_channel_info(il, il->band, channel); |
4bc85c13 | 907 | |
e2ebc833 | 908 | if (!il_is_channel_valid(ch_info)) |
4bc85c13 WYG |
909 | return -EINVAL; |
910 | ||
911 | /* get txatten group, used to select 1) thermal txpower adjustment | |
912 | * and 2) mimo txpower balance between Tx chains. */ | |
e2ebc833 | 913 | txatten_grp = il4965_get_tx_atten_grp(channel); |
4bc85c13 | 914 | if (txatten_grp < 0) { |
9406f797 | 915 | IL_ERR("Can't find txatten group for channel %d.\n", |
4bc85c13 | 916 | channel); |
5c30c76e | 917 | return txatten_grp; |
4bc85c13 WYG |
918 | } |
919 | ||
58de00a4 | 920 | D_TXPOWER("channel %d belongs to txatten group %d\n", |
4bc85c13 WYG |
921 | channel, txatten_grp); |
922 | ||
923 | if (is_ht40) { | |
924 | if (ctrl_chan_high) | |
925 | channel -= 2; | |
926 | else | |
927 | channel += 2; | |
928 | } | |
929 | ||
930 | /* hardware txpower limits ... | |
931 | * saturation (clipping distortion) txpowers are in half-dBm */ | |
932 | if (band) | |
46bc8d4b | 933 | saturation_power = il->calib_info->saturation_power24; |
4bc85c13 | 934 | else |
46bc8d4b | 935 | saturation_power = il->calib_info->saturation_power52; |
4bc85c13 | 936 | |
e2ebc833 SG |
937 | if (saturation_power < IL_TX_POWER_SATURATION_MIN || |
938 | saturation_power > IL_TX_POWER_SATURATION_MAX) { | |
4bc85c13 | 939 | if (band) |
e2ebc833 | 940 | saturation_power = IL_TX_POWER_DEFAULT_SATURATION_24; |
4bc85c13 | 941 | else |
e2ebc833 | 942 | saturation_power = IL_TX_POWER_DEFAULT_SATURATION_52; |
4bc85c13 WYG |
943 | } |
944 | ||
945 | /* regulatory txpower limits ... reg_limit values are in half-dBm, | |
946 | * max_power_avg values are in dBm, convert * 2 */ | |
947 | if (is_ht40) | |
948 | reg_limit = ch_info->ht40_max_power_avg * 2; | |
949 | else | |
950 | reg_limit = ch_info->max_power_avg * 2; | |
951 | ||
e2ebc833 SG |
952 | if ((reg_limit < IL_TX_POWER_REGULATORY_MIN) || |
953 | (reg_limit > IL_TX_POWER_REGULATORY_MAX)) { | |
4bc85c13 | 954 | if (band) |
e2ebc833 | 955 | reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_24; |
4bc85c13 | 956 | else |
e2ebc833 | 957 | reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_52; |
4bc85c13 WYG |
958 | } |
959 | ||
960 | /* Interpolate txpower calibration values for this channel, | |
961 | * based on factory calibration tests on spaced channels. */ | |
46bc8d4b | 962 | il4965_interpolate_chan(il, channel, &ch_eeprom_info); |
4bc85c13 WYG |
963 | |
964 | /* calculate tx gain adjustment based on power supply voltage */ | |
46bc8d4b SG |
965 | voltage = le16_to_cpu(il->calib_info->voltage); |
966 | init_voltage = (s32)le32_to_cpu(il->card_alive_init.voltage); | |
4bc85c13 | 967 | voltage_compensation = |
e2ebc833 | 968 | il4965_get_voltage_compensation(voltage, init_voltage); |
4bc85c13 | 969 | |
58de00a4 | 970 | D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n", |
4bc85c13 WYG |
971 | init_voltage, |
972 | voltage, voltage_compensation); | |
973 | ||
974 | /* get current temperature (Celsius) */ | |
46bc8d4b SG |
975 | current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN); |
976 | current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX); | |
4bc85c13 WYG |
977 | current_temp = KELVIN_TO_CELSIUS(current_temp); |
978 | ||
979 | /* select thermal txpower adjustment params, based on channel group | |
980 | * (same frequency group used for mimo txatten adjustment) */ | |
981 | degrees_per_05db_num = | |
982 | tx_power_cmp_tble[txatten_grp].degrees_per_05db_a; | |
983 | degrees_per_05db_denom = | |
984 | tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom; | |
985 | ||
986 | /* get per-chain txpower values from factory measurements */ | |
987 | for (c = 0; c < 2; c++) { | |
988 | measurement = &ch_eeprom_info.measurements[c][1]; | |
989 | ||
990 | /* txgain adjustment (in half-dB steps) based on difference | |
991 | * between factory and current temperature */ | |
992 | factory_temp = measurement->temperature; | |
e2ebc833 | 993 | il4965_math_div_round((current_temp - factory_temp) * |
4bc85c13 WYG |
994 | degrees_per_05db_denom, |
995 | degrees_per_05db_num, | |
996 | &temperature_comp[c]); | |
997 | ||
998 | factory_gain_index[c] = measurement->gain_idx; | |
999 | factory_actual_pwr[c] = measurement->actual_pow; | |
1000 | ||
58de00a4 SG |
1001 | D_TXPOWER("chain = %d\n", c); |
1002 | D_TXPOWER("fctry tmp %d, " | |
4bc85c13 WYG |
1003 | "curr tmp %d, comp %d steps\n", |
1004 | factory_temp, current_temp, | |
1005 | temperature_comp[c]); | |
1006 | ||
58de00a4 | 1007 | D_TXPOWER("fctry idx %d, fctry pwr %d\n", |
4bc85c13 WYG |
1008 | factory_gain_index[c], |
1009 | factory_actual_pwr[c]); | |
1010 | } | |
1011 | ||
1012 | /* for each of 33 bit-rates (including 1 for CCK) */ | |
1013 | for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) { | |
1014 | u8 is_mimo_rate; | |
e2ebc833 | 1015 | union il4965_tx_power_dual_stream tx_power; |
4bc85c13 WYG |
1016 | |
1017 | /* for mimo, reduce each chain's txpower by half | |
1018 | * (3dB, 6 steps), so total output power is regulatory | |
1019 | * compliant. */ | |
1020 | if (i & 0x8) { | |
1021 | current_regulatory = reg_limit - | |
e2ebc833 | 1022 | IL_TX_POWER_MIMO_REGULATORY_COMPENSATION; |
4bc85c13 WYG |
1023 | is_mimo_rate = 1; |
1024 | } else { | |
1025 | current_regulatory = reg_limit; | |
1026 | is_mimo_rate = 0; | |
1027 | } | |
1028 | ||
1029 | /* find txpower limit, either hardware or regulatory */ | |
1030 | power_limit = saturation_power - back_off_table[i]; | |
1031 | if (power_limit > current_regulatory) | |
1032 | power_limit = current_regulatory; | |
1033 | ||
1034 | /* reduce user's txpower request if necessary | |
1035 | * for this rate on this channel */ | |
1036 | target_power = user_target_power; | |
1037 | if (target_power > power_limit) | |
1038 | target_power = power_limit; | |
1039 | ||
58de00a4 | 1040 | D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n", |
4bc85c13 WYG |
1041 | i, saturation_power - back_off_table[i], |
1042 | current_regulatory, user_target_power, | |
1043 | target_power); | |
1044 | ||
1045 | /* for each of 2 Tx chains (radio transmitters) */ | |
1046 | for (c = 0; c < 2; c++) { | |
1047 | s32 atten_value; | |
1048 | ||
1049 | if (is_mimo_rate) | |
1050 | atten_value = | |
46bc8d4b | 1051 | (s32)le32_to_cpu(il->card_alive_init. |
4bc85c13 WYG |
1052 | tx_atten[txatten_grp][c]); |
1053 | else | |
1054 | atten_value = 0; | |
1055 | ||
1056 | /* calculate index; higher index means lower txpower */ | |
1057 | power_index = (u8) (factory_gain_index[c] - | |
1058 | (target_power - | |
1059 | factory_actual_pwr[c]) - | |
1060 | temperature_comp[c] - | |
1061 | voltage_compensation + | |
1062 | atten_value); | |
1063 | ||
58de00a4 | 1064 | /* D_TXPOWER("calculated txpower index %d\n", |
4bc85c13 WYG |
1065 | power_index); */ |
1066 | ||
1067 | if (power_index < get_min_power_index(i, band)) | |
1068 | power_index = get_min_power_index(i, band); | |
1069 | ||
1070 | /* adjust 5 GHz index to support negative indexes */ | |
1071 | if (!band) | |
1072 | power_index += 9; | |
1073 | ||
1074 | /* CCK, rate 32, reduce txpower for CCK */ | |
1075 | if (i == POWER_TABLE_CCK_ENTRY) | |
1076 | power_index += | |
e2ebc833 | 1077 | IL_TX_POWER_CCK_COMPENSATION_C_STEP; |
4bc85c13 WYG |
1078 | |
1079 | /* stay within the table! */ | |
1080 | if (power_index > 107) { | |
9406f797 | 1081 | IL_WARN("txpower index %d > 107\n", |
4bc85c13 WYG |
1082 | power_index); |
1083 | power_index = 107; | |
1084 | } | |
1085 | if (power_index < 0) { | |
9406f797 | 1086 | IL_WARN("txpower index %d < 0\n", |
4bc85c13 WYG |
1087 | power_index); |
1088 | power_index = 0; | |
1089 | } | |
1090 | ||
1091 | /* fill txpower command for this rate/chain */ | |
1092 | tx_power.s.radio_tx_gain[c] = | |
1093 | gain_table[band][power_index].radio; | |
1094 | tx_power.s.dsp_predis_atten[c] = | |
1095 | gain_table[band][power_index].dsp; | |
1096 | ||
58de00a4 | 1097 | D_TXPOWER("chain %d mimo %d index %d " |
4bc85c13 WYG |
1098 | "gain 0x%02x dsp %d\n", |
1099 | c, atten_value, power_index, | |
1100 | tx_power.s.radio_tx_gain[c], | |
1101 | tx_power.s.dsp_predis_atten[c]); | |
1102 | } /* for each chain */ | |
1103 | ||
1104 | tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw); | |
1105 | ||
1106 | } /* for each rate */ | |
1107 | ||
1108 | return 0; | |
1109 | } | |
1110 | ||
1111 | /** | |
e2ebc833 | 1112 | * il4965_send_tx_power - Configure the TXPOWER level user limit |
4bc85c13 WYG |
1113 | * |
1114 | * Uses the active RXON for channel, band, and characteristics (ht40, high) | |
46bc8d4b | 1115 | * The power limit is taken from il->tx_power_user_lmt. |
4bc85c13 | 1116 | */ |
46bc8d4b | 1117 | static int il4965_send_tx_power(struct il_priv *il) |
4bc85c13 | 1118 | { |
e2ebc833 | 1119 | struct il4965_txpowertable_cmd cmd = { 0 }; |
4bc85c13 WYG |
1120 | int ret; |
1121 | u8 band = 0; | |
1122 | bool is_ht40 = false; | |
1123 | u8 ctrl_chan_high = 0; | |
7c2cde2e | 1124 | struct il_rxon_context *ctx = &il->ctx; |
4bc85c13 | 1125 | |
46bc8d4b | 1126 | if (WARN_ONCE(test_bit(STATUS_SCAN_HW, &il->status), |
4bc85c13 WYG |
1127 | "TX Power requested while scanning!\n")) |
1128 | return -EAGAIN; | |
1129 | ||
46bc8d4b | 1130 | band = il->band == IEEE80211_BAND_2GHZ; |
4bc85c13 | 1131 | |
be663ab6 | 1132 | is_ht40 = iw4965_is_ht40_channel(ctx->active.flags); |
4bc85c13 WYG |
1133 | |
1134 | if (is_ht40 && (ctx->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) | |
1135 | ctrl_chan_high = 1; | |
1136 | ||
1137 | cmd.band = band; | |
1138 | cmd.channel = ctx->active.channel; | |
1139 | ||
46bc8d4b | 1140 | ret = il4965_fill_txpower_tbl(il, band, |
4bc85c13 WYG |
1141 | le16_to_cpu(ctx->active.channel), |
1142 | is_ht40, ctrl_chan_high, &cmd.tx_power); | |
1143 | if (ret) | |
1144 | goto out; | |
1145 | ||
46bc8d4b | 1146 | ret = il_send_cmd_pdu(il, |
be663ab6 | 1147 | REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd); |
4bc85c13 WYG |
1148 | |
1149 | out: | |
1150 | return ret; | |
1151 | } | |
1152 | ||
46bc8d4b | 1153 | static int il4965_send_rxon_assoc(struct il_priv *il, |
e2ebc833 | 1154 | struct il_rxon_context *ctx) |
4bc85c13 WYG |
1155 | { |
1156 | int ret = 0; | |
e2ebc833 SG |
1157 | struct il4965_rxon_assoc_cmd rxon_assoc; |
1158 | const struct il_rxon_cmd *rxon1 = &ctx->staging; | |
1159 | const struct il_rxon_cmd *rxon2 = &ctx->active; | |
4bc85c13 | 1160 | |
232913b5 SG |
1161 | if (rxon1->flags == rxon2->flags && |
1162 | rxon1->filter_flags == rxon2->filter_flags && | |
1163 | rxon1->cck_basic_rates == rxon2->cck_basic_rates && | |
1164 | rxon1->ofdm_ht_single_stream_basic_rates == | |
1165 | rxon2->ofdm_ht_single_stream_basic_rates && | |
1166 | rxon1->ofdm_ht_dual_stream_basic_rates == | |
1167 | rxon2->ofdm_ht_dual_stream_basic_rates && | |
1168 | rxon1->rx_chain == rxon2->rx_chain && | |
1169 | rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) { | |
58de00a4 | 1170 | D_INFO("Using current RXON_ASSOC. Not resending.\n"); |
4bc85c13 WYG |
1171 | return 0; |
1172 | } | |
1173 | ||
1174 | rxon_assoc.flags = ctx->staging.flags; | |
1175 | rxon_assoc.filter_flags = ctx->staging.filter_flags; | |
1176 | rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates; | |
1177 | rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates; | |
1178 | rxon_assoc.reserved = 0; | |
1179 | rxon_assoc.ofdm_ht_single_stream_basic_rates = | |
1180 | ctx->staging.ofdm_ht_single_stream_basic_rates; | |
1181 | rxon_assoc.ofdm_ht_dual_stream_basic_rates = | |
1182 | ctx->staging.ofdm_ht_dual_stream_basic_rates; | |
1183 | rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain; | |
1184 | ||
46bc8d4b | 1185 | ret = il_send_cmd_pdu_async(il, REPLY_RXON_ASSOC, |
4bc85c13 | 1186 | sizeof(rxon_assoc), &rxon_assoc, NULL); |
4bc85c13 WYG |
1187 | |
1188 | return ret; | |
1189 | } | |
1190 | ||
46bc8d4b | 1191 | static int il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) |
4bc85c13 WYG |
1192 | { |
1193 | /* cast away the const for active_rxon in this function */ | |
e2ebc833 | 1194 | struct il_rxon_cmd *active_rxon = (void *)&ctx->active; |
4bc85c13 WYG |
1195 | int ret; |
1196 | bool new_assoc = | |
1197 | !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK); | |
1198 | ||
46bc8d4b | 1199 | if (!il_is_alive(il)) |
4bc85c13 WYG |
1200 | return -EBUSY; |
1201 | ||
1202 | if (!ctx->is_active) | |
1203 | return 0; | |
1204 | ||
1205 | /* always get timestamp with Rx frame */ | |
1206 | ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK; | |
1207 | ||
46bc8d4b | 1208 | ret = il_check_rxon_cmd(il, ctx); |
4bc85c13 | 1209 | if (ret) { |
9406f797 | 1210 | IL_ERR("Invalid RXON configuration. Not committing.\n"); |
4bc85c13 WYG |
1211 | return -EINVAL; |
1212 | } | |
1213 | ||
1214 | /* | |
1215 | * receive commit_rxon request | |
1216 | * abort any previous channel switch if still in process | |
1217 | */ | |
46bc8d4b | 1218 | if (test_bit(STATUS_CHANNEL_SWITCH_PENDING, &il->status) && |
232913b5 | 1219 | il->switch_channel != ctx->staging.channel) { |
58de00a4 | 1220 | D_11H("abort channel switch on %d\n", |
46bc8d4b SG |
1221 | le16_to_cpu(il->switch_channel)); |
1222 | il_chswitch_done(il, false); | |
4bc85c13 WYG |
1223 | } |
1224 | ||
1225 | /* If we don't need to send a full RXON, we can use | |
e2ebc833 | 1226 | * il_rxon_assoc_cmd which is used to reconfigure filter |
4bc85c13 | 1227 | * and other flags for the current radio configuration. */ |
46bc8d4b SG |
1228 | if (!il_full_rxon_required(il, ctx)) { |
1229 | ret = il_send_rxon_assoc(il, ctx); | |
4bc85c13 | 1230 | if (ret) { |
9406f797 | 1231 | IL_ERR("Error setting RXON_ASSOC (%d)\n", ret); |
4bc85c13 WYG |
1232 | return ret; |
1233 | } | |
1234 | ||
1235 | memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon)); | |
46bc8d4b | 1236 | il_print_rx_config_cmd(il, ctx); |
17e859a8 SG |
1237 | /* |
1238 | * We do not commit tx power settings while channel changing, | |
1239 | * do it now if tx power changed. | |
1240 | */ | |
46bc8d4b | 1241 | il_set_tx_power(il, il->tx_power_next, false); |
17e859a8 | 1242 | return 0; |
4bc85c13 WYG |
1243 | } |
1244 | ||
1245 | /* If we are currently associated and the new config requires | |
1246 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
1247 | * we must clear the associated from the active configuration | |
1248 | * before we apply the new config */ | |
e2ebc833 | 1249 | if (il_is_associated_ctx(ctx) && new_assoc) { |
58de00a4 | 1250 | D_INFO("Toggling associated bit on current RXON\n"); |
4bc85c13 WYG |
1251 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
1252 | ||
46bc8d4b | 1253 | ret = il_send_cmd_pdu(il, ctx->rxon_cmd, |
e2ebc833 | 1254 | sizeof(struct il_rxon_cmd), |
4bc85c13 WYG |
1255 | active_rxon); |
1256 | ||
1257 | /* If the mask clearing failed then we set | |
1258 | * active_rxon back to what it was previously */ | |
1259 | if (ret) { | |
1260 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | |
9406f797 | 1261 | IL_ERR("Error clearing ASSOC_MSK (%d)\n", ret); |
4bc85c13 WYG |
1262 | return ret; |
1263 | } | |
46bc8d4b SG |
1264 | il_clear_ucode_stations(il, ctx); |
1265 | il_restore_stations(il, ctx); | |
1266 | ret = il4965_restore_default_wep_keys(il, ctx); | |
4bc85c13 | 1267 | if (ret) { |
9406f797 | 1268 | IL_ERR("Failed to restore WEP keys (%d)\n", ret); |
4bc85c13 WYG |
1269 | return ret; |
1270 | } | |
1271 | } | |
1272 | ||
58de00a4 | 1273 | D_INFO("Sending RXON\n" |
4bc85c13 WYG |
1274 | "* with%s RXON_FILTER_ASSOC_MSK\n" |
1275 | "* channel = %d\n" | |
1276 | "* bssid = %pM\n", | |
1277 | (new_assoc ? "" : "out"), | |
1278 | le16_to_cpu(ctx->staging.channel), | |
1279 | ctx->staging.bssid_addr); | |
1280 | ||
46bc8d4b SG |
1281 | il_set_rxon_hwcrypto(il, ctx, |
1282 | !il->cfg->mod_params->sw_crypto); | |
4bc85c13 WYG |
1283 | |
1284 | /* Apply the new configuration | |
1285 | * RXON unassoc clears the station table in uCode so restoration of | |
1286 | * stations is needed after it (the RXON command) completes | |
1287 | */ | |
1288 | if (!new_assoc) { | |
46bc8d4b | 1289 | ret = il_send_cmd_pdu(il, ctx->rxon_cmd, |
e2ebc833 | 1290 | sizeof(struct il_rxon_cmd), &ctx->staging); |
4bc85c13 | 1291 | if (ret) { |
9406f797 | 1292 | IL_ERR("Error setting new RXON (%d)\n", ret); |
4bc85c13 WYG |
1293 | return ret; |
1294 | } | |
58de00a4 | 1295 | D_INFO("Return from !new_assoc RXON.\n"); |
4bc85c13 | 1296 | memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon)); |
46bc8d4b SG |
1297 | il_clear_ucode_stations(il, ctx); |
1298 | il_restore_stations(il, ctx); | |
1299 | ret = il4965_restore_default_wep_keys(il, ctx); | |
4bc85c13 | 1300 | if (ret) { |
9406f797 | 1301 | IL_ERR("Failed to restore WEP keys (%d)\n", ret); |
4bc85c13 WYG |
1302 | return ret; |
1303 | } | |
1304 | } | |
1305 | if (new_assoc) { | |
46bc8d4b | 1306 | il->start_calib = 0; |
4bc85c13 WYG |
1307 | /* Apply the new configuration |
1308 | * RXON assoc doesn't clear the station table in uCode, | |
1309 | */ | |
46bc8d4b | 1310 | ret = il_send_cmd_pdu(il, ctx->rxon_cmd, |
e2ebc833 | 1311 | sizeof(struct il_rxon_cmd), &ctx->staging); |
4bc85c13 | 1312 | if (ret) { |
9406f797 | 1313 | IL_ERR("Error setting new RXON (%d)\n", ret); |
4bc85c13 WYG |
1314 | return ret; |
1315 | } | |
1316 | memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon)); | |
1317 | } | |
46bc8d4b | 1318 | il_print_rx_config_cmd(il, ctx); |
4bc85c13 | 1319 | |
46bc8d4b | 1320 | il4965_init_sensitivity(il); |
4bc85c13 WYG |
1321 | |
1322 | /* If we issue a new RXON command which required a tune then we must | |
1323 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
46bc8d4b | 1324 | ret = il_set_tx_power(il, il->tx_power_next, true); |
4bc85c13 | 1325 | if (ret) { |
9406f797 | 1326 | IL_ERR("Error sending TX power (%d)\n", ret); |
4bc85c13 WYG |
1327 | return ret; |
1328 | } | |
1329 | ||
1330 | return 0; | |
1331 | } | |
1332 | ||
46bc8d4b | 1333 | static int il4965_hw_channel_switch(struct il_priv *il, |
4bc85c13 WYG |
1334 | struct ieee80211_channel_switch *ch_switch) |
1335 | { | |
7c2cde2e | 1336 | struct il_rxon_context *ctx = &il->ctx; |
4bc85c13 WYG |
1337 | int rc; |
1338 | u8 band = 0; | |
1339 | bool is_ht40 = false; | |
1340 | u8 ctrl_chan_high = 0; | |
e2ebc833 SG |
1341 | struct il4965_channel_switch_cmd cmd; |
1342 | const struct il_channel_info *ch_info; | |
4bc85c13 WYG |
1343 | u32 switch_time_in_usec, ucode_switch_time; |
1344 | u16 ch; | |
1345 | u32 tsf_low; | |
1346 | u8 switch_count; | |
1347 | u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval); | |
1348 | struct ieee80211_vif *vif = ctx->vif; | |
46bc8d4b | 1349 | band = il->band == IEEE80211_BAND_2GHZ; |
4bc85c13 | 1350 | |
be663ab6 | 1351 | is_ht40 = iw4965_is_ht40_channel(ctx->staging.flags); |
4bc85c13 WYG |
1352 | |
1353 | if (is_ht40 && | |
1354 | (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) | |
1355 | ctrl_chan_high = 1; | |
1356 | ||
1357 | cmd.band = band; | |
1358 | cmd.expect_beacon = 0; | |
1359 | ch = ch_switch->channel->hw_value; | |
1360 | cmd.channel = cpu_to_le16(ch); | |
1361 | cmd.rxon_flags = ctx->staging.flags; | |
1362 | cmd.rxon_filter_flags = ctx->staging.filter_flags; | |
1363 | switch_count = ch_switch->count; | |
1364 | tsf_low = ch_switch->timestamp & 0x0ffffffff; | |
1365 | /* | |
1366 | * calculate the ucode channel switch time | |
1367 | * adding TSF as one of the factor for when to switch | |
1368 | */ | |
232913b5 | 1369 | if (il->ucode_beacon_time > tsf_low && beacon_interval) { |
46bc8d4b | 1370 | if (switch_count > ((il->ucode_beacon_time - tsf_low) / |
4bc85c13 | 1371 | beacon_interval)) { |
46bc8d4b | 1372 | switch_count -= (il->ucode_beacon_time - |
4bc85c13 WYG |
1373 | tsf_low) / beacon_interval; |
1374 | } else | |
1375 | switch_count = 0; | |
1376 | } | |
1377 | if (switch_count <= 1) | |
46bc8d4b | 1378 | cmd.switch_time = cpu_to_le32(il->ucode_beacon_time); |
4bc85c13 WYG |
1379 | else { |
1380 | switch_time_in_usec = | |
1381 | vif->bss_conf.beacon_int * switch_count * TIME_UNIT; | |
46bc8d4b | 1382 | ucode_switch_time = il_usecs_to_beacons(il, |
4bc85c13 WYG |
1383 | switch_time_in_usec, |
1384 | beacon_interval); | |
46bc8d4b SG |
1385 | cmd.switch_time = il_add_beacon_time(il, |
1386 | il->ucode_beacon_time, | |
4bc85c13 WYG |
1387 | ucode_switch_time, |
1388 | beacon_interval); | |
1389 | } | |
58de00a4 | 1390 | D_11H("uCode time for the switch is 0x%x\n", |
4bc85c13 | 1391 | cmd.switch_time); |
46bc8d4b | 1392 | ch_info = il_get_channel_info(il, il->band, ch); |
4bc85c13 | 1393 | if (ch_info) |
e2ebc833 | 1394 | cmd.expect_beacon = il_is_channel_radar(ch_info); |
4bc85c13 | 1395 | else { |
9406f797 | 1396 | IL_ERR("invalid channel switch from %u to %u\n", |
4bc85c13 WYG |
1397 | ctx->active.channel, ch); |
1398 | return -EFAULT; | |
1399 | } | |
1400 | ||
46bc8d4b | 1401 | rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40, |
4bc85c13 WYG |
1402 | ctrl_chan_high, &cmd.tx_power); |
1403 | if (rc) { | |
58de00a4 | 1404 | D_11H("error:%d fill txpower_tbl\n", rc); |
4bc85c13 WYG |
1405 | return rc; |
1406 | } | |
1407 | ||
46bc8d4b | 1408 | return il_send_cmd_pdu(il, |
be663ab6 | 1409 | REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd); |
4bc85c13 WYG |
1410 | } |
1411 | ||
1412 | /** | |
e2ebc833 | 1413 | * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array |
4bc85c13 | 1414 | */ |
46bc8d4b | 1415 | static void il4965_txq_update_byte_cnt_tbl(struct il_priv *il, |
e2ebc833 | 1416 | struct il_tx_queue *txq, |
4bc85c13 WYG |
1417 | u16 byte_cnt) |
1418 | { | |
46bc8d4b | 1419 | struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr; |
4bc85c13 WYG |
1420 | int txq_id = txq->q.id; |
1421 | int write_ptr = txq->q.write_ptr; | |
e2ebc833 | 1422 | int len = byte_cnt + IL_TX_CRC_SIZE + IL_TX_DELIMITER_SIZE; |
4bc85c13 WYG |
1423 | __le16 bc_ent; |
1424 | ||
1425 | WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX); | |
1426 | ||
1427 | bc_ent = cpu_to_le16(len & 0xFFF); | |
1428 | /* Set up byte count within first 256 entries */ | |
1429 | scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent; | |
1430 | ||
1431 | /* If within first 64 entries, duplicate at end */ | |
1432 | if (write_ptr < TFD_QUEUE_SIZE_BC_DUP) | |
1433 | scd_bc_tbl[txq_id]. | |
1434 | tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent; | |
1435 | } | |
1436 | ||
1437 | /** | |
e2ebc833 | 1438 | * il4965_hw_get_temperature - return the calibrated temperature (in Kelvin) |
4bc85c13 WYG |
1439 | * @statistics: Provides the temperature reading from the uCode |
1440 | * | |
1441 | * A return of <0 indicates bogus data in the statistics | |
1442 | */ | |
46bc8d4b | 1443 | static int il4965_hw_get_temperature(struct il_priv *il) |
4bc85c13 WYG |
1444 | { |
1445 | s32 temperature; | |
1446 | s32 vt; | |
1447 | s32 R1, R2, R3; | |
1448 | u32 R4; | |
1449 | ||
46bc8d4b SG |
1450 | if (test_bit(STATUS_TEMPERATURE, &il->status) && |
1451 | (il->_4965.statistics.flag & | |
4bc85c13 | 1452 | STATISTICS_REPLY_FLG_HT40_MODE_MSK)) { |
58de00a4 | 1453 | D_TEMP("Running HT40 temperature calibration\n"); |
46bc8d4b SG |
1454 | R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[1]); |
1455 | R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[1]); | |
1456 | R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[1]); | |
1457 | R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]); | |
4bc85c13 | 1458 | } else { |
58de00a4 | 1459 | D_TEMP("Running temperature calibration\n"); |
46bc8d4b SG |
1460 | R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[0]); |
1461 | R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[0]); | |
1462 | R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[0]); | |
1463 | R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]); | |
4bc85c13 WYG |
1464 | } |
1465 | ||
1466 | /* | |
1467 | * Temperature is only 23 bits, so sign extend out to 32. | |
1468 | * | |
1469 | * NOTE If we haven't received a statistics notification yet | |
1470 | * with an updated temperature, use R4 provided to us in the | |
1471 | * "initialize" ALIVE response. | |
1472 | */ | |
46bc8d4b | 1473 | if (!test_bit(STATUS_TEMPERATURE, &il->status)) |
4bc85c13 WYG |
1474 | vt = sign_extend32(R4, 23); |
1475 | else | |
46bc8d4b | 1476 | vt = sign_extend32(le32_to_cpu(il->_4965.statistics. |
4bc85c13 WYG |
1477 | general.common.temperature), 23); |
1478 | ||
58de00a4 | 1479 | D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt); |
4bc85c13 WYG |
1480 | |
1481 | if (R3 == R1) { | |
9406f797 | 1482 | IL_ERR("Calibration conflict R1 == R3\n"); |
4bc85c13 WYG |
1483 | return -1; |
1484 | } | |
1485 | ||
1486 | /* Calculate temperature in degrees Kelvin, adjust by 97%. | |
1487 | * Add offset to center the adjustment around 0 degrees Centigrade. */ | |
1488 | temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2); | |
1489 | temperature /= (R3 - R1); | |
1490 | temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET; | |
1491 | ||
58de00a4 | 1492 | D_TEMP("Calibrated temperature: %dK, %dC\n", |
4bc85c13 WYG |
1493 | temperature, KELVIN_TO_CELSIUS(temperature)); |
1494 | ||
1495 | return temperature; | |
1496 | } | |
1497 | ||
1498 | /* Adjust Txpower only if temperature variance is greater than threshold. */ | |
e2ebc833 | 1499 | #define IL_TEMPERATURE_THRESHOLD 3 |
4bc85c13 WYG |
1500 | |
1501 | /** | |
e2ebc833 | 1502 | * il4965_is_temp_calib_needed - determines if new calibration is needed |
4bc85c13 WYG |
1503 | * |
1504 | * If the temperature changed has changed sufficiently, then a recalibration | |
1505 | * is needed. | |
1506 | * | |
46bc8d4b | 1507 | * Assumes caller will replace il->last_temperature once calibration |
4bc85c13 WYG |
1508 | * executed. |
1509 | */ | |
46bc8d4b | 1510 | static int il4965_is_temp_calib_needed(struct il_priv *il) |
4bc85c13 WYG |
1511 | { |
1512 | int temp_diff; | |
1513 | ||
46bc8d4b | 1514 | if (!test_bit(STATUS_STATISTICS, &il->status)) { |
58de00a4 | 1515 | D_TEMP("Temperature not updated -- no statistics.\n"); |
4bc85c13 WYG |
1516 | return 0; |
1517 | } | |
1518 | ||
46bc8d4b | 1519 | temp_diff = il->temperature - il->last_temperature; |
4bc85c13 WYG |
1520 | |
1521 | /* get absolute value */ | |
1522 | if (temp_diff < 0) { | |
58de00a4 | 1523 | D_POWER("Getting cooler, delta %d\n", temp_diff); |
4bc85c13 WYG |
1524 | temp_diff = -temp_diff; |
1525 | } else if (temp_diff == 0) | |
58de00a4 | 1526 | D_POWER("Temperature unchanged\n"); |
4bc85c13 | 1527 | else |
58de00a4 | 1528 | D_POWER("Getting warmer, delta %d\n", temp_diff); |
4bc85c13 | 1529 | |
e2ebc833 | 1530 | if (temp_diff < IL_TEMPERATURE_THRESHOLD) { |
58de00a4 | 1531 | D_POWER(" => thermal txpower calib not needed\n"); |
4bc85c13 WYG |
1532 | return 0; |
1533 | } | |
1534 | ||
58de00a4 | 1535 | D_POWER(" => thermal txpower calib needed\n"); |
4bc85c13 WYG |
1536 | |
1537 | return 1; | |
1538 | } | |
1539 | ||
46bc8d4b | 1540 | static void il4965_temperature_calib(struct il_priv *il) |
4bc85c13 WYG |
1541 | { |
1542 | s32 temp; | |
1543 | ||
46bc8d4b | 1544 | temp = il4965_hw_get_temperature(il); |
e2ebc833 | 1545 | if (IL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp)) |
4bc85c13 WYG |
1546 | return; |
1547 | ||
46bc8d4b SG |
1548 | if (il->temperature != temp) { |
1549 | if (il->temperature) | |
58de00a4 | 1550 | D_TEMP("Temperature changed " |
4bc85c13 | 1551 | "from %dC to %dC\n", |
46bc8d4b | 1552 | KELVIN_TO_CELSIUS(il->temperature), |
4bc85c13 WYG |
1553 | KELVIN_TO_CELSIUS(temp)); |
1554 | else | |
58de00a4 | 1555 | D_TEMP("Temperature " |
4bc85c13 WYG |
1556 | "initialized to %dC\n", |
1557 | KELVIN_TO_CELSIUS(temp)); | |
1558 | } | |
1559 | ||
46bc8d4b SG |
1560 | il->temperature = temp; |
1561 | set_bit(STATUS_TEMPERATURE, &il->status); | |
4bc85c13 | 1562 | |
46bc8d4b SG |
1563 | if (!il->disable_tx_power_cal && |
1564 | unlikely(!test_bit(STATUS_SCANNING, &il->status)) && | |
1565 | il4965_is_temp_calib_needed(il)) | |
1566 | queue_work(il->workqueue, &il->txpower_work); | |
4bc85c13 WYG |
1567 | } |
1568 | ||
e2ebc833 | 1569 | static u16 il4965_get_hcmd_size(u8 cmd_id, u16 len) |
4bc85c13 WYG |
1570 | { |
1571 | switch (cmd_id) { | |
1572 | case REPLY_RXON: | |
e2ebc833 | 1573 | return (u16) sizeof(struct il4965_rxon_cmd); |
4bc85c13 WYG |
1574 | default: |
1575 | return len; | |
1576 | } | |
1577 | } | |
1578 | ||
e2ebc833 | 1579 | static u16 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd, |
be663ab6 | 1580 | u8 *data) |
4bc85c13 | 1581 | { |
e2ebc833 | 1582 | struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data; |
4bc85c13 WYG |
1583 | addsta->mode = cmd->mode; |
1584 | memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify)); | |
e2ebc833 | 1585 | memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo)); |
4bc85c13 WYG |
1586 | addsta->station_flags = cmd->station_flags; |
1587 | addsta->station_flags_msk = cmd->station_flags_msk; | |
1588 | addsta->tid_disable_tx = cmd->tid_disable_tx; | |
1589 | addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid; | |
1590 | addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid; | |
1591 | addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn; | |
1592 | addsta->sleep_tx_count = cmd->sleep_tx_count; | |
1593 | addsta->reserved1 = cpu_to_le16(0); | |
1594 | addsta->reserved2 = cpu_to_le16(0); | |
1595 | ||
e2ebc833 | 1596 | return (u16)sizeof(struct il4965_addsta_cmd); |
4bc85c13 WYG |
1597 | } |
1598 | ||
e2ebc833 | 1599 | static inline u32 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp) |
4bc85c13 WYG |
1600 | { |
1601 | return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN; | |
1602 | } | |
1603 | ||
1604 | /** | |
e2ebc833 | 1605 | * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue |
4bc85c13 | 1606 | */ |
46bc8d4b | 1607 | static int il4965_tx_status_reply_tx(struct il_priv *il, |
e2ebc833 SG |
1608 | struct il_ht_agg *agg, |
1609 | struct il4965_tx_resp *tx_resp, | |
4bc85c13 WYG |
1610 | int txq_id, u16 start_idx) |
1611 | { | |
1612 | u16 status; | |
1613 | struct agg_tx_status *frame_status = tx_resp->u.agg_status; | |
1614 | struct ieee80211_tx_info *info = NULL; | |
1615 | struct ieee80211_hdr *hdr = NULL; | |
1616 | u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
1617 | int i, sh, idx; | |
1618 | u16 seq; | |
1619 | if (agg->wait_for_ba) | |
58de00a4 | 1620 | D_TX_REPLY("got tx response w/o block-ack\n"); |
4bc85c13 WYG |
1621 | |
1622 | agg->frame_count = tx_resp->frame_count; | |
1623 | agg->start_idx = start_idx; | |
1624 | agg->rate_n_flags = rate_n_flags; | |
1625 | agg->bitmap = 0; | |
1626 | ||
1627 | /* num frames attempted by Tx command */ | |
1628 | if (agg->frame_count == 1) { | |
1629 | /* Only one frame was attempted; no block-ack will arrive */ | |
1630 | status = le16_to_cpu(frame_status[0].status); | |
1631 | idx = start_idx; | |
1632 | ||
58de00a4 | 1633 | D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n", |
4bc85c13 WYG |
1634 | agg->frame_count, agg->start_idx, idx); |
1635 | ||
46bc8d4b | 1636 | info = IEEE80211_SKB_CB(il->txq[txq_id].txb[idx].skb); |
4bc85c13 WYG |
1637 | info->status.rates[0].count = tx_resp->failure_frame + 1; |
1638 | info->flags &= ~IEEE80211_TX_CTL_AMPDU; | |
e2ebc833 | 1639 | info->flags |= il4965_tx_status_to_mac80211(status); |
46bc8d4b | 1640 | il4965_hwrate_to_tx_control(il, rate_n_flags, info); |
4bc85c13 | 1641 | |
58de00a4 | 1642 | D_TX_REPLY("1 Frame 0x%x failure :%d\n", |
4bc85c13 | 1643 | status & 0xff, tx_resp->failure_frame); |
58de00a4 | 1644 | D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags); |
4bc85c13 WYG |
1645 | |
1646 | agg->wait_for_ba = 0; | |
1647 | } else { | |
1648 | /* Two or more frames were attempted; expect block-ack */ | |
1649 | u64 bitmap = 0; | |
1650 | int start = agg->start_idx; | |
1651 | ||
1652 | /* Construct bit-map of pending frames within Tx window */ | |
1653 | for (i = 0; i < agg->frame_count; i++) { | |
1654 | u16 sc; | |
1655 | status = le16_to_cpu(frame_status[i].status); | |
1656 | seq = le16_to_cpu(frame_status[i].sequence); | |
1657 | idx = SEQ_TO_INDEX(seq); | |
1658 | txq_id = SEQ_TO_QUEUE(seq); | |
1659 | ||
1660 | if (status & (AGG_TX_STATE_FEW_BYTES_MSK | | |
1661 | AGG_TX_STATE_ABORT_MSK)) | |
1662 | continue; | |
1663 | ||
58de00a4 | 1664 | D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n", |
4bc85c13 WYG |
1665 | agg->frame_count, txq_id, idx); |
1666 | ||
46bc8d4b | 1667 | hdr = il_tx_queue_get_hdr(il, txq_id, idx); |
4bc85c13 | 1668 | if (!hdr) { |
9406f797 | 1669 | IL_ERR( |
4bc85c13 WYG |
1670 | "BUG_ON idx doesn't point to valid skb" |
1671 | " idx=%d, txq_id=%d\n", idx, txq_id); | |
1672 | return -1; | |
1673 | } | |
1674 | ||
1675 | sc = le16_to_cpu(hdr->seq_ctrl); | |
1676 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { | |
9406f797 | 1677 | IL_ERR( |
4bc85c13 WYG |
1678 | "BUG_ON idx doesn't match seq control" |
1679 | " idx=%d, seq_idx=%d, seq=%d\n", | |
1680 | idx, SEQ_TO_SN(sc), hdr->seq_ctrl); | |
1681 | return -1; | |
1682 | } | |
1683 | ||
58de00a4 | 1684 | D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", |
4bc85c13 WYG |
1685 | i, idx, SEQ_TO_SN(sc)); |
1686 | ||
1687 | sh = idx - start; | |
1688 | if (sh > 64) { | |
1689 | sh = (start - idx) + 0xff; | |
1690 | bitmap = bitmap << sh; | |
1691 | sh = 0; | |
1692 | start = idx; | |
1693 | } else if (sh < -64) | |
1694 | sh = 0xff - (start - idx); | |
1695 | else if (sh < 0) { | |
1696 | sh = start - idx; | |
1697 | start = idx; | |
1698 | bitmap = bitmap << sh; | |
1699 | sh = 0; | |
1700 | } | |
1701 | bitmap |= 1ULL << sh; | |
58de00a4 | 1702 | D_TX_REPLY("start=%d bitmap=0x%llx\n", |
4bc85c13 WYG |
1703 | start, (unsigned long long)bitmap); |
1704 | } | |
1705 | ||
1706 | agg->bitmap = bitmap; | |
1707 | agg->start_idx = start; | |
58de00a4 | 1708 | D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n", |
4bc85c13 WYG |
1709 | agg->frame_count, agg->start_idx, |
1710 | (unsigned long long)agg->bitmap); | |
1711 | ||
1712 | if (bitmap) | |
1713 | agg->wait_for_ba = 1; | |
1714 | } | |
1715 | return 0; | |
1716 | } | |
1717 | ||
46bc8d4b | 1718 | static u8 il4965_find_station(struct il_priv *il, const u8 *addr) |
4bc85c13 WYG |
1719 | { |
1720 | int i; | |
1721 | int start = 0; | |
e2ebc833 | 1722 | int ret = IL_INVALID_STATION; |
4bc85c13 WYG |
1723 | unsigned long flags; |
1724 | ||
46bc8d4b | 1725 | if ((il->iw_mode == NL80211_IFTYPE_ADHOC)) |
e2ebc833 | 1726 | start = IL_STA_ID; |
4bc85c13 WYG |
1727 | |
1728 | if (is_broadcast_ether_addr(addr)) | |
7c2cde2e | 1729 | return il->ctx.bcast_sta_id; |
4bc85c13 | 1730 | |
46bc8d4b SG |
1731 | spin_lock_irqsave(&il->sta_lock, flags); |
1732 | for (i = start; i < il->hw_params.max_stations; i++) | |
1733 | if (il->stations[i].used && | |
1734 | (!compare_ether_addr(il->stations[i].sta.sta.addr, | |
4bc85c13 WYG |
1735 | addr))) { |
1736 | ret = i; | |
1737 | goto out; | |
1738 | } | |
1739 | ||
58de00a4 | 1740 | D_ASSOC("can not find STA %pM total %d\n", |
46bc8d4b | 1741 | addr, il->num_stations); |
4bc85c13 WYG |
1742 | |
1743 | out: | |
1744 | /* | |
1745 | * It may be possible that more commands interacting with stations | |
1746 | * arrive before we completed processing the adding of | |
1747 | * station | |
1748 | */ | |
e2ebc833 | 1749 | if (ret != IL_INVALID_STATION && |
46bc8d4b SG |
1750 | (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) || |
1751 | ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) && | |
1752 | (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) { | |
9406f797 | 1753 | IL_ERR("Requested station info for sta %d before ready.\n", |
4bc85c13 | 1754 | ret); |
e2ebc833 | 1755 | ret = IL_INVALID_STATION; |
4bc85c13 | 1756 | } |
46bc8d4b | 1757 | spin_unlock_irqrestore(&il->sta_lock, flags); |
4bc85c13 WYG |
1758 | return ret; |
1759 | } | |
1760 | ||
46bc8d4b | 1761 | static int il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr) |
4bc85c13 | 1762 | { |
46bc8d4b | 1763 | if (il->iw_mode == NL80211_IFTYPE_STATION) { |
e2ebc833 | 1764 | return IL_AP_ID; |
4bc85c13 WYG |
1765 | } else { |
1766 | u8 *da = ieee80211_get_DA(hdr); | |
46bc8d4b | 1767 | return il4965_find_station(il, da); |
4bc85c13 WYG |
1768 | } |
1769 | } | |
1770 | ||
1771 | /** | |
e2ebc833 | 1772 | * il4965_rx_reply_tx - Handle standard (non-aggregation) Tx response |
4bc85c13 | 1773 | */ |
46bc8d4b | 1774 | static void il4965_rx_reply_tx(struct il_priv *il, |
e2ebc833 | 1775 | struct il_rx_mem_buffer *rxb) |
4bc85c13 | 1776 | { |
dcae1c64 | 1777 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
4bc85c13 WYG |
1778 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
1779 | int txq_id = SEQ_TO_QUEUE(sequence); | |
1780 | int index = SEQ_TO_INDEX(sequence); | |
46bc8d4b | 1781 | struct il_tx_queue *txq = &il->txq[txq_id]; |
4bc85c13 WYG |
1782 | struct ieee80211_hdr *hdr; |
1783 | struct ieee80211_tx_info *info; | |
e2ebc833 | 1784 | struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; |
4bc85c13 WYG |
1785 | u32 status = le32_to_cpu(tx_resp->u.status); |
1786 | int uninitialized_var(tid); | |
1787 | int sta_id; | |
1788 | int freed; | |
1789 | u8 *qc = NULL; | |
1790 | unsigned long flags; | |
1791 | ||
232913b5 | 1792 | if (index >= txq->q.n_bd || il_queue_used(&txq->q, index) == 0) { |
9406f797 | 1793 | IL_ERR("Read index for DMA queue txq_id (%d) index %d " |
4bc85c13 WYG |
1794 | "is out of range [0-%d] %d %d\n", txq_id, |
1795 | index, txq->q.n_bd, txq->q.write_ptr, | |
1796 | txq->q.read_ptr); | |
1797 | return; | |
1798 | } | |
1799 | ||
1800 | txq->time_stamp = jiffies; | |
1801 | info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb); | |
1802 | memset(&info->status, 0, sizeof(info->status)); | |
1803 | ||
46bc8d4b | 1804 | hdr = il_tx_queue_get_hdr(il, txq_id, index); |
4bc85c13 WYG |
1805 | if (ieee80211_is_data_qos(hdr->frame_control)) { |
1806 | qc = ieee80211_get_qos_ctl(hdr); | |
1807 | tid = qc[0] & 0xf; | |
1808 | } | |
1809 | ||
46bc8d4b | 1810 | sta_id = il4965_get_ra_sta_id(il, hdr); |
e2ebc833 | 1811 | if (txq->sched_retry && unlikely(sta_id == IL_INVALID_STATION)) { |
9406f797 | 1812 | IL_ERR("Station not known\n"); |
4bc85c13 WYG |
1813 | return; |
1814 | } | |
1815 | ||
46bc8d4b | 1816 | spin_lock_irqsave(&il->sta_lock, flags); |
4bc85c13 | 1817 | if (txq->sched_retry) { |
e2ebc833 SG |
1818 | const u32 scd_ssn = il4965_get_scd_ssn(tx_resp); |
1819 | struct il_ht_agg *agg = NULL; | |
4bc85c13 WYG |
1820 | WARN_ON(!qc); |
1821 | ||
46bc8d4b | 1822 | agg = &il->stations[sta_id].tid[tid].agg; |
4bc85c13 | 1823 | |
46bc8d4b | 1824 | il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, index); |
4bc85c13 WYG |
1825 | |
1826 | /* check if BAR is needed */ | |
e2ebc833 | 1827 | if ((tx_resp->frame_count == 1) && !il4965_is_tx_success(status)) |
4bc85c13 WYG |
1828 | info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK; |
1829 | ||
1830 | if (txq->q.read_ptr != (scd_ssn & 0xff)) { | |
e2ebc833 | 1831 | index = il_queue_dec_wrap(scd_ssn & 0xff, |
be663ab6 | 1832 | txq->q.n_bd); |
58de00a4 | 1833 | D_TX_REPLY("Retry scheduler reclaim scd_ssn " |
4bc85c13 | 1834 | "%d index %d\n", scd_ssn , index); |
46bc8d4b | 1835 | freed = il4965_tx_queue_reclaim(il, txq_id, index); |
4bc85c13 | 1836 | if (qc) |
46bc8d4b | 1837 | il4965_free_tfds_in_queue(il, sta_id, |
4bc85c13 WYG |
1838 | tid, freed); |
1839 | ||
46bc8d4b | 1840 | if (il->mac80211_registered && |
232913b5 SG |
1841 | il_queue_space(&txq->q) > txq->q.low_mark && |
1842 | agg->state != IL_EMPTYING_HW_QUEUE_DELBA) | |
46bc8d4b | 1843 | il_wake_queue(il, txq); |
4bc85c13 WYG |
1844 | } |
1845 | } else { | |
1846 | info->status.rates[0].count = tx_resp->failure_frame + 1; | |
e2ebc833 | 1847 | info->flags |= il4965_tx_status_to_mac80211(status); |
46bc8d4b | 1848 | il4965_hwrate_to_tx_control(il, |
4bc85c13 WYG |
1849 | le32_to_cpu(tx_resp->rate_n_flags), |
1850 | info); | |
1851 | ||
58de00a4 | 1852 | D_TX_REPLY("TXQ %d status %s (0x%08x) " |
4bc85c13 WYG |
1853 | "rate_n_flags 0x%x retries %d\n", |
1854 | txq_id, | |
e2ebc833 | 1855 | il4965_get_tx_fail_reason(status), status, |
4bc85c13 WYG |
1856 | le32_to_cpu(tx_resp->rate_n_flags), |
1857 | tx_resp->failure_frame); | |
1858 | ||
46bc8d4b | 1859 | freed = il4965_tx_queue_reclaim(il, txq_id, index); |
e2ebc833 | 1860 | if (qc && likely(sta_id != IL_INVALID_STATION)) |
46bc8d4b | 1861 | il4965_free_tfds_in_queue(il, sta_id, tid, freed); |
e2ebc833 | 1862 | else if (sta_id == IL_INVALID_STATION) |
58de00a4 | 1863 | D_TX_REPLY("Station not known\n"); |
4bc85c13 | 1864 | |
46bc8d4b | 1865 | if (il->mac80211_registered && |
232913b5 | 1866 | il_queue_space(&txq->q) > txq->q.low_mark) |
46bc8d4b | 1867 | il_wake_queue(il, txq); |
4bc85c13 | 1868 | } |
e2ebc833 | 1869 | if (qc && likely(sta_id != IL_INVALID_STATION)) |
46bc8d4b | 1870 | il4965_txq_check_empty(il, sta_id, tid, txq_id); |
4bc85c13 | 1871 | |
46bc8d4b | 1872 | il4965_check_abort_status(il, tx_resp->frame_count, status); |
4bc85c13 | 1873 | |
46bc8d4b | 1874 | spin_unlock_irqrestore(&il->sta_lock, flags); |
4bc85c13 WYG |
1875 | } |
1876 | ||
46bc8d4b | 1877 | static void il4965_rx_beacon_notif(struct il_priv *il, |
e2ebc833 | 1878 | struct il_rx_mem_buffer *rxb) |
4bc85c13 | 1879 | { |
dcae1c64 | 1880 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
e2ebc833 | 1881 | struct il4965_beacon_notif *beacon = (void *)pkt->u.raw; |
be663ab6 | 1882 | u8 rate __maybe_unused = |
e2ebc833 | 1883 | il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
4bc85c13 | 1884 | |
58de00a4 | 1885 | D_RX("beacon status %#x, retries:%d ibssmgr:%d " |
4bc85c13 WYG |
1886 | "tsf:0x%.8x%.8x rate:%d\n", |
1887 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, | |
1888 | beacon->beacon_notify_hdr.failure_frame, | |
1889 | le32_to_cpu(beacon->ibss_mgr_status), | |
1890 | le32_to_cpu(beacon->high_tsf), | |
1891 | le32_to_cpu(beacon->low_tsf), rate); | |
4bc85c13 | 1892 | |
46bc8d4b | 1893 | il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); |
4bc85c13 WYG |
1894 | } |
1895 | ||
4bc85c13 | 1896 | /* Set up 4965-specific Rx frame reply handlers */ |
46bc8d4b | 1897 | static void il4965_rx_handler_setup(struct il_priv *il) |
4bc85c13 WYG |
1898 | { |
1899 | /* Legacy Rx frames */ | |
46bc8d4b | 1900 | il->rx_handlers[REPLY_RX] = il4965_rx_reply_rx; |
4bc85c13 | 1901 | /* Tx response */ |
46bc8d4b SG |
1902 | il->rx_handlers[REPLY_TX] = il4965_rx_reply_tx; |
1903 | il->rx_handlers[BEACON_NOTIFICATION] = il4965_rx_beacon_notif; | |
4bc85c13 WYG |
1904 | } |
1905 | ||
e2ebc833 SG |
1906 | static struct il_hcmd_ops il4965_hcmd = { |
1907 | .rxon_assoc = il4965_send_rxon_assoc, | |
1908 | .commit_rxon = il4965_commit_rxon, | |
1909 | .set_rxon_chain = il4965_set_rxon_chain, | |
4bc85c13 WYG |
1910 | }; |
1911 | ||
46bc8d4b | 1912 | static void il4965_post_scan(struct il_priv *il) |
4bc85c13 | 1913 | { |
7c2cde2e | 1914 | struct il_rxon_context *ctx = &il->ctx; |
4bc85c13 WYG |
1915 | |
1916 | /* | |
1917 | * Since setting the RXON may have been deferred while | |
1918 | * performing the scan, fire one off if needed | |
1919 | */ | |
1920 | if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging))) | |
46bc8d4b | 1921 | il_commit_rxon(il, ctx); |
4bc85c13 WYG |
1922 | } |
1923 | ||
46bc8d4b | 1924 | static void il4965_post_associate(struct il_priv *il) |
4bc85c13 | 1925 | { |
7c2cde2e | 1926 | struct il_rxon_context *ctx = &il->ctx; |
4bc85c13 WYG |
1927 | struct ieee80211_vif *vif = ctx->vif; |
1928 | struct ieee80211_conf *conf = NULL; | |
1929 | int ret = 0; | |
1930 | ||
46bc8d4b | 1931 | if (!vif || !il->is_open) |
4bc85c13 WYG |
1932 | return; |
1933 | ||
46bc8d4b | 1934 | if (test_bit(STATUS_EXIT_PENDING, &il->status)) |
4bc85c13 WYG |
1935 | return; |
1936 | ||
46bc8d4b | 1937 | il_scan_cancel_timeout(il, 200); |
4bc85c13 | 1938 | |
46bc8d4b | 1939 | conf = il_ieee80211_get_hw_conf(il->hw); |
4bc85c13 WYG |
1940 | |
1941 | ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
46bc8d4b | 1942 | il_commit_rxon(il, ctx); |
4bc85c13 | 1943 | |
46bc8d4b | 1944 | ret = il_send_rxon_timing(il, ctx); |
4bc85c13 | 1945 | if (ret) |
9406f797 | 1946 | IL_WARN("RXON timing - " |
4bc85c13 WYG |
1947 | "Attempting to continue.\n"); |
1948 | ||
1949 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
1950 | ||
46bc8d4b | 1951 | il_set_rxon_ht(il, &il->current_ht_config); |
4bc85c13 | 1952 | |
46bc8d4b SG |
1953 | if (il->cfg->ops->hcmd->set_rxon_chain) |
1954 | il->cfg->ops->hcmd->set_rxon_chain(il, ctx); | |
4bc85c13 WYG |
1955 | |
1956 | ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid); | |
1957 | ||
58de00a4 | 1958 | D_ASSOC("assoc id %d beacon interval %d\n", |
4bc85c13 WYG |
1959 | vif->bss_conf.aid, vif->bss_conf.beacon_int); |
1960 | ||
1961 | if (vif->bss_conf.use_short_preamble) | |
1962 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
1963 | else | |
1964 | ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
1965 | ||
1966 | if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) { | |
1967 | if (vif->bss_conf.use_short_slot) | |
1968 | ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
1969 | else | |
1970 | ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
1971 | } | |
1972 | ||
46bc8d4b | 1973 | il_commit_rxon(il, ctx); |
4bc85c13 | 1974 | |
58de00a4 | 1975 | D_ASSOC("Associated as %d to: %pM\n", |
4bc85c13 WYG |
1976 | vif->bss_conf.aid, ctx->active.bssid_addr); |
1977 | ||
1978 | switch (vif->type) { | |
1979 | case NL80211_IFTYPE_STATION: | |
1980 | break; | |
1981 | case NL80211_IFTYPE_ADHOC: | |
46bc8d4b | 1982 | il4965_send_beacon_cmd(il); |
4bc85c13 WYG |
1983 | break; |
1984 | default: | |
9406f797 | 1985 | IL_ERR("%s Should not be called in %d mode\n", |
4bc85c13 WYG |
1986 | __func__, vif->type); |
1987 | break; | |
1988 | } | |
1989 | ||
1990 | /* the chain noise calibration will enabled PM upon completion | |
1991 | * If chain noise has already been run, then we need to enable | |
1992 | * power management here */ | |
46bc8d4b SG |
1993 | if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE) |
1994 | il_power_update_mode(il, false); | |
4bc85c13 WYG |
1995 | |
1996 | /* Enable Rx differential gain and sensitivity calibrations */ | |
46bc8d4b SG |
1997 | il4965_chain_noise_reset(il); |
1998 | il->start_calib = 1; | |
4bc85c13 WYG |
1999 | } |
2000 | ||
46bc8d4b | 2001 | static void il4965_config_ap(struct il_priv *il) |
4bc85c13 | 2002 | { |
7c2cde2e | 2003 | struct il_rxon_context *ctx = &il->ctx; |
4bc85c13 WYG |
2004 | struct ieee80211_vif *vif = ctx->vif; |
2005 | int ret = 0; | |
2006 | ||
46bc8d4b | 2007 | lockdep_assert_held(&il->mutex); |
4bc85c13 | 2008 | |
46bc8d4b | 2009 | if (test_bit(STATUS_EXIT_PENDING, &il->status)) |
4bc85c13 WYG |
2010 | return; |
2011 | ||
2012 | /* The following should be done only at AP bring up */ | |
e2ebc833 | 2013 | if (!il_is_associated_ctx(ctx)) { |
4bc85c13 WYG |
2014 | |
2015 | /* RXON - unassoc (to set timing command) */ | |
2016 | ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
46bc8d4b | 2017 | il_commit_rxon(il, ctx); |
4bc85c13 WYG |
2018 | |
2019 | /* RXON Timing */ | |
46bc8d4b | 2020 | ret = il_send_rxon_timing(il, ctx); |
4bc85c13 | 2021 | if (ret) |
9406f797 | 2022 | IL_WARN("RXON timing failed - " |
4bc85c13 WYG |
2023 | "Attempting to continue.\n"); |
2024 | ||
2025 | /* AP has all antennas */ | |
46bc8d4b SG |
2026 | il->chain_noise_data.active_chains = |
2027 | il->hw_params.valid_rx_ant; | |
2028 | il_set_rxon_ht(il, &il->current_ht_config); | |
2029 | if (il->cfg->ops->hcmd->set_rxon_chain) | |
2030 | il->cfg->ops->hcmd->set_rxon_chain(il, ctx); | |
4bc85c13 WYG |
2031 | |
2032 | ctx->staging.assoc_id = 0; | |
2033 | ||
2034 | if (vif->bss_conf.use_short_preamble) | |
2035 | ctx->staging.flags |= | |
2036 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
2037 | else | |
2038 | ctx->staging.flags &= | |
2039 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2040 | ||
2041 | if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) { | |
2042 | if (vif->bss_conf.use_short_slot) | |
2043 | ctx->staging.flags |= | |
2044 | RXON_FLG_SHORT_SLOT_MSK; | |
2045 | else | |
2046 | ctx->staging.flags &= | |
2047 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2048 | } | |
2049 | /* need to send beacon cmd before committing assoc RXON! */ | |
46bc8d4b | 2050 | il4965_send_beacon_cmd(il); |
4bc85c13 WYG |
2051 | /* restore RXON assoc */ |
2052 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
46bc8d4b | 2053 | il_commit_rxon(il, ctx); |
4bc85c13 | 2054 | } |
46bc8d4b | 2055 | il4965_send_beacon_cmd(il); |
4bc85c13 WYG |
2056 | } |
2057 | ||
e2ebc833 SG |
2058 | static struct il_hcmd_utils_ops il4965_hcmd_utils = { |
2059 | .get_hcmd_size = il4965_get_hcmd_size, | |
2060 | .build_addsta_hcmd = il4965_build_addsta_hcmd, | |
2061 | .request_scan = il4965_request_scan, | |
2062 | .post_scan = il4965_post_scan, | |
4bc85c13 WYG |
2063 | }; |
2064 | ||
e2ebc833 SG |
2065 | static struct il_lib_ops il4965_lib = { |
2066 | .set_hw_params = il4965_hw_set_hw_params, | |
2067 | .txq_update_byte_cnt_tbl = il4965_txq_update_byte_cnt_tbl, | |
2068 | .txq_attach_buf_to_tfd = il4965_hw_txq_attach_buf_to_tfd, | |
2069 | .txq_free_tfd = il4965_hw_txq_free_tfd, | |
2070 | .txq_init = il4965_hw_tx_queue_init, | |
2071 | .rx_handler_setup = il4965_rx_handler_setup, | |
2072 | .is_valid_rtc_data_addr = il4965_hw_valid_rtc_data_addr, | |
2073 | .init_alive_start = il4965_init_alive_start, | |
2074 | .load_ucode = il4965_load_bsm, | |
2075 | .dump_nic_error_log = il4965_dump_nic_error_log, | |
2076 | .dump_fh = il4965_dump_fh, | |
2077 | .set_channel_switch = il4965_hw_channel_switch, | |
4bc85c13 | 2078 | .apm_ops = { |
e2ebc833 SG |
2079 | .init = il_apm_init, |
2080 | .config = il4965_nic_config, | |
4bc85c13 WYG |
2081 | }, |
2082 | .eeprom_ops = { | |
2083 | .regulatory_bands = { | |
2084 | EEPROM_REGULATORY_BAND_1_CHANNELS, | |
2085 | EEPROM_REGULATORY_BAND_2_CHANNELS, | |
2086 | EEPROM_REGULATORY_BAND_3_CHANNELS, | |
2087 | EEPROM_REGULATORY_BAND_4_CHANNELS, | |
2088 | EEPROM_REGULATORY_BAND_5_CHANNELS, | |
2089 | EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS, | |
2090 | EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS | |
2091 | }, | |
e2ebc833 SG |
2092 | .acquire_semaphore = il4965_eeprom_acquire_semaphore, |
2093 | .release_semaphore = il4965_eeprom_release_semaphore, | |
4bc85c13 | 2094 | }, |
e2ebc833 SG |
2095 | .send_tx_power = il4965_send_tx_power, |
2096 | .update_chain_flags = il4965_update_chain_flags, | |
4bc85c13 | 2097 | .temp_ops = { |
e2ebc833 | 2098 | .temperature = il4965_temperature_calib, |
4bc85c13 WYG |
2099 | }, |
2100 | .debugfs_ops = { | |
e2ebc833 SG |
2101 | .rx_stats_read = il4965_ucode_rx_stats_read, |
2102 | .tx_stats_read = il4965_ucode_tx_stats_read, | |
2103 | .general_stats_read = il4965_ucode_general_stats_read, | |
4bc85c13 | 2104 | }, |
4bc85c13 WYG |
2105 | }; |
2106 | ||
e2ebc833 SG |
2107 | static const struct il_legacy_ops il4965_legacy_ops = { |
2108 | .post_associate = il4965_post_associate, | |
2109 | .config_ap = il4965_config_ap, | |
2110 | .manage_ibss_station = il4965_manage_ibss_station, | |
2111 | .update_bcast_stations = il4965_update_bcast_stations, | |
4bc85c13 WYG |
2112 | }; |
2113 | ||
e2ebc833 SG |
2114 | struct ieee80211_ops il4965_hw_ops = { |
2115 | .tx = il4965_mac_tx, | |
2116 | .start = il4965_mac_start, | |
2117 | .stop = il4965_mac_stop, | |
2118 | .add_interface = il_mac_add_interface, | |
2119 | .remove_interface = il_mac_remove_interface, | |
2120 | .change_interface = il_mac_change_interface, | |
2121 | .config = il_mac_config, | |
2122 | .configure_filter = il4965_configure_filter, | |
2123 | .set_key = il4965_mac_set_key, | |
2124 | .update_tkip_key = il4965_mac_update_tkip_key, | |
2125 | .conf_tx = il_mac_conf_tx, | |
2126 | .reset_tsf = il_mac_reset_tsf, | |
2127 | .bss_info_changed = il_mac_bss_info_changed, | |
2128 | .ampdu_action = il4965_mac_ampdu_action, | |
2129 | .hw_scan = il_mac_hw_scan, | |
2130 | .sta_add = il4965_mac_sta_add, | |
2131 | .sta_remove = il_mac_sta_remove, | |
2132 | .channel_switch = il4965_mac_channel_switch, | |
2133 | .tx_last_beacon = il_mac_tx_last_beacon, | |
4bc85c13 WYG |
2134 | }; |
2135 | ||
e2ebc833 SG |
2136 | static const struct il_ops il4965_ops = { |
2137 | .lib = &il4965_lib, | |
2138 | .hcmd = &il4965_hcmd, | |
2139 | .utils = &il4965_hcmd_utils, | |
2140 | .led = &il4965_led_ops, | |
2141 | .legacy = &il4965_legacy_ops, | |
2142 | .ieee80211_ops = &il4965_hw_ops, | |
4bc85c13 WYG |
2143 | }; |
2144 | ||
e2ebc833 | 2145 | static struct il_base_params il4965_base_params = { |
d3175167 SG |
2146 | .eeprom_size = IL4965_EEPROM_IMG_SIZE, |
2147 | .num_of_queues = IL49_NUM_QUEUES, | |
2148 | .num_of_ampdu_queues = IL49_NUM_AMPDU_QUEUES, | |
4bc85c13 WYG |
2149 | .pll_cfg_val = 0, |
2150 | .set_l0s = true, | |
2151 | .use_bsm = true, | |
4bc85c13 | 2152 | .led_compensation = 61, |
d3175167 | 2153 | .chain_noise_num_beacons = IL4965_CAL_NUM_BEACONS, |
e2ebc833 | 2154 | .wd_timeout = IL_DEF_WD_TIMEOUT, |
4bc85c13 | 2155 | .temperature_kelvin = true, |
4bc85c13 WYG |
2156 | .ucode_tracing = true, |
2157 | .sensitivity_calib_by_driver = true, | |
2158 | .chain_noise_calib_by_driver = true, | |
4bc85c13 WYG |
2159 | }; |
2160 | ||
e2ebc833 | 2161 | struct il_cfg il4965_cfg = { |
4bc85c13 | 2162 | .name = "Intel(R) Wireless WiFi Link 4965AGN", |
d3175167 SG |
2163 | .fw_name_pre = IL4965_FW_PRE, |
2164 | .ucode_api_max = IL4965_UCODE_API_MAX, | |
2165 | .ucode_api_min = IL4965_UCODE_API_MIN, | |
e2ebc833 | 2166 | .sku = IL_SKU_A|IL_SKU_G|IL_SKU_N, |
4bc85c13 WYG |
2167 | .valid_tx_ant = ANT_AB, |
2168 | .valid_rx_ant = ANT_ABC, | |
2169 | .eeprom_ver = EEPROM_4965_EEPROM_VERSION, | |
2170 | .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION, | |
e2ebc833 SG |
2171 | .ops = &il4965_ops, |
2172 | .mod_params = &il4965_mod_params, | |
2173 | .base_params = &il4965_base_params, | |
2174 | .led_mode = IL_LED_BLINK, | |
4bc85c13 WYG |
2175 | /* |
2176 | * Force use of chains B and C for scan RX on 5 GHz band | |
2177 | * because the device has off-channel reception on chain A. | |
2178 | */ | |
2179 | .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC, | |
2180 | }; | |
2181 | ||
2182 | /* Module firmware */ | |
d3175167 | 2183 | MODULE_FIRMWARE(IL4965_MODULE_FIRMWARE(IL4965_UCODE_API_MAX)); |