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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called LICENSE. | |
20 | * | |
21 | * Contact Information: | |
22 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | *****************************************************************************/ | |
fcd427bb BC |
26 | /* |
27 | * Please use this file (iwl-3945.h) for driver implementation definitions. | |
28 | * Please use iwl-3945-commands.h for uCode API definitions. | |
29 | * Please use iwl-3945-hw.h for hardware-related definitions. | |
30 | */ | |
b481de9c ZY |
31 | |
32 | #ifndef __iwl_3945_h__ | |
33 | #define __iwl_3945_h__ | |
34 | ||
5d08cd1d CH |
35 | #include <linux/pci.h> /* for struct pci_device_id */ |
36 | #include <linux/kernel.h> | |
37 | #include <net/ieee80211_radiotap.h> | |
38 | ||
5d08cd1d | 39 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
bb8c093b | 40 | extern struct pci_device_id iwl3945_hw_card_ids[]; |
5d08cd1d CH |
41 | |
42 | #define DRV_NAME "iwl3945" | |
6f83eaa1 | 43 | #include "iwl-csr.h" |
5d08cd1d | 44 | #include "iwl-prph.h" |
6f83eaa1 | 45 | #include "iwl-3945-hw.h" |
5d08cd1d | 46 | #include "iwl-3945-debug.h" |
ab53d8af | 47 | #include "iwl-3945-led.h" |
5d08cd1d | 48 | |
4bf775cd TW |
49 | /* Change firmware file name, using "-" and incrementing number, |
50 | * *only* when uCode interface or architecture changes so that it | |
51 | * is not compatible with earlier drivers. | |
52 | * This number will also appear in << 8 position of 1st dword of uCode file */ | |
53 | #define IWL3945_UCODE_API "-1" | |
54 | ||
5d08cd1d CH |
55 | /* Default noise level to report when noise measurement is not available. |
56 | * This may be because we're: | |
57 | * 1) Not associated (4965, no beacon statistics being sent to driver) | |
58 | * 2) Scanning (noise measurement does not apply to associated channel) | |
59 | * 3) Receiving CCK (3945 delivers noise info only for OFDM frames) | |
60 | * Use default noise value of -127 ... this is below the range of measurable | |
61 | * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user. | |
62 | * Also, -127 works better than 0 when averaging frames with/without | |
63 | * noise info (e.g. averaging might be done in app); measured dBm values are | |
64 | * always negative ... using a negative value as the default keeps all | |
65 | * averages within an s8's (used in some apps) range of negative values. */ | |
66 | #define IWL_NOISE_MEAS_NOT_AVAILABLE (-127) | |
67 | ||
68 | /* Module parameters accessible from iwl-*.c */ | |
bb8c093b CH |
69 | extern int iwl3945_param_hwcrypto; |
70 | extern int iwl3945_param_queues_num; | |
5d08cd1d | 71 | |
bb8c093b | 72 | enum iwl3945_antenna { |
5d08cd1d CH |
73 | IWL_ANTENNA_DIVERSITY, |
74 | IWL_ANTENNA_MAIN, | |
75 | IWL_ANTENNA_AUX | |
76 | }; | |
77 | ||
78 | /* | |
79 | * RTS threshold here is total size [2347] minus 4 FCS bytes | |
80 | * Per spec: | |
81 | * a value of 0 means RTS on all data/management packets | |
82 | * a value > max MSDU size means no RTS | |
83 | * else RTS for data/management frames where MPDU is larger | |
84 | * than RTS value. | |
85 | */ | |
9ee1ba47 | 86 | #define IWL_RX_BUF_SIZE 3000U |
5d08cd1d CH |
87 | #define DEFAULT_RTS_THRESHOLD 2347U |
88 | #define MIN_RTS_THRESHOLD 0U | |
89 | #define MAX_RTS_THRESHOLD 2347U | |
90 | #define MAX_MSDU_SIZE 2304U | |
91 | #define MAX_MPDU_SIZE 2346U | |
92 | #define DEFAULT_BEACON_INTERVAL 100U | |
93 | #define DEFAULT_SHORT_RETRY_LIMIT 7U | |
94 | #define DEFAULT_LONG_RETRY_LIMIT 4U | |
95 | ||
bb8c093b | 96 | struct iwl3945_rx_mem_buffer { |
5d08cd1d CH |
97 | dma_addr_t dma_addr; |
98 | struct sk_buff *skb; | |
99 | struct list_head list; | |
100 | }; | |
101 | ||
5d08cd1d CH |
102 | /* |
103 | * Generic queue structure | |
104 | * | |
105 | * Contains common data for Rx and Tx queues | |
106 | */ | |
bb8c093b | 107 | struct iwl3945_queue { |
5d08cd1d CH |
108 | int n_bd; /* number of BDs in this queue */ |
109 | int write_ptr; /* 1-st empty entry (index) host_w*/ | |
110 | int read_ptr; /* last used entry (index) host_r*/ | |
111 | dma_addr_t dma_addr; /* physical addr for BD's */ | |
112 | int n_window; /* safe queue window */ | |
113 | u32 id; | |
114 | int low_mark; /* low watermark, resume queue if free | |
115 | * space more than this */ | |
116 | int high_mark; /* high watermark, stop queue if free | |
117 | * space less than this */ | |
118 | } __attribute__ ((packed)); | |
119 | ||
c54b679d TW |
120 | int iwl3945_queue_space(const struct iwl3945_queue *q); |
121 | int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i); | |
122 | ||
5d08cd1d CH |
123 | #define MAX_NUM_OF_TBS (20) |
124 | ||
bc47279f | 125 | /* One for each TFD */ |
bb8c093b | 126 | struct iwl3945_tx_info { |
5d08cd1d CH |
127 | struct ieee80211_tx_status status; |
128 | struct sk_buff *skb[MAX_NUM_OF_TBS]; | |
129 | }; | |
130 | ||
131 | /** | |
bb8c093b | 132 | * struct iwl3945_tx_queue - Tx Queue for DMA |
bc47279f BC |
133 | * @q: generic Rx/Tx queue descriptor |
134 | * @bd: base of circular buffer of TFDs | |
135 | * @cmd: array of command/Tx buffers | |
136 | * @dma_addr_cmd: physical address of cmd/tx buffer array | |
137 | * @txb: array of per-TFD driver data | |
138 | * @need_update: indicates need to update read/write index | |
5d08cd1d | 139 | * |
bc47279f BC |
140 | * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame |
141 | * descriptors) and required locking structures. | |
5d08cd1d | 142 | */ |
bb8c093b CH |
143 | struct iwl3945_tx_queue { |
144 | struct iwl3945_queue q; | |
145 | struct iwl3945_tfd_frame *bd; | |
146 | struct iwl3945_cmd *cmd; | |
5d08cd1d | 147 | dma_addr_t dma_addr_cmd; |
bb8c093b | 148 | struct iwl3945_tx_info *txb; |
5d08cd1d | 149 | int need_update; |
5d08cd1d CH |
150 | int active; |
151 | }; | |
152 | ||
153 | #define IWL_NUM_SCAN_RATES (2) | |
154 | ||
bb8c093b | 155 | struct iwl3945_channel_tgd_info { |
5d08cd1d CH |
156 | u8 type; |
157 | s8 max_power; | |
158 | }; | |
159 | ||
bb8c093b | 160 | struct iwl3945_channel_tgh_info { |
5d08cd1d CH |
161 | s64 last_radar_time; |
162 | }; | |
163 | ||
164 | /* current Tx power values to use, one for each rate for each channel. | |
165 | * requested power is limited by: | |
166 | * -- regulatory EEPROM limits for this channel | |
167 | * -- hardware capabilities (clip-powers) | |
168 | * -- spectrum management | |
169 | * -- user preference (e.g. iwconfig) | |
170 | * when requested power is set, base power index must also be set. */ | |
bb8c093b CH |
171 | struct iwl3945_channel_power_info { |
172 | struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ | |
5d08cd1d CH |
173 | s8 power_table_index; /* actual (compenst'd) index into gain table */ |
174 | s8 base_power_index; /* gain index for power at factory temp. */ | |
175 | s8 requested_power; /* power (dBm) requested for this chnl/rate */ | |
176 | }; | |
177 | ||
178 | /* current scan Tx power values to use, one for each scan rate for each | |
179 | * channel. */ | |
bb8c093b CH |
180 | struct iwl3945_scan_power_info { |
181 | struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ | |
5d08cd1d CH |
182 | s8 power_table_index; /* actual (compenst'd) index into gain table */ |
183 | s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */ | |
184 | }; | |
185 | ||
5d08cd1d CH |
186 | /* |
187 | * One for each channel, holds all channel setup data | |
188 | * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant | |
189 | * with one another! | |
190 | */ | |
191 | #define IWL4965_MAX_RATE (33) | |
192 | ||
bb8c093b CH |
193 | struct iwl3945_channel_info { |
194 | struct iwl3945_channel_tgd_info tgd; | |
195 | struct iwl3945_channel_tgh_info tgh; | |
196 | struct iwl3945_eeprom_channel eeprom; /* EEPROM regulatory limit */ | |
197 | struct iwl3945_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for | |
5d08cd1d CH |
198 | * FAT channel */ |
199 | ||
200 | u8 channel; /* channel number */ | |
201 | u8 flags; /* flags copied from EEPROM */ | |
202 | s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ | |
203 | s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */ | |
204 | s8 min_power; /* always 0 */ | |
205 | s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ | |
206 | ||
207 | u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */ | |
208 | u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */ | |
8318d78a | 209 | enum ieee80211_band band; |
5d08cd1d CH |
210 | |
211 | /* Radio/DSP gain settings for each "normal" data Tx rate. | |
212 | * These include, in addition to RF and DSP gain, a few fields for | |
213 | * remembering/modifying gain settings (indexes). */ | |
bb8c093b | 214 | struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE]; |
5d08cd1d CH |
215 | |
216 | /* Radio/DSP gain settings for each scan rate, for directed scans. */ | |
bb8c093b | 217 | struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES]; |
5d08cd1d CH |
218 | }; |
219 | ||
bb8c093b | 220 | struct iwl3945_clip_group { |
5d08cd1d CH |
221 | /* maximum power level to prevent clipping for each rate, derived by |
222 | * us from this band's saturation power in EEPROM */ | |
223 | const s8 clip_powers[IWL_MAX_RATES]; | |
224 | }; | |
225 | ||
226 | #include "iwl-3945-rs.h" | |
227 | ||
228 | #define IWL_TX_FIFO_AC0 0 | |
229 | #define IWL_TX_FIFO_AC1 1 | |
230 | #define IWL_TX_FIFO_AC2 2 | |
231 | #define IWL_TX_FIFO_AC3 3 | |
232 | #define IWL_TX_FIFO_HCCA_1 5 | |
233 | #define IWL_TX_FIFO_HCCA_2 6 | |
234 | #define IWL_TX_FIFO_NONE 7 | |
235 | ||
236 | /* Minimum number of queues. MAX_NUM is defined in hw specific files */ | |
237 | #define IWL_MIN_NUM_QUEUES 4 | |
238 | ||
239 | /* Power management (not Tx power) structures */ | |
240 | ||
bb8c093b CH |
241 | struct iwl3945_power_vec_entry { |
242 | struct iwl3945_powertable_cmd cmd; | |
5d08cd1d CH |
243 | u8 no_dtim; |
244 | }; | |
245 | #define IWL_POWER_RANGE_0 (0) | |
246 | #define IWL_POWER_RANGE_1 (1) | |
247 | ||
248 | #define IWL_POWER_MODE_CAM 0x00 /* Continuously Aware Mode, always on */ | |
249 | #define IWL_POWER_INDEX_3 0x03 | |
250 | #define IWL_POWER_INDEX_5 0x05 | |
251 | #define IWL_POWER_AC 0x06 | |
252 | #define IWL_POWER_BATTERY 0x07 | |
253 | #define IWL_POWER_LIMIT 0x07 | |
254 | #define IWL_POWER_MASK 0x0F | |
255 | #define IWL_POWER_ENABLED 0x10 | |
256 | #define IWL_POWER_LEVEL(x) ((x) & IWL_POWER_MASK) | |
257 | ||
bb8c093b | 258 | struct iwl3945_power_mgr { |
5d08cd1d | 259 | spinlock_t lock; |
bb8c093b CH |
260 | struct iwl3945_power_vec_entry pwr_range_0[IWL_POWER_AC]; |
261 | struct iwl3945_power_vec_entry pwr_range_1[IWL_POWER_AC]; | |
5d08cd1d CH |
262 | u8 active_index; |
263 | u32 dtim_val; | |
264 | }; | |
265 | ||
266 | #define IEEE80211_DATA_LEN 2304 | |
267 | #define IEEE80211_4ADDR_LEN 30 | |
268 | #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) | |
269 | #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) | |
270 | ||
bb8c093b | 271 | struct iwl3945_frame { |
5d08cd1d CH |
272 | union { |
273 | struct ieee80211_hdr frame; | |
bb8c093b | 274 | struct iwl3945_tx_beacon_cmd beacon; |
5d08cd1d CH |
275 | u8 raw[IEEE80211_FRAME_LEN]; |
276 | u8 cmd[360]; | |
277 | } u; | |
278 | struct list_head list; | |
279 | }; | |
280 | ||
281 | #define SEQ_TO_QUEUE(x) ((x >> 8) & 0xbf) | |
282 | #define QUEUE_TO_SEQ(x) ((x & 0xbf) << 8) | |
283 | #define SEQ_TO_INDEX(x) (x & 0xff) | |
284 | #define INDEX_TO_SEQ(x) (x & 0xff) | |
285 | #define SEQ_HUGE_FRAME (0x4000) | |
286 | #define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000) | |
287 | #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) | |
288 | #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) | |
289 | #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) | |
290 | ||
291 | enum { | |
292 | /* CMD_SIZE_NORMAL = 0, */ | |
293 | CMD_SIZE_HUGE = (1 << 0), | |
294 | /* CMD_SYNC = 0, */ | |
295 | CMD_ASYNC = (1 << 1), | |
296 | /* CMD_NO_SKB = 0, */ | |
297 | CMD_WANT_SKB = (1 << 2), | |
298 | }; | |
299 | ||
bb8c093b CH |
300 | struct iwl3945_cmd; |
301 | struct iwl3945_priv; | |
5d08cd1d | 302 | |
bb8c093b CH |
303 | struct iwl3945_cmd_meta { |
304 | struct iwl3945_cmd_meta *source; | |
5d08cd1d CH |
305 | union { |
306 | struct sk_buff *skb; | |
bb8c093b CH |
307 | int (*callback)(struct iwl3945_priv *priv, |
308 | struct iwl3945_cmd *cmd, struct sk_buff *skb); | |
5d08cd1d CH |
309 | } __attribute__ ((packed)) u; |
310 | ||
311 | /* The CMD_SIZE_HUGE flag bit indicates that the command | |
312 | * structure is stored at the end of the shared queue memory. */ | |
313 | u32 flags; | |
314 | ||
315 | } __attribute__ ((packed)); | |
316 | ||
bc47279f BC |
317 | /** |
318 | * struct iwl3945_cmd | |
319 | * | |
320 | * For allocation of the command and tx queues, this establishes the overall | |
321 | * size of the largest command we send to uCode, except for a scan command | |
322 | * (which is relatively huge; space is allocated separately). | |
323 | */ | |
bb8c093b CH |
324 | struct iwl3945_cmd { |
325 | struct iwl3945_cmd_meta meta; | |
326 | struct iwl3945_cmd_header hdr; | |
5d08cd1d | 327 | union { |
bb8c093b CH |
328 | struct iwl3945_addsta_cmd addsta; |
329 | struct iwl3945_led_cmd led; | |
5d08cd1d CH |
330 | u32 flags; |
331 | u8 val8; | |
332 | u16 val16; | |
333 | u32 val32; | |
bb8c093b CH |
334 | struct iwl3945_bt_cmd bt; |
335 | struct iwl3945_rxon_time_cmd rxon_time; | |
336 | struct iwl3945_powertable_cmd powertable; | |
337 | struct iwl3945_qosparam_cmd qosparam; | |
338 | struct iwl3945_tx_cmd tx; | |
339 | struct iwl3945_tx_beacon_cmd tx_beacon; | |
340 | struct iwl3945_rxon_assoc_cmd rxon_assoc; | |
5d08cd1d CH |
341 | u8 *indirect; |
342 | u8 payload[360]; | |
343 | } __attribute__ ((packed)) cmd; | |
344 | } __attribute__ ((packed)); | |
345 | ||
bb8c093b | 346 | struct iwl3945_host_cmd { |
5d08cd1d CH |
347 | u8 id; |
348 | u16 len; | |
bb8c093b | 349 | struct iwl3945_cmd_meta meta; |
5d08cd1d CH |
350 | const void *data; |
351 | }; | |
352 | ||
bb8c093b CH |
353 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl3945_cmd) - \ |
354 | sizeof(struct iwl3945_cmd_meta)) | |
5d08cd1d CH |
355 | |
356 | /* | |
357 | * RX related structures and functions | |
358 | */ | |
359 | #define RX_FREE_BUFFERS 64 | |
360 | #define RX_LOW_WATERMARK 8 | |
361 | ||
362 | #define SUP_RATE_11A_MAX_NUM_CHANNELS 8 | |
363 | #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 | |
364 | #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 | |
365 | ||
366 | /** | |
bb8c093b | 367 | * struct iwl3945_rx_queue - Rx queue |
5d08cd1d CH |
368 | * @processed: Internal index to last handled Rx packet |
369 | * @read: Shared index to newest available Rx buffer | |
370 | * @write: Shared index to oldest written Rx packet | |
371 | * @free_count: Number of pre-allocated buffers in rx_free | |
372 | * @rx_free: list of free SKBs for use | |
373 | * @rx_used: List of Rx buffers with no SKB | |
374 | * @need_update: flag to indicate we need to update read/write index | |
375 | * | |
bb8c093b | 376 | * NOTE: rx_free and rx_used are used as a FIFO for iwl3945_rx_mem_buffers |
5d08cd1d | 377 | */ |
bb8c093b | 378 | struct iwl3945_rx_queue { |
5d08cd1d CH |
379 | __le32 *bd; |
380 | dma_addr_t dma_addr; | |
bb8c093b CH |
381 | struct iwl3945_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; |
382 | struct iwl3945_rx_mem_buffer *queue[RX_QUEUE_SIZE]; | |
5d08cd1d CH |
383 | u32 processed; |
384 | u32 read; | |
385 | u32 write; | |
386 | u32 free_count; | |
387 | struct list_head rx_free; | |
388 | struct list_head rx_used; | |
389 | int need_update; | |
390 | spinlock_t lock; | |
391 | }; | |
392 | ||
393 | #define IWL_SUPPORTED_RATES_IE_LEN 8 | |
394 | ||
395 | #define SCAN_INTERVAL 100 | |
396 | ||
397 | #define MAX_A_CHANNELS 252 | |
398 | #define MIN_A_CHANNELS 7 | |
399 | ||
400 | #define MAX_B_CHANNELS 14 | |
401 | #define MIN_B_CHANNELS 1 | |
402 | ||
403 | #define STATUS_HCMD_ACTIVE 0 /* host command in progress */ | |
404 | #define STATUS_INT_ENABLED 1 | |
405 | #define STATUS_RF_KILL_HW 2 | |
406 | #define STATUS_RF_KILL_SW 3 | |
407 | #define STATUS_INIT 4 | |
408 | #define STATUS_ALIVE 5 | |
409 | #define STATUS_READY 6 | |
410 | #define STATUS_TEMPERATURE 7 | |
411 | #define STATUS_GEO_CONFIGURED 8 | |
412 | #define STATUS_EXIT_PENDING 9 | |
413 | #define STATUS_IN_SUSPEND 10 | |
414 | #define STATUS_STATISTICS 11 | |
415 | #define STATUS_SCANNING 12 | |
416 | #define STATUS_SCAN_ABORTING 13 | |
417 | #define STATUS_SCAN_HW 14 | |
418 | #define STATUS_POWER_PMI 15 | |
419 | #define STATUS_FW_ERROR 16 | |
a0646470 | 420 | #define STATUS_CONF_PENDING 17 |
5d08cd1d CH |
421 | |
422 | #define MAX_TID_COUNT 9 | |
423 | ||
424 | #define IWL_INVALID_RATE 0xFF | |
425 | #define IWL_INVALID_VALUE -1 | |
426 | ||
bb8c093b | 427 | struct iwl3945_tid_data { |
5d08cd1d CH |
428 | u16 seq_number; |
429 | }; | |
430 | ||
bb8c093b | 431 | struct iwl3945_hw_key { |
5d08cd1d CH |
432 | enum ieee80211_key_alg alg; |
433 | int keylen; | |
434 | u8 key[32]; | |
435 | }; | |
436 | ||
bb8c093b | 437 | union iwl3945_ht_rate_supp { |
5d08cd1d CH |
438 | u16 rates; |
439 | struct { | |
440 | u8 siso_rate; | |
441 | u8 mimo_rate; | |
442 | }; | |
443 | }; | |
444 | ||
bb8c093b | 445 | union iwl3945_qos_capabity { |
5d08cd1d CH |
446 | struct { |
447 | u8 edca_count:4; /* bit 0-3 */ | |
448 | u8 q_ack:1; /* bit 4 */ | |
449 | u8 queue_request:1; /* bit 5 */ | |
450 | u8 txop_request:1; /* bit 6 */ | |
451 | u8 reserved:1; /* bit 7 */ | |
452 | } q_AP; | |
453 | struct { | |
454 | u8 acvo_APSD:1; /* bit 0 */ | |
455 | u8 acvi_APSD:1; /* bit 1 */ | |
456 | u8 ac_bk_APSD:1; /* bit 2 */ | |
457 | u8 ac_be_APSD:1; /* bit 3 */ | |
458 | u8 q_ack:1; /* bit 4 */ | |
459 | u8 max_len:2; /* bit 5-6 */ | |
460 | u8 more_data_ack:1; /* bit 7 */ | |
461 | } q_STA; | |
462 | u8 val; | |
463 | }; | |
464 | ||
465 | /* QoS structures */ | |
bb8c093b | 466 | struct iwl3945_qos_info { |
5d08cd1d CH |
467 | int qos_enable; |
468 | int qos_active; | |
bb8c093b CH |
469 | union iwl3945_qos_capabity qos_cap; |
470 | struct iwl3945_qosparam_cmd def_qos_parm; | |
5d08cd1d | 471 | }; |
5d08cd1d CH |
472 | |
473 | #define STA_PS_STATUS_WAKE 0 | |
474 | #define STA_PS_STATUS_SLEEP 1 | |
475 | ||
bb8c093b CH |
476 | struct iwl3945_station_entry { |
477 | struct iwl3945_addsta_cmd sta; | |
478 | struct iwl3945_tid_data tid[MAX_TID_COUNT]; | |
5d08cd1d CH |
479 | union { |
480 | struct { | |
481 | u8 rate; | |
482 | u8 flags; | |
483 | } s; | |
484 | u16 rate_n_flags; | |
485 | } current_rate; | |
486 | u8 used; | |
487 | u8 ps_status; | |
bb8c093b | 488 | struct iwl3945_hw_key keyinfo; |
5d08cd1d CH |
489 | }; |
490 | ||
491 | /* one for each uCode image (inst/data, boot/init/runtime) */ | |
492 | struct fw_desc { | |
493 | void *v_addr; /* access by driver */ | |
494 | dma_addr_t p_addr; /* access by card's busmaster DMA */ | |
495 | u32 len; /* bytes */ | |
496 | }; | |
497 | ||
498 | /* uCode file layout */ | |
bb8c093b | 499 | struct iwl3945_ucode { |
5d08cd1d CH |
500 | __le32 ver; /* major/minor/subminor */ |
501 | __le32 inst_size; /* bytes of runtime instructions */ | |
502 | __le32 data_size; /* bytes of runtime data */ | |
503 | __le32 init_size; /* bytes of initialization instructions */ | |
504 | __le32 init_data_size; /* bytes of initialization data */ | |
505 | __le32 boot_size; /* bytes of bootstrap instructions */ | |
506 | u8 data[0]; /* data in same order as "size" elements */ | |
507 | }; | |
508 | ||
509 | #define IWL_IBSS_MAC_HASH_SIZE 32 | |
510 | ||
bb8c093b | 511 | struct iwl3945_ibss_seq { |
5d08cd1d CH |
512 | u8 mac[ETH_ALEN]; |
513 | u16 seq_num; | |
514 | u16 frag_num; | |
515 | unsigned long packet_time; | |
516 | struct list_head list; | |
517 | }; | |
518 | ||
bc47279f | 519 | /** |
12342c47 | 520 | * struct iwl3945_driver_hw_info |
bc47279f | 521 | * @max_txq_num: Max # Tx queues supported |
bc47279f | 522 | * @tx_cmd_len: Size of Tx command (but not including frame itself) |
3e82a822 | 523 | * @tx_ant_num: Number of TX antennas |
bc47279f | 524 | * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) |
9ee1ba47 RR |
525 | * @rx_buf_size: |
526 | * @max_pkt_size: | |
bc47279f BC |
527 | * @max_rxq_log: Log-base-2 of max_rxq_size |
528 | * @max_stations: | |
529 | * @bcast_sta_id: | |
530 | * @shared_virt: Pointer to driver/uCode shared Tx Byte Counts and Rx status | |
531 | * @shared_phys: Physical Pointer to Tx Byte Counts and Rx status | |
532 | */ | |
bb8c093b | 533 | struct iwl3945_driver_hw_info { |
5d08cd1d | 534 | u16 max_txq_num; |
5d08cd1d | 535 | u16 tx_cmd_len; |
3e82a822 | 536 | u16 tx_ant_num; |
5d08cd1d | 537 | u16 max_rxq_size; |
9ee1ba47 RR |
538 | u32 rx_buf_size; |
539 | u32 max_pkt_size; | |
5d08cd1d CH |
540 | u16 max_rxq_log; |
541 | u8 max_stations; | |
542 | u8 bcast_sta_id; | |
543 | void *shared_virt; | |
544 | dma_addr_t shared_phys; | |
545 | }; | |
546 | ||
bb8c093b | 547 | #define IWL_RX_HDR(x) ((struct iwl3945_rx_frame_hdr *)(\ |
5d08cd1d CH |
548 | x->u.rx_frame.stats.payload + \ |
549 | x->u.rx_frame.stats.phy_count)) | |
bb8c093b | 550 | #define IWL_RX_END(x) ((struct iwl3945_rx_frame_end *)(\ |
5d08cd1d CH |
551 | IWL_RX_HDR(x)->payload + \ |
552 | le16_to_cpu(IWL_RX_HDR(x)->len))) | |
553 | #define IWL_RX_STATS(x) (&x->u.rx_frame.stats) | |
554 | #define IWL_RX_DATA(x) (IWL_RX_HDR(x)->payload) | |
555 | ||
556 | ||
557 | /****************************************************************************** | |
558 | * | |
559 | * Functions implemented in iwl-base.c which are forward declared here | |
560 | * for use by iwl-*.c | |
561 | * | |
562 | *****************************************************************************/ | |
bb8c093b CH |
563 | struct iwl3945_addsta_cmd; |
564 | extern int iwl3945_send_add_station(struct iwl3945_priv *priv, | |
565 | struct iwl3945_addsta_cmd *sta, u8 flags); | |
566 | extern u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *bssid, | |
5d08cd1d | 567 | int is_ap, u8 flags); |
bb8c093b | 568 | extern int iwl3945_is_network_packet(struct iwl3945_priv *priv, |
5d08cd1d | 569 | struct ieee80211_hdr *header); |
bb8c093b CH |
570 | extern int iwl3945_power_init_handle(struct iwl3945_priv *priv); |
571 | extern int iwl3945_eeprom_init(struct iwl3945_priv *priv); | |
bb8c093b CH |
572 | extern void iwl3945_handle_data_packet_monitor(struct iwl3945_priv *priv, |
573 | struct iwl3945_rx_mem_buffer *rxb, | |
5d08cd1d CH |
574 | void *data, short len, |
575 | struct ieee80211_rx_status *stats, | |
576 | u16 phy_flags); | |
bb8c093b CH |
577 | extern int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, |
578 | struct ieee80211_hdr *header); | |
579 | extern int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv); | |
580 | extern void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, | |
581 | struct iwl3945_rx_queue *rxq); | |
582 | extern int iwl3945_calc_db_from_ratio(int sig_ratio); | |
583 | extern int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm); | |
584 | extern int iwl3945_tx_queue_init(struct iwl3945_priv *priv, | |
585 | struct iwl3945_tx_queue *txq, int count, u32 id); | |
586 | extern void iwl3945_rx_replenish(void *data); | |
587 | extern void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq); | |
588 | extern int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, | |
5d08cd1d | 589 | const void *data); |
bb8c093b CH |
590 | extern int __must_check iwl3945_send_cmd(struct iwl3945_priv *priv, |
591 | struct iwl3945_host_cmd *cmd); | |
592 | extern unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv, | |
5d08cd1d CH |
593 | struct ieee80211_hdr *hdr, |
594 | const u8 *dest, int left); | |
bb8c093b CH |
595 | extern int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, |
596 | struct iwl3945_rx_queue *q); | |
597 | extern int iwl3945_send_statistics_request(struct iwl3945_priv *priv); | |
598 | extern void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb, | |
5d08cd1d CH |
599 | u32 decrypt_res, |
600 | struct ieee80211_rx_status *stats); | |
bb8c093b | 601 | extern const u8 iwl3945_broadcast_addr[ETH_ALEN]; |
5d08cd1d CH |
602 | |
603 | /* | |
604 | * Currently used by iwl-3945-rs... look at restructuring so that it doesn't | |
605 | * call this... todo... fix that. | |
606 | */ | |
bb8c093b | 607 | extern u8 iwl3945_sync_station(struct iwl3945_priv *priv, int sta_id, |
5d08cd1d CH |
608 | u16 tx_rate, u8 flags); |
609 | ||
610 | /****************************************************************************** | |
611 | * | |
612 | * Functions implemented in iwl-[34]*.c which are forward declared here | |
613 | * for use by iwl-base.c | |
614 | * | |
615 | * NOTE: The implementation of these functions are hardware specific | |
616 | * which is why they are in the hardware specific files (vs. iwl-base.c) | |
617 | * | |
618 | * Naming convention -- | |
bb8c093b CH |
619 | * iwl3945_ <-- Its part of iwlwifi (should be changed to iwl3945_) |
620 | * iwl3945_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW) | |
5d08cd1d | 621 | * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX) |
bb8c093b CH |
622 | * iwl3945_bg_ <-- Called from work queue context |
623 | * iwl3945_mac_ <-- mac80211 callback | |
5d08cd1d CH |
624 | * |
625 | ****************************************************************************/ | |
bb8c093b CH |
626 | extern void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv); |
627 | extern void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv); | |
628 | extern void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv); | |
629 | extern int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv); | |
630 | extern int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv); | |
631 | extern int iwl3945_hw_nic_init(struct iwl3945_priv *priv); | |
632 | extern int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv); | |
633 | extern void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv); | |
634 | extern void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv); | |
635 | extern int iwl3945_hw_nic_reset(struct iwl3945_priv *priv); | |
636 | extern int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *tfd, | |
5d08cd1d | 637 | dma_addr_t addr, u16 len); |
bb8c093b CH |
638 | extern int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq); |
639 | extern int iwl3945_hw_get_temperature(struct iwl3945_priv *priv); | |
640 | extern int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, | |
641 | struct iwl3945_tx_queue *txq); | |
642 | extern unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv, | |
643 | struct iwl3945_frame *frame, u8 rate); | |
644 | extern int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv); | |
645 | extern void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv, | |
646 | struct iwl3945_cmd *cmd, | |
5d08cd1d CH |
647 | struct ieee80211_tx_control *ctrl, |
648 | struct ieee80211_hdr *hdr, | |
649 | int sta_id, int tx_id); | |
bb8c093b CH |
650 | extern int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv); |
651 | extern int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power); | |
652 | extern void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, | |
653 | struct iwl3945_rx_mem_buffer *rxb); | |
654 | extern void iwl3945_disable_events(struct iwl3945_priv *priv); | |
655 | extern int iwl4965_get_temperature(const struct iwl3945_priv *priv); | |
5d08cd1d CH |
656 | |
657 | /** | |
bb8c093b | 658 | * iwl3945_hw_find_station - Find station id for a given BSSID |
5d08cd1d CH |
659 | * @bssid: MAC address of station ID to find |
660 | * | |
661 | * NOTE: This should not be hardware specific but the code has | |
662 | * not yet been merged into a single common layer for managing the | |
663 | * station tables. | |
664 | */ | |
bb8c093b | 665 | extern u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *bssid); |
5d08cd1d | 666 | |
bb8c093b | 667 | extern int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel); |
5d08cd1d | 668 | |
b481de9c ZY |
669 | /* |
670 | * Forward declare iwl-3945.c functions for iwl-base.c | |
671 | */ | |
bb8c093b CH |
672 | extern __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv); |
673 | extern int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv); | |
674 | extern void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv); | |
675 | extern int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv); | |
676 | extern u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, | |
b481de9c | 677 | u16 tx_rate, u8 flags); |
5d08cd1d CH |
678 | |
679 | ||
c8b0e6e1 | 680 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT |
5d08cd1d CH |
681 | |
682 | enum { | |
683 | MEASUREMENT_READY = (1 << 0), | |
684 | MEASUREMENT_ACTIVE = (1 << 1), | |
685 | }; | |
686 | ||
687 | #endif | |
688 | ||
bb8c093b | 689 | struct iwl3945_priv { |
5d08cd1d CH |
690 | |
691 | /* ieee device used by generic ieee processing code */ | |
692 | struct ieee80211_hw *hw; | |
693 | struct ieee80211_channel *ieee_channels; | |
694 | struct ieee80211_rate *ieee_rates; | |
82b9a121 | 695 | struct iwl_3945_cfg *cfg; /* device configuration */ |
5d08cd1d CH |
696 | |
697 | /* temporary frame storage list */ | |
698 | struct list_head free_frames; | |
699 | int frames_count; | |
700 | ||
8318d78a | 701 | enum ieee80211_band band; |
5d08cd1d | 702 | int alloc_rxb_skb; |
12342c47 | 703 | bool add_radiotap; |
5d08cd1d | 704 | |
bb8c093b CH |
705 | void (*rx_handlers[REPLY_MAX])(struct iwl3945_priv *priv, |
706 | struct iwl3945_rx_mem_buffer *rxb); | |
5d08cd1d | 707 | |
8318d78a | 708 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; |
5d08cd1d | 709 | |
c8b0e6e1 | 710 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT |
5d08cd1d | 711 | /* spectrum measurement report caching */ |
bb8c093b | 712 | struct iwl3945_spectrum_notification measure_report; |
5d08cd1d CH |
713 | u8 measurement_status; |
714 | #endif | |
715 | /* ucode beacon time */ | |
716 | u32 ucode_beacon_time; | |
717 | ||
bb8c093b | 718 | /* we allocate array of iwl3945_channel_info for NIC's valid channels. |
5d08cd1d | 719 | * Access via channel # using indirect index array */ |
bb8c093b | 720 | struct iwl3945_channel_info *channel_info; /* channel info array */ |
5d08cd1d CH |
721 | u8 channel_count; /* # of channels */ |
722 | ||
723 | /* each calibration channel group in the EEPROM has a derived | |
724 | * clip setting for each rate. */ | |
bb8c093b | 725 | const struct iwl3945_clip_group clip_groups[5]; |
5d08cd1d CH |
726 | |
727 | /* thermal calibration */ | |
728 | s32 temperature; /* degrees Kelvin */ | |
729 | s32 last_temperature; | |
730 | ||
731 | /* Scan related variables */ | |
732 | unsigned long last_scan_jiffies; | |
7878a5a4 | 733 | unsigned long next_scan_jiffies; |
5d08cd1d CH |
734 | unsigned long scan_start; |
735 | unsigned long scan_pass_start; | |
736 | unsigned long scan_start_tsf; | |
737 | int scan_bands; | |
738 | int one_direct_scan; | |
739 | u8 direct_ssid_len; | |
740 | u8 direct_ssid[IW_ESSID_MAX_SIZE]; | |
bb8c093b | 741 | struct iwl3945_scan_cmd *scan; |
5d08cd1d CH |
742 | u8 only_active_channel; |
743 | ||
744 | /* spinlock */ | |
745 | spinlock_t lock; /* protect general shared data */ | |
746 | spinlock_t hcmd_lock; /* protect hcmd */ | |
747 | struct mutex mutex; | |
748 | ||
749 | /* basic pci-network driver stuff */ | |
750 | struct pci_dev *pci_dev; | |
751 | ||
752 | /* pci hardware address support */ | |
753 | void __iomem *hw_base; | |
754 | ||
755 | /* uCode images, save to reload in case of failure */ | |
756 | struct fw_desc ucode_code; /* runtime inst */ | |
757 | struct fw_desc ucode_data; /* runtime data original */ | |
758 | struct fw_desc ucode_data_backup; /* runtime data save/restore */ | |
759 | struct fw_desc ucode_init; /* initialization inst */ | |
760 | struct fw_desc ucode_init_data; /* initialization data */ | |
761 | struct fw_desc ucode_boot; /* bootstrap inst */ | |
762 | ||
763 | ||
bb8c093b | 764 | struct iwl3945_rxon_time_cmd rxon_timing; |
5d08cd1d CH |
765 | |
766 | /* We declare this const so it can only be | |
767 | * changed via explicit cast within the | |
768 | * routines that actually update the physical | |
769 | * hardware */ | |
bb8c093b CH |
770 | const struct iwl3945_rxon_cmd active_rxon; |
771 | struct iwl3945_rxon_cmd staging_rxon; | |
5d08cd1d CH |
772 | |
773 | int error_recovering; | |
bb8c093b | 774 | struct iwl3945_rxon_cmd recovery_rxon; |
5d08cd1d CH |
775 | |
776 | /* 1st responses from initialize and runtime uCode images. | |
777 | * 4965's initialize alive response contains some calibration data. */ | |
bb8c093b CH |
778 | struct iwl3945_init_alive_resp card_alive_init; |
779 | struct iwl3945_alive_resp card_alive; | |
5d08cd1d | 780 | |
ab53d8af MA |
781 | #ifdef CONFIG_IWL4965_LEDS |
782 | struct iwl3945_led led[IWL_LED_TRG_MAX]; | |
783 | unsigned long last_blink_time; | |
784 | u8 last_blink_rate; | |
785 | u8 allow_blinking; | |
786 | unsigned int rxtxpackets; | |
5d08cd1d CH |
787 | #endif |
788 | ||
ab53d8af | 789 | |
5d08cd1d CH |
790 | u16 active_rate; |
791 | u16 active_rate_basic; | |
792 | ||
793 | u8 call_post_assoc_from_beacon; | |
5d08cd1d CH |
794 | /* Rate scaling data */ |
795 | s8 data_retry_limit; | |
796 | u8 retry_rate; | |
797 | ||
798 | wait_queue_head_t wait_command_queue; | |
799 | ||
800 | int activity_timer_active; | |
801 | ||
802 | /* Rx and Tx DMA processing queues */ | |
bb8c093b CH |
803 | struct iwl3945_rx_queue rxq; |
804 | struct iwl3945_tx_queue txq[IWL_MAX_NUM_QUEUES]; | |
5d08cd1d CH |
805 | |
806 | unsigned long status; | |
5d08cd1d CH |
807 | |
808 | int last_rx_rssi; /* From Rx packet statisitics */ | |
809 | int last_rx_noise; /* From beacon statistics */ | |
810 | ||
bb8c093b | 811 | struct iwl3945_power_mgr power_data; |
5d08cd1d | 812 | |
bb8c093b | 813 | struct iwl3945_notif_statistics statistics; |
5d08cd1d CH |
814 | unsigned long last_statistics_time; |
815 | ||
816 | /* context information */ | |
817 | u8 essid[IW_ESSID_MAX_SIZE]; | |
818 | u8 essid_len; | |
819 | u16 rates_mask; | |
820 | ||
821 | u32 power_mode; | |
822 | u32 antenna; | |
823 | u8 bssid[ETH_ALEN]; | |
824 | u16 rts_threshold; | |
825 | u8 mac_addr[ETH_ALEN]; | |
826 | ||
827 | /*station table variables */ | |
828 | spinlock_t sta_lock; | |
829 | int num_stations; | |
bb8c093b | 830 | struct iwl3945_station_entry stations[IWL_STATION_COUNT]; |
5d08cd1d CH |
831 | |
832 | /* Indication if ieee80211_ops->open has been called */ | |
69dc5d9d | 833 | u8 is_open; |
5d08cd1d CH |
834 | |
835 | u8 mac80211_registered; | |
5d08cd1d CH |
836 | |
837 | u32 notif_missed_beacons; | |
838 | ||
839 | /* Rx'd packet timing information */ | |
840 | u32 last_beacon_time; | |
841 | u64 last_tsf; | |
842 | ||
843 | /* Duplicate packet detection */ | |
844 | u16 last_seq_num; | |
845 | u16 last_frag_num; | |
846 | unsigned long last_packet_time; | |
bc47279f BC |
847 | |
848 | /* Hash table for finding stations in IBSS network */ | |
5d08cd1d CH |
849 | struct list_head ibss_mac_hash[IWL_IBSS_MAC_HASH_SIZE]; |
850 | ||
851 | /* eeprom */ | |
bb8c093b | 852 | struct iwl3945_eeprom eeprom; |
5d08cd1d | 853 | |
69dc5d9d | 854 | enum ieee80211_if_types iw_mode; |
5d08cd1d CH |
855 | |
856 | struct sk_buff *ibss_beacon; | |
857 | ||
858 | /* Last Rx'd beacon timestamp */ | |
859 | u32 timestamp0; | |
860 | u32 timestamp1; | |
861 | u16 beacon_int; | |
bb8c093b | 862 | struct iwl3945_driver_hw_info hw_setting; |
32bfd35d | 863 | struct ieee80211_vif *vif; |
5d08cd1d CH |
864 | |
865 | /* Current association information needed to configure the | |
866 | * hardware */ | |
867 | u16 assoc_id; | |
868 | u16 assoc_capability; | |
869 | u8 ps_mode; | |
870 | ||
bb8c093b | 871 | struct iwl3945_qos_info qos_data; |
5d08cd1d CH |
872 | |
873 | struct workqueue_struct *workqueue; | |
874 | ||
875 | struct work_struct up; | |
876 | struct work_struct restart; | |
877 | struct work_struct calibrated_work; | |
878 | struct work_struct scan_completed; | |
879 | struct work_struct rx_replenish; | |
880 | struct work_struct rf_kill; | |
881 | struct work_struct abort_scan; | |
882 | struct work_struct update_link_led; | |
883 | struct work_struct auth_work; | |
884 | struct work_struct report_work; | |
885 | struct work_struct request_scan; | |
886 | struct work_struct beacon_update; | |
887 | ||
888 | struct tasklet_struct irq_tasklet; | |
889 | ||
890 | struct delayed_work init_alive_start; | |
891 | struct delayed_work alive_start; | |
892 | struct delayed_work activity_timer; | |
893 | struct delayed_work thermal_periodic; | |
894 | struct delayed_work gather_stats; | |
895 | struct delayed_work scan_check; | |
896 | struct delayed_work post_associate; | |
897 | ||
898 | #define IWL_DEFAULT_TX_POWER 0x0F | |
899 | s8 user_txpower_limit; | |
900 | s8 max_channel_txpower_limit; | |
901 | ||
902 | #ifdef CONFIG_PM | |
903 | u32 pm_state[16]; | |
904 | #endif | |
905 | ||
c8b0e6e1 | 906 | #ifdef CONFIG_IWL3945_DEBUG |
5d08cd1d CH |
907 | /* debugging info */ |
908 | u32 framecnt_to_us; | |
909 | atomic_t restrict_refcnt; | |
910 | #endif | |
bb8c093b | 911 | }; /*iwl3945_priv */ |
5d08cd1d | 912 | |
bb8c093b | 913 | static inline int iwl3945_is_associated(struct iwl3945_priv *priv) |
5d08cd1d CH |
914 | { |
915 | return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; | |
916 | } | |
917 | ||
bb8c093b | 918 | static inline int is_channel_valid(const struct iwl3945_channel_info *ch_info) |
5d08cd1d CH |
919 | { |
920 | if (ch_info == NULL) | |
921 | return 0; | |
922 | return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; | |
923 | } | |
924 | ||
bb8c093b | 925 | static inline int is_channel_narrow(const struct iwl3945_channel_info *ch_info) |
5d08cd1d CH |
926 | { |
927 | return (ch_info->flags & EEPROM_CHANNEL_NARROW) ? 1 : 0; | |
928 | } | |
929 | ||
bb8c093b | 930 | static inline int is_channel_radar(const struct iwl3945_channel_info *ch_info) |
5d08cd1d CH |
931 | { |
932 | return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; | |
933 | } | |
934 | ||
bb8c093b | 935 | static inline u8 is_channel_a_band(const struct iwl3945_channel_info *ch_info) |
5d08cd1d | 936 | { |
8318d78a | 937 | return ch_info->band == IEEE80211_BAND_5GHZ; |
5d08cd1d CH |
938 | } |
939 | ||
bb8c093b | 940 | static inline u8 is_channel_bg_band(const struct iwl3945_channel_info *ch_info) |
5d08cd1d | 941 | { |
8318d78a | 942 | return ch_info->band == IEEE80211_BAND_2GHZ; |
5d08cd1d CH |
943 | } |
944 | ||
bb8c093b | 945 | static inline int is_channel_passive(const struct iwl3945_channel_info *ch) |
5d08cd1d CH |
946 | { |
947 | return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0; | |
948 | } | |
949 | ||
bb8c093b | 950 | static inline int is_channel_ibss(const struct iwl3945_channel_info *ch) |
5d08cd1d CH |
951 | { |
952 | return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; | |
953 | } | |
954 | ||
bb8c093b | 955 | extern const struct iwl3945_channel_info *iwl3945_get_channel_info( |
8318d78a | 956 | const struct iwl3945_priv *priv, enum ieee80211_band band, u16 channel); |
5d08cd1d | 957 | |
bb8c093b | 958 | /* Requires full declaration of iwl3945_priv before including */ |
5d08cd1d CH |
959 | #include "iwl-3945-io.h" |
960 | ||
b481de9c | 961 | #endif |