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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
32 | #include <linux/version.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/pci.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/skbuff.h> | |
38 | #include <linux/netdevice.h> | |
39 | #include <linux/wireless.h> | |
40 | #include <linux/firmware.h> | |
b481de9c ZY |
41 | #include <linux/etherdevice.h> |
42 | #include <linux/if_arp.h> | |
43 | ||
b481de9c ZY |
44 | #include <net/mac80211.h> |
45 | ||
46 | #include <asm/div64.h> | |
47 | ||
6bc913bd | 48 | #include "iwl-eeprom.h" |
3e0d4cb1 | 49 | #include "iwl-dev.h" |
fee1247a | 50 | #include "iwl-core.h" |
3395f6e9 | 51 | #include "iwl-io.h" |
b481de9c | 52 | #include "iwl-helpers.h" |
6974e363 | 53 | #include "iwl-sta.h" |
f0832f13 | 54 | #include "iwl-calib.h" |
b481de9c | 55 | |
416e1438 | 56 | |
b481de9c ZY |
57 | /****************************************************************************** |
58 | * | |
59 | * module boiler plate | |
60 | * | |
61 | ******************************************************************************/ | |
62 | ||
b481de9c ZY |
63 | /* |
64 | * module name, copyright, version, etc. | |
65 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
66 | */ | |
67 | ||
d783b061 | 68 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
b481de9c | 69 | |
0a6857e7 | 70 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
71 | #define VD "d" |
72 | #else | |
73 | #define VD | |
74 | #endif | |
75 | ||
c8b0e6e1 | 76 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
77 | #define VS "s" |
78 | #else | |
79 | #define VS | |
80 | #endif | |
81 | ||
df48c323 | 82 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 83 | |
b481de9c ZY |
84 | |
85 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
86 | MODULE_VERSION(DRV_VERSION); | |
87 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
88 | MODULE_LICENSE("GPL"); | |
89 | ||
b481de9c | 90 | /*************** STATION TABLE MANAGEMENT **** |
9fbab516 | 91 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
92 | * the functionality provided here |
93 | */ | |
94 | ||
95 | /**************************************************************/ | |
96 | ||
b481de9c | 97 | |
b481de9c | 98 | |
deb09c43 EG |
99 | static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
100 | { | |
c1adf9fb | 101 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
deb09c43 EG |
102 | |
103 | if (hw_decrypt) | |
104 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
105 | else | |
106 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
107 | ||
108 | } | |
109 | ||
b481de9c | 110 | /** |
bb8c093b | 111 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
112 | * |
113 | * NOTE: This is really only useful during development and can eventually | |
114 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
115 | * making changes | |
116 | */ | |
c1adf9fb | 117 | static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon) |
b481de9c ZY |
118 | { |
119 | int error = 0; | |
120 | int counter = 1; | |
121 | ||
122 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
123 | error |= le32_to_cpu(rxon->flags & | |
124 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
125 | RXON_FLG_RADAR_DETECT_MSK)); | |
126 | if (error) | |
127 | IWL_WARNING("check 24G fields %d | %d\n", | |
128 | counter++, error); | |
129 | } else { | |
130 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
131 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
132 | if (error) | |
133 | IWL_WARNING("check 52 fields %d | %d\n", | |
134 | counter++, error); | |
135 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
136 | if (error) | |
137 | IWL_WARNING("check 52 CCK %d | %d\n", | |
138 | counter++, error); | |
139 | } | |
140 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
141 | if (error) | |
142 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
143 | ||
144 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
145 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
146 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
147 | if (error) | |
148 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
149 | ||
150 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
151 | if (error) | |
152 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
153 | ||
154 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
155 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
156 | if (error) | |
157 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
158 | counter++, error); | |
159 | ||
160 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
161 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
162 | if (error) | |
163 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
164 | counter++, error); | |
165 | ||
166 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
167 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
168 | if (error) | |
169 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
170 | counter++, error); | |
171 | ||
172 | if (error) | |
173 | IWL_WARNING("Tuning to channel %d\n", | |
174 | le16_to_cpu(rxon->channel)); | |
175 | ||
176 | if (error) { | |
bb8c093b | 177 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
178 | return -1; |
179 | } | |
180 | return 0; | |
181 | } | |
182 | ||
183 | /** | |
9fbab516 | 184 | * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 185 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 186 | * |
9fbab516 BC |
187 | * If the RXON structure is changing enough to require a new tune, |
188 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
189 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 190 | */ |
c79dd5b5 | 191 | static int iwl4965_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
192 | { |
193 | ||
194 | /* These items are only settable from the full RXON command */ | |
5d1e2325 | 195 | if (!(iwl_is_associated(priv)) || |
b481de9c ZY |
196 | compare_ether_addr(priv->staging_rxon.bssid_addr, |
197 | priv->active_rxon.bssid_addr) || | |
198 | compare_ether_addr(priv->staging_rxon.node_addr, | |
199 | priv->active_rxon.node_addr) || | |
200 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
201 | priv->active_rxon.wlap_bssid_addr) || | |
202 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
203 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
204 | (priv->staging_rxon.air_propagation != | |
205 | priv->active_rxon.air_propagation) || | |
206 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
207 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
208 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
209 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
210 | (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) || | |
211 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) | |
212 | return 1; | |
213 | ||
214 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
215 | * be updated with the RXON_ASSOC command -- however only some | |
216 | * flag transitions are allowed using RXON_ASSOC */ | |
217 | ||
218 | /* Check if we are not switching bands */ | |
219 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
220 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
221 | return 1; | |
222 | ||
223 | /* Check if we are switching association toggle */ | |
224 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
225 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
226 | return 1; | |
227 | ||
228 | return 0; | |
229 | } | |
230 | ||
b481de9c | 231 | /** |
bb8c093b | 232 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 233 | * |
01ebd063 | 234 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
235 | * the active_rxon structure is updated with the new data. This |
236 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
237 | * a HW tune is required based on the RXON structure changes. | |
238 | */ | |
c79dd5b5 | 239 | static int iwl4965_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
240 | { |
241 | /* cast away the const for active_rxon in this function */ | |
c1adf9fb | 242 | struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
0795af57 | 243 | DECLARE_MAC_BUF(mac); |
43d59b32 EG |
244 | int ret; |
245 | bool new_assoc = | |
246 | !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK); | |
b481de9c | 247 | |
fee1247a | 248 | if (!iwl_is_alive(priv)) |
43d59b32 | 249 | return -EBUSY; |
b481de9c ZY |
250 | |
251 | /* always get timestamp with Rx frame */ | |
252 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
a326a5d0 EG |
253 | /* allow CTS-to-self if possible. this is relevant only for |
254 | * 5000, but will not damage 4965 */ | |
255 | priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; | |
b481de9c | 256 | |
43d59b32 EG |
257 | ret = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
258 | if (ret) { | |
b481de9c ZY |
259 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); |
260 | return -EINVAL; | |
261 | } | |
262 | ||
263 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 264 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 265 | * and other flags for the current radio configuration. */ |
bb8c093b | 266 | if (!iwl4965_full_rxon_required(priv)) { |
43d59b32 EG |
267 | ret = iwl_send_rxon_assoc(priv); |
268 | if (ret) { | |
269 | IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret); | |
270 | return ret; | |
b481de9c ZY |
271 | } |
272 | ||
273 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
274 | return 0; |
275 | } | |
276 | ||
277 | /* station table will be cleared */ | |
278 | priv->assoc_station_added = 0; | |
279 | ||
b481de9c ZY |
280 | /* If we are currently associated and the new config requires |
281 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
282 | * we must clear the associated from the active configuration | |
283 | * before we apply the new config */ | |
43d59b32 | 284 | if (iwl_is_associated(priv) && new_assoc) { |
b481de9c ZY |
285 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); |
286 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
287 | ||
43d59b32 | 288 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, |
c1adf9fb | 289 | sizeof(struct iwl_rxon_cmd), |
b481de9c ZY |
290 | &priv->active_rxon); |
291 | ||
292 | /* If the mask clearing failed then we set | |
293 | * active_rxon back to what it was previously */ | |
43d59b32 | 294 | if (ret) { |
b481de9c | 295 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; |
43d59b32 EG |
296 | IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret); |
297 | return ret; | |
b481de9c | 298 | } |
b481de9c ZY |
299 | } |
300 | ||
301 | IWL_DEBUG_INFO("Sending RXON\n" | |
302 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
303 | "* channel = %d\n" | |
0795af57 | 304 | "* bssid = %s\n", |
43d59b32 | 305 | (new_assoc ? "" : "out"), |
b481de9c | 306 | le16_to_cpu(priv->staging_rxon.channel), |
0795af57 | 307 | print_mac(mac, priv->staging_rxon.bssid_addr)); |
b481de9c | 308 | |
099b40b7 | 309 | iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
43d59b32 EG |
310 | |
311 | /* Apply the new configuration | |
312 | * RXON unassoc clears the station table in uCode, send it before | |
313 | * we add the bcast station. If assoc bit is set, we will send RXON | |
314 | * after having added the bcast and bssid station. | |
315 | */ | |
316 | if (!new_assoc) { | |
317 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
c1adf9fb | 318 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); |
43d59b32 EG |
319 | if (ret) { |
320 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
321 | return ret; | |
322 | } | |
323 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
324 | } |
325 | ||
37deb2a0 | 326 | iwl_clear_stations_table(priv); |
556f8db7 | 327 | |
b481de9c ZY |
328 | if (!priv->error_recovering) |
329 | priv->start_calib = 0; | |
330 | ||
b481de9c | 331 | /* Add the broadcast address so we can send broadcast frames */ |
4f40e4d9 | 332 | if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == |
43d59b32 | 333 | IWL_INVALID_STATION) { |
b481de9c ZY |
334 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); |
335 | return -EIO; | |
336 | } | |
337 | ||
338 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
339 | * add the IWL_AP_ID to the station rate table */ | |
9185159d TW |
340 | if (new_assoc) { |
341 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
342 | ret = iwl_rxon_add_station(priv, | |
343 | priv->active_rxon.bssid_addr, 1); | |
344 | if (ret == IWL_INVALID_STATION) { | |
345 | IWL_ERROR("Error adding AP address for TX.\n"); | |
346 | return -EIO; | |
347 | } | |
348 | priv->assoc_station_added = 1; | |
349 | if (priv->default_wep_key && | |
350 | iwl_send_static_wepkey_cmd(priv, 0)) | |
351 | IWL_ERROR("Could not send WEP static key.\n"); | |
b481de9c | 352 | } |
43d59b32 EG |
353 | |
354 | /* Apply the new configuration | |
355 | * RXON assoc doesn't clear the station table in uCode, | |
356 | */ | |
357 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
358 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); | |
359 | if (ret) { | |
360 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
361 | return ret; | |
362 | } | |
363 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
364 | } |
365 | ||
36da7d70 ZY |
366 | iwl_init_sensitivity(priv); |
367 | ||
368 | /* If we issue a new RXON command which required a tune then we must | |
369 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
370 | ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); | |
371 | if (ret) { | |
372 | IWL_ERROR("Error sending TX power (%d)\n", ret); | |
373 | return ret; | |
374 | } | |
375 | ||
b481de9c ZY |
376 | return 0; |
377 | } | |
378 | ||
5da4b55f MA |
379 | void iwl4965_update_chain_flags(struct iwl_priv *priv) |
380 | { | |
381 | ||
c7de35cd | 382 | iwl_set_rxon_chain(priv); |
5da4b55f MA |
383 | iwl4965_commit_rxon(priv); |
384 | } | |
385 | ||
c79dd5b5 | 386 | static int iwl4965_send_bt_config(struct iwl_priv *priv) |
b481de9c | 387 | { |
bb8c093b | 388 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
389 | .flags = 3, |
390 | .lead_time = 0xAA, | |
391 | .max_kill = 1, | |
392 | .kill_ack_mask = 0, | |
393 | .kill_cts_mask = 0, | |
394 | }; | |
395 | ||
857485c0 | 396 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 397 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
398 | } |
399 | ||
fcab423d | 400 | static void iwl_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
401 | { |
402 | struct list_head *element; | |
403 | ||
404 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
405 | priv->frames_count); | |
406 | ||
407 | while (!list_empty(&priv->free_frames)) { | |
408 | element = priv->free_frames.next; | |
409 | list_del(element); | |
fcab423d | 410 | kfree(list_entry(element, struct iwl_frame, list)); |
b481de9c ZY |
411 | priv->frames_count--; |
412 | } | |
413 | ||
414 | if (priv->frames_count) { | |
415 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
416 | priv->frames_count); | |
417 | priv->frames_count = 0; | |
418 | } | |
419 | } | |
420 | ||
fcab423d | 421 | static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv) |
b481de9c | 422 | { |
fcab423d | 423 | struct iwl_frame *frame; |
b481de9c ZY |
424 | struct list_head *element; |
425 | if (list_empty(&priv->free_frames)) { | |
426 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
427 | if (!frame) { | |
428 | IWL_ERROR("Could not allocate frame!\n"); | |
429 | return NULL; | |
430 | } | |
431 | ||
432 | priv->frames_count++; | |
433 | return frame; | |
434 | } | |
435 | ||
436 | element = priv->free_frames.next; | |
437 | list_del(element); | |
fcab423d | 438 | return list_entry(element, struct iwl_frame, list); |
b481de9c ZY |
439 | } |
440 | ||
fcab423d | 441 | static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame) |
b481de9c ZY |
442 | { |
443 | memset(frame, 0, sizeof(*frame)); | |
444 | list_add(&frame->list, &priv->free_frames); | |
445 | } | |
446 | ||
4bf64efd TW |
447 | static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv, |
448 | struct ieee80211_hdr *hdr, | |
449 | const u8 *dest, int left) | |
b481de9c | 450 | { |
3109ece1 | 451 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
b481de9c ZY |
452 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && |
453 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) | |
454 | return 0; | |
455 | ||
456 | if (priv->ibss_beacon->len > left) | |
457 | return 0; | |
458 | ||
459 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
460 | ||
461 | return priv->ibss_beacon->len; | |
462 | } | |
463 | ||
39e88504 | 464 | static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv) |
b481de9c | 465 | { |
39e88504 GC |
466 | int i; |
467 | int rate_mask; | |
468 | ||
469 | /* Set rate mask*/ | |
470 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
471 | rate_mask = priv->active_rate_basic & 0xF; | |
472 | else | |
473 | rate_mask = priv->active_rate_basic & 0xFF0; | |
b481de9c | 474 | |
39e88504 | 475 | /* Find lowest valid rate */ |
b481de9c | 476 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; |
1826dcc0 | 477 | i = iwl_rates[i].next_ieee) { |
b481de9c | 478 | if (rate_mask & (1 << i)) |
1826dcc0 | 479 | return iwl_rates[i].plcp; |
b481de9c ZY |
480 | } |
481 | ||
39e88504 GC |
482 | /* No valid rate was found. Assign the lowest one */ |
483 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
484 | return IWL_RATE_1M_PLCP; | |
485 | else | |
486 | return IWL_RATE_6M_PLCP; | |
b481de9c ZY |
487 | } |
488 | ||
4bf64efd TW |
489 | unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv, |
490 | struct iwl_frame *frame, u8 rate) | |
491 | { | |
492 | struct iwl_tx_beacon_cmd *tx_beacon_cmd; | |
493 | unsigned int frame_size; | |
494 | ||
495 | tx_beacon_cmd = &frame->u.beacon; | |
496 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | |
497 | ||
498 | tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; | |
499 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
500 | ||
501 | frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame, | |
502 | iwl_bcast_addr, | |
503 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | |
504 | ||
505 | BUG_ON(frame_size > MAX_MPDU_SIZE); | |
506 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); | |
507 | ||
508 | if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) | |
509 | tx_beacon_cmd->tx.rate_n_flags = | |
510 | iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); | |
511 | else | |
512 | tx_beacon_cmd->tx.rate_n_flags = | |
513 | iwl_hw_set_rate_n_flags(rate, 0); | |
514 | ||
515 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | |
516 | TX_CMD_FLG_TSF_MSK | | |
517 | TX_CMD_FLG_STA_RATE_MSK; | |
518 | ||
519 | return sizeof(*tx_beacon_cmd) + frame_size; | |
520 | } | |
c79dd5b5 | 521 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 522 | { |
fcab423d | 523 | struct iwl_frame *frame; |
b481de9c ZY |
524 | unsigned int frame_size; |
525 | int rc; | |
526 | u8 rate; | |
527 | ||
fcab423d | 528 | frame = iwl_get_free_frame(priv); |
b481de9c ZY |
529 | |
530 | if (!frame) { | |
531 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
532 | "command.\n"); | |
533 | return -ENOMEM; | |
534 | } | |
535 | ||
39e88504 | 536 | rate = iwl4965_rate_get_lowest_plcp(priv); |
b481de9c | 537 | |
bb8c093b | 538 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 539 | |
857485c0 | 540 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
541 | &frame->u.cmd[0]); |
542 | ||
fcab423d | 543 | iwl_free_frame(priv, frame); |
b481de9c ZY |
544 | |
545 | return rc; | |
546 | } | |
547 | ||
b481de9c ZY |
548 | /****************************************************************************** |
549 | * | |
550 | * Misc. internal state and helper functions | |
551 | * | |
552 | ******************************************************************************/ | |
b481de9c | 553 | |
d1141dfb EG |
554 | static void iwl4965_ht_conf(struct iwl_priv *priv, |
555 | struct ieee80211_bss_conf *bss_conf) | |
556 | { | |
557 | struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf; | |
558 | struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf; | |
559 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; | |
560 | ||
561 | IWL_DEBUG_MAC80211("enter: \n"); | |
562 | ||
563 | iwl_conf->is_ht = bss_conf->assoc_ht; | |
564 | ||
565 | if (!iwl_conf->is_ht) | |
566 | return; | |
567 | ||
568 | priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
569 | ||
570 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) | |
a9841013 | 571 | iwl_conf->sgf |= HT_SHORT_GI_20MHZ; |
d1141dfb | 572 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) |
a9841013 | 573 | iwl_conf->sgf |= HT_SHORT_GI_40MHZ; |
d1141dfb EG |
574 | |
575 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
576 | iwl_conf->max_amsdu_size = | |
577 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
578 | ||
579 | iwl_conf->supported_chan_width = | |
580 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH); | |
581 | iwl_conf->extension_chan_offset = | |
582 | ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET; | |
583 | /* If no above or below channel supplied disable FAT channel */ | |
963f5517 EG |
584 | if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE && |
585 | iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) { | |
586 | iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE; | |
d1141dfb | 587 | iwl_conf->supported_chan_width = 0; |
963f5517 | 588 | } |
d1141dfb EG |
589 | |
590 | iwl_conf->tx_mimo_ps_mode = | |
591 | (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
592 | memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16); | |
593 | ||
594 | iwl_conf->control_channel = ht_bss_conf->primary_channel; | |
595 | iwl_conf->tx_chan_width = | |
596 | !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH); | |
597 | iwl_conf->ht_protection = | |
598 | ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION; | |
599 | iwl_conf->non_GF_STA_present = | |
600 | !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT); | |
601 | ||
602 | IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel); | |
603 | IWL_DEBUG_MAC80211("leave\n"); | |
604 | } | |
605 | ||
b481de9c ZY |
606 | /* |
607 | * QoS support | |
608 | */ | |
1ff50bda | 609 | static void iwl_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c | 610 | { |
b481de9c ZY |
611 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
612 | return; | |
613 | ||
614 | if (!priv->qos_data.qos_enable) | |
615 | return; | |
616 | ||
b481de9c ZY |
617 | priv->qos_data.def_qos_parm.qos_flags = 0; |
618 | ||
619 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
620 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
621 | priv->qos_data.def_qos_parm.qos_flags |= | |
622 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
623 | if (priv->qos_data.qos_active) |
624 | priv->qos_data.def_qos_parm.qos_flags |= | |
625 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
626 | ||
fd105e79 | 627 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 628 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
f1f1f5c7 | 629 | |
3109ece1 | 630 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
631 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
632 | priv->qos_data.qos_active, | |
633 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 634 | |
1ff50bda EG |
635 | iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM, |
636 | sizeof(struct iwl_qosparam_cmd), | |
637 | &priv->qos_data.def_qos_parm, NULL); | |
b481de9c ZY |
638 | } |
639 | } | |
640 | ||
b481de9c | 641 | #define MAX_UCODE_BEACON_INTERVAL 4096 |
b481de9c | 642 | |
bb8c093b | 643 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
644 | { |
645 | u16 new_val = 0; | |
646 | u16 beacon_factor = 0; | |
647 | ||
648 | beacon_factor = | |
649 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
650 | / MAX_UCODE_BEACON_INTERVAL; | |
651 | new_val = beacon_val / beacon_factor; | |
652 | ||
653 | return cpu_to_le16(new_val); | |
654 | } | |
655 | ||
c79dd5b5 | 656 | static void iwl4965_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c ZY |
657 | { |
658 | u64 interval_tm_unit; | |
659 | u64 tsf, result; | |
660 | unsigned long flags; | |
661 | struct ieee80211_conf *conf = NULL; | |
662 | u16 beacon_int = 0; | |
663 | ||
664 | conf = ieee80211_get_hw_conf(priv->hw); | |
665 | ||
666 | spin_lock_irqsave(&priv->lock, flags); | |
3109ece1 TW |
667 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32); |
668 | priv->rxon_timing.timestamp.dw[0] = | |
669 | cpu_to_le32(priv->timestamp & 0xFFFFFFFF); | |
b481de9c | 670 | |
b5d7be5e | 671 | priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval); |
b481de9c | 672 | |
3109ece1 | 673 | tsf = priv->timestamp; |
b481de9c ZY |
674 | |
675 | beacon_int = priv->beacon_int; | |
676 | spin_unlock_irqrestore(&priv->lock, flags); | |
677 | ||
678 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
679 | if (beacon_int == 0) { | |
680 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
681 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
682 | } else { | |
683 | priv->rxon_timing.beacon_interval = | |
684 | cpu_to_le16(beacon_int); | |
685 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 686 | iwl4965_adjust_beacon_interval( |
b481de9c ZY |
687 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
688 | } | |
689 | ||
690 | priv->rxon_timing.atim_window = 0; | |
691 | } else { | |
692 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 693 | iwl4965_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
694 | /* TODO: we need to get atim_window from upper stack |
695 | * for now we set to 0 */ | |
696 | priv->rxon_timing.atim_window = 0; | |
697 | } | |
698 | ||
699 | interval_tm_unit = | |
700 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
701 | result = do_div(tsf, interval_tm_unit); | |
702 | priv->rxon_timing.beacon_init_val = | |
703 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
704 | ||
705 | IWL_DEBUG_ASSOC | |
706 | ("beacon interval %d beacon timer %d beacon tim %d\n", | |
707 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
708 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
709 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
710 | } | |
711 | ||
82a66bbb TW |
712 | static void iwl_set_flags_for_band(struct iwl_priv *priv, |
713 | enum ieee80211_band band) | |
b481de9c | 714 | { |
8318d78a | 715 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
716 | priv->staging_rxon.flags &= |
717 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
718 | | RXON_FLG_CCK_MSK); | |
719 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
720 | } else { | |
508e32e1 | 721 | /* Copied from iwl4965_post_associate() */ |
b481de9c ZY |
722 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
723 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
724 | else | |
725 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
726 | ||
727 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
728 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
729 | ||
730 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
731 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
732 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
733 | } | |
734 | } | |
735 | ||
736 | /* | |
01ebd063 | 737 | * initialize rxon structure with default values from eeprom |
b481de9c | 738 | */ |
c79dd5b5 | 739 | static void iwl4965_connection_init_rx_config(struct iwl_priv *priv) |
b481de9c | 740 | { |
bf85ea4f | 741 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
742 | |
743 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
744 | ||
745 | switch (priv->iw_mode) { | |
746 | case IEEE80211_IF_TYPE_AP: | |
747 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; | |
748 | break; | |
749 | ||
750 | case IEEE80211_IF_TYPE_STA: | |
751 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; | |
752 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
753 | break; | |
754 | ||
755 | case IEEE80211_IF_TYPE_IBSS: | |
756 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; | |
757 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
758 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
759 | RXON_FILTER_ACCEPT_GRP_MSK; | |
760 | break; | |
761 | ||
762 | case IEEE80211_IF_TYPE_MNTR: | |
763 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; | |
764 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
765 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
766 | break; | |
69dc5d9d TW |
767 | default: |
768 | IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode); | |
769 | break; | |
b481de9c ZY |
770 | } |
771 | ||
772 | #if 0 | |
773 | /* TODO: Figure out when short_preamble would be set and cache from | |
774 | * that */ | |
775 | if (!hw_to_local(priv->hw)->short_preamble) | |
776 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
777 | else | |
778 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
779 | #endif | |
780 | ||
8622e705 | 781 | ch_info = iwl_get_channel_info(priv, priv->band, |
25b3f57c | 782 | le16_to_cpu(priv->active_rxon.channel)); |
b481de9c ZY |
783 | |
784 | if (!ch_info) | |
785 | ch_info = &priv->channel_info[0]; | |
786 | ||
787 | /* | |
788 | * in some case A channels are all non IBSS | |
789 | * in this case force B/G channel | |
790 | */ | |
791 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | |
792 | !(is_channel_ibss(ch_info))) | |
793 | ch_info = &priv->channel_info[0]; | |
794 | ||
795 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 796 | priv->band = ch_info->band; |
b481de9c | 797 | |
82a66bbb | 798 | iwl_set_flags_for_band(priv, priv->band); |
b481de9c ZY |
799 | |
800 | priv->staging_rxon.ofdm_basic_rates = | |
801 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
802 | priv->staging_rxon.cck_basic_rates = | |
803 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
804 | ||
805 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
806 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
807 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
808 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
809 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
810 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
c7de35cd | 811 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
812 | } |
813 | ||
c79dd5b5 | 814 | static int iwl4965_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 815 | { |
b481de9c ZY |
816 | priv->iw_mode = mode; |
817 | ||
bb8c093b | 818 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
819 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
820 | ||
37deb2a0 | 821 | iwl_clear_stations_table(priv); |
b481de9c | 822 | |
fde3571f | 823 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 824 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
825 | return -EAGAIN; |
826 | ||
827 | cancel_delayed_work(&priv->scan_check); | |
2a421b91 | 828 | if (iwl_scan_cancel_timeout(priv, 100)) { |
fde3571f MA |
829 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); |
830 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
831 | return -EAGAIN; | |
832 | } | |
833 | ||
bb8c093b | 834 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
835 | |
836 | return 0; | |
837 | } | |
838 | ||
c79dd5b5 | 839 | static void iwl4965_set_rate(struct iwl_priv *priv) |
b481de9c | 840 | { |
8318d78a | 841 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
842 | struct ieee80211_rate *rate; |
843 | int i; | |
844 | ||
d1141dfb | 845 | hw = iwl_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
846 | if (!hw) { |
847 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
848 | return; | |
849 | } | |
b481de9c ZY |
850 | |
851 | priv->active_rate = 0; | |
852 | priv->active_rate_basic = 0; | |
853 | ||
8318d78a JB |
854 | for (i = 0; i < hw->n_bitrates; i++) { |
855 | rate = &(hw->bitrates[i]); | |
856 | if (rate->hw_value < IWL_RATE_COUNT) | |
857 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
858 | } |
859 | ||
860 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
861 | priv->active_rate, priv->active_rate_basic); | |
862 | ||
863 | /* | |
864 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
865 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
866 | * OFDM | |
867 | */ | |
868 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
869 | priv->staging_rxon.cck_basic_rates = | |
870 | ((priv->active_rate_basic & | |
871 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
872 | else | |
873 | priv->staging_rxon.cck_basic_rates = | |
874 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
875 | ||
876 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
877 | priv->staging_rxon.ofdm_basic_rates = | |
878 | ((priv->active_rate_basic & | |
879 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
880 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
881 | else | |
882 | priv->staging_rxon.ofdm_basic_rates = | |
883 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
884 | } | |
885 | ||
c8b0e6e1 | 886 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
887 | |
888 | #include "iwl-spectrum.h" | |
889 | ||
890 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
891 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
892 | #define TIME_UNIT 1024 | |
893 | ||
894 | /* | |
895 | * extended beacon time format | |
896 | * time in usec will be changed into a 32-bit value in 8:24 format | |
897 | * the high 1 byte is the beacon counts | |
898 | * the lower 3 bytes is the time in usec within one beacon interval | |
899 | */ | |
900 | ||
bb8c093b | 901 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
902 | { |
903 | u32 quot; | |
904 | u32 rem; | |
905 | u32 interval = beacon_interval * 1024; | |
906 | ||
907 | if (!interval || !usec) | |
908 | return 0; | |
909 | ||
910 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
911 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
912 | ||
913 | return (quot << 24) + rem; | |
914 | } | |
915 | ||
916 | /* base is usually what we get from ucode with each received frame, | |
917 | * the same as HW timer counter counting down | |
918 | */ | |
919 | ||
bb8c093b | 920 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
921 | { |
922 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
923 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
924 | u32 interval = beacon_interval * TIME_UNIT; | |
925 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
926 | (addon & BEACON_TIME_MASK_HIGH); | |
927 | ||
928 | if (base_low > addon_low) | |
929 | res += base_low - addon_low; | |
930 | else if (base_low < addon_low) { | |
931 | res += interval + base_low - addon_low; | |
932 | res += (1 << 24); | |
933 | } else | |
934 | res += (1 << 24); | |
935 | ||
936 | return cpu_to_le32(res); | |
937 | } | |
938 | ||
c79dd5b5 | 939 | static int iwl4965_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
940 | struct ieee80211_measurement_params *params, |
941 | u8 type) | |
942 | { | |
bb8c093b | 943 | struct iwl4965_spectrum_cmd spectrum; |
db11d634 | 944 | struct iwl_rx_packet *res; |
857485c0 | 945 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
946 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
947 | .data = (void *)&spectrum, | |
948 | .meta.flags = CMD_WANT_SKB, | |
949 | }; | |
950 | u32 add_time = le64_to_cpu(params->start_time); | |
951 | int rc; | |
952 | int spectrum_resp_status; | |
953 | int duration = le16_to_cpu(params->duration); | |
954 | ||
3109ece1 | 955 | if (iwl_is_associated(priv)) |
b481de9c | 956 | add_time = |
bb8c093b | 957 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
958 | le64_to_cpu(params->start_time) - priv->last_tsf, |
959 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
960 | ||
961 | memset(&spectrum, 0, sizeof(spectrum)); | |
962 | ||
963 | spectrum.channel_count = cpu_to_le16(1); | |
964 | spectrum.flags = | |
965 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
966 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
967 | cmd.len = sizeof(spectrum); | |
968 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
969 | ||
3109ece1 | 970 | if (iwl_is_associated(priv)) |
b481de9c | 971 | spectrum.start_time = |
bb8c093b | 972 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
973 | add_time, |
974 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
975 | else | |
976 | spectrum.start_time = 0; | |
977 | ||
978 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
979 | spectrum.channels[0].channel = params->channel; | |
980 | spectrum.channels[0].type = type; | |
981 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
982 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
983 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
984 | ||
857485c0 | 985 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
986 | if (rc) |
987 | return rc; | |
988 | ||
db11d634 | 989 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
990 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
991 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
992 | rc = -EIO; | |
993 | } | |
994 | ||
995 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
996 | switch (spectrum_resp_status) { | |
997 | case 0: /* Command will be handled */ | |
998 | if (res->u.spectrum.id != 0xff) { | |
999 | IWL_DEBUG_INFO | |
1000 | ("Replaced existing measurement: %d\n", | |
1001 | res->u.spectrum.id); | |
1002 | priv->measurement_status &= ~MEASUREMENT_READY; | |
1003 | } | |
1004 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
1005 | rc = 0; | |
1006 | break; | |
1007 | ||
1008 | case 1: /* Command will not be handled */ | |
1009 | rc = -EAGAIN; | |
1010 | break; | |
1011 | } | |
1012 | ||
1013 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1014 | ||
1015 | return rc; | |
1016 | } | |
1017 | #endif | |
1018 | ||
b481de9c ZY |
1019 | /****************************************************************************** |
1020 | * | |
1021 | * Generic RX handler implementations | |
1022 | * | |
1023 | ******************************************************************************/ | |
885ba202 TW |
1024 | static void iwl_rx_reply_alive(struct iwl_priv *priv, |
1025 | struct iwl_rx_mem_buffer *rxb) | |
b481de9c | 1026 | { |
db11d634 | 1027 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
885ba202 | 1028 | struct iwl_alive_resp *palive; |
b481de9c ZY |
1029 | struct delayed_work *pwork; |
1030 | ||
1031 | palive = &pkt->u.alive_frame; | |
1032 | ||
1033 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
1034 | "0x%01X 0x%01X\n", | |
1035 | palive->is_valid, palive->ver_type, | |
1036 | palive->ver_subtype); | |
1037 | ||
1038 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
1039 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
1040 | memcpy(&priv->card_alive_init, | |
1041 | &pkt->u.alive_frame, | |
885ba202 | 1042 | sizeof(struct iwl_init_alive_resp)); |
b481de9c ZY |
1043 | pwork = &priv->init_alive_start; |
1044 | } else { | |
1045 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
1046 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
885ba202 | 1047 | sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
1048 | pwork = &priv->alive_start; |
1049 | } | |
1050 | ||
1051 | /* We delay the ALIVE response by 5ms to | |
1052 | * give the HW RF Kill time to activate... */ | |
1053 | if (palive->is_valid == UCODE_VALID_OK) | |
1054 | queue_delayed_work(priv->workqueue, pwork, | |
1055 | msecs_to_jiffies(5)); | |
1056 | else | |
1057 | IWL_WARNING("uCode did not respond OK.\n"); | |
1058 | } | |
1059 | ||
c79dd5b5 | 1060 | static void iwl4965_rx_reply_error(struct iwl_priv *priv, |
a55360e4 | 1061 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1062 | { |
db11d634 | 1063 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1064 | |
1065 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
1066 | "seq 0x%04X ser 0x%08X\n", | |
1067 | le32_to_cpu(pkt->u.err_resp.error_type), | |
1068 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
1069 | pkt->u.err_resp.cmd_id, | |
1070 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
1071 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
1072 | } | |
1073 | ||
1074 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1075 | ||
a55360e4 | 1076 | static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1077 | { |
db11d634 | 1078 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
c1adf9fb | 1079 | struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon; |
bb8c093b | 1080 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); |
b481de9c ZY |
1081 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
1082 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
1083 | rxon->channel = csa->channel; | |
1084 | priv->staging_rxon.channel = csa->channel; | |
1085 | } | |
1086 | ||
c79dd5b5 | 1087 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
a55360e4 | 1088 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1089 | { |
c8b0e6e1 | 1090 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
db11d634 | 1091 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1092 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); |
b481de9c ZY |
1093 | |
1094 | if (!report->state) { | |
f3d67999 EK |
1095 | IWL_DEBUG(IWL_DL_11H, |
1096 | "Spectrum Measure Notification: Start\n"); | |
b481de9c ZY |
1097 | return; |
1098 | } | |
1099 | ||
1100 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
1101 | priv->measurement_status |= MEASUREMENT_READY; | |
1102 | #endif | |
1103 | } | |
1104 | ||
c79dd5b5 | 1105 | static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv, |
a55360e4 | 1106 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1107 | { |
0a6857e7 | 1108 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1109 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1110 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); |
b481de9c ZY |
1111 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
1112 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
1113 | #endif | |
1114 | } | |
1115 | ||
c79dd5b5 | 1116 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
a55360e4 | 1117 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1118 | { |
db11d634 | 1119 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1120 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
1121 | "notification for %s:\n", | |
1122 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bf403db8 | 1123 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
1124 | } |
1125 | ||
bb8c093b | 1126 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 1127 | { |
c79dd5b5 TW |
1128 | struct iwl_priv *priv = |
1129 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
1130 | struct sk_buff *beacon; |
1131 | ||
1132 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
e039fa4a | 1133 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
b481de9c ZY |
1134 | |
1135 | if (!beacon) { | |
1136 | IWL_ERROR("update beacon failed\n"); | |
1137 | return; | |
1138 | } | |
1139 | ||
1140 | mutex_lock(&priv->mutex); | |
1141 | /* new beacon skb is allocated every time; dispose previous.*/ | |
1142 | if (priv->ibss_beacon) | |
1143 | dev_kfree_skb(priv->ibss_beacon); | |
1144 | ||
1145 | priv->ibss_beacon = beacon; | |
1146 | mutex_unlock(&priv->mutex); | |
1147 | ||
bb8c093b | 1148 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
1149 | } |
1150 | ||
4e39317d EG |
1151 | /** |
1152 | * iwl4965_bg_statistics_periodic - Timer callback to queue statistics | |
1153 | * | |
1154 | * This callback is provided in order to send a statistics request. | |
1155 | * | |
1156 | * This timer function is continually reset to execute within | |
1157 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
1158 | * was received. We need to ensure we receive the statistics in order | |
1159 | * to update the temperature used for calibrating the TXPOWER. | |
1160 | */ | |
1161 | static void iwl4965_bg_statistics_periodic(unsigned long data) | |
1162 | { | |
1163 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
1164 | ||
1165 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
1166 | return; | |
1167 | ||
1168 | iwl_send_statistics_request(priv, CMD_ASYNC); | |
1169 | } | |
1170 | ||
c79dd5b5 | 1171 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, |
a55360e4 | 1172 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1173 | { |
0a6857e7 | 1174 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1175 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1176 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); |
e7d326ac | 1177 | u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
b481de9c ZY |
1178 | |
1179 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
1180 | "tsf %d %d rate %d\n", | |
25a6572c | 1181 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, |
b481de9c ZY |
1182 | beacon->beacon_notify_hdr.failure_frame, |
1183 | le32_to_cpu(beacon->ibss_mgr_status), | |
1184 | le32_to_cpu(beacon->high_tsf), | |
1185 | le32_to_cpu(beacon->low_tsf), rate); | |
1186 | #endif | |
1187 | ||
1188 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && | |
1189 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) | |
1190 | queue_work(priv->workqueue, &priv->beacon_update); | |
1191 | } | |
1192 | ||
b481de9c ZY |
1193 | /* Handle notification from uCode that card's power state is changing |
1194 | * due to software, hardware, or critical temperature RFKILL */ | |
c79dd5b5 | 1195 | static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, |
a55360e4 | 1196 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1197 | { |
db11d634 | 1198 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1199 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
1200 | unsigned long status = priv->status; | |
1201 | ||
1202 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
1203 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
1204 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
1205 | ||
1206 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
1207 | RF_CARD_DISABLED)) { | |
1208 | ||
3395f6e9 | 1209 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
1210 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
1211 | ||
3395f6e9 TW |
1212 | if (!iwl_grab_nic_access(priv)) { |
1213 | iwl_write_direct32( | |
b481de9c ZY |
1214 | priv, HBUS_TARG_MBX_C, |
1215 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1216 | ||
3395f6e9 | 1217 | iwl_release_nic_access(priv); |
b481de9c ZY |
1218 | } |
1219 | ||
1220 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 1221 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 1222 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
1223 | if (!iwl_grab_nic_access(priv)) { |
1224 | iwl_write_direct32( | |
b481de9c ZY |
1225 | priv, HBUS_TARG_MBX_C, |
1226 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1227 | ||
3395f6e9 | 1228 | iwl_release_nic_access(priv); |
b481de9c ZY |
1229 | } |
1230 | } | |
1231 | ||
1232 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 1233 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 1234 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
1235 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
1236 | if (!iwl_grab_nic_access(priv)) | |
1237 | iwl_release_nic_access(priv); | |
b481de9c ZY |
1238 | } |
1239 | } | |
1240 | ||
1241 | if (flags & HW_CARD_DISABLED) | |
1242 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
1243 | else | |
1244 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
1245 | ||
1246 | ||
1247 | if (flags & SW_CARD_DISABLED) | |
1248 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
1249 | else | |
1250 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
1251 | ||
1252 | if (!(flags & RXON_CARD_DISABLED)) | |
2a421b91 | 1253 | iwl_scan_cancel(priv); |
b481de9c ZY |
1254 | |
1255 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
1256 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
1257 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
1258 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
1259 | queue_work(priv->workqueue, &priv->rf_kill); | |
1260 | else | |
1261 | wake_up_interruptible(&priv->wait_command_queue); | |
1262 | } | |
1263 | ||
e2e3c57b TW |
1264 | int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) |
1265 | { | |
1266 | int ret; | |
1267 | unsigned long flags; | |
1268 | ||
1269 | spin_lock_irqsave(&priv->lock, flags); | |
1270 | ret = iwl_grab_nic_access(priv); | |
1271 | if (ret) | |
1272 | goto err; | |
1273 | ||
1274 | if (src == IWL_PWR_SRC_VAUX) { | |
1275 | u32 val; | |
1276 | ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE, | |
1277 | &val); | |
1278 | ||
1279 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) | |
1280 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1281 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | |
1282 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1283 | } else { | |
1284 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1285 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | |
1286 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1287 | } | |
1288 | ||
1289 | iwl_release_nic_access(priv); | |
1290 | err: | |
1291 | spin_unlock_irqrestore(&priv->lock, flags); | |
1292 | return ret; | |
1293 | } | |
1294 | ||
b481de9c | 1295 | /** |
bb8c093b | 1296 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
1297 | * |
1298 | * Setup the RX handlers for each of the reply types sent from the uCode | |
1299 | * to the host. | |
1300 | * | |
1301 | * This function chains into the hardware specific files for them to setup | |
1302 | * any hardware specific handlers as well. | |
1303 | */ | |
653fa4a0 | 1304 | static void iwl_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 1305 | { |
885ba202 | 1306 | priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive; |
bb8c093b CH |
1307 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; |
1308 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 1309 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
1310 | iwl4965_rx_spectrum_measure_notif; |
1311 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 1312 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
1313 | iwl4965_rx_pm_debug_statistics_notif; |
1314 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 1315 | |
9fbab516 BC |
1316 | /* |
1317 | * The same handler is used for both the REPLY to a discrete | |
1318 | * statistics request from the host as well as for the periodic | |
1319 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 1320 | */ |
8f91aecb EG |
1321 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics; |
1322 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics; | |
2a421b91 TW |
1323 | |
1324 | iwl_setup_rx_scan_handlers(priv); | |
1325 | ||
37a44211 | 1326 | /* status change handler */ |
bb8c093b | 1327 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; |
b481de9c | 1328 | |
c1354754 TW |
1329 | priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] = |
1330 | iwl_rx_missed_beacon_notif; | |
37a44211 | 1331 | /* Rx handlers */ |
1781a07f EG |
1332 | priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy; |
1333 | priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx; | |
653fa4a0 EG |
1334 | /* block ack */ |
1335 | priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba; | |
9fbab516 | 1336 | /* Set up hardware specific Rx handlers */ |
d4789efe | 1337 | priv->cfg->ops->lib->rx_handler_setup(priv); |
b481de9c ZY |
1338 | } |
1339 | ||
5c0eef96 MA |
1340 | /* |
1341 | * this should be called while priv->lock is locked | |
1342 | */ | |
a55360e4 | 1343 | static void __iwl_rx_replenish(struct iwl_priv *priv) |
b481de9c | 1344 | { |
a55360e4 TW |
1345 | iwl_rx_allocate(priv); |
1346 | iwl_rx_queue_restock(priv); | |
b481de9c ZY |
1347 | } |
1348 | ||
b481de9c ZY |
1349 | |
1350 | /** | |
a55360e4 | 1351 | * iwl_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
1352 | * |
1353 | * Uses the priv->rx_handlers callback function array to invoke | |
1354 | * the appropriate handlers, including command responses, | |
1355 | * frame-received notifications, and other notifications. | |
1356 | */ | |
a55360e4 | 1357 | void iwl_rx_handle(struct iwl_priv *priv) |
b481de9c | 1358 | { |
a55360e4 | 1359 | struct iwl_rx_mem_buffer *rxb; |
db11d634 | 1360 | struct iwl_rx_packet *pkt; |
a55360e4 | 1361 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
1362 | u32 r, i; |
1363 | int reclaim; | |
1364 | unsigned long flags; | |
5c0eef96 | 1365 | u8 fill_rx = 0; |
d68ab680 | 1366 | u32 count = 8; |
b481de9c | 1367 | |
6440adb5 CB |
1368 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
1369 | * buffer that the driver may process (last buffer filled by ucode). */ | |
d67f5489 | 1370 | r = priv->cfg->ops->lib->shared_mem_rx_idx(priv); |
b481de9c ZY |
1371 | i = rxq->read; |
1372 | ||
1373 | /* Rx interrupt, but nothing sent from uCode */ | |
1374 | if (i == r) | |
f3d67999 | 1375 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i); |
b481de9c | 1376 | |
a55360e4 | 1377 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 MA |
1378 | fill_rx = 1; |
1379 | ||
b481de9c ZY |
1380 | while (i != r) { |
1381 | rxb = rxq->queue[i]; | |
1382 | ||
9fbab516 | 1383 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
1384 | * then a bug has been introduced in the queue refilling |
1385 | * routines -- catch it here */ | |
1386 | BUG_ON(rxb == NULL); | |
1387 | ||
1388 | rxq->queue[i] = NULL; | |
1389 | ||
1390 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1391 | priv->hw_params.rx_buf_size, |
b481de9c | 1392 | PCI_DMA_FROMDEVICE); |
db11d634 | 1393 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1394 | |
1395 | /* Reclaim a command buffer only if this packet is a response | |
1396 | * to a (driver-originated) command. | |
1397 | * If the packet (e.g. Rx frame) originated from uCode, | |
1398 | * there is no command buffer to reclaim. | |
1399 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
1400 | * but apparently a few don't get set; catch them here. */ | |
1401 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
1402 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 1403 | (pkt->hdr.cmd != REPLY_RX) && |
cfe01709 | 1404 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
1405 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
1406 | (pkt->hdr.cmd != REPLY_TX); | |
1407 | ||
1408 | /* Based on type of command response or notification, | |
1409 | * handle those that need handling via function in | |
bb8c093b | 1410 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c | 1411 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
f3d67999 EK |
1412 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r, |
1413 | i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
b481de9c ZY |
1414 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); |
1415 | } else { | |
1416 | /* No handling needed */ | |
f3d67999 | 1417 | IWL_DEBUG(IWL_DL_RX, |
b481de9c ZY |
1418 | "r %d i %d No handler needed for %s, 0x%02x\n", |
1419 | r, i, get_cmd_string(pkt->hdr.cmd), | |
1420 | pkt->hdr.cmd); | |
1421 | } | |
1422 | ||
1423 | if (reclaim) { | |
9fbab516 | 1424 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 1425 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
1426 | * as we reclaim the driver command queue */ |
1427 | if (rxb && rxb->skb) | |
17b88929 | 1428 | iwl_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
1429 | else |
1430 | IWL_WARNING("Claim null rxb?\n"); | |
1431 | } | |
1432 | ||
1433 | /* For now we just don't re-use anything. We can tweak this | |
1434 | * later to try and re-use notification packets and SKBs that | |
1435 | * fail to Rx correctly */ | |
1436 | if (rxb->skb != NULL) { | |
1437 | priv->alloc_rxb_skb--; | |
1438 | dev_kfree_skb_any(rxb->skb); | |
1439 | rxb->skb = NULL; | |
1440 | } | |
1441 | ||
1442 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1443 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 1444 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
1445 | spin_lock_irqsave(&rxq->lock, flags); |
1446 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
1447 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1448 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
1449 | /* If there are a lot of unused frames, |
1450 | * restock the Rx queue so ucode wont assert. */ | |
1451 | if (fill_rx) { | |
1452 | count++; | |
1453 | if (count >= 8) { | |
1454 | priv->rxq.read = i; | |
a55360e4 | 1455 | __iwl_rx_replenish(priv); |
5c0eef96 MA |
1456 | count = 0; |
1457 | } | |
1458 | } | |
b481de9c ZY |
1459 | } |
1460 | ||
1461 | /* Backtrack one entry */ | |
1462 | priv->rxq.read = i; | |
a55360e4 TW |
1463 | iwl_rx_queue_restock(priv); |
1464 | } | |
a55360e4 | 1465 | |
0a6857e7 | 1466 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1467 | static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv) |
b481de9c | 1468 | { |
c1adf9fb | 1469 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
0795af57 JP |
1470 | DECLARE_MAC_BUF(mac); |
1471 | ||
b481de9c | 1472 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bf403db8 | 1473 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
1474 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
1475 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
1476 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
1477 | le32_to_cpu(rxon->filter_flags)); | |
1478 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
1479 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
1480 | rxon->ofdm_basic_rates); | |
1481 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
0795af57 JP |
1482 | IWL_DEBUG_RADIO("u8[6] node_addr: %s\n", |
1483 | print_mac(mac, rxon->node_addr)); | |
1484 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n", | |
1485 | print_mac(mac, rxon->bssid_addr)); | |
b481de9c ZY |
1486 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
1487 | } | |
1488 | #endif | |
1489 | ||
c79dd5b5 | 1490 | static void iwl4965_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1491 | { |
1492 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
1493 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
3395f6e9 | 1494 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
1495 | } |
1496 | ||
0359facc MA |
1497 | /* call this function to flush any scheduled tasklet */ |
1498 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
1499 | { | |
1500 | /* wait to make sure we flush pedding tasklet*/ | |
1501 | synchronize_irq(priv->pci_dev->irq); | |
1502 | tasklet_kill(&priv->irq_tasklet); | |
1503 | } | |
1504 | ||
c79dd5b5 | 1505 | static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1506 | { |
1507 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
1508 | ||
1509 | /* disable interrupts from uCode/NIC to host */ | |
3395f6e9 | 1510 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
1511 | |
1512 | /* acknowledge/clear/reset any interrupts still pending | |
1513 | * from uCode or flow handler (Rx/Tx DMA) */ | |
3395f6e9 TW |
1514 | iwl_write32(priv, CSR_INT, 0xffffffff); |
1515 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
1516 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
1517 | } | |
1518 | ||
b481de9c | 1519 | |
b481de9c | 1520 | /** |
bb8c093b | 1521 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 1522 | */ |
c79dd5b5 | 1523 | static void iwl4965_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 1524 | { |
bb8c093b | 1525 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
1526 | set_bit(STATUS_FW_ERROR, &priv->status); |
1527 | ||
1528 | /* Cancel currently queued command. */ | |
1529 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
1530 | ||
0a6857e7 | 1531 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1532 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
ede0cba4 | 1533 | iwl_dump_nic_error_log(priv); |
189a2b59 | 1534 | iwl_dump_nic_event_log(priv); |
bf403db8 | 1535 | iwl4965_print_rx_config_cmd(priv); |
b481de9c ZY |
1536 | } |
1537 | #endif | |
1538 | ||
1539 | wake_up_interruptible(&priv->wait_command_queue); | |
1540 | ||
1541 | /* Keep the restart process from trying to send host | |
1542 | * commands by clearing the INIT status bit */ | |
1543 | clear_bit(STATUS_READY, &priv->status); | |
1544 | ||
1545 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
f3d67999 | 1546 | IWL_DEBUG(IWL_DL_FW_ERRORS, |
b481de9c ZY |
1547 | "Restarting adapter due to uCode error.\n"); |
1548 | ||
3109ece1 | 1549 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
1550 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
1551 | sizeof(priv->recovery_rxon)); | |
1552 | priv->error_recovering = 1; | |
1553 | } | |
3a1081e8 EK |
1554 | if (priv->cfg->mod_params->restart_fw) |
1555 | queue_work(priv->workqueue, &priv->restart); | |
b481de9c ZY |
1556 | } |
1557 | } | |
1558 | ||
c79dd5b5 | 1559 | static void iwl4965_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
1560 | { |
1561 | unsigned long flags; | |
1562 | ||
1563 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
1564 | sizeof(priv->staging_rxon)); | |
1565 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 1566 | iwl4965_commit_rxon(priv); |
b481de9c | 1567 | |
4f40e4d9 | 1568 | iwl_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
1569 | |
1570 | spin_lock_irqsave(&priv->lock, flags); | |
1571 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
1572 | priv->error_recovering = 0; | |
1573 | spin_unlock_irqrestore(&priv->lock, flags); | |
1574 | } | |
1575 | ||
c79dd5b5 | 1576 | static void iwl4965_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
1577 | { |
1578 | u32 inta, handled = 0; | |
1579 | u32 inta_fh; | |
1580 | unsigned long flags; | |
0a6857e7 | 1581 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1582 | u32 inta_mask; |
1583 | #endif | |
1584 | ||
1585 | spin_lock_irqsave(&priv->lock, flags); | |
1586 | ||
1587 | /* Ack/clear/reset pending uCode interrupts. | |
1588 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
1589 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
1590 | inta = iwl_read32(priv, CSR_INT); |
1591 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
1592 | |
1593 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
1594 | * Any new interrupts that happen after this, either while we're | |
1595 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
1596 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
1597 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 1598 | |
0a6857e7 | 1599 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1600 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 1601 | /* just for debug */ |
3395f6e9 | 1602 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
1603 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
1604 | inta, inta_mask, inta_fh); | |
1605 | } | |
1606 | #endif | |
1607 | ||
1608 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
1609 | * atomic, make sure that inta covers all the interrupts that | |
1610 | * we've discovered, even if FH interrupt came in just after | |
1611 | * reading CSR_INT. */ | |
6f83eaa1 | 1612 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 1613 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 1614 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
1615 | inta |= CSR_INT_BIT_FH_TX; |
1616 | ||
1617 | /* Now service all interrupt bits discovered above. */ | |
1618 | if (inta & CSR_INT_BIT_HW_ERR) { | |
1619 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
1620 | ||
1621 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 1622 | iwl4965_disable_interrupts(priv); |
b481de9c | 1623 | |
bb8c093b | 1624 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1625 | |
1626 | handled |= CSR_INT_BIT_HW_ERR; | |
1627 | ||
1628 | spin_unlock_irqrestore(&priv->lock, flags); | |
1629 | ||
1630 | return; | |
1631 | } | |
1632 | ||
0a6857e7 | 1633 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1634 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 1635 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
1636 | if (inta & CSR_INT_BIT_SCD) |
1637 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
1638 | "the frame/frames.\n"); | |
b481de9c ZY |
1639 | |
1640 | /* Alive notification via Rx interrupt will do the real work */ | |
1641 | if (inta & CSR_INT_BIT_ALIVE) | |
1642 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
1643 | } | |
1644 | #endif | |
1645 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 1646 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 1647 | |
9fbab516 | 1648 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
1649 | if (inta & CSR_INT_BIT_RF_KILL) { |
1650 | int hw_rf_kill = 0; | |
3395f6e9 | 1651 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
1652 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
1653 | hw_rf_kill = 1; | |
1654 | ||
f3d67999 | 1655 | IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n", |
b481de9c ZY |
1656 | hw_rf_kill ? "disable radio":"enable radio"); |
1657 | ||
a9efa652 EG |
1658 | /* driver only loads ucode once setting the interface up. |
1659 | * the driver as well won't allow loading if RFKILL is set | |
1660 | * therefore no need to restart the driver from this handler | |
1661 | */ | |
1662 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) | |
53e49093 | 1663 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
b481de9c ZY |
1664 | |
1665 | handled |= CSR_INT_BIT_RF_KILL; | |
1666 | } | |
1667 | ||
9fbab516 | 1668 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
1669 | if (inta & CSR_INT_BIT_CT_KILL) { |
1670 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
1671 | handled |= CSR_INT_BIT_CT_KILL; | |
1672 | } | |
1673 | ||
1674 | /* Error detected by uCode */ | |
1675 | if (inta & CSR_INT_BIT_SW_ERR) { | |
1676 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
1677 | inta); | |
bb8c093b | 1678 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1679 | handled |= CSR_INT_BIT_SW_ERR; |
1680 | } | |
1681 | ||
1682 | /* uCode wakes up after power-down sleep */ | |
1683 | if (inta & CSR_INT_BIT_WAKEUP) { | |
1684 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
a55360e4 | 1685 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
babcebfa TW |
1686 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
1687 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); | |
1688 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); | |
1689 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); | |
1690 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); | |
1691 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
1692 | |
1693 | handled |= CSR_INT_BIT_WAKEUP; | |
1694 | } | |
1695 | ||
1696 | /* All uCode command responses, including Tx command responses, | |
1697 | * Rx "responses" (frame-received notification), and other | |
1698 | * notifications from uCode come through here*/ | |
1699 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
a55360e4 | 1700 | iwl_rx_handle(priv); |
b481de9c ZY |
1701 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
1702 | } | |
1703 | ||
1704 | if (inta & CSR_INT_BIT_FH_TX) { | |
1705 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
1706 | handled |= CSR_INT_BIT_FH_TX; | |
dbb983b7 RR |
1707 | /* FH finished to write, send event */ |
1708 | priv->ucode_write_complete = 1; | |
1709 | wake_up_interruptible(&priv->wait_command_queue); | |
b481de9c ZY |
1710 | } |
1711 | ||
1712 | if (inta & ~handled) | |
1713 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
1714 | ||
1715 | if (inta & ~CSR_INI_SET_MASK) { | |
1716 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
1717 | inta & ~CSR_INI_SET_MASK); | |
1718 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
1719 | } | |
1720 | ||
1721 | /* Re-enable all interrupts */ | |
0359facc MA |
1722 | /* only Re-enable if diabled by irq */ |
1723 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1724 | iwl4965_enable_interrupts(priv); | |
b481de9c | 1725 | |
0a6857e7 | 1726 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1727 | if (priv->debug_level & (IWL_DL_ISR)) { |
3395f6e9 TW |
1728 | inta = iwl_read32(priv, CSR_INT); |
1729 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
1730 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1731 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
1732 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
1733 | } | |
1734 | #endif | |
1735 | spin_unlock_irqrestore(&priv->lock, flags); | |
1736 | } | |
1737 | ||
bb8c093b | 1738 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 1739 | { |
c79dd5b5 | 1740 | struct iwl_priv *priv = data; |
b481de9c ZY |
1741 | u32 inta, inta_mask; |
1742 | u32 inta_fh; | |
1743 | if (!priv) | |
1744 | return IRQ_NONE; | |
1745 | ||
1746 | spin_lock(&priv->lock); | |
1747 | ||
1748 | /* Disable (but don't clear!) interrupts here to avoid | |
1749 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
1750 | * If we have something to service, the tasklet will re-enable ints. | |
1751 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
1752 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
1753 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
1754 | |
1755 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
1756 | inta = iwl_read32(priv, CSR_INT); |
1757 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1758 | |
1759 | /* Ignore interrupt if there's nothing in NIC to service. | |
1760 | * This may be due to IRQ shared with another device, | |
1761 | * or due to sporadic interrupts thrown from our NIC. */ | |
1762 | if (!inta && !inta_fh) { | |
1763 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
1764 | goto none; | |
1765 | } | |
1766 | ||
1767 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
1768 | /* Hardware disappeared. It might have already raised |
1769 | * an interrupt */ | |
b481de9c | 1770 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 1771 | goto unplugged; |
b481de9c ZY |
1772 | } |
1773 | ||
1774 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
1775 | inta, inta_mask, inta_fh); | |
1776 | ||
25c03d8e JP |
1777 | inta &= ~CSR_INT_BIT_SCD; |
1778 | ||
bb8c093b | 1779 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
1780 | if (likely(inta || inta_fh)) |
1781 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 1782 | |
66fbb541 ON |
1783 | unplugged: |
1784 | spin_unlock(&priv->lock); | |
b481de9c ZY |
1785 | return IRQ_HANDLED; |
1786 | ||
1787 | none: | |
1788 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
1789 | /* only Re-enable if diabled by irq */ |
1790 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1791 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
1792 | spin_unlock(&priv->lock); |
1793 | return IRQ_NONE; | |
1794 | } | |
1795 | ||
b481de9c ZY |
1796 | /****************************************************************************** |
1797 | * | |
1798 | * uCode download functions | |
1799 | * | |
1800 | ******************************************************************************/ | |
1801 | ||
c79dd5b5 | 1802 | static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 1803 | { |
98c92211 TW |
1804 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
1805 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
1806 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
1807 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
1808 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
1809 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
1810 | } |
1811 | ||
edcdf8b2 RR |
1812 | static void iwl4965_nic_start(struct iwl_priv *priv) |
1813 | { | |
1814 | /* Remove all resets to allow NIC to operate */ | |
1815 | iwl_write32(priv, CSR_RESET, 0); | |
1816 | } | |
1817 | ||
1818 | ||
b481de9c | 1819 | /** |
bb8c093b | 1820 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
1821 | * |
1822 | * Copy into buffers for card to fetch via bus-mastering | |
1823 | */ | |
c79dd5b5 | 1824 | static int iwl4965_read_ucode(struct iwl_priv *priv) |
b481de9c | 1825 | { |
14b3d338 | 1826 | struct iwl_ucode *ucode; |
90e759d1 | 1827 | int ret; |
b481de9c | 1828 | const struct firmware *ucode_raw; |
4bf775cd | 1829 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
1830 | u8 *src; |
1831 | size_t len; | |
1832 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
1833 | ||
1834 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
1835 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
1836 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
1837 | if (ret < 0) { | |
1838 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
1839 | name, ret); | |
b481de9c ZY |
1840 | goto error; |
1841 | } | |
1842 | ||
1843 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
1844 | name, ucode_raw->size); | |
1845 | ||
1846 | /* Make sure that we got at least our header! */ | |
1847 | if (ucode_raw->size < sizeof(*ucode)) { | |
1848 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 1849 | ret = -EINVAL; |
b481de9c ZY |
1850 | goto err_release; |
1851 | } | |
1852 | ||
1853 | /* Data from ucode file: header followed by uCode images */ | |
1854 | ucode = (void *)ucode_raw->data; | |
1855 | ||
1856 | ver = le32_to_cpu(ucode->ver); | |
1857 | inst_size = le32_to_cpu(ucode->inst_size); | |
1858 | data_size = le32_to_cpu(ucode->data_size); | |
1859 | init_size = le32_to_cpu(ucode->init_size); | |
1860 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
1861 | boot_size = le32_to_cpu(ucode->boot_size); | |
1862 | ||
1863 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
1864 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
1865 | inst_size); | |
1866 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
1867 | data_size); | |
1868 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
1869 | init_size); | |
1870 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
1871 | init_data_size); | |
1872 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
1873 | boot_size); | |
1874 | ||
1875 | /* Verify size of file vs. image size info in file's header */ | |
1876 | if (ucode_raw->size < sizeof(*ucode) + | |
1877 | inst_size + data_size + init_size + | |
1878 | init_data_size + boot_size) { | |
1879 | ||
1880 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
1881 | (int)ucode_raw->size); | |
90e759d1 | 1882 | ret = -EINVAL; |
b481de9c ZY |
1883 | goto err_release; |
1884 | } | |
1885 | ||
1886 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 1887 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
1888 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
1889 | inst_size); | |
1890 | ret = -EINVAL; | |
b481de9c ZY |
1891 | goto err_release; |
1892 | } | |
1893 | ||
099b40b7 | 1894 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
1895 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
1896 | data_size); | |
1897 | ret = -EINVAL; | |
b481de9c ZY |
1898 | goto err_release; |
1899 | } | |
099b40b7 | 1900 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 1901 | IWL_DEBUG_INFO |
90e759d1 TW |
1902 | ("uCode init instr len %d too large to fit in\n", |
1903 | init_size); | |
1904 | ret = -EINVAL; | |
b481de9c ZY |
1905 | goto err_release; |
1906 | } | |
099b40b7 | 1907 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 1908 | IWL_DEBUG_INFO |
90e759d1 TW |
1909 | ("uCode init data len %d too large to fit in\n", |
1910 | init_data_size); | |
1911 | ret = -EINVAL; | |
b481de9c ZY |
1912 | goto err_release; |
1913 | } | |
099b40b7 | 1914 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 1915 | IWL_DEBUG_INFO |
90e759d1 TW |
1916 | ("uCode boot instr len %d too large to fit in\n", |
1917 | boot_size); | |
1918 | ret = -EINVAL; | |
b481de9c ZY |
1919 | goto err_release; |
1920 | } | |
1921 | ||
1922 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
1923 | ||
1924 | /* Runtime instructions and 2 copies of data: | |
1925 | * 1) unmodified from disk | |
1926 | * 2) backup cache for save/restore during power-downs */ | |
1927 | priv->ucode_code.len = inst_size; | |
98c92211 | 1928 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
1929 | |
1930 | priv->ucode_data.len = data_size; | |
98c92211 | 1931 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
1932 | |
1933 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 1934 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
1935 | |
1936 | /* Initialization instructions and data */ | |
90e759d1 TW |
1937 | if (init_size && init_data_size) { |
1938 | priv->ucode_init.len = init_size; | |
98c92211 | 1939 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
1940 | |
1941 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 1942 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
1943 | |
1944 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
1945 | goto err_pci_alloc; | |
1946 | } | |
b481de9c ZY |
1947 | |
1948 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
1949 | if (boot_size) { |
1950 | priv->ucode_boot.len = boot_size; | |
98c92211 | 1951 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 1952 | |
90e759d1 TW |
1953 | if (!priv->ucode_boot.v_addr) |
1954 | goto err_pci_alloc; | |
1955 | } | |
b481de9c ZY |
1956 | |
1957 | /* Copy images into buffers for card's bus-master reads ... */ | |
1958 | ||
1959 | /* Runtime instructions (first block of data in file) */ | |
1960 | src = &ucode->data[0]; | |
1961 | len = priv->ucode_code.len; | |
90e759d1 | 1962 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
1963 | memcpy(priv->ucode_code.v_addr, src, len); |
1964 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
1965 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
1966 | ||
1967 | /* Runtime data (2nd block) | |
bb8c093b | 1968 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
1969 | src = &ucode->data[inst_size]; |
1970 | len = priv->ucode_data.len; | |
90e759d1 | 1971 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
1972 | memcpy(priv->ucode_data.v_addr, src, len); |
1973 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
1974 | ||
1975 | /* Initialization instructions (3rd block) */ | |
1976 | if (init_size) { | |
1977 | src = &ucode->data[inst_size + data_size]; | |
1978 | len = priv->ucode_init.len; | |
90e759d1 TW |
1979 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
1980 | len); | |
b481de9c ZY |
1981 | memcpy(priv->ucode_init.v_addr, src, len); |
1982 | } | |
1983 | ||
1984 | /* Initialization data (4th block) */ | |
1985 | if (init_data_size) { | |
1986 | src = &ucode->data[inst_size + data_size + init_size]; | |
1987 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
1988 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
1989 | len); | |
b481de9c ZY |
1990 | memcpy(priv->ucode_init_data.v_addr, src, len); |
1991 | } | |
1992 | ||
1993 | /* Bootstrap instructions (5th block) */ | |
1994 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
1995 | len = priv->ucode_boot.len; | |
90e759d1 | 1996 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
1997 | memcpy(priv->ucode_boot.v_addr, src, len); |
1998 | ||
1999 | /* We have our copies now, allow OS release its copies */ | |
2000 | release_firmware(ucode_raw); | |
2001 | return 0; | |
2002 | ||
2003 | err_pci_alloc: | |
2004 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 2005 | ret = -ENOMEM; |
bb8c093b | 2006 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
2007 | |
2008 | err_release: | |
2009 | release_firmware(ucode_raw); | |
2010 | ||
2011 | error: | |
90e759d1 | 2012 | return ret; |
b481de9c ZY |
2013 | } |
2014 | ||
b481de9c | 2015 | /** |
4a4a9e81 | 2016 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 2017 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 2018 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 2019 | */ |
4a4a9e81 | 2020 | static void iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 2021 | { |
57aab75a | 2022 | int ret = 0; |
b481de9c ZY |
2023 | |
2024 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
2025 | ||
2026 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
2027 | /* We had an error bringing up the hardware, so take it | |
2028 | * all the way back down so we can try again */ | |
2029 | IWL_DEBUG_INFO("Alive failed.\n"); | |
2030 | goto restart; | |
2031 | } | |
2032 | ||
2033 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
2034 | * This is a paranoid check, because we would not have gotten the | |
2035 | * "runtime" alive if code weren't properly loaded. */ | |
b0692f2f | 2036 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
2037 | /* Runtime instruction load was bad; |
2038 | * take it all the way back down so we can try again */ | |
2039 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
2040 | goto restart; | |
2041 | } | |
2042 | ||
37deb2a0 | 2043 | iwl_clear_stations_table(priv); |
57aab75a TW |
2044 | ret = priv->cfg->ops->lib->alive_notify(priv); |
2045 | if (ret) { | |
b481de9c | 2046 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 2047 | ret); |
b481de9c ZY |
2048 | goto restart; |
2049 | } | |
2050 | ||
9fbab516 | 2051 | /* After the ALIVE response, we can send host commands to 4965 uCode */ |
b481de9c ZY |
2052 | set_bit(STATUS_ALIVE, &priv->status); |
2053 | ||
fee1247a | 2054 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
2055 | return; |
2056 | ||
36d6825b | 2057 | ieee80211_wake_queues(priv->hw); |
b481de9c ZY |
2058 | |
2059 | priv->active_rate = priv->rates_mask; | |
2060 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
2061 | ||
3109ece1 | 2062 | if (iwl_is_associated(priv)) { |
c1adf9fb GG |
2063 | struct iwl_rxon_cmd *active_rxon = |
2064 | (struct iwl_rxon_cmd *)&priv->active_rxon; | |
b481de9c ZY |
2065 | |
2066 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
2067 | sizeof(priv->staging_rxon)); | |
2068 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
2069 | } else { | |
2070 | /* Initialize our rx_config data */ | |
bb8c093b | 2071 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
2072 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
2073 | } | |
2074 | ||
9fbab516 | 2075 | /* Configure Bluetooth device coexistence support */ |
bb8c093b | 2076 | iwl4965_send_bt_config(priv); |
b481de9c | 2077 | |
4a4a9e81 TW |
2078 | iwl_reset_run_time_calib(priv); |
2079 | ||
b481de9c | 2080 | /* Configure the adapter for unassociated operation */ |
bb8c093b | 2081 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2082 | |
2083 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 2084 | iwl_rf_kill_ct_config(priv); |
5a66926a | 2085 | |
fe00b5a5 RC |
2086 | iwl_leds_register(priv); |
2087 | ||
b481de9c | 2088 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 2089 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 2090 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
2091 | |
2092 | if (priv->error_recovering) | |
bb8c093b | 2093 | iwl4965_error_recovery(priv); |
b481de9c | 2094 | |
58d0f361 | 2095 | iwl_power_update_mode(priv, 1); |
84363e6e | 2096 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); |
c46fbefa AK |
2097 | |
2098 | if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status)) | |
2099 | iwl4965_set_mode(priv, priv->iw_mode); | |
2100 | ||
b481de9c ZY |
2101 | return; |
2102 | ||
2103 | restart: | |
2104 | queue_work(priv->workqueue, &priv->restart); | |
2105 | } | |
2106 | ||
4e39317d | 2107 | static void iwl_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 2108 | |
c79dd5b5 | 2109 | static void __iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2110 | { |
2111 | unsigned long flags; | |
2112 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
b481de9c ZY |
2113 | |
2114 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
2115 | ||
b481de9c ZY |
2116 | if (!exit_pending) |
2117 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
2118 | ||
ab53d8af MA |
2119 | iwl_leds_unregister(priv); |
2120 | ||
37deb2a0 | 2121 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2122 | |
2123 | /* Unblock any waiting calls */ | |
2124 | wake_up_interruptible_all(&priv->wait_command_queue); | |
2125 | ||
b481de9c ZY |
2126 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
2127 | * exiting the module */ | |
2128 | if (!exit_pending) | |
2129 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
2130 | ||
2131 | /* stop and reset the on-board processor */ | |
3395f6e9 | 2132 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
2133 | |
2134 | /* tell the device to stop sending interrupts */ | |
0359facc | 2135 | spin_lock_irqsave(&priv->lock, flags); |
bb8c093b | 2136 | iwl4965_disable_interrupts(priv); |
0359facc MA |
2137 | spin_unlock_irqrestore(&priv->lock, flags); |
2138 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
2139 | |
2140 | if (priv->mac80211_registered) | |
2141 | ieee80211_stop_queues(priv->hw); | |
2142 | ||
bb8c093b | 2143 | /* If we have not previously called iwl4965_init() then |
b481de9c | 2144 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 2145 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
2146 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
2147 | STATUS_RF_KILL_HW | | |
2148 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2149 | STATUS_RF_KILL_SW | | |
9788864e RC |
2150 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2151 | STATUS_GEO_CONFIGURED | | |
b481de9c | 2152 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
052ec3f1 MA |
2153 | STATUS_IN_SUSPEND | |
2154 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
2155 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
2156 | goto exit; |
2157 | } | |
2158 | ||
2159 | /* ...otherwise clear out all the status bits but the RF Kill and | |
2160 | * SUSPEND bits and continue taking the NIC down. */ | |
2161 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
2162 | STATUS_RF_KILL_HW | | |
2163 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2164 | STATUS_RF_KILL_SW | | |
9788864e RC |
2165 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2166 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
2167 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
2168 | STATUS_IN_SUSPEND | | |
2169 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
052ec3f1 MA |
2170 | STATUS_FW_ERROR | |
2171 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
2172 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
2173 | |
2174 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2175 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 2176 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
2177 | spin_unlock_irqrestore(&priv->lock, flags); |
2178 | ||
da1bc453 | 2179 | iwl_txq_ctx_stop(priv); |
b3bbacb7 | 2180 | iwl_rxq_stop(priv); |
b481de9c ZY |
2181 | |
2182 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
2183 | if (!iwl_grab_nic_access(priv)) { |
2184 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 2185 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 2186 | iwl_release_nic_access(priv); |
b481de9c ZY |
2187 | } |
2188 | spin_unlock_irqrestore(&priv->lock, flags); | |
2189 | ||
2190 | udelay(5); | |
2191 | ||
7f066108 TW |
2192 | /* FIXME: apm_ops.suspend(priv) */ |
2193 | priv->cfg->ops->lib->apm_ops.reset(priv); | |
399f4900 | 2194 | priv->cfg->ops->lib->free_shared_mem(priv); |
b481de9c ZY |
2195 | |
2196 | exit: | |
885ba202 | 2197 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
2198 | |
2199 | if (priv->ibss_beacon) | |
2200 | dev_kfree_skb(priv->ibss_beacon); | |
2201 | priv->ibss_beacon = NULL; | |
2202 | ||
2203 | /* clear out any free frames */ | |
fcab423d | 2204 | iwl_clear_free_frames(priv); |
b481de9c ZY |
2205 | } |
2206 | ||
c79dd5b5 | 2207 | static void iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2208 | { |
2209 | mutex_lock(&priv->mutex); | |
bb8c093b | 2210 | __iwl4965_down(priv); |
b481de9c | 2211 | mutex_unlock(&priv->mutex); |
b24d22b1 | 2212 | |
4e39317d | 2213 | iwl_cancel_deferred_work(priv); |
b481de9c ZY |
2214 | } |
2215 | ||
2216 | #define MAX_HW_RESTARTS 5 | |
2217 | ||
c79dd5b5 | 2218 | static int __iwl4965_up(struct iwl_priv *priv) |
b481de9c | 2219 | { |
57aab75a TW |
2220 | int i; |
2221 | int ret; | |
b481de9c ZY |
2222 | |
2223 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
2224 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
2225 | return -EIO; | |
2226 | } | |
2227 | ||
e903fbd4 RC |
2228 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
2229 | IWL_ERROR("ucode not available for device bringup\n"); | |
2230 | return -EIO; | |
2231 | } | |
2232 | ||
e655b9f0 | 2233 | /* If platform's RF_KILL switch is NOT set to KILL */ |
3395f6e9 | 2234 | if (iwl_read32(priv, CSR_GP_CNTRL) & |
e655b9f0 ZY |
2235 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
2236 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
3bff19c2 | 2237 | else |
e655b9f0 | 2238 | set_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 EG |
2239 | |
2240 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status) && | |
2241 | iwl_is_rfkill(priv)) { | |
3bff19c2 EG |
2242 | IWL_WARNING("Radio disabled by %s RF Kill switch\n", |
2243 | test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW"); | |
2244 | return -ENODEV; | |
b481de9c ZY |
2245 | } |
2246 | ||
3395f6e9 | 2247 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 2248 | |
399f4900 RR |
2249 | ret = priv->cfg->ops->lib->alloc_shared_mem(priv); |
2250 | if (ret) { | |
2251 | IWL_ERROR("Unable to allocate shared memory\n"); | |
2252 | return ret; | |
2253 | } | |
2254 | ||
1053d35f | 2255 | ret = iwl_hw_nic_init(priv); |
57aab75a TW |
2256 | if (ret) { |
2257 | IWL_ERROR("Unable to init nic\n"); | |
2258 | return ret; | |
b481de9c ZY |
2259 | } |
2260 | ||
2261 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2262 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2263 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
2264 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
2265 | ||
2266 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 2267 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
bb8c093b | 2268 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
2269 | |
2270 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2271 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2272 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
2273 | |
2274 | /* Copy original ucode data image from disk into backup cache. | |
2275 | * This will be used to initialize the on-board processor's | |
2276 | * data SRAM for a clean start when the runtime program first loads. */ | |
2277 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 2278 | priv->ucode_data.len); |
b481de9c | 2279 | |
e655b9f0 | 2280 | /* We return success when we resume from suspend and rf_kill is on. */ |
64e72c3e MA |
2281 | if (test_bit(STATUS_RF_KILL_HW, &priv->status) || |
2282 | test_bit(STATUS_RF_KILL_SW, &priv->status)) | |
b481de9c | 2283 | return 0; |
b481de9c ZY |
2284 | |
2285 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | |
2286 | ||
37deb2a0 | 2287 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2288 | |
2289 | /* load bootstrap state machine, | |
2290 | * load bootstrap program into processor's memory, | |
2291 | * prepare to load the "initialize" uCode */ | |
57aab75a | 2292 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 2293 | |
57aab75a TW |
2294 | if (ret) { |
2295 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
2296 | continue; |
2297 | } | |
2298 | ||
f3d5b45b EG |
2299 | /* Clear out the uCode error bit if it is set */ |
2300 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
2301 | ||
b481de9c | 2302 | /* start card; "initialize" will load runtime ucode */ |
edcdf8b2 | 2303 | iwl4965_nic_start(priv); |
b481de9c | 2304 | |
b481de9c ZY |
2305 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
2306 | ||
2307 | return 0; | |
2308 | } | |
2309 | ||
2310 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 2311 | __iwl4965_down(priv); |
64e72c3e | 2312 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c ZY |
2313 | |
2314 | /* tried to restart and config the device for as long as our | |
2315 | * patience could withstand */ | |
2316 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
2317 | return -EIO; | |
2318 | } | |
2319 | ||
2320 | ||
2321 | /***************************************************************************** | |
2322 | * | |
2323 | * Workqueue callbacks | |
2324 | * | |
2325 | *****************************************************************************/ | |
2326 | ||
4a4a9e81 | 2327 | static void iwl_bg_init_alive_start(struct work_struct *data) |
b481de9c | 2328 | { |
c79dd5b5 TW |
2329 | struct iwl_priv *priv = |
2330 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
2331 | |
2332 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2333 | return; | |
2334 | ||
2335 | mutex_lock(&priv->mutex); | |
f3ccc08c | 2336 | priv->cfg->ops->lib->init_alive_start(priv); |
b481de9c ZY |
2337 | mutex_unlock(&priv->mutex); |
2338 | } | |
2339 | ||
4a4a9e81 | 2340 | static void iwl_bg_alive_start(struct work_struct *data) |
b481de9c | 2341 | { |
c79dd5b5 TW |
2342 | struct iwl_priv *priv = |
2343 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
2344 | |
2345 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2346 | return; | |
2347 | ||
2348 | mutex_lock(&priv->mutex); | |
4a4a9e81 | 2349 | iwl_alive_start(priv); |
b481de9c ZY |
2350 | mutex_unlock(&priv->mutex); |
2351 | } | |
2352 | ||
bb8c093b | 2353 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 2354 | { |
c79dd5b5 | 2355 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
2356 | |
2357 | wake_up_interruptible(&priv->wait_command_queue); | |
2358 | ||
2359 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2360 | return; | |
2361 | ||
2362 | mutex_lock(&priv->mutex); | |
2363 | ||
fee1247a | 2364 | if (!iwl_is_rfkill(priv)) { |
f3d67999 | 2365 | IWL_DEBUG(IWL_DL_RF_KILL, |
b481de9c ZY |
2366 | "HW and/or SW RF Kill no longer active, restarting " |
2367 | "device\n"); | |
2368 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2369 | queue_work(priv->workqueue, &priv->restart); | |
2370 | } else { | |
ad97edd2 MA |
2371 | /* make sure mac80211 stop sending Tx frame */ |
2372 | if (priv->mac80211_registered) | |
2373 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2374 | |
2375 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
2376 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2377 | "disabled by SW switch\n"); | |
2378 | else | |
2379 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
2380 | "Kill switch must be turned off for " | |
2381 | "wireless networking to work.\n"); | |
2382 | } | |
2383 | mutex_unlock(&priv->mutex); | |
80fcc9e2 | 2384 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2385 | } |
2386 | ||
4419e39b AK |
2387 | static void iwl4965_bg_set_monitor(struct work_struct *work) |
2388 | { | |
2389 | struct iwl_priv *priv = container_of(work, | |
2390 | struct iwl_priv, set_monitor); | |
c46fbefa | 2391 | int ret; |
4419e39b AK |
2392 | |
2393 | IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n"); | |
2394 | ||
2395 | mutex_lock(&priv->mutex); | |
2396 | ||
c46fbefa AK |
2397 | ret = iwl4965_set_mode(priv, IEEE80211_IF_TYPE_MNTR); |
2398 | ||
2399 | if (ret) { | |
2400 | if (ret == -EAGAIN) | |
2401 | IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n"); | |
2402 | else | |
2403 | IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret); | |
2404 | } | |
4419e39b AK |
2405 | |
2406 | mutex_unlock(&priv->mutex); | |
2407 | } | |
2408 | ||
16e727e8 EG |
2409 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
2410 | { | |
2411 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
2412 | run_time_calib_work); | |
2413 | ||
2414 | mutex_lock(&priv->mutex); | |
2415 | ||
2416 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | |
2417 | test_bit(STATUS_SCANNING, &priv->status)) { | |
2418 | mutex_unlock(&priv->mutex); | |
2419 | return; | |
2420 | } | |
2421 | ||
2422 | if (priv->start_calib) { | |
2423 | iwl_chain_noise_calibration(priv, &priv->statistics); | |
2424 | ||
2425 | iwl_sensitivity_calibration(priv, &priv->statistics); | |
2426 | } | |
2427 | ||
2428 | mutex_unlock(&priv->mutex); | |
2429 | return; | |
2430 | } | |
2431 | ||
bb8c093b | 2432 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 2433 | { |
c79dd5b5 | 2434 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
2435 | |
2436 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2437 | return; | |
2438 | ||
2439 | mutex_lock(&priv->mutex); | |
bb8c093b | 2440 | __iwl4965_up(priv); |
b481de9c | 2441 | mutex_unlock(&priv->mutex); |
80fcc9e2 | 2442 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2443 | } |
2444 | ||
bb8c093b | 2445 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 2446 | { |
c79dd5b5 | 2447 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
2448 | |
2449 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2450 | return; | |
2451 | ||
bb8c093b | 2452 | iwl4965_down(priv); |
b481de9c ZY |
2453 | queue_work(priv->workqueue, &priv->up); |
2454 | } | |
2455 | ||
bb8c093b | 2456 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 2457 | { |
c79dd5b5 TW |
2458 | struct iwl_priv *priv = |
2459 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
2460 | |
2461 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2462 | return; | |
2463 | ||
2464 | mutex_lock(&priv->mutex); | |
a55360e4 | 2465 | iwl_rx_replenish(priv); |
b481de9c ZY |
2466 | mutex_unlock(&priv->mutex); |
2467 | } | |
2468 | ||
7878a5a4 MA |
2469 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
2470 | ||
508e32e1 | 2471 | static void iwl4965_post_associate(struct iwl_priv *priv) |
b481de9c | 2472 | { |
b481de9c | 2473 | struct ieee80211_conf *conf = NULL; |
857485c0 | 2474 | int ret = 0; |
0795af57 | 2475 | DECLARE_MAC_BUF(mac); |
1ff50bda | 2476 | unsigned long flags; |
b481de9c ZY |
2477 | |
2478 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
2479 | IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__); | |
2480 | return; | |
2481 | } | |
2482 | ||
0795af57 JP |
2483 | IWL_DEBUG_ASSOC("Associated as %d to: %s\n", |
2484 | priv->assoc_id, | |
2485 | print_mac(mac, priv->active_rxon.bssid_addr)); | |
b481de9c ZY |
2486 | |
2487 | ||
2488 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2489 | return; | |
2490 | ||
b481de9c | 2491 | |
508e32e1 | 2492 | if (!priv->vif || !priv->is_open) |
948c171c | 2493 | return; |
508e32e1 | 2494 | |
2a421b91 | 2495 | iwl_scan_cancel_timeout(priv, 200); |
052c4b9f | 2496 | |
b481de9c ZY |
2497 | conf = ieee80211_get_hw_conf(priv->hw); |
2498 | ||
2499 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2500 | iwl4965_commit_rxon(priv); |
b481de9c | 2501 | |
bb8c093b CH |
2502 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
2503 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 2504 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2505 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2506 | if (ret) |
b481de9c ZY |
2507 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2508 | "Attempting to continue.\n"); | |
2509 | ||
2510 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
2511 | ||
fd105e79 | 2512 | if (priv->current_ht_config.is_ht) |
47c5196e | 2513 | iwl_set_rxon_ht(priv, &priv->current_ht_config); |
4f85f5b3 | 2514 | |
c7de35cd | 2515 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2516 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
2517 | ||
2518 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
2519 | priv->assoc_id, priv->beacon_int); | |
2520 | ||
2521 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2522 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
2523 | else | |
2524 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2525 | ||
2526 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2527 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2528 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2529 | else | |
2530 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2531 | ||
2532 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2533 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2534 | ||
2535 | } | |
2536 | ||
bb8c093b | 2537 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2538 | |
2539 | switch (priv->iw_mode) { | |
2540 | case IEEE80211_IF_TYPE_STA: | |
b481de9c ZY |
2541 | break; |
2542 | ||
2543 | case IEEE80211_IF_TYPE_IBSS: | |
2544 | ||
c46fbefa AK |
2545 | /* assume default assoc id */ |
2546 | priv->assoc_id = 1; | |
b481de9c | 2547 | |
4f40e4d9 | 2548 | iwl_rxon_add_station(priv, priv->bssid, 0); |
bb8c093b | 2549 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2550 | |
2551 | break; | |
2552 | ||
2553 | default: | |
2554 | IWL_ERROR("%s Should not be called in %d mode\n", | |
2555 | __FUNCTION__, priv->iw_mode); | |
2556 | break; | |
2557 | } | |
2558 | ||
b481de9c | 2559 | /* Enable Rx differential gain and sensitivity calibrations */ |
f0832f13 | 2560 | iwl_chain_noise_reset(priv); |
b481de9c | 2561 | priv->start_calib = 1; |
b481de9c ZY |
2562 | |
2563 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2564 | priv->assoc_station_added = 1; | |
2565 | ||
1ff50bda EG |
2566 | spin_lock_irqsave(&priv->lock, flags); |
2567 | iwl_activate_qos(priv, 0); | |
2568 | spin_unlock_irqrestore(&priv->lock, flags); | |
292ae174 | 2569 | |
5da4b55f | 2570 | iwl_power_update_mode(priv, 0); |
7878a5a4 MA |
2571 | /* we have just associated, don't start scan too early */ |
2572 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; | |
508e32e1 RC |
2573 | } |
2574 | ||
76bb77e0 ZY |
2575 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf); |
2576 | ||
2a421b91 | 2577 | static void iwl_bg_scan_completed(struct work_struct *work) |
b481de9c | 2578 | { |
c79dd5b5 TW |
2579 | struct iwl_priv *priv = |
2580 | container_of(work, struct iwl_priv, scan_completed); | |
b481de9c | 2581 | |
630fe9b6 | 2582 | IWL_DEBUG_SCAN("SCAN complete scan\n"); |
b481de9c ZY |
2583 | |
2584 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2585 | return; | |
2586 | ||
a0646470 ZY |
2587 | if (test_bit(STATUS_CONF_PENDING, &priv->status)) |
2588 | iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw)); | |
76bb77e0 | 2589 | |
b481de9c ZY |
2590 | ieee80211_scan_completed(priv->hw); |
2591 | ||
2592 | /* Since setting the TXPOWER may have been deferred while | |
2593 | * performing the scan, fire one off */ | |
2594 | mutex_lock(&priv->mutex); | |
630fe9b6 | 2595 | iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); |
b481de9c ZY |
2596 | mutex_unlock(&priv->mutex); |
2597 | } | |
2598 | ||
2599 | /***************************************************************************** | |
2600 | * | |
2601 | * mac80211 entry point functions | |
2602 | * | |
2603 | *****************************************************************************/ | |
2604 | ||
154b25ce | 2605 | #define UCODE_READY_TIMEOUT (4 * HZ) |
5a66926a | 2606 | |
bb8c093b | 2607 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 2608 | { |
c79dd5b5 | 2609 | struct iwl_priv *priv = hw->priv; |
5a66926a | 2610 | int ret; |
b481de9c ZY |
2611 | |
2612 | IWL_DEBUG_MAC80211("enter\n"); | |
2613 | ||
5a66926a ZY |
2614 | if (pci_enable_device(priv->pci_dev)) { |
2615 | IWL_ERROR("Fail to pci_enable_device\n"); | |
2616 | return -ENODEV; | |
2617 | } | |
2618 | pci_restore_state(priv->pci_dev); | |
2619 | pci_enable_msi(priv->pci_dev); | |
2620 | ||
2621 | ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED, | |
2622 | DRV_NAME, priv); | |
2623 | if (ret) { | |
2624 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
2625 | goto out_disable_msi; | |
2626 | } | |
2627 | ||
b481de9c ZY |
2628 | /* we should be verifying the device is ready to be opened */ |
2629 | mutex_lock(&priv->mutex); | |
2630 | ||
c1adf9fb | 2631 | memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd)); |
5a66926a ZY |
2632 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... |
2633 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 2634 | |
5a66926a ZY |
2635 | if (!priv->ucode_code.len) { |
2636 | ret = iwl4965_read_ucode(priv); | |
2637 | if (ret) { | |
2638 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
2639 | mutex_unlock(&priv->mutex); | |
2640 | goto out_release_irq; | |
2641 | } | |
2642 | } | |
b481de9c | 2643 | |
e655b9f0 | 2644 | ret = __iwl4965_up(priv); |
5a66926a | 2645 | |
b481de9c | 2646 | mutex_unlock(&priv->mutex); |
5a66926a | 2647 | |
80fcc9e2 AG |
2648 | iwl_rfkill_set_hw_state(priv); |
2649 | ||
e655b9f0 ZY |
2650 | if (ret) |
2651 | goto out_release_irq; | |
2652 | ||
2653 | IWL_DEBUG_INFO("Start UP work done.\n"); | |
2654 | ||
2655 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
2656 | return 0; | |
2657 | ||
fe9b6b72 | 2658 | /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from |
5a66926a | 2659 | * mac80211 will not be run successfully. */ |
154b25ce EG |
2660 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, |
2661 | test_bit(STATUS_READY, &priv->status), | |
2662 | UCODE_READY_TIMEOUT); | |
2663 | if (!ret) { | |
2664 | if (!test_bit(STATUS_READY, &priv->status)) { | |
2665 | IWL_ERROR("START_ALIVE timeout after %dms.\n", | |
2666 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
2667 | ret = -ETIMEDOUT; | |
2668 | goto out_release_irq; | |
5a66926a | 2669 | } |
fe9b6b72 | 2670 | } |
0a078ffa TW |
2671 | |
2672 | priv->is_open = 1; | |
b481de9c ZY |
2673 | IWL_DEBUG_MAC80211("leave\n"); |
2674 | return 0; | |
5a66926a ZY |
2675 | |
2676 | out_release_irq: | |
2677 | free_irq(priv->pci_dev->irq, priv); | |
2678 | out_disable_msi: | |
2679 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
2680 | pci_disable_device(priv->pci_dev); |
2681 | priv->is_open = 0; | |
2682 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 2683 | return ret; |
b481de9c ZY |
2684 | } |
2685 | ||
bb8c093b | 2686 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 2687 | { |
c79dd5b5 | 2688 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2689 | |
2690 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 2691 | |
e655b9f0 ZY |
2692 | if (!priv->is_open) { |
2693 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
2694 | return; | |
2695 | } | |
2696 | ||
b481de9c | 2697 | priv->is_open = 0; |
5a66926a | 2698 | |
fee1247a | 2699 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
2700 | /* stop mac, cancel any scan request and clear |
2701 | * RXON_FILTER_ASSOC_MSK BIT | |
2702 | */ | |
5a66926a | 2703 | mutex_lock(&priv->mutex); |
2a421b91 | 2704 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f | 2705 | mutex_unlock(&priv->mutex); |
fde3571f MA |
2706 | } |
2707 | ||
5a66926a ZY |
2708 | iwl4965_down(priv); |
2709 | ||
2710 | flush_workqueue(priv->workqueue); | |
2711 | free_irq(priv->pci_dev->irq, priv); | |
2712 | pci_disable_msi(priv->pci_dev); | |
2713 | pci_save_state(priv->pci_dev); | |
2714 | pci_disable_device(priv->pci_dev); | |
948c171c | 2715 | |
b481de9c | 2716 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2717 | } |
2718 | ||
e039fa4a | 2719 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 2720 | { |
c79dd5b5 | 2721 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2722 | |
2723 | IWL_DEBUG_MAC80211("enter\n"); | |
2724 | ||
2725 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | |
2726 | IWL_DEBUG_MAC80211("leave - monitor\n"); | |
6afe6828 ZY |
2727 | dev_kfree_skb_any(skb); |
2728 | return 0; | |
b481de9c ZY |
2729 | } |
2730 | ||
2731 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | |
e039fa4a | 2732 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
b481de9c | 2733 | |
e039fa4a | 2734 | if (iwl_tx_skb(priv, skb)) |
b481de9c ZY |
2735 | dev_kfree_skb_any(skb); |
2736 | ||
2737 | IWL_DEBUG_MAC80211("leave\n"); | |
2738 | return 0; | |
2739 | } | |
2740 | ||
bb8c093b | 2741 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
2742 | struct ieee80211_if_init_conf *conf) |
2743 | { | |
c79dd5b5 | 2744 | struct iwl_priv *priv = hw->priv; |
b481de9c | 2745 | unsigned long flags; |
0795af57 | 2746 | DECLARE_MAC_BUF(mac); |
b481de9c | 2747 | |
32bfd35d | 2748 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 2749 | |
32bfd35d JB |
2750 | if (priv->vif) { |
2751 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 2752 | return -EOPNOTSUPP; |
b481de9c ZY |
2753 | } |
2754 | ||
2755 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 2756 | priv->vif = conf->vif; |
b481de9c ZY |
2757 | |
2758 | spin_unlock_irqrestore(&priv->lock, flags); | |
2759 | ||
2760 | mutex_lock(&priv->mutex); | |
864792e3 TW |
2761 | |
2762 | if (conf->mac_addr) { | |
2763 | IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr)); | |
2764 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | |
2765 | } | |
b481de9c | 2766 | |
c46fbefa AK |
2767 | if (iwl4965_set_mode(priv, conf->type) == -EAGAIN) |
2768 | /* we are not ready, will run again when ready */ | |
2769 | set_bit(STATUS_MODE_PENDING, &priv->status); | |
5a66926a | 2770 | |
b481de9c ZY |
2771 | mutex_unlock(&priv->mutex); |
2772 | ||
5a66926a | 2773 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2774 | return 0; |
2775 | } | |
2776 | ||
2777 | /** | |
bb8c093b | 2778 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
2779 | * |
2780 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
2781 | * be set inappropriately and the driver currently sets the hardware up to | |
2782 | * use it whenever needed. | |
2783 | */ | |
bb8c093b | 2784 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
b481de9c | 2785 | { |
c79dd5b5 | 2786 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 2787 | const struct iwl_channel_info *ch_info; |
b481de9c | 2788 | unsigned long flags; |
76bb77e0 | 2789 | int ret = 0; |
82a66bbb | 2790 | u16 channel; |
b481de9c ZY |
2791 | |
2792 | mutex_lock(&priv->mutex); | |
8318d78a | 2793 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 2794 | |
12342c47 ZY |
2795 | priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP); |
2796 | ||
14a08a7f | 2797 | if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) { |
64e72c3e | 2798 | IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n"); |
14a08a7f | 2799 | goto out; |
64e72c3e MA |
2800 | } |
2801 | ||
14a08a7f EG |
2802 | if (!conf->radio_enabled) |
2803 | iwl_radio_kill_sw_disable_radio(priv); | |
2804 | ||
fee1247a | 2805 | if (!iwl_is_ready(priv)) { |
b481de9c | 2806 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
2807 | ret = -EIO; |
2808 | goto out; | |
b481de9c ZY |
2809 | } |
2810 | ||
1ea87396 | 2811 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 2812 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 ZY |
2813 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
2814 | set_bit(STATUS_CONF_PENDING, &priv->status); | |
b481de9c | 2815 | mutex_unlock(&priv->mutex); |
a0646470 | 2816 | return 0; |
b481de9c ZY |
2817 | } |
2818 | ||
82a66bbb TW |
2819 | channel = ieee80211_frequency_to_channel(conf->channel->center_freq); |
2820 | ch_info = iwl_get_channel_info(priv, conf->channel->band, channel); | |
b481de9c | 2821 | if (!is_channel_valid(ch_info)) { |
b481de9c | 2822 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
76bb77e0 ZY |
2823 | ret = -EINVAL; |
2824 | goto out; | |
b481de9c ZY |
2825 | } |
2826 | ||
398f9e76 AK |
2827 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS && |
2828 | !is_channel_ibss(ch_info)) { | |
2829 | IWL_ERROR("channel %d in band %d not IBSS channel\n", | |
2830 | conf->channel->hw_value, conf->channel->band); | |
2831 | ret = -EINVAL; | |
2832 | goto out; | |
2833 | } | |
2834 | ||
82a66bbb TW |
2835 | spin_lock_irqsave(&priv->lock, flags); |
2836 | ||
b5d7be5e | 2837 | |
78330fdd | 2838 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
2839 | * from any ht related info since 2.4 does not |
2840 | * support ht */ | |
82a66bbb | 2841 | if ((le16_to_cpu(priv->staging_rxon.channel) != channel) |
b481de9c ZY |
2842 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
2843 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
2844 | #endif | |
2845 | ) | |
2846 | priv->staging_rxon.flags = 0; | |
b481de9c | 2847 | |
82a66bbb | 2848 | iwl_set_rxon_channel(priv, conf->channel->band, channel); |
b481de9c | 2849 | |
82a66bbb | 2850 | iwl_set_flags_for_band(priv, conf->channel->band); |
b481de9c ZY |
2851 | |
2852 | /* The list of supported rates and rate mask can be different | |
8318d78a | 2853 | * for each band; since the band may have changed, reset |
b481de9c | 2854 | * the rate mask to what mac80211 lists */ |
bb8c093b | 2855 | iwl4965_set_rate(priv); |
b481de9c ZY |
2856 | |
2857 | spin_unlock_irqrestore(&priv->lock, flags); | |
2858 | ||
2859 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
2860 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 2861 | iwl4965_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 2862 | goto out; |
b481de9c ZY |
2863 | } |
2864 | #endif | |
2865 | ||
b481de9c ZY |
2866 | if (!conf->radio_enabled) { |
2867 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 2868 | goto out; |
b481de9c ZY |
2869 | } |
2870 | ||
fee1247a | 2871 | if (iwl_is_rfkill(priv)) { |
b481de9c | 2872 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
2873 | ret = -EIO; |
2874 | goto out; | |
b481de9c ZY |
2875 | } |
2876 | ||
630fe9b6 TW |
2877 | IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n", |
2878 | priv->tx_power_user_lmt, conf->power_level); | |
2879 | ||
2880 | iwl_set_tx_power(priv, conf->power_level, false); | |
2881 | ||
bb8c093b | 2882 | iwl4965_set_rate(priv); |
b481de9c ZY |
2883 | |
2884 | if (memcmp(&priv->active_rxon, | |
2885 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 2886 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2887 | else |
2888 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
2889 | ||
2890 | IWL_DEBUG_MAC80211("leave\n"); | |
2891 | ||
a0646470 ZY |
2892 | out: |
2893 | clear_bit(STATUS_CONF_PENDING, &priv->status); | |
5a66926a | 2894 | mutex_unlock(&priv->mutex); |
76bb77e0 | 2895 | return ret; |
b481de9c ZY |
2896 | } |
2897 | ||
c79dd5b5 | 2898 | static void iwl4965_config_ap(struct iwl_priv *priv) |
b481de9c | 2899 | { |
857485c0 | 2900 | int ret = 0; |
1ff50bda | 2901 | unsigned long flags; |
b481de9c | 2902 | |
d986bcd1 | 2903 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
2904 | return; |
2905 | ||
2906 | /* The following should be done only at AP bring up */ | |
5d1e2325 | 2907 | if (!(iwl_is_associated(priv))) { |
b481de9c ZY |
2908 | |
2909 | /* RXON - unassoc (to set timing command) */ | |
2910 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2911 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2912 | |
2913 | /* RXON Timing */ | |
bb8c093b CH |
2914 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
2915 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 2916 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2917 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2918 | if (ret) |
b481de9c ZY |
2919 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2920 | "Attempting to continue.\n"); | |
2921 | ||
c7de35cd | 2922 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2923 | |
2924 | /* FIXME: what should be the assoc_id for AP? */ | |
2925 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
2926 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2927 | priv->staging_rxon.flags |= | |
2928 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
2929 | else | |
2930 | priv->staging_rxon.flags &= | |
2931 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2932 | ||
2933 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2934 | if (priv->assoc_capability & | |
2935 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2936 | priv->staging_rxon.flags |= | |
2937 | RXON_FLG_SHORT_SLOT_MSK; | |
2938 | else | |
2939 | priv->staging_rxon.flags &= | |
2940 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2941 | ||
2942 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2943 | priv->staging_rxon.flags &= | |
2944 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2945 | } | |
2946 | /* restore RXON assoc */ | |
2947 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2948 | iwl4965_commit_rxon(priv); |
1ff50bda EG |
2949 | spin_lock_irqsave(&priv->lock, flags); |
2950 | iwl_activate_qos(priv, 1); | |
2951 | spin_unlock_irqrestore(&priv->lock, flags); | |
4f40e4d9 | 2952 | iwl_rxon_add_station(priv, iwl_bcast_addr, 0); |
e1493deb | 2953 | } |
bb8c093b | 2954 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2955 | |
2956 | /* FIXME - we need to add code here to detect a totally new | |
2957 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
2958 | * clear sta table, add BCAST sta... */ | |
2959 | } | |
2960 | ||
9d139c81 JB |
2961 | /* temporary */ |
2962 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb); | |
2963 | ||
32bfd35d JB |
2964 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, |
2965 | struct ieee80211_vif *vif, | |
b481de9c ZY |
2966 | struct ieee80211_if_conf *conf) |
2967 | { | |
c79dd5b5 | 2968 | struct iwl_priv *priv = hw->priv; |
0795af57 | 2969 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
2970 | unsigned long flags; |
2971 | int rc; | |
2972 | ||
2973 | if (conf == NULL) | |
2974 | return -EIO; | |
2975 | ||
b716bb91 EG |
2976 | if (priv->vif != vif) { |
2977 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
2978 | return 0; |
2979 | } | |
2980 | ||
9d139c81 JB |
2981 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS && |
2982 | conf->changed & IEEE80211_IFCC_BEACON) { | |
2983 | struct sk_buff *beacon = ieee80211_beacon_get(hw, vif); | |
2984 | if (!beacon) | |
2985 | return -ENOMEM; | |
2986 | rc = iwl4965_mac_beacon_update(hw, beacon); | |
2987 | if (rc) | |
2988 | return rc; | |
2989 | } | |
2990 | ||
b481de9c | 2991 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && |
9d139c81 | 2992 | (!conf->ssid_len)) { |
b481de9c ZY |
2993 | IWL_DEBUG_MAC80211 |
2994 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
2995 | return 0; | |
2996 | } | |
2997 | ||
fee1247a | 2998 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
2999 | return -EAGAIN; |
3000 | ||
b481de9c ZY |
3001 | mutex_lock(&priv->mutex); |
3002 | ||
b481de9c | 3003 | if (conf->bssid) |
0795af57 JP |
3004 | IWL_DEBUG_MAC80211("bssid: %s\n", |
3005 | print_mac(mac, conf->bssid)); | |
b481de9c | 3006 | |
4150c572 JB |
3007 | /* |
3008 | * very dubious code was here; the probe filtering flag is never set: | |
3009 | * | |
b481de9c ZY |
3010 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
3011 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 3012 | */ |
b481de9c ZY |
3013 | |
3014 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
3015 | if (!conf->bssid) { | |
3016 | conf->bssid = priv->mac_addr; | |
3017 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
0795af57 JP |
3018 | IWL_DEBUG_MAC80211("bssid was set to: %s\n", |
3019 | print_mac(mac, conf->bssid)); | |
b481de9c ZY |
3020 | } |
3021 | if (priv->ibss_beacon) | |
3022 | dev_kfree_skb(priv->ibss_beacon); | |
3023 | ||
9d139c81 | 3024 | priv->ibss_beacon = ieee80211_beacon_get(hw, vif); |
b481de9c ZY |
3025 | } |
3026 | ||
fee1247a | 3027 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
3028 | goto done; |
3029 | ||
b481de9c ZY |
3030 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
3031 | !is_multicast_ether_addr(conf->bssid)) { | |
3032 | /* If there is currently a HW scan going on in the background | |
3033 | * then we need to cancel it else the RXON below will fail. */ | |
2a421b91 | 3034 | if (iwl_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
3035 | IWL_WARNING("Aborted scan still in progress " |
3036 | "after 100ms\n"); | |
3037 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
3038 | mutex_unlock(&priv->mutex); | |
3039 | return -EAGAIN; | |
3040 | } | |
3041 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
3042 | ||
3043 | /* TODO: Audit driver for usage of these members and see | |
3044 | * if mac80211 deprecates them (priv->bssid looks like it | |
3045 | * shouldn't be there, but I haven't scanned the IBSS code | |
3046 | * to verify) - jpk */ | |
3047 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
3048 | ||
3049 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 3050 | iwl4965_config_ap(priv); |
b481de9c | 3051 | else { |
bb8c093b | 3052 | rc = iwl4965_commit_rxon(priv); |
b481de9c | 3053 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc) |
4f40e4d9 | 3054 | iwl_rxon_add_station( |
b481de9c ZY |
3055 | priv, priv->active_rxon.bssid_addr, 1); |
3056 | } | |
3057 | ||
3058 | } else { | |
2a421b91 | 3059 | iwl_scan_cancel_timeout(priv, 100); |
b481de9c | 3060 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3061 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3062 | } |
3063 | ||
fde3571f | 3064 | done: |
b481de9c ZY |
3065 | spin_lock_irqsave(&priv->lock, flags); |
3066 | if (!conf->ssid_len) | |
3067 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3068 | else | |
3069 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
3070 | ||
3071 | priv->essid_len = conf->ssid_len; | |
3072 | spin_unlock_irqrestore(&priv->lock, flags); | |
3073 | ||
3074 | IWL_DEBUG_MAC80211("leave\n"); | |
3075 | mutex_unlock(&priv->mutex); | |
3076 | ||
3077 | return 0; | |
3078 | } | |
3079 | ||
bb8c093b | 3080 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
3081 | unsigned int changed_flags, |
3082 | unsigned int *total_flags, | |
3083 | int mc_count, struct dev_addr_list *mc_list) | |
3084 | { | |
4419e39b | 3085 | struct iwl_priv *priv = hw->priv; |
25b3f57c RF |
3086 | |
3087 | if (changed_flags & (*total_flags) & FIF_OTHER_BSS) { | |
3088 | IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n", | |
3089 | IEEE80211_IF_TYPE_MNTR, | |
3090 | changed_flags, *total_flags); | |
3091 | /* queue work 'cuz mac80211 is holding a lock which | |
3092 | * prevents us from issuing (synchronous) f/w cmds */ | |
3093 | queue_work(priv->workqueue, &priv->set_monitor); | |
4419e39b | 3094 | } |
25b3f57c RF |
3095 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | |
3096 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | |
4150c572 JB |
3097 | } |
3098 | ||
bb8c093b | 3099 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
3100 | struct ieee80211_if_init_conf *conf) |
3101 | { | |
c79dd5b5 | 3102 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3103 | |
3104 | IWL_DEBUG_MAC80211("enter\n"); | |
3105 | ||
3106 | mutex_lock(&priv->mutex); | |
948c171c | 3107 | |
fee1247a | 3108 | if (iwl_is_ready_rf(priv)) { |
2a421b91 | 3109 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f MA |
3110 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
3111 | iwl4965_commit_rxon(priv); | |
3112 | } | |
32bfd35d JB |
3113 | if (priv->vif == conf->vif) { |
3114 | priv->vif = NULL; | |
b481de9c ZY |
3115 | memset(priv->bssid, 0, ETH_ALEN); |
3116 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3117 | priv->essid_len = 0; | |
3118 | } | |
3119 | mutex_unlock(&priv->mutex); | |
3120 | ||
3121 | IWL_DEBUG_MAC80211("leave\n"); | |
3122 | ||
3123 | } | |
471b3efd | 3124 | |
3109ece1 | 3125 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
471b3efd JB |
3126 | static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, |
3127 | struct ieee80211_vif *vif, | |
3128 | struct ieee80211_bss_conf *bss_conf, | |
3129 | u32 changes) | |
220173b0 | 3130 | { |
c79dd5b5 | 3131 | struct iwl_priv *priv = hw->priv; |
220173b0 | 3132 | |
3109ece1 TW |
3133 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
3134 | ||
471b3efd | 3135 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
3136 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
3137 | bss_conf->use_short_preamble); | |
471b3efd | 3138 | if (bss_conf->use_short_preamble) |
220173b0 TW |
3139 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
3140 | else | |
3141 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
3142 | } | |
3143 | ||
471b3efd | 3144 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 3145 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 3146 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
3147 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
3148 | else | |
3149 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
3150 | } | |
3151 | ||
98952d5d | 3152 | if (changes & BSS_CHANGED_HT) { |
3109ece1 | 3153 | IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht); |
98952d5d | 3154 | iwl4965_ht_conf(priv, bss_conf); |
c7de35cd | 3155 | iwl_set_rxon_chain(priv); |
98952d5d TW |
3156 | } |
3157 | ||
471b3efd | 3158 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 3159 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
3160 | /* This should never happen as this function should |
3161 | * never be called from interrupt context. */ | |
3162 | if (WARN_ON_ONCE(in_interrupt())) | |
3163 | return; | |
3109ece1 TW |
3164 | if (bss_conf->assoc) { |
3165 | priv->assoc_id = bss_conf->aid; | |
3166 | priv->beacon_int = bss_conf->beacon_int; | |
b5d7be5e | 3167 | priv->power_data.dtim_period = bss_conf->dtim_period; |
3109ece1 TW |
3168 | priv->timestamp = bss_conf->timestamp; |
3169 | priv->assoc_capability = bss_conf->assoc_capability; | |
3170 | priv->next_scan_jiffies = jiffies + | |
3171 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 RC |
3172 | mutex_lock(&priv->mutex); |
3173 | iwl4965_post_associate(priv); | |
3174 | mutex_unlock(&priv->mutex); | |
3109ece1 TW |
3175 | } else { |
3176 | priv->assoc_id = 0; | |
3177 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
3178 | } | |
3179 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
3180 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 3181 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
3182 | } |
3183 | ||
220173b0 | 3184 | } |
b481de9c | 3185 | |
bb8c093b | 3186 | static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len) |
b481de9c ZY |
3187 | { |
3188 | int rc = 0; | |
3189 | unsigned long flags; | |
c79dd5b5 | 3190 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3191 | |
3192 | IWL_DEBUG_MAC80211("enter\n"); | |
3193 | ||
052c4b9f | 3194 | mutex_lock(&priv->mutex); |
b481de9c ZY |
3195 | spin_lock_irqsave(&priv->lock, flags); |
3196 | ||
fee1247a | 3197 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3198 | rc = -EIO; |
3199 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); | |
3200 | goto out_unlock; | |
3201 | } | |
3202 | ||
3203 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */ | |
3204 | rc = -EIO; | |
3205 | IWL_ERROR("ERROR: APs don't scan\n"); | |
3206 | goto out_unlock; | |
3207 | } | |
3208 | ||
7878a5a4 MA |
3209 | /* we don't schedule scan within next_scan_jiffies period */ |
3210 | if (priv->next_scan_jiffies && | |
3211 | time_after(priv->next_scan_jiffies, jiffies)) { | |
3212 | rc = -EAGAIN; | |
3213 | goto out_unlock; | |
3214 | } | |
b481de9c | 3215 | /* if we just finished scan ask for delay */ |
7878a5a4 MA |
3216 | if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies + |
3217 | IWL_DELAY_NEXT_SCAN, jiffies)) { | |
b481de9c ZY |
3218 | rc = -EAGAIN; |
3219 | goto out_unlock; | |
3220 | } | |
3221 | if (len) { | |
7878a5a4 | 3222 | IWL_DEBUG_SCAN("direct scan for %s [%d]\n ", |
2a421b91 | 3223 | iwl_escape_essid(ssid, len), (int)len); |
b481de9c ZY |
3224 | |
3225 | priv->one_direct_scan = 1; | |
3226 | priv->direct_ssid_len = (u8) | |
3227 | min((u8) len, (u8) IW_ESSID_MAX_SIZE); | |
3228 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); | |
948c171c MA |
3229 | } else |
3230 | priv->one_direct_scan = 0; | |
b481de9c | 3231 | |
2a421b91 | 3232 | rc = iwl_scan_initiate(priv); |
b481de9c ZY |
3233 | |
3234 | IWL_DEBUG_MAC80211("leave\n"); | |
3235 | ||
3236 | out_unlock: | |
3237 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 3238 | mutex_unlock(&priv->mutex); |
b481de9c ZY |
3239 | |
3240 | return rc; | |
3241 | } | |
3242 | ||
ab885f8c EG |
3243 | static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
3244 | struct ieee80211_key_conf *keyconf, const u8 *addr, | |
3245 | u32 iv32, u16 *phase1key) | |
3246 | { | |
3247 | struct iwl_priv *priv = hw->priv; | |
3248 | u8 sta_id = IWL_INVALID_STATION; | |
3249 | unsigned long flags; | |
3250 | __le16 key_flags = 0; | |
3251 | int i; | |
3252 | DECLARE_MAC_BUF(mac); | |
3253 | ||
3254 | IWL_DEBUG_MAC80211("enter\n"); | |
3255 | ||
947b13a7 | 3256 | sta_id = iwl_find_station(priv, addr); |
ab885f8c EG |
3257 | if (sta_id == IWL_INVALID_STATION) { |
3258 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
3259 | print_mac(mac, addr)); | |
3260 | return; | |
3261 | } | |
3262 | ||
2a421b91 | 3263 | iwl_scan_cancel_timeout(priv, 100); |
ab885f8c EG |
3264 | |
3265 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
3266 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
3267 | key_flags &= ~STA_KEY_FLG_INVALID; | |
3268 | ||
5425e490 | 3269 | if (sta_id == priv->hw_params.bcast_sta_id) |
ab885f8c EG |
3270 | key_flags |= STA_KEY_MULTICAST_MSK; |
3271 | ||
3272 | spin_lock_irqsave(&priv->sta_lock, flags); | |
3273 | ||
ab885f8c EG |
3274 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
3275 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
3276 | ||
3277 | for (i = 0; i < 5; i++) | |
3278 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
3279 | cpu_to_le16(phase1key[i]); | |
3280 | ||
3281 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
3282 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
3283 | ||
133636de | 3284 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
ab885f8c EG |
3285 | |
3286 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
3287 | ||
3288 | IWL_DEBUG_MAC80211("leave\n"); | |
3289 | } | |
3290 | ||
bb8c093b | 3291 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
3292 | const u8 *local_addr, const u8 *addr, |
3293 | struct ieee80211_key_conf *key) | |
3294 | { | |
c79dd5b5 | 3295 | struct iwl_priv *priv = hw->priv; |
0795af57 | 3296 | DECLARE_MAC_BUF(mac); |
deb09c43 EG |
3297 | int ret = 0; |
3298 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 3299 | u8 is_default_wep_key = 0; |
b481de9c ZY |
3300 | |
3301 | IWL_DEBUG_MAC80211("enter\n"); | |
3302 | ||
099b40b7 | 3303 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
3304 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
3305 | return -EOPNOTSUPP; | |
3306 | } | |
3307 | ||
3308 | if (is_zero_ether_addr(addr)) | |
3309 | /* only support pairwise keys */ | |
3310 | return -EOPNOTSUPP; | |
3311 | ||
947b13a7 | 3312 | sta_id = iwl_find_station(priv, addr); |
6974e363 EG |
3313 | if (sta_id == IWL_INVALID_STATION) { |
3314 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
3315 | print_mac(mac, addr)); | |
3316 | return -EINVAL; | |
b481de9c | 3317 | |
deb09c43 | 3318 | } |
b481de9c | 3319 | |
6974e363 | 3320 | mutex_lock(&priv->mutex); |
2a421b91 | 3321 | iwl_scan_cancel_timeout(priv, 100); |
6974e363 EG |
3322 | mutex_unlock(&priv->mutex); |
3323 | ||
3324 | /* If we are getting WEP group key and we didn't receive any key mapping | |
3325 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
3326 | * in 1X mode. | |
3327 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 3328 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
6974e363 EG |
3329 | priv->iw_mode != IEEE80211_IF_TYPE_AP) { |
3330 | if (cmd == SET_KEY) | |
3331 | is_default_wep_key = !priv->key_mapping_key; | |
3332 | else | |
ccc038ab EG |
3333 | is_default_wep_key = |
3334 | (key->hw_key_idx == HW_KEY_DEFAULT); | |
6974e363 | 3335 | } |
052c4b9f | 3336 | |
b481de9c | 3337 | switch (cmd) { |
deb09c43 | 3338 | case SET_KEY: |
6974e363 EG |
3339 | if (is_default_wep_key) |
3340 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 3341 | else |
7480513f | 3342 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3343 | |
3344 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
3345 | break; |
3346 | case DISABLE_KEY: | |
6974e363 EG |
3347 | if (is_default_wep_key) |
3348 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 3349 | else |
3ec47732 | 3350 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3351 | |
3352 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
3353 | break; |
3354 | default: | |
deb09c43 | 3355 | ret = -EINVAL; |
b481de9c ZY |
3356 | } |
3357 | ||
3358 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 3359 | |
deb09c43 | 3360 | return ret; |
b481de9c ZY |
3361 | } |
3362 | ||
e100bb64 | 3363 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
3364 | const struct ieee80211_tx_queue_params *params) |
3365 | { | |
c79dd5b5 | 3366 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3367 | unsigned long flags; |
3368 | int q; | |
b481de9c ZY |
3369 | |
3370 | IWL_DEBUG_MAC80211("enter\n"); | |
3371 | ||
fee1247a | 3372 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3373 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3374 | return -EIO; | |
3375 | } | |
3376 | ||
3377 | if (queue >= AC_NUM) { | |
3378 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
3379 | return 0; | |
3380 | } | |
3381 | ||
b481de9c ZY |
3382 | if (!priv->qos_data.qos_enable) { |
3383 | priv->qos_data.qos_active = 0; | |
3384 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
3385 | return 0; | |
3386 | } | |
3387 | q = AC_NUM - 1 - queue; | |
3388 | ||
3389 | spin_lock_irqsave(&priv->lock, flags); | |
3390 | ||
3391 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
3392 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
3393 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
3394 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 3395 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
3396 | |
3397 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
3398 | priv->qos_data.qos_active = 1; | |
3399 | ||
b481de9c | 3400 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) |
1ff50bda | 3401 | iwl_activate_qos(priv, 1); |
3109ece1 | 3402 | else if (priv->assoc_id && iwl_is_associated(priv)) |
1ff50bda | 3403 | iwl_activate_qos(priv, 0); |
b481de9c | 3404 | |
1ff50bda | 3405 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3406 | |
b481de9c ZY |
3407 | IWL_DEBUG_MAC80211("leave\n"); |
3408 | return 0; | |
3409 | } | |
3410 | ||
d783b061 TW |
3411 | static int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw, |
3412 | enum ieee80211_ampdu_mlme_action action, | |
3413 | const u8 *addr, u16 tid, u16 *ssn) | |
3414 | { | |
3415 | struct iwl_priv *priv = hw->priv; | |
3416 | DECLARE_MAC_BUF(mac); | |
3417 | ||
3418 | IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n", | |
3419 | print_mac(mac, addr), tid); | |
3420 | ||
3421 | if (!(priv->cfg->sku & IWL_SKU_N)) | |
3422 | return -EACCES; | |
3423 | ||
3424 | switch (action) { | |
3425 | case IEEE80211_AMPDU_RX_START: | |
3426 | IWL_DEBUG_HT("start Rx\n"); | |
3427 | return iwl_rx_agg_start(priv, addr, tid, *ssn); | |
3428 | case IEEE80211_AMPDU_RX_STOP: | |
3429 | IWL_DEBUG_HT("stop Rx\n"); | |
3430 | return iwl_rx_agg_stop(priv, addr, tid); | |
3431 | case IEEE80211_AMPDU_TX_START: | |
3432 | IWL_DEBUG_HT("start Tx\n"); | |
3433 | return iwl_tx_agg_start(priv, addr, tid, ssn); | |
3434 | case IEEE80211_AMPDU_TX_STOP: | |
3435 | IWL_DEBUG_HT("stop Tx\n"); | |
3436 | return iwl_tx_agg_stop(priv, addr, tid); | |
3437 | default: | |
3438 | IWL_DEBUG_HT("unknown\n"); | |
3439 | return -EINVAL; | |
3440 | break; | |
3441 | } | |
3442 | return 0; | |
3443 | } | |
bb8c093b | 3444 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3445 | struct ieee80211_tx_queue_stats *stats) |
3446 | { | |
c79dd5b5 | 3447 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3448 | int i, avail; |
16466903 | 3449 | struct iwl_tx_queue *txq; |
443cfd45 | 3450 | struct iwl_queue *q; |
b481de9c ZY |
3451 | unsigned long flags; |
3452 | ||
3453 | IWL_DEBUG_MAC80211("enter\n"); | |
3454 | ||
fee1247a | 3455 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3456 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3457 | return -EIO; | |
3458 | } | |
3459 | ||
3460 | spin_lock_irqsave(&priv->lock, flags); | |
3461 | ||
3462 | for (i = 0; i < AC_NUM; i++) { | |
3463 | txq = &priv->txq[i]; | |
3464 | q = &txq->q; | |
443cfd45 | 3465 | avail = iwl_queue_space(q); |
b481de9c | 3466 | |
57ffc589 JB |
3467 | stats[i].len = q->n_window - avail; |
3468 | stats[i].limit = q->n_window - q->high_mark; | |
3469 | stats[i].count = q->n_window; | |
b481de9c ZY |
3470 | |
3471 | } | |
3472 | spin_unlock_irqrestore(&priv->lock, flags); | |
3473 | ||
3474 | IWL_DEBUG_MAC80211("leave\n"); | |
3475 | ||
3476 | return 0; | |
3477 | } | |
3478 | ||
bb8c093b | 3479 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3480 | struct ieee80211_low_level_stats *stats) |
3481 | { | |
bf403db8 EK |
3482 | struct iwl_priv *priv = hw->priv; |
3483 | ||
3484 | priv = hw->priv; | |
b481de9c ZY |
3485 | IWL_DEBUG_MAC80211("enter\n"); |
3486 | IWL_DEBUG_MAC80211("leave\n"); | |
3487 | ||
3488 | return 0; | |
3489 | } | |
3490 | ||
bb8c093b | 3491 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 3492 | { |
c79dd5b5 | 3493 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3494 | unsigned long flags; |
3495 | ||
3496 | mutex_lock(&priv->mutex); | |
3497 | IWL_DEBUG_MAC80211("enter\n"); | |
3498 | ||
b481de9c | 3499 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 3500 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 3501 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3502 | |
c7de35cd | 3503 | iwl_reset_qos(priv); |
b481de9c | 3504 | |
b481de9c ZY |
3505 | spin_lock_irqsave(&priv->lock, flags); |
3506 | priv->assoc_id = 0; | |
3507 | priv->assoc_capability = 0; | |
b481de9c ZY |
3508 | priv->assoc_station_added = 0; |
3509 | ||
3510 | /* new association get rid of ibss beacon skb */ | |
3511 | if (priv->ibss_beacon) | |
3512 | dev_kfree_skb(priv->ibss_beacon); | |
3513 | ||
3514 | priv->ibss_beacon = NULL; | |
3515 | ||
3516 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 3517 | priv->timestamp = 0; |
b481de9c ZY |
3518 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA)) |
3519 | priv->beacon_int = 0; | |
3520 | ||
3521 | spin_unlock_irqrestore(&priv->lock, flags); | |
3522 | ||
fee1247a | 3523 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
3524 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
3525 | mutex_unlock(&priv->mutex); | |
3526 | return; | |
3527 | } | |
3528 | ||
052c4b9f | 3529 | /* we are restarting association process |
3530 | * clear RXON_FILTER_ASSOC_MSK bit | |
3531 | */ | |
3532 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
2a421b91 | 3533 | iwl_scan_cancel_timeout(priv, 100); |
052c4b9f | 3534 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3535 | iwl4965_commit_rxon(priv); |
052c4b9f | 3536 | } |
3537 | ||
5da4b55f MA |
3538 | iwl_power_update_mode(priv, 0); |
3539 | ||
b481de9c ZY |
3540 | /* Per mac80211.h: This is only used in IBSS mode... */ |
3541 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
052c4b9f | 3542 | |
b481de9c ZY |
3543 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
3544 | mutex_unlock(&priv->mutex); | |
3545 | return; | |
3546 | } | |
3547 | ||
bb8c093b | 3548 | iwl4965_set_rate(priv); |
b481de9c ZY |
3549 | |
3550 | mutex_unlock(&priv->mutex); | |
3551 | ||
3552 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
3553 | } |
3554 | ||
e039fa4a | 3555 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 3556 | { |
c79dd5b5 | 3557 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3558 | unsigned long flags; |
2ff75b78 | 3559 | __le64 timestamp; |
b481de9c ZY |
3560 | |
3561 | mutex_lock(&priv->mutex); | |
3562 | IWL_DEBUG_MAC80211("enter\n"); | |
3563 | ||
fee1247a | 3564 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3565 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3566 | mutex_unlock(&priv->mutex); | |
3567 | return -EIO; | |
3568 | } | |
3569 | ||
3570 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
3571 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); | |
3572 | mutex_unlock(&priv->mutex); | |
3573 | return -EIO; | |
3574 | } | |
3575 | ||
3576 | spin_lock_irqsave(&priv->lock, flags); | |
3577 | ||
3578 | if (priv->ibss_beacon) | |
3579 | dev_kfree_skb(priv->ibss_beacon); | |
3580 | ||
3581 | priv->ibss_beacon = skb; | |
3582 | ||
3583 | priv->assoc_id = 0; | |
2ff75b78 AK |
3584 | timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
3585 | priv->timestamp = le64_to_cpu(timestamp) + (priv->beacon_int * 1000); | |
b481de9c ZY |
3586 | |
3587 | IWL_DEBUG_MAC80211("leave\n"); | |
3588 | spin_unlock_irqrestore(&priv->lock, flags); | |
3589 | ||
c7de35cd | 3590 | iwl_reset_qos(priv); |
b481de9c | 3591 | |
c46fbefa | 3592 | iwl4965_post_associate(priv); |
b481de9c ZY |
3593 | |
3594 | mutex_unlock(&priv->mutex); | |
3595 | ||
3596 | return 0; | |
3597 | } | |
3598 | ||
b481de9c ZY |
3599 | /***************************************************************************** |
3600 | * | |
3601 | * sysfs attributes | |
3602 | * | |
3603 | *****************************************************************************/ | |
3604 | ||
0a6857e7 | 3605 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
3606 | |
3607 | /* | |
3608 | * The following adds a new attribute to the sysfs representation | |
3609 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
3610 | * used for controlling the debug level. | |
3611 | * | |
3612 | * See the level definitions in iwl for details. | |
3613 | */ | |
3614 | ||
8cf769c6 EK |
3615 | static ssize_t show_debug_level(struct device *d, |
3616 | struct device_attribute *attr, char *buf) | |
b481de9c | 3617 | { |
8cf769c6 EK |
3618 | struct iwl_priv *priv = d->driver_data; |
3619 | ||
3620 | return sprintf(buf, "0x%08X\n", priv->debug_level); | |
b481de9c | 3621 | } |
8cf769c6 EK |
3622 | static ssize_t store_debug_level(struct device *d, |
3623 | struct device_attribute *attr, | |
b481de9c ZY |
3624 | const char *buf, size_t count) |
3625 | { | |
8cf769c6 | 3626 | struct iwl_priv *priv = d->driver_data; |
b481de9c ZY |
3627 | char *p = (char *)buf; |
3628 | u32 val; | |
3629 | ||
3630 | val = simple_strtoul(p, &p, 0); | |
3631 | if (p == buf) | |
3632 | printk(KERN_INFO DRV_NAME | |
3633 | ": %s is not in hex or decimal form.\n", buf); | |
3634 | else | |
8cf769c6 | 3635 | priv->debug_level = val; |
b481de9c ZY |
3636 | |
3637 | return strnlen(buf, count); | |
3638 | } | |
3639 | ||
8cf769c6 EK |
3640 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, |
3641 | show_debug_level, store_debug_level); | |
3642 | ||
b481de9c | 3643 | |
0a6857e7 | 3644 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 3645 | |
b481de9c | 3646 | |
bc6f59bc TW |
3647 | static ssize_t show_version(struct device *d, |
3648 | struct device_attribute *attr, char *buf) | |
3649 | { | |
3650 | struct iwl_priv *priv = d->driver_data; | |
885ba202 | 3651 | struct iwl_alive_resp *palive = &priv->card_alive; |
f236a265 TW |
3652 | ssize_t pos = 0; |
3653 | u16 eeprom_ver; | |
bc6f59bc TW |
3654 | |
3655 | if (palive->is_valid) | |
f236a265 TW |
3656 | pos += sprintf(buf + pos, |
3657 | "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n" | |
3658 | "fw type: 0x%01X 0x%01X\n", | |
bc6f59bc TW |
3659 | palive->ucode_major, palive->ucode_minor, |
3660 | palive->sw_rev[0], palive->sw_rev[1], | |
3661 | palive->ver_type, palive->ver_subtype); | |
bc6f59bc | 3662 | else |
f236a265 TW |
3663 | pos += sprintf(buf + pos, "fw not loaded\n"); |
3664 | ||
3665 | if (priv->eeprom) { | |
3666 | eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION); | |
3667 | pos += sprintf(buf + pos, "EEPROM version: 0x%x\n", | |
3668 | eeprom_ver); | |
3669 | } else { | |
3670 | pos += sprintf(buf + pos, "EEPROM not initialzed\n"); | |
3671 | } | |
3672 | ||
3673 | return pos; | |
bc6f59bc TW |
3674 | } |
3675 | ||
3676 | static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL); | |
3677 | ||
b481de9c ZY |
3678 | static ssize_t show_temperature(struct device *d, |
3679 | struct device_attribute *attr, char *buf) | |
3680 | { | |
c79dd5b5 | 3681 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 3682 | |
fee1247a | 3683 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
3684 | return -EAGAIN; |
3685 | ||
91dbc5bd | 3686 | return sprintf(buf, "%d\n", priv->temperature); |
b481de9c ZY |
3687 | } |
3688 | ||
3689 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
3690 | ||
b481de9c ZY |
3691 | static ssize_t show_tx_power(struct device *d, |
3692 | struct device_attribute *attr, char *buf) | |
3693 | { | |
c79dd5b5 | 3694 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
630fe9b6 | 3695 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); |
b481de9c ZY |
3696 | } |
3697 | ||
3698 | static ssize_t store_tx_power(struct device *d, | |
3699 | struct device_attribute *attr, | |
3700 | const char *buf, size_t count) | |
3701 | { | |
c79dd5b5 | 3702 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3703 | char *p = (char *)buf; |
3704 | u32 val; | |
3705 | ||
3706 | val = simple_strtoul(p, &p, 10); | |
3707 | if (p == buf) | |
3708 | printk(KERN_INFO DRV_NAME | |
3709 | ": %s is not in decimal form.\n", buf); | |
3710 | else | |
630fe9b6 | 3711 | iwl_set_tx_power(priv, val, false); |
b481de9c ZY |
3712 | |
3713 | return count; | |
3714 | } | |
3715 | ||
3716 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
3717 | ||
3718 | static ssize_t show_flags(struct device *d, | |
3719 | struct device_attribute *attr, char *buf) | |
3720 | { | |
c79dd5b5 | 3721 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3722 | |
3723 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
3724 | } | |
3725 | ||
3726 | static ssize_t store_flags(struct device *d, | |
3727 | struct device_attribute *attr, | |
3728 | const char *buf, size_t count) | |
3729 | { | |
c79dd5b5 | 3730 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3731 | u32 flags = simple_strtoul(buf, NULL, 0); |
3732 | ||
3733 | mutex_lock(&priv->mutex); | |
3734 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
3735 | /* Cancel any currently running scans... */ | |
2a421b91 | 3736 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3737 | IWL_WARNING("Could not cancel scan.\n"); |
3738 | else { | |
3739 | IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n", | |
3740 | flags); | |
3741 | priv->staging_rxon.flags = cpu_to_le32(flags); | |
bb8c093b | 3742 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3743 | } |
3744 | } | |
3745 | mutex_unlock(&priv->mutex); | |
3746 | ||
3747 | return count; | |
3748 | } | |
3749 | ||
3750 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
3751 | ||
3752 | static ssize_t show_filter_flags(struct device *d, | |
3753 | struct device_attribute *attr, char *buf) | |
3754 | { | |
c79dd5b5 | 3755 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3756 | |
3757 | return sprintf(buf, "0x%04X\n", | |
3758 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
3759 | } | |
3760 | ||
3761 | static ssize_t store_filter_flags(struct device *d, | |
3762 | struct device_attribute *attr, | |
3763 | const char *buf, size_t count) | |
3764 | { | |
c79dd5b5 | 3765 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3766 | u32 filter_flags = simple_strtoul(buf, NULL, 0); |
3767 | ||
3768 | mutex_lock(&priv->mutex); | |
3769 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
3770 | /* Cancel any currently running scans... */ | |
2a421b91 | 3771 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3772 | IWL_WARNING("Could not cancel scan.\n"); |
3773 | else { | |
3774 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
3775 | "0x%04X\n", filter_flags); | |
3776 | priv->staging_rxon.filter_flags = | |
3777 | cpu_to_le32(filter_flags); | |
bb8c093b | 3778 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3779 | } |
3780 | } | |
3781 | mutex_unlock(&priv->mutex); | |
3782 | ||
3783 | return count; | |
3784 | } | |
3785 | ||
3786 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
3787 | store_filter_flags); | |
3788 | ||
c8b0e6e1 | 3789 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
3790 | |
3791 | static ssize_t show_measurement(struct device *d, | |
3792 | struct device_attribute *attr, char *buf) | |
3793 | { | |
c79dd5b5 | 3794 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 3795 | struct iwl4965_spectrum_notification measure_report; |
b481de9c ZY |
3796 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
3797 | u8 *data = (u8 *) & measure_report; | |
3798 | unsigned long flags; | |
3799 | ||
3800 | spin_lock_irqsave(&priv->lock, flags); | |
3801 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
3802 | spin_unlock_irqrestore(&priv->lock, flags); | |
3803 | return 0; | |
3804 | } | |
3805 | memcpy(&measure_report, &priv->measure_report, size); | |
3806 | priv->measurement_status = 0; | |
3807 | spin_unlock_irqrestore(&priv->lock, flags); | |
3808 | ||
3809 | while (size && (PAGE_SIZE - len)) { | |
3810 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
3811 | PAGE_SIZE - len, 1); | |
3812 | len = strlen(buf); | |
3813 | if (PAGE_SIZE - len) | |
3814 | buf[len++] = '\n'; | |
3815 | ||
3816 | ofs += 16; | |
3817 | size -= min(size, 16U); | |
3818 | } | |
3819 | ||
3820 | return len; | |
3821 | } | |
3822 | ||
3823 | static ssize_t store_measurement(struct device *d, | |
3824 | struct device_attribute *attr, | |
3825 | const char *buf, size_t count) | |
3826 | { | |
c79dd5b5 | 3827 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3828 | struct ieee80211_measurement_params params = { |
3829 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
3830 | .start_time = cpu_to_le64(priv->last_tsf), | |
3831 | .duration = cpu_to_le16(1), | |
3832 | }; | |
3833 | u8 type = IWL_MEASURE_BASIC; | |
3834 | u8 buffer[32]; | |
3835 | u8 channel; | |
3836 | ||
3837 | if (count) { | |
3838 | char *p = buffer; | |
3839 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
3840 | channel = simple_strtoul(p, NULL, 0); | |
3841 | if (channel) | |
3842 | params.channel = channel; | |
3843 | ||
3844 | p = buffer; | |
3845 | while (*p && *p != ' ') | |
3846 | p++; | |
3847 | if (*p) | |
3848 | type = simple_strtoul(p + 1, NULL, 0); | |
3849 | } | |
3850 | ||
3851 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
3852 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 3853 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
3854 | |
3855 | return count; | |
3856 | } | |
3857 | ||
3858 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
3859 | show_measurement, store_measurement); | |
c8b0e6e1 | 3860 | #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
3861 | |
3862 | static ssize_t store_retry_rate(struct device *d, | |
3863 | struct device_attribute *attr, | |
3864 | const char *buf, size_t count) | |
3865 | { | |
c79dd5b5 | 3866 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3867 | |
3868 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | |
3869 | if (priv->retry_rate <= 0) | |
3870 | priv->retry_rate = 1; | |
3871 | ||
3872 | return count; | |
3873 | } | |
3874 | ||
3875 | static ssize_t show_retry_rate(struct device *d, | |
3876 | struct device_attribute *attr, char *buf) | |
3877 | { | |
c79dd5b5 | 3878 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3879 | return sprintf(buf, "%d", priv->retry_rate); |
3880 | } | |
3881 | ||
3882 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
3883 | store_retry_rate); | |
3884 | ||
3885 | static ssize_t store_power_level(struct device *d, | |
3886 | struct device_attribute *attr, | |
3887 | const char *buf, size_t count) | |
3888 | { | |
c79dd5b5 | 3889 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 | 3890 | int ret; |
b481de9c ZY |
3891 | int mode; |
3892 | ||
3893 | mode = simple_strtoul(buf, NULL, 0); | |
3894 | mutex_lock(&priv->mutex); | |
3895 | ||
fee1247a | 3896 | if (!iwl_is_ready(priv)) { |
298df1f6 | 3897 | ret = -EAGAIN; |
b481de9c ZY |
3898 | goto out; |
3899 | } | |
3900 | ||
298df1f6 EK |
3901 | ret = iwl_power_set_user_mode(priv, mode); |
3902 | if (ret) { | |
5da4b55f MA |
3903 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); |
3904 | goto out; | |
b481de9c | 3905 | } |
298df1f6 | 3906 | ret = count; |
b481de9c ZY |
3907 | |
3908 | out: | |
3909 | mutex_unlock(&priv->mutex); | |
298df1f6 | 3910 | return ret; |
b481de9c ZY |
3911 | } |
3912 | ||
b481de9c ZY |
3913 | static ssize_t show_power_level(struct device *d, |
3914 | struct device_attribute *attr, char *buf) | |
3915 | { | |
c79dd5b5 | 3916 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 EK |
3917 | int mode = priv->power_data.user_power_setting; |
3918 | int system = priv->power_data.system_power_setting; | |
5da4b55f | 3919 | int level = priv->power_data.power_mode; |
b481de9c ZY |
3920 | char *p = buf; |
3921 | ||
298df1f6 EK |
3922 | switch (system) { |
3923 | case IWL_POWER_SYS_AUTO: | |
3924 | p += sprintf(p, "SYSTEM:auto"); | |
b481de9c | 3925 | break; |
298df1f6 EK |
3926 | case IWL_POWER_SYS_AC: |
3927 | p += sprintf(p, "SYSTEM:ac"); | |
3928 | break; | |
3929 | case IWL_POWER_SYS_BATTERY: | |
3930 | p += sprintf(p, "SYSTEM:battery"); | |
b481de9c | 3931 | break; |
b481de9c | 3932 | } |
298df1f6 EK |
3933 | |
3934 | p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto"); | |
3935 | p += sprintf(p, "\tINDEX:%d", level); | |
3936 | p += sprintf(p, "\n"); | |
b481de9c | 3937 | return (p - buf + 1); |
b481de9c ZY |
3938 | } |
3939 | ||
3940 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
3941 | store_power_level); | |
3942 | ||
3943 | static ssize_t show_channels(struct device *d, | |
3944 | struct device_attribute *attr, char *buf) | |
3945 | { | |
5d72a1f5 EK |
3946 | |
3947 | struct iwl_priv *priv = dev_get_drvdata(d); | |
3948 | struct ieee80211_channel *channels = NULL; | |
3949 | const struct ieee80211_supported_band *supp_band = NULL; | |
3950 | int len = 0, i; | |
3951 | int count = 0; | |
3952 | ||
3953 | if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status)) | |
3954 | return -EAGAIN; | |
3955 | ||
3956 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ); | |
3957 | channels = supp_band->channels; | |
3958 | count = supp_band->n_channels; | |
3959 | ||
3960 | len += sprintf(&buf[len], | |
3961 | "Displaying %d channels in 2.4GHz band " | |
3962 | "(802.11bg):\n", count); | |
3963 | ||
3964 | for (i = 0; i < count; i++) | |
3965 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
3966 | ieee80211_frequency_to_channel( | |
3967 | channels[i].center_freq), | |
3968 | channels[i].max_power, | |
3969 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
3970 | " (IEEE 802.11h required)" : "", | |
3971 | (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
3972 | || (channels[i].flags & | |
3973 | IEEE80211_CHAN_RADAR)) ? "" : | |
3974 | ", IBSS", | |
3975 | channels[i].flags & | |
3976 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
3977 | "passive only" : "active/passive"); | |
3978 | ||
3979 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ); | |
3980 | channels = supp_band->channels; | |
3981 | count = supp_band->n_channels; | |
3982 | ||
3983 | len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band " | |
3984 | "(802.11a):\n", count); | |
3985 | ||
3986 | for (i = 0; i < count; i++) | |
3987 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
3988 | ieee80211_frequency_to_channel( | |
3989 | channels[i].center_freq), | |
3990 | channels[i].max_power, | |
3991 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
3992 | " (IEEE 802.11h required)" : "", | |
3993 | ((channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
3994 | || (channels[i].flags & | |
3995 | IEEE80211_CHAN_RADAR)) ? "" : | |
3996 | ", IBSS", | |
3997 | channels[i].flags & | |
3998 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
3999 | "passive only" : "active/passive"); | |
4000 | ||
4001 | return len; | |
b481de9c ZY |
4002 | } |
4003 | ||
4004 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
4005 | ||
4006 | static ssize_t show_statistics(struct device *d, | |
4007 | struct device_attribute *attr, char *buf) | |
4008 | { | |
c79dd5b5 | 4009 | struct iwl_priv *priv = dev_get_drvdata(d); |
8f91aecb | 4010 | u32 size = sizeof(struct iwl_notif_statistics); |
b481de9c ZY |
4011 | u32 len = 0, ofs = 0; |
4012 | u8 *data = (u8 *) & priv->statistics; | |
4013 | int rc = 0; | |
4014 | ||
fee1247a | 4015 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4016 | return -EAGAIN; |
4017 | ||
4018 | mutex_lock(&priv->mutex); | |
49ea8596 | 4019 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
4020 | mutex_unlock(&priv->mutex); |
4021 | ||
4022 | if (rc) { | |
4023 | len = sprintf(buf, | |
4024 | "Error sending statistics request: 0x%08X\n", rc); | |
4025 | return len; | |
4026 | } | |
4027 | ||
4028 | while (size && (PAGE_SIZE - len)) { | |
4029 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
4030 | PAGE_SIZE - len, 1); | |
4031 | len = strlen(buf); | |
4032 | if (PAGE_SIZE - len) | |
4033 | buf[len++] = '\n'; | |
4034 | ||
4035 | ofs += 16; | |
4036 | size -= min(size, 16U); | |
4037 | } | |
4038 | ||
4039 | return len; | |
4040 | } | |
4041 | ||
4042 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
4043 | ||
b481de9c ZY |
4044 | static ssize_t show_status(struct device *d, |
4045 | struct device_attribute *attr, char *buf) | |
4046 | { | |
c79dd5b5 | 4047 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 4048 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4049 | return -EAGAIN; |
4050 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
4051 | } | |
4052 | ||
4053 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
4054 | ||
b481de9c ZY |
4055 | /***************************************************************************** |
4056 | * | |
4057 | * driver setup and teardown | |
4058 | * | |
4059 | *****************************************************************************/ | |
4060 | ||
4e39317d | 4061 | static void iwl_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
4062 | { |
4063 | priv->workqueue = create_workqueue(DRV_NAME); | |
4064 | ||
4065 | init_waitqueue_head(&priv->wait_command_queue); | |
4066 | ||
bb8c093b CH |
4067 | INIT_WORK(&priv->up, iwl4965_bg_up); |
4068 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
4069 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
bb8c093b CH |
4070 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); |
4071 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
4419e39b | 4072 | INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor); |
16e727e8 | 4073 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); |
4a4a9e81 TW |
4074 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start); |
4075 | INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start); | |
2a421b91 TW |
4076 | |
4077 | /* FIXME : remove when resolved PENDING */ | |
4078 | INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed); | |
4079 | iwl_setup_scan_deferred_work(priv); | |
bb8c093b | 4080 | |
4e39317d EG |
4081 | if (priv->cfg->ops->lib->setup_deferred_work) |
4082 | priv->cfg->ops->lib->setup_deferred_work(priv); | |
4083 | ||
4084 | init_timer(&priv->statistics_periodic); | |
4085 | priv->statistics_periodic.data = (unsigned long)priv; | |
4086 | priv->statistics_periodic.function = iwl4965_bg_statistics_periodic; | |
b481de9c ZY |
4087 | |
4088 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 4089 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
4090 | } |
4091 | ||
4e39317d | 4092 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 4093 | { |
4e39317d EG |
4094 | if (priv->cfg->ops->lib->cancel_deferred_work) |
4095 | priv->cfg->ops->lib->cancel_deferred_work(priv); | |
b481de9c | 4096 | |
3ae6a054 | 4097 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c ZY |
4098 | cancel_delayed_work(&priv->scan_check); |
4099 | cancel_delayed_work(&priv->alive_start); | |
b481de9c | 4100 | cancel_work_sync(&priv->beacon_update); |
4e39317d | 4101 | del_timer_sync(&priv->statistics_periodic); |
b481de9c ZY |
4102 | } |
4103 | ||
bb8c093b | 4104 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c | 4105 | &dev_attr_channels.attr, |
b481de9c ZY |
4106 | &dev_attr_flags.attr, |
4107 | &dev_attr_filter_flags.attr, | |
c8b0e6e1 | 4108 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
4109 | &dev_attr_measurement.attr, |
4110 | #endif | |
4111 | &dev_attr_power_level.attr, | |
4112 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
4113 | &dev_attr_statistics.attr, |
4114 | &dev_attr_status.attr, | |
4115 | &dev_attr_temperature.attr, | |
b481de9c | 4116 | &dev_attr_tx_power.attr, |
8cf769c6 EK |
4117 | #ifdef CONFIG_IWLWIFI_DEBUG |
4118 | &dev_attr_debug_level.attr, | |
4119 | #endif | |
bc6f59bc | 4120 | &dev_attr_version.attr, |
b481de9c ZY |
4121 | |
4122 | NULL | |
4123 | }; | |
4124 | ||
bb8c093b | 4125 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 4126 | .name = NULL, /* put in device directory */ |
bb8c093b | 4127 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
4128 | }; |
4129 | ||
bb8c093b CH |
4130 | static struct ieee80211_ops iwl4965_hw_ops = { |
4131 | .tx = iwl4965_mac_tx, | |
4132 | .start = iwl4965_mac_start, | |
4133 | .stop = iwl4965_mac_stop, | |
4134 | .add_interface = iwl4965_mac_add_interface, | |
4135 | .remove_interface = iwl4965_mac_remove_interface, | |
4136 | .config = iwl4965_mac_config, | |
4137 | .config_interface = iwl4965_mac_config_interface, | |
4138 | .configure_filter = iwl4965_configure_filter, | |
4139 | .set_key = iwl4965_mac_set_key, | |
ab885f8c | 4140 | .update_tkip_key = iwl4965_mac_update_tkip_key, |
bb8c093b CH |
4141 | .get_stats = iwl4965_mac_get_stats, |
4142 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
4143 | .conf_tx = iwl4965_mac_conf_tx, | |
bb8c093b | 4144 | .reset_tsf = iwl4965_mac_reset_tsf, |
471b3efd | 4145 | .bss_info_changed = iwl4965_bss_info_changed, |
9ab46173 | 4146 | .ampdu_action = iwl4965_mac_ampdu_action, |
bb8c093b | 4147 | .hw_scan = iwl4965_mac_hw_scan |
b481de9c ZY |
4148 | }; |
4149 | ||
bb8c093b | 4150 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
4151 | { |
4152 | int err = 0; | |
c79dd5b5 | 4153 | struct iwl_priv *priv; |
b481de9c | 4154 | struct ieee80211_hw *hw; |
82b9a121 | 4155 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 4156 | unsigned long flags; |
5a66926a | 4157 | DECLARE_MAC_BUF(mac); |
b481de9c | 4158 | |
316c30d9 AK |
4159 | /************************ |
4160 | * 1. Allocating HW data | |
4161 | ************************/ | |
4162 | ||
6440adb5 CB |
4163 | /* Disabling hardware scan means that mac80211 will perform scans |
4164 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 4165 | if (cfg->mod_params->disable_hw_scan) { |
bf403db8 EK |
4166 | if (cfg->mod_params->debug & IWL_DL_INFO) |
4167 | dev_printk(KERN_DEBUG, &(pdev->dev), | |
4168 | "Disabling hw_scan\n"); | |
bb8c093b | 4169 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
4170 | } |
4171 | ||
1d0a082d AK |
4172 | hw = iwl_alloc_all(cfg, &iwl4965_hw_ops); |
4173 | if (!hw) { | |
b481de9c ZY |
4174 | err = -ENOMEM; |
4175 | goto out; | |
4176 | } | |
1d0a082d AK |
4177 | priv = hw->priv; |
4178 | /* At this point both hw and priv are allocated. */ | |
4179 | ||
b481de9c ZY |
4180 | SET_IEEE80211_DEV(hw, &pdev->dev); |
4181 | ||
4182 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 4183 | priv->cfg = cfg; |
b481de9c | 4184 | priv->pci_dev = pdev; |
316c30d9 | 4185 | |
0a6857e7 | 4186 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 4187 | priv->debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
4188 | atomic_set(&priv->restrict_refcnt, 0); |
4189 | #endif | |
b481de9c | 4190 | |
316c30d9 AK |
4191 | /************************** |
4192 | * 2. Initializing PCI bus | |
4193 | **************************/ | |
4194 | if (pci_enable_device(pdev)) { | |
4195 | err = -ENODEV; | |
4196 | goto out_ieee80211_free_hw; | |
4197 | } | |
4198 | ||
4199 | pci_set_master(pdev); | |
4200 | ||
cc2a8ea8 | 4201 | err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); |
316c30d9 | 4202 | if (!err) |
cc2a8ea8 RR |
4203 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
4204 | if (err) { | |
4205 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
4206 | if (!err) | |
4207 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
4208 | /* both attempts failed: */ | |
316c30d9 | 4209 | if (err) { |
cc2a8ea8 RR |
4210 | printk(KERN_WARNING "%s: No suitable DMA available.\n", |
4211 | DRV_NAME); | |
316c30d9 | 4212 | goto out_pci_disable_device; |
cc2a8ea8 | 4213 | } |
316c30d9 AK |
4214 | } |
4215 | ||
4216 | err = pci_request_regions(pdev, DRV_NAME); | |
4217 | if (err) | |
4218 | goto out_pci_disable_device; | |
4219 | ||
4220 | pci_set_drvdata(pdev, priv); | |
4221 | ||
4222 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | |
4223 | * PCI Tx retries from interfering with C3 CPU state */ | |
4224 | pci_write_config_byte(pdev, 0x41, 0x00); | |
4225 | ||
4226 | /*********************** | |
4227 | * 3. Read REV register | |
4228 | ***********************/ | |
4229 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
4230 | if (!priv->hw_base) { | |
4231 | err = -ENODEV; | |
4232 | goto out_pci_release_regions; | |
4233 | } | |
4234 | ||
4235 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
4236 | (unsigned long long) pci_resource_len(pdev, 0)); | |
4237 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
4238 | ||
b661c819 | 4239 | iwl_hw_detect(priv); |
316c30d9 | 4240 | printk(KERN_INFO DRV_NAME |
b661c819 TW |
4241 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
4242 | priv->cfg->name, priv->hw_rev); | |
316c30d9 | 4243 | |
91238714 TW |
4244 | /* amp init */ |
4245 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
316c30d9 | 4246 | if (err < 0) { |
91238714 | 4247 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
316c30d9 AK |
4248 | goto out_iounmap; |
4249 | } | |
91238714 TW |
4250 | /***************** |
4251 | * 4. Read EEPROM | |
4252 | *****************/ | |
316c30d9 AK |
4253 | /* Read the EEPROM */ |
4254 | err = iwl_eeprom_init(priv); | |
4255 | if (err) { | |
4256 | IWL_ERROR("Unable to init EEPROM\n"); | |
4257 | goto out_iounmap; | |
4258 | } | |
8614f360 TW |
4259 | err = iwl_eeprom_check_version(priv); |
4260 | if (err) | |
4261 | goto out_iounmap; | |
4262 | ||
02883017 | 4263 | /* extract MAC Address */ |
316c30d9 AK |
4264 | iwl_eeprom_get_mac(priv, priv->mac_addr); |
4265 | IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr)); | |
4266 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | |
4267 | ||
4268 | /************************ | |
4269 | * 5. Setup HW constants | |
4270 | ************************/ | |
da154e30 | 4271 | if (iwl_set_hw_params(priv)) { |
5425e490 | 4272 | IWL_ERROR("failed to set hw parameters\n"); |
073d3f5f | 4273 | goto out_free_eeprom; |
316c30d9 AK |
4274 | } |
4275 | ||
4276 | /******************* | |
6ba87956 | 4277 | * 6. Setup priv |
316c30d9 | 4278 | *******************/ |
b481de9c | 4279 | |
6ba87956 | 4280 | err = iwl_init_drv(priv); |
bf85ea4f | 4281 | if (err) |
399f4900 | 4282 | goto out_free_eeprom; |
bf85ea4f | 4283 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
4284 | |
4285 | /********************************** | |
4286 | * 7. Initialize module parameters | |
4287 | **********************************/ | |
4288 | ||
4289 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 4290 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
4291 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
4292 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
4293 | } | |
4294 | ||
316c30d9 AK |
4295 | /******************** |
4296 | * 8. Setup services | |
4297 | ********************/ | |
0359facc | 4298 | spin_lock_irqsave(&priv->lock, flags); |
316c30d9 | 4299 | iwl4965_disable_interrupts(priv); |
0359facc | 4300 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 AK |
4301 | |
4302 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4303 | if (err) { | |
4304 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
6ba87956 | 4305 | goto out_uninit_drv; |
316c30d9 AK |
4306 | } |
4307 | ||
316c30d9 | 4308 | |
4e39317d | 4309 | iwl_setup_deferred_work(priv); |
653fa4a0 | 4310 | iwl_setup_rx_handlers(priv); |
316c30d9 AK |
4311 | |
4312 | /******************** | |
4313 | * 9. Conclude | |
4314 | ********************/ | |
5a66926a ZY |
4315 | pci_save_state(pdev); |
4316 | pci_disable_device(pdev); | |
b481de9c | 4317 | |
6ba87956 TW |
4318 | /********************************** |
4319 | * 10. Setup and register mac80211 | |
4320 | **********************************/ | |
4321 | ||
4322 | err = iwl_setup_mac(priv); | |
4323 | if (err) | |
4324 | goto out_remove_sysfs; | |
4325 | ||
4326 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
4327 | if (err) | |
4328 | IWL_ERROR("failed to create debugfs files\n"); | |
4329 | ||
58d0f361 EG |
4330 | err = iwl_rfkill_init(priv); |
4331 | if (err) | |
4332 | IWL_ERROR("Unable to initialize RFKILL system. " | |
4333 | "Ignoring error: %d\n", err); | |
4334 | iwl_power_initialize(priv); | |
b481de9c ZY |
4335 | return 0; |
4336 | ||
316c30d9 AK |
4337 | out_remove_sysfs: |
4338 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
6ba87956 TW |
4339 | out_uninit_drv: |
4340 | iwl_uninit_drv(priv); | |
073d3f5f TW |
4341 | out_free_eeprom: |
4342 | iwl_eeprom_free(priv); | |
b481de9c ZY |
4343 | out_iounmap: |
4344 | pci_iounmap(pdev, priv->hw_base); | |
4345 | out_pci_release_regions: | |
4346 | pci_release_regions(pdev); | |
316c30d9 | 4347 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
4348 | out_pci_disable_device: |
4349 | pci_disable_device(pdev); | |
b481de9c ZY |
4350 | out_ieee80211_free_hw: |
4351 | ieee80211_free_hw(priv->hw); | |
4352 | out: | |
4353 | return err; | |
4354 | } | |
4355 | ||
c83dbf68 | 4356 | static void __devexit iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 4357 | { |
c79dd5b5 | 4358 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
0359facc | 4359 | unsigned long flags; |
b481de9c ZY |
4360 | |
4361 | if (!priv) | |
4362 | return; | |
4363 | ||
4364 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
4365 | ||
67249625 EG |
4366 | iwl_dbgfs_unregister(priv); |
4367 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4368 | ||
c4f55232 RR |
4369 | if (priv->mac80211_registered) { |
4370 | ieee80211_unregister_hw(priv->hw); | |
4371 | priv->mac80211_registered = 0; | |
4372 | } | |
4373 | ||
b481de9c | 4374 | set_bit(STATUS_EXIT_PENDING, &priv->status); |
b24d22b1 | 4375 | |
bb8c093b | 4376 | iwl4965_down(priv); |
b481de9c | 4377 | |
0359facc MA |
4378 | /* make sure we flush any pending irq or |
4379 | * tasklet for the driver | |
4380 | */ | |
4381 | spin_lock_irqsave(&priv->lock, flags); | |
4382 | iwl4965_disable_interrupts(priv); | |
4383 | spin_unlock_irqrestore(&priv->lock, flags); | |
4384 | ||
4385 | iwl_synchronize_irq(priv); | |
4386 | ||
58d0f361 | 4387 | iwl_rfkill_unregister(priv); |
bb8c093b | 4388 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
4389 | |
4390 | if (priv->rxq.bd) | |
a55360e4 | 4391 | iwl_rx_queue_free(priv, &priv->rxq); |
1053d35f | 4392 | iwl_hw_txq_ctx_free(priv); |
b481de9c | 4393 | |
37deb2a0 | 4394 | iwl_clear_stations_table(priv); |
073d3f5f | 4395 | iwl_eeprom_free(priv); |
b481de9c | 4396 | |
b481de9c | 4397 | |
948c171c MA |
4398 | /*netif_stop_queue(dev); */ |
4399 | flush_workqueue(priv->workqueue); | |
4400 | ||
bb8c093b | 4401 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
4402 | * priv->workqueue... so we can't take down the workqueue |
4403 | * until now... */ | |
4404 | destroy_workqueue(priv->workqueue); | |
4405 | priv->workqueue = NULL; | |
4406 | ||
b481de9c ZY |
4407 | pci_iounmap(pdev, priv->hw_base); |
4408 | pci_release_regions(pdev); | |
4409 | pci_disable_device(pdev); | |
4410 | pci_set_drvdata(pdev, NULL); | |
4411 | ||
6ba87956 | 4412 | iwl_uninit_drv(priv); |
b481de9c ZY |
4413 | |
4414 | if (priv->ibss_beacon) | |
4415 | dev_kfree_skb(priv->ibss_beacon); | |
4416 | ||
4417 | ieee80211_free_hw(priv->hw); | |
4418 | } | |
4419 | ||
4420 | #ifdef CONFIG_PM | |
4421 | ||
bb8c093b | 4422 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 4423 | { |
c79dd5b5 | 4424 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4425 | |
e655b9f0 ZY |
4426 | if (priv->is_open) { |
4427 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
4428 | iwl4965_mac_stop(priv->hw); | |
4429 | priv->is_open = 1; | |
4430 | } | |
b481de9c | 4431 | |
b481de9c ZY |
4432 | pci_set_power_state(pdev, PCI_D3hot); |
4433 | ||
b481de9c ZY |
4434 | return 0; |
4435 | } | |
4436 | ||
bb8c093b | 4437 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 4438 | { |
c79dd5b5 | 4439 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4440 | |
b481de9c | 4441 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 4442 | |
e655b9f0 ZY |
4443 | if (priv->is_open) |
4444 | iwl4965_mac_start(priv->hw); | |
b481de9c | 4445 | |
e655b9f0 | 4446 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
4447 | return 0; |
4448 | } | |
4449 | ||
4450 | #endif /* CONFIG_PM */ | |
4451 | ||
4452 | /***************************************************************************** | |
4453 | * | |
4454 | * driver and module entry point | |
4455 | * | |
4456 | *****************************************************************************/ | |
4457 | ||
fed9017e RR |
4458 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
4459 | static struct pci_device_id iwl_hw_card_ids[] = { | |
4460 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
4461 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
5a6a256e | 4462 | #ifdef CONFIG_IWL5000 |
47408639 EK |
4463 | {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)}, |
4464 | {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)}, | |
4465 | {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, | |
4466 | {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, | |
4467 | {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, | |
4468 | {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, | |
5a6a256e | 4469 | {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, |
47408639 EK |
4470 | {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, |
4471 | {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)}, | |
4472 | {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)}, | |
5a6a256e TW |
4473 | {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)}, |
4474 | #endif /* CONFIG_IWL5000 */ | |
fed9017e RR |
4475 | {0} |
4476 | }; | |
4477 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
4478 | ||
4479 | static struct pci_driver iwl_driver = { | |
b481de9c | 4480 | .name = DRV_NAME, |
fed9017e | 4481 | .id_table = iwl_hw_card_ids, |
bb8c093b CH |
4482 | .probe = iwl4965_pci_probe, |
4483 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 4484 | #ifdef CONFIG_PM |
bb8c093b CH |
4485 | .suspend = iwl4965_pci_suspend, |
4486 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
4487 | #endif |
4488 | }; | |
4489 | ||
bb8c093b | 4490 | static int __init iwl4965_init(void) |
b481de9c ZY |
4491 | { |
4492 | ||
4493 | int ret; | |
4494 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
4495 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 | 4496 | |
e227ceac | 4497 | ret = iwlagn_rate_control_register(); |
897e1cf2 RC |
4498 | if (ret) { |
4499 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
4500 | return ret; | |
4501 | } | |
4502 | ||
fed9017e | 4503 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
4504 | if (ret) { |
4505 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 4506 | goto error_register; |
b481de9c | 4507 | } |
b481de9c ZY |
4508 | |
4509 | return ret; | |
897e1cf2 | 4510 | |
897e1cf2 | 4511 | error_register: |
e227ceac | 4512 | iwlagn_rate_control_unregister(); |
897e1cf2 | 4513 | return ret; |
b481de9c ZY |
4514 | } |
4515 | ||
bb8c093b | 4516 | static void __exit iwl4965_exit(void) |
b481de9c | 4517 | { |
fed9017e | 4518 | pci_unregister_driver(&iwl_driver); |
e227ceac | 4519 | iwlagn_rate_control_unregister(); |
b481de9c ZY |
4520 | } |
4521 | ||
bb8c093b CH |
4522 | module_exit(iwl4965_exit); |
4523 | module_init(iwl4965_init); |