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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
b481de9c ZY |
32 | #include <linux/init.h> |
33 | #include <linux/pci.h> | |
34 | #include <linux/dma-mapping.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/skbuff.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/wireless.h> | |
39 | #include <linux/firmware.h> | |
b481de9c ZY |
40 | #include <linux/etherdevice.h> |
41 | #include <linux/if_arp.h> | |
42 | ||
b481de9c ZY |
43 | #include <net/mac80211.h> |
44 | ||
45 | #include <asm/div64.h> | |
46 | ||
6bc913bd | 47 | #include "iwl-eeprom.h" |
3e0d4cb1 | 48 | #include "iwl-dev.h" |
fee1247a | 49 | #include "iwl-core.h" |
3395f6e9 | 50 | #include "iwl-io.h" |
b481de9c | 51 | #include "iwl-helpers.h" |
6974e363 | 52 | #include "iwl-sta.h" |
f0832f13 | 53 | #include "iwl-calib.h" |
b481de9c | 54 | |
416e1438 | 55 | |
b481de9c ZY |
56 | /****************************************************************************** |
57 | * | |
58 | * module boiler plate | |
59 | * | |
60 | ******************************************************************************/ | |
61 | ||
b481de9c ZY |
62 | /* |
63 | * module name, copyright, version, etc. | |
64 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
65 | */ | |
66 | ||
d783b061 | 67 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
b481de9c | 68 | |
0a6857e7 | 69 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
70 | #define VD "d" |
71 | #else | |
72 | #define VD | |
73 | #endif | |
74 | ||
4fc22b21 | 75 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
76 | #define VS "s" |
77 | #else | |
78 | #define VS | |
79 | #endif | |
80 | ||
df48c323 | 81 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 82 | |
b481de9c ZY |
83 | |
84 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
85 | MODULE_VERSION(DRV_VERSION); | |
86 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
87 | MODULE_LICENSE("GPL"); | |
4fc22b21 | 88 | MODULE_ALIAS("iwl4965"); |
b481de9c | 89 | |
b481de9c | 90 | /*************** STATION TABLE MANAGEMENT **** |
9fbab516 | 91 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
92 | * the functionality provided here |
93 | */ | |
94 | ||
95 | /**************************************************************/ | |
96 | ||
b481de9c | 97 | |
b481de9c | 98 | |
5b9f8cd3 | 99 | static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
deb09c43 | 100 | { |
c1adf9fb | 101 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
deb09c43 EG |
102 | |
103 | if (hw_decrypt) | |
104 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
105 | else | |
106 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
107 | ||
108 | } | |
109 | ||
b481de9c | 110 | /** |
5b9f8cd3 | 111 | * iwl_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
112 | * |
113 | * NOTE: This is really only useful during development and can eventually | |
114 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
115 | * making changes | |
116 | */ | |
5b9f8cd3 | 117 | static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon) |
b481de9c ZY |
118 | { |
119 | int error = 0; | |
120 | int counter = 1; | |
121 | ||
122 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
123 | error |= le32_to_cpu(rxon->flags & | |
124 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
125 | RXON_FLG_RADAR_DETECT_MSK)); | |
126 | if (error) | |
127 | IWL_WARNING("check 24G fields %d | %d\n", | |
128 | counter++, error); | |
129 | } else { | |
130 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
131 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
132 | if (error) | |
133 | IWL_WARNING("check 52 fields %d | %d\n", | |
134 | counter++, error); | |
135 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
136 | if (error) | |
137 | IWL_WARNING("check 52 CCK %d | %d\n", | |
138 | counter++, error); | |
139 | } | |
140 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
141 | if (error) | |
142 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
143 | ||
144 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
145 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
146 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
147 | if (error) | |
148 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
149 | ||
150 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
151 | if (error) | |
152 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
153 | ||
154 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
155 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
156 | if (error) | |
157 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
158 | counter++, error); | |
159 | ||
160 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
161 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
162 | if (error) | |
163 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
164 | counter++, error); | |
165 | ||
166 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
167 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
168 | if (error) | |
169 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
170 | counter++, error); | |
171 | ||
172 | if (error) | |
173 | IWL_WARNING("Tuning to channel %d\n", | |
174 | le16_to_cpu(rxon->channel)); | |
175 | ||
176 | if (error) { | |
5b9f8cd3 | 177 | IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
178 | return -1; |
179 | } | |
180 | return 0; | |
181 | } | |
182 | ||
183 | /** | |
54559703 | 184 | * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 185 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 186 | * |
9fbab516 BC |
187 | * If the RXON structure is changing enough to require a new tune, |
188 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
189 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 190 | */ |
54559703 | 191 | static int iwl_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
192 | { |
193 | ||
194 | /* These items are only settable from the full RXON command */ | |
5d1e2325 | 195 | if (!(iwl_is_associated(priv)) || |
b481de9c ZY |
196 | compare_ether_addr(priv->staging_rxon.bssid_addr, |
197 | priv->active_rxon.bssid_addr) || | |
198 | compare_ether_addr(priv->staging_rxon.node_addr, | |
199 | priv->active_rxon.node_addr) || | |
200 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
201 | priv->active_rxon.wlap_bssid_addr) || | |
202 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
203 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
204 | (priv->staging_rxon.air_propagation != | |
205 | priv->active_rxon.air_propagation) || | |
206 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
207 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
208 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
209 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
b481de9c ZY |
210 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) |
211 | return 1; | |
212 | ||
213 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
214 | * be updated with the RXON_ASSOC command -- however only some | |
215 | * flag transitions are allowed using RXON_ASSOC */ | |
216 | ||
217 | /* Check if we are not switching bands */ | |
218 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
219 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
220 | return 1; | |
221 | ||
222 | /* Check if we are switching association toggle */ | |
223 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
224 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
225 | return 1; | |
226 | ||
227 | return 0; | |
228 | } | |
229 | ||
b481de9c | 230 | /** |
5b9f8cd3 | 231 | * iwl_commit_rxon - commit staging_rxon to hardware |
b481de9c | 232 | * |
01ebd063 | 233 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
234 | * the active_rxon structure is updated with the new data. This |
235 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
236 | * a HW tune is required based on the RXON structure changes. | |
237 | */ | |
5b9f8cd3 | 238 | static int iwl_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
239 | { |
240 | /* cast away the const for active_rxon in this function */ | |
c1adf9fb | 241 | struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
43d59b32 EG |
242 | int ret; |
243 | bool new_assoc = | |
244 | !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK); | |
b481de9c | 245 | |
fee1247a | 246 | if (!iwl_is_alive(priv)) |
43d59b32 | 247 | return -EBUSY; |
b481de9c ZY |
248 | |
249 | /* always get timestamp with Rx frame */ | |
250 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
a326a5d0 EG |
251 | /* allow CTS-to-self if possible. this is relevant only for |
252 | * 5000, but will not damage 4965 */ | |
253 | priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; | |
b481de9c | 254 | |
5b9f8cd3 | 255 | ret = iwl_check_rxon_cmd(&priv->staging_rxon); |
43d59b32 | 256 | if (ret) { |
b481de9c ZY |
257 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); |
258 | return -EINVAL; | |
259 | } | |
260 | ||
261 | /* If we don't need to send a full RXON, we can use | |
5b9f8cd3 | 262 | * iwl_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 263 | * and other flags for the current radio configuration. */ |
54559703 | 264 | if (!iwl_full_rxon_required(priv)) { |
43d59b32 EG |
265 | ret = iwl_send_rxon_assoc(priv); |
266 | if (ret) { | |
267 | IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret); | |
268 | return ret; | |
b481de9c ZY |
269 | } |
270 | ||
271 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
272 | return 0; |
273 | } | |
274 | ||
275 | /* station table will be cleared */ | |
276 | priv->assoc_station_added = 0; | |
277 | ||
b481de9c ZY |
278 | /* If we are currently associated and the new config requires |
279 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
280 | * we must clear the associated from the active configuration | |
281 | * before we apply the new config */ | |
43d59b32 | 282 | if (iwl_is_associated(priv) && new_assoc) { |
b481de9c ZY |
283 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); |
284 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
285 | ||
43d59b32 | 286 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, |
c1adf9fb | 287 | sizeof(struct iwl_rxon_cmd), |
b481de9c ZY |
288 | &priv->active_rxon); |
289 | ||
290 | /* If the mask clearing failed then we set | |
291 | * active_rxon back to what it was previously */ | |
43d59b32 | 292 | if (ret) { |
b481de9c | 293 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; |
43d59b32 EG |
294 | IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret); |
295 | return ret; | |
b481de9c | 296 | } |
b481de9c ZY |
297 | } |
298 | ||
299 | IWL_DEBUG_INFO("Sending RXON\n" | |
300 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
301 | "* channel = %d\n" | |
e174961c | 302 | "* bssid = %pM\n", |
43d59b32 | 303 | (new_assoc ? "" : "out"), |
b481de9c | 304 | le16_to_cpu(priv->staging_rxon.channel), |
e174961c | 305 | priv->staging_rxon.bssid_addr); |
b481de9c | 306 | |
5b9f8cd3 | 307 | iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
43d59b32 EG |
308 | |
309 | /* Apply the new configuration | |
310 | * RXON unassoc clears the station table in uCode, send it before | |
311 | * we add the bcast station. If assoc bit is set, we will send RXON | |
312 | * after having added the bcast and bssid station. | |
313 | */ | |
314 | if (!new_assoc) { | |
315 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
c1adf9fb | 316 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); |
43d59b32 EG |
317 | if (ret) { |
318 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
319 | return ret; | |
320 | } | |
321 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
322 | } |
323 | ||
37deb2a0 | 324 | iwl_clear_stations_table(priv); |
556f8db7 | 325 | |
b481de9c ZY |
326 | if (!priv->error_recovering) |
327 | priv->start_calib = 0; | |
328 | ||
b481de9c | 329 | /* Add the broadcast address so we can send broadcast frames */ |
4f40e4d9 | 330 | if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == |
43d59b32 | 331 | IWL_INVALID_STATION) { |
b481de9c ZY |
332 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); |
333 | return -EIO; | |
334 | } | |
335 | ||
336 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
337 | * add the IWL_AP_ID to the station rate table */ | |
9185159d | 338 | if (new_assoc) { |
05c914fe | 339 | if (priv->iw_mode == NL80211_IFTYPE_STATION) { |
9185159d TW |
340 | ret = iwl_rxon_add_station(priv, |
341 | priv->active_rxon.bssid_addr, 1); | |
342 | if (ret == IWL_INVALID_STATION) { | |
343 | IWL_ERROR("Error adding AP address for TX.\n"); | |
344 | return -EIO; | |
345 | } | |
346 | priv->assoc_station_added = 1; | |
347 | if (priv->default_wep_key && | |
348 | iwl_send_static_wepkey_cmd(priv, 0)) | |
349 | IWL_ERROR("Could not send WEP static key.\n"); | |
b481de9c | 350 | } |
43d59b32 EG |
351 | |
352 | /* Apply the new configuration | |
353 | * RXON assoc doesn't clear the station table in uCode, | |
354 | */ | |
355 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
356 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); | |
357 | if (ret) { | |
358 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
359 | return ret; | |
360 | } | |
361 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
362 | } |
363 | ||
36da7d70 ZY |
364 | iwl_init_sensitivity(priv); |
365 | ||
366 | /* If we issue a new RXON command which required a tune then we must | |
367 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
368 | ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); | |
369 | if (ret) { | |
370 | IWL_ERROR("Error sending TX power (%d)\n", ret); | |
371 | return ret; | |
372 | } | |
373 | ||
b481de9c ZY |
374 | return 0; |
375 | } | |
376 | ||
5b9f8cd3 | 377 | void iwl_update_chain_flags(struct iwl_priv *priv) |
5da4b55f MA |
378 | { |
379 | ||
c7de35cd | 380 | iwl_set_rxon_chain(priv); |
5b9f8cd3 | 381 | iwl_commit_rxon(priv); |
5da4b55f MA |
382 | } |
383 | ||
5b9f8cd3 | 384 | static int iwl_send_bt_config(struct iwl_priv *priv) |
b481de9c | 385 | { |
bb8c093b | 386 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
387 | .flags = 3, |
388 | .lead_time = 0xAA, | |
389 | .max_kill = 1, | |
390 | .kill_ack_mask = 0, | |
391 | .kill_cts_mask = 0, | |
392 | }; | |
393 | ||
857485c0 | 394 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 395 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
396 | } |
397 | ||
fcab423d | 398 | static void iwl_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
399 | { |
400 | struct list_head *element; | |
401 | ||
402 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
403 | priv->frames_count); | |
404 | ||
405 | while (!list_empty(&priv->free_frames)) { | |
406 | element = priv->free_frames.next; | |
407 | list_del(element); | |
fcab423d | 408 | kfree(list_entry(element, struct iwl_frame, list)); |
b481de9c ZY |
409 | priv->frames_count--; |
410 | } | |
411 | ||
412 | if (priv->frames_count) { | |
413 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
414 | priv->frames_count); | |
415 | priv->frames_count = 0; | |
416 | } | |
417 | } | |
418 | ||
fcab423d | 419 | static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv) |
b481de9c | 420 | { |
fcab423d | 421 | struct iwl_frame *frame; |
b481de9c ZY |
422 | struct list_head *element; |
423 | if (list_empty(&priv->free_frames)) { | |
424 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
425 | if (!frame) { | |
426 | IWL_ERROR("Could not allocate frame!\n"); | |
427 | return NULL; | |
428 | } | |
429 | ||
430 | priv->frames_count++; | |
431 | return frame; | |
432 | } | |
433 | ||
434 | element = priv->free_frames.next; | |
435 | list_del(element); | |
fcab423d | 436 | return list_entry(element, struct iwl_frame, list); |
b481de9c ZY |
437 | } |
438 | ||
fcab423d | 439 | static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame) |
b481de9c ZY |
440 | { |
441 | memset(frame, 0, sizeof(*frame)); | |
442 | list_add(&frame->list, &priv->free_frames); | |
443 | } | |
444 | ||
4bf64efd TW |
445 | static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv, |
446 | struct ieee80211_hdr *hdr, | |
447 | const u8 *dest, int left) | |
b481de9c | 448 | { |
3109ece1 | 449 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
05c914fe JB |
450 | ((priv->iw_mode != NL80211_IFTYPE_ADHOC) && |
451 | (priv->iw_mode != NL80211_IFTYPE_AP))) | |
b481de9c ZY |
452 | return 0; |
453 | ||
454 | if (priv->ibss_beacon->len > left) | |
455 | return 0; | |
456 | ||
457 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
458 | ||
459 | return priv->ibss_beacon->len; | |
460 | } | |
461 | ||
5b9f8cd3 | 462 | static u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv) |
b481de9c | 463 | { |
39e88504 GC |
464 | int i; |
465 | int rate_mask; | |
466 | ||
467 | /* Set rate mask*/ | |
468 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
469 | rate_mask = priv->active_rate_basic & 0xF; | |
470 | else | |
471 | rate_mask = priv->active_rate_basic & 0xFF0; | |
b481de9c | 472 | |
39e88504 | 473 | /* Find lowest valid rate */ |
b481de9c | 474 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; |
1826dcc0 | 475 | i = iwl_rates[i].next_ieee) { |
b481de9c | 476 | if (rate_mask & (1 << i)) |
1826dcc0 | 477 | return iwl_rates[i].plcp; |
b481de9c ZY |
478 | } |
479 | ||
39e88504 GC |
480 | /* No valid rate was found. Assign the lowest one */ |
481 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
482 | return IWL_RATE_1M_PLCP; | |
483 | else | |
484 | return IWL_RATE_6M_PLCP; | |
b481de9c ZY |
485 | } |
486 | ||
5b9f8cd3 | 487 | static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv, |
4bf64efd TW |
488 | struct iwl_frame *frame, u8 rate) |
489 | { | |
490 | struct iwl_tx_beacon_cmd *tx_beacon_cmd; | |
491 | unsigned int frame_size; | |
492 | ||
493 | tx_beacon_cmd = &frame->u.beacon; | |
494 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | |
495 | ||
496 | tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; | |
497 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
498 | ||
499 | frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame, | |
500 | iwl_bcast_addr, | |
501 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | |
502 | ||
503 | BUG_ON(frame_size > MAX_MPDU_SIZE); | |
504 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); | |
505 | ||
506 | if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) | |
507 | tx_beacon_cmd->tx.rate_n_flags = | |
508 | iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); | |
509 | else | |
510 | tx_beacon_cmd->tx.rate_n_flags = | |
511 | iwl_hw_set_rate_n_flags(rate, 0); | |
512 | ||
513 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | |
514 | TX_CMD_FLG_TSF_MSK | | |
515 | TX_CMD_FLG_STA_RATE_MSK; | |
516 | ||
517 | return sizeof(*tx_beacon_cmd) + frame_size; | |
518 | } | |
5b9f8cd3 | 519 | static int iwl_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 520 | { |
fcab423d | 521 | struct iwl_frame *frame; |
b481de9c ZY |
522 | unsigned int frame_size; |
523 | int rc; | |
524 | u8 rate; | |
525 | ||
fcab423d | 526 | frame = iwl_get_free_frame(priv); |
b481de9c ZY |
527 | |
528 | if (!frame) { | |
529 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
530 | "command.\n"); | |
531 | return -ENOMEM; | |
532 | } | |
533 | ||
5b9f8cd3 | 534 | rate = iwl_rate_get_lowest_plcp(priv); |
b481de9c | 535 | |
5b9f8cd3 | 536 | frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 537 | |
857485c0 | 538 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
539 | &frame->u.cmd[0]); |
540 | ||
fcab423d | 541 | iwl_free_frame(priv, frame); |
b481de9c ZY |
542 | |
543 | return rc; | |
544 | } | |
545 | ||
b481de9c ZY |
546 | /****************************************************************************** |
547 | * | |
548 | * Misc. internal state and helper functions | |
549 | * | |
550 | ******************************************************************************/ | |
b481de9c | 551 | |
5b9f8cd3 | 552 | static void iwl_ht_conf(struct iwl_priv *priv, |
d1141dfb EG |
553 | struct ieee80211_bss_conf *bss_conf) |
554 | { | |
ae5eb026 | 555 | struct ieee80211_sta_ht_cap *ht_conf; |
d1141dfb | 556 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; |
ae5eb026 | 557 | struct ieee80211_sta *sta; |
d1141dfb EG |
558 | |
559 | IWL_DEBUG_MAC80211("enter: \n"); | |
560 | ||
d1141dfb EG |
561 | if (!iwl_conf->is_ht) |
562 | return; | |
563 | ||
ae5eb026 JB |
564 | |
565 | /* | |
566 | * It is totally wrong to base global information on something | |
567 | * that is valid only when associated, alas, this driver works | |
568 | * that way and I don't know how to fix it. | |
569 | */ | |
570 | ||
571 | rcu_read_lock(); | |
572 | sta = ieee80211_find_sta(priv->hw, priv->bssid); | |
573 | if (!sta) { | |
574 | rcu_read_unlock(); | |
575 | return; | |
576 | } | |
577 | ht_conf = &sta->ht_cap; | |
578 | ||
d1141dfb | 579 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) |
a9841013 | 580 | iwl_conf->sgf |= HT_SHORT_GI_20MHZ; |
d1141dfb | 581 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) |
a9841013 | 582 | iwl_conf->sgf |= HT_SHORT_GI_40MHZ; |
d1141dfb EG |
583 | |
584 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
585 | iwl_conf->max_amsdu_size = | |
586 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
587 | ||
588 | iwl_conf->supported_chan_width = | |
d9fe60de | 589 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40); |
ae5eb026 JB |
590 | |
591 | iwl_conf->extension_chan_offset = bss_conf->ht.secondary_channel_offset; | |
d1141dfb | 592 | /* If no above or below channel supplied disable FAT channel */ |
d9fe60de JB |
593 | if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE && |
594 | iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW) { | |
595 | iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE; | |
d1141dfb | 596 | iwl_conf->supported_chan_width = 0; |
963f5517 | 597 | } |
d1141dfb | 598 | |
12837be1 RR |
599 | iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2); |
600 | ||
d9fe60de | 601 | memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16); |
d1141dfb | 602 | |
ae5eb026 | 603 | iwl_conf->tx_chan_width = bss_conf->ht.width_40_ok; |
d1141dfb | 604 | iwl_conf->ht_protection = |
ae5eb026 | 605 | bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION; |
d1141dfb | 606 | iwl_conf->non_GF_STA_present = |
ae5eb026 JB |
607 | !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); |
608 | ||
609 | rcu_read_unlock(); | |
d1141dfb | 610 | |
d1141dfb EG |
611 | IWL_DEBUG_MAC80211("leave\n"); |
612 | } | |
613 | ||
b481de9c ZY |
614 | /* |
615 | * QoS support | |
616 | */ | |
1ff50bda | 617 | static void iwl_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c | 618 | { |
b481de9c ZY |
619 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
620 | return; | |
621 | ||
622 | if (!priv->qos_data.qos_enable) | |
623 | return; | |
624 | ||
b481de9c ZY |
625 | priv->qos_data.def_qos_parm.qos_flags = 0; |
626 | ||
627 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
628 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
629 | priv->qos_data.def_qos_parm.qos_flags |= | |
630 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
631 | if (priv->qos_data.qos_active) |
632 | priv->qos_data.def_qos_parm.qos_flags |= | |
633 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
634 | ||
fd105e79 | 635 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 636 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
f1f1f5c7 | 637 | |
3109ece1 | 638 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
639 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
640 | priv->qos_data.qos_active, | |
641 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 642 | |
1ff50bda EG |
643 | iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM, |
644 | sizeof(struct iwl_qosparam_cmd), | |
645 | &priv->qos_data.def_qos_parm, NULL); | |
b481de9c ZY |
646 | } |
647 | } | |
648 | ||
b481de9c | 649 | #define MAX_UCODE_BEACON_INTERVAL 4096 |
b481de9c | 650 | |
3195c1f3 | 651 | static u16 iwl_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
652 | { |
653 | u16 new_val = 0; | |
654 | u16 beacon_factor = 0; | |
655 | ||
3195c1f3 TW |
656 | beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL) |
657 | / MAX_UCODE_BEACON_INTERVAL; | |
b481de9c ZY |
658 | new_val = beacon_val / beacon_factor; |
659 | ||
3195c1f3 | 660 | return new_val; |
b481de9c ZY |
661 | } |
662 | ||
3195c1f3 | 663 | static void iwl_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c | 664 | { |
3195c1f3 TW |
665 | u64 tsf; |
666 | s32 interval_tm, rem; | |
b481de9c ZY |
667 | unsigned long flags; |
668 | struct ieee80211_conf *conf = NULL; | |
669 | u16 beacon_int = 0; | |
670 | ||
671 | conf = ieee80211_get_hw_conf(priv->hw); | |
672 | ||
673 | spin_lock_irqsave(&priv->lock, flags); | |
3195c1f3 | 674 | priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp); |
b5d7be5e | 675 | priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval); |
b481de9c | 676 | |
05c914fe | 677 | if (priv->iw_mode == NL80211_IFTYPE_STATION) { |
3195c1f3 | 678 | beacon_int = iwl_adjust_beacon_interval(priv->beacon_int); |
b481de9c ZY |
679 | priv->rxon_timing.atim_window = 0; |
680 | } else { | |
3195c1f3 TW |
681 | beacon_int = iwl_adjust_beacon_interval(conf->beacon_int); |
682 | ||
b481de9c ZY |
683 | /* TODO: we need to get atim_window from upper stack |
684 | * for now we set to 0 */ | |
685 | priv->rxon_timing.atim_window = 0; | |
686 | } | |
687 | ||
3195c1f3 | 688 | priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int); |
b481de9c | 689 | |
3195c1f3 TW |
690 | tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */ |
691 | interval_tm = beacon_int * 1024; | |
692 | rem = do_div(tsf, interval_tm); | |
693 | priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem); | |
694 | ||
695 | spin_unlock_irqrestore(&priv->lock, flags); | |
696 | IWL_DEBUG_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n", | |
697 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
698 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
699 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
b481de9c ZY |
700 | } |
701 | ||
82a66bbb TW |
702 | static void iwl_set_flags_for_band(struct iwl_priv *priv, |
703 | enum ieee80211_band band) | |
b481de9c | 704 | { |
8318d78a | 705 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
706 | priv->staging_rxon.flags &= |
707 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
708 | | RXON_FLG_CCK_MSK); | |
709 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
710 | } else { | |
5b9f8cd3 | 711 | /* Copied from iwl_post_associate() */ |
b481de9c ZY |
712 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
713 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
714 | else | |
715 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
716 | ||
05c914fe | 717 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
718 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
719 | ||
720 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
721 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
722 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
723 | } | |
724 | } | |
725 | ||
726 | /* | |
01ebd063 | 727 | * initialize rxon structure with default values from eeprom |
b481de9c | 728 | */ |
5b9f8cd3 | 729 | static void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode) |
b481de9c | 730 | { |
bf85ea4f | 731 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
732 | |
733 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
734 | ||
60294de3 | 735 | switch (mode) { |
05c914fe | 736 | case NL80211_IFTYPE_AP: |
b481de9c ZY |
737 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; |
738 | break; | |
739 | ||
05c914fe | 740 | case NL80211_IFTYPE_STATION: |
b481de9c ZY |
741 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; |
742 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
743 | break; | |
744 | ||
05c914fe | 745 | case NL80211_IFTYPE_ADHOC: |
b481de9c ZY |
746 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; |
747 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
748 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
749 | RXON_FILTER_ACCEPT_GRP_MSK; | |
750 | break; | |
751 | ||
05c914fe | 752 | case NL80211_IFTYPE_MONITOR: |
b481de9c ZY |
753 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; |
754 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
755 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
756 | break; | |
69dc5d9d | 757 | default: |
60294de3 | 758 | IWL_ERROR("Unsupported interface type %d\n", mode); |
69dc5d9d | 759 | break; |
b481de9c ZY |
760 | } |
761 | ||
762 | #if 0 | |
763 | /* TODO: Figure out when short_preamble would be set and cache from | |
764 | * that */ | |
765 | if (!hw_to_local(priv->hw)->short_preamble) | |
766 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
767 | else | |
768 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
769 | #endif | |
770 | ||
8622e705 | 771 | ch_info = iwl_get_channel_info(priv, priv->band, |
25b3f57c | 772 | le16_to_cpu(priv->active_rxon.channel)); |
b481de9c ZY |
773 | |
774 | if (!ch_info) | |
775 | ch_info = &priv->channel_info[0]; | |
776 | ||
777 | /* | |
778 | * in some case A channels are all non IBSS | |
779 | * in this case force B/G channel | |
780 | */ | |
05c914fe | 781 | if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) && |
b481de9c ZY |
782 | !(is_channel_ibss(ch_info))) |
783 | ch_info = &priv->channel_info[0]; | |
784 | ||
785 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 786 | priv->band = ch_info->band; |
b481de9c | 787 | |
82a66bbb | 788 | iwl_set_flags_for_band(priv, priv->band); |
b481de9c ZY |
789 | |
790 | priv->staging_rxon.ofdm_basic_rates = | |
791 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
792 | priv->staging_rxon.cck_basic_rates = | |
793 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
794 | ||
795 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
796 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
797 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
798 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
799 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
800 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
c7de35cd | 801 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
802 | } |
803 | ||
5b9f8cd3 | 804 | static int iwl_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 805 | { |
5b9f8cd3 | 806 | iwl_connection_init_rx_config(priv, mode); |
b481de9c ZY |
807 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
808 | ||
37deb2a0 | 809 | iwl_clear_stations_table(priv); |
b481de9c | 810 | |
fde3571f | 811 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 812 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
813 | return -EAGAIN; |
814 | ||
815 | cancel_delayed_work(&priv->scan_check); | |
2a421b91 | 816 | if (iwl_scan_cancel_timeout(priv, 100)) { |
fde3571f MA |
817 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); |
818 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
819 | return -EAGAIN; | |
820 | } | |
821 | ||
5b9f8cd3 | 822 | iwl_commit_rxon(priv); |
b481de9c ZY |
823 | |
824 | return 0; | |
825 | } | |
826 | ||
5b9f8cd3 | 827 | static void iwl_set_rate(struct iwl_priv *priv) |
b481de9c | 828 | { |
8318d78a | 829 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
830 | struct ieee80211_rate *rate; |
831 | int i; | |
832 | ||
d1141dfb | 833 | hw = iwl_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
834 | if (!hw) { |
835 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
836 | return; | |
837 | } | |
b481de9c ZY |
838 | |
839 | priv->active_rate = 0; | |
840 | priv->active_rate_basic = 0; | |
841 | ||
8318d78a JB |
842 | for (i = 0; i < hw->n_bitrates; i++) { |
843 | rate = &(hw->bitrates[i]); | |
844 | if (rate->hw_value < IWL_RATE_COUNT) | |
845 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
846 | } |
847 | ||
848 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
849 | priv->active_rate, priv->active_rate_basic); | |
850 | ||
851 | /* | |
852 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
853 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
854 | * OFDM | |
855 | */ | |
856 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
857 | priv->staging_rxon.cck_basic_rates = | |
858 | ((priv->active_rate_basic & | |
859 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
860 | else | |
861 | priv->staging_rxon.cck_basic_rates = | |
862 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
863 | ||
864 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
865 | priv->staging_rxon.ofdm_basic_rates = | |
866 | ((priv->active_rate_basic & | |
867 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
868 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
869 | else | |
870 | priv->staging_rxon.ofdm_basic_rates = | |
871 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
872 | } | |
873 | ||
4fc22b21 | 874 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
875 | |
876 | #include "iwl-spectrum.h" | |
877 | ||
878 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
879 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
880 | #define TIME_UNIT 1024 | |
881 | ||
882 | /* | |
883 | * extended beacon time format | |
884 | * time in usec will be changed into a 32-bit value in 8:24 format | |
885 | * the high 1 byte is the beacon counts | |
886 | * the lower 3 bytes is the time in usec within one beacon interval | |
887 | */ | |
888 | ||
5b9f8cd3 | 889 | static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
890 | { |
891 | u32 quot; | |
892 | u32 rem; | |
893 | u32 interval = beacon_interval * 1024; | |
894 | ||
895 | if (!interval || !usec) | |
896 | return 0; | |
897 | ||
898 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
899 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
900 | ||
901 | return (quot << 24) + rem; | |
902 | } | |
903 | ||
904 | /* base is usually what we get from ucode with each received frame, | |
905 | * the same as HW timer counter counting down | |
906 | */ | |
907 | ||
5b9f8cd3 | 908 | static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
909 | { |
910 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
911 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
912 | u32 interval = beacon_interval * TIME_UNIT; | |
913 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
914 | (addon & BEACON_TIME_MASK_HIGH); | |
915 | ||
916 | if (base_low > addon_low) | |
917 | res += base_low - addon_low; | |
918 | else if (base_low < addon_low) { | |
919 | res += interval + base_low - addon_low; | |
920 | res += (1 << 24); | |
921 | } else | |
922 | res += (1 << 24); | |
923 | ||
924 | return cpu_to_le32(res); | |
925 | } | |
926 | ||
5b9f8cd3 | 927 | static int iwl_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
928 | struct ieee80211_measurement_params *params, |
929 | u8 type) | |
930 | { | |
bb8c093b | 931 | struct iwl4965_spectrum_cmd spectrum; |
db11d634 | 932 | struct iwl_rx_packet *res; |
857485c0 | 933 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
934 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
935 | .data = (void *)&spectrum, | |
936 | .meta.flags = CMD_WANT_SKB, | |
937 | }; | |
938 | u32 add_time = le64_to_cpu(params->start_time); | |
939 | int rc; | |
940 | int spectrum_resp_status; | |
941 | int duration = le16_to_cpu(params->duration); | |
942 | ||
3109ece1 | 943 | if (iwl_is_associated(priv)) |
b481de9c | 944 | add_time = |
5b9f8cd3 | 945 | iwl_usecs_to_beacons( |
b481de9c ZY |
946 | le64_to_cpu(params->start_time) - priv->last_tsf, |
947 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
948 | ||
949 | memset(&spectrum, 0, sizeof(spectrum)); | |
950 | ||
951 | spectrum.channel_count = cpu_to_le16(1); | |
952 | spectrum.flags = | |
953 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
954 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
955 | cmd.len = sizeof(spectrum); | |
956 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
957 | ||
3109ece1 | 958 | if (iwl_is_associated(priv)) |
b481de9c | 959 | spectrum.start_time = |
5b9f8cd3 | 960 | iwl_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
961 | add_time, |
962 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
963 | else | |
964 | spectrum.start_time = 0; | |
965 | ||
966 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
967 | spectrum.channels[0].channel = params->channel; | |
968 | spectrum.channels[0].type = type; | |
969 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
970 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
971 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
972 | ||
857485c0 | 973 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
974 | if (rc) |
975 | return rc; | |
976 | ||
db11d634 | 977 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
978 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
979 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
980 | rc = -EIO; | |
981 | } | |
982 | ||
983 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
984 | switch (spectrum_resp_status) { | |
985 | case 0: /* Command will be handled */ | |
986 | if (res->u.spectrum.id != 0xff) { | |
987 | IWL_DEBUG_INFO | |
988 | ("Replaced existing measurement: %d\n", | |
989 | res->u.spectrum.id); | |
990 | priv->measurement_status &= ~MEASUREMENT_READY; | |
991 | } | |
992 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
993 | rc = 0; | |
994 | break; | |
995 | ||
996 | case 1: /* Command will not be handled */ | |
997 | rc = -EAGAIN; | |
998 | break; | |
999 | } | |
1000 | ||
1001 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1002 | ||
1003 | return rc; | |
1004 | } | |
1005 | #endif | |
1006 | ||
b481de9c ZY |
1007 | /****************************************************************************** |
1008 | * | |
1009 | * Generic RX handler implementations | |
1010 | * | |
1011 | ******************************************************************************/ | |
885ba202 TW |
1012 | static void iwl_rx_reply_alive(struct iwl_priv *priv, |
1013 | struct iwl_rx_mem_buffer *rxb) | |
b481de9c | 1014 | { |
db11d634 | 1015 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
885ba202 | 1016 | struct iwl_alive_resp *palive; |
b481de9c ZY |
1017 | struct delayed_work *pwork; |
1018 | ||
1019 | palive = &pkt->u.alive_frame; | |
1020 | ||
1021 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
1022 | "0x%01X 0x%01X\n", | |
1023 | palive->is_valid, palive->ver_type, | |
1024 | palive->ver_subtype); | |
1025 | ||
1026 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
1027 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
1028 | memcpy(&priv->card_alive_init, | |
1029 | &pkt->u.alive_frame, | |
885ba202 | 1030 | sizeof(struct iwl_init_alive_resp)); |
b481de9c ZY |
1031 | pwork = &priv->init_alive_start; |
1032 | } else { | |
1033 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
1034 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
885ba202 | 1035 | sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
1036 | pwork = &priv->alive_start; |
1037 | } | |
1038 | ||
1039 | /* We delay the ALIVE response by 5ms to | |
1040 | * give the HW RF Kill time to activate... */ | |
1041 | if (palive->is_valid == UCODE_VALID_OK) | |
1042 | queue_delayed_work(priv->workqueue, pwork, | |
1043 | msecs_to_jiffies(5)); | |
1044 | else | |
1045 | IWL_WARNING("uCode did not respond OK.\n"); | |
1046 | } | |
1047 | ||
5b9f8cd3 | 1048 | static void iwl_rx_reply_error(struct iwl_priv *priv, |
a55360e4 | 1049 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1050 | { |
db11d634 | 1051 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1052 | |
1053 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
1054 | "seq 0x%04X ser 0x%08X\n", | |
1055 | le32_to_cpu(pkt->u.err_resp.error_type), | |
1056 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
1057 | pkt->u.err_resp.cmd_id, | |
1058 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
1059 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
1060 | } | |
1061 | ||
1062 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1063 | ||
5b9f8cd3 | 1064 | static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1065 | { |
db11d634 | 1066 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
c1adf9fb | 1067 | struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon; |
bb8c093b | 1068 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); |
b481de9c ZY |
1069 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
1070 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
1071 | rxon->channel = csa->channel; | |
1072 | priv->staging_rxon.channel = csa->channel; | |
1073 | } | |
1074 | ||
5b9f8cd3 | 1075 | static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv, |
a55360e4 | 1076 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1077 | { |
4fc22b21 | 1078 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
db11d634 | 1079 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1080 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); |
b481de9c ZY |
1081 | |
1082 | if (!report->state) { | |
f3d67999 EK |
1083 | IWL_DEBUG(IWL_DL_11H, |
1084 | "Spectrum Measure Notification: Start\n"); | |
b481de9c ZY |
1085 | return; |
1086 | } | |
1087 | ||
1088 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
1089 | priv->measurement_status |= MEASUREMENT_READY; | |
1090 | #endif | |
1091 | } | |
1092 | ||
5b9f8cd3 | 1093 | static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv, |
a55360e4 | 1094 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1095 | { |
0a6857e7 | 1096 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1097 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1098 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); |
b481de9c ZY |
1099 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
1100 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
1101 | #endif | |
1102 | } | |
1103 | ||
5b9f8cd3 | 1104 | static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
a55360e4 | 1105 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1106 | { |
db11d634 | 1107 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1108 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
1109 | "notification for %s:\n", | |
1110 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bf403db8 | 1111 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
1112 | } |
1113 | ||
5b9f8cd3 | 1114 | static void iwl_bg_beacon_update(struct work_struct *work) |
b481de9c | 1115 | { |
c79dd5b5 TW |
1116 | struct iwl_priv *priv = |
1117 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
1118 | struct sk_buff *beacon; |
1119 | ||
1120 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
e039fa4a | 1121 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
b481de9c ZY |
1122 | |
1123 | if (!beacon) { | |
1124 | IWL_ERROR("update beacon failed\n"); | |
1125 | return; | |
1126 | } | |
1127 | ||
1128 | mutex_lock(&priv->mutex); | |
1129 | /* new beacon skb is allocated every time; dispose previous.*/ | |
1130 | if (priv->ibss_beacon) | |
1131 | dev_kfree_skb(priv->ibss_beacon); | |
1132 | ||
1133 | priv->ibss_beacon = beacon; | |
1134 | mutex_unlock(&priv->mutex); | |
1135 | ||
5b9f8cd3 | 1136 | iwl_send_beacon_cmd(priv); |
b481de9c ZY |
1137 | } |
1138 | ||
4e39317d | 1139 | /** |
5b9f8cd3 | 1140 | * iwl_bg_statistics_periodic - Timer callback to queue statistics |
4e39317d EG |
1141 | * |
1142 | * This callback is provided in order to send a statistics request. | |
1143 | * | |
1144 | * This timer function is continually reset to execute within | |
1145 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
1146 | * was received. We need to ensure we receive the statistics in order | |
1147 | * to update the temperature used for calibrating the TXPOWER. | |
1148 | */ | |
5b9f8cd3 | 1149 | static void iwl_bg_statistics_periodic(unsigned long data) |
4e39317d EG |
1150 | { |
1151 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
1152 | ||
1153 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
1154 | return; | |
1155 | ||
61780ee3 MA |
1156 | /* dont send host command if rf-kill is on */ |
1157 | if (!iwl_is_ready_rf(priv)) | |
1158 | return; | |
1159 | ||
4e39317d EG |
1160 | iwl_send_statistics_request(priv, CMD_ASYNC); |
1161 | } | |
1162 | ||
5b9f8cd3 | 1163 | static void iwl_rx_beacon_notif(struct iwl_priv *priv, |
a55360e4 | 1164 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1165 | { |
0a6857e7 | 1166 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1167 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1168 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); |
e7d326ac | 1169 | u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
b481de9c ZY |
1170 | |
1171 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
1172 | "tsf %d %d rate %d\n", | |
25a6572c | 1173 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, |
b481de9c ZY |
1174 | beacon->beacon_notify_hdr.failure_frame, |
1175 | le32_to_cpu(beacon->ibss_mgr_status), | |
1176 | le32_to_cpu(beacon->high_tsf), | |
1177 | le32_to_cpu(beacon->low_tsf), rate); | |
1178 | #endif | |
1179 | ||
05c914fe | 1180 | if ((priv->iw_mode == NL80211_IFTYPE_AP) && |
b481de9c ZY |
1181 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) |
1182 | queue_work(priv->workqueue, &priv->beacon_update); | |
1183 | } | |
1184 | ||
b481de9c ZY |
1185 | /* Handle notification from uCode that card's power state is changing |
1186 | * due to software, hardware, or critical temperature RFKILL */ | |
5b9f8cd3 | 1187 | static void iwl_rx_card_state_notif(struct iwl_priv *priv, |
a55360e4 | 1188 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1189 | { |
db11d634 | 1190 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1191 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
1192 | unsigned long status = priv->status; | |
1193 | ||
1194 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
1195 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
1196 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
1197 | ||
1198 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
1199 | RF_CARD_DISABLED)) { | |
1200 | ||
3395f6e9 | 1201 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
1202 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
1203 | ||
3395f6e9 TW |
1204 | if (!iwl_grab_nic_access(priv)) { |
1205 | iwl_write_direct32( | |
b481de9c ZY |
1206 | priv, HBUS_TARG_MBX_C, |
1207 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1208 | ||
3395f6e9 | 1209 | iwl_release_nic_access(priv); |
b481de9c ZY |
1210 | } |
1211 | ||
1212 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 1213 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 1214 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
1215 | if (!iwl_grab_nic_access(priv)) { |
1216 | iwl_write_direct32( | |
b481de9c ZY |
1217 | priv, HBUS_TARG_MBX_C, |
1218 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1219 | ||
3395f6e9 | 1220 | iwl_release_nic_access(priv); |
b481de9c ZY |
1221 | } |
1222 | } | |
1223 | ||
1224 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 1225 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 1226 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
1227 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
1228 | if (!iwl_grab_nic_access(priv)) | |
1229 | iwl_release_nic_access(priv); | |
b481de9c ZY |
1230 | } |
1231 | } | |
1232 | ||
1233 | if (flags & HW_CARD_DISABLED) | |
1234 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
1235 | else | |
1236 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
1237 | ||
1238 | ||
1239 | if (flags & SW_CARD_DISABLED) | |
1240 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
1241 | else | |
1242 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
1243 | ||
1244 | if (!(flags & RXON_CARD_DISABLED)) | |
2a421b91 | 1245 | iwl_scan_cancel(priv); |
b481de9c ZY |
1246 | |
1247 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
1248 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
1249 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
1250 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
1251 | queue_work(priv->workqueue, &priv->rf_kill); | |
1252 | else | |
1253 | wake_up_interruptible(&priv->wait_command_queue); | |
1254 | } | |
1255 | ||
5b9f8cd3 | 1256 | int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) |
e2e3c57b TW |
1257 | { |
1258 | int ret; | |
1259 | unsigned long flags; | |
1260 | ||
1261 | spin_lock_irqsave(&priv->lock, flags); | |
1262 | ret = iwl_grab_nic_access(priv); | |
1263 | if (ret) | |
1264 | goto err; | |
1265 | ||
1266 | if (src == IWL_PWR_SRC_VAUX) { | |
1267 | u32 val; | |
e7b63581 | 1268 | ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE, |
e2e3c57b TW |
1269 | &val); |
1270 | ||
1271 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) | |
1272 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1273 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | |
1274 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1275 | } else { | |
1276 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1277 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | |
1278 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1279 | } | |
1280 | ||
1281 | iwl_release_nic_access(priv); | |
1282 | err: | |
1283 | spin_unlock_irqrestore(&priv->lock, flags); | |
1284 | return ret; | |
1285 | } | |
1286 | ||
b481de9c | 1287 | /** |
5b9f8cd3 | 1288 | * iwl_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
1289 | * |
1290 | * Setup the RX handlers for each of the reply types sent from the uCode | |
1291 | * to the host. | |
1292 | * | |
1293 | * This function chains into the hardware specific files for them to setup | |
1294 | * any hardware specific handlers as well. | |
1295 | */ | |
653fa4a0 | 1296 | static void iwl_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 1297 | { |
885ba202 | 1298 | priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive; |
5b9f8cd3 EG |
1299 | priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error; |
1300 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa; | |
b481de9c | 1301 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
5b9f8cd3 EG |
1302 | iwl_rx_spectrum_measure_notif; |
1303 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif; | |
b481de9c | 1304 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
5b9f8cd3 EG |
1305 | iwl_rx_pm_debug_statistics_notif; |
1306 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif; | |
b481de9c | 1307 | |
9fbab516 BC |
1308 | /* |
1309 | * The same handler is used for both the REPLY to a discrete | |
1310 | * statistics request from the host as well as for the periodic | |
1311 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 1312 | */ |
8f91aecb EG |
1313 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics; |
1314 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics; | |
2a421b91 TW |
1315 | |
1316 | iwl_setup_rx_scan_handlers(priv); | |
1317 | ||
37a44211 | 1318 | /* status change handler */ |
5b9f8cd3 | 1319 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif; |
b481de9c | 1320 | |
c1354754 TW |
1321 | priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] = |
1322 | iwl_rx_missed_beacon_notif; | |
37a44211 | 1323 | /* Rx handlers */ |
1781a07f EG |
1324 | priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy; |
1325 | priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx; | |
653fa4a0 EG |
1326 | /* block ack */ |
1327 | priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba; | |
9fbab516 | 1328 | /* Set up hardware specific Rx handlers */ |
d4789efe | 1329 | priv->cfg->ops->lib->rx_handler_setup(priv); |
b481de9c ZY |
1330 | } |
1331 | ||
5c0eef96 MA |
1332 | /* |
1333 | * this should be called while priv->lock is locked | |
1334 | */ | |
a55360e4 | 1335 | static void __iwl_rx_replenish(struct iwl_priv *priv) |
b481de9c | 1336 | { |
a55360e4 TW |
1337 | iwl_rx_allocate(priv); |
1338 | iwl_rx_queue_restock(priv); | |
b481de9c ZY |
1339 | } |
1340 | ||
b481de9c ZY |
1341 | |
1342 | /** | |
a55360e4 | 1343 | * iwl_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
1344 | * |
1345 | * Uses the priv->rx_handlers callback function array to invoke | |
1346 | * the appropriate handlers, including command responses, | |
1347 | * frame-received notifications, and other notifications. | |
1348 | */ | |
a55360e4 | 1349 | void iwl_rx_handle(struct iwl_priv *priv) |
b481de9c | 1350 | { |
a55360e4 | 1351 | struct iwl_rx_mem_buffer *rxb; |
db11d634 | 1352 | struct iwl_rx_packet *pkt; |
a55360e4 | 1353 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
1354 | u32 r, i; |
1355 | int reclaim; | |
1356 | unsigned long flags; | |
5c0eef96 | 1357 | u8 fill_rx = 0; |
d68ab680 | 1358 | u32 count = 8; |
b481de9c | 1359 | |
6440adb5 CB |
1360 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
1361 | * buffer that the driver may process (last buffer filled by ucode). */ | |
8d86422a | 1362 | r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; |
b481de9c ZY |
1363 | i = rxq->read; |
1364 | ||
1365 | /* Rx interrupt, but nothing sent from uCode */ | |
1366 | if (i == r) | |
f3d67999 | 1367 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i); |
b481de9c | 1368 | |
a55360e4 | 1369 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 MA |
1370 | fill_rx = 1; |
1371 | ||
b481de9c ZY |
1372 | while (i != r) { |
1373 | rxb = rxq->queue[i]; | |
1374 | ||
9fbab516 | 1375 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
1376 | * then a bug has been introduced in the queue refilling |
1377 | * routines -- catch it here */ | |
1378 | BUG_ON(rxb == NULL); | |
1379 | ||
1380 | rxq->queue[i] = NULL; | |
1381 | ||
4018517a | 1382 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->aligned_dma_addr, |
5425e490 | 1383 | priv->hw_params.rx_buf_size, |
b481de9c | 1384 | PCI_DMA_FROMDEVICE); |
db11d634 | 1385 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1386 | |
1387 | /* Reclaim a command buffer only if this packet is a response | |
1388 | * to a (driver-originated) command. | |
1389 | * If the packet (e.g. Rx frame) originated from uCode, | |
1390 | * there is no command buffer to reclaim. | |
1391 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
1392 | * but apparently a few don't get set; catch them here. */ | |
1393 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
1394 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 1395 | (pkt->hdr.cmd != REPLY_RX) && |
7dddaf1a | 1396 | (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) && |
cfe01709 | 1397 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
1398 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
1399 | (pkt->hdr.cmd != REPLY_TX); | |
1400 | ||
1401 | /* Based on type of command response or notification, | |
1402 | * handle those that need handling via function in | |
5b9f8cd3 | 1403 | * rx_handlers table. See iwl_setup_rx_handlers() */ |
b481de9c | 1404 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
f3d67999 EK |
1405 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r, |
1406 | i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
b481de9c ZY |
1407 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); |
1408 | } else { | |
1409 | /* No handling needed */ | |
f3d67999 | 1410 | IWL_DEBUG(IWL_DL_RX, |
b481de9c ZY |
1411 | "r %d i %d No handler needed for %s, 0x%02x\n", |
1412 | r, i, get_cmd_string(pkt->hdr.cmd), | |
1413 | pkt->hdr.cmd); | |
1414 | } | |
1415 | ||
1416 | if (reclaim) { | |
9fbab516 | 1417 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 1418 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
1419 | * as we reclaim the driver command queue */ |
1420 | if (rxb && rxb->skb) | |
17b88929 | 1421 | iwl_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
1422 | else |
1423 | IWL_WARNING("Claim null rxb?\n"); | |
1424 | } | |
1425 | ||
1426 | /* For now we just don't re-use anything. We can tweak this | |
1427 | * later to try and re-use notification packets and SKBs that | |
1428 | * fail to Rx correctly */ | |
1429 | if (rxb->skb != NULL) { | |
1430 | priv->alloc_rxb_skb--; | |
1431 | dev_kfree_skb_any(rxb->skb); | |
1432 | rxb->skb = NULL; | |
1433 | } | |
1434 | ||
4018517a JB |
1435 | pci_unmap_single(priv->pci_dev, rxb->real_dma_addr, |
1436 | priv->hw_params.rx_buf_size + 256, | |
9ee1ba47 | 1437 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
1438 | spin_lock_irqsave(&rxq->lock, flags); |
1439 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
1440 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1441 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
1442 | /* If there are a lot of unused frames, |
1443 | * restock the Rx queue so ucode wont assert. */ | |
1444 | if (fill_rx) { | |
1445 | count++; | |
1446 | if (count >= 8) { | |
1447 | priv->rxq.read = i; | |
a55360e4 | 1448 | __iwl_rx_replenish(priv); |
5c0eef96 MA |
1449 | count = 0; |
1450 | } | |
1451 | } | |
b481de9c ZY |
1452 | } |
1453 | ||
1454 | /* Backtrack one entry */ | |
1455 | priv->rxq.read = i; | |
a55360e4 TW |
1456 | iwl_rx_queue_restock(priv); |
1457 | } | |
a55360e4 | 1458 | |
0a6857e7 | 1459 | #ifdef CONFIG_IWLWIFI_DEBUG |
5b9f8cd3 | 1460 | static void iwl_print_rx_config_cmd(struct iwl_priv *priv) |
b481de9c | 1461 | { |
c1adf9fb | 1462 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
0795af57 | 1463 | |
b481de9c | 1464 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bf403db8 | 1465 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
1466 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
1467 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
1468 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
1469 | le32_to_cpu(rxon->filter_flags)); | |
1470 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
1471 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
1472 | rxon->ofdm_basic_rates); | |
1473 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
e174961c JB |
1474 | IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr); |
1475 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr); | |
b481de9c ZY |
1476 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
1477 | } | |
1478 | #endif | |
1479 | ||
5b9f8cd3 | 1480 | static void iwl_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1481 | { |
1482 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
1483 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
3395f6e9 | 1484 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
1485 | } |
1486 | ||
0359facc MA |
1487 | /* call this function to flush any scheduled tasklet */ |
1488 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
1489 | { | |
a96a27f9 | 1490 | /* wait to make sure we flush pending tasklet*/ |
0359facc MA |
1491 | synchronize_irq(priv->pci_dev->irq); |
1492 | tasklet_kill(&priv->irq_tasklet); | |
1493 | } | |
1494 | ||
5b9f8cd3 | 1495 | static inline void iwl_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1496 | { |
1497 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
1498 | ||
1499 | /* disable interrupts from uCode/NIC to host */ | |
3395f6e9 | 1500 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
1501 | |
1502 | /* acknowledge/clear/reset any interrupts still pending | |
1503 | * from uCode or flow handler (Rx/Tx DMA) */ | |
3395f6e9 TW |
1504 | iwl_write32(priv, CSR_INT, 0xffffffff); |
1505 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
1506 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
1507 | } | |
1508 | ||
b481de9c | 1509 | |
b481de9c | 1510 | /** |
5b9f8cd3 | 1511 | * iwl_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 1512 | */ |
5b9f8cd3 | 1513 | static void iwl_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 1514 | { |
5b9f8cd3 | 1515 | /* Set the FW error flag -- cleared on iwl_down */ |
b481de9c ZY |
1516 | set_bit(STATUS_FW_ERROR, &priv->status); |
1517 | ||
1518 | /* Cancel currently queued command. */ | |
1519 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
1520 | ||
0a6857e7 | 1521 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1522 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
ede0cba4 | 1523 | iwl_dump_nic_error_log(priv); |
189a2b59 | 1524 | iwl_dump_nic_event_log(priv); |
5b9f8cd3 | 1525 | iwl_print_rx_config_cmd(priv); |
b481de9c ZY |
1526 | } |
1527 | #endif | |
1528 | ||
1529 | wake_up_interruptible(&priv->wait_command_queue); | |
1530 | ||
1531 | /* Keep the restart process from trying to send host | |
1532 | * commands by clearing the INIT status bit */ | |
1533 | clear_bit(STATUS_READY, &priv->status); | |
1534 | ||
1535 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
f3d67999 | 1536 | IWL_DEBUG(IWL_DL_FW_ERRORS, |
b481de9c ZY |
1537 | "Restarting adapter due to uCode error.\n"); |
1538 | ||
3109ece1 | 1539 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
1540 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
1541 | sizeof(priv->recovery_rxon)); | |
1542 | priv->error_recovering = 1; | |
1543 | } | |
3a1081e8 EK |
1544 | if (priv->cfg->mod_params->restart_fw) |
1545 | queue_work(priv->workqueue, &priv->restart); | |
b481de9c ZY |
1546 | } |
1547 | } | |
1548 | ||
5b9f8cd3 | 1549 | static void iwl_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
1550 | { |
1551 | unsigned long flags; | |
1552 | ||
1553 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
1554 | sizeof(priv->staging_rxon)); | |
1555 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
5b9f8cd3 | 1556 | iwl_commit_rxon(priv); |
b481de9c | 1557 | |
4f40e4d9 | 1558 | iwl_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
1559 | |
1560 | spin_lock_irqsave(&priv->lock, flags); | |
1561 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
1562 | priv->error_recovering = 0; | |
1563 | spin_unlock_irqrestore(&priv->lock, flags); | |
1564 | } | |
1565 | ||
5b9f8cd3 | 1566 | static void iwl_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
1567 | { |
1568 | u32 inta, handled = 0; | |
1569 | u32 inta_fh; | |
1570 | unsigned long flags; | |
0a6857e7 | 1571 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1572 | u32 inta_mask; |
1573 | #endif | |
1574 | ||
1575 | spin_lock_irqsave(&priv->lock, flags); | |
1576 | ||
1577 | /* Ack/clear/reset pending uCode interrupts. | |
1578 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
1579 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
1580 | inta = iwl_read32(priv, CSR_INT); |
1581 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
1582 | |
1583 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
1584 | * Any new interrupts that happen after this, either while we're | |
1585 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
1586 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
1587 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 1588 | |
0a6857e7 | 1589 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1590 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 1591 | /* just for debug */ |
3395f6e9 | 1592 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
1593 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
1594 | inta, inta_mask, inta_fh); | |
1595 | } | |
1596 | #endif | |
1597 | ||
1598 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
1599 | * atomic, make sure that inta covers all the interrupts that | |
1600 | * we've discovered, even if FH interrupt came in just after | |
1601 | * reading CSR_INT. */ | |
6f83eaa1 | 1602 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 1603 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 1604 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
1605 | inta |= CSR_INT_BIT_FH_TX; |
1606 | ||
1607 | /* Now service all interrupt bits discovered above. */ | |
1608 | if (inta & CSR_INT_BIT_HW_ERR) { | |
1609 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
1610 | ||
1611 | /* Tell the device to stop sending interrupts */ | |
5b9f8cd3 | 1612 | iwl_disable_interrupts(priv); |
b481de9c | 1613 | |
5b9f8cd3 | 1614 | iwl_irq_handle_error(priv); |
b481de9c ZY |
1615 | |
1616 | handled |= CSR_INT_BIT_HW_ERR; | |
1617 | ||
1618 | spin_unlock_irqrestore(&priv->lock, flags); | |
1619 | ||
1620 | return; | |
1621 | } | |
1622 | ||
0a6857e7 | 1623 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1624 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 1625 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
1626 | if (inta & CSR_INT_BIT_SCD) |
1627 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
1628 | "the frame/frames.\n"); | |
b481de9c ZY |
1629 | |
1630 | /* Alive notification via Rx interrupt will do the real work */ | |
1631 | if (inta & CSR_INT_BIT_ALIVE) | |
1632 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
1633 | } | |
1634 | #endif | |
1635 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 1636 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 1637 | |
9fbab516 | 1638 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
1639 | if (inta & CSR_INT_BIT_RF_KILL) { |
1640 | int hw_rf_kill = 0; | |
3395f6e9 | 1641 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
1642 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
1643 | hw_rf_kill = 1; | |
1644 | ||
f3d67999 | 1645 | IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n", |
b481de9c ZY |
1646 | hw_rf_kill ? "disable radio":"enable radio"); |
1647 | ||
a9efa652 EG |
1648 | /* driver only loads ucode once setting the interface up. |
1649 | * the driver as well won't allow loading if RFKILL is set | |
1650 | * therefore no need to restart the driver from this handler | |
1651 | */ | |
1652 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) | |
53e49093 | 1653 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
b481de9c ZY |
1654 | |
1655 | handled |= CSR_INT_BIT_RF_KILL; | |
1656 | } | |
1657 | ||
9fbab516 | 1658 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
1659 | if (inta & CSR_INT_BIT_CT_KILL) { |
1660 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
1661 | handled |= CSR_INT_BIT_CT_KILL; | |
1662 | } | |
1663 | ||
1664 | /* Error detected by uCode */ | |
1665 | if (inta & CSR_INT_BIT_SW_ERR) { | |
1666 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
1667 | inta); | |
5b9f8cd3 | 1668 | iwl_irq_handle_error(priv); |
b481de9c ZY |
1669 | handled |= CSR_INT_BIT_SW_ERR; |
1670 | } | |
1671 | ||
1672 | /* uCode wakes up after power-down sleep */ | |
1673 | if (inta & CSR_INT_BIT_WAKEUP) { | |
1674 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
a55360e4 | 1675 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
babcebfa TW |
1676 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
1677 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); | |
1678 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); | |
1679 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); | |
1680 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); | |
1681 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
1682 | |
1683 | handled |= CSR_INT_BIT_WAKEUP; | |
1684 | } | |
1685 | ||
1686 | /* All uCode command responses, including Tx command responses, | |
1687 | * Rx "responses" (frame-received notification), and other | |
1688 | * notifications from uCode come through here*/ | |
1689 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
a55360e4 | 1690 | iwl_rx_handle(priv); |
b481de9c ZY |
1691 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
1692 | } | |
1693 | ||
1694 | if (inta & CSR_INT_BIT_FH_TX) { | |
1695 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
1696 | handled |= CSR_INT_BIT_FH_TX; | |
dbb983b7 RR |
1697 | /* FH finished to write, send event */ |
1698 | priv->ucode_write_complete = 1; | |
1699 | wake_up_interruptible(&priv->wait_command_queue); | |
b481de9c ZY |
1700 | } |
1701 | ||
1702 | if (inta & ~handled) | |
1703 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
1704 | ||
1705 | if (inta & ~CSR_INI_SET_MASK) { | |
1706 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
1707 | inta & ~CSR_INI_SET_MASK); | |
1708 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
1709 | } | |
1710 | ||
1711 | /* Re-enable all interrupts */ | |
0359facc MA |
1712 | /* only Re-enable if diabled by irq */ |
1713 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
5b9f8cd3 | 1714 | iwl_enable_interrupts(priv); |
b481de9c | 1715 | |
0a6857e7 | 1716 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1717 | if (priv->debug_level & (IWL_DL_ISR)) { |
3395f6e9 TW |
1718 | inta = iwl_read32(priv, CSR_INT); |
1719 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
1720 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1721 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
1722 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
1723 | } | |
1724 | #endif | |
1725 | spin_unlock_irqrestore(&priv->lock, flags); | |
1726 | } | |
1727 | ||
5b9f8cd3 | 1728 | static irqreturn_t iwl_isr(int irq, void *data) |
b481de9c | 1729 | { |
c79dd5b5 | 1730 | struct iwl_priv *priv = data; |
b481de9c ZY |
1731 | u32 inta, inta_mask; |
1732 | u32 inta_fh; | |
1733 | if (!priv) | |
1734 | return IRQ_NONE; | |
1735 | ||
1736 | spin_lock(&priv->lock); | |
1737 | ||
1738 | /* Disable (but don't clear!) interrupts here to avoid | |
1739 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
1740 | * If we have something to service, the tasklet will re-enable ints. | |
1741 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
1742 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
1743 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
1744 | |
1745 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
1746 | inta = iwl_read32(priv, CSR_INT); |
1747 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1748 | |
1749 | /* Ignore interrupt if there's nothing in NIC to service. | |
1750 | * This may be due to IRQ shared with another device, | |
1751 | * or due to sporadic interrupts thrown from our NIC. */ | |
1752 | if (!inta && !inta_fh) { | |
1753 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
1754 | goto none; | |
1755 | } | |
1756 | ||
1757 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
1758 | /* Hardware disappeared. It might have already raised |
1759 | * an interrupt */ | |
b481de9c | 1760 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 1761 | goto unplugged; |
b481de9c ZY |
1762 | } |
1763 | ||
1764 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
1765 | inta, inta_mask, inta_fh); | |
1766 | ||
25c03d8e JP |
1767 | inta &= ~CSR_INT_BIT_SCD; |
1768 | ||
5b9f8cd3 | 1769 | /* iwl_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
1770 | if (likely(inta || inta_fh)) |
1771 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 1772 | |
66fbb541 ON |
1773 | unplugged: |
1774 | spin_unlock(&priv->lock); | |
b481de9c ZY |
1775 | return IRQ_HANDLED; |
1776 | ||
1777 | none: | |
1778 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
1779 | /* only Re-enable if diabled by irq */ |
1780 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
5b9f8cd3 | 1781 | iwl_enable_interrupts(priv); |
b481de9c ZY |
1782 | spin_unlock(&priv->lock); |
1783 | return IRQ_NONE; | |
1784 | } | |
1785 | ||
b481de9c ZY |
1786 | /****************************************************************************** |
1787 | * | |
1788 | * uCode download functions | |
1789 | * | |
1790 | ******************************************************************************/ | |
1791 | ||
5b9f8cd3 | 1792 | static void iwl_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 1793 | { |
98c92211 TW |
1794 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
1795 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
1796 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
1797 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
1798 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
1799 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
1800 | } |
1801 | ||
5b9f8cd3 | 1802 | static void iwl_nic_start(struct iwl_priv *priv) |
edcdf8b2 RR |
1803 | { |
1804 | /* Remove all resets to allow NIC to operate */ | |
1805 | iwl_write32(priv, CSR_RESET, 0); | |
1806 | } | |
1807 | ||
1808 | ||
b481de9c | 1809 | /** |
5b9f8cd3 | 1810 | * iwl_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
1811 | * |
1812 | * Copy into buffers for card to fetch via bus-mastering | |
1813 | */ | |
5b9f8cd3 | 1814 | static int iwl_read_ucode(struct iwl_priv *priv) |
b481de9c | 1815 | { |
14b3d338 | 1816 | struct iwl_ucode *ucode; |
90e759d1 | 1817 | int ret; |
b481de9c | 1818 | const struct firmware *ucode_raw; |
4bf775cd | 1819 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
1820 | u8 *src; |
1821 | size_t len; | |
1822 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
1823 | ||
1824 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
1825 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
1826 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
1827 | if (ret < 0) { | |
1828 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
1829 | name, ret); | |
b481de9c ZY |
1830 | goto error; |
1831 | } | |
1832 | ||
1833 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
1834 | name, ucode_raw->size); | |
1835 | ||
1836 | /* Make sure that we got at least our header! */ | |
1837 | if (ucode_raw->size < sizeof(*ucode)) { | |
1838 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 1839 | ret = -EINVAL; |
b481de9c ZY |
1840 | goto err_release; |
1841 | } | |
1842 | ||
1843 | /* Data from ucode file: header followed by uCode images */ | |
1844 | ucode = (void *)ucode_raw->data; | |
1845 | ||
1846 | ver = le32_to_cpu(ucode->ver); | |
1847 | inst_size = le32_to_cpu(ucode->inst_size); | |
1848 | data_size = le32_to_cpu(ucode->data_size); | |
1849 | init_size = le32_to_cpu(ucode->init_size); | |
1850 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
1851 | boot_size = le32_to_cpu(ucode->boot_size); | |
1852 | ||
1853 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
1854 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
1855 | inst_size); | |
1856 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
1857 | data_size); | |
1858 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
1859 | init_size); | |
1860 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
1861 | init_data_size); | |
1862 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
1863 | boot_size); | |
1864 | ||
1865 | /* Verify size of file vs. image size info in file's header */ | |
1866 | if (ucode_raw->size < sizeof(*ucode) + | |
1867 | inst_size + data_size + init_size + | |
1868 | init_data_size + boot_size) { | |
1869 | ||
1870 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
1871 | (int)ucode_raw->size); | |
90e759d1 | 1872 | ret = -EINVAL; |
b481de9c ZY |
1873 | goto err_release; |
1874 | } | |
1875 | ||
1876 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 1877 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
1878 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
1879 | inst_size); | |
1880 | ret = -EINVAL; | |
b481de9c ZY |
1881 | goto err_release; |
1882 | } | |
1883 | ||
099b40b7 | 1884 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
1885 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
1886 | data_size); | |
1887 | ret = -EINVAL; | |
b481de9c ZY |
1888 | goto err_release; |
1889 | } | |
099b40b7 | 1890 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 1891 | IWL_DEBUG_INFO |
90e759d1 TW |
1892 | ("uCode init instr len %d too large to fit in\n", |
1893 | init_size); | |
1894 | ret = -EINVAL; | |
b481de9c ZY |
1895 | goto err_release; |
1896 | } | |
099b40b7 | 1897 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 1898 | IWL_DEBUG_INFO |
90e759d1 TW |
1899 | ("uCode init data len %d too large to fit in\n", |
1900 | init_data_size); | |
1901 | ret = -EINVAL; | |
b481de9c ZY |
1902 | goto err_release; |
1903 | } | |
099b40b7 | 1904 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 1905 | IWL_DEBUG_INFO |
90e759d1 TW |
1906 | ("uCode boot instr len %d too large to fit in\n", |
1907 | boot_size); | |
1908 | ret = -EINVAL; | |
b481de9c ZY |
1909 | goto err_release; |
1910 | } | |
1911 | ||
1912 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
1913 | ||
1914 | /* Runtime instructions and 2 copies of data: | |
1915 | * 1) unmodified from disk | |
1916 | * 2) backup cache for save/restore during power-downs */ | |
1917 | priv->ucode_code.len = inst_size; | |
98c92211 | 1918 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
1919 | |
1920 | priv->ucode_data.len = data_size; | |
98c92211 | 1921 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
1922 | |
1923 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 1924 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
1925 | |
1926 | /* Initialization instructions and data */ | |
90e759d1 TW |
1927 | if (init_size && init_data_size) { |
1928 | priv->ucode_init.len = init_size; | |
98c92211 | 1929 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
1930 | |
1931 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 1932 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
1933 | |
1934 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
1935 | goto err_pci_alloc; | |
1936 | } | |
b481de9c ZY |
1937 | |
1938 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
1939 | if (boot_size) { |
1940 | priv->ucode_boot.len = boot_size; | |
98c92211 | 1941 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 1942 | |
90e759d1 TW |
1943 | if (!priv->ucode_boot.v_addr) |
1944 | goto err_pci_alloc; | |
1945 | } | |
b481de9c ZY |
1946 | |
1947 | /* Copy images into buffers for card's bus-master reads ... */ | |
1948 | ||
1949 | /* Runtime instructions (first block of data in file) */ | |
1950 | src = &ucode->data[0]; | |
1951 | len = priv->ucode_code.len; | |
90e759d1 | 1952 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
1953 | memcpy(priv->ucode_code.v_addr, src, len); |
1954 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
1955 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
1956 | ||
1957 | /* Runtime data (2nd block) | |
5b9f8cd3 | 1958 | * NOTE: Copy into backup buffer will be done in iwl_up() */ |
b481de9c ZY |
1959 | src = &ucode->data[inst_size]; |
1960 | len = priv->ucode_data.len; | |
90e759d1 | 1961 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
1962 | memcpy(priv->ucode_data.v_addr, src, len); |
1963 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
1964 | ||
1965 | /* Initialization instructions (3rd block) */ | |
1966 | if (init_size) { | |
1967 | src = &ucode->data[inst_size + data_size]; | |
1968 | len = priv->ucode_init.len; | |
90e759d1 TW |
1969 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
1970 | len); | |
b481de9c ZY |
1971 | memcpy(priv->ucode_init.v_addr, src, len); |
1972 | } | |
1973 | ||
1974 | /* Initialization data (4th block) */ | |
1975 | if (init_data_size) { | |
1976 | src = &ucode->data[inst_size + data_size + init_size]; | |
1977 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
1978 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
1979 | len); | |
b481de9c ZY |
1980 | memcpy(priv->ucode_init_data.v_addr, src, len); |
1981 | } | |
1982 | ||
1983 | /* Bootstrap instructions (5th block) */ | |
1984 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
1985 | len = priv->ucode_boot.len; | |
90e759d1 | 1986 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
1987 | memcpy(priv->ucode_boot.v_addr, src, len); |
1988 | ||
1989 | /* We have our copies now, allow OS release its copies */ | |
1990 | release_firmware(ucode_raw); | |
1991 | return 0; | |
1992 | ||
1993 | err_pci_alloc: | |
1994 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 1995 | ret = -ENOMEM; |
5b9f8cd3 | 1996 | iwl_dealloc_ucode_pci(priv); |
b481de9c ZY |
1997 | |
1998 | err_release: | |
1999 | release_firmware(ucode_raw); | |
2000 | ||
2001 | error: | |
90e759d1 | 2002 | return ret; |
b481de9c ZY |
2003 | } |
2004 | ||
ada17513 MA |
2005 | /* temporary */ |
2006 | static int iwl_mac_beacon_update(struct ieee80211_hw *hw, | |
2007 | struct sk_buff *skb); | |
2008 | ||
b481de9c | 2009 | /** |
4a4a9e81 | 2010 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 2011 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 2012 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 2013 | */ |
4a4a9e81 | 2014 | static void iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 2015 | { |
57aab75a | 2016 | int ret = 0; |
b481de9c ZY |
2017 | |
2018 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
2019 | ||
2020 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
2021 | /* We had an error bringing up the hardware, so take it | |
2022 | * all the way back down so we can try again */ | |
2023 | IWL_DEBUG_INFO("Alive failed.\n"); | |
2024 | goto restart; | |
2025 | } | |
2026 | ||
2027 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
2028 | * This is a paranoid check, because we would not have gotten the | |
2029 | * "runtime" alive if code weren't properly loaded. */ | |
b0692f2f | 2030 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
2031 | /* Runtime instruction load was bad; |
2032 | * take it all the way back down so we can try again */ | |
2033 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
2034 | goto restart; | |
2035 | } | |
2036 | ||
37deb2a0 | 2037 | iwl_clear_stations_table(priv); |
57aab75a TW |
2038 | ret = priv->cfg->ops->lib->alive_notify(priv); |
2039 | if (ret) { | |
b481de9c | 2040 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 2041 | ret); |
b481de9c ZY |
2042 | goto restart; |
2043 | } | |
2044 | ||
5b9f8cd3 | 2045 | /* After the ALIVE response, we can send host commands to the uCode */ |
b481de9c ZY |
2046 | set_bit(STATUS_ALIVE, &priv->status); |
2047 | ||
fee1247a | 2048 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
2049 | return; |
2050 | ||
36d6825b | 2051 | ieee80211_wake_queues(priv->hw); |
b481de9c ZY |
2052 | |
2053 | priv->active_rate = priv->rates_mask; | |
2054 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
2055 | ||
3109ece1 | 2056 | if (iwl_is_associated(priv)) { |
c1adf9fb GG |
2057 | struct iwl_rxon_cmd *active_rxon = |
2058 | (struct iwl_rxon_cmd *)&priv->active_rxon; | |
b481de9c ZY |
2059 | |
2060 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
2061 | sizeof(priv->staging_rxon)); | |
2062 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
2063 | } else { | |
2064 | /* Initialize our rx_config data */ | |
5b9f8cd3 | 2065 | iwl_connection_init_rx_config(priv, priv->iw_mode); |
b481de9c ZY |
2066 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
2067 | } | |
2068 | ||
9fbab516 | 2069 | /* Configure Bluetooth device coexistence support */ |
5b9f8cd3 | 2070 | iwl_send_bt_config(priv); |
b481de9c | 2071 | |
4a4a9e81 TW |
2072 | iwl_reset_run_time_calib(priv); |
2073 | ||
b481de9c | 2074 | /* Configure the adapter for unassociated operation */ |
5b9f8cd3 | 2075 | iwl_commit_rxon(priv); |
b481de9c ZY |
2076 | |
2077 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 2078 | iwl_rf_kill_ct_config(priv); |
5a66926a | 2079 | |
fe00b5a5 RC |
2080 | iwl_leds_register(priv); |
2081 | ||
b481de9c | 2082 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 2083 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 2084 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
2085 | |
2086 | if (priv->error_recovering) | |
5b9f8cd3 | 2087 | iwl_error_recovery(priv); |
b481de9c | 2088 | |
58d0f361 | 2089 | iwl_power_update_mode(priv, 1); |
c46fbefa | 2090 | |
ada17513 MA |
2091 | /* reassociate for ADHOC mode */ |
2092 | if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) { | |
2093 | struct sk_buff *beacon = ieee80211_beacon_get(priv->hw, | |
2094 | priv->vif); | |
2095 | if (beacon) | |
2096 | iwl_mac_beacon_update(priv->hw, beacon); | |
2097 | } | |
2098 | ||
2099 | ||
c46fbefa | 2100 | if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status)) |
5b9f8cd3 | 2101 | iwl_set_mode(priv, priv->iw_mode); |
c46fbefa | 2102 | |
b481de9c ZY |
2103 | return; |
2104 | ||
2105 | restart: | |
2106 | queue_work(priv->workqueue, &priv->restart); | |
2107 | } | |
2108 | ||
4e39317d | 2109 | static void iwl_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 2110 | |
5b9f8cd3 | 2111 | static void __iwl_down(struct iwl_priv *priv) |
b481de9c ZY |
2112 | { |
2113 | unsigned long flags; | |
2114 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
b481de9c ZY |
2115 | |
2116 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
2117 | ||
b481de9c ZY |
2118 | if (!exit_pending) |
2119 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
2120 | ||
ab53d8af MA |
2121 | iwl_leds_unregister(priv); |
2122 | ||
37deb2a0 | 2123 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2124 | |
2125 | /* Unblock any waiting calls */ | |
2126 | wake_up_interruptible_all(&priv->wait_command_queue); | |
2127 | ||
b481de9c ZY |
2128 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
2129 | * exiting the module */ | |
2130 | if (!exit_pending) | |
2131 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
2132 | ||
2133 | /* stop and reset the on-board processor */ | |
3395f6e9 | 2134 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
2135 | |
2136 | /* tell the device to stop sending interrupts */ | |
0359facc | 2137 | spin_lock_irqsave(&priv->lock, flags); |
5b9f8cd3 | 2138 | iwl_disable_interrupts(priv); |
0359facc MA |
2139 | spin_unlock_irqrestore(&priv->lock, flags); |
2140 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
2141 | |
2142 | if (priv->mac80211_registered) | |
2143 | ieee80211_stop_queues(priv->hw); | |
2144 | ||
5b9f8cd3 | 2145 | /* If we have not previously called iwl_init() then |
b481de9c | 2146 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 2147 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
2148 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
2149 | STATUS_RF_KILL_HW | | |
2150 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2151 | STATUS_RF_KILL_SW | | |
9788864e RC |
2152 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2153 | STATUS_GEO_CONFIGURED | | |
b481de9c | 2154 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
052ec3f1 MA |
2155 | STATUS_IN_SUSPEND | |
2156 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
2157 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
2158 | goto exit; |
2159 | } | |
2160 | ||
2161 | /* ...otherwise clear out all the status bits but the RF Kill and | |
2162 | * SUSPEND bits and continue taking the NIC down. */ | |
2163 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
2164 | STATUS_RF_KILL_HW | | |
2165 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2166 | STATUS_RF_KILL_SW | | |
9788864e RC |
2167 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2168 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
2169 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
2170 | STATUS_IN_SUSPEND | | |
2171 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
052ec3f1 MA |
2172 | STATUS_FW_ERROR | |
2173 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
2174 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
2175 | |
2176 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2177 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 2178 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
2179 | spin_unlock_irqrestore(&priv->lock, flags); |
2180 | ||
da1bc453 | 2181 | iwl_txq_ctx_stop(priv); |
b3bbacb7 | 2182 | iwl_rxq_stop(priv); |
b481de9c ZY |
2183 | |
2184 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
2185 | if (!iwl_grab_nic_access(priv)) { |
2186 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 2187 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 2188 | iwl_release_nic_access(priv); |
b481de9c ZY |
2189 | } |
2190 | spin_unlock_irqrestore(&priv->lock, flags); | |
2191 | ||
2192 | udelay(5); | |
2193 | ||
7f066108 | 2194 | /* FIXME: apm_ops.suspend(priv) */ |
d535311e GG |
2195 | if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status)) |
2196 | priv->cfg->ops->lib->apm_ops.stop(priv); | |
2197 | else | |
2198 | priv->cfg->ops->lib->apm_ops.reset(priv); | |
399f4900 | 2199 | priv->cfg->ops->lib->free_shared_mem(priv); |
b481de9c ZY |
2200 | |
2201 | exit: | |
885ba202 | 2202 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
2203 | |
2204 | if (priv->ibss_beacon) | |
2205 | dev_kfree_skb(priv->ibss_beacon); | |
2206 | priv->ibss_beacon = NULL; | |
2207 | ||
2208 | /* clear out any free frames */ | |
fcab423d | 2209 | iwl_clear_free_frames(priv); |
b481de9c ZY |
2210 | } |
2211 | ||
5b9f8cd3 | 2212 | static void iwl_down(struct iwl_priv *priv) |
b481de9c ZY |
2213 | { |
2214 | mutex_lock(&priv->mutex); | |
5b9f8cd3 | 2215 | __iwl_down(priv); |
b481de9c | 2216 | mutex_unlock(&priv->mutex); |
b24d22b1 | 2217 | |
4e39317d | 2218 | iwl_cancel_deferred_work(priv); |
b481de9c ZY |
2219 | } |
2220 | ||
2221 | #define MAX_HW_RESTARTS 5 | |
2222 | ||
5b9f8cd3 | 2223 | static int __iwl_up(struct iwl_priv *priv) |
b481de9c | 2224 | { |
57aab75a TW |
2225 | int i; |
2226 | int ret; | |
b481de9c ZY |
2227 | |
2228 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
2229 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
2230 | return -EIO; | |
2231 | } | |
2232 | ||
e903fbd4 RC |
2233 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
2234 | IWL_ERROR("ucode not available for device bringup\n"); | |
2235 | return -EIO; | |
2236 | } | |
2237 | ||
e655b9f0 | 2238 | /* If platform's RF_KILL switch is NOT set to KILL */ |
c1842d61 | 2239 | if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
e655b9f0 | 2240 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 | 2241 | else |
e655b9f0 | 2242 | set_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 | 2243 | |
c1842d61 | 2244 | if (iwl_is_rfkill(priv)) { |
5b9f8cd3 | 2245 | iwl_enable_interrupts(priv); |
3bff19c2 EG |
2246 | IWL_WARNING("Radio disabled by %s RF Kill switch\n", |
2247 | test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW"); | |
c1842d61 | 2248 | return 0; |
b481de9c ZY |
2249 | } |
2250 | ||
3395f6e9 | 2251 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 2252 | |
399f4900 RR |
2253 | ret = priv->cfg->ops->lib->alloc_shared_mem(priv); |
2254 | if (ret) { | |
2255 | IWL_ERROR("Unable to allocate shared memory\n"); | |
2256 | return ret; | |
2257 | } | |
2258 | ||
1053d35f | 2259 | ret = iwl_hw_nic_init(priv); |
57aab75a TW |
2260 | if (ret) { |
2261 | IWL_ERROR("Unable to init nic\n"); | |
2262 | return ret; | |
b481de9c ZY |
2263 | } |
2264 | ||
2265 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2266 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2267 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
2268 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
2269 | ||
2270 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 2271 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
5b9f8cd3 | 2272 | iwl_enable_interrupts(priv); |
b481de9c ZY |
2273 | |
2274 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2275 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2276 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
2277 | |
2278 | /* Copy original ucode data image from disk into backup cache. | |
2279 | * This will be used to initialize the on-board processor's | |
2280 | * data SRAM for a clean start when the runtime program first loads. */ | |
2281 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 2282 | priv->ucode_data.len); |
b481de9c | 2283 | |
b481de9c ZY |
2284 | for (i = 0; i < MAX_HW_RESTARTS; i++) { |
2285 | ||
37deb2a0 | 2286 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2287 | |
2288 | /* load bootstrap state machine, | |
2289 | * load bootstrap program into processor's memory, | |
2290 | * prepare to load the "initialize" uCode */ | |
57aab75a | 2291 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 2292 | |
57aab75a TW |
2293 | if (ret) { |
2294 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
2295 | continue; |
2296 | } | |
2297 | ||
f3d5b45b EG |
2298 | /* Clear out the uCode error bit if it is set */ |
2299 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
2300 | ||
b481de9c | 2301 | /* start card; "initialize" will load runtime ucode */ |
5b9f8cd3 | 2302 | iwl_nic_start(priv); |
b481de9c | 2303 | |
b481de9c ZY |
2304 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
2305 | ||
2306 | return 0; | |
2307 | } | |
2308 | ||
2309 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
5b9f8cd3 | 2310 | __iwl_down(priv); |
64e72c3e | 2311 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c ZY |
2312 | |
2313 | /* tried to restart and config the device for as long as our | |
2314 | * patience could withstand */ | |
2315 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
2316 | return -EIO; | |
2317 | } | |
2318 | ||
2319 | ||
2320 | /***************************************************************************** | |
2321 | * | |
2322 | * Workqueue callbacks | |
2323 | * | |
2324 | *****************************************************************************/ | |
2325 | ||
4a4a9e81 | 2326 | static void iwl_bg_init_alive_start(struct work_struct *data) |
b481de9c | 2327 | { |
c79dd5b5 TW |
2328 | struct iwl_priv *priv = |
2329 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
2330 | |
2331 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2332 | return; | |
2333 | ||
2334 | mutex_lock(&priv->mutex); | |
f3ccc08c | 2335 | priv->cfg->ops->lib->init_alive_start(priv); |
b481de9c ZY |
2336 | mutex_unlock(&priv->mutex); |
2337 | } | |
2338 | ||
4a4a9e81 | 2339 | static void iwl_bg_alive_start(struct work_struct *data) |
b481de9c | 2340 | { |
c79dd5b5 TW |
2341 | struct iwl_priv *priv = |
2342 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
2343 | |
2344 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2345 | return; | |
2346 | ||
2347 | mutex_lock(&priv->mutex); | |
4a4a9e81 | 2348 | iwl_alive_start(priv); |
b481de9c ZY |
2349 | mutex_unlock(&priv->mutex); |
2350 | } | |
2351 | ||
5b9f8cd3 | 2352 | static void iwl_bg_rf_kill(struct work_struct *work) |
b481de9c | 2353 | { |
c79dd5b5 | 2354 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
2355 | |
2356 | wake_up_interruptible(&priv->wait_command_queue); | |
2357 | ||
2358 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2359 | return; | |
2360 | ||
2361 | mutex_lock(&priv->mutex); | |
2362 | ||
fee1247a | 2363 | if (!iwl_is_rfkill(priv)) { |
f3d67999 | 2364 | IWL_DEBUG(IWL_DL_RF_KILL, |
b481de9c ZY |
2365 | "HW and/or SW RF Kill no longer active, restarting " |
2366 | "device\n"); | |
2367 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2368 | queue_work(priv->workqueue, &priv->restart); | |
2369 | } else { | |
ad97edd2 MA |
2370 | /* make sure mac80211 stop sending Tx frame */ |
2371 | if (priv->mac80211_registered) | |
2372 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2373 | |
2374 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
2375 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2376 | "disabled by SW switch\n"); | |
2377 | else | |
2378 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
2379 | "Kill switch must be turned off for " | |
2380 | "wireless networking to work.\n"); | |
2381 | } | |
2382 | mutex_unlock(&priv->mutex); | |
80fcc9e2 | 2383 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2384 | } |
2385 | ||
5b9f8cd3 | 2386 | static void iwl_bg_set_monitor(struct work_struct *work) |
4419e39b AK |
2387 | { |
2388 | struct iwl_priv *priv = container_of(work, | |
2389 | struct iwl_priv, set_monitor); | |
c46fbefa | 2390 | int ret; |
4419e39b AK |
2391 | |
2392 | IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n"); | |
2393 | ||
2394 | mutex_lock(&priv->mutex); | |
2395 | ||
5b9f8cd3 | 2396 | ret = iwl_set_mode(priv, NL80211_IFTYPE_MONITOR); |
c46fbefa AK |
2397 | if (ret) { |
2398 | if (ret == -EAGAIN) | |
2399 | IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n"); | |
2400 | else | |
5b9f8cd3 | 2401 | IWL_ERROR("iwl_set_mode() failed ret = %d\n", ret); |
c46fbefa | 2402 | } |
4419e39b AK |
2403 | |
2404 | mutex_unlock(&priv->mutex); | |
2405 | } | |
2406 | ||
16e727e8 EG |
2407 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
2408 | { | |
2409 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
2410 | run_time_calib_work); | |
2411 | ||
2412 | mutex_lock(&priv->mutex); | |
2413 | ||
2414 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | |
2415 | test_bit(STATUS_SCANNING, &priv->status)) { | |
2416 | mutex_unlock(&priv->mutex); | |
2417 | return; | |
2418 | } | |
2419 | ||
2420 | if (priv->start_calib) { | |
2421 | iwl_chain_noise_calibration(priv, &priv->statistics); | |
2422 | ||
2423 | iwl_sensitivity_calibration(priv, &priv->statistics); | |
2424 | } | |
2425 | ||
2426 | mutex_unlock(&priv->mutex); | |
2427 | return; | |
2428 | } | |
2429 | ||
5b9f8cd3 | 2430 | static void iwl_bg_up(struct work_struct *data) |
b481de9c | 2431 | { |
c79dd5b5 | 2432 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
2433 | |
2434 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2435 | return; | |
2436 | ||
2437 | mutex_lock(&priv->mutex); | |
5b9f8cd3 | 2438 | __iwl_up(priv); |
b481de9c | 2439 | mutex_unlock(&priv->mutex); |
80fcc9e2 | 2440 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2441 | } |
2442 | ||
5b9f8cd3 | 2443 | static void iwl_bg_restart(struct work_struct *data) |
b481de9c | 2444 | { |
c79dd5b5 | 2445 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
2446 | |
2447 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2448 | return; | |
2449 | ||
5b9f8cd3 | 2450 | iwl_down(priv); |
b481de9c ZY |
2451 | queue_work(priv->workqueue, &priv->up); |
2452 | } | |
2453 | ||
5b9f8cd3 | 2454 | static void iwl_bg_rx_replenish(struct work_struct *data) |
b481de9c | 2455 | { |
c79dd5b5 TW |
2456 | struct iwl_priv *priv = |
2457 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
2458 | |
2459 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2460 | return; | |
2461 | ||
2462 | mutex_lock(&priv->mutex); | |
a55360e4 | 2463 | iwl_rx_replenish(priv); |
b481de9c ZY |
2464 | mutex_unlock(&priv->mutex); |
2465 | } | |
2466 | ||
7878a5a4 MA |
2467 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
2468 | ||
5b9f8cd3 | 2469 | static void iwl_post_associate(struct iwl_priv *priv) |
b481de9c | 2470 | { |
b481de9c | 2471 | struct ieee80211_conf *conf = NULL; |
857485c0 | 2472 | int ret = 0; |
1ff50bda | 2473 | unsigned long flags; |
b481de9c | 2474 | |
05c914fe | 2475 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
3ac7f146 | 2476 | IWL_ERROR("%s Should not be called in AP mode\n", __func__); |
b481de9c ZY |
2477 | return; |
2478 | } | |
2479 | ||
e174961c JB |
2480 | IWL_DEBUG_ASSOC("Associated as %d to: %pM\n", |
2481 | priv->assoc_id, priv->active_rxon.bssid_addr); | |
b481de9c ZY |
2482 | |
2483 | ||
2484 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2485 | return; | |
2486 | ||
b481de9c | 2487 | |
508e32e1 | 2488 | if (!priv->vif || !priv->is_open) |
948c171c | 2489 | return; |
508e32e1 | 2490 | |
c90a74ba | 2491 | iwl_power_cancel_timeout(priv); |
2a421b91 | 2492 | iwl_scan_cancel_timeout(priv, 200); |
052c4b9f | 2493 | |
b481de9c ZY |
2494 | conf = ieee80211_get_hw_conf(priv->hw); |
2495 | ||
2496 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
5b9f8cd3 | 2497 | iwl_commit_rxon(priv); |
b481de9c | 2498 | |
3195c1f3 | 2499 | iwl_setup_rxon_timing(priv); |
857485c0 | 2500 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2501 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2502 | if (ret) |
b481de9c ZY |
2503 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2504 | "Attempting to continue.\n"); | |
2505 | ||
2506 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
2507 | ||
42eb7c64 | 2508 | iwl_set_rxon_ht(priv, &priv->current_ht_config); |
4f85f5b3 | 2509 | |
c7de35cd | 2510 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2511 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
2512 | ||
2513 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
2514 | priv->assoc_id, priv->beacon_int); | |
2515 | ||
2516 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2517 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
2518 | else | |
2519 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2520 | ||
2521 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2522 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2523 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2524 | else | |
2525 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2526 | ||
05c914fe | 2527 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2528 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
2529 | ||
2530 | } | |
2531 | ||
5b9f8cd3 | 2532 | iwl_commit_rxon(priv); |
b481de9c ZY |
2533 | |
2534 | switch (priv->iw_mode) { | |
05c914fe | 2535 | case NL80211_IFTYPE_STATION: |
b481de9c ZY |
2536 | break; |
2537 | ||
05c914fe | 2538 | case NL80211_IFTYPE_ADHOC: |
b481de9c | 2539 | |
c46fbefa AK |
2540 | /* assume default assoc id */ |
2541 | priv->assoc_id = 1; | |
b481de9c | 2542 | |
4f40e4d9 | 2543 | iwl_rxon_add_station(priv, priv->bssid, 0); |
5b9f8cd3 | 2544 | iwl_send_beacon_cmd(priv); |
b481de9c ZY |
2545 | |
2546 | break; | |
2547 | ||
2548 | default: | |
2549 | IWL_ERROR("%s Should not be called in %d mode\n", | |
3ac7f146 | 2550 | __func__, priv->iw_mode); |
b481de9c ZY |
2551 | break; |
2552 | } | |
2553 | ||
05c914fe | 2554 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2555 | priv->assoc_station_added = 1; |
2556 | ||
1ff50bda EG |
2557 | spin_lock_irqsave(&priv->lock, flags); |
2558 | iwl_activate_qos(priv, 0); | |
2559 | spin_unlock_irqrestore(&priv->lock, flags); | |
292ae174 | 2560 | |
04816448 GE |
2561 | /* the chain noise calibration will enabled PM upon completion |
2562 | * If chain noise has already been run, then we need to enable | |
2563 | * power management here */ | |
2564 | if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE) | |
2565 | iwl_power_enable_management(priv); | |
c90a74ba EG |
2566 | |
2567 | /* Enable Rx differential gain and sensitivity calibrations */ | |
2568 | iwl_chain_noise_reset(priv); | |
2569 | priv->start_calib = 1; | |
2570 | ||
508e32e1 RC |
2571 | } |
2572 | ||
b481de9c ZY |
2573 | /***************************************************************************** |
2574 | * | |
2575 | * mac80211 entry point functions | |
2576 | * | |
2577 | *****************************************************************************/ | |
2578 | ||
154b25ce | 2579 | #define UCODE_READY_TIMEOUT (4 * HZ) |
5a66926a | 2580 | |
5b9f8cd3 | 2581 | static int iwl_mac_start(struct ieee80211_hw *hw) |
b481de9c | 2582 | { |
c79dd5b5 | 2583 | struct iwl_priv *priv = hw->priv; |
5a66926a | 2584 | int ret; |
cf88c433 | 2585 | u16 pci_cmd; |
b481de9c ZY |
2586 | |
2587 | IWL_DEBUG_MAC80211("enter\n"); | |
2588 | ||
5a66926a ZY |
2589 | if (pci_enable_device(priv->pci_dev)) { |
2590 | IWL_ERROR("Fail to pci_enable_device\n"); | |
2591 | return -ENODEV; | |
2592 | } | |
2593 | pci_restore_state(priv->pci_dev); | |
2594 | pci_enable_msi(priv->pci_dev); | |
2595 | ||
cf88c433 TW |
2596 | /* enable interrupts if needed: hw bug w/a */ |
2597 | pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd); | |
2598 | if (pci_cmd & PCI_COMMAND_INTX_DISABLE) { | |
2599 | pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; | |
2600 | pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd); | |
2601 | } | |
2602 | ||
5b9f8cd3 | 2603 | ret = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED, |
5a66926a ZY |
2604 | DRV_NAME, priv); |
2605 | if (ret) { | |
2606 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
2607 | goto out_disable_msi; | |
2608 | } | |
2609 | ||
b481de9c ZY |
2610 | /* we should be verifying the device is ready to be opened */ |
2611 | mutex_lock(&priv->mutex); | |
2612 | ||
c1adf9fb | 2613 | memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd)); |
5a66926a ZY |
2614 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... |
2615 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 2616 | |
5a66926a | 2617 | if (!priv->ucode_code.len) { |
5b9f8cd3 | 2618 | ret = iwl_read_ucode(priv); |
5a66926a ZY |
2619 | if (ret) { |
2620 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
2621 | mutex_unlock(&priv->mutex); | |
2622 | goto out_release_irq; | |
2623 | } | |
2624 | } | |
b481de9c | 2625 | |
5b9f8cd3 | 2626 | ret = __iwl_up(priv); |
5a66926a | 2627 | |
b481de9c | 2628 | mutex_unlock(&priv->mutex); |
5a66926a | 2629 | |
80fcc9e2 AG |
2630 | iwl_rfkill_set_hw_state(priv); |
2631 | ||
e655b9f0 ZY |
2632 | if (ret) |
2633 | goto out_release_irq; | |
2634 | ||
c1842d61 TW |
2635 | if (iwl_is_rfkill(priv)) |
2636 | goto out; | |
2637 | ||
e655b9f0 ZY |
2638 | IWL_DEBUG_INFO("Start UP work done.\n"); |
2639 | ||
2640 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
2641 | return 0; | |
2642 | ||
fe9b6b72 | 2643 | /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from |
5a66926a | 2644 | * mac80211 will not be run successfully. */ |
154b25ce EG |
2645 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, |
2646 | test_bit(STATUS_READY, &priv->status), | |
2647 | UCODE_READY_TIMEOUT); | |
2648 | if (!ret) { | |
2649 | if (!test_bit(STATUS_READY, &priv->status)) { | |
2650 | IWL_ERROR("START_ALIVE timeout after %dms.\n", | |
2651 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
2652 | ret = -ETIMEDOUT; | |
2653 | goto out_release_irq; | |
5a66926a | 2654 | } |
fe9b6b72 | 2655 | } |
0a078ffa | 2656 | |
c1842d61 | 2657 | out: |
0a078ffa | 2658 | priv->is_open = 1; |
b481de9c ZY |
2659 | IWL_DEBUG_MAC80211("leave\n"); |
2660 | return 0; | |
5a66926a ZY |
2661 | |
2662 | out_release_irq: | |
2663 | free_irq(priv->pci_dev->irq, priv); | |
2664 | out_disable_msi: | |
2665 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
2666 | pci_disable_device(priv->pci_dev); |
2667 | priv->is_open = 0; | |
2668 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 2669 | return ret; |
b481de9c ZY |
2670 | } |
2671 | ||
5b9f8cd3 | 2672 | static void iwl_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 2673 | { |
c79dd5b5 | 2674 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2675 | |
2676 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 2677 | |
e655b9f0 ZY |
2678 | if (!priv->is_open) { |
2679 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
2680 | return; | |
2681 | } | |
2682 | ||
b481de9c | 2683 | priv->is_open = 0; |
5a66926a | 2684 | |
fee1247a | 2685 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
2686 | /* stop mac, cancel any scan request and clear |
2687 | * RXON_FILTER_ASSOC_MSK BIT | |
2688 | */ | |
5a66926a | 2689 | mutex_lock(&priv->mutex); |
2a421b91 | 2690 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f | 2691 | mutex_unlock(&priv->mutex); |
fde3571f MA |
2692 | } |
2693 | ||
5b9f8cd3 | 2694 | iwl_down(priv); |
5a66926a ZY |
2695 | |
2696 | flush_workqueue(priv->workqueue); | |
2697 | free_irq(priv->pci_dev->irq, priv); | |
2698 | pci_disable_msi(priv->pci_dev); | |
2699 | pci_save_state(priv->pci_dev); | |
2700 | pci_disable_device(priv->pci_dev); | |
948c171c | 2701 | |
b481de9c | 2702 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2703 | } |
2704 | ||
5b9f8cd3 | 2705 | static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 2706 | { |
c79dd5b5 | 2707 | struct iwl_priv *priv = hw->priv; |
b481de9c | 2708 | |
f3674227 | 2709 | IWL_DEBUG_MACDUMP("enter\n"); |
b481de9c | 2710 | |
b481de9c | 2711 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, |
e039fa4a | 2712 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
b481de9c | 2713 | |
e039fa4a | 2714 | if (iwl_tx_skb(priv, skb)) |
b481de9c ZY |
2715 | dev_kfree_skb_any(skb); |
2716 | ||
f3674227 | 2717 | IWL_DEBUG_MACDUMP("leave\n"); |
b481de9c ZY |
2718 | return 0; |
2719 | } | |
2720 | ||
5b9f8cd3 | 2721 | static int iwl_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
2722 | struct ieee80211_if_init_conf *conf) |
2723 | { | |
c79dd5b5 | 2724 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2725 | unsigned long flags; |
2726 | ||
32bfd35d | 2727 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 2728 | |
32bfd35d JB |
2729 | if (priv->vif) { |
2730 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 2731 | return -EOPNOTSUPP; |
b481de9c ZY |
2732 | } |
2733 | ||
2734 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 2735 | priv->vif = conf->vif; |
60294de3 | 2736 | priv->iw_mode = conf->type; |
b481de9c ZY |
2737 | |
2738 | spin_unlock_irqrestore(&priv->lock, flags); | |
2739 | ||
2740 | mutex_lock(&priv->mutex); | |
864792e3 TW |
2741 | |
2742 | if (conf->mac_addr) { | |
e174961c | 2743 | IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr); |
864792e3 TW |
2744 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); |
2745 | } | |
b481de9c | 2746 | |
5b9f8cd3 | 2747 | if (iwl_set_mode(priv, conf->type) == -EAGAIN) |
c46fbefa AK |
2748 | /* we are not ready, will run again when ready */ |
2749 | set_bit(STATUS_MODE_PENDING, &priv->status); | |
5a66926a | 2750 | |
b481de9c ZY |
2751 | mutex_unlock(&priv->mutex); |
2752 | ||
5a66926a | 2753 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2754 | return 0; |
2755 | } | |
2756 | ||
2757 | /** | |
5b9f8cd3 | 2758 | * iwl_mac_config - mac80211 config callback |
b481de9c ZY |
2759 | * |
2760 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
2761 | * be set inappropriately and the driver currently sets the hardware up to | |
2762 | * use it whenever needed. | |
2763 | */ | |
5b9f8cd3 | 2764 | static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed) |
b481de9c | 2765 | { |
c79dd5b5 | 2766 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 2767 | const struct iwl_channel_info *ch_info; |
e8975581 | 2768 | struct ieee80211_conf *conf = &hw->conf; |
b481de9c | 2769 | unsigned long flags; |
76bb77e0 | 2770 | int ret = 0; |
82a66bbb | 2771 | u16 channel; |
b481de9c ZY |
2772 | |
2773 | mutex_lock(&priv->mutex); | |
8318d78a | 2774 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 2775 | |
ae5eb026 JB |
2776 | priv->current_ht_config.is_ht = conf->ht.enabled; |
2777 | ||
14a08a7f | 2778 | if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) { |
64e72c3e | 2779 | IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n"); |
14a08a7f | 2780 | goto out; |
64e72c3e MA |
2781 | } |
2782 | ||
14a08a7f EG |
2783 | if (!conf->radio_enabled) |
2784 | iwl_radio_kill_sw_disable_radio(priv); | |
2785 | ||
fee1247a | 2786 | if (!iwl_is_ready(priv)) { |
b481de9c | 2787 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
2788 | ret = -EIO; |
2789 | goto out; | |
b481de9c ZY |
2790 | } |
2791 | ||
1ea87396 | 2792 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 2793 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 | 2794 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
b481de9c | 2795 | mutex_unlock(&priv->mutex); |
a0646470 | 2796 | return 0; |
b481de9c ZY |
2797 | } |
2798 | ||
82a66bbb TW |
2799 | channel = ieee80211_frequency_to_channel(conf->channel->center_freq); |
2800 | ch_info = iwl_get_channel_info(priv, conf->channel->band, channel); | |
b481de9c | 2801 | if (!is_channel_valid(ch_info)) { |
b481de9c | 2802 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
76bb77e0 ZY |
2803 | ret = -EINVAL; |
2804 | goto out; | |
b481de9c ZY |
2805 | } |
2806 | ||
05c914fe | 2807 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && |
398f9e76 AK |
2808 | !is_channel_ibss(ch_info)) { |
2809 | IWL_ERROR("channel %d in band %d not IBSS channel\n", | |
2810 | conf->channel->hw_value, conf->channel->band); | |
2811 | ret = -EINVAL; | |
2812 | goto out; | |
2813 | } | |
2814 | ||
82a66bbb TW |
2815 | spin_lock_irqsave(&priv->lock, flags); |
2816 | ||
b5d7be5e | 2817 | |
78330fdd | 2818 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
2819 | * from any ht related info since 2.4 does not |
2820 | * support ht */ | |
82a66bbb | 2821 | if ((le16_to_cpu(priv->staging_rxon.channel) != channel) |
b481de9c ZY |
2822 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
2823 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
2824 | #endif | |
2825 | ) | |
2826 | priv->staging_rxon.flags = 0; | |
b481de9c | 2827 | |
17e72782 | 2828 | iwl_set_rxon_channel(priv, conf->channel); |
b481de9c | 2829 | |
82a66bbb | 2830 | iwl_set_flags_for_band(priv, conf->channel->band); |
b481de9c ZY |
2831 | |
2832 | /* The list of supported rates and rate mask can be different | |
8318d78a | 2833 | * for each band; since the band may have changed, reset |
b481de9c | 2834 | * the rate mask to what mac80211 lists */ |
5b9f8cd3 | 2835 | iwl_set_rate(priv); |
b481de9c ZY |
2836 | |
2837 | spin_unlock_irqrestore(&priv->lock, flags); | |
2838 | ||
2839 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
2840 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
5b9f8cd3 | 2841 | iwl_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 2842 | goto out; |
b481de9c ZY |
2843 | } |
2844 | #endif | |
2845 | ||
b481de9c ZY |
2846 | if (!conf->radio_enabled) { |
2847 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 2848 | goto out; |
b481de9c ZY |
2849 | } |
2850 | ||
fee1247a | 2851 | if (iwl_is_rfkill(priv)) { |
b481de9c | 2852 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
2853 | ret = -EIO; |
2854 | goto out; | |
b481de9c ZY |
2855 | } |
2856 | ||
e602cb18 EK |
2857 | if (conf->flags & IEEE80211_CONF_PS) |
2858 | ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3); | |
2859 | else | |
2860 | ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM); | |
2861 | if (ret) | |
2862 | IWL_DEBUG_MAC80211("Error setting power level\n"); | |
2863 | ||
630fe9b6 TW |
2864 | IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n", |
2865 | priv->tx_power_user_lmt, conf->power_level); | |
2866 | ||
2867 | iwl_set_tx_power(priv, conf->power_level, false); | |
2868 | ||
5b9f8cd3 | 2869 | iwl_set_rate(priv); |
b481de9c ZY |
2870 | |
2871 | if (memcmp(&priv->active_rxon, | |
2872 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
5b9f8cd3 | 2873 | iwl_commit_rxon(priv); |
b481de9c ZY |
2874 | else |
2875 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
2876 | ||
2877 | IWL_DEBUG_MAC80211("leave\n"); | |
2878 | ||
a0646470 | 2879 | out: |
5a66926a | 2880 | mutex_unlock(&priv->mutex); |
76bb77e0 | 2881 | return ret; |
b481de9c ZY |
2882 | } |
2883 | ||
5b9f8cd3 | 2884 | static void iwl_config_ap(struct iwl_priv *priv) |
b481de9c | 2885 | { |
857485c0 | 2886 | int ret = 0; |
1ff50bda | 2887 | unsigned long flags; |
b481de9c | 2888 | |
d986bcd1 | 2889 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
2890 | return; |
2891 | ||
2892 | /* The following should be done only at AP bring up */ | |
3195c1f3 | 2893 | if (!iwl_is_associated(priv)) { |
b481de9c ZY |
2894 | |
2895 | /* RXON - unassoc (to set timing command) */ | |
2896 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
5b9f8cd3 | 2897 | iwl_commit_rxon(priv); |
b481de9c ZY |
2898 | |
2899 | /* RXON Timing */ | |
3195c1f3 | 2900 | iwl_setup_rxon_timing(priv); |
857485c0 | 2901 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2902 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2903 | if (ret) |
b481de9c ZY |
2904 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2905 | "Attempting to continue.\n"); | |
2906 | ||
c7de35cd | 2907 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2908 | |
2909 | /* FIXME: what should be the assoc_id for AP? */ | |
2910 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
2911 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2912 | priv->staging_rxon.flags |= | |
2913 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
2914 | else | |
2915 | priv->staging_rxon.flags &= | |
2916 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2917 | ||
2918 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2919 | if (priv->assoc_capability & | |
2920 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2921 | priv->staging_rxon.flags |= | |
2922 | RXON_FLG_SHORT_SLOT_MSK; | |
2923 | else | |
2924 | priv->staging_rxon.flags &= | |
2925 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2926 | ||
05c914fe | 2927 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2928 | priv->staging_rxon.flags &= |
2929 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2930 | } | |
2931 | /* restore RXON assoc */ | |
2932 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
5b9f8cd3 | 2933 | iwl_commit_rxon(priv); |
1ff50bda EG |
2934 | spin_lock_irqsave(&priv->lock, flags); |
2935 | iwl_activate_qos(priv, 1); | |
2936 | spin_unlock_irqrestore(&priv->lock, flags); | |
4f40e4d9 | 2937 | iwl_rxon_add_station(priv, iwl_bcast_addr, 0); |
e1493deb | 2938 | } |
5b9f8cd3 | 2939 | iwl_send_beacon_cmd(priv); |
b481de9c ZY |
2940 | |
2941 | /* FIXME - we need to add code here to detect a totally new | |
2942 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
2943 | * clear sta table, add BCAST sta... */ | |
2944 | } | |
2945 | ||
9d139c81 | 2946 | |
5b9f8cd3 | 2947 | static int iwl_mac_config_interface(struct ieee80211_hw *hw, |
32bfd35d | 2948 | struct ieee80211_vif *vif, |
b481de9c ZY |
2949 | struct ieee80211_if_conf *conf) |
2950 | { | |
c79dd5b5 | 2951 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2952 | int rc; |
2953 | ||
2954 | if (conf == NULL) | |
2955 | return -EIO; | |
2956 | ||
b716bb91 EG |
2957 | if (priv->vif != vif) { |
2958 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
2959 | return 0; |
2960 | } | |
2961 | ||
05c914fe | 2962 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && |
9d139c81 JB |
2963 | conf->changed & IEEE80211_IFCC_BEACON) { |
2964 | struct sk_buff *beacon = ieee80211_beacon_get(hw, vif); | |
2965 | if (!beacon) | |
2966 | return -ENOMEM; | |
ada17513 | 2967 | mutex_lock(&priv->mutex); |
5b9f8cd3 | 2968 | rc = iwl_mac_beacon_update(hw, beacon); |
ada17513 | 2969 | mutex_unlock(&priv->mutex); |
9d139c81 JB |
2970 | if (rc) |
2971 | return rc; | |
2972 | } | |
2973 | ||
fee1247a | 2974 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
2975 | return -EAGAIN; |
2976 | ||
b481de9c ZY |
2977 | mutex_lock(&priv->mutex); |
2978 | ||
b481de9c | 2979 | if (conf->bssid) |
e174961c | 2980 | IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid); |
b481de9c | 2981 | |
4150c572 JB |
2982 | /* |
2983 | * very dubious code was here; the probe filtering flag is never set: | |
2984 | * | |
b481de9c ZY |
2985 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
2986 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 2987 | */ |
b481de9c | 2988 | |
05c914fe | 2989 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
b481de9c ZY |
2990 | if (!conf->bssid) { |
2991 | conf->bssid = priv->mac_addr; | |
2992 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
e174961c JB |
2993 | IWL_DEBUG_MAC80211("bssid was set to: %pM\n", |
2994 | conf->bssid); | |
b481de9c ZY |
2995 | } |
2996 | if (priv->ibss_beacon) | |
2997 | dev_kfree_skb(priv->ibss_beacon); | |
2998 | ||
9d139c81 | 2999 | priv->ibss_beacon = ieee80211_beacon_get(hw, vif); |
b481de9c ZY |
3000 | } |
3001 | ||
fee1247a | 3002 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
3003 | goto done; |
3004 | ||
b481de9c ZY |
3005 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
3006 | !is_multicast_ether_addr(conf->bssid)) { | |
3007 | /* If there is currently a HW scan going on in the background | |
3008 | * then we need to cancel it else the RXON below will fail. */ | |
2a421b91 | 3009 | if (iwl_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
3010 | IWL_WARNING("Aborted scan still in progress " |
3011 | "after 100ms\n"); | |
3012 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
3013 | mutex_unlock(&priv->mutex); | |
3014 | return -EAGAIN; | |
3015 | } | |
3016 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
3017 | ||
3018 | /* TODO: Audit driver for usage of these members and see | |
3019 | * if mac80211 deprecates them (priv->bssid looks like it | |
3020 | * shouldn't be there, but I haven't scanned the IBSS code | |
3021 | * to verify) - jpk */ | |
3022 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
3023 | ||
05c914fe | 3024 | if (priv->iw_mode == NL80211_IFTYPE_AP) |
5b9f8cd3 | 3025 | iwl_config_ap(priv); |
b481de9c | 3026 | else { |
5b9f8cd3 | 3027 | rc = iwl_commit_rxon(priv); |
05c914fe | 3028 | if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc) |
4f40e4d9 | 3029 | iwl_rxon_add_station( |
b481de9c ZY |
3030 | priv, priv->active_rxon.bssid_addr, 1); |
3031 | } | |
3032 | ||
3033 | } else { | |
2a421b91 | 3034 | iwl_scan_cancel_timeout(priv, 100); |
b481de9c | 3035 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
5b9f8cd3 | 3036 | iwl_commit_rxon(priv); |
b481de9c ZY |
3037 | } |
3038 | ||
fde3571f | 3039 | done: |
b481de9c ZY |
3040 | IWL_DEBUG_MAC80211("leave\n"); |
3041 | mutex_unlock(&priv->mutex); | |
3042 | ||
3043 | return 0; | |
3044 | } | |
3045 | ||
5b9f8cd3 | 3046 | static void iwl_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
3047 | unsigned int changed_flags, |
3048 | unsigned int *total_flags, | |
3049 | int mc_count, struct dev_addr_list *mc_list) | |
3050 | { | |
4419e39b | 3051 | struct iwl_priv *priv = hw->priv; |
25b3f57c RF |
3052 | |
3053 | if (changed_flags & (*total_flags) & FIF_OTHER_BSS) { | |
3054 | IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n", | |
05c914fe | 3055 | NL80211_IFTYPE_MONITOR, |
25b3f57c RF |
3056 | changed_flags, *total_flags); |
3057 | /* queue work 'cuz mac80211 is holding a lock which | |
3058 | * prevents us from issuing (synchronous) f/w cmds */ | |
3059 | queue_work(priv->workqueue, &priv->set_monitor); | |
4419e39b | 3060 | } |
25b3f57c RF |
3061 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | |
3062 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | |
4150c572 JB |
3063 | } |
3064 | ||
5b9f8cd3 | 3065 | static void iwl_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
3066 | struct ieee80211_if_init_conf *conf) |
3067 | { | |
c79dd5b5 | 3068 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3069 | |
3070 | IWL_DEBUG_MAC80211("enter\n"); | |
3071 | ||
3072 | mutex_lock(&priv->mutex); | |
948c171c | 3073 | |
fee1247a | 3074 | if (iwl_is_ready_rf(priv)) { |
2a421b91 | 3075 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f | 3076 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
5b9f8cd3 | 3077 | iwl_commit_rxon(priv); |
fde3571f | 3078 | } |
32bfd35d JB |
3079 | if (priv->vif == conf->vif) { |
3080 | priv->vif = NULL; | |
b481de9c | 3081 | memset(priv->bssid, 0, ETH_ALEN); |
b481de9c ZY |
3082 | } |
3083 | mutex_unlock(&priv->mutex); | |
3084 | ||
3085 | IWL_DEBUG_MAC80211("leave\n"); | |
3086 | ||
3087 | } | |
471b3efd | 3088 | |
3109ece1 | 3089 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
5b9f8cd3 | 3090 | static void iwl_bss_info_changed(struct ieee80211_hw *hw, |
471b3efd JB |
3091 | struct ieee80211_vif *vif, |
3092 | struct ieee80211_bss_conf *bss_conf, | |
3093 | u32 changes) | |
220173b0 | 3094 | { |
c79dd5b5 | 3095 | struct iwl_priv *priv = hw->priv; |
220173b0 | 3096 | |
3109ece1 TW |
3097 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
3098 | ||
471b3efd | 3099 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
3100 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
3101 | bss_conf->use_short_preamble); | |
471b3efd | 3102 | if (bss_conf->use_short_preamble) |
220173b0 TW |
3103 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
3104 | else | |
3105 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
3106 | } | |
3107 | ||
471b3efd | 3108 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 3109 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 3110 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
3111 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
3112 | else | |
3113 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
3114 | } | |
3115 | ||
98952d5d | 3116 | if (changes & BSS_CHANGED_HT) { |
5b9f8cd3 | 3117 | iwl_ht_conf(priv, bss_conf); |
c7de35cd | 3118 | iwl_set_rxon_chain(priv); |
98952d5d TW |
3119 | } |
3120 | ||
471b3efd | 3121 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 3122 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
3123 | /* This should never happen as this function should |
3124 | * never be called from interrupt context. */ | |
3125 | if (WARN_ON_ONCE(in_interrupt())) | |
3126 | return; | |
3109ece1 TW |
3127 | if (bss_conf->assoc) { |
3128 | priv->assoc_id = bss_conf->aid; | |
3129 | priv->beacon_int = bss_conf->beacon_int; | |
b5d7be5e | 3130 | priv->power_data.dtim_period = bss_conf->dtim_period; |
3109ece1 TW |
3131 | priv->timestamp = bss_conf->timestamp; |
3132 | priv->assoc_capability = bss_conf->assoc_capability; | |
9ccacb86 TW |
3133 | |
3134 | /* we have just associated, don't start scan too early | |
3135 | * leave time for EAPOL exchange to complete | |
3136 | */ | |
3109ece1 TW |
3137 | priv->next_scan_jiffies = jiffies + |
3138 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 | 3139 | mutex_lock(&priv->mutex); |
5b9f8cd3 | 3140 | iwl_post_associate(priv); |
508e32e1 | 3141 | mutex_unlock(&priv->mutex); |
3109ece1 TW |
3142 | } else { |
3143 | priv->assoc_id = 0; | |
3144 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
3145 | } | |
3146 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
3147 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 3148 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
3149 | } |
3150 | ||
220173b0 | 3151 | } |
b481de9c | 3152 | |
cb43dc25 | 3153 | static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len) |
b481de9c | 3154 | { |
b481de9c | 3155 | unsigned long flags; |
c79dd5b5 | 3156 | struct iwl_priv *priv = hw->priv; |
8d09a5e1 | 3157 | int ret; |
b481de9c ZY |
3158 | |
3159 | IWL_DEBUG_MAC80211("enter\n"); | |
3160 | ||
052c4b9f | 3161 | mutex_lock(&priv->mutex); |
b481de9c ZY |
3162 | spin_lock_irqsave(&priv->lock, flags); |
3163 | ||
fee1247a | 3164 | if (!iwl_is_ready_rf(priv)) { |
cb43dc25 | 3165 | ret = -EIO; |
b481de9c ZY |
3166 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); |
3167 | goto out_unlock; | |
3168 | } | |
3169 | ||
05c914fe | 3170 | if (priv->iw_mode == NL80211_IFTYPE_AP) { /* APs don't scan */ |
cb43dc25 | 3171 | ret = -EIO; |
b481de9c ZY |
3172 | IWL_ERROR("ERROR: APs don't scan\n"); |
3173 | goto out_unlock; | |
3174 | } | |
3175 | ||
8d09a5e1 TW |
3176 | /* We don't schedule scan within next_scan_jiffies period. |
3177 | * Avoid scanning during possible EAPOL exchange, return | |
3178 | * success immediately. | |
3179 | */ | |
7878a5a4 | 3180 | if (priv->next_scan_jiffies && |
cb43dc25 | 3181 | time_after(priv->next_scan_jiffies, jiffies)) { |
681c0050 | 3182 | IWL_DEBUG_SCAN("scan rejected: within next scan period\n"); |
8d09a5e1 TW |
3183 | queue_work(priv->workqueue, &priv->scan_completed); |
3184 | ret = 0; | |
7878a5a4 MA |
3185 | goto out_unlock; |
3186 | } | |
8d09a5e1 | 3187 | |
b481de9c | 3188 | /* if we just finished scan ask for delay */ |
681c0050 | 3189 | if (iwl_is_associated(priv) && priv->last_scan_jiffies && |
cb43dc25 | 3190 | time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) { |
681c0050 | 3191 | IWL_DEBUG_SCAN("scan rejected: within previous scan period\n"); |
8d09a5e1 TW |
3192 | queue_work(priv->workqueue, &priv->scan_completed); |
3193 | ret = 0; | |
b481de9c ZY |
3194 | goto out_unlock; |
3195 | } | |
8d09a5e1 | 3196 | |
cb43dc25 | 3197 | if (ssid_len) { |
b481de9c | 3198 | priv->one_direct_scan = 1; |
cb43dc25 | 3199 | priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE); |
b481de9c | 3200 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); |
cb43dc25 | 3201 | } else { |
948c171c | 3202 | priv->one_direct_scan = 0; |
cb43dc25 | 3203 | } |
b481de9c | 3204 | |
cb43dc25 | 3205 | ret = iwl_scan_initiate(priv); |
b481de9c ZY |
3206 | |
3207 | IWL_DEBUG_MAC80211("leave\n"); | |
3208 | ||
3209 | out_unlock: | |
3210 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 3211 | mutex_unlock(&priv->mutex); |
b481de9c | 3212 | |
cb43dc25 | 3213 | return ret; |
b481de9c ZY |
3214 | } |
3215 | ||
5b9f8cd3 | 3216 | static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw, |
ab885f8c EG |
3217 | struct ieee80211_key_conf *keyconf, const u8 *addr, |
3218 | u32 iv32, u16 *phase1key) | |
3219 | { | |
3220 | struct iwl_priv *priv = hw->priv; | |
3221 | u8 sta_id = IWL_INVALID_STATION; | |
3222 | unsigned long flags; | |
3223 | __le16 key_flags = 0; | |
3224 | int i; | |
ab885f8c EG |
3225 | |
3226 | IWL_DEBUG_MAC80211("enter\n"); | |
3227 | ||
947b13a7 | 3228 | sta_id = iwl_find_station(priv, addr); |
ab885f8c | 3229 | if (sta_id == IWL_INVALID_STATION) { |
e174961c JB |
3230 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", |
3231 | addr); | |
ab885f8c EG |
3232 | return; |
3233 | } | |
3234 | ||
964d2777 JL |
3235 | if (iwl_scan_cancel(priv)) { |
3236 | /* cancel scan failed, just live w/ bad key and rely | |
3237 | briefly on SW decryption */ | |
3238 | return; | |
3239 | } | |
ab885f8c EG |
3240 | |
3241 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
3242 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
3243 | key_flags &= ~STA_KEY_FLG_INVALID; | |
3244 | ||
5425e490 | 3245 | if (sta_id == priv->hw_params.bcast_sta_id) |
ab885f8c EG |
3246 | key_flags |= STA_KEY_MULTICAST_MSK; |
3247 | ||
3248 | spin_lock_irqsave(&priv->sta_lock, flags); | |
3249 | ||
ab885f8c EG |
3250 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
3251 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
3252 | ||
3253 | for (i = 0; i < 5; i++) | |
3254 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
3255 | cpu_to_le16(phase1key[i]); | |
3256 | ||
3257 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
3258 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
3259 | ||
133636de | 3260 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
ab885f8c EG |
3261 | |
3262 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
3263 | ||
3264 | IWL_DEBUG_MAC80211("leave\n"); | |
3265 | } | |
3266 | ||
5b9f8cd3 | 3267 | static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
3268 | const u8 *local_addr, const u8 *addr, |
3269 | struct ieee80211_key_conf *key) | |
3270 | { | |
c79dd5b5 | 3271 | struct iwl_priv *priv = hw->priv; |
deb09c43 EG |
3272 | int ret = 0; |
3273 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 3274 | u8 is_default_wep_key = 0; |
b481de9c ZY |
3275 | |
3276 | IWL_DEBUG_MAC80211("enter\n"); | |
3277 | ||
099b40b7 | 3278 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
3279 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
3280 | return -EOPNOTSUPP; | |
3281 | } | |
3282 | ||
3283 | if (is_zero_ether_addr(addr)) | |
3284 | /* only support pairwise keys */ | |
3285 | return -EOPNOTSUPP; | |
3286 | ||
947b13a7 | 3287 | sta_id = iwl_find_station(priv, addr); |
6974e363 | 3288 | if (sta_id == IWL_INVALID_STATION) { |
e174961c JB |
3289 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", |
3290 | addr); | |
6974e363 | 3291 | return -EINVAL; |
b481de9c | 3292 | |
deb09c43 | 3293 | } |
b481de9c | 3294 | |
6974e363 | 3295 | mutex_lock(&priv->mutex); |
2a421b91 | 3296 | iwl_scan_cancel_timeout(priv, 100); |
6974e363 EG |
3297 | mutex_unlock(&priv->mutex); |
3298 | ||
3299 | /* If we are getting WEP group key and we didn't receive any key mapping | |
3300 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
3301 | * in 1X mode. | |
3302 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 3303 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
05c914fe | 3304 | priv->iw_mode != NL80211_IFTYPE_AP) { |
6974e363 EG |
3305 | if (cmd == SET_KEY) |
3306 | is_default_wep_key = !priv->key_mapping_key; | |
3307 | else | |
ccc038ab EG |
3308 | is_default_wep_key = |
3309 | (key->hw_key_idx == HW_KEY_DEFAULT); | |
6974e363 | 3310 | } |
052c4b9f | 3311 | |
b481de9c | 3312 | switch (cmd) { |
deb09c43 | 3313 | case SET_KEY: |
6974e363 EG |
3314 | if (is_default_wep_key) |
3315 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 3316 | else |
7480513f | 3317 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3318 | |
3319 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
3320 | break; |
3321 | case DISABLE_KEY: | |
6974e363 EG |
3322 | if (is_default_wep_key) |
3323 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 3324 | else |
3ec47732 | 3325 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3326 | |
3327 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
3328 | break; |
3329 | default: | |
deb09c43 | 3330 | ret = -EINVAL; |
b481de9c ZY |
3331 | } |
3332 | ||
3333 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 3334 | |
deb09c43 | 3335 | return ret; |
b481de9c ZY |
3336 | } |
3337 | ||
5b9f8cd3 | 3338 | static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
3339 | const struct ieee80211_tx_queue_params *params) |
3340 | { | |
c79dd5b5 | 3341 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3342 | unsigned long flags; |
3343 | int q; | |
b481de9c ZY |
3344 | |
3345 | IWL_DEBUG_MAC80211("enter\n"); | |
3346 | ||
fee1247a | 3347 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3348 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3349 | return -EIO; | |
3350 | } | |
3351 | ||
3352 | if (queue >= AC_NUM) { | |
3353 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
3354 | return 0; | |
3355 | } | |
3356 | ||
b481de9c ZY |
3357 | if (!priv->qos_data.qos_enable) { |
3358 | priv->qos_data.qos_active = 0; | |
3359 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
3360 | return 0; | |
3361 | } | |
3362 | q = AC_NUM - 1 - queue; | |
3363 | ||
3364 | spin_lock_irqsave(&priv->lock, flags); | |
3365 | ||
3366 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
3367 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
3368 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
3369 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 3370 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
3371 | |
3372 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
3373 | priv->qos_data.qos_active = 1; | |
3374 | ||
05c914fe | 3375 | if (priv->iw_mode == NL80211_IFTYPE_AP) |
1ff50bda | 3376 | iwl_activate_qos(priv, 1); |
3109ece1 | 3377 | else if (priv->assoc_id && iwl_is_associated(priv)) |
1ff50bda | 3378 | iwl_activate_qos(priv, 0); |
b481de9c | 3379 | |
1ff50bda | 3380 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3381 | |
b481de9c ZY |
3382 | IWL_DEBUG_MAC80211("leave\n"); |
3383 | return 0; | |
3384 | } | |
3385 | ||
5b9f8cd3 | 3386 | static int iwl_mac_ampdu_action(struct ieee80211_hw *hw, |
d783b061 | 3387 | enum ieee80211_ampdu_mlme_action action, |
17741cdc | 3388 | struct ieee80211_sta *sta, u16 tid, u16 *ssn) |
d783b061 TW |
3389 | { |
3390 | struct iwl_priv *priv = hw->priv; | |
d783b061 | 3391 | |
e174961c JB |
3392 | IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n", |
3393 | sta->addr, tid); | |
d783b061 TW |
3394 | |
3395 | if (!(priv->cfg->sku & IWL_SKU_N)) | |
3396 | return -EACCES; | |
3397 | ||
3398 | switch (action) { | |
3399 | case IEEE80211_AMPDU_RX_START: | |
3400 | IWL_DEBUG_HT("start Rx\n"); | |
17741cdc | 3401 | return iwl_rx_agg_start(priv, sta->addr, tid, *ssn); |
d783b061 TW |
3402 | case IEEE80211_AMPDU_RX_STOP: |
3403 | IWL_DEBUG_HT("stop Rx\n"); | |
17741cdc | 3404 | return iwl_rx_agg_stop(priv, sta->addr, tid); |
d783b061 TW |
3405 | case IEEE80211_AMPDU_TX_START: |
3406 | IWL_DEBUG_HT("start Tx\n"); | |
17741cdc | 3407 | return iwl_tx_agg_start(priv, sta->addr, tid, ssn); |
d783b061 TW |
3408 | case IEEE80211_AMPDU_TX_STOP: |
3409 | IWL_DEBUG_HT("stop Tx\n"); | |
17741cdc | 3410 | return iwl_tx_agg_stop(priv, sta->addr, tid); |
d783b061 TW |
3411 | default: |
3412 | IWL_DEBUG_HT("unknown\n"); | |
3413 | return -EINVAL; | |
3414 | break; | |
3415 | } | |
3416 | return 0; | |
3417 | } | |
5b9f8cd3 | 3418 | static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3419 | struct ieee80211_tx_queue_stats *stats) |
3420 | { | |
c79dd5b5 | 3421 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3422 | int i, avail; |
16466903 | 3423 | struct iwl_tx_queue *txq; |
443cfd45 | 3424 | struct iwl_queue *q; |
b481de9c ZY |
3425 | unsigned long flags; |
3426 | ||
3427 | IWL_DEBUG_MAC80211("enter\n"); | |
3428 | ||
fee1247a | 3429 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3430 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3431 | return -EIO; | |
3432 | } | |
3433 | ||
3434 | spin_lock_irqsave(&priv->lock, flags); | |
3435 | ||
3436 | for (i = 0; i < AC_NUM; i++) { | |
3437 | txq = &priv->txq[i]; | |
3438 | q = &txq->q; | |
443cfd45 | 3439 | avail = iwl_queue_space(q); |
b481de9c | 3440 | |
57ffc589 JB |
3441 | stats[i].len = q->n_window - avail; |
3442 | stats[i].limit = q->n_window - q->high_mark; | |
3443 | stats[i].count = q->n_window; | |
b481de9c ZY |
3444 | |
3445 | } | |
3446 | spin_unlock_irqrestore(&priv->lock, flags); | |
3447 | ||
3448 | IWL_DEBUG_MAC80211("leave\n"); | |
3449 | ||
3450 | return 0; | |
3451 | } | |
3452 | ||
5b9f8cd3 | 3453 | static int iwl_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3454 | struct ieee80211_low_level_stats *stats) |
3455 | { | |
bf403db8 EK |
3456 | struct iwl_priv *priv = hw->priv; |
3457 | ||
3458 | priv = hw->priv; | |
b481de9c ZY |
3459 | IWL_DEBUG_MAC80211("enter\n"); |
3460 | IWL_DEBUG_MAC80211("leave\n"); | |
3461 | ||
3462 | return 0; | |
3463 | } | |
3464 | ||
5b9f8cd3 | 3465 | static void iwl_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 3466 | { |
c79dd5b5 | 3467 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3468 | unsigned long flags; |
3469 | ||
3470 | mutex_lock(&priv->mutex); | |
3471 | IWL_DEBUG_MAC80211("enter\n"); | |
3472 | ||
b481de9c | 3473 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 3474 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 3475 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3476 | |
c7de35cd | 3477 | iwl_reset_qos(priv); |
b481de9c | 3478 | |
b481de9c ZY |
3479 | spin_lock_irqsave(&priv->lock, flags); |
3480 | priv->assoc_id = 0; | |
3481 | priv->assoc_capability = 0; | |
b481de9c ZY |
3482 | priv->assoc_station_added = 0; |
3483 | ||
3484 | /* new association get rid of ibss beacon skb */ | |
3485 | if (priv->ibss_beacon) | |
3486 | dev_kfree_skb(priv->ibss_beacon); | |
3487 | ||
3488 | priv->ibss_beacon = NULL; | |
3489 | ||
3490 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 3491 | priv->timestamp = 0; |
05c914fe | 3492 | if ((priv->iw_mode == NL80211_IFTYPE_STATION)) |
b481de9c ZY |
3493 | priv->beacon_int = 0; |
3494 | ||
3495 | spin_unlock_irqrestore(&priv->lock, flags); | |
3496 | ||
fee1247a | 3497 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
3498 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
3499 | mutex_unlock(&priv->mutex); | |
3500 | return; | |
3501 | } | |
3502 | ||
052c4b9f | 3503 | /* we are restarting association process |
3504 | * clear RXON_FILTER_ASSOC_MSK bit | |
3505 | */ | |
05c914fe | 3506 | if (priv->iw_mode != NL80211_IFTYPE_AP) { |
2a421b91 | 3507 | iwl_scan_cancel_timeout(priv, 100); |
052c4b9f | 3508 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
5b9f8cd3 | 3509 | iwl_commit_rxon(priv); |
052c4b9f | 3510 | } |
3511 | ||
5da4b55f MA |
3512 | iwl_power_update_mode(priv, 0); |
3513 | ||
b481de9c | 3514 | /* Per mac80211.h: This is only used in IBSS mode... */ |
05c914fe | 3515 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
052c4b9f | 3516 | |
c90a74ba EG |
3517 | /* switch to CAM during association period. |
3518 | * the ucode will block any association/authentication | |
3519 | * frome during assiciation period if it can not hear | |
3520 | * the AP because of PM. the timer enable PM back is | |
3521 | * association do not complete | |
3522 | */ | |
3523 | if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN | | |
3524 | IEEE80211_CHAN_RADAR)) | |
3525 | iwl_power_disable_management(priv, 3000); | |
3526 | ||
b481de9c ZY |
3527 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
3528 | mutex_unlock(&priv->mutex); | |
3529 | return; | |
3530 | } | |
3531 | ||
5b9f8cd3 | 3532 | iwl_set_rate(priv); |
b481de9c ZY |
3533 | |
3534 | mutex_unlock(&priv->mutex); | |
3535 | ||
3536 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
3537 | } |
3538 | ||
5b9f8cd3 | 3539 | static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 3540 | { |
c79dd5b5 | 3541 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3542 | unsigned long flags; |
2ff75b78 | 3543 | __le64 timestamp; |
b481de9c | 3544 | |
b481de9c ZY |
3545 | IWL_DEBUG_MAC80211("enter\n"); |
3546 | ||
fee1247a | 3547 | if (!iwl_is_ready_rf(priv)) { |
b481de9c | 3548 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
b481de9c ZY |
3549 | return -EIO; |
3550 | } | |
3551 | ||
05c914fe | 3552 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
b481de9c | 3553 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); |
b481de9c ZY |
3554 | return -EIO; |
3555 | } | |
3556 | ||
3557 | spin_lock_irqsave(&priv->lock, flags); | |
3558 | ||
3559 | if (priv->ibss_beacon) | |
3560 | dev_kfree_skb(priv->ibss_beacon); | |
3561 | ||
3562 | priv->ibss_beacon = skb; | |
3563 | ||
3564 | priv->assoc_id = 0; | |
2ff75b78 | 3565 | timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
b94d8eea | 3566 | priv->timestamp = le64_to_cpu(timestamp); |
b481de9c ZY |
3567 | |
3568 | IWL_DEBUG_MAC80211("leave\n"); | |
3569 | spin_unlock_irqrestore(&priv->lock, flags); | |
3570 | ||
c7de35cd | 3571 | iwl_reset_qos(priv); |
b481de9c | 3572 | |
5b9f8cd3 | 3573 | iwl_post_associate(priv); |
b481de9c | 3574 | |
b481de9c ZY |
3575 | |
3576 | return 0; | |
3577 | } | |
3578 | ||
b481de9c ZY |
3579 | /***************************************************************************** |
3580 | * | |
3581 | * sysfs attributes | |
3582 | * | |
3583 | *****************************************************************************/ | |
3584 | ||
0a6857e7 | 3585 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
3586 | |
3587 | /* | |
3588 | * The following adds a new attribute to the sysfs representation | |
3589 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
3590 | * used for controlling the debug level. | |
3591 | * | |
3592 | * See the level definitions in iwl for details. | |
3593 | */ | |
3594 | ||
8cf769c6 EK |
3595 | static ssize_t show_debug_level(struct device *d, |
3596 | struct device_attribute *attr, char *buf) | |
b481de9c | 3597 | { |
8cf769c6 EK |
3598 | struct iwl_priv *priv = d->driver_data; |
3599 | ||
3600 | return sprintf(buf, "0x%08X\n", priv->debug_level); | |
b481de9c | 3601 | } |
8cf769c6 EK |
3602 | static ssize_t store_debug_level(struct device *d, |
3603 | struct device_attribute *attr, | |
b481de9c ZY |
3604 | const char *buf, size_t count) |
3605 | { | |
8cf769c6 | 3606 | struct iwl_priv *priv = d->driver_data; |
9257746f TW |
3607 | unsigned long val; |
3608 | int ret; | |
b481de9c | 3609 | |
9257746f TW |
3610 | ret = strict_strtoul(buf, 0, &val); |
3611 | if (ret) | |
b481de9c ZY |
3612 | printk(KERN_INFO DRV_NAME |
3613 | ": %s is not in hex or decimal form.\n", buf); | |
3614 | else | |
8cf769c6 | 3615 | priv->debug_level = val; |
b481de9c ZY |
3616 | |
3617 | return strnlen(buf, count); | |
3618 | } | |
3619 | ||
8cf769c6 EK |
3620 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, |
3621 | show_debug_level, store_debug_level); | |
3622 | ||
b481de9c | 3623 | |
0a6857e7 | 3624 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 3625 | |
b481de9c | 3626 | |
bc6f59bc TW |
3627 | static ssize_t show_version(struct device *d, |
3628 | struct device_attribute *attr, char *buf) | |
3629 | { | |
3630 | struct iwl_priv *priv = d->driver_data; | |
885ba202 | 3631 | struct iwl_alive_resp *palive = &priv->card_alive; |
f236a265 TW |
3632 | ssize_t pos = 0; |
3633 | u16 eeprom_ver; | |
bc6f59bc TW |
3634 | |
3635 | if (palive->is_valid) | |
f236a265 TW |
3636 | pos += sprintf(buf + pos, |
3637 | "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n" | |
3638 | "fw type: 0x%01X 0x%01X\n", | |
bc6f59bc TW |
3639 | palive->ucode_major, palive->ucode_minor, |
3640 | palive->sw_rev[0], palive->sw_rev[1], | |
3641 | palive->ver_type, palive->ver_subtype); | |
bc6f59bc | 3642 | else |
f236a265 TW |
3643 | pos += sprintf(buf + pos, "fw not loaded\n"); |
3644 | ||
3645 | if (priv->eeprom) { | |
3646 | eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION); | |
3647 | pos += sprintf(buf + pos, "EEPROM version: 0x%x\n", | |
3648 | eeprom_ver); | |
3649 | } else { | |
3650 | pos += sprintf(buf + pos, "EEPROM not initialzed\n"); | |
3651 | } | |
3652 | ||
3653 | return pos; | |
bc6f59bc TW |
3654 | } |
3655 | ||
3656 | static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL); | |
3657 | ||
b481de9c ZY |
3658 | static ssize_t show_temperature(struct device *d, |
3659 | struct device_attribute *attr, char *buf) | |
3660 | { | |
c79dd5b5 | 3661 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 3662 | |
fee1247a | 3663 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
3664 | return -EAGAIN; |
3665 | ||
91dbc5bd | 3666 | return sprintf(buf, "%d\n", priv->temperature); |
b481de9c ZY |
3667 | } |
3668 | ||
3669 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
3670 | ||
b481de9c ZY |
3671 | static ssize_t show_tx_power(struct device *d, |
3672 | struct device_attribute *attr, char *buf) | |
3673 | { | |
c79dd5b5 | 3674 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
630fe9b6 | 3675 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); |
b481de9c ZY |
3676 | } |
3677 | ||
3678 | static ssize_t store_tx_power(struct device *d, | |
3679 | struct device_attribute *attr, | |
3680 | const char *buf, size_t count) | |
3681 | { | |
c79dd5b5 | 3682 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3683 | unsigned long val; |
3684 | int ret; | |
b481de9c | 3685 | |
9257746f TW |
3686 | ret = strict_strtoul(buf, 10, &val); |
3687 | if (ret) | |
b481de9c ZY |
3688 | printk(KERN_INFO DRV_NAME |
3689 | ": %s is not in decimal form.\n", buf); | |
3690 | else | |
630fe9b6 | 3691 | iwl_set_tx_power(priv, val, false); |
b481de9c ZY |
3692 | |
3693 | return count; | |
3694 | } | |
3695 | ||
3696 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
3697 | ||
3698 | static ssize_t show_flags(struct device *d, | |
3699 | struct device_attribute *attr, char *buf) | |
3700 | { | |
c79dd5b5 | 3701 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3702 | |
3703 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
3704 | } | |
3705 | ||
3706 | static ssize_t store_flags(struct device *d, | |
3707 | struct device_attribute *attr, | |
3708 | const char *buf, size_t count) | |
3709 | { | |
c79dd5b5 | 3710 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3711 | unsigned long val; |
3712 | u32 flags; | |
3713 | int ret = strict_strtoul(buf, 0, &val); | |
926f0b2e | 3714 | if (ret) |
9257746f TW |
3715 | return ret; |
3716 | flags = (u32)val; | |
b481de9c ZY |
3717 | |
3718 | mutex_lock(&priv->mutex); | |
3719 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
3720 | /* Cancel any currently running scans... */ | |
2a421b91 | 3721 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3722 | IWL_WARNING("Could not cancel scan.\n"); |
3723 | else { | |
9257746f | 3724 | IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags); |
b481de9c | 3725 | priv->staging_rxon.flags = cpu_to_le32(flags); |
5b9f8cd3 | 3726 | iwl_commit_rxon(priv); |
b481de9c ZY |
3727 | } |
3728 | } | |
3729 | mutex_unlock(&priv->mutex); | |
3730 | ||
3731 | return count; | |
3732 | } | |
3733 | ||
3734 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
3735 | ||
3736 | static ssize_t show_filter_flags(struct device *d, | |
3737 | struct device_attribute *attr, char *buf) | |
3738 | { | |
c79dd5b5 | 3739 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3740 | |
3741 | return sprintf(buf, "0x%04X\n", | |
3742 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
3743 | } | |
3744 | ||
3745 | static ssize_t store_filter_flags(struct device *d, | |
3746 | struct device_attribute *attr, | |
3747 | const char *buf, size_t count) | |
3748 | { | |
c79dd5b5 | 3749 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3750 | unsigned long val; |
3751 | u32 filter_flags; | |
3752 | int ret = strict_strtoul(buf, 0, &val); | |
926f0b2e | 3753 | if (ret) |
9257746f TW |
3754 | return ret; |
3755 | filter_flags = (u32)val; | |
b481de9c ZY |
3756 | |
3757 | mutex_lock(&priv->mutex); | |
3758 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
3759 | /* Cancel any currently running scans... */ | |
2a421b91 | 3760 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3761 | IWL_WARNING("Could not cancel scan.\n"); |
3762 | else { | |
3763 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
3764 | "0x%04X\n", filter_flags); | |
3765 | priv->staging_rxon.filter_flags = | |
3766 | cpu_to_le32(filter_flags); | |
5b9f8cd3 | 3767 | iwl_commit_rxon(priv); |
b481de9c ZY |
3768 | } |
3769 | } | |
3770 | mutex_unlock(&priv->mutex); | |
3771 | ||
3772 | return count; | |
3773 | } | |
3774 | ||
3775 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
3776 | store_filter_flags); | |
3777 | ||
4fc22b21 | 3778 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
3779 | |
3780 | static ssize_t show_measurement(struct device *d, | |
3781 | struct device_attribute *attr, char *buf) | |
3782 | { | |
c79dd5b5 | 3783 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 3784 | struct iwl4965_spectrum_notification measure_report; |
b481de9c | 3785 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
3ac7f146 | 3786 | u8 *data = (u8 *)&measure_report; |
b481de9c ZY |
3787 | unsigned long flags; |
3788 | ||
3789 | spin_lock_irqsave(&priv->lock, flags); | |
3790 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
3791 | spin_unlock_irqrestore(&priv->lock, flags); | |
3792 | return 0; | |
3793 | } | |
3794 | memcpy(&measure_report, &priv->measure_report, size); | |
3795 | priv->measurement_status = 0; | |
3796 | spin_unlock_irqrestore(&priv->lock, flags); | |
3797 | ||
3798 | while (size && (PAGE_SIZE - len)) { | |
3799 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
3800 | PAGE_SIZE - len, 1); | |
3801 | len = strlen(buf); | |
3802 | if (PAGE_SIZE - len) | |
3803 | buf[len++] = '\n'; | |
3804 | ||
3805 | ofs += 16; | |
3806 | size -= min(size, 16U); | |
3807 | } | |
3808 | ||
3809 | return len; | |
3810 | } | |
3811 | ||
3812 | static ssize_t store_measurement(struct device *d, | |
3813 | struct device_attribute *attr, | |
3814 | const char *buf, size_t count) | |
3815 | { | |
c79dd5b5 | 3816 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3817 | struct ieee80211_measurement_params params = { |
3818 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
3819 | .start_time = cpu_to_le64(priv->last_tsf), | |
3820 | .duration = cpu_to_le16(1), | |
3821 | }; | |
3822 | u8 type = IWL_MEASURE_BASIC; | |
3823 | u8 buffer[32]; | |
3824 | u8 channel; | |
3825 | ||
3826 | if (count) { | |
3827 | char *p = buffer; | |
3828 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
3829 | channel = simple_strtoul(p, NULL, 0); | |
3830 | if (channel) | |
3831 | params.channel = channel; | |
3832 | ||
3833 | p = buffer; | |
3834 | while (*p && *p != ' ') | |
3835 | p++; | |
3836 | if (*p) | |
3837 | type = simple_strtoul(p + 1, NULL, 0); | |
3838 | } | |
3839 | ||
3840 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
3841 | "channel %d (for '%s')\n", type, params.channel, buf); | |
5b9f8cd3 | 3842 | iwl_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
3843 | |
3844 | return count; | |
3845 | } | |
3846 | ||
3847 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
3848 | show_measurement, store_measurement); | |
4fc22b21 | 3849 | #endif /* CONFIG_IWLAGN_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
3850 | |
3851 | static ssize_t store_retry_rate(struct device *d, | |
3852 | struct device_attribute *attr, | |
3853 | const char *buf, size_t count) | |
3854 | { | |
c79dd5b5 | 3855 | struct iwl_priv *priv = dev_get_drvdata(d); |
9257746f TW |
3856 | long val; |
3857 | int ret = strict_strtol(buf, 10, &val); | |
3858 | if (!ret) | |
3859 | return ret; | |
b481de9c | 3860 | |
9257746f | 3861 | priv->retry_rate = (val > 0) ? val : 1; |
b481de9c ZY |
3862 | |
3863 | return count; | |
3864 | } | |
3865 | ||
3866 | static ssize_t show_retry_rate(struct device *d, | |
3867 | struct device_attribute *attr, char *buf) | |
3868 | { | |
c79dd5b5 | 3869 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3870 | return sprintf(buf, "%d", priv->retry_rate); |
3871 | } | |
3872 | ||
3873 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
3874 | store_retry_rate); | |
3875 | ||
3876 | static ssize_t store_power_level(struct device *d, | |
3877 | struct device_attribute *attr, | |
3878 | const char *buf, size_t count) | |
3879 | { | |
c79dd5b5 | 3880 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 | 3881 | int ret; |
9257746f TW |
3882 | unsigned long mode; |
3883 | ||
b481de9c | 3884 | |
b481de9c ZY |
3885 | mutex_lock(&priv->mutex); |
3886 | ||
fee1247a | 3887 | if (!iwl_is_ready(priv)) { |
298df1f6 | 3888 | ret = -EAGAIN; |
b481de9c ZY |
3889 | goto out; |
3890 | } | |
3891 | ||
9257746f | 3892 | ret = strict_strtoul(buf, 10, &mode); |
926f0b2e | 3893 | if (ret) |
9257746f TW |
3894 | goto out; |
3895 | ||
298df1f6 EK |
3896 | ret = iwl_power_set_user_mode(priv, mode); |
3897 | if (ret) { | |
5da4b55f MA |
3898 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); |
3899 | goto out; | |
b481de9c | 3900 | } |
298df1f6 | 3901 | ret = count; |
b481de9c ZY |
3902 | |
3903 | out: | |
3904 | mutex_unlock(&priv->mutex); | |
298df1f6 | 3905 | return ret; |
b481de9c ZY |
3906 | } |
3907 | ||
b481de9c ZY |
3908 | static ssize_t show_power_level(struct device *d, |
3909 | struct device_attribute *attr, char *buf) | |
3910 | { | |
c79dd5b5 | 3911 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 EK |
3912 | int mode = priv->power_data.user_power_setting; |
3913 | int system = priv->power_data.system_power_setting; | |
5da4b55f | 3914 | int level = priv->power_data.power_mode; |
b481de9c ZY |
3915 | char *p = buf; |
3916 | ||
298df1f6 EK |
3917 | switch (system) { |
3918 | case IWL_POWER_SYS_AUTO: | |
3919 | p += sprintf(p, "SYSTEM:auto"); | |
b481de9c | 3920 | break; |
298df1f6 EK |
3921 | case IWL_POWER_SYS_AC: |
3922 | p += sprintf(p, "SYSTEM:ac"); | |
3923 | break; | |
3924 | case IWL_POWER_SYS_BATTERY: | |
3925 | p += sprintf(p, "SYSTEM:battery"); | |
b481de9c | 3926 | break; |
b481de9c | 3927 | } |
298df1f6 EK |
3928 | |
3929 | p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto"); | |
3930 | p += sprintf(p, "\tINDEX:%d", level); | |
3931 | p += sprintf(p, "\n"); | |
3ac7f146 | 3932 | return p - buf + 1; |
b481de9c ZY |
3933 | } |
3934 | ||
3935 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
3936 | store_power_level); | |
3937 | ||
3938 | static ssize_t show_channels(struct device *d, | |
3939 | struct device_attribute *attr, char *buf) | |
3940 | { | |
5d72a1f5 EK |
3941 | |
3942 | struct iwl_priv *priv = dev_get_drvdata(d); | |
3943 | struct ieee80211_channel *channels = NULL; | |
3944 | const struct ieee80211_supported_band *supp_band = NULL; | |
3945 | int len = 0, i; | |
3946 | int count = 0; | |
3947 | ||
3948 | if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status)) | |
3949 | return -EAGAIN; | |
3950 | ||
3951 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ); | |
3952 | channels = supp_band->channels; | |
3953 | count = supp_band->n_channels; | |
3954 | ||
3955 | len += sprintf(&buf[len], | |
3956 | "Displaying %d channels in 2.4GHz band " | |
3957 | "(802.11bg):\n", count); | |
3958 | ||
3959 | for (i = 0; i < count; i++) | |
3960 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
3961 | ieee80211_frequency_to_channel( | |
3962 | channels[i].center_freq), | |
3963 | channels[i].max_power, | |
3964 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
3965 | " (IEEE 802.11h required)" : "", | |
3966 | (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
3967 | || (channels[i].flags & | |
3968 | IEEE80211_CHAN_RADAR)) ? "" : | |
3969 | ", IBSS", | |
3970 | channels[i].flags & | |
3971 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
3972 | "passive only" : "active/passive"); | |
3973 | ||
3974 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ); | |
3975 | channels = supp_band->channels; | |
3976 | count = supp_band->n_channels; | |
3977 | ||
3978 | len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band " | |
3979 | "(802.11a):\n", count); | |
3980 | ||
3981 | for (i = 0; i < count; i++) | |
3982 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
3983 | ieee80211_frequency_to_channel( | |
3984 | channels[i].center_freq), | |
3985 | channels[i].max_power, | |
3986 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
3987 | " (IEEE 802.11h required)" : "", | |
3988 | ((channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
3989 | || (channels[i].flags & | |
3990 | IEEE80211_CHAN_RADAR)) ? "" : | |
3991 | ", IBSS", | |
3992 | channels[i].flags & | |
3993 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
3994 | "passive only" : "active/passive"); | |
3995 | ||
3996 | return len; | |
b481de9c ZY |
3997 | } |
3998 | ||
3999 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
4000 | ||
4001 | static ssize_t show_statistics(struct device *d, | |
4002 | struct device_attribute *attr, char *buf) | |
4003 | { | |
c79dd5b5 | 4004 | struct iwl_priv *priv = dev_get_drvdata(d); |
8f91aecb | 4005 | u32 size = sizeof(struct iwl_notif_statistics); |
b481de9c | 4006 | u32 len = 0, ofs = 0; |
3ac7f146 | 4007 | u8 *data = (u8 *)&priv->statistics; |
b481de9c ZY |
4008 | int rc = 0; |
4009 | ||
fee1247a | 4010 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4011 | return -EAGAIN; |
4012 | ||
4013 | mutex_lock(&priv->mutex); | |
49ea8596 | 4014 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
4015 | mutex_unlock(&priv->mutex); |
4016 | ||
4017 | if (rc) { | |
4018 | len = sprintf(buf, | |
4019 | "Error sending statistics request: 0x%08X\n", rc); | |
4020 | return len; | |
4021 | } | |
4022 | ||
4023 | while (size && (PAGE_SIZE - len)) { | |
4024 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
4025 | PAGE_SIZE - len, 1); | |
4026 | len = strlen(buf); | |
4027 | if (PAGE_SIZE - len) | |
4028 | buf[len++] = '\n'; | |
4029 | ||
4030 | ofs += 16; | |
4031 | size -= min(size, 16U); | |
4032 | } | |
4033 | ||
4034 | return len; | |
4035 | } | |
4036 | ||
4037 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
4038 | ||
b481de9c ZY |
4039 | static ssize_t show_status(struct device *d, |
4040 | struct device_attribute *attr, char *buf) | |
4041 | { | |
c79dd5b5 | 4042 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 4043 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4044 | return -EAGAIN; |
4045 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
4046 | } | |
4047 | ||
4048 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
4049 | ||
b481de9c ZY |
4050 | /***************************************************************************** |
4051 | * | |
4052 | * driver setup and teardown | |
4053 | * | |
4054 | *****************************************************************************/ | |
4055 | ||
4e39317d | 4056 | static void iwl_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
4057 | { |
4058 | priv->workqueue = create_workqueue(DRV_NAME); | |
4059 | ||
4060 | init_waitqueue_head(&priv->wait_command_queue); | |
4061 | ||
5b9f8cd3 EG |
4062 | INIT_WORK(&priv->up, iwl_bg_up); |
4063 | INIT_WORK(&priv->restart, iwl_bg_restart); | |
4064 | INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish); | |
4065 | INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill); | |
4066 | INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update); | |
4067 | INIT_WORK(&priv->set_monitor, iwl_bg_set_monitor); | |
16e727e8 | 4068 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); |
4a4a9e81 TW |
4069 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start); |
4070 | INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start); | |
2a421b91 | 4071 | |
2a421b91 | 4072 | iwl_setup_scan_deferred_work(priv); |
c90a74ba | 4073 | iwl_setup_power_deferred_work(priv); |
bb8c093b | 4074 | |
4e39317d EG |
4075 | if (priv->cfg->ops->lib->setup_deferred_work) |
4076 | priv->cfg->ops->lib->setup_deferred_work(priv); | |
4077 | ||
4078 | init_timer(&priv->statistics_periodic); | |
4079 | priv->statistics_periodic.data = (unsigned long)priv; | |
5b9f8cd3 | 4080 | priv->statistics_periodic.function = iwl_bg_statistics_periodic; |
b481de9c ZY |
4081 | |
4082 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
5b9f8cd3 | 4083 | iwl_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
4084 | } |
4085 | ||
4e39317d | 4086 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 4087 | { |
4e39317d EG |
4088 | if (priv->cfg->ops->lib->cancel_deferred_work) |
4089 | priv->cfg->ops->lib->cancel_deferred_work(priv); | |
b481de9c | 4090 | |
3ae6a054 | 4091 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c | 4092 | cancel_delayed_work(&priv->scan_check); |
c90a74ba | 4093 | cancel_delayed_work_sync(&priv->set_power_save); |
b481de9c | 4094 | cancel_delayed_work(&priv->alive_start); |
b481de9c | 4095 | cancel_work_sync(&priv->beacon_update); |
4e39317d | 4096 | del_timer_sync(&priv->statistics_periodic); |
b481de9c ZY |
4097 | } |
4098 | ||
5b9f8cd3 | 4099 | static struct attribute *iwl_sysfs_entries[] = { |
b481de9c | 4100 | &dev_attr_channels.attr, |
b481de9c ZY |
4101 | &dev_attr_flags.attr, |
4102 | &dev_attr_filter_flags.attr, | |
4fc22b21 | 4103 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
4104 | &dev_attr_measurement.attr, |
4105 | #endif | |
4106 | &dev_attr_power_level.attr, | |
4107 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
4108 | &dev_attr_statistics.attr, |
4109 | &dev_attr_status.attr, | |
4110 | &dev_attr_temperature.attr, | |
b481de9c | 4111 | &dev_attr_tx_power.attr, |
8cf769c6 EK |
4112 | #ifdef CONFIG_IWLWIFI_DEBUG |
4113 | &dev_attr_debug_level.attr, | |
4114 | #endif | |
bc6f59bc | 4115 | &dev_attr_version.attr, |
b481de9c ZY |
4116 | |
4117 | NULL | |
4118 | }; | |
4119 | ||
5b9f8cd3 | 4120 | static struct attribute_group iwl_attribute_group = { |
b481de9c | 4121 | .name = NULL, /* put in device directory */ |
5b9f8cd3 | 4122 | .attrs = iwl_sysfs_entries, |
b481de9c ZY |
4123 | }; |
4124 | ||
5b9f8cd3 EG |
4125 | static struct ieee80211_ops iwl_hw_ops = { |
4126 | .tx = iwl_mac_tx, | |
4127 | .start = iwl_mac_start, | |
4128 | .stop = iwl_mac_stop, | |
4129 | .add_interface = iwl_mac_add_interface, | |
4130 | .remove_interface = iwl_mac_remove_interface, | |
4131 | .config = iwl_mac_config, | |
4132 | .config_interface = iwl_mac_config_interface, | |
4133 | .configure_filter = iwl_configure_filter, | |
4134 | .set_key = iwl_mac_set_key, | |
4135 | .update_tkip_key = iwl_mac_update_tkip_key, | |
4136 | .get_stats = iwl_mac_get_stats, | |
4137 | .get_tx_stats = iwl_mac_get_tx_stats, | |
4138 | .conf_tx = iwl_mac_conf_tx, | |
4139 | .reset_tsf = iwl_mac_reset_tsf, | |
4140 | .bss_info_changed = iwl_bss_info_changed, | |
4141 | .ampdu_action = iwl_mac_ampdu_action, | |
cb43dc25 | 4142 | .hw_scan = iwl_mac_hw_scan |
b481de9c ZY |
4143 | }; |
4144 | ||
5b9f8cd3 | 4145 | static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
4146 | { |
4147 | int err = 0; | |
c79dd5b5 | 4148 | struct iwl_priv *priv; |
b481de9c | 4149 | struct ieee80211_hw *hw; |
82b9a121 | 4150 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 4151 | unsigned long flags; |
b481de9c | 4152 | |
316c30d9 AK |
4153 | /************************ |
4154 | * 1. Allocating HW data | |
4155 | ************************/ | |
4156 | ||
6440adb5 CB |
4157 | /* Disabling hardware scan means that mac80211 will perform scans |
4158 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 4159 | if (cfg->mod_params->disable_hw_scan) { |
bf403db8 EK |
4160 | if (cfg->mod_params->debug & IWL_DL_INFO) |
4161 | dev_printk(KERN_DEBUG, &(pdev->dev), | |
4162 | "Disabling hw_scan\n"); | |
5b9f8cd3 | 4163 | iwl_hw_ops.hw_scan = NULL; |
b481de9c ZY |
4164 | } |
4165 | ||
5b9f8cd3 | 4166 | hw = iwl_alloc_all(cfg, &iwl_hw_ops); |
1d0a082d | 4167 | if (!hw) { |
b481de9c ZY |
4168 | err = -ENOMEM; |
4169 | goto out; | |
4170 | } | |
1d0a082d AK |
4171 | priv = hw->priv; |
4172 | /* At this point both hw and priv are allocated. */ | |
4173 | ||
b481de9c ZY |
4174 | SET_IEEE80211_DEV(hw, &pdev->dev); |
4175 | ||
4176 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 4177 | priv->cfg = cfg; |
b481de9c | 4178 | priv->pci_dev = pdev; |
316c30d9 | 4179 | |
0a6857e7 | 4180 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 4181 | priv->debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
4182 | atomic_set(&priv->restrict_refcnt, 0); |
4183 | #endif | |
b481de9c | 4184 | |
316c30d9 AK |
4185 | /************************** |
4186 | * 2. Initializing PCI bus | |
4187 | **************************/ | |
4188 | if (pci_enable_device(pdev)) { | |
4189 | err = -ENODEV; | |
4190 | goto out_ieee80211_free_hw; | |
4191 | } | |
4192 | ||
4193 | pci_set_master(pdev); | |
4194 | ||
093d874c | 4195 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36)); |
316c30d9 | 4196 | if (!err) |
093d874c | 4197 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36)); |
cc2a8ea8 | 4198 | if (err) { |
093d874c | 4199 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
cc2a8ea8 | 4200 | if (!err) |
093d874c | 4201 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
cc2a8ea8 | 4202 | /* both attempts failed: */ |
316c30d9 | 4203 | if (err) { |
cc2a8ea8 RR |
4204 | printk(KERN_WARNING "%s: No suitable DMA available.\n", |
4205 | DRV_NAME); | |
316c30d9 | 4206 | goto out_pci_disable_device; |
cc2a8ea8 | 4207 | } |
316c30d9 AK |
4208 | } |
4209 | ||
4210 | err = pci_request_regions(pdev, DRV_NAME); | |
4211 | if (err) | |
4212 | goto out_pci_disable_device; | |
4213 | ||
4214 | pci_set_drvdata(pdev, priv); | |
4215 | ||
316c30d9 AK |
4216 | |
4217 | /*********************** | |
4218 | * 3. Read REV register | |
4219 | ***********************/ | |
4220 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
4221 | if (!priv->hw_base) { | |
4222 | err = -ENODEV; | |
4223 | goto out_pci_release_regions; | |
4224 | } | |
4225 | ||
4226 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
4227 | (unsigned long long) pci_resource_len(pdev, 0)); | |
4228 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
4229 | ||
b661c819 | 4230 | iwl_hw_detect(priv); |
316c30d9 | 4231 | printk(KERN_INFO DRV_NAME |
b661c819 TW |
4232 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
4233 | priv->cfg->name, priv->hw_rev); | |
316c30d9 | 4234 | |
e7b63581 TW |
4235 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
4236 | * PCI Tx retries from interfering with C3 CPU state */ | |
4237 | pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); | |
4238 | ||
91238714 TW |
4239 | /* amp init */ |
4240 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
316c30d9 | 4241 | if (err < 0) { |
91238714 | 4242 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
316c30d9 AK |
4243 | goto out_iounmap; |
4244 | } | |
91238714 TW |
4245 | /***************** |
4246 | * 4. Read EEPROM | |
4247 | *****************/ | |
316c30d9 AK |
4248 | /* Read the EEPROM */ |
4249 | err = iwl_eeprom_init(priv); | |
4250 | if (err) { | |
4251 | IWL_ERROR("Unable to init EEPROM\n"); | |
4252 | goto out_iounmap; | |
4253 | } | |
8614f360 TW |
4254 | err = iwl_eeprom_check_version(priv); |
4255 | if (err) | |
4256 | goto out_iounmap; | |
4257 | ||
02883017 | 4258 | /* extract MAC Address */ |
316c30d9 | 4259 | iwl_eeprom_get_mac(priv, priv->mac_addr); |
e174961c | 4260 | IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr); |
316c30d9 AK |
4261 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); |
4262 | ||
4263 | /************************ | |
4264 | * 5. Setup HW constants | |
4265 | ************************/ | |
da154e30 | 4266 | if (iwl_set_hw_params(priv)) { |
5425e490 | 4267 | IWL_ERROR("failed to set hw parameters\n"); |
073d3f5f | 4268 | goto out_free_eeprom; |
316c30d9 AK |
4269 | } |
4270 | ||
4271 | /******************* | |
6ba87956 | 4272 | * 6. Setup priv |
316c30d9 | 4273 | *******************/ |
b481de9c | 4274 | |
6ba87956 | 4275 | err = iwl_init_drv(priv); |
bf85ea4f | 4276 | if (err) |
399f4900 | 4277 | goto out_free_eeprom; |
bf85ea4f | 4278 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
4279 | |
4280 | /********************************** | |
4281 | * 7. Initialize module parameters | |
4282 | **********************************/ | |
4283 | ||
4284 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 4285 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
4286 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
4287 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
4288 | } | |
4289 | ||
316c30d9 AK |
4290 | /******************** |
4291 | * 8. Setup services | |
4292 | ********************/ | |
0359facc | 4293 | spin_lock_irqsave(&priv->lock, flags); |
5b9f8cd3 | 4294 | iwl_disable_interrupts(priv); |
0359facc | 4295 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 | 4296 | |
5b9f8cd3 | 4297 | err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group); |
316c30d9 AK |
4298 | if (err) { |
4299 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
6ba87956 | 4300 | goto out_uninit_drv; |
316c30d9 AK |
4301 | } |
4302 | ||
316c30d9 | 4303 | |
4e39317d | 4304 | iwl_setup_deferred_work(priv); |
653fa4a0 | 4305 | iwl_setup_rx_handlers(priv); |
316c30d9 AK |
4306 | |
4307 | /******************** | |
4308 | * 9. Conclude | |
4309 | ********************/ | |
5a66926a ZY |
4310 | pci_save_state(pdev); |
4311 | pci_disable_device(pdev); | |
b481de9c | 4312 | |
6ba87956 TW |
4313 | /********************************** |
4314 | * 10. Setup and register mac80211 | |
4315 | **********************************/ | |
4316 | ||
4317 | err = iwl_setup_mac(priv); | |
4318 | if (err) | |
4319 | goto out_remove_sysfs; | |
4320 | ||
4321 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
4322 | if (err) | |
4323 | IWL_ERROR("failed to create debugfs files\n"); | |
4324 | ||
58d0f361 EG |
4325 | err = iwl_rfkill_init(priv); |
4326 | if (err) | |
4327 | IWL_ERROR("Unable to initialize RFKILL system. " | |
4328 | "Ignoring error: %d\n", err); | |
4329 | iwl_power_initialize(priv); | |
b481de9c ZY |
4330 | return 0; |
4331 | ||
316c30d9 | 4332 | out_remove_sysfs: |
5b9f8cd3 | 4333 | sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group); |
6ba87956 TW |
4334 | out_uninit_drv: |
4335 | iwl_uninit_drv(priv); | |
073d3f5f TW |
4336 | out_free_eeprom: |
4337 | iwl_eeprom_free(priv); | |
b481de9c ZY |
4338 | out_iounmap: |
4339 | pci_iounmap(pdev, priv->hw_base); | |
4340 | out_pci_release_regions: | |
4341 | pci_release_regions(pdev); | |
316c30d9 | 4342 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
4343 | out_pci_disable_device: |
4344 | pci_disable_device(pdev); | |
b481de9c ZY |
4345 | out_ieee80211_free_hw: |
4346 | ieee80211_free_hw(priv->hw); | |
4347 | out: | |
4348 | return err; | |
4349 | } | |
4350 | ||
5b9f8cd3 | 4351 | static void __devexit iwl_pci_remove(struct pci_dev *pdev) |
b481de9c | 4352 | { |
c79dd5b5 | 4353 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
0359facc | 4354 | unsigned long flags; |
b481de9c ZY |
4355 | |
4356 | if (!priv) | |
4357 | return; | |
4358 | ||
4359 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
4360 | ||
67249625 | 4361 | iwl_dbgfs_unregister(priv); |
5b9f8cd3 | 4362 | sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group); |
67249625 | 4363 | |
5b9f8cd3 EG |
4364 | /* ieee80211_unregister_hw call wil cause iwl_mac_stop to |
4365 | * to be called and iwl_down since we are removing the device | |
0b124c31 GG |
4366 | * we need to set STATUS_EXIT_PENDING bit. |
4367 | */ | |
4368 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
c4f55232 RR |
4369 | if (priv->mac80211_registered) { |
4370 | ieee80211_unregister_hw(priv->hw); | |
4371 | priv->mac80211_registered = 0; | |
0b124c31 | 4372 | } else { |
5b9f8cd3 | 4373 | iwl_down(priv); |
c4f55232 RR |
4374 | } |
4375 | ||
0359facc MA |
4376 | /* make sure we flush any pending irq or |
4377 | * tasklet for the driver | |
4378 | */ | |
4379 | spin_lock_irqsave(&priv->lock, flags); | |
5b9f8cd3 | 4380 | iwl_disable_interrupts(priv); |
0359facc MA |
4381 | spin_unlock_irqrestore(&priv->lock, flags); |
4382 | ||
4383 | iwl_synchronize_irq(priv); | |
4384 | ||
58d0f361 | 4385 | iwl_rfkill_unregister(priv); |
5b9f8cd3 | 4386 | iwl_dealloc_ucode_pci(priv); |
b481de9c ZY |
4387 | |
4388 | if (priv->rxq.bd) | |
a55360e4 | 4389 | iwl_rx_queue_free(priv, &priv->rxq); |
1053d35f | 4390 | iwl_hw_txq_ctx_free(priv); |
b481de9c | 4391 | |
37deb2a0 | 4392 | iwl_clear_stations_table(priv); |
073d3f5f | 4393 | iwl_eeprom_free(priv); |
b481de9c | 4394 | |
b481de9c | 4395 | |
948c171c MA |
4396 | /*netif_stop_queue(dev); */ |
4397 | flush_workqueue(priv->workqueue); | |
4398 | ||
5b9f8cd3 | 4399 | /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes |
b481de9c ZY |
4400 | * priv->workqueue... so we can't take down the workqueue |
4401 | * until now... */ | |
4402 | destroy_workqueue(priv->workqueue); | |
4403 | priv->workqueue = NULL; | |
4404 | ||
b481de9c ZY |
4405 | pci_iounmap(pdev, priv->hw_base); |
4406 | pci_release_regions(pdev); | |
4407 | pci_disable_device(pdev); | |
4408 | pci_set_drvdata(pdev, NULL); | |
4409 | ||
6ba87956 | 4410 | iwl_uninit_drv(priv); |
b481de9c ZY |
4411 | |
4412 | if (priv->ibss_beacon) | |
4413 | dev_kfree_skb(priv->ibss_beacon); | |
4414 | ||
4415 | ieee80211_free_hw(priv->hw); | |
4416 | } | |
4417 | ||
4418 | #ifdef CONFIG_PM | |
4419 | ||
5b9f8cd3 | 4420 | static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 4421 | { |
c79dd5b5 | 4422 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4423 | |
e655b9f0 ZY |
4424 | if (priv->is_open) { |
4425 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
5b9f8cd3 | 4426 | iwl_mac_stop(priv->hw); |
e655b9f0 ZY |
4427 | priv->is_open = 1; |
4428 | } | |
b481de9c | 4429 | |
b481de9c ZY |
4430 | pci_set_power_state(pdev, PCI_D3hot); |
4431 | ||
b481de9c ZY |
4432 | return 0; |
4433 | } | |
4434 | ||
5b9f8cd3 | 4435 | static int iwl_pci_resume(struct pci_dev *pdev) |
b481de9c | 4436 | { |
c79dd5b5 | 4437 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4438 | |
b481de9c | 4439 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 4440 | |
e655b9f0 | 4441 | if (priv->is_open) |
5b9f8cd3 | 4442 | iwl_mac_start(priv->hw); |
b481de9c | 4443 | |
e655b9f0 | 4444 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
4445 | return 0; |
4446 | } | |
4447 | ||
4448 | #endif /* CONFIG_PM */ | |
4449 | ||
4450 | /***************************************************************************** | |
4451 | * | |
4452 | * driver and module entry point | |
4453 | * | |
4454 | *****************************************************************************/ | |
4455 | ||
fed9017e RR |
4456 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
4457 | static struct pci_device_id iwl_hw_card_ids[] = { | |
4fc22b21 | 4458 | #ifdef CONFIG_IWL4965 |
fed9017e RR |
4459 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, |
4460 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
4fc22b21 | 4461 | #endif /* CONFIG_IWL4965 */ |
5a6a256e | 4462 | #ifdef CONFIG_IWL5000 |
47408639 EK |
4463 | {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)}, |
4464 | {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)}, | |
4465 | {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, | |
4466 | {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, | |
4467 | {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, | |
4468 | {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, | |
5a6a256e | 4469 | {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, |
47408639 EK |
4470 | {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, |
4471 | {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)}, | |
4472 | {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)}, | |
e96a8495 TW |
4473 | /* 5350 WiFi/WiMax */ |
4474 | {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, | |
4475 | {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, | |
4476 | {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, | |
5a6a256e | 4477 | #endif /* CONFIG_IWL5000 */ |
fed9017e RR |
4478 | {0} |
4479 | }; | |
4480 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
4481 | ||
4482 | static struct pci_driver iwl_driver = { | |
b481de9c | 4483 | .name = DRV_NAME, |
fed9017e | 4484 | .id_table = iwl_hw_card_ids, |
5b9f8cd3 EG |
4485 | .probe = iwl_pci_probe, |
4486 | .remove = __devexit_p(iwl_pci_remove), | |
b481de9c | 4487 | #ifdef CONFIG_PM |
5b9f8cd3 EG |
4488 | .suspend = iwl_pci_suspend, |
4489 | .resume = iwl_pci_resume, | |
b481de9c ZY |
4490 | #endif |
4491 | }; | |
4492 | ||
5b9f8cd3 | 4493 | static int __init iwl_init(void) |
b481de9c ZY |
4494 | { |
4495 | ||
4496 | int ret; | |
4497 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
4498 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 | 4499 | |
e227ceac | 4500 | ret = iwlagn_rate_control_register(); |
897e1cf2 RC |
4501 | if (ret) { |
4502 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
4503 | return ret; | |
4504 | } | |
4505 | ||
fed9017e | 4506 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
4507 | if (ret) { |
4508 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 4509 | goto error_register; |
b481de9c | 4510 | } |
b481de9c ZY |
4511 | |
4512 | return ret; | |
897e1cf2 | 4513 | |
897e1cf2 | 4514 | error_register: |
e227ceac | 4515 | iwlagn_rate_control_unregister(); |
897e1cf2 | 4516 | return ret; |
b481de9c ZY |
4517 | } |
4518 | ||
5b9f8cd3 | 4519 | static void __exit iwl_exit(void) |
b481de9c | 4520 | { |
fed9017e | 4521 | pci_unregister_driver(&iwl_driver); |
e227ceac | 4522 | iwlagn_rate_control_unregister(); |
b481de9c ZY |
4523 | } |
4524 | ||
5b9f8cd3 EG |
4525 | module_exit(iwl_exit); |
4526 | module_init(iwl_init); |