iwlwifi: fix strict_strtoul error checking
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
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43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
6bc913bd 47#include "iwl-eeprom.h"
3e0d4cb1 48#include "iwl-dev.h"
fee1247a 49#include "iwl-core.h"
3395f6e9 50#include "iwl-io.h"
b481de9c 51#include "iwl-helpers.h"
6974e363 52#include "iwl-sta.h"
f0832f13 53#include "iwl-calib.h"
b481de9c 54
416e1438 55
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56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
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62/*
63 * module name, copyright, version, etc.
64 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
65 */
66
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
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70#define VD "d"
71#else
72#define VD
73#endif
74
4fc22b21 75#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
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76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
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83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
86MODULE_AUTHOR(DRV_COPYRIGHT);
87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
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92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
deb09c43
EG
99static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG
102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
bb8c093b 111 * iwl4965_check_rxon_cmd - validate RXON structure is valid
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112 *
113 * NOTE: This is really only useful during development and can eventually
114 * be #ifdef'd out once the driver is stable and folks aren't actively
115 * making changes
116 */
c1adf9fb 117static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
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118{
119 int error = 0;
120 int counter = 1;
121
122 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
123 error |= le32_to_cpu(rxon->flags &
124 (RXON_FLG_TGJ_NARROW_BAND_MSK |
125 RXON_FLG_RADAR_DETECT_MSK));
126 if (error)
127 IWL_WARNING("check 24G fields %d | %d\n",
128 counter++, error);
129 } else {
130 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
131 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
132 if (error)
133 IWL_WARNING("check 52 fields %d | %d\n",
134 counter++, error);
135 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
136 if (error)
137 IWL_WARNING("check 52 CCK %d | %d\n",
138 counter++, error);
139 }
140 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
141 if (error)
142 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
143
144 /* make sure basic rates 6Mbps and 1Mbps are supported */
145 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
146 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
147 if (error)
148 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
149
150 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
151 if (error)
152 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
153
154 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
155 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
156 if (error)
157 IWL_WARNING("check CCK and short slot %d | %d\n",
158 counter++, error);
159
160 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
161 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
162 if (error)
163 IWL_WARNING("check CCK & auto detect %d | %d\n",
164 counter++, error);
165
166 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
167 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
168 if (error)
169 IWL_WARNING("check TGG and auto detect %d | %d\n",
170 counter++, error);
171
172 if (error)
173 IWL_WARNING("Tuning to channel %d\n",
174 le16_to_cpu(rxon->channel));
175
176 if (error) {
bb8c093b 177 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
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178 return -1;
179 }
180 return 0;
181}
182
183/**
9fbab516 184 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 185 * @priv: staging_rxon is compared to active_rxon
b481de9c 186 *
9fbab516
BC
187 * If the RXON structure is changing enough to require a new tune,
188 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
189 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 190 */
c79dd5b5 191static int iwl4965_full_rxon_required(struct iwl_priv *priv)
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192{
193
194 /* These items are only settable from the full RXON command */
5d1e2325 195 if (!(iwl_is_associated(priv)) ||
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196 compare_ether_addr(priv->staging_rxon.bssid_addr,
197 priv->active_rxon.bssid_addr) ||
198 compare_ether_addr(priv->staging_rxon.node_addr,
199 priv->active_rxon.node_addr) ||
200 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
201 priv->active_rxon.wlap_bssid_addr) ||
202 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
203 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
204 (priv->staging_rxon.air_propagation !=
205 priv->active_rxon.air_propagation) ||
206 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
207 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
208 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
209 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
210 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
211 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
212 return 1;
213
214 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
215 * be updated with the RXON_ASSOC command -- however only some
216 * flag transitions are allowed using RXON_ASSOC */
217
218 /* Check if we are not switching bands */
219 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
220 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
221 return 1;
222
223 /* Check if we are switching association toggle */
224 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
225 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
226 return 1;
227
228 return 0;
229}
230
b481de9c 231/**
bb8c093b 232 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 233 *
01ebd063 234 * The RXON command in staging_rxon is committed to the hardware and
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235 * the active_rxon structure is updated with the new data. This
236 * function correctly transitions out of the RXON_ASSOC_MSK state if
237 * a HW tune is required based on the RXON structure changes.
238 */
c79dd5b5 239static int iwl4965_commit_rxon(struct iwl_priv *priv)
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240{
241 /* cast away the const for active_rxon in this function */
c1adf9fb 242 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 243 DECLARE_MAC_BUF(mac);
43d59b32
EG
244 int ret;
245 bool new_assoc =
246 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 247
fee1247a 248 if (!iwl_is_alive(priv))
43d59b32 249 return -EBUSY;
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250
251 /* always get timestamp with Rx frame */
252 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG
253 /* allow CTS-to-self if possible. this is relevant only for
254 * 5000, but will not damage 4965 */
255 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 256
43d59b32
EG
257 ret = iwl4965_check_rxon_cmd(&priv->staging_rxon);
258 if (ret) {
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259 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
260 return -EINVAL;
261 }
262
263 /* If we don't need to send a full RXON, we can use
bb8c093b 264 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 265 * and other flags for the current radio configuration. */
bb8c093b 266 if (!iwl4965_full_rxon_required(priv)) {
43d59b32
EG
267 ret = iwl_send_rxon_assoc(priv);
268 if (ret) {
269 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
270 return ret;
b481de9c
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271 }
272
273 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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274 return 0;
275 }
276
277 /* station table will be cleared */
278 priv->assoc_station_added = 0;
279
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280 /* If we are currently associated and the new config requires
281 * an RXON_ASSOC and the new config wants the associated mask enabled,
282 * we must clear the associated from the active configuration
283 * before we apply the new config */
43d59b32 284 if (iwl_is_associated(priv) && new_assoc) {
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285 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
286 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
287
43d59b32 288 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 289 sizeof(struct iwl_rxon_cmd),
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290 &priv->active_rxon);
291
292 /* If the mask clearing failed then we set
293 * active_rxon back to what it was previously */
43d59b32 294 if (ret) {
b481de9c 295 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG
296 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
297 return ret;
b481de9c 298 }
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299 }
300
301 IWL_DEBUG_INFO("Sending RXON\n"
302 "* with%s RXON_FILTER_ASSOC_MSK\n"
303 "* channel = %d\n"
0795af57 304 "* bssid = %s\n",
43d59b32 305 (new_assoc ? "" : "out"),
b481de9c 306 le16_to_cpu(priv->staging_rxon.channel),
0795af57 307 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 308
099b40b7 309 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG
310
311 /* Apply the new configuration
312 * RXON unassoc clears the station table in uCode, send it before
313 * we add the bcast station. If assoc bit is set, we will send RXON
314 * after having added the bcast and bssid station.
315 */
316 if (!new_assoc) {
317 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 318 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG
319 if (ret) {
320 IWL_ERROR("Error setting new RXON (%d)\n", ret);
321 return ret;
322 }
323 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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324 }
325
37deb2a0 326 iwl_clear_stations_table(priv);
556f8db7 327
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328 if (!priv->error_recovering)
329 priv->start_calib = 0;
330
b481de9c 331 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 332 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 333 IWL_INVALID_STATION) {
b481de9c
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334 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
335 return -EIO;
336 }
337
338 /* If we have set the ASSOC_MSK and we are in BSS mode then
339 * add the IWL_AP_ID to the station rate table */
9185159d
TW
340 if (new_assoc) {
341 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
342 ret = iwl_rxon_add_station(priv,
343 priv->active_rxon.bssid_addr, 1);
344 if (ret == IWL_INVALID_STATION) {
345 IWL_ERROR("Error adding AP address for TX.\n");
346 return -EIO;
347 }
348 priv->assoc_station_added = 1;
349 if (priv->default_wep_key &&
350 iwl_send_static_wepkey_cmd(priv, 0))
351 IWL_ERROR("Could not send WEP static key.\n");
b481de9c 352 }
43d59b32
EG
353
354 /* Apply the new configuration
355 * RXON assoc doesn't clear the station table in uCode,
356 */
357 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
358 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
359 if (ret) {
360 IWL_ERROR("Error setting new RXON (%d)\n", ret);
361 return ret;
362 }
363 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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364 }
365
36da7d70
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366 iwl_init_sensitivity(priv);
367
368 /* If we issue a new RXON command which required a tune then we must
369 * send a new TXPOWER command or we won't be able to Tx any frames */
370 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
371 if (ret) {
372 IWL_ERROR("Error sending TX power (%d)\n", ret);
373 return ret;
374 }
375
b481de9c
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376 return 0;
377}
378
5da4b55f
MA
379void iwl4965_update_chain_flags(struct iwl_priv *priv)
380{
381
c7de35cd 382 iwl_set_rxon_chain(priv);
5da4b55f
MA
383 iwl4965_commit_rxon(priv);
384}
385
c79dd5b5 386static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 387{
bb8c093b 388 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
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389 .flags = 3,
390 .lead_time = 0xAA,
391 .max_kill = 1,
392 .kill_ack_mask = 0,
393 .kill_cts_mask = 0,
394 };
395
857485c0 396 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 397 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
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398}
399
fcab423d 400static void iwl_clear_free_frames(struct iwl_priv *priv)
b481de9c
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401{
402 struct list_head *element;
403
404 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
405 priv->frames_count);
406
407 while (!list_empty(&priv->free_frames)) {
408 element = priv->free_frames.next;
409 list_del(element);
fcab423d 410 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
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411 priv->frames_count--;
412 }
413
414 if (priv->frames_count) {
415 IWL_WARNING("%d frames still in use. Did we lose one?\n",
416 priv->frames_count);
417 priv->frames_count = 0;
418 }
419}
420
fcab423d 421static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 422{
fcab423d 423 struct iwl_frame *frame;
b481de9c
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424 struct list_head *element;
425 if (list_empty(&priv->free_frames)) {
426 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
427 if (!frame) {
428 IWL_ERROR("Could not allocate frame!\n");
429 return NULL;
430 }
431
432 priv->frames_count++;
433 return frame;
434 }
435
436 element = priv->free_frames.next;
437 list_del(element);
fcab423d 438 return list_entry(element, struct iwl_frame, list);
b481de9c
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439}
440
fcab423d 441static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
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442{
443 memset(frame, 0, sizeof(*frame));
444 list_add(&frame->list, &priv->free_frames);
445}
446
4bf64efd
TW
447static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
448 struct ieee80211_hdr *hdr,
449 const u8 *dest, int left)
b481de9c 450{
3109ece1 451 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
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452 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
453 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
454 return 0;
455
456 if (priv->ibss_beacon->len > left)
457 return 0;
458
459 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
460
461 return priv->ibss_beacon->len;
462}
463
39e88504 464static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 465{
39e88504
GC
466 int i;
467 int rate_mask;
468
469 /* Set rate mask*/
470 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
471 rate_mask = priv->active_rate_basic & 0xF;
472 else
473 rate_mask = priv->active_rate_basic & 0xFF0;
b481de9c 474
39e88504 475 /* Find lowest valid rate */
b481de9c 476 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 477 i = iwl_rates[i].next_ieee) {
b481de9c 478 if (rate_mask & (1 << i))
1826dcc0 479 return iwl_rates[i].plcp;
b481de9c
ZY
480 }
481
39e88504
GC
482 /* No valid rate was found. Assign the lowest one */
483 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
484 return IWL_RATE_1M_PLCP;
485 else
486 return IWL_RATE_6M_PLCP;
b481de9c
ZY
487}
488
4bf64efd
TW
489unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
490 struct iwl_frame *frame, u8 rate)
491{
492 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
493 unsigned int frame_size;
494
495 tx_beacon_cmd = &frame->u.beacon;
496 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
497
498 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
499 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
500
501 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
502 iwl_bcast_addr,
503 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
504
505 BUG_ON(frame_size > MAX_MPDU_SIZE);
506 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
507
508 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
509 tx_beacon_cmd->tx.rate_n_flags =
510 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
511 else
512 tx_beacon_cmd->tx.rate_n_flags =
513 iwl_hw_set_rate_n_flags(rate, 0);
514
515 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
516 TX_CMD_FLG_TSF_MSK |
517 TX_CMD_FLG_STA_RATE_MSK;
518
519 return sizeof(*tx_beacon_cmd) + frame_size;
520}
c79dd5b5 521static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 522{
fcab423d 523 struct iwl_frame *frame;
b481de9c
ZY
524 unsigned int frame_size;
525 int rc;
526 u8 rate;
527
fcab423d 528 frame = iwl_get_free_frame(priv);
b481de9c
ZY
529
530 if (!frame) {
531 IWL_ERROR("Could not obtain free frame buffer for beacon "
532 "command.\n");
533 return -ENOMEM;
534 }
535
39e88504 536 rate = iwl4965_rate_get_lowest_plcp(priv);
b481de9c 537
bb8c093b 538 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 539
857485c0 540 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
541 &frame->u.cmd[0]);
542
fcab423d 543 iwl_free_frame(priv, frame);
b481de9c
ZY
544
545 return rc;
546}
547
b481de9c
ZY
548/******************************************************************************
549 *
550 * Misc. internal state and helper functions
551 *
552 ******************************************************************************/
b481de9c 553
d1141dfb
EG
554static void iwl4965_ht_conf(struct iwl_priv *priv,
555 struct ieee80211_bss_conf *bss_conf)
556{
557 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
558 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
559 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
560
561 IWL_DEBUG_MAC80211("enter: \n");
562
563 iwl_conf->is_ht = bss_conf->assoc_ht;
564
565 if (!iwl_conf->is_ht)
566 return;
567
568 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
569
570 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 571 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 572 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 573 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG
574
575 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
576 iwl_conf->max_amsdu_size =
577 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
578
579 iwl_conf->supported_chan_width =
580 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
581 iwl_conf->extension_chan_offset =
582 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
583 /* If no above or below channel supplied disable FAT channel */
963f5517
EG
584 if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE &&
585 iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) {
586 iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE;
d1141dfb 587 iwl_conf->supported_chan_width = 0;
963f5517 588 }
d1141dfb
EG
589
590 iwl_conf->tx_mimo_ps_mode =
591 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
592 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
593
594 iwl_conf->control_channel = ht_bss_conf->primary_channel;
595 iwl_conf->tx_chan_width =
596 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
597 iwl_conf->ht_protection =
598 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
599 iwl_conf->non_GF_STA_present =
600 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
601
602 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
603 IWL_DEBUG_MAC80211("leave\n");
604}
605
b481de9c
ZY
606/*
607 * QoS support
608*/
1ff50bda 609static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 610{
b481de9c
ZY
611 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
612 return;
613
614 if (!priv->qos_data.qos_enable)
615 return;
616
b481de9c
ZY
617 priv->qos_data.def_qos_parm.qos_flags = 0;
618
619 if (priv->qos_data.qos_cap.q_AP.queue_request &&
620 !priv->qos_data.qos_cap.q_AP.txop_request)
621 priv->qos_data.def_qos_parm.qos_flags |=
622 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
623 if (priv->qos_data.qos_active)
624 priv->qos_data.def_qos_parm.qos_flags |=
625 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
626
fd105e79 627 if (priv->current_ht_config.is_ht)
f1f1f5c7 628 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 629
3109ece1 630 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
631 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
632 priv->qos_data.qos_active,
633 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 634
1ff50bda
EG
635 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
636 sizeof(struct iwl_qosparam_cmd),
637 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY
638 }
639}
640
b481de9c 641#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 642
bb8c093b 643static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
644{
645 u16 new_val = 0;
646 u16 beacon_factor = 0;
647
648 beacon_factor =
649 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
650 / MAX_UCODE_BEACON_INTERVAL;
651 new_val = beacon_val / beacon_factor;
652
653 return cpu_to_le16(new_val);
654}
655
c79dd5b5 656static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
657{
658 u64 interval_tm_unit;
659 u64 tsf, result;
660 unsigned long flags;
661 struct ieee80211_conf *conf = NULL;
662 u16 beacon_int = 0;
663
664 conf = ieee80211_get_hw_conf(priv->hw);
665
666 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW
667 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
668 priv->rxon_timing.timestamp.dw[0] =
669 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c 670
b5d7be5e 671 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 672
3109ece1 673 tsf = priv->timestamp;
b481de9c
ZY
674
675 beacon_int = priv->beacon_int;
676 spin_unlock_irqrestore(&priv->lock, flags);
677
678 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
679 if (beacon_int == 0) {
680 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
681 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
682 } else {
683 priv->rxon_timing.beacon_interval =
684 cpu_to_le16(beacon_int);
685 priv->rxon_timing.beacon_interval =
bb8c093b 686 iwl4965_adjust_beacon_interval(
b481de9c
ZY
687 le16_to_cpu(priv->rxon_timing.beacon_interval));
688 }
689
690 priv->rxon_timing.atim_window = 0;
691 } else {
692 priv->rxon_timing.beacon_interval =
bb8c093b 693 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
694 /* TODO: we need to get atim_window from upper stack
695 * for now we set to 0 */
696 priv->rxon_timing.atim_window = 0;
697 }
698
699 interval_tm_unit =
700 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
701 result = do_div(tsf, interval_tm_unit);
702 priv->rxon_timing.beacon_init_val =
703 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
704
705 IWL_DEBUG_ASSOC
706 ("beacon interval %d beacon timer %d beacon tim %d\n",
707 le16_to_cpu(priv->rxon_timing.beacon_interval),
708 le32_to_cpu(priv->rxon_timing.beacon_init_val),
709 le16_to_cpu(priv->rxon_timing.atim_window));
710}
711
82a66bbb
TW
712static void iwl_set_flags_for_band(struct iwl_priv *priv,
713 enum ieee80211_band band)
b481de9c 714{
8318d78a 715 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
716 priv->staging_rxon.flags &=
717 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
718 | RXON_FLG_CCK_MSK);
719 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
720 } else {
508e32e1 721 /* Copied from iwl4965_post_associate() */
b481de9c
ZY
722 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
723 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
724 else
725 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
726
727 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
728 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
729
730 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
731 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
732 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
733 }
734}
735
736/*
01ebd063 737 * initialize rxon structure with default values from eeprom
b481de9c 738 */
c79dd5b5 739static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 740{
bf85ea4f 741 const struct iwl_channel_info *ch_info;
b481de9c
ZY
742
743 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
744
745 switch (priv->iw_mode) {
746 case IEEE80211_IF_TYPE_AP:
747 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
748 break;
749
750 case IEEE80211_IF_TYPE_STA:
751 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
752 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
753 break;
754
755 case IEEE80211_IF_TYPE_IBSS:
756 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
757 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
758 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
759 RXON_FILTER_ACCEPT_GRP_MSK;
760 break;
761
762 case IEEE80211_IF_TYPE_MNTR:
763 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
764 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
765 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
766 break;
69dc5d9d
TW
767 default:
768 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
769 break;
b481de9c
ZY
770 }
771
772#if 0
773 /* TODO: Figure out when short_preamble would be set and cache from
774 * that */
775 if (!hw_to_local(priv->hw)->short_preamble)
776 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
777 else
778 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
779#endif
780
8622e705 781 ch_info = iwl_get_channel_info(priv, priv->band,
25b3f57c 782 le16_to_cpu(priv->active_rxon.channel));
b481de9c
ZY
783
784 if (!ch_info)
785 ch_info = &priv->channel_info[0];
786
787 /*
788 * in some case A channels are all non IBSS
789 * in this case force B/G channel
790 */
791 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
792 !(is_channel_ibss(ch_info)))
793 ch_info = &priv->channel_info[0];
794
795 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 796 priv->band = ch_info->band;
b481de9c 797
82a66bbb 798 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY
799
800 priv->staging_rxon.ofdm_basic_rates =
801 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
802 priv->staging_rxon.cck_basic_rates =
803 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
804
805 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
806 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
807 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
808 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
809 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
810 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 811 iwl_set_rxon_chain(priv);
b481de9c
ZY
812}
813
c79dd5b5 814static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 815{
b481de9c
ZY
816 priv->iw_mode = mode;
817
bb8c093b 818 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
819 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
820
37deb2a0 821 iwl_clear_stations_table(priv);
b481de9c 822
fde3571f 823 /* dont commit rxon if rf-kill is on*/
fee1247a 824 if (!iwl_is_ready_rf(priv))
fde3571f
MA
825 return -EAGAIN;
826
827 cancel_delayed_work(&priv->scan_check);
2a421b91 828 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA
829 IWL_WARNING("Aborted scan still in progress after 100ms\n");
830 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
831 return -EAGAIN;
832 }
833
bb8c093b 834 iwl4965_commit_rxon(priv);
b481de9c
ZY
835
836 return 0;
837}
838
c79dd5b5 839static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 840{
8318d78a 841 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
842 struct ieee80211_rate *rate;
843 int i;
844
d1141dfb 845 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
846 if (!hw) {
847 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
848 return;
849 }
b481de9c
ZY
850
851 priv->active_rate = 0;
852 priv->active_rate_basic = 0;
853
8318d78a
JB
854 for (i = 0; i < hw->n_bitrates; i++) {
855 rate = &(hw->bitrates[i]);
856 if (rate->hw_value < IWL_RATE_COUNT)
857 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
858 }
859
860 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
861 priv->active_rate, priv->active_rate_basic);
862
863 /*
864 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
865 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
866 * OFDM
867 */
868 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
869 priv->staging_rxon.cck_basic_rates =
870 ((priv->active_rate_basic &
871 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
872 else
873 priv->staging_rxon.cck_basic_rates =
874 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
875
876 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
877 priv->staging_rxon.ofdm_basic_rates =
878 ((priv->active_rate_basic &
879 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
880 IWL_FIRST_OFDM_RATE) & 0xFF;
881 else
882 priv->staging_rxon.ofdm_basic_rates =
883 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
884}
885
4fc22b21 886#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
887
888#include "iwl-spectrum.h"
889
890#define BEACON_TIME_MASK_LOW 0x00FFFFFF
891#define BEACON_TIME_MASK_HIGH 0xFF000000
892#define TIME_UNIT 1024
893
894/*
895 * extended beacon time format
896 * time in usec will be changed into a 32-bit value in 8:24 format
897 * the high 1 byte is the beacon counts
898 * the lower 3 bytes is the time in usec within one beacon interval
899 */
900
bb8c093b 901static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
902{
903 u32 quot;
904 u32 rem;
905 u32 interval = beacon_interval * 1024;
906
907 if (!interval || !usec)
908 return 0;
909
910 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
911 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
912
913 return (quot << 24) + rem;
914}
915
916/* base is usually what we get from ucode with each received frame,
917 * the same as HW timer counter counting down
918 */
919
bb8c093b 920static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
921{
922 u32 base_low = base & BEACON_TIME_MASK_LOW;
923 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
924 u32 interval = beacon_interval * TIME_UNIT;
925 u32 res = (base & BEACON_TIME_MASK_HIGH) +
926 (addon & BEACON_TIME_MASK_HIGH);
927
928 if (base_low > addon_low)
929 res += base_low - addon_low;
930 else if (base_low < addon_low) {
931 res += interval + base_low - addon_low;
932 res += (1 << 24);
933 } else
934 res += (1 << 24);
935
936 return cpu_to_le32(res);
937}
938
c79dd5b5 939static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
940 struct ieee80211_measurement_params *params,
941 u8 type)
942{
bb8c093b 943 struct iwl4965_spectrum_cmd spectrum;
db11d634 944 struct iwl_rx_packet *res;
857485c0 945 struct iwl_host_cmd cmd = {
b481de9c
ZY
946 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
947 .data = (void *)&spectrum,
948 .meta.flags = CMD_WANT_SKB,
949 };
950 u32 add_time = le64_to_cpu(params->start_time);
951 int rc;
952 int spectrum_resp_status;
953 int duration = le16_to_cpu(params->duration);
954
3109ece1 955 if (iwl_is_associated(priv))
b481de9c 956 add_time =
bb8c093b 957 iwl4965_usecs_to_beacons(
b481de9c
ZY
958 le64_to_cpu(params->start_time) - priv->last_tsf,
959 le16_to_cpu(priv->rxon_timing.beacon_interval));
960
961 memset(&spectrum, 0, sizeof(spectrum));
962
963 spectrum.channel_count = cpu_to_le16(1);
964 spectrum.flags =
965 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
966 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
967 cmd.len = sizeof(spectrum);
968 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
969
3109ece1 970 if (iwl_is_associated(priv))
b481de9c 971 spectrum.start_time =
bb8c093b 972 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
973 add_time,
974 le16_to_cpu(priv->rxon_timing.beacon_interval));
975 else
976 spectrum.start_time = 0;
977
978 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
979 spectrum.channels[0].channel = params->channel;
980 spectrum.channels[0].type = type;
981 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
982 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
983 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
984
857485c0 985 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
986 if (rc)
987 return rc;
988
db11d634 989 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
990 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
991 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
992 rc = -EIO;
993 }
994
995 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
996 switch (spectrum_resp_status) {
997 case 0: /* Command will be handled */
998 if (res->u.spectrum.id != 0xff) {
999 IWL_DEBUG_INFO
1000 ("Replaced existing measurement: %d\n",
1001 res->u.spectrum.id);
1002 priv->measurement_status &= ~MEASUREMENT_READY;
1003 }
1004 priv->measurement_status |= MEASUREMENT_ACTIVE;
1005 rc = 0;
1006 break;
1007
1008 case 1: /* Command will not be handled */
1009 rc = -EAGAIN;
1010 break;
1011 }
1012
1013 dev_kfree_skb_any(cmd.meta.u.skb);
1014
1015 return rc;
1016}
1017#endif
1018
b481de9c
ZY
1019/******************************************************************************
1020 *
1021 * Generic RX handler implementations
1022 *
1023 ******************************************************************************/
885ba202
TW
1024static void iwl_rx_reply_alive(struct iwl_priv *priv,
1025 struct iwl_rx_mem_buffer *rxb)
b481de9c 1026{
db11d634 1027 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 1028 struct iwl_alive_resp *palive;
b481de9c
ZY
1029 struct delayed_work *pwork;
1030
1031 palive = &pkt->u.alive_frame;
1032
1033 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
1034 "0x%01X 0x%01X\n",
1035 palive->is_valid, palive->ver_type,
1036 palive->ver_subtype);
1037
1038 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
1039 IWL_DEBUG_INFO("Initialization Alive received.\n");
1040 memcpy(&priv->card_alive_init,
1041 &pkt->u.alive_frame,
885ba202 1042 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY
1043 pwork = &priv->init_alive_start;
1044 } else {
1045 IWL_DEBUG_INFO("Runtime Alive received.\n");
1046 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 1047 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1048 pwork = &priv->alive_start;
1049 }
1050
1051 /* We delay the ALIVE response by 5ms to
1052 * give the HW RF Kill time to activate... */
1053 if (palive->is_valid == UCODE_VALID_OK)
1054 queue_delayed_work(priv->workqueue, pwork,
1055 msecs_to_jiffies(5));
1056 else
1057 IWL_WARNING("uCode did not respond OK.\n");
1058}
1059
c79dd5b5 1060static void iwl4965_rx_reply_error(struct iwl_priv *priv,
a55360e4 1061 struct iwl_rx_mem_buffer *rxb)
b481de9c 1062{
db11d634 1063 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1064
1065 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
1066 "seq 0x%04X ser 0x%08X\n",
1067 le32_to_cpu(pkt->u.err_resp.error_type),
1068 get_cmd_string(pkt->u.err_resp.cmd_id),
1069 pkt->u.err_resp.cmd_id,
1070 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1071 le32_to_cpu(pkt->u.err_resp.error_info));
1072}
1073
1074#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1075
a55360e4 1076static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 1077{
db11d634 1078 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 1079 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
bb8c093b 1080 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
1081 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
1082 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1083 rxon->channel = csa->channel;
1084 priv->staging_rxon.channel = csa->channel;
1085}
1086
c79dd5b5 1087static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
a55360e4 1088 struct iwl_rx_mem_buffer *rxb)
b481de9c 1089{
4fc22b21 1090#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
db11d634 1091 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1092 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
1093
1094 if (!report->state) {
f3d67999
EK
1095 IWL_DEBUG(IWL_DL_11H,
1096 "Spectrum Measure Notification: Start\n");
b481de9c
ZY
1097 return;
1098 }
1099
1100 memcpy(&priv->measure_report, report, sizeof(*report));
1101 priv->measurement_status |= MEASUREMENT_READY;
1102#endif
1103}
1104
c79dd5b5 1105static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 1106 struct iwl_rx_mem_buffer *rxb)
b481de9c 1107{
0a6857e7 1108#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1109 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1110 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
1111 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
1112 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1113#endif
1114}
1115
c79dd5b5 1116static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 1117 struct iwl_rx_mem_buffer *rxb)
b481de9c 1118{
db11d634 1119 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1120 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
1121 "notification for %s:\n",
1122 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 1123 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
1124}
1125
bb8c093b 1126static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 1127{
c79dd5b5
TW
1128 struct iwl_priv *priv =
1129 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1130 struct sk_buff *beacon;
1131
1132 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1133 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1134
1135 if (!beacon) {
1136 IWL_ERROR("update beacon failed\n");
1137 return;
1138 }
1139
1140 mutex_lock(&priv->mutex);
1141 /* new beacon skb is allocated every time; dispose previous.*/
1142 if (priv->ibss_beacon)
1143 dev_kfree_skb(priv->ibss_beacon);
1144
1145 priv->ibss_beacon = beacon;
1146 mutex_unlock(&priv->mutex);
1147
bb8c093b 1148 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
1149}
1150
4e39317d
EG
1151/**
1152 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
1153 *
1154 * This callback is provided in order to send a statistics request.
1155 *
1156 * This timer function is continually reset to execute within
1157 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
1158 * was received. We need to ensure we receive the statistics in order
1159 * to update the temperature used for calibrating the TXPOWER.
1160 */
1161static void iwl4965_bg_statistics_periodic(unsigned long data)
1162{
1163 struct iwl_priv *priv = (struct iwl_priv *)data;
1164
1165 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1166 return;
1167
1168 iwl_send_statistics_request(priv, CMD_ASYNC);
1169}
1170
c79dd5b5 1171static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 1172 struct iwl_rx_mem_buffer *rxb)
b481de9c 1173{
0a6857e7 1174#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1175 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1176 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
e7d326ac 1177 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
1178
1179 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
1180 "tsf %d %d rate %d\n",
25a6572c 1181 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY
1182 beacon->beacon_notify_hdr.failure_frame,
1183 le32_to_cpu(beacon->ibss_mgr_status),
1184 le32_to_cpu(beacon->high_tsf),
1185 le32_to_cpu(beacon->low_tsf), rate);
1186#endif
1187
1188 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
1189 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1190 queue_work(priv->workqueue, &priv->beacon_update);
1191}
1192
b481de9c
ZY
1193/* Handle notification from uCode that card's power state is changing
1194 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 1195static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 1196 struct iwl_rx_mem_buffer *rxb)
b481de9c 1197{
db11d634 1198 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1199 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1200 unsigned long status = priv->status;
1201
1202 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
1203 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1204 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1205
1206 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
1207 RF_CARD_DISABLED)) {
1208
3395f6e9 1209 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1210 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1211
3395f6e9
TW
1212 if (!iwl_grab_nic_access(priv)) {
1213 iwl_write_direct32(
b481de9c
ZY
1214 priv, HBUS_TARG_MBX_C,
1215 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1216
3395f6e9 1217 iwl_release_nic_access(priv);
b481de9c
ZY
1218 }
1219
1220 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 1221 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 1222 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
1223 if (!iwl_grab_nic_access(priv)) {
1224 iwl_write_direct32(
b481de9c
ZY
1225 priv, HBUS_TARG_MBX_C,
1226 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1227
3395f6e9 1228 iwl_release_nic_access(priv);
b481de9c
ZY
1229 }
1230 }
1231
1232 if (flags & RF_CARD_DISABLED) {
3395f6e9 1233 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1234 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
1235 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1236 if (!iwl_grab_nic_access(priv))
1237 iwl_release_nic_access(priv);
b481de9c
ZY
1238 }
1239 }
1240
1241 if (flags & HW_CARD_DISABLED)
1242 set_bit(STATUS_RF_KILL_HW, &priv->status);
1243 else
1244 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1245
1246
1247 if (flags & SW_CARD_DISABLED)
1248 set_bit(STATUS_RF_KILL_SW, &priv->status);
1249 else
1250 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1251
1252 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1253 iwl_scan_cancel(priv);
b481de9c
ZY
1254
1255 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1256 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1257 (test_bit(STATUS_RF_KILL_SW, &status) !=
1258 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1259 queue_work(priv->workqueue, &priv->rf_kill);
1260 else
1261 wake_up_interruptible(&priv->wait_command_queue);
1262}
1263
e2e3c57b
TW
1264int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
1265{
1266 int ret;
1267 unsigned long flags;
1268
1269 spin_lock_irqsave(&priv->lock, flags);
1270 ret = iwl_grab_nic_access(priv);
1271 if (ret)
1272 goto err;
1273
1274 if (src == IWL_PWR_SRC_VAUX) {
1275 u32 val;
1276 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
1277 &val);
1278
1279 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
1280 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1281 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1282 ~APMG_PS_CTRL_MSK_PWR_SRC);
1283 } else {
1284 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1285 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1286 ~APMG_PS_CTRL_MSK_PWR_SRC);
1287 }
1288
1289 iwl_release_nic_access(priv);
1290err:
1291 spin_unlock_irqrestore(&priv->lock, flags);
1292 return ret;
1293}
1294
b481de9c 1295/**
bb8c093b 1296 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1297 *
1298 * Setup the RX handlers for each of the reply types sent from the uCode
1299 * to the host.
1300 *
1301 * This function chains into the hardware specific files for them to setup
1302 * any hardware specific handlers as well.
1303 */
653fa4a0 1304static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1305{
885ba202 1306 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
bb8c093b
CH
1307 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
1308 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 1309 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
1310 iwl4965_rx_spectrum_measure_notif;
1311 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 1312 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
1313 iwl4965_rx_pm_debug_statistics_notif;
1314 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 1315
9fbab516
BC
1316 /*
1317 * The same handler is used for both the REPLY to a discrete
1318 * statistics request from the host as well as for the periodic
1319 * statistics notifications (after received beacons) from the uCode.
b481de9c 1320 */
8f91aecb
EG
1321 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1322 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91
TW
1323
1324 iwl_setup_rx_scan_handlers(priv);
1325
37a44211 1326 /* status change handler */
bb8c093b 1327 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
b481de9c 1328
c1354754
TW
1329 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1330 iwl_rx_missed_beacon_notif;
37a44211 1331 /* Rx handlers */
1781a07f
EG
1332 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1333 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG
1334 /* block ack */
1335 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1336 /* Set up hardware specific Rx handlers */
d4789efe 1337 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY
1338}
1339
5c0eef96
MA
1340/*
1341 * this should be called while priv->lock is locked
1342*/
a55360e4 1343static void __iwl_rx_replenish(struct iwl_priv *priv)
b481de9c 1344{
a55360e4
TW
1345 iwl_rx_allocate(priv);
1346 iwl_rx_queue_restock(priv);
b481de9c
ZY
1347}
1348
b481de9c
ZY
1349
1350/**
a55360e4 1351 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1352 *
1353 * Uses the priv->rx_handlers callback function array to invoke
1354 * the appropriate handlers, including command responses,
1355 * frame-received notifications, and other notifications.
1356 */
a55360e4 1357void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1358{
a55360e4 1359 struct iwl_rx_mem_buffer *rxb;
db11d634 1360 struct iwl_rx_packet *pkt;
a55360e4 1361 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1362 u32 r, i;
1363 int reclaim;
1364 unsigned long flags;
5c0eef96 1365 u8 fill_rx = 0;
d68ab680 1366 u32 count = 8;
b481de9c 1367
6440adb5
CB
1368 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1369 * buffer that the driver may process (last buffer filled by ucode). */
d67f5489 1370 r = priv->cfg->ops->lib->shared_mem_rx_idx(priv);
b481de9c
ZY
1371 i = rxq->read;
1372
1373 /* Rx interrupt, but nothing sent from uCode */
1374 if (i == r)
f3d67999 1375 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1376
a55360e4 1377 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA
1378 fill_rx = 1;
1379
b481de9c
ZY
1380 while (i != r) {
1381 rxb = rxq->queue[i];
1382
9fbab516 1383 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1384 * then a bug has been introduced in the queue refilling
1385 * routines -- catch it here */
1386 BUG_ON(rxb == NULL);
1387
1388 rxq->queue[i] = NULL;
1389
1390 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 1391 priv->hw_params.rx_buf_size,
b481de9c 1392 PCI_DMA_FROMDEVICE);
db11d634 1393 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1394
1395 /* Reclaim a command buffer only if this packet is a response
1396 * to a (driver-originated) command.
1397 * If the packet (e.g. Rx frame) originated from uCode,
1398 * there is no command buffer to reclaim.
1399 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1400 * but apparently a few don't get set; catch them here. */
1401 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1402 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1403 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 1404 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
1405 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1406 (pkt->hdr.cmd != REPLY_TX);
1407
1408 /* Based on type of command response or notification,
1409 * handle those that need handling via function in
bb8c093b 1410 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c 1411 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK
1412 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1413 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY
1414 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1415 } else {
1416 /* No handling needed */
f3d67999 1417 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY
1418 "r %d i %d No handler needed for %s, 0x%02x\n",
1419 r, i, get_cmd_string(pkt->hdr.cmd),
1420 pkt->hdr.cmd);
1421 }
1422
1423 if (reclaim) {
9fbab516 1424 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1425 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1426 * as we reclaim the driver command queue */
1427 if (rxb && rxb->skb)
17b88929 1428 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY
1429 else
1430 IWL_WARNING("Claim null rxb?\n");
1431 }
1432
1433 /* For now we just don't re-use anything. We can tweak this
1434 * later to try and re-use notification packets and SKBs that
1435 * fail to Rx correctly */
1436 if (rxb->skb != NULL) {
1437 priv->alloc_rxb_skb--;
1438 dev_kfree_skb_any(rxb->skb);
1439 rxb->skb = NULL;
1440 }
1441
1442 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 1443 priv->hw_params.rx_buf_size,
9ee1ba47 1444 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1445 spin_lock_irqsave(&rxq->lock, flags);
1446 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1447 spin_unlock_irqrestore(&rxq->lock, flags);
1448 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1449 /* If there are a lot of unused frames,
1450 * restock the Rx queue so ucode wont assert. */
1451 if (fill_rx) {
1452 count++;
1453 if (count >= 8) {
1454 priv->rxq.read = i;
a55360e4 1455 __iwl_rx_replenish(priv);
5c0eef96
MA
1456 count = 0;
1457 }
1458 }
b481de9c
ZY
1459 }
1460
1461 /* Backtrack one entry */
1462 priv->rxq.read = i;
a55360e4
TW
1463 iwl_rx_queue_restock(priv);
1464}
a55360e4 1465
0a6857e7 1466#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1467static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1468{
c1adf9fb 1469 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57
JP
1470 DECLARE_MAC_BUF(mac);
1471
b481de9c 1472 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1473 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
1474 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1475 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1476 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1477 le32_to_cpu(rxon->filter_flags));
1478 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1479 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1480 rxon->ofdm_basic_rates);
1481 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP
1482 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
1483 print_mac(mac, rxon->node_addr));
1484 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
1485 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY
1486 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1487}
1488#endif
1489
c79dd5b5 1490static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1491{
1492 IWL_DEBUG_ISR("Enabling interrupts\n");
1493 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 1494 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
1495}
1496
0359facc
MA
1497/* call this function to flush any scheduled tasklet */
1498static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1499{
1500 /* wait to make sure we flush pedding tasklet*/
1501 synchronize_irq(priv->pci_dev->irq);
1502 tasklet_kill(&priv->irq_tasklet);
1503}
1504
c79dd5b5 1505static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1506{
1507 clear_bit(STATUS_INT_ENABLED, &priv->status);
1508
1509 /* disable interrupts from uCode/NIC to host */
3395f6e9 1510 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1511
1512 /* acknowledge/clear/reset any interrupts still pending
1513 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW
1514 iwl_write32(priv, CSR_INT, 0xffffffff);
1515 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
1516 IWL_DEBUG_ISR("Disabled interrupts\n");
1517}
1518
b481de9c 1519
b481de9c 1520/**
bb8c093b 1521 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1522 */
c79dd5b5 1523static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 1524{
bb8c093b 1525 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
1526 set_bit(STATUS_FW_ERROR, &priv->status);
1527
1528 /* Cancel currently queued command. */
1529 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1530
0a6857e7 1531#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1532 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1533 iwl_dump_nic_error_log(priv);
189a2b59 1534 iwl_dump_nic_event_log(priv);
bf403db8 1535 iwl4965_print_rx_config_cmd(priv);
b481de9c
ZY
1536 }
1537#endif
1538
1539 wake_up_interruptible(&priv->wait_command_queue);
1540
1541 /* Keep the restart process from trying to send host
1542 * commands by clearing the INIT status bit */
1543 clear_bit(STATUS_READY, &priv->status);
1544
1545 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1546 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY
1547 "Restarting adapter due to uCode error.\n");
1548
3109ece1 1549 if (iwl_is_associated(priv)) {
b481de9c
ZY
1550 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1551 sizeof(priv->recovery_rxon));
1552 priv->error_recovering = 1;
1553 }
3a1081e8
EK
1554 if (priv->cfg->mod_params->restart_fw)
1555 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1556 }
1557}
1558
c79dd5b5 1559static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1560{
1561 unsigned long flags;
1562
1563 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1564 sizeof(priv->staging_rxon));
1565 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 1566 iwl4965_commit_rxon(priv);
b481de9c 1567
4f40e4d9 1568 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
1569
1570 spin_lock_irqsave(&priv->lock, flags);
1571 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1572 priv->error_recovering = 0;
1573 spin_unlock_irqrestore(&priv->lock, flags);
1574}
1575
c79dd5b5 1576static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1577{
1578 u32 inta, handled = 0;
1579 u32 inta_fh;
1580 unsigned long flags;
0a6857e7 1581#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1582 u32 inta_mask;
1583#endif
1584
1585 spin_lock_irqsave(&priv->lock, flags);
1586
1587 /* Ack/clear/reset pending uCode interrupts.
1588 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1589 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
1590 inta = iwl_read32(priv, CSR_INT);
1591 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1592
1593 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1594 * Any new interrupts that happen after this, either while we're
1595 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
1596 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1597 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1598
0a6857e7 1599#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1600 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1601 /* just for debug */
3395f6e9 1602 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
1603 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1604 inta, inta_mask, inta_fh);
1605 }
1606#endif
1607
1608 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1609 * atomic, make sure that inta covers all the interrupts that
1610 * we've discovered, even if FH interrupt came in just after
1611 * reading CSR_INT. */
6f83eaa1 1612 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1613 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1614 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
1615 inta |= CSR_INT_BIT_FH_TX;
1616
1617 /* Now service all interrupt bits discovered above. */
1618 if (inta & CSR_INT_BIT_HW_ERR) {
1619 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1620
1621 /* Tell the device to stop sending interrupts */
bb8c093b 1622 iwl4965_disable_interrupts(priv);
b481de9c 1623
bb8c093b 1624 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1625
1626 handled |= CSR_INT_BIT_HW_ERR;
1627
1628 spin_unlock_irqrestore(&priv->lock, flags);
1629
1630 return;
1631 }
1632
0a6857e7 1633#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1634 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1635 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
1636 if (inta & CSR_INT_BIT_SCD)
1637 IWL_DEBUG_ISR("Scheduler finished to transmit "
1638 "the frame/frames.\n");
b481de9c
ZY
1639
1640 /* Alive notification via Rx interrupt will do the real work */
1641 if (inta & CSR_INT_BIT_ALIVE)
1642 IWL_DEBUG_ISR("Alive interrupt\n");
1643 }
1644#endif
1645 /* Safely ignore these bits for debug checks below */
25c03d8e 1646 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1647
9fbab516 1648 /* HW RF KILL switch toggled */
b481de9c
ZY
1649 if (inta & CSR_INT_BIT_RF_KILL) {
1650 int hw_rf_kill = 0;
3395f6e9 1651 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
1652 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1653 hw_rf_kill = 1;
1654
f3d67999 1655 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
b481de9c
ZY
1656 hw_rf_kill ? "disable radio":"enable radio");
1657
a9efa652
EG
1658 /* driver only loads ucode once setting the interface up.
1659 * the driver as well won't allow loading if RFKILL is set
1660 * therefore no need to restart the driver from this handler
1661 */
1662 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
53e49093 1663 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c
ZY
1664
1665 handled |= CSR_INT_BIT_RF_KILL;
1666 }
1667
9fbab516 1668 /* Chip got too hot and stopped itself */
b481de9c
ZY
1669 if (inta & CSR_INT_BIT_CT_KILL) {
1670 IWL_ERROR("Microcode CT kill error detected.\n");
1671 handled |= CSR_INT_BIT_CT_KILL;
1672 }
1673
1674 /* Error detected by uCode */
1675 if (inta & CSR_INT_BIT_SW_ERR) {
1676 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1677 inta);
bb8c093b 1678 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1679 handled |= CSR_INT_BIT_SW_ERR;
1680 }
1681
1682 /* uCode wakes up after power-down sleep */
1683 if (inta & CSR_INT_BIT_WAKEUP) {
1684 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1685 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW
1686 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1687 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1688 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1689 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1690 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1691 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1692
1693 handled |= CSR_INT_BIT_WAKEUP;
1694 }
1695
1696 /* All uCode command responses, including Tx command responses,
1697 * Rx "responses" (frame-received notification), and other
1698 * notifications from uCode come through here*/
1699 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1700 iwl_rx_handle(priv);
b481de9c
ZY
1701 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1702 }
1703
1704 if (inta & CSR_INT_BIT_FH_TX) {
1705 IWL_DEBUG_ISR("Tx interrupt\n");
1706 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR
1707 /* FH finished to write, send event */
1708 priv->ucode_write_complete = 1;
1709 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1710 }
1711
1712 if (inta & ~handled)
1713 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1714
1715 if (inta & ~CSR_INI_SET_MASK) {
1716 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1717 inta & ~CSR_INI_SET_MASK);
1718 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1719 }
1720
1721 /* Re-enable all interrupts */
0359facc
MA
1722 /* only Re-enable if diabled by irq */
1723 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1724 iwl4965_enable_interrupts(priv);
b481de9c 1725
0a6857e7 1726#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1727 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
1728 inta = iwl_read32(priv, CSR_INT);
1729 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1730 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1731 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1732 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1733 }
1734#endif
1735 spin_unlock_irqrestore(&priv->lock, flags);
1736}
1737
bb8c093b 1738static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 1739{
c79dd5b5 1740 struct iwl_priv *priv = data;
b481de9c
ZY
1741 u32 inta, inta_mask;
1742 u32 inta_fh;
1743 if (!priv)
1744 return IRQ_NONE;
1745
1746 spin_lock(&priv->lock);
1747
1748 /* Disable (but don't clear!) interrupts here to avoid
1749 * back-to-back ISRs and sporadic interrupts from our NIC.
1750 * If we have something to service, the tasklet will re-enable ints.
1751 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
1752 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1753 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1754
1755 /* Discover which interrupts are active/pending */
3395f6e9
TW
1756 inta = iwl_read32(priv, CSR_INT);
1757 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1758
1759 /* Ignore interrupt if there's nothing in NIC to service.
1760 * This may be due to IRQ shared with another device,
1761 * or due to sporadic interrupts thrown from our NIC. */
1762 if (!inta && !inta_fh) {
1763 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1764 goto none;
1765 }
1766
1767 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
1768 /* Hardware disappeared. It might have already raised
1769 * an interrupt */
b481de9c 1770 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 1771 goto unplugged;
b481de9c
ZY
1772 }
1773
1774 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1775 inta, inta_mask, inta_fh);
1776
25c03d8e
JP
1777 inta &= ~CSR_INT_BIT_SCD;
1778
bb8c093b 1779 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
1780 if (likely(inta || inta_fh))
1781 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1782
66fbb541
ON
1783 unplugged:
1784 spin_unlock(&priv->lock);
b481de9c
ZY
1785 return IRQ_HANDLED;
1786
1787 none:
1788 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
1789 /* only Re-enable if diabled by irq */
1790 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1791 iwl4965_enable_interrupts(priv);
b481de9c
ZY
1792 spin_unlock(&priv->lock);
1793 return IRQ_NONE;
1794}
1795
b481de9c
ZY
1796/******************************************************************************
1797 *
1798 * uCode download functions
1799 *
1800 ******************************************************************************/
1801
c79dd5b5 1802static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1803{
98c92211
TW
1804 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1805 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1806 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1807 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1808 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1809 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1810}
1811
edcdf8b2
RR
1812static void iwl4965_nic_start(struct iwl_priv *priv)
1813{
1814 /* Remove all resets to allow NIC to operate */
1815 iwl_write32(priv, CSR_RESET, 0);
1816}
1817
1818
b481de9c 1819/**
bb8c093b 1820 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
1821 *
1822 * Copy into buffers for card to fetch via bus-mastering
1823 */
c79dd5b5 1824static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 1825{
14b3d338 1826 struct iwl_ucode *ucode;
90e759d1 1827 int ret;
b481de9c 1828 const struct firmware *ucode_raw;
4bf775cd 1829 const char *name = priv->cfg->fw_name;
b481de9c
ZY
1830 u8 *src;
1831 size_t len;
1832 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
1833
1834 /* Ask kernel firmware_class module to get the boot firmware off disk.
1835 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
1836 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
1837 if (ret < 0) {
1838 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1839 name, ret);
b481de9c
ZY
1840 goto error;
1841 }
1842
1843 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1844 name, ucode_raw->size);
1845
1846 /* Make sure that we got at least our header! */
1847 if (ucode_raw->size < sizeof(*ucode)) {
1848 IWL_ERROR("File size way too small!\n");
90e759d1 1849 ret = -EINVAL;
b481de9c
ZY
1850 goto err_release;
1851 }
1852
1853 /* Data from ucode file: header followed by uCode images */
1854 ucode = (void *)ucode_raw->data;
1855
1856 ver = le32_to_cpu(ucode->ver);
1857 inst_size = le32_to_cpu(ucode->inst_size);
1858 data_size = le32_to_cpu(ucode->data_size);
1859 init_size = le32_to_cpu(ucode->init_size);
1860 init_data_size = le32_to_cpu(ucode->init_data_size);
1861 boot_size = le32_to_cpu(ucode->boot_size);
1862
1863 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
1864 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1865 inst_size);
1866 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1867 data_size);
1868 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1869 init_size);
1870 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1871 init_data_size);
1872 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1873 boot_size);
1874
1875 /* Verify size of file vs. image size info in file's header */
1876 if (ucode_raw->size < sizeof(*ucode) +
1877 inst_size + data_size + init_size +
1878 init_data_size + boot_size) {
1879
1880 IWL_DEBUG_INFO("uCode file size %d too small\n",
1881 (int)ucode_raw->size);
90e759d1 1882 ret = -EINVAL;
b481de9c
ZY
1883 goto err_release;
1884 }
1885
1886 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1887 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
1888 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1889 inst_size);
1890 ret = -EINVAL;
b481de9c
ZY
1891 goto err_release;
1892 }
1893
099b40b7 1894 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
1895 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1896 data_size);
1897 ret = -EINVAL;
b481de9c
ZY
1898 goto err_release;
1899 }
099b40b7 1900 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1901 IWL_DEBUG_INFO
90e759d1
TW
1902 ("uCode init instr len %d too large to fit in\n",
1903 init_size);
1904 ret = -EINVAL;
b481de9c
ZY
1905 goto err_release;
1906 }
099b40b7 1907 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1908 IWL_DEBUG_INFO
90e759d1
TW
1909 ("uCode init data len %d too large to fit in\n",
1910 init_data_size);
1911 ret = -EINVAL;
b481de9c
ZY
1912 goto err_release;
1913 }
099b40b7 1914 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1915 IWL_DEBUG_INFO
90e759d1
TW
1916 ("uCode boot instr len %d too large to fit in\n",
1917 boot_size);
1918 ret = -EINVAL;
b481de9c
ZY
1919 goto err_release;
1920 }
1921
1922 /* Allocate ucode buffers for card's bus-master loading ... */
1923
1924 /* Runtime instructions and 2 copies of data:
1925 * 1) unmodified from disk
1926 * 2) backup cache for save/restore during power-downs */
1927 priv->ucode_code.len = inst_size;
98c92211 1928 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
1929
1930 priv->ucode_data.len = data_size;
98c92211 1931 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
1932
1933 priv->ucode_data_backup.len = data_size;
98c92211 1934 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
1935
1936 /* Initialization instructions and data */
90e759d1
TW
1937 if (init_size && init_data_size) {
1938 priv->ucode_init.len = init_size;
98c92211 1939 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
1940
1941 priv->ucode_init_data.len = init_data_size;
98c92211 1942 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
1943
1944 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1945 goto err_pci_alloc;
1946 }
b481de9c
ZY
1947
1948 /* Bootstrap (instructions only, no data) */
90e759d1
TW
1949 if (boot_size) {
1950 priv->ucode_boot.len = boot_size;
98c92211 1951 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1952
90e759d1
TW
1953 if (!priv->ucode_boot.v_addr)
1954 goto err_pci_alloc;
1955 }
b481de9c
ZY
1956
1957 /* Copy images into buffers for card's bus-master reads ... */
1958
1959 /* Runtime instructions (first block of data in file) */
1960 src = &ucode->data[0];
1961 len = priv->ucode_code.len;
90e759d1 1962 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
1963 memcpy(priv->ucode_code.v_addr, src, len);
1964 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1965 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1966
1967 /* Runtime data (2nd block)
bb8c093b 1968 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
1969 src = &ucode->data[inst_size];
1970 len = priv->ucode_data.len;
90e759d1 1971 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
1972 memcpy(priv->ucode_data.v_addr, src, len);
1973 memcpy(priv->ucode_data_backup.v_addr, src, len);
1974
1975 /* Initialization instructions (3rd block) */
1976 if (init_size) {
1977 src = &ucode->data[inst_size + data_size];
1978 len = priv->ucode_init.len;
90e759d1
TW
1979 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1980 len);
b481de9c
ZY
1981 memcpy(priv->ucode_init.v_addr, src, len);
1982 }
1983
1984 /* Initialization data (4th block) */
1985 if (init_data_size) {
1986 src = &ucode->data[inst_size + data_size + init_size];
1987 len = priv->ucode_init_data.len;
90e759d1
TW
1988 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1989 len);
b481de9c
ZY
1990 memcpy(priv->ucode_init_data.v_addr, src, len);
1991 }
1992
1993 /* Bootstrap instructions (5th block) */
1994 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1995 len = priv->ucode_boot.len;
90e759d1 1996 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
1997 memcpy(priv->ucode_boot.v_addr, src, len);
1998
1999 /* We have our copies now, allow OS release its copies */
2000 release_firmware(ucode_raw);
2001 return 0;
2002
2003 err_pci_alloc:
2004 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 2005 ret = -ENOMEM;
bb8c093b 2006 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
2007
2008 err_release:
2009 release_firmware(ucode_raw);
2010
2011 error:
90e759d1 2012 return ret;
b481de9c
ZY
2013}
2014
b481de9c 2015/**
4a4a9e81 2016 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 2017 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 2018 * Alive gets handled by iwl_init_alive_start()).
b481de9c 2019 */
4a4a9e81 2020static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 2021{
57aab75a 2022 int ret = 0;
b481de9c
ZY
2023
2024 IWL_DEBUG_INFO("Runtime Alive received.\n");
2025
2026 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2027 /* We had an error bringing up the hardware, so take it
2028 * all the way back down so we can try again */
2029 IWL_DEBUG_INFO("Alive failed.\n");
2030 goto restart;
2031 }
2032
2033 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2034 * This is a paranoid check, because we would not have gotten the
2035 * "runtime" alive if code weren't properly loaded. */
b0692f2f 2036 if (iwl_verify_ucode(priv)) {
b481de9c
ZY
2037 /* Runtime instruction load was bad;
2038 * take it all the way back down so we can try again */
2039 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
2040 goto restart;
2041 }
2042
37deb2a0 2043 iwl_clear_stations_table(priv);
57aab75a
TW
2044 ret = priv->cfg->ops->lib->alive_notify(priv);
2045 if (ret) {
b481de9c 2046 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 2047 ret);
b481de9c
ZY
2048 goto restart;
2049 }
2050
9fbab516 2051 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
2052 set_bit(STATUS_ALIVE, &priv->status);
2053
fee1247a 2054 if (iwl_is_rfkill(priv))
b481de9c
ZY
2055 return;
2056
36d6825b 2057 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2058
2059 priv->active_rate = priv->rates_mask;
2060 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2061
3109ece1 2062 if (iwl_is_associated(priv)) {
c1adf9fb
GG
2063 struct iwl_rxon_cmd *active_rxon =
2064 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY
2065
2066 memcpy(&priv->staging_rxon, &priv->active_rxon,
2067 sizeof(priv->staging_rxon));
2068 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2069 } else {
2070 /* Initialize our rx_config data */
bb8c093b 2071 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
2072 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2073 }
2074
9fbab516 2075 /* Configure Bluetooth device coexistence support */
bb8c093b 2076 iwl4965_send_bt_config(priv);
b481de9c 2077
4a4a9e81
TW
2078 iwl_reset_run_time_calib(priv);
2079
b481de9c 2080 /* Configure the adapter for unassociated operation */
bb8c093b 2081 iwl4965_commit_rxon(priv);
b481de9c
ZY
2082
2083 /* At this point, the NIC is initialized and operational */
47f4a587 2084 iwl_rf_kill_ct_config(priv);
5a66926a 2085
fe00b5a5
RC
2086 iwl_leds_register(priv);
2087
b481de9c 2088 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 2089 set_bit(STATUS_READY, &priv->status);
5a66926a 2090 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
2091
2092 if (priv->error_recovering)
bb8c093b 2093 iwl4965_error_recovery(priv);
b481de9c 2094
58d0f361 2095 iwl_power_update_mode(priv, 1);
84363e6e 2096 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
c46fbefa
AK
2097
2098 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2099 iwl4965_set_mode(priv, priv->iw_mode);
2100
b481de9c
ZY
2101 return;
2102
2103 restart:
2104 queue_work(priv->workqueue, &priv->restart);
2105}
2106
4e39317d 2107static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2108
c79dd5b5 2109static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2110{
2111 unsigned long flags;
2112 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2113
2114 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
2115
b481de9c
ZY
2116 if (!exit_pending)
2117 set_bit(STATUS_EXIT_PENDING, &priv->status);
2118
ab53d8af
MA
2119 iwl_leds_unregister(priv);
2120
37deb2a0 2121 iwl_clear_stations_table(priv);
b481de9c
ZY
2122
2123 /* Unblock any waiting calls */
2124 wake_up_interruptible_all(&priv->wait_command_queue);
2125
b481de9c
ZY
2126 /* Wipe out the EXIT_PENDING status bit if we are not actually
2127 * exiting the module */
2128 if (!exit_pending)
2129 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2130
2131 /* stop and reset the on-board processor */
3395f6e9 2132 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2133
2134 /* tell the device to stop sending interrupts */
0359facc 2135 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2136 iwl4965_disable_interrupts(priv);
0359facc
MA
2137 spin_unlock_irqrestore(&priv->lock, flags);
2138 iwl_synchronize_irq(priv);
b481de9c
ZY
2139
2140 if (priv->mac80211_registered)
2141 ieee80211_stop_queues(priv->hw);
2142
bb8c093b 2143 /* If we have not previously called iwl4965_init() then
b481de9c 2144 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 2145 if (!iwl_is_init(priv)) {
b481de9c
ZY
2146 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2147 STATUS_RF_KILL_HW |
2148 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2149 STATUS_RF_KILL_SW |
9788864e
RC
2150 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2151 STATUS_GEO_CONFIGURED |
b481de9c 2152 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA
2153 STATUS_IN_SUSPEND |
2154 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2155 STATUS_EXIT_PENDING;
b481de9c
ZY
2156 goto exit;
2157 }
2158
2159 /* ...otherwise clear out all the status bits but the RF Kill and
2160 * SUSPEND bits and continue taking the NIC down. */
2161 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2162 STATUS_RF_KILL_HW |
2163 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2164 STATUS_RF_KILL_SW |
9788864e
RC
2165 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2166 STATUS_GEO_CONFIGURED |
b481de9c
ZY
2167 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
2168 STATUS_IN_SUSPEND |
2169 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA
2170 STATUS_FW_ERROR |
2171 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2172 STATUS_EXIT_PENDING;
b481de9c
ZY
2173
2174 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2175 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 2176 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2177 spin_unlock_irqrestore(&priv->lock, flags);
2178
da1bc453 2179 iwl_txq_ctx_stop(priv);
b3bbacb7 2180 iwl_rxq_stop(priv);
b481de9c
ZY
2181
2182 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
2183 if (!iwl_grab_nic_access(priv)) {
2184 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 2185 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 2186 iwl_release_nic_access(priv);
b481de9c
ZY
2187 }
2188 spin_unlock_irqrestore(&priv->lock, flags);
2189
2190 udelay(5);
2191
7f066108
TW
2192 /* FIXME: apm_ops.suspend(priv) */
2193 priv->cfg->ops->lib->apm_ops.reset(priv);
399f4900 2194 priv->cfg->ops->lib->free_shared_mem(priv);
b481de9c
ZY
2195
2196 exit:
885ba202 2197 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2198
2199 if (priv->ibss_beacon)
2200 dev_kfree_skb(priv->ibss_beacon);
2201 priv->ibss_beacon = NULL;
2202
2203 /* clear out any free frames */
fcab423d 2204 iwl_clear_free_frames(priv);
b481de9c
ZY
2205}
2206
c79dd5b5 2207static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2208{
2209 mutex_lock(&priv->mutex);
bb8c093b 2210 __iwl4965_down(priv);
b481de9c 2211 mutex_unlock(&priv->mutex);
b24d22b1 2212
4e39317d 2213 iwl_cancel_deferred_work(priv);
b481de9c
ZY
2214}
2215
2216#define MAX_HW_RESTARTS 5
2217
c79dd5b5 2218static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 2219{
57aab75a
TW
2220 int i;
2221 int ret;
b481de9c
ZY
2222
2223 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2224 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2225 return -EIO;
2226 }
2227
e903fbd4
RC
2228 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2229 IWL_ERROR("ucode not available for device bringup\n");
2230 return -EIO;
2231 }
2232
e655b9f0 2233 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 2234 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 2235 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2236 else
e655b9f0 2237 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2238
c1842d61
TW
2239 if (iwl_is_rfkill(priv)) {
2240 iwl4965_enable_interrupts(priv);
3bff19c2
EG
2241 IWL_WARNING("Radio disabled by %s RF Kill switch\n",
2242 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 2243 return 0;
b481de9c
ZY
2244 }
2245
3395f6e9 2246 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2247
399f4900
RR
2248 ret = priv->cfg->ops->lib->alloc_shared_mem(priv);
2249 if (ret) {
2250 IWL_ERROR("Unable to allocate shared memory\n");
2251 return ret;
2252 }
2253
1053d35f 2254 ret = iwl_hw_nic_init(priv);
57aab75a
TW
2255 if (ret) {
2256 IWL_ERROR("Unable to init nic\n");
2257 return ret;
b481de9c
ZY
2258 }
2259
2260 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
2261 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2262 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2263 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2264
2265 /* clear (again), then enable host interrupts */
3395f6e9 2266 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 2267 iwl4965_enable_interrupts(priv);
b481de9c
ZY
2268
2269 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
2270 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2271 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2272
2273 /* Copy original ucode data image from disk into backup cache.
2274 * This will be used to initialize the on-board processor's
2275 * data SRAM for a clean start when the runtime program first loads. */
2276 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2277 priv->ucode_data.len);
b481de9c 2278
b481de9c
ZY
2279 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2280
37deb2a0 2281 iwl_clear_stations_table(priv);
b481de9c
ZY
2282
2283 /* load bootstrap state machine,
2284 * load bootstrap program into processor's memory,
2285 * prepare to load the "initialize" uCode */
57aab75a 2286 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2287
57aab75a
TW
2288 if (ret) {
2289 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
2290 continue;
2291 }
2292
f3d5b45b
EG
2293 /* Clear out the uCode error bit if it is set */
2294 clear_bit(STATUS_FW_ERROR, &priv->status);
2295
b481de9c 2296 /* start card; "initialize" will load runtime ucode */
edcdf8b2 2297 iwl4965_nic_start(priv);
b481de9c 2298
b481de9c
ZY
2299 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2300
2301 return 0;
2302 }
2303
2304 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2305 __iwl4965_down(priv);
64e72c3e 2306 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2307
2308 /* tried to restart and config the device for as long as our
2309 * patience could withstand */
2310 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2311 return -EIO;
2312}
2313
2314
2315/*****************************************************************************
2316 *
2317 * Workqueue callbacks
2318 *
2319 *****************************************************************************/
2320
4a4a9e81 2321static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2322{
c79dd5b5
TW
2323 struct iwl_priv *priv =
2324 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2325
2326 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2327 return;
2328
2329 mutex_lock(&priv->mutex);
f3ccc08c 2330 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY
2331 mutex_unlock(&priv->mutex);
2332}
2333
4a4a9e81 2334static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2335{
c79dd5b5
TW
2336 struct iwl_priv *priv =
2337 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2338
2339 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2340 return;
2341
2342 mutex_lock(&priv->mutex);
4a4a9e81 2343 iwl_alive_start(priv);
b481de9c
ZY
2344 mutex_unlock(&priv->mutex);
2345}
2346
bb8c093b 2347static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 2348{
c79dd5b5 2349 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
2350
2351 wake_up_interruptible(&priv->wait_command_queue);
2352
2353 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2354 return;
2355
2356 mutex_lock(&priv->mutex);
2357
fee1247a 2358 if (!iwl_is_rfkill(priv)) {
f3d67999 2359 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY
2360 "HW and/or SW RF Kill no longer active, restarting "
2361 "device\n");
2362 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2363 queue_work(priv->workqueue, &priv->restart);
2364 } else {
ad97edd2
MA
2365 /* make sure mac80211 stop sending Tx frame */
2366 if (priv->mac80211_registered)
2367 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2368
2369 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2370 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2371 "disabled by SW switch\n");
2372 else
2373 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2374 "Kill switch must be turned off for "
2375 "wireless networking to work.\n");
2376 }
2377 mutex_unlock(&priv->mutex);
80fcc9e2 2378 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2379}
2380
4419e39b
AK
2381static void iwl4965_bg_set_monitor(struct work_struct *work)
2382{
2383 struct iwl_priv *priv = container_of(work,
2384 struct iwl_priv, set_monitor);
c46fbefa 2385 int ret;
4419e39b
AK
2386
2387 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
2388
2389 mutex_lock(&priv->mutex);
2390
c46fbefa
AK
2391 ret = iwl4965_set_mode(priv, IEEE80211_IF_TYPE_MNTR);
2392
2393 if (ret) {
2394 if (ret == -EAGAIN)
2395 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
2396 else
2397 IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret);
2398 }
4419e39b
AK
2399
2400 mutex_unlock(&priv->mutex);
2401}
2402
16e727e8
EG
2403static void iwl_bg_run_time_calib_work(struct work_struct *work)
2404{
2405 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2406 run_time_calib_work);
2407
2408 mutex_lock(&priv->mutex);
2409
2410 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2411 test_bit(STATUS_SCANNING, &priv->status)) {
2412 mutex_unlock(&priv->mutex);
2413 return;
2414 }
2415
2416 if (priv->start_calib) {
2417 iwl_chain_noise_calibration(priv, &priv->statistics);
2418
2419 iwl_sensitivity_calibration(priv, &priv->statistics);
2420 }
2421
2422 mutex_unlock(&priv->mutex);
2423 return;
2424}
2425
bb8c093b 2426static void iwl4965_bg_up(struct work_struct *data)
b481de9c 2427{
c79dd5b5 2428 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2429
2430 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2431 return;
2432
2433 mutex_lock(&priv->mutex);
bb8c093b 2434 __iwl4965_up(priv);
b481de9c 2435 mutex_unlock(&priv->mutex);
80fcc9e2 2436 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2437}
2438
bb8c093b 2439static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 2440{
c79dd5b5 2441 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2442
2443 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2444 return;
2445
bb8c093b 2446 iwl4965_down(priv);
b481de9c
ZY
2447 queue_work(priv->workqueue, &priv->up);
2448}
2449
bb8c093b 2450static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 2451{
c79dd5b5
TW
2452 struct iwl_priv *priv =
2453 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2454
2455 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2456 return;
2457
2458 mutex_lock(&priv->mutex);
a55360e4 2459 iwl_rx_replenish(priv);
b481de9c
ZY
2460 mutex_unlock(&priv->mutex);
2461}
2462
7878a5a4
MA
2463#define IWL_DELAY_NEXT_SCAN (HZ*2)
2464
508e32e1 2465static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 2466{
b481de9c 2467 struct ieee80211_conf *conf = NULL;
857485c0 2468 int ret = 0;
0795af57 2469 DECLARE_MAC_BUF(mac);
1ff50bda 2470 unsigned long flags;
b481de9c
ZY
2471
2472 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
3ac7f146 2473 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
2474 return;
2475 }
2476
0795af57
JP
2477 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
2478 priv->assoc_id,
2479 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY
2480
2481
2482 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2483 return;
2484
b481de9c 2485
508e32e1 2486 if (!priv->vif || !priv->is_open)
948c171c 2487 return;
508e32e1 2488
2a421b91 2489 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2490
b481de9c
ZY
2491 conf = ieee80211_get_hw_conf(priv->hw);
2492
2493 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2494 iwl4965_commit_rxon(priv);
b481de9c 2495
bb8c093b
CH
2496 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2497 iwl4965_setup_rxon_timing(priv);
857485c0 2498 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2499 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2500 if (ret)
b481de9c
ZY
2501 IWL_WARNING("REPLY_RXON_TIMING failed - "
2502 "Attempting to continue.\n");
2503
2504 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2505
fd105e79 2506 if (priv->current_ht_config.is_ht)
47c5196e 2507 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2508
c7de35cd 2509 iwl_set_rxon_chain(priv);
b481de9c
ZY
2510 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2511
2512 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2513 priv->assoc_id, priv->beacon_int);
2514
2515 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2516 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2517 else
2518 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2519
2520 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2521 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2522 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2523 else
2524 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2525
2526 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2527 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2528
2529 }
2530
bb8c093b 2531 iwl4965_commit_rxon(priv);
b481de9c
ZY
2532
2533 switch (priv->iw_mode) {
2534 case IEEE80211_IF_TYPE_STA:
b481de9c
ZY
2535 break;
2536
2537 case IEEE80211_IF_TYPE_IBSS:
2538
c46fbefa
AK
2539 /* assume default assoc id */
2540 priv->assoc_id = 1;
b481de9c 2541
4f40e4d9 2542 iwl_rxon_add_station(priv, priv->bssid, 0);
bb8c093b 2543 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2544
2545 break;
2546
2547 default:
2548 IWL_ERROR("%s Should not be called in %d mode\n",
3ac7f146 2549 __func__, priv->iw_mode);
b481de9c
ZY
2550 break;
2551 }
2552
b481de9c 2553 /* Enable Rx differential gain and sensitivity calibrations */
f0832f13 2554 iwl_chain_noise_reset(priv);
b481de9c 2555 priv->start_calib = 1;
b481de9c
ZY
2556
2557 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2558 priv->assoc_station_added = 1;
2559
1ff50bda
EG
2560 spin_lock_irqsave(&priv->lock, flags);
2561 iwl_activate_qos(priv, 0);
2562 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2563
5da4b55f 2564 iwl_power_update_mode(priv, 0);
7878a5a4
MA
2565 /* we have just associated, don't start scan too early */
2566 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
508e32e1
RC
2567}
2568
76bb77e0
ZY
2569static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
2570
2a421b91 2571static void iwl_bg_scan_completed(struct work_struct *work)
b481de9c 2572{
c79dd5b5
TW
2573 struct iwl_priv *priv =
2574 container_of(work, struct iwl_priv, scan_completed);
b481de9c 2575
630fe9b6 2576 IWL_DEBUG_SCAN("SCAN complete scan\n");
b481de9c
ZY
2577
2578 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2579 return;
2580
a0646470
ZY
2581 if (test_bit(STATUS_CONF_PENDING, &priv->status))
2582 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 2583
b481de9c
ZY
2584 ieee80211_scan_completed(priv->hw);
2585
2586 /* Since setting the TXPOWER may have been deferred while
2587 * performing the scan, fire one off */
2588 mutex_lock(&priv->mutex);
630fe9b6 2589 iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
b481de9c
ZY
2590 mutex_unlock(&priv->mutex);
2591}
2592
2593/*****************************************************************************
2594 *
2595 * mac80211 entry point functions
2596 *
2597 *****************************************************************************/
2598
154b25ce 2599#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2600
bb8c093b 2601static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 2602{
c79dd5b5 2603 struct iwl_priv *priv = hw->priv;
5a66926a 2604 int ret;
b481de9c
ZY
2605
2606 IWL_DEBUG_MAC80211("enter\n");
2607
5a66926a
ZY
2608 if (pci_enable_device(priv->pci_dev)) {
2609 IWL_ERROR("Fail to pci_enable_device\n");
2610 return -ENODEV;
2611 }
2612 pci_restore_state(priv->pci_dev);
2613 pci_enable_msi(priv->pci_dev);
2614
2615 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
2616 DRV_NAME, priv);
2617 if (ret) {
2618 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2619 goto out_disable_msi;
2620 }
2621
b481de9c
ZY
2622 /* we should be verifying the device is ready to be opened */
2623 mutex_lock(&priv->mutex);
2624
c1adf9fb 2625 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY
2626 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2627 * ucode filename and max sizes are card-specific. */
b481de9c 2628
5a66926a
ZY
2629 if (!priv->ucode_code.len) {
2630 ret = iwl4965_read_ucode(priv);
2631 if (ret) {
2632 IWL_ERROR("Could not read microcode: %d\n", ret);
2633 mutex_unlock(&priv->mutex);
2634 goto out_release_irq;
2635 }
2636 }
b481de9c 2637
e655b9f0 2638 ret = __iwl4965_up(priv);
5a66926a 2639
b481de9c 2640 mutex_unlock(&priv->mutex);
5a66926a 2641
80fcc9e2
AG
2642 iwl_rfkill_set_hw_state(priv);
2643
e655b9f0
ZY
2644 if (ret)
2645 goto out_release_irq;
2646
c1842d61
TW
2647 if (iwl_is_rfkill(priv))
2648 goto out;
2649
e655b9f0
ZY
2650 IWL_DEBUG_INFO("Start UP work done.\n");
2651
2652 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2653 return 0;
2654
fe9b6b72 2655 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2656 * mac80211 will not be run successfully. */
154b25ce
EG
2657 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2658 test_bit(STATUS_READY, &priv->status),
2659 UCODE_READY_TIMEOUT);
2660 if (!ret) {
2661 if (!test_bit(STATUS_READY, &priv->status)) {
2662 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2663 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2664 ret = -ETIMEDOUT;
2665 goto out_release_irq;
5a66926a 2666 }
fe9b6b72 2667 }
0a078ffa 2668
c1842d61 2669out:
0a078ffa 2670 priv->is_open = 1;
b481de9c
ZY
2671 IWL_DEBUG_MAC80211("leave\n");
2672 return 0;
5a66926a
ZY
2673
2674out_release_irq:
2675 free_irq(priv->pci_dev->irq, priv);
2676out_disable_msi:
2677 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
2678 pci_disable_device(priv->pci_dev);
2679 priv->is_open = 0;
2680 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2681 return ret;
b481de9c
ZY
2682}
2683
bb8c093b 2684static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 2685{
c79dd5b5 2686 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2687
2688 IWL_DEBUG_MAC80211("enter\n");
948c171c 2689
e655b9f0
ZY
2690 if (!priv->is_open) {
2691 IWL_DEBUG_MAC80211("leave - skip\n");
2692 return;
2693 }
2694
b481de9c 2695 priv->is_open = 0;
5a66926a 2696
fee1247a 2697 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
2698 /* stop mac, cancel any scan request and clear
2699 * RXON_FILTER_ASSOC_MSK BIT
2700 */
5a66926a 2701 mutex_lock(&priv->mutex);
2a421b91 2702 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2703 mutex_unlock(&priv->mutex);
fde3571f
MA
2704 }
2705
5a66926a
ZY
2706 iwl4965_down(priv);
2707
2708 flush_workqueue(priv->workqueue);
2709 free_irq(priv->pci_dev->irq, priv);
2710 pci_disable_msi(priv->pci_dev);
2711 pci_save_state(priv->pci_dev);
2712 pci_disable_device(priv->pci_dev);
948c171c 2713
b481de9c 2714 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2715}
2716
e039fa4a 2717static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2718{
c79dd5b5 2719 struct iwl_priv *priv = hw->priv;
b481de9c 2720
f3674227 2721 IWL_DEBUG_MACDUMP("enter\n");
b481de9c
ZY
2722
2723 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2724 IWL_DEBUG_MAC80211("leave - monitor\n");
6afe6828
ZY
2725 dev_kfree_skb_any(skb);
2726 return 0;
b481de9c
ZY
2727 }
2728
2729 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2730 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2731
e039fa4a 2732 if (iwl_tx_skb(priv, skb))
b481de9c
ZY
2733 dev_kfree_skb_any(skb);
2734
f3674227 2735 IWL_DEBUG_MACDUMP("leave\n");
b481de9c
ZY
2736 return 0;
2737}
2738
bb8c093b 2739static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2740 struct ieee80211_if_init_conf *conf)
2741{
c79dd5b5 2742 struct iwl_priv *priv = hw->priv;
b481de9c 2743 unsigned long flags;
0795af57 2744 DECLARE_MAC_BUF(mac);
b481de9c 2745
32bfd35d 2746 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2747
32bfd35d
JB
2748 if (priv->vif) {
2749 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2750 return -EOPNOTSUPP;
b481de9c
ZY
2751 }
2752
2753 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2754 priv->vif = conf->vif;
b481de9c
ZY
2755
2756 spin_unlock_irqrestore(&priv->lock, flags);
2757
2758 mutex_lock(&priv->mutex);
864792e3
TW
2759
2760 if (conf->mac_addr) {
2761 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
2762 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2763 }
b481de9c 2764
c46fbefa
AK
2765 if (iwl4965_set_mode(priv, conf->type) == -EAGAIN)
2766 /* we are not ready, will run again when ready */
2767 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2768
b481de9c
ZY
2769 mutex_unlock(&priv->mutex);
2770
5a66926a 2771 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2772 return 0;
2773}
2774
2775/**
bb8c093b 2776 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
2777 *
2778 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2779 * be set inappropriately and the driver currently sets the hardware up to
2780 * use it whenever needed.
2781 */
bb8c093b 2782static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 2783{
c79dd5b5 2784 struct iwl_priv *priv = hw->priv;
bf85ea4f 2785 const struct iwl_channel_info *ch_info;
b481de9c 2786 unsigned long flags;
76bb77e0 2787 int ret = 0;
82a66bbb 2788 u16 channel;
b481de9c
ZY
2789
2790 mutex_lock(&priv->mutex);
8318d78a 2791 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2792
14a08a7f 2793 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2794 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2795 goto out;
64e72c3e
MA
2796 }
2797
14a08a7f
EG
2798 if (!conf->radio_enabled)
2799 iwl_radio_kill_sw_disable_radio(priv);
2800
fee1247a 2801 if (!iwl_is_ready(priv)) {
b481de9c 2802 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
2803 ret = -EIO;
2804 goto out;
b481de9c
ZY
2805 }
2806
1ea87396 2807 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2808 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY
2809 IWL_DEBUG_MAC80211("leave - scanning\n");
2810 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 2811 mutex_unlock(&priv->mutex);
a0646470 2812 return 0;
b481de9c
ZY
2813 }
2814
82a66bbb
TW
2815 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2816 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2817 if (!is_channel_valid(ch_info)) {
b481de9c 2818 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY
2819 ret = -EINVAL;
2820 goto out;
b481de9c
ZY
2821 }
2822
398f9e76
AK
2823 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
2824 !is_channel_ibss(ch_info)) {
2825 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2826 conf->channel->hw_value, conf->channel->band);
2827 ret = -EINVAL;
2828 goto out;
2829 }
2830
82a66bbb
TW
2831 spin_lock_irqsave(&priv->lock, flags);
2832
b5d7be5e 2833
78330fdd 2834 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
2835 * from any ht related info since 2.4 does not
2836 * support ht */
82a66bbb 2837 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY
2838#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2839 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2840#endif
2841 )
2842 priv->staging_rxon.flags = 0;
b481de9c 2843
17e72782 2844 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2845
82a66bbb 2846 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
2847
2848 /* The list of supported rates and rate mask can be different
8318d78a 2849 * for each band; since the band may have changed, reset
b481de9c 2850 * the rate mask to what mac80211 lists */
bb8c093b 2851 iwl4965_set_rate(priv);
b481de9c
ZY
2852
2853 spin_unlock_irqrestore(&priv->lock, flags);
2854
2855#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2856 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 2857 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 2858 goto out;
b481de9c
ZY
2859 }
2860#endif
2861
b481de9c
ZY
2862 if (!conf->radio_enabled) {
2863 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2864 goto out;
b481de9c
ZY
2865 }
2866
fee1247a 2867 if (iwl_is_rfkill(priv)) {
b481de9c 2868 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
2869 ret = -EIO;
2870 goto out;
b481de9c
ZY
2871 }
2872
630fe9b6
TW
2873 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2874 priv->tx_power_user_lmt, conf->power_level);
2875
2876 iwl_set_tx_power(priv, conf->power_level, false);
2877
bb8c093b 2878 iwl4965_set_rate(priv);
b481de9c
ZY
2879
2880 if (memcmp(&priv->active_rxon,
2881 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 2882 iwl4965_commit_rxon(priv);
b481de9c
ZY
2883 else
2884 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2885
2886 IWL_DEBUG_MAC80211("leave\n");
2887
a0646470
ZY
2888out:
2889 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 2890 mutex_unlock(&priv->mutex);
76bb77e0 2891 return ret;
b481de9c
ZY
2892}
2893
c79dd5b5 2894static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 2895{
857485c0 2896 int ret = 0;
1ff50bda 2897 unsigned long flags;
b481de9c 2898
d986bcd1 2899 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
2900 return;
2901
2902 /* The following should be done only at AP bring up */
5d1e2325 2903 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
2904
2905 /* RXON - unassoc (to set timing command) */
2906 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2907 iwl4965_commit_rxon(priv);
b481de9c
ZY
2908
2909 /* RXON Timing */
bb8c093b
CH
2910 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2911 iwl4965_setup_rxon_timing(priv);
857485c0 2912 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2913 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2914 if (ret)
b481de9c
ZY
2915 IWL_WARNING("REPLY_RXON_TIMING failed - "
2916 "Attempting to continue.\n");
2917
c7de35cd 2918 iwl_set_rxon_chain(priv);
b481de9c
ZY
2919
2920 /* FIXME: what should be the assoc_id for AP? */
2921 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2922 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2923 priv->staging_rxon.flags |=
2924 RXON_FLG_SHORT_PREAMBLE_MSK;
2925 else
2926 priv->staging_rxon.flags &=
2927 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2928
2929 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2930 if (priv->assoc_capability &
2931 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2932 priv->staging_rxon.flags |=
2933 RXON_FLG_SHORT_SLOT_MSK;
2934 else
2935 priv->staging_rxon.flags &=
2936 ~RXON_FLG_SHORT_SLOT_MSK;
2937
2938 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2939 priv->staging_rxon.flags &=
2940 ~RXON_FLG_SHORT_SLOT_MSK;
2941 }
2942 /* restore RXON assoc */
2943 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 2944 iwl4965_commit_rxon(priv);
1ff50bda
EG
2945 spin_lock_irqsave(&priv->lock, flags);
2946 iwl_activate_qos(priv, 1);
2947 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2948 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2949 }
bb8c093b 2950 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2951
2952 /* FIXME - we need to add code here to detect a totally new
2953 * configuration, reset the AP, unassoc, rxon timing, assoc,
2954 * clear sta table, add BCAST sta... */
2955}
2956
9d139c81
JB
2957/* temporary */
2958static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb);
2959
32bfd35d
JB
2960static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
2961 struct ieee80211_vif *vif,
b481de9c
ZY
2962 struct ieee80211_if_conf *conf)
2963{
c79dd5b5 2964 struct iwl_priv *priv = hw->priv;
0795af57 2965 DECLARE_MAC_BUF(mac);
b481de9c
ZY
2966 unsigned long flags;
2967 int rc;
2968
2969 if (conf == NULL)
2970 return -EIO;
2971
b716bb91
EG
2972 if (priv->vif != vif) {
2973 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
2974 return 0;
2975 }
2976
9d139c81
JB
2977 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
2978 conf->changed & IEEE80211_IFCC_BEACON) {
2979 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2980 if (!beacon)
2981 return -ENOMEM;
2982 rc = iwl4965_mac_beacon_update(hw, beacon);
2983 if (rc)
2984 return rc;
2985 }
2986
b481de9c 2987 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
9d139c81 2988 (!conf->ssid_len)) {
b481de9c
ZY
2989 IWL_DEBUG_MAC80211
2990 ("Leaving in AP mode because HostAPD is not ready.\n");
2991 return 0;
2992 }
2993
fee1247a 2994 if (!iwl_is_alive(priv))
5a66926a
ZY
2995 return -EAGAIN;
2996
b481de9c
ZY
2997 mutex_lock(&priv->mutex);
2998
b481de9c 2999 if (conf->bssid)
0795af57
JP
3000 IWL_DEBUG_MAC80211("bssid: %s\n",
3001 print_mac(mac, conf->bssid));
b481de9c 3002
4150c572
JB
3003/*
3004 * very dubious code was here; the probe filtering flag is never set:
3005 *
b481de9c
ZY
3006 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
3007 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 3008 */
b481de9c
ZY
3009
3010 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
3011 if (!conf->bssid) {
3012 conf->bssid = priv->mac_addr;
3013 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP
3014 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
3015 print_mac(mac, conf->bssid));
b481de9c
ZY
3016 }
3017 if (priv->ibss_beacon)
3018 dev_kfree_skb(priv->ibss_beacon);
3019
9d139c81 3020 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
3021 }
3022
fee1247a 3023 if (iwl_is_rfkill(priv))
fde3571f
MA
3024 goto done;
3025
b481de9c
ZY
3026 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
3027 !is_multicast_ether_addr(conf->bssid)) {
3028 /* If there is currently a HW scan going on in the background
3029 * then we need to cancel it else the RXON below will fail. */
2a421b91 3030 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
3031 IWL_WARNING("Aborted scan still in progress "
3032 "after 100ms\n");
3033 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
3034 mutex_unlock(&priv->mutex);
3035 return -EAGAIN;
3036 }
3037 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
3038
3039 /* TODO: Audit driver for usage of these members and see
3040 * if mac80211 deprecates them (priv->bssid looks like it
3041 * shouldn't be there, but I haven't scanned the IBSS code
3042 * to verify) - jpk */
3043 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
3044
3045 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 3046 iwl4965_config_ap(priv);
b481de9c 3047 else {
bb8c093b 3048 rc = iwl4965_commit_rxon(priv);
b481de9c 3049 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
4f40e4d9 3050 iwl_rxon_add_station(
b481de9c
ZY
3051 priv, priv->active_rxon.bssid_addr, 1);
3052 }
3053
3054 } else {
2a421b91 3055 iwl_scan_cancel_timeout(priv, 100);
b481de9c 3056 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3057 iwl4965_commit_rxon(priv);
b481de9c
ZY
3058 }
3059
fde3571f 3060 done:
b481de9c
ZY
3061 spin_lock_irqsave(&priv->lock, flags);
3062 if (!conf->ssid_len)
3063 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3064 else
3065 memcpy(priv->essid, conf->ssid, conf->ssid_len);
3066
3067 priv->essid_len = conf->ssid_len;
3068 spin_unlock_irqrestore(&priv->lock, flags);
3069
3070 IWL_DEBUG_MAC80211("leave\n");
3071 mutex_unlock(&priv->mutex);
3072
3073 return 0;
3074}
3075
bb8c093b 3076static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
3077 unsigned int changed_flags,
3078 unsigned int *total_flags,
3079 int mc_count, struct dev_addr_list *mc_list)
3080{
4419e39b 3081 struct iwl_priv *priv = hw->priv;
25b3f57c
RF
3082
3083 if (changed_flags & (*total_flags) & FIF_OTHER_BSS) {
3084 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
3085 IEEE80211_IF_TYPE_MNTR,
3086 changed_flags, *total_flags);
3087 /* queue work 'cuz mac80211 is holding a lock which
3088 * prevents us from issuing (synchronous) f/w cmds */
3089 queue_work(priv->workqueue, &priv->set_monitor);
4419e39b 3090 }
25b3f57c
RF
3091 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI |
3092 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4150c572
JB
3093}
3094
bb8c093b 3095static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3096 struct ieee80211_if_init_conf *conf)
3097{
c79dd5b5 3098 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3099
3100 IWL_DEBUG_MAC80211("enter\n");
3101
3102 mutex_lock(&priv->mutex);
948c171c 3103
fee1247a 3104 if (iwl_is_ready_rf(priv)) {
2a421b91 3105 iwl_scan_cancel_timeout(priv, 100);
fde3571f
MA
3106 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3107 iwl4965_commit_rxon(priv);
3108 }
32bfd35d
JB
3109 if (priv->vif == conf->vif) {
3110 priv->vif = NULL;
b481de9c
ZY
3111 memset(priv->bssid, 0, ETH_ALEN);
3112 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3113 priv->essid_len = 0;
3114 }
3115 mutex_unlock(&priv->mutex);
3116
3117 IWL_DEBUG_MAC80211("leave\n");
3118
3119}
471b3efd 3120
3109ece1 3121#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB
3122static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
3123 struct ieee80211_vif *vif,
3124 struct ieee80211_bss_conf *bss_conf,
3125 u32 changes)
220173b0 3126{
c79dd5b5 3127 struct iwl_priv *priv = hw->priv;
220173b0 3128
3109ece1
TW
3129 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
3130
471b3efd 3131 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
3132 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
3133 bss_conf->use_short_preamble);
471b3efd 3134 if (bss_conf->use_short_preamble)
220173b0
TW
3135 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3136 else
3137 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3138 }
3139
471b3efd 3140 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 3141 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 3142 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
3143 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
3144 else
3145 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
3146 }
3147
98952d5d 3148 if (changes & BSS_CHANGED_HT) {
3109ece1 3149 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d 3150 iwl4965_ht_conf(priv, bss_conf);
c7de35cd 3151 iwl_set_rxon_chain(priv);
98952d5d
TW
3152 }
3153
471b3efd 3154 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 3155 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
3156 /* This should never happen as this function should
3157 * never be called from interrupt context. */
3158 if (WARN_ON_ONCE(in_interrupt()))
3159 return;
3109ece1
TW
3160 if (bss_conf->assoc) {
3161 priv->assoc_id = bss_conf->aid;
3162 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 3163 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW
3164 priv->timestamp = bss_conf->timestamp;
3165 priv->assoc_capability = bss_conf->assoc_capability;
3166 priv->next_scan_jiffies = jiffies +
3167 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC
3168 mutex_lock(&priv->mutex);
3169 iwl4965_post_associate(priv);
3170 mutex_unlock(&priv->mutex);
3109ece1
TW
3171 } else {
3172 priv->assoc_id = 0;
3173 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
3174 }
3175 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
3176 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 3177 iwl_send_rxon_assoc(priv);
471b3efd
JB
3178 }
3179
220173b0 3180}
b481de9c 3181
cb43dc25 3182static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len)
b481de9c 3183{
cb43dc25 3184 int ret;
b481de9c 3185 unsigned long flags;
c79dd5b5 3186 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3187
3188 IWL_DEBUG_MAC80211("enter\n");
3189
052c4b9f 3190 mutex_lock(&priv->mutex);
b481de9c
ZY
3191 spin_lock_irqsave(&priv->lock, flags);
3192
fee1247a 3193 if (!iwl_is_ready_rf(priv)) {
cb43dc25 3194 ret = -EIO;
b481de9c
ZY
3195 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
3196 goto out_unlock;
3197 }
3198
3199 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
cb43dc25 3200 ret = -EIO;
b481de9c
ZY
3201 IWL_ERROR("ERROR: APs don't scan\n");
3202 goto out_unlock;
3203 }
3204
7878a5a4
MA
3205 /* we don't schedule scan within next_scan_jiffies period */
3206 if (priv->next_scan_jiffies &&
cb43dc25 3207 time_after(priv->next_scan_jiffies, jiffies)) {
681c0050 3208 IWL_DEBUG_SCAN("scan rejected: within next scan period\n");
cb43dc25 3209 ret = -EAGAIN;
7878a5a4
MA
3210 goto out_unlock;
3211 }
b481de9c 3212 /* if we just finished scan ask for delay */
681c0050 3213 if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
cb43dc25 3214 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
681c0050 3215 IWL_DEBUG_SCAN("scan rejected: within previous scan period\n");
cb43dc25 3216 ret = -EAGAIN;
b481de9c
ZY
3217 goto out_unlock;
3218 }
cb43dc25 3219 if (ssid_len) {
b481de9c 3220 priv->one_direct_scan = 1;
cb43dc25 3221 priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE);
b481de9c 3222 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
cb43dc25 3223 } else {
948c171c 3224 priv->one_direct_scan = 0;
cb43dc25 3225 }
b481de9c 3226
cb43dc25 3227 ret = iwl_scan_initiate(priv);
b481de9c
ZY
3228
3229 IWL_DEBUG_MAC80211("leave\n");
3230
3231out_unlock:
3232 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3233 mutex_unlock(&priv->mutex);
b481de9c 3234
cb43dc25 3235 return ret;
b481de9c
ZY
3236}
3237
ab885f8c
EG
3238static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
3239 struct ieee80211_key_conf *keyconf, const u8 *addr,
3240 u32 iv32, u16 *phase1key)
3241{
3242 struct iwl_priv *priv = hw->priv;
3243 u8 sta_id = IWL_INVALID_STATION;
3244 unsigned long flags;
3245 __le16 key_flags = 0;
3246 int i;
3247 DECLARE_MAC_BUF(mac);
3248
3249 IWL_DEBUG_MAC80211("enter\n");
3250
947b13a7 3251 sta_id = iwl_find_station(priv, addr);
ab885f8c
EG
3252 if (sta_id == IWL_INVALID_STATION) {
3253 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3254 print_mac(mac, addr));
3255 return;
3256 }
3257
2a421b91 3258 iwl_scan_cancel_timeout(priv, 100);
ab885f8c
EG
3259
3260 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
3261 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3262 key_flags &= ~STA_KEY_FLG_INVALID;
3263
5425e490 3264 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG
3265 key_flags |= STA_KEY_MULTICAST_MSK;
3266
3267 spin_lock_irqsave(&priv->sta_lock, flags);
3268
ab885f8c
EG
3269 priv->stations[sta_id].sta.key.key_flags = key_flags;
3270 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
3271
3272 for (i = 0; i < 5; i++)
3273 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3274 cpu_to_le16(phase1key[i]);
3275
3276 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3277 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3278
133636de 3279 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
ab885f8c
EG
3280
3281 spin_unlock_irqrestore(&priv->sta_lock, flags);
3282
3283 IWL_DEBUG_MAC80211("leave\n");
3284}
3285
bb8c093b 3286static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
3287 const u8 *local_addr, const u8 *addr,
3288 struct ieee80211_key_conf *key)
3289{
c79dd5b5 3290 struct iwl_priv *priv = hw->priv;
0795af57 3291 DECLARE_MAC_BUF(mac);
deb09c43
EG
3292 int ret = 0;
3293 u8 sta_id = IWL_INVALID_STATION;
6974e363 3294 u8 is_default_wep_key = 0;
b481de9c
ZY
3295
3296 IWL_DEBUG_MAC80211("enter\n");
3297
099b40b7 3298 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
3299 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3300 return -EOPNOTSUPP;
3301 }
3302
3303 if (is_zero_ether_addr(addr))
3304 /* only support pairwise keys */
3305 return -EOPNOTSUPP;
3306
947b13a7 3307 sta_id = iwl_find_station(priv, addr);
6974e363
EG
3308 if (sta_id == IWL_INVALID_STATION) {
3309 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3310 print_mac(mac, addr));
3311 return -EINVAL;
b481de9c 3312
deb09c43 3313 }
b481de9c 3314
6974e363 3315 mutex_lock(&priv->mutex);
2a421b91 3316 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG
3317 mutex_unlock(&priv->mutex);
3318
3319 /* If we are getting WEP group key and we didn't receive any key mapping
3320 * so far, we are in legacy wep mode (group key only), otherwise we are
3321 * in 1X mode.
3322 * In legacy wep mode, we use another host command to the uCode */
5425e490 3323 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
6974e363
EG
3324 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3325 if (cmd == SET_KEY)
3326 is_default_wep_key = !priv->key_mapping_key;
3327 else
ccc038ab
EG
3328 is_default_wep_key =
3329 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3330 }
052c4b9f 3331
b481de9c 3332 switch (cmd) {
deb09c43 3333 case SET_KEY:
6974e363
EG
3334 if (is_default_wep_key)
3335 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3336 else
7480513f 3337 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
3338
3339 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
3340 break;
3341 case DISABLE_KEY:
6974e363
EG
3342 if (is_default_wep_key)
3343 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3344 else
3ec47732 3345 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
3346
3347 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
3348 break;
3349 default:
deb09c43 3350 ret = -EINVAL;
b481de9c
ZY
3351 }
3352
3353 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3354
deb09c43 3355 return ret;
b481de9c
ZY
3356}
3357
e100bb64 3358static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
3359 const struct ieee80211_tx_queue_params *params)
3360{
c79dd5b5 3361 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3362 unsigned long flags;
3363 int q;
b481de9c
ZY
3364
3365 IWL_DEBUG_MAC80211("enter\n");
3366
fee1247a 3367 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3368 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3369 return -EIO;
3370 }
3371
3372 if (queue >= AC_NUM) {
3373 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3374 return 0;
3375 }
3376
b481de9c
ZY
3377 if (!priv->qos_data.qos_enable) {
3378 priv->qos_data.qos_active = 0;
3379 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
3380 return 0;
3381 }
3382 q = AC_NUM - 1 - queue;
3383
3384 spin_lock_irqsave(&priv->lock, flags);
3385
3386 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3387 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3388 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3389 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3390 cpu_to_le16((params->txop * 32));
b481de9c
ZY
3391
3392 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3393 priv->qos_data.qos_active = 1;
3394
b481de9c 3395 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
1ff50bda 3396 iwl_activate_qos(priv, 1);
3109ece1 3397 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 3398 iwl_activate_qos(priv, 0);
b481de9c 3399
1ff50bda 3400 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3401
b481de9c
ZY
3402 IWL_DEBUG_MAC80211("leave\n");
3403 return 0;
3404}
3405
d783b061
TW
3406static int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3407 enum ieee80211_ampdu_mlme_action action,
3408 const u8 *addr, u16 tid, u16 *ssn)
3409{
3410 struct iwl_priv *priv = hw->priv;
3411 DECLARE_MAC_BUF(mac);
3412
3413 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3414 print_mac(mac, addr), tid);
3415
3416 if (!(priv->cfg->sku & IWL_SKU_N))
3417 return -EACCES;
3418
3419 switch (action) {
3420 case IEEE80211_AMPDU_RX_START:
3421 IWL_DEBUG_HT("start Rx\n");
3422 return iwl_rx_agg_start(priv, addr, tid, *ssn);
3423 case IEEE80211_AMPDU_RX_STOP:
3424 IWL_DEBUG_HT("stop Rx\n");
3425 return iwl_rx_agg_stop(priv, addr, tid);
3426 case IEEE80211_AMPDU_TX_START:
3427 IWL_DEBUG_HT("start Tx\n");
3428 return iwl_tx_agg_start(priv, addr, tid, ssn);
3429 case IEEE80211_AMPDU_TX_STOP:
3430 IWL_DEBUG_HT("stop Tx\n");
3431 return iwl_tx_agg_stop(priv, addr, tid);
3432 default:
3433 IWL_DEBUG_HT("unknown\n");
3434 return -EINVAL;
3435 break;
3436 }
3437 return 0;
3438}
bb8c093b 3439static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3440 struct ieee80211_tx_queue_stats *stats)
3441{
c79dd5b5 3442 struct iwl_priv *priv = hw->priv;
b481de9c 3443 int i, avail;
16466903 3444 struct iwl_tx_queue *txq;
443cfd45 3445 struct iwl_queue *q;
b481de9c
ZY
3446 unsigned long flags;
3447
3448 IWL_DEBUG_MAC80211("enter\n");
3449
fee1247a 3450 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3451 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3452 return -EIO;
3453 }
3454
3455 spin_lock_irqsave(&priv->lock, flags);
3456
3457 for (i = 0; i < AC_NUM; i++) {
3458 txq = &priv->txq[i];
3459 q = &txq->q;
443cfd45 3460 avail = iwl_queue_space(q);
b481de9c 3461
57ffc589
JB
3462 stats[i].len = q->n_window - avail;
3463 stats[i].limit = q->n_window - q->high_mark;
3464 stats[i].count = q->n_window;
b481de9c
ZY
3465
3466 }
3467 spin_unlock_irqrestore(&priv->lock, flags);
3468
3469 IWL_DEBUG_MAC80211("leave\n");
3470
3471 return 0;
3472}
3473
bb8c093b 3474static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3475 struct ieee80211_low_level_stats *stats)
3476{
bf403db8
EK
3477 struct iwl_priv *priv = hw->priv;
3478
3479 priv = hw->priv;
b481de9c
ZY
3480 IWL_DEBUG_MAC80211("enter\n");
3481 IWL_DEBUG_MAC80211("leave\n");
3482
3483 return 0;
3484}
3485
bb8c093b 3486static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3487{
c79dd5b5 3488 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3489 unsigned long flags;
3490
3491 mutex_lock(&priv->mutex);
3492 IWL_DEBUG_MAC80211("enter\n");
3493
b481de9c 3494 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3495 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3496 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3497
c7de35cd 3498 iwl_reset_qos(priv);
b481de9c 3499
b481de9c
ZY
3500 spin_lock_irqsave(&priv->lock, flags);
3501 priv->assoc_id = 0;
3502 priv->assoc_capability = 0;
b481de9c
ZY
3503 priv->assoc_station_added = 0;
3504
3505 /* new association get rid of ibss beacon skb */
3506 if (priv->ibss_beacon)
3507 dev_kfree_skb(priv->ibss_beacon);
3508
3509 priv->ibss_beacon = NULL;
3510
3511 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3512 priv->timestamp = 0;
b481de9c
ZY
3513 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
3514 priv->beacon_int = 0;
3515
3516 spin_unlock_irqrestore(&priv->lock, flags);
3517
fee1247a 3518 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
3519 IWL_DEBUG_MAC80211("leave - not ready\n");
3520 mutex_unlock(&priv->mutex);
3521 return;
3522 }
3523
052c4b9f 3524 /* we are restarting association process
3525 * clear RXON_FILTER_ASSOC_MSK bit
3526 */
3527 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2a421b91 3528 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3529 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3530 iwl4965_commit_rxon(priv);
052c4b9f 3531 }
3532
5da4b55f
MA
3533 iwl_power_update_mode(priv, 0);
3534
b481de9c
ZY
3535 /* Per mac80211.h: This is only used in IBSS mode... */
3536 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 3537
b481de9c
ZY
3538 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3539 mutex_unlock(&priv->mutex);
3540 return;
3541 }
3542
bb8c093b 3543 iwl4965_set_rate(priv);
b481de9c
ZY
3544
3545 mutex_unlock(&priv->mutex);
3546
3547 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
3548}
3549
e039fa4a 3550static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3551{
c79dd5b5 3552 struct iwl_priv *priv = hw->priv;
b481de9c 3553 unsigned long flags;
2ff75b78 3554 __le64 timestamp;
b481de9c
ZY
3555
3556 mutex_lock(&priv->mutex);
3557 IWL_DEBUG_MAC80211("enter\n");
3558
fee1247a 3559 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3560 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3561 mutex_unlock(&priv->mutex);
3562 return -EIO;
3563 }
3564
3565 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
3566 IWL_DEBUG_MAC80211("leave - not IBSS\n");
3567 mutex_unlock(&priv->mutex);
3568 return -EIO;
3569 }
3570
3571 spin_lock_irqsave(&priv->lock, flags);
3572
3573 if (priv->ibss_beacon)
3574 dev_kfree_skb(priv->ibss_beacon);
3575
3576 priv->ibss_beacon = skb;
3577
3578 priv->assoc_id = 0;
2ff75b78
AK
3579 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
3580 priv->timestamp = le64_to_cpu(timestamp) + (priv->beacon_int * 1000);
b481de9c
ZY
3581
3582 IWL_DEBUG_MAC80211("leave\n");
3583 spin_unlock_irqrestore(&priv->lock, flags);
3584
c7de35cd 3585 iwl_reset_qos(priv);
b481de9c 3586
c46fbefa 3587 iwl4965_post_associate(priv);
b481de9c
ZY
3588
3589 mutex_unlock(&priv->mutex);
3590
3591 return 0;
3592}
3593
b481de9c
ZY
3594/*****************************************************************************
3595 *
3596 * sysfs attributes
3597 *
3598 *****************************************************************************/
3599
0a6857e7 3600#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3601
3602/*
3603 * The following adds a new attribute to the sysfs representation
3604 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3605 * used for controlling the debug level.
3606 *
3607 * See the level definitions in iwl for details.
3608 */
3609
8cf769c6
EK
3610static ssize_t show_debug_level(struct device *d,
3611 struct device_attribute *attr, char *buf)
b481de9c 3612{
8cf769c6
EK
3613 struct iwl_priv *priv = d->driver_data;
3614
3615 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3616}
8cf769c6
EK
3617static ssize_t store_debug_level(struct device *d,
3618 struct device_attribute *attr,
b481de9c
ZY
3619 const char *buf, size_t count)
3620{
8cf769c6 3621 struct iwl_priv *priv = d->driver_data;
9257746f
TW
3622 unsigned long val;
3623 int ret;
b481de9c 3624
9257746f
TW
3625 ret = strict_strtoul(buf, 0, &val);
3626 if (ret)
b481de9c
ZY
3627 printk(KERN_INFO DRV_NAME
3628 ": %s is not in hex or decimal form.\n", buf);
3629 else
8cf769c6 3630 priv->debug_level = val;
b481de9c
ZY
3631
3632 return strnlen(buf, count);
3633}
3634
8cf769c6
EK
3635static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3636 show_debug_level, store_debug_level);
3637
b481de9c 3638
0a6857e7 3639#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3640
b481de9c 3641
bc6f59bc
TW
3642static ssize_t show_version(struct device *d,
3643 struct device_attribute *attr, char *buf)
3644{
3645 struct iwl_priv *priv = d->driver_data;
885ba202 3646 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW
3647 ssize_t pos = 0;
3648 u16 eeprom_ver;
bc6f59bc
TW
3649
3650 if (palive->is_valid)
f236a265
TW
3651 pos += sprintf(buf + pos,
3652 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3653 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW
3654 palive->ucode_major, palive->ucode_minor,
3655 palive->sw_rev[0], palive->sw_rev[1],
3656 palive->ver_type, palive->ver_subtype);
bc6f59bc 3657 else
f236a265
TW
3658 pos += sprintf(buf + pos, "fw not loaded\n");
3659
3660 if (priv->eeprom) {
3661 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3662 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3663 eeprom_ver);
3664 } else {
3665 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3666 }
3667
3668 return pos;
bc6f59bc
TW
3669}
3670
3671static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3672
b481de9c
ZY
3673static ssize_t show_temperature(struct device *d,
3674 struct device_attribute *attr, char *buf)
3675{
c79dd5b5 3676 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3677
fee1247a 3678 if (!iwl_is_alive(priv))
b481de9c
ZY
3679 return -EAGAIN;
3680
91dbc5bd 3681 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY
3682}
3683
3684static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3685
b481de9c
ZY
3686static ssize_t show_tx_power(struct device *d,
3687 struct device_attribute *attr, char *buf)
3688{
c79dd5b5 3689 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
630fe9b6 3690 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3691}
3692
3693static ssize_t store_tx_power(struct device *d,
3694 struct device_attribute *attr,
3695 const char *buf, size_t count)
3696{
c79dd5b5 3697 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3698 unsigned long val;
3699 int ret;
b481de9c 3700
9257746f
TW
3701 ret = strict_strtoul(buf, 10, &val);
3702 if (ret)
b481de9c
ZY
3703 printk(KERN_INFO DRV_NAME
3704 ": %s is not in decimal form.\n", buf);
3705 else
630fe9b6 3706 iwl_set_tx_power(priv, val, false);
b481de9c
ZY
3707
3708 return count;
3709}
3710
3711static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3712
3713static ssize_t show_flags(struct device *d,
3714 struct device_attribute *attr, char *buf)
3715{
c79dd5b5 3716 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3717
3718 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3719}
3720
3721static ssize_t store_flags(struct device *d,
3722 struct device_attribute *attr,
3723 const char *buf, size_t count)
3724{
c79dd5b5 3725 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3726 unsigned long val;
3727 u32 flags;
3728 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3729 if (ret)
9257746f
TW
3730 return ret;
3731 flags = (u32)val;
b481de9c
ZY
3732
3733 mutex_lock(&priv->mutex);
3734 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3735 /* Cancel any currently running scans... */
2a421b91 3736 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3737 IWL_WARNING("Could not cancel scan.\n");
3738 else {
9257746f 3739 IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3740 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 3741 iwl4965_commit_rxon(priv);
b481de9c
ZY
3742 }
3743 }
3744 mutex_unlock(&priv->mutex);
3745
3746 return count;
3747}
3748
3749static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3750
3751static ssize_t show_filter_flags(struct device *d,
3752 struct device_attribute *attr, char *buf)
3753{
c79dd5b5 3754 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3755
3756 return sprintf(buf, "0x%04X\n",
3757 le32_to_cpu(priv->active_rxon.filter_flags));
3758}
3759
3760static ssize_t store_filter_flags(struct device *d,
3761 struct device_attribute *attr,
3762 const char *buf, size_t count)
3763{
c79dd5b5 3764 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3765 unsigned long val;
3766 u32 filter_flags;
3767 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3768 if (ret)
9257746f
TW
3769 return ret;
3770 filter_flags = (u32)val;
b481de9c
ZY
3771
3772 mutex_lock(&priv->mutex);
3773 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3774 /* Cancel any currently running scans... */
2a421b91 3775 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3776 IWL_WARNING("Could not cancel scan.\n");
3777 else {
3778 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3779 "0x%04X\n", filter_flags);
3780 priv->staging_rxon.filter_flags =
3781 cpu_to_le32(filter_flags);
bb8c093b 3782 iwl4965_commit_rxon(priv);
b481de9c
ZY
3783 }
3784 }
3785 mutex_unlock(&priv->mutex);
3786
3787 return count;
3788}
3789
3790static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3791 store_filter_flags);
3792
4fc22b21 3793#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
3794
3795static ssize_t show_measurement(struct device *d,
3796 struct device_attribute *attr, char *buf)
3797{
c79dd5b5 3798 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 3799 struct iwl4965_spectrum_notification measure_report;
b481de9c 3800 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 3801 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
3802 unsigned long flags;
3803
3804 spin_lock_irqsave(&priv->lock, flags);
3805 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3806 spin_unlock_irqrestore(&priv->lock, flags);
3807 return 0;
3808 }
3809 memcpy(&measure_report, &priv->measure_report, size);
3810 priv->measurement_status = 0;
3811 spin_unlock_irqrestore(&priv->lock, flags);
3812
3813 while (size && (PAGE_SIZE - len)) {
3814 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3815 PAGE_SIZE - len, 1);
3816 len = strlen(buf);
3817 if (PAGE_SIZE - len)
3818 buf[len++] = '\n';
3819
3820 ofs += 16;
3821 size -= min(size, 16U);
3822 }
3823
3824 return len;
3825}
3826
3827static ssize_t store_measurement(struct device *d,
3828 struct device_attribute *attr,
3829 const char *buf, size_t count)
3830{
c79dd5b5 3831 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3832 struct ieee80211_measurement_params params = {
3833 .channel = le16_to_cpu(priv->active_rxon.channel),
3834 .start_time = cpu_to_le64(priv->last_tsf),
3835 .duration = cpu_to_le16(1),
3836 };
3837 u8 type = IWL_MEASURE_BASIC;
3838 u8 buffer[32];
3839 u8 channel;
3840
3841 if (count) {
3842 char *p = buffer;
3843 strncpy(buffer, buf, min(sizeof(buffer), count));
3844 channel = simple_strtoul(p, NULL, 0);
3845 if (channel)
3846 params.channel = channel;
3847
3848 p = buffer;
3849 while (*p && *p != ' ')
3850 p++;
3851 if (*p)
3852 type = simple_strtoul(p + 1, NULL, 0);
3853 }
3854
3855 IWL_DEBUG_INFO("Invoking measurement of type %d on "
3856 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 3857 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
3858
3859 return count;
3860}
3861
3862static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3863 show_measurement, store_measurement);
4fc22b21 3864#endif /* CONFIG_IWLAGN_SPECTRUM_MEASUREMENT */
b481de9c
ZY
3865
3866static ssize_t store_retry_rate(struct device *d,
3867 struct device_attribute *attr,
3868 const char *buf, size_t count)
3869{
c79dd5b5 3870 struct iwl_priv *priv = dev_get_drvdata(d);
9257746f
TW
3871 long val;
3872 int ret = strict_strtol(buf, 10, &val);
3873 if (!ret)
3874 return ret;
b481de9c 3875
9257746f 3876 priv->retry_rate = (val > 0) ? val : 1;
b481de9c
ZY
3877
3878 return count;
3879}
3880
3881static ssize_t show_retry_rate(struct device *d,
3882 struct device_attribute *attr, char *buf)
3883{
c79dd5b5 3884 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3885 return sprintf(buf, "%d", priv->retry_rate);
3886}
3887
3888static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3889 store_retry_rate);
3890
3891static ssize_t store_power_level(struct device *d,
3892 struct device_attribute *attr,
3893 const char *buf, size_t count)
3894{
c79dd5b5 3895 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3896 int ret;
9257746f
TW
3897 unsigned long mode;
3898
b481de9c 3899
b481de9c
ZY
3900 mutex_lock(&priv->mutex);
3901
fee1247a 3902 if (!iwl_is_ready(priv)) {
298df1f6 3903 ret = -EAGAIN;
b481de9c
ZY
3904 goto out;
3905 }
3906
9257746f 3907 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3908 if (ret)
9257746f
TW
3909 goto out;
3910
298df1f6
EK
3911 ret = iwl_power_set_user_mode(priv, mode);
3912 if (ret) {
5da4b55f
MA
3913 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3914 goto out;
b481de9c 3915 }
298df1f6 3916 ret = count;
b481de9c
ZY
3917
3918 out:
3919 mutex_unlock(&priv->mutex);
298df1f6 3920 return ret;
b481de9c
ZY
3921}
3922
b481de9c
ZY
3923static ssize_t show_power_level(struct device *d,
3924 struct device_attribute *attr, char *buf)
3925{
c79dd5b5 3926 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK
3927 int mode = priv->power_data.user_power_setting;
3928 int system = priv->power_data.system_power_setting;
5da4b55f 3929 int level = priv->power_data.power_mode;
b481de9c
ZY
3930 char *p = buf;
3931
298df1f6
EK
3932 switch (system) {
3933 case IWL_POWER_SYS_AUTO:
3934 p += sprintf(p, "SYSTEM:auto");
b481de9c 3935 break;
298df1f6
EK
3936 case IWL_POWER_SYS_AC:
3937 p += sprintf(p, "SYSTEM:ac");
3938 break;
3939 case IWL_POWER_SYS_BATTERY:
3940 p += sprintf(p, "SYSTEM:battery");
b481de9c 3941 break;
b481de9c 3942 }
298df1f6
EK
3943
3944 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto");
3945 p += sprintf(p, "\tINDEX:%d", level);
3946 p += sprintf(p, "\n");
3ac7f146 3947 return p - buf + 1;
b481de9c
ZY
3948}
3949
3950static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3951 store_power_level);
3952
3953static ssize_t show_channels(struct device *d,
3954 struct device_attribute *attr, char *buf)
3955{
5d72a1f5
EK
3956
3957 struct iwl_priv *priv = dev_get_drvdata(d);
3958 struct ieee80211_channel *channels = NULL;
3959 const struct ieee80211_supported_band *supp_band = NULL;
3960 int len = 0, i;
3961 int count = 0;
3962
3963 if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status))
3964 return -EAGAIN;
3965
3966 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
3967 channels = supp_band->channels;
3968 count = supp_band->n_channels;
3969
3970 len += sprintf(&buf[len],
3971 "Displaying %d channels in 2.4GHz band "
3972 "(802.11bg):\n", count);
3973
3974 for (i = 0; i < count; i++)
3975 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3976 ieee80211_frequency_to_channel(
3977 channels[i].center_freq),
3978 channels[i].max_power,
3979 channels[i].flags & IEEE80211_CHAN_RADAR ?
3980 " (IEEE 802.11h required)" : "",
3981 (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3982 || (channels[i].flags &
3983 IEEE80211_CHAN_RADAR)) ? "" :
3984 ", IBSS",
3985 channels[i].flags &
3986 IEEE80211_CHAN_PASSIVE_SCAN ?
3987 "passive only" : "active/passive");
3988
3989 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
3990 channels = supp_band->channels;
3991 count = supp_band->n_channels;
3992
3993 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
3994 "(802.11a):\n", count);
3995
3996 for (i = 0; i < count; i++)
3997 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3998 ieee80211_frequency_to_channel(
3999 channels[i].center_freq),
4000 channels[i].max_power,
4001 channels[i].flags & IEEE80211_CHAN_RADAR ?
4002 " (IEEE 802.11h required)" : "",
4003 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
4004 || (channels[i].flags &
4005 IEEE80211_CHAN_RADAR)) ? "" :
4006 ", IBSS",
4007 channels[i].flags &
4008 IEEE80211_CHAN_PASSIVE_SCAN ?
4009 "passive only" : "active/passive");
4010
4011 return len;
b481de9c
ZY
4012}
4013
4014static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
4015
4016static ssize_t show_statistics(struct device *d,
4017 struct device_attribute *attr, char *buf)
4018{
c79dd5b5 4019 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 4020 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 4021 u32 len = 0, ofs = 0;
3ac7f146 4022 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY
4023 int rc = 0;
4024
fee1247a 4025 if (!iwl_is_alive(priv))
b481de9c
ZY
4026 return -EAGAIN;
4027
4028 mutex_lock(&priv->mutex);
49ea8596 4029 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
4030 mutex_unlock(&priv->mutex);
4031
4032 if (rc) {
4033 len = sprintf(buf,
4034 "Error sending statistics request: 0x%08X\n", rc);
4035 return len;
4036 }
4037
4038 while (size && (PAGE_SIZE - len)) {
4039 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4040 PAGE_SIZE - len, 1);
4041 len = strlen(buf);
4042 if (PAGE_SIZE - len)
4043 buf[len++] = '\n';
4044
4045 ofs += 16;
4046 size -= min(size, 16U);
4047 }
4048
4049 return len;
4050}
4051
4052static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4053
b481de9c
ZY
4054static ssize_t show_status(struct device *d,
4055 struct device_attribute *attr, char *buf)
4056{
c79dd5b5 4057 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 4058 if (!iwl_is_alive(priv))
b481de9c
ZY
4059 return -EAGAIN;
4060 return sprintf(buf, "0x%08x\n", (int)priv->status);
4061}
4062
4063static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4064
b481de9c
ZY
4065/*****************************************************************************
4066 *
4067 * driver setup and teardown
4068 *
4069 *****************************************************************************/
4070
4e39317d 4071static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
4072{
4073 priv->workqueue = create_workqueue(DRV_NAME);
4074
4075 init_waitqueue_head(&priv->wait_command_queue);
4076
bb8c093b
CH
4077 INIT_WORK(&priv->up, iwl4965_bg_up);
4078 INIT_WORK(&priv->restart, iwl4965_bg_restart);
4079 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
bb8c093b
CH
4080 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
4081 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
4419e39b 4082 INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor);
16e727e8 4083 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW
4084 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
4085 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91
TW
4086
4087 /* FIXME : remove when resolved PENDING */
4088 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
4089 iwl_setup_scan_deferred_work(priv);
bb8c093b 4090
4e39317d
EG
4091 if (priv->cfg->ops->lib->setup_deferred_work)
4092 priv->cfg->ops->lib->setup_deferred_work(priv);
4093
4094 init_timer(&priv->statistics_periodic);
4095 priv->statistics_periodic.data = (unsigned long)priv;
4096 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
b481de9c
ZY
4097
4098 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 4099 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
4100}
4101
4e39317d 4102static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 4103{
4e39317d
EG
4104 if (priv->cfg->ops->lib->cancel_deferred_work)
4105 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 4106
3ae6a054 4107 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
4108 cancel_delayed_work(&priv->scan_check);
4109 cancel_delayed_work(&priv->alive_start);
b481de9c 4110 cancel_work_sync(&priv->beacon_update);
4e39317d 4111 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY
4112}
4113
bb8c093b 4114static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c 4115 &dev_attr_channels.attr,
b481de9c
ZY
4116 &dev_attr_flags.attr,
4117 &dev_attr_filter_flags.attr,
4fc22b21 4118#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
4119 &dev_attr_measurement.attr,
4120#endif
4121 &dev_attr_power_level.attr,
4122 &dev_attr_retry_rate.attr,
b481de9c
ZY
4123 &dev_attr_statistics.attr,
4124 &dev_attr_status.attr,
4125 &dev_attr_temperature.attr,
b481de9c 4126 &dev_attr_tx_power.attr,
8cf769c6
EK
4127#ifdef CONFIG_IWLWIFI_DEBUG
4128 &dev_attr_debug_level.attr,
4129#endif
bc6f59bc 4130 &dev_attr_version.attr,
b481de9c
ZY
4131
4132 NULL
4133};
4134
bb8c093b 4135static struct attribute_group iwl4965_attribute_group = {
b481de9c 4136 .name = NULL, /* put in device directory */
bb8c093b 4137 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
4138};
4139
bb8c093b
CH
4140static struct ieee80211_ops iwl4965_hw_ops = {
4141 .tx = iwl4965_mac_tx,
4142 .start = iwl4965_mac_start,
4143 .stop = iwl4965_mac_stop,
4144 .add_interface = iwl4965_mac_add_interface,
4145 .remove_interface = iwl4965_mac_remove_interface,
4146 .config = iwl4965_mac_config,
4147 .config_interface = iwl4965_mac_config_interface,
4148 .configure_filter = iwl4965_configure_filter,
4149 .set_key = iwl4965_mac_set_key,
ab885f8c 4150 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH
4151 .get_stats = iwl4965_mac_get_stats,
4152 .get_tx_stats = iwl4965_mac_get_tx_stats,
4153 .conf_tx = iwl4965_mac_conf_tx,
bb8c093b 4154 .reset_tsf = iwl4965_mac_reset_tsf,
471b3efd 4155 .bss_info_changed = iwl4965_bss_info_changed,
9ab46173 4156 .ampdu_action = iwl4965_mac_ampdu_action,
cb43dc25 4157 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
4158};
4159
bb8c093b 4160static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
4161{
4162 int err = 0;
c79dd5b5 4163 struct iwl_priv *priv;
b481de9c 4164 struct ieee80211_hw *hw;
82b9a121 4165 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 4166 unsigned long flags;
5a66926a 4167 DECLARE_MAC_BUF(mac);
b481de9c 4168
316c30d9
AK
4169 /************************
4170 * 1. Allocating HW data
4171 ************************/
4172
6440adb5
CB
4173 /* Disabling hardware scan means that mac80211 will perform scans
4174 * "the hard way", rather than using device's scan. */
1ea87396 4175 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK
4176 if (cfg->mod_params->debug & IWL_DL_INFO)
4177 dev_printk(KERN_DEBUG, &(pdev->dev),
4178 "Disabling hw_scan\n");
bb8c093b 4179 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
4180 }
4181
1d0a082d
AK
4182 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
4183 if (!hw) {
b481de9c
ZY
4184 err = -ENOMEM;
4185 goto out;
4186 }
1d0a082d
AK
4187 priv = hw->priv;
4188 /* At this point both hw and priv are allocated. */
4189
b481de9c
ZY
4190 SET_IEEE80211_DEV(hw, &pdev->dev);
4191
4192 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 4193 priv->cfg = cfg;
b481de9c 4194 priv->pci_dev = pdev;
316c30d9 4195
0a6857e7 4196#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 4197 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
4198 atomic_set(&priv->restrict_refcnt, 0);
4199#endif
b481de9c 4200
316c30d9
AK
4201 /**************************
4202 * 2. Initializing PCI bus
4203 **************************/
4204 if (pci_enable_device(pdev)) {
4205 err = -ENODEV;
4206 goto out_ieee80211_free_hw;
4207 }
4208
4209 pci_set_master(pdev);
4210
cc2a8ea8 4211 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
316c30d9 4212 if (!err)
cc2a8ea8
RR
4213 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4214 if (err) {
4215 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4216 if (!err)
4217 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4218 /* both attempts failed: */
316c30d9 4219 if (err) {
cc2a8ea8
RR
4220 printk(KERN_WARNING "%s: No suitable DMA available.\n",
4221 DRV_NAME);
316c30d9 4222 goto out_pci_disable_device;
cc2a8ea8 4223 }
316c30d9
AK
4224 }
4225
4226 err = pci_request_regions(pdev, DRV_NAME);
4227 if (err)
4228 goto out_pci_disable_device;
4229
4230 pci_set_drvdata(pdev, priv);
4231
4232 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4233 * PCI Tx retries from interfering with C3 CPU state */
4234 pci_write_config_byte(pdev, 0x41, 0x00);
4235
4236 /***********************
4237 * 3. Read REV register
4238 ***********************/
4239 priv->hw_base = pci_iomap(pdev, 0, 0);
4240 if (!priv->hw_base) {
4241 err = -ENODEV;
4242 goto out_pci_release_regions;
4243 }
4244
4245 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
4246 (unsigned long long) pci_resource_len(pdev, 0));
4247 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
4248
b661c819 4249 iwl_hw_detect(priv);
316c30d9 4250 printk(KERN_INFO DRV_NAME
b661c819
TW
4251 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
4252 priv->cfg->name, priv->hw_rev);
316c30d9 4253
91238714
TW
4254 /* amp init */
4255 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 4256 if (err < 0) {
91238714 4257 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK
4258 goto out_iounmap;
4259 }
91238714
TW
4260 /*****************
4261 * 4. Read EEPROM
4262 *****************/
316c30d9
AK
4263 /* Read the EEPROM */
4264 err = iwl_eeprom_init(priv);
4265 if (err) {
4266 IWL_ERROR("Unable to init EEPROM\n");
4267 goto out_iounmap;
4268 }
8614f360
TW
4269 err = iwl_eeprom_check_version(priv);
4270 if (err)
4271 goto out_iounmap;
4272
02883017 4273 /* extract MAC Address */
316c30d9
AK
4274 iwl_eeprom_get_mac(priv, priv->mac_addr);
4275 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
4276 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4277
4278 /************************
4279 * 5. Setup HW constants
4280 ************************/
da154e30 4281 if (iwl_set_hw_params(priv)) {
5425e490 4282 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 4283 goto out_free_eeprom;
316c30d9
AK
4284 }
4285
4286 /*******************
6ba87956 4287 * 6. Setup priv
316c30d9 4288 *******************/
b481de9c 4289
6ba87956 4290 err = iwl_init_drv(priv);
bf85ea4f 4291 if (err)
399f4900 4292 goto out_free_eeprom;
bf85ea4f 4293 /* At this point both hw and priv are initialized. */
316c30d9
AK
4294
4295 /**********************************
4296 * 7. Initialize module parameters
4297 **********************************/
4298
4299 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 4300 if (priv->cfg->mod_params->disable) {
316c30d9
AK
4301 set_bit(STATUS_RF_KILL_SW, &priv->status);
4302 IWL_DEBUG_INFO("Radio disabled.\n");
4303 }
4304
316c30d9
AK
4305 /********************
4306 * 8. Setup services
4307 ********************/
0359facc 4308 spin_lock_irqsave(&priv->lock, flags);
316c30d9 4309 iwl4965_disable_interrupts(priv);
0359facc 4310 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK
4311
4312 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4313 if (err) {
4314 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 4315 goto out_uninit_drv;
316c30d9
AK
4316 }
4317
316c30d9 4318
4e39317d 4319 iwl_setup_deferred_work(priv);
653fa4a0 4320 iwl_setup_rx_handlers(priv);
316c30d9
AK
4321
4322 /********************
4323 * 9. Conclude
4324 ********************/
5a66926a
ZY
4325 pci_save_state(pdev);
4326 pci_disable_device(pdev);
b481de9c 4327
6ba87956
TW
4328 /**********************************
4329 * 10. Setup and register mac80211
4330 **********************************/
4331
4332 err = iwl_setup_mac(priv);
4333 if (err)
4334 goto out_remove_sysfs;
4335
4336 err = iwl_dbgfs_register(priv, DRV_NAME);
4337 if (err)
4338 IWL_ERROR("failed to create debugfs files\n");
4339
58d0f361
EG
4340 err = iwl_rfkill_init(priv);
4341 if (err)
4342 IWL_ERROR("Unable to initialize RFKILL system. "
4343 "Ignoring error: %d\n", err);
4344 iwl_power_initialize(priv);
b481de9c
ZY
4345 return 0;
4346
316c30d9
AK
4347 out_remove_sysfs:
4348 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
6ba87956
TW
4349 out_uninit_drv:
4350 iwl_uninit_drv(priv);
073d3f5f
TW
4351 out_free_eeprom:
4352 iwl_eeprom_free(priv);
b481de9c
ZY
4353 out_iounmap:
4354 pci_iounmap(pdev, priv->hw_base);
4355 out_pci_release_regions:
4356 pci_release_regions(pdev);
316c30d9 4357 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
4358 out_pci_disable_device:
4359 pci_disable_device(pdev);
b481de9c
ZY
4360 out_ieee80211_free_hw:
4361 ieee80211_free_hw(priv->hw);
4362 out:
4363 return err;
4364}
4365
c83dbf68 4366static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 4367{
c79dd5b5 4368 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4369 unsigned long flags;
b481de9c
ZY
4370
4371 if (!priv)
4372 return;
4373
4374 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
4375
67249625
EG
4376 iwl_dbgfs_unregister(priv);
4377 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4378
c4f55232
RR
4379 if (priv->mac80211_registered) {
4380 ieee80211_unregister_hw(priv->hw);
4381 priv->mac80211_registered = 0;
4382 }
4383
b481de9c 4384 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 4385
bb8c093b 4386 iwl4965_down(priv);
b481de9c 4387
0359facc
MA
4388 /* make sure we flush any pending irq or
4389 * tasklet for the driver
4390 */
4391 spin_lock_irqsave(&priv->lock, flags);
4392 iwl4965_disable_interrupts(priv);
4393 spin_unlock_irqrestore(&priv->lock, flags);
4394
4395 iwl_synchronize_irq(priv);
4396
58d0f361 4397 iwl_rfkill_unregister(priv);
bb8c093b 4398 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
4399
4400 if (priv->rxq.bd)
a55360e4 4401 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 4402 iwl_hw_txq_ctx_free(priv);
b481de9c 4403
37deb2a0 4404 iwl_clear_stations_table(priv);
073d3f5f 4405 iwl_eeprom_free(priv);
b481de9c 4406
b481de9c 4407
948c171c
MA
4408 /*netif_stop_queue(dev); */
4409 flush_workqueue(priv->workqueue);
4410
bb8c093b 4411 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
4412 * priv->workqueue... so we can't take down the workqueue
4413 * until now... */
4414 destroy_workqueue(priv->workqueue);
4415 priv->workqueue = NULL;
4416
b481de9c
ZY
4417 pci_iounmap(pdev, priv->hw_base);
4418 pci_release_regions(pdev);
4419 pci_disable_device(pdev);
4420 pci_set_drvdata(pdev, NULL);
4421
6ba87956 4422 iwl_uninit_drv(priv);
b481de9c
ZY
4423
4424 if (priv->ibss_beacon)
4425 dev_kfree_skb(priv->ibss_beacon);
4426
4427 ieee80211_free_hw(priv->hw);
4428}
4429
4430#ifdef CONFIG_PM
4431
bb8c093b 4432static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 4433{
c79dd5b5 4434 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4435
e655b9f0
ZY
4436 if (priv->is_open) {
4437 set_bit(STATUS_IN_SUSPEND, &priv->status);
4438 iwl4965_mac_stop(priv->hw);
4439 priv->is_open = 1;
4440 }
b481de9c 4441
b481de9c
ZY
4442 pci_set_power_state(pdev, PCI_D3hot);
4443
b481de9c
ZY
4444 return 0;
4445}
4446
bb8c093b 4447static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 4448{
c79dd5b5 4449 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4450
b481de9c 4451 pci_set_power_state(pdev, PCI_D0);
b481de9c 4452
e655b9f0
ZY
4453 if (priv->is_open)
4454 iwl4965_mac_start(priv->hw);
b481de9c 4455
e655b9f0 4456 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
4457 return 0;
4458}
4459
4460#endif /* CONFIG_PM */
4461
4462/*****************************************************************************
4463 *
4464 * driver and module entry point
4465 *
4466 *****************************************************************************/
4467
fed9017e
RR
4468/* Hardware specific file defines the PCI IDs table for that hardware module */
4469static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 4470#ifdef CONFIG_IWL4965
fed9017e
RR
4471 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4472 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 4473#endif /* CONFIG_IWL4965 */
5a6a256e 4474#ifdef CONFIG_IWL5000
47408639
EK
4475 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
4476 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
4477 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
4478 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
4479 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
4480 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 4481 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK
4482 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4483 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
4484 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
5a6a256e
TW
4485 {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)},
4486#endif /* CONFIG_IWL5000 */
fed9017e
RR
4487 {0}
4488};
4489MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4490
4491static struct pci_driver iwl_driver = {
b481de9c 4492 .name = DRV_NAME,
fed9017e 4493 .id_table = iwl_hw_card_ids,
bb8c093b
CH
4494 .probe = iwl4965_pci_probe,
4495 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 4496#ifdef CONFIG_PM
bb8c093b
CH
4497 .suspend = iwl4965_pci_suspend,
4498 .resume = iwl4965_pci_resume,
b481de9c
ZY
4499#endif
4500};
4501
bb8c093b 4502static int __init iwl4965_init(void)
b481de9c
ZY
4503{
4504
4505 int ret;
4506 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4507 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 4508
e227ceac 4509 ret = iwlagn_rate_control_register();
897e1cf2
RC
4510 if (ret) {
4511 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4512 return ret;
4513 }
4514
fed9017e 4515 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
4516 if (ret) {
4517 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4518 goto error_register;
b481de9c 4519 }
b481de9c
ZY
4520
4521 return ret;
897e1cf2 4522
897e1cf2 4523error_register:
e227ceac 4524 iwlagn_rate_control_unregister();
897e1cf2 4525 return ret;
b481de9c
ZY
4526}
4527
bb8c093b 4528static void __exit iwl4965_exit(void)
b481de9c 4529{
fed9017e 4530 pci_unregister_driver(&iwl_driver);
e227ceac 4531 iwlagn_rate_control_unregister();
b481de9c
ZY
4532}
4533
bb8c093b
CH
4534module_exit(iwl4965_exit);
4535module_init(iwl4965_init);
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