iwlwifi: call apm stop on exit
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
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43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
6bc913bd 47#include "iwl-eeprom.h"
3e0d4cb1 48#include "iwl-dev.h"
fee1247a 49#include "iwl-core.h"
3395f6e9 50#include "iwl-io.h"
b481de9c 51#include "iwl-helpers.h"
6974e363 52#include "iwl-sta.h"
f0832f13 53#include "iwl-calib.h"
b481de9c 54
416e1438 55
b481de9c
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56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
b481de9c
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62/*
63 * module name, copyright, version, etc.
64 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
65 */
66
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
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70#define VD "d"
71#else
72#define VD
73#endif
74
4fc22b21 75#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
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76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
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83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
86MODULE_AUTHOR(DRV_COPYRIGHT);
87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
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92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
deb09c43
EG
99static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG
102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
bb8c093b 111 * iwl4965_check_rxon_cmd - validate RXON structure is valid
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112 *
113 * NOTE: This is really only useful during development and can eventually
114 * be #ifdef'd out once the driver is stable and folks aren't actively
115 * making changes
116 */
c1adf9fb 117static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
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118{
119 int error = 0;
120 int counter = 1;
121
122 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
123 error |= le32_to_cpu(rxon->flags &
124 (RXON_FLG_TGJ_NARROW_BAND_MSK |
125 RXON_FLG_RADAR_DETECT_MSK));
126 if (error)
127 IWL_WARNING("check 24G fields %d | %d\n",
128 counter++, error);
129 } else {
130 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
131 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
132 if (error)
133 IWL_WARNING("check 52 fields %d | %d\n",
134 counter++, error);
135 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
136 if (error)
137 IWL_WARNING("check 52 CCK %d | %d\n",
138 counter++, error);
139 }
140 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
141 if (error)
142 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
143
144 /* make sure basic rates 6Mbps and 1Mbps are supported */
145 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
146 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
147 if (error)
148 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
149
150 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
151 if (error)
152 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
153
154 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
155 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
156 if (error)
157 IWL_WARNING("check CCK and short slot %d | %d\n",
158 counter++, error);
159
160 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
161 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
162 if (error)
163 IWL_WARNING("check CCK & auto detect %d | %d\n",
164 counter++, error);
165
166 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
167 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
168 if (error)
169 IWL_WARNING("check TGG and auto detect %d | %d\n",
170 counter++, error);
171
172 if (error)
173 IWL_WARNING("Tuning to channel %d\n",
174 le16_to_cpu(rxon->channel));
175
176 if (error) {
bb8c093b 177 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
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178 return -1;
179 }
180 return 0;
181}
182
183/**
54559703 184 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 185 * @priv: staging_rxon is compared to active_rxon
b481de9c 186 *
9fbab516
BC
187 * If the RXON structure is changing enough to require a new tune,
188 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
189 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 190 */
54559703 191static int iwl_full_rxon_required(struct iwl_priv *priv)
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192{
193
194 /* These items are only settable from the full RXON command */
5d1e2325 195 if (!(iwl_is_associated(priv)) ||
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196 compare_ether_addr(priv->staging_rxon.bssid_addr,
197 priv->active_rxon.bssid_addr) ||
198 compare_ether_addr(priv->staging_rxon.node_addr,
199 priv->active_rxon.node_addr) ||
200 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
201 priv->active_rxon.wlap_bssid_addr) ||
202 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
203 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
204 (priv->staging_rxon.air_propagation !=
205 priv->active_rxon.air_propagation) ||
206 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
207 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
208 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
209 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
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210 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
211 return 1;
212
213 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
214 * be updated with the RXON_ASSOC command -- however only some
215 * flag transitions are allowed using RXON_ASSOC */
216
217 /* Check if we are not switching bands */
218 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
219 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
220 return 1;
221
222 /* Check if we are switching association toggle */
223 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
224 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
225 return 1;
226
227 return 0;
228}
229
b481de9c 230/**
bb8c093b 231 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 232 *
01ebd063 233 * The RXON command in staging_rxon is committed to the hardware and
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234 * the active_rxon structure is updated with the new data. This
235 * function correctly transitions out of the RXON_ASSOC_MSK state if
236 * a HW tune is required based on the RXON structure changes.
237 */
c79dd5b5 238static int iwl4965_commit_rxon(struct iwl_priv *priv)
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239{
240 /* cast away the const for active_rxon in this function */
c1adf9fb 241 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 242 DECLARE_MAC_BUF(mac);
43d59b32
EG
243 int ret;
244 bool new_assoc =
245 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 246
fee1247a 247 if (!iwl_is_alive(priv))
43d59b32 248 return -EBUSY;
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249
250 /* always get timestamp with Rx frame */
251 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG
252 /* allow CTS-to-self if possible. this is relevant only for
253 * 5000, but will not damage 4965 */
254 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 255
43d59b32
EG
256 ret = iwl4965_check_rxon_cmd(&priv->staging_rxon);
257 if (ret) {
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258 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
259 return -EINVAL;
260 }
261
262 /* If we don't need to send a full RXON, we can use
bb8c093b 263 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 264 * and other flags for the current radio configuration. */
54559703 265 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG
266 ret = iwl_send_rxon_assoc(priv);
267 if (ret) {
268 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
269 return ret;
b481de9c
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270 }
271
272 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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273 return 0;
274 }
275
276 /* station table will be cleared */
277 priv->assoc_station_added = 0;
278
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279 /* If we are currently associated and the new config requires
280 * an RXON_ASSOC and the new config wants the associated mask enabled,
281 * we must clear the associated from the active configuration
282 * before we apply the new config */
43d59b32 283 if (iwl_is_associated(priv) && new_assoc) {
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284 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
285 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
286
43d59b32 287 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 288 sizeof(struct iwl_rxon_cmd),
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289 &priv->active_rxon);
290
291 /* If the mask clearing failed then we set
292 * active_rxon back to what it was previously */
43d59b32 293 if (ret) {
b481de9c 294 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG
295 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
296 return ret;
b481de9c 297 }
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298 }
299
300 IWL_DEBUG_INFO("Sending RXON\n"
301 "* with%s RXON_FILTER_ASSOC_MSK\n"
302 "* channel = %d\n"
0795af57 303 "* bssid = %s\n",
43d59b32 304 (new_assoc ? "" : "out"),
b481de9c 305 le16_to_cpu(priv->staging_rxon.channel),
0795af57 306 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 307
099b40b7 308 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG
309
310 /* Apply the new configuration
311 * RXON unassoc clears the station table in uCode, send it before
312 * we add the bcast station. If assoc bit is set, we will send RXON
313 * after having added the bcast and bssid station.
314 */
315 if (!new_assoc) {
316 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 317 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG
318 if (ret) {
319 IWL_ERROR("Error setting new RXON (%d)\n", ret);
320 return ret;
321 }
322 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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323 }
324
37deb2a0 325 iwl_clear_stations_table(priv);
556f8db7 326
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327 if (!priv->error_recovering)
328 priv->start_calib = 0;
329
b481de9c 330 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 331 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 332 IWL_INVALID_STATION) {
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333 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
334 return -EIO;
335 }
336
337 /* If we have set the ASSOC_MSK and we are in BSS mode then
338 * add the IWL_AP_ID to the station rate table */
9185159d
TW
339 if (new_assoc) {
340 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
341 ret = iwl_rxon_add_station(priv,
342 priv->active_rxon.bssid_addr, 1);
343 if (ret == IWL_INVALID_STATION) {
344 IWL_ERROR("Error adding AP address for TX.\n");
345 return -EIO;
346 }
347 priv->assoc_station_added = 1;
348 if (priv->default_wep_key &&
349 iwl_send_static_wepkey_cmd(priv, 0))
350 IWL_ERROR("Could not send WEP static key.\n");
b481de9c 351 }
43d59b32
EG
352
353 /* Apply the new configuration
354 * RXON assoc doesn't clear the station table in uCode,
355 */
356 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
357 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
358 if (ret) {
359 IWL_ERROR("Error setting new RXON (%d)\n", ret);
360 return ret;
361 }
362 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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363 }
364
36da7d70
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365 iwl_init_sensitivity(priv);
366
367 /* If we issue a new RXON command which required a tune then we must
368 * send a new TXPOWER command or we won't be able to Tx any frames */
369 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
370 if (ret) {
371 IWL_ERROR("Error sending TX power (%d)\n", ret);
372 return ret;
373 }
374
b481de9c
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375 return 0;
376}
377
5da4b55f
MA
378void iwl4965_update_chain_flags(struct iwl_priv *priv)
379{
380
c7de35cd 381 iwl_set_rxon_chain(priv);
5da4b55f
MA
382 iwl4965_commit_rxon(priv);
383}
384
c79dd5b5 385static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 386{
bb8c093b 387 struct iwl4965_bt_cmd bt_cmd = {
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388 .flags = 3,
389 .lead_time = 0xAA,
390 .max_kill = 1,
391 .kill_ack_mask = 0,
392 .kill_cts_mask = 0,
393 };
394
857485c0 395 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 396 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
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397}
398
fcab423d 399static void iwl_clear_free_frames(struct iwl_priv *priv)
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400{
401 struct list_head *element;
402
403 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
404 priv->frames_count);
405
406 while (!list_empty(&priv->free_frames)) {
407 element = priv->free_frames.next;
408 list_del(element);
fcab423d 409 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
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410 priv->frames_count--;
411 }
412
413 if (priv->frames_count) {
414 IWL_WARNING("%d frames still in use. Did we lose one?\n",
415 priv->frames_count);
416 priv->frames_count = 0;
417 }
418}
419
fcab423d 420static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 421{
fcab423d 422 struct iwl_frame *frame;
b481de9c
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423 struct list_head *element;
424 if (list_empty(&priv->free_frames)) {
425 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
426 if (!frame) {
427 IWL_ERROR("Could not allocate frame!\n");
428 return NULL;
429 }
430
431 priv->frames_count++;
432 return frame;
433 }
434
435 element = priv->free_frames.next;
436 list_del(element);
fcab423d 437 return list_entry(element, struct iwl_frame, list);
b481de9c
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438}
439
fcab423d 440static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
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441{
442 memset(frame, 0, sizeof(*frame));
443 list_add(&frame->list, &priv->free_frames);
444}
445
4bf64efd
TW
446static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
447 struct ieee80211_hdr *hdr,
448 const u8 *dest, int left)
b481de9c 449{
3109ece1 450 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
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451 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
452 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
453 return 0;
454
455 if (priv->ibss_beacon->len > left)
456 return 0;
457
458 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
459
460 return priv->ibss_beacon->len;
461}
462
39e88504 463static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 464{
39e88504
GC
465 int i;
466 int rate_mask;
467
468 /* Set rate mask*/
469 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
470 rate_mask = priv->active_rate_basic & 0xF;
471 else
472 rate_mask = priv->active_rate_basic & 0xFF0;
b481de9c 473
39e88504 474 /* Find lowest valid rate */
b481de9c 475 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 476 i = iwl_rates[i].next_ieee) {
b481de9c 477 if (rate_mask & (1 << i))
1826dcc0 478 return iwl_rates[i].plcp;
b481de9c
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479 }
480
39e88504
GC
481 /* No valid rate was found. Assign the lowest one */
482 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
483 return IWL_RATE_1M_PLCP;
484 else
485 return IWL_RATE_6M_PLCP;
b481de9c
ZY
486}
487
4bf64efd
TW
488unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
489 struct iwl_frame *frame, u8 rate)
490{
491 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
492 unsigned int frame_size;
493
494 tx_beacon_cmd = &frame->u.beacon;
495 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
496
497 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
498 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
499
500 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
501 iwl_bcast_addr,
502 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
503
504 BUG_ON(frame_size > MAX_MPDU_SIZE);
505 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
506
507 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
508 tx_beacon_cmd->tx.rate_n_flags =
509 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
510 else
511 tx_beacon_cmd->tx.rate_n_flags =
512 iwl_hw_set_rate_n_flags(rate, 0);
513
514 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
515 TX_CMD_FLG_TSF_MSK |
516 TX_CMD_FLG_STA_RATE_MSK;
517
518 return sizeof(*tx_beacon_cmd) + frame_size;
519}
c79dd5b5 520static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 521{
fcab423d 522 struct iwl_frame *frame;
b481de9c
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523 unsigned int frame_size;
524 int rc;
525 u8 rate;
526
fcab423d 527 frame = iwl_get_free_frame(priv);
b481de9c
ZY
528
529 if (!frame) {
530 IWL_ERROR("Could not obtain free frame buffer for beacon "
531 "command.\n");
532 return -ENOMEM;
533 }
534
39e88504 535 rate = iwl4965_rate_get_lowest_plcp(priv);
b481de9c 536
bb8c093b 537 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 538
857485c0 539 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
540 &frame->u.cmd[0]);
541
fcab423d 542 iwl_free_frame(priv, frame);
b481de9c
ZY
543
544 return rc;
545}
546
b481de9c
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547/******************************************************************************
548 *
549 * Misc. internal state and helper functions
550 *
551 ******************************************************************************/
b481de9c 552
d1141dfb
EG
553static void iwl4965_ht_conf(struct iwl_priv *priv,
554 struct ieee80211_bss_conf *bss_conf)
555{
556 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
557 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
558 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
559
560 IWL_DEBUG_MAC80211("enter: \n");
561
562 iwl_conf->is_ht = bss_conf->assoc_ht;
563
564 if (!iwl_conf->is_ht)
565 return;
566
567 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
568
569 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 570 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 571 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 572 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG
573
574 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
575 iwl_conf->max_amsdu_size =
576 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
577
578 iwl_conf->supported_chan_width =
579 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
580 iwl_conf->extension_chan_offset =
581 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
582 /* If no above or below channel supplied disable FAT channel */
963f5517
EG
583 if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE &&
584 iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) {
585 iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE;
d1141dfb 586 iwl_conf->supported_chan_width = 0;
963f5517 587 }
d1141dfb 588
d1141dfb
EG
589 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
590
591 iwl_conf->control_channel = ht_bss_conf->primary_channel;
592 iwl_conf->tx_chan_width =
593 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
594 iwl_conf->ht_protection =
595 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
596 iwl_conf->non_GF_STA_present =
597 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
598
599 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
600 IWL_DEBUG_MAC80211("leave\n");
601}
602
b481de9c
ZY
603/*
604 * QoS support
605*/
1ff50bda 606static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 607{
b481de9c
ZY
608 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
609 return;
610
611 if (!priv->qos_data.qos_enable)
612 return;
613
b481de9c
ZY
614 priv->qos_data.def_qos_parm.qos_flags = 0;
615
616 if (priv->qos_data.qos_cap.q_AP.queue_request &&
617 !priv->qos_data.qos_cap.q_AP.txop_request)
618 priv->qos_data.def_qos_parm.qos_flags |=
619 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
620 if (priv->qos_data.qos_active)
621 priv->qos_data.def_qos_parm.qos_flags |=
622 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
623
fd105e79 624 if (priv->current_ht_config.is_ht)
f1f1f5c7 625 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 626
3109ece1 627 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
628 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
629 priv->qos_data.qos_active,
630 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 631
1ff50bda
EG
632 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
633 sizeof(struct iwl_qosparam_cmd),
634 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY
635 }
636}
637
b481de9c 638#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 639
bb8c093b 640static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
641{
642 u16 new_val = 0;
643 u16 beacon_factor = 0;
644
645 beacon_factor =
646 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
647 / MAX_UCODE_BEACON_INTERVAL;
648 new_val = beacon_val / beacon_factor;
649
650 return cpu_to_le16(new_val);
651}
652
c79dd5b5 653static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
654{
655 u64 interval_tm_unit;
656 u64 tsf, result;
657 unsigned long flags;
658 struct ieee80211_conf *conf = NULL;
659 u16 beacon_int = 0;
660
661 conf = ieee80211_get_hw_conf(priv->hw);
662
663 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW
664 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
665 priv->rxon_timing.timestamp.dw[0] =
666 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c 667
b5d7be5e 668 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 669
3109ece1 670 tsf = priv->timestamp;
b481de9c
ZY
671
672 beacon_int = priv->beacon_int;
673 spin_unlock_irqrestore(&priv->lock, flags);
674
675 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
676 if (beacon_int == 0) {
677 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
678 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
679 } else {
680 priv->rxon_timing.beacon_interval =
681 cpu_to_le16(beacon_int);
682 priv->rxon_timing.beacon_interval =
bb8c093b 683 iwl4965_adjust_beacon_interval(
b481de9c
ZY
684 le16_to_cpu(priv->rxon_timing.beacon_interval));
685 }
686
687 priv->rxon_timing.atim_window = 0;
688 } else {
689 priv->rxon_timing.beacon_interval =
bb8c093b 690 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
691 /* TODO: we need to get atim_window from upper stack
692 * for now we set to 0 */
693 priv->rxon_timing.atim_window = 0;
694 }
695
696 interval_tm_unit =
697 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
698 result = do_div(tsf, interval_tm_unit);
699 priv->rxon_timing.beacon_init_val =
700 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
701
702 IWL_DEBUG_ASSOC
703 ("beacon interval %d beacon timer %d beacon tim %d\n",
704 le16_to_cpu(priv->rxon_timing.beacon_interval),
705 le32_to_cpu(priv->rxon_timing.beacon_init_val),
706 le16_to_cpu(priv->rxon_timing.atim_window));
707}
708
82a66bbb
TW
709static void iwl_set_flags_for_band(struct iwl_priv *priv,
710 enum ieee80211_band band)
b481de9c 711{
8318d78a 712 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
713 priv->staging_rxon.flags &=
714 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
715 | RXON_FLG_CCK_MSK);
716 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
717 } else {
508e32e1 718 /* Copied from iwl4965_post_associate() */
b481de9c
ZY
719 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
720 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
721 else
722 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
723
724 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
725 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
726
727 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
728 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
729 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
730 }
731}
732
733/*
01ebd063 734 * initialize rxon structure with default values from eeprom
b481de9c 735 */
c79dd5b5 736static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 737{
bf85ea4f 738 const struct iwl_channel_info *ch_info;
b481de9c
ZY
739
740 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
741
742 switch (priv->iw_mode) {
743 case IEEE80211_IF_TYPE_AP:
744 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
745 break;
746
747 case IEEE80211_IF_TYPE_STA:
748 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
749 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
750 break;
751
752 case IEEE80211_IF_TYPE_IBSS:
753 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
754 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
755 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
756 RXON_FILTER_ACCEPT_GRP_MSK;
757 break;
758
759 case IEEE80211_IF_TYPE_MNTR:
760 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
761 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
762 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
763 break;
69dc5d9d
TW
764 default:
765 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
766 break;
b481de9c
ZY
767 }
768
769#if 0
770 /* TODO: Figure out when short_preamble would be set and cache from
771 * that */
772 if (!hw_to_local(priv->hw)->short_preamble)
773 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
774 else
775 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
776#endif
777
8622e705 778 ch_info = iwl_get_channel_info(priv, priv->band,
25b3f57c 779 le16_to_cpu(priv->active_rxon.channel));
b481de9c
ZY
780
781 if (!ch_info)
782 ch_info = &priv->channel_info[0];
783
784 /*
785 * in some case A channels are all non IBSS
786 * in this case force B/G channel
787 */
788 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
789 !(is_channel_ibss(ch_info)))
790 ch_info = &priv->channel_info[0];
791
792 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 793 priv->band = ch_info->band;
b481de9c 794
82a66bbb 795 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY
796
797 priv->staging_rxon.ofdm_basic_rates =
798 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
799 priv->staging_rxon.cck_basic_rates =
800 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
801
802 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
803 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
804 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
805 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
806 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
807 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 808 iwl_set_rxon_chain(priv);
b481de9c
ZY
809}
810
c79dd5b5 811static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 812{
b481de9c
ZY
813 priv->iw_mode = mode;
814
bb8c093b 815 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
816 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
817
37deb2a0 818 iwl_clear_stations_table(priv);
b481de9c 819
fde3571f 820 /* dont commit rxon if rf-kill is on*/
fee1247a 821 if (!iwl_is_ready_rf(priv))
fde3571f
MA
822 return -EAGAIN;
823
824 cancel_delayed_work(&priv->scan_check);
2a421b91 825 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA
826 IWL_WARNING("Aborted scan still in progress after 100ms\n");
827 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
828 return -EAGAIN;
829 }
830
bb8c093b 831 iwl4965_commit_rxon(priv);
b481de9c
ZY
832
833 return 0;
834}
835
c79dd5b5 836static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 837{
8318d78a 838 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
839 struct ieee80211_rate *rate;
840 int i;
841
d1141dfb 842 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
843 if (!hw) {
844 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
845 return;
846 }
b481de9c
ZY
847
848 priv->active_rate = 0;
849 priv->active_rate_basic = 0;
850
8318d78a
JB
851 for (i = 0; i < hw->n_bitrates; i++) {
852 rate = &(hw->bitrates[i]);
853 if (rate->hw_value < IWL_RATE_COUNT)
854 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
855 }
856
857 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
858 priv->active_rate, priv->active_rate_basic);
859
860 /*
861 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
862 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
863 * OFDM
864 */
865 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
866 priv->staging_rxon.cck_basic_rates =
867 ((priv->active_rate_basic &
868 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
869 else
870 priv->staging_rxon.cck_basic_rates =
871 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
872
873 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
874 priv->staging_rxon.ofdm_basic_rates =
875 ((priv->active_rate_basic &
876 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
877 IWL_FIRST_OFDM_RATE) & 0xFF;
878 else
879 priv->staging_rxon.ofdm_basic_rates =
880 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
881}
882
4fc22b21 883#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
884
885#include "iwl-spectrum.h"
886
887#define BEACON_TIME_MASK_LOW 0x00FFFFFF
888#define BEACON_TIME_MASK_HIGH 0xFF000000
889#define TIME_UNIT 1024
890
891/*
892 * extended beacon time format
893 * time in usec will be changed into a 32-bit value in 8:24 format
894 * the high 1 byte is the beacon counts
895 * the lower 3 bytes is the time in usec within one beacon interval
896 */
897
bb8c093b 898static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
899{
900 u32 quot;
901 u32 rem;
902 u32 interval = beacon_interval * 1024;
903
904 if (!interval || !usec)
905 return 0;
906
907 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
908 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
909
910 return (quot << 24) + rem;
911}
912
913/* base is usually what we get from ucode with each received frame,
914 * the same as HW timer counter counting down
915 */
916
bb8c093b 917static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
918{
919 u32 base_low = base & BEACON_TIME_MASK_LOW;
920 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
921 u32 interval = beacon_interval * TIME_UNIT;
922 u32 res = (base & BEACON_TIME_MASK_HIGH) +
923 (addon & BEACON_TIME_MASK_HIGH);
924
925 if (base_low > addon_low)
926 res += base_low - addon_low;
927 else if (base_low < addon_low) {
928 res += interval + base_low - addon_low;
929 res += (1 << 24);
930 } else
931 res += (1 << 24);
932
933 return cpu_to_le32(res);
934}
935
c79dd5b5 936static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
937 struct ieee80211_measurement_params *params,
938 u8 type)
939{
bb8c093b 940 struct iwl4965_spectrum_cmd spectrum;
db11d634 941 struct iwl_rx_packet *res;
857485c0 942 struct iwl_host_cmd cmd = {
b481de9c
ZY
943 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
944 .data = (void *)&spectrum,
945 .meta.flags = CMD_WANT_SKB,
946 };
947 u32 add_time = le64_to_cpu(params->start_time);
948 int rc;
949 int spectrum_resp_status;
950 int duration = le16_to_cpu(params->duration);
951
3109ece1 952 if (iwl_is_associated(priv))
b481de9c 953 add_time =
bb8c093b 954 iwl4965_usecs_to_beacons(
b481de9c
ZY
955 le64_to_cpu(params->start_time) - priv->last_tsf,
956 le16_to_cpu(priv->rxon_timing.beacon_interval));
957
958 memset(&spectrum, 0, sizeof(spectrum));
959
960 spectrum.channel_count = cpu_to_le16(1);
961 spectrum.flags =
962 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
963 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
964 cmd.len = sizeof(spectrum);
965 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
966
3109ece1 967 if (iwl_is_associated(priv))
b481de9c 968 spectrum.start_time =
bb8c093b 969 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
970 add_time,
971 le16_to_cpu(priv->rxon_timing.beacon_interval));
972 else
973 spectrum.start_time = 0;
974
975 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
976 spectrum.channels[0].channel = params->channel;
977 spectrum.channels[0].type = type;
978 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
979 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
980 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
981
857485c0 982 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
983 if (rc)
984 return rc;
985
db11d634 986 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
987 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
988 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
989 rc = -EIO;
990 }
991
992 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
993 switch (spectrum_resp_status) {
994 case 0: /* Command will be handled */
995 if (res->u.spectrum.id != 0xff) {
996 IWL_DEBUG_INFO
997 ("Replaced existing measurement: %d\n",
998 res->u.spectrum.id);
999 priv->measurement_status &= ~MEASUREMENT_READY;
1000 }
1001 priv->measurement_status |= MEASUREMENT_ACTIVE;
1002 rc = 0;
1003 break;
1004
1005 case 1: /* Command will not be handled */
1006 rc = -EAGAIN;
1007 break;
1008 }
1009
1010 dev_kfree_skb_any(cmd.meta.u.skb);
1011
1012 return rc;
1013}
1014#endif
1015
b481de9c
ZY
1016/******************************************************************************
1017 *
1018 * Generic RX handler implementations
1019 *
1020 ******************************************************************************/
885ba202
TW
1021static void iwl_rx_reply_alive(struct iwl_priv *priv,
1022 struct iwl_rx_mem_buffer *rxb)
b481de9c 1023{
db11d634 1024 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 1025 struct iwl_alive_resp *palive;
b481de9c
ZY
1026 struct delayed_work *pwork;
1027
1028 palive = &pkt->u.alive_frame;
1029
1030 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
1031 "0x%01X 0x%01X\n",
1032 palive->is_valid, palive->ver_type,
1033 palive->ver_subtype);
1034
1035 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
1036 IWL_DEBUG_INFO("Initialization Alive received.\n");
1037 memcpy(&priv->card_alive_init,
1038 &pkt->u.alive_frame,
885ba202 1039 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY
1040 pwork = &priv->init_alive_start;
1041 } else {
1042 IWL_DEBUG_INFO("Runtime Alive received.\n");
1043 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 1044 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1045 pwork = &priv->alive_start;
1046 }
1047
1048 /* We delay the ALIVE response by 5ms to
1049 * give the HW RF Kill time to activate... */
1050 if (palive->is_valid == UCODE_VALID_OK)
1051 queue_delayed_work(priv->workqueue, pwork,
1052 msecs_to_jiffies(5));
1053 else
1054 IWL_WARNING("uCode did not respond OK.\n");
1055}
1056
c79dd5b5 1057static void iwl4965_rx_reply_error(struct iwl_priv *priv,
a55360e4 1058 struct iwl_rx_mem_buffer *rxb)
b481de9c 1059{
db11d634 1060 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1061
1062 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
1063 "seq 0x%04X ser 0x%08X\n",
1064 le32_to_cpu(pkt->u.err_resp.error_type),
1065 get_cmd_string(pkt->u.err_resp.cmd_id),
1066 pkt->u.err_resp.cmd_id,
1067 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1068 le32_to_cpu(pkt->u.err_resp.error_info));
1069}
1070
1071#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1072
a55360e4 1073static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 1074{
db11d634 1075 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 1076 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
bb8c093b 1077 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
1078 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
1079 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1080 rxon->channel = csa->channel;
1081 priv->staging_rxon.channel = csa->channel;
1082}
1083
c79dd5b5 1084static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
a55360e4 1085 struct iwl_rx_mem_buffer *rxb)
b481de9c 1086{
4fc22b21 1087#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
db11d634 1088 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1089 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
1090
1091 if (!report->state) {
f3d67999
EK
1092 IWL_DEBUG(IWL_DL_11H,
1093 "Spectrum Measure Notification: Start\n");
b481de9c
ZY
1094 return;
1095 }
1096
1097 memcpy(&priv->measure_report, report, sizeof(*report));
1098 priv->measurement_status |= MEASUREMENT_READY;
1099#endif
1100}
1101
c79dd5b5 1102static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 1103 struct iwl_rx_mem_buffer *rxb)
b481de9c 1104{
0a6857e7 1105#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1106 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1107 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
1108 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
1109 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1110#endif
1111}
1112
c79dd5b5 1113static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 1114 struct iwl_rx_mem_buffer *rxb)
b481de9c 1115{
db11d634 1116 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1117 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
1118 "notification for %s:\n",
1119 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 1120 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
1121}
1122
bb8c093b 1123static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 1124{
c79dd5b5
TW
1125 struct iwl_priv *priv =
1126 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1127 struct sk_buff *beacon;
1128
1129 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1130 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1131
1132 if (!beacon) {
1133 IWL_ERROR("update beacon failed\n");
1134 return;
1135 }
1136
1137 mutex_lock(&priv->mutex);
1138 /* new beacon skb is allocated every time; dispose previous.*/
1139 if (priv->ibss_beacon)
1140 dev_kfree_skb(priv->ibss_beacon);
1141
1142 priv->ibss_beacon = beacon;
1143 mutex_unlock(&priv->mutex);
1144
bb8c093b 1145 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
1146}
1147
4e39317d
EG
1148/**
1149 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
1150 *
1151 * This callback is provided in order to send a statistics request.
1152 *
1153 * This timer function is continually reset to execute within
1154 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
1155 * was received. We need to ensure we receive the statistics in order
1156 * to update the temperature used for calibrating the TXPOWER.
1157 */
1158static void iwl4965_bg_statistics_periodic(unsigned long data)
1159{
1160 struct iwl_priv *priv = (struct iwl_priv *)data;
1161
1162 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1163 return;
1164
1165 iwl_send_statistics_request(priv, CMD_ASYNC);
1166}
1167
c79dd5b5 1168static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 1169 struct iwl_rx_mem_buffer *rxb)
b481de9c 1170{
0a6857e7 1171#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1172 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1173 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
e7d326ac 1174 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
1175
1176 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
1177 "tsf %d %d rate %d\n",
25a6572c 1178 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY
1179 beacon->beacon_notify_hdr.failure_frame,
1180 le32_to_cpu(beacon->ibss_mgr_status),
1181 le32_to_cpu(beacon->high_tsf),
1182 le32_to_cpu(beacon->low_tsf), rate);
1183#endif
1184
1185 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
1186 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1187 queue_work(priv->workqueue, &priv->beacon_update);
1188}
1189
b481de9c
ZY
1190/* Handle notification from uCode that card's power state is changing
1191 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 1192static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 1193 struct iwl_rx_mem_buffer *rxb)
b481de9c 1194{
db11d634 1195 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1196 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1197 unsigned long status = priv->status;
1198
1199 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
1200 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1201 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1202
1203 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
1204 RF_CARD_DISABLED)) {
1205
3395f6e9 1206 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1207 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1208
3395f6e9
TW
1209 if (!iwl_grab_nic_access(priv)) {
1210 iwl_write_direct32(
b481de9c
ZY
1211 priv, HBUS_TARG_MBX_C,
1212 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1213
3395f6e9 1214 iwl_release_nic_access(priv);
b481de9c
ZY
1215 }
1216
1217 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 1218 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 1219 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
1220 if (!iwl_grab_nic_access(priv)) {
1221 iwl_write_direct32(
b481de9c
ZY
1222 priv, HBUS_TARG_MBX_C,
1223 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1224
3395f6e9 1225 iwl_release_nic_access(priv);
b481de9c
ZY
1226 }
1227 }
1228
1229 if (flags & RF_CARD_DISABLED) {
3395f6e9 1230 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1231 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
1232 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1233 if (!iwl_grab_nic_access(priv))
1234 iwl_release_nic_access(priv);
b481de9c
ZY
1235 }
1236 }
1237
1238 if (flags & HW_CARD_DISABLED)
1239 set_bit(STATUS_RF_KILL_HW, &priv->status);
1240 else
1241 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1242
1243
1244 if (flags & SW_CARD_DISABLED)
1245 set_bit(STATUS_RF_KILL_SW, &priv->status);
1246 else
1247 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1248
1249 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1250 iwl_scan_cancel(priv);
b481de9c
ZY
1251
1252 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1253 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1254 (test_bit(STATUS_RF_KILL_SW, &status) !=
1255 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1256 queue_work(priv->workqueue, &priv->rf_kill);
1257 else
1258 wake_up_interruptible(&priv->wait_command_queue);
1259}
1260
e2e3c57b
TW
1261int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
1262{
1263 int ret;
1264 unsigned long flags;
1265
1266 spin_lock_irqsave(&priv->lock, flags);
1267 ret = iwl_grab_nic_access(priv);
1268 if (ret)
1269 goto err;
1270
1271 if (src == IWL_PWR_SRC_VAUX) {
1272 u32 val;
1273 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
1274 &val);
1275
1276 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
1277 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1278 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1279 ~APMG_PS_CTRL_MSK_PWR_SRC);
1280 } else {
1281 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1282 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1283 ~APMG_PS_CTRL_MSK_PWR_SRC);
1284 }
1285
1286 iwl_release_nic_access(priv);
1287err:
1288 spin_unlock_irqrestore(&priv->lock, flags);
1289 return ret;
1290}
1291
b481de9c 1292/**
bb8c093b 1293 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1294 *
1295 * Setup the RX handlers for each of the reply types sent from the uCode
1296 * to the host.
1297 *
1298 * This function chains into the hardware specific files for them to setup
1299 * any hardware specific handlers as well.
1300 */
653fa4a0 1301static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1302{
885ba202 1303 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
bb8c093b
CH
1304 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
1305 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 1306 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
1307 iwl4965_rx_spectrum_measure_notif;
1308 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 1309 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
1310 iwl4965_rx_pm_debug_statistics_notif;
1311 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 1312
9fbab516
BC
1313 /*
1314 * The same handler is used for both the REPLY to a discrete
1315 * statistics request from the host as well as for the periodic
1316 * statistics notifications (after received beacons) from the uCode.
b481de9c 1317 */
8f91aecb
EG
1318 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1319 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91
TW
1320
1321 iwl_setup_rx_scan_handlers(priv);
1322
37a44211 1323 /* status change handler */
bb8c093b 1324 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
b481de9c 1325
c1354754
TW
1326 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1327 iwl_rx_missed_beacon_notif;
37a44211 1328 /* Rx handlers */
1781a07f
EG
1329 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1330 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG
1331 /* block ack */
1332 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1333 /* Set up hardware specific Rx handlers */
d4789efe 1334 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY
1335}
1336
5c0eef96
MA
1337/*
1338 * this should be called while priv->lock is locked
1339*/
a55360e4 1340static void __iwl_rx_replenish(struct iwl_priv *priv)
b481de9c 1341{
a55360e4
TW
1342 iwl_rx_allocate(priv);
1343 iwl_rx_queue_restock(priv);
b481de9c
ZY
1344}
1345
b481de9c
ZY
1346
1347/**
a55360e4 1348 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1349 *
1350 * Uses the priv->rx_handlers callback function array to invoke
1351 * the appropriate handlers, including command responses,
1352 * frame-received notifications, and other notifications.
1353 */
a55360e4 1354void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1355{
a55360e4 1356 struct iwl_rx_mem_buffer *rxb;
db11d634 1357 struct iwl_rx_packet *pkt;
a55360e4 1358 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1359 u32 r, i;
1360 int reclaim;
1361 unsigned long flags;
5c0eef96 1362 u8 fill_rx = 0;
d68ab680 1363 u32 count = 8;
b481de9c 1364
6440adb5
CB
1365 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1366 * buffer that the driver may process (last buffer filled by ucode). */
d67f5489 1367 r = priv->cfg->ops->lib->shared_mem_rx_idx(priv);
b481de9c
ZY
1368 i = rxq->read;
1369
1370 /* Rx interrupt, but nothing sent from uCode */
1371 if (i == r)
f3d67999 1372 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1373
a55360e4 1374 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA
1375 fill_rx = 1;
1376
b481de9c
ZY
1377 while (i != r) {
1378 rxb = rxq->queue[i];
1379
9fbab516 1380 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1381 * then a bug has been introduced in the queue refilling
1382 * routines -- catch it here */
1383 BUG_ON(rxb == NULL);
1384
1385 rxq->queue[i] = NULL;
1386
1387 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 1388 priv->hw_params.rx_buf_size,
b481de9c 1389 PCI_DMA_FROMDEVICE);
db11d634 1390 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1391
1392 /* Reclaim a command buffer only if this packet is a response
1393 * to a (driver-originated) command.
1394 * If the packet (e.g. Rx frame) originated from uCode,
1395 * there is no command buffer to reclaim.
1396 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1397 * but apparently a few don't get set; catch them here. */
1398 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1399 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1400 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 1401 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
1402 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1403 (pkt->hdr.cmd != REPLY_TX);
1404
1405 /* Based on type of command response or notification,
1406 * handle those that need handling via function in
bb8c093b 1407 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c 1408 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK
1409 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1410 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY
1411 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1412 } else {
1413 /* No handling needed */
f3d67999 1414 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY
1415 "r %d i %d No handler needed for %s, 0x%02x\n",
1416 r, i, get_cmd_string(pkt->hdr.cmd),
1417 pkt->hdr.cmd);
1418 }
1419
1420 if (reclaim) {
9fbab516 1421 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1422 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1423 * as we reclaim the driver command queue */
1424 if (rxb && rxb->skb)
17b88929 1425 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY
1426 else
1427 IWL_WARNING("Claim null rxb?\n");
1428 }
1429
1430 /* For now we just don't re-use anything. We can tweak this
1431 * later to try and re-use notification packets and SKBs that
1432 * fail to Rx correctly */
1433 if (rxb->skb != NULL) {
1434 priv->alloc_rxb_skb--;
1435 dev_kfree_skb_any(rxb->skb);
1436 rxb->skb = NULL;
1437 }
1438
1439 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 1440 priv->hw_params.rx_buf_size,
9ee1ba47 1441 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1442 spin_lock_irqsave(&rxq->lock, flags);
1443 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1444 spin_unlock_irqrestore(&rxq->lock, flags);
1445 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1446 /* If there are a lot of unused frames,
1447 * restock the Rx queue so ucode wont assert. */
1448 if (fill_rx) {
1449 count++;
1450 if (count >= 8) {
1451 priv->rxq.read = i;
a55360e4 1452 __iwl_rx_replenish(priv);
5c0eef96
MA
1453 count = 0;
1454 }
1455 }
b481de9c
ZY
1456 }
1457
1458 /* Backtrack one entry */
1459 priv->rxq.read = i;
a55360e4
TW
1460 iwl_rx_queue_restock(priv);
1461}
a55360e4 1462
0a6857e7 1463#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1464static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1465{
c1adf9fb 1466 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57
JP
1467 DECLARE_MAC_BUF(mac);
1468
b481de9c 1469 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1470 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
1471 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1472 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1473 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1474 le32_to_cpu(rxon->filter_flags));
1475 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1476 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1477 rxon->ofdm_basic_rates);
1478 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP
1479 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
1480 print_mac(mac, rxon->node_addr));
1481 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
1482 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY
1483 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1484}
1485#endif
1486
c79dd5b5 1487static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1488{
1489 IWL_DEBUG_ISR("Enabling interrupts\n");
1490 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 1491 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
1492}
1493
0359facc
MA
1494/* call this function to flush any scheduled tasklet */
1495static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1496{
1497 /* wait to make sure we flush pedding tasklet*/
1498 synchronize_irq(priv->pci_dev->irq);
1499 tasklet_kill(&priv->irq_tasklet);
1500}
1501
c79dd5b5 1502static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1503{
1504 clear_bit(STATUS_INT_ENABLED, &priv->status);
1505
1506 /* disable interrupts from uCode/NIC to host */
3395f6e9 1507 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1508
1509 /* acknowledge/clear/reset any interrupts still pending
1510 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW
1511 iwl_write32(priv, CSR_INT, 0xffffffff);
1512 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
1513 IWL_DEBUG_ISR("Disabled interrupts\n");
1514}
1515
b481de9c 1516
b481de9c 1517/**
bb8c093b 1518 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1519 */
c79dd5b5 1520static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 1521{
bb8c093b 1522 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
1523 set_bit(STATUS_FW_ERROR, &priv->status);
1524
1525 /* Cancel currently queued command. */
1526 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1527
0a6857e7 1528#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1529 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1530 iwl_dump_nic_error_log(priv);
189a2b59 1531 iwl_dump_nic_event_log(priv);
bf403db8 1532 iwl4965_print_rx_config_cmd(priv);
b481de9c
ZY
1533 }
1534#endif
1535
1536 wake_up_interruptible(&priv->wait_command_queue);
1537
1538 /* Keep the restart process from trying to send host
1539 * commands by clearing the INIT status bit */
1540 clear_bit(STATUS_READY, &priv->status);
1541
1542 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1543 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY
1544 "Restarting adapter due to uCode error.\n");
1545
3109ece1 1546 if (iwl_is_associated(priv)) {
b481de9c
ZY
1547 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1548 sizeof(priv->recovery_rxon));
1549 priv->error_recovering = 1;
1550 }
3a1081e8
EK
1551 if (priv->cfg->mod_params->restart_fw)
1552 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1553 }
1554}
1555
c79dd5b5 1556static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1557{
1558 unsigned long flags;
1559
1560 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1561 sizeof(priv->staging_rxon));
1562 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 1563 iwl4965_commit_rxon(priv);
b481de9c 1564
4f40e4d9 1565 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
1566
1567 spin_lock_irqsave(&priv->lock, flags);
1568 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1569 priv->error_recovering = 0;
1570 spin_unlock_irqrestore(&priv->lock, flags);
1571}
1572
c79dd5b5 1573static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1574{
1575 u32 inta, handled = 0;
1576 u32 inta_fh;
1577 unsigned long flags;
0a6857e7 1578#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1579 u32 inta_mask;
1580#endif
1581
1582 spin_lock_irqsave(&priv->lock, flags);
1583
1584 /* Ack/clear/reset pending uCode interrupts.
1585 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1586 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
1587 inta = iwl_read32(priv, CSR_INT);
1588 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1589
1590 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1591 * Any new interrupts that happen after this, either while we're
1592 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
1593 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1594 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1595
0a6857e7 1596#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1597 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1598 /* just for debug */
3395f6e9 1599 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
1600 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1601 inta, inta_mask, inta_fh);
1602 }
1603#endif
1604
1605 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1606 * atomic, make sure that inta covers all the interrupts that
1607 * we've discovered, even if FH interrupt came in just after
1608 * reading CSR_INT. */
6f83eaa1 1609 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1610 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1611 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
1612 inta |= CSR_INT_BIT_FH_TX;
1613
1614 /* Now service all interrupt bits discovered above. */
1615 if (inta & CSR_INT_BIT_HW_ERR) {
1616 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1617
1618 /* Tell the device to stop sending interrupts */
bb8c093b 1619 iwl4965_disable_interrupts(priv);
b481de9c 1620
bb8c093b 1621 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1622
1623 handled |= CSR_INT_BIT_HW_ERR;
1624
1625 spin_unlock_irqrestore(&priv->lock, flags);
1626
1627 return;
1628 }
1629
0a6857e7 1630#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1631 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1632 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
1633 if (inta & CSR_INT_BIT_SCD)
1634 IWL_DEBUG_ISR("Scheduler finished to transmit "
1635 "the frame/frames.\n");
b481de9c
ZY
1636
1637 /* Alive notification via Rx interrupt will do the real work */
1638 if (inta & CSR_INT_BIT_ALIVE)
1639 IWL_DEBUG_ISR("Alive interrupt\n");
1640 }
1641#endif
1642 /* Safely ignore these bits for debug checks below */
25c03d8e 1643 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1644
9fbab516 1645 /* HW RF KILL switch toggled */
b481de9c
ZY
1646 if (inta & CSR_INT_BIT_RF_KILL) {
1647 int hw_rf_kill = 0;
3395f6e9 1648 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
1649 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1650 hw_rf_kill = 1;
1651
f3d67999 1652 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
b481de9c
ZY
1653 hw_rf_kill ? "disable radio":"enable radio");
1654
a9efa652
EG
1655 /* driver only loads ucode once setting the interface up.
1656 * the driver as well won't allow loading if RFKILL is set
1657 * therefore no need to restart the driver from this handler
1658 */
1659 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
53e49093 1660 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c
ZY
1661
1662 handled |= CSR_INT_BIT_RF_KILL;
1663 }
1664
9fbab516 1665 /* Chip got too hot and stopped itself */
b481de9c
ZY
1666 if (inta & CSR_INT_BIT_CT_KILL) {
1667 IWL_ERROR("Microcode CT kill error detected.\n");
1668 handled |= CSR_INT_BIT_CT_KILL;
1669 }
1670
1671 /* Error detected by uCode */
1672 if (inta & CSR_INT_BIT_SW_ERR) {
1673 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1674 inta);
bb8c093b 1675 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1676 handled |= CSR_INT_BIT_SW_ERR;
1677 }
1678
1679 /* uCode wakes up after power-down sleep */
1680 if (inta & CSR_INT_BIT_WAKEUP) {
1681 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1682 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW
1683 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1684 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1685 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1686 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1687 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1688 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1689
1690 handled |= CSR_INT_BIT_WAKEUP;
1691 }
1692
1693 /* All uCode command responses, including Tx command responses,
1694 * Rx "responses" (frame-received notification), and other
1695 * notifications from uCode come through here*/
1696 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1697 iwl_rx_handle(priv);
b481de9c
ZY
1698 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1699 }
1700
1701 if (inta & CSR_INT_BIT_FH_TX) {
1702 IWL_DEBUG_ISR("Tx interrupt\n");
1703 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR
1704 /* FH finished to write, send event */
1705 priv->ucode_write_complete = 1;
1706 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1707 }
1708
1709 if (inta & ~handled)
1710 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1711
1712 if (inta & ~CSR_INI_SET_MASK) {
1713 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1714 inta & ~CSR_INI_SET_MASK);
1715 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1716 }
1717
1718 /* Re-enable all interrupts */
0359facc
MA
1719 /* only Re-enable if diabled by irq */
1720 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1721 iwl4965_enable_interrupts(priv);
b481de9c 1722
0a6857e7 1723#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1724 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
1725 inta = iwl_read32(priv, CSR_INT);
1726 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1727 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1728 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1729 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1730 }
1731#endif
1732 spin_unlock_irqrestore(&priv->lock, flags);
1733}
1734
bb8c093b 1735static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 1736{
c79dd5b5 1737 struct iwl_priv *priv = data;
b481de9c
ZY
1738 u32 inta, inta_mask;
1739 u32 inta_fh;
1740 if (!priv)
1741 return IRQ_NONE;
1742
1743 spin_lock(&priv->lock);
1744
1745 /* Disable (but don't clear!) interrupts here to avoid
1746 * back-to-back ISRs and sporadic interrupts from our NIC.
1747 * If we have something to service, the tasklet will re-enable ints.
1748 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
1749 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1750 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1751
1752 /* Discover which interrupts are active/pending */
3395f6e9
TW
1753 inta = iwl_read32(priv, CSR_INT);
1754 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1755
1756 /* Ignore interrupt if there's nothing in NIC to service.
1757 * This may be due to IRQ shared with another device,
1758 * or due to sporadic interrupts thrown from our NIC. */
1759 if (!inta && !inta_fh) {
1760 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1761 goto none;
1762 }
1763
1764 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
1765 /* Hardware disappeared. It might have already raised
1766 * an interrupt */
b481de9c 1767 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 1768 goto unplugged;
b481de9c
ZY
1769 }
1770
1771 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1772 inta, inta_mask, inta_fh);
1773
25c03d8e
JP
1774 inta &= ~CSR_INT_BIT_SCD;
1775
bb8c093b 1776 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
1777 if (likely(inta || inta_fh))
1778 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1779
66fbb541
ON
1780 unplugged:
1781 spin_unlock(&priv->lock);
b481de9c
ZY
1782 return IRQ_HANDLED;
1783
1784 none:
1785 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
1786 /* only Re-enable if diabled by irq */
1787 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1788 iwl4965_enable_interrupts(priv);
b481de9c
ZY
1789 spin_unlock(&priv->lock);
1790 return IRQ_NONE;
1791}
1792
b481de9c
ZY
1793/******************************************************************************
1794 *
1795 * uCode download functions
1796 *
1797 ******************************************************************************/
1798
c79dd5b5 1799static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1800{
98c92211
TW
1801 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1802 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1803 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1804 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1805 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1806 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1807}
1808
edcdf8b2
RR
1809static void iwl4965_nic_start(struct iwl_priv *priv)
1810{
1811 /* Remove all resets to allow NIC to operate */
1812 iwl_write32(priv, CSR_RESET, 0);
1813}
1814
1815
b481de9c 1816/**
bb8c093b 1817 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
1818 *
1819 * Copy into buffers for card to fetch via bus-mastering
1820 */
c79dd5b5 1821static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 1822{
14b3d338 1823 struct iwl_ucode *ucode;
90e759d1 1824 int ret;
b481de9c 1825 const struct firmware *ucode_raw;
4bf775cd 1826 const char *name = priv->cfg->fw_name;
b481de9c
ZY
1827 u8 *src;
1828 size_t len;
1829 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
1830
1831 /* Ask kernel firmware_class module to get the boot firmware off disk.
1832 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
1833 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
1834 if (ret < 0) {
1835 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1836 name, ret);
b481de9c
ZY
1837 goto error;
1838 }
1839
1840 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1841 name, ucode_raw->size);
1842
1843 /* Make sure that we got at least our header! */
1844 if (ucode_raw->size < sizeof(*ucode)) {
1845 IWL_ERROR("File size way too small!\n");
90e759d1 1846 ret = -EINVAL;
b481de9c
ZY
1847 goto err_release;
1848 }
1849
1850 /* Data from ucode file: header followed by uCode images */
1851 ucode = (void *)ucode_raw->data;
1852
1853 ver = le32_to_cpu(ucode->ver);
1854 inst_size = le32_to_cpu(ucode->inst_size);
1855 data_size = le32_to_cpu(ucode->data_size);
1856 init_size = le32_to_cpu(ucode->init_size);
1857 init_data_size = le32_to_cpu(ucode->init_data_size);
1858 boot_size = le32_to_cpu(ucode->boot_size);
1859
1860 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
1861 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1862 inst_size);
1863 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1864 data_size);
1865 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1866 init_size);
1867 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1868 init_data_size);
1869 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1870 boot_size);
1871
1872 /* Verify size of file vs. image size info in file's header */
1873 if (ucode_raw->size < sizeof(*ucode) +
1874 inst_size + data_size + init_size +
1875 init_data_size + boot_size) {
1876
1877 IWL_DEBUG_INFO("uCode file size %d too small\n",
1878 (int)ucode_raw->size);
90e759d1 1879 ret = -EINVAL;
b481de9c
ZY
1880 goto err_release;
1881 }
1882
1883 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1884 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
1885 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1886 inst_size);
1887 ret = -EINVAL;
b481de9c
ZY
1888 goto err_release;
1889 }
1890
099b40b7 1891 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
1892 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1893 data_size);
1894 ret = -EINVAL;
b481de9c
ZY
1895 goto err_release;
1896 }
099b40b7 1897 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1898 IWL_DEBUG_INFO
90e759d1
TW
1899 ("uCode init instr len %d too large to fit in\n",
1900 init_size);
1901 ret = -EINVAL;
b481de9c
ZY
1902 goto err_release;
1903 }
099b40b7 1904 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1905 IWL_DEBUG_INFO
90e759d1
TW
1906 ("uCode init data len %d too large to fit in\n",
1907 init_data_size);
1908 ret = -EINVAL;
b481de9c
ZY
1909 goto err_release;
1910 }
099b40b7 1911 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1912 IWL_DEBUG_INFO
90e759d1
TW
1913 ("uCode boot instr len %d too large to fit in\n",
1914 boot_size);
1915 ret = -EINVAL;
b481de9c
ZY
1916 goto err_release;
1917 }
1918
1919 /* Allocate ucode buffers for card's bus-master loading ... */
1920
1921 /* Runtime instructions and 2 copies of data:
1922 * 1) unmodified from disk
1923 * 2) backup cache for save/restore during power-downs */
1924 priv->ucode_code.len = inst_size;
98c92211 1925 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
1926
1927 priv->ucode_data.len = data_size;
98c92211 1928 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
1929
1930 priv->ucode_data_backup.len = data_size;
98c92211 1931 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
1932
1933 /* Initialization instructions and data */
90e759d1
TW
1934 if (init_size && init_data_size) {
1935 priv->ucode_init.len = init_size;
98c92211 1936 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
1937
1938 priv->ucode_init_data.len = init_data_size;
98c92211 1939 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
1940
1941 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1942 goto err_pci_alloc;
1943 }
b481de9c
ZY
1944
1945 /* Bootstrap (instructions only, no data) */
90e759d1
TW
1946 if (boot_size) {
1947 priv->ucode_boot.len = boot_size;
98c92211 1948 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1949
90e759d1
TW
1950 if (!priv->ucode_boot.v_addr)
1951 goto err_pci_alloc;
1952 }
b481de9c
ZY
1953
1954 /* Copy images into buffers for card's bus-master reads ... */
1955
1956 /* Runtime instructions (first block of data in file) */
1957 src = &ucode->data[0];
1958 len = priv->ucode_code.len;
90e759d1 1959 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
1960 memcpy(priv->ucode_code.v_addr, src, len);
1961 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1962 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1963
1964 /* Runtime data (2nd block)
bb8c093b 1965 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
1966 src = &ucode->data[inst_size];
1967 len = priv->ucode_data.len;
90e759d1 1968 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
1969 memcpy(priv->ucode_data.v_addr, src, len);
1970 memcpy(priv->ucode_data_backup.v_addr, src, len);
1971
1972 /* Initialization instructions (3rd block) */
1973 if (init_size) {
1974 src = &ucode->data[inst_size + data_size];
1975 len = priv->ucode_init.len;
90e759d1
TW
1976 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1977 len);
b481de9c
ZY
1978 memcpy(priv->ucode_init.v_addr, src, len);
1979 }
1980
1981 /* Initialization data (4th block) */
1982 if (init_data_size) {
1983 src = &ucode->data[inst_size + data_size + init_size];
1984 len = priv->ucode_init_data.len;
90e759d1
TW
1985 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1986 len);
b481de9c
ZY
1987 memcpy(priv->ucode_init_data.v_addr, src, len);
1988 }
1989
1990 /* Bootstrap instructions (5th block) */
1991 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1992 len = priv->ucode_boot.len;
90e759d1 1993 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
1994 memcpy(priv->ucode_boot.v_addr, src, len);
1995
1996 /* We have our copies now, allow OS release its copies */
1997 release_firmware(ucode_raw);
1998 return 0;
1999
2000 err_pci_alloc:
2001 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 2002 ret = -ENOMEM;
bb8c093b 2003 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
2004
2005 err_release:
2006 release_firmware(ucode_raw);
2007
2008 error:
90e759d1 2009 return ret;
b481de9c
ZY
2010}
2011
b481de9c 2012/**
4a4a9e81 2013 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 2014 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 2015 * Alive gets handled by iwl_init_alive_start()).
b481de9c 2016 */
4a4a9e81 2017static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 2018{
57aab75a 2019 int ret = 0;
b481de9c
ZY
2020
2021 IWL_DEBUG_INFO("Runtime Alive received.\n");
2022
2023 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2024 /* We had an error bringing up the hardware, so take it
2025 * all the way back down so we can try again */
2026 IWL_DEBUG_INFO("Alive failed.\n");
2027 goto restart;
2028 }
2029
2030 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2031 * This is a paranoid check, because we would not have gotten the
2032 * "runtime" alive if code weren't properly loaded. */
b0692f2f 2033 if (iwl_verify_ucode(priv)) {
b481de9c
ZY
2034 /* Runtime instruction load was bad;
2035 * take it all the way back down so we can try again */
2036 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
2037 goto restart;
2038 }
2039
37deb2a0 2040 iwl_clear_stations_table(priv);
57aab75a
TW
2041 ret = priv->cfg->ops->lib->alive_notify(priv);
2042 if (ret) {
b481de9c 2043 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 2044 ret);
b481de9c
ZY
2045 goto restart;
2046 }
2047
9fbab516 2048 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
2049 set_bit(STATUS_ALIVE, &priv->status);
2050
fee1247a 2051 if (iwl_is_rfkill(priv))
b481de9c
ZY
2052 return;
2053
36d6825b 2054 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2055
2056 priv->active_rate = priv->rates_mask;
2057 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2058
3109ece1 2059 if (iwl_is_associated(priv)) {
c1adf9fb
GG
2060 struct iwl_rxon_cmd *active_rxon =
2061 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY
2062
2063 memcpy(&priv->staging_rxon, &priv->active_rxon,
2064 sizeof(priv->staging_rxon));
2065 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2066 } else {
2067 /* Initialize our rx_config data */
bb8c093b 2068 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
2069 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2070 }
2071
9fbab516 2072 /* Configure Bluetooth device coexistence support */
bb8c093b 2073 iwl4965_send_bt_config(priv);
b481de9c 2074
4a4a9e81
TW
2075 iwl_reset_run_time_calib(priv);
2076
b481de9c 2077 /* Configure the adapter for unassociated operation */
bb8c093b 2078 iwl4965_commit_rxon(priv);
b481de9c
ZY
2079
2080 /* At this point, the NIC is initialized and operational */
47f4a587 2081 iwl_rf_kill_ct_config(priv);
5a66926a 2082
fe00b5a5
RC
2083 iwl_leds_register(priv);
2084
b481de9c 2085 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 2086 set_bit(STATUS_READY, &priv->status);
5a66926a 2087 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
2088
2089 if (priv->error_recovering)
bb8c093b 2090 iwl4965_error_recovery(priv);
b481de9c 2091
58d0f361 2092 iwl_power_update_mode(priv, 1);
84363e6e 2093 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
c46fbefa
AK
2094
2095 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2096 iwl4965_set_mode(priv, priv->iw_mode);
2097
b481de9c
ZY
2098 return;
2099
2100 restart:
2101 queue_work(priv->workqueue, &priv->restart);
2102}
2103
4e39317d 2104static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2105
c79dd5b5 2106static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2107{
2108 unsigned long flags;
2109 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2110
2111 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
2112
b481de9c
ZY
2113 if (!exit_pending)
2114 set_bit(STATUS_EXIT_PENDING, &priv->status);
2115
ab53d8af
MA
2116 iwl_leds_unregister(priv);
2117
37deb2a0 2118 iwl_clear_stations_table(priv);
b481de9c
ZY
2119
2120 /* Unblock any waiting calls */
2121 wake_up_interruptible_all(&priv->wait_command_queue);
2122
b481de9c
ZY
2123 /* Wipe out the EXIT_PENDING status bit if we are not actually
2124 * exiting the module */
2125 if (!exit_pending)
2126 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2127
2128 /* stop and reset the on-board processor */
3395f6e9 2129 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2130
2131 /* tell the device to stop sending interrupts */
0359facc 2132 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2133 iwl4965_disable_interrupts(priv);
0359facc
MA
2134 spin_unlock_irqrestore(&priv->lock, flags);
2135 iwl_synchronize_irq(priv);
b481de9c
ZY
2136
2137 if (priv->mac80211_registered)
2138 ieee80211_stop_queues(priv->hw);
2139
bb8c093b 2140 /* If we have not previously called iwl4965_init() then
b481de9c 2141 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 2142 if (!iwl_is_init(priv)) {
b481de9c
ZY
2143 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2144 STATUS_RF_KILL_HW |
2145 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2146 STATUS_RF_KILL_SW |
9788864e
RC
2147 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2148 STATUS_GEO_CONFIGURED |
b481de9c 2149 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA
2150 STATUS_IN_SUSPEND |
2151 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2152 STATUS_EXIT_PENDING;
b481de9c
ZY
2153 goto exit;
2154 }
2155
2156 /* ...otherwise clear out all the status bits but the RF Kill and
2157 * SUSPEND bits and continue taking the NIC down. */
2158 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2159 STATUS_RF_KILL_HW |
2160 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2161 STATUS_RF_KILL_SW |
9788864e
RC
2162 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2163 STATUS_GEO_CONFIGURED |
b481de9c
ZY
2164 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
2165 STATUS_IN_SUSPEND |
2166 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA
2167 STATUS_FW_ERROR |
2168 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2169 STATUS_EXIT_PENDING;
b481de9c
ZY
2170
2171 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2172 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 2173 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2174 spin_unlock_irqrestore(&priv->lock, flags);
2175
da1bc453 2176 iwl_txq_ctx_stop(priv);
b3bbacb7 2177 iwl_rxq_stop(priv);
b481de9c
ZY
2178
2179 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
2180 if (!iwl_grab_nic_access(priv)) {
2181 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 2182 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 2183 iwl_release_nic_access(priv);
b481de9c
ZY
2184 }
2185 spin_unlock_irqrestore(&priv->lock, flags);
2186
2187 udelay(5);
2188
7f066108 2189 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG
2190 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
2191 priv->cfg->ops->lib->apm_ops.stop(priv);
2192 else
2193 priv->cfg->ops->lib->apm_ops.reset(priv);
399f4900 2194 priv->cfg->ops->lib->free_shared_mem(priv);
b481de9c
ZY
2195
2196 exit:
885ba202 2197 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2198
2199 if (priv->ibss_beacon)
2200 dev_kfree_skb(priv->ibss_beacon);
2201 priv->ibss_beacon = NULL;
2202
2203 /* clear out any free frames */
fcab423d 2204 iwl_clear_free_frames(priv);
b481de9c
ZY
2205}
2206
c79dd5b5 2207static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2208{
2209 mutex_lock(&priv->mutex);
bb8c093b 2210 __iwl4965_down(priv);
b481de9c 2211 mutex_unlock(&priv->mutex);
b24d22b1 2212
4e39317d 2213 iwl_cancel_deferred_work(priv);
b481de9c
ZY
2214}
2215
2216#define MAX_HW_RESTARTS 5
2217
c79dd5b5 2218static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 2219{
57aab75a
TW
2220 int i;
2221 int ret;
b481de9c
ZY
2222
2223 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2224 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2225 return -EIO;
2226 }
2227
e903fbd4
RC
2228 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2229 IWL_ERROR("ucode not available for device bringup\n");
2230 return -EIO;
2231 }
2232
e655b9f0 2233 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 2234 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 2235 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2236 else
e655b9f0 2237 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2238
c1842d61
TW
2239 if (iwl_is_rfkill(priv)) {
2240 iwl4965_enable_interrupts(priv);
3bff19c2
EG
2241 IWL_WARNING("Radio disabled by %s RF Kill switch\n",
2242 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 2243 return 0;
b481de9c
ZY
2244 }
2245
3395f6e9 2246 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2247
399f4900
RR
2248 ret = priv->cfg->ops->lib->alloc_shared_mem(priv);
2249 if (ret) {
2250 IWL_ERROR("Unable to allocate shared memory\n");
2251 return ret;
2252 }
2253
1053d35f 2254 ret = iwl_hw_nic_init(priv);
57aab75a
TW
2255 if (ret) {
2256 IWL_ERROR("Unable to init nic\n");
2257 return ret;
b481de9c
ZY
2258 }
2259
2260 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
2261 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2262 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2263 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2264
2265 /* clear (again), then enable host interrupts */
3395f6e9 2266 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 2267 iwl4965_enable_interrupts(priv);
b481de9c
ZY
2268
2269 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
2270 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2271 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2272
2273 /* Copy original ucode data image from disk into backup cache.
2274 * This will be used to initialize the on-board processor's
2275 * data SRAM for a clean start when the runtime program first loads. */
2276 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2277 priv->ucode_data.len);
b481de9c 2278
b481de9c
ZY
2279 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2280
37deb2a0 2281 iwl_clear_stations_table(priv);
b481de9c
ZY
2282
2283 /* load bootstrap state machine,
2284 * load bootstrap program into processor's memory,
2285 * prepare to load the "initialize" uCode */
57aab75a 2286 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2287
57aab75a
TW
2288 if (ret) {
2289 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
2290 continue;
2291 }
2292
f3d5b45b
EG
2293 /* Clear out the uCode error bit if it is set */
2294 clear_bit(STATUS_FW_ERROR, &priv->status);
2295
b481de9c 2296 /* start card; "initialize" will load runtime ucode */
edcdf8b2 2297 iwl4965_nic_start(priv);
b481de9c 2298
b481de9c
ZY
2299 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2300
2301 return 0;
2302 }
2303
2304 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2305 __iwl4965_down(priv);
64e72c3e 2306 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2307
2308 /* tried to restart and config the device for as long as our
2309 * patience could withstand */
2310 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2311 return -EIO;
2312}
2313
2314
2315/*****************************************************************************
2316 *
2317 * Workqueue callbacks
2318 *
2319 *****************************************************************************/
2320
4a4a9e81 2321static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2322{
c79dd5b5
TW
2323 struct iwl_priv *priv =
2324 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2325
2326 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2327 return;
2328
2329 mutex_lock(&priv->mutex);
f3ccc08c 2330 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY
2331 mutex_unlock(&priv->mutex);
2332}
2333
4a4a9e81 2334static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2335{
c79dd5b5
TW
2336 struct iwl_priv *priv =
2337 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2338
2339 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2340 return;
2341
2342 mutex_lock(&priv->mutex);
4a4a9e81 2343 iwl_alive_start(priv);
b481de9c
ZY
2344 mutex_unlock(&priv->mutex);
2345}
2346
bb8c093b 2347static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 2348{
c79dd5b5 2349 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
2350
2351 wake_up_interruptible(&priv->wait_command_queue);
2352
2353 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2354 return;
2355
2356 mutex_lock(&priv->mutex);
2357
fee1247a 2358 if (!iwl_is_rfkill(priv)) {
f3d67999 2359 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY
2360 "HW and/or SW RF Kill no longer active, restarting "
2361 "device\n");
2362 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2363 queue_work(priv->workqueue, &priv->restart);
2364 } else {
ad97edd2
MA
2365 /* make sure mac80211 stop sending Tx frame */
2366 if (priv->mac80211_registered)
2367 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2368
2369 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2370 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2371 "disabled by SW switch\n");
2372 else
2373 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2374 "Kill switch must be turned off for "
2375 "wireless networking to work.\n");
2376 }
2377 mutex_unlock(&priv->mutex);
80fcc9e2 2378 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2379}
2380
4419e39b
AK
2381static void iwl4965_bg_set_monitor(struct work_struct *work)
2382{
2383 struct iwl_priv *priv = container_of(work,
2384 struct iwl_priv, set_monitor);
c46fbefa 2385 int ret;
4419e39b
AK
2386
2387 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
2388
2389 mutex_lock(&priv->mutex);
2390
c46fbefa
AK
2391 ret = iwl4965_set_mode(priv, IEEE80211_IF_TYPE_MNTR);
2392
2393 if (ret) {
2394 if (ret == -EAGAIN)
2395 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
2396 else
2397 IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret);
2398 }
4419e39b
AK
2399
2400 mutex_unlock(&priv->mutex);
2401}
2402
16e727e8
EG
2403static void iwl_bg_run_time_calib_work(struct work_struct *work)
2404{
2405 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2406 run_time_calib_work);
2407
2408 mutex_lock(&priv->mutex);
2409
2410 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2411 test_bit(STATUS_SCANNING, &priv->status)) {
2412 mutex_unlock(&priv->mutex);
2413 return;
2414 }
2415
2416 if (priv->start_calib) {
2417 iwl_chain_noise_calibration(priv, &priv->statistics);
2418
2419 iwl_sensitivity_calibration(priv, &priv->statistics);
2420 }
2421
2422 mutex_unlock(&priv->mutex);
2423 return;
2424}
2425
bb8c093b 2426static void iwl4965_bg_up(struct work_struct *data)
b481de9c 2427{
c79dd5b5 2428 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2429
2430 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2431 return;
2432
2433 mutex_lock(&priv->mutex);
bb8c093b 2434 __iwl4965_up(priv);
b481de9c 2435 mutex_unlock(&priv->mutex);
80fcc9e2 2436 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2437}
2438
bb8c093b 2439static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 2440{
c79dd5b5 2441 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2442
2443 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2444 return;
2445
bb8c093b 2446 iwl4965_down(priv);
b481de9c
ZY
2447 queue_work(priv->workqueue, &priv->up);
2448}
2449
bb8c093b 2450static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 2451{
c79dd5b5
TW
2452 struct iwl_priv *priv =
2453 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2454
2455 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2456 return;
2457
2458 mutex_lock(&priv->mutex);
a55360e4 2459 iwl_rx_replenish(priv);
b481de9c
ZY
2460 mutex_unlock(&priv->mutex);
2461}
2462
7878a5a4
MA
2463#define IWL_DELAY_NEXT_SCAN (HZ*2)
2464
508e32e1 2465static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 2466{
b481de9c 2467 struct ieee80211_conf *conf = NULL;
857485c0 2468 int ret = 0;
0795af57 2469 DECLARE_MAC_BUF(mac);
1ff50bda 2470 unsigned long flags;
b481de9c
ZY
2471
2472 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
3ac7f146 2473 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
2474 return;
2475 }
2476
0795af57
JP
2477 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
2478 priv->assoc_id,
2479 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY
2480
2481
2482 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2483 return;
2484
b481de9c 2485
508e32e1 2486 if (!priv->vif || !priv->is_open)
948c171c 2487 return;
508e32e1 2488
2a421b91 2489 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2490
b481de9c
ZY
2491 conf = ieee80211_get_hw_conf(priv->hw);
2492
2493 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2494 iwl4965_commit_rxon(priv);
b481de9c 2495
bb8c093b
CH
2496 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2497 iwl4965_setup_rxon_timing(priv);
857485c0 2498 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2499 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2500 if (ret)
b481de9c
ZY
2501 IWL_WARNING("REPLY_RXON_TIMING failed - "
2502 "Attempting to continue.\n");
2503
2504 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2505
fd105e79 2506 if (priv->current_ht_config.is_ht)
47c5196e 2507 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2508
c7de35cd 2509 iwl_set_rxon_chain(priv);
b481de9c
ZY
2510 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2511
2512 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2513 priv->assoc_id, priv->beacon_int);
2514
2515 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2516 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2517 else
2518 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2519
2520 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2521 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2522 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2523 else
2524 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2525
2526 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2527 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2528
2529 }
2530
bb8c093b 2531 iwl4965_commit_rxon(priv);
b481de9c
ZY
2532
2533 switch (priv->iw_mode) {
2534 case IEEE80211_IF_TYPE_STA:
b481de9c
ZY
2535 break;
2536
2537 case IEEE80211_IF_TYPE_IBSS:
2538
c46fbefa
AK
2539 /* assume default assoc id */
2540 priv->assoc_id = 1;
b481de9c 2541
4f40e4d9 2542 iwl_rxon_add_station(priv, priv->bssid, 0);
bb8c093b 2543 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2544
2545 break;
2546
2547 default:
2548 IWL_ERROR("%s Should not be called in %d mode\n",
3ac7f146 2549 __func__, priv->iw_mode);
b481de9c
ZY
2550 break;
2551 }
2552
b481de9c 2553 /* Enable Rx differential gain and sensitivity calibrations */
f0832f13 2554 iwl_chain_noise_reset(priv);
b481de9c 2555 priv->start_calib = 1;
b481de9c
ZY
2556
2557 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2558 priv->assoc_station_added = 1;
2559
1ff50bda
EG
2560 spin_lock_irqsave(&priv->lock, flags);
2561 iwl_activate_qos(priv, 0);
2562 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2563
5da4b55f 2564 iwl_power_update_mode(priv, 0);
7878a5a4
MA
2565 /* we have just associated, don't start scan too early */
2566 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
508e32e1
RC
2567}
2568
76bb77e0
ZY
2569static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
2570
2a421b91 2571static void iwl_bg_scan_completed(struct work_struct *work)
b481de9c 2572{
c79dd5b5
TW
2573 struct iwl_priv *priv =
2574 container_of(work, struct iwl_priv, scan_completed);
b481de9c 2575
630fe9b6 2576 IWL_DEBUG_SCAN("SCAN complete scan\n");
b481de9c
ZY
2577
2578 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2579 return;
2580
a0646470
ZY
2581 if (test_bit(STATUS_CONF_PENDING, &priv->status))
2582 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 2583
b481de9c
ZY
2584 ieee80211_scan_completed(priv->hw);
2585
2586 /* Since setting the TXPOWER may have been deferred while
2587 * performing the scan, fire one off */
2588 mutex_lock(&priv->mutex);
630fe9b6 2589 iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
b481de9c
ZY
2590 mutex_unlock(&priv->mutex);
2591}
2592
2593/*****************************************************************************
2594 *
2595 * mac80211 entry point functions
2596 *
2597 *****************************************************************************/
2598
154b25ce 2599#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2600
bb8c093b 2601static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 2602{
c79dd5b5 2603 struct iwl_priv *priv = hw->priv;
5a66926a 2604 int ret;
cf88c433 2605 u16 pci_cmd;
b481de9c
ZY
2606
2607 IWL_DEBUG_MAC80211("enter\n");
2608
5a66926a
ZY
2609 if (pci_enable_device(priv->pci_dev)) {
2610 IWL_ERROR("Fail to pci_enable_device\n");
2611 return -ENODEV;
2612 }
2613 pci_restore_state(priv->pci_dev);
2614 pci_enable_msi(priv->pci_dev);
2615
cf88c433
TW
2616 /* enable interrupts if needed: hw bug w/a */
2617 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2618 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2619 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2620 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2621 }
2622
5a66926a
ZY
2623 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
2624 DRV_NAME, priv);
2625 if (ret) {
2626 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2627 goto out_disable_msi;
2628 }
2629
b481de9c
ZY
2630 /* we should be verifying the device is ready to be opened */
2631 mutex_lock(&priv->mutex);
2632
c1adf9fb 2633 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY
2634 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2635 * ucode filename and max sizes are card-specific. */
b481de9c 2636
5a66926a
ZY
2637 if (!priv->ucode_code.len) {
2638 ret = iwl4965_read_ucode(priv);
2639 if (ret) {
2640 IWL_ERROR("Could not read microcode: %d\n", ret);
2641 mutex_unlock(&priv->mutex);
2642 goto out_release_irq;
2643 }
2644 }
b481de9c 2645
e655b9f0 2646 ret = __iwl4965_up(priv);
5a66926a 2647
b481de9c 2648 mutex_unlock(&priv->mutex);
5a66926a 2649
80fcc9e2
AG
2650 iwl_rfkill_set_hw_state(priv);
2651
e655b9f0
ZY
2652 if (ret)
2653 goto out_release_irq;
2654
c1842d61
TW
2655 if (iwl_is_rfkill(priv))
2656 goto out;
2657
e655b9f0
ZY
2658 IWL_DEBUG_INFO("Start UP work done.\n");
2659
2660 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2661 return 0;
2662
fe9b6b72 2663 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2664 * mac80211 will not be run successfully. */
154b25ce
EG
2665 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2666 test_bit(STATUS_READY, &priv->status),
2667 UCODE_READY_TIMEOUT);
2668 if (!ret) {
2669 if (!test_bit(STATUS_READY, &priv->status)) {
2670 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2671 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2672 ret = -ETIMEDOUT;
2673 goto out_release_irq;
5a66926a 2674 }
fe9b6b72 2675 }
0a078ffa 2676
c1842d61 2677out:
0a078ffa 2678 priv->is_open = 1;
b481de9c
ZY
2679 IWL_DEBUG_MAC80211("leave\n");
2680 return 0;
5a66926a
ZY
2681
2682out_release_irq:
2683 free_irq(priv->pci_dev->irq, priv);
2684out_disable_msi:
2685 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
2686 pci_disable_device(priv->pci_dev);
2687 priv->is_open = 0;
2688 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2689 return ret;
b481de9c
ZY
2690}
2691
bb8c093b 2692static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 2693{
c79dd5b5 2694 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2695
2696 IWL_DEBUG_MAC80211("enter\n");
948c171c 2697
e655b9f0
ZY
2698 if (!priv->is_open) {
2699 IWL_DEBUG_MAC80211("leave - skip\n");
2700 return;
2701 }
2702
b481de9c 2703 priv->is_open = 0;
5a66926a 2704
fee1247a 2705 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
2706 /* stop mac, cancel any scan request and clear
2707 * RXON_FILTER_ASSOC_MSK BIT
2708 */
5a66926a 2709 mutex_lock(&priv->mutex);
2a421b91 2710 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2711 mutex_unlock(&priv->mutex);
fde3571f
MA
2712 }
2713
5a66926a
ZY
2714 iwl4965_down(priv);
2715
2716 flush_workqueue(priv->workqueue);
2717 free_irq(priv->pci_dev->irq, priv);
2718 pci_disable_msi(priv->pci_dev);
2719 pci_save_state(priv->pci_dev);
2720 pci_disable_device(priv->pci_dev);
948c171c 2721
b481de9c 2722 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2723}
2724
e039fa4a 2725static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2726{
c79dd5b5 2727 struct iwl_priv *priv = hw->priv;
b481de9c 2728
f3674227 2729 IWL_DEBUG_MACDUMP("enter\n");
b481de9c
ZY
2730
2731 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2732 IWL_DEBUG_MAC80211("leave - monitor\n");
6afe6828
ZY
2733 dev_kfree_skb_any(skb);
2734 return 0;
b481de9c
ZY
2735 }
2736
2737 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2738 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2739
e039fa4a 2740 if (iwl_tx_skb(priv, skb))
b481de9c
ZY
2741 dev_kfree_skb_any(skb);
2742
f3674227 2743 IWL_DEBUG_MACDUMP("leave\n");
b481de9c
ZY
2744 return 0;
2745}
2746
bb8c093b 2747static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2748 struct ieee80211_if_init_conf *conf)
2749{
c79dd5b5 2750 struct iwl_priv *priv = hw->priv;
b481de9c 2751 unsigned long flags;
0795af57 2752 DECLARE_MAC_BUF(mac);
b481de9c 2753
32bfd35d 2754 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2755
32bfd35d
JB
2756 if (priv->vif) {
2757 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2758 return -EOPNOTSUPP;
b481de9c
ZY
2759 }
2760
2761 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2762 priv->vif = conf->vif;
b481de9c
ZY
2763
2764 spin_unlock_irqrestore(&priv->lock, flags);
2765
2766 mutex_lock(&priv->mutex);
864792e3
TW
2767
2768 if (conf->mac_addr) {
2769 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
2770 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2771 }
b481de9c 2772
c46fbefa
AK
2773 if (iwl4965_set_mode(priv, conf->type) == -EAGAIN)
2774 /* we are not ready, will run again when ready */
2775 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2776
b481de9c
ZY
2777 mutex_unlock(&priv->mutex);
2778
5a66926a 2779 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2780 return 0;
2781}
2782
2783/**
bb8c093b 2784 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
2785 *
2786 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2787 * be set inappropriately and the driver currently sets the hardware up to
2788 * use it whenever needed.
2789 */
bb8c093b 2790static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 2791{
c79dd5b5 2792 struct iwl_priv *priv = hw->priv;
bf85ea4f 2793 const struct iwl_channel_info *ch_info;
b481de9c 2794 unsigned long flags;
76bb77e0 2795 int ret = 0;
82a66bbb 2796 u16 channel;
b481de9c
ZY
2797
2798 mutex_lock(&priv->mutex);
8318d78a 2799 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2800
12342c47
ZY
2801 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2802
14a08a7f 2803 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2804 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2805 goto out;
64e72c3e
MA
2806 }
2807
14a08a7f
EG
2808 if (!conf->radio_enabled)
2809 iwl_radio_kill_sw_disable_radio(priv);
2810
fee1247a 2811 if (!iwl_is_ready(priv)) {
b481de9c 2812 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
2813 ret = -EIO;
2814 goto out;
b481de9c
ZY
2815 }
2816
1ea87396 2817 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2818 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY
2819 IWL_DEBUG_MAC80211("leave - scanning\n");
2820 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 2821 mutex_unlock(&priv->mutex);
a0646470 2822 return 0;
b481de9c
ZY
2823 }
2824
82a66bbb
TW
2825 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2826 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2827 if (!is_channel_valid(ch_info)) {
b481de9c 2828 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY
2829 ret = -EINVAL;
2830 goto out;
b481de9c
ZY
2831 }
2832
398f9e76
AK
2833 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
2834 !is_channel_ibss(ch_info)) {
2835 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2836 conf->channel->hw_value, conf->channel->band);
2837 ret = -EINVAL;
2838 goto out;
2839 }
2840
82a66bbb
TW
2841 spin_lock_irqsave(&priv->lock, flags);
2842
b5d7be5e 2843
78330fdd 2844 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
2845 * from any ht related info since 2.4 does not
2846 * support ht */
82a66bbb 2847 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY
2848#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2849 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2850#endif
2851 )
2852 priv->staging_rxon.flags = 0;
b481de9c 2853
82a66bbb 2854 iwl_set_rxon_channel(priv, conf->channel->band, channel);
b481de9c 2855
82a66bbb 2856 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
2857
2858 /* The list of supported rates and rate mask can be different
8318d78a 2859 * for each band; since the band may have changed, reset
b481de9c 2860 * the rate mask to what mac80211 lists */
bb8c093b 2861 iwl4965_set_rate(priv);
b481de9c
ZY
2862
2863 spin_unlock_irqrestore(&priv->lock, flags);
2864
2865#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2866 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 2867 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 2868 goto out;
b481de9c
ZY
2869 }
2870#endif
2871
b481de9c
ZY
2872 if (!conf->radio_enabled) {
2873 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2874 goto out;
b481de9c
ZY
2875 }
2876
fee1247a 2877 if (iwl_is_rfkill(priv)) {
b481de9c 2878 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
2879 ret = -EIO;
2880 goto out;
b481de9c
ZY
2881 }
2882
630fe9b6
TW
2883 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2884 priv->tx_power_user_lmt, conf->power_level);
2885
2886 iwl_set_tx_power(priv, conf->power_level, false);
2887
bb8c093b 2888 iwl4965_set_rate(priv);
b481de9c
ZY
2889
2890 if (memcmp(&priv->active_rxon,
2891 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 2892 iwl4965_commit_rxon(priv);
b481de9c
ZY
2893 else
2894 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2895
2896 IWL_DEBUG_MAC80211("leave\n");
2897
a0646470
ZY
2898out:
2899 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 2900 mutex_unlock(&priv->mutex);
76bb77e0 2901 return ret;
b481de9c
ZY
2902}
2903
c79dd5b5 2904static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 2905{
857485c0 2906 int ret = 0;
1ff50bda 2907 unsigned long flags;
b481de9c 2908
d986bcd1 2909 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
2910 return;
2911
2912 /* The following should be done only at AP bring up */
5d1e2325 2913 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
2914
2915 /* RXON - unassoc (to set timing command) */
2916 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2917 iwl4965_commit_rxon(priv);
b481de9c
ZY
2918
2919 /* RXON Timing */
bb8c093b
CH
2920 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2921 iwl4965_setup_rxon_timing(priv);
857485c0 2922 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2923 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2924 if (ret)
b481de9c
ZY
2925 IWL_WARNING("REPLY_RXON_TIMING failed - "
2926 "Attempting to continue.\n");
2927
c7de35cd 2928 iwl_set_rxon_chain(priv);
b481de9c
ZY
2929
2930 /* FIXME: what should be the assoc_id for AP? */
2931 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2932 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2933 priv->staging_rxon.flags |=
2934 RXON_FLG_SHORT_PREAMBLE_MSK;
2935 else
2936 priv->staging_rxon.flags &=
2937 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2938
2939 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2940 if (priv->assoc_capability &
2941 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2942 priv->staging_rxon.flags |=
2943 RXON_FLG_SHORT_SLOT_MSK;
2944 else
2945 priv->staging_rxon.flags &=
2946 ~RXON_FLG_SHORT_SLOT_MSK;
2947
2948 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2949 priv->staging_rxon.flags &=
2950 ~RXON_FLG_SHORT_SLOT_MSK;
2951 }
2952 /* restore RXON assoc */
2953 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 2954 iwl4965_commit_rxon(priv);
1ff50bda
EG
2955 spin_lock_irqsave(&priv->lock, flags);
2956 iwl_activate_qos(priv, 1);
2957 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2958 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2959 }
bb8c093b 2960 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2961
2962 /* FIXME - we need to add code here to detect a totally new
2963 * configuration, reset the AP, unassoc, rxon timing, assoc,
2964 * clear sta table, add BCAST sta... */
2965}
2966
9d139c81
JB
2967/* temporary */
2968static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb);
2969
32bfd35d
JB
2970static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
2971 struct ieee80211_vif *vif,
b481de9c
ZY
2972 struct ieee80211_if_conf *conf)
2973{
c79dd5b5 2974 struct iwl_priv *priv = hw->priv;
0795af57 2975 DECLARE_MAC_BUF(mac);
b481de9c
ZY
2976 unsigned long flags;
2977 int rc;
2978
2979 if (conf == NULL)
2980 return -EIO;
2981
b716bb91
EG
2982 if (priv->vif != vif) {
2983 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
2984 return 0;
2985 }
2986
9d139c81
JB
2987 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
2988 conf->changed & IEEE80211_IFCC_BEACON) {
2989 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2990 if (!beacon)
2991 return -ENOMEM;
2992 rc = iwl4965_mac_beacon_update(hw, beacon);
2993 if (rc)
2994 return rc;
2995 }
2996
b481de9c 2997 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
9d139c81 2998 (!conf->ssid_len)) {
b481de9c
ZY
2999 IWL_DEBUG_MAC80211
3000 ("Leaving in AP mode because HostAPD is not ready.\n");
3001 return 0;
3002 }
3003
fee1247a 3004 if (!iwl_is_alive(priv))
5a66926a
ZY
3005 return -EAGAIN;
3006
b481de9c
ZY
3007 mutex_lock(&priv->mutex);
3008
b481de9c 3009 if (conf->bssid)
0795af57
JP
3010 IWL_DEBUG_MAC80211("bssid: %s\n",
3011 print_mac(mac, conf->bssid));
b481de9c 3012
4150c572
JB
3013/*
3014 * very dubious code was here; the probe filtering flag is never set:
3015 *
b481de9c
ZY
3016 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
3017 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 3018 */
b481de9c
ZY
3019
3020 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
3021 if (!conf->bssid) {
3022 conf->bssid = priv->mac_addr;
3023 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP
3024 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
3025 print_mac(mac, conf->bssid));
b481de9c
ZY
3026 }
3027 if (priv->ibss_beacon)
3028 dev_kfree_skb(priv->ibss_beacon);
3029
9d139c81 3030 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
3031 }
3032
fee1247a 3033 if (iwl_is_rfkill(priv))
fde3571f
MA
3034 goto done;
3035
b481de9c
ZY
3036 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
3037 !is_multicast_ether_addr(conf->bssid)) {
3038 /* If there is currently a HW scan going on in the background
3039 * then we need to cancel it else the RXON below will fail. */
2a421b91 3040 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
3041 IWL_WARNING("Aborted scan still in progress "
3042 "after 100ms\n");
3043 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
3044 mutex_unlock(&priv->mutex);
3045 return -EAGAIN;
3046 }
3047 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
3048
3049 /* TODO: Audit driver for usage of these members and see
3050 * if mac80211 deprecates them (priv->bssid looks like it
3051 * shouldn't be there, but I haven't scanned the IBSS code
3052 * to verify) - jpk */
3053 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
3054
3055 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 3056 iwl4965_config_ap(priv);
b481de9c 3057 else {
bb8c093b 3058 rc = iwl4965_commit_rxon(priv);
b481de9c 3059 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
4f40e4d9 3060 iwl_rxon_add_station(
b481de9c
ZY
3061 priv, priv->active_rxon.bssid_addr, 1);
3062 }
3063
3064 } else {
2a421b91 3065 iwl_scan_cancel_timeout(priv, 100);
b481de9c 3066 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3067 iwl4965_commit_rxon(priv);
b481de9c
ZY
3068 }
3069
fde3571f 3070 done:
b481de9c
ZY
3071 spin_lock_irqsave(&priv->lock, flags);
3072 if (!conf->ssid_len)
3073 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3074 else
3075 memcpy(priv->essid, conf->ssid, conf->ssid_len);
3076
3077 priv->essid_len = conf->ssid_len;
3078 spin_unlock_irqrestore(&priv->lock, flags);
3079
3080 IWL_DEBUG_MAC80211("leave\n");
3081 mutex_unlock(&priv->mutex);
3082
3083 return 0;
3084}
3085
bb8c093b 3086static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
3087 unsigned int changed_flags,
3088 unsigned int *total_flags,
3089 int mc_count, struct dev_addr_list *mc_list)
3090{
4419e39b 3091 struct iwl_priv *priv = hw->priv;
25b3f57c
RF
3092
3093 if (changed_flags & (*total_flags) & FIF_OTHER_BSS) {
3094 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
3095 IEEE80211_IF_TYPE_MNTR,
3096 changed_flags, *total_flags);
3097 /* queue work 'cuz mac80211 is holding a lock which
3098 * prevents us from issuing (synchronous) f/w cmds */
3099 queue_work(priv->workqueue, &priv->set_monitor);
4419e39b 3100 }
25b3f57c
RF
3101 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI |
3102 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4150c572
JB
3103}
3104
bb8c093b 3105static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3106 struct ieee80211_if_init_conf *conf)
3107{
c79dd5b5 3108 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3109
3110 IWL_DEBUG_MAC80211("enter\n");
3111
3112 mutex_lock(&priv->mutex);
948c171c 3113
fee1247a 3114 if (iwl_is_ready_rf(priv)) {
2a421b91 3115 iwl_scan_cancel_timeout(priv, 100);
fde3571f
MA
3116 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3117 iwl4965_commit_rxon(priv);
3118 }
32bfd35d
JB
3119 if (priv->vif == conf->vif) {
3120 priv->vif = NULL;
b481de9c
ZY
3121 memset(priv->bssid, 0, ETH_ALEN);
3122 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3123 priv->essid_len = 0;
3124 }
3125 mutex_unlock(&priv->mutex);
3126
3127 IWL_DEBUG_MAC80211("leave\n");
3128
3129}
471b3efd 3130
3109ece1 3131#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB
3132static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
3133 struct ieee80211_vif *vif,
3134 struct ieee80211_bss_conf *bss_conf,
3135 u32 changes)
220173b0 3136{
c79dd5b5 3137 struct iwl_priv *priv = hw->priv;
220173b0 3138
3109ece1
TW
3139 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
3140
471b3efd 3141 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
3142 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
3143 bss_conf->use_short_preamble);
471b3efd 3144 if (bss_conf->use_short_preamble)
220173b0
TW
3145 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3146 else
3147 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3148 }
3149
471b3efd 3150 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 3151 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 3152 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
3153 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
3154 else
3155 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
3156 }
3157
98952d5d 3158 if (changes & BSS_CHANGED_HT) {
3109ece1 3159 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d 3160 iwl4965_ht_conf(priv, bss_conf);
c7de35cd 3161 iwl_set_rxon_chain(priv);
98952d5d
TW
3162 }
3163
471b3efd 3164 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 3165 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
3166 /* This should never happen as this function should
3167 * never be called from interrupt context. */
3168 if (WARN_ON_ONCE(in_interrupt()))
3169 return;
3109ece1
TW
3170 if (bss_conf->assoc) {
3171 priv->assoc_id = bss_conf->aid;
3172 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 3173 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW
3174 priv->timestamp = bss_conf->timestamp;
3175 priv->assoc_capability = bss_conf->assoc_capability;
3176 priv->next_scan_jiffies = jiffies +
3177 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC
3178 mutex_lock(&priv->mutex);
3179 iwl4965_post_associate(priv);
3180 mutex_unlock(&priv->mutex);
3109ece1
TW
3181 } else {
3182 priv->assoc_id = 0;
3183 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
3184 }
3185 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
3186 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 3187 iwl_send_rxon_assoc(priv);
471b3efd
JB
3188 }
3189
220173b0 3190}
b481de9c 3191
bb8c093b 3192static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY
3193{
3194 int rc = 0;
3195 unsigned long flags;
c79dd5b5 3196 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3197
3198 IWL_DEBUG_MAC80211("enter\n");
3199
052c4b9f 3200 mutex_lock(&priv->mutex);
b481de9c
ZY
3201 spin_lock_irqsave(&priv->lock, flags);
3202
fee1247a 3203 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3204 rc = -EIO;
3205 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
3206 goto out_unlock;
3207 }
3208
3209 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
3210 rc = -EIO;
3211 IWL_ERROR("ERROR: APs don't scan\n");
3212 goto out_unlock;
3213 }
3214
7878a5a4
MA
3215 /* we don't schedule scan within next_scan_jiffies period */
3216 if (priv->next_scan_jiffies &&
3217 time_after(priv->next_scan_jiffies, jiffies)) {
3218 rc = -EAGAIN;
3219 goto out_unlock;
3220 }
b481de9c 3221 /* if we just finished scan ask for delay */
7878a5a4
MA
3222 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
3223 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY
3224 rc = -EAGAIN;
3225 goto out_unlock;
3226 }
3227 if (len) {
7878a5a4 3228 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
2a421b91 3229 iwl_escape_essid(ssid, len), (int)len);
b481de9c
ZY
3230
3231 priv->one_direct_scan = 1;
3232 priv->direct_ssid_len = (u8)
3233 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
3234 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA
3235 } else
3236 priv->one_direct_scan = 0;
b481de9c 3237
2a421b91 3238 rc = iwl_scan_initiate(priv);
b481de9c
ZY
3239
3240 IWL_DEBUG_MAC80211("leave\n");
3241
3242out_unlock:
3243 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3244 mutex_unlock(&priv->mutex);
b481de9c
ZY
3245
3246 return rc;
3247}
3248
ab885f8c
EG
3249static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
3250 struct ieee80211_key_conf *keyconf, const u8 *addr,
3251 u32 iv32, u16 *phase1key)
3252{
3253 struct iwl_priv *priv = hw->priv;
3254 u8 sta_id = IWL_INVALID_STATION;
3255 unsigned long flags;
3256 __le16 key_flags = 0;
3257 int i;
3258 DECLARE_MAC_BUF(mac);
3259
3260 IWL_DEBUG_MAC80211("enter\n");
3261
947b13a7 3262 sta_id = iwl_find_station(priv, addr);
ab885f8c
EG
3263 if (sta_id == IWL_INVALID_STATION) {
3264 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3265 print_mac(mac, addr));
3266 return;
3267 }
3268
2a421b91 3269 iwl_scan_cancel_timeout(priv, 100);
ab885f8c
EG
3270
3271 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
3272 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3273 key_flags &= ~STA_KEY_FLG_INVALID;
3274
5425e490 3275 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG
3276 key_flags |= STA_KEY_MULTICAST_MSK;
3277
3278 spin_lock_irqsave(&priv->sta_lock, flags);
3279
ab885f8c
EG
3280 priv->stations[sta_id].sta.key.key_flags = key_flags;
3281 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
3282
3283 for (i = 0; i < 5; i++)
3284 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3285 cpu_to_le16(phase1key[i]);
3286
3287 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3288 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3289
133636de 3290 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
ab885f8c
EG
3291
3292 spin_unlock_irqrestore(&priv->sta_lock, flags);
3293
3294 IWL_DEBUG_MAC80211("leave\n");
3295}
3296
bb8c093b 3297static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
3298 const u8 *local_addr, const u8 *addr,
3299 struct ieee80211_key_conf *key)
3300{
c79dd5b5 3301 struct iwl_priv *priv = hw->priv;
0795af57 3302 DECLARE_MAC_BUF(mac);
deb09c43
EG
3303 int ret = 0;
3304 u8 sta_id = IWL_INVALID_STATION;
6974e363 3305 u8 is_default_wep_key = 0;
b481de9c
ZY
3306
3307 IWL_DEBUG_MAC80211("enter\n");
3308
099b40b7 3309 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
3310 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3311 return -EOPNOTSUPP;
3312 }
3313
3314 if (is_zero_ether_addr(addr))
3315 /* only support pairwise keys */
3316 return -EOPNOTSUPP;
3317
947b13a7 3318 sta_id = iwl_find_station(priv, addr);
6974e363
EG
3319 if (sta_id == IWL_INVALID_STATION) {
3320 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3321 print_mac(mac, addr));
3322 return -EINVAL;
b481de9c 3323
deb09c43 3324 }
b481de9c 3325
6974e363 3326 mutex_lock(&priv->mutex);
2a421b91 3327 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG
3328 mutex_unlock(&priv->mutex);
3329
3330 /* If we are getting WEP group key and we didn't receive any key mapping
3331 * so far, we are in legacy wep mode (group key only), otherwise we are
3332 * in 1X mode.
3333 * In legacy wep mode, we use another host command to the uCode */
5425e490 3334 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
6974e363
EG
3335 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3336 if (cmd == SET_KEY)
3337 is_default_wep_key = !priv->key_mapping_key;
3338 else
ccc038ab
EG
3339 is_default_wep_key =
3340 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3341 }
052c4b9f 3342
b481de9c 3343 switch (cmd) {
deb09c43 3344 case SET_KEY:
6974e363
EG
3345 if (is_default_wep_key)
3346 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3347 else
7480513f 3348 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
3349
3350 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
3351 break;
3352 case DISABLE_KEY:
6974e363
EG
3353 if (is_default_wep_key)
3354 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3355 else
3ec47732 3356 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
3357
3358 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
3359 break;
3360 default:
deb09c43 3361 ret = -EINVAL;
b481de9c
ZY
3362 }
3363
3364 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3365
deb09c43 3366 return ret;
b481de9c
ZY
3367}
3368
e100bb64 3369static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
3370 const struct ieee80211_tx_queue_params *params)
3371{
c79dd5b5 3372 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3373 unsigned long flags;
3374 int q;
b481de9c
ZY
3375
3376 IWL_DEBUG_MAC80211("enter\n");
3377
fee1247a 3378 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3379 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3380 return -EIO;
3381 }
3382
3383 if (queue >= AC_NUM) {
3384 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3385 return 0;
3386 }
3387
b481de9c
ZY
3388 if (!priv->qos_data.qos_enable) {
3389 priv->qos_data.qos_active = 0;
3390 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
3391 return 0;
3392 }
3393 q = AC_NUM - 1 - queue;
3394
3395 spin_lock_irqsave(&priv->lock, flags);
3396
3397 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3398 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3399 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3400 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3401 cpu_to_le16((params->txop * 32));
b481de9c
ZY
3402
3403 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3404 priv->qos_data.qos_active = 1;
3405
b481de9c 3406 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
1ff50bda 3407 iwl_activate_qos(priv, 1);
3109ece1 3408 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 3409 iwl_activate_qos(priv, 0);
b481de9c 3410
1ff50bda 3411 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3412
b481de9c
ZY
3413 IWL_DEBUG_MAC80211("leave\n");
3414 return 0;
3415}
3416
d783b061
TW
3417static int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3418 enum ieee80211_ampdu_mlme_action action,
3419 const u8 *addr, u16 tid, u16 *ssn)
3420{
3421 struct iwl_priv *priv = hw->priv;
3422 DECLARE_MAC_BUF(mac);
3423
3424 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3425 print_mac(mac, addr), tid);
3426
3427 if (!(priv->cfg->sku & IWL_SKU_N))
3428 return -EACCES;
3429
3430 switch (action) {
3431 case IEEE80211_AMPDU_RX_START:
3432 IWL_DEBUG_HT("start Rx\n");
3433 return iwl_rx_agg_start(priv, addr, tid, *ssn);
3434 case IEEE80211_AMPDU_RX_STOP:
3435 IWL_DEBUG_HT("stop Rx\n");
3436 return iwl_rx_agg_stop(priv, addr, tid);
3437 case IEEE80211_AMPDU_TX_START:
3438 IWL_DEBUG_HT("start Tx\n");
3439 return iwl_tx_agg_start(priv, addr, tid, ssn);
3440 case IEEE80211_AMPDU_TX_STOP:
3441 IWL_DEBUG_HT("stop Tx\n");
3442 return iwl_tx_agg_stop(priv, addr, tid);
3443 default:
3444 IWL_DEBUG_HT("unknown\n");
3445 return -EINVAL;
3446 break;
3447 }
3448 return 0;
3449}
bb8c093b 3450static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3451 struct ieee80211_tx_queue_stats *stats)
3452{
c79dd5b5 3453 struct iwl_priv *priv = hw->priv;
b481de9c 3454 int i, avail;
16466903 3455 struct iwl_tx_queue *txq;
443cfd45 3456 struct iwl_queue *q;
b481de9c
ZY
3457 unsigned long flags;
3458
3459 IWL_DEBUG_MAC80211("enter\n");
3460
fee1247a 3461 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3462 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3463 return -EIO;
3464 }
3465
3466 spin_lock_irqsave(&priv->lock, flags);
3467
3468 for (i = 0; i < AC_NUM; i++) {
3469 txq = &priv->txq[i];
3470 q = &txq->q;
443cfd45 3471 avail = iwl_queue_space(q);
b481de9c 3472
57ffc589
JB
3473 stats[i].len = q->n_window - avail;
3474 stats[i].limit = q->n_window - q->high_mark;
3475 stats[i].count = q->n_window;
b481de9c
ZY
3476
3477 }
3478 spin_unlock_irqrestore(&priv->lock, flags);
3479
3480 IWL_DEBUG_MAC80211("leave\n");
3481
3482 return 0;
3483}
3484
bb8c093b 3485static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3486 struct ieee80211_low_level_stats *stats)
3487{
bf403db8
EK
3488 struct iwl_priv *priv = hw->priv;
3489
3490 priv = hw->priv;
b481de9c
ZY
3491 IWL_DEBUG_MAC80211("enter\n");
3492 IWL_DEBUG_MAC80211("leave\n");
3493
3494 return 0;
3495}
3496
bb8c093b 3497static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3498{
c79dd5b5 3499 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3500 unsigned long flags;
3501
3502 mutex_lock(&priv->mutex);
3503 IWL_DEBUG_MAC80211("enter\n");
3504
b481de9c 3505 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3506 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3507 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3508
c7de35cd 3509 iwl_reset_qos(priv);
b481de9c 3510
b481de9c
ZY
3511 spin_lock_irqsave(&priv->lock, flags);
3512 priv->assoc_id = 0;
3513 priv->assoc_capability = 0;
b481de9c
ZY
3514 priv->assoc_station_added = 0;
3515
3516 /* new association get rid of ibss beacon skb */
3517 if (priv->ibss_beacon)
3518 dev_kfree_skb(priv->ibss_beacon);
3519
3520 priv->ibss_beacon = NULL;
3521
3522 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3523 priv->timestamp = 0;
b481de9c
ZY
3524 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
3525 priv->beacon_int = 0;
3526
3527 spin_unlock_irqrestore(&priv->lock, flags);
3528
fee1247a 3529 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
3530 IWL_DEBUG_MAC80211("leave - not ready\n");
3531 mutex_unlock(&priv->mutex);
3532 return;
3533 }
3534
052c4b9f 3535 /* we are restarting association process
3536 * clear RXON_FILTER_ASSOC_MSK bit
3537 */
3538 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2a421b91 3539 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3540 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3541 iwl4965_commit_rxon(priv);
052c4b9f 3542 }
3543
5da4b55f
MA
3544 iwl_power_update_mode(priv, 0);
3545
b481de9c
ZY
3546 /* Per mac80211.h: This is only used in IBSS mode... */
3547 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 3548
b481de9c
ZY
3549 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3550 mutex_unlock(&priv->mutex);
3551 return;
3552 }
3553
bb8c093b 3554 iwl4965_set_rate(priv);
b481de9c
ZY
3555
3556 mutex_unlock(&priv->mutex);
3557
3558 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
3559}
3560
e039fa4a 3561static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3562{
c79dd5b5 3563 struct iwl_priv *priv = hw->priv;
b481de9c 3564 unsigned long flags;
2ff75b78 3565 __le64 timestamp;
b481de9c
ZY
3566
3567 mutex_lock(&priv->mutex);
3568 IWL_DEBUG_MAC80211("enter\n");
3569
fee1247a 3570 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3571 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3572 mutex_unlock(&priv->mutex);
3573 return -EIO;
3574 }
3575
3576 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
3577 IWL_DEBUG_MAC80211("leave - not IBSS\n");
3578 mutex_unlock(&priv->mutex);
3579 return -EIO;
3580 }
3581
3582 spin_lock_irqsave(&priv->lock, flags);
3583
3584 if (priv->ibss_beacon)
3585 dev_kfree_skb(priv->ibss_beacon);
3586
3587 priv->ibss_beacon = skb;
3588
3589 priv->assoc_id = 0;
2ff75b78 3590 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 3591 priv->timestamp = le64_to_cpu(timestamp);
b481de9c
ZY
3592
3593 IWL_DEBUG_MAC80211("leave\n");
3594 spin_unlock_irqrestore(&priv->lock, flags);
3595
c7de35cd 3596 iwl_reset_qos(priv);
b481de9c 3597
c46fbefa 3598 iwl4965_post_associate(priv);
b481de9c
ZY
3599
3600 mutex_unlock(&priv->mutex);
3601
3602 return 0;
3603}
3604
b481de9c
ZY
3605/*****************************************************************************
3606 *
3607 * sysfs attributes
3608 *
3609 *****************************************************************************/
3610
0a6857e7 3611#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3612
3613/*
3614 * The following adds a new attribute to the sysfs representation
3615 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3616 * used for controlling the debug level.
3617 *
3618 * See the level definitions in iwl for details.
3619 */
3620
8cf769c6
EK
3621static ssize_t show_debug_level(struct device *d,
3622 struct device_attribute *attr, char *buf)
b481de9c 3623{
8cf769c6
EK
3624 struct iwl_priv *priv = d->driver_data;
3625
3626 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3627}
8cf769c6
EK
3628static ssize_t store_debug_level(struct device *d,
3629 struct device_attribute *attr,
b481de9c
ZY
3630 const char *buf, size_t count)
3631{
8cf769c6 3632 struct iwl_priv *priv = d->driver_data;
b481de9c
ZY
3633 char *p = (char *)buf;
3634 u32 val;
3635
3636 val = simple_strtoul(p, &p, 0);
3637 if (p == buf)
3638 printk(KERN_INFO DRV_NAME
3639 ": %s is not in hex or decimal form.\n", buf);
3640 else
8cf769c6 3641 priv->debug_level = val;
b481de9c
ZY
3642
3643 return strnlen(buf, count);
3644}
3645
8cf769c6
EK
3646static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3647 show_debug_level, store_debug_level);
3648
b481de9c 3649
0a6857e7 3650#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3651
b481de9c 3652
bc6f59bc
TW
3653static ssize_t show_version(struct device *d,
3654 struct device_attribute *attr, char *buf)
3655{
3656 struct iwl_priv *priv = d->driver_data;
885ba202 3657 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW
3658 ssize_t pos = 0;
3659 u16 eeprom_ver;
bc6f59bc
TW
3660
3661 if (palive->is_valid)
f236a265
TW
3662 pos += sprintf(buf + pos,
3663 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3664 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW
3665 palive->ucode_major, palive->ucode_minor,
3666 palive->sw_rev[0], palive->sw_rev[1],
3667 palive->ver_type, palive->ver_subtype);
bc6f59bc 3668 else
f236a265
TW
3669 pos += sprintf(buf + pos, "fw not loaded\n");
3670
3671 if (priv->eeprom) {
3672 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3673 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3674 eeprom_ver);
3675 } else {
3676 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3677 }
3678
3679 return pos;
bc6f59bc
TW
3680}
3681
3682static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3683
b481de9c
ZY
3684static ssize_t show_temperature(struct device *d,
3685 struct device_attribute *attr, char *buf)
3686{
c79dd5b5 3687 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3688
fee1247a 3689 if (!iwl_is_alive(priv))
b481de9c
ZY
3690 return -EAGAIN;
3691
91dbc5bd 3692 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY
3693}
3694
3695static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3696
b481de9c
ZY
3697static ssize_t show_tx_power(struct device *d,
3698 struct device_attribute *attr, char *buf)
3699{
c79dd5b5 3700 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
630fe9b6 3701 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3702}
3703
3704static ssize_t store_tx_power(struct device *d,
3705 struct device_attribute *attr,
3706 const char *buf, size_t count)
3707{
c79dd5b5 3708 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3709 char *p = (char *)buf;
3710 u32 val;
3711
3712 val = simple_strtoul(p, &p, 10);
3713 if (p == buf)
3714 printk(KERN_INFO DRV_NAME
3715 ": %s is not in decimal form.\n", buf);
3716 else
630fe9b6 3717 iwl_set_tx_power(priv, val, false);
b481de9c
ZY
3718
3719 return count;
3720}
3721
3722static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3723
3724static ssize_t show_flags(struct device *d,
3725 struct device_attribute *attr, char *buf)
3726{
c79dd5b5 3727 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3728
3729 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3730}
3731
3732static ssize_t store_flags(struct device *d,
3733 struct device_attribute *attr,
3734 const char *buf, size_t count)
3735{
c79dd5b5 3736 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3737 u32 flags = simple_strtoul(buf, NULL, 0);
3738
3739 mutex_lock(&priv->mutex);
3740 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3741 /* Cancel any currently running scans... */
2a421b91 3742 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3743 IWL_WARNING("Could not cancel scan.\n");
3744 else {
3745 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
3746 flags);
3747 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 3748 iwl4965_commit_rxon(priv);
b481de9c
ZY
3749 }
3750 }
3751 mutex_unlock(&priv->mutex);
3752
3753 return count;
3754}
3755
3756static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3757
3758static ssize_t show_filter_flags(struct device *d,
3759 struct device_attribute *attr, char *buf)
3760{
c79dd5b5 3761 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3762
3763 return sprintf(buf, "0x%04X\n",
3764 le32_to_cpu(priv->active_rxon.filter_flags));
3765}
3766
3767static ssize_t store_filter_flags(struct device *d,
3768 struct device_attribute *attr,
3769 const char *buf, size_t count)
3770{
c79dd5b5 3771 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3772 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3773
3774 mutex_lock(&priv->mutex);
3775 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3776 /* Cancel any currently running scans... */
2a421b91 3777 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3778 IWL_WARNING("Could not cancel scan.\n");
3779 else {
3780 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3781 "0x%04X\n", filter_flags);
3782 priv->staging_rxon.filter_flags =
3783 cpu_to_le32(filter_flags);
bb8c093b 3784 iwl4965_commit_rxon(priv);
b481de9c
ZY
3785 }
3786 }
3787 mutex_unlock(&priv->mutex);
3788
3789 return count;
3790}
3791
3792static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3793 store_filter_flags);
3794
4fc22b21 3795#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
3796
3797static ssize_t show_measurement(struct device *d,
3798 struct device_attribute *attr, char *buf)
3799{
c79dd5b5 3800 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 3801 struct iwl4965_spectrum_notification measure_report;
b481de9c 3802 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 3803 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
3804 unsigned long flags;
3805
3806 spin_lock_irqsave(&priv->lock, flags);
3807 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3808 spin_unlock_irqrestore(&priv->lock, flags);
3809 return 0;
3810 }
3811 memcpy(&measure_report, &priv->measure_report, size);
3812 priv->measurement_status = 0;
3813 spin_unlock_irqrestore(&priv->lock, flags);
3814
3815 while (size && (PAGE_SIZE - len)) {
3816 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3817 PAGE_SIZE - len, 1);
3818 len = strlen(buf);
3819 if (PAGE_SIZE - len)
3820 buf[len++] = '\n';
3821
3822 ofs += 16;
3823 size -= min(size, 16U);
3824 }
3825
3826 return len;
3827}
3828
3829static ssize_t store_measurement(struct device *d,
3830 struct device_attribute *attr,
3831 const char *buf, size_t count)
3832{
c79dd5b5 3833 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3834 struct ieee80211_measurement_params params = {
3835 .channel = le16_to_cpu(priv->active_rxon.channel),
3836 .start_time = cpu_to_le64(priv->last_tsf),
3837 .duration = cpu_to_le16(1),
3838 };
3839 u8 type = IWL_MEASURE_BASIC;
3840 u8 buffer[32];
3841 u8 channel;
3842
3843 if (count) {
3844 char *p = buffer;
3845 strncpy(buffer, buf, min(sizeof(buffer), count));
3846 channel = simple_strtoul(p, NULL, 0);
3847 if (channel)
3848 params.channel = channel;
3849
3850 p = buffer;
3851 while (*p && *p != ' ')
3852 p++;
3853 if (*p)
3854 type = simple_strtoul(p + 1, NULL, 0);
3855 }
3856
3857 IWL_DEBUG_INFO("Invoking measurement of type %d on "
3858 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 3859 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
3860
3861 return count;
3862}
3863
3864static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3865 show_measurement, store_measurement);
4fc22b21 3866#endif /* CONFIG_IWLAGN_SPECTRUM_MEASUREMENT */
b481de9c
ZY
3867
3868static ssize_t store_retry_rate(struct device *d,
3869 struct device_attribute *attr,
3870 const char *buf, size_t count)
3871{
c79dd5b5 3872 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3873
3874 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3875 if (priv->retry_rate <= 0)
3876 priv->retry_rate = 1;
3877
3878 return count;
3879}
3880
3881static ssize_t show_retry_rate(struct device *d,
3882 struct device_attribute *attr, char *buf)
3883{
c79dd5b5 3884 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3885 return sprintf(buf, "%d", priv->retry_rate);
3886}
3887
3888static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3889 store_retry_rate);
3890
3891static ssize_t store_power_level(struct device *d,
3892 struct device_attribute *attr,
3893 const char *buf, size_t count)
3894{
c79dd5b5 3895 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3896 int ret;
b481de9c
ZY
3897 int mode;
3898
3899 mode = simple_strtoul(buf, NULL, 0);
3900 mutex_lock(&priv->mutex);
3901
fee1247a 3902 if (!iwl_is_ready(priv)) {
298df1f6 3903 ret = -EAGAIN;
b481de9c
ZY
3904 goto out;
3905 }
3906
298df1f6
EK
3907 ret = iwl_power_set_user_mode(priv, mode);
3908 if (ret) {
5da4b55f
MA
3909 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3910 goto out;
b481de9c 3911 }
298df1f6 3912 ret = count;
b481de9c
ZY
3913
3914 out:
3915 mutex_unlock(&priv->mutex);
298df1f6 3916 return ret;
b481de9c
ZY
3917}
3918
b481de9c
ZY
3919static ssize_t show_power_level(struct device *d,
3920 struct device_attribute *attr, char *buf)
3921{
c79dd5b5 3922 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK
3923 int mode = priv->power_data.user_power_setting;
3924 int system = priv->power_data.system_power_setting;
5da4b55f 3925 int level = priv->power_data.power_mode;
b481de9c
ZY
3926 char *p = buf;
3927
298df1f6
EK
3928 switch (system) {
3929 case IWL_POWER_SYS_AUTO:
3930 p += sprintf(p, "SYSTEM:auto");
b481de9c 3931 break;
298df1f6
EK
3932 case IWL_POWER_SYS_AC:
3933 p += sprintf(p, "SYSTEM:ac");
3934 break;
3935 case IWL_POWER_SYS_BATTERY:
3936 p += sprintf(p, "SYSTEM:battery");
b481de9c 3937 break;
b481de9c 3938 }
298df1f6
EK
3939
3940 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto");
3941 p += sprintf(p, "\tINDEX:%d", level);
3942 p += sprintf(p, "\n");
3ac7f146 3943 return p - buf + 1;
b481de9c
ZY
3944}
3945
3946static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3947 store_power_level);
3948
3949static ssize_t show_channels(struct device *d,
3950 struct device_attribute *attr, char *buf)
3951{
5d72a1f5
EK
3952
3953 struct iwl_priv *priv = dev_get_drvdata(d);
3954 struct ieee80211_channel *channels = NULL;
3955 const struct ieee80211_supported_band *supp_band = NULL;
3956 int len = 0, i;
3957 int count = 0;
3958
3959 if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status))
3960 return -EAGAIN;
3961
3962 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
3963 channels = supp_band->channels;
3964 count = supp_band->n_channels;
3965
3966 len += sprintf(&buf[len],
3967 "Displaying %d channels in 2.4GHz band "
3968 "(802.11bg):\n", count);
3969
3970 for (i = 0; i < count; i++)
3971 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3972 ieee80211_frequency_to_channel(
3973 channels[i].center_freq),
3974 channels[i].max_power,
3975 channels[i].flags & IEEE80211_CHAN_RADAR ?
3976 " (IEEE 802.11h required)" : "",
3977 (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3978 || (channels[i].flags &
3979 IEEE80211_CHAN_RADAR)) ? "" :
3980 ", IBSS",
3981 channels[i].flags &
3982 IEEE80211_CHAN_PASSIVE_SCAN ?
3983 "passive only" : "active/passive");
3984
3985 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
3986 channels = supp_band->channels;
3987 count = supp_band->n_channels;
3988
3989 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
3990 "(802.11a):\n", count);
3991
3992 for (i = 0; i < count; i++)
3993 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3994 ieee80211_frequency_to_channel(
3995 channels[i].center_freq),
3996 channels[i].max_power,
3997 channels[i].flags & IEEE80211_CHAN_RADAR ?
3998 " (IEEE 802.11h required)" : "",
3999 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
4000 || (channels[i].flags &
4001 IEEE80211_CHAN_RADAR)) ? "" :
4002 ", IBSS",
4003 channels[i].flags &
4004 IEEE80211_CHAN_PASSIVE_SCAN ?
4005 "passive only" : "active/passive");
4006
4007 return len;
b481de9c
ZY
4008}
4009
4010static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
4011
4012static ssize_t show_statistics(struct device *d,
4013 struct device_attribute *attr, char *buf)
4014{
c79dd5b5 4015 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 4016 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 4017 u32 len = 0, ofs = 0;
3ac7f146 4018 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY
4019 int rc = 0;
4020
fee1247a 4021 if (!iwl_is_alive(priv))
b481de9c
ZY
4022 return -EAGAIN;
4023
4024 mutex_lock(&priv->mutex);
49ea8596 4025 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
4026 mutex_unlock(&priv->mutex);
4027
4028 if (rc) {
4029 len = sprintf(buf,
4030 "Error sending statistics request: 0x%08X\n", rc);
4031 return len;
4032 }
4033
4034 while (size && (PAGE_SIZE - len)) {
4035 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4036 PAGE_SIZE - len, 1);
4037 len = strlen(buf);
4038 if (PAGE_SIZE - len)
4039 buf[len++] = '\n';
4040
4041 ofs += 16;
4042 size -= min(size, 16U);
4043 }
4044
4045 return len;
4046}
4047
4048static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4049
b481de9c
ZY
4050static ssize_t show_status(struct device *d,
4051 struct device_attribute *attr, char *buf)
4052{
c79dd5b5 4053 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 4054 if (!iwl_is_alive(priv))
b481de9c
ZY
4055 return -EAGAIN;
4056 return sprintf(buf, "0x%08x\n", (int)priv->status);
4057}
4058
4059static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4060
b481de9c
ZY
4061/*****************************************************************************
4062 *
4063 * driver setup and teardown
4064 *
4065 *****************************************************************************/
4066
4e39317d 4067static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
4068{
4069 priv->workqueue = create_workqueue(DRV_NAME);
4070
4071 init_waitqueue_head(&priv->wait_command_queue);
4072
bb8c093b
CH
4073 INIT_WORK(&priv->up, iwl4965_bg_up);
4074 INIT_WORK(&priv->restart, iwl4965_bg_restart);
4075 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
bb8c093b
CH
4076 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
4077 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
4419e39b 4078 INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor);
16e727e8 4079 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW
4080 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
4081 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91
TW
4082
4083 /* FIXME : remove when resolved PENDING */
4084 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
4085 iwl_setup_scan_deferred_work(priv);
bb8c093b 4086
4e39317d
EG
4087 if (priv->cfg->ops->lib->setup_deferred_work)
4088 priv->cfg->ops->lib->setup_deferred_work(priv);
4089
4090 init_timer(&priv->statistics_periodic);
4091 priv->statistics_periodic.data = (unsigned long)priv;
4092 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
b481de9c
ZY
4093
4094 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 4095 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
4096}
4097
4e39317d 4098static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 4099{
4e39317d
EG
4100 if (priv->cfg->ops->lib->cancel_deferred_work)
4101 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 4102
3ae6a054 4103 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
4104 cancel_delayed_work(&priv->scan_check);
4105 cancel_delayed_work(&priv->alive_start);
b481de9c 4106 cancel_work_sync(&priv->beacon_update);
4e39317d 4107 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY
4108}
4109
bb8c093b 4110static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c 4111 &dev_attr_channels.attr,
b481de9c
ZY
4112 &dev_attr_flags.attr,
4113 &dev_attr_filter_flags.attr,
4fc22b21 4114#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
4115 &dev_attr_measurement.attr,
4116#endif
4117 &dev_attr_power_level.attr,
4118 &dev_attr_retry_rate.attr,
b481de9c
ZY
4119 &dev_attr_statistics.attr,
4120 &dev_attr_status.attr,
4121 &dev_attr_temperature.attr,
b481de9c 4122 &dev_attr_tx_power.attr,
8cf769c6
EK
4123#ifdef CONFIG_IWLWIFI_DEBUG
4124 &dev_attr_debug_level.attr,
4125#endif
bc6f59bc 4126 &dev_attr_version.attr,
b481de9c
ZY
4127
4128 NULL
4129};
4130
bb8c093b 4131static struct attribute_group iwl4965_attribute_group = {
b481de9c 4132 .name = NULL, /* put in device directory */
bb8c093b 4133 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
4134};
4135
bb8c093b
CH
4136static struct ieee80211_ops iwl4965_hw_ops = {
4137 .tx = iwl4965_mac_tx,
4138 .start = iwl4965_mac_start,
4139 .stop = iwl4965_mac_stop,
4140 .add_interface = iwl4965_mac_add_interface,
4141 .remove_interface = iwl4965_mac_remove_interface,
4142 .config = iwl4965_mac_config,
4143 .config_interface = iwl4965_mac_config_interface,
4144 .configure_filter = iwl4965_configure_filter,
4145 .set_key = iwl4965_mac_set_key,
ab885f8c 4146 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH
4147 .get_stats = iwl4965_mac_get_stats,
4148 .get_tx_stats = iwl4965_mac_get_tx_stats,
4149 .conf_tx = iwl4965_mac_conf_tx,
bb8c093b 4150 .reset_tsf = iwl4965_mac_reset_tsf,
471b3efd 4151 .bss_info_changed = iwl4965_bss_info_changed,
9ab46173 4152 .ampdu_action = iwl4965_mac_ampdu_action,
bb8c093b 4153 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY
4154};
4155
bb8c093b 4156static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
4157{
4158 int err = 0;
c79dd5b5 4159 struct iwl_priv *priv;
b481de9c 4160 struct ieee80211_hw *hw;
82b9a121 4161 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 4162 unsigned long flags;
5a66926a 4163 DECLARE_MAC_BUF(mac);
b481de9c 4164
316c30d9
AK
4165 /************************
4166 * 1. Allocating HW data
4167 ************************/
4168
6440adb5
CB
4169 /* Disabling hardware scan means that mac80211 will perform scans
4170 * "the hard way", rather than using device's scan. */
1ea87396 4171 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK
4172 if (cfg->mod_params->debug & IWL_DL_INFO)
4173 dev_printk(KERN_DEBUG, &(pdev->dev),
4174 "Disabling hw_scan\n");
bb8c093b 4175 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
4176 }
4177
1d0a082d
AK
4178 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
4179 if (!hw) {
b481de9c
ZY
4180 err = -ENOMEM;
4181 goto out;
4182 }
1d0a082d
AK
4183 priv = hw->priv;
4184 /* At this point both hw and priv are allocated. */
4185
b481de9c
ZY
4186 SET_IEEE80211_DEV(hw, &pdev->dev);
4187
4188 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 4189 priv->cfg = cfg;
b481de9c 4190 priv->pci_dev = pdev;
316c30d9 4191
0a6857e7 4192#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 4193 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
4194 atomic_set(&priv->restrict_refcnt, 0);
4195#endif
b481de9c 4196
316c30d9
AK
4197 /**************************
4198 * 2. Initializing PCI bus
4199 **************************/
4200 if (pci_enable_device(pdev)) {
4201 err = -ENODEV;
4202 goto out_ieee80211_free_hw;
4203 }
4204
4205 pci_set_master(pdev);
4206
cc2a8ea8 4207 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
316c30d9 4208 if (!err)
cc2a8ea8
RR
4209 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4210 if (err) {
4211 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4212 if (!err)
4213 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4214 /* both attempts failed: */
316c30d9 4215 if (err) {
cc2a8ea8
RR
4216 printk(KERN_WARNING "%s: No suitable DMA available.\n",
4217 DRV_NAME);
316c30d9 4218 goto out_pci_disable_device;
cc2a8ea8 4219 }
316c30d9
AK
4220 }
4221
4222 err = pci_request_regions(pdev, DRV_NAME);
4223 if (err)
4224 goto out_pci_disable_device;
4225
4226 pci_set_drvdata(pdev, priv);
4227
4228 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4229 * PCI Tx retries from interfering with C3 CPU state */
4230 pci_write_config_byte(pdev, 0x41, 0x00);
4231
4232 /***********************
4233 * 3. Read REV register
4234 ***********************/
4235 priv->hw_base = pci_iomap(pdev, 0, 0);
4236 if (!priv->hw_base) {
4237 err = -ENODEV;
4238 goto out_pci_release_regions;
4239 }
4240
4241 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
4242 (unsigned long long) pci_resource_len(pdev, 0));
4243 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
4244
b661c819 4245 iwl_hw_detect(priv);
316c30d9 4246 printk(KERN_INFO DRV_NAME
b661c819
TW
4247 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
4248 priv->cfg->name, priv->hw_rev);
316c30d9 4249
91238714
TW
4250 /* amp init */
4251 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 4252 if (err < 0) {
91238714 4253 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK
4254 goto out_iounmap;
4255 }
91238714
TW
4256 /*****************
4257 * 4. Read EEPROM
4258 *****************/
316c30d9
AK
4259 /* Read the EEPROM */
4260 err = iwl_eeprom_init(priv);
4261 if (err) {
4262 IWL_ERROR("Unable to init EEPROM\n");
4263 goto out_iounmap;
4264 }
8614f360
TW
4265 err = iwl_eeprom_check_version(priv);
4266 if (err)
4267 goto out_iounmap;
4268
02883017 4269 /* extract MAC Address */
316c30d9
AK
4270 iwl_eeprom_get_mac(priv, priv->mac_addr);
4271 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
4272 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4273
4274 /************************
4275 * 5. Setup HW constants
4276 ************************/
da154e30 4277 if (iwl_set_hw_params(priv)) {
5425e490 4278 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 4279 goto out_free_eeprom;
316c30d9
AK
4280 }
4281
4282 /*******************
6ba87956 4283 * 6. Setup priv
316c30d9 4284 *******************/
b481de9c 4285
6ba87956 4286 err = iwl_init_drv(priv);
bf85ea4f 4287 if (err)
399f4900 4288 goto out_free_eeprom;
bf85ea4f 4289 /* At this point both hw and priv are initialized. */
316c30d9
AK
4290
4291 /**********************************
4292 * 7. Initialize module parameters
4293 **********************************/
4294
4295 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 4296 if (priv->cfg->mod_params->disable) {
316c30d9
AK
4297 set_bit(STATUS_RF_KILL_SW, &priv->status);
4298 IWL_DEBUG_INFO("Radio disabled.\n");
4299 }
4300
316c30d9
AK
4301 /********************
4302 * 8. Setup services
4303 ********************/
0359facc 4304 spin_lock_irqsave(&priv->lock, flags);
316c30d9 4305 iwl4965_disable_interrupts(priv);
0359facc 4306 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK
4307
4308 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4309 if (err) {
4310 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 4311 goto out_uninit_drv;
316c30d9
AK
4312 }
4313
316c30d9 4314
4e39317d 4315 iwl_setup_deferred_work(priv);
653fa4a0 4316 iwl_setup_rx_handlers(priv);
316c30d9
AK
4317
4318 /********************
4319 * 9. Conclude
4320 ********************/
5a66926a
ZY
4321 pci_save_state(pdev);
4322 pci_disable_device(pdev);
b481de9c 4323
6ba87956
TW
4324 /**********************************
4325 * 10. Setup and register mac80211
4326 **********************************/
4327
4328 err = iwl_setup_mac(priv);
4329 if (err)
4330 goto out_remove_sysfs;
4331
4332 err = iwl_dbgfs_register(priv, DRV_NAME);
4333 if (err)
4334 IWL_ERROR("failed to create debugfs files\n");
4335
58d0f361
EG
4336 err = iwl_rfkill_init(priv);
4337 if (err)
4338 IWL_ERROR("Unable to initialize RFKILL system. "
4339 "Ignoring error: %d\n", err);
4340 iwl_power_initialize(priv);
b481de9c
ZY
4341 return 0;
4342
316c30d9
AK
4343 out_remove_sysfs:
4344 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
6ba87956
TW
4345 out_uninit_drv:
4346 iwl_uninit_drv(priv);
073d3f5f
TW
4347 out_free_eeprom:
4348 iwl_eeprom_free(priv);
b481de9c
ZY
4349 out_iounmap:
4350 pci_iounmap(pdev, priv->hw_base);
4351 out_pci_release_regions:
4352 pci_release_regions(pdev);
316c30d9 4353 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
4354 out_pci_disable_device:
4355 pci_disable_device(pdev);
b481de9c
ZY
4356 out_ieee80211_free_hw:
4357 ieee80211_free_hw(priv->hw);
4358 out:
4359 return err;
4360}
4361
c83dbf68 4362static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 4363{
c79dd5b5 4364 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4365 unsigned long flags;
b481de9c
ZY
4366
4367 if (!priv)
4368 return;
4369
4370 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
4371
67249625
EG
4372 iwl_dbgfs_unregister(priv);
4373 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4374
c4f55232
RR
4375 if (priv->mac80211_registered) {
4376 ieee80211_unregister_hw(priv->hw);
4377 priv->mac80211_registered = 0;
4378 }
4379
b481de9c 4380 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 4381
bb8c093b 4382 iwl4965_down(priv);
b481de9c 4383
0359facc
MA
4384 /* make sure we flush any pending irq or
4385 * tasklet for the driver
4386 */
4387 spin_lock_irqsave(&priv->lock, flags);
4388 iwl4965_disable_interrupts(priv);
4389 spin_unlock_irqrestore(&priv->lock, flags);
4390
4391 iwl_synchronize_irq(priv);
4392
58d0f361 4393 iwl_rfkill_unregister(priv);
bb8c093b 4394 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
4395
4396 if (priv->rxq.bd)
a55360e4 4397 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 4398 iwl_hw_txq_ctx_free(priv);
b481de9c 4399
37deb2a0 4400 iwl_clear_stations_table(priv);
073d3f5f 4401 iwl_eeprom_free(priv);
b481de9c 4402
b481de9c 4403
948c171c
MA
4404 /*netif_stop_queue(dev); */
4405 flush_workqueue(priv->workqueue);
4406
bb8c093b 4407 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
4408 * priv->workqueue... so we can't take down the workqueue
4409 * until now... */
4410 destroy_workqueue(priv->workqueue);
4411 priv->workqueue = NULL;
4412
b481de9c
ZY
4413 pci_iounmap(pdev, priv->hw_base);
4414 pci_release_regions(pdev);
4415 pci_disable_device(pdev);
4416 pci_set_drvdata(pdev, NULL);
4417
6ba87956 4418 iwl_uninit_drv(priv);
b481de9c
ZY
4419
4420 if (priv->ibss_beacon)
4421 dev_kfree_skb(priv->ibss_beacon);
4422
4423 ieee80211_free_hw(priv->hw);
4424}
4425
4426#ifdef CONFIG_PM
4427
bb8c093b 4428static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 4429{
c79dd5b5 4430 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4431
e655b9f0
ZY
4432 if (priv->is_open) {
4433 set_bit(STATUS_IN_SUSPEND, &priv->status);
4434 iwl4965_mac_stop(priv->hw);
4435 priv->is_open = 1;
4436 }
b481de9c 4437
b481de9c
ZY
4438 pci_set_power_state(pdev, PCI_D3hot);
4439
b481de9c
ZY
4440 return 0;
4441}
4442
bb8c093b 4443static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 4444{
c79dd5b5 4445 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4446
b481de9c 4447 pci_set_power_state(pdev, PCI_D0);
b481de9c 4448
e655b9f0
ZY
4449 if (priv->is_open)
4450 iwl4965_mac_start(priv->hw);
b481de9c 4451
e655b9f0 4452 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
4453 return 0;
4454}
4455
4456#endif /* CONFIG_PM */
4457
4458/*****************************************************************************
4459 *
4460 * driver and module entry point
4461 *
4462 *****************************************************************************/
4463
fed9017e
RR
4464/* Hardware specific file defines the PCI IDs table for that hardware module */
4465static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 4466#ifdef CONFIG_IWL4965
fed9017e
RR
4467 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4468 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 4469#endif /* CONFIG_IWL4965 */
5a6a256e 4470#ifdef CONFIG_IWL5000
47408639
EK
4471 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
4472 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
4473 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
4474 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
4475 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
4476 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 4477 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK
4478 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4479 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
4480 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
5a6a256e
TW
4481 {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)},
4482#endif /* CONFIG_IWL5000 */
fed9017e
RR
4483 {0}
4484};
4485MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4486
4487static struct pci_driver iwl_driver = {
b481de9c 4488 .name = DRV_NAME,
fed9017e 4489 .id_table = iwl_hw_card_ids,
bb8c093b
CH
4490 .probe = iwl4965_pci_probe,
4491 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 4492#ifdef CONFIG_PM
bb8c093b
CH
4493 .suspend = iwl4965_pci_suspend,
4494 .resume = iwl4965_pci_resume,
b481de9c
ZY
4495#endif
4496};
4497
bb8c093b 4498static int __init iwl4965_init(void)
b481de9c
ZY
4499{
4500
4501 int ret;
4502 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4503 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 4504
e227ceac 4505 ret = iwlagn_rate_control_register();
897e1cf2
RC
4506 if (ret) {
4507 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4508 return ret;
4509 }
4510
fed9017e 4511 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
4512 if (ret) {
4513 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4514 goto error_register;
b481de9c 4515 }
b481de9c
ZY
4516
4517 return ret;
897e1cf2 4518
897e1cf2 4519error_register:
e227ceac 4520 iwlagn_rate_control_unregister();
897e1cf2 4521 return ret;
b481de9c
ZY
4522}
4523
bb8c093b 4524static void __exit iwl4965_exit(void)
b481de9c 4525{
fed9017e 4526 pci_unregister_driver(&iwl_driver);
e227ceac 4527 iwlagn_rate_control_unregister();
b481de9c
ZY
4528}
4529
bb8c093b
CH
4530module_exit(iwl4965_exit);
4531module_init(iwl4965_init);
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