pktgen: multiqueue etc.
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
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41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
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44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
3e0d4cb1 49#include "iwl-dev.h"
fee1247a 50#include "iwl-core.h"
3395f6e9 51#include "iwl-io.h"
b481de9c 52#include "iwl-helpers.h"
6974e363 53#include "iwl-sta.h"
f0832f13 54#include "iwl-calib.h"
b481de9c 55
416e1438 56
b481de9c
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57/******************************************************************************
58 *
59 * module boiler plate
60 *
61 ******************************************************************************/
62
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63/*
64 * module name, copyright, version, etc.
65 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
66 */
67
d783b061 68#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 69
0a6857e7 70#ifdef CONFIG_IWLWIFI_DEBUG
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71#define VD "d"
72#else
73#define VD
74#endif
75
4fc22b21 76#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
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77#define VS "s"
78#else
79#define VS
80#endif
81
df48c323 82#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
87MODULE_AUTHOR(DRV_COPYRIGHT);
88MODULE_LICENSE("GPL");
4fc22b21 89MODULE_ALIAS("iwl4965");
b481de9c 90
b481de9c 91/*************** STATION TABLE MANAGEMENT ****
9fbab516 92 * mac80211 should be examined to determine if sta_info is duplicating
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93 * the functionality provided here
94 */
95
96/**************************************************************/
97
b481de9c 98
b481de9c 99
deb09c43
EG
100static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
101{
c1adf9fb 102 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG
103
104 if (hw_decrypt)
105 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
106 else
107 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
108
109}
110
b481de9c 111/**
bb8c093b 112 * iwl4965_check_rxon_cmd - validate RXON structure is valid
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113 *
114 * NOTE: This is really only useful during development and can eventually
115 * be #ifdef'd out once the driver is stable and folks aren't actively
116 * making changes
117 */
c1adf9fb 118static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
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119{
120 int error = 0;
121 int counter = 1;
122
123 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
124 error |= le32_to_cpu(rxon->flags &
125 (RXON_FLG_TGJ_NARROW_BAND_MSK |
126 RXON_FLG_RADAR_DETECT_MSK));
127 if (error)
128 IWL_WARNING("check 24G fields %d | %d\n",
129 counter++, error);
130 } else {
131 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
132 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
133 if (error)
134 IWL_WARNING("check 52 fields %d | %d\n",
135 counter++, error);
136 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
137 if (error)
138 IWL_WARNING("check 52 CCK %d | %d\n",
139 counter++, error);
140 }
141 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
142 if (error)
143 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
144
145 /* make sure basic rates 6Mbps and 1Mbps are supported */
146 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
147 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
148 if (error)
149 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
150
151 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
152 if (error)
153 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
154
155 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
156 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
157 if (error)
158 IWL_WARNING("check CCK and short slot %d | %d\n",
159 counter++, error);
160
161 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
162 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
163 if (error)
164 IWL_WARNING("check CCK & auto detect %d | %d\n",
165 counter++, error);
166
167 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
168 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
169 if (error)
170 IWL_WARNING("check TGG and auto detect %d | %d\n",
171 counter++, error);
172
173 if (error)
174 IWL_WARNING("Tuning to channel %d\n",
175 le16_to_cpu(rxon->channel));
176
177 if (error) {
bb8c093b 178 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
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179 return -1;
180 }
181 return 0;
182}
183
184/**
9fbab516 185 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 186 * @priv: staging_rxon is compared to active_rxon
b481de9c 187 *
9fbab516
BC
188 * If the RXON structure is changing enough to require a new tune,
189 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
190 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 191 */
c79dd5b5 192static int iwl4965_full_rxon_required(struct iwl_priv *priv)
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193{
194
195 /* These items are only settable from the full RXON command */
5d1e2325 196 if (!(iwl_is_associated(priv)) ||
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197 compare_ether_addr(priv->staging_rxon.bssid_addr,
198 priv->active_rxon.bssid_addr) ||
199 compare_ether_addr(priv->staging_rxon.node_addr,
200 priv->active_rxon.node_addr) ||
201 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
202 priv->active_rxon.wlap_bssid_addr) ||
203 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
204 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
205 (priv->staging_rxon.air_propagation !=
206 priv->active_rxon.air_propagation) ||
207 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
208 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
209 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
210 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
211 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
212 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
213 return 1;
214
215 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
216 * be updated with the RXON_ASSOC command -- however only some
217 * flag transitions are allowed using RXON_ASSOC */
218
219 /* Check if we are not switching bands */
220 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
221 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
222 return 1;
223
224 /* Check if we are switching association toggle */
225 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
226 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
227 return 1;
228
229 return 0;
230}
231
b481de9c 232/**
bb8c093b 233 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 234 *
01ebd063 235 * The RXON command in staging_rxon is committed to the hardware and
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236 * the active_rxon structure is updated with the new data. This
237 * function correctly transitions out of the RXON_ASSOC_MSK state if
238 * a HW tune is required based on the RXON structure changes.
239 */
c79dd5b5 240static int iwl4965_commit_rxon(struct iwl_priv *priv)
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241{
242 /* cast away the const for active_rxon in this function */
c1adf9fb 243 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 244 DECLARE_MAC_BUF(mac);
43d59b32
EG
245 int ret;
246 bool new_assoc =
247 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 248
fee1247a 249 if (!iwl_is_alive(priv))
43d59b32 250 return -EBUSY;
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251
252 /* always get timestamp with Rx frame */
253 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG
254 /* allow CTS-to-self if possible. this is relevant only for
255 * 5000, but will not damage 4965 */
256 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 257
43d59b32
EG
258 ret = iwl4965_check_rxon_cmd(&priv->staging_rxon);
259 if (ret) {
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260 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
261 return -EINVAL;
262 }
263
264 /* If we don't need to send a full RXON, we can use
bb8c093b 265 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 266 * and other flags for the current radio configuration. */
bb8c093b 267 if (!iwl4965_full_rxon_required(priv)) {
43d59b32
EG
268 ret = iwl_send_rxon_assoc(priv);
269 if (ret) {
270 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
271 return ret;
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272 }
273
274 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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275 return 0;
276 }
277
278 /* station table will be cleared */
279 priv->assoc_station_added = 0;
280
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281 /* If we are currently associated and the new config requires
282 * an RXON_ASSOC and the new config wants the associated mask enabled,
283 * we must clear the associated from the active configuration
284 * before we apply the new config */
43d59b32 285 if (iwl_is_associated(priv) && new_assoc) {
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286 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
287 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
288
43d59b32 289 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 290 sizeof(struct iwl_rxon_cmd),
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291 &priv->active_rxon);
292
293 /* If the mask clearing failed then we set
294 * active_rxon back to what it was previously */
43d59b32 295 if (ret) {
b481de9c 296 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG
297 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
298 return ret;
b481de9c 299 }
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300 }
301
302 IWL_DEBUG_INFO("Sending RXON\n"
303 "* with%s RXON_FILTER_ASSOC_MSK\n"
304 "* channel = %d\n"
0795af57 305 "* bssid = %s\n",
43d59b32 306 (new_assoc ? "" : "out"),
b481de9c 307 le16_to_cpu(priv->staging_rxon.channel),
0795af57 308 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 309
099b40b7 310 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG
311
312 /* Apply the new configuration
313 * RXON unassoc clears the station table in uCode, send it before
314 * we add the bcast station. If assoc bit is set, we will send RXON
315 * after having added the bcast and bssid station.
316 */
317 if (!new_assoc) {
318 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 319 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG
320 if (ret) {
321 IWL_ERROR("Error setting new RXON (%d)\n", ret);
322 return ret;
323 }
324 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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325 }
326
37deb2a0 327 iwl_clear_stations_table(priv);
556f8db7 328
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329 if (!priv->error_recovering)
330 priv->start_calib = 0;
331
b481de9c 332 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 333 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 334 IWL_INVALID_STATION) {
b481de9c
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335 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
336 return -EIO;
337 }
338
339 /* If we have set the ASSOC_MSK and we are in BSS mode then
340 * add the IWL_AP_ID to the station rate table */
9185159d
TW
341 if (new_assoc) {
342 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
343 ret = iwl_rxon_add_station(priv,
344 priv->active_rxon.bssid_addr, 1);
345 if (ret == IWL_INVALID_STATION) {
346 IWL_ERROR("Error adding AP address for TX.\n");
347 return -EIO;
348 }
349 priv->assoc_station_added = 1;
350 if (priv->default_wep_key &&
351 iwl_send_static_wepkey_cmd(priv, 0))
352 IWL_ERROR("Could not send WEP static key.\n");
b481de9c 353 }
43d59b32
EG
354
355 /* Apply the new configuration
356 * RXON assoc doesn't clear the station table in uCode,
357 */
358 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
359 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
360 if (ret) {
361 IWL_ERROR("Error setting new RXON (%d)\n", ret);
362 return ret;
363 }
364 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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365 }
366
36da7d70
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367 iwl_init_sensitivity(priv);
368
369 /* If we issue a new RXON command which required a tune then we must
370 * send a new TXPOWER command or we won't be able to Tx any frames */
371 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
372 if (ret) {
373 IWL_ERROR("Error sending TX power (%d)\n", ret);
374 return ret;
375 }
376
b481de9c
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377 return 0;
378}
379
5da4b55f
MA
380void iwl4965_update_chain_flags(struct iwl_priv *priv)
381{
382
c7de35cd 383 iwl_set_rxon_chain(priv);
5da4b55f
MA
384 iwl4965_commit_rxon(priv);
385}
386
c79dd5b5 387static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 388{
bb8c093b 389 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
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390 .flags = 3,
391 .lead_time = 0xAA,
392 .max_kill = 1,
393 .kill_ack_mask = 0,
394 .kill_cts_mask = 0,
395 };
396
857485c0 397 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 398 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
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399}
400
fcab423d 401static void iwl_clear_free_frames(struct iwl_priv *priv)
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402{
403 struct list_head *element;
404
405 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
406 priv->frames_count);
407
408 while (!list_empty(&priv->free_frames)) {
409 element = priv->free_frames.next;
410 list_del(element);
fcab423d 411 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
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412 priv->frames_count--;
413 }
414
415 if (priv->frames_count) {
416 IWL_WARNING("%d frames still in use. Did we lose one?\n",
417 priv->frames_count);
418 priv->frames_count = 0;
419 }
420}
421
fcab423d 422static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 423{
fcab423d 424 struct iwl_frame *frame;
b481de9c
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425 struct list_head *element;
426 if (list_empty(&priv->free_frames)) {
427 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
428 if (!frame) {
429 IWL_ERROR("Could not allocate frame!\n");
430 return NULL;
431 }
432
433 priv->frames_count++;
434 return frame;
435 }
436
437 element = priv->free_frames.next;
438 list_del(element);
fcab423d 439 return list_entry(element, struct iwl_frame, list);
b481de9c
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440}
441
fcab423d 442static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
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443{
444 memset(frame, 0, sizeof(*frame));
445 list_add(&frame->list, &priv->free_frames);
446}
447
4bf64efd
TW
448static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
449 struct ieee80211_hdr *hdr,
450 const u8 *dest, int left)
b481de9c 451{
3109ece1 452 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
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453 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
454 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
455 return 0;
456
457 if (priv->ibss_beacon->len > left)
458 return 0;
459
460 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
461
462 return priv->ibss_beacon->len;
463}
464
39e88504 465static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 466{
39e88504
GC
467 int i;
468 int rate_mask;
469
470 /* Set rate mask*/
471 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
472 rate_mask = priv->active_rate_basic & 0xF;
473 else
474 rate_mask = priv->active_rate_basic & 0xFF0;
b481de9c 475
39e88504 476 /* Find lowest valid rate */
b481de9c 477 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 478 i = iwl_rates[i].next_ieee) {
b481de9c 479 if (rate_mask & (1 << i))
1826dcc0 480 return iwl_rates[i].plcp;
b481de9c
ZY
481 }
482
39e88504
GC
483 /* No valid rate was found. Assign the lowest one */
484 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
485 return IWL_RATE_1M_PLCP;
486 else
487 return IWL_RATE_6M_PLCP;
b481de9c
ZY
488}
489
4bf64efd
TW
490unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
491 struct iwl_frame *frame, u8 rate)
492{
493 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
494 unsigned int frame_size;
495
496 tx_beacon_cmd = &frame->u.beacon;
497 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
498
499 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
500 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
501
502 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
503 iwl_bcast_addr,
504 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
505
506 BUG_ON(frame_size > MAX_MPDU_SIZE);
507 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
508
509 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
510 tx_beacon_cmd->tx.rate_n_flags =
511 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
512 else
513 tx_beacon_cmd->tx.rate_n_flags =
514 iwl_hw_set_rate_n_flags(rate, 0);
515
516 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
517 TX_CMD_FLG_TSF_MSK |
518 TX_CMD_FLG_STA_RATE_MSK;
519
520 return sizeof(*tx_beacon_cmd) + frame_size;
521}
c79dd5b5 522static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 523{
fcab423d 524 struct iwl_frame *frame;
b481de9c
ZY
525 unsigned int frame_size;
526 int rc;
527 u8 rate;
528
fcab423d 529 frame = iwl_get_free_frame(priv);
b481de9c
ZY
530
531 if (!frame) {
532 IWL_ERROR("Could not obtain free frame buffer for beacon "
533 "command.\n");
534 return -ENOMEM;
535 }
536
39e88504 537 rate = iwl4965_rate_get_lowest_plcp(priv);
b481de9c 538
bb8c093b 539 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 540
857485c0 541 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
542 &frame->u.cmd[0]);
543
fcab423d 544 iwl_free_frame(priv, frame);
b481de9c
ZY
545
546 return rc;
547}
548
b481de9c
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549/******************************************************************************
550 *
551 * Misc. internal state and helper functions
552 *
553 ******************************************************************************/
b481de9c 554
d1141dfb
EG
555static void iwl4965_ht_conf(struct iwl_priv *priv,
556 struct ieee80211_bss_conf *bss_conf)
557{
558 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
559 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
560 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
561
562 IWL_DEBUG_MAC80211("enter: \n");
563
564 iwl_conf->is_ht = bss_conf->assoc_ht;
565
566 if (!iwl_conf->is_ht)
567 return;
568
569 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
570
571 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 572 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 573 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 574 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG
575
576 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
577 iwl_conf->max_amsdu_size =
578 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
579
580 iwl_conf->supported_chan_width =
581 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
582 iwl_conf->extension_chan_offset =
583 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
584 /* If no above or below channel supplied disable FAT channel */
963f5517
EG
585 if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE &&
586 iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) {
587 iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE;
d1141dfb 588 iwl_conf->supported_chan_width = 0;
963f5517 589 }
d1141dfb
EG
590
591 iwl_conf->tx_mimo_ps_mode =
592 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
593 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
594
595 iwl_conf->control_channel = ht_bss_conf->primary_channel;
596 iwl_conf->tx_chan_width =
597 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
598 iwl_conf->ht_protection =
599 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
600 iwl_conf->non_GF_STA_present =
601 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
602
603 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
604 IWL_DEBUG_MAC80211("leave\n");
605}
606
b481de9c
ZY
607/*
608 * QoS support
609*/
1ff50bda 610static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 611{
b481de9c
ZY
612 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
613 return;
614
615 if (!priv->qos_data.qos_enable)
616 return;
617
b481de9c
ZY
618 priv->qos_data.def_qos_parm.qos_flags = 0;
619
620 if (priv->qos_data.qos_cap.q_AP.queue_request &&
621 !priv->qos_data.qos_cap.q_AP.txop_request)
622 priv->qos_data.def_qos_parm.qos_flags |=
623 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
624 if (priv->qos_data.qos_active)
625 priv->qos_data.def_qos_parm.qos_flags |=
626 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
627
fd105e79 628 if (priv->current_ht_config.is_ht)
f1f1f5c7 629 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 630
3109ece1 631 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
632 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
633 priv->qos_data.qos_active,
634 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 635
1ff50bda
EG
636 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
637 sizeof(struct iwl_qosparam_cmd),
638 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY
639 }
640}
641
b481de9c 642#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 643
bb8c093b 644static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
645{
646 u16 new_val = 0;
647 u16 beacon_factor = 0;
648
649 beacon_factor =
650 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
651 / MAX_UCODE_BEACON_INTERVAL;
652 new_val = beacon_val / beacon_factor;
653
654 return cpu_to_le16(new_val);
655}
656
c79dd5b5 657static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
658{
659 u64 interval_tm_unit;
660 u64 tsf, result;
661 unsigned long flags;
662 struct ieee80211_conf *conf = NULL;
663 u16 beacon_int = 0;
664
665 conf = ieee80211_get_hw_conf(priv->hw);
666
667 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW
668 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
669 priv->rxon_timing.timestamp.dw[0] =
670 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c 671
b5d7be5e 672 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 673
3109ece1 674 tsf = priv->timestamp;
b481de9c
ZY
675
676 beacon_int = priv->beacon_int;
677 spin_unlock_irqrestore(&priv->lock, flags);
678
679 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
680 if (beacon_int == 0) {
681 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
682 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
683 } else {
684 priv->rxon_timing.beacon_interval =
685 cpu_to_le16(beacon_int);
686 priv->rxon_timing.beacon_interval =
bb8c093b 687 iwl4965_adjust_beacon_interval(
b481de9c
ZY
688 le16_to_cpu(priv->rxon_timing.beacon_interval));
689 }
690
691 priv->rxon_timing.atim_window = 0;
692 } else {
693 priv->rxon_timing.beacon_interval =
bb8c093b 694 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
695 /* TODO: we need to get atim_window from upper stack
696 * for now we set to 0 */
697 priv->rxon_timing.atim_window = 0;
698 }
699
700 interval_tm_unit =
701 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
702 result = do_div(tsf, interval_tm_unit);
703 priv->rxon_timing.beacon_init_val =
704 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
705
706 IWL_DEBUG_ASSOC
707 ("beacon interval %d beacon timer %d beacon tim %d\n",
708 le16_to_cpu(priv->rxon_timing.beacon_interval),
709 le32_to_cpu(priv->rxon_timing.beacon_init_val),
710 le16_to_cpu(priv->rxon_timing.atim_window));
711}
712
82a66bbb
TW
713static void iwl_set_flags_for_band(struct iwl_priv *priv,
714 enum ieee80211_band band)
b481de9c 715{
8318d78a 716 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
717 priv->staging_rxon.flags &=
718 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
719 | RXON_FLG_CCK_MSK);
720 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
721 } else {
508e32e1 722 /* Copied from iwl4965_post_associate() */
b481de9c
ZY
723 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
724 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
725 else
726 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
727
728 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
729 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
730
731 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
732 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
733 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
734 }
735}
736
737/*
01ebd063 738 * initialize rxon structure with default values from eeprom
b481de9c 739 */
c79dd5b5 740static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 741{
bf85ea4f 742 const struct iwl_channel_info *ch_info;
b481de9c
ZY
743
744 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
745
746 switch (priv->iw_mode) {
747 case IEEE80211_IF_TYPE_AP:
748 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
749 break;
750
751 case IEEE80211_IF_TYPE_STA:
752 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
753 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
754 break;
755
756 case IEEE80211_IF_TYPE_IBSS:
757 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
758 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
759 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
760 RXON_FILTER_ACCEPT_GRP_MSK;
761 break;
762
763 case IEEE80211_IF_TYPE_MNTR:
764 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
765 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
766 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
767 break;
69dc5d9d
TW
768 default:
769 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
770 break;
b481de9c
ZY
771 }
772
773#if 0
774 /* TODO: Figure out when short_preamble would be set and cache from
775 * that */
776 if (!hw_to_local(priv->hw)->short_preamble)
777 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
778 else
779 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
780#endif
781
8622e705 782 ch_info = iwl_get_channel_info(priv, priv->band,
25b3f57c 783 le16_to_cpu(priv->active_rxon.channel));
b481de9c
ZY
784
785 if (!ch_info)
786 ch_info = &priv->channel_info[0];
787
788 /*
789 * in some case A channels are all non IBSS
790 * in this case force B/G channel
791 */
792 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
793 !(is_channel_ibss(ch_info)))
794 ch_info = &priv->channel_info[0];
795
796 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 797 priv->band = ch_info->band;
b481de9c 798
82a66bbb 799 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY
800
801 priv->staging_rxon.ofdm_basic_rates =
802 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
803 priv->staging_rxon.cck_basic_rates =
804 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
805
806 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
807 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
808 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
809 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
810 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
811 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 812 iwl_set_rxon_chain(priv);
b481de9c
ZY
813}
814
c79dd5b5 815static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 816{
b481de9c
ZY
817 priv->iw_mode = mode;
818
bb8c093b 819 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
820 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
821
37deb2a0 822 iwl_clear_stations_table(priv);
b481de9c 823
fde3571f 824 /* dont commit rxon if rf-kill is on*/
fee1247a 825 if (!iwl_is_ready_rf(priv))
fde3571f
MA
826 return -EAGAIN;
827
828 cancel_delayed_work(&priv->scan_check);
2a421b91 829 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA
830 IWL_WARNING("Aborted scan still in progress after 100ms\n");
831 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
832 return -EAGAIN;
833 }
834
bb8c093b 835 iwl4965_commit_rxon(priv);
b481de9c
ZY
836
837 return 0;
838}
839
c79dd5b5 840static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 841{
8318d78a 842 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
843 struct ieee80211_rate *rate;
844 int i;
845
d1141dfb 846 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
847 if (!hw) {
848 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
849 return;
850 }
b481de9c
ZY
851
852 priv->active_rate = 0;
853 priv->active_rate_basic = 0;
854
8318d78a
JB
855 for (i = 0; i < hw->n_bitrates; i++) {
856 rate = &(hw->bitrates[i]);
857 if (rate->hw_value < IWL_RATE_COUNT)
858 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
859 }
860
861 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
862 priv->active_rate, priv->active_rate_basic);
863
864 /*
865 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
866 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
867 * OFDM
868 */
869 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
870 priv->staging_rxon.cck_basic_rates =
871 ((priv->active_rate_basic &
872 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
873 else
874 priv->staging_rxon.cck_basic_rates =
875 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
876
877 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
878 priv->staging_rxon.ofdm_basic_rates =
879 ((priv->active_rate_basic &
880 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
881 IWL_FIRST_OFDM_RATE) & 0xFF;
882 else
883 priv->staging_rxon.ofdm_basic_rates =
884 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
885}
886
4fc22b21 887#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
888
889#include "iwl-spectrum.h"
890
891#define BEACON_TIME_MASK_LOW 0x00FFFFFF
892#define BEACON_TIME_MASK_HIGH 0xFF000000
893#define TIME_UNIT 1024
894
895/*
896 * extended beacon time format
897 * time in usec will be changed into a 32-bit value in 8:24 format
898 * the high 1 byte is the beacon counts
899 * the lower 3 bytes is the time in usec within one beacon interval
900 */
901
bb8c093b 902static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
903{
904 u32 quot;
905 u32 rem;
906 u32 interval = beacon_interval * 1024;
907
908 if (!interval || !usec)
909 return 0;
910
911 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
912 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
913
914 return (quot << 24) + rem;
915}
916
917/* base is usually what we get from ucode with each received frame,
918 * the same as HW timer counter counting down
919 */
920
bb8c093b 921static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
922{
923 u32 base_low = base & BEACON_TIME_MASK_LOW;
924 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
925 u32 interval = beacon_interval * TIME_UNIT;
926 u32 res = (base & BEACON_TIME_MASK_HIGH) +
927 (addon & BEACON_TIME_MASK_HIGH);
928
929 if (base_low > addon_low)
930 res += base_low - addon_low;
931 else if (base_low < addon_low) {
932 res += interval + base_low - addon_low;
933 res += (1 << 24);
934 } else
935 res += (1 << 24);
936
937 return cpu_to_le32(res);
938}
939
c79dd5b5 940static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
941 struct ieee80211_measurement_params *params,
942 u8 type)
943{
bb8c093b 944 struct iwl4965_spectrum_cmd spectrum;
db11d634 945 struct iwl_rx_packet *res;
857485c0 946 struct iwl_host_cmd cmd = {
b481de9c
ZY
947 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
948 .data = (void *)&spectrum,
949 .meta.flags = CMD_WANT_SKB,
950 };
951 u32 add_time = le64_to_cpu(params->start_time);
952 int rc;
953 int spectrum_resp_status;
954 int duration = le16_to_cpu(params->duration);
955
3109ece1 956 if (iwl_is_associated(priv))
b481de9c 957 add_time =
bb8c093b 958 iwl4965_usecs_to_beacons(
b481de9c
ZY
959 le64_to_cpu(params->start_time) - priv->last_tsf,
960 le16_to_cpu(priv->rxon_timing.beacon_interval));
961
962 memset(&spectrum, 0, sizeof(spectrum));
963
964 spectrum.channel_count = cpu_to_le16(1);
965 spectrum.flags =
966 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
967 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
968 cmd.len = sizeof(spectrum);
969 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
970
3109ece1 971 if (iwl_is_associated(priv))
b481de9c 972 spectrum.start_time =
bb8c093b 973 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
974 add_time,
975 le16_to_cpu(priv->rxon_timing.beacon_interval));
976 else
977 spectrum.start_time = 0;
978
979 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
980 spectrum.channels[0].channel = params->channel;
981 spectrum.channels[0].type = type;
982 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
983 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
984 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
985
857485c0 986 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
987 if (rc)
988 return rc;
989
db11d634 990 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
991 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
992 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
993 rc = -EIO;
994 }
995
996 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
997 switch (spectrum_resp_status) {
998 case 0: /* Command will be handled */
999 if (res->u.spectrum.id != 0xff) {
1000 IWL_DEBUG_INFO
1001 ("Replaced existing measurement: %d\n",
1002 res->u.spectrum.id);
1003 priv->measurement_status &= ~MEASUREMENT_READY;
1004 }
1005 priv->measurement_status |= MEASUREMENT_ACTIVE;
1006 rc = 0;
1007 break;
1008
1009 case 1: /* Command will not be handled */
1010 rc = -EAGAIN;
1011 break;
1012 }
1013
1014 dev_kfree_skb_any(cmd.meta.u.skb);
1015
1016 return rc;
1017}
1018#endif
1019
b481de9c
ZY
1020/******************************************************************************
1021 *
1022 * Generic RX handler implementations
1023 *
1024 ******************************************************************************/
885ba202
TW
1025static void iwl_rx_reply_alive(struct iwl_priv *priv,
1026 struct iwl_rx_mem_buffer *rxb)
b481de9c 1027{
db11d634 1028 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 1029 struct iwl_alive_resp *palive;
b481de9c
ZY
1030 struct delayed_work *pwork;
1031
1032 palive = &pkt->u.alive_frame;
1033
1034 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
1035 "0x%01X 0x%01X\n",
1036 palive->is_valid, palive->ver_type,
1037 palive->ver_subtype);
1038
1039 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
1040 IWL_DEBUG_INFO("Initialization Alive received.\n");
1041 memcpy(&priv->card_alive_init,
1042 &pkt->u.alive_frame,
885ba202 1043 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY
1044 pwork = &priv->init_alive_start;
1045 } else {
1046 IWL_DEBUG_INFO("Runtime Alive received.\n");
1047 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 1048 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1049 pwork = &priv->alive_start;
1050 }
1051
1052 /* We delay the ALIVE response by 5ms to
1053 * give the HW RF Kill time to activate... */
1054 if (palive->is_valid == UCODE_VALID_OK)
1055 queue_delayed_work(priv->workqueue, pwork,
1056 msecs_to_jiffies(5));
1057 else
1058 IWL_WARNING("uCode did not respond OK.\n");
1059}
1060
c79dd5b5 1061static void iwl4965_rx_reply_error(struct iwl_priv *priv,
a55360e4 1062 struct iwl_rx_mem_buffer *rxb)
b481de9c 1063{
db11d634 1064 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1065
1066 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
1067 "seq 0x%04X ser 0x%08X\n",
1068 le32_to_cpu(pkt->u.err_resp.error_type),
1069 get_cmd_string(pkt->u.err_resp.cmd_id),
1070 pkt->u.err_resp.cmd_id,
1071 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1072 le32_to_cpu(pkt->u.err_resp.error_info));
1073}
1074
1075#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1076
a55360e4 1077static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 1078{
db11d634 1079 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 1080 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
bb8c093b 1081 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
1082 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
1083 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1084 rxon->channel = csa->channel;
1085 priv->staging_rxon.channel = csa->channel;
1086}
1087
c79dd5b5 1088static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
a55360e4 1089 struct iwl_rx_mem_buffer *rxb)
b481de9c 1090{
4fc22b21 1091#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
db11d634 1092 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1093 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
1094
1095 if (!report->state) {
f3d67999
EK
1096 IWL_DEBUG(IWL_DL_11H,
1097 "Spectrum Measure Notification: Start\n");
b481de9c
ZY
1098 return;
1099 }
1100
1101 memcpy(&priv->measure_report, report, sizeof(*report));
1102 priv->measurement_status |= MEASUREMENT_READY;
1103#endif
1104}
1105
c79dd5b5 1106static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 1107 struct iwl_rx_mem_buffer *rxb)
b481de9c 1108{
0a6857e7 1109#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1110 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1111 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
1112 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
1113 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1114#endif
1115}
1116
c79dd5b5 1117static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 1118 struct iwl_rx_mem_buffer *rxb)
b481de9c 1119{
db11d634 1120 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1121 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
1122 "notification for %s:\n",
1123 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 1124 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
1125}
1126
bb8c093b 1127static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 1128{
c79dd5b5
TW
1129 struct iwl_priv *priv =
1130 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1131 struct sk_buff *beacon;
1132
1133 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1134 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1135
1136 if (!beacon) {
1137 IWL_ERROR("update beacon failed\n");
1138 return;
1139 }
1140
1141 mutex_lock(&priv->mutex);
1142 /* new beacon skb is allocated every time; dispose previous.*/
1143 if (priv->ibss_beacon)
1144 dev_kfree_skb(priv->ibss_beacon);
1145
1146 priv->ibss_beacon = beacon;
1147 mutex_unlock(&priv->mutex);
1148
bb8c093b 1149 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
1150}
1151
4e39317d
EG
1152/**
1153 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
1154 *
1155 * This callback is provided in order to send a statistics request.
1156 *
1157 * This timer function is continually reset to execute within
1158 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
1159 * was received. We need to ensure we receive the statistics in order
1160 * to update the temperature used for calibrating the TXPOWER.
1161 */
1162static void iwl4965_bg_statistics_periodic(unsigned long data)
1163{
1164 struct iwl_priv *priv = (struct iwl_priv *)data;
1165
1166 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1167 return;
1168
1169 iwl_send_statistics_request(priv, CMD_ASYNC);
1170}
1171
c79dd5b5 1172static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 1173 struct iwl_rx_mem_buffer *rxb)
b481de9c 1174{
0a6857e7 1175#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1176 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1177 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
e7d326ac 1178 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
1179
1180 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
1181 "tsf %d %d rate %d\n",
25a6572c 1182 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY
1183 beacon->beacon_notify_hdr.failure_frame,
1184 le32_to_cpu(beacon->ibss_mgr_status),
1185 le32_to_cpu(beacon->high_tsf),
1186 le32_to_cpu(beacon->low_tsf), rate);
1187#endif
1188
1189 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
1190 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1191 queue_work(priv->workqueue, &priv->beacon_update);
1192}
1193
b481de9c
ZY
1194/* Handle notification from uCode that card's power state is changing
1195 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 1196static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 1197 struct iwl_rx_mem_buffer *rxb)
b481de9c 1198{
db11d634 1199 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1200 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1201 unsigned long status = priv->status;
1202
1203 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
1204 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1205 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1206
1207 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
1208 RF_CARD_DISABLED)) {
1209
3395f6e9 1210 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1211 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1212
3395f6e9
TW
1213 if (!iwl_grab_nic_access(priv)) {
1214 iwl_write_direct32(
b481de9c
ZY
1215 priv, HBUS_TARG_MBX_C,
1216 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1217
3395f6e9 1218 iwl_release_nic_access(priv);
b481de9c
ZY
1219 }
1220
1221 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 1222 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 1223 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
1224 if (!iwl_grab_nic_access(priv)) {
1225 iwl_write_direct32(
b481de9c
ZY
1226 priv, HBUS_TARG_MBX_C,
1227 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1228
3395f6e9 1229 iwl_release_nic_access(priv);
b481de9c
ZY
1230 }
1231 }
1232
1233 if (flags & RF_CARD_DISABLED) {
3395f6e9 1234 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1235 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
1236 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1237 if (!iwl_grab_nic_access(priv))
1238 iwl_release_nic_access(priv);
b481de9c
ZY
1239 }
1240 }
1241
1242 if (flags & HW_CARD_DISABLED)
1243 set_bit(STATUS_RF_KILL_HW, &priv->status);
1244 else
1245 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1246
1247
1248 if (flags & SW_CARD_DISABLED)
1249 set_bit(STATUS_RF_KILL_SW, &priv->status);
1250 else
1251 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1252
1253 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1254 iwl_scan_cancel(priv);
b481de9c
ZY
1255
1256 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1257 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1258 (test_bit(STATUS_RF_KILL_SW, &status) !=
1259 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1260 queue_work(priv->workqueue, &priv->rf_kill);
1261 else
1262 wake_up_interruptible(&priv->wait_command_queue);
1263}
1264
e2e3c57b
TW
1265int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
1266{
1267 int ret;
1268 unsigned long flags;
1269
1270 spin_lock_irqsave(&priv->lock, flags);
1271 ret = iwl_grab_nic_access(priv);
1272 if (ret)
1273 goto err;
1274
1275 if (src == IWL_PWR_SRC_VAUX) {
1276 u32 val;
1277 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
1278 &val);
1279
1280 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
1281 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1282 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1283 ~APMG_PS_CTRL_MSK_PWR_SRC);
1284 } else {
1285 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1286 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1287 ~APMG_PS_CTRL_MSK_PWR_SRC);
1288 }
1289
1290 iwl_release_nic_access(priv);
1291err:
1292 spin_unlock_irqrestore(&priv->lock, flags);
1293 return ret;
1294}
1295
b481de9c 1296/**
bb8c093b 1297 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1298 *
1299 * Setup the RX handlers for each of the reply types sent from the uCode
1300 * to the host.
1301 *
1302 * This function chains into the hardware specific files for them to setup
1303 * any hardware specific handlers as well.
1304 */
653fa4a0 1305static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1306{
885ba202 1307 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
bb8c093b
CH
1308 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
1309 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 1310 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
1311 iwl4965_rx_spectrum_measure_notif;
1312 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 1313 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
1314 iwl4965_rx_pm_debug_statistics_notif;
1315 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 1316
9fbab516
BC
1317 /*
1318 * The same handler is used for both the REPLY to a discrete
1319 * statistics request from the host as well as for the periodic
1320 * statistics notifications (after received beacons) from the uCode.
b481de9c 1321 */
8f91aecb
EG
1322 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1323 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91
TW
1324
1325 iwl_setup_rx_scan_handlers(priv);
1326
37a44211 1327 /* status change handler */
bb8c093b 1328 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
b481de9c 1329
c1354754
TW
1330 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1331 iwl_rx_missed_beacon_notif;
37a44211 1332 /* Rx handlers */
1781a07f
EG
1333 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1334 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG
1335 /* block ack */
1336 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1337 /* Set up hardware specific Rx handlers */
d4789efe 1338 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY
1339}
1340
5c0eef96
MA
1341/*
1342 * this should be called while priv->lock is locked
1343*/
a55360e4 1344static void __iwl_rx_replenish(struct iwl_priv *priv)
b481de9c 1345{
a55360e4
TW
1346 iwl_rx_allocate(priv);
1347 iwl_rx_queue_restock(priv);
b481de9c
ZY
1348}
1349
b481de9c
ZY
1350
1351/**
a55360e4 1352 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1353 *
1354 * Uses the priv->rx_handlers callback function array to invoke
1355 * the appropriate handlers, including command responses,
1356 * frame-received notifications, and other notifications.
1357 */
a55360e4 1358void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1359{
a55360e4 1360 struct iwl_rx_mem_buffer *rxb;
db11d634 1361 struct iwl_rx_packet *pkt;
a55360e4 1362 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1363 u32 r, i;
1364 int reclaim;
1365 unsigned long flags;
5c0eef96 1366 u8 fill_rx = 0;
d68ab680 1367 u32 count = 8;
b481de9c 1368
6440adb5
CB
1369 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1370 * buffer that the driver may process (last buffer filled by ucode). */
d67f5489 1371 r = priv->cfg->ops->lib->shared_mem_rx_idx(priv);
b481de9c
ZY
1372 i = rxq->read;
1373
1374 /* Rx interrupt, but nothing sent from uCode */
1375 if (i == r)
f3d67999 1376 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1377
a55360e4 1378 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA
1379 fill_rx = 1;
1380
b481de9c
ZY
1381 while (i != r) {
1382 rxb = rxq->queue[i];
1383
9fbab516 1384 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1385 * then a bug has been introduced in the queue refilling
1386 * routines -- catch it here */
1387 BUG_ON(rxb == NULL);
1388
1389 rxq->queue[i] = NULL;
1390
1391 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 1392 priv->hw_params.rx_buf_size,
b481de9c 1393 PCI_DMA_FROMDEVICE);
db11d634 1394 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1395
1396 /* Reclaim a command buffer only if this packet is a response
1397 * to a (driver-originated) command.
1398 * If the packet (e.g. Rx frame) originated from uCode,
1399 * there is no command buffer to reclaim.
1400 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1401 * but apparently a few don't get set; catch them here. */
1402 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1403 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1404 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 1405 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
1406 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1407 (pkt->hdr.cmd != REPLY_TX);
1408
1409 /* Based on type of command response or notification,
1410 * handle those that need handling via function in
bb8c093b 1411 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c 1412 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK
1413 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1414 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY
1415 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1416 } else {
1417 /* No handling needed */
f3d67999 1418 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY
1419 "r %d i %d No handler needed for %s, 0x%02x\n",
1420 r, i, get_cmd_string(pkt->hdr.cmd),
1421 pkt->hdr.cmd);
1422 }
1423
1424 if (reclaim) {
9fbab516 1425 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1426 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1427 * as we reclaim the driver command queue */
1428 if (rxb && rxb->skb)
17b88929 1429 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY
1430 else
1431 IWL_WARNING("Claim null rxb?\n");
1432 }
1433
1434 /* For now we just don't re-use anything. We can tweak this
1435 * later to try and re-use notification packets and SKBs that
1436 * fail to Rx correctly */
1437 if (rxb->skb != NULL) {
1438 priv->alloc_rxb_skb--;
1439 dev_kfree_skb_any(rxb->skb);
1440 rxb->skb = NULL;
1441 }
1442
1443 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 1444 priv->hw_params.rx_buf_size,
9ee1ba47 1445 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1446 spin_lock_irqsave(&rxq->lock, flags);
1447 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1448 spin_unlock_irqrestore(&rxq->lock, flags);
1449 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1450 /* If there are a lot of unused frames,
1451 * restock the Rx queue so ucode wont assert. */
1452 if (fill_rx) {
1453 count++;
1454 if (count >= 8) {
1455 priv->rxq.read = i;
a55360e4 1456 __iwl_rx_replenish(priv);
5c0eef96
MA
1457 count = 0;
1458 }
1459 }
b481de9c
ZY
1460 }
1461
1462 /* Backtrack one entry */
1463 priv->rxq.read = i;
a55360e4
TW
1464 iwl_rx_queue_restock(priv);
1465}
a55360e4 1466
0a6857e7 1467#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1468static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1469{
c1adf9fb 1470 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57
JP
1471 DECLARE_MAC_BUF(mac);
1472
b481de9c 1473 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1474 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
1475 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1476 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1477 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1478 le32_to_cpu(rxon->filter_flags));
1479 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1480 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1481 rxon->ofdm_basic_rates);
1482 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP
1483 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
1484 print_mac(mac, rxon->node_addr));
1485 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
1486 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY
1487 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1488}
1489#endif
1490
c79dd5b5 1491static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1492{
1493 IWL_DEBUG_ISR("Enabling interrupts\n");
1494 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 1495 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
1496}
1497
0359facc
MA
1498/* call this function to flush any scheduled tasklet */
1499static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1500{
1501 /* wait to make sure we flush pedding tasklet*/
1502 synchronize_irq(priv->pci_dev->irq);
1503 tasklet_kill(&priv->irq_tasklet);
1504}
1505
c79dd5b5 1506static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1507{
1508 clear_bit(STATUS_INT_ENABLED, &priv->status);
1509
1510 /* disable interrupts from uCode/NIC to host */
3395f6e9 1511 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1512
1513 /* acknowledge/clear/reset any interrupts still pending
1514 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW
1515 iwl_write32(priv, CSR_INT, 0xffffffff);
1516 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
1517 IWL_DEBUG_ISR("Disabled interrupts\n");
1518}
1519
b481de9c 1520
b481de9c 1521/**
bb8c093b 1522 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1523 */
c79dd5b5 1524static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 1525{
bb8c093b 1526 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
1527 set_bit(STATUS_FW_ERROR, &priv->status);
1528
1529 /* Cancel currently queued command. */
1530 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1531
0a6857e7 1532#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1533 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1534 iwl_dump_nic_error_log(priv);
189a2b59 1535 iwl_dump_nic_event_log(priv);
bf403db8 1536 iwl4965_print_rx_config_cmd(priv);
b481de9c
ZY
1537 }
1538#endif
1539
1540 wake_up_interruptible(&priv->wait_command_queue);
1541
1542 /* Keep the restart process from trying to send host
1543 * commands by clearing the INIT status bit */
1544 clear_bit(STATUS_READY, &priv->status);
1545
1546 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1547 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY
1548 "Restarting adapter due to uCode error.\n");
1549
3109ece1 1550 if (iwl_is_associated(priv)) {
b481de9c
ZY
1551 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1552 sizeof(priv->recovery_rxon));
1553 priv->error_recovering = 1;
1554 }
3a1081e8
EK
1555 if (priv->cfg->mod_params->restart_fw)
1556 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1557 }
1558}
1559
c79dd5b5 1560static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1561{
1562 unsigned long flags;
1563
1564 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1565 sizeof(priv->staging_rxon));
1566 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 1567 iwl4965_commit_rxon(priv);
b481de9c 1568
4f40e4d9 1569 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
1570
1571 spin_lock_irqsave(&priv->lock, flags);
1572 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1573 priv->error_recovering = 0;
1574 spin_unlock_irqrestore(&priv->lock, flags);
1575}
1576
c79dd5b5 1577static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1578{
1579 u32 inta, handled = 0;
1580 u32 inta_fh;
1581 unsigned long flags;
0a6857e7 1582#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1583 u32 inta_mask;
1584#endif
1585
1586 spin_lock_irqsave(&priv->lock, flags);
1587
1588 /* Ack/clear/reset pending uCode interrupts.
1589 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1590 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
1591 inta = iwl_read32(priv, CSR_INT);
1592 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1593
1594 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1595 * Any new interrupts that happen after this, either while we're
1596 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
1597 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1598 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1599
0a6857e7 1600#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1601 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1602 /* just for debug */
3395f6e9 1603 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
1604 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1605 inta, inta_mask, inta_fh);
1606 }
1607#endif
1608
1609 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1610 * atomic, make sure that inta covers all the interrupts that
1611 * we've discovered, even if FH interrupt came in just after
1612 * reading CSR_INT. */
6f83eaa1 1613 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1614 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1615 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
1616 inta |= CSR_INT_BIT_FH_TX;
1617
1618 /* Now service all interrupt bits discovered above. */
1619 if (inta & CSR_INT_BIT_HW_ERR) {
1620 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1621
1622 /* Tell the device to stop sending interrupts */
bb8c093b 1623 iwl4965_disable_interrupts(priv);
b481de9c 1624
bb8c093b 1625 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1626
1627 handled |= CSR_INT_BIT_HW_ERR;
1628
1629 spin_unlock_irqrestore(&priv->lock, flags);
1630
1631 return;
1632 }
1633
0a6857e7 1634#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1635 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1636 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
1637 if (inta & CSR_INT_BIT_SCD)
1638 IWL_DEBUG_ISR("Scheduler finished to transmit "
1639 "the frame/frames.\n");
b481de9c
ZY
1640
1641 /* Alive notification via Rx interrupt will do the real work */
1642 if (inta & CSR_INT_BIT_ALIVE)
1643 IWL_DEBUG_ISR("Alive interrupt\n");
1644 }
1645#endif
1646 /* Safely ignore these bits for debug checks below */
25c03d8e 1647 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1648
9fbab516 1649 /* HW RF KILL switch toggled */
b481de9c
ZY
1650 if (inta & CSR_INT_BIT_RF_KILL) {
1651 int hw_rf_kill = 0;
3395f6e9 1652 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
1653 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1654 hw_rf_kill = 1;
1655
f3d67999 1656 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
b481de9c
ZY
1657 hw_rf_kill ? "disable radio":"enable radio");
1658
a9efa652
EG
1659 /* driver only loads ucode once setting the interface up.
1660 * the driver as well won't allow loading if RFKILL is set
1661 * therefore no need to restart the driver from this handler
1662 */
1663 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
53e49093 1664 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c
ZY
1665
1666 handled |= CSR_INT_BIT_RF_KILL;
1667 }
1668
9fbab516 1669 /* Chip got too hot and stopped itself */
b481de9c
ZY
1670 if (inta & CSR_INT_BIT_CT_KILL) {
1671 IWL_ERROR("Microcode CT kill error detected.\n");
1672 handled |= CSR_INT_BIT_CT_KILL;
1673 }
1674
1675 /* Error detected by uCode */
1676 if (inta & CSR_INT_BIT_SW_ERR) {
1677 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1678 inta);
bb8c093b 1679 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1680 handled |= CSR_INT_BIT_SW_ERR;
1681 }
1682
1683 /* uCode wakes up after power-down sleep */
1684 if (inta & CSR_INT_BIT_WAKEUP) {
1685 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1686 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW
1687 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1688 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1689 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1690 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1691 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1692 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1693
1694 handled |= CSR_INT_BIT_WAKEUP;
1695 }
1696
1697 /* All uCode command responses, including Tx command responses,
1698 * Rx "responses" (frame-received notification), and other
1699 * notifications from uCode come through here*/
1700 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1701 iwl_rx_handle(priv);
b481de9c
ZY
1702 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1703 }
1704
1705 if (inta & CSR_INT_BIT_FH_TX) {
1706 IWL_DEBUG_ISR("Tx interrupt\n");
1707 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR
1708 /* FH finished to write, send event */
1709 priv->ucode_write_complete = 1;
1710 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1711 }
1712
1713 if (inta & ~handled)
1714 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1715
1716 if (inta & ~CSR_INI_SET_MASK) {
1717 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1718 inta & ~CSR_INI_SET_MASK);
1719 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1720 }
1721
1722 /* Re-enable all interrupts */
0359facc
MA
1723 /* only Re-enable if diabled by irq */
1724 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1725 iwl4965_enable_interrupts(priv);
b481de9c 1726
0a6857e7 1727#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1728 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
1729 inta = iwl_read32(priv, CSR_INT);
1730 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1731 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1732 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1733 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1734 }
1735#endif
1736 spin_unlock_irqrestore(&priv->lock, flags);
1737}
1738
bb8c093b 1739static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 1740{
c79dd5b5 1741 struct iwl_priv *priv = data;
b481de9c
ZY
1742 u32 inta, inta_mask;
1743 u32 inta_fh;
1744 if (!priv)
1745 return IRQ_NONE;
1746
1747 spin_lock(&priv->lock);
1748
1749 /* Disable (but don't clear!) interrupts here to avoid
1750 * back-to-back ISRs and sporadic interrupts from our NIC.
1751 * If we have something to service, the tasklet will re-enable ints.
1752 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
1753 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1754 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1755
1756 /* Discover which interrupts are active/pending */
3395f6e9
TW
1757 inta = iwl_read32(priv, CSR_INT);
1758 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1759
1760 /* Ignore interrupt if there's nothing in NIC to service.
1761 * This may be due to IRQ shared with another device,
1762 * or due to sporadic interrupts thrown from our NIC. */
1763 if (!inta && !inta_fh) {
1764 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1765 goto none;
1766 }
1767
1768 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
1769 /* Hardware disappeared. It might have already raised
1770 * an interrupt */
b481de9c 1771 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 1772 goto unplugged;
b481de9c
ZY
1773 }
1774
1775 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1776 inta, inta_mask, inta_fh);
1777
25c03d8e
JP
1778 inta &= ~CSR_INT_BIT_SCD;
1779
bb8c093b 1780 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
1781 if (likely(inta || inta_fh))
1782 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1783
66fbb541
ON
1784 unplugged:
1785 spin_unlock(&priv->lock);
b481de9c
ZY
1786 return IRQ_HANDLED;
1787
1788 none:
1789 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
1790 /* only Re-enable if diabled by irq */
1791 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1792 iwl4965_enable_interrupts(priv);
b481de9c
ZY
1793 spin_unlock(&priv->lock);
1794 return IRQ_NONE;
1795}
1796
b481de9c
ZY
1797/******************************************************************************
1798 *
1799 * uCode download functions
1800 *
1801 ******************************************************************************/
1802
c79dd5b5 1803static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1804{
98c92211
TW
1805 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1806 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1807 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1808 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1809 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1810 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1811}
1812
edcdf8b2
RR
1813static void iwl4965_nic_start(struct iwl_priv *priv)
1814{
1815 /* Remove all resets to allow NIC to operate */
1816 iwl_write32(priv, CSR_RESET, 0);
1817}
1818
1819
b481de9c 1820/**
bb8c093b 1821 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
1822 *
1823 * Copy into buffers for card to fetch via bus-mastering
1824 */
c79dd5b5 1825static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 1826{
14b3d338 1827 struct iwl_ucode *ucode;
90e759d1 1828 int ret;
b481de9c 1829 const struct firmware *ucode_raw;
4bf775cd 1830 const char *name = priv->cfg->fw_name;
b481de9c
ZY
1831 u8 *src;
1832 size_t len;
1833 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
1834
1835 /* Ask kernel firmware_class module to get the boot firmware off disk.
1836 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
1837 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
1838 if (ret < 0) {
1839 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1840 name, ret);
b481de9c
ZY
1841 goto error;
1842 }
1843
1844 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1845 name, ucode_raw->size);
1846
1847 /* Make sure that we got at least our header! */
1848 if (ucode_raw->size < sizeof(*ucode)) {
1849 IWL_ERROR("File size way too small!\n");
90e759d1 1850 ret = -EINVAL;
b481de9c
ZY
1851 goto err_release;
1852 }
1853
1854 /* Data from ucode file: header followed by uCode images */
1855 ucode = (void *)ucode_raw->data;
1856
1857 ver = le32_to_cpu(ucode->ver);
1858 inst_size = le32_to_cpu(ucode->inst_size);
1859 data_size = le32_to_cpu(ucode->data_size);
1860 init_size = le32_to_cpu(ucode->init_size);
1861 init_data_size = le32_to_cpu(ucode->init_data_size);
1862 boot_size = le32_to_cpu(ucode->boot_size);
1863
1864 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
1865 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1866 inst_size);
1867 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1868 data_size);
1869 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1870 init_size);
1871 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1872 init_data_size);
1873 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1874 boot_size);
1875
1876 /* Verify size of file vs. image size info in file's header */
1877 if (ucode_raw->size < sizeof(*ucode) +
1878 inst_size + data_size + init_size +
1879 init_data_size + boot_size) {
1880
1881 IWL_DEBUG_INFO("uCode file size %d too small\n",
1882 (int)ucode_raw->size);
90e759d1 1883 ret = -EINVAL;
b481de9c
ZY
1884 goto err_release;
1885 }
1886
1887 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1888 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
1889 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1890 inst_size);
1891 ret = -EINVAL;
b481de9c
ZY
1892 goto err_release;
1893 }
1894
099b40b7 1895 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
1896 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1897 data_size);
1898 ret = -EINVAL;
b481de9c
ZY
1899 goto err_release;
1900 }
099b40b7 1901 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1902 IWL_DEBUG_INFO
90e759d1
TW
1903 ("uCode init instr len %d too large to fit in\n",
1904 init_size);
1905 ret = -EINVAL;
b481de9c
ZY
1906 goto err_release;
1907 }
099b40b7 1908 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1909 IWL_DEBUG_INFO
90e759d1
TW
1910 ("uCode init data len %d too large to fit in\n",
1911 init_data_size);
1912 ret = -EINVAL;
b481de9c
ZY
1913 goto err_release;
1914 }
099b40b7 1915 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1916 IWL_DEBUG_INFO
90e759d1
TW
1917 ("uCode boot instr len %d too large to fit in\n",
1918 boot_size);
1919 ret = -EINVAL;
b481de9c
ZY
1920 goto err_release;
1921 }
1922
1923 /* Allocate ucode buffers for card's bus-master loading ... */
1924
1925 /* Runtime instructions and 2 copies of data:
1926 * 1) unmodified from disk
1927 * 2) backup cache for save/restore during power-downs */
1928 priv->ucode_code.len = inst_size;
98c92211 1929 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
1930
1931 priv->ucode_data.len = data_size;
98c92211 1932 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
1933
1934 priv->ucode_data_backup.len = data_size;
98c92211 1935 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
1936
1937 /* Initialization instructions and data */
90e759d1
TW
1938 if (init_size && init_data_size) {
1939 priv->ucode_init.len = init_size;
98c92211 1940 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
1941
1942 priv->ucode_init_data.len = init_data_size;
98c92211 1943 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
1944
1945 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1946 goto err_pci_alloc;
1947 }
b481de9c
ZY
1948
1949 /* Bootstrap (instructions only, no data) */
90e759d1
TW
1950 if (boot_size) {
1951 priv->ucode_boot.len = boot_size;
98c92211 1952 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1953
90e759d1
TW
1954 if (!priv->ucode_boot.v_addr)
1955 goto err_pci_alloc;
1956 }
b481de9c
ZY
1957
1958 /* Copy images into buffers for card's bus-master reads ... */
1959
1960 /* Runtime instructions (first block of data in file) */
1961 src = &ucode->data[0];
1962 len = priv->ucode_code.len;
90e759d1 1963 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
1964 memcpy(priv->ucode_code.v_addr, src, len);
1965 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1966 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1967
1968 /* Runtime data (2nd block)
bb8c093b 1969 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
1970 src = &ucode->data[inst_size];
1971 len = priv->ucode_data.len;
90e759d1 1972 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
1973 memcpy(priv->ucode_data.v_addr, src, len);
1974 memcpy(priv->ucode_data_backup.v_addr, src, len);
1975
1976 /* Initialization instructions (3rd block) */
1977 if (init_size) {
1978 src = &ucode->data[inst_size + data_size];
1979 len = priv->ucode_init.len;
90e759d1
TW
1980 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1981 len);
b481de9c
ZY
1982 memcpy(priv->ucode_init.v_addr, src, len);
1983 }
1984
1985 /* Initialization data (4th block) */
1986 if (init_data_size) {
1987 src = &ucode->data[inst_size + data_size + init_size];
1988 len = priv->ucode_init_data.len;
90e759d1
TW
1989 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1990 len);
b481de9c
ZY
1991 memcpy(priv->ucode_init_data.v_addr, src, len);
1992 }
1993
1994 /* Bootstrap instructions (5th block) */
1995 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1996 len = priv->ucode_boot.len;
90e759d1 1997 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
1998 memcpy(priv->ucode_boot.v_addr, src, len);
1999
2000 /* We have our copies now, allow OS release its copies */
2001 release_firmware(ucode_raw);
2002 return 0;
2003
2004 err_pci_alloc:
2005 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 2006 ret = -ENOMEM;
bb8c093b 2007 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
2008
2009 err_release:
2010 release_firmware(ucode_raw);
2011
2012 error:
90e759d1 2013 return ret;
b481de9c
ZY
2014}
2015
b481de9c 2016/**
4a4a9e81 2017 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 2018 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 2019 * Alive gets handled by iwl_init_alive_start()).
b481de9c 2020 */
4a4a9e81 2021static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 2022{
57aab75a 2023 int ret = 0;
b481de9c
ZY
2024
2025 IWL_DEBUG_INFO("Runtime Alive received.\n");
2026
2027 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2028 /* We had an error bringing up the hardware, so take it
2029 * all the way back down so we can try again */
2030 IWL_DEBUG_INFO("Alive failed.\n");
2031 goto restart;
2032 }
2033
2034 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2035 * This is a paranoid check, because we would not have gotten the
2036 * "runtime" alive if code weren't properly loaded. */
b0692f2f 2037 if (iwl_verify_ucode(priv)) {
b481de9c
ZY
2038 /* Runtime instruction load was bad;
2039 * take it all the way back down so we can try again */
2040 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
2041 goto restart;
2042 }
2043
37deb2a0 2044 iwl_clear_stations_table(priv);
57aab75a
TW
2045 ret = priv->cfg->ops->lib->alive_notify(priv);
2046 if (ret) {
b481de9c 2047 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 2048 ret);
b481de9c
ZY
2049 goto restart;
2050 }
2051
9fbab516 2052 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
2053 set_bit(STATUS_ALIVE, &priv->status);
2054
fee1247a 2055 if (iwl_is_rfkill(priv))
b481de9c
ZY
2056 return;
2057
36d6825b 2058 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2059
2060 priv->active_rate = priv->rates_mask;
2061 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2062
3109ece1 2063 if (iwl_is_associated(priv)) {
c1adf9fb
GG
2064 struct iwl_rxon_cmd *active_rxon =
2065 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY
2066
2067 memcpy(&priv->staging_rxon, &priv->active_rxon,
2068 sizeof(priv->staging_rxon));
2069 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2070 } else {
2071 /* Initialize our rx_config data */
bb8c093b 2072 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
2073 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2074 }
2075
9fbab516 2076 /* Configure Bluetooth device coexistence support */
bb8c093b 2077 iwl4965_send_bt_config(priv);
b481de9c 2078
4a4a9e81
TW
2079 iwl_reset_run_time_calib(priv);
2080
b481de9c 2081 /* Configure the adapter for unassociated operation */
bb8c093b 2082 iwl4965_commit_rxon(priv);
b481de9c
ZY
2083
2084 /* At this point, the NIC is initialized and operational */
47f4a587 2085 iwl_rf_kill_ct_config(priv);
5a66926a 2086
fe00b5a5
RC
2087 iwl_leds_register(priv);
2088
b481de9c 2089 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 2090 set_bit(STATUS_READY, &priv->status);
5a66926a 2091 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
2092
2093 if (priv->error_recovering)
bb8c093b 2094 iwl4965_error_recovery(priv);
b481de9c 2095
58d0f361 2096 iwl_power_update_mode(priv, 1);
84363e6e 2097 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
c46fbefa
AK
2098
2099 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2100 iwl4965_set_mode(priv, priv->iw_mode);
2101
b481de9c
ZY
2102 return;
2103
2104 restart:
2105 queue_work(priv->workqueue, &priv->restart);
2106}
2107
4e39317d 2108static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2109
c79dd5b5 2110static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2111{
2112 unsigned long flags;
2113 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2114
2115 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
2116
b481de9c
ZY
2117 if (!exit_pending)
2118 set_bit(STATUS_EXIT_PENDING, &priv->status);
2119
ab53d8af
MA
2120 iwl_leds_unregister(priv);
2121
37deb2a0 2122 iwl_clear_stations_table(priv);
b481de9c
ZY
2123
2124 /* Unblock any waiting calls */
2125 wake_up_interruptible_all(&priv->wait_command_queue);
2126
b481de9c
ZY
2127 /* Wipe out the EXIT_PENDING status bit if we are not actually
2128 * exiting the module */
2129 if (!exit_pending)
2130 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2131
2132 /* stop and reset the on-board processor */
3395f6e9 2133 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2134
2135 /* tell the device to stop sending interrupts */
0359facc 2136 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2137 iwl4965_disable_interrupts(priv);
0359facc
MA
2138 spin_unlock_irqrestore(&priv->lock, flags);
2139 iwl_synchronize_irq(priv);
b481de9c
ZY
2140
2141 if (priv->mac80211_registered)
2142 ieee80211_stop_queues(priv->hw);
2143
bb8c093b 2144 /* If we have not previously called iwl4965_init() then
b481de9c 2145 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 2146 if (!iwl_is_init(priv)) {
b481de9c
ZY
2147 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2148 STATUS_RF_KILL_HW |
2149 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2150 STATUS_RF_KILL_SW |
9788864e
RC
2151 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2152 STATUS_GEO_CONFIGURED |
b481de9c 2153 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA
2154 STATUS_IN_SUSPEND |
2155 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2156 STATUS_EXIT_PENDING;
b481de9c
ZY
2157 goto exit;
2158 }
2159
2160 /* ...otherwise clear out all the status bits but the RF Kill and
2161 * SUSPEND bits and continue taking the NIC down. */
2162 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2163 STATUS_RF_KILL_HW |
2164 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2165 STATUS_RF_KILL_SW |
9788864e
RC
2166 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2167 STATUS_GEO_CONFIGURED |
b481de9c
ZY
2168 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
2169 STATUS_IN_SUSPEND |
2170 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA
2171 STATUS_FW_ERROR |
2172 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2173 STATUS_EXIT_PENDING;
b481de9c
ZY
2174
2175 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2176 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 2177 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2178 spin_unlock_irqrestore(&priv->lock, flags);
2179
da1bc453 2180 iwl_txq_ctx_stop(priv);
b3bbacb7 2181 iwl_rxq_stop(priv);
b481de9c
ZY
2182
2183 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
2184 if (!iwl_grab_nic_access(priv)) {
2185 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 2186 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 2187 iwl_release_nic_access(priv);
b481de9c
ZY
2188 }
2189 spin_unlock_irqrestore(&priv->lock, flags);
2190
2191 udelay(5);
2192
7f066108
TW
2193 /* FIXME: apm_ops.suspend(priv) */
2194 priv->cfg->ops->lib->apm_ops.reset(priv);
399f4900 2195 priv->cfg->ops->lib->free_shared_mem(priv);
b481de9c
ZY
2196
2197 exit:
885ba202 2198 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2199
2200 if (priv->ibss_beacon)
2201 dev_kfree_skb(priv->ibss_beacon);
2202 priv->ibss_beacon = NULL;
2203
2204 /* clear out any free frames */
fcab423d 2205 iwl_clear_free_frames(priv);
b481de9c
ZY
2206}
2207
c79dd5b5 2208static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2209{
2210 mutex_lock(&priv->mutex);
bb8c093b 2211 __iwl4965_down(priv);
b481de9c 2212 mutex_unlock(&priv->mutex);
b24d22b1 2213
4e39317d 2214 iwl_cancel_deferred_work(priv);
b481de9c
ZY
2215}
2216
2217#define MAX_HW_RESTARTS 5
2218
c79dd5b5 2219static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 2220{
57aab75a
TW
2221 int i;
2222 int ret;
b481de9c
ZY
2223
2224 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2225 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2226 return -EIO;
2227 }
2228
e903fbd4
RC
2229 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2230 IWL_ERROR("ucode not available for device bringup\n");
2231 return -EIO;
2232 }
2233
e655b9f0 2234 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 2235 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 2236 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2237 else
e655b9f0 2238 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2239
c1842d61
TW
2240 if (iwl_is_rfkill(priv)) {
2241 iwl4965_enable_interrupts(priv);
3bff19c2
EG
2242 IWL_WARNING("Radio disabled by %s RF Kill switch\n",
2243 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 2244 return 0;
b481de9c
ZY
2245 }
2246
3395f6e9 2247 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2248
399f4900
RR
2249 ret = priv->cfg->ops->lib->alloc_shared_mem(priv);
2250 if (ret) {
2251 IWL_ERROR("Unable to allocate shared memory\n");
2252 return ret;
2253 }
2254
1053d35f 2255 ret = iwl_hw_nic_init(priv);
57aab75a
TW
2256 if (ret) {
2257 IWL_ERROR("Unable to init nic\n");
2258 return ret;
b481de9c
ZY
2259 }
2260
2261 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
2262 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2263 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2264 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2265
2266 /* clear (again), then enable host interrupts */
3395f6e9 2267 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 2268 iwl4965_enable_interrupts(priv);
b481de9c
ZY
2269
2270 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
2271 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2272 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2273
2274 /* Copy original ucode data image from disk into backup cache.
2275 * This will be used to initialize the on-board processor's
2276 * data SRAM for a clean start when the runtime program first loads. */
2277 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2278 priv->ucode_data.len);
b481de9c 2279
b481de9c
ZY
2280 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2281
37deb2a0 2282 iwl_clear_stations_table(priv);
b481de9c
ZY
2283
2284 /* load bootstrap state machine,
2285 * load bootstrap program into processor's memory,
2286 * prepare to load the "initialize" uCode */
57aab75a 2287 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2288
57aab75a
TW
2289 if (ret) {
2290 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
2291 continue;
2292 }
2293
f3d5b45b
EG
2294 /* Clear out the uCode error bit if it is set */
2295 clear_bit(STATUS_FW_ERROR, &priv->status);
2296
b481de9c 2297 /* start card; "initialize" will load runtime ucode */
edcdf8b2 2298 iwl4965_nic_start(priv);
b481de9c 2299
b481de9c
ZY
2300 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2301
2302 return 0;
2303 }
2304
2305 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2306 __iwl4965_down(priv);
64e72c3e 2307 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2308
2309 /* tried to restart and config the device for as long as our
2310 * patience could withstand */
2311 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2312 return -EIO;
2313}
2314
2315
2316/*****************************************************************************
2317 *
2318 * Workqueue callbacks
2319 *
2320 *****************************************************************************/
2321
4a4a9e81 2322static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2323{
c79dd5b5
TW
2324 struct iwl_priv *priv =
2325 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2326
2327 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2328 return;
2329
2330 mutex_lock(&priv->mutex);
f3ccc08c 2331 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY
2332 mutex_unlock(&priv->mutex);
2333}
2334
4a4a9e81 2335static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2336{
c79dd5b5
TW
2337 struct iwl_priv *priv =
2338 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2339
2340 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2341 return;
2342
2343 mutex_lock(&priv->mutex);
4a4a9e81 2344 iwl_alive_start(priv);
b481de9c
ZY
2345 mutex_unlock(&priv->mutex);
2346}
2347
bb8c093b 2348static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 2349{
c79dd5b5 2350 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
2351
2352 wake_up_interruptible(&priv->wait_command_queue);
2353
2354 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2355 return;
2356
2357 mutex_lock(&priv->mutex);
2358
fee1247a 2359 if (!iwl_is_rfkill(priv)) {
f3d67999 2360 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY
2361 "HW and/or SW RF Kill no longer active, restarting "
2362 "device\n");
2363 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2364 queue_work(priv->workqueue, &priv->restart);
2365 } else {
ad97edd2
MA
2366 /* make sure mac80211 stop sending Tx frame */
2367 if (priv->mac80211_registered)
2368 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2369
2370 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2371 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2372 "disabled by SW switch\n");
2373 else
2374 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2375 "Kill switch must be turned off for "
2376 "wireless networking to work.\n");
2377 }
2378 mutex_unlock(&priv->mutex);
80fcc9e2 2379 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2380}
2381
4419e39b
AK
2382static void iwl4965_bg_set_monitor(struct work_struct *work)
2383{
2384 struct iwl_priv *priv = container_of(work,
2385 struct iwl_priv, set_monitor);
c46fbefa 2386 int ret;
4419e39b
AK
2387
2388 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
2389
2390 mutex_lock(&priv->mutex);
2391
c46fbefa
AK
2392 ret = iwl4965_set_mode(priv, IEEE80211_IF_TYPE_MNTR);
2393
2394 if (ret) {
2395 if (ret == -EAGAIN)
2396 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
2397 else
2398 IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret);
2399 }
4419e39b
AK
2400
2401 mutex_unlock(&priv->mutex);
2402}
2403
16e727e8
EG
2404static void iwl_bg_run_time_calib_work(struct work_struct *work)
2405{
2406 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2407 run_time_calib_work);
2408
2409 mutex_lock(&priv->mutex);
2410
2411 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2412 test_bit(STATUS_SCANNING, &priv->status)) {
2413 mutex_unlock(&priv->mutex);
2414 return;
2415 }
2416
2417 if (priv->start_calib) {
2418 iwl_chain_noise_calibration(priv, &priv->statistics);
2419
2420 iwl_sensitivity_calibration(priv, &priv->statistics);
2421 }
2422
2423 mutex_unlock(&priv->mutex);
2424 return;
2425}
2426
bb8c093b 2427static void iwl4965_bg_up(struct work_struct *data)
b481de9c 2428{
c79dd5b5 2429 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2430
2431 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2432 return;
2433
2434 mutex_lock(&priv->mutex);
bb8c093b 2435 __iwl4965_up(priv);
b481de9c 2436 mutex_unlock(&priv->mutex);
80fcc9e2 2437 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2438}
2439
bb8c093b 2440static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 2441{
c79dd5b5 2442 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2443
2444 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2445 return;
2446
bb8c093b 2447 iwl4965_down(priv);
b481de9c
ZY
2448 queue_work(priv->workqueue, &priv->up);
2449}
2450
bb8c093b 2451static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 2452{
c79dd5b5
TW
2453 struct iwl_priv *priv =
2454 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2455
2456 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2457 return;
2458
2459 mutex_lock(&priv->mutex);
a55360e4 2460 iwl_rx_replenish(priv);
b481de9c
ZY
2461 mutex_unlock(&priv->mutex);
2462}
2463
7878a5a4
MA
2464#define IWL_DELAY_NEXT_SCAN (HZ*2)
2465
508e32e1 2466static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 2467{
b481de9c 2468 struct ieee80211_conf *conf = NULL;
857485c0 2469 int ret = 0;
0795af57 2470 DECLARE_MAC_BUF(mac);
1ff50bda 2471 unsigned long flags;
b481de9c
ZY
2472
2473 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
3ac7f146 2474 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
2475 return;
2476 }
2477
0795af57
JP
2478 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
2479 priv->assoc_id,
2480 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY
2481
2482
2483 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2484 return;
2485
b481de9c 2486
508e32e1 2487 if (!priv->vif || !priv->is_open)
948c171c 2488 return;
508e32e1 2489
2a421b91 2490 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2491
b481de9c
ZY
2492 conf = ieee80211_get_hw_conf(priv->hw);
2493
2494 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2495 iwl4965_commit_rxon(priv);
b481de9c 2496
bb8c093b
CH
2497 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2498 iwl4965_setup_rxon_timing(priv);
857485c0 2499 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2500 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2501 if (ret)
b481de9c
ZY
2502 IWL_WARNING("REPLY_RXON_TIMING failed - "
2503 "Attempting to continue.\n");
2504
2505 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2506
fd105e79 2507 if (priv->current_ht_config.is_ht)
47c5196e 2508 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2509
c7de35cd 2510 iwl_set_rxon_chain(priv);
b481de9c
ZY
2511 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2512
2513 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2514 priv->assoc_id, priv->beacon_int);
2515
2516 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2517 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2518 else
2519 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2520
2521 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2522 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2523 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2524 else
2525 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2526
2527 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2528 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2529
2530 }
2531
bb8c093b 2532 iwl4965_commit_rxon(priv);
b481de9c
ZY
2533
2534 switch (priv->iw_mode) {
2535 case IEEE80211_IF_TYPE_STA:
b481de9c
ZY
2536 break;
2537
2538 case IEEE80211_IF_TYPE_IBSS:
2539
c46fbefa
AK
2540 /* assume default assoc id */
2541 priv->assoc_id = 1;
b481de9c 2542
4f40e4d9 2543 iwl_rxon_add_station(priv, priv->bssid, 0);
bb8c093b 2544 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2545
2546 break;
2547
2548 default:
2549 IWL_ERROR("%s Should not be called in %d mode\n",
3ac7f146 2550 __func__, priv->iw_mode);
b481de9c
ZY
2551 break;
2552 }
2553
b481de9c 2554 /* Enable Rx differential gain and sensitivity calibrations */
f0832f13 2555 iwl_chain_noise_reset(priv);
b481de9c 2556 priv->start_calib = 1;
b481de9c
ZY
2557
2558 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2559 priv->assoc_station_added = 1;
2560
1ff50bda
EG
2561 spin_lock_irqsave(&priv->lock, flags);
2562 iwl_activate_qos(priv, 0);
2563 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2564
5da4b55f 2565 iwl_power_update_mode(priv, 0);
7878a5a4
MA
2566 /* we have just associated, don't start scan too early */
2567 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
508e32e1
RC
2568}
2569
76bb77e0
ZY
2570static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
2571
2a421b91 2572static void iwl_bg_scan_completed(struct work_struct *work)
b481de9c 2573{
c79dd5b5
TW
2574 struct iwl_priv *priv =
2575 container_of(work, struct iwl_priv, scan_completed);
b481de9c 2576
630fe9b6 2577 IWL_DEBUG_SCAN("SCAN complete scan\n");
b481de9c
ZY
2578
2579 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2580 return;
2581
a0646470
ZY
2582 if (test_bit(STATUS_CONF_PENDING, &priv->status))
2583 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 2584
b481de9c
ZY
2585 ieee80211_scan_completed(priv->hw);
2586
2587 /* Since setting the TXPOWER may have been deferred while
2588 * performing the scan, fire one off */
2589 mutex_lock(&priv->mutex);
630fe9b6 2590 iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
b481de9c
ZY
2591 mutex_unlock(&priv->mutex);
2592}
2593
2594/*****************************************************************************
2595 *
2596 * mac80211 entry point functions
2597 *
2598 *****************************************************************************/
2599
154b25ce 2600#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2601
bb8c093b 2602static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 2603{
c79dd5b5 2604 struct iwl_priv *priv = hw->priv;
5a66926a 2605 int ret;
b481de9c
ZY
2606
2607 IWL_DEBUG_MAC80211("enter\n");
2608
5a66926a
ZY
2609 if (pci_enable_device(priv->pci_dev)) {
2610 IWL_ERROR("Fail to pci_enable_device\n");
2611 return -ENODEV;
2612 }
2613 pci_restore_state(priv->pci_dev);
2614 pci_enable_msi(priv->pci_dev);
2615
2616 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
2617 DRV_NAME, priv);
2618 if (ret) {
2619 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2620 goto out_disable_msi;
2621 }
2622
b481de9c
ZY
2623 /* we should be verifying the device is ready to be opened */
2624 mutex_lock(&priv->mutex);
2625
c1adf9fb 2626 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY
2627 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2628 * ucode filename and max sizes are card-specific. */
b481de9c 2629
5a66926a
ZY
2630 if (!priv->ucode_code.len) {
2631 ret = iwl4965_read_ucode(priv);
2632 if (ret) {
2633 IWL_ERROR("Could not read microcode: %d\n", ret);
2634 mutex_unlock(&priv->mutex);
2635 goto out_release_irq;
2636 }
2637 }
b481de9c 2638
e655b9f0 2639 ret = __iwl4965_up(priv);
5a66926a 2640
b481de9c 2641 mutex_unlock(&priv->mutex);
5a66926a 2642
80fcc9e2
AG
2643 iwl_rfkill_set_hw_state(priv);
2644
e655b9f0
ZY
2645 if (ret)
2646 goto out_release_irq;
2647
c1842d61
TW
2648 if (iwl_is_rfkill(priv))
2649 goto out;
2650
e655b9f0
ZY
2651 IWL_DEBUG_INFO("Start UP work done.\n");
2652
2653 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2654 return 0;
2655
fe9b6b72 2656 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2657 * mac80211 will not be run successfully. */
154b25ce
EG
2658 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2659 test_bit(STATUS_READY, &priv->status),
2660 UCODE_READY_TIMEOUT);
2661 if (!ret) {
2662 if (!test_bit(STATUS_READY, &priv->status)) {
2663 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2664 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2665 ret = -ETIMEDOUT;
2666 goto out_release_irq;
5a66926a 2667 }
fe9b6b72 2668 }
0a078ffa 2669
c1842d61 2670out:
0a078ffa 2671 priv->is_open = 1;
b481de9c
ZY
2672 IWL_DEBUG_MAC80211("leave\n");
2673 return 0;
5a66926a
ZY
2674
2675out_release_irq:
2676 free_irq(priv->pci_dev->irq, priv);
2677out_disable_msi:
2678 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
2679 pci_disable_device(priv->pci_dev);
2680 priv->is_open = 0;
2681 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2682 return ret;
b481de9c
ZY
2683}
2684
bb8c093b 2685static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 2686{
c79dd5b5 2687 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2688
2689 IWL_DEBUG_MAC80211("enter\n");
948c171c 2690
e655b9f0
ZY
2691 if (!priv->is_open) {
2692 IWL_DEBUG_MAC80211("leave - skip\n");
2693 return;
2694 }
2695
b481de9c 2696 priv->is_open = 0;
5a66926a 2697
fee1247a 2698 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
2699 /* stop mac, cancel any scan request and clear
2700 * RXON_FILTER_ASSOC_MSK BIT
2701 */
5a66926a 2702 mutex_lock(&priv->mutex);
2a421b91 2703 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2704 mutex_unlock(&priv->mutex);
fde3571f
MA
2705 }
2706
5a66926a
ZY
2707 iwl4965_down(priv);
2708
2709 flush_workqueue(priv->workqueue);
2710 free_irq(priv->pci_dev->irq, priv);
2711 pci_disable_msi(priv->pci_dev);
2712 pci_save_state(priv->pci_dev);
2713 pci_disable_device(priv->pci_dev);
948c171c 2714
b481de9c 2715 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2716}
2717
e039fa4a 2718static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2719{
c79dd5b5 2720 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2721
2722 IWL_DEBUG_MAC80211("enter\n");
2723
2724 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2725 IWL_DEBUG_MAC80211("leave - monitor\n");
6afe6828
ZY
2726 dev_kfree_skb_any(skb);
2727 return 0;
b481de9c
ZY
2728 }
2729
2730 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2731 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2732
e039fa4a 2733 if (iwl_tx_skb(priv, skb))
b481de9c
ZY
2734 dev_kfree_skb_any(skb);
2735
2736 IWL_DEBUG_MAC80211("leave\n");
2737 return 0;
2738}
2739
bb8c093b 2740static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2741 struct ieee80211_if_init_conf *conf)
2742{
c79dd5b5 2743 struct iwl_priv *priv = hw->priv;
b481de9c 2744 unsigned long flags;
0795af57 2745 DECLARE_MAC_BUF(mac);
b481de9c 2746
32bfd35d 2747 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2748
32bfd35d
JB
2749 if (priv->vif) {
2750 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2751 return -EOPNOTSUPP;
b481de9c
ZY
2752 }
2753
2754 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2755 priv->vif = conf->vif;
b481de9c
ZY
2756
2757 spin_unlock_irqrestore(&priv->lock, flags);
2758
2759 mutex_lock(&priv->mutex);
864792e3
TW
2760
2761 if (conf->mac_addr) {
2762 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
2763 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2764 }
b481de9c 2765
c46fbefa
AK
2766 if (iwl4965_set_mode(priv, conf->type) == -EAGAIN)
2767 /* we are not ready, will run again when ready */
2768 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2769
b481de9c
ZY
2770 mutex_unlock(&priv->mutex);
2771
5a66926a 2772 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2773 return 0;
2774}
2775
2776/**
bb8c093b 2777 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
2778 *
2779 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2780 * be set inappropriately and the driver currently sets the hardware up to
2781 * use it whenever needed.
2782 */
bb8c093b 2783static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 2784{
c79dd5b5 2785 struct iwl_priv *priv = hw->priv;
bf85ea4f 2786 const struct iwl_channel_info *ch_info;
b481de9c 2787 unsigned long flags;
76bb77e0 2788 int ret = 0;
82a66bbb 2789 u16 channel;
b481de9c
ZY
2790
2791 mutex_lock(&priv->mutex);
8318d78a 2792 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2793
12342c47
ZY
2794 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2795
14a08a7f 2796 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2797 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2798 goto out;
64e72c3e
MA
2799 }
2800
14a08a7f
EG
2801 if (!conf->radio_enabled)
2802 iwl_radio_kill_sw_disable_radio(priv);
2803
fee1247a 2804 if (!iwl_is_ready(priv)) {
b481de9c 2805 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
2806 ret = -EIO;
2807 goto out;
b481de9c
ZY
2808 }
2809
1ea87396 2810 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2811 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY
2812 IWL_DEBUG_MAC80211("leave - scanning\n");
2813 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 2814 mutex_unlock(&priv->mutex);
a0646470 2815 return 0;
b481de9c
ZY
2816 }
2817
82a66bbb
TW
2818 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2819 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2820 if (!is_channel_valid(ch_info)) {
b481de9c 2821 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY
2822 ret = -EINVAL;
2823 goto out;
b481de9c
ZY
2824 }
2825
398f9e76
AK
2826 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
2827 !is_channel_ibss(ch_info)) {
2828 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2829 conf->channel->hw_value, conf->channel->band);
2830 ret = -EINVAL;
2831 goto out;
2832 }
2833
82a66bbb
TW
2834 spin_lock_irqsave(&priv->lock, flags);
2835
b5d7be5e 2836
78330fdd 2837 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
2838 * from any ht related info since 2.4 does not
2839 * support ht */
82a66bbb 2840 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY
2841#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2842 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2843#endif
2844 )
2845 priv->staging_rxon.flags = 0;
b481de9c 2846
82a66bbb 2847 iwl_set_rxon_channel(priv, conf->channel->band, channel);
b481de9c 2848
82a66bbb 2849 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
2850
2851 /* The list of supported rates and rate mask can be different
8318d78a 2852 * for each band; since the band may have changed, reset
b481de9c 2853 * the rate mask to what mac80211 lists */
bb8c093b 2854 iwl4965_set_rate(priv);
b481de9c
ZY
2855
2856 spin_unlock_irqrestore(&priv->lock, flags);
2857
2858#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2859 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 2860 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 2861 goto out;
b481de9c
ZY
2862 }
2863#endif
2864
b481de9c
ZY
2865 if (!conf->radio_enabled) {
2866 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2867 goto out;
b481de9c
ZY
2868 }
2869
fee1247a 2870 if (iwl_is_rfkill(priv)) {
b481de9c 2871 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
2872 ret = -EIO;
2873 goto out;
b481de9c
ZY
2874 }
2875
630fe9b6
TW
2876 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2877 priv->tx_power_user_lmt, conf->power_level);
2878
2879 iwl_set_tx_power(priv, conf->power_level, false);
2880
bb8c093b 2881 iwl4965_set_rate(priv);
b481de9c
ZY
2882
2883 if (memcmp(&priv->active_rxon,
2884 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 2885 iwl4965_commit_rxon(priv);
b481de9c
ZY
2886 else
2887 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2888
2889 IWL_DEBUG_MAC80211("leave\n");
2890
a0646470
ZY
2891out:
2892 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 2893 mutex_unlock(&priv->mutex);
76bb77e0 2894 return ret;
b481de9c
ZY
2895}
2896
c79dd5b5 2897static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 2898{
857485c0 2899 int ret = 0;
1ff50bda 2900 unsigned long flags;
b481de9c 2901
d986bcd1 2902 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
2903 return;
2904
2905 /* The following should be done only at AP bring up */
5d1e2325 2906 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
2907
2908 /* RXON - unassoc (to set timing command) */
2909 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2910 iwl4965_commit_rxon(priv);
b481de9c
ZY
2911
2912 /* RXON Timing */
bb8c093b
CH
2913 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2914 iwl4965_setup_rxon_timing(priv);
857485c0 2915 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2916 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2917 if (ret)
b481de9c
ZY
2918 IWL_WARNING("REPLY_RXON_TIMING failed - "
2919 "Attempting to continue.\n");
2920
c7de35cd 2921 iwl_set_rxon_chain(priv);
b481de9c
ZY
2922
2923 /* FIXME: what should be the assoc_id for AP? */
2924 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2925 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2926 priv->staging_rxon.flags |=
2927 RXON_FLG_SHORT_PREAMBLE_MSK;
2928 else
2929 priv->staging_rxon.flags &=
2930 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2931
2932 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2933 if (priv->assoc_capability &
2934 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2935 priv->staging_rxon.flags |=
2936 RXON_FLG_SHORT_SLOT_MSK;
2937 else
2938 priv->staging_rxon.flags &=
2939 ~RXON_FLG_SHORT_SLOT_MSK;
2940
2941 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2942 priv->staging_rxon.flags &=
2943 ~RXON_FLG_SHORT_SLOT_MSK;
2944 }
2945 /* restore RXON assoc */
2946 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 2947 iwl4965_commit_rxon(priv);
1ff50bda
EG
2948 spin_lock_irqsave(&priv->lock, flags);
2949 iwl_activate_qos(priv, 1);
2950 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2951 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2952 }
bb8c093b 2953 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2954
2955 /* FIXME - we need to add code here to detect a totally new
2956 * configuration, reset the AP, unassoc, rxon timing, assoc,
2957 * clear sta table, add BCAST sta... */
2958}
2959
9d139c81
JB
2960/* temporary */
2961static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb);
2962
32bfd35d
JB
2963static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
2964 struct ieee80211_vif *vif,
b481de9c
ZY
2965 struct ieee80211_if_conf *conf)
2966{
c79dd5b5 2967 struct iwl_priv *priv = hw->priv;
0795af57 2968 DECLARE_MAC_BUF(mac);
b481de9c
ZY
2969 unsigned long flags;
2970 int rc;
2971
2972 if (conf == NULL)
2973 return -EIO;
2974
b716bb91
EG
2975 if (priv->vif != vif) {
2976 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
2977 return 0;
2978 }
2979
9d139c81
JB
2980 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
2981 conf->changed & IEEE80211_IFCC_BEACON) {
2982 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2983 if (!beacon)
2984 return -ENOMEM;
2985 rc = iwl4965_mac_beacon_update(hw, beacon);
2986 if (rc)
2987 return rc;
2988 }
2989
b481de9c 2990 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
9d139c81 2991 (!conf->ssid_len)) {
b481de9c
ZY
2992 IWL_DEBUG_MAC80211
2993 ("Leaving in AP mode because HostAPD is not ready.\n");
2994 return 0;
2995 }
2996
fee1247a 2997 if (!iwl_is_alive(priv))
5a66926a
ZY
2998 return -EAGAIN;
2999
b481de9c
ZY
3000 mutex_lock(&priv->mutex);
3001
b481de9c 3002 if (conf->bssid)
0795af57
JP
3003 IWL_DEBUG_MAC80211("bssid: %s\n",
3004 print_mac(mac, conf->bssid));
b481de9c 3005
4150c572
JB
3006/*
3007 * very dubious code was here; the probe filtering flag is never set:
3008 *
b481de9c
ZY
3009 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
3010 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 3011 */
b481de9c
ZY
3012
3013 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
3014 if (!conf->bssid) {
3015 conf->bssid = priv->mac_addr;
3016 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP
3017 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
3018 print_mac(mac, conf->bssid));
b481de9c
ZY
3019 }
3020 if (priv->ibss_beacon)
3021 dev_kfree_skb(priv->ibss_beacon);
3022
9d139c81 3023 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
3024 }
3025
fee1247a 3026 if (iwl_is_rfkill(priv))
fde3571f
MA
3027 goto done;
3028
b481de9c
ZY
3029 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
3030 !is_multicast_ether_addr(conf->bssid)) {
3031 /* If there is currently a HW scan going on in the background
3032 * then we need to cancel it else the RXON below will fail. */
2a421b91 3033 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
3034 IWL_WARNING("Aborted scan still in progress "
3035 "after 100ms\n");
3036 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
3037 mutex_unlock(&priv->mutex);
3038 return -EAGAIN;
3039 }
3040 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
3041
3042 /* TODO: Audit driver for usage of these members and see
3043 * if mac80211 deprecates them (priv->bssid looks like it
3044 * shouldn't be there, but I haven't scanned the IBSS code
3045 * to verify) - jpk */
3046 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
3047
3048 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 3049 iwl4965_config_ap(priv);
b481de9c 3050 else {
bb8c093b 3051 rc = iwl4965_commit_rxon(priv);
b481de9c 3052 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
4f40e4d9 3053 iwl_rxon_add_station(
b481de9c
ZY
3054 priv, priv->active_rxon.bssid_addr, 1);
3055 }
3056
3057 } else {
2a421b91 3058 iwl_scan_cancel_timeout(priv, 100);
b481de9c 3059 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3060 iwl4965_commit_rxon(priv);
b481de9c
ZY
3061 }
3062
fde3571f 3063 done:
b481de9c
ZY
3064 spin_lock_irqsave(&priv->lock, flags);
3065 if (!conf->ssid_len)
3066 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3067 else
3068 memcpy(priv->essid, conf->ssid, conf->ssid_len);
3069
3070 priv->essid_len = conf->ssid_len;
3071 spin_unlock_irqrestore(&priv->lock, flags);
3072
3073 IWL_DEBUG_MAC80211("leave\n");
3074 mutex_unlock(&priv->mutex);
3075
3076 return 0;
3077}
3078
bb8c093b 3079static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
3080 unsigned int changed_flags,
3081 unsigned int *total_flags,
3082 int mc_count, struct dev_addr_list *mc_list)
3083{
4419e39b 3084 struct iwl_priv *priv = hw->priv;
25b3f57c
RF
3085
3086 if (changed_flags & (*total_flags) & FIF_OTHER_BSS) {
3087 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
3088 IEEE80211_IF_TYPE_MNTR,
3089 changed_flags, *total_flags);
3090 /* queue work 'cuz mac80211 is holding a lock which
3091 * prevents us from issuing (synchronous) f/w cmds */
3092 queue_work(priv->workqueue, &priv->set_monitor);
4419e39b 3093 }
25b3f57c
RF
3094 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI |
3095 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4150c572
JB
3096}
3097
bb8c093b 3098static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3099 struct ieee80211_if_init_conf *conf)
3100{
c79dd5b5 3101 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3102
3103 IWL_DEBUG_MAC80211("enter\n");
3104
3105 mutex_lock(&priv->mutex);
948c171c 3106
fee1247a 3107 if (iwl_is_ready_rf(priv)) {
2a421b91 3108 iwl_scan_cancel_timeout(priv, 100);
fde3571f
MA
3109 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3110 iwl4965_commit_rxon(priv);
3111 }
32bfd35d
JB
3112 if (priv->vif == conf->vif) {
3113 priv->vif = NULL;
b481de9c
ZY
3114 memset(priv->bssid, 0, ETH_ALEN);
3115 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3116 priv->essid_len = 0;
3117 }
3118 mutex_unlock(&priv->mutex);
3119
3120 IWL_DEBUG_MAC80211("leave\n");
3121
3122}
471b3efd 3123
3109ece1 3124#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB
3125static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
3126 struct ieee80211_vif *vif,
3127 struct ieee80211_bss_conf *bss_conf,
3128 u32 changes)
220173b0 3129{
c79dd5b5 3130 struct iwl_priv *priv = hw->priv;
220173b0 3131
3109ece1
TW
3132 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
3133
471b3efd 3134 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
3135 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
3136 bss_conf->use_short_preamble);
471b3efd 3137 if (bss_conf->use_short_preamble)
220173b0
TW
3138 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3139 else
3140 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3141 }
3142
471b3efd 3143 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 3144 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 3145 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
3146 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
3147 else
3148 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
3149 }
3150
98952d5d 3151 if (changes & BSS_CHANGED_HT) {
3109ece1 3152 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d 3153 iwl4965_ht_conf(priv, bss_conf);
c7de35cd 3154 iwl_set_rxon_chain(priv);
98952d5d
TW
3155 }
3156
471b3efd 3157 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 3158 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
3159 /* This should never happen as this function should
3160 * never be called from interrupt context. */
3161 if (WARN_ON_ONCE(in_interrupt()))
3162 return;
3109ece1
TW
3163 if (bss_conf->assoc) {
3164 priv->assoc_id = bss_conf->aid;
3165 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 3166 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW
3167 priv->timestamp = bss_conf->timestamp;
3168 priv->assoc_capability = bss_conf->assoc_capability;
3169 priv->next_scan_jiffies = jiffies +
3170 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC
3171 mutex_lock(&priv->mutex);
3172 iwl4965_post_associate(priv);
3173 mutex_unlock(&priv->mutex);
3109ece1
TW
3174 } else {
3175 priv->assoc_id = 0;
3176 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
3177 }
3178 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
3179 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 3180 iwl_send_rxon_assoc(priv);
471b3efd
JB
3181 }
3182
220173b0 3183}
b481de9c 3184
bb8c093b 3185static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY
3186{
3187 int rc = 0;
3188 unsigned long flags;
c79dd5b5 3189 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3190
3191 IWL_DEBUG_MAC80211("enter\n");
3192
052c4b9f 3193 mutex_lock(&priv->mutex);
b481de9c
ZY
3194 spin_lock_irqsave(&priv->lock, flags);
3195
fee1247a 3196 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3197 rc = -EIO;
3198 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
3199 goto out_unlock;
3200 }
3201
3202 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
3203 rc = -EIO;
3204 IWL_ERROR("ERROR: APs don't scan\n");
3205 goto out_unlock;
3206 }
3207
7878a5a4
MA
3208 /* we don't schedule scan within next_scan_jiffies period */
3209 if (priv->next_scan_jiffies &&
3210 time_after(priv->next_scan_jiffies, jiffies)) {
3211 rc = -EAGAIN;
3212 goto out_unlock;
3213 }
b481de9c 3214 /* if we just finished scan ask for delay */
7878a5a4
MA
3215 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
3216 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY
3217 rc = -EAGAIN;
3218 goto out_unlock;
3219 }
3220 if (len) {
7878a5a4 3221 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
2a421b91 3222 iwl_escape_essid(ssid, len), (int)len);
b481de9c
ZY
3223
3224 priv->one_direct_scan = 1;
3225 priv->direct_ssid_len = (u8)
3226 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
3227 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA
3228 } else
3229 priv->one_direct_scan = 0;
b481de9c 3230
2a421b91 3231 rc = iwl_scan_initiate(priv);
b481de9c
ZY
3232
3233 IWL_DEBUG_MAC80211("leave\n");
3234
3235out_unlock:
3236 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3237 mutex_unlock(&priv->mutex);
b481de9c
ZY
3238
3239 return rc;
3240}
3241
ab885f8c
EG
3242static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
3243 struct ieee80211_key_conf *keyconf, const u8 *addr,
3244 u32 iv32, u16 *phase1key)
3245{
3246 struct iwl_priv *priv = hw->priv;
3247 u8 sta_id = IWL_INVALID_STATION;
3248 unsigned long flags;
3249 __le16 key_flags = 0;
3250 int i;
3251 DECLARE_MAC_BUF(mac);
3252
3253 IWL_DEBUG_MAC80211("enter\n");
3254
947b13a7 3255 sta_id = iwl_find_station(priv, addr);
ab885f8c
EG
3256 if (sta_id == IWL_INVALID_STATION) {
3257 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3258 print_mac(mac, addr));
3259 return;
3260 }
3261
2a421b91 3262 iwl_scan_cancel_timeout(priv, 100);
ab885f8c
EG
3263
3264 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
3265 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3266 key_flags &= ~STA_KEY_FLG_INVALID;
3267
5425e490 3268 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG
3269 key_flags |= STA_KEY_MULTICAST_MSK;
3270
3271 spin_lock_irqsave(&priv->sta_lock, flags);
3272
ab885f8c
EG
3273 priv->stations[sta_id].sta.key.key_flags = key_flags;
3274 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
3275
3276 for (i = 0; i < 5; i++)
3277 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3278 cpu_to_le16(phase1key[i]);
3279
3280 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3281 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3282
133636de 3283 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
ab885f8c
EG
3284
3285 spin_unlock_irqrestore(&priv->sta_lock, flags);
3286
3287 IWL_DEBUG_MAC80211("leave\n");
3288}
3289
bb8c093b 3290static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
3291 const u8 *local_addr, const u8 *addr,
3292 struct ieee80211_key_conf *key)
3293{
c79dd5b5 3294 struct iwl_priv *priv = hw->priv;
0795af57 3295 DECLARE_MAC_BUF(mac);
deb09c43
EG
3296 int ret = 0;
3297 u8 sta_id = IWL_INVALID_STATION;
6974e363 3298 u8 is_default_wep_key = 0;
b481de9c
ZY
3299
3300 IWL_DEBUG_MAC80211("enter\n");
3301
099b40b7 3302 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
3303 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3304 return -EOPNOTSUPP;
3305 }
3306
3307 if (is_zero_ether_addr(addr))
3308 /* only support pairwise keys */
3309 return -EOPNOTSUPP;
3310
947b13a7 3311 sta_id = iwl_find_station(priv, addr);
6974e363
EG
3312 if (sta_id == IWL_INVALID_STATION) {
3313 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3314 print_mac(mac, addr));
3315 return -EINVAL;
b481de9c 3316
deb09c43 3317 }
b481de9c 3318
6974e363 3319 mutex_lock(&priv->mutex);
2a421b91 3320 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG
3321 mutex_unlock(&priv->mutex);
3322
3323 /* If we are getting WEP group key and we didn't receive any key mapping
3324 * so far, we are in legacy wep mode (group key only), otherwise we are
3325 * in 1X mode.
3326 * In legacy wep mode, we use another host command to the uCode */
5425e490 3327 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
6974e363
EG
3328 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3329 if (cmd == SET_KEY)
3330 is_default_wep_key = !priv->key_mapping_key;
3331 else
ccc038ab
EG
3332 is_default_wep_key =
3333 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3334 }
052c4b9f 3335
b481de9c 3336 switch (cmd) {
deb09c43 3337 case SET_KEY:
6974e363
EG
3338 if (is_default_wep_key)
3339 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3340 else
7480513f 3341 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
3342
3343 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
3344 break;
3345 case DISABLE_KEY:
6974e363
EG
3346 if (is_default_wep_key)
3347 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3348 else
3ec47732 3349 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
3350
3351 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
3352 break;
3353 default:
deb09c43 3354 ret = -EINVAL;
b481de9c
ZY
3355 }
3356
3357 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3358
deb09c43 3359 return ret;
b481de9c
ZY
3360}
3361
e100bb64 3362static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
3363 const struct ieee80211_tx_queue_params *params)
3364{
c79dd5b5 3365 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3366 unsigned long flags;
3367 int q;
b481de9c
ZY
3368
3369 IWL_DEBUG_MAC80211("enter\n");
3370
fee1247a 3371 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3372 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3373 return -EIO;
3374 }
3375
3376 if (queue >= AC_NUM) {
3377 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3378 return 0;
3379 }
3380
b481de9c
ZY
3381 if (!priv->qos_data.qos_enable) {
3382 priv->qos_data.qos_active = 0;
3383 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
3384 return 0;
3385 }
3386 q = AC_NUM - 1 - queue;
3387
3388 spin_lock_irqsave(&priv->lock, flags);
3389
3390 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3391 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3392 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3393 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3394 cpu_to_le16((params->txop * 32));
b481de9c
ZY
3395
3396 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3397 priv->qos_data.qos_active = 1;
3398
b481de9c 3399 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
1ff50bda 3400 iwl_activate_qos(priv, 1);
3109ece1 3401 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 3402 iwl_activate_qos(priv, 0);
b481de9c 3403
1ff50bda 3404 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3405
b481de9c
ZY
3406 IWL_DEBUG_MAC80211("leave\n");
3407 return 0;
3408}
3409
d783b061
TW
3410static int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3411 enum ieee80211_ampdu_mlme_action action,
3412 const u8 *addr, u16 tid, u16 *ssn)
3413{
3414 struct iwl_priv *priv = hw->priv;
3415 DECLARE_MAC_BUF(mac);
3416
3417 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3418 print_mac(mac, addr), tid);
3419
3420 if (!(priv->cfg->sku & IWL_SKU_N))
3421 return -EACCES;
3422
3423 switch (action) {
3424 case IEEE80211_AMPDU_RX_START:
3425 IWL_DEBUG_HT("start Rx\n");
3426 return iwl_rx_agg_start(priv, addr, tid, *ssn);
3427 case IEEE80211_AMPDU_RX_STOP:
3428 IWL_DEBUG_HT("stop Rx\n");
3429 return iwl_rx_agg_stop(priv, addr, tid);
3430 case IEEE80211_AMPDU_TX_START:
3431 IWL_DEBUG_HT("start Tx\n");
3432 return iwl_tx_agg_start(priv, addr, tid, ssn);
3433 case IEEE80211_AMPDU_TX_STOP:
3434 IWL_DEBUG_HT("stop Tx\n");
3435 return iwl_tx_agg_stop(priv, addr, tid);
3436 default:
3437 IWL_DEBUG_HT("unknown\n");
3438 return -EINVAL;
3439 break;
3440 }
3441 return 0;
3442}
bb8c093b 3443static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3444 struct ieee80211_tx_queue_stats *stats)
3445{
c79dd5b5 3446 struct iwl_priv *priv = hw->priv;
b481de9c 3447 int i, avail;
16466903 3448 struct iwl_tx_queue *txq;
443cfd45 3449 struct iwl_queue *q;
b481de9c
ZY
3450 unsigned long flags;
3451
3452 IWL_DEBUG_MAC80211("enter\n");
3453
fee1247a 3454 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3455 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3456 return -EIO;
3457 }
3458
3459 spin_lock_irqsave(&priv->lock, flags);
3460
3461 for (i = 0; i < AC_NUM; i++) {
3462 txq = &priv->txq[i];
3463 q = &txq->q;
443cfd45 3464 avail = iwl_queue_space(q);
b481de9c 3465
57ffc589
JB
3466 stats[i].len = q->n_window - avail;
3467 stats[i].limit = q->n_window - q->high_mark;
3468 stats[i].count = q->n_window;
b481de9c
ZY
3469
3470 }
3471 spin_unlock_irqrestore(&priv->lock, flags);
3472
3473 IWL_DEBUG_MAC80211("leave\n");
3474
3475 return 0;
3476}
3477
bb8c093b 3478static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3479 struct ieee80211_low_level_stats *stats)
3480{
bf403db8
EK
3481 struct iwl_priv *priv = hw->priv;
3482
3483 priv = hw->priv;
b481de9c
ZY
3484 IWL_DEBUG_MAC80211("enter\n");
3485 IWL_DEBUG_MAC80211("leave\n");
3486
3487 return 0;
3488}
3489
bb8c093b 3490static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3491{
c79dd5b5 3492 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3493 unsigned long flags;
3494
3495 mutex_lock(&priv->mutex);
3496 IWL_DEBUG_MAC80211("enter\n");
3497
b481de9c 3498 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3499 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3500 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3501
c7de35cd 3502 iwl_reset_qos(priv);
b481de9c 3503
b481de9c
ZY
3504 spin_lock_irqsave(&priv->lock, flags);
3505 priv->assoc_id = 0;
3506 priv->assoc_capability = 0;
b481de9c
ZY
3507 priv->assoc_station_added = 0;
3508
3509 /* new association get rid of ibss beacon skb */
3510 if (priv->ibss_beacon)
3511 dev_kfree_skb(priv->ibss_beacon);
3512
3513 priv->ibss_beacon = NULL;
3514
3515 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3516 priv->timestamp = 0;
b481de9c
ZY
3517 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
3518 priv->beacon_int = 0;
3519
3520 spin_unlock_irqrestore(&priv->lock, flags);
3521
fee1247a 3522 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
3523 IWL_DEBUG_MAC80211("leave - not ready\n");
3524 mutex_unlock(&priv->mutex);
3525 return;
3526 }
3527
052c4b9f 3528 /* we are restarting association process
3529 * clear RXON_FILTER_ASSOC_MSK bit
3530 */
3531 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2a421b91 3532 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3533 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3534 iwl4965_commit_rxon(priv);
052c4b9f 3535 }
3536
5da4b55f
MA
3537 iwl_power_update_mode(priv, 0);
3538
b481de9c
ZY
3539 /* Per mac80211.h: This is only used in IBSS mode... */
3540 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 3541
b481de9c
ZY
3542 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3543 mutex_unlock(&priv->mutex);
3544 return;
3545 }
3546
bb8c093b 3547 iwl4965_set_rate(priv);
b481de9c
ZY
3548
3549 mutex_unlock(&priv->mutex);
3550
3551 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
3552}
3553
e039fa4a 3554static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3555{
c79dd5b5 3556 struct iwl_priv *priv = hw->priv;
b481de9c 3557 unsigned long flags;
2ff75b78 3558 __le64 timestamp;
b481de9c
ZY
3559
3560 mutex_lock(&priv->mutex);
3561 IWL_DEBUG_MAC80211("enter\n");
3562
fee1247a 3563 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3564 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3565 mutex_unlock(&priv->mutex);
3566 return -EIO;
3567 }
3568
3569 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
3570 IWL_DEBUG_MAC80211("leave - not IBSS\n");
3571 mutex_unlock(&priv->mutex);
3572 return -EIO;
3573 }
3574
3575 spin_lock_irqsave(&priv->lock, flags);
3576
3577 if (priv->ibss_beacon)
3578 dev_kfree_skb(priv->ibss_beacon);
3579
3580 priv->ibss_beacon = skb;
3581
3582 priv->assoc_id = 0;
2ff75b78
AK
3583 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
3584 priv->timestamp = le64_to_cpu(timestamp) + (priv->beacon_int * 1000);
b481de9c
ZY
3585
3586 IWL_DEBUG_MAC80211("leave\n");
3587 spin_unlock_irqrestore(&priv->lock, flags);
3588
c7de35cd 3589 iwl_reset_qos(priv);
b481de9c 3590
c46fbefa 3591 iwl4965_post_associate(priv);
b481de9c
ZY
3592
3593 mutex_unlock(&priv->mutex);
3594
3595 return 0;
3596}
3597
b481de9c
ZY
3598/*****************************************************************************
3599 *
3600 * sysfs attributes
3601 *
3602 *****************************************************************************/
3603
0a6857e7 3604#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3605
3606/*
3607 * The following adds a new attribute to the sysfs representation
3608 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3609 * used for controlling the debug level.
3610 *
3611 * See the level definitions in iwl for details.
3612 */
3613
8cf769c6
EK
3614static ssize_t show_debug_level(struct device *d,
3615 struct device_attribute *attr, char *buf)
b481de9c 3616{
8cf769c6
EK
3617 struct iwl_priv *priv = d->driver_data;
3618
3619 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3620}
8cf769c6
EK
3621static ssize_t store_debug_level(struct device *d,
3622 struct device_attribute *attr,
b481de9c
ZY
3623 const char *buf, size_t count)
3624{
8cf769c6 3625 struct iwl_priv *priv = d->driver_data;
b481de9c
ZY
3626 char *p = (char *)buf;
3627 u32 val;
3628
3629 val = simple_strtoul(p, &p, 0);
3630 if (p == buf)
3631 printk(KERN_INFO DRV_NAME
3632 ": %s is not in hex or decimal form.\n", buf);
3633 else
8cf769c6 3634 priv->debug_level = val;
b481de9c
ZY
3635
3636 return strnlen(buf, count);
3637}
3638
8cf769c6
EK
3639static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3640 show_debug_level, store_debug_level);
3641
b481de9c 3642
0a6857e7 3643#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3644
b481de9c 3645
bc6f59bc
TW
3646static ssize_t show_version(struct device *d,
3647 struct device_attribute *attr, char *buf)
3648{
3649 struct iwl_priv *priv = d->driver_data;
885ba202 3650 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW
3651 ssize_t pos = 0;
3652 u16 eeprom_ver;
bc6f59bc
TW
3653
3654 if (palive->is_valid)
f236a265
TW
3655 pos += sprintf(buf + pos,
3656 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3657 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW
3658 palive->ucode_major, palive->ucode_minor,
3659 palive->sw_rev[0], palive->sw_rev[1],
3660 palive->ver_type, palive->ver_subtype);
bc6f59bc 3661 else
f236a265
TW
3662 pos += sprintf(buf + pos, "fw not loaded\n");
3663
3664 if (priv->eeprom) {
3665 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3666 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3667 eeprom_ver);
3668 } else {
3669 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3670 }
3671
3672 return pos;
bc6f59bc
TW
3673}
3674
3675static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3676
b481de9c
ZY
3677static ssize_t show_temperature(struct device *d,
3678 struct device_attribute *attr, char *buf)
3679{
c79dd5b5 3680 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3681
fee1247a 3682 if (!iwl_is_alive(priv))
b481de9c
ZY
3683 return -EAGAIN;
3684
91dbc5bd 3685 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY
3686}
3687
3688static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3689
b481de9c
ZY
3690static ssize_t show_tx_power(struct device *d,
3691 struct device_attribute *attr, char *buf)
3692{
c79dd5b5 3693 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
630fe9b6 3694 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3695}
3696
3697static ssize_t store_tx_power(struct device *d,
3698 struct device_attribute *attr,
3699 const char *buf, size_t count)
3700{
c79dd5b5 3701 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3702 char *p = (char *)buf;
3703 u32 val;
3704
3705 val = simple_strtoul(p, &p, 10);
3706 if (p == buf)
3707 printk(KERN_INFO DRV_NAME
3708 ": %s is not in decimal form.\n", buf);
3709 else
630fe9b6 3710 iwl_set_tx_power(priv, val, false);
b481de9c
ZY
3711
3712 return count;
3713}
3714
3715static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3716
3717static ssize_t show_flags(struct device *d,
3718 struct device_attribute *attr, char *buf)
3719{
c79dd5b5 3720 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3721
3722 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3723}
3724
3725static ssize_t store_flags(struct device *d,
3726 struct device_attribute *attr,
3727 const char *buf, size_t count)
3728{
c79dd5b5 3729 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3730 u32 flags = simple_strtoul(buf, NULL, 0);
3731
3732 mutex_lock(&priv->mutex);
3733 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3734 /* Cancel any currently running scans... */
2a421b91 3735 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3736 IWL_WARNING("Could not cancel scan.\n");
3737 else {
3738 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
3739 flags);
3740 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 3741 iwl4965_commit_rxon(priv);
b481de9c
ZY
3742 }
3743 }
3744 mutex_unlock(&priv->mutex);
3745
3746 return count;
3747}
3748
3749static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3750
3751static ssize_t show_filter_flags(struct device *d,
3752 struct device_attribute *attr, char *buf)
3753{
c79dd5b5 3754 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3755
3756 return sprintf(buf, "0x%04X\n",
3757 le32_to_cpu(priv->active_rxon.filter_flags));
3758}
3759
3760static ssize_t store_filter_flags(struct device *d,
3761 struct device_attribute *attr,
3762 const char *buf, size_t count)
3763{
c79dd5b5 3764 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3765 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3766
3767 mutex_lock(&priv->mutex);
3768 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3769 /* Cancel any currently running scans... */
2a421b91 3770 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3771 IWL_WARNING("Could not cancel scan.\n");
3772 else {
3773 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3774 "0x%04X\n", filter_flags);
3775 priv->staging_rxon.filter_flags =
3776 cpu_to_le32(filter_flags);
bb8c093b 3777 iwl4965_commit_rxon(priv);
b481de9c
ZY
3778 }
3779 }
3780 mutex_unlock(&priv->mutex);
3781
3782 return count;
3783}
3784
3785static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3786 store_filter_flags);
3787
4fc22b21 3788#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
3789
3790static ssize_t show_measurement(struct device *d,
3791 struct device_attribute *attr, char *buf)
3792{
c79dd5b5 3793 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 3794 struct iwl4965_spectrum_notification measure_report;
b481de9c 3795 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 3796 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
3797 unsigned long flags;
3798
3799 spin_lock_irqsave(&priv->lock, flags);
3800 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3801 spin_unlock_irqrestore(&priv->lock, flags);
3802 return 0;
3803 }
3804 memcpy(&measure_report, &priv->measure_report, size);
3805 priv->measurement_status = 0;
3806 spin_unlock_irqrestore(&priv->lock, flags);
3807
3808 while (size && (PAGE_SIZE - len)) {
3809 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3810 PAGE_SIZE - len, 1);
3811 len = strlen(buf);
3812 if (PAGE_SIZE - len)
3813 buf[len++] = '\n';
3814
3815 ofs += 16;
3816 size -= min(size, 16U);
3817 }
3818
3819 return len;
3820}
3821
3822static ssize_t store_measurement(struct device *d,
3823 struct device_attribute *attr,
3824 const char *buf, size_t count)
3825{
c79dd5b5 3826 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3827 struct ieee80211_measurement_params params = {
3828 .channel = le16_to_cpu(priv->active_rxon.channel),
3829 .start_time = cpu_to_le64(priv->last_tsf),
3830 .duration = cpu_to_le16(1),
3831 };
3832 u8 type = IWL_MEASURE_BASIC;
3833 u8 buffer[32];
3834 u8 channel;
3835
3836 if (count) {
3837 char *p = buffer;
3838 strncpy(buffer, buf, min(sizeof(buffer), count));
3839 channel = simple_strtoul(p, NULL, 0);
3840 if (channel)
3841 params.channel = channel;
3842
3843 p = buffer;
3844 while (*p && *p != ' ')
3845 p++;
3846 if (*p)
3847 type = simple_strtoul(p + 1, NULL, 0);
3848 }
3849
3850 IWL_DEBUG_INFO("Invoking measurement of type %d on "
3851 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 3852 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
3853
3854 return count;
3855}
3856
3857static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3858 show_measurement, store_measurement);
4fc22b21 3859#endif /* CONFIG_IWLAGN_SPECTRUM_MEASUREMENT */
b481de9c
ZY
3860
3861static ssize_t store_retry_rate(struct device *d,
3862 struct device_attribute *attr,
3863 const char *buf, size_t count)
3864{
c79dd5b5 3865 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3866
3867 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3868 if (priv->retry_rate <= 0)
3869 priv->retry_rate = 1;
3870
3871 return count;
3872}
3873
3874static ssize_t show_retry_rate(struct device *d,
3875 struct device_attribute *attr, char *buf)
3876{
c79dd5b5 3877 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3878 return sprintf(buf, "%d", priv->retry_rate);
3879}
3880
3881static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3882 store_retry_rate);
3883
3884static ssize_t store_power_level(struct device *d,
3885 struct device_attribute *attr,
3886 const char *buf, size_t count)
3887{
c79dd5b5 3888 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3889 int ret;
b481de9c
ZY
3890 int mode;
3891
3892 mode = simple_strtoul(buf, NULL, 0);
3893 mutex_lock(&priv->mutex);
3894
fee1247a 3895 if (!iwl_is_ready(priv)) {
298df1f6 3896 ret = -EAGAIN;
b481de9c
ZY
3897 goto out;
3898 }
3899
298df1f6
EK
3900 ret = iwl_power_set_user_mode(priv, mode);
3901 if (ret) {
5da4b55f
MA
3902 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3903 goto out;
b481de9c 3904 }
298df1f6 3905 ret = count;
b481de9c
ZY
3906
3907 out:
3908 mutex_unlock(&priv->mutex);
298df1f6 3909 return ret;
b481de9c
ZY
3910}
3911
b481de9c
ZY
3912static ssize_t show_power_level(struct device *d,
3913 struct device_attribute *attr, char *buf)
3914{
c79dd5b5 3915 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK
3916 int mode = priv->power_data.user_power_setting;
3917 int system = priv->power_data.system_power_setting;
5da4b55f 3918 int level = priv->power_data.power_mode;
b481de9c
ZY
3919 char *p = buf;
3920
298df1f6
EK
3921 switch (system) {
3922 case IWL_POWER_SYS_AUTO:
3923 p += sprintf(p, "SYSTEM:auto");
b481de9c 3924 break;
298df1f6
EK
3925 case IWL_POWER_SYS_AC:
3926 p += sprintf(p, "SYSTEM:ac");
3927 break;
3928 case IWL_POWER_SYS_BATTERY:
3929 p += sprintf(p, "SYSTEM:battery");
b481de9c 3930 break;
b481de9c 3931 }
298df1f6
EK
3932
3933 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto");
3934 p += sprintf(p, "\tINDEX:%d", level);
3935 p += sprintf(p, "\n");
3ac7f146 3936 return p - buf + 1;
b481de9c
ZY
3937}
3938
3939static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3940 store_power_level);
3941
3942static ssize_t show_channels(struct device *d,
3943 struct device_attribute *attr, char *buf)
3944{
5d72a1f5
EK
3945
3946 struct iwl_priv *priv = dev_get_drvdata(d);
3947 struct ieee80211_channel *channels = NULL;
3948 const struct ieee80211_supported_band *supp_band = NULL;
3949 int len = 0, i;
3950 int count = 0;
3951
3952 if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status))
3953 return -EAGAIN;
3954
3955 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
3956 channels = supp_band->channels;
3957 count = supp_band->n_channels;
3958
3959 len += sprintf(&buf[len],
3960 "Displaying %d channels in 2.4GHz band "
3961 "(802.11bg):\n", count);
3962
3963 for (i = 0; i < count; i++)
3964 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3965 ieee80211_frequency_to_channel(
3966 channels[i].center_freq),
3967 channels[i].max_power,
3968 channels[i].flags & IEEE80211_CHAN_RADAR ?
3969 " (IEEE 802.11h required)" : "",
3970 (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3971 || (channels[i].flags &
3972 IEEE80211_CHAN_RADAR)) ? "" :
3973 ", IBSS",
3974 channels[i].flags &
3975 IEEE80211_CHAN_PASSIVE_SCAN ?
3976 "passive only" : "active/passive");
3977
3978 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
3979 channels = supp_band->channels;
3980 count = supp_band->n_channels;
3981
3982 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
3983 "(802.11a):\n", count);
3984
3985 for (i = 0; i < count; i++)
3986 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3987 ieee80211_frequency_to_channel(
3988 channels[i].center_freq),
3989 channels[i].max_power,
3990 channels[i].flags & IEEE80211_CHAN_RADAR ?
3991 " (IEEE 802.11h required)" : "",
3992 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3993 || (channels[i].flags &
3994 IEEE80211_CHAN_RADAR)) ? "" :
3995 ", IBSS",
3996 channels[i].flags &
3997 IEEE80211_CHAN_PASSIVE_SCAN ?
3998 "passive only" : "active/passive");
3999
4000 return len;
b481de9c
ZY
4001}
4002
4003static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
4004
4005static ssize_t show_statistics(struct device *d,
4006 struct device_attribute *attr, char *buf)
4007{
c79dd5b5 4008 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 4009 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 4010 u32 len = 0, ofs = 0;
3ac7f146 4011 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY
4012 int rc = 0;
4013
fee1247a 4014 if (!iwl_is_alive(priv))
b481de9c
ZY
4015 return -EAGAIN;
4016
4017 mutex_lock(&priv->mutex);
49ea8596 4018 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
4019 mutex_unlock(&priv->mutex);
4020
4021 if (rc) {
4022 len = sprintf(buf,
4023 "Error sending statistics request: 0x%08X\n", rc);
4024 return len;
4025 }
4026
4027 while (size && (PAGE_SIZE - len)) {
4028 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4029 PAGE_SIZE - len, 1);
4030 len = strlen(buf);
4031 if (PAGE_SIZE - len)
4032 buf[len++] = '\n';
4033
4034 ofs += 16;
4035 size -= min(size, 16U);
4036 }
4037
4038 return len;
4039}
4040
4041static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4042
b481de9c
ZY
4043static ssize_t show_status(struct device *d,
4044 struct device_attribute *attr, char *buf)
4045{
c79dd5b5 4046 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 4047 if (!iwl_is_alive(priv))
b481de9c
ZY
4048 return -EAGAIN;
4049 return sprintf(buf, "0x%08x\n", (int)priv->status);
4050}
4051
4052static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4053
b481de9c
ZY
4054/*****************************************************************************
4055 *
4056 * driver setup and teardown
4057 *
4058 *****************************************************************************/
4059
4e39317d 4060static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
4061{
4062 priv->workqueue = create_workqueue(DRV_NAME);
4063
4064 init_waitqueue_head(&priv->wait_command_queue);
4065
bb8c093b
CH
4066 INIT_WORK(&priv->up, iwl4965_bg_up);
4067 INIT_WORK(&priv->restart, iwl4965_bg_restart);
4068 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
bb8c093b
CH
4069 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
4070 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
4419e39b 4071 INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor);
16e727e8 4072 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW
4073 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
4074 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91
TW
4075
4076 /* FIXME : remove when resolved PENDING */
4077 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
4078 iwl_setup_scan_deferred_work(priv);
bb8c093b 4079
4e39317d
EG
4080 if (priv->cfg->ops->lib->setup_deferred_work)
4081 priv->cfg->ops->lib->setup_deferred_work(priv);
4082
4083 init_timer(&priv->statistics_periodic);
4084 priv->statistics_periodic.data = (unsigned long)priv;
4085 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
b481de9c
ZY
4086
4087 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 4088 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
4089}
4090
4e39317d 4091static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 4092{
4e39317d
EG
4093 if (priv->cfg->ops->lib->cancel_deferred_work)
4094 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 4095
3ae6a054 4096 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
4097 cancel_delayed_work(&priv->scan_check);
4098 cancel_delayed_work(&priv->alive_start);
b481de9c 4099 cancel_work_sync(&priv->beacon_update);
4e39317d 4100 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY
4101}
4102
bb8c093b 4103static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c 4104 &dev_attr_channels.attr,
b481de9c
ZY
4105 &dev_attr_flags.attr,
4106 &dev_attr_filter_flags.attr,
4fc22b21 4107#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
4108 &dev_attr_measurement.attr,
4109#endif
4110 &dev_attr_power_level.attr,
4111 &dev_attr_retry_rate.attr,
b481de9c
ZY
4112 &dev_attr_statistics.attr,
4113 &dev_attr_status.attr,
4114 &dev_attr_temperature.attr,
b481de9c 4115 &dev_attr_tx_power.attr,
8cf769c6
EK
4116#ifdef CONFIG_IWLWIFI_DEBUG
4117 &dev_attr_debug_level.attr,
4118#endif
bc6f59bc 4119 &dev_attr_version.attr,
b481de9c
ZY
4120
4121 NULL
4122};
4123
bb8c093b 4124static struct attribute_group iwl4965_attribute_group = {
b481de9c 4125 .name = NULL, /* put in device directory */
bb8c093b 4126 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
4127};
4128
bb8c093b
CH
4129static struct ieee80211_ops iwl4965_hw_ops = {
4130 .tx = iwl4965_mac_tx,
4131 .start = iwl4965_mac_start,
4132 .stop = iwl4965_mac_stop,
4133 .add_interface = iwl4965_mac_add_interface,
4134 .remove_interface = iwl4965_mac_remove_interface,
4135 .config = iwl4965_mac_config,
4136 .config_interface = iwl4965_mac_config_interface,
4137 .configure_filter = iwl4965_configure_filter,
4138 .set_key = iwl4965_mac_set_key,
ab885f8c 4139 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH
4140 .get_stats = iwl4965_mac_get_stats,
4141 .get_tx_stats = iwl4965_mac_get_tx_stats,
4142 .conf_tx = iwl4965_mac_conf_tx,
bb8c093b 4143 .reset_tsf = iwl4965_mac_reset_tsf,
471b3efd 4144 .bss_info_changed = iwl4965_bss_info_changed,
9ab46173 4145 .ampdu_action = iwl4965_mac_ampdu_action,
bb8c093b 4146 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY
4147};
4148
bb8c093b 4149static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
4150{
4151 int err = 0;
c79dd5b5 4152 struct iwl_priv *priv;
b481de9c 4153 struct ieee80211_hw *hw;
82b9a121 4154 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 4155 unsigned long flags;
5a66926a 4156 DECLARE_MAC_BUF(mac);
b481de9c 4157
316c30d9
AK
4158 /************************
4159 * 1. Allocating HW data
4160 ************************/
4161
6440adb5
CB
4162 /* Disabling hardware scan means that mac80211 will perform scans
4163 * "the hard way", rather than using device's scan. */
1ea87396 4164 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK
4165 if (cfg->mod_params->debug & IWL_DL_INFO)
4166 dev_printk(KERN_DEBUG, &(pdev->dev),
4167 "Disabling hw_scan\n");
bb8c093b 4168 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
4169 }
4170
1d0a082d
AK
4171 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
4172 if (!hw) {
b481de9c
ZY
4173 err = -ENOMEM;
4174 goto out;
4175 }
1d0a082d
AK
4176 priv = hw->priv;
4177 /* At this point both hw and priv are allocated. */
4178
b481de9c
ZY
4179 SET_IEEE80211_DEV(hw, &pdev->dev);
4180
4181 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 4182 priv->cfg = cfg;
b481de9c 4183 priv->pci_dev = pdev;
316c30d9 4184
0a6857e7 4185#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 4186 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
4187 atomic_set(&priv->restrict_refcnt, 0);
4188#endif
b481de9c 4189
316c30d9
AK
4190 /**************************
4191 * 2. Initializing PCI bus
4192 **************************/
4193 if (pci_enable_device(pdev)) {
4194 err = -ENODEV;
4195 goto out_ieee80211_free_hw;
4196 }
4197
4198 pci_set_master(pdev);
4199
cc2a8ea8 4200 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
316c30d9 4201 if (!err)
cc2a8ea8
RR
4202 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4203 if (err) {
4204 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4205 if (!err)
4206 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4207 /* both attempts failed: */
316c30d9 4208 if (err) {
cc2a8ea8
RR
4209 printk(KERN_WARNING "%s: No suitable DMA available.\n",
4210 DRV_NAME);
316c30d9 4211 goto out_pci_disable_device;
cc2a8ea8 4212 }
316c30d9
AK
4213 }
4214
4215 err = pci_request_regions(pdev, DRV_NAME);
4216 if (err)
4217 goto out_pci_disable_device;
4218
4219 pci_set_drvdata(pdev, priv);
4220
4221 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4222 * PCI Tx retries from interfering with C3 CPU state */
4223 pci_write_config_byte(pdev, 0x41, 0x00);
4224
4225 /***********************
4226 * 3. Read REV register
4227 ***********************/
4228 priv->hw_base = pci_iomap(pdev, 0, 0);
4229 if (!priv->hw_base) {
4230 err = -ENODEV;
4231 goto out_pci_release_regions;
4232 }
4233
4234 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
4235 (unsigned long long) pci_resource_len(pdev, 0));
4236 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
4237
b661c819 4238 iwl_hw_detect(priv);
316c30d9 4239 printk(KERN_INFO DRV_NAME
b661c819
TW
4240 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
4241 priv->cfg->name, priv->hw_rev);
316c30d9 4242
91238714
TW
4243 /* amp init */
4244 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 4245 if (err < 0) {
91238714 4246 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK
4247 goto out_iounmap;
4248 }
91238714
TW
4249 /*****************
4250 * 4. Read EEPROM
4251 *****************/
316c30d9
AK
4252 /* Read the EEPROM */
4253 err = iwl_eeprom_init(priv);
4254 if (err) {
4255 IWL_ERROR("Unable to init EEPROM\n");
4256 goto out_iounmap;
4257 }
8614f360
TW
4258 err = iwl_eeprom_check_version(priv);
4259 if (err)
4260 goto out_iounmap;
4261
02883017 4262 /* extract MAC Address */
316c30d9
AK
4263 iwl_eeprom_get_mac(priv, priv->mac_addr);
4264 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
4265 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4266
4267 /************************
4268 * 5. Setup HW constants
4269 ************************/
da154e30 4270 if (iwl_set_hw_params(priv)) {
5425e490 4271 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 4272 goto out_free_eeprom;
316c30d9
AK
4273 }
4274
4275 /*******************
6ba87956 4276 * 6. Setup priv
316c30d9 4277 *******************/
b481de9c 4278
6ba87956 4279 err = iwl_init_drv(priv);
bf85ea4f 4280 if (err)
399f4900 4281 goto out_free_eeprom;
bf85ea4f 4282 /* At this point both hw and priv are initialized. */
316c30d9
AK
4283
4284 /**********************************
4285 * 7. Initialize module parameters
4286 **********************************/
4287
4288 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 4289 if (priv->cfg->mod_params->disable) {
316c30d9
AK
4290 set_bit(STATUS_RF_KILL_SW, &priv->status);
4291 IWL_DEBUG_INFO("Radio disabled.\n");
4292 }
4293
316c30d9
AK
4294 /********************
4295 * 8. Setup services
4296 ********************/
0359facc 4297 spin_lock_irqsave(&priv->lock, flags);
316c30d9 4298 iwl4965_disable_interrupts(priv);
0359facc 4299 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK
4300
4301 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4302 if (err) {
4303 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 4304 goto out_uninit_drv;
316c30d9
AK
4305 }
4306
316c30d9 4307
4e39317d 4308 iwl_setup_deferred_work(priv);
653fa4a0 4309 iwl_setup_rx_handlers(priv);
316c30d9
AK
4310
4311 /********************
4312 * 9. Conclude
4313 ********************/
5a66926a
ZY
4314 pci_save_state(pdev);
4315 pci_disable_device(pdev);
b481de9c 4316
6ba87956
TW
4317 /**********************************
4318 * 10. Setup and register mac80211
4319 **********************************/
4320
4321 err = iwl_setup_mac(priv);
4322 if (err)
4323 goto out_remove_sysfs;
4324
4325 err = iwl_dbgfs_register(priv, DRV_NAME);
4326 if (err)
4327 IWL_ERROR("failed to create debugfs files\n");
4328
58d0f361
EG
4329 err = iwl_rfkill_init(priv);
4330 if (err)
4331 IWL_ERROR("Unable to initialize RFKILL system. "
4332 "Ignoring error: %d\n", err);
4333 iwl_power_initialize(priv);
b481de9c
ZY
4334 return 0;
4335
316c30d9
AK
4336 out_remove_sysfs:
4337 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
6ba87956
TW
4338 out_uninit_drv:
4339 iwl_uninit_drv(priv);
073d3f5f
TW
4340 out_free_eeprom:
4341 iwl_eeprom_free(priv);
b481de9c
ZY
4342 out_iounmap:
4343 pci_iounmap(pdev, priv->hw_base);
4344 out_pci_release_regions:
4345 pci_release_regions(pdev);
316c30d9 4346 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
4347 out_pci_disable_device:
4348 pci_disable_device(pdev);
b481de9c
ZY
4349 out_ieee80211_free_hw:
4350 ieee80211_free_hw(priv->hw);
4351 out:
4352 return err;
4353}
4354
c83dbf68 4355static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 4356{
c79dd5b5 4357 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4358 unsigned long flags;
b481de9c
ZY
4359
4360 if (!priv)
4361 return;
4362
4363 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
4364
67249625
EG
4365 iwl_dbgfs_unregister(priv);
4366 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4367
c4f55232
RR
4368 if (priv->mac80211_registered) {
4369 ieee80211_unregister_hw(priv->hw);
4370 priv->mac80211_registered = 0;
4371 }
4372
b481de9c 4373 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 4374
bb8c093b 4375 iwl4965_down(priv);
b481de9c 4376
0359facc
MA
4377 /* make sure we flush any pending irq or
4378 * tasklet for the driver
4379 */
4380 spin_lock_irqsave(&priv->lock, flags);
4381 iwl4965_disable_interrupts(priv);
4382 spin_unlock_irqrestore(&priv->lock, flags);
4383
4384 iwl_synchronize_irq(priv);
4385
58d0f361 4386 iwl_rfkill_unregister(priv);
bb8c093b 4387 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
4388
4389 if (priv->rxq.bd)
a55360e4 4390 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 4391 iwl_hw_txq_ctx_free(priv);
b481de9c 4392
37deb2a0 4393 iwl_clear_stations_table(priv);
073d3f5f 4394 iwl_eeprom_free(priv);
b481de9c 4395
b481de9c 4396
948c171c
MA
4397 /*netif_stop_queue(dev); */
4398 flush_workqueue(priv->workqueue);
4399
bb8c093b 4400 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
4401 * priv->workqueue... so we can't take down the workqueue
4402 * until now... */
4403 destroy_workqueue(priv->workqueue);
4404 priv->workqueue = NULL;
4405
b481de9c
ZY
4406 pci_iounmap(pdev, priv->hw_base);
4407 pci_release_regions(pdev);
4408 pci_disable_device(pdev);
4409 pci_set_drvdata(pdev, NULL);
4410
6ba87956 4411 iwl_uninit_drv(priv);
b481de9c
ZY
4412
4413 if (priv->ibss_beacon)
4414 dev_kfree_skb(priv->ibss_beacon);
4415
4416 ieee80211_free_hw(priv->hw);
4417}
4418
4419#ifdef CONFIG_PM
4420
bb8c093b 4421static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 4422{
c79dd5b5 4423 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4424
e655b9f0
ZY
4425 if (priv->is_open) {
4426 set_bit(STATUS_IN_SUSPEND, &priv->status);
4427 iwl4965_mac_stop(priv->hw);
4428 priv->is_open = 1;
4429 }
b481de9c 4430
b481de9c
ZY
4431 pci_set_power_state(pdev, PCI_D3hot);
4432
b481de9c
ZY
4433 return 0;
4434}
4435
bb8c093b 4436static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 4437{
c79dd5b5 4438 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4439
b481de9c 4440 pci_set_power_state(pdev, PCI_D0);
b481de9c 4441
e655b9f0
ZY
4442 if (priv->is_open)
4443 iwl4965_mac_start(priv->hw);
b481de9c 4444
e655b9f0 4445 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
4446 return 0;
4447}
4448
4449#endif /* CONFIG_PM */
4450
4451/*****************************************************************************
4452 *
4453 * driver and module entry point
4454 *
4455 *****************************************************************************/
4456
fed9017e
RR
4457/* Hardware specific file defines the PCI IDs table for that hardware module */
4458static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 4459#ifdef CONFIG_IWL4965
fed9017e
RR
4460 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4461 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 4462#endif /* CONFIG_IWL4965 */
5a6a256e 4463#ifdef CONFIG_IWL5000
47408639
EK
4464 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
4465 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
4466 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
4467 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
4468 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
4469 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 4470 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK
4471 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4472 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
4473 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
5a6a256e
TW
4474 {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)},
4475#endif /* CONFIG_IWL5000 */
fed9017e
RR
4476 {0}
4477};
4478MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4479
4480static struct pci_driver iwl_driver = {
b481de9c 4481 .name = DRV_NAME,
fed9017e 4482 .id_table = iwl_hw_card_ids,
bb8c093b
CH
4483 .probe = iwl4965_pci_probe,
4484 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 4485#ifdef CONFIG_PM
bb8c093b
CH
4486 .suspend = iwl4965_pci_suspend,
4487 .resume = iwl4965_pci_resume,
b481de9c
ZY
4488#endif
4489};
4490
bb8c093b 4491static int __init iwl4965_init(void)
b481de9c
ZY
4492{
4493
4494 int ret;
4495 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4496 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 4497
e227ceac 4498 ret = iwlagn_rate_control_register();
897e1cf2
RC
4499 if (ret) {
4500 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4501 return ret;
4502 }
4503
fed9017e 4504 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
4505 if (ret) {
4506 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4507 goto error_register;
b481de9c 4508 }
b481de9c
ZY
4509
4510 return ret;
897e1cf2 4511
897e1cf2 4512error_register:
e227ceac 4513 iwlagn_rate_control_unregister();
897e1cf2 4514 return ret;
b481de9c
ZY
4515}
4516
bb8c093b 4517static void __exit iwl4965_exit(void)
b481de9c 4518{
fed9017e 4519 pci_unregister_driver(&iwl_driver);
e227ceac 4520 iwlagn_rate_control_unregister();
b481de9c
ZY
4521}
4522
bb8c093b
CH
4523module_exit(iwl4965_exit);
4524module_init(iwl4965_init);
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