projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
iwl3945: move iwl_power_initialize()
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
01f8162a 5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
1d0a082d 32#include <net/mac80211.h>
df48c323 33
6bc913bd 34#include "iwl-eeprom.h"
3e0d4cb1 35#include "iwl-dev.h" /* FIXME: remove */
19335774 36#include "iwl-debug.h"
df48c323 37#include "iwl-core.h"
b661c819 38#include "iwl-io.h"
5da4b55f 39#include "iwl-power.h"
83dde8c9 40#include "iwl-sta.h"
ef850d7c 41#include "iwl-helpers.h"
df48c323 42
1d0a082d 43
df48c323
TW		 44MODULE_DESCRIPTION("iwl core");
45MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 46MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 47MODULE_LICENSE("GPL");
df48c323 48
c7de35cd
RR		 49#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
61
a562a9dd
RC		 62u32 iwl_debug_level;
63EXPORT_SYMBOL(iwl_debug_level);
64
ef850d7c
MA		 65static irqreturn_t iwl_isr(int irq, void *data);
66
c7de35cd
RR		 67/*
68 * Parameter order:
69 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
70 *
71 * If there isn't a valid next or previous rate then INV is used which
72 * maps to IWL_RATE_INVALID
73 *
74 */
1826dcc0 75const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 76 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
77 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
78 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
79 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
80 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
81 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
82 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
83 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
84 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
85 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
86 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
87 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
88 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
89 /* FIXME:RS: ^^ should be INV (legacy) */
90};
1826dcc0 91EXPORT_SYMBOL(iwl_rates);
c7de35cd 92
e7d326ac
TW		 93/**
94 * translate ucode response to mac80211 tx status control values
95 */
96void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
e6a9854b 97 struct ieee80211_tx_info *info)
e7d326ac 98{
e6a9854b 99 struct ieee80211_tx_rate *r = &info->control.rates[0];
e7d326ac 100
e6a9854b 101 info->antenna_sel_tx =
e7d326ac
TW		 102 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
103 if (rate_n_flags & RATE_MCS_HT_MSK)
e6a9854b 104 r->flags |= IEEE80211_TX_RC_MCS;
e7d326ac 105 if (rate_n_flags & RATE_MCS_GF_MSK)
e6a9854b 106 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
7aafef1c 107 if (rate_n_flags & RATE_MCS_HT40_MSK)
e6a9854b 108 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
e7d326ac 109 if (rate_n_flags & RATE_MCS_DUP_MSK)
e6a9854b 110 r->flags |= IEEE80211_TX_RC_DUP_DATA;
e7d326ac 111 if (rate_n_flags & RATE_MCS_SGI_MSK)
e6a9854b 112 r->flags |= IEEE80211_TX_RC_SHORT_GI;
31513be8 113 r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
e7d326ac
TW		 114}
115EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
116
117int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
118{
119 int idx = 0;
120
121 /* HT rate format */
122 if (rate_n_flags & RATE_MCS_HT_MSK) {
123 idx = (rate_n_flags & 0xff);
124
60d32215
DH		 125 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
126 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
127 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 128 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
129
130 idx += IWL_FIRST_OFDM_RATE;
131 /* skip 9M not supported in ht*/
132 if (idx >= IWL_RATE_9M_INDEX)
133 idx += 1;
134 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
135 return idx;
136
137 /* legacy rate format, search for match in table */
138 } else {
139 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
140 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
141 return idx;
142 }
143
144 return -1;
145}
146EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
147
31513be8
DH		 148int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
149{
150 int idx = 0;
151 int band_offset = 0;
152
153 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
154 if (rate_n_flags & RATE_MCS_HT_MSK) {
155 idx = (rate_n_flags & 0xff);
156 return idx;
157 /* Legacy rate format, search for match in table */
158 } else {
159 if (band == IEEE80211_BAND_5GHZ)
160 band_offset = IWL_FIRST_OFDM_RATE;
161 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
162 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
163 return idx - band_offset;
164 }
165
166 return -1;
167}
168
76eff18b
TW		 169u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
170{
171 int i;
172 u8 ind = ant;
173 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
174 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
175 if (priv->hw_params.valid_tx_ant & BIT(ind))
176 return ind;
177 }
178 return ant;
179}
57bd1bea
TW		 180
181const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
182EXPORT_SYMBOL(iwl_bcast_addr);
183
184
1d0a082d
AK		 185/* This function both allocates and initializes hw and priv. */
186struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
187 struct ieee80211_ops *hw_ops)
188{
189 struct iwl_priv *priv;
190
191 /* mac80211 allocates memory for this device instance, including
192 * space for this driver's private structure */
193 struct ieee80211_hw *hw =
194 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
195 if (hw == NULL) {
a3139c59
SO		 196 printk(KERN_ERR "%s: Can not allocate network device\n",
197 cfg->name);
1d0a082d
AK		 198 goto out;
199 }
200
201 priv = hw->priv;
202 priv->hw = hw;
203
204out:
205 return hw;
206}
207EXPORT_SYMBOL(iwl_alloc_all);
208
b661c819
TW		 209void iwl_hw_detect(struct iwl_priv *priv)
210{
211 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
212 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
213 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
214}
215EXPORT_SYMBOL(iwl_hw_detect);
216
1053d35f
RR		 217int iwl_hw_nic_init(struct iwl_priv *priv)
218{
219 unsigned long flags;
220 struct iwl_rx_queue *rxq = &priv->rxq;
221 int ret;
222
223 /* nic_init */
1053d35f 224 spin_lock_irqsave(&priv->lock, flags);
1b73af82 225 priv->cfg->ops->lib->apm_ops.init(priv);
1053d35f
RR		 226 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
227 spin_unlock_irqrestore(&priv->lock, flags);
228
229 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
230
231 priv->cfg->ops->lib->apm_ops.config(priv);
232
233 /* Allocate the RX queue, or reset if it is already allocated */
234 if (!rxq->bd) {
235 ret = iwl_rx_queue_alloc(priv);
236 if (ret) {
15b1687c 237 IWL_ERR(priv, "Unable to initialize Rx queue\n");
1053d35f
RR		 238 return -ENOMEM;
239 }
240 } else
241 iwl_rx_queue_reset(priv, rxq);
242
243 iwl_rx_replenish(priv);
244
245 iwl_rx_init(priv, rxq);
246
247 spin_lock_irqsave(&priv->lock, flags);
248
249 rxq->need_update = 1;
250 iwl_rx_queue_update_write_ptr(priv, rxq);
251
252 spin_unlock_irqrestore(&priv->lock, flags);
253
254 /* Allocate and init all Tx and Command queues */
255 ret = iwl_txq_ctx_reset(priv);
256 if (ret)
257 return ret;
258
259 set_bit(STATUS_INIT, &priv->status);
260
261 return 0;
262}
263EXPORT_SYMBOL(iwl_hw_nic_init);
264
14d2aac5
AK		 265/*
266 * QoS support
267*/
268void iwl_activate_qos(struct iwl_priv *priv, u8 force)
269{
270 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
271 return;
272
273 priv->qos_data.def_qos_parm.qos_flags = 0;
274
275 if (priv->qos_data.qos_cap.q_AP.queue_request &&
276 !priv->qos_data.qos_cap.q_AP.txop_request)
277 priv->qos_data.def_qos_parm.qos_flags |=
278 QOS_PARAM_FLG_TXOP_TYPE_MSK;
279 if (priv->qos_data.qos_active)
280 priv->qos_data.def_qos_parm.qos_flags |=
281 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
282
283 if (priv->current_ht_config.is_ht)
284 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
285
286 if (force || iwl_is_associated(priv)) {
287 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
288 priv->qos_data.qos_active,
289 priv->qos_data.def_qos_parm.qos_flags);
290
291 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
292 sizeof(struct iwl_qosparam_cmd),
293 &priv->qos_data.def_qos_parm, NULL);
294 }
295}
296EXPORT_SYMBOL(iwl_activate_qos);
297
f2c95b04
WYG		 298/*
299 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
300 * (802.11b) (802.11a/g)
301 * AC_BK 15 1023 7 0 0
302 * AC_BE 15 1023 3 0 0
303 * AC_VI 7 15 2 6.016ms 3.008ms
304 * AC_VO 3 7 2 3.264ms 1.504ms
305 */
c7de35cd 306void iwl_reset_qos(struct iwl_priv *priv)
bf85ea4f
AK		 307{
308 u16 cw_min = 15;
309 u16 cw_max = 1023;
310 u8 aifs = 2;
30dab79e 311 bool is_legacy = false;
bf85ea4f
AK		 312 unsigned long flags;
313 int i;
314
315 spin_lock_irqsave(&priv->lock, flags);
30dab79e
WT		 316 /* QoS always active in AP and ADHOC mode
317 * In STA mode wait for association
318 */
319 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
320 priv->iw_mode == NL80211_IFTYPE_AP)
321 priv->qos_data.qos_active = 1;
322 else
323 priv->qos_data.qos_active = 0;
bf85ea4f 324
30dab79e
WT		 325 /* check for legacy mode */
326 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
327 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
328 (priv->iw_mode == NL80211_IFTYPE_STATION &&
329 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
bf85ea4f
AK		 330 cw_min = 31;
331 is_legacy = 1;
332 }
333
334 if (priv->qos_data.qos_active)
335 aifs = 3;
336
f2c95b04 337 /* AC_BE */
bf85ea4f
AK		 338 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
339 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
340 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
341 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
342 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
343
344 if (priv->qos_data.qos_active) {
f2c95b04 345 /* AC_BK */
bf85ea4f
AK		 346 i = 1;
347 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
348 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
349 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
350 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
351 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
352
f2c95b04 353 /* AC_VI */
bf85ea4f
AK		 354 i = 2;
355 priv->qos_data.def_qos_parm.ac[i].cw_min =
356 cpu_to_le16((cw_min + 1) / 2 - 1);
357 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 358 cpu_to_le16(cw_min);
bf85ea4f
AK		 359 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
360 if (is_legacy)
361 priv->qos_data.def_qos_parm.ac[i].edca_txop =
362 cpu_to_le16(6016);
363 else
364 priv->qos_data.def_qos_parm.ac[i].edca_txop =
365 cpu_to_le16(3008);
366 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
367
f2c95b04 368 /* AC_VO */
bf85ea4f
AK		 369 i = 3;
370 priv->qos_data.def_qos_parm.ac[i].cw_min =
371 cpu_to_le16((cw_min + 1) / 4 - 1);
372 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 373 cpu_to_le16((cw_min + 1) / 2 - 1);
bf85ea4f
AK		 374 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
375 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
376 if (is_legacy)
377 priv->qos_data.def_qos_parm.ac[i].edca_txop =
378 cpu_to_le16(3264);
379 else
380 priv->qos_data.def_qos_parm.ac[i].edca_txop =
381 cpu_to_le16(1504);
382 } else {
383 for (i = 1; i < 4; i++) {
384 priv->qos_data.def_qos_parm.ac[i].cw_min =
385 cpu_to_le16(cw_min);
386 priv->qos_data.def_qos_parm.ac[i].cw_max =
387 cpu_to_le16(cw_max);
388 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
389 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
390 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
391 }
392 }
e1623446 393 IWL_DEBUG_QOS(priv, "set QoS to default \n");
bf85ea4f
AK		 394
395 spin_unlock_irqrestore(&priv->lock, flags);
396}
c7de35cd
RR		 397EXPORT_SYMBOL(iwl_reset_qos);
398
d9fe60de
JB		 399#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
400#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 401static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 402 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 403 enum ieee80211_band band)
404{
39130df3
RR		 405 u16 max_bit_rate = 0;
406 u8 rx_chains_num = priv->hw_params.rx_chains_num;
407 u8 tx_chains_num = priv->hw_params.tx_chains_num;
408
c7de35cd 409 ht_info->cap = 0;
d9fe60de 410 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 411
d9fe60de 412 ht_info->ht_supported = true;
c7de35cd 413
b261793d
DH		 414 if (priv->cfg->ht_greenfield_support)
415 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de
JB		 416 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
417 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
00c5ae2f 418 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
39130df3
RR		 419
420 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 421 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 422 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
423 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
424 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 425 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 426 }
c7de35cd
RR		 427
428 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 429 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 430
431 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
432 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
433
d9fe60de 434 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 435 if (rx_chains_num >= 2)
d9fe60de 436 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 437 if (rx_chains_num >= 3)
d9fe60de 438 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 439
440 /* Highest supported Rx data rate */
441 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 442 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
443 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 444
445 /* Tx MCS capabilities */
d9fe60de 446 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 447 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 448 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
449 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
450 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 451 }
c7de35cd 452}
c7de35cd
RR		 453
454static void iwlcore_init_hw_rates(struct iwl_priv *priv,
455 struct ieee80211_rate *rates)
456{
457 int i;
458
5027309b 459 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1826dcc0 460 rates[i].bitrate = iwl_rates[i].ieee * 5;
c7de35cd
RR		 461 rates[i].hw_value = i; /* Rate scaling will work on indexes */
462 rates[i].hw_value_short = i;
463 rates[i].flags = 0;
5027309b 464 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
c7de35cd
RR		 465 /*
466 * If CCK != 1M then set short preamble rate flag.
467 */
468 rates[i].flags |=
1826dcc0 469 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
c7de35cd
RR		 470 0 : IEEE80211_RATE_SHORT_PREAMBLE;
471 }
472 }
473}
474
8ccde88a 475
c7de35cd
RR		 476/**
477 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
478 */
534166de 479int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 480{
481 struct iwl_channel_info *ch;
482 struct ieee80211_supported_band *sband;
483 struct ieee80211_channel *channels;
484 struct ieee80211_channel *geo_ch;
485 struct ieee80211_rate *rates;
486 int i = 0;
487
488 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
489 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 490 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 491 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
492 return 0;
493 }
494
495 channels = kzalloc(sizeof(struct ieee80211_channel) *
496 priv->channel_count, GFP_KERNEL);
497 if (!channels)
498 return -ENOMEM;
499
5027309b 500 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 501 GFP_KERNEL);
502 if (!rates) {
503 kfree(channels);
504 return -ENOMEM;
505 }
506
507 /* 5.2GHz channels start after the 2.4GHz channels */
508 sband = &priv->bands[IEEE80211_BAND_5GHZ];
509 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
510 /* just OFDM */
511 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 512 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 513
49779293 514 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 515 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 516 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 517
518 sband = &priv->bands[IEEE80211_BAND_2GHZ];
519 sband->channels = channels;
520 /* OFDM & CCK */
521 sband->bitrates = rates;
5027309b 522 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 523
49779293 524 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 525 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 526 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 527
528 priv->ieee_channels = channels;
529 priv->ieee_rates = rates;
530
c7de35cd
RR		 531 for (i = 0; i < priv->channel_count; i++) {
532 ch = &priv->channel_info[i];
533
534 /* FIXME: might be removed if scan is OK */
535 if (!is_channel_valid(ch))
536 continue;
537
538 if (is_channel_a_band(ch))
539 sband = &priv->bands[IEEE80211_BAND_5GHZ];
540 else
541 sband = &priv->bands[IEEE80211_BAND_2GHZ];
542
543 geo_ch = &sband->channels[sband->n_channels++];
544
545 geo_ch->center_freq =
546 ieee80211_channel_to_frequency(ch->channel);
547 geo_ch->max_power = ch->max_power_avg;
548 geo_ch->max_antenna_gain = 0xff;
549 geo_ch->hw_value = ch->channel;
550
551 if (is_channel_valid(ch)) {
552 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
553 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
554
555 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
556 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
557
558 if (ch->flags & EEPROM_CHANNEL_RADAR)
559 geo_ch->flags |= IEEE80211_CHAN_RADAR;
560
7aafef1c 561 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 562
dc1b0973
WYG		 563 if (ch->max_power_avg > priv->tx_power_device_lmt)
564 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 565 } else {
566 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
567 }
568
e1623446 569 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 570 ch->channel, geo_ch->center_freq,
571 is_channel_a_band(ch) ? "5.2" : "2.4",
572 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
573 "restricted" : "valid",
574 geo_ch->flags);
575 }
576
577 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
578 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 579 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
580 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 581 priv->pci_dev->device,
582 priv->pci_dev->subsystem_device);
c7de35cd
RR		 583 priv->cfg->sku &= ~IWL_SKU_A;
584 }
585
978785a3 586 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 587 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
588 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 589
590 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
591
592 return 0;
593}
534166de 594EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 595
596/*
597 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
598 */
534166de 599void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 600{
601 kfree(priv->ieee_channels);
602 kfree(priv->ieee_rates);
603 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
604}
534166de 605EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 606
28a6b07a 607static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd
RR		 608{
609 return !priv->current_ht_config.is_ht ||
02bb1bea 610 priv->current_ht_config.single_chain_sufficient;
c7de35cd 611}
963f5517 612
47c5196e
TW		 613static u8 iwl_is_channel_extension(struct iwl_priv *priv,
614 enum ieee80211_band band,
615 u16 channel, u8 extension_chan_offset)
616{
617 const struct iwl_channel_info *ch_info;
618
619 ch_info = iwl_get_channel_info(priv, band, channel);
620 if (!is_channel_valid(ch_info))
621 return 0;
622
d9fe60de 623 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 624 return !(ch_info->ht40_extension_channel &
689da1b3 625 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 626 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 627 return !(ch_info->ht40_extension_channel &
689da1b3 628 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 629
630 return 0;
631}
632
7aafef1c 633u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 634 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 635{
fad95bf5 636 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 637
fad95bf5 638 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW		 639 return 0;
640
a2b0f02e
WYG		 641 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
642 * the bit will not set if it is pure 40MHz case
643 */
47c5196e 644 if (sta_ht_inf) {
a2b0f02e 645 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 646 return 0;
647 }
1e4247d4
WYG		 648#ifdef CONFIG_IWLWIFI_DEBUG
649 if (priv->disable_ht40)
650 return 0;
651#endif
611d3eb7
WYG		 652 return iwl_is_channel_extension(priv, priv->band,
653 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 654 ht_conf->extension_chan_offset);
47c5196e 655}
7aafef1c 656EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 657
2c2f3b33
TW		 658static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
659{
660 u16 new_val = 0;
661 u16 beacon_factor = 0;
662
663 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
664 new_val = beacon_val / beacon_factor;
665
666 if (!new_val)
667 new_val = max_beacon_val;
668
669 return new_val;
670}
671
672void iwl_setup_rxon_timing(struct iwl_priv *priv)
673{
674 u64 tsf;
675 s32 interval_tm, rem;
676 unsigned long flags;
677 struct ieee80211_conf *conf = NULL;
678 u16 beacon_int;
679
680 conf = ieee80211_get_hw_conf(priv->hw);
681
682 spin_lock_irqsave(&priv->lock, flags);
683 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
684 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
685
686 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
687 beacon_int = priv->beacon_int;
688 priv->rxon_timing.atim_window = 0;
689 } else {
690 beacon_int = priv->vif->bss_conf.beacon_int;
691
692 /* TODO: we need to get atim_window from upper stack
693 * for now we set to 0 */
694 priv->rxon_timing.atim_window = 0;
695 }
696
697 beacon_int = iwl_adjust_beacon_interval(beacon_int,
698 priv->hw_params.max_beacon_itrvl * 1024);
699 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
700
701 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
702 interval_tm = beacon_int * 1024;
703 rem = do_div(tsf, interval_tm);
704 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
705
706 spin_unlock_irqrestore(&priv->lock, flags);
707 IWL_DEBUG_ASSOC(priv,
708 "beacon interval %d beacon timer %d beacon tim %d\n",
709 le16_to_cpu(priv->rxon_timing.beacon_interval),
710 le32_to_cpu(priv->rxon_timing.beacon_init_val),
711 le16_to_cpu(priv->rxon_timing.atim_window));
712}
713EXPORT_SYMBOL(iwl_setup_rxon_timing);
714
8ccde88a
SO		 715void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
716{
717 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
718
719 if (hw_decrypt)
720 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
721 else
722 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
723
724}
725EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
726
727/**
728 * iwl_check_rxon_cmd - validate RXON structure is valid
729 *
730 * NOTE: This is really only useful during development and can eventually
731 * be #ifdef'd out once the driver is stable and folks aren't actively
732 * making changes
733 */
734int iwl_check_rxon_cmd(struct iwl_priv *priv)
735{
736 int error = 0;
737 int counter = 1;
738 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
739
740 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
741 error |= le32_to_cpu(rxon->flags &
742 (RXON_FLG_TGJ_NARROW_BAND_MSK |
743 RXON_FLG_RADAR_DETECT_MSK));
744 if (error)
745 IWL_WARN(priv, "check 24G fields %d | %d\n",
746 counter++, error);
747 } else {
748 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
749 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
750 if (error)
751 IWL_WARN(priv, "check 52 fields %d | %d\n",
752 counter++, error);
753 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
754 if (error)
755 IWL_WARN(priv, "check 52 CCK %d | %d\n",
756 counter++, error);
757 }
758 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
759 if (error)
760 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
761
762 /* make sure basic rates 6Mbps and 1Mbps are supported */
763 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
764 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
765 if (error)
766 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
767
768 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
769 if (error)
770 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
771
772 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
773 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
774 if (error)
775 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
776 counter++, error);
777
778 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
779 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
780 if (error)
781 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
782 counter++, error);
783
784 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
785 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
786 if (error)
787 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
788 counter++, error);
789
790 if (error)
791 IWL_WARN(priv, "Tuning to channel %d\n",
792 le16_to_cpu(rxon->channel));
793
794 if (error) {
795 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
796 return -1;
797 }
798 return 0;
799}
800EXPORT_SYMBOL(iwl_check_rxon_cmd);
801
802/**
803 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
804 * @priv: staging_rxon is compared to active_rxon
805 *
806 * If the RXON structure is changing enough to require a new tune,
807 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
808 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
809 */
810int iwl_full_rxon_required(struct iwl_priv *priv)
811{
812
813 /* These items are only settable from the full RXON command */
814 if (!(iwl_is_associated(priv)) ||
815 compare_ether_addr(priv->staging_rxon.bssid_addr,
816 priv->active_rxon.bssid_addr) ||
817 compare_ether_addr(priv->staging_rxon.node_addr,
818 priv->active_rxon.node_addr) ||
819 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
820 priv->active_rxon.wlap_bssid_addr) ||
821 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
822 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
823 (priv->staging_rxon.air_propagation !=
824 priv->active_rxon.air_propagation) ||
825 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
826 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
827 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
828 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 829 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
830 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 831 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
832 return 1;
833
834 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
835 * be updated with the RXON_ASSOC command -- however only some
836 * flag transitions are allowed using RXON_ASSOC */
837
838 /* Check if we are not switching bands */
839 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
840 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
841 return 1;
842
843 /* Check if we are switching association toggle */
844 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
845 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
846 return 1;
847
848 return 0;
849}
850EXPORT_SYMBOL(iwl_full_rxon_required);
851
852u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
853{
854 int i;
855 int rate_mask;
856
857 /* Set rate mask*/
858 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
859 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
860 else
861 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
862
863 /* Find lowest valid rate */
864 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
865 i = iwl_rates[i].next_ieee) {
866 if (rate_mask & (1 << i))
867 return iwl_rates[i].plcp;
868 }
869
870 /* No valid rate was found. Assign the lowest one */
871 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
872 return IWL_RATE_1M_PLCP;
873 else
874 return IWL_RATE_6M_PLCP;
875}
876EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
877
fad95bf5 878void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 879{
c1adf9fb 880 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 881
fad95bf5 882 if (!ht_conf->is_ht) {
a2b0f02e 883 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 884 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 885 RXON_FLG_HT40_PROT_MSK |
42eb7c64 886 RXON_FLG_HT_PROT_MSK);
47c5196e 887 return;
42eb7c64 888 }
47c5196e 889
a2b0f02e
WYG		 890 /* FIXME: if the definition of ht_protection changed, the "translation"
891 * will be needed for rxon->flags
892 */
fad95bf5 893 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 894
895 /* Set up channel bandwidth:
7aafef1c 896 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 897 /* clear the HT channel mode before set the mode */
898 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
899 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 900 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
901 /* pure ht40 */
fad95bf5 902 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 903 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 904 /* Note: control channel is opposite of extension channel */
fad95bf5 905 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG		 906 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
907 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
908 break;
909 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
910 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
911 break;
912 }
913 } else {
a2b0f02e 914 /* Note: control channel is opposite of extension channel */
fad95bf5 915 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG		 916 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
917 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
918 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
919 break;
920 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
921 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
922 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
923 break;
924 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
925 default:
926 /* channel location only valid if in Mixed mode */
927 IWL_ERR(priv, "invalid extension channel offset\n");
928 break;
929 }
930 }
931 } else {
932 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 933 }
934
45823531
AK		 935 if (priv->cfg->ops->hcmd->set_rxon_chain)
936 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 937
02bb1bea 938 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 939 "extension channel offset 0x%x\n",
fad95bf5
JB		 940 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
941 ht_conf->extension_chan_offset);
47c5196e
TW		 942 return;
943}
944EXPORT_SYMBOL(iwl_set_rxon_ht);
945
9e5e6c32
TW		 946#define IWL_NUM_RX_CHAINS_MULTIPLE 3
947#define IWL_NUM_RX_CHAINS_SINGLE 2
948#define IWL_NUM_IDLE_CHAINS_DUAL 2
949#define IWL_NUM_IDLE_CHAINS_SINGLE 1
950
2b396a12
JB		 951/*
952 * Determine how many receiver/antenna chains to use.
953 *
954 * More provides better reception via diversity. Fewer saves power
955 * at the expense of throughput, but only when not in powersave to
956 * start with.
957 *
c7de35cd
RR		 958 * MIMO (dual stream) requires at least 2, but works better with 3.
959 * This does not determine *which* chains to use, just how many.
960 */
28a6b07a 961static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 962{
c7de35cd 963 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 964 if (is_single_rx_stream(priv))
9e5e6c32 965 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 966 else
9e5e6c32 967 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 968}
c7de35cd 969
2b396a12
JB		 970/*
971 * When we are in power saving, there's no difference between
972 * using multiple chains or just a single chain, but due to the
973 * lack of SM PS we lose a lot of throughput if we use just a
974 * single chain.
975 *
976 * Therefore, use the active count here (which will use multiple
977 * chains unless connected to a legacy AP).
978 */
28a6b07a
TW		 979static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
980{
2b396a12 981 return active_cnt;
c7de35cd
RR		 982}
983
04816448
GE		 984/* up to 4 chains */
985static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
986{
987 u8 res;
988 res = (chain_bitmap & BIT(0)) >> 0;
989 res += (chain_bitmap & BIT(1)) >> 1;
990 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 991 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 992 return res;
993}
994
4c4df78f
CR		 995/**
996 * iwl_is_monitor_mode - Determine if interface in monitor mode
997 *
998 * priv->iw_mode is set in add_interface, but add_interface is
999 * never called for monitor mode. The only way mac80211 informs us about
1000 * monitor mode is through configuring filters (call to configure_filter).
1001 */
279b05d4 1002bool iwl_is_monitor_mode(struct iwl_priv *priv)
4c4df78f
CR		 1003{
1004 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1005}
279b05d4 1006EXPORT_SYMBOL(iwl_is_monitor_mode);
4c4df78f 1007
c7de35cd
RR		 1008/**
1009 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1010 *
1011 * Selects how many and which Rx receivers/antennas/chains to use.
1012 * This should not be used for scan command ... it puts data in wrong place.
1013 */
1014void iwl_set_rxon_chain(struct iwl_priv *priv)
1015{
28a6b07a
TW		 1016 bool is_single = is_single_rx_stream(priv);
1017 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 1018 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1019 u32 active_chains;
28a6b07a 1020 u16 rx_chain;
c7de35cd
RR		 1021
1022 /* Tell uCode which antennas are actually connected.
1023 * Before first association, we assume all antennas are connected.
1024 * Just after first association, iwl_chain_noise_calibration()
1025 * checks which antennas actually *are* connected. */
04816448
GE		 1026 if (priv->chain_noise_data.active_chains)
1027 active_chains = priv->chain_noise_data.active_chains;
1028 else
1029 active_chains = priv->hw_params.valid_rx_ant;
1030
1031 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 1032
1033 /* How many receivers should we use? */
28a6b07a
TW		 1034 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1035 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1036
28a6b07a 1037
04816448
GE		 1038 /* correct rx chain count according hw settings
1039 * and chain noise calibration
1040 */
1041 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1042 if (valid_rx_cnt < active_rx_cnt)
1043 active_rx_cnt = valid_rx_cnt;
1044
1045 if (valid_rx_cnt < idle_rx_cnt)
1046 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 1047
1048 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1049 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1050
7b841727
RF		 1051 /* copied from 'iwl_bg_request_scan()' */
1052 /* Force use of chains B and C (0x6) for Rx for 4965
1053 * Avoid A (0x1) because of its off-channel reception on A-band.
1054 * MIMO is not used here, but value is required */
1055 if (iwl_is_monitor_mode(priv) &&
1056 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1057 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
fff7a434
WYG		 1058 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1059 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1060 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1061 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
7b841727
RF		 1062 }
1063
28a6b07a
TW		 1064 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1065
9e5e6c32 1066 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 1067 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1068 else
1069 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1070
e1623446 1071 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 1072 priv->staging_rxon.rx_chain,
1073 active_rx_cnt, idle_rx_cnt);
1074
1075 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1076 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 1077}
1078EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 1079
1080/**
17e72782 1081 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 1082 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1083 * @channel: Any channel valid for the requested phymode
1084
1085 * In addition to setting the staging RXON, priv->phymode is also set.
1086 *
1087 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1088 * in the staging RXON flag structure based on the phymode
1089 */
17e72782 1090int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 1091{
17e72782
TW		 1092 enum ieee80211_band band = ch->band;
1093 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1094
8622e705 1095 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 1096 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 1097 channel, band);
1098 return -EINVAL;
1099 }
1100
1101 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1102 (priv->band == band))
1103 return 0;
1104
1105 priv->staging_rxon.channel = cpu_to_le16(channel);
1106 if (band == IEEE80211_BAND_5GHZ)
1107 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1108 else
1109 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1110
1111 priv->band = band;
1112
e1623446 1113 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 1114
1115 return 0;
1116}
c7de35cd 1117EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 1118
8ccde88a
SO		 1119void iwl_set_flags_for_band(struct iwl_priv *priv,
1120 enum ieee80211_band band)
1121{
1122 if (band == IEEE80211_BAND_5GHZ) {
1123 priv->staging_rxon.flags &=
1124 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1125 | RXON_FLG_CCK_MSK);
1126 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1127 } else {
1128 /* Copied from iwl_post_associate() */
1129 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1130 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1131 else
1132 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1133
1134 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1135 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1136
1137 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1138 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1139 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1140 }
1141}
8ccde88a
SO		 1142
1143/*
1144 * initialize rxon structure with default values from eeprom
1145 */
1146void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1147{
1148 const struct iwl_channel_info *ch_info;
1149
1150 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1151
1152 switch (mode) {
1153 case NL80211_IFTYPE_AP:
1154 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1155 break;
1156
1157 case NL80211_IFTYPE_STATION:
1158 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1159 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1160 break;
1161
1162 case NL80211_IFTYPE_ADHOC:
1163 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1164 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1165 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1166 RXON_FILTER_ACCEPT_GRP_MSK;
1167 break;
1168
8ccde88a
SO		 1169 default:
1170 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1171 break;
1172 }
1173
1174#if 0
1175 /* TODO: Figure out when short_preamble would be set and cache from
1176 * that */
1177 if (!hw_to_local(priv->hw)->short_preamble)
1178 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1179 else
1180 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1181#endif
1182
1183 ch_info = iwl_get_channel_info(priv, priv->band,
1184 le16_to_cpu(priv->active_rxon.channel));
1185
1186 if (!ch_info)
1187 ch_info = &priv->channel_info[0];
1188
1189 /*
1190 * in some case A channels are all non IBSS
1191 * in this case force B/G channel
1192 */
1193 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1194 !(is_channel_ibss(ch_info)))
1195 ch_info = &priv->channel_info[0];
1196
1197 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1198 priv->band = ch_info->band;
1199
1200 iwl_set_flags_for_band(priv, priv->band);
1201
1202 priv->staging_rxon.ofdm_basic_rates =
1203 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1204 priv->staging_rxon.cck_basic_rates =
1205 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1206
a2b0f02e
WYG		 1207 /* clear both MIX and PURE40 mode flag */
1208 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1209 RXON_FLG_CHANNEL_MODE_PURE_40);
8ccde88a
SO		 1210 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1211 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1212 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1213 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1214 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1215}
1216EXPORT_SYMBOL(iwl_connection_init_rx_config);
1217
782571f4 1218static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1219{
1220 const struct ieee80211_supported_band *hw = NULL;
1221 struct ieee80211_rate *rate;
1222 int i;
1223
1224 hw = iwl_get_hw_mode(priv, priv->band);
1225 if (!hw) {
1226 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1227 return;
1228 }
1229
1230 priv->active_rate = 0;
1231 priv->active_rate_basic = 0;
1232
1233 for (i = 0; i < hw->n_bitrates; i++) {
1234 rate = &(hw->bitrates[i]);
5027309b 1235 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1236 priv->active_rate |= (1 << rate->hw_value);
1237 }
1238
e1623446 1239 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
8ccde88a
SO		 1240 priv->active_rate, priv->active_rate_basic);
1241
1242 /*
1243 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1244 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1245 * OFDM
1246 */
1247 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1248 priv->staging_rxon.cck_basic_rates =
1249 ((priv->active_rate_basic &
1250 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1251 else
1252 priv->staging_rxon.cck_basic_rates =
1253 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1254
1255 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1256 priv->staging_rxon.ofdm_basic_rates =
1257 ((priv->active_rate_basic &
1258 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1259 IWL_FIRST_OFDM_RATE) & 0xFF;
1260 else
1261 priv->staging_rxon.ofdm_basic_rates =
1262 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1263}
8ccde88a
SO		 1264
1265void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1266{
1267 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1268 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1269 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
e1623446 1270 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
8ccde88a
SO		 1271 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1272 rxon->channel = csa->channel;
1273 priv->staging_rxon.channel = csa->channel;
1274}
1275EXPORT_SYMBOL(iwl_rx_csa);
1276
1277#ifdef CONFIG_IWLWIFI_DEBUG
1278static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1279{
1280 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1281
e1623446 1282 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1283 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1284 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1285 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1286 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1287 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1288 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1289 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1290 rxon->ofdm_basic_rates);
e1623446
TW		 1291 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1292 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1293 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1294 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1295}
6686d17e 1296#endif
8ccde88a
SO		 1297/**
1298 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1299 */
1300void iwl_irq_handle_error(struct iwl_priv *priv)
1301{
1302 /* Set the FW error flag -- cleared on iwl_down */
1303 set_bit(STATUS_FW_ERROR, &priv->status);
1304
1305 /* Cancel currently queued command. */
1306 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1307
1308#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 1309 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
b7a79404
RC		 1310 priv->cfg->ops->lib->dump_nic_error_log(priv);
1311 priv->cfg->ops->lib->dump_nic_event_log(priv);
8ccde88a
SO		 1312 iwl_print_rx_config_cmd(priv);
1313 }
1314#endif
1315
1316 wake_up_interruptible(&priv->wait_command_queue);
1317
1318 /* Keep the restart process from trying to send host
1319 * commands by clearing the INIT status bit */
1320 clear_bit(STATUS_READY, &priv->status);
1321
1322 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1323 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1324 "Restarting adapter due to uCode error.\n");
1325
8ccde88a
SO		 1326 if (priv->cfg->mod_params->restart_fw)
1327 queue_work(priv->workqueue, &priv->restart);
1328 }
1329}
1330EXPORT_SYMBOL(iwl_irq_handle_error);
1331
d68b603c
AK		 1332int iwl_apm_stop_master(struct iwl_priv *priv)
1333{
1334 unsigned long flags;
1335
1336 spin_lock_irqsave(&priv->lock, flags);
1337
1338 /* set stop master bit */
1339 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1340
1739d332 1341 iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c
AK		 1342 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1343
1344 spin_unlock_irqrestore(&priv->lock, flags);
1345 IWL_DEBUG_INFO(priv, "stop master\n");
1346
1347 return 0;
1348}
1349EXPORT_SYMBOL(iwl_apm_stop_master);
1350
1351void iwl_apm_stop(struct iwl_priv *priv)
1352{
1353 unsigned long flags;
1354
1355 iwl_apm_stop_master(priv);
1356
1357 spin_lock_irqsave(&priv->lock, flags);
1358
1359 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1360
1361 udelay(10);
1362 /* clear "init complete" move adapter D0A* --> D0U state */
1363 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1364 spin_unlock_irqrestore(&priv->lock, flags);
1365}
1366EXPORT_SYMBOL(iwl_apm_stop);
1367
8ccde88a
SO		 1368void iwl_configure_filter(struct ieee80211_hw *hw,
1369 unsigned int changed_flags,
1370 unsigned int *total_flags,
3ac64bee 1371 u64 multicast)
8ccde88a
SO		 1372{
1373 struct iwl_priv *priv = hw->priv;
1374 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1375
e1623446 1376 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1377 changed_flags, *total_flags);
1378
1379 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1380 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1381 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1382 else
1383 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1384 }
1385 if (changed_flags & FIF_ALLMULTI) {
1386 if (*total_flags & FIF_ALLMULTI)
1387 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1388 else
1389 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1390 }
1391 if (changed_flags & FIF_CONTROL) {
1392 if (*total_flags & FIF_CONTROL)
1393 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1394 else
1395 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1396 }
1397 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1398 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1399 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1400 else
1401 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1402 }
1403
1404 /* We avoid iwl_commit_rxon here to commit the new filter flags
1405 * since mac80211 will call ieee80211_hw_config immediately.
1406 * (mc_list is not supported at this time). Otherwise, we need to
1407 * queue a background iwl_commit_rxon work.
1408 */
1409
1410 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1411 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1412}
1413EXPORT_SYMBOL(iwl_configure_filter);
1414
6ba87956 1415int iwl_setup_mac(struct iwl_priv *priv)
bf85ea4f 1416{
6ba87956 1417 int ret;
bf85ea4f 1418 struct ieee80211_hw *hw = priv->hw;
e227ceac 1419 hw->rate_control_algorithm = "iwl-agn-rs";
bf85ea4f 1420
566bfe5a 1421 /* Tell mac80211 our characteristics */
605a0bd6 1422 hw->flags = IEEE80211_HW_SIGNAL_DBM |
8b30b1fe 1423 IEEE80211_HW_NOISE_DBM |
4be8c387 1424 IEEE80211_HW_AMPDU_AGGREGATION |
559a4741
JB		 1425 IEEE80211_HW_SPECTRUM_MGMT;
1426
1427 if (!priv->cfg->broken_powersave)
1428 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
1429 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
1430
f59ac048 1431 hw->wiphy->interface_modes =
f59ac048
LR		 1432 BIT(NL80211_IFTYPE_STATION) |
1433 BIT(NL80211_IFTYPE_ADHOC);
ea4a82dc 1434
2a44f911 1435 hw->wiphy->custom_regulatory = true;
1ecf9fc1 1436
37184244
LR		 1437 /* Firmware does not support this */
1438 hw->wiphy->disable_beacon_hints = true;
1439
b23da49e
JB		 1440 /*
1441 * For now, disable PS by default because it affects
1442 * RX performance significantly.
1443 */
1444 hw->wiphy->ps_default = false;
1445
1ecf9fc1
JB		 1446 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1447 /* we create the 802.11 header and a zero-length SSID element */
1448 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
ea4a82dc 1449
bf85ea4f
AK		 1450 /* Default value; 4 EDCA QOS priorities */
1451 hw->queues = 4;
6ba87956 1452
b5d7be5e 1453 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
6ba87956
TW		 1454
1455 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1456 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1457 &priv->bands[IEEE80211_BAND_2GHZ];
1458 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1459 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1460 &priv->bands[IEEE80211_BAND_5GHZ];
1461
1462 ret = ieee80211_register_hw(priv->hw);
1463 if (ret) {
15b1687c 1464 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
6ba87956
TW		 1465 return ret;
1466 }
1467 priv->mac80211_registered = 1;
1468
1469 return 0;
bf85ea4f 1470}
6ba87956 1471EXPORT_SYMBOL(iwl_setup_mac);
bf85ea4f 1472
da154e30
RR		 1473int iwl_set_hw_params(struct iwl_priv *priv)
1474{
da154e30
RR		 1475 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1476 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1477 if (priv->cfg->mod_params->amsdu_size_8K)
1478 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1479 else
1480 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1481 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1482
2c2f3b33
TW		 1483 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1484
49779293
RR		 1485 if (priv->cfg->mod_params->disable_11n)
1486 priv->cfg->sku &= ~IWL_SKU_N;
1487
da154e30
RR		 1488 /* Device-specific setup */
1489 return priv->cfg->ops->lib->set_hw_params(priv);
1490}
1491EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956
TW		 1492
1493int iwl_init_drv(struct iwl_priv *priv)
c7de35cd
RR		 1494{
1495 int ret;
c7de35cd 1496
c7de35cd
RR		 1497 priv->ibss_beacon = NULL;
1498
1499 spin_lock_init(&priv->lock);
c7de35cd
RR		 1500 spin_lock_init(&priv->sta_lock);
1501 spin_lock_init(&priv->hcmd_lock);
c7de35cd 1502
c7de35cd
RR		 1503 INIT_LIST_HEAD(&priv->free_frames);
1504
1505 mutex_init(&priv->mutex);
1506
1507 /* Clear the driver's (not device's) station table */
c587de0b 1508 iwl_clear_stations_table(priv);
c7de35cd
RR		 1509
1510 priv->data_retry_limit = -1;
1511 priv->ieee_channels = NULL;
1512 priv->ieee_rates = NULL;
1513 priv->band = IEEE80211_BAND_2GHZ;
1514
05c914fe 1515 priv->iw_mode = NL80211_IFTYPE_STATION;
c7de35cd 1516
c7de35cd 1517 /* Choose which receivers/antennas to use */
45823531
AK		 1518 if (priv->cfg->ops->hcmd->set_rxon_chain)
1519 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1520
f53696de 1521 iwl_init_scan_params(priv);
c7de35cd
RR		 1522
1523 iwl_reset_qos(priv);
1524
1525 priv->qos_data.qos_active = 0;
1526 priv->qos_data.qos_cap.val = 0;
1527
c7de35cd 1528 priv->rates_mask = IWL_RATES_MASK;
02eec9c5
WYG		 1529 /* Set the tx_power_user_lmt to the lowest power level
1530 * this value will get overwritten by channel max power avg
1531 * from eeprom */
1532 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
c7de35cd
RR		 1533
1534 ret = iwl_init_channel_map(priv);
1535 if (ret) {
15b1687c 1536 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
c7de35cd
RR		 1537 goto err;
1538 }
1539
1540 ret = iwlcore_init_geos(priv);
1541 if (ret) {
15b1687c 1542 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
c7de35cd
RR		 1543 goto err_free_channel_map;
1544 }
534166de 1545 iwlcore_init_hw_rates(priv, priv->ieee_rates);
c7de35cd 1546
c7de35cd
RR		 1547 return 0;
1548
c7de35cd
RR		 1549err_free_channel_map:
1550 iwl_free_channel_map(priv);
1551err:
1552 return ret;
1553}
6ba87956 1554EXPORT_SYMBOL(iwl_init_drv);
c7de35cd 1555
630fe9b6
TW		 1556int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1557{
1558 int ret = 0;
5eadd94b
WYG		 1559 s8 prev_tx_power = priv->tx_power_user_lmt;
1560
630fe9b6 1561 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
daf518de
WF		 1562 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1563 tx_power,
1564 IWL_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1565 return -EINVAL;
1566 }
1567
dc1b0973 1568 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1569 IWL_WARN(priv,
1570 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1571 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1572 return -EINVAL;
1573 }
1574
1575 if (priv->tx_power_user_lmt != tx_power)
1576 force = true;
1577
019fb97d 1578 /* if nic is not up don't send command */
5eadd94b
WYG		 1579 if (iwl_is_ready_rf(priv)) {
1580 priv->tx_power_user_lmt = tx_power;
1581 if (force && priv->cfg->ops->lib->send_tx_power)
1582 ret = priv->cfg->ops->lib->send_tx_power(priv);
1583 else if (!priv->cfg->ops->lib->send_tx_power)
1584 ret = -EOPNOTSUPP;
1585 /*
1586 * if fail to set tx_power, restore the orig. tx power
1587 */
1588 if (ret)
1589 priv->tx_power_user_lmt = prev_tx_power;
1590 }
630fe9b6 1591
5eadd94b
WYG		 1592 /*
1593 * Even this is an async host command, the command
1594 * will always report success from uCode
1595 * So once driver can placing the command into the queue
1596 * successfully, driver can use priv->tx_power_user_lmt
1597 * to reflect the current tx power
1598 */
630fe9b6
TW		 1599 return ret;
1600}
1601EXPORT_SYMBOL(iwl_set_tx_power);
1602
6ba87956 1603void iwl_uninit_drv(struct iwl_priv *priv)
bf85ea4f 1604{
6e21f2c1 1605 iwl_calib_free_results(priv);
6ba87956
TW		 1606 iwlcore_free_geos(priv);
1607 iwl_free_channel_map(priv);
261415f7 1608 kfree(priv->scan);
bf85ea4f 1609}
6ba87956 1610EXPORT_SYMBOL(iwl_uninit_drv);
bf85ea4f 1611
ef850d7c
MA		 1612#define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1613
1614/* Free dram table */
1615void iwl_free_isr_ict(struct iwl_priv *priv)
1616{
1617 if (priv->ict_tbl_vir) {
1618 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1619 PAGE_SIZE, priv->ict_tbl_vir,
1620 priv->ict_tbl_dma);
1621 priv->ict_tbl_vir = NULL;
1622 }
1623}
1624EXPORT_SYMBOL(iwl_free_isr_ict);
1625
1626
1627/* allocate dram shared table it is a PAGE_SIZE aligned
1628 * also reset all data related to ICT table interrupt.
1629 */
1630int iwl_alloc_isr_ict(struct iwl_priv *priv)
1631{
1632
1633 if (priv->cfg->use_isr_legacy)
1634 return 0;
1635 /* allocate shrared data table */
1636 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1637 ICT_COUNT) + PAGE_SIZE,
1638 &priv->ict_tbl_dma);
1639 if (!priv->ict_tbl_vir)
1640 return -ENOMEM;
1641
1642 /* align table to PAGE_SIZE boundry */
1643 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1644
1645 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1646 (unsigned long long)priv->ict_tbl_dma,
1647 (unsigned long long)priv->aligned_ict_tbl_dma,
1648 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1649
1650 priv->ict_tbl = priv->ict_tbl_vir +
1651 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1652
1653 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1654 priv->ict_tbl, priv->ict_tbl_vir,
1655 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1656
1657 /* reset table and index to all 0 */
1658 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1659 priv->ict_index = 0;
1660
40cefda9
MA		 1661 /* add periodic RX interrupt */
1662 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
ef850d7c
MA		 1663 return 0;
1664}
1665EXPORT_SYMBOL(iwl_alloc_isr_ict);
1666
1667/* Device is going up inform it about using ICT interrupt table,
1668 * also we need to tell the driver to start using ICT interrupt.
1669 */
1670int iwl_reset_ict(struct iwl_priv *priv)
1671{
1672 u32 val;
1673 unsigned long flags;
1674
1675 if (!priv->ict_tbl_vir)
1676 return 0;
1677
1678 spin_lock_irqsave(&priv->lock, flags);
1679 iwl_disable_interrupts(priv);
1680
1303dcfd 1681 memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
ef850d7c
MA		 1682
1683 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1684
1685 val |= CSR_DRAM_INT_TBL_ENABLE;
1686 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1687
1688 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1689 "aligned dma address %Lx\n",
1690 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1691
1692 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1693 priv->use_ict = true;
1694 priv->ict_index = 0;
40cefda9 1695 iwl_write32(priv, CSR_INT, priv->inta_mask);
ef850d7c
MA		 1696 iwl_enable_interrupts(priv);
1697 spin_unlock_irqrestore(&priv->lock, flags);
1698
1699 return 0;
1700}
1701EXPORT_SYMBOL(iwl_reset_ict);
1702
1703/* Device is going down disable ict interrupt usage */
1704void iwl_disable_ict(struct iwl_priv *priv)
1705{
1706 unsigned long flags;
1707
1708 spin_lock_irqsave(&priv->lock, flags);
1709 priv->use_ict = false;
1710 spin_unlock_irqrestore(&priv->lock, flags);
1711}
1712EXPORT_SYMBOL(iwl_disable_ict);
1713
1714/* interrupt handler using ict table, with this interrupt driver will
1715 * stop using INTA register to get device's interrupt, reading this register
1716 * is expensive, device will write interrupts in ICT dram table, increment
1717 * index then will fire interrupt to driver, driver will OR all ICT table
1718 * entries from current index up to table entry with 0 value. the result is
1719 * the interrupt we need to service, driver will set the entries back to 0 and
1720 * set index.
1721 */
1722irqreturn_t iwl_isr_ict(int irq, void *data)
1723{
1724 struct iwl_priv *priv = data;
1725 u32 inta, inta_mask;
1726 u32 val = 0;
1727
1728 if (!priv)
1729 return IRQ_NONE;
1730
1731 /* dram interrupt table not set yet,
1732 * use legacy interrupt.
1733 */
1734 if (!priv->use_ict)
1735 return iwl_isr(irq, data);
1736
1737 spin_lock(&priv->lock);
1738
1739 /* Disable (but don't clear!) interrupts here to avoid
1740 * back-to-back ISRs and sporadic interrupts from our NIC.
1741 * If we have something to service, the tasklet will re-enable ints.
1742 * If we *don't* have something, we'll re-enable before leaving here.
1743 */
1744 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1745 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1746
1747
1748 /* Ignore interrupt if there's nothing in NIC to service.
1749 * This may be due to IRQ shared with another device,
1750 * or due to sporadic interrupts thrown from our NIC. */
1751 if (!priv->ict_tbl[priv->ict_index]) {
1752 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1753 goto none;
1754 }
1755
1756 /* read all entries that not 0 start with ict_index */
1757 while (priv->ict_tbl[priv->ict_index]) {
1758
1303dcfd 1759 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
ef850d7c 1760 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1303dcfd
JB		 1761 priv->ict_index,
1762 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
ef850d7c
MA		 1763 priv->ict_tbl[priv->ict_index] = 0;
1764 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1303dcfd 1765 ICT_COUNT);
ef850d7c
MA		 1766
1767 }
1768
1769 /* We should not get this value, just ignore it. */
1770 if (val == 0xffffffff)
1771 val = 0;
1772
1773 inta = (0xff & val) | ((0xff00 & val) << 16);
1774 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1775 inta, inta_mask, val);
1776
40cefda9 1777 inta &= priv->inta_mask;
ef850d7c
MA		 1778 priv->inta |= inta;
1779
1780 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1781 if (likely(inta))
1782 tasklet_schedule(&priv->irq_tasklet);
1783 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1784 /* Allow interrupt if was disabled by this handler and
1785 * no tasklet was schedules, We should not enable interrupt,
1786 * tasklet will enable it.
1787 */
1788 iwl_enable_interrupts(priv);
1789 }
1790
1791 spin_unlock(&priv->lock);
1792 return IRQ_HANDLED;
1793
1794 none:
1795 /* re-enable interrupts here since we don't have anything to service.
1796 * only Re-enable if disabled by irq.
1797 */
1798 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1799 iwl_enable_interrupts(priv);
1800
1801 spin_unlock(&priv->lock);
1802 return IRQ_NONE;
1803}
1804EXPORT_SYMBOL(iwl_isr_ict);
1805
1806
1807static irqreturn_t iwl_isr(int irq, void *data)
1808{
1809 struct iwl_priv *priv = data;
1810 u32 inta, inta_mask;
d651ae32 1811#ifdef CONFIG_IWLWIFI_DEBUG
ef850d7c 1812 u32 inta_fh;
d651ae32 1813#endif
ef850d7c
MA		 1814 if (!priv)
1815 return IRQ_NONE;
1816
1817 spin_lock(&priv->lock);
1818
1819 /* Disable (but don't clear!) interrupts here to avoid
1820 * back-to-back ISRs and sporadic interrupts from our NIC.
1821 * If we have something to service, the tasklet will re-enable ints.
1822 * If we *don't* have something, we'll re-enable before leaving here. */
1823 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1824 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1825
1826 /* Discover which interrupts are active/pending */
1827 inta = iwl_read32(priv, CSR_INT);
1828
1829 /* Ignore interrupt if there's nothing in NIC to service.
1830 * This may be due to IRQ shared with another device,
1831 * or due to sporadic interrupts thrown from our NIC. */
1832 if (!inta) {
1833 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1834 goto none;
1835 }
1836
1837 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1838 /* Hardware disappeared. It might have already raised
1839 * an interrupt */
1840 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1841 goto unplugged;
1842 }
1843
1844#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 1845 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
ef850d7c
MA		 1846 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1847 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1848 "fh 0x%08x\n", inta, inta_mask, inta_fh);
1849 }
1850#endif
1851
1852 priv->inta |= inta;
1853 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1854 if (likely(inta))
1855 tasklet_schedule(&priv->irq_tasklet);
1856 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1857 iwl_enable_interrupts(priv);
1858
1859 unplugged:
1860 spin_unlock(&priv->lock);
1861 return IRQ_HANDLED;
1862
1863 none:
1864 /* re-enable interrupts here since we don't have anything to service. */
1865 /* only Re-enable if diabled by irq and no schedules tasklet. */
1866 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1867 iwl_enable_interrupts(priv);
1868
1869 spin_unlock(&priv->lock);
1870 return IRQ_NONE;
1871}
1872
1873irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1874{
1875 struct iwl_priv *priv = data;
1876 u32 inta, inta_mask;
1877 u32 inta_fh;
1878 if (!priv)
1879 return IRQ_NONE;
1880
1881 spin_lock(&priv->lock);
1882
1883 /* Disable (but don't clear!) interrupts here to avoid
1884 * back-to-back ISRs and sporadic interrupts from our NIC.
1885 * If we have something to service, the tasklet will re-enable ints.
1886 * If we *don't* have something, we'll re-enable before leaving here. */
1887 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1888 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1889
1890 /* Discover which interrupts are active/pending */
1891 inta = iwl_read32(priv, CSR_INT);
1892 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1893
1894 /* Ignore interrupt if there's nothing in NIC to service.
1895 * This may be due to IRQ shared with another device,
1896 * or due to sporadic interrupts thrown from our NIC. */
1897 if (!inta && !inta_fh) {
1898 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1899 goto none;
1900 }
1901
1902 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1903 /* Hardware disappeared. It might have already raised
1904 * an interrupt */
1905 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1906 goto unplugged;
1907 }
1908
1909 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1910 inta, inta_mask, inta_fh);
1911
1912 inta &= ~CSR_INT_BIT_SCD;
1913
1914 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1915 if (likely(inta || inta_fh))
1916 tasklet_schedule(&priv->irq_tasklet);
1917
1918 unplugged:
1919 spin_unlock(&priv->lock);
1920 return IRQ_HANDLED;
1921
1922 none:
1923 /* re-enable interrupts here since we don't have anything to service. */
1924 /* only Re-enable if diabled by irq */
1925 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1926 iwl_enable_interrupts(priv);
1927 spin_unlock(&priv->lock);
1928 return IRQ_NONE;
1929}
ef850d7c 1930EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1931
17f841cd
SO		 1932int iwl_send_bt_config(struct iwl_priv *priv)
1933{
1934 struct iwl_bt_cmd bt_cmd = {
1935 .flags = 3,
1936 .lead_time = 0xAA,
1937 .max_kill = 1,
1938 .kill_ack_mask = 0,
1939 .kill_cts_mask = 0,
1940 };
1941
1942 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1943 sizeof(struct iwl_bt_cmd), &bt_cmd);
1944}
1945EXPORT_SYMBOL(iwl_send_bt_config);
1946
49ea8596
EG		 1947int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
1948{
1949 u32 stat_flags = 0;
1950 struct iwl_host_cmd cmd = {
1951 .id = REPLY_STATISTICS_CMD,
c2acea8e 1952 .flags = flags,
49ea8596
EG		 1953 .len = sizeof(stat_flags),
1954 .data = (u8 *) &stat_flags,
1955 };
1956 return iwl_send_cmd(priv, &cmd);
1957}
1958EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1959
b0692f2f
EG		 1960/**
1961 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1962 * using sample data 100 bytes apart. If these sample points are good,
1963 * it's a pretty good bet that everything between them is good, too.
1964 */
1965static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1966{
1967 u32 val;
1968 int ret = 0;
1969 u32 errcnt = 0;
1970 u32 i;
1971
e1623446 1972 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1973
b0692f2f
EG		 1974 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1975 /* read data comes through single port, auto-incr addr */
1976 /* NOTE: Use the debugless read so we don't flood kernel log
1977 * if IWL_DL_IO is set */
1978 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1979 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1980 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1981 if (val != le32_to_cpu(*image)) {
1982 ret = -EIO;
1983 errcnt++;
1984 if (errcnt >= 3)
1985 break;
1986 }
1987 }
1988
b0692f2f
EG		 1989 return ret;
1990}
1991
1992/**
1993 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1994 * looking at all data.
1995 */
1996static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1997 u32 len)
1998{
1999 u32 val;
2000 u32 save_len = len;
2001 int ret = 0;
2002 u32 errcnt;
2003
e1623446 2004 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 2005
250bdd21
SO		 2006 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2007 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 2008
2009 errcnt = 0;
2010 for (; len > 0; len -= sizeof(u32), image++) {
2011 /* read data comes through single port, auto-incr addr */
2012 /* NOTE: Use the debugless read so we don't flood kernel log
2013 * if IWL_DL_IO is set */
2014 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2015 if (val != le32_to_cpu(*image)) {
15b1687c 2016 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 2017 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2018 save_len - len, val, le32_to_cpu(*image));
2019 ret = -EIO;
2020 errcnt++;
2021 if (errcnt >= 20)
2022 break;
2023 }
2024 }
2025
b0692f2f 2026 if (!errcnt)
e1623446
TW		 2027 IWL_DEBUG_INFO(priv,
2028 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 2029
2030 return ret;
2031}
2032
2033/**
2034 * iwl_verify_ucode - determine which instruction image is in SRAM,
2035 * and verify its contents
2036 */
2037int iwl_verify_ucode(struct iwl_priv *priv)
2038{
2039 __le32 *image;
2040 u32 len;
2041 int ret;
2042
2043 /* Try bootstrap */
2044 image = (__le32 *)priv->ucode_boot.v_addr;
2045 len = priv->ucode_boot.len;
2046 ret = iwlcore_verify_inst_sparse(priv, image, len);
2047 if (!ret) {
e1623446 2048 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 2049 return 0;
2050 }
2051
2052 /* Try initialize */
2053 image = (__le32 *)priv->ucode_init.v_addr;
2054 len = priv->ucode_init.len;
2055 ret = iwlcore_verify_inst_sparse(priv, image, len);
2056 if (!ret) {
e1623446 2057 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 2058 return 0;
2059 }
2060
2061 /* Try runtime/protocol */
2062 image = (__le32 *)priv->ucode_code.v_addr;
2063 len = priv->ucode_code.len;
2064 ret = iwlcore_verify_inst_sparse(priv, image, len);
2065 if (!ret) {
e1623446 2066 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 2067 return 0;
2068 }
2069
15b1687c 2070 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 2071
2072 /* Since nothing seems to match, show first several data entries in
2073 * instruction SRAM, so maybe visual inspection will give a clue.
2074 * Selection of bootstrap image (vs. other images) is arbitrary. */
2075 image = (__le32 *)priv->ucode_boot.v_addr;
2076 len = priv->ucode_boot.len;
2077 ret = iwl_verify_inst_full(priv, image, len);
2078
2079 return ret;
2080}
2081EXPORT_SYMBOL(iwl_verify_ucode);
2082
56e12615 2083
47f4a587
EG		 2084void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2085{
2086 struct iwl_ct_kill_config cmd;
672639de 2087 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 2088 unsigned long flags;
2089 int ret = 0;
2090
2091 spin_lock_irqsave(&priv->lock, flags);
2092 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2093 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2094 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 2095 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 2096
672639de
WYG		 2097 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
2098 case CSR_HW_REV_TYPE_1000:
2099 case CSR_HW_REV_TYPE_6x00:
2100 case CSR_HW_REV_TYPE_6x50:
2101 adv_cmd.critical_temperature_enter =
2102 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2103 adv_cmd.critical_temperature_exit =
2104 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2105
2106 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2107 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 2108 if (ret)
2109 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2110 else
2111 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2112 "succeeded, "
2113 "critical temperature enter is %d,"
2114 "exit is %d\n",
2115 priv->hw_params.ct_kill_threshold,
2116 priv->hw_params.ct_kill_exit_threshold);
672639de
WYG		 2117 break;
2118 default:
2119 cmd.critical_temperature_R =
2120 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 2121
672639de
WYG		 2122 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2123 sizeof(cmd), &cmd);
d91b1ba3
WYG		 2124 if (ret)
2125 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2126 else
2127 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2128 "succeeded, "
2129 "critical temperature is %d\n",
2130 priv->hw_params.ct_kill_threshold);
672639de
WYG		 2131 break;
2132 }
47f4a587
EG		 2133}
2134EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 2135
0ad91a35 2136
14a08a7f
EG		 2137/*
2138 * CARD_STATE_CMD
2139 *
2140 * Use: Sets the device's internal card state to enable, disable, or halt
2141 *
2142 * When in the 'enable' state the card operates as normal.
2143 * When in the 'disable' state, the card enters into a low power mode.
2144 * When in the 'halt' state, the card is shut down and must be fully
2145 * restarted to come back on.
2146 */
c496294e 2147int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 2148{
2149 struct iwl_host_cmd cmd = {
2150 .id = REPLY_CARD_STATE_CMD,
2151 .len = sizeof(u32),
2152 .data = &flags,
c2acea8e 2153 .flags = meta_flag,
14a08a7f
EG		 2154 };
2155
2156 return iwl_send_cmd(priv, &cmd);
2157}
2158
030f05ed
AK		 2159void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2160 struct iwl_rx_mem_buffer *rxb)
2161{
2162#ifdef CONFIG_IWLWIFI_DEBUG
2163 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2164 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2165 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2166 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2167#endif
2168}
2169EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2170
2171void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2172 struct iwl_rx_mem_buffer *rxb)
2173{
2174 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
396887a2 2175 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 2176 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 2177 "notification for %s:\n", len,
2178 get_cmd_string(pkt->hdr.cmd));
2179 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 2180}
2181EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 2182
2183void iwl_rx_reply_error(struct iwl_priv *priv,
2184 struct iwl_rx_mem_buffer *rxb)
2185{
2186 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2187
2188 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2189 "seq 0x%04X ser 0x%08X\n",
2190 le32_to_cpu(pkt->u.err_resp.error_type),
2191 get_cmd_string(pkt->u.err_resp.cmd_id),
2192 pkt->u.err_resp.cmd_id,
2193 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2194 le32_to_cpu(pkt->u.err_resp.error_info));
2195}
2196EXPORT_SYMBOL(iwl_rx_reply_error);
2197
a83b9141
WYG		 2198void iwl_clear_isr_stats(struct iwl_priv *priv)
2199{
2200 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2201}
a83b9141 2202
488829f1
AK		 2203int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2204 const struct ieee80211_tx_queue_params *params)
2205{
2206 struct iwl_priv *priv = hw->priv;
2207 unsigned long flags;
2208 int q;
2209
2210 IWL_DEBUG_MAC80211(priv, "enter\n");
2211
2212 if (!iwl_is_ready_rf(priv)) {
2213 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2214 return -EIO;
2215 }
2216
2217 if (queue >= AC_NUM) {
2218 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2219 return 0;
2220 }
2221
2222 q = AC_NUM - 1 - queue;
2223
2224 spin_lock_irqsave(&priv->lock, flags);
2225
2226 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2227 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2228 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2229 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2230 cpu_to_le16((params->txop * 32));
2231
2232 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2233 priv->qos_data.qos_active = 1;
2234
2235 if (priv->iw_mode == NL80211_IFTYPE_AP)
2236 iwl_activate_qos(priv, 1);
2237 else if (priv->assoc_id && iwl_is_associated(priv))
2238 iwl_activate_qos(priv, 0);
2239
2240 spin_unlock_irqrestore(&priv->lock, flags);
2241
2242 IWL_DEBUG_MAC80211(priv, "leave\n");
2243 return 0;
2244}
2245EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 2246
2247static void iwl_ht_conf(struct iwl_priv *priv,
02bb1bea 2248 struct ieee80211_bss_conf *bss_conf)
5bbe233b 2249{
fad95bf5 2250 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b
AK		 2251 struct ieee80211_sta *sta;
2252
2253 IWL_DEBUG_MAC80211(priv, "enter: \n");
2254
fad95bf5 2255 if (!ht_conf->is_ht)
5bbe233b
AK		 2256 return;
2257
fad95bf5 2258 ht_conf->ht_protection =
9ed6bcce 2259 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 2260 ht_conf->non_GF_STA_present =
9ed6bcce 2261 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 2262
02bb1bea
JB		 2263 ht_conf->single_chain_sufficient = false;
2264
2265 switch (priv->iw_mode) {
2266 case NL80211_IFTYPE_STATION:
2267 rcu_read_lock();
2268 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2269 if (sta) {
2270 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
2271 int maxstreams;
2272
2273 maxstreams = (ht_cap->mcs.tx_params &
2274 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
2275 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2276 maxstreams += 1;
2277
2278 if ((ht_cap->mcs.rx_mask[1] == 0) &&
2279 (ht_cap->mcs.rx_mask[2] == 0))
2280 ht_conf->single_chain_sufficient = true;
2281 if (maxstreams <= 1)
2282 ht_conf->single_chain_sufficient = true;
2283 } else {
2284 /*
2285 * If at all, this can only happen through a race
2286 * when the AP disconnects us while we're still
2287 * setting up the connection, in that case mac80211
2288 * will soon tell us about that.
2289 */
2290 ht_conf->single_chain_sufficient = true;
2291 }
2292 rcu_read_unlock();
2293 break;
2294 case NL80211_IFTYPE_ADHOC:
2295 ht_conf->single_chain_sufficient = true;
2296 break;
2297 default:
2298 break;
2299 }
5bbe233b
AK		 2300
2301 IWL_DEBUG_MAC80211(priv, "leave\n");
2302}
2303
2304#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2305void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 2306 struct ieee80211_vif *vif,
2307 struct ieee80211_bss_conf *bss_conf,
2308 u32 changes)
5bbe233b
AK		 2309{
2310 struct iwl_priv *priv = hw->priv;
3a650292 2311 int ret;
5bbe233b
AK		 2312
2313 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2314
2d0ddec5
JB		 2315 if (!iwl_is_alive(priv))
2316 return;
2317
2318 mutex_lock(&priv->mutex);
2319
2320 if (changes & BSS_CHANGED_BEACON &&
2321 priv->iw_mode == NL80211_IFTYPE_AP) {
2322 dev_kfree_skb(priv->ibss_beacon);
2323 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2324 }
2325
d7129e19
JB		 2326 if (changes & BSS_CHANGED_BEACON_INT) {
2327 priv->beacon_int = bss_conf->beacon_int;
2328 /* TODO: in AP mode, do something to make this take effect */
2329 }
2330
2331 if (changes & BSS_CHANGED_BSSID) {
2332 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2333
2334 /*
2335 * If there is currently a HW scan going on in the
2336 * background then we need to cancel it else the RXON
2337 * below/in post_associate will fail.
2338 */
2d0ddec5 2339 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 2340 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 2341 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2342 mutex_unlock(&priv->mutex);
2343 return;
2344 }
2d0ddec5 2345
d7129e19
JB		 2346 /* mac80211 only sets assoc when in STATION mode */
2347 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2348 bss_conf->assoc) {
2349 memcpy(priv->staging_rxon.bssid_addr,
2350 bss_conf->bssid, ETH_ALEN);
2d0ddec5 2351
d7129e19
JB		 2352 /* currently needed in a few places */
2353 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2354 } else {
2355 priv->staging_rxon.filter_flags &=
2356 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 2357 }
d7129e19 2358
2d0ddec5
JB		 2359 }
2360
d7129e19
JB		 2361 /*
2362 * This needs to be after setting the BSSID in case
2363 * mac80211 decides to do both changes at once because
2364 * it will invoke post_associate.
2365 */
2d0ddec5
JB		 2366 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2367 changes & BSS_CHANGED_BEACON) {
2368 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2369
2370 if (beacon)
2371 iwl_mac_beacon_update(hw, beacon);
2372 }
2373
5bbe233b
AK		 2374 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2375 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2376 bss_conf->use_short_preamble);
2377 if (bss_conf->use_short_preamble)
2378 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2379 else
2380 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2381 }
2382
2383 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2384 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2385 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2386 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2387 else
2388 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2389 }
2390
d7129e19
JB		 2391 if (changes & BSS_CHANGED_BASIC_RATES) {
2392 /* XXX use this information
2393 *
2394 * To do that, remove code from iwl_set_rate() and put something
2395 * like this here:
2396 *
2397 if (A-band)
2398 priv->staging_rxon.ofdm_basic_rates =
2399 bss_conf->basic_rates;
2400 else
2401 priv->staging_rxon.ofdm_basic_rates =
2402 bss_conf->basic_rates >> 4;
2403 priv->staging_rxon.cck_basic_rates =
2404 bss_conf->basic_rates & 0xF;
2405 */
2406 }
2407
5bbe233b
AK		 2408 if (changes & BSS_CHANGED_HT) {
2409 iwl_ht_conf(priv, bss_conf);
45823531
AK		 2410
2411 if (priv->cfg->ops->hcmd->set_rxon_chain)
2412 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 2413 }
2414
2415 if (changes & BSS_CHANGED_ASSOC) {
2416 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b
AK		 2417 if (bss_conf->assoc) {
2418 priv->assoc_id = bss_conf->aid;
2419 priv->beacon_int = bss_conf->beacon_int;
5bbe233b
AK		 2420 priv->timestamp = bss_conf->timestamp;
2421 priv->assoc_capability = bss_conf->assoc_capability;
2422
e932a609
JB		 2423 iwl_led_associate(priv);
2424
d7129e19
JB		 2425 /*
2426 * We have just associated, don't start scan too early
2427 * leave time for EAPOL exchange to complete.
2428 *
2429 * XXX: do this in mac80211
5bbe233b
AK		 2430 */
2431 priv->next_scan_jiffies = jiffies +
2432 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
d7129e19
JB		 2433 if (!iwl_is_rfkill(priv))
2434 priv->cfg->ops->lib->post_associate(priv);
e932a609 2435 } else {
5bbe233b 2436 priv->assoc_id = 0;
e932a609
JB		 2437 iwl_led_disassociate(priv);
2438 }
d7129e19
JB		 2439 }
2440
2441 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2442 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2443 changes);
2444 ret = iwl_send_rxon_assoc(priv);
2445 if (!ret) {
2446 /* Sync active_rxon with latest change. */
2447 memcpy((void *)&priv->active_rxon,
2448 &priv->staging_rxon,
2449 sizeof(struct iwl_rxon_cmd));
5bbe233b 2450 }
5bbe233b 2451 }
d7129e19
JB		 2452
2453 mutex_unlock(&priv->mutex);
2454
2d0ddec5 2455 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 2456}
2457EXPORT_SYMBOL(iwl_bss_info_changed);
2458
9944b938
AK		 2459int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2460{
2461 struct iwl_priv *priv = hw->priv;
2462 unsigned long flags;
2463 __le64 timestamp;
2464
2465 IWL_DEBUG_MAC80211(priv, "enter\n");
2466
2467 if (!iwl_is_ready_rf(priv)) {
2468 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2469 return -EIO;
2470 }
2471
2472 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2473 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2474 return -EIO;
2475 }
2476
2477 spin_lock_irqsave(&priv->lock, flags);
2478
2479 if (priv->ibss_beacon)
2480 dev_kfree_skb(priv->ibss_beacon);
2481
2482 priv->ibss_beacon = skb;
2483
2484 priv->assoc_id = 0;
2485 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2486 priv->timestamp = le64_to_cpu(timestamp);
2487
2488 IWL_DEBUG_MAC80211(priv, "leave\n");
2489 spin_unlock_irqrestore(&priv->lock, flags);
2490
2491 iwl_reset_qos(priv);
2492
2493 priv->cfg->ops->lib->post_associate(priv);
2494
2495
2496 return 0;
2497}
2498EXPORT_SYMBOL(iwl_mac_beacon_update);
2499
727882d6
AK		 2500int iwl_set_mode(struct iwl_priv *priv, int mode)
2501{
2502 if (mode == NL80211_IFTYPE_ADHOC) {
2503 const struct iwl_channel_info *ch_info;
2504
2505 ch_info = iwl_get_channel_info(priv,
2506 priv->band,
2507 le16_to_cpu(priv->staging_rxon.channel));
2508
2509 if (!ch_info || !is_channel_ibss(ch_info)) {
2510 IWL_ERR(priv, "channel %d not IBSS channel\n",
2511 le16_to_cpu(priv->staging_rxon.channel));
2512 return -EINVAL;
2513 }
2514 }
2515
2516 iwl_connection_init_rx_config(priv, mode);
2517
2518 if (priv->cfg->ops->hcmd->set_rxon_chain)
2519 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2520
2521 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2522
c587de0b 2523 iwl_clear_stations_table(priv);
727882d6
AK		 2524
2525 /* dont commit rxon if rf-kill is on*/
2526 if (!iwl_is_ready_rf(priv))
2527 return -EAGAIN;
2528
727882d6
AK		 2529 iwlcore_commit_rxon(priv);
2530
2531 return 0;
2532}
2533EXPORT_SYMBOL(iwl_set_mode);
2534
cbb6ab94
AK		 2535int iwl_mac_add_interface(struct ieee80211_hw *hw,
2536 struct ieee80211_if_init_conf *conf)
2537{
2538 struct iwl_priv *priv = hw->priv;
2539 unsigned long flags;
2540
2541 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2542
2543 if (priv->vif) {
2544 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2545 return -EOPNOTSUPP;
2546 }
2547
2548 spin_lock_irqsave(&priv->lock, flags);
2549 priv->vif = conf->vif;
2550 priv->iw_mode = conf->type;
2551
2552 spin_unlock_irqrestore(&priv->lock, flags);
2553
2554 mutex_lock(&priv->mutex);
2555
2556 if (conf->mac_addr) {
2557 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2558 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2559 }
2560
2561 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2562 /* we are not ready, will run again when ready */
2563 set_bit(STATUS_MODE_PENDING, &priv->status);
2564
2565 mutex_unlock(&priv->mutex);
2566
2567 IWL_DEBUG_MAC80211(priv, "leave\n");
2568 return 0;
2569}
2570EXPORT_SYMBOL(iwl_mac_add_interface);
2571
d8052319
AK		 2572void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2573 struct ieee80211_if_init_conf *conf)
2574{
2575 struct iwl_priv *priv = hw->priv;
2576
2577 IWL_DEBUG_MAC80211(priv, "enter\n");
2578
2579 mutex_lock(&priv->mutex);
2580
2581 if (iwl_is_ready_rf(priv)) {
2582 iwl_scan_cancel_timeout(priv, 100);
2583 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2584 iwlcore_commit_rxon(priv);
2585 }
2586 if (priv->vif == conf->vif) {
2587 priv->vif = NULL;
2588 memset(priv->bssid, 0, ETH_ALEN);
2589 }
2590 mutex_unlock(&priv->mutex);
2591
2592 IWL_DEBUG_MAC80211(priv, "leave\n");
2593
2594}
2595EXPORT_SYMBOL(iwl_mac_remove_interface);
2596
4808368d
AK		 2597/**
2598 * iwl_mac_config - mac80211 config callback
2599 *
2600 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2601 * be set inappropriately and the driver currently sets the hardware up to
2602 * use it whenever needed.
2603 */
2604int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2605{
2606 struct iwl_priv *priv = hw->priv;
2607 const struct iwl_channel_info *ch_info;
2608 struct ieee80211_conf *conf = &hw->conf;
fad95bf5 2609 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK		 2610 unsigned long flags = 0;
2611 int ret = 0;
2612 u16 ch;
2613 int scan_active = 0;
2614
2615 mutex_lock(&priv->mutex);
2616
4808368d
AK		 2617 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2618 conf->channel->hw_value, changed);
2619
2620 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2621 test_bit(STATUS_SCANNING, &priv->status))) {
2622 scan_active = 1;
2623 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2624 }
2625
2626
2627 /* during scanning mac80211 will delay channel setting until
2628 * scan finish with changed = 0
2629 */
2630 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2631 if (scan_active)
2632 goto set_ch_out;
2633
2634 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2635 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2636 if (!is_channel_valid(ch_info)) {
2637 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2638 ret = -EINVAL;
2639 goto set_ch_out;
2640 }
2641
2642 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2643 !is_channel_ibss(ch_info)) {
2644 IWL_ERR(priv, "channel %d in band %d not "
2645 "IBSS channel\n",
2646 conf->channel->hw_value, conf->channel->band);
2647 ret = -EINVAL;
2648 goto set_ch_out;
2649 }
2650
4808368d
AK		 2651 spin_lock_irqsave(&priv->lock, flags);
2652
28bd723b
DH		 2653 /* Configure HT40 channels */
2654 ht_conf->is_ht = conf_is_ht(conf);
2655 if (ht_conf->is_ht) {
2656 if (conf_is_ht40_minus(conf)) {
2657 ht_conf->extension_chan_offset =
2658 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2659 ht_conf->is_40mhz = true;
28bd723b
DH		 2660 } else if (conf_is_ht40_plus(conf)) {
2661 ht_conf->extension_chan_offset =
2662 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2663 ht_conf->is_40mhz = true;
28bd723b
DH		 2664 } else {
2665 ht_conf->extension_chan_offset =
2666 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2667 ht_conf->is_40mhz = false;
28bd723b
DH		 2668 }
2669 } else
c812ee24 2670 ht_conf->is_40mhz = false;
28bd723b
DH		 2671 /* Default to no protection. Protection mode will later be set
2672 * from BSS config in iwl_ht_conf */
2673 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2674
2675 /* if we are switching from ht to 2.4 clear flags
2676 * from any ht related info since 2.4 does not
2677 * support ht */
2678 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2679 priv->staging_rxon.flags = 0;
2680
2681 iwl_set_rxon_channel(priv, conf->channel);
2682
2683 iwl_set_flags_for_band(priv, conf->channel->band);
2684 spin_unlock_irqrestore(&priv->lock, flags);
2685 set_ch_out:
2686 /* The list of supported rates and rate mask can be different
2687 * for each band; since the band may have changed, reset
2688 * the rate mask to what mac80211 lists */
2689 iwl_set_rate(priv);
2690 }
2691
78f5fb7f
JB		 2692 if (changed & (IEEE80211_CONF_CHANGE_PS |
2693 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2694 ret = iwl_power_update_mode(priv, false);
4808368d 2695 if (ret)
e312c24c 2696 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2697 }
2698
2699 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2700 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2701 priv->tx_power_user_lmt, conf->power_level);
2702
2703 iwl_set_tx_power(priv, conf->power_level, false);
2704 }
2705
2706 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2707 if (priv->cfg->ops->hcmd->set_rxon_chain)
2708 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2709
0cf4c01e
MA		 2710 if (!iwl_is_ready(priv)) {
2711 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2712 goto out;
2713 }
2714
4808368d
AK		 2715 if (scan_active)
2716 goto out;
2717
2718 if (memcmp(&priv->active_rxon,
2719 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2720 iwlcore_commit_rxon(priv);
2721 else
2722 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2723
2724
2725out:
2726 IWL_DEBUG_MAC80211(priv, "leave\n");
2727 mutex_unlock(&priv->mutex);
2728 return ret;
2729}
2730EXPORT_SYMBOL(iwl_mac_config);
2731
aa89f31e
AK		 2732int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2733 struct ieee80211_tx_queue_stats *stats)
2734{
2735 struct iwl_priv *priv = hw->priv;
2736 int i, avail;
2737 struct iwl_tx_queue *txq;
2738 struct iwl_queue *q;
2739 unsigned long flags;
2740
2741 IWL_DEBUG_MAC80211(priv, "enter\n");
2742
2743 if (!iwl_is_ready_rf(priv)) {
2744 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2745 return -EIO;
2746 }
2747
2748 spin_lock_irqsave(&priv->lock, flags);
2749
2750 for (i = 0; i < AC_NUM; i++) {
2751 txq = &priv->txq[i];
2752 q = &txq->q;
2753 avail = iwl_queue_space(q);
2754
2755 stats[i].len = q->n_window - avail;
2756 stats[i].limit = q->n_window - q->high_mark;
2757 stats[i].count = q->n_window;
2758
2759 }
2760 spin_unlock_irqrestore(&priv->lock, flags);
2761
2762 IWL_DEBUG_MAC80211(priv, "leave\n");
2763
2764 return 0;
2765}
2766EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2767
bd564261
AK		 2768void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2769{
2770 struct iwl_priv *priv = hw->priv;
2771 unsigned long flags;
2772
2773 mutex_lock(&priv->mutex);
2774 IWL_DEBUG_MAC80211(priv, "enter\n");
2775
2776 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2777 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2778 spin_unlock_irqrestore(&priv->lock, flags);
2779
2780 iwl_reset_qos(priv);
2781
2782 spin_lock_irqsave(&priv->lock, flags);
2783 priv->assoc_id = 0;
2784 priv->assoc_capability = 0;
2785 priv->assoc_station_added = 0;
2786
2787 /* new association get rid of ibss beacon skb */
2788 if (priv->ibss_beacon)
2789 dev_kfree_skb(priv->ibss_beacon);
2790
2791 priv->ibss_beacon = NULL;
2792
57c4d7b4 2793 priv->beacon_int = priv->vif->bss_conf.beacon_int;
bd564261
AK		 2794 priv->timestamp = 0;
2795 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2796 priv->beacon_int = 0;
2797
2798 spin_unlock_irqrestore(&priv->lock, flags);
2799
2800 if (!iwl_is_ready_rf(priv)) {
2801 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2802 mutex_unlock(&priv->mutex);
2803 return;
2804 }
2805
2806 /* we are restarting association process
2807 * clear RXON_FILTER_ASSOC_MSK bit
2808 */
2809 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2810 iwl_scan_cancel_timeout(priv, 100);
2811 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2812 iwlcore_commit_rxon(priv);
2813 }
2814
bd564261 2815 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
bd564261
AK		 2816 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2817 mutex_unlock(&priv->mutex);
2818 return;
2819 }
2820
2821 iwl_set_rate(priv);
2822
2823 mutex_unlock(&priv->mutex);
2824
2825 IWL_DEBUG_MAC80211(priv, "leave\n");
2826}
2827EXPORT_SYMBOL(iwl_mac_reset_tsf);
2828
20594eb0
WYG		 2829#ifdef CONFIG_IWLWIFI_DEBUGFS
2830
2831#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2832
2833void iwl_reset_traffic_log(struct iwl_priv *priv)
2834{
2835 priv->tx_traffic_idx = 0;
2836 priv->rx_traffic_idx = 0;
2837 if (priv->tx_traffic)
2838 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2839 if (priv->rx_traffic)
2840 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2841}
2842
2843int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2844{
2845 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2846
2847 if (iwl_debug_level & IWL_DL_TX) {
2848 if (!priv->tx_traffic) {
2849 priv->tx_traffic =
2850 kzalloc(traffic_size, GFP_KERNEL);
2851 if (!priv->tx_traffic)
2852 return -ENOMEM;
2853 }
2854 }
2855 if (iwl_debug_level & IWL_DL_RX) {
2856 if (!priv->rx_traffic) {
2857 priv->rx_traffic =
2858 kzalloc(traffic_size, GFP_KERNEL);
2859 if (!priv->rx_traffic)
2860 return -ENOMEM;
2861 }
2862 }
2863 iwl_reset_traffic_log(priv);
2864 return 0;
2865}
2866EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2867
2868void iwl_free_traffic_mem(struct iwl_priv *priv)
2869{
2870 kfree(priv->tx_traffic);
2871 priv->tx_traffic = NULL;
2872
2873 kfree(priv->rx_traffic);
2874 priv->rx_traffic = NULL;
2875}
2876EXPORT_SYMBOL(iwl_free_traffic_mem);
2877
2878void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2879 u16 length, struct ieee80211_hdr *header)
2880{
2881 __le16 fc;
2882 u16 len;
2883
2884 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2885 return;
2886
2887 if (!priv->tx_traffic)
2888 return;
2889
2890 fc = header->frame_control;
2891 if (ieee80211_is_data(fc)) {
2892 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2893 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2894 memcpy((priv->tx_traffic +
2895 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2896 header, len);
2897 priv->tx_traffic_idx =
2898 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2899 }
2900}
2901EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2902
2903void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2904 u16 length, struct ieee80211_hdr *header)
2905{
2906 __le16 fc;
2907 u16 len;
2908
2909 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2910 return;
2911
2912 if (!priv->rx_traffic)
2913 return;
2914
2915 fc = header->frame_control;
2916 if (ieee80211_is_data(fc)) {
2917 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2918 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2919 memcpy((priv->rx_traffic +
2920 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2921 header, len);
2922 priv->rx_traffic_idx =
2923 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2924 }
2925}
2926EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2927
2928const char *get_mgmt_string(int cmd)
2929{
2930 switch (cmd) {
2931 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2932 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2933 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2934 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2935 IWL_CMD(MANAGEMENT_PROBE_REQ);
2936 IWL_CMD(MANAGEMENT_PROBE_RESP);
2937 IWL_CMD(MANAGEMENT_BEACON);
2938 IWL_CMD(MANAGEMENT_ATIM);
2939 IWL_CMD(MANAGEMENT_DISASSOC);
2940 IWL_CMD(MANAGEMENT_AUTH);
2941 IWL_CMD(MANAGEMENT_DEAUTH);
2942 IWL_CMD(MANAGEMENT_ACTION);
2943 default:
2944 return "UNKNOWN";
2945
2946 }
2947}
2948
2949const char *get_ctrl_string(int cmd)
2950{
2951 switch (cmd) {
2952 IWL_CMD(CONTROL_BACK_REQ);
2953 IWL_CMD(CONTROL_BACK);
2954 IWL_CMD(CONTROL_PSPOLL);
2955 IWL_CMD(CONTROL_RTS);
2956 IWL_CMD(CONTROL_CTS);
2957 IWL_CMD(CONTROL_ACK);
2958 IWL_CMD(CONTROL_CFEND);
2959 IWL_CMD(CONTROL_CFENDACK);
2960 default:
2961 return "UNKNOWN";
2962
2963 }
2964}
2965
2966void iwl_clear_tx_stats(struct iwl_priv *priv)
2967{
2968 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
2969
2970}
2971
2972void iwl_clear_rx_stats(struct iwl_priv *priv)
2973{
2974 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
2975}
2976
2977/*
2978 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2979 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2980 * Use debugFs to display the rx/rx_statistics
2981 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2982 * information will be recorded, but DATA pkt still will be recorded
2983 * for the reason of iwl_led.c need to control the led blinking based on
2984 * number of tx and rx data.
2985 *
2986 */
2987void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2988{
2989 struct traffic_stats *stats;
2990
2991 if (is_tx)
2992 stats = &priv->tx_stats;
2993 else
2994 stats = &priv->rx_stats;
2995
2996 if (ieee80211_is_mgmt(fc)) {
2997 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2998 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2999 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
3000 break;
3001 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
3002 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
3003 break;
3004 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
3005 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
3006 break;
3007 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
3008 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
3009 break;
3010 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
3011 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
3012 break;
3013 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
3014 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
3015 break;
3016 case cpu_to_le16(IEEE80211_STYPE_BEACON):
3017 stats->mgmt[MANAGEMENT_BEACON]++;
3018 break;
3019 case cpu_to_le16(IEEE80211_STYPE_ATIM):
3020 stats->mgmt[MANAGEMENT_ATIM]++;
3021 break;
3022 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
3023 stats->mgmt[MANAGEMENT_DISASSOC]++;
3024 break;
3025 case cpu_to_le16(IEEE80211_STYPE_AUTH):
3026 stats->mgmt[MANAGEMENT_AUTH]++;
3027 break;
3028 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
3029 stats->mgmt[MANAGEMENT_DEAUTH]++;
3030 break;
3031 case cpu_to_le16(IEEE80211_STYPE_ACTION):
3032 stats->mgmt[MANAGEMENT_ACTION]++;
3033 break;
3034 }
3035 } else if (ieee80211_is_ctl(fc)) {
3036 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3037 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
3038 stats->ctrl[CONTROL_BACK_REQ]++;
3039 break;
3040 case cpu_to_le16(IEEE80211_STYPE_BACK):
3041 stats->ctrl[CONTROL_BACK]++;
3042 break;
3043 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3044 stats->ctrl[CONTROL_PSPOLL]++;
3045 break;
3046 case cpu_to_le16(IEEE80211_STYPE_RTS):
3047 stats->ctrl[CONTROL_RTS]++;
3048 break;
3049 case cpu_to_le16(IEEE80211_STYPE_CTS):
3050 stats->ctrl[CONTROL_CTS]++;
3051 break;
3052 case cpu_to_le16(IEEE80211_STYPE_ACK):
3053 stats->ctrl[CONTROL_ACK]++;
3054 break;
3055 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3056 stats->ctrl[CONTROL_CFEND]++;
3057 break;
3058 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3059 stats->ctrl[CONTROL_CFENDACK]++;
3060 break;
3061 }
3062 } else {
3063 /* data */
3064 stats->data_cnt++;
3065 stats->data_bytes += len;
3066 }
3067}
3068EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 3069#endif
3070
6da3a13e
WYG		 3071#ifdef CONFIG_PM
3072
3073int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3074{
3075 struct iwl_priv *priv = pci_get_drvdata(pdev);
3076
3077 /*
3078 * This function is called when system goes into suspend state
3079 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3080 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3081 * it will not call apm_ops.stop() to stop the DMA operation.
3082 * Calling apm_ops.stop here to make sure we stop the DMA.
3083 */
3084 priv->cfg->ops->lib->apm_ops.stop(priv);
3085
3086 pci_save_state(pdev);
3087 pci_disable_device(pdev);
3088 pci_set_power_state(pdev, PCI_D3hot);
3089
3090 return 0;
3091}
3092EXPORT_SYMBOL(iwl_pci_suspend);
3093
3094int iwl_pci_resume(struct pci_dev *pdev)
3095{
3096 struct iwl_priv *priv = pci_get_drvdata(pdev);
3097 int ret;
3098
3099 pci_set_power_state(pdev, PCI_D0);
3100 ret = pci_enable_device(pdev);
3101 if (ret)
3102 return ret;
3103 pci_restore_state(pdev);
3104 iwl_enable_interrupts(priv);
3105
3106 return 0;
3107}
3108EXPORT_SYMBOL(iwl_pci_resume);
3109
3110#endif /* CONFIG_PM */
Linux kernel - Deliverables
This page took 0.47576 seconds and 5 git commands to generate.