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cfg80211: Process regulatory max bandwidth checks for HT40
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
01f8162a 5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
1d0a082d 32#include <net/mac80211.h>
df48c323 33
6bc913bd 34#include "iwl-eeprom.h"
3e0d4cb1 35#include "iwl-dev.h" /* FIXME: remove */
19335774 36#include "iwl-debug.h"
df48c323 37#include "iwl-core.h"
b661c819 38#include "iwl-io.h"
ad97edd2 39#include "iwl-rfkill.h"
5da4b55f 40#include "iwl-power.h"
83dde8c9 41#include "iwl-sta.h"
df48c323 42
1d0a082d 43
df48c323
TW		 44MODULE_DESCRIPTION("iwl core");
45MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 46MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 47MODULE_LICENSE("GPL");
df48c323 48
c7de35cd
RR		 49#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
61
62/*
63 * Parameter order:
64 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
65 *
66 * If there isn't a valid next or previous rate then INV is used which
67 * maps to IWL_RATE_INVALID
68 *
69 */
1826dcc0 70const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 71 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
72 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
73 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
74 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
75 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
76 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
77 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
78 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
79 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
80 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
81 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
82 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
83 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
84 /* FIXME:RS: ^^ should be INV (legacy) */
85};
1826dcc0 86EXPORT_SYMBOL(iwl_rates);
c7de35cd 87
e7d326ac
TW		 88/**
89 * translate ucode response to mac80211 tx status control values
90 */
91void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
e6a9854b 92 struct ieee80211_tx_info *info)
e7d326ac
TW		 93{
94 int rate_index;
e6a9854b 95 struct ieee80211_tx_rate *r = &info->control.rates[0];
e7d326ac 96
e6a9854b 97 info->antenna_sel_tx =
e7d326ac
TW		 98 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
99 if (rate_n_flags & RATE_MCS_HT_MSK)
e6a9854b 100 r->flags |= IEEE80211_TX_RC_MCS;
e7d326ac 101 if (rate_n_flags & RATE_MCS_GF_MSK)
e6a9854b 102 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
e7d326ac 103 if (rate_n_flags & RATE_MCS_FAT_MSK)
e6a9854b 104 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
e7d326ac 105 if (rate_n_flags & RATE_MCS_DUP_MSK)
e6a9854b 106 r->flags |= IEEE80211_TX_RC_DUP_DATA;
e7d326ac 107 if (rate_n_flags & RATE_MCS_SGI_MSK)
e6a9854b 108 r->flags |= IEEE80211_TX_RC_SHORT_GI;
e7d326ac 109 rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
e6a9854b 110 if (info->band == IEEE80211_BAND_5GHZ)
e7d326ac 111 rate_index -= IWL_FIRST_OFDM_RATE;
e6a9854b 112 r->idx = rate_index;
e7d326ac
TW		 113}
114EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
115
116int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
117{
118 int idx = 0;
119
120 /* HT rate format */
121 if (rate_n_flags & RATE_MCS_HT_MSK) {
122 idx = (rate_n_flags & 0xff);
123
60d32215
DH		 124 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
125 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
126 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 127 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
128
129 idx += IWL_FIRST_OFDM_RATE;
130 /* skip 9M not supported in ht*/
131 if (idx >= IWL_RATE_9M_INDEX)
132 idx += 1;
133 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
134 return idx;
135
136 /* legacy rate format, search for match in table */
137 } else {
138 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
139 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
140 return idx;
141 }
142
143 return -1;
144}
145EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
146
76eff18b
TW		 147u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
148{
149 int i;
150 u8 ind = ant;
151 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
152 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
153 if (priv->hw_params.valid_tx_ant & BIT(ind))
154 return ind;
155 }
156 return ant;
157}
57bd1bea
TW		 158
159const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
160EXPORT_SYMBOL(iwl_bcast_addr);
161
162
1d0a082d
AK		 163/* This function both allocates and initializes hw and priv. */
164struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
165 struct ieee80211_ops *hw_ops)
166{
167 struct iwl_priv *priv;
168
169 /* mac80211 allocates memory for this device instance, including
170 * space for this driver's private structure */
171 struct ieee80211_hw *hw =
172 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
173 if (hw == NULL) {
a3139c59
SO		 174 printk(KERN_ERR "%s: Can not allocate network device\n",
175 cfg->name);
1d0a082d
AK		 176 goto out;
177 }
178
179 priv = hw->priv;
180 priv->hw = hw;
181
182out:
183 return hw;
184}
185EXPORT_SYMBOL(iwl_alloc_all);
186
b661c819
TW		 187void iwl_hw_detect(struct iwl_priv *priv)
188{
189 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
190 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
191 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
192}
193EXPORT_SYMBOL(iwl_hw_detect);
194
1053d35f
RR		 195int iwl_hw_nic_init(struct iwl_priv *priv)
196{
197 unsigned long flags;
198 struct iwl_rx_queue *rxq = &priv->rxq;
199 int ret;
200
201 /* nic_init */
1053d35f 202 spin_lock_irqsave(&priv->lock, flags);
1b73af82 203 priv->cfg->ops->lib->apm_ops.init(priv);
1053d35f
RR		 204 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
205 spin_unlock_irqrestore(&priv->lock, flags);
206
207 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
208
209 priv->cfg->ops->lib->apm_ops.config(priv);
210
211 /* Allocate the RX queue, or reset if it is already allocated */
212 if (!rxq->bd) {
213 ret = iwl_rx_queue_alloc(priv);
214 if (ret) {
15b1687c 215 IWL_ERR(priv, "Unable to initialize Rx queue\n");
1053d35f
RR		 216 return -ENOMEM;
217 }
218 } else
219 iwl_rx_queue_reset(priv, rxq);
220
221 iwl_rx_replenish(priv);
222
223 iwl_rx_init(priv, rxq);
224
225 spin_lock_irqsave(&priv->lock, flags);
226
227 rxq->need_update = 1;
228 iwl_rx_queue_update_write_ptr(priv, rxq);
229
230 spin_unlock_irqrestore(&priv->lock, flags);
231
232 /* Allocate and init all Tx and Command queues */
233 ret = iwl_txq_ctx_reset(priv);
234 if (ret)
235 return ret;
236
237 set_bit(STATUS_INIT, &priv->status);
238
239 return 0;
240}
241EXPORT_SYMBOL(iwl_hw_nic_init);
242
14d2aac5
AK		 243/*
244 * QoS support
245*/
246void iwl_activate_qos(struct iwl_priv *priv, u8 force)
247{
248 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
249 return;
250
251 priv->qos_data.def_qos_parm.qos_flags = 0;
252
253 if (priv->qos_data.qos_cap.q_AP.queue_request &&
254 !priv->qos_data.qos_cap.q_AP.txop_request)
255 priv->qos_data.def_qos_parm.qos_flags |=
256 QOS_PARAM_FLG_TXOP_TYPE_MSK;
257 if (priv->qos_data.qos_active)
258 priv->qos_data.def_qos_parm.qos_flags |=
259 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
260
261 if (priv->current_ht_config.is_ht)
262 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
263
264 if (force || iwl_is_associated(priv)) {
265 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
266 priv->qos_data.qos_active,
267 priv->qos_data.def_qos_parm.qos_flags);
268
269 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
270 sizeof(struct iwl_qosparam_cmd),
271 &priv->qos_data.def_qos_parm, NULL);
272 }
273}
274EXPORT_SYMBOL(iwl_activate_qos);
275
f2c95b04
WYG		 276/*
277 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
278 * (802.11b) (802.11a/g)
279 * AC_BK 15 1023 7 0 0
280 * AC_BE 15 1023 3 0 0
281 * AC_VI 7 15 2 6.016ms 3.008ms
282 * AC_VO 3 7 2 3.264ms 1.504ms
283 */
c7de35cd 284void iwl_reset_qos(struct iwl_priv *priv)
bf85ea4f
AK		 285{
286 u16 cw_min = 15;
287 u16 cw_max = 1023;
288 u8 aifs = 2;
30dab79e 289 bool is_legacy = false;
bf85ea4f
AK		 290 unsigned long flags;
291 int i;
292
293 spin_lock_irqsave(&priv->lock, flags);
30dab79e
WT		 294 /* QoS always active in AP and ADHOC mode
295 * In STA mode wait for association
296 */
297 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
298 priv->iw_mode == NL80211_IFTYPE_AP)
299 priv->qos_data.qos_active = 1;
300 else
301 priv->qos_data.qos_active = 0;
bf85ea4f 302
30dab79e
WT		 303 /* check for legacy mode */
304 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
305 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
306 (priv->iw_mode == NL80211_IFTYPE_STATION &&
307 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
bf85ea4f
AK		 308 cw_min = 31;
309 is_legacy = 1;
310 }
311
312 if (priv->qos_data.qos_active)
313 aifs = 3;
314
f2c95b04 315 /* AC_BE */
bf85ea4f
AK		 316 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
317 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
318 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
319 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
320 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
321
322 if (priv->qos_data.qos_active) {
f2c95b04 323 /* AC_BK */
bf85ea4f
AK		 324 i = 1;
325 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
326 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
327 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
328 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
329 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
330
f2c95b04 331 /* AC_VI */
bf85ea4f
AK		 332 i = 2;
333 priv->qos_data.def_qos_parm.ac[i].cw_min =
334 cpu_to_le16((cw_min + 1) / 2 - 1);
335 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 336 cpu_to_le16(cw_min);
bf85ea4f
AK		 337 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
338 if (is_legacy)
339 priv->qos_data.def_qos_parm.ac[i].edca_txop =
340 cpu_to_le16(6016);
341 else
342 priv->qos_data.def_qos_parm.ac[i].edca_txop =
343 cpu_to_le16(3008);
344 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
345
f2c95b04 346 /* AC_VO */
bf85ea4f
AK		 347 i = 3;
348 priv->qos_data.def_qos_parm.ac[i].cw_min =
349 cpu_to_le16((cw_min + 1) / 4 - 1);
350 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 351 cpu_to_le16((cw_min + 1) / 2 - 1);
bf85ea4f
AK		 352 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
353 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
354 if (is_legacy)
355 priv->qos_data.def_qos_parm.ac[i].edca_txop =
356 cpu_to_le16(3264);
357 else
358 priv->qos_data.def_qos_parm.ac[i].edca_txop =
359 cpu_to_le16(1504);
360 } else {
361 for (i = 1; i < 4; i++) {
362 priv->qos_data.def_qos_parm.ac[i].cw_min =
363 cpu_to_le16(cw_min);
364 priv->qos_data.def_qos_parm.ac[i].cw_max =
365 cpu_to_le16(cw_max);
366 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
367 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
368 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
369 }
370 }
e1623446 371 IWL_DEBUG_QOS(priv, "set QoS to default \n");
bf85ea4f
AK		 372
373 spin_unlock_irqrestore(&priv->lock, flags);
374}
c7de35cd
RR		 375EXPORT_SYMBOL(iwl_reset_qos);
376
d9fe60de
JB		 377#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
378#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 379static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 380 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 381 enum ieee80211_band band)
382{
39130df3
RR		 383 u16 max_bit_rate = 0;
384 u8 rx_chains_num = priv->hw_params.rx_chains_num;
385 u8 tx_chains_num = priv->hw_params.tx_chains_num;
386
c7de35cd 387 ht_info->cap = 0;
d9fe60de 388 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 389
d9fe60de 390 ht_info->ht_supported = true;
c7de35cd 391
d9fe60de
JB		 392 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
393 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
394 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
00c5ae2f 395 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
39130df3
RR		 396
397 max_bit_rate = MAX_BIT_RATE_20_MHZ;
c7de35cd 398 if (priv->hw_params.fat_channel & BIT(band)) {
d9fe60de
JB		 399 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
400 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
401 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 402 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 403 }
c7de35cd
RR		 404
405 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 406 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 407
408 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
409 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
410
d9fe60de 411 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 412 if (rx_chains_num >= 2)
d9fe60de 413 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 414 if (rx_chains_num >= 3)
d9fe60de 415 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 416
417 /* Highest supported Rx data rate */
418 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 419 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
420 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 421
422 /* Tx MCS capabilities */
d9fe60de 423 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 424 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 425 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
426 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
427 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 428 }
c7de35cd 429}
c7de35cd
RR		 430
431static void iwlcore_init_hw_rates(struct iwl_priv *priv,
432 struct ieee80211_rate *rates)
433{
434 int i;
435
436 for (i = 0; i < IWL_RATE_COUNT; i++) {
1826dcc0 437 rates[i].bitrate = iwl_rates[i].ieee * 5;
c7de35cd
RR		 438 rates[i].hw_value = i; /* Rate scaling will work on indexes */
439 rates[i].hw_value_short = i;
440 rates[i].flags = 0;
441 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
442 /*
443 * If CCK != 1M then set short preamble rate flag.
444 */
445 rates[i].flags |=
1826dcc0 446 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
c7de35cd
RR		 447 0 : IEEE80211_RATE_SHORT_PREAMBLE;
448 }
449 }
450}
451
8ccde88a 452
c7de35cd
RR		 453/**
454 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
455 */
534166de 456int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 457{
458 struct iwl_channel_info *ch;
459 struct ieee80211_supported_band *sband;
460 struct ieee80211_channel *channels;
461 struct ieee80211_channel *geo_ch;
462 struct ieee80211_rate *rates;
463 int i = 0;
464
465 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
466 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 467 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 468 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
469 return 0;
470 }
471
472 channels = kzalloc(sizeof(struct ieee80211_channel) *
473 priv->channel_count, GFP_KERNEL);
474 if (!channels)
475 return -ENOMEM;
476
477 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
478 GFP_KERNEL);
479 if (!rates) {
480 kfree(channels);
481 return -ENOMEM;
482 }
483
484 /* 5.2GHz channels start after the 2.4GHz channels */
485 sband = &priv->bands[IEEE80211_BAND_5GHZ];
486 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
487 /* just OFDM */
488 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
489 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
490
49779293 491 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 492 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 493 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 494
495 sband = &priv->bands[IEEE80211_BAND_2GHZ];
496 sband->channels = channels;
497 /* OFDM & CCK */
498 sband->bitrates = rates;
499 sband->n_bitrates = IWL_RATE_COUNT;
500
49779293 501 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 502 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 503 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 504
505 priv->ieee_channels = channels;
506 priv->ieee_rates = rates;
507
c7de35cd
RR		 508 for (i = 0; i < priv->channel_count; i++) {
509 ch = &priv->channel_info[i];
510
511 /* FIXME: might be removed if scan is OK */
512 if (!is_channel_valid(ch))
513 continue;
514
515 if (is_channel_a_band(ch))
516 sband = &priv->bands[IEEE80211_BAND_5GHZ];
517 else
518 sband = &priv->bands[IEEE80211_BAND_2GHZ];
519
520 geo_ch = &sband->channels[sband->n_channels++];
521
522 geo_ch->center_freq =
523 ieee80211_channel_to_frequency(ch->channel);
524 geo_ch->max_power = ch->max_power_avg;
525 geo_ch->max_antenna_gain = 0xff;
526 geo_ch->hw_value = ch->channel;
527
528 if (is_channel_valid(ch)) {
529 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
530 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
531
532 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
533 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
534
535 if (ch->flags & EEPROM_CHANNEL_RADAR)
536 geo_ch->flags |= IEEE80211_CHAN_RADAR;
537
963f5517 538 geo_ch->flags |= ch->fat_extension_channel;
4d38c2e8 539
630fe9b6
TW		 540 if (ch->max_power_avg > priv->tx_power_channel_lmt)
541 priv->tx_power_channel_lmt = ch->max_power_avg;
c7de35cd
RR		 542 } else {
543 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
544 }
545
546 /* Save flags for reg domain usage */
547 geo_ch->orig_flags = geo_ch->flags;
548
e1623446 549 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 550 ch->channel, geo_ch->center_freq,
551 is_channel_a_band(ch) ? "5.2" : "2.4",
552 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
553 "restricted" : "valid",
554 geo_ch->flags);
555 }
556
557 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
558 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 559 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
560 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 561 priv->pci_dev->device,
562 priv->pci_dev->subsystem_device);
c7de35cd
RR		 563 priv->cfg->sku &= ~IWL_SKU_A;
564 }
565
978785a3 566 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 567 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
568 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 569
570 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
571
572 return 0;
573}
534166de 574EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 575
576/*
577 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
578 */
534166de 579void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 580{
581 kfree(priv->ieee_channels);
582 kfree(priv->ieee_rates);
583 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
584}
534166de 585EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 586
28a6b07a 587static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd
RR		 588{
589 return !priv->current_ht_config.is_ht ||
d9fe60de
JB		 590 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
591 (priv->current_ht_config.mcs.rx_mask[2] == 0));
c7de35cd 592}
963f5517 593
47c5196e
TW		 594static u8 iwl_is_channel_extension(struct iwl_priv *priv,
595 enum ieee80211_band band,
596 u16 channel, u8 extension_chan_offset)
597{
598 const struct iwl_channel_info *ch_info;
599
600 ch_info = iwl_get_channel_info(priv, band, channel);
601 if (!is_channel_valid(ch_info))
602 return 0;
603
d9fe60de 604 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
963f5517
EG		 605 return !(ch_info->fat_extension_channel &
606 IEEE80211_CHAN_NO_FAT_ABOVE);
d9fe60de 607 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
963f5517
EG		 608 return !(ch_info->fat_extension_channel &
609 IEEE80211_CHAN_NO_FAT_BELOW);
47c5196e
TW		 610
611 return 0;
612}
613
614u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
d9fe60de 615 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e
TW		 616{
617 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
618
619 if ((!iwl_ht_conf->is_ht) ||
620 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
d9fe60de 621 (iwl_ht_conf->extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE))
47c5196e
TW		 622 return 0;
623
624 if (sta_ht_inf) {
625 if ((!sta_ht_inf->ht_supported) ||
d9fe60de 626 (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)))
47c5196e
TW		 627 return 0;
628 }
629
630 return iwl_is_channel_extension(priv, priv->band,
ae5eb026
JB		 631 le16_to_cpu(priv->staging_rxon.channel),
632 iwl_ht_conf->extension_chan_offset);
47c5196e
TW		 633}
634EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
635
8ccde88a
SO		 636void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
637{
638 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
639
640 if (hw_decrypt)
641 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
642 else
643 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
644
645}
646EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
647
648/**
649 * iwl_check_rxon_cmd - validate RXON structure is valid
650 *
651 * NOTE: This is really only useful during development and can eventually
652 * be #ifdef'd out once the driver is stable and folks aren't actively
653 * making changes
654 */
655int iwl_check_rxon_cmd(struct iwl_priv *priv)
656{
657 int error = 0;
658 int counter = 1;
659 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
660
661 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
662 error |= le32_to_cpu(rxon->flags &
663 (RXON_FLG_TGJ_NARROW_BAND_MSK |
664 RXON_FLG_RADAR_DETECT_MSK));
665 if (error)
666 IWL_WARN(priv, "check 24G fields %d | %d\n",
667 counter++, error);
668 } else {
669 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
670 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
671 if (error)
672 IWL_WARN(priv, "check 52 fields %d | %d\n",
673 counter++, error);
674 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
675 if (error)
676 IWL_WARN(priv, "check 52 CCK %d | %d\n",
677 counter++, error);
678 }
679 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
680 if (error)
681 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
682
683 /* make sure basic rates 6Mbps and 1Mbps are supported */
684 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
685 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
686 if (error)
687 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
688
689 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
690 if (error)
691 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
692
693 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
694 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
695 if (error)
696 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
697 counter++, error);
698
699 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
700 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
701 if (error)
702 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
703 counter++, error);
704
705 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
706 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
707 if (error)
708 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
709 counter++, error);
710
711 if (error)
712 IWL_WARN(priv, "Tuning to channel %d\n",
713 le16_to_cpu(rxon->channel));
714
715 if (error) {
716 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
717 return -1;
718 }
719 return 0;
720}
721EXPORT_SYMBOL(iwl_check_rxon_cmd);
722
723/**
724 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
725 * @priv: staging_rxon is compared to active_rxon
726 *
727 * If the RXON structure is changing enough to require a new tune,
728 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
729 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
730 */
731int iwl_full_rxon_required(struct iwl_priv *priv)
732{
733
734 /* These items are only settable from the full RXON command */
735 if (!(iwl_is_associated(priv)) ||
736 compare_ether_addr(priv->staging_rxon.bssid_addr,
737 priv->active_rxon.bssid_addr) ||
738 compare_ether_addr(priv->staging_rxon.node_addr,
739 priv->active_rxon.node_addr) ||
740 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
741 priv->active_rxon.wlap_bssid_addr) ||
742 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
743 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
744 (priv->staging_rxon.air_propagation !=
745 priv->active_rxon.air_propagation) ||
746 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
747 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
748 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
749 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 750 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
751 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 752 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
753 return 1;
754
755 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
756 * be updated with the RXON_ASSOC command -- however only some
757 * flag transitions are allowed using RXON_ASSOC */
758
759 /* Check if we are not switching bands */
760 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
761 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
762 return 1;
763
764 /* Check if we are switching association toggle */
765 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
766 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
767 return 1;
768
769 return 0;
770}
771EXPORT_SYMBOL(iwl_full_rxon_required);
772
773u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
774{
775 int i;
776 int rate_mask;
777
778 /* Set rate mask*/
779 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
780 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
781 else
782 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
783
784 /* Find lowest valid rate */
785 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
786 i = iwl_rates[i].next_ieee) {
787 if (rate_mask & (1 << i))
788 return iwl_rates[i].plcp;
789 }
790
791 /* No valid rate was found. Assign the lowest one */
792 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
793 return IWL_RATE_1M_PLCP;
794 else
795 return IWL_RATE_6M_PLCP;
796}
797EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
798
47c5196e
TW		 799void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
800{
c1adf9fb 801 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e
TW		 802 u32 val;
803
42eb7c64
EG		 804 if (!ht_info->is_ht) {
805 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
806 RXON_FLG_CHANNEL_MODE_PURE_40_MSK |
807 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
808 RXON_FLG_FAT_PROT_MSK |
809 RXON_FLG_HT_PROT_MSK);
47c5196e 810 return;
42eb7c64 811 }
47c5196e
TW		 812
813 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
814 if (iwl_is_fat_tx_allowed(priv, NULL))
815 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
816 else
817 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
818 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
819
47c5196e
TW		 820 /* Note: control channel is opposite of extension channel */
821 switch (ht_info->extension_chan_offset) {
d9fe60de 822 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
47c5196e
TW		 823 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
824 break;
d9fe60de 825 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
47c5196e
TW		 826 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
827 break;
d9fe60de 828 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
47c5196e
TW		 829 default:
830 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
831 break;
832 }
833
834 val = ht_info->ht_protection;
835
836 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
837
45823531
AK		 838 if (priv->cfg->ops->hcmd->set_rxon_chain)
839 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 840
e1623446 841 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
47c5196e 842 "rxon flags 0x%X operation mode :0x%X "
ae5eb026 843 "extension channel offset 0x%x\n",
d9fe60de
JB		 844 ht_info->mcs.rx_mask[0],
845 ht_info->mcs.rx_mask[1],
846 ht_info->mcs.rx_mask[2],
47c5196e 847 le32_to_cpu(rxon->flags), ht_info->ht_protection,
ae5eb026 848 ht_info->extension_chan_offset);
47c5196e
TW		 849 return;
850}
851EXPORT_SYMBOL(iwl_set_rxon_ht);
852
9e5e6c32
TW		 853#define IWL_NUM_RX_CHAINS_MULTIPLE 3
854#define IWL_NUM_RX_CHAINS_SINGLE 2
855#define IWL_NUM_IDLE_CHAINS_DUAL 2
856#define IWL_NUM_IDLE_CHAINS_SINGLE 1
857
858/* Determine how many receiver/antenna chains to use.
c7de35cd
RR		 859 * More provides better reception via diversity. Fewer saves power.
860 * MIMO (dual stream) requires at least 2, but works better with 3.
861 * This does not determine *which* chains to use, just how many.
862 */
28a6b07a 863static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 864{
28a6b07a
TW		 865 bool is_single = is_single_rx_stream(priv);
866 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
c7de35cd
RR		 867
868 /* # of Rx chains to use when expecting MIMO. */
12837be1
RR		 869 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
870 WLAN_HT_CAP_SM_PS_STATIC)))
9e5e6c32 871 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 872 else
9e5e6c32 873 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 874}
c7de35cd 875
28a6b07a
TW		 876static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
877{
878 int idle_cnt;
879 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
c7de35cd 880 /* # Rx chains when idling and maybe trying to save power */
12837be1 881 switch (priv->current_ht_config.sm_ps) {
00c5ae2f
TW		 882 case WLAN_HT_CAP_SM_PS_STATIC:
883 case WLAN_HT_CAP_SM_PS_DYNAMIC:
9e5e6c32
TW		 884 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
885 IWL_NUM_IDLE_CHAINS_SINGLE;
c7de35cd 886 break;
00c5ae2f 887 case WLAN_HT_CAP_SM_PS_DISABLED:
9e5e6c32 888 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
c7de35cd 889 break;
00c5ae2f 890 case WLAN_HT_CAP_SM_PS_INVALID:
c7de35cd 891 default:
15b1687c 892 IWL_ERR(priv, "invalid mimo ps mode %d\n",
12837be1 893 priv->current_ht_config.sm_ps);
28a6b07a
TW		 894 WARN_ON(1);
895 idle_cnt = -1;
c7de35cd
RR		 896 break;
897 }
28a6b07a 898 return idle_cnt;
c7de35cd
RR		 899}
900
04816448
GE		 901/* up to 4 chains */
902static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
903{
904 u8 res;
905 res = (chain_bitmap & BIT(0)) >> 0;
906 res += (chain_bitmap & BIT(1)) >> 1;
907 res += (chain_bitmap & BIT(2)) >> 2;
908 res += (chain_bitmap & BIT(4)) >> 4;
909 return res;
910}
911
4c4df78f
CR		 912/**
913 * iwl_is_monitor_mode - Determine if interface in monitor mode
914 *
915 * priv->iw_mode is set in add_interface, but add_interface is
916 * never called for monitor mode. The only way mac80211 informs us about
917 * monitor mode is through configuring filters (call to configure_filter).
918 */
279b05d4 919bool iwl_is_monitor_mode(struct iwl_priv *priv)
4c4df78f
CR		 920{
921 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
922}
279b05d4 923EXPORT_SYMBOL(iwl_is_monitor_mode);
4c4df78f 924
c7de35cd
RR		 925/**
926 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
927 *
928 * Selects how many and which Rx receivers/antennas/chains to use.
929 * This should not be used for scan command ... it puts data in wrong place.
930 */
931void iwl_set_rxon_chain(struct iwl_priv *priv)
932{
28a6b07a
TW		 933 bool is_single = is_single_rx_stream(priv);
934 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 935 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
936 u32 active_chains;
28a6b07a 937 u16 rx_chain;
c7de35cd
RR		 938
939 /* Tell uCode which antennas are actually connected.
940 * Before first association, we assume all antennas are connected.
941 * Just after first association, iwl_chain_noise_calibration()
942 * checks which antennas actually *are* connected. */
04816448
GE		 943 if (priv->chain_noise_data.active_chains)
944 active_chains = priv->chain_noise_data.active_chains;
945 else
946 active_chains = priv->hw_params.valid_rx_ant;
947
948 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 949
950 /* How many receivers should we use? */
28a6b07a
TW		 951 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
952 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
953
28a6b07a 954
04816448
GE		 955 /* correct rx chain count according hw settings
956 * and chain noise calibration
957 */
958 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
959 if (valid_rx_cnt < active_rx_cnt)
960 active_rx_cnt = valid_rx_cnt;
961
962 if (valid_rx_cnt < idle_rx_cnt)
963 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 964
965 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
966 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
967
7b841727
RF		 968 /* copied from 'iwl_bg_request_scan()' */
969 /* Force use of chains B and C (0x6) for Rx for 4965
970 * Avoid A (0x1) because of its off-channel reception on A-band.
971 * MIMO is not used here, but value is required */
972 if (iwl_is_monitor_mode(priv) &&
973 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
974 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
fff7a434
WYG		 975 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
976 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
977 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
978 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
7b841727
RF		 979 }
980
28a6b07a
TW		 981 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
982
9e5e6c32 983 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 984 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
985 else
986 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
987
e1623446 988 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 989 priv->staging_rxon.rx_chain,
990 active_rx_cnt, idle_rx_cnt);
991
992 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
993 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 994}
995EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 996
997/**
17e72782 998 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 999 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1000 * @channel: Any channel valid for the requested phymode
1001
1002 * In addition to setting the staging RXON, priv->phymode is also set.
1003 *
1004 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1005 * in the staging RXON flag structure based on the phymode
1006 */
17e72782 1007int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 1008{
17e72782
TW		 1009 enum ieee80211_band band = ch->band;
1010 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1011
8622e705 1012 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 1013 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 1014 channel, band);
1015 return -EINVAL;
1016 }
1017
1018 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1019 (priv->band == band))
1020 return 0;
1021
1022 priv->staging_rxon.channel = cpu_to_le16(channel);
1023 if (band == IEEE80211_BAND_5GHZ)
1024 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1025 else
1026 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1027
1028 priv->band = band;
1029
e1623446 1030 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 1031
1032 return 0;
1033}
c7de35cd 1034EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 1035
8ccde88a
SO		 1036void iwl_set_flags_for_band(struct iwl_priv *priv,
1037 enum ieee80211_band band)
1038{
1039 if (band == IEEE80211_BAND_5GHZ) {
1040 priv->staging_rxon.flags &=
1041 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1042 | RXON_FLG_CCK_MSK);
1043 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1044 } else {
1045 /* Copied from iwl_post_associate() */
1046 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1047 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1048 else
1049 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1050
1051 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1052 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1053
1054 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1055 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1056 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1057 }
1058}
1059EXPORT_SYMBOL(iwl_set_flags_for_band);
1060
1061/*
1062 * initialize rxon structure with default values from eeprom
1063 */
1064void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1065{
1066 const struct iwl_channel_info *ch_info;
1067
1068 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1069
1070 switch (mode) {
1071 case NL80211_IFTYPE_AP:
1072 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1073 break;
1074
1075 case NL80211_IFTYPE_STATION:
1076 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1077 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1078 break;
1079
1080 case NL80211_IFTYPE_ADHOC:
1081 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1082 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1083 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1084 RXON_FILTER_ACCEPT_GRP_MSK;
1085 break;
1086
8ccde88a
SO		 1087 default:
1088 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1089 break;
1090 }
1091
1092#if 0
1093 /* TODO: Figure out when short_preamble would be set and cache from
1094 * that */
1095 if (!hw_to_local(priv->hw)->short_preamble)
1096 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1097 else
1098 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1099#endif
1100
1101 ch_info = iwl_get_channel_info(priv, priv->band,
1102 le16_to_cpu(priv->active_rxon.channel));
1103
1104 if (!ch_info)
1105 ch_info = &priv->channel_info[0];
1106
1107 /*
1108 * in some case A channels are all non IBSS
1109 * in this case force B/G channel
1110 */
1111 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1112 !(is_channel_ibss(ch_info)))
1113 ch_info = &priv->channel_info[0];
1114
1115 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1116 priv->band = ch_info->band;
1117
1118 iwl_set_flags_for_band(priv, priv->band);
1119
1120 priv->staging_rxon.ofdm_basic_rates =
1121 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1122 priv->staging_rxon.cck_basic_rates =
1123 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1124
1125 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
1126 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
1127 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1128 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1129 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1130 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1131 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1132}
1133EXPORT_SYMBOL(iwl_connection_init_rx_config);
1134
782571f4 1135static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1136{
1137 const struct ieee80211_supported_band *hw = NULL;
1138 struct ieee80211_rate *rate;
1139 int i;
1140
1141 hw = iwl_get_hw_mode(priv, priv->band);
1142 if (!hw) {
1143 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1144 return;
1145 }
1146
1147 priv->active_rate = 0;
1148 priv->active_rate_basic = 0;
1149
1150 for (i = 0; i < hw->n_bitrates; i++) {
1151 rate = &(hw->bitrates[i]);
1152 if (rate->hw_value < IWL_RATE_COUNT)
1153 priv->active_rate |= (1 << rate->hw_value);
1154 }
1155
e1623446 1156 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
8ccde88a
SO		 1157 priv->active_rate, priv->active_rate_basic);
1158
1159 /*
1160 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1161 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1162 * OFDM
1163 */
1164 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1165 priv->staging_rxon.cck_basic_rates =
1166 ((priv->active_rate_basic &
1167 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1168 else
1169 priv->staging_rxon.cck_basic_rates =
1170 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1171
1172 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1173 priv->staging_rxon.ofdm_basic_rates =
1174 ((priv->active_rate_basic &
1175 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1176 IWL_FIRST_OFDM_RATE) & 0xFF;
1177 else
1178 priv->staging_rxon.ofdm_basic_rates =
1179 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1180}
8ccde88a
SO		 1181
1182void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1183{
1184 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1185 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1186 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
e1623446 1187 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
8ccde88a
SO		 1188 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1189 rxon->channel = csa->channel;
1190 priv->staging_rxon.channel = csa->channel;
1191}
1192EXPORT_SYMBOL(iwl_rx_csa);
1193
1194#ifdef CONFIG_IWLWIFI_DEBUG
1195static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1196{
1197 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1198
e1623446 1199 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
8ccde88a 1200 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1201 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1202 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1203 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1204 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1205 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1206 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1207 rxon->ofdm_basic_rates);
e1623446
TW		 1208 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1209 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1210 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1211 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a
SO		 1212}
1213#endif
1214
1215/**
1216 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1217 */
1218void iwl_irq_handle_error(struct iwl_priv *priv)
1219{
1220 /* Set the FW error flag -- cleared on iwl_down */
1221 set_bit(STATUS_FW_ERROR, &priv->status);
1222
1223 /* Cancel currently queued command. */
1224 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1225
1226#ifdef CONFIG_IWLWIFI_DEBUG
1227 if (priv->debug_level & IWL_DL_FW_ERRORS) {
1228 iwl_dump_nic_error_log(priv);
1229 iwl_dump_nic_event_log(priv);
1230 iwl_print_rx_config_cmd(priv);
1231 }
1232#endif
1233
1234 wake_up_interruptible(&priv->wait_command_queue);
1235
1236 /* Keep the restart process from trying to send host
1237 * commands by clearing the INIT status bit */
1238 clear_bit(STATUS_READY, &priv->status);
1239
1240 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1241 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1242 "Restarting adapter due to uCode error.\n");
1243
8ccde88a
SO		 1244 if (priv->cfg->mod_params->restart_fw)
1245 queue_work(priv->workqueue, &priv->restart);
1246 }
1247}
1248EXPORT_SYMBOL(iwl_irq_handle_error);
1249
1250void iwl_configure_filter(struct ieee80211_hw *hw,
1251 unsigned int changed_flags,
1252 unsigned int *total_flags,
1253 int mc_count, struct dev_addr_list *mc_list)
1254{
1255 struct iwl_priv *priv = hw->priv;
1256 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1257
e1623446 1258 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1259 changed_flags, *total_flags);
1260
1261 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1262 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1263 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1264 else
1265 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1266 }
1267 if (changed_flags & FIF_ALLMULTI) {
1268 if (*total_flags & FIF_ALLMULTI)
1269 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1270 else
1271 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1272 }
1273 if (changed_flags & FIF_CONTROL) {
1274 if (*total_flags & FIF_CONTROL)
1275 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1276 else
1277 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1278 }
1279 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1280 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1281 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1282 else
1283 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1284 }
1285
1286 /* We avoid iwl_commit_rxon here to commit the new filter flags
1287 * since mac80211 will call ieee80211_hw_config immediately.
1288 * (mc_list is not supported at this time). Otherwise, we need to
1289 * queue a background iwl_commit_rxon work.
1290 */
1291
1292 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1293 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1294}
1295EXPORT_SYMBOL(iwl_configure_filter);
1296
6ba87956 1297int iwl_setup_mac(struct iwl_priv *priv)
bf85ea4f 1298{
6ba87956 1299 int ret;
bf85ea4f 1300 struct ieee80211_hw *hw = priv->hw;
e227ceac 1301 hw->rate_control_algorithm = "iwl-agn-rs";
bf85ea4f 1302
566bfe5a 1303 /* Tell mac80211 our characteristics */
605a0bd6 1304 hw->flags = IEEE80211_HW_SIGNAL_DBM |
8b30b1fe 1305 IEEE80211_HW_NOISE_DBM |
4be8c387 1306 IEEE80211_HW_AMPDU_AGGREGATION |
286d9490 1307 IEEE80211_HW_SPECTRUM_MGMT;
f59ac048 1308 hw->wiphy->interface_modes =
f59ac048
LR		 1309 BIT(NL80211_IFTYPE_STATION) |
1310 BIT(NL80211_IFTYPE_ADHOC);
ea4a82dc 1311
2a44f911 1312 hw->wiphy->custom_regulatory = true;
1ecf9fc1
JB		 1313
1314 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1315 /* we create the 802.11 header and a zero-length SSID element */
1316 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
ea4a82dc 1317
bf85ea4f
AK		 1318 /* Default value; 4 EDCA QOS priorities */
1319 hw->queues = 4;
6ba87956 1320
b5d7be5e 1321 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
6ba87956
TW		 1322
1323 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1324 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1325 &priv->bands[IEEE80211_BAND_2GHZ];
1326 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1327 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1328 &priv->bands[IEEE80211_BAND_5GHZ];
1329
1330 ret = ieee80211_register_hw(priv->hw);
1331 if (ret) {
15b1687c 1332 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
6ba87956
TW		 1333 return ret;
1334 }
1335 priv->mac80211_registered = 1;
1336
1337 return 0;
bf85ea4f 1338}
6ba87956 1339EXPORT_SYMBOL(iwl_setup_mac);
bf85ea4f 1340
da154e30
RR		 1341int iwl_set_hw_params(struct iwl_priv *priv)
1342{
1343 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
1344 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1345 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1346 if (priv->cfg->mod_params->amsdu_size_8K)
1347 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1348 else
1349 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1350 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1351
49779293
RR		 1352 if (priv->cfg->mod_params->disable_11n)
1353 priv->cfg->sku &= ~IWL_SKU_N;
1354
da154e30
RR		 1355 /* Device-specific setup */
1356 return priv->cfg->ops->lib->set_hw_params(priv);
1357}
1358EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956
TW		 1359
1360int iwl_init_drv(struct iwl_priv *priv)
c7de35cd
RR		 1361{
1362 int ret;
c7de35cd 1363
c7de35cd
RR		 1364 priv->ibss_beacon = NULL;
1365
1366 spin_lock_init(&priv->lock);
c7de35cd
RR		 1367 spin_lock_init(&priv->sta_lock);
1368 spin_lock_init(&priv->hcmd_lock);
c7de35cd 1369
c7de35cd
RR		 1370 INIT_LIST_HEAD(&priv->free_frames);
1371
1372 mutex_init(&priv->mutex);
1373
1374 /* Clear the driver's (not device's) station table */
e11bc028 1375 priv->cfg->ops->smgmt->clear_station_table(priv);
c7de35cd
RR		 1376
1377 priv->data_retry_limit = -1;
1378 priv->ieee_channels = NULL;
1379 priv->ieee_rates = NULL;
1380 priv->band = IEEE80211_BAND_2GHZ;
1381
05c914fe 1382 priv->iw_mode = NL80211_IFTYPE_STATION;
c7de35cd 1383
12837be1 1384 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
c7de35cd
RR		 1385
1386 /* Choose which receivers/antennas to use */
45823531
AK		 1387 if (priv->cfg->ops->hcmd->set_rxon_chain)
1388 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1389
f53696de 1390 iwl_init_scan_params(priv);
c7de35cd
RR		 1391
1392 iwl_reset_qos(priv);
1393
1394 priv->qos_data.qos_active = 0;
1395 priv->qos_data.qos_cap.val = 0;
1396
c7de35cd 1397 priv->rates_mask = IWL_RATES_MASK;
d25aabb0
WT		 1398 /* If power management is turned on, default to CAM mode */
1399 priv->power_mode = IWL_POWER_MODE_CAM;
630fe9b6 1400 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
c7de35cd
RR		 1401
1402 ret = iwl_init_channel_map(priv);
1403 if (ret) {
15b1687c 1404 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
c7de35cd
RR		 1405 goto err;
1406 }
1407
1408 ret = iwlcore_init_geos(priv);
1409 if (ret) {
15b1687c 1410 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
c7de35cd
RR		 1411 goto err_free_channel_map;
1412 }
534166de 1413 iwlcore_init_hw_rates(priv, priv->ieee_rates);
c7de35cd 1414
c7de35cd
RR		 1415 return 0;
1416
c7de35cd
RR		 1417err_free_channel_map:
1418 iwl_free_channel_map(priv);
1419err:
1420 return ret;
1421}
6ba87956 1422EXPORT_SYMBOL(iwl_init_drv);
c7de35cd 1423
630fe9b6
TW		 1424int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1425{
1426 int ret = 0;
1427 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
daf518de
WF		 1428 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1429 tx_power,
1430 IWL_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1431 return -EINVAL;
1432 }
1433
1434 if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
daf518de
WF		 1435 IWL_WARN(priv, "Requested user TXPOWER %d above upper limit %d.\n",
1436 tx_power,
1437 IWL_TX_POWER_TARGET_POWER_MAX);
630fe9b6
TW		 1438 return -EINVAL;
1439 }
1440
1441 if (priv->tx_power_user_lmt != tx_power)
1442 force = true;
1443
1444 priv->tx_power_user_lmt = tx_power;
1445
019fb97d
MA		 1446 /* if nic is not up don't send command */
1447 if (!iwl_is_ready_rf(priv))
1448 return ret;
1449
630fe9b6
TW		 1450 if (force && priv->cfg->ops->lib->send_tx_power)
1451 ret = priv->cfg->ops->lib->send_tx_power(priv);
1452
1453 return ret;
1454}
1455EXPORT_SYMBOL(iwl_set_tx_power);
1456
6ba87956 1457void iwl_uninit_drv(struct iwl_priv *priv)
bf85ea4f 1458{
6e21f2c1 1459 iwl_calib_free_results(priv);
6ba87956
TW		 1460 iwlcore_free_geos(priv);
1461 iwl_free_channel_map(priv);
261415f7 1462 kfree(priv->scan);
bf85ea4f 1463}
6ba87956 1464EXPORT_SYMBOL(iwl_uninit_drv);
bf85ea4f 1465
0ad91a35
WT		 1466
1467void iwl_disable_interrupts(struct iwl_priv *priv)
1468{
1469 clear_bit(STATUS_INT_ENABLED, &priv->status);
1470
1471 /* disable interrupts from uCode/NIC to host */
1472 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1473
1474 /* acknowledge/clear/reset any interrupts still pending
1475 * from uCode or flow handler (Rx/Tx DMA) */
1476 iwl_write32(priv, CSR_INT, 0xffffffff);
1477 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
e1623446 1478 IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
0ad91a35
WT		 1479}
1480EXPORT_SYMBOL(iwl_disable_interrupts);
1481
1482void iwl_enable_interrupts(struct iwl_priv *priv)
1483{
e1623446 1484 IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
0ad91a35
WT		 1485 set_bit(STATUS_INT_ENABLED, &priv->status);
1486 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
1487}
1488EXPORT_SYMBOL(iwl_enable_interrupts);
1489
f17d08a6
AK		 1490irqreturn_t iwl_isr(int irq, void *data)
1491{
1492 struct iwl_priv *priv = data;
1493 u32 inta, inta_mask;
1494 u32 inta_fh;
1495 if (!priv)
1496 return IRQ_NONE;
1497
1498 spin_lock(&priv->lock);
1499
1500 /* Disable (but don't clear!) interrupts here to avoid
1501 * back-to-back ISRs and sporadic interrupts from our NIC.
1502 * If we have something to service, the tasklet will re-enable ints.
1503 * If we *don't* have something, we'll re-enable before leaving here. */
1504 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1505 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1506
1507 /* Discover which interrupts are active/pending */
1508 inta = iwl_read32(priv, CSR_INT);
1509 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1510
1511 /* Ignore interrupt if there's nothing in NIC to service.
1512 * This may be due to IRQ shared with another device,
1513 * or due to sporadic interrupts thrown from our NIC. */
1514 if (!inta && !inta_fh) {
1515 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1516 goto none;
1517 }
1518
1519 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1520 /* Hardware disappeared. It might have already raised
1521 * an interrupt */
1522 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1523 goto unplugged;
1524 }
1525
1526 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1527 inta, inta_mask, inta_fh);
1528
1529 inta &= ~CSR_INT_BIT_SCD;
1530
1531 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1532 if (likely(inta || inta_fh))
1533 tasklet_schedule(&priv->irq_tasklet);
1534
1535 unplugged:
1536 spin_unlock(&priv->lock);
1537 return IRQ_HANDLED;
1538
1539 none:
1540 /* re-enable interrupts here since we don't have anything to service. */
1541 /* only Re-enable if diabled by irq */
1542 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1543 iwl_enable_interrupts(priv);
1544 spin_unlock(&priv->lock);
1545 return IRQ_NONE;
1546}
1547EXPORT_SYMBOL(iwl_isr);
1548
17f841cd
SO		 1549int iwl_send_bt_config(struct iwl_priv *priv)
1550{
1551 struct iwl_bt_cmd bt_cmd = {
1552 .flags = 3,
1553 .lead_time = 0xAA,
1554 .max_kill = 1,
1555 .kill_ack_mask = 0,
1556 .kill_cts_mask = 0,
1557 };
1558
1559 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1560 sizeof(struct iwl_bt_cmd), &bt_cmd);
1561}
1562EXPORT_SYMBOL(iwl_send_bt_config);
1563
49ea8596
EG		 1564int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
1565{
1566 u32 stat_flags = 0;
1567 struct iwl_host_cmd cmd = {
1568 .id = REPLY_STATISTICS_CMD,
1569 .meta.flags = flags,
1570 .len = sizeof(stat_flags),
1571 .data = (u8 *) &stat_flags,
1572 };
1573 return iwl_send_cmd(priv, &cmd);
1574}
1575EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1576
b0692f2f
EG		 1577/**
1578 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1579 * using sample data 100 bytes apart. If these sample points are good,
1580 * it's a pretty good bet that everything between them is good, too.
1581 */
1582static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1583{
1584 u32 val;
1585 int ret = 0;
1586 u32 errcnt = 0;
1587 u32 i;
1588
e1623446 1589 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f
EG		 1590
1591 ret = iwl_grab_nic_access(priv);
1592 if (ret)
1593 return ret;
1594
1595 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1596 /* read data comes through single port, auto-incr addr */
1597 /* NOTE: Use the debugless read so we don't flood kernel log
1598 * if IWL_DL_IO is set */
1599 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1600 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1601 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1602 if (val != le32_to_cpu(*image)) {
1603 ret = -EIO;
1604 errcnt++;
1605 if (errcnt >= 3)
1606 break;
1607 }
1608 }
1609
1610 iwl_release_nic_access(priv);
1611
1612 return ret;
1613}
1614
1615/**
1616 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1617 * looking at all data.
1618 */
1619static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1620 u32 len)
1621{
1622 u32 val;
1623 u32 save_len = len;
1624 int ret = 0;
1625 u32 errcnt;
1626
e1623446 1627 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f
EG		 1628
1629 ret = iwl_grab_nic_access(priv);
1630 if (ret)
1631 return ret;
1632
250bdd21
SO		 1633 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1634 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1635
1636 errcnt = 0;
1637 for (; len > 0; len -= sizeof(u32), image++) {
1638 /* read data comes through single port, auto-incr addr */
1639 /* NOTE: Use the debugless read so we don't flood kernel log
1640 * if IWL_DL_IO is set */
1641 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1642 if (val != le32_to_cpu(*image)) {
15b1687c 1643 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 1644 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1645 save_len - len, val, le32_to_cpu(*image));
1646 ret = -EIO;
1647 errcnt++;
1648 if (errcnt >= 20)
1649 break;
1650 }
1651 }
1652
1653 iwl_release_nic_access(priv);
1654
1655 if (!errcnt)
e1623446
TW		 1656 IWL_DEBUG_INFO(priv,
1657 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 1658
1659 return ret;
1660}
1661
1662/**
1663 * iwl_verify_ucode - determine which instruction image is in SRAM,
1664 * and verify its contents
1665 */
1666int iwl_verify_ucode(struct iwl_priv *priv)
1667{
1668 __le32 *image;
1669 u32 len;
1670 int ret;
1671
1672 /* Try bootstrap */
1673 image = (__le32 *)priv->ucode_boot.v_addr;
1674 len = priv->ucode_boot.len;
1675 ret = iwlcore_verify_inst_sparse(priv, image, len);
1676 if (!ret) {
e1623446 1677 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 1678 return 0;
1679 }
1680
1681 /* Try initialize */
1682 image = (__le32 *)priv->ucode_init.v_addr;
1683 len = priv->ucode_init.len;
1684 ret = iwlcore_verify_inst_sparse(priv, image, len);
1685 if (!ret) {
e1623446 1686 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 1687 return 0;
1688 }
1689
1690 /* Try runtime/protocol */
1691 image = (__le32 *)priv->ucode_code.v_addr;
1692 len = priv->ucode_code.len;
1693 ret = iwlcore_verify_inst_sparse(priv, image, len);
1694 if (!ret) {
e1623446 1695 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 1696 return 0;
1697 }
1698
15b1687c 1699 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 1700
1701 /* Since nothing seems to match, show first several data entries in
1702 * instruction SRAM, so maybe visual inspection will give a clue.
1703 * Selection of bootstrap image (vs. other images) is arbitrary. */
1704 image = (__le32 *)priv->ucode_boot.v_addr;
1705 len = priv->ucode_boot.len;
1706 ret = iwl_verify_inst_full(priv, image, len);
1707
1708 return ret;
1709}
1710EXPORT_SYMBOL(iwl_verify_ucode);
1711
56e12615
JS		 1712
1713static const char *desc_lookup_text[] = {
1714 "OK",
1715 "FAIL",
1716 "BAD_PARAM",
1717 "BAD_CHECKSUM",
1718 "NMI_INTERRUPT_WDG",
1719 "SYSASSERT",
1720 "FATAL_ERROR",
1721 "BAD_COMMAND",
1722 "HW_ERROR_TUNE_LOCK",
1723 "HW_ERROR_TEMPERATURE",
1724 "ILLEGAL_CHAN_FREQ",
1725 "VCC_NOT_STABLE",
1726 "FH_ERROR",
1727 "NMI_INTERRUPT_HOST",
1728 "NMI_INTERRUPT_ACTION_PT",
1729 "NMI_INTERRUPT_UNKNOWN",
1730 "UCODE_VERSION_MISMATCH",
1731 "HW_ERROR_ABS_LOCK",
1732 "HW_ERROR_CAL_LOCK_FAIL",
1733 "NMI_INTERRUPT_INST_ACTION_PT",
1734 "NMI_INTERRUPT_DATA_ACTION_PT",
1735 "NMI_TRM_HW_ER",
1736 "NMI_INTERRUPT_TRM",
1737 "NMI_INTERRUPT_BREAK_POINT"
1738 "DEBUG_0",
1739 "DEBUG_1",
1740 "DEBUG_2",
1741 "DEBUG_3",
1742 "UNKNOWN"
1743};
1744
ede0cba4
EK		 1745static const char *desc_lookup(int i)
1746{
56e12615
JS		 1747 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1748
1749 if (i < 0 || i > max)
1750 i = max;
ede0cba4 1751
56e12615 1752 return desc_lookup_text[i];
ede0cba4
EK		 1753}
1754
1755#define ERROR_START_OFFSET (1 * sizeof(u32))
1756#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1757
1758void iwl_dump_nic_error_log(struct iwl_priv *priv)
1759{
1760 u32 data2, line;
1761 u32 desc, time, count, base, data1;
1762 u32 blink1, blink2, ilink1, ilink2;
e1dfc085 1763 int ret;
ede0cba4 1764
e1dfc085
GG		 1765 if (priv->ucode_type == UCODE_INIT)
1766 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1767 else
1768 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
ede0cba4
EK		 1769
1770 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
15b1687c 1771 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
ede0cba4
EK		 1772 return;
1773 }
1774
e1dfc085
GG		 1775 ret = iwl_grab_nic_access(priv);
1776 if (ret) {
39aadf8c 1777 IWL_WARN(priv, "Can not read from adapter at this time.\n");
ede0cba4
EK		 1778 return;
1779 }
1780
1781 count = iwl_read_targ_mem(priv, base);
1782
1783 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT		 1784 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1785 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1786 priv->status, count);
ede0cba4
EK		 1787 }
1788
1789 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1790 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1791 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1792 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1793 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1794 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1795 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1796 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1797 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1798
15b1687c 1799 IWL_ERR(priv, "Desc Time "
ede0cba4 1800 "data1 data2 line\n");
15b1687c 1801 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
ede0cba4 1802 desc_lookup(desc), desc, time, data1, data2, line);
15b1687c
WT		 1803 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1804 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
ede0cba4
EK		 1805 ilink1, ilink2);
1806
1807 iwl_release_nic_access(priv);
1808}
1809EXPORT_SYMBOL(iwl_dump_nic_error_log);
1810
189a2b59
EK		 1811#define EVENT_START_OFFSET (4 * sizeof(u32))
1812
1813/**
1814 * iwl_print_event_log - Dump error event log to syslog
1815 *
a33c2f47 1816 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
189a2b59 1817 */
a33c2f47 1818static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
189a2b59
EK		 1819 u32 num_events, u32 mode)
1820{
1821 u32 i;
1822 u32 base; /* SRAM byte address of event log header */
1823 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1824 u32 ptr; /* SRAM byte address of log data */
1825 u32 ev, time, data; /* event log data */
1826
1827 if (num_events == 0)
1828 return;
e1dfc085
GG		 1829 if (priv->ucode_type == UCODE_INIT)
1830 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1831 else
1832 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
189a2b59
EK		 1833
1834 if (mode == 0)
1835 event_size = 2 * sizeof(u32);
1836 else
1837 event_size = 3 * sizeof(u32);
1838
1839 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1840
1841 /* "time" is actually "data" for mode 0 (no timestamp).
1842 * place event id # at far right for easier visual parsing. */
1843 for (i = 0; i < num_events; i++) {
1844 ev = iwl_read_targ_mem(priv, ptr);
1845 ptr += sizeof(u32);
1846 time = iwl_read_targ_mem(priv, ptr);
1847 ptr += sizeof(u32);
77c5d08e
TW		 1848 if (mode == 0) {
1849 /* data, ev */
15b1687c 1850 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
77c5d08e 1851 } else {
189a2b59
EK		 1852 data = iwl_read_targ_mem(priv, ptr);
1853 ptr += sizeof(u32);
15b1687c 1854 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
77c5d08e 1855 time, data, ev);
189a2b59
EK		 1856 }
1857 }
1858}
189a2b59
EK		 1859
1860void iwl_dump_nic_event_log(struct iwl_priv *priv)
1861{
e1dfc085 1862 int ret;
189a2b59
EK		 1863 u32 base; /* SRAM byte address of event log header */
1864 u32 capacity; /* event log capacity in # entries */
1865 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1866 u32 num_wraps; /* # times uCode wrapped to top of log */
1867 u32 next_entry; /* index of next entry to be written by uCode */
1868 u32 size; /* # entries that we'll print */
1869
e1dfc085
GG		 1870 if (priv->ucode_type == UCODE_INIT)
1871 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1872 else
1873 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1874
189a2b59 1875 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
15b1687c 1876 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
189a2b59
EK		 1877 return;
1878 }
1879
e1dfc085
GG		 1880 ret = iwl_grab_nic_access(priv);
1881 if (ret) {
39aadf8c 1882 IWL_WARN(priv, "Can not read from adapter at this time.\n");
189a2b59
EK		 1883 return;
1884 }
1885
1886 /* event log header */
1887 capacity = iwl_read_targ_mem(priv, base);
1888 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1889 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1890 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1891
1892 size = num_wraps ? capacity : next_entry;
1893
1894 /* bail out if nothing in log */
1895 if (size == 0) {
15b1687c 1896 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
189a2b59
EK		 1897 iwl_release_nic_access(priv);
1898 return;
1899 }
1900
15b1687c 1901 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
189a2b59
EK		 1902 size, num_wraps);
1903
1904 /* if uCode has wrapped back to top of log, start at the oldest entry,
1905 * i.e the next one that uCode would fill. */
1906 if (num_wraps)
1907 iwl_print_event_log(priv, next_entry,
1908 capacity - next_entry, mode);
1909 /* (then/else) start at top of log */
1910 iwl_print_event_log(priv, 0, next_entry, mode);
1911
1912 iwl_release_nic_access(priv);
1913}
1914EXPORT_SYMBOL(iwl_dump_nic_event_log);
1915
47f4a587
EG		 1916void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1917{
1918 struct iwl_ct_kill_config cmd;
1919 unsigned long flags;
1920 int ret = 0;
1921
1922 spin_lock_irqsave(&priv->lock, flags);
1923 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1924 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1925 spin_unlock_irqrestore(&priv->lock, flags);
1926
1927 cmd.critical_temperature_R =
1928 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1929
47f4a587
EG		 1930 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1931 sizeof(cmd), &cmd);
1932 if (ret)
15b1687c 1933 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
47f4a587 1934 else
e1623446 1935 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
47f4a587
EG		 1936 "critical temperature is %d\n",
1937 cmd.critical_temperature_R);
1938}
1939EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1940
0ad91a35 1941
14a08a7f
EG		 1942/*
1943 * CARD_STATE_CMD
1944 *
1945 * Use: Sets the device's internal card state to enable, disable, or halt
1946 *
1947 * When in the 'enable' state the card operates as normal.
1948 * When in the 'disable' state, the card enters into a low power mode.
1949 * When in the 'halt' state, the card is shut down and must be fully
1950 * restarted to come back on.
1951 */
c496294e 1952int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1953{
1954 struct iwl_host_cmd cmd = {
1955 .id = REPLY_CARD_STATE_CMD,
1956 .len = sizeof(u32),
1957 .data = &flags,
1958 .meta.flags = meta_flag,
1959 };
1960
1961 return iwl_send_cmd(priv, &cmd);
1962}
c496294e 1963EXPORT_SYMBOL(iwl_send_card_state);
14a08a7f
EG		 1964
1965void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv)
1966{
1967 unsigned long flags;
1968
1969 if (test_bit(STATUS_RF_KILL_SW, &priv->status))
1970 return;
1971
e1623446 1972 IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO OFF\n");
14a08a7f
EG		 1973
1974 iwl_scan_cancel(priv);
1975 /* FIXME: This is a workaround for AP */
05c914fe 1976 if (priv->iw_mode != NL80211_IFTYPE_AP) {
14a08a7f
EG		 1977 spin_lock_irqsave(&priv->lock, flags);
1978 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
1979 CSR_UCODE_SW_BIT_RFKILL);
1980 spin_unlock_irqrestore(&priv->lock, flags);
1981 /* call the host command only if no hw rf-kill set */
1982 if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
1983 iwl_is_ready(priv))
1984 iwl_send_card_state(priv,
1985 CARD_STATE_CMD_DISABLE, 0);
1986 set_bit(STATUS_RF_KILL_SW, &priv->status);
1987 /* make sure mac80211 stop sending Tx frame */
1988 if (priv->mac80211_registered)
1989 ieee80211_stop_queues(priv->hw);
1990 }
1991}
1992EXPORT_SYMBOL(iwl_radio_kill_sw_disable_radio);
1993
1994int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv)
1995{
1996 unsigned long flags;
1997
1998 if (!test_bit(STATUS_RF_KILL_SW, &priv->status))
1999 return 0;
2000
e1623446 2001 IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO ON\n");
14a08a7f
EG		 2002
2003 spin_lock_irqsave(&priv->lock, flags);
2004 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2005
a9efa652
EG		 2006 /* If the driver is up it will receive CARD_STATE_NOTIFICATION
2007 * notification where it will clear SW rfkill status.
2008 * Setting it here would break the handler. Only if the
2009 * interface is down we can set here since we don't
2010 * receive any further notification.
2011 */
2012 if (!priv->is_open)
2013 clear_bit(STATUS_RF_KILL_SW, &priv->status);
14a08a7f
EG		 2014 spin_unlock_irqrestore(&priv->lock, flags);
2015
2016 /* wake up ucode */
2017 msleep(10);
2018
2019 spin_lock_irqsave(&priv->lock, flags);
2020 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2021 if (!iwl_grab_nic_access(priv))
2022 iwl_release_nic_access(priv);
2023 spin_unlock_irqrestore(&priv->lock, flags);
2024
2025 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
e1623446 2026 IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
14a08a7f
EG		 2027 "disabled by HW switch\n");
2028 return 0;
2029 }
2030
edb34228
MA		 2031 /* when driver is up while rfkill is on, it wont receive
2032 * any CARD_STATE_NOTIFICATION notifications so we have to
2033 * restart it in here
2034 */
2035 if (priv->is_open && !test_bit(STATUS_ALIVE, &priv->status)) {
2036 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2037 if (!iwl_is_rfkill(priv))
2038 queue_work(priv->workqueue, &priv->up);
2039 }
2040
a9efa652
EG		 2041 /* If the driver is already loaded, it will receive
2042 * CARD_STATE_NOTIFICATION notifications and the handler will
2043 * call restart to reload the driver.
2044 */
14a08a7f
EG		 2045 return 1;
2046}
2047EXPORT_SYMBOL(iwl_radio_kill_sw_enable_radio);
c0af96a6
SO		 2048
2049void iwl_bg_rf_kill(struct work_struct *work)
2050{
2051 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
2052
2053 wake_up_interruptible(&priv->wait_command_queue);
2054
2055 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2056 return;
2057
2058 mutex_lock(&priv->mutex);
2059
2060 if (!iwl_is_rfkill(priv)) {
e1623446 2061 IWL_DEBUG_RF_KILL(priv,
c0af96a6
SO		 2062 "HW and/or SW RF Kill no longer active, restarting "
2063 "device\n");
2064 if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
55a3757a 2065 priv->is_open)
c0af96a6
SO		 2066 queue_work(priv->workqueue, &priv->restart);
2067 } else {
2068 /* make sure mac80211 stop sending Tx frame */
2069 if (priv->mac80211_registered)
2070 ieee80211_stop_queues(priv->hw);
2071
2072 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
e1623446 2073 IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
c0af96a6
SO		 2074 "disabled by SW switch\n");
2075 else
2076 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
2077 "Kill switch must be turned off for "
2078 "wireless networking to work.\n");
2079 }
2080 mutex_unlock(&priv->mutex);
2081 iwl_rfkill_set_hw_state(priv);
2082}
2083EXPORT_SYMBOL(iwl_bg_rf_kill);
030f05ed
AK		 2084
2085void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2086 struct iwl_rx_mem_buffer *rxb)
2087{
2088#ifdef CONFIG_IWLWIFI_DEBUG
2089 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2090 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2091 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2092 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2093#endif
2094}
2095EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2096
2097void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2098 struct iwl_rx_mem_buffer *rxb)
2099{
2100 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2101 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2102 "notification for %s:\n",
2103 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2104 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
2105}
2106EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 2107
2108void iwl_rx_reply_error(struct iwl_priv *priv,
2109 struct iwl_rx_mem_buffer *rxb)
2110{
2111 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2112
2113 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2114 "seq 0x%04X ser 0x%08X\n",
2115 le32_to_cpu(pkt->u.err_resp.error_type),
2116 get_cmd_string(pkt->u.err_resp.cmd_id),
2117 pkt->u.err_resp.cmd_id,
2118 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2119 le32_to_cpu(pkt->u.err_resp.error_info));
2120}
2121EXPORT_SYMBOL(iwl_rx_reply_error);
2122
a83b9141
WYG		 2123void iwl_clear_isr_stats(struct iwl_priv *priv)
2124{
2125 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2126}
2127EXPORT_SYMBOL(iwl_clear_isr_stats);
2128
488829f1
AK		 2129int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2130 const struct ieee80211_tx_queue_params *params)
2131{
2132 struct iwl_priv *priv = hw->priv;
2133 unsigned long flags;
2134 int q;
2135
2136 IWL_DEBUG_MAC80211(priv, "enter\n");
2137
2138 if (!iwl_is_ready_rf(priv)) {
2139 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2140 return -EIO;
2141 }
2142
2143 if (queue >= AC_NUM) {
2144 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2145 return 0;
2146 }
2147
2148 q = AC_NUM - 1 - queue;
2149
2150 spin_lock_irqsave(&priv->lock, flags);
2151
2152 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2153 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2154 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2155 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2156 cpu_to_le16((params->txop * 32));
2157
2158 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2159 priv->qos_data.qos_active = 1;
2160
2161 if (priv->iw_mode == NL80211_IFTYPE_AP)
2162 iwl_activate_qos(priv, 1);
2163 else if (priv->assoc_id && iwl_is_associated(priv))
2164 iwl_activate_qos(priv, 0);
2165
2166 spin_unlock_irqrestore(&priv->lock, flags);
2167
2168 IWL_DEBUG_MAC80211(priv, "leave\n");
2169 return 0;
2170}
2171EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 2172
2173static void iwl_ht_conf(struct iwl_priv *priv,
2174 struct ieee80211_bss_conf *bss_conf)
2175{
2176 struct ieee80211_sta_ht_cap *ht_conf;
2177 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2178 struct ieee80211_sta *sta;
2179
2180 IWL_DEBUG_MAC80211(priv, "enter: \n");
2181
2182 if (!iwl_conf->is_ht)
2183 return;
2184
2185
2186 /*
2187 * It is totally wrong to base global information on something
2188 * that is valid only when associated, alas, this driver works
2189 * that way and I don't know how to fix it.
2190 */
2191
2192 rcu_read_lock();
2193 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2194 if (!sta) {
2195 rcu_read_unlock();
2196 return;
2197 }
2198 ht_conf = &sta->ht_cap;
2199
2200 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
2201 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
2202 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
2203 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
2204
2205 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
2206 iwl_conf->max_amsdu_size =
2207 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
2208
2209 iwl_conf->supported_chan_width =
2210 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
2211
2212 /*
2213 * XXX: The HT configuration needs to be moved into iwl_mac_config()
2214 * to be done there correctly.
2215 */
2216
2217 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
2218 if (conf_is_ht40_minus(&priv->hw->conf))
2219 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2220 else if (conf_is_ht40_plus(&priv->hw->conf))
2221 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2222
2223 /* If no above or below channel supplied disable FAT channel */
2224 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
2225 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
2226 iwl_conf->supported_chan_width = 0;
2227
2228 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2229
2230 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2231
2232 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
2233 iwl_conf->ht_protection =
9ed6bcce 2234 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
5bbe233b 2235 iwl_conf->non_GF_STA_present =
9ed6bcce 2236 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b
AK		 2237
2238 rcu_read_unlock();
2239
2240 IWL_DEBUG_MAC80211(priv, "leave\n");
2241}
2242
2243#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2244void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 2245 struct ieee80211_vif *vif,
2246 struct ieee80211_bss_conf *bss_conf,
2247 u32 changes)
5bbe233b
AK		 2248{
2249 struct iwl_priv *priv = hw->priv;
3a650292 2250 int ret;
5bbe233b
AK		 2251
2252 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2253
2d0ddec5
JB		 2254 if (!iwl_is_alive(priv))
2255 return;
2256
2257 mutex_lock(&priv->mutex);
2258
2259 if (changes & BSS_CHANGED_BEACON &&
2260 priv->iw_mode == NL80211_IFTYPE_AP) {
2261 dev_kfree_skb(priv->ibss_beacon);
2262 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2263 }
2264
2265 if ((changes & BSS_CHANGED_BSSID) && !iwl_is_rfkill(priv)) {
2266 /* If there is currently a HW scan going on in the background
2267 * then we need to cancel it else the RXON below will fail. */
2268 if (iwl_scan_cancel_timeout(priv, 100)) {
2269 IWL_WARN(priv, "Aborted scan still in progress "
2270 "after 100ms\n");
2271 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2272 mutex_unlock(&priv->mutex);
2273 return;
2274 }
2275 memcpy(priv->staging_rxon.bssid_addr,
2276 bss_conf->bssid, ETH_ALEN);
2277
2278 /* TODO: Audit driver for usage of these members and see
2279 * if mac80211 deprecates them (priv->bssid looks like it
2280 * shouldn't be there, but I haven't scanned the IBSS code
2281 * to verify) - jpk */
2282 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2283
2284 if (priv->iw_mode == NL80211_IFTYPE_AP)
2285 iwlcore_config_ap(priv);
2286 else {
2287 int rc = iwlcore_commit_rxon(priv);
2288 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
2289 iwl_rxon_add_station(
2290 priv, priv->active_rxon.bssid_addr, 1);
2291 }
2292 } else if (!iwl_is_rfkill(priv)) {
2293 iwl_scan_cancel_timeout(priv, 100);
2294 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2295 iwlcore_commit_rxon(priv);
2296 }
2297
2298 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2299 changes & BSS_CHANGED_BEACON) {
2300 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2301
2302 if (beacon)
2303 iwl_mac_beacon_update(hw, beacon);
2304 }
2305
2306 mutex_unlock(&priv->mutex);
2307
5bbe233b
AK		 2308 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2309 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2310 bss_conf->use_short_preamble);
2311 if (bss_conf->use_short_preamble)
2312 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2313 else
2314 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2315 }
2316
2317 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2318 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2319 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2320 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2321 else
2322 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2323 }
2324
2325 if (changes & BSS_CHANGED_HT) {
2326 iwl_ht_conf(priv, bss_conf);
45823531
AK		 2327
2328 if (priv->cfg->ops->hcmd->set_rxon_chain)
2329 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 2330 }
2331
2332 if (changes & BSS_CHANGED_ASSOC) {
2333 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2334 /* This should never happen as this function should
2335 * never be called from interrupt context. */
2336 if (WARN_ON_ONCE(in_interrupt()))
2337 return;
2338 if (bss_conf->assoc) {
2339 priv->assoc_id = bss_conf->aid;
2340 priv->beacon_int = bss_conf->beacon_int;
2341 priv->power_data.dtim_period = bss_conf->dtim_period;
2342 priv->timestamp = bss_conf->timestamp;
2343 priv->assoc_capability = bss_conf->assoc_capability;
2344
2345 /* we have just associated, don't start scan too early
2346 * leave time for EAPOL exchange to complete
2347 */
2348 priv->next_scan_jiffies = jiffies +
2349 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2350 mutex_lock(&priv->mutex);
2351 priv->cfg->ops->lib->post_associate(priv);
2352 mutex_unlock(&priv->mutex);
2353 } else {
2354 priv->assoc_id = 0;
2355 IWL_DEBUG_MAC80211(priv, "DISASSOC %d\n", bss_conf->assoc);
2356 }
2357 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2358 IWL_DEBUG_MAC80211(priv, "Associated Changes %d\n", changes);
3a650292
MA		 2359 ret = iwl_send_rxon_assoc(priv);
2360 if (!ret)
2361 /* Sync active_rxon with latest change. */
2362 memcpy((void *)&priv->active_rxon,
2363 &priv->staging_rxon,
2364 sizeof(struct iwl_rxon_cmd));
5bbe233b 2365 }
2d0ddec5 2366 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 2367}
2368EXPORT_SYMBOL(iwl_bss_info_changed);
2369
9944b938
AK		 2370int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2371{
2372 struct iwl_priv *priv = hw->priv;
2373 unsigned long flags;
2374 __le64 timestamp;
2375
2376 IWL_DEBUG_MAC80211(priv, "enter\n");
2377
2378 if (!iwl_is_ready_rf(priv)) {
2379 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2380 return -EIO;
2381 }
2382
2383 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2384 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2385 return -EIO;
2386 }
2387
2388 spin_lock_irqsave(&priv->lock, flags);
2389
2390 if (priv->ibss_beacon)
2391 dev_kfree_skb(priv->ibss_beacon);
2392
2393 priv->ibss_beacon = skb;
2394
2395 priv->assoc_id = 0;
2396 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2397 priv->timestamp = le64_to_cpu(timestamp);
2398
2399 IWL_DEBUG_MAC80211(priv, "leave\n");
2400 spin_unlock_irqrestore(&priv->lock, flags);
2401
2402 iwl_reset_qos(priv);
2403
2404 priv->cfg->ops->lib->post_associate(priv);
2405
2406
2407 return 0;
2408}
2409EXPORT_SYMBOL(iwl_mac_beacon_update);
2410
727882d6
AK		 2411int iwl_set_mode(struct iwl_priv *priv, int mode)
2412{
2413 if (mode == NL80211_IFTYPE_ADHOC) {
2414 const struct iwl_channel_info *ch_info;
2415
2416 ch_info = iwl_get_channel_info(priv,
2417 priv->band,
2418 le16_to_cpu(priv->staging_rxon.channel));
2419
2420 if (!ch_info || !is_channel_ibss(ch_info)) {
2421 IWL_ERR(priv, "channel %d not IBSS channel\n",
2422 le16_to_cpu(priv->staging_rxon.channel));
2423 return -EINVAL;
2424 }
2425 }
2426
2427 iwl_connection_init_rx_config(priv, mode);
2428
2429 if (priv->cfg->ops->hcmd->set_rxon_chain)
2430 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2431
2432 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2433
2434 priv->cfg->ops->smgmt->clear_station_table(priv);
2435
2436 /* dont commit rxon if rf-kill is on*/
2437 if (!iwl_is_ready_rf(priv))
2438 return -EAGAIN;
2439
2440 cancel_delayed_work(&priv->scan_check);
2441 if (iwl_scan_cancel_timeout(priv, 100)) {
2442 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2443 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2444 return -EAGAIN;
2445 }
2446
2447 iwlcore_commit_rxon(priv);
2448
2449 return 0;
2450}
2451EXPORT_SYMBOL(iwl_set_mode);
2452
cbb6ab94
AK		 2453int iwl_mac_add_interface(struct ieee80211_hw *hw,
2454 struct ieee80211_if_init_conf *conf)
2455{
2456 struct iwl_priv *priv = hw->priv;
2457 unsigned long flags;
2458
2459 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2460
2461 if (priv->vif) {
2462 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2463 return -EOPNOTSUPP;
2464 }
2465
2466 spin_lock_irqsave(&priv->lock, flags);
2467 priv->vif = conf->vif;
2468 priv->iw_mode = conf->type;
2469
2470 spin_unlock_irqrestore(&priv->lock, flags);
2471
2472 mutex_lock(&priv->mutex);
2473
2474 if (conf->mac_addr) {
2475 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2476 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2477 }
2478
2479 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2480 /* we are not ready, will run again when ready */
2481 set_bit(STATUS_MODE_PENDING, &priv->status);
2482
2483 mutex_unlock(&priv->mutex);
2484
2485 IWL_DEBUG_MAC80211(priv, "leave\n");
2486 return 0;
2487}
2488EXPORT_SYMBOL(iwl_mac_add_interface);
2489
d8052319
AK		 2490void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2491 struct ieee80211_if_init_conf *conf)
2492{
2493 struct iwl_priv *priv = hw->priv;
2494
2495 IWL_DEBUG_MAC80211(priv, "enter\n");
2496
2497 mutex_lock(&priv->mutex);
2498
2499 if (iwl_is_ready_rf(priv)) {
2500 iwl_scan_cancel_timeout(priv, 100);
2501 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2502 iwlcore_commit_rxon(priv);
2503 }
2504 if (priv->vif == conf->vif) {
2505 priv->vif = NULL;
2506 memset(priv->bssid, 0, ETH_ALEN);
2507 }
2508 mutex_unlock(&priv->mutex);
2509
2510 IWL_DEBUG_MAC80211(priv, "leave\n");
2511
2512}
2513EXPORT_SYMBOL(iwl_mac_remove_interface);
2514
4808368d
AK		 2515/**
2516 * iwl_mac_config - mac80211 config callback
2517 *
2518 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2519 * be set inappropriately and the driver currently sets the hardware up to
2520 * use it whenever needed.
2521 */
2522int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2523{
2524 struct iwl_priv *priv = hw->priv;
2525 const struct iwl_channel_info *ch_info;
2526 struct ieee80211_conf *conf = &hw->conf;
2527 unsigned long flags = 0;
2528 int ret = 0;
2529 u16 ch;
2530 int scan_active = 0;
2531
2532 mutex_lock(&priv->mutex);
2533
4808368d
AK		 2534 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2535 conf->channel->hw_value, changed);
2536
2537 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2538 test_bit(STATUS_SCANNING, &priv->status))) {
2539 scan_active = 1;
2540 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2541 }
2542
2543
2544 /* during scanning mac80211 will delay channel setting until
2545 * scan finish with changed = 0
2546 */
2547 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2548 if (scan_active)
2549 goto set_ch_out;
2550
2551 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2552 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2553 if (!is_channel_valid(ch_info)) {
2554 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2555 ret = -EINVAL;
2556 goto set_ch_out;
2557 }
2558
2559 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2560 !is_channel_ibss(ch_info)) {
2561 IWL_ERR(priv, "channel %d in band %d not "
2562 "IBSS channel\n",
2563 conf->channel->hw_value, conf->channel->band);
2564 ret = -EINVAL;
2565 goto set_ch_out;
2566 }
2567
2568 priv->current_ht_config.is_ht = conf_is_ht(conf);
2569
2570 spin_lock_irqsave(&priv->lock, flags);
2571
2572
2573 /* if we are switching from ht to 2.4 clear flags
2574 * from any ht related info since 2.4 does not
2575 * support ht */
2576 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2577 priv->staging_rxon.flags = 0;
2578
2579 iwl_set_rxon_channel(priv, conf->channel);
2580
2581 iwl_set_flags_for_band(priv, conf->channel->band);
2582 spin_unlock_irqrestore(&priv->lock, flags);
2583 set_ch_out:
2584 /* The list of supported rates and rate mask can be different
2585 * for each band; since the band may have changed, reset
2586 * the rate mask to what mac80211 lists */
2587 iwl_set_rate(priv);
2588 }
2589
7af2c460
JB		 2590 if (changed & IEEE80211_CONF_CHANGE_PS &&
2591 priv->iw_mode == NL80211_IFTYPE_STATION) {
2592 priv->power_data.power_disabled =
2593 !(conf->flags & IEEE80211_CONF_PS);
2594 ret = iwl_power_update_mode(priv, 0);
4808368d
AK		 2595 if (ret)
2596 IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
4808368d
AK		 2597 }
2598
2599 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2600 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2601 priv->tx_power_user_lmt, conf->power_level);
2602
2603 iwl_set_tx_power(priv, conf->power_level, false);
2604 }
2605
2606 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2607 if (priv->cfg->ops->hcmd->set_rxon_chain)
2608 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2609
2610 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
2611 if (conf->radio_enabled &&
2612 iwl_radio_kill_sw_enable_radio(priv)) {
2613 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
2614 "waiting for uCode\n");
2615 goto out;
2616 }
2617
2618 if (!conf->radio_enabled)
2619 iwl_radio_kill_sw_disable_radio(priv);
2620 }
2621
2622 if (!conf->radio_enabled) {
2623 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
2624 goto out;
2625 }
2626
0cf4c01e
MA		 2627 if (!iwl_is_ready(priv)) {
2628 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2629 goto out;
2630 }
2631
4808368d
AK		 2632 if (scan_active)
2633 goto out;
2634
2635 if (memcmp(&priv->active_rxon,
2636 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2637 iwlcore_commit_rxon(priv);
2638 else
2639 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2640
2641
2642out:
2643 IWL_DEBUG_MAC80211(priv, "leave\n");
2644 mutex_unlock(&priv->mutex);
2645 return ret;
2646}
2647EXPORT_SYMBOL(iwl_mac_config);
2648
aa89f31e
AK		 2649int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2650 struct ieee80211_tx_queue_stats *stats)
2651{
2652 struct iwl_priv *priv = hw->priv;
2653 int i, avail;
2654 struct iwl_tx_queue *txq;
2655 struct iwl_queue *q;
2656 unsigned long flags;
2657
2658 IWL_DEBUG_MAC80211(priv, "enter\n");
2659
2660 if (!iwl_is_ready_rf(priv)) {
2661 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2662 return -EIO;
2663 }
2664
2665 spin_lock_irqsave(&priv->lock, flags);
2666
2667 for (i = 0; i < AC_NUM; i++) {
2668 txq = &priv->txq[i];
2669 q = &txq->q;
2670 avail = iwl_queue_space(q);
2671
2672 stats[i].len = q->n_window - avail;
2673 stats[i].limit = q->n_window - q->high_mark;
2674 stats[i].count = q->n_window;
2675
2676 }
2677 spin_unlock_irqrestore(&priv->lock, flags);
2678
2679 IWL_DEBUG_MAC80211(priv, "leave\n");
2680
2681 return 0;
2682}
2683EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2684
bd564261
AK		 2685void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2686{
2687 struct iwl_priv *priv = hw->priv;
2688 unsigned long flags;
2689
2690 mutex_lock(&priv->mutex);
2691 IWL_DEBUG_MAC80211(priv, "enter\n");
2692
2693 spin_lock_irqsave(&priv->lock, flags);
2694 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2695 spin_unlock_irqrestore(&priv->lock, flags);
2696
2697 iwl_reset_qos(priv);
2698
2699 spin_lock_irqsave(&priv->lock, flags);
2700 priv->assoc_id = 0;
2701 priv->assoc_capability = 0;
2702 priv->assoc_station_added = 0;
2703
2704 /* new association get rid of ibss beacon skb */
2705 if (priv->ibss_beacon)
2706 dev_kfree_skb(priv->ibss_beacon);
2707
2708 priv->ibss_beacon = NULL;
2709
57c4d7b4 2710 priv->beacon_int = priv->vif->bss_conf.beacon_int;
bd564261
AK		 2711 priv->timestamp = 0;
2712 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2713 priv->beacon_int = 0;
2714
2715 spin_unlock_irqrestore(&priv->lock, flags);
2716
2717 if (!iwl_is_ready_rf(priv)) {
2718 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2719 mutex_unlock(&priv->mutex);
2720 return;
2721 }
2722
2723 /* we are restarting association process
2724 * clear RXON_FILTER_ASSOC_MSK bit
2725 */
2726 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2727 iwl_scan_cancel_timeout(priv, 100);
2728 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2729 iwlcore_commit_rxon(priv);
2730 }
2731
bd564261 2732 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
bd564261
AK		 2733 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2734 mutex_unlock(&priv->mutex);
2735 return;
2736 }
2737
2738 iwl_set_rate(priv);
2739
2740 mutex_unlock(&priv->mutex);
2741
2742 IWL_DEBUG_MAC80211(priv, "leave\n");
2743}
2744EXPORT_SYMBOL(iwl_mac_reset_tsf);
2745
6da3a13e
WYG		 2746#ifdef CONFIG_PM
2747
2748int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2749{
2750 struct iwl_priv *priv = pci_get_drvdata(pdev);
2751
2752 /*
2753 * This function is called when system goes into suspend state
2754 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2755 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2756 * it will not call apm_ops.stop() to stop the DMA operation.
2757 * Calling apm_ops.stop here to make sure we stop the DMA.
2758 */
2759 priv->cfg->ops->lib->apm_ops.stop(priv);
2760
2761 pci_save_state(pdev);
2762 pci_disable_device(pdev);
2763 pci_set_power_state(pdev, PCI_D3hot);
2764
2765 return 0;
2766}
2767EXPORT_SYMBOL(iwl_pci_suspend);
2768
2769int iwl_pci_resume(struct pci_dev *pdev)
2770{
2771 struct iwl_priv *priv = pci_get_drvdata(pdev);
2772 int ret;
2773
2774 pci_set_power_state(pdev, PCI_D0);
2775 ret = pci_enable_device(pdev);
2776 if (ret)
2777 return ret;
2778 pci_restore_state(pdev);
2779 iwl_enable_interrupts(priv);
2780
2781 return 0;
2782}
2783EXPORT_SYMBOL(iwl_pci_resume);
2784
2785#endif /* CONFIG_PM */
Linux kernel - Deliverables
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