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iwlwifi: fix PS disable status race
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
01f8162a 5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
1d0a082d 32#include <net/mac80211.h>
df48c323 33
6bc913bd 34#include "iwl-eeprom.h"
3e0d4cb1 35#include "iwl-dev.h" /* FIXME: remove */
19335774 36#include "iwl-debug.h"
df48c323 37#include "iwl-core.h"
b661c819 38#include "iwl-io.h"
ad97edd2 39#include "iwl-rfkill.h"
5da4b55f 40#include "iwl-power.h"
83dde8c9 41#include "iwl-sta.h"
df48c323 42
1d0a082d 43
df48c323
TW		 44MODULE_DESCRIPTION("iwl core");
45MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 46MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 47MODULE_LICENSE("GPL");
df48c323 48
c7de35cd
RR		 49#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
61
62/*
63 * Parameter order:
64 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
65 *
66 * If there isn't a valid next or previous rate then INV is used which
67 * maps to IWL_RATE_INVALID
68 *
69 */
1826dcc0 70const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 71 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
72 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
73 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
74 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
75 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
76 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
77 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
78 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
79 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
80 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
81 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
82 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
83 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
84 /* FIXME:RS: ^^ should be INV (legacy) */
85};
1826dcc0 86EXPORT_SYMBOL(iwl_rates);
c7de35cd 87
e7d326ac
TW		 88/**
89 * translate ucode response to mac80211 tx status control values
90 */
91void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
e6a9854b 92 struct ieee80211_tx_info *info)
e7d326ac
TW		 93{
94 int rate_index;
e6a9854b 95 struct ieee80211_tx_rate *r = &info->control.rates[0];
e7d326ac 96
e6a9854b 97 info->antenna_sel_tx =
e7d326ac
TW		 98 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
99 if (rate_n_flags & RATE_MCS_HT_MSK)
e6a9854b 100 r->flags |= IEEE80211_TX_RC_MCS;
e7d326ac 101 if (rate_n_flags & RATE_MCS_GF_MSK)
e6a9854b 102 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
e7d326ac 103 if (rate_n_flags & RATE_MCS_FAT_MSK)
e6a9854b 104 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
e7d326ac 105 if (rate_n_flags & RATE_MCS_DUP_MSK)
e6a9854b 106 r->flags |= IEEE80211_TX_RC_DUP_DATA;
e7d326ac 107 if (rate_n_flags & RATE_MCS_SGI_MSK)
e6a9854b 108 r->flags |= IEEE80211_TX_RC_SHORT_GI;
e7d326ac 109 rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
e6a9854b 110 if (info->band == IEEE80211_BAND_5GHZ)
e7d326ac 111 rate_index -= IWL_FIRST_OFDM_RATE;
e6a9854b 112 r->idx = rate_index;
e7d326ac
TW		 113}
114EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
115
116int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
117{
118 int idx = 0;
119
120 /* HT rate format */
121 if (rate_n_flags & RATE_MCS_HT_MSK) {
122 idx = (rate_n_flags & 0xff);
123
60d32215
DH		 124 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
125 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
126 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 127 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
128
129 idx += IWL_FIRST_OFDM_RATE;
130 /* skip 9M not supported in ht*/
131 if (idx >= IWL_RATE_9M_INDEX)
132 idx += 1;
133 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
134 return idx;
135
136 /* legacy rate format, search for match in table */
137 } else {
138 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
139 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
140 return idx;
141 }
142
143 return -1;
144}
145EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
146
76eff18b
TW		 147u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
148{
149 int i;
150 u8 ind = ant;
151 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
152 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
153 if (priv->hw_params.valid_tx_ant & BIT(ind))
154 return ind;
155 }
156 return ant;
157}
57bd1bea
TW		 158
159const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
160EXPORT_SYMBOL(iwl_bcast_addr);
161
162
1d0a082d
AK		 163/* This function both allocates and initializes hw and priv. */
164struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
165 struct ieee80211_ops *hw_ops)
166{
167 struct iwl_priv *priv;
168
169 /* mac80211 allocates memory for this device instance, including
170 * space for this driver's private structure */
171 struct ieee80211_hw *hw =
172 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
173 if (hw == NULL) {
a3139c59
SO		 174 printk(KERN_ERR "%s: Can not allocate network device\n",
175 cfg->name);
1d0a082d
AK		 176 goto out;
177 }
178
179 priv = hw->priv;
180 priv->hw = hw;
181
182out:
183 return hw;
184}
185EXPORT_SYMBOL(iwl_alloc_all);
186
b661c819
TW		 187void iwl_hw_detect(struct iwl_priv *priv)
188{
189 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
190 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
191 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
192}
193EXPORT_SYMBOL(iwl_hw_detect);
194
1053d35f
RR		 195int iwl_hw_nic_init(struct iwl_priv *priv)
196{
197 unsigned long flags;
198 struct iwl_rx_queue *rxq = &priv->rxq;
199 int ret;
200
201 /* nic_init */
1053d35f 202 spin_lock_irqsave(&priv->lock, flags);
1b73af82 203 priv->cfg->ops->lib->apm_ops.init(priv);
1053d35f
RR		 204 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
205 spin_unlock_irqrestore(&priv->lock, flags);
206
207 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
208
209 priv->cfg->ops->lib->apm_ops.config(priv);
210
211 /* Allocate the RX queue, or reset if it is already allocated */
212 if (!rxq->bd) {
213 ret = iwl_rx_queue_alloc(priv);
214 if (ret) {
15b1687c 215 IWL_ERR(priv, "Unable to initialize Rx queue\n");
1053d35f
RR		 216 return -ENOMEM;
217 }
218 } else
219 iwl_rx_queue_reset(priv, rxq);
220
221 iwl_rx_replenish(priv);
222
223 iwl_rx_init(priv, rxq);
224
225 spin_lock_irqsave(&priv->lock, flags);
226
227 rxq->need_update = 1;
228 iwl_rx_queue_update_write_ptr(priv, rxq);
229
230 spin_unlock_irqrestore(&priv->lock, flags);
231
232 /* Allocate and init all Tx and Command queues */
233 ret = iwl_txq_ctx_reset(priv);
234 if (ret)
235 return ret;
236
237 set_bit(STATUS_INIT, &priv->status);
238
239 return 0;
240}
241EXPORT_SYMBOL(iwl_hw_nic_init);
242
14d2aac5
AK		 243/*
244 * QoS support
245*/
246void iwl_activate_qos(struct iwl_priv *priv, u8 force)
247{
248 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
249 return;
250
251 priv->qos_data.def_qos_parm.qos_flags = 0;
252
253 if (priv->qos_data.qos_cap.q_AP.queue_request &&
254 !priv->qos_data.qos_cap.q_AP.txop_request)
255 priv->qos_data.def_qos_parm.qos_flags |=
256 QOS_PARAM_FLG_TXOP_TYPE_MSK;
257 if (priv->qos_data.qos_active)
258 priv->qos_data.def_qos_parm.qos_flags |=
259 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
260
261 if (priv->current_ht_config.is_ht)
262 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
263
264 if (force || iwl_is_associated(priv)) {
265 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
266 priv->qos_data.qos_active,
267 priv->qos_data.def_qos_parm.qos_flags);
268
269 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
270 sizeof(struct iwl_qosparam_cmd),
271 &priv->qos_data.def_qos_parm, NULL);
272 }
273}
274EXPORT_SYMBOL(iwl_activate_qos);
275
c7de35cd 276void iwl_reset_qos(struct iwl_priv *priv)
bf85ea4f
AK		 277{
278 u16 cw_min = 15;
279 u16 cw_max = 1023;
280 u8 aifs = 2;
30dab79e 281 bool is_legacy = false;
bf85ea4f
AK		 282 unsigned long flags;
283 int i;
284
285 spin_lock_irqsave(&priv->lock, flags);
30dab79e
WT		 286 /* QoS always active in AP and ADHOC mode
287 * In STA mode wait for association
288 */
289 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
290 priv->iw_mode == NL80211_IFTYPE_AP)
291 priv->qos_data.qos_active = 1;
292 else
293 priv->qos_data.qos_active = 0;
bf85ea4f 294
30dab79e
WT		 295 /* check for legacy mode */
296 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
297 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
298 (priv->iw_mode == NL80211_IFTYPE_STATION &&
299 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
bf85ea4f
AK		 300 cw_min = 31;
301 is_legacy = 1;
302 }
303
304 if (priv->qos_data.qos_active)
305 aifs = 3;
306
307 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
308 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
309 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
310 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
311 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
312
313 if (priv->qos_data.qos_active) {
314 i = 1;
315 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
316 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
317 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
318 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
319 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
320
321 i = 2;
322 priv->qos_data.def_qos_parm.ac[i].cw_min =
323 cpu_to_le16((cw_min + 1) / 2 - 1);
324 priv->qos_data.def_qos_parm.ac[i].cw_max =
325 cpu_to_le16(cw_max);
326 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
327 if (is_legacy)
328 priv->qos_data.def_qos_parm.ac[i].edca_txop =
329 cpu_to_le16(6016);
330 else
331 priv->qos_data.def_qos_parm.ac[i].edca_txop =
332 cpu_to_le16(3008);
333 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
334
335 i = 3;
336 priv->qos_data.def_qos_parm.ac[i].cw_min =
337 cpu_to_le16((cw_min + 1) / 4 - 1);
338 priv->qos_data.def_qos_parm.ac[i].cw_max =
339 cpu_to_le16((cw_max + 1) / 2 - 1);
340 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
341 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
342 if (is_legacy)
343 priv->qos_data.def_qos_parm.ac[i].edca_txop =
344 cpu_to_le16(3264);
345 else
346 priv->qos_data.def_qos_parm.ac[i].edca_txop =
347 cpu_to_le16(1504);
348 } else {
349 for (i = 1; i < 4; i++) {
350 priv->qos_data.def_qos_parm.ac[i].cw_min =
351 cpu_to_le16(cw_min);
352 priv->qos_data.def_qos_parm.ac[i].cw_max =
353 cpu_to_le16(cw_max);
354 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
355 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
356 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
357 }
358 }
e1623446 359 IWL_DEBUG_QOS(priv, "set QoS to default \n");
bf85ea4f
AK		 360
361 spin_unlock_irqrestore(&priv->lock, flags);
362}
c7de35cd
RR		 363EXPORT_SYMBOL(iwl_reset_qos);
364
d9fe60de
JB		 365#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
366#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 367static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 368 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 369 enum ieee80211_band band)
370{
39130df3
RR		 371 u16 max_bit_rate = 0;
372 u8 rx_chains_num = priv->hw_params.rx_chains_num;
373 u8 tx_chains_num = priv->hw_params.tx_chains_num;
374
c7de35cd 375 ht_info->cap = 0;
d9fe60de 376 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 377
d9fe60de 378 ht_info->ht_supported = true;
c7de35cd 379
d9fe60de
JB		 380 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
381 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
382 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
00c5ae2f 383 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
39130df3
RR		 384
385 max_bit_rate = MAX_BIT_RATE_20_MHZ;
c7de35cd 386 if (priv->hw_params.fat_channel & BIT(band)) {
d9fe60de
JB		 387 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
388 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
389 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 390 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 391 }
c7de35cd
RR		 392
393 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 394 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 395
396 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
397 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
398
d9fe60de 399 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 400 if (rx_chains_num >= 2)
d9fe60de 401 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 402 if (rx_chains_num >= 3)
d9fe60de 403 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 404
405 /* Highest supported Rx data rate */
406 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 407 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
408 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 409
410 /* Tx MCS capabilities */
d9fe60de 411 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 412 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 413 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
414 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
415 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 416 }
c7de35cd 417}
c7de35cd
RR		 418
419static void iwlcore_init_hw_rates(struct iwl_priv *priv,
420 struct ieee80211_rate *rates)
421{
422 int i;
423
424 for (i = 0; i < IWL_RATE_COUNT; i++) {
1826dcc0 425 rates[i].bitrate = iwl_rates[i].ieee * 5;
c7de35cd
RR		 426 rates[i].hw_value = i; /* Rate scaling will work on indexes */
427 rates[i].hw_value_short = i;
428 rates[i].flags = 0;
429 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
430 /*
431 * If CCK != 1M then set short preamble rate flag.
432 */
433 rates[i].flags |=
1826dcc0 434 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
c7de35cd
RR		 435 0 : IEEE80211_RATE_SHORT_PREAMBLE;
436 }
437 }
438}
439
8ccde88a 440
c7de35cd
RR		 441/**
442 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
443 */
534166de 444int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 445{
446 struct iwl_channel_info *ch;
447 struct ieee80211_supported_band *sband;
448 struct ieee80211_channel *channels;
449 struct ieee80211_channel *geo_ch;
450 struct ieee80211_rate *rates;
451 int i = 0;
452
453 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
454 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 455 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 456 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
457 return 0;
458 }
459
460 channels = kzalloc(sizeof(struct ieee80211_channel) *
461 priv->channel_count, GFP_KERNEL);
462 if (!channels)
463 return -ENOMEM;
464
465 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
466 GFP_KERNEL);
467 if (!rates) {
468 kfree(channels);
469 return -ENOMEM;
470 }
471
472 /* 5.2GHz channels start after the 2.4GHz channels */
473 sband = &priv->bands[IEEE80211_BAND_5GHZ];
474 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
475 /* just OFDM */
476 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
477 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
478
49779293 479 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 480 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 481 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 482
483 sband = &priv->bands[IEEE80211_BAND_2GHZ];
484 sband->channels = channels;
485 /* OFDM & CCK */
486 sband->bitrates = rates;
487 sband->n_bitrates = IWL_RATE_COUNT;
488
49779293 489 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 490 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 491 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 492
493 priv->ieee_channels = channels;
494 priv->ieee_rates = rates;
495
c7de35cd
RR		 496 for (i = 0; i < priv->channel_count; i++) {
497 ch = &priv->channel_info[i];
498
499 /* FIXME: might be removed if scan is OK */
500 if (!is_channel_valid(ch))
501 continue;
502
503 if (is_channel_a_band(ch))
504 sband = &priv->bands[IEEE80211_BAND_5GHZ];
505 else
506 sband = &priv->bands[IEEE80211_BAND_2GHZ];
507
508 geo_ch = &sband->channels[sband->n_channels++];
509
510 geo_ch->center_freq =
511 ieee80211_channel_to_frequency(ch->channel);
512 geo_ch->max_power = ch->max_power_avg;
513 geo_ch->max_antenna_gain = 0xff;
514 geo_ch->hw_value = ch->channel;
515
516 if (is_channel_valid(ch)) {
517 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
518 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
519
520 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
521 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
522
523 if (ch->flags & EEPROM_CHANNEL_RADAR)
524 geo_ch->flags |= IEEE80211_CHAN_RADAR;
525
963f5517 526 geo_ch->flags |= ch->fat_extension_channel;
4d38c2e8 527
630fe9b6
TW		 528 if (ch->max_power_avg > priv->tx_power_channel_lmt)
529 priv->tx_power_channel_lmt = ch->max_power_avg;
c7de35cd
RR		 530 } else {
531 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
532 }
533
534 /* Save flags for reg domain usage */
535 geo_ch->orig_flags = geo_ch->flags;
536
e1623446 537 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 538 ch->channel, geo_ch->center_freq,
539 is_channel_a_band(ch) ? "5.2" : "2.4",
540 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
541 "restricted" : "valid",
542 geo_ch->flags);
543 }
544
545 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
546 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 547 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
548 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 549 priv->pci_dev->device,
550 priv->pci_dev->subsystem_device);
c7de35cd
RR		 551 priv->cfg->sku &= ~IWL_SKU_A;
552 }
553
978785a3 554 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 555 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
556 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 557
558 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
559
560 return 0;
561}
534166de 562EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 563
564/*
565 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
566 */
534166de 567void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 568{
569 kfree(priv->ieee_channels);
570 kfree(priv->ieee_rates);
571 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
572}
534166de 573EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 574
28a6b07a 575static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd
RR		 576{
577 return !priv->current_ht_config.is_ht ||
d9fe60de
JB		 578 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
579 (priv->current_ht_config.mcs.rx_mask[2] == 0));
c7de35cd 580}
963f5517 581
47c5196e
TW		 582static u8 iwl_is_channel_extension(struct iwl_priv *priv,
583 enum ieee80211_band band,
584 u16 channel, u8 extension_chan_offset)
585{
586 const struct iwl_channel_info *ch_info;
587
588 ch_info = iwl_get_channel_info(priv, band, channel);
589 if (!is_channel_valid(ch_info))
590 return 0;
591
d9fe60de 592 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
963f5517
EG		 593 return !(ch_info->fat_extension_channel &
594 IEEE80211_CHAN_NO_FAT_ABOVE);
d9fe60de 595 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
963f5517
EG		 596 return !(ch_info->fat_extension_channel &
597 IEEE80211_CHAN_NO_FAT_BELOW);
47c5196e
TW		 598
599 return 0;
600}
601
602u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
d9fe60de 603 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e
TW		 604{
605 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
606
607 if ((!iwl_ht_conf->is_ht) ||
608 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
d9fe60de 609 (iwl_ht_conf->extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE))
47c5196e
TW		 610 return 0;
611
612 if (sta_ht_inf) {
613 if ((!sta_ht_inf->ht_supported) ||
d9fe60de 614 (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)))
47c5196e
TW		 615 return 0;
616 }
617
618 return iwl_is_channel_extension(priv, priv->band,
ae5eb026
JB		 619 le16_to_cpu(priv->staging_rxon.channel),
620 iwl_ht_conf->extension_chan_offset);
47c5196e
TW		 621}
622EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
623
8ccde88a
SO		 624void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
625{
626 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
627
628 if (hw_decrypt)
629 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
630 else
631 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
632
633}
634EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
635
636/**
637 * iwl_check_rxon_cmd - validate RXON structure is valid
638 *
639 * NOTE: This is really only useful during development and can eventually
640 * be #ifdef'd out once the driver is stable and folks aren't actively
641 * making changes
642 */
643int iwl_check_rxon_cmd(struct iwl_priv *priv)
644{
645 int error = 0;
646 int counter = 1;
647 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
648
649 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
650 error |= le32_to_cpu(rxon->flags &
651 (RXON_FLG_TGJ_NARROW_BAND_MSK |
652 RXON_FLG_RADAR_DETECT_MSK));
653 if (error)
654 IWL_WARN(priv, "check 24G fields %d | %d\n",
655 counter++, error);
656 } else {
657 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
658 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
659 if (error)
660 IWL_WARN(priv, "check 52 fields %d | %d\n",
661 counter++, error);
662 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
663 if (error)
664 IWL_WARN(priv, "check 52 CCK %d | %d\n",
665 counter++, error);
666 }
667 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
668 if (error)
669 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
670
671 /* make sure basic rates 6Mbps and 1Mbps are supported */
672 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
673 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
674 if (error)
675 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
676
677 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
678 if (error)
679 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
680
681 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
682 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
683 if (error)
684 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
685 counter++, error);
686
687 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
688 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
689 if (error)
690 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
691 counter++, error);
692
693 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
694 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
695 if (error)
696 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
697 counter++, error);
698
699 if (error)
700 IWL_WARN(priv, "Tuning to channel %d\n",
701 le16_to_cpu(rxon->channel));
702
703 if (error) {
704 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
705 return -1;
706 }
707 return 0;
708}
709EXPORT_SYMBOL(iwl_check_rxon_cmd);
710
711/**
712 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
713 * @priv: staging_rxon is compared to active_rxon
714 *
715 * If the RXON structure is changing enough to require a new tune,
716 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
717 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
718 */
719int iwl_full_rxon_required(struct iwl_priv *priv)
720{
721
722 /* These items are only settable from the full RXON command */
723 if (!(iwl_is_associated(priv)) ||
724 compare_ether_addr(priv->staging_rxon.bssid_addr,
725 priv->active_rxon.bssid_addr) ||
726 compare_ether_addr(priv->staging_rxon.node_addr,
727 priv->active_rxon.node_addr) ||
728 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
729 priv->active_rxon.wlap_bssid_addr) ||
730 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
731 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
732 (priv->staging_rxon.air_propagation !=
733 priv->active_rxon.air_propagation) ||
734 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
735 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
736 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
737 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 738 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
739 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 740 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
741 return 1;
742
743 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
744 * be updated with the RXON_ASSOC command -- however only some
745 * flag transitions are allowed using RXON_ASSOC */
746
747 /* Check if we are not switching bands */
748 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
749 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
750 return 1;
751
752 /* Check if we are switching association toggle */
753 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
754 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
755 return 1;
756
757 return 0;
758}
759EXPORT_SYMBOL(iwl_full_rxon_required);
760
761u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
762{
763 int i;
764 int rate_mask;
765
766 /* Set rate mask*/
767 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
768 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
769 else
770 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
771
772 /* Find lowest valid rate */
773 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
774 i = iwl_rates[i].next_ieee) {
775 if (rate_mask & (1 << i))
776 return iwl_rates[i].plcp;
777 }
778
779 /* No valid rate was found. Assign the lowest one */
780 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
781 return IWL_RATE_1M_PLCP;
782 else
783 return IWL_RATE_6M_PLCP;
784}
785EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
786
47c5196e
TW		 787void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
788{
c1adf9fb 789 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e
TW		 790 u32 val;
791
42eb7c64
EG		 792 if (!ht_info->is_ht) {
793 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
794 RXON_FLG_CHANNEL_MODE_PURE_40_MSK |
795 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
796 RXON_FLG_FAT_PROT_MSK |
797 RXON_FLG_HT_PROT_MSK);
47c5196e 798 return;
42eb7c64 799 }
47c5196e
TW		 800
801 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
802 if (iwl_is_fat_tx_allowed(priv, NULL))
803 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
804 else
805 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
806 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
807
47c5196e
TW		 808 /* Note: control channel is opposite of extension channel */
809 switch (ht_info->extension_chan_offset) {
d9fe60de 810 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
47c5196e
TW		 811 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
812 break;
d9fe60de 813 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
47c5196e
TW		 814 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
815 break;
d9fe60de 816 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
47c5196e
TW		 817 default:
818 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
819 break;
820 }
821
822 val = ht_info->ht_protection;
823
824 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
825
45823531
AK		 826 if (priv->cfg->ops->hcmd->set_rxon_chain)
827 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 828
e1623446 829 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
47c5196e 830 "rxon flags 0x%X operation mode :0x%X "
ae5eb026 831 "extension channel offset 0x%x\n",
d9fe60de
JB		 832 ht_info->mcs.rx_mask[0],
833 ht_info->mcs.rx_mask[1],
834 ht_info->mcs.rx_mask[2],
47c5196e 835 le32_to_cpu(rxon->flags), ht_info->ht_protection,
ae5eb026 836 ht_info->extension_chan_offset);
47c5196e
TW		 837 return;
838}
839EXPORT_SYMBOL(iwl_set_rxon_ht);
840
9e5e6c32
TW		 841#define IWL_NUM_RX_CHAINS_MULTIPLE 3
842#define IWL_NUM_RX_CHAINS_SINGLE 2
843#define IWL_NUM_IDLE_CHAINS_DUAL 2
844#define IWL_NUM_IDLE_CHAINS_SINGLE 1
845
846/* Determine how many receiver/antenna chains to use.
c7de35cd
RR		 847 * More provides better reception via diversity. Fewer saves power.
848 * MIMO (dual stream) requires at least 2, but works better with 3.
849 * This does not determine *which* chains to use, just how many.
850 */
28a6b07a 851static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 852{
28a6b07a
TW		 853 bool is_single = is_single_rx_stream(priv);
854 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
c7de35cd
RR		 855
856 /* # of Rx chains to use when expecting MIMO. */
12837be1
RR		 857 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
858 WLAN_HT_CAP_SM_PS_STATIC)))
9e5e6c32 859 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 860 else
9e5e6c32 861 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 862}
c7de35cd 863
28a6b07a
TW		 864static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
865{
866 int idle_cnt;
867 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
c7de35cd 868 /* # Rx chains when idling and maybe trying to save power */
12837be1 869 switch (priv->current_ht_config.sm_ps) {
00c5ae2f
TW		 870 case WLAN_HT_CAP_SM_PS_STATIC:
871 case WLAN_HT_CAP_SM_PS_DYNAMIC:
9e5e6c32
TW		 872 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
873 IWL_NUM_IDLE_CHAINS_SINGLE;
c7de35cd 874 break;
00c5ae2f 875 case WLAN_HT_CAP_SM_PS_DISABLED:
9e5e6c32 876 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
c7de35cd 877 break;
00c5ae2f 878 case WLAN_HT_CAP_SM_PS_INVALID:
c7de35cd 879 default:
15b1687c 880 IWL_ERR(priv, "invalid mimo ps mode %d\n",
12837be1 881 priv->current_ht_config.sm_ps);
28a6b07a
TW		 882 WARN_ON(1);
883 idle_cnt = -1;
c7de35cd
RR		 884 break;
885 }
28a6b07a 886 return idle_cnt;
c7de35cd
RR		 887}
888
04816448
GE		 889/* up to 4 chains */
890static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
891{
892 u8 res;
893 res = (chain_bitmap & BIT(0)) >> 0;
894 res += (chain_bitmap & BIT(1)) >> 1;
895 res += (chain_bitmap & BIT(2)) >> 2;
896 res += (chain_bitmap & BIT(4)) >> 4;
897 return res;
898}
899
4c4df78f
CR		 900/**
901 * iwl_is_monitor_mode - Determine if interface in monitor mode
902 *
903 * priv->iw_mode is set in add_interface, but add_interface is
904 * never called for monitor mode. The only way mac80211 informs us about
905 * monitor mode is through configuring filters (call to configure_filter).
906 */
279b05d4 907bool iwl_is_monitor_mode(struct iwl_priv *priv)
4c4df78f
CR		 908{
909 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
910}
279b05d4 911EXPORT_SYMBOL(iwl_is_monitor_mode);
4c4df78f 912
c7de35cd
RR		 913/**
914 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
915 *
916 * Selects how many and which Rx receivers/antennas/chains to use.
917 * This should not be used for scan command ... it puts data in wrong place.
918 */
919void iwl_set_rxon_chain(struct iwl_priv *priv)
920{
28a6b07a
TW		 921 bool is_single = is_single_rx_stream(priv);
922 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 923 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
924 u32 active_chains;
28a6b07a 925 u16 rx_chain;
c7de35cd
RR		 926
927 /* Tell uCode which antennas are actually connected.
928 * Before first association, we assume all antennas are connected.
929 * Just after first association, iwl_chain_noise_calibration()
930 * checks which antennas actually *are* connected. */
04816448
GE		 931 if (priv->chain_noise_data.active_chains)
932 active_chains = priv->chain_noise_data.active_chains;
933 else
934 active_chains = priv->hw_params.valid_rx_ant;
935
936 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 937
938 /* How many receivers should we use? */
28a6b07a
TW		 939 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
940 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
941
28a6b07a 942
04816448
GE		 943 /* correct rx chain count according hw settings
944 * and chain noise calibration
945 */
946 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
947 if (valid_rx_cnt < active_rx_cnt)
948 active_rx_cnt = valid_rx_cnt;
949
950 if (valid_rx_cnt < idle_rx_cnt)
951 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 952
953 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
954 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
955
7b841727
RF		 956 /* copied from 'iwl_bg_request_scan()' */
957 /* Force use of chains B and C (0x6) for Rx for 4965
958 * Avoid A (0x1) because of its off-channel reception on A-band.
959 * MIMO is not used here, but value is required */
960 if (iwl_is_monitor_mode(priv) &&
961 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
962 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
963 rx_chain = 0x07 << RXON_RX_CHAIN_VALID_POS;
964 rx_chain |= 0x06 << RXON_RX_CHAIN_FORCE_SEL_POS;
965 rx_chain |= 0x07 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
966 rx_chain |= 0x01 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
967 }
968
28a6b07a
TW		 969 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
970
9e5e6c32 971 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 972 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
973 else
974 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
975
e1623446 976 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 977 priv->staging_rxon.rx_chain,
978 active_rx_cnt, idle_rx_cnt);
979
980 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
981 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 982}
983EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 984
985/**
17e72782 986 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 987 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
988 * @channel: Any channel valid for the requested phymode
989
990 * In addition to setting the staging RXON, priv->phymode is also set.
991 *
992 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
993 * in the staging RXON flag structure based on the phymode
994 */
17e72782 995int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 996{
17e72782
TW		 997 enum ieee80211_band band = ch->band;
998 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
999
8622e705 1000 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 1001 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 1002 channel, band);
1003 return -EINVAL;
1004 }
1005
1006 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1007 (priv->band == band))
1008 return 0;
1009
1010 priv->staging_rxon.channel = cpu_to_le16(channel);
1011 if (band == IEEE80211_BAND_5GHZ)
1012 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1013 else
1014 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1015
1016 priv->band = band;
1017
e1623446 1018 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 1019
1020 return 0;
1021}
c7de35cd 1022EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 1023
8ccde88a
SO		 1024void iwl_set_flags_for_band(struct iwl_priv *priv,
1025 enum ieee80211_band band)
1026{
1027 if (band == IEEE80211_BAND_5GHZ) {
1028 priv->staging_rxon.flags &=
1029 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1030 | RXON_FLG_CCK_MSK);
1031 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1032 } else {
1033 /* Copied from iwl_post_associate() */
1034 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1035 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1036 else
1037 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1038
1039 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1040 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1041
1042 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1043 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1044 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1045 }
1046}
1047EXPORT_SYMBOL(iwl_set_flags_for_band);
1048
1049/*
1050 * initialize rxon structure with default values from eeprom
1051 */
1052void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1053{
1054 const struct iwl_channel_info *ch_info;
1055
1056 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1057
1058 switch (mode) {
1059 case NL80211_IFTYPE_AP:
1060 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1061 break;
1062
1063 case NL80211_IFTYPE_STATION:
1064 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1065 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1066 break;
1067
1068 case NL80211_IFTYPE_ADHOC:
1069 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1070 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1071 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1072 RXON_FILTER_ACCEPT_GRP_MSK;
1073 break;
1074
8ccde88a
SO		 1075 default:
1076 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1077 break;
1078 }
1079
1080#if 0
1081 /* TODO: Figure out when short_preamble would be set and cache from
1082 * that */
1083 if (!hw_to_local(priv->hw)->short_preamble)
1084 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1085 else
1086 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1087#endif
1088
1089 ch_info = iwl_get_channel_info(priv, priv->band,
1090 le16_to_cpu(priv->active_rxon.channel));
1091
1092 if (!ch_info)
1093 ch_info = &priv->channel_info[0];
1094
1095 /*
1096 * in some case A channels are all non IBSS
1097 * in this case force B/G channel
1098 */
1099 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1100 !(is_channel_ibss(ch_info)))
1101 ch_info = &priv->channel_info[0];
1102
1103 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1104 priv->band = ch_info->band;
1105
1106 iwl_set_flags_for_band(priv, priv->band);
1107
1108 priv->staging_rxon.ofdm_basic_rates =
1109 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1110 priv->staging_rxon.cck_basic_rates =
1111 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1112
1113 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
1114 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
1115 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1116 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1117 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1118 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1119 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1120}
1121EXPORT_SYMBOL(iwl_connection_init_rx_config);
1122
782571f4 1123static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1124{
1125 const struct ieee80211_supported_band *hw = NULL;
1126 struct ieee80211_rate *rate;
1127 int i;
1128
1129 hw = iwl_get_hw_mode(priv, priv->band);
1130 if (!hw) {
1131 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1132 return;
1133 }
1134
1135 priv->active_rate = 0;
1136 priv->active_rate_basic = 0;
1137
1138 for (i = 0; i < hw->n_bitrates; i++) {
1139 rate = &(hw->bitrates[i]);
1140 if (rate->hw_value < IWL_RATE_COUNT)
1141 priv->active_rate |= (1 << rate->hw_value);
1142 }
1143
e1623446 1144 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
8ccde88a
SO		 1145 priv->active_rate, priv->active_rate_basic);
1146
1147 /*
1148 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1149 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1150 * OFDM
1151 */
1152 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1153 priv->staging_rxon.cck_basic_rates =
1154 ((priv->active_rate_basic &
1155 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1156 else
1157 priv->staging_rxon.cck_basic_rates =
1158 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1159
1160 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1161 priv->staging_rxon.ofdm_basic_rates =
1162 ((priv->active_rate_basic &
1163 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1164 IWL_FIRST_OFDM_RATE) & 0xFF;
1165 else
1166 priv->staging_rxon.ofdm_basic_rates =
1167 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1168}
8ccde88a
SO		 1169
1170void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1171{
1172 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1173 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1174 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
e1623446 1175 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
8ccde88a
SO		 1176 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1177 rxon->channel = csa->channel;
1178 priv->staging_rxon.channel = csa->channel;
1179}
1180EXPORT_SYMBOL(iwl_rx_csa);
1181
1182#ifdef CONFIG_IWLWIFI_DEBUG
1183static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1184{
1185 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1186
e1623446 1187 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
8ccde88a 1188 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1189 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1190 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1191 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1192 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1193 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1194 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1195 rxon->ofdm_basic_rates);
e1623446
TW		 1196 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1197 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1198 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1199 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a
SO		 1200}
1201#endif
1202
1203/**
1204 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1205 */
1206void iwl_irq_handle_error(struct iwl_priv *priv)
1207{
1208 /* Set the FW error flag -- cleared on iwl_down */
1209 set_bit(STATUS_FW_ERROR, &priv->status);
1210
1211 /* Cancel currently queued command. */
1212 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1213
1214#ifdef CONFIG_IWLWIFI_DEBUG
1215 if (priv->debug_level & IWL_DL_FW_ERRORS) {
1216 iwl_dump_nic_error_log(priv);
1217 iwl_dump_nic_event_log(priv);
1218 iwl_print_rx_config_cmd(priv);
1219 }
1220#endif
1221
1222 wake_up_interruptible(&priv->wait_command_queue);
1223
1224 /* Keep the restart process from trying to send host
1225 * commands by clearing the INIT status bit */
1226 clear_bit(STATUS_READY, &priv->status);
1227
1228 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1229 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1230 "Restarting adapter due to uCode error.\n");
1231
8ccde88a
SO		 1232 if (priv->cfg->mod_params->restart_fw)
1233 queue_work(priv->workqueue, &priv->restart);
1234 }
1235}
1236EXPORT_SYMBOL(iwl_irq_handle_error);
1237
1238void iwl_configure_filter(struct ieee80211_hw *hw,
1239 unsigned int changed_flags,
1240 unsigned int *total_flags,
1241 int mc_count, struct dev_addr_list *mc_list)
1242{
1243 struct iwl_priv *priv = hw->priv;
1244 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1245
e1623446 1246 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1247 changed_flags, *total_flags);
1248
1249 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1250 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1251 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1252 else
1253 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1254 }
1255 if (changed_flags & FIF_ALLMULTI) {
1256 if (*total_flags & FIF_ALLMULTI)
1257 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1258 else
1259 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1260 }
1261 if (changed_flags & FIF_CONTROL) {
1262 if (*total_flags & FIF_CONTROL)
1263 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1264 else
1265 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1266 }
1267 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1268 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1269 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1270 else
1271 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1272 }
1273
1274 /* We avoid iwl_commit_rxon here to commit the new filter flags
1275 * since mac80211 will call ieee80211_hw_config immediately.
1276 * (mc_list is not supported at this time). Otherwise, we need to
1277 * queue a background iwl_commit_rxon work.
1278 */
1279
1280 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1281 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1282}
1283EXPORT_SYMBOL(iwl_configure_filter);
1284
6ba87956 1285int iwl_setup_mac(struct iwl_priv *priv)
bf85ea4f 1286{
6ba87956 1287 int ret;
bf85ea4f 1288 struct ieee80211_hw *hw = priv->hw;
e227ceac 1289 hw->rate_control_algorithm = "iwl-agn-rs";
bf85ea4f 1290
566bfe5a 1291 /* Tell mac80211 our characteristics */
605a0bd6 1292 hw->flags = IEEE80211_HW_SIGNAL_DBM |
8b30b1fe 1293 IEEE80211_HW_NOISE_DBM |
4be8c387 1294 IEEE80211_HW_AMPDU_AGGREGATION |
286d9490 1295 IEEE80211_HW_SPECTRUM_MGMT;
f59ac048 1296 hw->wiphy->interface_modes =
f59ac048
LR		 1297 BIT(NL80211_IFTYPE_STATION) |
1298 BIT(NL80211_IFTYPE_ADHOC);
ea4a82dc 1299
2a44f911 1300 hw->wiphy->custom_regulatory = true;
1ecf9fc1
JB		 1301
1302 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1303 /* we create the 802.11 header and a zero-length SSID element */
1304 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
ea4a82dc 1305
bf85ea4f
AK		 1306 /* Default value; 4 EDCA QOS priorities */
1307 hw->queues = 4;
6ba87956 1308
b5d7be5e 1309 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
6ba87956
TW		 1310
1311 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1312 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1313 &priv->bands[IEEE80211_BAND_2GHZ];
1314 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1315 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1316 &priv->bands[IEEE80211_BAND_5GHZ];
1317
1318 ret = ieee80211_register_hw(priv->hw);
1319 if (ret) {
15b1687c 1320 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
6ba87956
TW		 1321 return ret;
1322 }
1323 priv->mac80211_registered = 1;
1324
1325 return 0;
bf85ea4f 1326}
6ba87956 1327EXPORT_SYMBOL(iwl_setup_mac);
bf85ea4f 1328
da154e30
RR		 1329int iwl_set_hw_params(struct iwl_priv *priv)
1330{
1331 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
1332 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1333 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1334 if (priv->cfg->mod_params->amsdu_size_8K)
1335 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1336 else
1337 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1338 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1339
49779293
RR		 1340 if (priv->cfg->mod_params->disable_11n)
1341 priv->cfg->sku &= ~IWL_SKU_N;
1342
da154e30
RR		 1343 /* Device-specific setup */
1344 return priv->cfg->ops->lib->set_hw_params(priv);
1345}
1346EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956
TW		 1347
1348int iwl_init_drv(struct iwl_priv *priv)
c7de35cd
RR		 1349{
1350 int ret;
c7de35cd 1351
c7de35cd
RR		 1352 priv->ibss_beacon = NULL;
1353
1354 spin_lock_init(&priv->lock);
1355 spin_lock_init(&priv->power_data.lock);
1356 spin_lock_init(&priv->sta_lock);
1357 spin_lock_init(&priv->hcmd_lock);
c7de35cd 1358
c7de35cd
RR		 1359 INIT_LIST_HEAD(&priv->free_frames);
1360
1361 mutex_init(&priv->mutex);
1362
1363 /* Clear the driver's (not device's) station table */
e11bc028 1364 priv->cfg->ops->smgmt->clear_station_table(priv);
c7de35cd
RR		 1365
1366 priv->data_retry_limit = -1;
1367 priv->ieee_channels = NULL;
1368 priv->ieee_rates = NULL;
1369 priv->band = IEEE80211_BAND_2GHZ;
1370
05c914fe 1371 priv->iw_mode = NL80211_IFTYPE_STATION;
c7de35cd 1372
12837be1 1373 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
c7de35cd
RR		 1374
1375 /* Choose which receivers/antennas to use */
45823531
AK		 1376 if (priv->cfg->ops->hcmd->set_rxon_chain)
1377 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1378
f53696de 1379 iwl_init_scan_params(priv);
c7de35cd
RR		 1380
1381 iwl_reset_qos(priv);
1382
1383 priv->qos_data.qos_active = 0;
1384 priv->qos_data.qos_cap.val = 0;
1385
c7de35cd 1386 priv->rates_mask = IWL_RATES_MASK;
d25aabb0
WT		 1387 /* If power management is turned on, default to CAM mode */
1388 priv->power_mode = IWL_POWER_MODE_CAM;
630fe9b6 1389 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
c7de35cd
RR		 1390
1391 ret = iwl_init_channel_map(priv);
1392 if (ret) {
15b1687c 1393 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
c7de35cd
RR		 1394 goto err;
1395 }
1396
1397 ret = iwlcore_init_geos(priv);
1398 if (ret) {
15b1687c 1399 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
c7de35cd
RR		 1400 goto err_free_channel_map;
1401 }
534166de 1402 iwlcore_init_hw_rates(priv, priv->ieee_rates);
c7de35cd 1403
c7de35cd
RR		 1404 return 0;
1405
c7de35cd
RR		 1406err_free_channel_map:
1407 iwl_free_channel_map(priv);
1408err:
1409 return ret;
1410}
6ba87956 1411EXPORT_SYMBOL(iwl_init_drv);
c7de35cd 1412
630fe9b6
TW		 1413int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1414{
1415 int ret = 0;
1416 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
daf518de
WF		 1417 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1418 tx_power,
1419 IWL_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1420 return -EINVAL;
1421 }
1422
1423 if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
daf518de
WF		 1424 IWL_WARN(priv, "Requested user TXPOWER %d above upper limit %d.\n",
1425 tx_power,
1426 IWL_TX_POWER_TARGET_POWER_MAX);
630fe9b6
TW		 1427 return -EINVAL;
1428 }
1429
1430 if (priv->tx_power_user_lmt != tx_power)
1431 force = true;
1432
1433 priv->tx_power_user_lmt = tx_power;
1434
019fb97d
MA		 1435 /* if nic is not up don't send command */
1436 if (!iwl_is_ready_rf(priv))
1437 return ret;
1438
630fe9b6
TW		 1439 if (force && priv->cfg->ops->lib->send_tx_power)
1440 ret = priv->cfg->ops->lib->send_tx_power(priv);
1441
1442 return ret;
1443}
1444EXPORT_SYMBOL(iwl_set_tx_power);
1445
6ba87956 1446void iwl_uninit_drv(struct iwl_priv *priv)
bf85ea4f 1447{
6e21f2c1 1448 iwl_calib_free_results(priv);
6ba87956
TW		 1449 iwlcore_free_geos(priv);
1450 iwl_free_channel_map(priv);
261415f7 1451 kfree(priv->scan);
bf85ea4f 1452}
6ba87956 1453EXPORT_SYMBOL(iwl_uninit_drv);
bf85ea4f 1454
0ad91a35
WT		 1455
1456void iwl_disable_interrupts(struct iwl_priv *priv)
1457{
1458 clear_bit(STATUS_INT_ENABLED, &priv->status);
1459
1460 /* disable interrupts from uCode/NIC to host */
1461 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1462
1463 /* acknowledge/clear/reset any interrupts still pending
1464 * from uCode or flow handler (Rx/Tx DMA) */
1465 iwl_write32(priv, CSR_INT, 0xffffffff);
1466 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
e1623446 1467 IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
0ad91a35
WT		 1468}
1469EXPORT_SYMBOL(iwl_disable_interrupts);
1470
1471void iwl_enable_interrupts(struct iwl_priv *priv)
1472{
e1623446 1473 IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
0ad91a35
WT		 1474 set_bit(STATUS_INT_ENABLED, &priv->status);
1475 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
1476}
1477EXPORT_SYMBOL(iwl_enable_interrupts);
1478
f17d08a6
AK		 1479irqreturn_t iwl_isr(int irq, void *data)
1480{
1481 struct iwl_priv *priv = data;
1482 u32 inta, inta_mask;
1483 u32 inta_fh;
1484 if (!priv)
1485 return IRQ_NONE;
1486
1487 spin_lock(&priv->lock);
1488
1489 /* Disable (but don't clear!) interrupts here to avoid
1490 * back-to-back ISRs and sporadic interrupts from our NIC.
1491 * If we have something to service, the tasklet will re-enable ints.
1492 * If we *don't* have something, we'll re-enable before leaving here. */
1493 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1494 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1495
1496 /* Discover which interrupts are active/pending */
1497 inta = iwl_read32(priv, CSR_INT);
1498 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1499
1500 /* Ignore interrupt if there's nothing in NIC to service.
1501 * This may be due to IRQ shared with another device,
1502 * or due to sporadic interrupts thrown from our NIC. */
1503 if (!inta && !inta_fh) {
1504 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1505 goto none;
1506 }
1507
1508 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1509 /* Hardware disappeared. It might have already raised
1510 * an interrupt */
1511 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1512 goto unplugged;
1513 }
1514
1515 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1516 inta, inta_mask, inta_fh);
1517
1518 inta &= ~CSR_INT_BIT_SCD;
1519
1520 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1521 if (likely(inta || inta_fh))
1522 tasklet_schedule(&priv->irq_tasklet);
1523
1524 unplugged:
1525 spin_unlock(&priv->lock);
1526 return IRQ_HANDLED;
1527
1528 none:
1529 /* re-enable interrupts here since we don't have anything to service. */
1530 /* only Re-enable if diabled by irq */
1531 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1532 iwl_enable_interrupts(priv);
1533 spin_unlock(&priv->lock);
1534 return IRQ_NONE;
1535}
1536EXPORT_SYMBOL(iwl_isr);
1537
17f841cd
SO		 1538int iwl_send_bt_config(struct iwl_priv *priv)
1539{
1540 struct iwl_bt_cmd bt_cmd = {
1541 .flags = 3,
1542 .lead_time = 0xAA,
1543 .max_kill = 1,
1544 .kill_ack_mask = 0,
1545 .kill_cts_mask = 0,
1546 };
1547
1548 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1549 sizeof(struct iwl_bt_cmd), &bt_cmd);
1550}
1551EXPORT_SYMBOL(iwl_send_bt_config);
1552
49ea8596
EG		 1553int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
1554{
1555 u32 stat_flags = 0;
1556 struct iwl_host_cmd cmd = {
1557 .id = REPLY_STATISTICS_CMD,
1558 .meta.flags = flags,
1559 .len = sizeof(stat_flags),
1560 .data = (u8 *) &stat_flags,
1561 };
1562 return iwl_send_cmd(priv, &cmd);
1563}
1564EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1565
b0692f2f
EG		 1566/**
1567 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1568 * using sample data 100 bytes apart. If these sample points are good,
1569 * it's a pretty good bet that everything between them is good, too.
1570 */
1571static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1572{
1573 u32 val;
1574 int ret = 0;
1575 u32 errcnt = 0;
1576 u32 i;
1577
e1623446 1578 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f
EG		 1579
1580 ret = iwl_grab_nic_access(priv);
1581 if (ret)
1582 return ret;
1583
1584 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1585 /* read data comes through single port, auto-incr addr */
1586 /* NOTE: Use the debugless read so we don't flood kernel log
1587 * if IWL_DL_IO is set */
1588 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1589 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1590 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1591 if (val != le32_to_cpu(*image)) {
1592 ret = -EIO;
1593 errcnt++;
1594 if (errcnt >= 3)
1595 break;
1596 }
1597 }
1598
1599 iwl_release_nic_access(priv);
1600
1601 return ret;
1602}
1603
1604/**
1605 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1606 * looking at all data.
1607 */
1608static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1609 u32 len)
1610{
1611 u32 val;
1612 u32 save_len = len;
1613 int ret = 0;
1614 u32 errcnt;
1615
e1623446 1616 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f
EG		 1617
1618 ret = iwl_grab_nic_access(priv);
1619 if (ret)
1620 return ret;
1621
250bdd21
SO		 1622 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1623 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1624
1625 errcnt = 0;
1626 for (; len > 0; len -= sizeof(u32), image++) {
1627 /* read data comes through single port, auto-incr addr */
1628 /* NOTE: Use the debugless read so we don't flood kernel log
1629 * if IWL_DL_IO is set */
1630 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1631 if (val != le32_to_cpu(*image)) {
15b1687c 1632 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 1633 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1634 save_len - len, val, le32_to_cpu(*image));
1635 ret = -EIO;
1636 errcnt++;
1637 if (errcnt >= 20)
1638 break;
1639 }
1640 }
1641
1642 iwl_release_nic_access(priv);
1643
1644 if (!errcnt)
e1623446
TW		 1645 IWL_DEBUG_INFO(priv,
1646 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 1647
1648 return ret;
1649}
1650
1651/**
1652 * iwl_verify_ucode - determine which instruction image is in SRAM,
1653 * and verify its contents
1654 */
1655int iwl_verify_ucode(struct iwl_priv *priv)
1656{
1657 __le32 *image;
1658 u32 len;
1659 int ret;
1660
1661 /* Try bootstrap */
1662 image = (__le32 *)priv->ucode_boot.v_addr;
1663 len = priv->ucode_boot.len;
1664 ret = iwlcore_verify_inst_sparse(priv, image, len);
1665 if (!ret) {
e1623446 1666 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 1667 return 0;
1668 }
1669
1670 /* Try initialize */
1671 image = (__le32 *)priv->ucode_init.v_addr;
1672 len = priv->ucode_init.len;
1673 ret = iwlcore_verify_inst_sparse(priv, image, len);
1674 if (!ret) {
e1623446 1675 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 1676 return 0;
1677 }
1678
1679 /* Try runtime/protocol */
1680 image = (__le32 *)priv->ucode_code.v_addr;
1681 len = priv->ucode_code.len;
1682 ret = iwlcore_verify_inst_sparse(priv, image, len);
1683 if (!ret) {
e1623446 1684 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 1685 return 0;
1686 }
1687
15b1687c 1688 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 1689
1690 /* Since nothing seems to match, show first several data entries in
1691 * instruction SRAM, so maybe visual inspection will give a clue.
1692 * Selection of bootstrap image (vs. other images) is arbitrary. */
1693 image = (__le32 *)priv->ucode_boot.v_addr;
1694 len = priv->ucode_boot.len;
1695 ret = iwl_verify_inst_full(priv, image, len);
1696
1697 return ret;
1698}
1699EXPORT_SYMBOL(iwl_verify_ucode);
1700
56e12615
JS		 1701
1702static const char *desc_lookup_text[] = {
1703 "OK",
1704 "FAIL",
1705 "BAD_PARAM",
1706 "BAD_CHECKSUM",
1707 "NMI_INTERRUPT_WDG",
1708 "SYSASSERT",
1709 "FATAL_ERROR",
1710 "BAD_COMMAND",
1711 "HW_ERROR_TUNE_LOCK",
1712 "HW_ERROR_TEMPERATURE",
1713 "ILLEGAL_CHAN_FREQ",
1714 "VCC_NOT_STABLE",
1715 "FH_ERROR",
1716 "NMI_INTERRUPT_HOST",
1717 "NMI_INTERRUPT_ACTION_PT",
1718 "NMI_INTERRUPT_UNKNOWN",
1719 "UCODE_VERSION_MISMATCH",
1720 "HW_ERROR_ABS_LOCK",
1721 "HW_ERROR_CAL_LOCK_FAIL",
1722 "NMI_INTERRUPT_INST_ACTION_PT",
1723 "NMI_INTERRUPT_DATA_ACTION_PT",
1724 "NMI_TRM_HW_ER",
1725 "NMI_INTERRUPT_TRM",
1726 "NMI_INTERRUPT_BREAK_POINT"
1727 "DEBUG_0",
1728 "DEBUG_1",
1729 "DEBUG_2",
1730 "DEBUG_3",
1731 "UNKNOWN"
1732};
1733
ede0cba4
EK		 1734static const char *desc_lookup(int i)
1735{
56e12615
JS		 1736 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1737
1738 if (i < 0 || i > max)
1739 i = max;
ede0cba4 1740
56e12615 1741 return desc_lookup_text[i];
ede0cba4
EK		 1742}
1743
1744#define ERROR_START_OFFSET (1 * sizeof(u32))
1745#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1746
1747void iwl_dump_nic_error_log(struct iwl_priv *priv)
1748{
1749 u32 data2, line;
1750 u32 desc, time, count, base, data1;
1751 u32 blink1, blink2, ilink1, ilink2;
e1dfc085 1752 int ret;
ede0cba4 1753
e1dfc085
GG		 1754 if (priv->ucode_type == UCODE_INIT)
1755 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1756 else
1757 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
ede0cba4
EK		 1758
1759 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
15b1687c 1760 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
ede0cba4
EK		 1761 return;
1762 }
1763
e1dfc085
GG		 1764 ret = iwl_grab_nic_access(priv);
1765 if (ret) {
39aadf8c 1766 IWL_WARN(priv, "Can not read from adapter at this time.\n");
ede0cba4
EK		 1767 return;
1768 }
1769
1770 count = iwl_read_targ_mem(priv, base);
1771
1772 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT		 1773 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1774 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1775 priv->status, count);
ede0cba4
EK		 1776 }
1777
1778 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1779 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1780 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1781 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1782 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1783 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1784 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1785 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1786 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1787
15b1687c 1788 IWL_ERR(priv, "Desc Time "
ede0cba4 1789 "data1 data2 line\n");
15b1687c 1790 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
ede0cba4 1791 desc_lookup(desc), desc, time, data1, data2, line);
15b1687c
WT		 1792 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1793 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
ede0cba4
EK		 1794 ilink1, ilink2);
1795
1796 iwl_release_nic_access(priv);
1797}
1798EXPORT_SYMBOL(iwl_dump_nic_error_log);
1799
189a2b59
EK		 1800#define EVENT_START_OFFSET (4 * sizeof(u32))
1801
1802/**
1803 * iwl_print_event_log - Dump error event log to syslog
1804 *
a33c2f47 1805 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
189a2b59 1806 */
a33c2f47 1807static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
189a2b59
EK		 1808 u32 num_events, u32 mode)
1809{
1810 u32 i;
1811 u32 base; /* SRAM byte address of event log header */
1812 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1813 u32 ptr; /* SRAM byte address of log data */
1814 u32 ev, time, data; /* event log data */
1815
1816 if (num_events == 0)
1817 return;
e1dfc085
GG		 1818 if (priv->ucode_type == UCODE_INIT)
1819 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1820 else
1821 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
189a2b59
EK		 1822
1823 if (mode == 0)
1824 event_size = 2 * sizeof(u32);
1825 else
1826 event_size = 3 * sizeof(u32);
1827
1828 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1829
1830 /* "time" is actually "data" for mode 0 (no timestamp).
1831 * place event id # at far right for easier visual parsing. */
1832 for (i = 0; i < num_events; i++) {
1833 ev = iwl_read_targ_mem(priv, ptr);
1834 ptr += sizeof(u32);
1835 time = iwl_read_targ_mem(priv, ptr);
1836 ptr += sizeof(u32);
77c5d08e
TW		 1837 if (mode == 0) {
1838 /* data, ev */
15b1687c 1839 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
77c5d08e 1840 } else {
189a2b59
EK		 1841 data = iwl_read_targ_mem(priv, ptr);
1842 ptr += sizeof(u32);
15b1687c 1843 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
77c5d08e 1844 time, data, ev);
189a2b59
EK		 1845 }
1846 }
1847}
189a2b59
EK		 1848
1849void iwl_dump_nic_event_log(struct iwl_priv *priv)
1850{
e1dfc085 1851 int ret;
189a2b59
EK		 1852 u32 base; /* SRAM byte address of event log header */
1853 u32 capacity; /* event log capacity in # entries */
1854 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1855 u32 num_wraps; /* # times uCode wrapped to top of log */
1856 u32 next_entry; /* index of next entry to be written by uCode */
1857 u32 size; /* # entries that we'll print */
1858
e1dfc085
GG		 1859 if (priv->ucode_type == UCODE_INIT)
1860 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1861 else
1862 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1863
189a2b59 1864 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
15b1687c 1865 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
189a2b59
EK		 1866 return;
1867 }
1868
e1dfc085
GG		 1869 ret = iwl_grab_nic_access(priv);
1870 if (ret) {
39aadf8c 1871 IWL_WARN(priv, "Can not read from adapter at this time.\n");
189a2b59
EK		 1872 return;
1873 }
1874
1875 /* event log header */
1876 capacity = iwl_read_targ_mem(priv, base);
1877 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1878 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1879 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1880
1881 size = num_wraps ? capacity : next_entry;
1882
1883 /* bail out if nothing in log */
1884 if (size == 0) {
15b1687c 1885 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
189a2b59
EK		 1886 iwl_release_nic_access(priv);
1887 return;
1888 }
1889
15b1687c 1890 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
189a2b59
EK		 1891 size, num_wraps);
1892
1893 /* if uCode has wrapped back to top of log, start at the oldest entry,
1894 * i.e the next one that uCode would fill. */
1895 if (num_wraps)
1896 iwl_print_event_log(priv, next_entry,
1897 capacity - next_entry, mode);
1898 /* (then/else) start at top of log */
1899 iwl_print_event_log(priv, 0, next_entry, mode);
1900
1901 iwl_release_nic_access(priv);
1902}
1903EXPORT_SYMBOL(iwl_dump_nic_event_log);
1904
47f4a587
EG		 1905void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1906{
1907 struct iwl_ct_kill_config cmd;
1908 unsigned long flags;
1909 int ret = 0;
1910
1911 spin_lock_irqsave(&priv->lock, flags);
1912 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1913 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1914 spin_unlock_irqrestore(&priv->lock, flags);
1915
1916 cmd.critical_temperature_R =
1917 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1918
47f4a587
EG		 1919 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1920 sizeof(cmd), &cmd);
1921 if (ret)
15b1687c 1922 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
47f4a587 1923 else
e1623446 1924 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
47f4a587
EG		 1925 "critical temperature is %d\n",
1926 cmd.critical_temperature_R);
1927}
1928EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1929
0ad91a35 1930
14a08a7f
EG		 1931/*
1932 * CARD_STATE_CMD
1933 *
1934 * Use: Sets the device's internal card state to enable, disable, or halt
1935 *
1936 * When in the 'enable' state the card operates as normal.
1937 * When in the 'disable' state, the card enters into a low power mode.
1938 * When in the 'halt' state, the card is shut down and must be fully
1939 * restarted to come back on.
1940 */
c496294e 1941int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1942{
1943 struct iwl_host_cmd cmd = {
1944 .id = REPLY_CARD_STATE_CMD,
1945 .len = sizeof(u32),
1946 .data = &flags,
1947 .meta.flags = meta_flag,
1948 };
1949
1950 return iwl_send_cmd(priv, &cmd);
1951}
c496294e 1952EXPORT_SYMBOL(iwl_send_card_state);
14a08a7f
EG		 1953
1954void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv)
1955{
1956 unsigned long flags;
1957
1958 if (test_bit(STATUS_RF_KILL_SW, &priv->status))
1959 return;
1960
e1623446 1961 IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO OFF\n");
14a08a7f
EG		 1962
1963 iwl_scan_cancel(priv);
1964 /* FIXME: This is a workaround for AP */
05c914fe 1965 if (priv->iw_mode != NL80211_IFTYPE_AP) {
14a08a7f
EG		 1966 spin_lock_irqsave(&priv->lock, flags);
1967 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
1968 CSR_UCODE_SW_BIT_RFKILL);
1969 spin_unlock_irqrestore(&priv->lock, flags);
1970 /* call the host command only if no hw rf-kill set */
1971 if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
1972 iwl_is_ready(priv))
1973 iwl_send_card_state(priv,
1974 CARD_STATE_CMD_DISABLE, 0);
1975 set_bit(STATUS_RF_KILL_SW, &priv->status);
1976 /* make sure mac80211 stop sending Tx frame */
1977 if (priv->mac80211_registered)
1978 ieee80211_stop_queues(priv->hw);
1979 }
1980}
1981EXPORT_SYMBOL(iwl_radio_kill_sw_disable_radio);
1982
1983int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv)
1984{
1985 unsigned long flags;
1986
1987 if (!test_bit(STATUS_RF_KILL_SW, &priv->status))
1988 return 0;
1989
e1623446 1990 IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO ON\n");
14a08a7f
EG		 1991
1992 spin_lock_irqsave(&priv->lock, flags);
1993 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1994
a9efa652
EG		 1995 /* If the driver is up it will receive CARD_STATE_NOTIFICATION
1996 * notification where it will clear SW rfkill status.
1997 * Setting it here would break the handler. Only if the
1998 * interface is down we can set here since we don't
1999 * receive any further notification.
2000 */
2001 if (!priv->is_open)
2002 clear_bit(STATUS_RF_KILL_SW, &priv->status);
14a08a7f
EG		 2003 spin_unlock_irqrestore(&priv->lock, flags);
2004
2005 /* wake up ucode */
2006 msleep(10);
2007
2008 spin_lock_irqsave(&priv->lock, flags);
2009 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2010 if (!iwl_grab_nic_access(priv))
2011 iwl_release_nic_access(priv);
2012 spin_unlock_irqrestore(&priv->lock, flags);
2013
2014 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
e1623446 2015 IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
14a08a7f
EG		 2016 "disabled by HW switch\n");
2017 return 0;
2018 }
2019
edb34228
MA		 2020 /* when driver is up while rfkill is on, it wont receive
2021 * any CARD_STATE_NOTIFICATION notifications so we have to
2022 * restart it in here
2023 */
2024 if (priv->is_open && !test_bit(STATUS_ALIVE, &priv->status)) {
2025 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2026 if (!iwl_is_rfkill(priv))
2027 queue_work(priv->workqueue, &priv->up);
2028 }
2029
a9efa652
EG		 2030 /* If the driver is already loaded, it will receive
2031 * CARD_STATE_NOTIFICATION notifications and the handler will
2032 * call restart to reload the driver.
2033 */
14a08a7f
EG		 2034 return 1;
2035}
2036EXPORT_SYMBOL(iwl_radio_kill_sw_enable_radio);
c0af96a6
SO		 2037
2038void iwl_bg_rf_kill(struct work_struct *work)
2039{
2040 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
2041
2042 wake_up_interruptible(&priv->wait_command_queue);
2043
2044 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2045 return;
2046
2047 mutex_lock(&priv->mutex);
2048
2049 if (!iwl_is_rfkill(priv)) {
e1623446 2050 IWL_DEBUG_RF_KILL(priv,
c0af96a6
SO		 2051 "HW and/or SW RF Kill no longer active, restarting "
2052 "device\n");
2053 if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
55a3757a 2054 priv->is_open)
c0af96a6
SO		 2055 queue_work(priv->workqueue, &priv->restart);
2056 } else {
2057 /* make sure mac80211 stop sending Tx frame */
2058 if (priv->mac80211_registered)
2059 ieee80211_stop_queues(priv->hw);
2060
2061 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
e1623446 2062 IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
c0af96a6
SO		 2063 "disabled by SW switch\n");
2064 else
2065 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
2066 "Kill switch must be turned off for "
2067 "wireless networking to work.\n");
2068 }
2069 mutex_unlock(&priv->mutex);
2070 iwl_rfkill_set_hw_state(priv);
2071}
2072EXPORT_SYMBOL(iwl_bg_rf_kill);
030f05ed
AK		 2073
2074void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2075 struct iwl_rx_mem_buffer *rxb)
2076{
2077#ifdef CONFIG_IWLWIFI_DEBUG
2078 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2079 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2080 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2081 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2082#endif
2083}
2084EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2085
2086void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2087 struct iwl_rx_mem_buffer *rxb)
2088{
2089 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2090 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2091 "notification for %s:\n",
2092 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2093 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
2094}
2095EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 2096
2097void iwl_rx_reply_error(struct iwl_priv *priv,
2098 struct iwl_rx_mem_buffer *rxb)
2099{
2100 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2101
2102 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2103 "seq 0x%04X ser 0x%08X\n",
2104 le32_to_cpu(pkt->u.err_resp.error_type),
2105 get_cmd_string(pkt->u.err_resp.cmd_id),
2106 pkt->u.err_resp.cmd_id,
2107 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2108 le32_to_cpu(pkt->u.err_resp.error_info));
2109}
2110EXPORT_SYMBOL(iwl_rx_reply_error);
2111
a83b9141
WYG		 2112void iwl_clear_isr_stats(struct iwl_priv *priv)
2113{
2114 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2115}
2116EXPORT_SYMBOL(iwl_clear_isr_stats);
2117
488829f1
AK		 2118int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2119 const struct ieee80211_tx_queue_params *params)
2120{
2121 struct iwl_priv *priv = hw->priv;
2122 unsigned long flags;
2123 int q;
2124
2125 IWL_DEBUG_MAC80211(priv, "enter\n");
2126
2127 if (!iwl_is_ready_rf(priv)) {
2128 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2129 return -EIO;
2130 }
2131
2132 if (queue >= AC_NUM) {
2133 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2134 return 0;
2135 }
2136
2137 q = AC_NUM - 1 - queue;
2138
2139 spin_lock_irqsave(&priv->lock, flags);
2140
2141 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2142 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2143 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2144 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2145 cpu_to_le16((params->txop * 32));
2146
2147 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2148 priv->qos_data.qos_active = 1;
2149
2150 if (priv->iw_mode == NL80211_IFTYPE_AP)
2151 iwl_activate_qos(priv, 1);
2152 else if (priv->assoc_id && iwl_is_associated(priv))
2153 iwl_activate_qos(priv, 0);
2154
2155 spin_unlock_irqrestore(&priv->lock, flags);
2156
2157 IWL_DEBUG_MAC80211(priv, "leave\n");
2158 return 0;
2159}
2160EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 2161
2162static void iwl_ht_conf(struct iwl_priv *priv,
2163 struct ieee80211_bss_conf *bss_conf)
2164{
2165 struct ieee80211_sta_ht_cap *ht_conf;
2166 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2167 struct ieee80211_sta *sta;
2168
2169 IWL_DEBUG_MAC80211(priv, "enter: \n");
2170
2171 if (!iwl_conf->is_ht)
2172 return;
2173
2174
2175 /*
2176 * It is totally wrong to base global information on something
2177 * that is valid only when associated, alas, this driver works
2178 * that way and I don't know how to fix it.
2179 */
2180
2181 rcu_read_lock();
2182 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2183 if (!sta) {
2184 rcu_read_unlock();
2185 return;
2186 }
2187 ht_conf = &sta->ht_cap;
2188
2189 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
2190 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
2191 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
2192 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
2193
2194 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
2195 iwl_conf->max_amsdu_size =
2196 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
2197
2198 iwl_conf->supported_chan_width =
2199 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
2200
2201 /*
2202 * XXX: The HT configuration needs to be moved into iwl_mac_config()
2203 * to be done there correctly.
2204 */
2205
2206 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
2207 if (conf_is_ht40_minus(&priv->hw->conf))
2208 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2209 else if (conf_is_ht40_plus(&priv->hw->conf))
2210 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2211
2212 /* If no above or below channel supplied disable FAT channel */
2213 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
2214 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
2215 iwl_conf->supported_chan_width = 0;
2216
2217 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2218
2219 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2220
2221 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
2222 iwl_conf->ht_protection =
9ed6bcce 2223 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
5bbe233b 2224 iwl_conf->non_GF_STA_present =
9ed6bcce 2225 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b
AK		 2226
2227 rcu_read_unlock();
2228
2229 IWL_DEBUG_MAC80211(priv, "leave\n");
2230}
2231
2232#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2233void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 2234 struct ieee80211_vif *vif,
2235 struct ieee80211_bss_conf *bss_conf,
2236 u32 changes)
5bbe233b
AK		 2237{
2238 struct iwl_priv *priv = hw->priv;
3a650292 2239 int ret;
5bbe233b
AK		 2240
2241 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2242
2d0ddec5
JB		 2243 if (!iwl_is_alive(priv))
2244 return;
2245
2246 mutex_lock(&priv->mutex);
2247
2248 if (changes & BSS_CHANGED_BEACON &&
2249 priv->iw_mode == NL80211_IFTYPE_AP) {
2250 dev_kfree_skb(priv->ibss_beacon);
2251 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2252 }
2253
2254 if ((changes & BSS_CHANGED_BSSID) && !iwl_is_rfkill(priv)) {
2255 /* If there is currently a HW scan going on in the background
2256 * then we need to cancel it else the RXON below will fail. */
2257 if (iwl_scan_cancel_timeout(priv, 100)) {
2258 IWL_WARN(priv, "Aborted scan still in progress "
2259 "after 100ms\n");
2260 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2261 mutex_unlock(&priv->mutex);
2262 return;
2263 }
2264 memcpy(priv->staging_rxon.bssid_addr,
2265 bss_conf->bssid, ETH_ALEN);
2266
2267 /* TODO: Audit driver for usage of these members and see
2268 * if mac80211 deprecates them (priv->bssid looks like it
2269 * shouldn't be there, but I haven't scanned the IBSS code
2270 * to verify) - jpk */
2271 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2272
2273 if (priv->iw_mode == NL80211_IFTYPE_AP)
2274 iwlcore_config_ap(priv);
2275 else {
2276 int rc = iwlcore_commit_rxon(priv);
2277 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
2278 iwl_rxon_add_station(
2279 priv, priv->active_rxon.bssid_addr, 1);
2280 }
2281 } else if (!iwl_is_rfkill(priv)) {
2282 iwl_scan_cancel_timeout(priv, 100);
2283 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2284 iwlcore_commit_rxon(priv);
2285 }
2286
2287 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2288 changes & BSS_CHANGED_BEACON) {
2289 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2290
2291 if (beacon)
2292 iwl_mac_beacon_update(hw, beacon);
2293 }
2294
2295 mutex_unlock(&priv->mutex);
2296
5bbe233b
AK		 2297 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2298 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2299 bss_conf->use_short_preamble);
2300 if (bss_conf->use_short_preamble)
2301 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2302 else
2303 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2304 }
2305
2306 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2307 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2308 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2309 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2310 else
2311 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2312 }
2313
2314 if (changes & BSS_CHANGED_HT) {
2315 iwl_ht_conf(priv, bss_conf);
45823531
AK		 2316
2317 if (priv->cfg->ops->hcmd->set_rxon_chain)
2318 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 2319 }
2320
2321 if (changes & BSS_CHANGED_ASSOC) {
2322 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2323 /* This should never happen as this function should
2324 * never be called from interrupt context. */
2325 if (WARN_ON_ONCE(in_interrupt()))
2326 return;
2327 if (bss_conf->assoc) {
2328 priv->assoc_id = bss_conf->aid;
2329 priv->beacon_int = bss_conf->beacon_int;
2330 priv->power_data.dtim_period = bss_conf->dtim_period;
2331 priv->timestamp = bss_conf->timestamp;
2332 priv->assoc_capability = bss_conf->assoc_capability;
2333
2334 /* we have just associated, don't start scan too early
2335 * leave time for EAPOL exchange to complete
2336 */
2337 priv->next_scan_jiffies = jiffies +
2338 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2339 mutex_lock(&priv->mutex);
2340 priv->cfg->ops->lib->post_associate(priv);
2341 mutex_unlock(&priv->mutex);
2342 } else {
2343 priv->assoc_id = 0;
2344 IWL_DEBUG_MAC80211(priv, "DISASSOC %d\n", bss_conf->assoc);
2345 }
2346 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2347 IWL_DEBUG_MAC80211(priv, "Associated Changes %d\n", changes);
3a650292
MA		 2348 ret = iwl_send_rxon_assoc(priv);
2349 if (!ret)
2350 /* Sync active_rxon with latest change. */
2351 memcpy((void *)&priv->active_rxon,
2352 &priv->staging_rxon,
2353 sizeof(struct iwl_rxon_cmd));
5bbe233b 2354 }
2d0ddec5 2355 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 2356}
2357EXPORT_SYMBOL(iwl_bss_info_changed);
2358
9944b938
AK		 2359int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2360{
2361 struct iwl_priv *priv = hw->priv;
2362 unsigned long flags;
2363 __le64 timestamp;
2364
2365 IWL_DEBUG_MAC80211(priv, "enter\n");
2366
2367 if (!iwl_is_ready_rf(priv)) {
2368 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2369 return -EIO;
2370 }
2371
2372 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2373 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2374 return -EIO;
2375 }
2376
2377 spin_lock_irqsave(&priv->lock, flags);
2378
2379 if (priv->ibss_beacon)
2380 dev_kfree_skb(priv->ibss_beacon);
2381
2382 priv->ibss_beacon = skb;
2383
2384 priv->assoc_id = 0;
2385 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2386 priv->timestamp = le64_to_cpu(timestamp);
2387
2388 IWL_DEBUG_MAC80211(priv, "leave\n");
2389 spin_unlock_irqrestore(&priv->lock, flags);
2390
2391 iwl_reset_qos(priv);
2392
2393 priv->cfg->ops->lib->post_associate(priv);
2394
2395
2396 return 0;
2397}
2398EXPORT_SYMBOL(iwl_mac_beacon_update);
2399
727882d6
AK		 2400int iwl_set_mode(struct iwl_priv *priv, int mode)
2401{
2402 if (mode == NL80211_IFTYPE_ADHOC) {
2403 const struct iwl_channel_info *ch_info;
2404
2405 ch_info = iwl_get_channel_info(priv,
2406 priv->band,
2407 le16_to_cpu(priv->staging_rxon.channel));
2408
2409 if (!ch_info || !is_channel_ibss(ch_info)) {
2410 IWL_ERR(priv, "channel %d not IBSS channel\n",
2411 le16_to_cpu(priv->staging_rxon.channel));
2412 return -EINVAL;
2413 }
2414 }
2415
2416 iwl_connection_init_rx_config(priv, mode);
2417
2418 if (priv->cfg->ops->hcmd->set_rxon_chain)
2419 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2420
2421 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2422
2423 priv->cfg->ops->smgmt->clear_station_table(priv);
2424
2425 /* dont commit rxon if rf-kill is on*/
2426 if (!iwl_is_ready_rf(priv))
2427 return -EAGAIN;
2428
2429 cancel_delayed_work(&priv->scan_check);
2430 if (iwl_scan_cancel_timeout(priv, 100)) {
2431 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2432 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2433 return -EAGAIN;
2434 }
2435
2436 iwlcore_commit_rxon(priv);
2437
2438 return 0;
2439}
2440EXPORT_SYMBOL(iwl_set_mode);
2441
cbb6ab94
AK		 2442int iwl_mac_add_interface(struct ieee80211_hw *hw,
2443 struct ieee80211_if_init_conf *conf)
2444{
2445 struct iwl_priv *priv = hw->priv;
2446 unsigned long flags;
2447
2448 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2449
2450 if (priv->vif) {
2451 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2452 return -EOPNOTSUPP;
2453 }
2454
2455 spin_lock_irqsave(&priv->lock, flags);
2456 priv->vif = conf->vif;
2457 priv->iw_mode = conf->type;
2458
2459 spin_unlock_irqrestore(&priv->lock, flags);
2460
2461 mutex_lock(&priv->mutex);
2462
2463 if (conf->mac_addr) {
2464 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2465 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2466 }
2467
2468 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2469 /* we are not ready, will run again when ready */
2470 set_bit(STATUS_MODE_PENDING, &priv->status);
2471
2472 mutex_unlock(&priv->mutex);
2473
2474 IWL_DEBUG_MAC80211(priv, "leave\n");
2475 return 0;
2476}
2477EXPORT_SYMBOL(iwl_mac_add_interface);
2478
d8052319
AK		 2479void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2480 struct ieee80211_if_init_conf *conf)
2481{
2482 struct iwl_priv *priv = hw->priv;
2483
2484 IWL_DEBUG_MAC80211(priv, "enter\n");
2485
2486 mutex_lock(&priv->mutex);
2487
2488 if (iwl_is_ready_rf(priv)) {
2489 iwl_scan_cancel_timeout(priv, 100);
2490 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2491 iwlcore_commit_rxon(priv);
2492 }
2493 if (priv->vif == conf->vif) {
2494 priv->vif = NULL;
2495 memset(priv->bssid, 0, ETH_ALEN);
2496 }
2497 mutex_unlock(&priv->mutex);
2498
2499 IWL_DEBUG_MAC80211(priv, "leave\n");
2500
2501}
2502EXPORT_SYMBOL(iwl_mac_remove_interface);
2503
4808368d
AK		 2504/**
2505 * iwl_mac_config - mac80211 config callback
2506 *
2507 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2508 * be set inappropriately and the driver currently sets the hardware up to
2509 * use it whenever needed.
2510 */
2511int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2512{
2513 struct iwl_priv *priv = hw->priv;
2514 const struct iwl_channel_info *ch_info;
2515 struct ieee80211_conf *conf = &hw->conf;
2516 unsigned long flags = 0;
2517 int ret = 0;
2518 u16 ch;
2519 int scan_active = 0;
2520
2521 mutex_lock(&priv->mutex);
2522
4808368d
AK		 2523 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2524 conf->channel->hw_value, changed);
2525
2526 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2527 test_bit(STATUS_SCANNING, &priv->status))) {
2528 scan_active = 1;
2529 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2530 }
2531
2532
2533 /* during scanning mac80211 will delay channel setting until
2534 * scan finish with changed = 0
2535 */
2536 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2537 if (scan_active)
2538 goto set_ch_out;
2539
2540 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2541 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2542 if (!is_channel_valid(ch_info)) {
2543 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2544 ret = -EINVAL;
2545 goto set_ch_out;
2546 }
2547
2548 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2549 !is_channel_ibss(ch_info)) {
2550 IWL_ERR(priv, "channel %d in band %d not "
2551 "IBSS channel\n",
2552 conf->channel->hw_value, conf->channel->band);
2553 ret = -EINVAL;
2554 goto set_ch_out;
2555 }
2556
2557 priv->current_ht_config.is_ht = conf_is_ht(conf);
2558
2559 spin_lock_irqsave(&priv->lock, flags);
2560
2561
2562 /* if we are switching from ht to 2.4 clear flags
2563 * from any ht related info since 2.4 does not
2564 * support ht */
2565 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2566 priv->staging_rxon.flags = 0;
2567
2568 iwl_set_rxon_channel(priv, conf->channel);
2569
2570 iwl_set_flags_for_band(priv, conf->channel->band);
2571 spin_unlock_irqrestore(&priv->lock, flags);
2572 set_ch_out:
2573 /* The list of supported rates and rate mask can be different
2574 * for each band; since the band may have changed, reset
2575 * the rate mask to what mac80211 lists */
2576 iwl_set_rate(priv);
2577 }
2578
2579 if (changed & IEEE80211_CONF_CHANGE_PS) {
2580 if (conf->flags & IEEE80211_CONF_PS)
2581 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2582 else
2583 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2584 if (ret)
2585 IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
2586
2587 }
2588
2589 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2590 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2591 priv->tx_power_user_lmt, conf->power_level);
2592
2593 iwl_set_tx_power(priv, conf->power_level, false);
2594 }
2595
2596 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2597 if (priv->cfg->ops->hcmd->set_rxon_chain)
2598 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2599
2600 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
2601 if (conf->radio_enabled &&
2602 iwl_radio_kill_sw_enable_radio(priv)) {
2603 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
2604 "waiting for uCode\n");
2605 goto out;
2606 }
2607
2608 if (!conf->radio_enabled)
2609 iwl_radio_kill_sw_disable_radio(priv);
2610 }
2611
2612 if (!conf->radio_enabled) {
2613 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
2614 goto out;
2615 }
2616
0cf4c01e
MA		 2617 if (!iwl_is_ready(priv)) {
2618 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2619 goto out;
2620 }
2621
4808368d
AK		 2622 if (scan_active)
2623 goto out;
2624
2625 if (memcmp(&priv->active_rxon,
2626 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2627 iwlcore_commit_rxon(priv);
2628 else
2629 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2630
2631
2632out:
2633 IWL_DEBUG_MAC80211(priv, "leave\n");
2634 mutex_unlock(&priv->mutex);
2635 return ret;
2636}
2637EXPORT_SYMBOL(iwl_mac_config);
2638
aa89f31e
AK		 2639int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2640 struct ieee80211_tx_queue_stats *stats)
2641{
2642 struct iwl_priv *priv = hw->priv;
2643 int i, avail;
2644 struct iwl_tx_queue *txq;
2645 struct iwl_queue *q;
2646 unsigned long flags;
2647
2648 IWL_DEBUG_MAC80211(priv, "enter\n");
2649
2650 if (!iwl_is_ready_rf(priv)) {
2651 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2652 return -EIO;
2653 }
2654
2655 spin_lock_irqsave(&priv->lock, flags);
2656
2657 for (i = 0; i < AC_NUM; i++) {
2658 txq = &priv->txq[i];
2659 q = &txq->q;
2660 avail = iwl_queue_space(q);
2661
2662 stats[i].len = q->n_window - avail;
2663 stats[i].limit = q->n_window - q->high_mark;
2664 stats[i].count = q->n_window;
2665
2666 }
2667 spin_unlock_irqrestore(&priv->lock, flags);
2668
2669 IWL_DEBUG_MAC80211(priv, "leave\n");
2670
2671 return 0;
2672}
2673EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2674
bd564261
AK		 2675void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2676{
2677 struct iwl_priv *priv = hw->priv;
2678 unsigned long flags;
2679
2680 mutex_lock(&priv->mutex);
2681 IWL_DEBUG_MAC80211(priv, "enter\n");
2682
2683 spin_lock_irqsave(&priv->lock, flags);
2684 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2685 spin_unlock_irqrestore(&priv->lock, flags);
2686
2687 iwl_reset_qos(priv);
2688
2689 spin_lock_irqsave(&priv->lock, flags);
2690 priv->assoc_id = 0;
2691 priv->assoc_capability = 0;
2692 priv->assoc_station_added = 0;
2693
2694 /* new association get rid of ibss beacon skb */
2695 if (priv->ibss_beacon)
2696 dev_kfree_skb(priv->ibss_beacon);
2697
2698 priv->ibss_beacon = NULL;
2699
57c4d7b4 2700 priv->beacon_int = priv->vif->bss_conf.beacon_int;
bd564261
AK		 2701 priv->timestamp = 0;
2702 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2703 priv->beacon_int = 0;
2704
2705 spin_unlock_irqrestore(&priv->lock, flags);
2706
2707 if (!iwl_is_ready_rf(priv)) {
2708 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2709 mutex_unlock(&priv->mutex);
2710 return;
2711 }
2712
2713 /* we are restarting association process
2714 * clear RXON_FILTER_ASSOC_MSK bit
2715 */
2716 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2717 iwl_scan_cancel_timeout(priv, 100);
2718 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2719 iwlcore_commit_rxon(priv);
2720 }
2721
2722 iwl_power_update_mode(priv, 0);
2723
2724 /* Per mac80211.h: This is only used in IBSS mode... */
2725 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2726
2727 /* switch to CAM during association period.
2728 * the ucode will block any association/authentication
2729 * frome during assiciation period if it can not hear
2730 * the AP because of PM. the timer enable PM back is
2731 * association do not complete
2732 */
2733 if (priv->hw->conf.channel->flags &
2734 (IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_RADAR))
2735 iwl_power_disable_management(priv, 3000);
2736
2737 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2738 mutex_unlock(&priv->mutex);
2739 return;
2740 }
2741
2742 iwl_set_rate(priv);
2743
2744 mutex_unlock(&priv->mutex);
2745
2746 IWL_DEBUG_MAC80211(priv, "leave\n");
2747}
2748EXPORT_SYMBOL(iwl_mac_reset_tsf);
2749
6da3a13e
WYG		 2750#ifdef CONFIG_PM
2751
2752int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2753{
2754 struct iwl_priv *priv = pci_get_drvdata(pdev);
2755
2756 /*
2757 * This function is called when system goes into suspend state
2758 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2759 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2760 * it will not call apm_ops.stop() to stop the DMA operation.
2761 * Calling apm_ops.stop here to make sure we stop the DMA.
2762 */
2763 priv->cfg->ops->lib->apm_ops.stop(priv);
2764
2765 pci_save_state(pdev);
2766 pci_disable_device(pdev);
2767 pci_set_power_state(pdev, PCI_D3hot);
2768
2769 return 0;
2770}
2771EXPORT_SYMBOL(iwl_pci_suspend);
2772
2773int iwl_pci_resume(struct pci_dev *pdev)
2774{
2775 struct iwl_priv *priv = pci_get_drvdata(pdev);
2776 int ret;
2777
2778 pci_set_power_state(pdev, PCI_D0);
2779 ret = pci_enable_device(pdev);
2780 if (ret)
2781 return ret;
2782 pci_restore_state(pdev);
2783 iwl_enable_interrupts(priv);
2784
2785 return 0;
2786}
2787EXPORT_SYMBOL(iwl_pci_resume);
2788
2789#endif /* CONFIG_PM */
Linux kernel - Deliverables
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