iwlwifi: unify tx antenna toggling
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-dev.h
CommitLineData
b481de9c
ZY
1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
fcd427bb 26/*
3e0d4cb1 27 * Please use this file (iwl-dev.h) for driver implementation definitions.
5a36ba0e 28 * Please use iwl-commands.h for uCode API definitions.
fcd427bb
BC
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
be1f3ab6
EG
32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
b481de9c 34
5d08cd1d
CH
35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
4fc22b21 39#define DRV_NAME "iwlagn"
ad97edd2 40#include "iwl-rfkill.h"
6bc913bd 41#include "iwl-eeprom.h"
5d08cd1d 42#include "iwl-4965-hw.h"
6f83eaa1 43#include "iwl-csr.h"
5d08cd1d 44#include "iwl-prph.h"
0a6857e7 45#include "iwl-debug.h"
ab53d8af 46#include "iwl-led.h"
5da4b55f 47#include "iwl-power.h"
e227ceac 48#include "iwl-agn-rs.h"
5d08cd1d 49
fed9017e
RR
50/* configuration for the iwl4965 */
51extern struct iwl_cfg iwl4965_agn_cfg;
5a6a256e
TW
52extern struct iwl_cfg iwl5300_agn_cfg;
53extern struct iwl_cfg iwl5100_agn_cfg;
54extern struct iwl_cfg iwl5350_agn_cfg;
47408639
EK
55extern struct iwl_cfg iwl5100_bg_cfg;
56extern struct iwl_cfg iwl5100_abg_cfg;
fed9017e 57
099b40b7
RR
58/* CT-KILL constants */
59#define CT_KILL_THRESHOLD 110 /* in Celsius */
4bf775cd 60
5d08cd1d
CH
61/* Default noise level to report when noise measurement is not available.
62 * This may be because we're:
63 * 1) Not associated (4965, no beacon statistics being sent to driver)
64 * 2) Scanning (noise measurement does not apply to associated channel)
65 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
66 * Use default noise value of -127 ... this is below the range of measurable
67 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
68 * Also, -127 works better than 0 when averaging frames with/without
69 * noise info (e.g. averaging might be done in app); measured dBm values are
70 * always negative ... using a negative value as the default keeps all
71 * averages within an s8's (used in some apps) range of negative values. */
72#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
73
5d08cd1d
CH
74/*
75 * RTS threshold here is total size [2347] minus 4 FCS bytes
76 * Per spec:
77 * a value of 0 means RTS on all data/management packets
78 * a value > max MSDU size means no RTS
79 * else RTS for data/management frames where MPDU is larger
80 * than RTS value.
81 */
82#define DEFAULT_RTS_THRESHOLD 2347U
83#define MIN_RTS_THRESHOLD 0U
84#define MAX_RTS_THRESHOLD 2347U
85#define MAX_MSDU_SIZE 2304U
86#define MAX_MPDU_SIZE 2346U
87#define DEFAULT_BEACON_INTERVAL 100U
88#define DEFAULT_SHORT_RETRY_LIMIT 7U
89#define DEFAULT_LONG_RETRY_LIMIT 4U
90
a55360e4 91struct iwl_rx_mem_buffer {
5d08cd1d
CH
92 dma_addr_t dma_addr;
93 struct sk_buff *skb;
94 struct list_head list;
95};
96
5d08cd1d
CH
97/*
98 * Generic queue structure
99 *
100 * Contains common data for Rx and Tx queues
101 */
443cfd45 102struct iwl_queue {
5d08cd1d
CH
103 int n_bd; /* number of BDs in this queue */
104 int write_ptr; /* 1-st empty entry (index) host_w*/
105 int read_ptr; /* last used entry (index) host_r*/
106 dma_addr_t dma_addr; /* physical addr for BD's */
107 int n_window; /* safe queue window */
108 u32 id;
109 int low_mark; /* low watermark, resume queue if free
110 * space more than this */
111 int high_mark; /* high watermark, stop queue if free
112 * space less than this */
113} __attribute__ ((packed));
114
115#define MAX_NUM_OF_TBS (20)
116
bc47279f 117/* One for each TFD */
8567c63e 118struct iwl_tx_info {
5d08cd1d
CH
119 struct sk_buff *skb[MAX_NUM_OF_TBS];
120};
121
122/**
16466903 123 * struct iwl_tx_queue - Tx Queue for DMA
bc47279f
BC
124 * @q: generic Rx/Tx queue descriptor
125 * @bd: base of circular buffer of TFDs
126 * @cmd: array of command/Tx buffers
127 * @dma_addr_cmd: physical address of cmd/tx buffer array
128 * @txb: array of per-TFD driver data
129 * @need_update: indicates need to update read/write index
130 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
5d08cd1d 131 *
bc47279f
BC
132 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
133 * descriptors) and required locking structures.
5d08cd1d 134 */
16466903 135struct iwl_tx_queue {
443cfd45 136 struct iwl_queue q;
1053d35f 137 struct iwl_tfd_frame *bd;
da99c4b6 138 struct iwl_cmd *cmd[TFD_TX_CMD_SLOTS];
8567c63e 139 struct iwl_tx_info *txb;
5d08cd1d
CH
140 int need_update;
141 int sched_retry;
142 int active;
143};
144
145#define IWL_NUM_SCAN_RATES (2)
146
bb8c093b 147struct iwl4965_channel_tgd_info {
5d08cd1d
CH
148 u8 type;
149 s8 max_power;
150};
151
bb8c093b 152struct iwl4965_channel_tgh_info {
5d08cd1d
CH
153 s64 last_radar_time;
154};
155
5d08cd1d
CH
156/*
157 * One for each channel, holds all channel setup data
158 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
159 * with one another!
160 */
bf85ea4f 161struct iwl_channel_info {
bb8c093b
CH
162 struct iwl4965_channel_tgd_info tgd;
163 struct iwl4965_channel_tgh_info tgh;
073d3f5f
TW
164 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
165 struct iwl_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for
166 * FAT channel */
5d08cd1d
CH
167
168 u8 channel; /* channel number */
169 u8 flags; /* flags copied from EEPROM */
170 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
fcd427bb 171 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
5d08cd1d
CH
172 s8 min_power; /* always 0 */
173 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
174
175 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
176 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
8318d78a 177 enum ieee80211_band band;
5d08cd1d 178
5d08cd1d
CH
179 /* FAT channel info */
180 s8 fat_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
181 s8 fat_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
182 s8 fat_min_power; /* always 0 */
183 s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */
184 u8 fat_flags; /* flags copied from EEPROM */
fcd427bb 185 u8 fat_extension_channel; /* HT_IE_EXT_CHANNEL_* */
5d08cd1d
CH
186};
187
bb8c093b 188struct iwl4965_clip_group {
5d08cd1d
CH
189 /* maximum power level to prevent clipping for each rate, derived by
190 * us from this band's saturation power in EEPROM */
191 const s8 clip_powers[IWL_MAX_RATES];
192};
193
5d08cd1d
CH
194
195#define IWL_TX_FIFO_AC0 0
196#define IWL_TX_FIFO_AC1 1
197#define IWL_TX_FIFO_AC2 2
198#define IWL_TX_FIFO_AC3 3
199#define IWL_TX_FIFO_HCCA_1 5
200#define IWL_TX_FIFO_HCCA_2 6
201#define IWL_TX_FIFO_NONE 7
202
203/* Minimum number of queues. MAX_NUM is defined in hw specific files */
204#define IWL_MIN_NUM_QUEUES 4
205
206/* Power management (not Tx power) structures */
207
6f4083aa
TW
208enum iwl_pwr_src {
209 IWL_PWR_SRC_VMAIN,
210 IWL_PWR_SRC_VAUX,
211};
212
5d08cd1d
CH
213#define IEEE80211_DATA_LEN 2304
214#define IEEE80211_4ADDR_LEN 30
215#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
216#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
217
fcab423d 218struct iwl_frame {
5d08cd1d
CH
219 union {
220 struct ieee80211_hdr frame;
4bf64efd 221 struct iwl_tx_beacon_cmd beacon;
5d08cd1d
CH
222 u8 raw[IEEE80211_FRAME_LEN];
223 u8 cmd[360];
224 } u;
225 struct list_head list;
226};
227
5d08cd1d
CH
228#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
229#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
230#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
231
232enum {
233 /* CMD_SIZE_NORMAL = 0, */
234 CMD_SIZE_HUGE = (1 << 0),
235 /* CMD_SYNC = 0, */
236 CMD_ASYNC = (1 << 1),
237 /* CMD_NO_SKB = 0, */
238 CMD_WANT_SKB = (1 << 2),
239};
240
857485c0 241struct iwl_cmd;
c79dd5b5 242struct iwl_priv;
5d08cd1d 243
857485c0
TW
244struct iwl_cmd_meta {
245 struct iwl_cmd_meta *source;
5d08cd1d
CH
246 union {
247 struct sk_buff *skb;
c79dd5b5 248 int (*callback)(struct iwl_priv *priv,
857485c0 249 struct iwl_cmd *cmd, struct sk_buff *skb);
5d08cd1d
CH
250 } __attribute__ ((packed)) u;
251
252 /* The CMD_SIZE_HUGE flag bit indicates that the command
253 * structure is stored at the end of the shared queue memory. */
254 u32 flags;
255
256} __attribute__ ((packed));
257
d2f18bfd 258#define IWL_CMD_MAX_PAYLOAD 320
bd68fb6f 259
bc47279f 260/**
857485c0 261 * struct iwl_cmd
bc47279f
BC
262 *
263 * For allocation of the command and tx queues, this establishes the overall
264 * size of the largest command we send to uCode, except for a scan command
265 * (which is relatively huge; space is allocated separately).
266 */
857485c0
TW
267struct iwl_cmd {
268 struct iwl_cmd_meta meta; /* driver data */
269 struct iwl_cmd_header hdr; /* uCode API */
5d08cd1d 270 union {
5d08cd1d
CH
271 u32 flags;
272 u8 val8;
273 u16 val16;
274 u32 val32;
83d527d9 275 struct iwl_tx_cmd tx;
bd68fb6f 276 u8 payload[IWL_CMD_MAX_PAYLOAD];
5d08cd1d
CH
277 } __attribute__ ((packed)) cmd;
278} __attribute__ ((packed));
279
3257e5d4 280
857485c0 281struct iwl_host_cmd {
5d08cd1d
CH
282 u8 id;
283 u16 len;
857485c0 284 struct iwl_cmd_meta meta;
5d08cd1d
CH
285 const void *data;
286};
287
857485c0
TW
288#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_cmd) - \
289 sizeof(struct iwl_cmd_meta))
5d08cd1d
CH
290
291/*
292 * RX related structures and functions
293 */
294#define RX_FREE_BUFFERS 64
295#define RX_LOW_WATERMARK 8
296
297#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
298#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
299#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
300
301/**
a55360e4 302 * struct iwl_rx_queue - Rx queue
5d08cd1d
CH
303 * @processed: Internal index to last handled Rx packet
304 * @read: Shared index to newest available Rx buffer
305 * @write: Shared index to oldest written Rx packet
306 * @free_count: Number of pre-allocated buffers in rx_free
307 * @rx_free: list of free SKBs for use
308 * @rx_used: List of Rx buffers with no SKB
309 * @need_update: flag to indicate we need to update read/write index
310 *
a55360e4 311 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
5d08cd1d 312 */
a55360e4 313struct iwl_rx_queue {
5d08cd1d
CH
314 __le32 *bd;
315 dma_addr_t dma_addr;
a55360e4
TW
316 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
317 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
5d08cd1d
CH
318 u32 processed;
319 u32 read;
320 u32 write;
321 u32 free_count;
322 struct list_head rx_free;
323 struct list_head rx_used;
324 int need_update;
325 spinlock_t lock;
326};
327
328#define IWL_SUPPORTED_RATES_IE_LEN 8
329
330#define SCAN_INTERVAL 100
331
332#define MAX_A_CHANNELS 252
333#define MIN_A_CHANNELS 7
334
335#define MAX_B_CHANNELS 14
336#define MIN_B_CHANNELS 1
337
5d08cd1d
CH
338#define MAX_TID_COUNT 9
339
340#define IWL_INVALID_RATE 0xFF
341#define IWL_INVALID_VALUE -1
342
bc47279f 343/**
6def9761 344 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
bc47279f
BC
345 * @txq_id: Tx queue used for Tx attempt
346 * @frame_count: # frames attempted by Tx command
347 * @wait_for_ba: Expect block-ack before next Tx reply
348 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
349 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
350 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
351 * @rate_n_flags: Rate at which Tx was attempted
352 *
353 * If REPLY_TX indicates that aggregation was attempted, driver must wait
354 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
355 * until block ack arrives.
356 */
6def9761 357struct iwl_ht_agg {
5d08cd1d
CH
358 u16 txq_id;
359 u16 frame_count;
360 u16 wait_for_ba;
361 u16 start_idx;
fe01b477 362 u64 bitmap;
5d08cd1d 363 u32 rate_n_flags;
fe01b477
RR
364#define IWL_AGG_OFF 0
365#define IWL_AGG_ON 1
366#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
367#define IWL_EMPTYING_HW_QUEUE_DELBA 3
368 u8 state;
5d08cd1d 369};
fe01b477 370
5d08cd1d 371
6def9761 372struct iwl_tid_data {
5d08cd1d 373 u16 seq_number;
fe01b477 374 u16 tfds_in_queue;
6def9761 375 struct iwl_ht_agg agg;
5d08cd1d
CH
376};
377
6def9761 378struct iwl_hw_key {
5d08cd1d
CH
379 enum ieee80211_key_alg alg;
380 int keylen;
0211ddda 381 u8 keyidx;
5d08cd1d
CH
382 u8 key[32];
383};
384
bb8c093b 385union iwl4965_ht_rate_supp {
5d08cd1d
CH
386 u16 rates;
387 struct {
388 u8 siso_rate;
389 u8 mimo_rate;
390 };
391};
392
5d08cd1d 393#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
5d08cd1d
CH
394#define CFG_HT_MPDU_DENSITY_2USEC (0x5)
395#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_2USEC
396
9e0cc6de
RR
397struct iwl_ht_info {
398 /* self configuration data */
5d08cd1d 399 u8 is_ht;
9e0cc6de 400 u8 supported_chan_width;
12837be1 401 u8 sm_ps;
9e0cc6de 402 u8 is_green_field;
bb54244b 403 u8 sgf; /* HT_SHORT_GI_* short guard interval */
5d08cd1d
CH
404 u8 max_amsdu_size;
405 u8 ampdu_factor;
406 u8 mpdu_density;
d9fe60de 407 struct ieee80211_mcs_info mcs;
9e0cc6de 408 /* BSS related data */
5d08cd1d 409 u8 extension_chan_offset;
5d08cd1d 410 u8 tx_chan_width;
9e0cc6de
RR
411 u8 ht_protection;
412 u8 non_GF_STA_present;
5d08cd1d 413};
5d08cd1d 414
1ff50bda 415union iwl_qos_capabity {
5d08cd1d
CH
416 struct {
417 u8 edca_count:4; /* bit 0-3 */
418 u8 q_ack:1; /* bit 4 */
419 u8 queue_request:1; /* bit 5 */
420 u8 txop_request:1; /* bit 6 */
421 u8 reserved:1; /* bit 7 */
422 } q_AP;
423 struct {
424 u8 acvo_APSD:1; /* bit 0 */
425 u8 acvi_APSD:1; /* bit 1 */
426 u8 ac_bk_APSD:1; /* bit 2 */
427 u8 ac_be_APSD:1; /* bit 3 */
428 u8 q_ack:1; /* bit 4 */
429 u8 max_len:2; /* bit 5-6 */
430 u8 more_data_ack:1; /* bit 7 */
431 } q_STA;
432 u8 val;
433};
434
435/* QoS structures */
1ff50bda 436struct iwl_qos_info {
5d08cd1d
CH
437 int qos_enable;
438 int qos_active;
1ff50bda
EG
439 union iwl_qos_capabity qos_cap;
440 struct iwl_qosparam_cmd def_qos_parm;
5d08cd1d 441};
5d08cd1d
CH
442
443#define STA_PS_STATUS_WAKE 0
444#define STA_PS_STATUS_SLEEP 1
445
6def9761 446struct iwl_station_entry {
133636de 447 struct iwl_addsta_cmd sta;
6def9761 448 struct iwl_tid_data tid[MAX_TID_COUNT];
5d08cd1d
CH
449 u8 used;
450 u8 ps_status;
6def9761 451 struct iwl_hw_key keyinfo;
5d08cd1d
CH
452};
453
454/* one for each uCode image (inst/data, boot/init/runtime) */
455struct fw_desc {
456 void *v_addr; /* access by driver */
457 dma_addr_t p_addr; /* access by card's busmaster DMA */
458 u32 len; /* bytes */
459};
460
461/* uCode file layout */
14b3d338 462struct iwl_ucode {
5d08cd1d
CH
463 __le32 ver; /* major/minor/subminor */
464 __le32 inst_size; /* bytes of runtime instructions */
465 __le32 data_size; /* bytes of runtime data */
466 __le32 init_size; /* bytes of initialization instructions */
467 __le32 init_data_size; /* bytes of initialization data */
468 __le32 boot_size; /* bytes of bootstrap instructions */
469 u8 data[0]; /* data in same order as "size" elements */
470};
471
bb8c093b 472struct iwl4965_ibss_seq {
5d08cd1d
CH
473 u8 mac[ETH_ALEN];
474 u16 seq_num;
475 u16 frag_num;
476 unsigned long packet_time;
477 struct list_head list;
478};
479
f0832f13
EG
480struct iwl_sensitivity_ranges {
481 u16 min_nrg_cck;
482 u16 max_nrg_cck;
483
484 u16 nrg_th_cck;
485 u16 nrg_th_ofdm;
486
487 u16 auto_corr_min_ofdm;
488 u16 auto_corr_min_ofdm_mrc;
489 u16 auto_corr_min_ofdm_x1;
490 u16 auto_corr_min_ofdm_mrc_x1;
491
492 u16 auto_corr_max_ofdm;
493 u16 auto_corr_max_ofdm_mrc;
494 u16 auto_corr_max_ofdm_x1;
495 u16 auto_corr_max_ofdm_mrc_x1;
496
497 u16 auto_corr_max_cck;
498 u16 auto_corr_max_cck_mrc;
499 u16 auto_corr_min_cck;
500 u16 auto_corr_min_cck_mrc;
501};
502
099b40b7
RR
503
504#define IWL_FAT_CHANNEL_52 BIT(IEEE80211_BAND_5GHZ)
505
bc47279f 506/**
5425e490 507 * struct iwl_hw_params
bc47279f 508 * @max_txq_num: Max # Tx queues supported
099b40b7
RR
509 * @tx/rx_chains_num: Number of TX/RX chains
510 * @valid_tx/rx_ant: usable antennas
bc47279f 511 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
bc47279f 512 * @max_rxq_log: Log-base-2 of max_rxq_size
099b40b7 513 * @rx_buf_size: Rx buffer size
bc47279f
BC
514 * @max_stations:
515 * @bcast_sta_id:
099b40b7
RR
516 * @fat_channel: is 40MHz width possible in band 2.4
517 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
518 * @sw_crypto: 0 for hw, 1 for sw
519 * @max_xxx_size: for ucode uses
520 * @ct_kill_threshold: temperature threshold
be5d56ed 521 * @calib_init_cfg: setup initial claibrations for the hw
f0832f13 522 * @struct iwl_sensitivity_ranges: range of sensitivity values
7f3e4bb6 523 * @first_ampdu_q: first HW queue available for ampdu
bc47279f 524 */
5425e490 525struct iwl_hw_params {
5d08cd1d 526 u16 max_txq_num;
ec35cf2a
TW
527 u8 tx_chains_num;
528 u8 rx_chains_num;
529 u8 valid_tx_ant;
530 u8 valid_rx_ant;
5d08cd1d 531 u16 max_rxq_size;
ec35cf2a 532 u16 max_rxq_log;
9ee1ba47
RR
533 u32 rx_buf_size;
534 u32 max_pkt_size;
5d08cd1d
CH
535 u8 max_stations;
536 u8 bcast_sta_id;
099b40b7
RR
537 u8 fat_channel;
538 u8 sw_crypto;
539 u32 max_inst_size;
540 u32 max_data_size;
541 u32 max_bsm_size;
542 u32 ct_kill_threshold; /* value in hw-dependent units */
be5d56ed 543 u32 calib_init_cfg;
f0832f13 544 const struct iwl_sensitivity_ranges *sens;
7f3e4bb6 545 u8 first_ampdu_q;
5d08cd1d
CH
546};
547
a9841013
EG
548#define HT_SHORT_GI_20MHZ (1 << 0)
549#define HT_SHORT_GI_40MHZ (1 << 1)
5d08cd1d
CH
550
551
bb8c093b 552#define IWL_RX_HDR(x) ((struct iwl4965_rx_frame_hdr *)(\
5d08cd1d
CH
553 x->u.rx_frame.stats.payload + \
554 x->u.rx_frame.stats.phy_count))
bb8c093b 555#define IWL_RX_END(x) ((struct iwl4965_rx_frame_end *)(\
5d08cd1d
CH
556 IWL_RX_HDR(x)->payload + \
557 le16_to_cpu(IWL_RX_HDR(x)->len)))
558#define IWL_RX_STATS(x) (&x->u.rx_frame.stats)
559#define IWL_RX_DATA(x) (IWL_RX_HDR(x)->payload)
560
5d08cd1d
CH
561/******************************************************************************
562 *
a33c2f47
EG
563 * Functions implemented in core module which are forward declared here
564 * for use by iwl-[4-5].c
5d08cd1d 565 *
a33c2f47
EG
566 * NOTE: The implementation of these functions are not hardware specific
567 * which is why they are in the core module files.
5d08cd1d
CH
568 *
569 * Naming convention --
a33c2f47 570 * iwl_ <-- Is part of iwlwifi
5d08cd1d 571 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
bb8c093b
CH
572 * iwl4965_bg_ <-- Called from work queue context
573 * iwl4965_mac_ <-- mac80211 callback
5d08cd1d
CH
574 *
575 ****************************************************************************/
a33c2f47
EG
576struct iwl_addsta_cmd;
577extern int iwl_send_add_sta(struct iwl_priv *priv,
578 struct iwl_addsta_cmd *sta, u8 flags);
579extern u8 iwl_add_station_flags(struct iwl_priv *priv, const u8 *addr,
d9fe60de 580 int is_ap, u8 flags, struct ieee80211_sta_ht_cap *ht_info);
a33c2f47
EG
581extern void iwl4965_update_chain_flags(struct iwl_priv *priv);
582extern int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
583extern const u8 iwl_bcast_addr[ETH_ALEN];
b3bbacb7 584extern int iwl_rxq_stop(struct iwl_priv *priv);
da1bc453 585extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
443cfd45 586extern int iwl_queue_space(const struct iwl_queue *q);
fd4abac5
TW
587static inline int iwl_queue_used(const struct iwl_queue *q, int i)
588{
589 return q->write_ptr > q->read_ptr ?
590 (i >= q->read_ptr && i < q->write_ptr) :
591 !(i < q->read_ptr && i >= q->write_ptr);
592}
593
594
595static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
596{
597 /* This is for scan command, the big buffer at end of command array */
598 if (is_huge)
599 return q->n_window; /* must be power of 2 */
600
601 /* Otherwise, use normal size buffers */
602 return index & (q->n_window - 1);
603}
604
605
c79dd5b5 606struct iwl_priv;
b481de9c 607
78330fdd 608
b481de9c
ZY
609/* Structures, enum, and defines specific to the 4965 */
610
16466903 611#define IWL_KW_SIZE 0x1000 /*4k */
b481de9c 612
16466903 613struct iwl_kw {
b481de9c
ZY
614 dma_addr_t dma_addr;
615 void *v_addr;
616 size_t size;
617};
618
b481de9c
ZY
619#define IWL_CHANNEL_WIDTH_20MHZ 0
620#define IWL_CHANNEL_WIDTH_40MHZ 1
621
b481de9c
ZY
622#define IWL_OPERATION_MODE_AUTO 0
623#define IWL_OPERATION_MODE_HT_ONLY 1
624#define IWL_OPERATION_MODE_MIXED 2
625#define IWL_OPERATION_MODE_20MHZ 3
626
3195cdb7
TW
627#define IWL_TX_CRC_SIZE 4
628#define IWL_TX_DELIMITER_SIZE 4
b481de9c 629
b481de9c 630#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
b481de9c 631
b481de9c
ZY
632/* Sensitivity and chain noise calibration */
633#define INTERFERENCE_DATA_AVAILABLE __constant_cpu_to_le32(1)
634#define INITIALIZATION_VALUE 0xFFFF
635#define CAL_NUM_OF_BEACONS 20
636#define MAXIMUM_ALLOWED_PATHLOSS 15
637
b481de9c
ZY
638#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
639
640#define MAX_FA_OFDM 50
641#define MIN_FA_OFDM 5
642#define MAX_FA_CCK 50
643#define MIN_FA_CCK 5
644
b481de9c
ZY
645#define AUTO_CORR_STEP_OFDM 1
646
b481de9c
ZY
647#define AUTO_CORR_STEP_CCK 3
648#define AUTO_CORR_MAX_TH_CCK 160
649
b481de9c
ZY
650#define NRG_DIFF 2
651#define NRG_STEP_CCK 2
652#define NRG_MARGIN 8
653#define MAX_NUMBER_CCK_NO_FA 100
654
655#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
656
657#define CHAIN_A 0
658#define CHAIN_B 1
659#define CHAIN_C 2
660#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
661#define ALL_BAND_FILTER 0xFF00
662#define IN_BAND_FILTER 0xFF
663#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
664
3195cdb7
TW
665#define NRG_NUM_PREV_STAT_L 20
666#define NUM_RX_CHAINS 3
667
bb8c093b 668enum iwl4965_false_alarm_state {
b481de9c
ZY
669 IWL_FA_TOO_MANY = 0,
670 IWL_FA_TOO_FEW = 1,
671 IWL_FA_GOOD_RANGE = 2,
672};
673
bb8c093b 674enum iwl4965_chain_noise_state {
b481de9c 675 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
04816448
GE
676 IWL_CHAIN_NOISE_ACCUMULATE,
677 IWL_CHAIN_NOISE_CALIBRATED,
678 IWL_CHAIN_NOISE_DONE,
b481de9c
ZY
679};
680
bb8c093b 681enum iwl4965_calib_enabled_state {
b481de9c
ZY
682 IWL_CALIB_DISABLED = 0, /* must be 0 */
683 IWL_CALIB_ENABLED = 1,
684};
685
686struct statistics_general_data {
687 u32 beacon_silence_rssi_a;
688 u32 beacon_silence_rssi_b;
689 u32 beacon_silence_rssi_c;
690 u32 beacon_energy_a;
691 u32 beacon_energy_b;
692 u32 beacon_energy_c;
693};
694
6e21f2c1
TW
695/* Opaque calibration results */
696struct iwl_calib_result {
697 void *buf;
698 size_t buf_len;
7c616cba
TW
699};
700
dbb983b7
RR
701enum ucode_type {
702 UCODE_NONE = 0,
703 UCODE_INIT,
704 UCODE_RT
705};
706
b481de9c 707/* Sensitivity calib data */
f0832f13 708struct iwl_sensitivity_data {
b481de9c
ZY
709 u32 auto_corr_ofdm;
710 u32 auto_corr_ofdm_mrc;
711 u32 auto_corr_ofdm_x1;
712 u32 auto_corr_ofdm_mrc_x1;
713 u32 auto_corr_cck;
714 u32 auto_corr_cck_mrc;
715
716 u32 last_bad_plcp_cnt_ofdm;
717 u32 last_fa_cnt_ofdm;
718 u32 last_bad_plcp_cnt_cck;
719 u32 last_fa_cnt_cck;
720
721 u32 nrg_curr_state;
722 u32 nrg_prev_state;
723 u32 nrg_value[10];
724 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
725 u32 nrg_silence_ref;
726 u32 nrg_energy_idx;
727 u32 nrg_silence_idx;
728 u32 nrg_th_cck;
729 s32 nrg_auto_corr_silence_diff;
730 u32 num_in_cck_no_fa;
731 u32 nrg_th_ofdm;
b481de9c
ZY
732};
733
734/* Chain noise (differential Rx gain) calib data */
f0832f13 735struct iwl_chain_noise_data {
04816448 736 u32 active_chains;
b481de9c
ZY
737 u32 chain_noise_a;
738 u32 chain_noise_b;
739 u32 chain_noise_c;
740 u32 chain_signal_a;
741 u32 chain_signal_b;
742 u32 chain_signal_c;
04816448 743 u16 beacon_count;
b481de9c
ZY
744 u8 disconn_array[NUM_RX_CHAINS];
745 u8 delta_gain_code[NUM_RX_CHAINS];
746 u8 radio_write;
04816448 747 u8 state;
b481de9c
ZY
748};
749
abceddb4
BC
750#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
751#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
b481de9c 752
5d08cd1d 753
5d08cd1d
CH
754enum {
755 MEASUREMENT_READY = (1 << 0),
756 MEASUREMENT_ACTIVE = (1 << 1),
757};
758
5d08cd1d 759
dfe7d458 760#define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */
be5d56ed 761#define IWL_CALIB_MAX 4
dfe7d458 762
c79dd5b5 763struct iwl_priv {
5d08cd1d
CH
764
765 /* ieee device used by generic ieee processing code */
766 struct ieee80211_hw *hw;
767 struct ieee80211_channel *ieee_channels;
768 struct ieee80211_rate *ieee_rates;
82b9a121 769 struct iwl_cfg *cfg;
5d08cd1d
CH
770
771 /* temporary frame storage list */
772 struct list_head free_frames;
773 int frames_count;
774
8318d78a 775 enum ieee80211_band band;
5d08cd1d
CH
776 int alloc_rxb_skb;
777
c79dd5b5 778 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
a55360e4 779 struct iwl_rx_mem_buffer *rxb);
5d08cd1d 780
8318d78a 781 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
5d08cd1d 782
4fc22b21 783#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
5d08cd1d 784 /* spectrum measurement report caching */
bb8c093b 785 struct iwl4965_spectrum_notification measure_report;
5d08cd1d
CH
786 u8 measurement_status;
787#endif
788 /* ucode beacon time */
789 u32 ucode_beacon_time;
790
bb8c093b 791 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
5d08cd1d 792 * Access via channel # using indirect index array */
bf85ea4f 793 struct iwl_channel_info *channel_info; /* channel info array */
5d08cd1d
CH
794 u8 channel_count; /* # of channels */
795
796 /* each calibration channel group in the EEPROM has a derived
797 * clip setting for each rate. */
bb8c093b 798 const struct iwl4965_clip_group clip_groups[5];
5d08cd1d
CH
799
800 /* thermal calibration */
801 s32 temperature; /* degrees Kelvin */
802 s32 last_temperature;
803
7c616cba 804 /* init calibration results */
6e21f2c1 805 struct iwl_calib_result calib_results[IWL_CALIB_MAX];
7c616cba 806
5d08cd1d
CH
807 /* Scan related variables */
808 unsigned long last_scan_jiffies;
7878a5a4 809 unsigned long next_scan_jiffies;
5d08cd1d
CH
810 unsigned long scan_start;
811 unsigned long scan_pass_start;
812 unsigned long scan_start_tsf;
76eff18b 813 struct iwl_scan_cmd *scan;
5d08cd1d
CH
814 int scan_bands;
815 int one_direct_scan;
816 u8 direct_ssid_len;
817 u8 direct_ssid[IW_ESSID_MAX_SIZE];
76eff18b
TW
818 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
819 u8 mgmt_tx_ant;
5d08cd1d
CH
820
821 /* spinlock */
822 spinlock_t lock; /* protect general shared data */
823 spinlock_t hcmd_lock; /* protect hcmd */
824 struct mutex mutex;
825
826 /* basic pci-network driver stuff */
827 struct pci_dev *pci_dev;
828
829 /* pci hardware address support */
830 void __iomem *hw_base;
b661c819
TW
831 u32 hw_rev;
832 u32 hw_wa_rev;
833 u8 rev_id;
5d08cd1d
CH
834
835 /* uCode images, save to reload in case of failure */
836 struct fw_desc ucode_code; /* runtime inst */
837 struct fw_desc ucode_data; /* runtime data original */
838 struct fw_desc ucode_data_backup; /* runtime data save/restore */
839 struct fw_desc ucode_init; /* initialization inst */
840 struct fw_desc ucode_init_data; /* initialization data */
841 struct fw_desc ucode_boot; /* bootstrap inst */
dbb983b7
RR
842 enum ucode_type ucode_type;
843 u8 ucode_write_complete; /* the image write is complete */
5d08cd1d
CH
844
845
3195c1f3 846 struct iwl_rxon_time_cmd rxon_timing;
5d08cd1d
CH
847
848 /* We declare this const so it can only be
849 * changed via explicit cast within the
850 * routines that actually update the physical
851 * hardware */
c1adf9fb
GG
852 const struct iwl_rxon_cmd active_rxon;
853 struct iwl_rxon_cmd staging_rxon;
5d08cd1d
CH
854
855 int error_recovering;
c1adf9fb 856 struct iwl_rxon_cmd recovery_rxon;
5d08cd1d
CH
857
858 /* 1st responses from initialize and runtime uCode images.
859 * 4965's initialize alive response contains some calibration data. */
885ba202
TW
860 struct iwl_init_alive_resp card_alive_init;
861 struct iwl_alive_resp card_alive;
eadd3c4b 862#ifdef CONFIG_IWLWIFI_RFKILL
80fcc9e2 863 struct rfkill *rfkill;
ad97edd2 864#endif
5d08cd1d 865
36316126 866#ifdef CONFIG_IWLWIFI_LEDS
0eee6127 867 struct iwl_led led[IWL_LED_TRG_MAX];
ab53d8af
MA
868 unsigned long last_blink_time;
869 u8 last_blink_rate;
870 u8 allow_blinking;
871 u64 led_tpt;
5d08cd1d
CH
872#endif
873
874 u16 active_rate;
875 u16 active_rate_basic;
876
5d08cd1d 877 u8 assoc_station_added;
5d08cd1d 878 u8 start_calib;
f0832f13
EG
879 struct iwl_sensitivity_data sensitivity_data;
880 struct iwl_chain_noise_data chain_noise_data;
5d08cd1d 881 __le16 sensitivity_tbl[HD_TABLE_SIZE];
5d08cd1d 882
9e0cc6de 883 struct iwl_ht_info current_ht_config;
5d08cd1d
CH
884 u8 last_phy_res[100];
885
5d08cd1d
CH
886 /* Rate scaling data */
887 s8 data_retry_limit;
888 u8 retry_rate;
889
890 wait_queue_head_t wait_command_queue;
891
892 int activity_timer_active;
893
894 /* Rx and Tx DMA processing queues */
a55360e4 895 struct iwl_rx_queue rxq;
16466903 896 struct iwl_tx_queue txq[IWL_MAX_NUM_QUEUES];
5d08cd1d 897 unsigned long txq_ctx_active_msk;
16466903 898 struct iwl_kw kw; /* keep warm address */
5d08cd1d
CH
899 u32 scd_base_addr; /* scheduler sram base address */
900
901 unsigned long status;
5d08cd1d
CH
902
903 int last_rx_rssi; /* From Rx packet statisitics */
904 int last_rx_noise; /* From beacon statistics */
905
19758bef
TW
906 /* counts mgmt, ctl, and data packets */
907 struct traffic_stats {
908 u32 cnt;
909 u64 bytes;
910 } tx_stats[3], rx_stats[3];
911
5da4b55f 912 struct iwl_power_mgr power_data;
5d08cd1d 913
8f91aecb 914 struct iwl_notif_statistics statistics;
5d08cd1d
CH
915 unsigned long last_statistics_time;
916
917 /* context information */
918 u8 essid[IW_ESSID_MAX_SIZE];
919 u8 essid_len;
920 u16 rates_mask;
921
922 u32 power_mode;
923 u32 antenna;
924 u8 bssid[ETH_ALEN];
925 u16 rts_threshold;
926 u8 mac_addr[ETH_ALEN];
927
928 /*station table variables */
929 spinlock_t sta_lock;
930 int num_stations;
6def9761 931 struct iwl_station_entry stations[IWL_STATION_COUNT];
6974e363
EG
932 struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
933 u8 default_wep_key;
934 u8 key_mapping_key;
80fb47a1 935 unsigned long ucode_key_table;
5d08cd1d
CH
936
937 /* Indication if ieee80211_ops->open has been called */
69dc5d9d 938 u8 is_open;
5d08cd1d
CH
939
940 u8 mac80211_registered;
5d08cd1d 941
5d08cd1d
CH
942 /* Rx'd packet timing information */
943 u32 last_beacon_time;
944 u64 last_tsf;
945
5d08cd1d 946 /* eeprom */
073d3f5f
TW
947 u8 *eeprom;
948 struct iwl_eeprom_calib_info *calib_info;
5d08cd1d 949
05c914fe 950 enum nl80211_iftype iw_mode;
5d08cd1d
CH
951
952 struct sk_buff *ibss_beacon;
953
954 /* Last Rx'd beacon timestamp */
3109ece1 955 u64 timestamp;
5d08cd1d 956 u16 beacon_int;
32bfd35d 957 struct ieee80211_vif *vif;
5d08cd1d 958
5425e490 959 struct iwl_hw_params hw_params;
059ff826
TW
960 /* driver/uCode shared Tx Byte Counts and Rx status */
961 void *shared_virt;
d67f5489 962 int rb_closed_offset;
059ff826
TW
963 /* Physical Pointer to Tx Byte Counts and Rx status */
964 dma_addr_t shared_phys;
965
5d08cd1d
CH
966 /* Current association information needed to configure the
967 * hardware */
968 u16 assoc_id;
969 u16 assoc_capability;
5d08cd1d 970
1ff50bda 971 struct iwl_qos_info qos_data;
5d08cd1d
CH
972
973 struct workqueue_struct *workqueue;
974
975 struct work_struct up;
976 struct work_struct restart;
977 struct work_struct calibrated_work;
978 struct work_struct scan_completed;
979 struct work_struct rx_replenish;
980 struct work_struct rf_kill;
981 struct work_struct abort_scan;
982 struct work_struct update_link_led;
983 struct work_struct auth_work;
984 struct work_struct report_work;
985 struct work_struct request_scan;
986 struct work_struct beacon_update;
4419e39b 987 struct work_struct set_monitor;
5d08cd1d
CH
988
989 struct tasklet_struct irq_tasklet;
990
c90a74ba 991 struct delayed_work set_power_save;
5d08cd1d
CH
992 struct delayed_work init_alive_start;
993 struct delayed_work alive_start;
5d08cd1d 994 struct delayed_work scan_check;
630fe9b6
TW
995 /* TX Power */
996 s8 tx_power_user_lmt;
997 s8 tx_power_channel_lmt;
5d08cd1d
CH
998
999#ifdef CONFIG_PM
1000 u32 pm_state[16];
1001#endif
1002
0a6857e7 1003#ifdef CONFIG_IWLWIFI_DEBUG
5d08cd1d 1004 /* debugging info */
bf403db8 1005 u32 debug_level;
5d08cd1d
CH
1006 u32 framecnt_to_us;
1007 atomic_t restrict_refcnt;
712b6cf5
TW
1008#ifdef CONFIG_IWLWIFI_DEBUGFS
1009 /* debugfs */
1010 struct iwl_debugfs *dbgfs;
1011#endif /* CONFIG_IWLWIFI_DEBUGFS */
1012#endif /* CONFIG_IWLWIFI_DEBUG */
5d08cd1d
CH
1013
1014 struct work_struct txpower_work;
445c2dff
TW
1015 u32 disable_sens_cal;
1016 u32 disable_chain_noise_cal;
203566f3 1017 u32 disable_tx_power_cal;
16e727e8 1018 struct work_struct run_time_calib_work;
5d08cd1d 1019 struct timer_list statistics_periodic;
c79dd5b5 1020}; /*iwl_priv */
5d08cd1d 1021
36470749
RR
1022static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1023{
1024 set_bit(txq_id, &priv->txq_ctx_active_msk);
1025}
1026
1027static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1028{
1029 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1030}
1031
994d31f7 1032#ifdef CONFIG_IWLWIFI_DEBUG
a332f8d6
TW
1033const char *iwl_get_tx_fail_reason(u32 status);
1034#else
1035static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
1036#endif
1037
1038
a332f8d6
TW
1039static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1040 int txq_id, int idx)
1041{
1042 if (priv->txq[txq_id].txb[idx].skb[0])
1043 return (struct ieee80211_hdr *)priv->txq[txq_id].
1044 txb[idx].skb[0]->data;
1045 return NULL;
1046}
a332f8d6
TW
1047
1048
3109ece1 1049static inline int iwl_is_associated(struct iwl_priv *priv)
5d08cd1d
CH
1050{
1051 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1052}
1053
bf85ea4f 1054static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1055{
1056 if (ch_info == NULL)
1057 return 0;
1058 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1059}
1060
bf85ea4f 1061static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1062{
1063 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1064}
1065
bf85ea4f 1066static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1067{
8318d78a 1068 return ch_info->band == IEEE80211_BAND_5GHZ;
5d08cd1d
CH
1069}
1070
bf85ea4f 1071static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1072{
8318d78a 1073 return ch_info->band == IEEE80211_BAND_2GHZ;
5d08cd1d
CH
1074}
1075
bf85ea4f 1076static inline int is_channel_passive(const struct iwl_channel_info *ch)
5d08cd1d
CH
1077{
1078 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1079}
1080
bf85ea4f 1081static inline int is_channel_ibss(const struct iwl_channel_info *ch)
5d08cd1d
CH
1082{
1083 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1084}
1085
bf403db8
EK
1086#ifdef CONFIG_IWLWIFI_DEBUG
1087static inline void iwl_print_hex_dump(struct iwl_priv *priv, int level,
1088 void *p, u32 len)
1089{
1090 if (!(priv->debug_level & level))
1091 return;
1092
1093 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
1094 p, len, 1);
1095}
1096#else
1097static inline void iwl_print_hex_dump(struct iwl_priv *priv, int level,
1098 void *p, u32 len)
1099{
1100}
1101#endif
1102
8622e705 1103extern const struct iwl_channel_info *iwl_get_channel_info(
c79dd5b5 1104 const struct iwl_priv *priv, enum ieee80211_band band, u16 channel);
5d08cd1d 1105
c79dd5b5 1106/* Requires full declaration of iwl_priv before including */
5d08cd1d 1107
be1f3ab6 1108#endif /* __iwl_dev_h__ */
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