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iwlwifi: cleanup HT40 extension channels setup
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-eeprom.c
CommitLineData
34cf6ff6
AK		 1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
01f8162a 8 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
34cf6ff6
AK		 9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
759ef89f 28 * Intel Linux Wireless <ilw@linux.intel.com>
34cf6ff6
AK		 29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
01f8162a 33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
34cf6ff6
AK		 34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *****************************************************************************/
62
63
64#include <linux/kernel.h>
65#include <linux/module.h>
34cf6ff6
AK		 66#include <linux/init.h>
67
68#include <net/mac80211.h>
69
5a36ba0e 70#include "iwl-commands.h"
3e0d4cb1 71#include "iwl-dev.h"
34cf6ff6 72#include "iwl-core.h"
0a6857e7 73#include "iwl-debug.h"
34cf6ff6 74#include "iwl-eeprom.h"
3395f6e9 75#include "iwl-io.h"
34cf6ff6 76
bf85ea4f
AK		 77/************************** EEPROM BANDS ****************************
78 *
79 * The iwl_eeprom_band definitions below provide the mapping from the
80 * EEPROM contents to the specific channel number supported for each
81 * band.
82 *
83 * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
84 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
85 * The specific geography and calibration information for that channel
86 * is contained in the eeprom map itself.
87 *
88 * During init, we copy the eeprom information and channel map
89 * information into priv->channel_info_24/52 and priv->channel_map_24/52
90 *
91 * channel_map_24/52 provides the index in the channel_info array for a
92 * given channel. We have to have two separate maps as there is channel
93 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
94 * band_2
95 *
96 * A value of 0xff stored in the channel_map indicates that the channel
97 * is not supported by the hardware at all.
98 *
99 * A value of 0xfe in the channel_map indicates that the channel is not
100 * valid for Tx with the current hardware. This means that
101 * while the system can tune and receive on a given channel, it may not
102 * be able to associate or transmit any frames on that
103 * channel. There is no corresponding channel information for that
104 * entry.
105 *
106 *********************************************************************/
107
108/* 2.4 GHz */
109const u8 iwl_eeprom_band_1[14] = {
110 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
111};
112
113/* 5.2 GHz bands */
114static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
115 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
116};
117
118static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
119 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
120};
121
122static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
123 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
124};
125
126static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
127 145, 149, 153, 157, 161, 165
128};
129
7aafef1c 130static const u8 iwl_eeprom_band_6[] = { /* 2.4 ht40 channel */
bf85ea4f
AK		 131 1, 2, 3, 4, 5, 6, 7
132};
133
7aafef1c 134static const u8 iwl_eeprom_band_7[] = { /* 5.2 ht40 channel */
bf85ea4f
AK		 135 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
136};
137
34cf6ff6
AK		 138/******************************************************************************
139 *
140 * EEPROM related functions
141 *
142******************************************************************************/
143
c79dd5b5 144int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
34cf6ff6 145{
3395f6e9 146 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
34cf6ff6 147 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
15b1687c 148 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
34cf6ff6
AK		 149 return -ENOENT;
150 }
151 return 0;
152}
153EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
154
0848e297
WYG		 155static int iwlcore_get_nvm_type(struct iwl_priv *priv)
156{
157 u32 otpgp;
158 int nvm_type;
159
160 /* OTP only valid for CP/PP and after */
161 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
b23a0524
WYG		 162 case CSR_HW_REV_TYPE_NONE:
163 IWL_ERR(priv, "Unknown hardware type\n");
164 return -ENOENT;
0848e297
WYG		 165 case CSR_HW_REV_TYPE_3945:
166 case CSR_HW_REV_TYPE_4965:
167 case CSR_HW_REV_TYPE_5300:
168 case CSR_HW_REV_TYPE_5350:
169 case CSR_HW_REV_TYPE_5100:
170 case CSR_HW_REV_TYPE_5150:
171 nvm_type = NVM_DEVICE_TYPE_EEPROM;
172 break;
173 default:
174 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
175 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
176 nvm_type = NVM_DEVICE_TYPE_OTP;
177 else
178 nvm_type = NVM_DEVICE_TYPE_EEPROM;
179 break;
180 }
181 return nvm_type;
182}
183
34cf6ff6
AK		 184/*
185 * The device's EEPROM semaphore prevents conflicts between driver and uCode
186 * when accessing the EEPROM; each access is a series of pulses to/from the
187 * EEPROM chip, not a single event, so even reads could conflict if they
188 * weren't arbitrated by the semaphore.
189 */
c79dd5b5 190int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
34cf6ff6
AK		 191{
192 u16 count;
193 int ret;
194
195 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
196 /* Request semaphore */
3395f6e9
TW		 197 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
198 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
34cf6ff6
AK		 199
200 /* See if we got it */
73d7b5ac
ZY		 201 ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG,
202 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
203 EEPROM_SEM_TIMEOUT);
34cf6ff6 204 if (ret >= 0) {
e1623446 205 IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
34cf6ff6
AK		 206 count+1);
207 return ret;
208 }
209 }
210
211 return ret;
212}
213EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
214
c79dd5b5 215void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
34cf6ff6 216{
3395f6e9 217 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
34cf6ff6
AK		 218 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
219
220}
221EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
222
073d3f5f
TW		 223const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
224{
225 BUG_ON(offset >= priv->cfg->eeprom_size);
226 return &priv->eeprom[offset];
227}
228EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
34cf6ff6 229
0848e297
WYG		 230static int iwl_init_otp_access(struct iwl_priv *priv)
231{
232 int ret;
233
234 /* Enable 40MHz radio clock */
235 _iwl_write32(priv, CSR_GP_CNTRL,
236 _iwl_read32(priv, CSR_GP_CNTRL) |
237 CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
238
239 /* wait for clock to be ready */
240 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
241 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
242 25000);
243 if (ret < 0)
244 IWL_ERR(priv, "Time out access OTP\n");
245 else {
d77b034f
RC		 246 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
247 APMG_PS_CTRL_VAL_RESET_REQ);
248 udelay(5);
249 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
250 APMG_PS_CTRL_VAL_RESET_REQ);
0848e297
WYG		 251 }
252 return ret;
253}
254
34cf6ff6
AK		 255/**
256 * iwl_eeprom_init - read EEPROM contents
257 *
258 * Load the EEPROM contents from adapter into priv->eeprom
259 *
260 * NOTE: This routine uses the non-debug IO access functions.
261 */
c79dd5b5 262int iwl_eeprom_init(struct iwl_priv *priv)
34cf6ff6 263{
073d3f5f 264 u16 *e;
3395f6e9 265 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
0848e297 266 int sz;
34cf6ff6 267 int ret;
34cf6ff6 268 u16 addr;
0848e297
WYG		 269 u32 otpgp;
270
271 priv->nvm_device_type = iwlcore_get_nvm_type(priv);
b23a0524
WYG		 272 if (priv->nvm_device_type == -ENOENT)
273 return -ENOENT;
073d3f5f 274 /* allocate eeprom */
0848e297
WYG		 275 if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
276 priv->cfg->eeprom_size =
277 OTP_BLOCK_SIZE * OTP_LOWER_BLOCKS_TOTAL;
278 sz = priv->cfg->eeprom_size;
073d3f5f
TW		 279 priv->eeprom = kzalloc(sz, GFP_KERNEL);
280 if (!priv->eeprom) {
281 ret = -ENOMEM;
282 goto alloc_err;
283 }
284 e = (u16 *)priv->eeprom;
34cf6ff6 285
073d3f5f
TW		 286 ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
287 if (ret < 0) {
15b1687c 288 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
073d3f5f
TW		 289 ret = -ENOENT;
290 goto err;
34cf6ff6
AK		 291 }
292
293 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
294 ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
295 if (ret < 0) {
15b1687c 296 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
073d3f5f
TW		 297 ret = -ENOENT;
298 goto err;
34cf6ff6 299 }
0848e297
WYG		 300 if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
301 ret = iwl_init_otp_access(priv);
302 if (ret) {
303 IWL_ERR(priv, "Failed to initialize OTP access.\n");
304 ret = -ENOENT;
305 goto err;
306 }
307 _iwl_write32(priv, CSR_EEPROM_GP,
308 iwl_read32(priv, CSR_EEPROM_GP) &
309 ~CSR_EEPROM_GP_IF_OWNER_MSK);
310 /* clear */
311 _iwl_write32(priv, CSR_OTP_GP_REG,
312 iwl_read32(priv, CSR_OTP_GP_REG) |
313 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
314 CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
315
316 for (addr = 0; addr < sz; addr += sizeof(u16)) {
317 u32 r;
318
319 _iwl_write32(priv, CSR_EEPROM_REG,
320 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
321
322 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
323 CSR_EEPROM_REG_READ_VALID_MSK,
324 IWL_EEPROM_ACCESS_TIMEOUT);
325 if (ret < 0) {
326 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
327 goto done;
328 }
329 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
330 /* check for ECC errors: */
331 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
332 if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
333 /* stop in this case */
334 IWL_ERR(priv, "Uncorrectable OTP ECC error, Abort OTP read\n");
335 goto done;
336 }
337 if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
338 /* continue in this case */
339 _iwl_write32(priv, CSR_OTP_GP_REG,
340 iwl_read32(priv, CSR_OTP_GP_REG) |
341 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
342 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
343 }
344 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
345 }
346 } else {
347 /* eeprom is an array of 16bit values */
348 for (addr = 0; addr < sz; addr += sizeof(u16)) {
349 u32 r;
350
351 _iwl_write32(priv, CSR_EEPROM_REG,
352 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
353
354 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
355 CSR_EEPROM_REG_READ_VALID_MSK,
356 IWL_EEPROM_ACCESS_TIMEOUT);
357 if (ret < 0) {
358 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
359 goto done;
360 }
361 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
362 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
34cf6ff6 363 }
34cf6ff6
AK		 364 }
365 ret = 0;
34cf6ff6
AK		 366done:
367 priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
073d3f5f
TW		 368err:
369 if (ret)
0848e297 370 iwl_eeprom_free(priv);
073d3f5f 371alloc_err:
34cf6ff6
AK		 372 return ret;
373}
374EXPORT_SYMBOL(iwl_eeprom_init);
375
073d3f5f
TW		 376void iwl_eeprom_free(struct iwl_priv *priv)
377{
3ac7f146 378 kfree(priv->eeprom);
073d3f5f
TW		 379 priv->eeprom = NULL;
380}
381EXPORT_SYMBOL(iwl_eeprom_free);
382
8614f360
TW		 383int iwl_eeprom_check_version(struct iwl_priv *priv)
384{
0ef2ca67
TW		 385 u16 eeprom_ver;
386 u16 calib_ver;
387
388 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
389 calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
390
391 if (eeprom_ver < priv->cfg->eeprom_ver ||
392 calib_ver < priv->cfg->eeprom_calib_ver)
393 goto err;
394
395 return 0;
396err:
9906a07e 397 IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
0ef2ca67
TW		 398 eeprom_ver, priv->cfg->eeprom_ver,
399 calib_ver, priv->cfg->eeprom_calib_ver);
400 return -EINVAL;
401
8614f360
TW		 402}
403EXPORT_SYMBOL(iwl_eeprom_check_version);
073d3f5f
TW		 404
405const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
406{
407 return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
408}
409EXPORT_SYMBOL(iwl_eeprom_query_addr);
410
411u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
412{
0848e297
WYG		 413 if (!priv->eeprom)
414 return 0;
073d3f5f
TW		 415 return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
416}
417EXPORT_SYMBOL(iwl_eeprom_query16);
34cf6ff6 418
c79dd5b5 419void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
34cf6ff6 420{
073d3f5f
TW		 421 const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
422 EEPROM_MAC_ADDRESS);
423 memcpy(mac, addr, ETH_ALEN);
34cf6ff6
AK		 424}
425EXPORT_SYMBOL(iwl_eeprom_get_mac);
426
bf85ea4f 427static void iwl_init_band_reference(const struct iwl_priv *priv,
073d3f5f
TW		 428 int eep_band, int *eeprom_ch_count,
429 const struct iwl_eeprom_channel **eeprom_ch_info,
430 const u8 **eeprom_ch_index)
bf85ea4f 431{
073d3f5f
TW		 432 u32 offset = priv->cfg->ops->lib->
433 eeprom_ops.regulatory_bands[eep_band - 1];
434 switch (eep_band) {
bf85ea4f
AK		 435 case 1: /* 2.4GHz band */
436 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
073d3f5f
TW		 437 *eeprom_ch_info = (struct iwl_eeprom_channel *)
438 iwl_eeprom_query_addr(priv, offset);
bf85ea4f
AK		 439 *eeprom_ch_index = iwl_eeprom_band_1;
440 break;
441 case 2: /* 4.9GHz band */
442 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
073d3f5f
TW		 443 *eeprom_ch_info = (struct iwl_eeprom_channel *)
444 iwl_eeprom_query_addr(priv, offset);
bf85ea4f
AK		 445 *eeprom_ch_index = iwl_eeprom_band_2;
446 break;
447 case 3: /* 5.2GHz band */
448 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
073d3f5f
TW		 449 *eeprom_ch_info = (struct iwl_eeprom_channel *)
450 iwl_eeprom_query_addr(priv, offset);
bf85ea4f
AK		 451 *eeprom_ch_index = iwl_eeprom_band_3;
452 break;
453 case 4: /* 5.5GHz band */
454 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
073d3f5f
TW		 455 *eeprom_ch_info = (struct iwl_eeprom_channel *)
456 iwl_eeprom_query_addr(priv, offset);
bf85ea4f
AK		 457 *eeprom_ch_index = iwl_eeprom_band_4;
458 break;
459 case 5: /* 5.7GHz band */
460 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
073d3f5f
TW		 461 *eeprom_ch_info = (struct iwl_eeprom_channel *)
462 iwl_eeprom_query_addr(priv, offset);
bf85ea4f
AK		 463 *eeprom_ch_index = iwl_eeprom_band_5;
464 break;
7aafef1c 465 case 6: /* 2.4GHz ht40 channels */
bf85ea4f 466 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
073d3f5f
TW		 467 *eeprom_ch_info = (struct iwl_eeprom_channel *)
468 iwl_eeprom_query_addr(priv, offset);
bf85ea4f
AK		 469 *eeprom_ch_index = iwl_eeprom_band_6;
470 break;
7aafef1c 471 case 7: /* 5 GHz ht40 channels */
bf85ea4f 472 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
073d3f5f
TW		 473 *eeprom_ch_info = (struct iwl_eeprom_channel *)
474 iwl_eeprom_query_addr(priv, offset);
bf85ea4f
AK		 475 *eeprom_ch_index = iwl_eeprom_band_7;
476 break;
477 default:
478 BUG();
479 return;
480 }
481}
482
483#define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
484 ? # x " " : "")
485
486/**
3b24716f 487 * iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
bf85ea4f
AK		 488 *
489 * Does not set up a command, or touch hardware.
490 */
3b24716f 491static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
bf85ea4f 492 enum ieee80211_band band, u16 channel,
073d3f5f 493 const struct iwl_eeprom_channel *eeprom_ch,
3b24716f 494 u8 clear_ht40_extension_channel)
bf85ea4f
AK		 495{
496 struct iwl_channel_info *ch_info;
497
498 ch_info = (struct iwl_channel_info *)
8622e705 499 iwl_get_channel_info(priv, band, channel);
bf85ea4f
AK		 500
501 if (!is_channel_valid(ch_info))
502 return -1;
503
7aafef1c 504 IWL_DEBUG_INFO(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
630fe9b6 505 " Ad-Hoc %ssupported\n",
bf85ea4f
AK		 506 ch_info->channel,
507 is_channel_a_band(ch_info) ?
508 "5.2" : "2.4",
509 CHECK_AND_PRINT(IBSS),
510 CHECK_AND_PRINT(ACTIVE),
511 CHECK_AND_PRINT(RADAR),
512 CHECK_AND_PRINT(WIDE),
bf85ea4f
AK		 513 CHECK_AND_PRINT(DFS),
514 eeprom_ch->flags,
515 eeprom_ch->max_power_avg,
516 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
517 && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
518 "" : "not ");
519
7aafef1c
WYG		 520 ch_info->ht40_eeprom = *eeprom_ch;
521 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
522 ch_info->ht40_curr_txpow = eeprom_ch->max_power_avg;
523 ch_info->ht40_min_power = 0;
524 ch_info->ht40_scan_power = eeprom_ch->max_power_avg;
525 ch_info->ht40_flags = eeprom_ch->flags;
3b24716f 526 ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
bf85ea4f
AK		 527
528 return 0;
529}
530
531#define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
532 ? # x " " : "")
533
534/**
535 * iwl_init_channel_map - Set up driver's info for all possible channels
536 */
537int iwl_init_channel_map(struct iwl_priv *priv)
538{
539 int eeprom_ch_count = 0;
540 const u8 *eeprom_ch_index = NULL;
073d3f5f 541 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
bf85ea4f
AK		 542 int band, ch;
543 struct iwl_channel_info *ch_info;
544
545 if (priv->channel_count) {
e1623446 546 IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
bf85ea4f
AK		 547 return 0;
548 }
549
e1623446 550 IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
bf85ea4f
AK		 551
552 priv->channel_count =
553 ARRAY_SIZE(iwl_eeprom_band_1) +
554 ARRAY_SIZE(iwl_eeprom_band_2) +
555 ARRAY_SIZE(iwl_eeprom_band_3) +
556 ARRAY_SIZE(iwl_eeprom_band_4) +
557 ARRAY_SIZE(iwl_eeprom_band_5);
558
e1623446 559 IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
bf85ea4f
AK		 560
561 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
562 priv->channel_count, GFP_KERNEL);
563 if (!priv->channel_info) {
15b1687c 564 IWL_ERR(priv, "Could not allocate channel_info\n");
bf85ea4f
AK		 565 priv->channel_count = 0;
566 return -ENOMEM;
567 }
568
569 ch_info = priv->channel_info;
570
571 /* Loop through the 5 EEPROM bands adding them in order to the
572 * channel map we maintain (that contains additional information than
573 * what just in the EEPROM) */
574 for (band = 1; band <= 5; band++) {
575
576 iwl_init_band_reference(priv, band, &eeprom_ch_count,
577 &eeprom_ch_info, &eeprom_ch_index);
578
579 /* Loop through each band adding each of the channels */
580 for (ch = 0; ch < eeprom_ch_count; ch++) {
581 ch_info->channel = eeprom_ch_index[ch];
582 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
583 IEEE80211_BAND_5GHZ;
584
585 /* permanently store EEPROM's channel regulatory flags
586 * and max power in channel info database. */
587 ch_info->eeprom = eeprom_ch_info[ch];
588
589 /* Copy the run-time flags so they are there even on
590 * invalid channels */
591 ch_info->flags = eeprom_ch_info[ch].flags;
7aafef1c 592 /* First write that ht40 is not enabled, and then enable
963f5517 593 * one by one */
7aafef1c 594 ch_info->ht40_extension_channel =
3b24716f 595 IEEE80211_CHAN_NO_HT40;
bf85ea4f
AK		 596
597 if (!(is_channel_valid(ch_info))) {
e1623446 598 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
bf85ea4f
AK		 599 "No traffic\n",
600 ch_info->channel,
601 ch_info->flags,
602 is_channel_a_band(ch_info) ?
603 "5.2" : "2.4");
604 ch_info++;
605 continue;
606 }
607
608 /* Initialize regulatory-based run-time data */
609 ch_info->max_power_avg = ch_info->curr_txpow =
610 eeprom_ch_info[ch].max_power_avg;
611 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
612 ch_info->min_power = 0;
613
e1623446 614 IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
630fe9b6 615 " Ad-Hoc %ssupported\n",
bf85ea4f
AK		 616 ch_info->channel,
617 is_channel_a_band(ch_info) ?
618 "5.2" : "2.4",
619 CHECK_AND_PRINT_I(VALID),
620 CHECK_AND_PRINT_I(IBSS),
621 CHECK_AND_PRINT_I(ACTIVE),
622 CHECK_AND_PRINT_I(RADAR),
623 CHECK_AND_PRINT_I(WIDE),
bf85ea4f
AK		 624 CHECK_AND_PRINT_I(DFS),
625 eeprom_ch_info[ch].flags,
626 eeprom_ch_info[ch].max_power_avg,
627 ((eeprom_ch_info[ch].
628 flags & EEPROM_CHANNEL_IBSS)
629 && !(eeprom_ch_info[ch].
630 flags & EEPROM_CHANNEL_RADAR))
631 ? "" : "not ");
632
62ea9c5b 633 /* Set the tx_power_user_lmt to the highest power
bf85ea4f
AK		 634 * supported by any channel */
635 if (eeprom_ch_info[ch].max_power_avg >
630fe9b6
TW		 636 priv->tx_power_user_lmt)
637 priv->tx_power_user_lmt =
bf85ea4f
AK		 638 eeprom_ch_info[ch].max_power_avg;
639
640 ch_info++;
641 }
642 }
643
7aafef1c 644 /* Check if we do have HT40 channels */
a89d03c4 645 if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
7aafef1c 646 EEPROM_REGULATORY_BAND_NO_HT40 &&
a89d03c4 647 priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
7aafef1c 648 EEPROM_REGULATORY_BAND_NO_HT40)
e6148917
SO		 649 return 0;
650
7aafef1c 651 /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
bf85ea4f
AK		 652 for (band = 6; band <= 7; band++) {
653 enum ieee80211_band ieeeband;
bf85ea4f
AK		 654
655 iwl_init_band_reference(priv, band, &eeprom_ch_count,
656 &eeprom_ch_info, &eeprom_ch_index);
657
658 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
659 ieeeband =
660 (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
661
662 /* Loop through each band adding each of the channels */
663 for (ch = 0; ch < eeprom_ch_count; ch++) {
bf85ea4f 664 /* Set up driver's info for lower half */
3b24716f 665 iwl_mod_ht40_chan_info(priv, ieeeband,
da6833cb 666 eeprom_ch_index[ch],
3b24716f
ZY		 667 &eeprom_ch_info[ch],
668 IEEE80211_CHAN_NO_HT40PLUS);
bf85ea4f
AK		 669
670 /* Set up driver's info for upper half */
3b24716f
ZY		 671 iwl_mod_ht40_chan_info(priv, ieeeband,
672 eeprom_ch_index[ch] + 4,
673 &eeprom_ch_info[ch],
674 IEEE80211_CHAN_NO_HT40MINUS);
bf85ea4f
AK		 675 }
676 }
677
678 return 0;
679}
680EXPORT_SYMBOL(iwl_init_channel_map);
681
682/*
da6833cb 683 * iwl_free_channel_map - undo allocations in iwl_init_channel_map
bf85ea4f
AK		 684 */
685void iwl_free_channel_map(struct iwl_priv *priv)
686{
687 kfree(priv->channel_info);
688 priv->channel_count = 0;
689}
e6148917 690EXPORT_SYMBOL(iwl_free_channel_map);
bf85ea4f
AK		 691
692/**
693 * iwl_get_channel_info - Find driver's private channel info
694 *
695 * Based on band and channel number.
696 */
82a66bbb
TW		 697const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
698 enum ieee80211_band band, u16 channel)
bf85ea4f
AK		 699{
700 int i;
701
702 switch (band) {
703 case IEEE80211_BAND_5GHZ:
704 for (i = 14; i < priv->channel_count; i++) {
705 if (priv->channel_info[i].channel == channel)
706 return &priv->channel_info[i];
707 }
708 break;
709 case IEEE80211_BAND_2GHZ:
710 if (channel >= 1 && channel <= 14)
711 return &priv->channel_info[channel - 1];
712 break;
713 default:
714 BUG();
715 }
716
717 return NULL;
718}
8622e705 719EXPORT_SYMBOL(iwl_get_channel_info);
bf85ea4f 720
Linux kernel - Deliverables
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