dma-mapping: replace all DMA_39BIT_MASK macro with DMA_BIT_MASK(39)
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
CommitLineData
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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
43#include <net/ieee80211_radiotap.h>
7e272fcf 44#include <net/lib80211.h>
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45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
a3139c59
SO
49#define DRV_NAME "iwl3945"
50
dbb6654c
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51#include "iwl-fh.h"
52#include "iwl-3945-fh.h"
600c0e11 53#include "iwl-commands.h"
17f841cd 54#include "iwl-sta.h"
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55#include "iwl-3945.h"
56#include "iwl-helpers.h"
5747d47f 57#include "iwl-core.h"
d20b3c65 58#include "iwl-dev.h"
b481de9c 59
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60/*
61 * module name, copyright, version, etc.
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62 */
63
64#define DRV_DESCRIPTION \
65"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
d08853a3 67#ifdef CONFIG_IWLWIFI_DEBUG
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68#define VD "d"
69#else
70#define VD
71#endif
72
c8b0e6e1 73#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
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74#define VS "s"
75#else
76#define VS
77#endif
78
eaa686c3 79#define IWL39_VERSION "1.2.26k" VD VS
01f8162a 80#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
a7b75207 81#define DRV_AUTHOR "<ilw@linux.intel.com>"
eaa686c3 82#define DRV_VERSION IWL39_VERSION
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
a7b75207 87MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
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88MODULE_LICENSE("GPL");
89
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90 /* module parameters */
91struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_MAX_NUM_QUEUES,
9c74d9fb 93 .sw_crypto = 1,
af48d048 94 .restart_fw = 1,
df878d8f
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95 /* the rest are 0 by default */
96};
97
b481de9c 98/*************** STATION TABLE MANAGEMENT ****
9fbab516 99 * mac80211 should be examined to determine if sta_info is duplicating
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100 * the functionality provided here
101 */
102
103/**************************************************************/
01ebd063 104#if 0 /* temporary disable till we add real remove station */
6440adb5
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105/**
106 * iwl3945_remove_station - Remove driver's knowledge of station.
107 *
108 * NOTE: This does not remove station from device's station table.
109 */
4a8a4322 110static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
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111{
112 int index = IWL_INVALID_STATION;
113 int i;
114 unsigned long flags;
115
116 spin_lock_irqsave(&priv->sta_lock, flags);
117
118 if (is_ap)
119 index = IWL_AP_ID;
120 else if (is_broadcast_ether_addr(addr))
3832ec9d 121 index = priv->hw_params.bcast_sta_id;
b481de9c 122 else
3832ec9d 123 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
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124 if (priv->stations_39[i].used &&
125 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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126 addr)) {
127 index = i;
128 break;
129 }
130
131 if (unlikely(index == IWL_INVALID_STATION))
132 goto out;
133
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134 if (priv->stations_39[index].used) {
135 priv->stations_39[index].used = 0;
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136 priv->num_stations--;
137 }
138
139 BUG_ON(priv->num_stations < 0);
140
141out:
142 spin_unlock_irqrestore(&priv->sta_lock, flags);
143 return 0;
144}
556f8db7 145#endif
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146
147/**
148 * iwl3945_clear_stations_table - Clear the driver's station table
149 *
150 * NOTE: This does not clear or otherwise alter the device's station table.
151 */
4a8a4322 152static void iwl3945_clear_stations_table(struct iwl_priv *priv)
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153{
154 unsigned long flags;
155
156 spin_lock_irqsave(&priv->sta_lock, flags);
157
158 priv->num_stations = 0;
f2c7e521 159 memset(priv->stations_39, 0, sizeof(priv->stations_39));
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160
161 spin_unlock_irqrestore(&priv->sta_lock, flags);
162}
163
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164/**
165 * iwl3945_add_station - Add station to station tables in driver and device
166 */
4a8a4322 167u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
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168{
169 int i;
170 int index = IWL_INVALID_STATION;
bb8c093b 171 struct iwl3945_station_entry *station;
b481de9c 172 unsigned long flags_spin;
c14c521e 173 u8 rate;
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174
175 spin_lock_irqsave(&priv->sta_lock, flags_spin);
176 if (is_ap)
177 index = IWL_AP_ID;
178 else if (is_broadcast_ether_addr(addr))
3832ec9d 179 index = priv->hw_params.bcast_sta_id;
b481de9c 180 else
3832ec9d 181 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
f2c7e521 182 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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183 addr)) {
184 index = i;
185 break;
186 }
187
f2c7e521 188 if (!priv->stations_39[i].used &&
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189 index == IWL_INVALID_STATION)
190 index = i;
191 }
192
01ebd063 193 /* These two conditions has the same outcome but keep them separate
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194 since they have different meaning */
195 if (unlikely(index == IWL_INVALID_STATION)) {
196 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
197 return index;
198 }
199
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200 if (priv->stations_39[index].used &&
201 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
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202 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
203 return index;
204 }
205
e1623446 206 IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
f2c7e521 207 station = &priv->stations_39[index];
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208 station->used = 1;
209 priv->num_stations++;
210
6440adb5 211 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 212 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
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213 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
214 station->sta.mode = 0;
215 station->sta.sta.sta_id = index;
216 station->sta.station_flags = 0;
217
8318d78a 218 if (priv->band == IEEE80211_BAND_5GHZ)
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219 rate = IWL_RATE_6M_PLCP;
220 else
221 rate = IWL_RATE_1M_PLCP;
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222
223 /* Turn on both antennas for the station... */
224 station->sta.rate_n_flags =
bb8c093b 225 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
c14c521e 226
b481de9c 227 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
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228
229 /* Add station to device's station table */
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230 iwl_send_add_sta(priv,
231 (struct iwl_addsta_cmd *)&station->sta, flags);
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232 return index;
233
234}
235
4a8a4322 236static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
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237{
238 int rc = 0;
3d24a9f7 239 struct iwl_rx_packet *res = NULL;
bb8c093b 240 struct iwl3945_rxon_assoc_cmd rxon_assoc;
c2d79b48 241 struct iwl_host_cmd cmd = {
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242 .id = REPLY_RXON_ASSOC,
243 .len = sizeof(rxon_assoc),
244 .meta.flags = CMD_WANT_SKB,
245 .data = &rxon_assoc,
246 };
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247 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
248 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
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249
250 if ((rxon1->flags == rxon2->flags) &&
251 (rxon1->filter_flags == rxon2->filter_flags) &&
252 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
253 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
e1623446 254 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
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255 return 0;
256 }
257
8ccde88a
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258 rxon_assoc.flags = priv->staging_rxon.flags;
259 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
260 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
261 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
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262 rxon_assoc.reserved = 0;
263
518099a8 264 rc = iwl_send_cmd_sync(priv, &cmd);
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265 if (rc)
266 return rc;
267
3d24a9f7 268 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 269 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 270 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
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271 rc = -EIO;
272 }
273
274 priv->alloc_rxb_skb--;
275 dev_kfree_skb_any(cmd.meta.u.skb);
276
277 return rc;
278}
279
7e4bca5e
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280/**
281 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
282 * @priv: eeprom and antenna fields are used to determine antenna flags
283 *
284 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
285 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
286 *
287 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
288 * IWL_ANTENNA_MAIN - Force MAIN antenna
289 * IWL_ANTENNA_AUX - Force AUX antenna
290 */
291__le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
292{
293 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
294
295 switch (iwl3945_mod_params.antenna) {
296 case IWL_ANTENNA_DIVERSITY:
297 return 0;
298
299 case IWL_ANTENNA_MAIN:
300 if (eeprom->antenna_switch_type)
301 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
302 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
303
304 case IWL_ANTENNA_AUX:
305 if (eeprom->antenna_switch_type)
306 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
307 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
308 }
309
310 /* bad antenna selector value */
311 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
312 iwl3945_mod_params.antenna);
313
314 return 0; /* "diversity" is default if error */
315}
316
b481de9c 317/**
bb8c093b 318 * iwl3945_commit_rxon - commit staging_rxon to hardware
b481de9c 319 *
01ebd063 320 * The RXON command in staging_rxon is committed to the hardware and
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321 * the active_rxon structure is updated with the new data. This
322 * function correctly transitions out of the RXON_ASSOC_MSK state if
323 * a HW tune is required based on the RXON structure changes.
324 */
4a8a4322 325static int iwl3945_commit_rxon(struct iwl_priv *priv)
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326{
327 /* cast away the const for active_rxon in this function */
8ccde88a
SO
328 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
329 struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
b481de9c 330 int rc = 0;
8337031e
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331 bool new_assoc =
332 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 333
775a6e27 334 if (!iwl_is_alive(priv))
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335 return -1;
336
337 /* always get timestamp with Rx frame */
8ccde88a 338 staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
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339
340 /* select antenna */
8ccde88a 341 staging_rxon->flags &=
b481de9c 342 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
8ccde88a 343 staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
b481de9c 344
8ccde88a 345 rc = iwl_check_rxon_cmd(priv);
b481de9c 346 if (rc) {
15b1687c 347 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
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348 return -EINVAL;
349 }
350
351 /* If we don't need to send a full RXON, we can use
bb8c093b 352 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 353 * and other flags for the current radio configuration. */
8ccde88a 354 if (!iwl_full_rxon_required(priv)) {
bb8c093b 355 rc = iwl3945_send_rxon_assoc(priv);
b481de9c 356 if (rc) {
15b1687c 357 IWL_ERR(priv, "Error setting RXON_ASSOC "
b481de9c
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358 "configuration (%d).\n", rc);
359 return rc;
360 }
361
8ccde88a 362 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
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363
364 return 0;
365 }
366
367 /* If we are currently associated and the new config requires
368 * an RXON_ASSOC and the new config wants the associated mask enabled,
369 * we must clear the associated from the active configuration
370 * before we apply the new config */
8337031e 371 if (iwl_is_associated(priv) && new_assoc) {
e1623446 372 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
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373 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
374
8ccde88a
SO
375 /*
376 * reserved4 and 5 could have been filled by the iwlcore code.
377 * Let's clear them before pushing to the 3945.
378 */
379 active_rxon->reserved4 = 0;
380 active_rxon->reserved5 = 0;
518099a8 381 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 382 sizeof(struct iwl3945_rxon_cmd),
8ccde88a 383 &priv->active_rxon);
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384
385 /* If the mask clearing failed then we set
386 * active_rxon back to what it was previously */
387 if (rc) {
388 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
15b1687c 389 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
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390 "configuration (%d).\n", rc);
391 return rc;
392 }
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393 }
394
e1623446 395 IWL_DEBUG_INFO(priv, "Sending RXON\n"
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396 "* with%s RXON_FILTER_ASSOC_MSK\n"
397 "* channel = %d\n"
e174961c 398 "* bssid = %pM\n",
8337031e 399 (new_assoc ? "" : "out"),
8ccde88a
SO
400 le16_to_cpu(staging_rxon->channel),
401 staging_rxon->bssid_addr);
402
403 /*
404 * reserved4 and 5 could have been filled by the iwlcore code.
405 * Let's clear them before pushing to the 3945.
406 */
407 staging_rxon->reserved4 = 0;
408 staging_rxon->reserved5 = 0;
b481de9c 409
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410 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
411
b481de9c 412 /* Apply the new configuration */
518099a8 413 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
8ccde88a
SO
414 sizeof(struct iwl3945_rxon_cmd),
415 staging_rxon);
b481de9c 416 if (rc) {
15b1687c 417 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
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418 return rc;
419 }
420
8ccde88a 421 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
b481de9c 422
bb8c093b 423 iwl3945_clear_stations_table(priv);
556f8db7 424
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425 /* If we issue a new RXON command which required a tune then we must
426 * send a new TXPOWER command or we won't be able to Tx any frames */
75bcfae9 427 rc = priv->cfg->ops->lib->send_tx_power(priv);
b481de9c 428 if (rc) {
15b1687c 429 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
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430 return rc;
431 }
432
433 /* Add the broadcast address so we can send broadcast frames */
b5323d36 434 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
b481de9c 435 IWL_INVALID_STATION) {
15b1687c 436 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
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437 return -EIO;
438 }
439
440 /* If we have set the ASSOC_MSK and we are in BSS mode then
441 * add the IWL_AP_ID to the station rate table */
8ccde88a 442 if (iwl_is_associated(priv) &&
05c914fe 443 (priv->iw_mode == NL80211_IFTYPE_STATION))
8ccde88a
SO
444 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr,
445 1, 0)
b481de9c 446 == IWL_INVALID_STATION) {
15b1687c 447 IWL_ERR(priv, "Error adding AP address for transmit\n");
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448 return -EIO;
449 }
450
8318d78a 451 /* Init the hardware's rate fallback order based on the band */
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452 rc = iwl3945_init_hw_rate_table(priv);
453 if (rc) {
15b1687c 454 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
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455 return -EIO;
456 }
457
458 return 0;
459}
460
6e21f15c 461static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
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462 struct ieee80211_key_conf *keyconf,
463 u8 sta_id)
464{
465 unsigned long flags;
466 __le16 key_flags = 0;
6e21f15c
AK
467 int ret;
468
469 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
470 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
471
472 if (sta_id == priv->hw_params.bcast_sta_id)
473 key_flags |= STA_KEY_MULTICAST_MSK;
474
475 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
476 keyconf->hw_key_idx = keyconf->keyidx;
477 key_flags &= ~STA_KEY_FLG_INVALID;
b481de9c 478
b481de9c 479 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
480 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
481 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
482 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
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483 keyconf->keylen);
484
f2c7e521 485 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
b481de9c 486 keyconf->keylen);
6e21f15c 487
43da9192 488 if ((priv->stations_39[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
6e21f15c 489 == STA_KEY_FLG_NO_ENC)
43da9192 490 priv->stations_39[sta_id].sta.key.key_offset =
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491 iwl_get_free_ucode_key_index(priv);
492 /* else, we are overriding an existing key => no need to allocated room
493 * in uCode. */
494
43da9192 495 WARN(priv->stations_39[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
6e21f15c
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496 "no space for a new key");
497
f2c7e521
AK
498 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
499 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
500 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c 501
6e21f15c
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502 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
503
504 ret = iwl_send_add_sta(priv,
505 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC);
506
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507 spin_unlock_irqrestore(&priv->sta_lock, flags);
508
6e21f15c
AK
509 return ret;
510}
511
512static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
513 struct ieee80211_key_conf *keyconf,
514 u8 sta_id)
515{
516 return -EOPNOTSUPP;
517}
518
519static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
520 struct ieee80211_key_conf *keyconf,
521 u8 sta_id)
522{
523 return -EOPNOTSUPP;
b481de9c
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524}
525
4a8a4322 526static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
b481de9c
ZY
527{
528 unsigned long flags;
529
530 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
531 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
532 memset(&priv->stations_39[sta_id].sta.key, 0,
4c897253 533 sizeof(struct iwl4965_keyinfo));
f2c7e521
AK
534 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
535 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
536 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c
ZY
537 spin_unlock_irqrestore(&priv->sta_lock, flags);
538
e1623446 539 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
17f841cd
SO
540 iwl_send_add_sta(priv,
541 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
b481de9c
ZY
542 return 0;
543}
544
fa11d525 545static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
6e21f15c
AK
546 struct ieee80211_key_conf *keyconf, u8 sta_id)
547{
548 int ret = 0;
549
550 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
551
552 switch (keyconf->alg) {
553 case ALG_CCMP:
554 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
555 break;
556 case ALG_TKIP:
557 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
558 break;
559 case ALG_WEP:
560 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
561 break;
562 default:
1e680233 563 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
6e21f15c
AK
564 ret = -EINVAL;
565 }
566
567 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
568 keyconf->alg, keyconf->keylen, keyconf->keyidx,
569 sta_id, ret);
570
571 return ret;
572}
573
574static int iwl3945_remove_static_key(struct iwl_priv *priv)
575{
576 int ret = -EOPNOTSUPP;
577
578 return ret;
579}
580
581static int iwl3945_set_static_key(struct iwl_priv *priv,
582 struct ieee80211_key_conf *key)
583{
584 if (key->alg == ALG_WEP)
585 return -EOPNOTSUPP;
586
587 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
588 return -EINVAL;
589}
590
4a8a4322 591static void iwl3945_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY
592{
593 struct list_head *element;
594
e1623446 595 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
b481de9c
ZY
596 priv->frames_count);
597
598 while (!list_empty(&priv->free_frames)) {
599 element = priv->free_frames.next;
600 list_del(element);
bb8c093b 601 kfree(list_entry(element, struct iwl3945_frame, list));
b481de9c
ZY
602 priv->frames_count--;
603 }
604
605 if (priv->frames_count) {
39aadf8c 606 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
ZY
607 priv->frames_count);
608 priv->frames_count = 0;
609 }
610}
611
4a8a4322 612static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
b481de9c 613{
bb8c093b 614 struct iwl3945_frame *frame;
b481de9c
ZY
615 struct list_head *element;
616 if (list_empty(&priv->free_frames)) {
617 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
618 if (!frame) {
15b1687c 619 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
ZY
620 return NULL;
621 }
622
623 priv->frames_count++;
624 return frame;
625 }
626
627 element = priv->free_frames.next;
628 list_del(element);
bb8c093b 629 return list_entry(element, struct iwl3945_frame, list);
b481de9c
ZY
630}
631
4a8a4322 632static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
b481de9c
ZY
633{
634 memset(frame, 0, sizeof(*frame));
635 list_add(&frame->list, &priv->free_frames);
636}
637
4a8a4322 638unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
b481de9c 639 struct ieee80211_hdr *hdr,
73ec1cc2 640 int left)
b481de9c
ZY
641{
642
8ccde88a 643 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
644 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
645 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY
646 return 0;
647
648 if (priv->ibss_beacon->len > left)
649 return 0;
650
651 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
652
653 return priv->ibss_beacon->len;
654}
655
4a8a4322 656static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 657{
bb8c093b 658 struct iwl3945_frame *frame;
b481de9c
ZY
659 unsigned int frame_size;
660 int rc;
661 u8 rate;
662
bb8c093b 663 frame = iwl3945_get_free_frame(priv);
b481de9c
ZY
664
665 if (!frame) {
15b1687c 666 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
ZY
667 "command.\n");
668 return -ENOMEM;
669 }
670
8ccde88a 671 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 672
bb8c093b 673 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 674
518099a8 675 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
676 &frame->u.cmd[0]);
677
bb8c093b 678 iwl3945_free_frame(priv, frame);
b481de9c
ZY
679
680 return rc;
681}
682
4a8a4322 683static void iwl3945_unset_hw_params(struct iwl_priv *priv)
b481de9c 684{
3832ec9d 685 if (priv->shared_virt)
b481de9c 686 pci_free_consistent(priv->pci_dev,
bb8c093b 687 sizeof(struct iwl3945_shared),
3832ec9d
AK
688 priv->shared_virt,
689 priv->shared_phys);
b481de9c
ZY
690}
691
b481de9c 692#define MAX_UCODE_BEACON_INTERVAL 1024
c1b4aa3f 693#define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
b481de9c 694
bb8c093b 695static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
696{
697 u16 new_val = 0;
698 u16 beacon_factor = 0;
699
700 beacon_factor =
701 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
702 / MAX_UCODE_BEACON_INTERVAL;
703 new_val = beacon_val / beacon_factor;
704
705 return cpu_to_le16(new_val);
706}
707
4a8a4322 708static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
709{
710 u64 interval_tm_unit;
711 u64 tsf, result;
712 unsigned long flags;
713 struct ieee80211_conf *conf = NULL;
714 u16 beacon_int = 0;
715
716 conf = ieee80211_get_hw_conf(priv->hw);
717
718 spin_lock_irqsave(&priv->lock, flags);
28afaf91 719 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b481de9c
ZY
720 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
721
28afaf91 722 tsf = priv->timestamp;
b481de9c
ZY
723
724 beacon_int = priv->beacon_int;
725 spin_unlock_irqrestore(&priv->lock, flags);
726
05c914fe 727 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
b481de9c
ZY
728 if (beacon_int == 0) {
729 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
730 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
731 } else {
732 priv->rxon_timing.beacon_interval =
733 cpu_to_le16(beacon_int);
734 priv->rxon_timing.beacon_interval =
bb8c093b 735 iwl3945_adjust_beacon_interval(
b481de9c
ZY
736 le16_to_cpu(priv->rxon_timing.beacon_interval));
737 }
738
739 priv->rxon_timing.atim_window = 0;
740 } else {
741 priv->rxon_timing.beacon_interval =
bb8c093b 742 iwl3945_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
743 /* TODO: we need to get atim_window from upper stack
744 * for now we set to 0 */
745 priv->rxon_timing.atim_window = 0;
746 }
747
748 interval_tm_unit =
749 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
750 result = do_div(tsf, interval_tm_unit);
751 priv->rxon_timing.beacon_init_val =
752 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
753
e1623446
TW
754 IWL_DEBUG_ASSOC(priv,
755 "beacon interval %d beacon timer %d beacon tim %d\n",
b481de9c
ZY
756 le16_to_cpu(priv->rxon_timing.beacon_interval),
757 le32_to_cpu(priv->rxon_timing.beacon_init_val),
758 le16_to_cpu(priv->rxon_timing.atim_window));
759}
760
4a8a4322 761static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
b481de9c 762{
05c914fe 763 if (mode == NL80211_IFTYPE_ADHOC) {
d20b3c65 764 const struct iwl_channel_info *ch_info;
b481de9c 765
e6148917 766 ch_info = iwl_get_channel_info(priv,
8318d78a 767 priv->band,
8ccde88a 768 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
769
770 if (!ch_info || !is_channel_ibss(ch_info)) {
15b1687c 771 IWL_ERR(priv, "channel %d not IBSS channel\n",
8ccde88a 772 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
773 return -EINVAL;
774 }
775 }
776
8ccde88a 777 iwl_connection_init_rx_config(priv, mode);
b481de9c 778
bb8c093b 779 iwl3945_clear_stations_table(priv);
b481de9c 780
a96a27f9 781 /* don't commit rxon if rf-kill is on*/
775a6e27 782 if (!iwl_is_ready_rf(priv))
fde3571f
MA
783 return -EAGAIN;
784
785 cancel_delayed_work(&priv->scan_check);
af0053d6 786 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 787 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
e1623446 788 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
fde3571f
MA
789 return -EAGAIN;
790 }
791
bb8c093b 792 iwl3945_commit_rxon(priv);
b481de9c
ZY
793
794 return 0;
795}
796
4a8a4322 797static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
e039fa4a 798 struct ieee80211_tx_info *info,
c2d79b48 799 struct iwl_cmd *cmd,
b481de9c 800 struct sk_buff *skb_frag,
6e21f15c 801 int sta_id)
b481de9c 802{
e52119c5 803 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
1c014420 804 struct iwl3945_hw_key *keyinfo =
6e21f15c 805 &priv->stations_39[sta_id].keyinfo;
b481de9c
ZY
806
807 switch (keyinfo->alg) {
808 case ALG_CCMP:
e52119c5
WT
809 tx->sec_ctl = TX_CMD_SEC_CCM;
810 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
e1623446 811 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
b481de9c
ZY
812 break;
813
814 case ALG_TKIP:
b481de9c
ZY
815 break;
816
817 case ALG_WEP:
e52119c5 818 tx->sec_ctl = TX_CMD_SEC_WEP |
e039fa4a 819 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
b481de9c
ZY
820
821 if (keyinfo->keylen == 13)
e52119c5 822 tx->sec_ctl |= TX_CMD_SEC_KEY128;
b481de9c 823
e52119c5 824 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
b481de9c 825
e1623446 826 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
e039fa4a 827 "with key %d\n", info->control.hw_key->hw_key_idx);
b481de9c
ZY
828 break;
829
b481de9c 830 default:
978785a3 831 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
b481de9c
ZY
832 break;
833 }
834}
835
836/*
837 * handle build REPLY_TX command notification.
838 */
4a8a4322 839static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
c2d79b48 840 struct iwl_cmd *cmd,
e039fa4a 841 struct ieee80211_tx_info *info,
e52119c5 842 struct ieee80211_hdr *hdr, u8 std_id)
b481de9c 843{
e52119c5
WT
844 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
845 __le32 tx_flags = tx->tx_flags;
fd7c8a40 846 __le16 fc = hdr->frame_control;
e6a9854b 847 u8 rc_flags = info->control.rates[0].flags;
b481de9c 848
e52119c5 849 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
e039fa4a 850 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
b481de9c 851 tx_flags |= TX_CMD_FLG_ACK_MSK;
fd7c8a40 852 if (ieee80211_is_mgmt(fc))
b481de9c 853 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
fd7c8a40 854 if (ieee80211_is_probe_resp(fc) &&
b481de9c
ZY
855 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
856 tx_flags |= TX_CMD_FLG_TSF_MSK;
857 } else {
858 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
859 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
860 }
861
e52119c5 862 tx->sta_id = std_id;
8b7b1e05 863 if (ieee80211_has_morefrags(fc))
b481de9c
ZY
864 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
865
fd7c8a40
HH
866 if (ieee80211_is_data_qos(fc)) {
867 u8 *qc = ieee80211_get_qos_ctl(hdr);
e52119c5 868 tx->tid_tspec = qc[0] & 0xf;
b481de9c 869 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 870 } else {
b481de9c 871 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 872 }
b481de9c 873
e6a9854b 874 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
b481de9c
ZY
875 tx_flags |= TX_CMD_FLG_RTS_MSK;
876 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
e6a9854b 877 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
b481de9c
ZY
878 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
879 tx_flags |= TX_CMD_FLG_CTS_MSK;
880 }
881
882 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
883 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
884
885 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
fd7c8a40
HH
886 if (ieee80211_is_mgmt(fc)) {
887 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
e52119c5 888 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 889 else
e52119c5 890 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 891 } else {
e52119c5 892 tx->timeout.pm_frame_timeout = 0;
5c8df2d5 893#ifdef CONFIG_IWLWIFI_LEDS
ab53d8af
MA
894 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
895#endif
896 }
b481de9c 897
e52119c5
WT
898 tx->driver_txop = 0;
899 tx->tx_flags = tx_flags;
900 tx->next_frame_len = 0;
b481de9c
ZY
901}
902
6440adb5
CB
903/**
904 * iwl3945_get_sta_id - Find station's index within station table
905 */
4a8a4322 906static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
b481de9c
ZY
907{
908 int sta_id;
909 u16 fc = le16_to_cpu(hdr->frame_control);
910
6440adb5 911 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY
912 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
913 is_multicast_ether_addr(hdr->addr1))
3832ec9d 914 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
915
916 switch (priv->iw_mode) {
917
6440adb5
CB
918 /* If we are a client station in a BSS network, use the special
919 * AP station entry (that's the only station we communicate with) */
05c914fe 920 case NL80211_IFTYPE_STATION:
b481de9c
ZY
921 return IWL_AP_ID;
922
923 /* If we are an AP, then find the station, or use BCAST */
05c914fe 924 case NL80211_IFTYPE_AP:
bb8c093b 925 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
926 if (sta_id != IWL_INVALID_STATION)
927 return sta_id;
3832ec9d 928 return priv->hw_params.bcast_sta_id;
b481de9c 929
6440adb5
CB
930 /* If this frame is going out to an IBSS network, find the station,
931 * or create a new station table entry */
05c914fe 932 case NL80211_IFTYPE_ADHOC: {
6440adb5 933 /* Create new station table entry */
bb8c093b 934 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
935 if (sta_id != IWL_INVALID_STATION)
936 return sta_id;
937
bb8c093b 938 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
b481de9c
ZY
939
940 if (sta_id != IWL_INVALID_STATION)
941 return sta_id;
942
e1623446 943 IWL_DEBUG_DROP(priv, "Station %pM not in station map. "
b481de9c 944 "Defaulting to broadcast...\n",
e174961c 945 hdr->addr1);
40b8ec0b 946 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
3832ec9d 947 return priv->hw_params.bcast_sta_id;
0795af57 948 }
914233d6
SG
949 /* If we are in monitor mode, use BCAST. This is required for
950 * packet injection. */
05c914fe 951 case NL80211_IFTYPE_MONITOR:
3832ec9d 952 return priv->hw_params.bcast_sta_id;
914233d6 953
b481de9c 954 default:
39aadf8c
WT
955 IWL_WARN(priv, "Unknown mode of operation: %d\n",
956 priv->iw_mode);
3832ec9d 957 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
958 }
959}
960
961/*
962 * start REPLY_TX command process
963 */
4a8a4322 964static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
b481de9c
ZY
965{
966 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
e039fa4a 967 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e52119c5 968 struct iwl3945_tx_cmd *tx;
188cf6c7 969 struct iwl_tx_queue *txq = NULL;
d20b3c65 970 struct iwl_queue *q = NULL;
e52119c5 971 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
972 dma_addr_t phys_addr;
973 dma_addr_t txcmd_phys;
e52119c5 974 int txq_id = skb_get_queue_mapping(skb);
54dbb525
TW
975 u16 len, idx, len_org, hdr_len;
976 u8 id;
977 u8 unicast;
b481de9c 978 u8 sta_id;
54dbb525 979 u8 tid = 0;
b481de9c 980 u16 seq_number = 0;
fd7c8a40 981 __le16 fc;
b481de9c 982 u8 wait_write_ptr = 0;
54dbb525 983 u8 *qc = NULL;
b481de9c
ZY
984 unsigned long flags;
985 int rc;
986
987 spin_lock_irqsave(&priv->lock, flags);
775a6e27 988 if (iwl_is_rfkill(priv)) {
e1623446 989 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
b481de9c
ZY
990 goto drop_unlock;
991 }
992
e039fa4a 993 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
15b1687c 994 IWL_ERR(priv, "ERROR: No TX rate available.\n");
b481de9c
ZY
995 goto drop_unlock;
996 }
997
998 unicast = !is_multicast_ether_addr(hdr->addr1);
999 id = 0;
1000
fd7c8a40 1001 fc = hdr->frame_control;
b481de9c 1002
d08853a3 1003#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c 1004 if (ieee80211_is_auth(fc))
e1623446 1005 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
fd7c8a40 1006 else if (ieee80211_is_assoc_req(fc))
e1623446 1007 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
fd7c8a40 1008 else if (ieee80211_is_reassoc_req(fc))
e1623446 1009 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
b481de9c
ZY
1010#endif
1011
7878a5a4 1012 /* drop all data frame if we are not associated */
914233d6 1013 if (ieee80211_is_data(fc) &&
05c914fe 1014 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
8ccde88a 1015 (!iwl_is_associated(priv) ||
05c914fe 1016 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
e1623446 1017 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
b481de9c
ZY
1018 goto drop_unlock;
1019 }
1020
1021 spin_unlock_irqrestore(&priv->lock, flags);
1022
7294ec95 1023 hdr_len = ieee80211_hdrlen(fc);
6440adb5
CB
1024
1025 /* Find (or create) index into station table for destination station */
bb8c093b 1026 sta_id = iwl3945_get_sta_id(priv, hdr);
b481de9c 1027 if (sta_id == IWL_INVALID_STATION) {
e1623446 1028 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
e174961c 1029 hdr->addr1);
b481de9c
ZY
1030 goto drop;
1031 }
1032
e1623446 1033 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
b481de9c 1034
fd7c8a40
HH
1035 if (ieee80211_is_data_qos(fc)) {
1036 qc = ieee80211_get_qos_ctl(hdr);
7294ec95 1037 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
f2c7e521 1038 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
b481de9c
ZY
1039 IEEE80211_SCTL_SEQ;
1040 hdr->seq_ctrl = cpu_to_le16(seq_number) |
1041 (hdr->seq_ctrl &
c1b4aa3f 1042 cpu_to_le16(IEEE80211_SCTL_FRAG));
b481de9c
ZY
1043 seq_number += 0x10;
1044 }
6440adb5
CB
1045
1046 /* Descriptor for chosen Tx queue */
188cf6c7 1047 txq = &priv->txq[txq_id];
b481de9c
ZY
1048 q = &txq->q;
1049
1050 spin_lock_irqsave(&priv->lock, flags);
1051
fc4b6853 1052 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 1053
6440adb5 1054 /* Set up driver data for this TFD */
dbb6654c 1055 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
fc4b6853 1056 txq->txb[q->write_ptr].skb[0] = skb;
6440adb5
CB
1057
1058 /* Init first empty entry in queue's array of Tx/cmd buffers */
188cf6c7 1059 out_cmd = txq->cmd[idx];
e52119c5 1060 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
b481de9c 1061 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
e52119c5 1062 memset(tx, 0, sizeof(*tx));
6440adb5
CB
1063
1064 /*
1065 * Set up the Tx-command (not MAC!) header.
1066 * Store the chosen Tx queue and TFD index within the sequence field;
1067 * after Tx, uCode's Tx response will return this value so driver can
1068 * locate the frame within the tx queue and do post-tx processing.
1069 */
b481de9c
ZY
1070 out_cmd->hdr.cmd = REPLY_TX;
1071 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 1072 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB
1073
1074 /* Copy MAC header from skb into command buffer */
e52119c5 1075 memcpy(tx->hdr, hdr, hdr_len);
b481de9c 1076
6440adb5
CB
1077 /*
1078 * Use the first empty entry in this queue's command buffer array
1079 * to contain the Tx command and MAC header concatenated together
1080 * (payload data will be in another buffer).
1081 * Size of this varies, due to varying MAC header length.
1082 * If end is not dword aligned, we'll have 2 extra bytes at the end
1083 * of the MAC header (device reads on dword boundaries).
1084 * We'll tell device about this padding later.
1085 */
3832ec9d 1086 len = sizeof(struct iwl3945_tx_cmd) +
4c897253 1087 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
1088
1089 len_org = len;
1090 len = (len + 3) & ~3;
1091
1092 if (len_org != len)
1093 len_org = 1;
1094 else
1095 len_org = 0;
1096
6440adb5
CB
1097 /* Physical address of this Tx command's header (not MAC header!),
1098 * within command buffer array. */
188cf6c7
SO
1099 txcmd_phys = pci_map_single(priv->pci_dev,
1100 out_cmd, sizeof(struct iwl_cmd),
1101 PCI_DMA_TODEVICE);
1102 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
1103 pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
1104 /* Add buffer containing Tx command and MAC(!) header to TFD's
1105 * first entry */
1106 txcmd_phys += offsetof(struct iwl_cmd, hdr);
b481de9c 1107
6440adb5
CB
1108 /* Add buffer containing Tx command and MAC(!) header to TFD's
1109 * first entry */
7aaa1d79
SO
1110 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1111 txcmd_phys, len, 1, 0);
b481de9c 1112
d0f09804 1113 if (info->control.hw_key)
6e21f15c 1114 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
b481de9c 1115
6440adb5
CB
1116 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1117 * if any (802.11 null frames have no payload). */
b481de9c
ZY
1118 len = skb->len - hdr_len;
1119 if (len) {
1120 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
1121 len, PCI_DMA_TODEVICE);
7aaa1d79
SO
1122 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1123 phys_addr, len,
1124 0, U32_PAD(len));
b481de9c
ZY
1125 }
1126
6440adb5 1127 /* Total # bytes to be transmitted */
b481de9c 1128 len = (u16)skb->len;
e52119c5 1129 tx->len = cpu_to_le16(len);
b481de9c
ZY
1130
1131 /* TODO need this for burst mode later on */
e52119c5 1132 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
b481de9c
ZY
1133
1134 /* set is_hcca to 0; it probably will never be implemented */
e039fa4a 1135 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
b481de9c 1136
e52119c5
WT
1137 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
1138 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
b481de9c 1139
8b7b1e05 1140 if (!ieee80211_has_morefrags(hdr->frame_control)) {
b481de9c 1141 txq->need_update = 1;
3ac7f146 1142 if (qc)
f2c7e521 1143 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
b481de9c
ZY
1144 } else {
1145 wait_write_ptr = 1;
1146 txq->need_update = 0;
1147 }
1148
e52119c5 1149 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
b481de9c 1150
e52119c5 1151 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
7294ec95 1152 ieee80211_hdrlen(fc));
b481de9c 1153
6440adb5 1154 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 1155 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
4f3602c8 1156 rc = iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
1157 spin_unlock_irqrestore(&priv->lock, flags);
1158
1159 if (rc)
1160 return rc;
1161
d20b3c65 1162 if ((iwl_queue_space(q) < q->high_mark)
b481de9c
ZY
1163 && priv->mac80211_registered) {
1164 if (wait_write_ptr) {
1165 spin_lock_irqsave(&priv->lock, flags);
1166 txq->need_update = 1;
4f3602c8 1167 iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
1168 spin_unlock_irqrestore(&priv->lock, flags);
1169 }
1170
e4e72fb4 1171 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
b481de9c
ZY
1172 }
1173
1174 return 0;
1175
1176drop_unlock:
1177 spin_unlock_irqrestore(&priv->lock, flags);
1178drop:
1179 return -1;
1180}
1181
c8b0e6e1 1182#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
1183
1184#include "iwl-spectrum.h"
1185
1186#define BEACON_TIME_MASK_LOW 0x00FFFFFF
1187#define BEACON_TIME_MASK_HIGH 0xFF000000
1188#define TIME_UNIT 1024
1189
1190/*
1191 * extended beacon time format
1192 * time in usec will be changed into a 32-bit value in 8:24 format
1193 * the high 1 byte is the beacon counts
1194 * the lower 3 bytes is the time in usec within one beacon interval
1195 */
1196
bb8c093b 1197static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
1198{
1199 u32 quot;
1200 u32 rem;
1201 u32 interval = beacon_interval * 1024;
1202
1203 if (!interval || !usec)
1204 return 0;
1205
1206 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
1207 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
1208
1209 return (quot << 24) + rem;
1210}
1211
1212/* base is usually what we get from ucode with each received frame,
1213 * the same as HW timer counter counting down
1214 */
1215
bb8c093b 1216static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
1217{
1218 u32 base_low = base & BEACON_TIME_MASK_LOW;
1219 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
1220 u32 interval = beacon_interval * TIME_UNIT;
1221 u32 res = (base & BEACON_TIME_MASK_HIGH) +
1222 (addon & BEACON_TIME_MASK_HIGH);
1223
1224 if (base_low > addon_low)
1225 res += base_low - addon_low;
1226 else if (base_low < addon_low) {
1227 res += interval + base_low - addon_low;
1228 res += (1 << 24);
1229 } else
1230 res += (1 << 24);
1231
1232 return cpu_to_le32(res);
1233}
1234
4a8a4322 1235static int iwl3945_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
1236 struct ieee80211_measurement_params *params,
1237 u8 type)
1238{
600c0e11 1239 struct iwl_spectrum_cmd spectrum;
3d24a9f7 1240 struct iwl_rx_packet *res;
c2d79b48 1241 struct iwl_host_cmd cmd = {
b481de9c
ZY
1242 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
1243 .data = (void *)&spectrum,
1244 .meta.flags = CMD_WANT_SKB,
1245 };
1246 u32 add_time = le64_to_cpu(params->start_time);
1247 int rc;
1248 int spectrum_resp_status;
1249 int duration = le16_to_cpu(params->duration);
1250
8ccde88a 1251 if (iwl_is_associated(priv))
b481de9c 1252 add_time =
bb8c093b 1253 iwl3945_usecs_to_beacons(
b481de9c
ZY
1254 le64_to_cpu(params->start_time) - priv->last_tsf,
1255 le16_to_cpu(priv->rxon_timing.beacon_interval));
1256
1257 memset(&spectrum, 0, sizeof(spectrum));
1258
1259 spectrum.channel_count = cpu_to_le16(1);
1260 spectrum.flags =
1261 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
1262 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
1263 cmd.len = sizeof(spectrum);
1264 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
1265
8ccde88a 1266 if (iwl_is_associated(priv))
b481de9c 1267 spectrum.start_time =
bb8c093b 1268 iwl3945_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
1269 add_time,
1270 le16_to_cpu(priv->rxon_timing.beacon_interval));
1271 else
1272 spectrum.start_time = 0;
1273
1274 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
1275 spectrum.channels[0].channel = params->channel;
1276 spectrum.channels[0].type = type;
8ccde88a 1277 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
b481de9c
ZY
1278 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
1279 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
1280
518099a8 1281 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
1282 if (rc)
1283 return rc;
1284
3d24a9f7 1285 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 1286 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 1287 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
b481de9c
ZY
1288 rc = -EIO;
1289 }
1290
1291 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
1292 switch (spectrum_resp_status) {
1293 case 0: /* Command will be handled */
1294 if (res->u.spectrum.id != 0xff) {
e1623446 1295 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
bc434dd2 1296 res->u.spectrum.id);
b481de9c
ZY
1297 priv->measurement_status &= ~MEASUREMENT_READY;
1298 }
1299 priv->measurement_status |= MEASUREMENT_ACTIVE;
1300 rc = 0;
1301 break;
1302
1303 case 1: /* Command will not be handled */
1304 rc = -EAGAIN;
1305 break;
1306 }
1307
1308 dev_kfree_skb_any(cmd.meta.u.skb);
1309
1310 return rc;
1311}
1312#endif
1313
4a8a4322 1314static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
6100b588 1315 struct iwl_rx_mem_buffer *rxb)
b481de9c 1316{
3d24a9f7
TW
1317 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1318 struct iwl_alive_resp *palive;
b481de9c
ZY
1319 struct delayed_work *pwork;
1320
1321 palive = &pkt->u.alive_frame;
1322
e1623446 1323 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY
1324 "0x%01X 0x%01X\n",
1325 palive->is_valid, palive->ver_type,
1326 palive->ver_subtype);
1327
1328 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 1329 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
3d24a9f7
TW
1330 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
1331 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1332 pwork = &priv->init_alive_start;
1333 } else {
e1623446 1334 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 1335 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3d24a9f7 1336 sizeof(struct iwl_alive_resp));
b481de9c 1337 pwork = &priv->alive_start;
bb8c093b 1338 iwl3945_disable_events(priv);
b481de9c
ZY
1339 }
1340
1341 /* We delay the ALIVE response by 5ms to
1342 * give the HW RF Kill time to activate... */
1343 if (palive->is_valid == UCODE_VALID_OK)
1344 queue_delayed_work(priv->workqueue, pwork,
1345 msecs_to_jiffies(5));
1346 else
39aadf8c 1347 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY
1348}
1349
4a8a4322 1350static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
6100b588 1351 struct iwl_rx_mem_buffer *rxb)
b481de9c 1352{
c7e035a9 1353#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1354 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
c7e035a9 1355#endif
b481de9c 1356
e1623446 1357 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
b481de9c
ZY
1358 return;
1359}
1360
bb8c093b 1361static void iwl3945_bg_beacon_update(struct work_struct *work)
b481de9c 1362{
4a8a4322
AK
1363 struct iwl_priv *priv =
1364 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1365 struct sk_buff *beacon;
1366
1367 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1368 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1369
1370 if (!beacon) {
15b1687c 1371 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY
1372 return;
1373 }
1374
1375 mutex_lock(&priv->mutex);
1376 /* new beacon skb is allocated every time; dispose previous.*/
1377 if (priv->ibss_beacon)
1378 dev_kfree_skb(priv->ibss_beacon);
1379
1380 priv->ibss_beacon = beacon;
1381 mutex_unlock(&priv->mutex);
1382
bb8c093b 1383 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
1384}
1385
4a8a4322 1386static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
6100b588 1387 struct iwl_rx_mem_buffer *rxb)
b481de9c 1388{
d08853a3 1389#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1390 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
bb8c093b 1391 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
b481de9c
ZY
1392 u8 rate = beacon->beacon_notify_hdr.rate;
1393
e1623446 1394 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c
ZY
1395 "tsf %d %d rate %d\n",
1396 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
1397 beacon->beacon_notify_hdr.failure_frame,
1398 le32_to_cpu(beacon->ibss_mgr_status),
1399 le32_to_cpu(beacon->high_tsf),
1400 le32_to_cpu(beacon->low_tsf), rate);
1401#endif
1402
05c914fe 1403 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
1404 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1405 queue_work(priv->workqueue, &priv->beacon_update);
1406}
1407
b481de9c
ZY
1408/* Handle notification from uCode that card's power state is changing
1409 * due to software, hardware, or critical temperature RFKILL */
4a8a4322 1410static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
6100b588 1411 struct iwl_rx_mem_buffer *rxb)
b481de9c 1412{
3d24a9f7 1413 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
1414 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1415 unsigned long status = priv->status;
1416
e1623446 1417 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY
1418 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1419 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1420
5d49f498 1421 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1422 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1423
1424 if (flags & HW_CARD_DISABLED)
1425 set_bit(STATUS_RF_KILL_HW, &priv->status);
1426 else
1427 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1428
1429
1430 if (flags & SW_CARD_DISABLED)
1431 set_bit(STATUS_RF_KILL_SW, &priv->status);
1432 else
1433 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1434
af0053d6 1435 iwl_scan_cancel(priv);
b481de9c
ZY
1436
1437 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1438 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1439 (test_bit(STATUS_RF_KILL_SW, &status) !=
1440 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1441 queue_work(priv->workqueue, &priv->rf_kill);
1442 else
1443 wake_up_interruptible(&priv->wait_command_queue);
1444}
1445
1446/**
bb8c093b 1447 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1448 *
1449 * Setup the RX handlers for each of the reply types sent from the uCode
1450 * to the host.
1451 *
1452 * This function chains into the hardware specific files for them to setup
1453 * any hardware specific handlers as well.
1454 */
4a8a4322 1455static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1456{
bb8c093b
CH
1457 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
1458 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
261b9c33 1459 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
8ccde88a 1460 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
030f05ed 1461 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 1462 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
030f05ed 1463 iwl_rx_pm_debug_statistics_notif;
bb8c093b 1464 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
b481de9c 1465
9fbab516
BC
1466 /*
1467 * The same handler is used for both the REPLY to a discrete
1468 * statistics request from the host as well as for the periodic
1469 * statistics notifications (after received beacons) from the uCode.
b481de9c 1470 */
bb8c093b
CH
1471 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
1472 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
b481de9c 1473
261b9c33 1474 iwl_setup_spectrum_handlers(priv);
cade0eb2 1475 iwl_setup_rx_scan_handlers(priv);
bb8c093b 1476 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
b481de9c 1477
9fbab516 1478 /* Set up hardware specific Rx handlers */
bb8c093b 1479 iwl3945_hw_rx_handler_setup(priv);
b481de9c
ZY
1480}
1481
b481de9c
ZY
1482/************************** RX-FUNCTIONS ****************************/
1483/*
1484 * Rx theory of operation
1485 *
1486 * The host allocates 32 DMA target addresses and passes the host address
1487 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1488 * 0 to 31
1489 *
1490 * Rx Queue Indexes
1491 * The host/firmware share two index registers for managing the Rx buffers.
1492 *
1493 * The READ index maps to the first position that the firmware may be writing
1494 * to -- the driver can read up to (but not including) this position and get
1495 * good data.
1496 * The READ index is managed by the firmware once the card is enabled.
1497 *
1498 * The WRITE index maps to the last position the driver has read from -- the
1499 * position preceding WRITE is the last slot the firmware can place a packet.
1500 *
1501 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1502 * WRITE = READ.
1503 *
9fbab516 1504 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
1505 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1506 *
9fbab516 1507 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
1508 * and fire the RX interrupt. The driver can then query the READ index and
1509 * process as many packets as possible, moving the WRITE index forward as it
1510 * resets the Rx queue buffers with new memory.
1511 *
1512 * The management in the driver is as follows:
1513 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1514 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 1515 * to replenish the iwl->rxq->rx_free.
bb8c093b 1516 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
1517 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1518 * 'processed' and 'read' driver indexes as well)
1519 * + A received packet is processed and handed to the kernel network stack,
1520 * detached from the iwl->rxq. The driver 'processed' index is updated.
1521 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1522 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1523 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1524 * were enough free buffers and RX_STALLED is set it is cleared.
1525 *
1526 *
1527 * Driver sequence:
1528 *
9fbab516 1529 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 1530 * iwl3945_rx_queue_restock
9fbab516 1531 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
1532 * queue, updates firmware pointers, and updates
1533 * the WRITE index. If insufficient rx_free buffers
bb8c093b 1534 * are available, schedules iwl3945_rx_replenish
b481de9c
ZY
1535 *
1536 * -- enable interrupts --
6100b588 1537 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
b481de9c
ZY
1538 * READ INDEX, detaching the SKB from the pool.
1539 * Moves the packet buffer from queue to rx_used.
bb8c093b 1540 * Calls iwl3945_rx_queue_restock to refill any empty
b481de9c
ZY
1541 * slots.
1542 * ...
1543 *
1544 */
1545
b481de9c 1546/**
9fbab516 1547 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 1548 */
4a8a4322 1549static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
1550 dma_addr_t dma_addr)
1551{
1552 return cpu_to_le32((u32)dma_addr);
1553}
1554
1555/**
bb8c093b 1556 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 1557 *
9fbab516 1558 * If there are slots in the RX queue that need to be restocked,
b481de9c 1559 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 1560 * as we can, pulling from rx_free.
b481de9c
ZY
1561 *
1562 * This moves the 'write' index forward to catch up with 'processed', and
1563 * also updates the memory address in the firmware to reference the new
1564 * target buffer.
1565 */
4a8a4322 1566static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
b481de9c 1567{
cc2f362c 1568 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1569 struct list_head *element;
6100b588 1570 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1571 unsigned long flags;
1572 int write, rc;
1573
1574 spin_lock_irqsave(&rxq->lock, flags);
1575 write = rxq->write & ~0x7;
37d68317 1576 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 1577 /* Get next free Rx buffer, remove from free list */
b481de9c 1578 element = rxq->rx_free.next;
6100b588 1579 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
b481de9c 1580 list_del(element);
6440adb5
CB
1581
1582 /* Point to Rx buffer via next RBD in circular buffer */
6100b588 1583 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
b481de9c
ZY
1584 rxq->queue[rxq->write] = rxb;
1585 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1586 rxq->free_count--;
1587 }
1588 spin_unlock_irqrestore(&rxq->lock, flags);
1589 /* If the pre-allocated buffer pool is dropping low, schedule to
1590 * refill it */
1591 if (rxq->free_count <= RX_LOW_WATERMARK)
1592 queue_work(priv->workqueue, &priv->rx_replenish);
1593
1594
6440adb5
CB
1595 /* If we've added more space for the firmware to place data, tell it.
1596 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
1597 if ((write != (rxq->write & ~0x7))
1598 || (abs(rxq->write - rxq->read) > 7)) {
1599 spin_lock_irqsave(&rxq->lock, flags);
1600 rxq->need_update = 1;
1601 spin_unlock_irqrestore(&rxq->lock, flags);
141c43a3 1602 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
1603 if (rc)
1604 return rc;
1605 }
1606
1607 return 0;
1608}
1609
1610/**
bb8c093b 1611 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
1612 *
1613 * When moving to rx_free an SKB is allocated for the slot.
1614 *
bb8c093b 1615 * Also restock the Rx queue via iwl3945_rx_queue_restock.
01ebd063 1616 * This is called as a scheduled work item (except for during initialization)
b481de9c 1617 */
4a8a4322 1618static void iwl3945_rx_allocate(struct iwl_priv *priv)
b481de9c 1619{
cc2f362c 1620 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1621 struct list_head *element;
6100b588 1622 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1623 unsigned long flags;
1624 spin_lock_irqsave(&rxq->lock, flags);
1625 while (!list_empty(&rxq->rx_used)) {
1626 element = rxq->rx_used.next;
6100b588 1627 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
6440adb5
CB
1628
1629 /* Alloc a new receive buffer */
b481de9c 1630 rxb->skb =
1e33dc64
WT
1631 alloc_skb(priv->hw_params.rx_buf_size,
1632 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY
1633 if (!rxb->skb) {
1634 if (net_ratelimit())
978785a3 1635 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
b481de9c
ZY
1636 /* We don't reschedule replenish work here -- we will
1637 * call the restock method and if it still needs
1638 * more buffers it will schedule replenish */
1639 break;
1640 }
12342c47
ZY
1641
1642 /* If radiotap head is required, reserve some headroom here.
1643 * The physical head count is a variable rx_stats->phy_count.
1644 * We reserve 4 bytes here. Plus these extra bytes, the
1645 * headroom of the physical head should be enough for the
1646 * radiotap head that iwl3945 supported. See iwl3945_rt.
1647 */
1648 skb_reserve(rxb->skb, 4);
1649
b481de9c
ZY
1650 priv->alloc_rxb_skb++;
1651 list_del(element);
6440adb5
CB
1652
1653 /* Get physical address of RB/SKB */
1e33dc64
WT
1654 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1655 rxb->skb->data,
1656 priv->hw_params.rx_buf_size,
1657 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1658 list_add_tail(&rxb->list, &rxq->rx_free);
1659 rxq->free_count++;
1660 }
1661 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA
1662}
1663
1664/*
1665 * this should be called while priv->lock is locked
1666 */
4fd1f841 1667static void __iwl3945_rx_replenish(void *data)
5c0eef96 1668{
4a8a4322 1669 struct iwl_priv *priv = data;
5c0eef96
MA
1670
1671 iwl3945_rx_allocate(priv);
1672 iwl3945_rx_queue_restock(priv);
1673}
1674
1675
1676void iwl3945_rx_replenish(void *data)
1677{
4a8a4322 1678 struct iwl_priv *priv = data;
5c0eef96
MA
1679 unsigned long flags;
1680
1681 iwl3945_rx_allocate(priv);
b481de9c
ZY
1682
1683 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 1684 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1685 spin_unlock_irqrestore(&priv->lock, flags);
1686}
1687
b481de9c
ZY
1688/* Convert linear signal-to-noise ratio into dB */
1689static u8 ratio2dB[100] = {
1690/* 0 1 2 3 4 5 6 7 8 9 */
1691 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1692 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1693 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1694 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1695 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1696 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1697 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1698 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1699 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1700 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1701};
1702
1703/* Calculates a relative dB value from a ratio of linear
1704 * (i.e. not dB) signal levels.
1705 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 1706int iwl3945_calc_db_from_ratio(int sig_ratio)
b481de9c 1707{
221c80cf
AB
1708 /* 1000:1 or higher just report as 60 dB */
1709 if (sig_ratio >= 1000)
b481de9c
ZY
1710 return 60;
1711
221c80cf 1712 /* 100:1 or higher, divide by 10 and use table,
b481de9c 1713 * add 20 dB to make up for divide by 10 */
221c80cf 1714 if (sig_ratio >= 100)
3ac7f146 1715 return 20 + (int)ratio2dB[sig_ratio/10];
b481de9c
ZY
1716
1717 /* We shouldn't see this */
1718 if (sig_ratio < 1)
1719 return 0;
1720
1721 /* Use table for ratios 1:1 - 99:1 */
1722 return (int)ratio2dB[sig_ratio];
1723}
1724
1725#define PERFECT_RSSI (-20) /* dBm */
1726#define WORST_RSSI (-95) /* dBm */
1727#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1728
1729/* Calculate an indication of rx signal quality (a percentage, not dBm!).
1730 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1731 * about formulas used below. */
bb8c093b 1732int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
1733{
1734 int sig_qual;
1735 int degradation = PERFECT_RSSI - rssi_dbm;
1736
1737 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1738 * as indicator; formula is (signal dbm - noise dbm).
1739 * SNR at or above 40 is a great signal (100%).
1740 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1741 * Weakest usable signal is usually 10 - 15 dB SNR. */
1742 if (noise_dbm) {
1743 if (rssi_dbm - noise_dbm >= 40)
1744 return 100;
1745 else if (rssi_dbm < noise_dbm)
1746 return 0;
1747 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1748
1749 /* Else use just the signal level.
1750 * This formula is a least squares fit of data points collected and
1751 * compared with a reference system that had a percentage (%) display
1752 * for signal quality. */
1753 } else
1754 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1755 (15 * RSSI_RANGE + 62 * degradation)) /
1756 (RSSI_RANGE * RSSI_RANGE);
1757
1758 if (sig_qual > 100)
1759 sig_qual = 100;
1760 else if (sig_qual < 1)
1761 sig_qual = 0;
1762
1763 return sig_qual;
1764}
1765
1766/**
9fbab516 1767 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1768 *
1769 * Uses the priv->rx_handlers callback function array to invoke
1770 * the appropriate handlers, including command responses,
1771 * frame-received notifications, and other notifications.
1772 */
4a8a4322 1773static void iwl3945_rx_handle(struct iwl_priv *priv)
b481de9c 1774{
6100b588 1775 struct iwl_rx_mem_buffer *rxb;
3d24a9f7 1776 struct iwl_rx_packet *pkt;
cc2f362c 1777 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1778 u32 r, i;
1779 int reclaim;
1780 unsigned long flags;
5c0eef96 1781 u8 fill_rx = 0;
d68ab680 1782 u32 count = 8;
b481de9c 1783
6440adb5
CB
1784 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1785 * buffer that the driver may process (last buffer filled by ucode). */
8cd812bc 1786 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
1787 i = rxq->read;
1788
37d68317 1789 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96 1790 fill_rx = 1;
b481de9c
ZY
1791 /* Rx interrupt, but nothing sent from uCode */
1792 if (i == r)
e1623446 1793 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
b481de9c
ZY
1794
1795 while (i != r) {
1796 rxb = rxq->queue[i];
1797
9fbab516 1798 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1799 * then a bug has been introduced in the queue refilling
1800 * routines -- catch it here */
1801 BUG_ON(rxb == NULL);
1802
1803 rxq->queue[i] = NULL;
1804
6100b588 1805 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
1e33dc64 1806 priv->hw_params.rx_buf_size,
b481de9c 1807 PCI_DMA_FROMDEVICE);
3d24a9f7 1808 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1809
1810 /* Reclaim a command buffer only if this packet is a response
1811 * to a (driver-originated) command.
1812 * If the packet (e.g. Rx frame) originated from uCode,
1813 * there is no command buffer to reclaim.
1814 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1815 * but apparently a few don't get set; catch them here. */
1816 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1817 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1818 (pkt->hdr.cmd != REPLY_TX);
1819
1820 /* Based on type of command response or notification,
1821 * handle those that need handling via function in
bb8c093b 1822 * rx_handlers table. See iwl3945_setup_rx_handlers() */
b481de9c 1823 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 1824 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1825 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1826 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1827 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1828 } else {
1829 /* No handling needed */
e1623446 1830 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1831 "r %d i %d No handler needed for %s, 0x%02x\n",
1832 r, i, get_cmd_string(pkt->hdr.cmd),
1833 pkt->hdr.cmd);
1834 }
1835
1836 if (reclaim) {
9fbab516 1837 /* Invoke any callbacks, transfer the skb to caller, and
518099a8 1838 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1839 * as we reclaim the driver command queue */
1840 if (rxb && rxb->skb)
732587ab 1841 iwl_tx_cmd_complete(priv, rxb);
b481de9c 1842 else
39aadf8c 1843 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY
1844 }
1845
1846 /* For now we just don't re-use anything. We can tweak this
1847 * later to try and re-use notification packets and SKBs that
1848 * fail to Rx correctly */
1849 if (rxb->skb != NULL) {
1850 priv->alloc_rxb_skb--;
1851 dev_kfree_skb_any(rxb->skb);
1852 rxb->skb = NULL;
1853 }
1854
6100b588 1855 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1e33dc64
WT
1856 priv->hw_params.rx_buf_size,
1857 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1858 spin_lock_irqsave(&rxq->lock, flags);
1859 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1860 spin_unlock_irqrestore(&rxq->lock, flags);
1861 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1862 /* If there are a lot of unused frames,
1863 * restock the Rx queue so ucode won't assert. */
1864 if (fill_rx) {
1865 count++;
1866 if (count >= 8) {
1867 priv->rxq.read = i;
1868 __iwl3945_rx_replenish(priv);
1869 count = 0;
1870 }
1871 }
b481de9c
ZY
1872 }
1873
1874 /* Backtrack one entry */
1875 priv->rxq.read = i;
bb8c093b 1876 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1877}
1878
0359facc 1879/* call this function to flush any scheduled tasklet */
4a8a4322 1880static inline void iwl_synchronize_irq(struct iwl_priv *priv)
0359facc 1881{
a96a27f9 1882 /* wait to make sure we flush pending tasklet*/
0359facc
MA
1883 synchronize_irq(priv->pci_dev->irq);
1884 tasklet_kill(&priv->irq_tasklet);
1885}
1886
b481de9c
ZY
1887static const char *desc_lookup(int i)
1888{
1889 switch (i) {
1890 case 1:
1891 return "FAIL";
1892 case 2:
1893 return "BAD_PARAM";
1894 case 3:
1895 return "BAD_CHECKSUM";
1896 case 4:
1897 return "NMI_INTERRUPT";
1898 case 5:
1899 return "SYSASSERT";
1900 case 6:
1901 return "FATAL_ERROR";
1902 }
1903
1904 return "UNKNOWN";
1905}
1906
1907#define ERROR_START_OFFSET (1 * sizeof(u32))
1908#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1909
4a8a4322 1910static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
1911{
1912 u32 i;
1913 u32 desc, time, count, base, data1;
1914 u32 blink1, blink2, ilink1, ilink2;
1915 int rc;
1916
1917 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1918
bb8c093b 1919 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 1920 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
b481de9c
ZY
1921 return;
1922 }
1923
5d49f498 1924 rc = iwl_grab_nic_access(priv);
b481de9c 1925 if (rc) {
39aadf8c 1926 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
1927 return;
1928 }
1929
5d49f498 1930 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
1931
1932 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT
1933 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1934 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1935 priv->status, count);
b481de9c
ZY
1936 }
1937
15b1687c 1938 IWL_ERR(priv, "Desc Time asrtPC blink2 "
b481de9c
ZY
1939 "ilink1 nmiPC Line\n");
1940 for (i = ERROR_START_OFFSET;
1941 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1942 i += ERROR_ELEM_SIZE) {
5d49f498 1943 desc = iwl_read_targ_mem(priv, base + i);
b481de9c 1944 time =
5d49f498 1945 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
b481de9c 1946 blink1 =
5d49f498 1947 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
b481de9c 1948 blink2 =
5d49f498 1949 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
b481de9c 1950 ilink1 =
5d49f498 1951 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
b481de9c 1952 ilink2 =
5d49f498 1953 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
b481de9c 1954 data1 =
5d49f498 1955 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
b481de9c 1956
15b1687c
WT
1957 IWL_ERR(priv,
1958 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1959 desc_lookup(desc), desc, time, blink1, blink2,
1960 ilink1, ilink2, data1);
b481de9c
ZY
1961 }
1962
5d49f498 1963 iwl_release_nic_access(priv);
b481de9c
ZY
1964
1965}
1966
f58177b9 1967#define EVENT_START_OFFSET (6 * sizeof(u32))
b481de9c
ZY
1968
1969/**
bb8c093b 1970 * iwl3945_print_event_log - Dump error event log to syslog
b481de9c 1971 *
5d49f498 1972 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 1973 */
4a8a4322 1974static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
1975 u32 num_events, u32 mode)
1976{
1977 u32 i;
1978 u32 base; /* SRAM byte address of event log header */
1979 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1980 u32 ptr; /* SRAM byte address of log data */
1981 u32 ev, time, data; /* event log data */
1982
1983 if (num_events == 0)
1984 return;
1985
1986 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1987
1988 if (mode == 0)
1989 event_size = 2 * sizeof(u32);
1990 else
1991 event_size = 3 * sizeof(u32);
1992
1993 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1994
1995 /* "time" is actually "data" for mode 0 (no timestamp).
1996 * place event id # at far right for easier visual parsing. */
1997 for (i = 0; i < num_events; i++) {
5d49f498 1998 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 1999 ptr += sizeof(u32);
5d49f498 2000 time = iwl_read_targ_mem(priv, ptr);
b481de9c 2001 ptr += sizeof(u32);
15b1687c
WT
2002 if (mode == 0) {
2003 /* data, ev */
2004 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
2005 } else {
5d49f498 2006 data = iwl_read_targ_mem(priv, ptr);
b481de9c 2007 ptr += sizeof(u32);
15b1687c 2008 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
b481de9c
ZY
2009 }
2010 }
2011}
2012
4a8a4322 2013static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY
2014{
2015 int rc;
2016 u32 base; /* SRAM byte address of event log header */
2017 u32 capacity; /* event log capacity in # entries */
2018 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
2019 u32 num_wraps; /* # times uCode wrapped to top of log */
2020 u32 next_entry; /* index of next entry to be written by uCode */
2021 u32 size; /* # entries that we'll print */
2022
2023 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 2024 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 2025 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
b481de9c
ZY
2026 return;
2027 }
2028
5d49f498 2029 rc = iwl_grab_nic_access(priv);
b481de9c 2030 if (rc) {
39aadf8c 2031 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
2032 return;
2033 }
2034
2035 /* event log header */
5d49f498
AK
2036 capacity = iwl_read_targ_mem(priv, base);
2037 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2038 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2039 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
2040
2041 size = num_wraps ? capacity : next_entry;
2042
2043 /* bail out if nothing in log */
2044 if (size == 0) {
15b1687c 2045 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
5d49f498 2046 iwl_release_nic_access(priv);
b481de9c
ZY
2047 return;
2048 }
2049
15b1687c 2050 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
2051 size, num_wraps);
2052
2053 /* if uCode has wrapped back to top of log, start at the oldest entry,
2054 * i.e the next one that uCode would fill. */
2055 if (num_wraps)
bb8c093b 2056 iwl3945_print_event_log(priv, next_entry,
b481de9c
ZY
2057 capacity - next_entry, mode);
2058
2059 /* (then/else) start at top of log */
bb8c093b 2060 iwl3945_print_event_log(priv, 0, next_entry, mode);
b481de9c 2061
5d49f498 2062 iwl_release_nic_access(priv);
b481de9c
ZY
2063}
2064
4a8a4322 2065static void iwl3945_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
2066{
2067 unsigned long flags;
2068
8ccde88a
SO
2069 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
2070 sizeof(priv->staging_rxon));
2071 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2072 iwl3945_commit_rxon(priv);
b481de9c 2073
bb8c093b 2074 iwl3945_add_station(priv, priv->bssid, 1, 0);
b481de9c
ZY
2075
2076 spin_lock_irqsave(&priv->lock, flags);
8ccde88a 2077 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
b481de9c
ZY
2078 priv->error_recovering = 0;
2079 spin_unlock_irqrestore(&priv->lock, flags);
2080}
2081
4a8a4322 2082static void iwl3945_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
2083{
2084 u32 inta, handled = 0;
2085 u32 inta_fh;
2086 unsigned long flags;
d08853a3 2087#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
2088 u32 inta_mask;
2089#endif
2090
2091 spin_lock_irqsave(&priv->lock, flags);
2092
2093 /* Ack/clear/reset pending uCode interrupts.
2094 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
2095 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5d49f498
AK
2096 inta = iwl_read32(priv, CSR_INT);
2097 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
2098
2099 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
2100 * Any new interrupts that happen after this, either while we're
2101 * in this tasklet, or later, will show up in next ISR/tasklet. */
5d49f498
AK
2102 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2103 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 2104
d08853a3 2105#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2106 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 2107 /* just for debug */
5d49f498 2108 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 2109 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
2110 inta, inta_mask, inta_fh);
2111 }
2112#endif
2113
2114 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
2115 * atomic, make sure that inta covers all the interrupts that
2116 * we've discovered, even if FH interrupt came in just after
2117 * reading CSR_INT. */
6f83eaa1 2118 if (inta_fh & CSR39_FH_INT_RX_MASK)
b481de9c 2119 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 2120 if (inta_fh & CSR39_FH_INT_TX_MASK)
b481de9c
ZY
2121 inta |= CSR_INT_BIT_FH_TX;
2122
2123 /* Now service all interrupt bits discovered above. */
2124 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 2125 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY
2126
2127 /* Tell the device to stop sending interrupts */
ed3b932e 2128 iwl_disable_interrupts(priv);
b481de9c 2129
8ccde88a 2130 iwl_irq_handle_error(priv);
b481de9c
ZY
2131
2132 handled |= CSR_INT_BIT_HW_ERR;
2133
2134 spin_unlock_irqrestore(&priv->lock, flags);
2135
2136 return;
2137 }
2138
d08853a3 2139#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2140 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 2141 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e 2142 if (inta & CSR_INT_BIT_SCD)
e1623446 2143 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 2144 "the frame/frames.\n");
b481de9c
ZY
2145
2146 /* Alive notification via Rx interrupt will do the real work */
2147 if (inta & CSR_INT_BIT_ALIVE)
e1623446 2148 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
b481de9c
ZY
2149 }
2150#endif
2151 /* Safely ignore these bits for debug checks below */
25c03d8e 2152 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 2153
b481de9c
ZY
2154 /* Error detected by uCode */
2155 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT
2156 IWL_ERR(priv, "Microcode SW error detected. "
2157 "Restarting 0x%X.\n", inta);
8ccde88a 2158 iwl_irq_handle_error(priv);
b481de9c
ZY
2159 handled |= CSR_INT_BIT_SW_ERR;
2160 }
2161
2162 /* uCode wakes up after power-down sleep */
2163 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 2164 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
141c43a3 2165 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
4f3602c8
SO
2166 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
2167 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
2168 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
2169 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
2170 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
2171 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
2172
2173 handled |= CSR_INT_BIT_WAKEUP;
2174 }
2175
2176 /* All uCode command responses, including Tx command responses,
2177 * Rx "responses" (frame-received notification), and other
2178 * notifications from uCode come through here*/
2179 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 2180 iwl3945_rx_handle(priv);
b481de9c
ZY
2181 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
2182 }
2183
2184 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 2185 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
b481de9c 2186
5d49f498
AK
2187 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
2188 if (!iwl_grab_nic_access(priv)) {
2189 iwl_write_direct32(priv, FH39_TCSR_CREDIT
bddadf86 2190 (FH39_SRVC_CHNL), 0x0);
5d49f498 2191 iwl_release_nic_access(priv);
b481de9c
ZY
2192 }
2193 handled |= CSR_INT_BIT_FH_TX;
2194 }
2195
2196 if (inta & ~handled)
15b1687c 2197 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY
2198
2199 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 2200 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 2201 inta & ~CSR_INI_SET_MASK);
39aadf8c 2202 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY
2203 }
2204
2205 /* Re-enable all interrupts */
0359facc
MA
2206 /* only Re-enable if disabled by irq */
2207 if (test_bit(STATUS_INT_ENABLED, &priv->status))
ed3b932e 2208 iwl_enable_interrupts(priv);
b481de9c 2209
d08853a3 2210#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2211 if (priv->debug_level & (IWL_DL_ISR)) {
5d49f498
AK
2212 inta = iwl_read32(priv, CSR_INT);
2213 inta_mask = iwl_read32(priv, CSR_INT_MASK);
2214 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 2215 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY
2216 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
2217 }
2218#endif
2219 spin_unlock_irqrestore(&priv->lock, flags);
2220}
2221
4a8a4322 2222static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 2223 enum ieee80211_band band,
f9340520 2224 u8 is_active, u8 n_probes,
bb8c093b 2225 struct iwl3945_scan_channel *scan_ch)
b481de9c
ZY
2226{
2227 const struct ieee80211_channel *channels = NULL;
8318d78a 2228 const struct ieee80211_supported_band *sband;
d20b3c65 2229 const struct iwl_channel_info *ch_info;
b481de9c
ZY
2230 u16 passive_dwell = 0;
2231 u16 active_dwell = 0;
2232 int added, i;
2233
cbba18c6 2234 sband = iwl_get_hw_mode(priv, band);
8318d78a 2235 if (!sband)
b481de9c
ZY
2236 return 0;
2237
8318d78a 2238 channels = sband->channels;
b481de9c 2239
77fecfb8
SO
2240 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
2241 passive_dwell = iwl_get_passive_dwell_time(priv, band);
b481de9c 2242
8f4807a1
AK
2243 if (passive_dwell <= active_dwell)
2244 passive_dwell = active_dwell + 1;
2245
8318d78a 2246 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB
2247 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
2248 continue;
2249
8318d78a 2250 scan_ch->channel = channels[i].hw_value;
b481de9c 2251
e6148917 2252 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
b481de9c 2253 if (!is_channel_valid(ch_info)) {
e1623446 2254 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
b481de9c
ZY
2255 scan_ch->channel);
2256 continue;
2257 }
2258
011a0330
AK
2259 scan_ch->active_dwell = cpu_to_le16(active_dwell);
2260 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
2261 /* If passive , set up for auto-switch
2262 * and use long active_dwell time.
2263 */
b481de9c 2264 if (!is_active || is_channel_passive(ch_info) ||
011a0330 2265 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
b481de9c 2266 scan_ch->type = 0; /* passive */
011a0330
AK
2267 if (IWL_UCODE_API(priv->ucode_ver) == 1)
2268 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
2269 } else {
b481de9c 2270 scan_ch->type = 1; /* active */
011a0330 2271 }
b481de9c 2272
011a0330
AK
2273 /* Set direct probe bits. These may be used both for active
2274 * scan channels (probes gets sent right away),
2275 * or for passive channels (probes get se sent only after
2276 * hearing clear Rx packet).*/
2277 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
2278 if (n_probes)
0d21044e 2279 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330
AK
2280 } else {
2281 /* uCode v1 does not allow setting direct probe bits on
2282 * passive channel. */
2283 if ((scan_ch->type & 1) && n_probes)
0d21044e 2284 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330 2285 }
b481de9c 2286
9fbab516 2287 /* Set txpower levels to defaults */
b481de9c
ZY
2288 scan_ch->tpc.dsp_atten = 110;
2289 /* scan_pwr_info->tpc.dsp_atten; */
2290
2291 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 2292 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
2293 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
2294 else {
2295 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
2296 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 2297 * power level:
8a1b0245 2298 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
2299 */
2300 }
2301
e1623446 2302 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
b481de9c
ZY
2303 scan_ch->channel,
2304 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
2305 (scan_ch->type & 1) ?
2306 active_dwell : passive_dwell);
2307
2308 scan_ch++;
2309 added++;
2310 }
2311
e1623446 2312 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
b481de9c
ZY
2313 return added;
2314}
2315
4a8a4322 2316static void iwl3945_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
2317 struct ieee80211_rate *rates)
2318{
2319 int i;
2320
2321 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
2322 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
2323 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2324 rates[i].hw_value_short = i;
2325 rates[i].flags = 0;
d9829a67 2326 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 2327 /*
8318d78a 2328 * If CCK != 1M then set short preamble rate flag.
b481de9c 2329 */
bb8c093b 2330 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
8318d78a 2331 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 2332 }
b481de9c
ZY
2333 }
2334}
2335
b481de9c
ZY
2336/******************************************************************************
2337 *
2338 * uCode download functions
2339 *
2340 ******************************************************************************/
2341
4a8a4322 2342static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 2343{
98c92211
TW
2344 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
2345 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
2346 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2347 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
2348 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2349 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
2350}
2351
2352/**
bb8c093b 2353 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
2354 * looking at all data.
2355 */
4a8a4322 2356static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2357{
2358 u32 val;
2359 u32 save_len = len;
2360 int rc = 0;
2361 u32 errcnt;
2362
e1623446 2363 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2364
5d49f498 2365 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2366 if (rc)
2367 return rc;
2368
5d49f498 2369 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2370 IWL39_RTC_INST_LOWER_BOUND);
b481de9c
ZY
2371
2372 errcnt = 0;
2373 for (; len > 0; len -= sizeof(u32), image++) {
2374 /* read data comes through single port, auto-incr addr */
2375 /* NOTE: Use the debugless read so we don't flood kernel log
2376 * if IWL_DL_IO is set */
5d49f498 2377 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c 2378 if (val != le32_to_cpu(*image)) {
15b1687c 2379 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2380 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2381 save_len - len, val, le32_to_cpu(*image));
2382 rc = -EIO;
2383 errcnt++;
2384 if (errcnt >= 20)
2385 break;
2386 }
2387 }
2388
5d49f498 2389 iwl_release_nic_access(priv);
b481de9c
ZY
2390
2391 if (!errcnt)
e1623446
TW
2392 IWL_DEBUG_INFO(priv,
2393 "ucode image in INSTRUCTION memory is good\n");
b481de9c
ZY
2394
2395 return rc;
2396}
2397
2398
2399/**
bb8c093b 2400 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
2401 * using sample data 100 bytes apart. If these sample points are good,
2402 * it's a pretty good bet that everything between them is good, too.
2403 */
4a8a4322 2404static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2405{
2406 u32 val;
2407 int rc = 0;
2408 u32 errcnt = 0;
2409 u32 i;
2410
e1623446 2411 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2412
5d49f498 2413 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2414 if (rc)
2415 return rc;
2416
2417 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2418 /* read data comes through single port, auto-incr addr */
2419 /* NOTE: Use the debugless read so we don't flood kernel log
2420 * if IWL_DL_IO is set */
5d49f498 2421 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2422 i + IWL39_RTC_INST_LOWER_BOUND);
5d49f498 2423 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
2424 if (val != le32_to_cpu(*image)) {
2425#if 0 /* Enable this if you want to see details */
15b1687c 2426 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2427 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2428 i, val, *image);
2429#endif
2430 rc = -EIO;
2431 errcnt++;
2432 if (errcnt >= 3)
2433 break;
2434 }
2435 }
2436
5d49f498 2437 iwl_release_nic_access(priv);
b481de9c
ZY
2438
2439 return rc;
2440}
2441
2442
2443/**
bb8c093b 2444 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
2445 * and verify its contents
2446 */
4a8a4322 2447static int iwl3945_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
2448{
2449 __le32 *image;
2450 u32 len;
2451 int rc = 0;
2452
2453 /* Try bootstrap */
2454 image = (__le32 *)priv->ucode_boot.v_addr;
2455 len = priv->ucode_boot.len;
bb8c093b 2456 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2457 if (rc == 0) {
e1623446 2458 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b481de9c
ZY
2459 return 0;
2460 }
2461
2462 /* Try initialize */
2463 image = (__le32 *)priv->ucode_init.v_addr;
2464 len = priv->ucode_init.len;
bb8c093b 2465 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2466 if (rc == 0) {
e1623446 2467 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b481de9c
ZY
2468 return 0;
2469 }
2470
2471 /* Try runtime/protocol */
2472 image = (__le32 *)priv->ucode_code.v_addr;
2473 len = priv->ucode_code.len;
bb8c093b 2474 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2475 if (rc == 0) {
e1623446 2476 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b481de9c
ZY
2477 return 0;
2478 }
2479
15b1687c 2480 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b481de9c 2481
9fbab516
BC
2482 /* Since nothing seems to match, show first several data entries in
2483 * instruction SRAM, so maybe visual inspection will give a clue.
2484 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
2485 image = (__le32 *)priv->ucode_boot.v_addr;
2486 len = priv->ucode_boot.len;
bb8c093b 2487 rc = iwl3945_verify_inst_full(priv, image, len);
b481de9c
ZY
2488
2489 return rc;
2490}
2491
4a8a4322 2492static void iwl3945_nic_start(struct iwl_priv *priv)
b481de9c
ZY
2493{
2494 /* Remove all resets to allow NIC to operate */
5d49f498 2495 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
2496}
2497
2498/**
bb8c093b 2499 * iwl3945_read_ucode - Read uCode images from disk file.
b481de9c
ZY
2500 *
2501 * Copy into buffers for card to fetch via bus-mastering
2502 */
4a8a4322 2503static int iwl3945_read_ucode(struct iwl_priv *priv)
b481de9c 2504{
a78fe754 2505 struct iwl_ucode *ucode;
a0987a8d 2506 int ret = -EINVAL, index;
b481de9c
ZY
2507 const struct firmware *ucode_raw;
2508 /* firmware file name contains uCode/driver compatibility version */
a0987a8d
RC
2509 const char *name_pre = priv->cfg->fw_name_pre;
2510 const unsigned int api_max = priv->cfg->ucode_api_max;
2511 const unsigned int api_min = priv->cfg->ucode_api_min;
2512 char buf[25];
b481de9c
ZY
2513 u8 *src;
2514 size_t len;
a0987a8d 2515 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
2516
2517 /* Ask kernel firmware_class module to get the boot firmware off disk.
2518 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
2519 for (index = api_max; index >= api_min; index--) {
2520 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2521 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2522 if (ret < 0) {
15b1687c 2523 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC
2524 buf, ret);
2525 if (ret == -ENOENT)
2526 continue;
2527 else
2528 goto error;
2529 } else {
2530 if (index < api_max)
15b1687c
WT
2531 IWL_ERR(priv, "Loaded firmware %s, "
2532 "which is deprecated. "
2533 " Please use API v%u instead.\n",
a0987a8d 2534 buf, api_max);
e1623446
TW
2535 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2536 "(%zd bytes) from disk\n",
a0987a8d
RC
2537 buf, ucode_raw->size);
2538 break;
2539 }
b481de9c
ZY
2540 }
2541
a0987a8d
RC
2542 if (ret < 0)
2543 goto error;
b481de9c
ZY
2544
2545 /* Make sure that we got at least our header! */
2546 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 2547 IWL_ERR(priv, "File size way too small!\n");
90e759d1 2548 ret = -EINVAL;
b481de9c
ZY
2549 goto err_release;
2550 }
2551
2552 /* Data from ucode file: header followed by uCode images */
2553 ucode = (void *)ucode_raw->data;
2554
c02b3acd 2555 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 2556 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY
2557 inst_size = le32_to_cpu(ucode->inst_size);
2558 data_size = le32_to_cpu(ucode->data_size);
2559 init_size = le32_to_cpu(ucode->init_size);
2560 init_data_size = le32_to_cpu(ucode->init_data_size);
2561 boot_size = le32_to_cpu(ucode->boot_size);
2562
a0987a8d
RC
2563 /* api_ver should match the api version forming part of the
2564 * firmware filename ... but we don't check for that and only rely
877d0310 2565 * on the API version read from firmware header from here on forward */
a0987a8d
RC
2566
2567 if (api_ver < api_min || api_ver > api_max) {
15b1687c 2568 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC
2569 "Driver supports v%u, firmware is v%u.\n",
2570 api_max, api_ver);
2571 priv->ucode_ver = 0;
2572 ret = -EINVAL;
2573 goto err_release;
2574 }
2575 if (api_ver != api_max)
15b1687c 2576 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
a0987a8d
RC
2577 "got %u. New firmware can be obtained "
2578 "from http://www.intellinuxwireless.org.\n",
2579 api_max, api_ver);
2580
978785a3
TW
2581 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2582 IWL_UCODE_MAJOR(priv->ucode_ver),
2583 IWL_UCODE_MINOR(priv->ucode_ver),
2584 IWL_UCODE_API(priv->ucode_ver),
2585 IWL_UCODE_SERIAL(priv->ucode_ver));
2586
e1623446 2587 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 2588 priv->ucode_ver);
e1623446
TW
2589 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2590 inst_size);
2591 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2592 data_size);
2593 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2594 init_size);
2595 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2596 init_data_size);
2597 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2598 boot_size);
b481de9c 2599
a0987a8d 2600
b481de9c
ZY
2601 /* Verify size of file vs. image size info in file's header */
2602 if (ucode_raw->size < sizeof(*ucode) +
2603 inst_size + data_size + init_size +
2604 init_data_size + boot_size) {
2605
e1623446
TW
2606 IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
2607 ucode_raw->size);
90e759d1 2608 ret = -EINVAL;
b481de9c
ZY
2609 goto err_release;
2610 }
2611
2612 /* Verify that uCode images will fit in card's SRAM */
250bdd21 2613 if (inst_size > IWL39_MAX_INST_SIZE) {
e1623446 2614 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW
2615 inst_size);
2616 ret = -EINVAL;
b481de9c
ZY
2617 goto err_release;
2618 }
2619
250bdd21 2620 if (data_size > IWL39_MAX_DATA_SIZE) {
e1623446 2621 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW
2622 data_size);
2623 ret = -EINVAL;
b481de9c
ZY
2624 goto err_release;
2625 }
250bdd21 2626 if (init_size > IWL39_MAX_INST_SIZE) {
e1623446
TW
2627 IWL_DEBUG_INFO(priv,
2628 "uCode init instr len %d too large to fit in\n",
90e759d1
TW
2629 init_size);
2630 ret = -EINVAL;
b481de9c
ZY
2631 goto err_release;
2632 }
250bdd21 2633 if (init_data_size > IWL39_MAX_DATA_SIZE) {
e1623446
TW
2634 IWL_DEBUG_INFO(priv,
2635 "uCode init data len %d too large to fit in\n",
90e759d1
TW
2636 init_data_size);
2637 ret = -EINVAL;
b481de9c
ZY
2638 goto err_release;
2639 }
250bdd21 2640 if (boot_size > IWL39_MAX_BSM_SIZE) {
e1623446
TW
2641 IWL_DEBUG_INFO(priv,
2642 "uCode boot instr len %d too large to fit in\n",
90e759d1
TW
2643 boot_size);
2644 ret = -EINVAL;
b481de9c
ZY
2645 goto err_release;
2646 }
2647
2648 /* Allocate ucode buffers for card's bus-master loading ... */
2649
2650 /* Runtime instructions and 2 copies of data:
2651 * 1) unmodified from disk
2652 * 2) backup cache for save/restore during power-downs */
2653 priv->ucode_code.len = inst_size;
98c92211 2654 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
2655
2656 priv->ucode_data.len = data_size;
98c92211 2657 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
2658
2659 priv->ucode_data_backup.len = data_size;
98c92211 2660 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 2661
90e759d1
TW
2662 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2663 !priv->ucode_data_backup.v_addr)
2664 goto err_pci_alloc;
b481de9c
ZY
2665
2666 /* Initialization instructions and data */
90e759d1
TW
2667 if (init_size && init_data_size) {
2668 priv->ucode_init.len = init_size;
98c92211 2669 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
2670
2671 priv->ucode_init_data.len = init_data_size;
98c92211 2672 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
2673
2674 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2675 goto err_pci_alloc;
2676 }
b481de9c
ZY
2677
2678 /* Bootstrap (instructions only, no data) */
90e759d1
TW
2679 if (boot_size) {
2680 priv->ucode_boot.len = boot_size;
98c92211 2681 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 2682
90e759d1
TW
2683 if (!priv->ucode_boot.v_addr)
2684 goto err_pci_alloc;
2685 }
b481de9c
ZY
2686
2687 /* Copy images into buffers for card's bus-master reads ... */
2688
2689 /* Runtime instructions (first block of data in file) */
2690 src = &ucode->data[0];
2691 len = priv->ucode_code.len;
e1623446
TW
2692 IWL_DEBUG_INFO(priv,
2693 "Copying (but not loading) uCode instr len %zd\n", len);
b481de9c 2694 memcpy(priv->ucode_code.v_addr, src, len);
e1623446 2695 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY
2696 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2697
2698 /* Runtime data (2nd block)
bb8c093b 2699 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
b481de9c
ZY
2700 src = &ucode->data[inst_size];
2701 len = priv->ucode_data.len;
e1623446
TW
2702 IWL_DEBUG_INFO(priv,
2703 "Copying (but not loading) uCode data len %zd\n", len);
b481de9c
ZY
2704 memcpy(priv->ucode_data.v_addr, src, len);
2705 memcpy(priv->ucode_data_backup.v_addr, src, len);
2706
2707 /* Initialization instructions (3rd block) */
2708 if (init_size) {
2709 src = &ucode->data[inst_size + data_size];
2710 len = priv->ucode_init.len;
e1623446
TW
2711 IWL_DEBUG_INFO(priv,
2712 "Copying (but not loading) init instr len %zd\n", len);
b481de9c
ZY
2713 memcpy(priv->ucode_init.v_addr, src, len);
2714 }
2715
2716 /* Initialization data (4th block) */
2717 if (init_data_size) {
2718 src = &ucode->data[inst_size + data_size + init_size];
2719 len = priv->ucode_init_data.len;
e1623446
TW
2720 IWL_DEBUG_INFO(priv,
2721 "Copying (but not loading) init data len %zd\n", len);
b481de9c
ZY
2722 memcpy(priv->ucode_init_data.v_addr, src, len);
2723 }
2724
2725 /* Bootstrap instructions (5th block) */
2726 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
2727 len = priv->ucode_boot.len;
e1623446
TW
2728 IWL_DEBUG_INFO(priv,
2729 "Copying (but not loading) boot instr len %zd\n", len);
b481de9c
ZY
2730 memcpy(priv->ucode_boot.v_addr, src, len);
2731
2732 /* We have our copies now, allow OS release its copies */
2733 release_firmware(ucode_raw);
2734 return 0;
2735
2736 err_pci_alloc:
15b1687c 2737 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 2738 ret = -ENOMEM;
bb8c093b 2739 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
2740
2741 err_release:
2742 release_firmware(ucode_raw);
2743
2744 error:
90e759d1 2745 return ret;
b481de9c
ZY
2746}
2747
2748
2749/**
bb8c093b 2750 * iwl3945_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
2751 *
2752 * Tell initialization uCode where to find runtime uCode.
2753 *
2754 * BSM registers initially contain pointers to initialization uCode.
2755 * We need to replace them to load runtime uCode inst and data,
2756 * and to save runtime data when powering down.
2757 */
4a8a4322 2758static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
2759{
2760 dma_addr_t pinst;
2761 dma_addr_t pdata;
2762 int rc = 0;
2763 unsigned long flags;
2764
2765 /* bits 31:0 for 3945 */
2766 pinst = priv->ucode_code.p_addr;
2767 pdata = priv->ucode_data_backup.p_addr;
2768
2769 spin_lock_irqsave(&priv->lock, flags);
5d49f498 2770 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2771 if (rc) {
2772 spin_unlock_irqrestore(&priv->lock, flags);
2773 return rc;
2774 }
2775
2776 /* Tell bootstrap uCode where to find image to load */
5d49f498
AK
2777 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2778 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2779 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
2780 priv->ucode_data.len);
2781
a96a27f9 2782 /* Inst byte count must be last to set up, bit 31 signals uCode
b481de9c 2783 * that all new ptr/size info is in place */
5d49f498 2784 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
2785 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2786
5d49f498 2787 iwl_release_nic_access(priv);
b481de9c
ZY
2788
2789 spin_unlock_irqrestore(&priv->lock, flags);
2790
e1623446 2791 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
b481de9c
ZY
2792
2793 return rc;
2794}
2795
2796/**
bb8c093b 2797 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
2798 *
2799 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2800 *
b481de9c 2801 * Tell "initialize" uCode to go ahead and load the runtime uCode.
9fbab516 2802 */
4a8a4322 2803static void iwl3945_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
2804{
2805 /* Check alive response for "valid" sign from uCode */
2806 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2807 /* We had an error bringing up the hardware, so take it
2808 * all the way back down so we can try again */
e1623446 2809 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
b481de9c
ZY
2810 goto restart;
2811 }
2812
2813 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2814 * This is a paranoid check, because we would not have gotten the
2815 * "initialize" alive if code weren't properly loaded. */
bb8c093b 2816 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2817 /* Runtime instruction load was bad;
2818 * take it all the way back down so we can try again */
e1623446 2819 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
b481de9c
ZY
2820 goto restart;
2821 }
2822
2823 /* Send pointers to protocol/runtime uCode image ... init code will
2824 * load and launch runtime uCode, which will send us another "Alive"
2825 * notification. */
e1623446 2826 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
bb8c093b 2827 if (iwl3945_set_ucode_ptrs(priv)) {
b481de9c
ZY
2828 /* Runtime instruction load won't happen;
2829 * take it all the way back down so we can try again */
e1623446 2830 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
b481de9c
ZY
2831 goto restart;
2832 }
2833 return;
2834
2835 restart:
2836 queue_work(priv->workqueue, &priv->restart);
2837}
2838
2839
9bdf5eca
MA
2840/* temporary */
2841static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
2842 struct sk_buff *skb);
2843
b481de9c 2844/**
bb8c093b 2845 * iwl3945_alive_start - called after REPLY_ALIVE notification received
b481de9c 2846 * from protocol/runtime uCode (initialization uCode's
bb8c093b 2847 * Alive gets handled by iwl3945_init_alive_start()).
b481de9c 2848 */
4a8a4322 2849static void iwl3945_alive_start(struct iwl_priv *priv)
b481de9c
ZY
2850{
2851 int rc = 0;
2852 int thermal_spin = 0;
2853 u32 rfkill;
2854
e1623446 2855 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY
2856
2857 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2858 /* We had an error bringing up the hardware, so take it
2859 * all the way back down so we can try again */
e1623446 2860 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY
2861 goto restart;
2862 }
2863
2864 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2865 * This is a paranoid check, because we would not have gotten the
2866 * "runtime" alive if code weren't properly loaded. */
bb8c093b 2867 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2868 /* Runtime instruction load was bad;
2869 * take it all the way back down so we can try again */
e1623446 2870 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY
2871 goto restart;
2872 }
2873
bb8c093b 2874 iwl3945_clear_stations_table(priv);
b481de9c 2875
5d49f498 2876 rc = iwl_grab_nic_access(priv);
b481de9c 2877 if (rc) {
39aadf8c 2878 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
b481de9c
ZY
2879 return;
2880 }
2881
5d49f498 2882 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
e1623446 2883 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
5d49f498 2884 iwl_release_nic_access(priv);
b481de9c
ZY
2885
2886 if (rfkill & 0x1) {
2887 clear_bit(STATUS_RF_KILL_HW, &priv->status);
a96a27f9 2888 /* if RFKILL is not on, then wait for thermal
b481de9c 2889 * sensor in adapter to kick in */
bb8c093b 2890 while (iwl3945_hw_get_temperature(priv) == 0) {
b481de9c
ZY
2891 thermal_spin++;
2892 udelay(10);
2893 }
2894
2895 if (thermal_spin)
e1623446 2896 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
b481de9c
ZY
2897 thermal_spin * 10);
2898 } else
2899 set_bit(STATUS_RF_KILL_HW, &priv->status);
2900
9fbab516 2901 /* After the ALIVE response, we can send commands to 3945 uCode */
b481de9c
ZY
2902 set_bit(STATUS_ALIVE, &priv->status);
2903
2904 /* Clear out the uCode error bit if it is set */
2905 clear_bit(STATUS_FW_ERROR, &priv->status);
2906
775a6e27 2907 if (iwl_is_rfkill(priv))
b481de9c
ZY
2908 return;
2909
36d6825b 2910 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2911
2912 priv->active_rate = priv->rates_mask;
2913 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2914
d25aabb0 2915 iwl_power_update_mode(priv, false);
b481de9c 2916
8ccde88a 2917 if (iwl_is_associated(priv)) {
bb8c093b 2918 struct iwl3945_rxon_cmd *active_rxon =
8ccde88a 2919 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
b481de9c 2920
8ccde88a
SO
2921 memcpy(&priv->staging_rxon, &priv->active_rxon,
2922 sizeof(priv->staging_rxon));
b481de9c
ZY
2923 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2924 } else {
2925 /* Initialize our rx_config data */
8ccde88a 2926 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
2927 }
2928
9fbab516 2929 /* Configure Bluetooth device coexistence support */
17f841cd 2930 iwl_send_bt_config(priv);
b481de9c
ZY
2931
2932 /* Configure the adapter for unassociated operation */
bb8c093b 2933 iwl3945_commit_rxon(priv);
b481de9c 2934
b481de9c
ZY
2935 iwl3945_reg_txpower_periodic(priv);
2936
fe00b5a5
RC
2937 iwl3945_led_register(priv);
2938
e1623446 2939 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 2940 set_bit(STATUS_READY, &priv->status);
5a66926a 2941 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
2942
2943 if (priv->error_recovering)
bb8c093b 2944 iwl3945_error_recovery(priv);
b481de9c 2945
9bdf5eca
MA
2946 /* reassociate for ADHOC mode */
2947 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2948 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2949 priv->vif);
2950 if (beacon)
2951 iwl3945_mac_beacon_update(priv->hw, beacon);
2952 }
2953
b481de9c
ZY
2954 return;
2955
2956 restart:
2957 queue_work(priv->workqueue, &priv->restart);
2958}
2959
4a8a4322 2960static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2961
4a8a4322 2962static void __iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
2963{
2964 unsigned long flags;
2965 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2966 struct ieee80211_conf *conf = NULL;
2967
e1623446 2968 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c
ZY
2969
2970 conf = ieee80211_get_hw_conf(priv->hw);
2971
2972 if (!exit_pending)
2973 set_bit(STATUS_EXIT_PENDING, &priv->status);
2974
ab53d8af 2975 iwl3945_led_unregister(priv);
bb8c093b 2976 iwl3945_clear_stations_table(priv);
b481de9c
ZY
2977
2978 /* Unblock any waiting calls */
2979 wake_up_interruptible_all(&priv->wait_command_queue);
2980
b481de9c
ZY
2981 /* Wipe out the EXIT_PENDING status bit if we are not actually
2982 * exiting the module */
2983 if (!exit_pending)
2984 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2985
2986 /* stop and reset the on-board processor */
5d49f498 2987 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2988
2989 /* tell the device to stop sending interrupts */
0359facc 2990 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 2991 iwl_disable_interrupts(priv);
0359facc
MA
2992 spin_unlock_irqrestore(&priv->lock, flags);
2993 iwl_synchronize_irq(priv);
b481de9c
ZY
2994
2995 if (priv->mac80211_registered)
2996 ieee80211_stop_queues(priv->hw);
2997
bb8c093b 2998 /* If we have not previously called iwl3945_init() then
b481de9c 2999 * clear all bits but the RF Kill and SUSPEND bits and return */
775a6e27 3000 if (!iwl_is_init(priv)) {
b481de9c
ZY
3001 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3002 STATUS_RF_KILL_HW |
3003 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3004 STATUS_RF_KILL_SW |
9788864e
RC
3005 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3006 STATUS_GEO_CONFIGURED |
b481de9c 3007 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
ebef2008
AK
3008 STATUS_IN_SUSPEND |
3009 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3010 STATUS_EXIT_PENDING;
b481de9c
ZY
3011 goto exit;
3012 }
3013
3014 /* ...otherwise clear out all the status bits but the RF Kill and
3015 * SUSPEND bits and continue taking the NIC down. */
3016 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3017 STATUS_RF_KILL_HW |
3018 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3019 STATUS_RF_KILL_SW |
9788864e
RC
3020 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3021 STATUS_GEO_CONFIGURED |
b481de9c
ZY
3022 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
3023 STATUS_IN_SUSPEND |
3024 test_bit(STATUS_FW_ERROR, &priv->status) <<
ebef2008
AK
3025 STATUS_FW_ERROR |
3026 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3027 STATUS_EXIT_PENDING;
b481de9c 3028
e9414b6b 3029 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 3030 spin_lock_irqsave(&priv->lock, flags);
5d49f498 3031 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
3032 spin_unlock_irqrestore(&priv->lock, flags);
3033
bb8c093b
CH
3034 iwl3945_hw_txq_ctx_stop(priv);
3035 iwl3945_hw_rxq_stop(priv);
b481de9c
ZY
3036
3037 spin_lock_irqsave(&priv->lock, flags);
5d49f498
AK
3038 if (!iwl_grab_nic_access(priv)) {
3039 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 3040 APMG_CLK_VAL_DMA_CLK_RQT);
5d49f498 3041 iwl_release_nic_access(priv);
b481de9c
ZY
3042 }
3043 spin_unlock_irqrestore(&priv->lock, flags);
3044
3045 udelay(5);
3046
e9414b6b
AM
3047 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
3048 priv->cfg->ops->lib->apm_ops.stop(priv);
3049 else
3050 priv->cfg->ops->lib->apm_ops.reset(priv);
3051
b481de9c 3052 exit:
3d24a9f7 3053 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
3054
3055 if (priv->ibss_beacon)
3056 dev_kfree_skb(priv->ibss_beacon);
3057 priv->ibss_beacon = NULL;
3058
3059 /* clear out any free frames */
bb8c093b 3060 iwl3945_clear_free_frames(priv);
b481de9c
ZY
3061}
3062
4a8a4322 3063static void iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
3064{
3065 mutex_lock(&priv->mutex);
bb8c093b 3066 __iwl3945_down(priv);
b481de9c 3067 mutex_unlock(&priv->mutex);
b24d22b1 3068
bb8c093b 3069 iwl3945_cancel_deferred_work(priv);
b481de9c
ZY
3070}
3071
3072#define MAX_HW_RESTARTS 5
3073
4a8a4322 3074static int __iwl3945_up(struct iwl_priv *priv)
b481de9c
ZY
3075{
3076 int rc, i;
3077
3078 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 3079 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY
3080 return -EIO;
3081 }
3082
3083 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
39aadf8c 3084 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
b481de9c 3085 "parameter)\n");
e655b9f0
ZY
3086 return -ENODEV;
3087 }
3088
e903fbd4 3089 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 3090 IWL_ERR(priv, "ucode not available for device bring up\n");
e903fbd4
RC
3091 return -EIO;
3092 }
3093
e655b9f0 3094 /* If platform's RF_KILL switch is NOT set to KILL */
5d49f498 3095 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
3096 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3097 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3098 else {
3099 set_bit(STATUS_RF_KILL_HW, &priv->status);
3100 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
39aadf8c 3101 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
e655b9f0
ZY
3102 return -ENODEV;
3103 }
b481de9c 3104 }
80fcc9e2 3105
5d49f498 3106 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 3107
bb8c093b 3108 rc = iwl3945_hw_nic_init(priv);
b481de9c 3109 if (rc) {
15b1687c 3110 IWL_ERR(priv, "Unable to int nic\n");
b481de9c
ZY
3111 return rc;
3112 }
3113
3114 /* make sure rfkill handshake bits are cleared */
5d49f498
AK
3115 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3116 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
3117 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3118
3119 /* clear (again), then enable host interrupts */
5d49f498 3120 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
ed3b932e 3121 iwl_enable_interrupts(priv);
b481de9c
ZY
3122
3123 /* really make sure rfkill handshake bits are cleared */
5d49f498
AK
3124 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3125 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
3126
3127 /* Copy original ucode data image from disk into backup cache.
3128 * This will be used to initialize the on-board processor's
3129 * data SRAM for a clean start when the runtime program first loads. */
3130 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 3131 priv->ucode_data.len);
b481de9c 3132
e655b9f0
ZY
3133 /* We return success when we resume from suspend and rf_kill is on. */
3134 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
3135 return 0;
3136
b481de9c
ZY
3137 for (i = 0; i < MAX_HW_RESTARTS; i++) {
3138
bb8c093b 3139 iwl3945_clear_stations_table(priv);
b481de9c
ZY
3140
3141 /* load bootstrap state machine,
3142 * load bootstrap program into processor's memory,
3143 * prepare to load the "initialize" uCode */
0164b9b4 3144 priv->cfg->ops->lib->load_ucode(priv);
b481de9c
ZY
3145
3146 if (rc) {
15b1687c
WT
3147 IWL_ERR(priv,
3148 "Unable to set up bootstrap uCode: %d\n", rc);
b481de9c
ZY
3149 continue;
3150 }
3151
3152 /* start card; "initialize" will load runtime ucode */
bb8c093b 3153 iwl3945_nic_start(priv);
b481de9c 3154
e1623446 3155 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY
3156
3157 return 0;
3158 }
3159
3160 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 3161 __iwl3945_down(priv);
ebef2008 3162 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
3163
3164 /* tried to restart and config the device for as long as our
3165 * patience could withstand */
15b1687c 3166 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY
3167 return -EIO;
3168}
3169
3170
3171/*****************************************************************************
3172 *
3173 * Workqueue callbacks
3174 *
3175 *****************************************************************************/
3176
bb8c093b 3177static void iwl3945_bg_init_alive_start(struct work_struct *data)
b481de9c 3178{
4a8a4322
AK
3179 struct iwl_priv *priv =
3180 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
3181
3182 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3183 return;
3184
3185 mutex_lock(&priv->mutex);
bb8c093b 3186 iwl3945_init_alive_start(priv);
b481de9c
ZY
3187 mutex_unlock(&priv->mutex);
3188}
3189
bb8c093b 3190static void iwl3945_bg_alive_start(struct work_struct *data)
b481de9c 3191{
4a8a4322
AK
3192 struct iwl_priv *priv =
3193 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
3194
3195 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3196 return;
3197
3198 mutex_lock(&priv->mutex);
bb8c093b 3199 iwl3945_alive_start(priv);
b481de9c
ZY
3200 mutex_unlock(&priv->mutex);
3201}
3202
2663516d
HS
3203static void iwl3945_rfkill_poll(struct work_struct *data)
3204{
3205 struct iwl_priv *priv =
3206 container_of(data, struct iwl_priv, rfkill_poll.work);
3207 unsigned long status = priv->status;
3208
3209 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3210 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3211 else
3212 set_bit(STATUS_RF_KILL_HW, &priv->status);
3213
3214 if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
3215 queue_work(priv->workqueue, &priv->rf_kill);
3216
3217 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3218 round_jiffies_relative(2 * HZ));
3219
3220}
3221
b481de9c 3222#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
bb8c093b 3223static void iwl3945_bg_request_scan(struct work_struct *data)
b481de9c 3224{
4a8a4322
AK
3225 struct iwl_priv *priv =
3226 container_of(data, struct iwl_priv, request_scan);
c2d79b48 3227 struct iwl_host_cmd cmd = {
b481de9c 3228 .id = REPLY_SCAN_CMD,
bb8c093b 3229 .len = sizeof(struct iwl3945_scan_cmd),
b481de9c
ZY
3230 .meta.flags = CMD_SIZE_HUGE,
3231 };
3232 int rc = 0;
bb8c093b 3233 struct iwl3945_scan_cmd *scan;
b481de9c 3234 struct ieee80211_conf *conf = NULL;
f9340520 3235 u8 n_probes = 2;
8318d78a 3236 enum ieee80211_band band;
9387b7ca 3237 DECLARE_SSID_BUF(ssid);
b481de9c
ZY
3238
3239 conf = ieee80211_get_hw_conf(priv->hw);
3240
3241 mutex_lock(&priv->mutex);
3242
775a6e27 3243 if (!iwl_is_ready(priv)) {
39aadf8c 3244 IWL_WARN(priv, "request scan called when driver not ready.\n");
b481de9c
ZY
3245 goto done;
3246 }
3247
a96a27f9 3248 /* Make sure the scan wasn't canceled before this queued work
b481de9c
ZY
3249 * was given the chance to run... */
3250 if (!test_bit(STATUS_SCANNING, &priv->status))
3251 goto done;
3252
3253 /* This should never be called or scheduled if there is currently
3254 * a scan active in the hardware. */
3255 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
e1623446
TW
3256 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
3257 "Ignoring second request.\n");
b481de9c
ZY
3258 rc = -EIO;
3259 goto done;
3260 }
3261
3262 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 3263 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
b481de9c
ZY
3264 goto done;
3265 }
3266
3267 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
e1623446
TW
3268 IWL_DEBUG_HC(priv,
3269 "Scan request while abort pending. Queuing.\n");
b481de9c
ZY
3270 goto done;
3271 }
3272
775a6e27 3273 if (iwl_is_rfkill(priv)) {
e1623446 3274 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
b481de9c
ZY
3275 goto done;
3276 }
3277
3278 if (!test_bit(STATUS_READY, &priv->status)) {
e1623446
TW
3279 IWL_DEBUG_HC(priv,
3280 "Scan request while uninitialized. Queuing.\n");
b481de9c
ZY
3281 goto done;
3282 }
3283
3284 if (!priv->scan_bands) {
e1623446 3285 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
b481de9c
ZY
3286 goto done;
3287 }
3288
805cee5b
WT
3289 if (!priv->scan) {
3290 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
b481de9c 3291 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
805cee5b 3292 if (!priv->scan) {
b481de9c
ZY
3293 rc = -ENOMEM;
3294 goto done;
3295 }
3296 }
805cee5b 3297 scan = priv->scan;
bb8c093b 3298 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
3299
3300 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
3301 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
3302
8ccde88a 3303 if (iwl_is_associated(priv)) {
b481de9c
ZY
3304 u16 interval = 0;
3305 u32 extra;
3306 u32 suspend_time = 100;
3307 u32 scan_suspend_time = 100;
3308 unsigned long flags;
3309
e1623446 3310 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
b481de9c
ZY
3311
3312 spin_lock_irqsave(&priv->lock, flags);
3313 interval = priv->beacon_int;
3314 spin_unlock_irqrestore(&priv->lock, flags);
3315
3316 scan->suspend_time = 0;
15e869d8 3317 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
3318 if (!interval)
3319 interval = suspend_time;
3320 /*
3321 * suspend time format:
3322 * 0-19: beacon interval in usec (time before exec.)
3323 * 20-23: 0
3324 * 24-31: number of beacons (suspend between channels)
3325 */
3326
3327 extra = (suspend_time / interval) << 24;
3328 scan_suspend_time = 0xFF0FFFFF &
3329 (extra | ((suspend_time % interval) * 1024));
3330
3331 scan->suspend_time = cpu_to_le32(scan_suspend_time);
e1623446 3332 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
b481de9c
ZY
3333 scan_suspend_time, interval);
3334 }
3335
3336 /* We should add the ability for user to lock to PASSIVE ONLY */
3337 if (priv->one_direct_scan) {
e1623446
TW
3338 IWL_DEBUG_SCAN(priv, "Kicking off one direct scan for '%s'\n",
3339 print_ssid(ssid, priv->direct_ssid,
9387b7ca 3340 priv->direct_ssid_len));
b481de9c
ZY
3341 scan->direct_scan[0].id = WLAN_EID_SSID;
3342 scan->direct_scan[0].len = priv->direct_ssid_len;
3343 memcpy(scan->direct_scan[0].ssid,
3344 priv->direct_ssid, priv->direct_ssid_len);
f9340520 3345 n_probes++;
f9340520 3346 } else
e1623446 3347 IWL_DEBUG_SCAN(priv, "Kicking off one indirect scan.\n");
b481de9c
ZY
3348
3349 /* We don't build a direct scan probe request; the uCode will do
3350 * that based on the direct_mask added to each channel entry */
b481de9c 3351 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
3832ec9d 3352 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
3353 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3354
3355 /* flags + rate selection */
3356
66b5004d 3357 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
b481de9c
ZY
3358 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
3359 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
3360 scan->good_CRC_th = 0;
8318d78a 3361 band = IEEE80211_BAND_2GHZ;
66b5004d 3362 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
b481de9c
ZY
3363 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
3364 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 3365 band = IEEE80211_BAND_5GHZ;
66b5004d 3366 } else {
39aadf8c 3367 IWL_WARN(priv, "Invalid scan band count\n");
b481de9c
ZY
3368 goto done;
3369 }
3370
77fecfb8
SO
3371 scan->tx_cmd.len = cpu_to_le16(
3372 iwl_fill_probe_req(priv, band,
3373 (struct ieee80211_mgmt *)scan->data,
3374 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
3375
b481de9c
ZY
3376 /* select Rx antennas */
3377 scan->flags |= iwl3945_get_antenna_flags(priv);
3378
05c914fe 3379 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
b481de9c
ZY
3380 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
3381
f9340520
AK
3382 scan->channel_count =
3383 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
3384 n_probes,
3385 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 3386
14b54336 3387 if (scan->channel_count == 0) {
e1623446 3388 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
14b54336
RC
3389 goto done;
3390 }
3391
b481de9c 3392 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 3393 scan->channel_count * sizeof(struct iwl3945_scan_channel);
b481de9c
ZY
3394 cmd.data = scan;
3395 scan->len = cpu_to_le16(cmd.len);
3396
3397 set_bit(STATUS_SCAN_HW, &priv->status);
518099a8 3398 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
3399 if (rc)
3400 goto done;
3401
3402 queue_delayed_work(priv->workqueue, &priv->scan_check,
3403 IWL_SCAN_CHECK_WATCHDOG);
3404
3405 mutex_unlock(&priv->mutex);
3406 return;
3407
3408 done:
2420ebc1
MA
3409 /* can not perform scan make sure we clear scanning
3410 * bits from status so next scan request can be performed.
3411 * if we dont clear scanning status bit here all next scan
3412 * will fail
3413 */
3414 clear_bit(STATUS_SCAN_HW, &priv->status);
3415 clear_bit(STATUS_SCANNING, &priv->status);
3416
01ebd063 3417 /* inform mac80211 scan aborted */
b481de9c
ZY
3418 queue_work(priv->workqueue, &priv->scan_completed);
3419 mutex_unlock(&priv->mutex);
3420}
3421
bb8c093b 3422static void iwl3945_bg_up(struct work_struct *data)
b481de9c 3423{
4a8a4322 3424 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
3425
3426 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3427 return;
3428
3429 mutex_lock(&priv->mutex);
bb8c093b 3430 __iwl3945_up(priv);
b481de9c 3431 mutex_unlock(&priv->mutex);
c0af96a6 3432 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
3433}
3434
bb8c093b 3435static void iwl3945_bg_restart(struct work_struct *data)
b481de9c 3436{
4a8a4322 3437 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
3438
3439 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3440 return;
3441
bb8c093b 3442 iwl3945_down(priv);
b481de9c
ZY
3443 queue_work(priv->workqueue, &priv->up);
3444}
3445
bb8c093b 3446static void iwl3945_bg_rx_replenish(struct work_struct *data)
b481de9c 3447{
4a8a4322
AK
3448 struct iwl_priv *priv =
3449 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
3450
3451 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3452 return;
3453
3454 mutex_lock(&priv->mutex);
bb8c093b 3455 iwl3945_rx_replenish(priv);
b481de9c
ZY
3456 mutex_unlock(&priv->mutex);
3457}
3458
7878a5a4
MA
3459#define IWL_DELAY_NEXT_SCAN (HZ*2)
3460
4a8a4322 3461static void iwl3945_post_associate(struct iwl_priv *priv)
b481de9c 3462{
b481de9c
ZY
3463 int rc = 0;
3464 struct ieee80211_conf *conf = NULL;
3465
05c914fe 3466 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 3467 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
3468 return;
3469 }
3470
3471
e1623446 3472 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
8ccde88a 3473 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
3474
3475 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3476 return;
3477
322a9811 3478 if (!priv->vif || !priv->is_open)
6ef89d0a 3479 return;
322a9811 3480
af0053d6 3481 iwl_scan_cancel_timeout(priv, 200);
15e869d8 3482
b481de9c
ZY
3483 conf = ieee80211_get_hw_conf(priv->hw);
3484
8ccde88a 3485 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3486 iwl3945_commit_rxon(priv);
b481de9c 3487
28afaf91 3488 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 3489 iwl3945_setup_rxon_timing(priv);
518099a8 3490 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
3491 sizeof(priv->rxon_timing), &priv->rxon_timing);
3492 if (rc)
39aadf8c 3493 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3494 "Attempting to continue.\n");
3495
8ccde88a 3496 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c 3497
8ccde88a 3498 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3499
e1623446 3500 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY
3501 priv->assoc_id, priv->beacon_int);
3502
3503 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3504 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3505 else
8ccde88a 3506 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3507
8ccde88a 3508 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c 3509 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3510 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3511 else
8ccde88a 3512 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3513
05c914fe 3514 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3515 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c
ZY
3516
3517 }
3518
bb8c093b 3519 iwl3945_commit_rxon(priv);
b481de9c
ZY
3520
3521 switch (priv->iw_mode) {
05c914fe 3522 case NL80211_IFTYPE_STATION:
bb8c093b 3523 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
3524 break;
3525
05c914fe 3526 case NL80211_IFTYPE_ADHOC:
b481de9c 3527
ce546fd2 3528 priv->assoc_id = 1;
bb8c093b 3529 iwl3945_add_station(priv, priv->bssid, 0, 0);
b481de9c 3530 iwl3945_sync_sta(priv, IWL_STA_ID,
8318d78a 3531 (priv->band == IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
3532 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3533 CMD_ASYNC);
bb8c093b
CH
3534 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3535 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3536
3537 break;
3538
3539 default:
15b1687c 3540 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 3541 __func__, priv->iw_mode);
b481de9c
ZY
3542 break;
3543 }
3544
14d2aac5 3545 iwl_activate_qos(priv, 0);
292ae174 3546
7878a5a4
MA
3547 /* we have just associated, don't start scan too early */
3548 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
cd56d331
AK
3549}
3550
e8975581 3551static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
76bb77e0 3552
b481de9c
ZY
3553/*****************************************************************************
3554 *
3555 * mac80211 entry point functions
3556 *
3557 *****************************************************************************/
3558
5a66926a
ZY
3559#define UCODE_READY_TIMEOUT (2 * HZ)
3560
bb8c093b 3561static int iwl3945_mac_start(struct ieee80211_hw *hw)
b481de9c 3562{
4a8a4322 3563 struct iwl_priv *priv = hw->priv;
5a66926a 3564 int ret;
b481de9c 3565
e1623446 3566 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
3567
3568 /* we should be verifying the device is ready to be opened */
3569 mutex_lock(&priv->mutex);
3570
8ccde88a 3571 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
5a66926a
ZY
3572 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3573 * ucode filename and max sizes are card-specific. */
3574
3575 if (!priv->ucode_code.len) {
3576 ret = iwl3945_read_ucode(priv);
3577 if (ret) {
15b1687c 3578 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a
ZY
3579 mutex_unlock(&priv->mutex);
3580 goto out_release_irq;
3581 }
3582 }
b481de9c 3583
e655b9f0 3584 ret = __iwl3945_up(priv);
b481de9c
ZY
3585
3586 mutex_unlock(&priv->mutex);
5a66926a 3587
c0af96a6 3588 iwl_rfkill_set_hw_state(priv);
80fcc9e2 3589
e655b9f0
ZY
3590 if (ret)
3591 goto out_release_irq;
3592
e1623446 3593 IWL_DEBUG_INFO(priv, "Start UP work.\n");
e655b9f0
ZY
3594
3595 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
3596 return 0;
3597
5a66926a
ZY
3598 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3599 * mac80211 will not be run successfully. */
3600 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3601 test_bit(STATUS_READY, &priv->status),
3602 UCODE_READY_TIMEOUT);
3603 if (!ret) {
3604 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c
WT
3605 IWL_ERR(priv,
3606 "Wait for START_ALIVE timeout after %dms.\n",
3607 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5a66926a
ZY
3608 ret = -ETIMEDOUT;
3609 goto out_release_irq;
3610 }
3611 }
3612
2663516d
HS
3613 /* ucode is running and will send rfkill notifications,
3614 * no need to poll the killswitch state anymore */
3615 cancel_delayed_work(&priv->rfkill_poll);
3616
e655b9f0 3617 priv->is_open = 1;
e1623446 3618 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3619 return 0;
5a66926a
ZY
3620
3621out_release_irq:
e655b9f0 3622 priv->is_open = 0;
e1623446 3623 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
5a66926a 3624 return ret;
b481de9c
ZY
3625}
3626
bb8c093b 3627static void iwl3945_mac_stop(struct ieee80211_hw *hw)
b481de9c 3628{
4a8a4322 3629 struct iwl_priv *priv = hw->priv;
b481de9c 3630
e1623446 3631 IWL_DEBUG_MAC80211(priv, "enter\n");
6ef89d0a 3632
e655b9f0 3633 if (!priv->is_open) {
e1623446 3634 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY
3635 return;
3636 }
3637
b481de9c 3638 priv->is_open = 0;
5a66926a 3639
775a6e27 3640 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
3641 /* stop mac, cancel any scan request and clear
3642 * RXON_FILTER_ASSOC_MSK BIT
3643 */
5a66926a 3644 mutex_lock(&priv->mutex);
af0053d6 3645 iwl_scan_cancel_timeout(priv, 100);
fde3571f 3646 mutex_unlock(&priv->mutex);
fde3571f
MA
3647 }
3648
5a66926a
ZY
3649 iwl3945_down(priv);
3650
3651 flush_workqueue(priv->workqueue);
2663516d
HS
3652
3653 /* start polling the killswitch state again */
3654 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3655 round_jiffies_relative(2 * HZ));
6ef89d0a 3656
e1623446 3657 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3658}
3659
e039fa4a 3660static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3661{
4a8a4322 3662 struct iwl_priv *priv = hw->priv;
b481de9c 3663
e1623446 3664 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3665
e1623446 3666 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 3667 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 3668
e039fa4a 3669 if (iwl3945_tx_skb(priv, skb))
b481de9c
ZY
3670 dev_kfree_skb_any(skb);
3671
e1623446 3672 IWL_DEBUG_MAC80211(priv, "leave\n");
637f8837 3673 return NETDEV_TX_OK;
b481de9c
ZY
3674}
3675
bb8c093b 3676static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3677 struct ieee80211_if_init_conf *conf)
3678{
4a8a4322 3679 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3680 unsigned long flags;
3681
e1623446 3682 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
b481de9c 3683
32bfd35d 3684 if (priv->vif) {
e1623446 3685 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
864792e3 3686 return -EOPNOTSUPP;
b481de9c
ZY
3687 }
3688
3689 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 3690 priv->vif = conf->vif;
60294de3 3691 priv->iw_mode = conf->type;
b481de9c
ZY
3692
3693 spin_unlock_irqrestore(&priv->lock, flags);
3694
3695 mutex_lock(&priv->mutex);
864792e3
TW
3696
3697 if (conf->mac_addr) {
e1623446 3698 IWL_DEBUG_MAC80211(priv, "Set: %pM\n", conf->mac_addr);
864792e3
TW
3699 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
3700 }
3701
775a6e27 3702 if (iwl_is_ready(priv))
5a66926a 3703 iwl3945_set_mode(priv, conf->type);
b481de9c 3704
b481de9c
ZY
3705 mutex_unlock(&priv->mutex);
3706
e1623446 3707 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3708 return 0;
3709}
3710
3711/**
bb8c093b 3712 * iwl3945_mac_config - mac80211 config callback
b481de9c
ZY
3713 *
3714 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
3715 * be set inappropriately and the driver currently sets the hardware up to
3716 * use it whenever needed.
3717 */
e8975581 3718static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 3719{
4a8a4322 3720 struct iwl_priv *priv = hw->priv;
d20b3c65 3721 const struct iwl_channel_info *ch_info;
e8975581 3722 struct ieee80211_conf *conf = &hw->conf;
b481de9c 3723 unsigned long flags;
76bb77e0 3724 int ret = 0;
b481de9c
ZY
3725
3726 mutex_lock(&priv->mutex);
e1623446
TW
3727 IWL_DEBUG_MAC80211(priv, "enter to channel %d\n",
3728 conf->channel->hw_value);
b481de9c 3729
775a6e27 3730 if (!iwl_is_ready(priv)) {
e1623446 3731 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
76bb77e0
ZY
3732 ret = -EIO;
3733 goto out;
b481de9c
ZY
3734 }
3735
df878d8f 3736 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
b481de9c 3737 test_bit(STATUS_SCANNING, &priv->status))) {
e1623446 3738 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
a0646470 3739 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 3740 mutex_unlock(&priv->mutex);
a0646470 3741 return 0;
b481de9c
ZY
3742 }
3743
3744 spin_lock_irqsave(&priv->lock, flags);
3745
e6148917
SO
3746 ch_info = iwl_get_channel_info(priv, conf->channel->band,
3747 conf->channel->hw_value);
b481de9c 3748 if (!is_channel_valid(ch_info)) {
e1623446
TW
3749 IWL_DEBUG_SCAN(priv,
3750 "Channel %d [%d] is INVALID for this band.\n",
3751 conf->channel->hw_value, conf->channel->band);
3752 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
b481de9c 3753 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY
3754 ret = -EINVAL;
3755 goto out;
b481de9c
ZY
3756 }
3757
8ccde88a 3758 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 3759
8ccde88a 3760 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
3761
3762 /* The list of supported rates and rate mask can be different
3763 * for each phymode; since the phymode may have changed, reset
3764 * the rate mask to what mac80211 lists */
8ccde88a 3765 iwl_set_rate(priv);
b481de9c
ZY
3766
3767 spin_unlock_irqrestore(&priv->lock, flags);
3768
3769#ifdef IEEE80211_CONF_CHANNEL_SWITCH
3770 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 3771 iwl3945_hw_channel_switch(priv, conf->channel);
76bb77e0 3772 goto out;
b481de9c
ZY
3773 }
3774#endif
3775
37fec384
MA
3776 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
3777 if (conf->radio_enabled &&
3778 iwl_radio_kill_sw_enable_radio(priv)) {
3779 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
3780 "waiting for uCode\n");
3781 goto out;
3782 }
b481de9c 3783
37fec384
MA
3784 if (!conf->radio_enabled) {
3785 iwl_radio_kill_sw_disable_radio(priv);
3786 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
3787 goto out;
3788 }
b481de9c
ZY
3789 }
3790
775a6e27 3791 if (iwl_is_rfkill(priv)) {
e1623446 3792 IWL_DEBUG_MAC80211(priv, "leave - RF kill\n");
76bb77e0
ZY
3793 ret = -EIO;
3794 goto out;
b481de9c
ZY
3795 }
3796
8ccde88a 3797 iwl_set_rate(priv);
b481de9c 3798
8ccde88a
SO
3799 if (memcmp(&priv->active_rxon,
3800 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 3801 iwl3945_commit_rxon(priv);
b481de9c 3802 else
e1623446 3803 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration\n");
b481de9c 3804
e1623446 3805 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3806
76bb77e0 3807out:
a0646470 3808 clear_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 3809 mutex_unlock(&priv->mutex);
76bb77e0 3810 return ret;
b481de9c
ZY
3811}
3812
4a8a4322 3813static void iwl3945_config_ap(struct iwl_priv *priv)
b481de9c
ZY
3814{
3815 int rc = 0;
3816
d986bcd1 3817 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
3818 return;
3819
3820 /* The following should be done only at AP bring up */
8ccde88a 3821 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
3822
3823 /* RXON - unassoc (to set timing command) */
8ccde88a 3824 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3825 iwl3945_commit_rxon(priv);
b481de9c
ZY
3826
3827 /* RXON Timing */
28afaf91 3828 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 3829 iwl3945_setup_rxon_timing(priv);
518099a8
SO
3830 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3831 sizeof(priv->rxon_timing),
3832 &priv->rxon_timing);
b481de9c 3833 if (rc)
39aadf8c 3834 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3835 "Attempting to continue.\n");
3836
3837 /* FIXME: what should be the assoc_id for AP? */
8ccde88a 3838 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3839 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3840 priv->staging_rxon.flags |=
b481de9c
ZY
3841 RXON_FLG_SHORT_PREAMBLE_MSK;
3842 else
8ccde88a 3843 priv->staging_rxon.flags &=
b481de9c
ZY
3844 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3845
8ccde88a 3846 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c
ZY
3847 if (priv->assoc_capability &
3848 WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3849 priv->staging_rxon.flags |=
b481de9c
ZY
3850 RXON_FLG_SHORT_SLOT_MSK;
3851 else
8ccde88a 3852 priv->staging_rxon.flags &=
b481de9c
ZY
3853 ~RXON_FLG_SHORT_SLOT_MSK;
3854
05c914fe 3855 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3856 priv->staging_rxon.flags &=
b481de9c
ZY
3857 ~RXON_FLG_SHORT_SLOT_MSK;
3858 }
3859 /* restore RXON assoc */
8ccde88a 3860 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 3861 iwl3945_commit_rxon(priv);
b5323d36 3862 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
556f8db7 3863 }
bb8c093b 3864 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3865
3866 /* FIXME - we need to add code here to detect a totally new
3867 * configuration, reset the AP, unassoc, rxon timing, assoc,
3868 * clear sta table, add BCAST sta... */
3869}
3870
32bfd35d
JB
3871static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
3872 struct ieee80211_vif *vif,
4a8a4322 3873 struct ieee80211_if_conf *conf)
b481de9c 3874{
4a8a4322 3875 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3876 int rc;
3877
3878 if (conf == NULL)
3879 return -EIO;
3880
b716bb91 3881 if (priv->vif != vif) {
e1623446 3882 IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
b716bb91
EG
3883 return 0;
3884 }
3885
9d139c81 3886 /* handle this temporarily here */
05c914fe 3887 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
3888 conf->changed & IEEE80211_IFCC_BEACON) {
3889 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
3890 if (!beacon)
3891 return -ENOMEM;
9bdf5eca 3892 mutex_lock(&priv->mutex);
9d139c81 3893 rc = iwl3945_mac_beacon_update(hw, beacon);
9bdf5eca 3894 mutex_unlock(&priv->mutex);
9d139c81
JB
3895 if (rc)
3896 return rc;
3897 }
3898
775a6e27 3899 if (!iwl_is_alive(priv))
5a66926a
ZY
3900 return -EAGAIN;
3901
b481de9c
ZY
3902 mutex_lock(&priv->mutex);
3903
b481de9c 3904 if (conf->bssid)
e1623446 3905 IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
b481de9c 3906
4150c572
JB
3907/*
3908 * very dubious code was here; the probe filtering flag is never set:
3909 *
b481de9c
ZY
3910 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
3911 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 3912 */
b481de9c 3913
05c914fe 3914 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
3915 if (!conf->bssid) {
3916 conf->bssid = priv->mac_addr;
3917 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e1623446 3918 IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
e174961c 3919 conf->bssid);
b481de9c
ZY
3920 }
3921 if (priv->ibss_beacon)
3922 dev_kfree_skb(priv->ibss_beacon);
3923
9d139c81 3924 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
3925 }
3926
775a6e27 3927 if (iwl_is_rfkill(priv))
fde3571f
MA
3928 goto done;
3929
b481de9c
ZY
3930 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
3931 !is_multicast_ether_addr(conf->bssid)) {
3932 /* If there is currently a HW scan going on in the background
3933 * then we need to cancel it else the RXON below will fail. */
af0053d6 3934 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 3935 IWL_WARN(priv, "Aborted scan still in progress "
b481de9c 3936 "after 100ms\n");
e1623446 3937 IWL_DEBUG_MAC80211(priv, "leaving:scan abort failed\n");
b481de9c
ZY
3938 mutex_unlock(&priv->mutex);
3939 return -EAGAIN;
3940 }
8ccde88a 3941 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
b481de9c
ZY
3942
3943 /* TODO: Audit driver for usage of these members and see
3944 * if mac80211 deprecates them (priv->bssid looks like it
3945 * shouldn't be there, but I haven't scanned the IBSS code
3946 * to verify) - jpk */
3947 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
3948
05c914fe 3949 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 3950 iwl3945_config_ap(priv);
b481de9c 3951 else {
bb8c093b 3952 rc = iwl3945_commit_rxon(priv);
05c914fe 3953 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
bb8c093b 3954 iwl3945_add_station(priv,
8ccde88a 3955 priv->active_rxon.bssid_addr, 1, 0);
b481de9c
ZY
3956 }
3957
3958 } else {
af0053d6 3959 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 3960 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3961 iwl3945_commit_rxon(priv);
b481de9c
ZY
3962 }
3963
fde3571f 3964 done:
e1623446 3965 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3966 mutex_unlock(&priv->mutex);
3967
3968 return 0;
3969}
3970
bb8c093b 3971static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3972 struct ieee80211_if_init_conf *conf)
3973{
4a8a4322 3974 struct iwl_priv *priv = hw->priv;
b481de9c 3975
e1623446 3976 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
3977
3978 mutex_lock(&priv->mutex);
6ef89d0a 3979
775a6e27 3980 if (iwl_is_ready_rf(priv)) {
af0053d6 3981 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 3982 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
fde3571f
MA
3983 iwl3945_commit_rxon(priv);
3984 }
32bfd35d
JB
3985 if (priv->vif == conf->vif) {
3986 priv->vif = NULL;
b481de9c 3987 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY
3988 }
3989 mutex_unlock(&priv->mutex);
3990
e1623446 3991 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3992}
3993
cd56d331
AK
3994#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
3995
3996static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
3997 struct ieee80211_vif *vif,
3998 struct ieee80211_bss_conf *bss_conf,
3999 u32 changes)
4000{
4a8a4322 4001 struct iwl_priv *priv = hw->priv;
cd56d331 4002
e1623446 4003 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
cd56d331
AK
4004
4005 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
e1623446 4006 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
cd56d331
AK
4007 bss_conf->use_short_preamble);
4008 if (bss_conf->use_short_preamble)
8ccde88a 4009 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
cd56d331 4010 else
8ccde88a
SO
4011 priv->staging_rxon.flags &=
4012 ~RXON_FLG_SHORT_PREAMBLE_MSK;
cd56d331
AK
4013 }
4014
4015 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
e1623446
TW
4016 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n",
4017 bss_conf->use_cts_prot);
cd56d331 4018 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
8ccde88a 4019 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
cd56d331 4020 else
8ccde88a 4021 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
cd56d331
AK
4022 }
4023
4024 if (changes & BSS_CHANGED_ASSOC) {
e1623446 4025 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
cd56d331
AK
4026 /* This should never happen as this function should
4027 * never be called from interrupt context. */
4028 if (WARN_ON_ONCE(in_interrupt()))
4029 return;
4030 if (bss_conf->assoc) {
4031 priv->assoc_id = bss_conf->aid;
4032 priv->beacon_int = bss_conf->beacon_int;
28afaf91 4033 priv->timestamp = bss_conf->timestamp;
cd56d331 4034 priv->assoc_capability = bss_conf->assoc_capability;
3dae0c42 4035 priv->power_data.dtim_period = bss_conf->dtim_period;
cd56d331
AK
4036 priv->next_scan_jiffies = jiffies +
4037 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
4038 mutex_lock(&priv->mutex);
4039 iwl3945_post_associate(priv);
4040 mutex_unlock(&priv->mutex);
4041 } else {
4042 priv->assoc_id = 0;
e1623446
TW
4043 IWL_DEBUG_MAC80211(priv,
4044 "DISASSOC %d\n", bss_conf->assoc);
cd56d331 4045 }
8ccde88a 4046 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
e1623446
TW
4047 IWL_DEBUG_MAC80211(priv,
4048 "Associated Changes %d\n", changes);
cd56d331
AK
4049 iwl3945_send_rxon_assoc(priv);
4050 }
4051
4052}
4053
bb8c093b 4054static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB
4055 struct ieee80211_vif *vif,
4056 struct ieee80211_sta *sta,
4057 struct ieee80211_key_conf *key)
b481de9c 4058{
4a8a4322 4059 struct iwl_priv *priv = hw->priv;
dc822b5d 4060 const u8 *addr;
6e21f15c
AK
4061 int ret = 0;
4062 u8 sta_id = IWL_INVALID_STATION;
4063 u8 static_key;
b481de9c 4064
e1623446 4065 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4066
df878d8f 4067 if (iwl3945_mod_params.sw_crypto) {
e1623446 4068 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY
4069 return -EOPNOTSUPP;
4070 }
4071
42986796 4072 addr = sta ? sta->addr : iwl_bcast_addr;
6e21f15c
AK
4073 static_key = !iwl_is_associated(priv);
4074
4075 if (!static_key) {
4076 sta_id = iwl3945_hw_find_station(priv, addr);
4077 if (sta_id == IWL_INVALID_STATION) {
4078 IWL_DEBUG_MAC80211(priv, "leave - %pMnot in station map.\n",
4079 addr);
4080 return -EINVAL;
4081 }
b481de9c
ZY
4082 }
4083
4084 mutex_lock(&priv->mutex);
af0053d6 4085 iwl_scan_cancel_timeout(priv, 100);
6e21f15c 4086 mutex_unlock(&priv->mutex);
15e869d8 4087
b481de9c 4088 switch (cmd) {
6e21f15c
AK
4089 case SET_KEY:
4090 if (static_key)
4091 ret = iwl3945_set_static_key(priv, key);
4092 else
4093 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
4094 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
b481de9c
ZY
4095 break;
4096 case DISABLE_KEY:
6e21f15c
AK
4097 if (static_key)
4098 ret = iwl3945_remove_static_key(priv);
4099 else
4100 ret = iwl3945_clear_sta_key_info(priv, sta_id);
4101 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY
4102 break;
4103 default:
42986796 4104 ret = -EINVAL;
b481de9c
ZY
4105 }
4106
e1623446 4107 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 4108
42986796 4109 return ret;
b481de9c
ZY
4110}
4111
e100bb64 4112static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
4113 const struct ieee80211_tx_queue_params *params)
4114{
4a8a4322 4115 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4116 unsigned long flags;
4117 int q;
b481de9c 4118
e1623446 4119 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4120
775a6e27 4121 if (!iwl_is_ready_rf(priv)) {
e1623446 4122 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4123 return -EIO;
4124 }
4125
4126 if (queue >= AC_NUM) {
e1623446 4127 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
b481de9c
ZY
4128 return 0;
4129 }
4130
b481de9c
ZY
4131 q = AC_NUM - 1 - queue;
4132
4133 spin_lock_irqsave(&priv->lock, flags);
4134
4135 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
4136 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
4137 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4138 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 4139 cpu_to_le16((params->txop * 32));
b481de9c
ZY
4140
4141 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
4142 priv->qos_data.qos_active = 1;
4143
4144 spin_unlock_irqrestore(&priv->lock, flags);
4145
4146 mutex_lock(&priv->mutex);
05c914fe 4147 if (priv->iw_mode == NL80211_IFTYPE_AP)
14d2aac5 4148 iwl_activate_qos(priv, 1);
8ccde88a 4149 else if (priv->assoc_id && iwl_is_associated(priv))
14d2aac5 4150 iwl_activate_qos(priv, 0);
b481de9c
ZY
4151
4152 mutex_unlock(&priv->mutex);
4153
e1623446 4154 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4155 return 0;
4156}
4157
bb8c093b 4158static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
4159 struct ieee80211_tx_queue_stats *stats)
4160{
4a8a4322 4161 struct iwl_priv *priv = hw->priv;
b481de9c 4162 int i, avail;
188cf6c7 4163 struct iwl_tx_queue *txq;
d20b3c65 4164 struct iwl_queue *q;
b481de9c
ZY
4165 unsigned long flags;
4166
e1623446 4167 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4168
775a6e27 4169 if (!iwl_is_ready_rf(priv)) {
e1623446 4170 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4171 return -EIO;
4172 }
4173
4174 spin_lock_irqsave(&priv->lock, flags);
4175
4176 for (i = 0; i < AC_NUM; i++) {
188cf6c7 4177 txq = &priv->txq[i];
b481de9c 4178 q = &txq->q;
d20b3c65 4179 avail = iwl_queue_space(q);
b481de9c 4180
57ffc589
JB
4181 stats[i].len = q->n_window - avail;
4182 stats[i].limit = q->n_window - q->high_mark;
4183 stats[i].count = q->n_window;
b481de9c
ZY
4184
4185 }
4186 spin_unlock_irqrestore(&priv->lock, flags);
4187
e1623446 4188 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4189
4190 return 0;
4191}
4192
bb8c093b 4193static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 4194{
4a8a4322 4195 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4196 unsigned long flags;
4197
4198 mutex_lock(&priv->mutex);
e1623446 4199 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4200
775a6e27 4201 iwl_reset_qos(priv);
292ae174 4202
b481de9c
ZY
4203 spin_lock_irqsave(&priv->lock, flags);
4204 priv->assoc_id = 0;
4205 priv->assoc_capability = 0;
b481de9c
ZY
4206
4207 /* new association get rid of ibss beacon skb */
4208 if (priv->ibss_beacon)
4209 dev_kfree_skb(priv->ibss_beacon);
4210
4211 priv->ibss_beacon = NULL;
4212
4213 priv->beacon_int = priv->hw->conf.beacon_int;
28afaf91 4214 priv->timestamp = 0;
05c914fe 4215 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
4216 priv->beacon_int = 0;
4217
4218 spin_unlock_irqrestore(&priv->lock, flags);
4219
775a6e27 4220 if (!iwl_is_ready_rf(priv)) {
e1623446 4221 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
fde3571f
MA
4222 mutex_unlock(&priv->mutex);
4223 return;
4224 }
4225
15e869d8
MA
4226 /* we are restarting association process
4227 * clear RXON_FILTER_ASSOC_MSK bit
4228 */
05c914fe 4229 if (priv->iw_mode != NL80211_IFTYPE_AP) {
af0053d6 4230 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4231 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4232 iwl3945_commit_rxon(priv);
15e869d8
MA
4233 }
4234
b481de9c 4235 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 4236 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
15e869d8 4237
e1623446 4238 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
b481de9c
ZY
4239 mutex_unlock(&priv->mutex);
4240 return;
b481de9c
ZY
4241 }
4242
8ccde88a 4243 iwl_set_rate(priv);
b481de9c
ZY
4244
4245 mutex_unlock(&priv->mutex);
4246
e1623446 4247 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4248
4249}
4250
e039fa4a 4251static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 4252{
4a8a4322 4253 struct iwl_priv *priv = hw->priv;
b481de9c 4254 unsigned long flags;
7c4cbb6e 4255 __le64 timestamp;
b481de9c 4256
e1623446 4257 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4258
775a6e27 4259 if (!iwl_is_ready_rf(priv)) {
e1623446 4260 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4261 return -EIO;
4262 }
4263
05c914fe 4264 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
e1623446 4265 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
b481de9c
ZY
4266 return -EIO;
4267 }
4268
4269 spin_lock_irqsave(&priv->lock, flags);
4270
4271 if (priv->ibss_beacon)
4272 dev_kfree_skb(priv->ibss_beacon);
4273
4274 priv->ibss_beacon = skb;
4275
4276 priv->assoc_id = 0;
7c4cbb6e
AK
4277 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
4278 priv->timestamp = le64_to_cpu(timestamp);
b481de9c 4279
e1623446 4280 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4281 spin_unlock_irqrestore(&priv->lock, flags);
4282
775a6e27 4283 iwl_reset_qos(priv);
b481de9c 4284
dc4b1e7d 4285 iwl3945_post_associate(priv);
b481de9c 4286
b481de9c
ZY
4287
4288 return 0;
4289}
4290
4291/*****************************************************************************
4292 *
4293 * sysfs attributes
4294 *
4295 *****************************************************************************/
4296
d08853a3 4297#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
4298
4299/*
4300 * The following adds a new attribute to the sysfs representation
4301 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
4302 * used for controlling the debug level.
4303 *
4304 * See the level definitions in iwl for details.
4305 */
40b8ec0b
SO
4306static ssize_t show_debug_level(struct device *d,
4307 struct device_attribute *attr, char *buf)
b481de9c 4308{
4a8a4322 4309 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
4310
4311 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 4312}
40b8ec0b
SO
4313static ssize_t store_debug_level(struct device *d,
4314 struct device_attribute *attr,
b481de9c
ZY
4315 const char *buf, size_t count)
4316{
4a8a4322 4317 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
4318 unsigned long val;
4319 int ret;
b481de9c 4320
40b8ec0b
SO
4321 ret = strict_strtoul(buf, 0, &val);
4322 if (ret)
978785a3 4323 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 4324 else
40b8ec0b 4325 priv->debug_level = val;
b481de9c
ZY
4326
4327 return strnlen(buf, count);
4328}
4329
40b8ec0b
SO
4330static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
4331 show_debug_level, store_debug_level);
b481de9c 4332
d08853a3 4333#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 4334
b481de9c
ZY
4335static ssize_t show_temperature(struct device *d,
4336 struct device_attribute *attr, char *buf)
4337{
4a8a4322 4338 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4339
775a6e27 4340 if (!iwl_is_alive(priv))
b481de9c
ZY
4341 return -EAGAIN;
4342
bb8c093b 4343 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
b481de9c
ZY
4344}
4345
4346static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
4347
b481de9c
ZY
4348static ssize_t show_tx_power(struct device *d,
4349 struct device_attribute *attr, char *buf)
4350{
4a8a4322 4351 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
62ea9c5b 4352 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
4353}
4354
4355static ssize_t store_tx_power(struct device *d,
4356 struct device_attribute *attr,
4357 const char *buf, size_t count)
4358{
4a8a4322 4359 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4360 char *p = (char *)buf;
4361 u32 val;
4362
4363 val = simple_strtoul(p, &p, 10);
4364 if (p == buf)
978785a3 4365 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
b481de9c 4366 else
bb8c093b 4367 iwl3945_hw_reg_set_txpower(priv, val);
b481de9c
ZY
4368
4369 return count;
4370}
4371
4372static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
4373
4374static ssize_t show_flags(struct device *d,
4375 struct device_attribute *attr, char *buf)
4376{
4a8a4322 4377 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4378
8ccde88a 4379 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
b481de9c
ZY
4380}
4381
4382static ssize_t store_flags(struct device *d,
4383 struct device_attribute *attr,
4384 const char *buf, size_t count)
4385{
4a8a4322 4386 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4387 u32 flags = simple_strtoul(buf, NULL, 0);
4388
4389 mutex_lock(&priv->mutex);
8ccde88a 4390 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
b481de9c 4391 /* Cancel any currently running scans... */
af0053d6 4392 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4393 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 4394 else {
e1623446 4395 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
b481de9c 4396 flags);
8ccde88a 4397 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 4398 iwl3945_commit_rxon(priv);
b481de9c
ZY
4399 }
4400 }
4401 mutex_unlock(&priv->mutex);
4402
4403 return count;
4404}
4405
4406static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
4407
4408static ssize_t show_filter_flags(struct device *d,
4409 struct device_attribute *attr, char *buf)
4410{
4a8a4322 4411 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4412
4413 return sprintf(buf, "0x%04X\n",
8ccde88a 4414 le32_to_cpu(priv->active_rxon.filter_flags));
b481de9c
ZY
4415}
4416
4417static ssize_t store_filter_flags(struct device *d,
4418 struct device_attribute *attr,
4419 const char *buf, size_t count)
4420{
4a8a4322 4421 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4422 u32 filter_flags = simple_strtoul(buf, NULL, 0);
4423
4424 mutex_lock(&priv->mutex);
8ccde88a 4425 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
b481de9c 4426 /* Cancel any currently running scans... */
af0053d6 4427 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4428 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 4429 else {
e1623446 4430 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c 4431 "0x%04X\n", filter_flags);
8ccde88a 4432 priv->staging_rxon.filter_flags =
b481de9c 4433 cpu_to_le32(filter_flags);
bb8c093b 4434 iwl3945_commit_rxon(priv);
b481de9c
ZY
4435 }
4436 }
4437 mutex_unlock(&priv->mutex);
4438
4439 return count;
4440}
4441
4442static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
4443 store_filter_flags);
4444
c8b0e6e1 4445#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
4446
4447static ssize_t show_measurement(struct device *d,
4448 struct device_attribute *attr, char *buf)
4449{
4a8a4322 4450 struct iwl_priv *priv = dev_get_drvdata(d);
600c0e11 4451 struct iwl_spectrum_notification measure_report;
b481de9c 4452 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 4453 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
4454 unsigned long flags;
4455
4456 spin_lock_irqsave(&priv->lock, flags);
4457 if (!(priv->measurement_status & MEASUREMENT_READY)) {
4458 spin_unlock_irqrestore(&priv->lock, flags);
4459 return 0;
4460 }
4461 memcpy(&measure_report, &priv->measure_report, size);
4462 priv->measurement_status = 0;
4463 spin_unlock_irqrestore(&priv->lock, flags);
4464
4465 while (size && (PAGE_SIZE - len)) {
4466 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4467 PAGE_SIZE - len, 1);
4468 len = strlen(buf);
4469 if (PAGE_SIZE - len)
4470 buf[len++] = '\n';
4471
4472 ofs += 16;
4473 size -= min(size, 16U);
4474 }
4475
4476 return len;
4477}
4478
4479static ssize_t store_measurement(struct device *d,
4480 struct device_attribute *attr,
4481 const char *buf, size_t count)
4482{
4a8a4322 4483 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 4484 struct ieee80211_measurement_params params = {
8ccde88a 4485 .channel = le16_to_cpu(priv->active_rxon.channel),
b481de9c
ZY
4486 .start_time = cpu_to_le64(priv->last_tsf),
4487 .duration = cpu_to_le16(1),
4488 };
4489 u8 type = IWL_MEASURE_BASIC;
4490 u8 buffer[32];
4491 u8 channel;
4492
4493 if (count) {
4494 char *p = buffer;
4495 strncpy(buffer, buf, min(sizeof(buffer), count));
4496 channel = simple_strtoul(p, NULL, 0);
4497 if (channel)
4498 params.channel = channel;
4499
4500 p = buffer;
4501 while (*p && *p != ' ')
4502 p++;
4503 if (*p)
4504 type = simple_strtoul(p + 1, NULL, 0);
4505 }
4506
e1623446 4507 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
b481de9c 4508 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 4509 iwl3945_get_measurement(priv, &params, type);
b481de9c
ZY
4510
4511 return count;
4512}
4513
4514static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
4515 show_measurement, store_measurement);
c8b0e6e1 4516#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
b481de9c 4517
b481de9c
ZY
4518static ssize_t store_retry_rate(struct device *d,
4519 struct device_attribute *attr,
4520 const char *buf, size_t count)
4521{
4a8a4322 4522 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
4523
4524 priv->retry_rate = simple_strtoul(buf, NULL, 0);
4525 if (priv->retry_rate <= 0)
4526 priv->retry_rate = 1;
4527
4528 return count;
4529}
4530
4531static ssize_t show_retry_rate(struct device *d,
4532 struct device_attribute *attr, char *buf)
4533{
4a8a4322 4534 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
4535 return sprintf(buf, "%d", priv->retry_rate);
4536}
4537
4538static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
4539 store_retry_rate);
4540
d25aabb0 4541
b481de9c
ZY
4542static ssize_t store_power_level(struct device *d,
4543 struct device_attribute *attr,
4544 const char *buf, size_t count)
4545{
4a8a4322 4546 struct iwl_priv *priv = dev_get_drvdata(d);
d25aabb0
WT
4547 int ret;
4548 unsigned long mode;
4549
b481de9c 4550
b481de9c
ZY
4551 mutex_lock(&priv->mutex);
4552
d25aabb0
WT
4553 ret = strict_strtoul(buf, 10, &mode);
4554 if (ret)
4555 goto out;
b481de9c 4556
d25aabb0
WT
4557 ret = iwl_power_set_user_mode(priv, mode);
4558 if (ret) {
4559 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
4560 goto out;
b481de9c 4561 }
d25aabb0 4562 ret = count;
b481de9c
ZY
4563
4564 out:
4565 mutex_unlock(&priv->mutex);
d25aabb0 4566 return ret;
b481de9c
ZY
4567}
4568
d25aabb0
WT
4569static ssize_t show_power_level(struct device *d,
4570 struct device_attribute *attr, char *buf)
4571{
4572 struct iwl_priv *priv = dev_get_drvdata(d);
4573 int mode = priv->power_data.user_power_setting;
4574 int system = priv->power_data.system_power_setting;
4575 int level = priv->power_data.power_mode;
4576 char *p = buf;
4577
4578 switch (system) {
4579 case IWL_POWER_SYS_AUTO:
4580 p += sprintf(p, "SYSTEM:auto");
4581 break;
4582 case IWL_POWER_SYS_AC:
4583 p += sprintf(p, "SYSTEM:ac");
4584 break;
4585 case IWL_POWER_SYS_BATTERY:
4586 p += sprintf(p, "SYSTEM:battery");
4587 break;
4588 }
4589
4590 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
4591 "fixed" : "auto");
4592 p += sprintf(p, "\tINDEX:%d", level);
4593 p += sprintf(p, "\n");
4594 return p - buf + 1;
4595}
4596
4597static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
4598 show_power_level, store_power_level);
4599
b481de9c
ZY
4600#define MAX_WX_STRING 80
4601
4602/* Values are in microsecond */
4603static const s32 timeout_duration[] = {
4604 350000,
4605 250000,
4606 75000,
4607 37000,
4608 25000,
4609};
4610static const s32 period_duration[] = {
4611 400000,
4612 700000,
4613 1000000,
4614 1000000,
4615 1000000
4616};
4617
b481de9c
ZY
4618static ssize_t show_channels(struct device *d,
4619 struct device_attribute *attr, char *buf)
4620{
8318d78a
JB
4621 /* all this shit doesn't belong into sysfs anyway */
4622 return 0;
b481de9c
ZY
4623}
4624
4625static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
4626
4627static ssize_t show_statistics(struct device *d,
4628 struct device_attribute *attr, char *buf)
4629{
4a8a4322 4630 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 4631 u32 size = sizeof(struct iwl3945_notif_statistics);
b481de9c 4632 u32 len = 0, ofs = 0;
f2c7e521 4633 u8 *data = (u8 *)&priv->statistics_39;
b481de9c
ZY
4634 int rc = 0;
4635
775a6e27 4636 if (!iwl_is_alive(priv))
b481de9c
ZY
4637 return -EAGAIN;
4638
4639 mutex_lock(&priv->mutex);
17f841cd 4640 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
4641 mutex_unlock(&priv->mutex);
4642
4643 if (rc) {
4644 len = sprintf(buf,
4645 "Error sending statistics request: 0x%08X\n", rc);
4646 return len;
4647 }
4648
4649 while (size && (PAGE_SIZE - len)) {
4650 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4651 PAGE_SIZE - len, 1);
4652 len = strlen(buf);
4653 if (PAGE_SIZE - len)
4654 buf[len++] = '\n';
4655
4656 ofs += 16;
4657 size -= min(size, 16U);
4658 }
4659
4660 return len;
4661}
4662
4663static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4664
4665static ssize_t show_antenna(struct device *d,
4666 struct device_attribute *attr, char *buf)
4667{
4a8a4322 4668 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 4669
775a6e27 4670 if (!iwl_is_alive(priv))
b481de9c
ZY
4671 return -EAGAIN;
4672
7e4bca5e 4673 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
b481de9c
ZY
4674}
4675
4676static ssize_t store_antenna(struct device *d,
4677 struct device_attribute *attr,
4678 const char *buf, size_t count)
4679{
7530f85f 4680 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
b481de9c 4681 int ant;
b481de9c
ZY
4682
4683 if (count == 0)
4684 return 0;
4685
4686 if (sscanf(buf, "%1i", &ant) != 1) {
e1623446 4687 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
b481de9c
ZY
4688 return count;
4689 }
4690
4691 if ((ant >= 0) && (ant <= 2)) {
e1623446 4692 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
7e4bca5e 4693 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
b481de9c 4694 } else
e1623446 4695 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
b481de9c
ZY
4696
4697
4698 return count;
4699}
4700
4701static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
4702
4703static ssize_t show_status(struct device *d,
4704 struct device_attribute *attr, char *buf)
4705{
4a8a4322 4706 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
775a6e27 4707 if (!iwl_is_alive(priv))
b481de9c
ZY
4708 return -EAGAIN;
4709 return sprintf(buf, "0x%08x\n", (int)priv->status);
4710}
4711
4712static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4713
4714static ssize_t dump_error_log(struct device *d,
4715 struct device_attribute *attr,
4716 const char *buf, size_t count)
4717{
4718 char *p = (char *)buf;
4719
4720 if (p[0] == '1')
4a8a4322 4721 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
4722
4723 return strnlen(buf, count);
4724}
4725
4726static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
4727
4728static ssize_t dump_event_log(struct device *d,
4729 struct device_attribute *attr,
4730 const char *buf, size_t count)
4731{
4732 char *p = (char *)buf;
4733
4734 if (p[0] == '1')
4a8a4322 4735 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
4736
4737 return strnlen(buf, count);
4738}
4739
4740static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
4741
4742/*****************************************************************************
4743 *
a96a27f9 4744 * driver setup and tear down
b481de9c
ZY
4745 *
4746 *****************************************************************************/
4747
4a8a4322 4748static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
b481de9c 4749{
d21050c7 4750 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
b481de9c
ZY
4751
4752 init_waitqueue_head(&priv->wait_command_queue);
4753
bb8c093b
CH
4754 INIT_WORK(&priv->up, iwl3945_bg_up);
4755 INIT_WORK(&priv->restart, iwl3945_bg_restart);
4756 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
c0af96a6 4757 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
bb8c093b 4758 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
bb8c093b
CH
4759 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
4760 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
2663516d 4761 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
77fecfb8
SO
4762 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
4763 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
4764 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
4765 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
bb8c093b
CH
4766
4767 iwl3945_hw_setup_deferred_work(priv);
b481de9c
ZY
4768
4769 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 4770 iwl3945_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
4771}
4772
4a8a4322 4773static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 4774{
bb8c093b 4775 iwl3945_hw_cancel_deferred_work(priv);
b481de9c 4776
e47eb6ad 4777 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
4778 cancel_delayed_work(&priv->scan_check);
4779 cancel_delayed_work(&priv->alive_start);
b481de9c
ZY
4780 cancel_work_sync(&priv->beacon_update);
4781}
4782
bb8c093b 4783static struct attribute *iwl3945_sysfs_entries[] = {
b481de9c
ZY
4784 &dev_attr_antenna.attr,
4785 &dev_attr_channels.attr,
4786 &dev_attr_dump_errors.attr,
4787 &dev_attr_dump_events.attr,
4788 &dev_attr_flags.attr,
4789 &dev_attr_filter_flags.attr,
c8b0e6e1 4790#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
4791 &dev_attr_measurement.attr,
4792#endif
4793 &dev_attr_power_level.attr,
b481de9c 4794 &dev_attr_retry_rate.attr,
b481de9c
ZY
4795 &dev_attr_statistics.attr,
4796 &dev_attr_status.attr,
4797 &dev_attr_temperature.attr,
b481de9c 4798 &dev_attr_tx_power.attr,
d08853a3 4799#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b
SO
4800 &dev_attr_debug_level.attr,
4801#endif
b481de9c
ZY
4802 NULL
4803};
4804
bb8c093b 4805static struct attribute_group iwl3945_attribute_group = {
b481de9c 4806 .name = NULL, /* put in device directory */
bb8c093b 4807 .attrs = iwl3945_sysfs_entries,
b481de9c
ZY
4808};
4809
bb8c093b
CH
4810static struct ieee80211_ops iwl3945_hw_ops = {
4811 .tx = iwl3945_mac_tx,
4812 .start = iwl3945_mac_start,
4813 .stop = iwl3945_mac_stop,
4814 .add_interface = iwl3945_mac_add_interface,
4815 .remove_interface = iwl3945_mac_remove_interface,
4816 .config = iwl3945_mac_config,
4817 .config_interface = iwl3945_mac_config_interface,
8ccde88a 4818 .configure_filter = iwl_configure_filter,
bb8c093b 4819 .set_key = iwl3945_mac_set_key,
bb8c093b
CH
4820 .get_tx_stats = iwl3945_mac_get_tx_stats,
4821 .conf_tx = iwl3945_mac_conf_tx,
bb8c093b 4822 .reset_tsf = iwl3945_mac_reset_tsf,
cd56d331 4823 .bss_info_changed = iwl3945_bss_info_changed,
e9dde6f6 4824 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
4825};
4826
e52119c5 4827static int iwl3945_init_drv(struct iwl_priv *priv)
90a30a02
KA
4828{
4829 int ret;
e6148917 4830 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
90a30a02
KA
4831
4832 priv->retry_rate = 1;
4833 priv->ibss_beacon = NULL;
4834
4835 spin_lock_init(&priv->lock);
3dae0c42 4836 spin_lock_init(&priv->power_data.lock);
90a30a02
KA
4837 spin_lock_init(&priv->sta_lock);
4838 spin_lock_init(&priv->hcmd_lock);
4839
4840 INIT_LIST_HEAD(&priv->free_frames);
4841
4842 mutex_init(&priv->mutex);
4843
4844 /* Clear the driver's (not device's) station table */
4845 iwl3945_clear_stations_table(priv);
4846
4847 priv->data_retry_limit = -1;
4848 priv->ieee_channels = NULL;
4849 priv->ieee_rates = NULL;
4850 priv->band = IEEE80211_BAND_2GHZ;
4851
4852 priv->iw_mode = NL80211_IFTYPE_STATION;
4853
4854 iwl_reset_qos(priv);
4855
4856 priv->qos_data.qos_active = 0;
4857 priv->qos_data.qos_cap.val = 0;
4858
4859 priv->rates_mask = IWL_RATES_MASK;
d25aabb0
WT
4860 /* If power management is turned on, default to CAM mode */
4861 priv->power_mode = IWL_POWER_MODE_CAM;
62ea9c5b 4862 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
90a30a02 4863
e6148917
SO
4864 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
4865 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4866 eeprom->version);
4867 ret = -EINVAL;
4868 goto err;
4869 }
4870 ret = iwl_init_channel_map(priv);
90a30a02
KA
4871 if (ret) {
4872 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4873 goto err;
4874 }
4875
e6148917
SO
4876 /* Set up txpower settings in driver for all channels */
4877 if (iwl3945_txpower_set_from_eeprom(priv)) {
4878 ret = -EIO;
4879 goto err_free_channel_map;
4880 }
4881
534166de 4882 ret = iwlcore_init_geos(priv);
90a30a02
KA
4883 if (ret) {
4884 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4885 goto err_free_channel_map;
4886 }
534166de
SO
4887 iwl3945_init_hw_rates(priv, priv->ieee_rates);
4888
2a4ddaab
AK
4889 return 0;
4890
4891err_free_channel_map:
4892 iwl_free_channel_map(priv);
4893err:
4894 return ret;
4895}
4896
4897static int iwl3945_setup_mac(struct iwl_priv *priv)
4898{
4899 int ret;
4900 struct ieee80211_hw *hw = priv->hw;
4901
4902 hw->rate_control_algorithm = "iwl-3945-rs";
4903 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
4904
4905 /* Tell mac80211 our characteristics */
4906 hw->flags = IEEE80211_HW_SIGNAL_DBM |
b1c6019b
MA
4907 IEEE80211_HW_NOISE_DBM |
4908 IEEE80211_HW_SPECTRUM_MGMT;
2a4ddaab
AK
4909
4910 hw->wiphy->interface_modes =
4911 BIT(NL80211_IFTYPE_STATION) |
4912 BIT(NL80211_IFTYPE_ADHOC);
4913
4914 hw->wiphy->custom_regulatory = true;
4915
4916 /* Default value; 4 EDCA QOS priorities */
4917 hw->queues = 4;
4918
4919 hw->conf.beacon_int = 100;
4920
534166de
SO
4921 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4922 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4923 &priv->bands[IEEE80211_BAND_2GHZ];
2a4ddaab 4924
534166de
SO
4925 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4926 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4927 &priv->bands[IEEE80211_BAND_5GHZ];
90a30a02 4928
2a4ddaab
AK
4929 ret = ieee80211_register_hw(priv->hw);
4930 if (ret) {
4931 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
4932 return ret;
4933 }
4934 priv->mac80211_registered = 1;
90a30a02 4935
2a4ddaab 4936 return 0;
90a30a02
KA
4937}
4938
bb8c093b 4939static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
4940{
4941 int err = 0;
4a8a4322 4942 struct iwl_priv *priv;
b481de9c 4943 struct ieee80211_hw *hw;
c0f20d91 4944 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
e6148917 4945 struct iwl3945_eeprom *eeprom;
0359facc 4946 unsigned long flags;
b481de9c 4947
cee53ddb
KA
4948 /***********************
4949 * 1. Allocating HW data
4950 * ********************/
4951
b481de9c
ZY
4952 /* mac80211 allocates memory for this device instance, including
4953 * space for this driver's private structure */
90a30a02 4954 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
b481de9c 4955 if (hw == NULL) {
a3139c59 4956 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
b481de9c
ZY
4957 err = -ENOMEM;
4958 goto out;
4959 }
b481de9c 4960 priv = hw->priv;
90a30a02 4961 SET_IEEE80211_DEV(hw, &pdev->dev);
6440adb5 4962
df878d8f
KA
4963 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
4964 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
15b1687c
WT
4965 IWL_ERR(priv,
4966 "invalid queues_num, should be between %d and %d\n",
4967 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
a3139c59 4968 err = -EINVAL;
c8f16138 4969 goto out_ieee80211_free_hw;
a3139c59
SO
4970 }
4971
90a30a02
KA
4972 /*
4973 * Disabling hardware scan means that mac80211 will perform scans
4974 * "the hard way", rather than using device's scan.
4975 */
df878d8f 4976 if (iwl3945_mod_params.disable_hw_scan) {
e1623446 4977 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
40b8ec0b
SO
4978 iwl3945_hw_ops.hw_scan = NULL;
4979 }
4980
90a30a02 4981
e1623446 4982 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
90a30a02
KA
4983 priv->cfg = cfg;
4984 priv->pci_dev = pdev;
cee53ddb 4985
d08853a3 4986#ifdef CONFIG_IWLWIFI_DEBUG
df878d8f 4987 priv->debug_level = iwl3945_mod_params.debug;
b481de9c
ZY
4988 atomic_set(&priv->restrict_refcnt, 0);
4989#endif
b481de9c 4990
cee53ddb
KA
4991 /***************************
4992 * 2. Initializing PCI bus
4993 * *************************/
b481de9c
ZY
4994 if (pci_enable_device(pdev)) {
4995 err = -ENODEV;
4996 goto out_ieee80211_free_hw;
4997 }
4998
4999 pci_set_master(pdev);
5000
b481de9c
ZY
5001 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
5002 if (!err)
5003 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
5004 if (err) {
978785a3 5005 IWL_WARN(priv, "No suitable DMA available.\n");
b481de9c
ZY
5006 goto out_pci_disable_device;
5007 }
5008
5009 pci_set_drvdata(pdev, priv);
5010 err = pci_request_regions(pdev, DRV_NAME);
5011 if (err)
5012 goto out_pci_disable_device;
6440adb5 5013
cee53ddb
KA
5014 /***********************
5015 * 3. Read REV Register
5016 * ********************/
b481de9c
ZY
5017 priv->hw_base = pci_iomap(pdev, 0, 0);
5018 if (!priv->hw_base) {
5019 err = -ENODEV;
5020 goto out_pci_release_regions;
5021 }
5022
e1623446 5023 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
b481de9c 5024 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 5025 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
b481de9c 5026
cee53ddb
KA
5027 /* We disable the RETRY_TIMEOUT register (0x41) to keep
5028 * PCI Tx retries from interfering with C3 CPU state */
5029 pci_write_config_byte(pdev, 0x41, 0x00);
b481de9c 5030
90a30a02
KA
5031 /* amp init */
5032 err = priv->cfg->ops->lib->apm_ops.init(priv);
cee53ddb 5033 if (err < 0) {
d5df2a16 5034 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
90a30a02 5035 goto out_iounmap;
cee53ddb 5036 }
b481de9c 5037
cee53ddb
KA
5038 /***********************
5039 * 4. Read EEPROM
5040 * ********************/
90a30a02 5041
cee53ddb 5042 /* Read the EEPROM */
e6148917 5043 err = iwl_eeprom_init(priv);
cee53ddb 5044 if (err) {
15b1687c 5045 IWL_ERR(priv, "Unable to init EEPROM\n");
c8f16138 5046 goto out_iounmap;
cee53ddb
KA
5047 }
5048 /* MAC Address location in EEPROM same for 3945/4965 */
e6148917
SO
5049 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
5050 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
e1623446 5051 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
cee53ddb 5052 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 5053
cee53ddb
KA
5054 /***********************
5055 * 5. Setup HW Constants
5056 * ********************/
b481de9c 5057 /* Device-specific setup */
3832ec9d 5058 if (iwl3945_hw_set_hw_params(priv)) {
15b1687c 5059 IWL_ERR(priv, "failed to set hw settings\n");
c8f16138 5060 goto out_eeprom_free;
b481de9c
ZY
5061 }
5062
cee53ddb
KA
5063 /***********************
5064 * 6. Setup priv
5065 * ********************/
cee53ddb 5066
90a30a02 5067 err = iwl3945_init_drv(priv);
b481de9c 5068 if (err) {
90a30a02 5069 IWL_ERR(priv, "initializing driver failed\n");
c8f16138 5070 goto out_unset_hw_params;
b481de9c
ZY
5071 }
5072
978785a3
TW
5073 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
5074 priv->cfg->name);
cee53ddb
KA
5075
5076 /***********************************
5077 * 7. Initialize Module Parameters
5078 * **********************************/
5079
5080 /* Initialize module parameter values here */
5081 /* Disable radio (SW RF KILL) via parameter when loading driver */
df878d8f 5082 if (iwl3945_mod_params.disable) {
cee53ddb 5083 set_bit(STATUS_RF_KILL_SW, &priv->status);
e1623446 5084 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
849e0dce
RC
5085 }
5086
cee53ddb
KA
5087
5088 /***********************
5089 * 8. Setup Services
5090 * ********************/
5091
5092 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 5093 iwl_disable_interrupts(priv);
cee53ddb
KA
5094 spin_unlock_irqrestore(&priv->lock, flags);
5095
2663516d
HS
5096 pci_enable_msi(priv->pci_dev);
5097
f17d08a6 5098 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
2663516d
HS
5099 DRV_NAME, priv);
5100 if (err) {
5101 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
5102 goto out_disable_msi;
5103 }
5104
cee53ddb 5105 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 5106 if (err) {
15b1687c 5107 IWL_ERR(priv, "failed to create sysfs device attributes\n");
90a30a02 5108 goto out_release_irq;
849e0dce 5109 }
849e0dce 5110
8ccde88a
SO
5111 iwl_set_rxon_channel(priv,
5112 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
cee53ddb
KA
5113 iwl3945_setup_deferred_work(priv);
5114 iwl3945_setup_rx_handlers(priv);
5115
cee53ddb 5116 /*********************************
2663516d 5117 * 9. Setup and Register mac80211
cee53ddb
KA
5118 * *******************************/
5119
2a4ddaab 5120 iwl_enable_interrupts(priv);
b481de9c 5121
2a4ddaab
AK
5122 err = iwl3945_setup_mac(priv);
5123 if (err)
5124 goto out_remove_sysfs;
cee53ddb 5125
c0af96a6 5126 err = iwl_rfkill_init(priv);
ebef2008 5127 if (err)
15b1687c 5128 IWL_ERR(priv, "Unable to initialize RFKILL system. "
ebef2008 5129 "Ignoring error: %d\n", err);
2a4ddaab
AK
5130 else
5131 iwl_rfkill_set_hw_state(priv);
ebef2008 5132
2663516d
HS
5133 /* Start monitoring the killswitch */
5134 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
5135 2 * HZ);
5136
b481de9c
ZY
5137 return 0;
5138
cee53ddb 5139 out_remove_sysfs:
c8f16138
RC
5140 destroy_workqueue(priv->workqueue);
5141 priv->workqueue = NULL;
cee53ddb 5142 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 5143 out_release_irq:
2663516d 5144 free_irq(priv->pci_dev->irq, priv);
2663516d
HS
5145 out_disable_msi:
5146 pci_disable_msi(priv->pci_dev);
c8f16138
RC
5147 iwlcore_free_geos(priv);
5148 iwl_free_channel_map(priv);
5149 out_unset_hw_params:
5150 iwl3945_unset_hw_params(priv);
5151 out_eeprom_free:
5152 iwl_eeprom_free(priv);
b481de9c
ZY
5153 out_iounmap:
5154 pci_iounmap(pdev, priv->hw_base);
5155 out_pci_release_regions:
5156 pci_release_regions(pdev);
5157 out_pci_disable_device:
b481de9c 5158 pci_set_drvdata(pdev, NULL);
623d563e 5159 pci_disable_device(pdev);
b481de9c
ZY
5160 out_ieee80211_free_hw:
5161 ieee80211_free_hw(priv->hw);
5162 out:
5163 return err;
5164}
5165
c83dbf68 5166static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
b481de9c 5167{
4a8a4322 5168 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 5169 unsigned long flags;
b481de9c
ZY
5170
5171 if (!priv)
5172 return;
5173
e1623446 5174 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 5175
b481de9c 5176 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 5177
d552bfb6
KA
5178 if (priv->mac80211_registered) {
5179 ieee80211_unregister_hw(priv->hw);
5180 priv->mac80211_registered = 0;
5181 } else {
5182 iwl3945_down(priv);
5183 }
b481de9c 5184
0359facc
MA
5185 /* make sure we flush any pending irq or
5186 * tasklet for the driver
5187 */
5188 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 5189 iwl_disable_interrupts(priv);
0359facc
MA
5190 spin_unlock_irqrestore(&priv->lock, flags);
5191
5192 iwl_synchronize_irq(priv);
5193
bb8c093b 5194 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 5195
c0af96a6 5196 iwl_rfkill_unregister(priv);
2663516d
HS
5197 cancel_delayed_work(&priv->rfkill_poll);
5198
bb8c093b 5199 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
5200
5201 if (priv->rxq.bd)
51af3d3f 5202 iwl_rx_queue_free(priv, &priv->rxq);
bb8c093b 5203 iwl3945_hw_txq_ctx_free(priv);
b481de9c 5204
3832ec9d 5205 iwl3945_unset_hw_params(priv);
bb8c093b 5206 iwl3945_clear_stations_table(priv);
b481de9c 5207
6ef89d0a
MA
5208 /*netif_stop_queue(dev); */
5209 flush_workqueue(priv->workqueue);
5210
bb8c093b 5211 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
b481de9c
ZY
5212 * priv->workqueue... so we can't take down the workqueue
5213 * until now... */
5214 destroy_workqueue(priv->workqueue);
5215 priv->workqueue = NULL;
5216
2663516d
HS
5217 free_irq(pdev->irq, priv);
5218 pci_disable_msi(pdev);
5219
b481de9c
ZY
5220 pci_iounmap(pdev, priv->hw_base);
5221 pci_release_regions(pdev);
5222 pci_disable_device(pdev);
5223 pci_set_drvdata(pdev, NULL);
5224
e6148917 5225 iwl_free_channel_map(priv);
534166de 5226 iwlcore_free_geos(priv);
805cee5b 5227 kfree(priv->scan);
b481de9c
ZY
5228 if (priv->ibss_beacon)
5229 dev_kfree_skb(priv->ibss_beacon);
5230
5231 ieee80211_free_hw(priv->hw);
5232}
5233
5234#ifdef CONFIG_PM
5235
bb8c093b 5236static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 5237{
4a8a4322 5238 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 5239
e655b9f0
ZY
5240 if (priv->is_open) {
5241 set_bit(STATUS_IN_SUSPEND, &priv->status);
5242 iwl3945_mac_stop(priv->hw);
5243 priv->is_open = 1;
5244 }
2663516d
HS
5245 pci_save_state(pdev);
5246 pci_disable_device(pdev);
b481de9c
ZY
5247 pci_set_power_state(pdev, PCI_D3hot);
5248
b481de9c
ZY
5249 return 0;
5250}
5251
bb8c093b 5252static int iwl3945_pci_resume(struct pci_dev *pdev)
b481de9c 5253{
4a8a4322 5254 struct iwl_priv *priv = pci_get_drvdata(pdev);
450154e4 5255 int ret;
b481de9c 5256
b481de9c 5257 pci_set_power_state(pdev, PCI_D0);
450154e4
WT
5258 ret = pci_enable_device(pdev);
5259 if (ret)
5260 return ret;
2663516d 5261 pci_restore_state(pdev);
b481de9c 5262
e655b9f0
ZY
5263 if (priv->is_open)
5264 iwl3945_mac_start(priv->hw);
b481de9c 5265
e655b9f0 5266 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
5267 return 0;
5268}
5269
5270#endif /* CONFIG_PM */
5271
5272/*****************************************************************************
5273 *
5274 * driver and module entry point
5275 *
5276 *****************************************************************************/
5277
bb8c093b 5278static struct pci_driver iwl3945_driver = {
b481de9c 5279 .name = DRV_NAME,
bb8c093b
CH
5280 .id_table = iwl3945_hw_card_ids,
5281 .probe = iwl3945_pci_probe,
5282 .remove = __devexit_p(iwl3945_pci_remove),
b481de9c 5283#ifdef CONFIG_PM
bb8c093b
CH
5284 .suspend = iwl3945_pci_suspend,
5285 .resume = iwl3945_pci_resume,
b481de9c
ZY
5286#endif
5287};
5288
bb8c093b 5289static int __init iwl3945_init(void)
b481de9c
ZY
5290{
5291
5292 int ret;
5293 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
5294 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
5295
5296 ret = iwl3945_rate_control_register();
5297 if (ret) {
a3139c59
SO
5298 printk(KERN_ERR DRV_NAME
5299 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC
5300 return ret;
5301 }
5302
bb8c093b 5303 ret = pci_register_driver(&iwl3945_driver);
b481de9c 5304 if (ret) {
a3139c59 5305 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 5306 goto error_register;
b481de9c 5307 }
b481de9c
ZY
5308
5309 return ret;
897e1cf2 5310
897e1cf2
RC
5311error_register:
5312 iwl3945_rate_control_unregister();
5313 return ret;
b481de9c
ZY
5314}
5315
bb8c093b 5316static void __exit iwl3945_exit(void)
b481de9c 5317{
bb8c093b 5318 pci_unregister_driver(&iwl3945_driver);
897e1cf2 5319 iwl3945_rate_control_unregister();
b481de9c
ZY
5320}
5321
a0987a8d 5322MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
25cb6cad 5323
df878d8f 5324module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
b481de9c 5325MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
df878d8f 5326module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
b481de9c 5327MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9c74d9fb
SO
5328module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
5329MODULE_PARM_DESC(swcrypto,
5330 "using software crypto (default 1 [software])\n");
df878d8f 5331module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
b481de9c 5332MODULE_PARM_DESC(debug, "debug output mask");
df878d8f 5333module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
b481de9c
ZY
5334MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
5335
df878d8f 5336module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
b481de9c
ZY
5337MODULE_PARM_DESC(queues_num, "number of hw queues.");
5338
af48d048
SO
5339module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
5340MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
5341
bb8c093b
CH
5342module_exit(iwl3945_exit);
5343module_init(iwl3945_init);
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