qlge: bugfix: Fix endian issue related to rx buffers.
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
CommitLineData
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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
43#include <net/ieee80211_radiotap.h>
7e272fcf 44#include <net/lib80211.h>
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45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
a3139c59
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49#define DRV_NAME "iwl3945"
50
dbb6654c
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51#include "iwl-fh.h"
52#include "iwl-3945-fh.h"
600c0e11 53#include "iwl-commands.h"
17f841cd 54#include "iwl-sta.h"
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55#include "iwl-3945.h"
56#include "iwl-helpers.h"
5747d47f 57#include "iwl-core.h"
d20b3c65 58#include "iwl-dev.h"
b481de9c 59
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60/*
61 * module name, copyright, version, etc.
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62 */
63
64#define DRV_DESCRIPTION \
65"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
d08853a3 67#ifdef CONFIG_IWLWIFI_DEBUG
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68#define VD "d"
69#else
70#define VD
71#endif
72
c8b0e6e1 73#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
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74#define VS "s"
75#else
76#define VS
77#endif
78
eaa686c3 79#define IWL39_VERSION "1.2.26k" VD VS
01f8162a 80#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
a7b75207 81#define DRV_AUTHOR "<ilw@linux.intel.com>"
eaa686c3 82#define DRV_VERSION IWL39_VERSION
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
a7b75207 87MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
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88MODULE_LICENSE("GPL");
89
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90 /* module parameters */
91struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_MAX_NUM_QUEUES,
9c74d9fb 93 .sw_crypto = 1,
af48d048 94 .restart_fw = 1,
df878d8f
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95 /* the rest are 0 by default */
96};
97
b481de9c 98/*************** STATION TABLE MANAGEMENT ****
9fbab516 99 * mac80211 should be examined to determine if sta_info is duplicating
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100 * the functionality provided here
101 */
102
103/**************************************************************/
01ebd063 104#if 0 /* temporary disable till we add real remove station */
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105/**
106 * iwl3945_remove_station - Remove driver's knowledge of station.
107 *
108 * NOTE: This does not remove station from device's station table.
109 */
4a8a4322 110static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
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111{
112 int index = IWL_INVALID_STATION;
113 int i;
114 unsigned long flags;
115
116 spin_lock_irqsave(&priv->sta_lock, flags);
117
118 if (is_ap)
119 index = IWL_AP_ID;
120 else if (is_broadcast_ether_addr(addr))
3832ec9d 121 index = priv->hw_params.bcast_sta_id;
b481de9c 122 else
3832ec9d 123 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
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124 if (priv->stations_39[i].used &&
125 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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126 addr)) {
127 index = i;
128 break;
129 }
130
131 if (unlikely(index == IWL_INVALID_STATION))
132 goto out;
133
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134 if (priv->stations_39[index].used) {
135 priv->stations_39[index].used = 0;
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136 priv->num_stations--;
137 }
138
139 BUG_ON(priv->num_stations < 0);
140
141out:
142 spin_unlock_irqrestore(&priv->sta_lock, flags);
143 return 0;
144}
556f8db7 145#endif
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146
147/**
148 * iwl3945_clear_stations_table - Clear the driver's station table
149 *
150 * NOTE: This does not clear or otherwise alter the device's station table.
151 */
4a8a4322 152static void iwl3945_clear_stations_table(struct iwl_priv *priv)
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153{
154 unsigned long flags;
155
156 spin_lock_irqsave(&priv->sta_lock, flags);
157
158 priv->num_stations = 0;
f2c7e521 159 memset(priv->stations_39, 0, sizeof(priv->stations_39));
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160
161 spin_unlock_irqrestore(&priv->sta_lock, flags);
162}
163
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164/**
165 * iwl3945_add_station - Add station to station tables in driver and device
166 */
4a8a4322 167u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
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168{
169 int i;
170 int index = IWL_INVALID_STATION;
bb8c093b 171 struct iwl3945_station_entry *station;
b481de9c 172 unsigned long flags_spin;
c14c521e 173 u8 rate;
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174
175 spin_lock_irqsave(&priv->sta_lock, flags_spin);
176 if (is_ap)
177 index = IWL_AP_ID;
178 else if (is_broadcast_ether_addr(addr))
3832ec9d 179 index = priv->hw_params.bcast_sta_id;
b481de9c 180 else
3832ec9d 181 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
f2c7e521 182 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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183 addr)) {
184 index = i;
185 break;
186 }
187
f2c7e521 188 if (!priv->stations_39[i].used &&
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189 index == IWL_INVALID_STATION)
190 index = i;
191 }
192
01ebd063 193 /* These two conditions has the same outcome but keep them separate
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194 since they have different meaning */
195 if (unlikely(index == IWL_INVALID_STATION)) {
196 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
197 return index;
198 }
199
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200 if (priv->stations_39[index].used &&
201 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
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202 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
203 return index;
204 }
205
e1623446 206 IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
f2c7e521 207 station = &priv->stations_39[index];
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208 station->used = 1;
209 priv->num_stations++;
210
6440adb5 211 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 212 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
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213 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
214 station->sta.mode = 0;
215 station->sta.sta.sta_id = index;
216 station->sta.station_flags = 0;
217
8318d78a 218 if (priv->band == IEEE80211_BAND_5GHZ)
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219 rate = IWL_RATE_6M_PLCP;
220 else
221 rate = IWL_RATE_1M_PLCP;
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222
223 /* Turn on both antennas for the station... */
224 station->sta.rate_n_flags =
bb8c093b 225 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
c14c521e 226
b481de9c 227 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
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228
229 /* Add station to device's station table */
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230 iwl_send_add_sta(priv,
231 (struct iwl_addsta_cmd *)&station->sta, flags);
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232 return index;
233
234}
235
4a8a4322 236static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
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237{
238 int rc = 0;
3d24a9f7 239 struct iwl_rx_packet *res = NULL;
bb8c093b 240 struct iwl3945_rxon_assoc_cmd rxon_assoc;
c2d79b48 241 struct iwl_host_cmd cmd = {
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242 .id = REPLY_RXON_ASSOC,
243 .len = sizeof(rxon_assoc),
244 .meta.flags = CMD_WANT_SKB,
245 .data = &rxon_assoc,
246 };
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247 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
248 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
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249
250 if ((rxon1->flags == rxon2->flags) &&
251 (rxon1->filter_flags == rxon2->filter_flags) &&
252 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
253 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
e1623446 254 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
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255 return 0;
256 }
257
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258 rxon_assoc.flags = priv->staging_rxon.flags;
259 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
260 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
261 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
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262 rxon_assoc.reserved = 0;
263
518099a8 264 rc = iwl_send_cmd_sync(priv, &cmd);
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265 if (rc)
266 return rc;
267
3d24a9f7 268 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 269 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 270 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
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271 rc = -EIO;
272 }
273
274 priv->alloc_rxb_skb--;
275 dev_kfree_skb_any(cmd.meta.u.skb);
276
277 return rc;
278}
279
7e4bca5e
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280/**
281 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
282 * @priv: eeprom and antenna fields are used to determine antenna flags
283 *
284 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
285 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
286 *
287 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
288 * IWL_ANTENNA_MAIN - Force MAIN antenna
289 * IWL_ANTENNA_AUX - Force AUX antenna
290 */
291__le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
292{
293 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
294
295 switch (iwl3945_mod_params.antenna) {
296 case IWL_ANTENNA_DIVERSITY:
297 return 0;
298
299 case IWL_ANTENNA_MAIN:
300 if (eeprom->antenna_switch_type)
301 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
302 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
303
304 case IWL_ANTENNA_AUX:
305 if (eeprom->antenna_switch_type)
306 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
307 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
308 }
309
310 /* bad antenna selector value */
311 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
312 iwl3945_mod_params.antenna);
313
314 return 0; /* "diversity" is default if error */
315}
316
b481de9c 317/**
bb8c093b 318 * iwl3945_commit_rxon - commit staging_rxon to hardware
b481de9c 319 *
01ebd063 320 * The RXON command in staging_rxon is committed to the hardware and
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321 * the active_rxon structure is updated with the new data. This
322 * function correctly transitions out of the RXON_ASSOC_MSK state if
323 * a HW tune is required based on the RXON structure changes.
324 */
4a8a4322 325static int iwl3945_commit_rxon(struct iwl_priv *priv)
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326{
327 /* cast away the const for active_rxon in this function */
8ccde88a
SO
328 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
329 struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
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330 int rc = 0;
331
775a6e27 332 if (!iwl_is_alive(priv))
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333 return -1;
334
335 /* always get timestamp with Rx frame */
8ccde88a 336 staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
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337
338 /* select antenna */
8ccde88a 339 staging_rxon->flags &=
b481de9c 340 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
8ccde88a 341 staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
b481de9c 342
8ccde88a 343 rc = iwl_check_rxon_cmd(priv);
b481de9c 344 if (rc) {
15b1687c 345 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
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346 return -EINVAL;
347 }
348
349 /* If we don't need to send a full RXON, we can use
bb8c093b 350 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 351 * and other flags for the current radio configuration. */
8ccde88a 352 if (!iwl_full_rxon_required(priv)) {
bb8c093b 353 rc = iwl3945_send_rxon_assoc(priv);
b481de9c 354 if (rc) {
15b1687c 355 IWL_ERR(priv, "Error setting RXON_ASSOC "
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356 "configuration (%d).\n", rc);
357 return rc;
358 }
359
8ccde88a 360 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
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361
362 return 0;
363 }
364
365 /* If we are currently associated and the new config requires
366 * an RXON_ASSOC and the new config wants the associated mask enabled,
367 * we must clear the associated from the active configuration
368 * before we apply the new config */
8ccde88a
SO
369 if (iwl_is_associated(priv) &&
370 (staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK)) {
e1623446 371 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
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372 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
373
8ccde88a
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374 /*
375 * reserved4 and 5 could have been filled by the iwlcore code.
376 * Let's clear them before pushing to the 3945.
377 */
378 active_rxon->reserved4 = 0;
379 active_rxon->reserved5 = 0;
518099a8 380 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 381 sizeof(struct iwl3945_rxon_cmd),
8ccde88a 382 &priv->active_rxon);
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383
384 /* If the mask clearing failed then we set
385 * active_rxon back to what it was previously */
386 if (rc) {
387 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
15b1687c 388 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
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389 "configuration (%d).\n", rc);
390 return rc;
391 }
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392 }
393
e1623446 394 IWL_DEBUG_INFO(priv, "Sending RXON\n"
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395 "* with%s RXON_FILTER_ASSOC_MSK\n"
396 "* channel = %d\n"
e174961c 397 "* bssid = %pM\n",
8ccde88a 398 ((priv->staging_rxon.filter_flags &
b481de9c 399 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
8ccde88a
SO
400 le16_to_cpu(staging_rxon->channel),
401 staging_rxon->bssid_addr);
402
403 /*
404 * reserved4 and 5 could have been filled by the iwlcore code.
405 * Let's clear them before pushing to the 3945.
406 */
407 staging_rxon->reserved4 = 0;
408 staging_rxon->reserved5 = 0;
b481de9c 409
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410 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
411
b481de9c 412 /* Apply the new configuration */
518099a8 413 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
8ccde88a
SO
414 sizeof(struct iwl3945_rxon_cmd),
415 staging_rxon);
b481de9c 416 if (rc) {
15b1687c 417 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
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418 return rc;
419 }
420
8ccde88a 421 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
b481de9c 422
bb8c093b 423 iwl3945_clear_stations_table(priv);
556f8db7 424
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425 /* If we issue a new RXON command which required a tune then we must
426 * send a new TXPOWER command or we won't be able to Tx any frames */
75bcfae9 427 rc = priv->cfg->ops->lib->send_tx_power(priv);
b481de9c 428 if (rc) {
15b1687c 429 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
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430 return rc;
431 }
432
433 /* Add the broadcast address so we can send broadcast frames */
b5323d36 434 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
b481de9c 435 IWL_INVALID_STATION) {
15b1687c 436 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
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437 return -EIO;
438 }
439
440 /* If we have set the ASSOC_MSK and we are in BSS mode then
441 * add the IWL_AP_ID to the station rate table */
8ccde88a 442 if (iwl_is_associated(priv) &&
05c914fe 443 (priv->iw_mode == NL80211_IFTYPE_STATION))
8ccde88a
SO
444 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr,
445 1, 0)
b481de9c 446 == IWL_INVALID_STATION) {
15b1687c 447 IWL_ERR(priv, "Error adding AP address for transmit\n");
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448 return -EIO;
449 }
450
8318d78a 451 /* Init the hardware's rate fallback order based on the band */
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452 rc = iwl3945_init_hw_rate_table(priv);
453 if (rc) {
15b1687c 454 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
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455 return -EIO;
456 }
457
458 return 0;
459}
460
6e21f15c 461static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
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462 struct ieee80211_key_conf *keyconf,
463 u8 sta_id)
464{
465 unsigned long flags;
466 __le16 key_flags = 0;
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AK
467 int ret;
468
469 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
470 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
471
472 if (sta_id == priv->hw_params.bcast_sta_id)
473 key_flags |= STA_KEY_MULTICAST_MSK;
474
475 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
476 keyconf->hw_key_idx = keyconf->keyidx;
477 key_flags &= ~STA_KEY_FLG_INVALID;
b481de9c 478
b481de9c 479 spin_lock_irqsave(&priv->sta_lock, flags);
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480 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
481 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
482 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
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483 keyconf->keylen);
484
f2c7e521 485 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
b481de9c 486 keyconf->keylen);
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487
488 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
489 == STA_KEY_FLG_NO_ENC)
490 priv->stations[sta_id].sta.key.key_offset =
491 iwl_get_free_ucode_key_index(priv);
492 /* else, we are overriding an existing key => no need to allocated room
493 * in uCode. */
494
495 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
496 "no space for a new key");
497
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498 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
499 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
500 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c 501
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502 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
503
504 ret = iwl_send_add_sta(priv,
505 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC);
506
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507 spin_unlock_irqrestore(&priv->sta_lock, flags);
508
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509 return ret;
510}
511
512static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
513 struct ieee80211_key_conf *keyconf,
514 u8 sta_id)
515{
516 return -EOPNOTSUPP;
517}
518
519static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
520 struct ieee80211_key_conf *keyconf,
521 u8 sta_id)
522{
523 return -EOPNOTSUPP;
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524}
525
4a8a4322 526static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
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527{
528 unsigned long flags;
529
530 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
531 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
532 memset(&priv->stations_39[sta_id].sta.key, 0,
4c897253 533 sizeof(struct iwl4965_keyinfo));
f2c7e521
AK
534 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
535 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
536 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c
ZY
537 spin_unlock_irqrestore(&priv->sta_lock, flags);
538
e1623446 539 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
17f841cd
SO
540 iwl_send_add_sta(priv,
541 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
b481de9c
ZY
542 return 0;
543}
544
6e21f15c
AK
545int iwl3945_set_dynamic_key(struct iwl_priv *priv,
546 struct ieee80211_key_conf *keyconf, u8 sta_id)
547{
548 int ret = 0;
549
550 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
551
552 switch (keyconf->alg) {
553 case ALG_CCMP:
554 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
555 break;
556 case ALG_TKIP:
557 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
558 break;
559 case ALG_WEP:
560 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
561 break;
562 default:
563 IWL_ERR(priv,"Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
564 ret = -EINVAL;
565 }
566
567 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
568 keyconf->alg, keyconf->keylen, keyconf->keyidx,
569 sta_id, ret);
570
571 return ret;
572}
573
574static int iwl3945_remove_static_key(struct iwl_priv *priv)
575{
576 int ret = -EOPNOTSUPP;
577
578 return ret;
579}
580
581static int iwl3945_set_static_key(struct iwl_priv *priv,
582 struct ieee80211_key_conf *key)
583{
584 if (key->alg == ALG_WEP)
585 return -EOPNOTSUPP;
586
587 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
588 return -EINVAL;
589}
590
4a8a4322 591static void iwl3945_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY
592{
593 struct list_head *element;
594
e1623446 595 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
b481de9c
ZY
596 priv->frames_count);
597
598 while (!list_empty(&priv->free_frames)) {
599 element = priv->free_frames.next;
600 list_del(element);
bb8c093b 601 kfree(list_entry(element, struct iwl3945_frame, list));
b481de9c
ZY
602 priv->frames_count--;
603 }
604
605 if (priv->frames_count) {
39aadf8c 606 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
ZY
607 priv->frames_count);
608 priv->frames_count = 0;
609 }
610}
611
4a8a4322 612static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
b481de9c 613{
bb8c093b 614 struct iwl3945_frame *frame;
b481de9c
ZY
615 struct list_head *element;
616 if (list_empty(&priv->free_frames)) {
617 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
618 if (!frame) {
15b1687c 619 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
ZY
620 return NULL;
621 }
622
623 priv->frames_count++;
624 return frame;
625 }
626
627 element = priv->free_frames.next;
628 list_del(element);
bb8c093b 629 return list_entry(element, struct iwl3945_frame, list);
b481de9c
ZY
630}
631
4a8a4322 632static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
b481de9c
ZY
633{
634 memset(frame, 0, sizeof(*frame));
635 list_add(&frame->list, &priv->free_frames);
636}
637
4a8a4322 638unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
b481de9c 639 struct ieee80211_hdr *hdr,
73ec1cc2 640 int left)
b481de9c
ZY
641{
642
8ccde88a 643 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
644 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
645 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY
646 return 0;
647
648 if (priv->ibss_beacon->len > left)
649 return 0;
650
651 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
652
653 return priv->ibss_beacon->len;
654}
655
4a8a4322 656static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 657{
bb8c093b 658 struct iwl3945_frame *frame;
b481de9c
ZY
659 unsigned int frame_size;
660 int rc;
661 u8 rate;
662
bb8c093b 663 frame = iwl3945_get_free_frame(priv);
b481de9c
ZY
664
665 if (!frame) {
15b1687c 666 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
ZY
667 "command.\n");
668 return -ENOMEM;
669 }
670
8ccde88a 671 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 672
bb8c093b 673 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 674
518099a8 675 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
676 &frame->u.cmd[0]);
677
bb8c093b 678 iwl3945_free_frame(priv, frame);
b481de9c
ZY
679
680 return rc;
681}
682
4a8a4322 683static void iwl3945_unset_hw_params(struct iwl_priv *priv)
b481de9c 684{
3832ec9d 685 if (priv->shared_virt)
b481de9c 686 pci_free_consistent(priv->pci_dev,
bb8c093b 687 sizeof(struct iwl3945_shared),
3832ec9d
AK
688 priv->shared_virt,
689 priv->shared_phys);
b481de9c
ZY
690}
691
b481de9c 692#define MAX_UCODE_BEACON_INTERVAL 1024
c1b4aa3f 693#define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
b481de9c 694
bb8c093b 695static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
696{
697 u16 new_val = 0;
698 u16 beacon_factor = 0;
699
700 beacon_factor =
701 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
702 / MAX_UCODE_BEACON_INTERVAL;
703 new_val = beacon_val / beacon_factor;
704
705 return cpu_to_le16(new_val);
706}
707
4a8a4322 708static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
709{
710 u64 interval_tm_unit;
711 u64 tsf, result;
712 unsigned long flags;
713 struct ieee80211_conf *conf = NULL;
714 u16 beacon_int = 0;
715
716 conf = ieee80211_get_hw_conf(priv->hw);
717
718 spin_lock_irqsave(&priv->lock, flags);
28afaf91 719 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b481de9c
ZY
720 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
721
28afaf91 722 tsf = priv->timestamp;
b481de9c
ZY
723
724 beacon_int = priv->beacon_int;
725 spin_unlock_irqrestore(&priv->lock, flags);
726
05c914fe 727 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
b481de9c
ZY
728 if (beacon_int == 0) {
729 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
730 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
731 } else {
732 priv->rxon_timing.beacon_interval =
733 cpu_to_le16(beacon_int);
734 priv->rxon_timing.beacon_interval =
bb8c093b 735 iwl3945_adjust_beacon_interval(
b481de9c
ZY
736 le16_to_cpu(priv->rxon_timing.beacon_interval));
737 }
738
739 priv->rxon_timing.atim_window = 0;
740 } else {
741 priv->rxon_timing.beacon_interval =
bb8c093b 742 iwl3945_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
743 /* TODO: we need to get atim_window from upper stack
744 * for now we set to 0 */
745 priv->rxon_timing.atim_window = 0;
746 }
747
748 interval_tm_unit =
749 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
750 result = do_div(tsf, interval_tm_unit);
751 priv->rxon_timing.beacon_init_val =
752 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
753
e1623446
TW
754 IWL_DEBUG_ASSOC(priv,
755 "beacon interval %d beacon timer %d beacon tim %d\n",
b481de9c
ZY
756 le16_to_cpu(priv->rxon_timing.beacon_interval),
757 le32_to_cpu(priv->rxon_timing.beacon_init_val),
758 le16_to_cpu(priv->rxon_timing.atim_window));
759}
760
4a8a4322 761static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
b481de9c 762{
05c914fe 763 if (mode == NL80211_IFTYPE_ADHOC) {
d20b3c65 764 const struct iwl_channel_info *ch_info;
b481de9c 765
e6148917 766 ch_info = iwl_get_channel_info(priv,
8318d78a 767 priv->band,
8ccde88a 768 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
769
770 if (!ch_info || !is_channel_ibss(ch_info)) {
15b1687c 771 IWL_ERR(priv, "channel %d not IBSS channel\n",
8ccde88a 772 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
773 return -EINVAL;
774 }
775 }
776
8ccde88a 777 iwl_connection_init_rx_config(priv, mode);
b481de9c 778
bb8c093b 779 iwl3945_clear_stations_table(priv);
b481de9c 780
a96a27f9 781 /* don't commit rxon if rf-kill is on*/
775a6e27 782 if (!iwl_is_ready_rf(priv))
fde3571f
MA
783 return -EAGAIN;
784
785 cancel_delayed_work(&priv->scan_check);
af0053d6 786 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 787 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
e1623446 788 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
fde3571f
MA
789 return -EAGAIN;
790 }
791
bb8c093b 792 iwl3945_commit_rxon(priv);
b481de9c
ZY
793
794 return 0;
795}
796
4a8a4322 797static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
e039fa4a 798 struct ieee80211_tx_info *info,
c2d79b48 799 struct iwl_cmd *cmd,
b481de9c 800 struct sk_buff *skb_frag,
6e21f15c 801 int sta_id)
b481de9c 802{
e52119c5 803 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
1c014420 804 struct iwl3945_hw_key *keyinfo =
6e21f15c 805 &priv->stations_39[sta_id].keyinfo;
b481de9c
ZY
806
807 switch (keyinfo->alg) {
808 case ALG_CCMP:
e52119c5
WT
809 tx->sec_ctl = TX_CMD_SEC_CCM;
810 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
e1623446 811 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
b481de9c
ZY
812 break;
813
814 case ALG_TKIP:
b481de9c
ZY
815 break;
816
817 case ALG_WEP:
e52119c5 818 tx->sec_ctl = TX_CMD_SEC_WEP |
e039fa4a 819 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
b481de9c
ZY
820
821 if (keyinfo->keylen == 13)
e52119c5 822 tx->sec_ctl |= TX_CMD_SEC_KEY128;
b481de9c 823
e52119c5 824 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
b481de9c 825
e1623446 826 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
e039fa4a 827 "with key %d\n", info->control.hw_key->hw_key_idx);
b481de9c
ZY
828 break;
829
b481de9c 830 default:
978785a3 831 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
b481de9c
ZY
832 break;
833 }
834}
835
836/*
837 * handle build REPLY_TX command notification.
838 */
4a8a4322 839static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
c2d79b48 840 struct iwl_cmd *cmd,
e039fa4a 841 struct ieee80211_tx_info *info,
e52119c5 842 struct ieee80211_hdr *hdr, u8 std_id)
b481de9c 843{
e52119c5
WT
844 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
845 __le32 tx_flags = tx->tx_flags;
fd7c8a40 846 __le16 fc = hdr->frame_control;
e6a9854b 847 u8 rc_flags = info->control.rates[0].flags;
b481de9c 848
e52119c5 849 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
e039fa4a 850 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
b481de9c 851 tx_flags |= TX_CMD_FLG_ACK_MSK;
fd7c8a40 852 if (ieee80211_is_mgmt(fc))
b481de9c 853 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
fd7c8a40 854 if (ieee80211_is_probe_resp(fc) &&
b481de9c
ZY
855 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
856 tx_flags |= TX_CMD_FLG_TSF_MSK;
857 } else {
858 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
859 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
860 }
861
e52119c5 862 tx->sta_id = std_id;
8b7b1e05 863 if (ieee80211_has_morefrags(fc))
b481de9c
ZY
864 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
865
fd7c8a40
HH
866 if (ieee80211_is_data_qos(fc)) {
867 u8 *qc = ieee80211_get_qos_ctl(hdr);
e52119c5 868 tx->tid_tspec = qc[0] & 0xf;
b481de9c 869 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 870 } else {
b481de9c 871 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 872 }
b481de9c 873
e6a9854b 874 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
b481de9c
ZY
875 tx_flags |= TX_CMD_FLG_RTS_MSK;
876 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
e6a9854b 877 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
b481de9c
ZY
878 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
879 tx_flags |= TX_CMD_FLG_CTS_MSK;
880 }
881
882 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
883 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
884
885 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
fd7c8a40
HH
886 if (ieee80211_is_mgmt(fc)) {
887 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
e52119c5 888 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 889 else
e52119c5 890 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 891 } else {
e52119c5 892 tx->timeout.pm_frame_timeout = 0;
ab53d8af
MA
893#ifdef CONFIG_IWL3945_LEDS
894 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
895#endif
896 }
b481de9c 897
e52119c5
WT
898 tx->driver_txop = 0;
899 tx->tx_flags = tx_flags;
900 tx->next_frame_len = 0;
b481de9c
ZY
901}
902
6440adb5
CB
903/**
904 * iwl3945_get_sta_id - Find station's index within station table
905 */
4a8a4322 906static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
b481de9c
ZY
907{
908 int sta_id;
909 u16 fc = le16_to_cpu(hdr->frame_control);
910
6440adb5 911 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY
912 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
913 is_multicast_ether_addr(hdr->addr1))
3832ec9d 914 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
915
916 switch (priv->iw_mode) {
917
6440adb5
CB
918 /* If we are a client station in a BSS network, use the special
919 * AP station entry (that's the only station we communicate with) */
05c914fe 920 case NL80211_IFTYPE_STATION:
b481de9c
ZY
921 return IWL_AP_ID;
922
923 /* If we are an AP, then find the station, or use BCAST */
05c914fe 924 case NL80211_IFTYPE_AP:
bb8c093b 925 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
926 if (sta_id != IWL_INVALID_STATION)
927 return sta_id;
3832ec9d 928 return priv->hw_params.bcast_sta_id;
b481de9c 929
6440adb5
CB
930 /* If this frame is going out to an IBSS network, find the station,
931 * or create a new station table entry */
05c914fe 932 case NL80211_IFTYPE_ADHOC: {
6440adb5 933 /* Create new station table entry */
bb8c093b 934 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
935 if (sta_id != IWL_INVALID_STATION)
936 return sta_id;
937
bb8c093b 938 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
b481de9c
ZY
939
940 if (sta_id != IWL_INVALID_STATION)
941 return sta_id;
942
e1623446 943 IWL_DEBUG_DROP(priv, "Station %pM not in station map. "
b481de9c 944 "Defaulting to broadcast...\n",
e174961c 945 hdr->addr1);
40b8ec0b 946 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
3832ec9d 947 return priv->hw_params.bcast_sta_id;
0795af57 948 }
914233d6
SG
949 /* If we are in monitor mode, use BCAST. This is required for
950 * packet injection. */
05c914fe 951 case NL80211_IFTYPE_MONITOR:
3832ec9d 952 return priv->hw_params.bcast_sta_id;
914233d6 953
b481de9c 954 default:
39aadf8c
WT
955 IWL_WARN(priv, "Unknown mode of operation: %d\n",
956 priv->iw_mode);
3832ec9d 957 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
958 }
959}
960
961/*
962 * start REPLY_TX command process
963 */
4a8a4322 964static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
b481de9c
ZY
965{
966 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
e039fa4a 967 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e52119c5 968 struct iwl3945_tx_cmd *tx;
188cf6c7 969 struct iwl_tx_queue *txq = NULL;
d20b3c65 970 struct iwl_queue *q = NULL;
e52119c5 971 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
972 dma_addr_t phys_addr;
973 dma_addr_t txcmd_phys;
e52119c5 974 int txq_id = skb_get_queue_mapping(skb);
54dbb525
TW
975 u16 len, idx, len_org, hdr_len;
976 u8 id;
977 u8 unicast;
b481de9c 978 u8 sta_id;
54dbb525 979 u8 tid = 0;
b481de9c 980 u16 seq_number = 0;
fd7c8a40 981 __le16 fc;
b481de9c 982 u8 wait_write_ptr = 0;
54dbb525 983 u8 *qc = NULL;
b481de9c
ZY
984 unsigned long flags;
985 int rc;
986
987 spin_lock_irqsave(&priv->lock, flags);
775a6e27 988 if (iwl_is_rfkill(priv)) {
e1623446 989 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
b481de9c
ZY
990 goto drop_unlock;
991 }
992
e039fa4a 993 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
15b1687c 994 IWL_ERR(priv, "ERROR: No TX rate available.\n");
b481de9c
ZY
995 goto drop_unlock;
996 }
997
998 unicast = !is_multicast_ether_addr(hdr->addr1);
999 id = 0;
1000
fd7c8a40 1001 fc = hdr->frame_control;
b481de9c 1002
d08853a3 1003#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c 1004 if (ieee80211_is_auth(fc))
e1623446 1005 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
fd7c8a40 1006 else if (ieee80211_is_assoc_req(fc))
e1623446 1007 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
fd7c8a40 1008 else if (ieee80211_is_reassoc_req(fc))
e1623446 1009 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
b481de9c
ZY
1010#endif
1011
7878a5a4 1012 /* drop all data frame if we are not associated */
914233d6 1013 if (ieee80211_is_data(fc) &&
05c914fe 1014 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
8ccde88a 1015 (!iwl_is_associated(priv) ||
05c914fe 1016 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
e1623446 1017 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
b481de9c
ZY
1018 goto drop_unlock;
1019 }
1020
1021 spin_unlock_irqrestore(&priv->lock, flags);
1022
7294ec95 1023 hdr_len = ieee80211_hdrlen(fc);
6440adb5
CB
1024
1025 /* Find (or create) index into station table for destination station */
bb8c093b 1026 sta_id = iwl3945_get_sta_id(priv, hdr);
b481de9c 1027 if (sta_id == IWL_INVALID_STATION) {
e1623446 1028 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
e174961c 1029 hdr->addr1);
b481de9c
ZY
1030 goto drop;
1031 }
1032
e1623446 1033 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
b481de9c 1034
fd7c8a40
HH
1035 if (ieee80211_is_data_qos(fc)) {
1036 qc = ieee80211_get_qos_ctl(hdr);
7294ec95 1037 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
f2c7e521 1038 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
b481de9c
ZY
1039 IEEE80211_SCTL_SEQ;
1040 hdr->seq_ctrl = cpu_to_le16(seq_number) |
1041 (hdr->seq_ctrl &
c1b4aa3f 1042 cpu_to_le16(IEEE80211_SCTL_FRAG));
b481de9c
ZY
1043 seq_number += 0x10;
1044 }
6440adb5
CB
1045
1046 /* Descriptor for chosen Tx queue */
188cf6c7 1047 txq = &priv->txq[txq_id];
b481de9c
ZY
1048 q = &txq->q;
1049
1050 spin_lock_irqsave(&priv->lock, flags);
1051
fc4b6853 1052 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 1053
6440adb5 1054 /* Set up driver data for this TFD */
dbb6654c 1055 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
fc4b6853 1056 txq->txb[q->write_ptr].skb[0] = skb;
6440adb5
CB
1057
1058 /* Init first empty entry in queue's array of Tx/cmd buffers */
188cf6c7 1059 out_cmd = txq->cmd[idx];
e52119c5 1060 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
b481de9c 1061 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
e52119c5 1062 memset(tx, 0, sizeof(*tx));
6440adb5
CB
1063
1064 /*
1065 * Set up the Tx-command (not MAC!) header.
1066 * Store the chosen Tx queue and TFD index within the sequence field;
1067 * after Tx, uCode's Tx response will return this value so driver can
1068 * locate the frame within the tx queue and do post-tx processing.
1069 */
b481de9c
ZY
1070 out_cmd->hdr.cmd = REPLY_TX;
1071 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 1072 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB
1073
1074 /* Copy MAC header from skb into command buffer */
e52119c5 1075 memcpy(tx->hdr, hdr, hdr_len);
b481de9c 1076
6440adb5
CB
1077 /*
1078 * Use the first empty entry in this queue's command buffer array
1079 * to contain the Tx command and MAC header concatenated together
1080 * (payload data will be in another buffer).
1081 * Size of this varies, due to varying MAC header length.
1082 * If end is not dword aligned, we'll have 2 extra bytes at the end
1083 * of the MAC header (device reads on dword boundaries).
1084 * We'll tell device about this padding later.
1085 */
3832ec9d 1086 len = sizeof(struct iwl3945_tx_cmd) +
4c897253 1087 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
1088
1089 len_org = len;
1090 len = (len + 3) & ~3;
1091
1092 if (len_org != len)
1093 len_org = 1;
1094 else
1095 len_org = 0;
1096
6440adb5
CB
1097 /* Physical address of this Tx command's header (not MAC header!),
1098 * within command buffer array. */
188cf6c7
SO
1099 txcmd_phys = pci_map_single(priv->pci_dev,
1100 out_cmd, sizeof(struct iwl_cmd),
1101 PCI_DMA_TODEVICE);
1102 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
1103 pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
1104 /* Add buffer containing Tx command and MAC(!) header to TFD's
1105 * first entry */
1106 txcmd_phys += offsetof(struct iwl_cmd, hdr);
b481de9c 1107
6440adb5
CB
1108 /* Add buffer containing Tx command and MAC(!) header to TFD's
1109 * first entry */
7aaa1d79
SO
1110 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1111 txcmd_phys, len, 1, 0);
b481de9c 1112
d0f09804 1113 if (info->control.hw_key)
6e21f15c 1114 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
b481de9c 1115
6440adb5
CB
1116 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1117 * if any (802.11 null frames have no payload). */
b481de9c
ZY
1118 len = skb->len - hdr_len;
1119 if (len) {
1120 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
1121 len, PCI_DMA_TODEVICE);
7aaa1d79
SO
1122 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1123 phys_addr, len,
1124 0, U32_PAD(len));
b481de9c
ZY
1125 }
1126
6440adb5 1127 /* Total # bytes to be transmitted */
b481de9c 1128 len = (u16)skb->len;
e52119c5 1129 tx->len = cpu_to_le16(len);
b481de9c
ZY
1130
1131 /* TODO need this for burst mode later on */
e52119c5 1132 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
b481de9c
ZY
1133
1134 /* set is_hcca to 0; it probably will never be implemented */
e039fa4a 1135 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
b481de9c 1136
e52119c5
WT
1137 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
1138 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
b481de9c 1139
8b7b1e05 1140 if (!ieee80211_has_morefrags(hdr->frame_control)) {
b481de9c 1141 txq->need_update = 1;
3ac7f146 1142 if (qc)
f2c7e521 1143 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
b481de9c
ZY
1144 } else {
1145 wait_write_ptr = 1;
1146 txq->need_update = 0;
1147 }
1148
e52119c5 1149 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
b481de9c 1150
e52119c5 1151 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
7294ec95 1152 ieee80211_hdrlen(fc));
b481de9c 1153
6440adb5 1154 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 1155 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
4f3602c8 1156 rc = iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
1157 spin_unlock_irqrestore(&priv->lock, flags);
1158
1159 if (rc)
1160 return rc;
1161
d20b3c65 1162 if ((iwl_queue_space(q) < q->high_mark)
b481de9c
ZY
1163 && priv->mac80211_registered) {
1164 if (wait_write_ptr) {
1165 spin_lock_irqsave(&priv->lock, flags);
1166 txq->need_update = 1;
4f3602c8 1167 iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
1168 spin_unlock_irqrestore(&priv->lock, flags);
1169 }
1170
e2530083 1171 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
b481de9c
ZY
1172 }
1173
1174 return 0;
1175
1176drop_unlock:
1177 spin_unlock_irqrestore(&priv->lock, flags);
1178drop:
1179 return -1;
1180}
1181
c8b0e6e1 1182#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
1183
1184#include "iwl-spectrum.h"
1185
1186#define BEACON_TIME_MASK_LOW 0x00FFFFFF
1187#define BEACON_TIME_MASK_HIGH 0xFF000000
1188#define TIME_UNIT 1024
1189
1190/*
1191 * extended beacon time format
1192 * time in usec will be changed into a 32-bit value in 8:24 format
1193 * the high 1 byte is the beacon counts
1194 * the lower 3 bytes is the time in usec within one beacon interval
1195 */
1196
bb8c093b 1197static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
1198{
1199 u32 quot;
1200 u32 rem;
1201 u32 interval = beacon_interval * 1024;
1202
1203 if (!interval || !usec)
1204 return 0;
1205
1206 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
1207 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
1208
1209 return (quot << 24) + rem;
1210}
1211
1212/* base is usually what we get from ucode with each received frame,
1213 * the same as HW timer counter counting down
1214 */
1215
bb8c093b 1216static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
1217{
1218 u32 base_low = base & BEACON_TIME_MASK_LOW;
1219 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
1220 u32 interval = beacon_interval * TIME_UNIT;
1221 u32 res = (base & BEACON_TIME_MASK_HIGH) +
1222 (addon & BEACON_TIME_MASK_HIGH);
1223
1224 if (base_low > addon_low)
1225 res += base_low - addon_low;
1226 else if (base_low < addon_low) {
1227 res += interval + base_low - addon_low;
1228 res += (1 << 24);
1229 } else
1230 res += (1 << 24);
1231
1232 return cpu_to_le32(res);
1233}
1234
4a8a4322 1235static int iwl3945_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
1236 struct ieee80211_measurement_params *params,
1237 u8 type)
1238{
600c0e11 1239 struct iwl_spectrum_cmd spectrum;
3d24a9f7 1240 struct iwl_rx_packet *res;
c2d79b48 1241 struct iwl_host_cmd cmd = {
b481de9c
ZY
1242 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
1243 .data = (void *)&spectrum,
1244 .meta.flags = CMD_WANT_SKB,
1245 };
1246 u32 add_time = le64_to_cpu(params->start_time);
1247 int rc;
1248 int spectrum_resp_status;
1249 int duration = le16_to_cpu(params->duration);
1250
8ccde88a 1251 if (iwl_is_associated(priv))
b481de9c 1252 add_time =
bb8c093b 1253 iwl3945_usecs_to_beacons(
b481de9c
ZY
1254 le64_to_cpu(params->start_time) - priv->last_tsf,
1255 le16_to_cpu(priv->rxon_timing.beacon_interval));
1256
1257 memset(&spectrum, 0, sizeof(spectrum));
1258
1259 spectrum.channel_count = cpu_to_le16(1);
1260 spectrum.flags =
1261 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
1262 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
1263 cmd.len = sizeof(spectrum);
1264 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
1265
8ccde88a 1266 if (iwl_is_associated(priv))
b481de9c 1267 spectrum.start_time =
bb8c093b 1268 iwl3945_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
1269 add_time,
1270 le16_to_cpu(priv->rxon_timing.beacon_interval));
1271 else
1272 spectrum.start_time = 0;
1273
1274 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
1275 spectrum.channels[0].channel = params->channel;
1276 spectrum.channels[0].type = type;
8ccde88a 1277 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
b481de9c
ZY
1278 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
1279 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
1280
518099a8 1281 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
1282 if (rc)
1283 return rc;
1284
3d24a9f7 1285 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 1286 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 1287 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
b481de9c
ZY
1288 rc = -EIO;
1289 }
1290
1291 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
1292 switch (spectrum_resp_status) {
1293 case 0: /* Command will be handled */
1294 if (res->u.spectrum.id != 0xff) {
e1623446 1295 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
bc434dd2 1296 res->u.spectrum.id);
b481de9c
ZY
1297 priv->measurement_status &= ~MEASUREMENT_READY;
1298 }
1299 priv->measurement_status |= MEASUREMENT_ACTIVE;
1300 rc = 0;
1301 break;
1302
1303 case 1: /* Command will not be handled */
1304 rc = -EAGAIN;
1305 break;
1306 }
1307
1308 dev_kfree_skb_any(cmd.meta.u.skb);
1309
1310 return rc;
1311}
1312#endif
1313
4a8a4322 1314static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
6100b588 1315 struct iwl_rx_mem_buffer *rxb)
b481de9c 1316{
3d24a9f7
TW
1317 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1318 struct iwl_alive_resp *palive;
b481de9c
ZY
1319 struct delayed_work *pwork;
1320
1321 palive = &pkt->u.alive_frame;
1322
e1623446 1323 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY
1324 "0x%01X 0x%01X\n",
1325 palive->is_valid, palive->ver_type,
1326 palive->ver_subtype);
1327
1328 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 1329 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
3d24a9f7
TW
1330 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
1331 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1332 pwork = &priv->init_alive_start;
1333 } else {
e1623446 1334 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 1335 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3d24a9f7 1336 sizeof(struct iwl_alive_resp));
b481de9c 1337 pwork = &priv->alive_start;
bb8c093b 1338 iwl3945_disable_events(priv);
b481de9c
ZY
1339 }
1340
1341 /* We delay the ALIVE response by 5ms to
1342 * give the HW RF Kill time to activate... */
1343 if (palive->is_valid == UCODE_VALID_OK)
1344 queue_delayed_work(priv->workqueue, pwork,
1345 msecs_to_jiffies(5));
1346 else
39aadf8c 1347 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY
1348}
1349
4a8a4322 1350static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
6100b588 1351 struct iwl_rx_mem_buffer *rxb)
b481de9c 1352{
c7e035a9 1353#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1354 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
c7e035a9 1355#endif
b481de9c 1356
e1623446 1357 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
b481de9c
ZY
1358 return;
1359}
1360
bb8c093b 1361static void iwl3945_bg_beacon_update(struct work_struct *work)
b481de9c 1362{
4a8a4322
AK
1363 struct iwl_priv *priv =
1364 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1365 struct sk_buff *beacon;
1366
1367 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1368 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1369
1370 if (!beacon) {
15b1687c 1371 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY
1372 return;
1373 }
1374
1375 mutex_lock(&priv->mutex);
1376 /* new beacon skb is allocated every time; dispose previous.*/
1377 if (priv->ibss_beacon)
1378 dev_kfree_skb(priv->ibss_beacon);
1379
1380 priv->ibss_beacon = beacon;
1381 mutex_unlock(&priv->mutex);
1382
bb8c093b 1383 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
1384}
1385
4a8a4322 1386static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
6100b588 1387 struct iwl_rx_mem_buffer *rxb)
b481de9c 1388{
d08853a3 1389#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1390 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
bb8c093b 1391 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
b481de9c
ZY
1392 u8 rate = beacon->beacon_notify_hdr.rate;
1393
e1623446 1394 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c
ZY
1395 "tsf %d %d rate %d\n",
1396 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
1397 beacon->beacon_notify_hdr.failure_frame,
1398 le32_to_cpu(beacon->ibss_mgr_status),
1399 le32_to_cpu(beacon->high_tsf),
1400 le32_to_cpu(beacon->low_tsf), rate);
1401#endif
1402
05c914fe 1403 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
1404 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1405 queue_work(priv->workqueue, &priv->beacon_update);
1406}
1407
b481de9c
ZY
1408/* Handle notification from uCode that card's power state is changing
1409 * due to software, hardware, or critical temperature RFKILL */
4a8a4322 1410static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
6100b588 1411 struct iwl_rx_mem_buffer *rxb)
b481de9c 1412{
3d24a9f7 1413 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
1414 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1415 unsigned long status = priv->status;
1416
e1623446 1417 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY
1418 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1419 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1420
5d49f498 1421 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1422 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1423
1424 if (flags & HW_CARD_DISABLED)
1425 set_bit(STATUS_RF_KILL_HW, &priv->status);
1426 else
1427 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1428
1429
1430 if (flags & SW_CARD_DISABLED)
1431 set_bit(STATUS_RF_KILL_SW, &priv->status);
1432 else
1433 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1434
af0053d6 1435 iwl_scan_cancel(priv);
b481de9c
ZY
1436
1437 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1438 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1439 (test_bit(STATUS_RF_KILL_SW, &status) !=
1440 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1441 queue_work(priv->workqueue, &priv->rf_kill);
1442 else
1443 wake_up_interruptible(&priv->wait_command_queue);
1444}
1445
1446/**
bb8c093b 1447 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1448 *
1449 * Setup the RX handlers for each of the reply types sent from the uCode
1450 * to the host.
1451 *
1452 * This function chains into the hardware specific files for them to setup
1453 * any hardware specific handlers as well.
1454 */
4a8a4322 1455static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1456{
bb8c093b
CH
1457 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
1458 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
261b9c33 1459 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
8ccde88a 1460 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
030f05ed 1461 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 1462 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
030f05ed 1463 iwl_rx_pm_debug_statistics_notif;
bb8c093b 1464 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
b481de9c 1465
9fbab516
BC
1466 /*
1467 * The same handler is used for both the REPLY to a discrete
1468 * statistics request from the host as well as for the periodic
1469 * statistics notifications (after received beacons) from the uCode.
b481de9c 1470 */
bb8c093b
CH
1471 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
1472 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
b481de9c 1473
261b9c33 1474 iwl_setup_spectrum_handlers(priv);
cade0eb2 1475 iwl_setup_rx_scan_handlers(priv);
bb8c093b 1476 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
b481de9c 1477
9fbab516 1478 /* Set up hardware specific Rx handlers */
bb8c093b 1479 iwl3945_hw_rx_handler_setup(priv);
b481de9c
ZY
1480}
1481
91c066f2
TW
1482/**
1483 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
1484 * When FW advances 'R' index, all entries between old and new 'R' index
1485 * need to be reclaimed.
1486 */
4a8a4322 1487static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
91c066f2
TW
1488 int txq_id, int index)
1489{
188cf6c7 1490 struct iwl_tx_queue *txq = &priv->txq[txq_id];
d20b3c65 1491 struct iwl_queue *q = &txq->q;
91c066f2
TW
1492 int nfreed = 0;
1493
625a381a 1494 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
15b1687c 1495 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
91c066f2
TW
1496 "is out of range [0-%d] %d %d.\n", txq_id,
1497 index, q->n_bd, q->write_ptr, q->read_ptr);
1498 return;
1499 }
1500
1501 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
1502 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
1503 if (nfreed > 1) {
15b1687c 1504 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
91c066f2
TW
1505 q->write_ptr, q->read_ptr);
1506 queue_work(priv->workqueue, &priv->restart);
1507 break;
1508 }
1509 nfreed++;
1510 }
1511}
1512
1513
b481de9c 1514/**
bb8c093b 1515 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY
1516 * @rxb: Rx buffer to reclaim
1517 *
1518 * If an Rx buffer has an async callback associated with it the callback
1519 * will be executed. The attached skb (if present) will only be freed
1520 * if the callback returns 1
1521 */
4a8a4322 1522static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
6100b588 1523 struct iwl_rx_mem_buffer *rxb)
b481de9c 1524{
3d24a9f7 1525 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1526 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1527 int txq_id = SEQ_TO_QUEUE(sequence);
1528 int index = SEQ_TO_INDEX(sequence);
600c0e11 1529 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
b481de9c 1530 int cmd_index;
c2d79b48 1531 struct iwl_cmd *cmd;
b481de9c 1532
638d0eb9
CR
1533 if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
1534 "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
1535 txq_id, sequence,
1536 priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
1537 priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
1538 iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
1539 return;
1540 }
b481de9c 1541
188cf6c7
SO
1542 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
1543 cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
b481de9c
ZY
1544
1545 /* Input error checking is done when commands are added to queue. */
1546 if (cmd->meta.flags & CMD_WANT_SKB) {
1547 cmd->meta.source->u.skb = rxb->skb;
1548 rxb->skb = NULL;
1549 } else if (cmd->meta.u.callback &&
1550 !cmd->meta.u.callback(priv, cmd, rxb->skb))
1551 rxb->skb = NULL;
1552
91c066f2 1553 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
b481de9c
ZY
1554
1555 if (!(cmd->meta.flags & CMD_ASYNC)) {
1556 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1557 wake_up_interruptible(&priv->wait_command_queue);
1558 }
1559}
1560
1561/************************** RX-FUNCTIONS ****************************/
1562/*
1563 * Rx theory of operation
1564 *
1565 * The host allocates 32 DMA target addresses and passes the host address
1566 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1567 * 0 to 31
1568 *
1569 * Rx Queue Indexes
1570 * The host/firmware share two index registers for managing the Rx buffers.
1571 *
1572 * The READ index maps to the first position that the firmware may be writing
1573 * to -- the driver can read up to (but not including) this position and get
1574 * good data.
1575 * The READ index is managed by the firmware once the card is enabled.
1576 *
1577 * The WRITE index maps to the last position the driver has read from -- the
1578 * position preceding WRITE is the last slot the firmware can place a packet.
1579 *
1580 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1581 * WRITE = READ.
1582 *
9fbab516 1583 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
1584 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1585 *
9fbab516 1586 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
1587 * and fire the RX interrupt. The driver can then query the READ index and
1588 * process as many packets as possible, moving the WRITE index forward as it
1589 * resets the Rx queue buffers with new memory.
1590 *
1591 * The management in the driver is as follows:
1592 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1593 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 1594 * to replenish the iwl->rxq->rx_free.
bb8c093b 1595 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
1596 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1597 * 'processed' and 'read' driver indexes as well)
1598 * + A received packet is processed and handed to the kernel network stack,
1599 * detached from the iwl->rxq. The driver 'processed' index is updated.
1600 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1601 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1602 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1603 * were enough free buffers and RX_STALLED is set it is cleared.
1604 *
1605 *
1606 * Driver sequence:
1607 *
9fbab516 1608 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 1609 * iwl3945_rx_queue_restock
9fbab516 1610 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
1611 * queue, updates firmware pointers, and updates
1612 * the WRITE index. If insufficient rx_free buffers
bb8c093b 1613 * are available, schedules iwl3945_rx_replenish
b481de9c
ZY
1614 *
1615 * -- enable interrupts --
6100b588 1616 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
b481de9c
ZY
1617 * READ INDEX, detaching the SKB from the pool.
1618 * Moves the packet buffer from queue to rx_used.
bb8c093b 1619 * Calls iwl3945_rx_queue_restock to refill any empty
b481de9c
ZY
1620 * slots.
1621 * ...
1622 *
1623 */
1624
b481de9c 1625/**
9fbab516 1626 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 1627 */
4a8a4322 1628static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
1629 dma_addr_t dma_addr)
1630{
1631 return cpu_to_le32((u32)dma_addr);
1632}
1633
1634/**
bb8c093b 1635 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 1636 *
9fbab516 1637 * If there are slots in the RX queue that need to be restocked,
b481de9c 1638 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 1639 * as we can, pulling from rx_free.
b481de9c
ZY
1640 *
1641 * This moves the 'write' index forward to catch up with 'processed', and
1642 * also updates the memory address in the firmware to reference the new
1643 * target buffer.
1644 */
4a8a4322 1645static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
b481de9c 1646{
cc2f362c 1647 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1648 struct list_head *element;
6100b588 1649 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1650 unsigned long flags;
1651 int write, rc;
1652
1653 spin_lock_irqsave(&rxq->lock, flags);
1654 write = rxq->write & ~0x7;
37d68317 1655 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 1656 /* Get next free Rx buffer, remove from free list */
b481de9c 1657 element = rxq->rx_free.next;
6100b588 1658 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
b481de9c 1659 list_del(element);
6440adb5
CB
1660
1661 /* Point to Rx buffer via next RBD in circular buffer */
6100b588 1662 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
b481de9c
ZY
1663 rxq->queue[rxq->write] = rxb;
1664 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1665 rxq->free_count--;
1666 }
1667 spin_unlock_irqrestore(&rxq->lock, flags);
1668 /* If the pre-allocated buffer pool is dropping low, schedule to
1669 * refill it */
1670 if (rxq->free_count <= RX_LOW_WATERMARK)
1671 queue_work(priv->workqueue, &priv->rx_replenish);
1672
1673
6440adb5
CB
1674 /* If we've added more space for the firmware to place data, tell it.
1675 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
1676 if ((write != (rxq->write & ~0x7))
1677 || (abs(rxq->write - rxq->read) > 7)) {
1678 spin_lock_irqsave(&rxq->lock, flags);
1679 rxq->need_update = 1;
1680 spin_unlock_irqrestore(&rxq->lock, flags);
141c43a3 1681 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
1682 if (rc)
1683 return rc;
1684 }
1685
1686 return 0;
1687}
1688
1689/**
bb8c093b 1690 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
1691 *
1692 * When moving to rx_free an SKB is allocated for the slot.
1693 *
bb8c093b 1694 * Also restock the Rx queue via iwl3945_rx_queue_restock.
01ebd063 1695 * This is called as a scheduled work item (except for during initialization)
b481de9c 1696 */
4a8a4322 1697static void iwl3945_rx_allocate(struct iwl_priv *priv)
b481de9c 1698{
cc2f362c 1699 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1700 struct list_head *element;
6100b588 1701 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1702 unsigned long flags;
1703 spin_lock_irqsave(&rxq->lock, flags);
1704 while (!list_empty(&rxq->rx_used)) {
1705 element = rxq->rx_used.next;
6100b588 1706 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
6440adb5
CB
1707
1708 /* Alloc a new receive buffer */
b481de9c 1709 rxb->skb =
1e33dc64
WT
1710 alloc_skb(priv->hw_params.rx_buf_size,
1711 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY
1712 if (!rxb->skb) {
1713 if (net_ratelimit())
978785a3 1714 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
b481de9c
ZY
1715 /* We don't reschedule replenish work here -- we will
1716 * call the restock method and if it still needs
1717 * more buffers it will schedule replenish */
1718 break;
1719 }
12342c47
ZY
1720
1721 /* If radiotap head is required, reserve some headroom here.
1722 * The physical head count is a variable rx_stats->phy_count.
1723 * We reserve 4 bytes here. Plus these extra bytes, the
1724 * headroom of the physical head should be enough for the
1725 * radiotap head that iwl3945 supported. See iwl3945_rt.
1726 */
1727 skb_reserve(rxb->skb, 4);
1728
b481de9c
ZY
1729 priv->alloc_rxb_skb++;
1730 list_del(element);
6440adb5
CB
1731
1732 /* Get physical address of RB/SKB */
1e33dc64
WT
1733 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1734 rxb->skb->data,
1735 priv->hw_params.rx_buf_size,
1736 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1737 list_add_tail(&rxb->list, &rxq->rx_free);
1738 rxq->free_count++;
1739 }
1740 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA
1741}
1742
1743/*
1744 * this should be called while priv->lock is locked
1745 */
4fd1f841 1746static void __iwl3945_rx_replenish(void *data)
5c0eef96 1747{
4a8a4322 1748 struct iwl_priv *priv = data;
5c0eef96
MA
1749
1750 iwl3945_rx_allocate(priv);
1751 iwl3945_rx_queue_restock(priv);
1752}
1753
1754
1755void iwl3945_rx_replenish(void *data)
1756{
4a8a4322 1757 struct iwl_priv *priv = data;
5c0eef96
MA
1758 unsigned long flags;
1759
1760 iwl3945_rx_allocate(priv);
b481de9c
ZY
1761
1762 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 1763 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1764 spin_unlock_irqrestore(&priv->lock, flags);
1765}
1766
b481de9c
ZY
1767/* Convert linear signal-to-noise ratio into dB */
1768static u8 ratio2dB[100] = {
1769/* 0 1 2 3 4 5 6 7 8 9 */
1770 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1771 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1772 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1773 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1774 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1775 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1776 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1777 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1778 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1779 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1780};
1781
1782/* Calculates a relative dB value from a ratio of linear
1783 * (i.e. not dB) signal levels.
1784 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 1785int iwl3945_calc_db_from_ratio(int sig_ratio)
b481de9c 1786{
221c80cf
AB
1787 /* 1000:1 or higher just report as 60 dB */
1788 if (sig_ratio >= 1000)
b481de9c
ZY
1789 return 60;
1790
221c80cf 1791 /* 100:1 or higher, divide by 10 and use table,
b481de9c 1792 * add 20 dB to make up for divide by 10 */
221c80cf 1793 if (sig_ratio >= 100)
3ac7f146 1794 return 20 + (int)ratio2dB[sig_ratio/10];
b481de9c
ZY
1795
1796 /* We shouldn't see this */
1797 if (sig_ratio < 1)
1798 return 0;
1799
1800 /* Use table for ratios 1:1 - 99:1 */
1801 return (int)ratio2dB[sig_ratio];
1802}
1803
1804#define PERFECT_RSSI (-20) /* dBm */
1805#define WORST_RSSI (-95) /* dBm */
1806#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1807
1808/* Calculate an indication of rx signal quality (a percentage, not dBm!).
1809 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1810 * about formulas used below. */
bb8c093b 1811int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
1812{
1813 int sig_qual;
1814 int degradation = PERFECT_RSSI - rssi_dbm;
1815
1816 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1817 * as indicator; formula is (signal dbm - noise dbm).
1818 * SNR at or above 40 is a great signal (100%).
1819 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1820 * Weakest usable signal is usually 10 - 15 dB SNR. */
1821 if (noise_dbm) {
1822 if (rssi_dbm - noise_dbm >= 40)
1823 return 100;
1824 else if (rssi_dbm < noise_dbm)
1825 return 0;
1826 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1827
1828 /* Else use just the signal level.
1829 * This formula is a least squares fit of data points collected and
1830 * compared with a reference system that had a percentage (%) display
1831 * for signal quality. */
1832 } else
1833 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1834 (15 * RSSI_RANGE + 62 * degradation)) /
1835 (RSSI_RANGE * RSSI_RANGE);
1836
1837 if (sig_qual > 100)
1838 sig_qual = 100;
1839 else if (sig_qual < 1)
1840 sig_qual = 0;
1841
1842 return sig_qual;
1843}
1844
1845/**
9fbab516 1846 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1847 *
1848 * Uses the priv->rx_handlers callback function array to invoke
1849 * the appropriate handlers, including command responses,
1850 * frame-received notifications, and other notifications.
1851 */
4a8a4322 1852static void iwl3945_rx_handle(struct iwl_priv *priv)
b481de9c 1853{
6100b588 1854 struct iwl_rx_mem_buffer *rxb;
3d24a9f7 1855 struct iwl_rx_packet *pkt;
cc2f362c 1856 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1857 u32 r, i;
1858 int reclaim;
1859 unsigned long flags;
5c0eef96 1860 u8 fill_rx = 0;
d68ab680 1861 u32 count = 8;
b481de9c 1862
6440adb5
CB
1863 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1864 * buffer that the driver may process (last buffer filled by ucode). */
8cd812bc 1865 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
1866 i = rxq->read;
1867
37d68317 1868 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96 1869 fill_rx = 1;
b481de9c
ZY
1870 /* Rx interrupt, but nothing sent from uCode */
1871 if (i == r)
e1623446 1872 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
b481de9c
ZY
1873
1874 while (i != r) {
1875 rxb = rxq->queue[i];
1876
9fbab516 1877 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1878 * then a bug has been introduced in the queue refilling
1879 * routines -- catch it here */
1880 BUG_ON(rxb == NULL);
1881
1882 rxq->queue[i] = NULL;
1883
6100b588 1884 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
1e33dc64 1885 priv->hw_params.rx_buf_size,
b481de9c 1886 PCI_DMA_FROMDEVICE);
3d24a9f7 1887 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1888
1889 /* Reclaim a command buffer only if this packet is a response
1890 * to a (driver-originated) command.
1891 * If the packet (e.g. Rx frame) originated from uCode,
1892 * there is no command buffer to reclaim.
1893 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1894 * but apparently a few don't get set; catch them here. */
1895 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1896 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1897 (pkt->hdr.cmd != REPLY_TX);
1898
1899 /* Based on type of command response or notification,
1900 * handle those that need handling via function in
bb8c093b 1901 * rx_handlers table. See iwl3945_setup_rx_handlers() */
b481de9c 1902 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 1903 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1904 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1905 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1906 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1907 } else {
1908 /* No handling needed */
e1623446 1909 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1910 "r %d i %d No handler needed for %s, 0x%02x\n",
1911 r, i, get_cmd_string(pkt->hdr.cmd),
1912 pkt->hdr.cmd);
1913 }
1914
1915 if (reclaim) {
9fbab516 1916 /* Invoke any callbacks, transfer the skb to caller, and
518099a8 1917 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1918 * as we reclaim the driver command queue */
1919 if (rxb && rxb->skb)
bb8c093b 1920 iwl3945_tx_cmd_complete(priv, rxb);
b481de9c 1921 else
39aadf8c 1922 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY
1923 }
1924
1925 /* For now we just don't re-use anything. We can tweak this
1926 * later to try and re-use notification packets and SKBs that
1927 * fail to Rx correctly */
1928 if (rxb->skb != NULL) {
1929 priv->alloc_rxb_skb--;
1930 dev_kfree_skb_any(rxb->skb);
1931 rxb->skb = NULL;
1932 }
1933
6100b588 1934 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1e33dc64
WT
1935 priv->hw_params.rx_buf_size,
1936 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1937 spin_lock_irqsave(&rxq->lock, flags);
1938 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1939 spin_unlock_irqrestore(&rxq->lock, flags);
1940 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1941 /* If there are a lot of unused frames,
1942 * restock the Rx queue so ucode won't assert. */
1943 if (fill_rx) {
1944 count++;
1945 if (count >= 8) {
1946 priv->rxq.read = i;
1947 __iwl3945_rx_replenish(priv);
1948 count = 0;
1949 }
1950 }
b481de9c
ZY
1951 }
1952
1953 /* Backtrack one entry */
1954 priv->rxq.read = i;
bb8c093b 1955 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1956}
1957
0359facc 1958/* call this function to flush any scheduled tasklet */
4a8a4322 1959static inline void iwl_synchronize_irq(struct iwl_priv *priv)
0359facc 1960{
a96a27f9 1961 /* wait to make sure we flush pending tasklet*/
0359facc
MA
1962 synchronize_irq(priv->pci_dev->irq);
1963 tasklet_kill(&priv->irq_tasklet);
1964}
1965
b481de9c
ZY
1966static const char *desc_lookup(int i)
1967{
1968 switch (i) {
1969 case 1:
1970 return "FAIL";
1971 case 2:
1972 return "BAD_PARAM";
1973 case 3:
1974 return "BAD_CHECKSUM";
1975 case 4:
1976 return "NMI_INTERRUPT";
1977 case 5:
1978 return "SYSASSERT";
1979 case 6:
1980 return "FATAL_ERROR";
1981 }
1982
1983 return "UNKNOWN";
1984}
1985
1986#define ERROR_START_OFFSET (1 * sizeof(u32))
1987#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1988
4a8a4322 1989static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
1990{
1991 u32 i;
1992 u32 desc, time, count, base, data1;
1993 u32 blink1, blink2, ilink1, ilink2;
1994 int rc;
1995
1996 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1997
bb8c093b 1998 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 1999 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
b481de9c
ZY
2000 return;
2001 }
2002
5d49f498 2003 rc = iwl_grab_nic_access(priv);
b481de9c 2004 if (rc) {
39aadf8c 2005 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
2006 return;
2007 }
2008
5d49f498 2009 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
2010
2011 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT
2012 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2013 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2014 priv->status, count);
b481de9c
ZY
2015 }
2016
15b1687c 2017 IWL_ERR(priv, "Desc Time asrtPC blink2 "
b481de9c
ZY
2018 "ilink1 nmiPC Line\n");
2019 for (i = ERROR_START_OFFSET;
2020 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
2021 i += ERROR_ELEM_SIZE) {
5d49f498 2022 desc = iwl_read_targ_mem(priv, base + i);
b481de9c 2023 time =
5d49f498 2024 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
b481de9c 2025 blink1 =
5d49f498 2026 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
b481de9c 2027 blink2 =
5d49f498 2028 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
b481de9c 2029 ilink1 =
5d49f498 2030 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
b481de9c 2031 ilink2 =
5d49f498 2032 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
b481de9c 2033 data1 =
5d49f498 2034 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
b481de9c 2035
15b1687c
WT
2036 IWL_ERR(priv,
2037 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
2038 desc_lookup(desc), desc, time, blink1, blink2,
2039 ilink1, ilink2, data1);
b481de9c
ZY
2040 }
2041
5d49f498 2042 iwl_release_nic_access(priv);
b481de9c
ZY
2043
2044}
2045
f58177b9 2046#define EVENT_START_OFFSET (6 * sizeof(u32))
b481de9c
ZY
2047
2048/**
bb8c093b 2049 * iwl3945_print_event_log - Dump error event log to syslog
b481de9c 2050 *
5d49f498 2051 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 2052 */
4a8a4322 2053static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
2054 u32 num_events, u32 mode)
2055{
2056 u32 i;
2057 u32 base; /* SRAM byte address of event log header */
2058 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2059 u32 ptr; /* SRAM byte address of log data */
2060 u32 ev, time, data; /* event log data */
2061
2062 if (num_events == 0)
2063 return;
2064
2065 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2066
2067 if (mode == 0)
2068 event_size = 2 * sizeof(u32);
2069 else
2070 event_size = 3 * sizeof(u32);
2071
2072 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2073
2074 /* "time" is actually "data" for mode 0 (no timestamp).
2075 * place event id # at far right for easier visual parsing. */
2076 for (i = 0; i < num_events; i++) {
5d49f498 2077 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 2078 ptr += sizeof(u32);
5d49f498 2079 time = iwl_read_targ_mem(priv, ptr);
b481de9c 2080 ptr += sizeof(u32);
15b1687c
WT
2081 if (mode == 0) {
2082 /* data, ev */
2083 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
2084 } else {
5d49f498 2085 data = iwl_read_targ_mem(priv, ptr);
b481de9c 2086 ptr += sizeof(u32);
15b1687c 2087 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
b481de9c
ZY
2088 }
2089 }
2090}
2091
4a8a4322 2092static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY
2093{
2094 int rc;
2095 u32 base; /* SRAM byte address of event log header */
2096 u32 capacity; /* event log capacity in # entries */
2097 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
2098 u32 num_wraps; /* # times uCode wrapped to top of log */
2099 u32 next_entry; /* index of next entry to be written by uCode */
2100 u32 size; /* # entries that we'll print */
2101
2102 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 2103 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 2104 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
b481de9c
ZY
2105 return;
2106 }
2107
5d49f498 2108 rc = iwl_grab_nic_access(priv);
b481de9c 2109 if (rc) {
39aadf8c 2110 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
2111 return;
2112 }
2113
2114 /* event log header */
5d49f498
AK
2115 capacity = iwl_read_targ_mem(priv, base);
2116 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2117 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2118 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
2119
2120 size = num_wraps ? capacity : next_entry;
2121
2122 /* bail out if nothing in log */
2123 if (size == 0) {
15b1687c 2124 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
5d49f498 2125 iwl_release_nic_access(priv);
b481de9c
ZY
2126 return;
2127 }
2128
15b1687c 2129 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
2130 size, num_wraps);
2131
2132 /* if uCode has wrapped back to top of log, start at the oldest entry,
2133 * i.e the next one that uCode would fill. */
2134 if (num_wraps)
bb8c093b 2135 iwl3945_print_event_log(priv, next_entry,
b481de9c
ZY
2136 capacity - next_entry, mode);
2137
2138 /* (then/else) start at top of log */
bb8c093b 2139 iwl3945_print_event_log(priv, 0, next_entry, mode);
b481de9c 2140
5d49f498 2141 iwl_release_nic_access(priv);
b481de9c
ZY
2142}
2143
4a8a4322 2144static void iwl3945_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
2145{
2146 unsigned long flags;
2147
8ccde88a
SO
2148 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
2149 sizeof(priv->staging_rxon));
2150 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2151 iwl3945_commit_rxon(priv);
b481de9c 2152
bb8c093b 2153 iwl3945_add_station(priv, priv->bssid, 1, 0);
b481de9c
ZY
2154
2155 spin_lock_irqsave(&priv->lock, flags);
8ccde88a 2156 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
b481de9c
ZY
2157 priv->error_recovering = 0;
2158 spin_unlock_irqrestore(&priv->lock, flags);
2159}
2160
4a8a4322 2161static void iwl3945_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
2162{
2163 u32 inta, handled = 0;
2164 u32 inta_fh;
2165 unsigned long flags;
d08853a3 2166#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
2167 u32 inta_mask;
2168#endif
2169
2170 spin_lock_irqsave(&priv->lock, flags);
2171
2172 /* Ack/clear/reset pending uCode interrupts.
2173 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
2174 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5d49f498
AK
2175 inta = iwl_read32(priv, CSR_INT);
2176 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
2177
2178 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
2179 * Any new interrupts that happen after this, either while we're
2180 * in this tasklet, or later, will show up in next ISR/tasklet. */
5d49f498
AK
2181 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2182 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 2183
d08853a3 2184#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2185 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 2186 /* just for debug */
5d49f498 2187 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 2188 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
2189 inta, inta_mask, inta_fh);
2190 }
2191#endif
2192
2193 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
2194 * atomic, make sure that inta covers all the interrupts that
2195 * we've discovered, even if FH interrupt came in just after
2196 * reading CSR_INT. */
6f83eaa1 2197 if (inta_fh & CSR39_FH_INT_RX_MASK)
b481de9c 2198 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 2199 if (inta_fh & CSR39_FH_INT_TX_MASK)
b481de9c
ZY
2200 inta |= CSR_INT_BIT_FH_TX;
2201
2202 /* Now service all interrupt bits discovered above. */
2203 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 2204 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY
2205
2206 /* Tell the device to stop sending interrupts */
ed3b932e 2207 iwl_disable_interrupts(priv);
b481de9c 2208
8ccde88a 2209 iwl_irq_handle_error(priv);
b481de9c
ZY
2210
2211 handled |= CSR_INT_BIT_HW_ERR;
2212
2213 spin_unlock_irqrestore(&priv->lock, flags);
2214
2215 return;
2216 }
2217
d08853a3 2218#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2219 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 2220 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e 2221 if (inta & CSR_INT_BIT_SCD)
e1623446 2222 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 2223 "the frame/frames.\n");
b481de9c
ZY
2224
2225 /* Alive notification via Rx interrupt will do the real work */
2226 if (inta & CSR_INT_BIT_ALIVE)
e1623446 2227 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
b481de9c
ZY
2228 }
2229#endif
2230 /* Safely ignore these bits for debug checks below */
25c03d8e 2231 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 2232
b481de9c
ZY
2233 /* Error detected by uCode */
2234 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT
2235 IWL_ERR(priv, "Microcode SW error detected. "
2236 "Restarting 0x%X.\n", inta);
8ccde88a 2237 iwl_irq_handle_error(priv);
b481de9c
ZY
2238 handled |= CSR_INT_BIT_SW_ERR;
2239 }
2240
2241 /* uCode wakes up after power-down sleep */
2242 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 2243 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
141c43a3 2244 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
4f3602c8
SO
2245 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
2246 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
2247 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
2248 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
2249 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
2250 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
2251
2252 handled |= CSR_INT_BIT_WAKEUP;
2253 }
2254
2255 /* All uCode command responses, including Tx command responses,
2256 * Rx "responses" (frame-received notification), and other
2257 * notifications from uCode come through here*/
2258 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 2259 iwl3945_rx_handle(priv);
b481de9c
ZY
2260 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
2261 }
2262
2263 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 2264 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
b481de9c 2265
5d49f498
AK
2266 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
2267 if (!iwl_grab_nic_access(priv)) {
2268 iwl_write_direct32(priv, FH39_TCSR_CREDIT
bddadf86 2269 (FH39_SRVC_CHNL), 0x0);
5d49f498 2270 iwl_release_nic_access(priv);
b481de9c
ZY
2271 }
2272 handled |= CSR_INT_BIT_FH_TX;
2273 }
2274
2275 if (inta & ~handled)
15b1687c 2276 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY
2277
2278 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 2279 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 2280 inta & ~CSR_INI_SET_MASK);
39aadf8c 2281 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY
2282 }
2283
2284 /* Re-enable all interrupts */
0359facc
MA
2285 /* only Re-enable if disabled by irq */
2286 if (test_bit(STATUS_INT_ENABLED, &priv->status))
ed3b932e 2287 iwl_enable_interrupts(priv);
b481de9c 2288
d08853a3 2289#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2290 if (priv->debug_level & (IWL_DL_ISR)) {
5d49f498
AK
2291 inta = iwl_read32(priv, CSR_INT);
2292 inta_mask = iwl_read32(priv, CSR_INT_MASK);
2293 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 2294 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY
2295 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
2296 }
2297#endif
2298 spin_unlock_irqrestore(&priv->lock, flags);
2299}
2300
4a8a4322 2301static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 2302 enum ieee80211_band band,
f9340520 2303 u8 is_active, u8 n_probes,
bb8c093b 2304 struct iwl3945_scan_channel *scan_ch)
b481de9c
ZY
2305{
2306 const struct ieee80211_channel *channels = NULL;
8318d78a 2307 const struct ieee80211_supported_band *sband;
d20b3c65 2308 const struct iwl_channel_info *ch_info;
b481de9c
ZY
2309 u16 passive_dwell = 0;
2310 u16 active_dwell = 0;
2311 int added, i;
2312
cbba18c6 2313 sband = iwl_get_hw_mode(priv, band);
8318d78a 2314 if (!sband)
b481de9c
ZY
2315 return 0;
2316
8318d78a 2317 channels = sband->channels;
b481de9c 2318
77fecfb8
SO
2319 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
2320 passive_dwell = iwl_get_passive_dwell_time(priv, band);
b481de9c 2321
8f4807a1
AK
2322 if (passive_dwell <= active_dwell)
2323 passive_dwell = active_dwell + 1;
2324
8318d78a 2325 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB
2326 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
2327 continue;
2328
8318d78a 2329 scan_ch->channel = channels[i].hw_value;
b481de9c 2330
e6148917 2331 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
b481de9c 2332 if (!is_channel_valid(ch_info)) {
e1623446 2333 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
b481de9c
ZY
2334 scan_ch->channel);
2335 continue;
2336 }
2337
011a0330
AK
2338 scan_ch->active_dwell = cpu_to_le16(active_dwell);
2339 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
2340 /* If passive , set up for auto-switch
2341 * and use long active_dwell time.
2342 */
b481de9c 2343 if (!is_active || is_channel_passive(ch_info) ||
011a0330 2344 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
b481de9c 2345 scan_ch->type = 0; /* passive */
011a0330
AK
2346 if (IWL_UCODE_API(priv->ucode_ver) == 1)
2347 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
2348 } else {
b481de9c 2349 scan_ch->type = 1; /* active */
011a0330 2350 }
b481de9c 2351
011a0330
AK
2352 /* Set direct probe bits. These may be used both for active
2353 * scan channels (probes gets sent right away),
2354 * or for passive channels (probes get se sent only after
2355 * hearing clear Rx packet).*/
2356 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
2357 if (n_probes)
0d21044e 2358 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330
AK
2359 } else {
2360 /* uCode v1 does not allow setting direct probe bits on
2361 * passive channel. */
2362 if ((scan_ch->type & 1) && n_probes)
0d21044e 2363 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330 2364 }
b481de9c 2365
9fbab516 2366 /* Set txpower levels to defaults */
b481de9c
ZY
2367 scan_ch->tpc.dsp_atten = 110;
2368 /* scan_pwr_info->tpc.dsp_atten; */
2369
2370 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 2371 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
2372 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
2373 else {
2374 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
2375 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 2376 * power level:
8a1b0245 2377 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
2378 */
2379 }
2380
e1623446 2381 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
b481de9c
ZY
2382 scan_ch->channel,
2383 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
2384 (scan_ch->type & 1) ?
2385 active_dwell : passive_dwell);
2386
2387 scan_ch++;
2388 added++;
2389 }
2390
e1623446 2391 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
b481de9c
ZY
2392 return added;
2393}
2394
4a8a4322 2395static void iwl3945_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
2396 struct ieee80211_rate *rates)
2397{
2398 int i;
2399
2400 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
2401 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
2402 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2403 rates[i].hw_value_short = i;
2404 rates[i].flags = 0;
d9829a67 2405 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 2406 /*
8318d78a 2407 * If CCK != 1M then set short preamble rate flag.
b481de9c 2408 */
bb8c093b 2409 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
8318d78a 2410 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 2411 }
b481de9c
ZY
2412 }
2413}
2414
b481de9c
ZY
2415/******************************************************************************
2416 *
2417 * uCode download functions
2418 *
2419 ******************************************************************************/
2420
4a8a4322 2421static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 2422{
98c92211
TW
2423 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
2424 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
2425 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2426 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
2427 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2428 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
2429}
2430
2431/**
bb8c093b 2432 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
2433 * looking at all data.
2434 */
4a8a4322 2435static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2436{
2437 u32 val;
2438 u32 save_len = len;
2439 int rc = 0;
2440 u32 errcnt;
2441
e1623446 2442 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2443
5d49f498 2444 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2445 if (rc)
2446 return rc;
2447
5d49f498 2448 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2449 IWL39_RTC_INST_LOWER_BOUND);
b481de9c
ZY
2450
2451 errcnt = 0;
2452 for (; len > 0; len -= sizeof(u32), image++) {
2453 /* read data comes through single port, auto-incr addr */
2454 /* NOTE: Use the debugless read so we don't flood kernel log
2455 * if IWL_DL_IO is set */
5d49f498 2456 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c 2457 if (val != le32_to_cpu(*image)) {
15b1687c 2458 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2459 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2460 save_len - len, val, le32_to_cpu(*image));
2461 rc = -EIO;
2462 errcnt++;
2463 if (errcnt >= 20)
2464 break;
2465 }
2466 }
2467
5d49f498 2468 iwl_release_nic_access(priv);
b481de9c
ZY
2469
2470 if (!errcnt)
e1623446
TW
2471 IWL_DEBUG_INFO(priv,
2472 "ucode image in INSTRUCTION memory is good\n");
b481de9c
ZY
2473
2474 return rc;
2475}
2476
2477
2478/**
bb8c093b 2479 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
2480 * using sample data 100 bytes apart. If these sample points are good,
2481 * it's a pretty good bet that everything between them is good, too.
2482 */
4a8a4322 2483static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2484{
2485 u32 val;
2486 int rc = 0;
2487 u32 errcnt = 0;
2488 u32 i;
2489
e1623446 2490 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2491
5d49f498 2492 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2493 if (rc)
2494 return rc;
2495
2496 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2497 /* read data comes through single port, auto-incr addr */
2498 /* NOTE: Use the debugless read so we don't flood kernel log
2499 * if IWL_DL_IO is set */
5d49f498 2500 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2501 i + IWL39_RTC_INST_LOWER_BOUND);
5d49f498 2502 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
2503 if (val != le32_to_cpu(*image)) {
2504#if 0 /* Enable this if you want to see details */
15b1687c 2505 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2506 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2507 i, val, *image);
2508#endif
2509 rc = -EIO;
2510 errcnt++;
2511 if (errcnt >= 3)
2512 break;
2513 }
2514 }
2515
5d49f498 2516 iwl_release_nic_access(priv);
b481de9c
ZY
2517
2518 return rc;
2519}
2520
2521
2522/**
bb8c093b 2523 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
2524 * and verify its contents
2525 */
4a8a4322 2526static int iwl3945_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
2527{
2528 __le32 *image;
2529 u32 len;
2530 int rc = 0;
2531
2532 /* Try bootstrap */
2533 image = (__le32 *)priv->ucode_boot.v_addr;
2534 len = priv->ucode_boot.len;
bb8c093b 2535 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2536 if (rc == 0) {
e1623446 2537 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b481de9c
ZY
2538 return 0;
2539 }
2540
2541 /* Try initialize */
2542 image = (__le32 *)priv->ucode_init.v_addr;
2543 len = priv->ucode_init.len;
bb8c093b 2544 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2545 if (rc == 0) {
e1623446 2546 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b481de9c
ZY
2547 return 0;
2548 }
2549
2550 /* Try runtime/protocol */
2551 image = (__le32 *)priv->ucode_code.v_addr;
2552 len = priv->ucode_code.len;
bb8c093b 2553 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2554 if (rc == 0) {
e1623446 2555 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b481de9c
ZY
2556 return 0;
2557 }
2558
15b1687c 2559 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b481de9c 2560
9fbab516
BC
2561 /* Since nothing seems to match, show first several data entries in
2562 * instruction SRAM, so maybe visual inspection will give a clue.
2563 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
2564 image = (__le32 *)priv->ucode_boot.v_addr;
2565 len = priv->ucode_boot.len;
bb8c093b 2566 rc = iwl3945_verify_inst_full(priv, image, len);
b481de9c
ZY
2567
2568 return rc;
2569}
2570
4a8a4322 2571static void iwl3945_nic_start(struct iwl_priv *priv)
b481de9c
ZY
2572{
2573 /* Remove all resets to allow NIC to operate */
5d49f498 2574 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
2575}
2576
2577/**
bb8c093b 2578 * iwl3945_read_ucode - Read uCode images from disk file.
b481de9c
ZY
2579 *
2580 * Copy into buffers for card to fetch via bus-mastering
2581 */
4a8a4322 2582static int iwl3945_read_ucode(struct iwl_priv *priv)
b481de9c 2583{
a78fe754 2584 struct iwl_ucode *ucode;
a0987a8d 2585 int ret = -EINVAL, index;
b481de9c
ZY
2586 const struct firmware *ucode_raw;
2587 /* firmware file name contains uCode/driver compatibility version */
a0987a8d
RC
2588 const char *name_pre = priv->cfg->fw_name_pre;
2589 const unsigned int api_max = priv->cfg->ucode_api_max;
2590 const unsigned int api_min = priv->cfg->ucode_api_min;
2591 char buf[25];
b481de9c
ZY
2592 u8 *src;
2593 size_t len;
a0987a8d 2594 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
2595
2596 /* Ask kernel firmware_class module to get the boot firmware off disk.
2597 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
2598 for (index = api_max; index >= api_min; index--) {
2599 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2600 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2601 if (ret < 0) {
15b1687c 2602 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC
2603 buf, ret);
2604 if (ret == -ENOENT)
2605 continue;
2606 else
2607 goto error;
2608 } else {
2609 if (index < api_max)
15b1687c
WT
2610 IWL_ERR(priv, "Loaded firmware %s, "
2611 "which is deprecated. "
2612 " Please use API v%u instead.\n",
a0987a8d 2613 buf, api_max);
e1623446
TW
2614 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2615 "(%zd bytes) from disk\n",
a0987a8d
RC
2616 buf, ucode_raw->size);
2617 break;
2618 }
b481de9c
ZY
2619 }
2620
a0987a8d
RC
2621 if (ret < 0)
2622 goto error;
b481de9c
ZY
2623
2624 /* Make sure that we got at least our header! */
2625 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 2626 IWL_ERR(priv, "File size way too small!\n");
90e759d1 2627 ret = -EINVAL;
b481de9c
ZY
2628 goto err_release;
2629 }
2630
2631 /* Data from ucode file: header followed by uCode images */
2632 ucode = (void *)ucode_raw->data;
2633
c02b3acd 2634 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 2635 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY
2636 inst_size = le32_to_cpu(ucode->inst_size);
2637 data_size = le32_to_cpu(ucode->data_size);
2638 init_size = le32_to_cpu(ucode->init_size);
2639 init_data_size = le32_to_cpu(ucode->init_data_size);
2640 boot_size = le32_to_cpu(ucode->boot_size);
2641
a0987a8d
RC
2642 /* api_ver should match the api version forming part of the
2643 * firmware filename ... but we don't check for that and only rely
2644 * on the API version read from firware header from here on forward */
2645
2646 if (api_ver < api_min || api_ver > api_max) {
15b1687c 2647 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC
2648 "Driver supports v%u, firmware is v%u.\n",
2649 api_max, api_ver);
2650 priv->ucode_ver = 0;
2651 ret = -EINVAL;
2652 goto err_release;
2653 }
2654 if (api_ver != api_max)
15b1687c 2655 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
a0987a8d
RC
2656 "got %u. New firmware can be obtained "
2657 "from http://www.intellinuxwireless.org.\n",
2658 api_max, api_ver);
2659
978785a3
TW
2660 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2661 IWL_UCODE_MAJOR(priv->ucode_ver),
2662 IWL_UCODE_MINOR(priv->ucode_ver),
2663 IWL_UCODE_API(priv->ucode_ver),
2664 IWL_UCODE_SERIAL(priv->ucode_ver));
2665
e1623446 2666 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 2667 priv->ucode_ver);
e1623446
TW
2668 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2669 inst_size);
2670 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2671 data_size);
2672 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2673 init_size);
2674 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2675 init_data_size);
2676 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2677 boot_size);
b481de9c 2678
a0987a8d 2679
b481de9c
ZY
2680 /* Verify size of file vs. image size info in file's header */
2681 if (ucode_raw->size < sizeof(*ucode) +
2682 inst_size + data_size + init_size +
2683 init_data_size + boot_size) {
2684
e1623446
TW
2685 IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
2686 ucode_raw->size);
90e759d1 2687 ret = -EINVAL;
b481de9c
ZY
2688 goto err_release;
2689 }
2690
2691 /* Verify that uCode images will fit in card's SRAM */
250bdd21 2692 if (inst_size > IWL39_MAX_INST_SIZE) {
e1623446 2693 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW
2694 inst_size);
2695 ret = -EINVAL;
b481de9c
ZY
2696 goto err_release;
2697 }
2698
250bdd21 2699 if (data_size > IWL39_MAX_DATA_SIZE) {
e1623446 2700 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW
2701 data_size);
2702 ret = -EINVAL;
b481de9c
ZY
2703 goto err_release;
2704 }
250bdd21 2705 if (init_size > IWL39_MAX_INST_SIZE) {
e1623446
TW
2706 IWL_DEBUG_INFO(priv,
2707 "uCode init instr len %d too large to fit in\n",
90e759d1
TW
2708 init_size);
2709 ret = -EINVAL;
b481de9c
ZY
2710 goto err_release;
2711 }
250bdd21 2712 if (init_data_size > IWL39_MAX_DATA_SIZE) {
e1623446
TW
2713 IWL_DEBUG_INFO(priv,
2714 "uCode init data len %d too large to fit in\n",
90e759d1
TW
2715 init_data_size);
2716 ret = -EINVAL;
b481de9c
ZY
2717 goto err_release;
2718 }
250bdd21 2719 if (boot_size > IWL39_MAX_BSM_SIZE) {
e1623446
TW
2720 IWL_DEBUG_INFO(priv,
2721 "uCode boot instr len %d too large to fit in\n",
90e759d1
TW
2722 boot_size);
2723 ret = -EINVAL;
b481de9c
ZY
2724 goto err_release;
2725 }
2726
2727 /* Allocate ucode buffers for card's bus-master loading ... */
2728
2729 /* Runtime instructions and 2 copies of data:
2730 * 1) unmodified from disk
2731 * 2) backup cache for save/restore during power-downs */
2732 priv->ucode_code.len = inst_size;
98c92211 2733 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
2734
2735 priv->ucode_data.len = data_size;
98c92211 2736 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
2737
2738 priv->ucode_data_backup.len = data_size;
98c92211 2739 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 2740
90e759d1
TW
2741 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2742 !priv->ucode_data_backup.v_addr)
2743 goto err_pci_alloc;
b481de9c
ZY
2744
2745 /* Initialization instructions and data */
90e759d1
TW
2746 if (init_size && init_data_size) {
2747 priv->ucode_init.len = init_size;
98c92211 2748 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
2749
2750 priv->ucode_init_data.len = init_data_size;
98c92211 2751 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
2752
2753 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2754 goto err_pci_alloc;
2755 }
b481de9c
ZY
2756
2757 /* Bootstrap (instructions only, no data) */
90e759d1
TW
2758 if (boot_size) {
2759 priv->ucode_boot.len = boot_size;
98c92211 2760 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 2761
90e759d1
TW
2762 if (!priv->ucode_boot.v_addr)
2763 goto err_pci_alloc;
2764 }
b481de9c
ZY
2765
2766 /* Copy images into buffers for card's bus-master reads ... */
2767
2768 /* Runtime instructions (first block of data in file) */
2769 src = &ucode->data[0];
2770 len = priv->ucode_code.len;
e1623446
TW
2771 IWL_DEBUG_INFO(priv,
2772 "Copying (but not loading) uCode instr len %zd\n", len);
b481de9c 2773 memcpy(priv->ucode_code.v_addr, src, len);
e1623446 2774 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY
2775 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2776
2777 /* Runtime data (2nd block)
bb8c093b 2778 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
b481de9c
ZY
2779 src = &ucode->data[inst_size];
2780 len = priv->ucode_data.len;
e1623446
TW
2781 IWL_DEBUG_INFO(priv,
2782 "Copying (but not loading) uCode data len %zd\n", len);
b481de9c
ZY
2783 memcpy(priv->ucode_data.v_addr, src, len);
2784 memcpy(priv->ucode_data_backup.v_addr, src, len);
2785
2786 /* Initialization instructions (3rd block) */
2787 if (init_size) {
2788 src = &ucode->data[inst_size + data_size];
2789 len = priv->ucode_init.len;
e1623446
TW
2790 IWL_DEBUG_INFO(priv,
2791 "Copying (but not loading) init instr len %zd\n", len);
b481de9c
ZY
2792 memcpy(priv->ucode_init.v_addr, src, len);
2793 }
2794
2795 /* Initialization data (4th block) */
2796 if (init_data_size) {
2797 src = &ucode->data[inst_size + data_size + init_size];
2798 len = priv->ucode_init_data.len;
e1623446
TW
2799 IWL_DEBUG_INFO(priv,
2800 "Copying (but not loading) init data len %zd\n", len);
b481de9c
ZY
2801 memcpy(priv->ucode_init_data.v_addr, src, len);
2802 }
2803
2804 /* Bootstrap instructions (5th block) */
2805 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
2806 len = priv->ucode_boot.len;
e1623446
TW
2807 IWL_DEBUG_INFO(priv,
2808 "Copying (but not loading) boot instr len %zd\n", len);
b481de9c
ZY
2809 memcpy(priv->ucode_boot.v_addr, src, len);
2810
2811 /* We have our copies now, allow OS release its copies */
2812 release_firmware(ucode_raw);
2813 return 0;
2814
2815 err_pci_alloc:
15b1687c 2816 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 2817 ret = -ENOMEM;
bb8c093b 2818 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
2819
2820 err_release:
2821 release_firmware(ucode_raw);
2822
2823 error:
90e759d1 2824 return ret;
b481de9c
ZY
2825}
2826
2827
2828/**
bb8c093b 2829 * iwl3945_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
2830 *
2831 * Tell initialization uCode where to find runtime uCode.
2832 *
2833 * BSM registers initially contain pointers to initialization uCode.
2834 * We need to replace them to load runtime uCode inst and data,
2835 * and to save runtime data when powering down.
2836 */
4a8a4322 2837static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
2838{
2839 dma_addr_t pinst;
2840 dma_addr_t pdata;
2841 int rc = 0;
2842 unsigned long flags;
2843
2844 /* bits 31:0 for 3945 */
2845 pinst = priv->ucode_code.p_addr;
2846 pdata = priv->ucode_data_backup.p_addr;
2847
2848 spin_lock_irqsave(&priv->lock, flags);
5d49f498 2849 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2850 if (rc) {
2851 spin_unlock_irqrestore(&priv->lock, flags);
2852 return rc;
2853 }
2854
2855 /* Tell bootstrap uCode where to find image to load */
5d49f498
AK
2856 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2857 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2858 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
2859 priv->ucode_data.len);
2860
a96a27f9 2861 /* Inst byte count must be last to set up, bit 31 signals uCode
b481de9c 2862 * that all new ptr/size info is in place */
5d49f498 2863 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
2864 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2865
5d49f498 2866 iwl_release_nic_access(priv);
b481de9c
ZY
2867
2868 spin_unlock_irqrestore(&priv->lock, flags);
2869
e1623446 2870 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
b481de9c
ZY
2871
2872 return rc;
2873}
2874
2875/**
bb8c093b 2876 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
2877 *
2878 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2879 *
b481de9c 2880 * Tell "initialize" uCode to go ahead and load the runtime uCode.
9fbab516 2881 */
4a8a4322 2882static void iwl3945_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
2883{
2884 /* Check alive response for "valid" sign from uCode */
2885 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2886 /* We had an error bringing up the hardware, so take it
2887 * all the way back down so we can try again */
e1623446 2888 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
b481de9c
ZY
2889 goto restart;
2890 }
2891
2892 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2893 * This is a paranoid check, because we would not have gotten the
2894 * "initialize" alive if code weren't properly loaded. */
bb8c093b 2895 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2896 /* Runtime instruction load was bad;
2897 * take it all the way back down so we can try again */
e1623446 2898 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
b481de9c
ZY
2899 goto restart;
2900 }
2901
2902 /* Send pointers to protocol/runtime uCode image ... init code will
2903 * load and launch runtime uCode, which will send us another "Alive"
2904 * notification. */
e1623446 2905 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
bb8c093b 2906 if (iwl3945_set_ucode_ptrs(priv)) {
b481de9c
ZY
2907 /* Runtime instruction load won't happen;
2908 * take it all the way back down so we can try again */
e1623446 2909 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
b481de9c
ZY
2910 goto restart;
2911 }
2912 return;
2913
2914 restart:
2915 queue_work(priv->workqueue, &priv->restart);
2916}
2917
2918
9bdf5eca
MA
2919/* temporary */
2920static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
2921 struct sk_buff *skb);
2922
b481de9c 2923/**
bb8c093b 2924 * iwl3945_alive_start - called after REPLY_ALIVE notification received
b481de9c 2925 * from protocol/runtime uCode (initialization uCode's
bb8c093b 2926 * Alive gets handled by iwl3945_init_alive_start()).
b481de9c 2927 */
4a8a4322 2928static void iwl3945_alive_start(struct iwl_priv *priv)
b481de9c
ZY
2929{
2930 int rc = 0;
2931 int thermal_spin = 0;
2932 u32 rfkill;
2933
e1623446 2934 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY
2935
2936 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2937 /* We had an error bringing up the hardware, so take it
2938 * all the way back down so we can try again */
e1623446 2939 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY
2940 goto restart;
2941 }
2942
2943 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2944 * This is a paranoid check, because we would not have gotten the
2945 * "runtime" alive if code weren't properly loaded. */
bb8c093b 2946 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2947 /* Runtime instruction load was bad;
2948 * take it all the way back down so we can try again */
e1623446 2949 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY
2950 goto restart;
2951 }
2952
bb8c093b 2953 iwl3945_clear_stations_table(priv);
b481de9c 2954
5d49f498 2955 rc = iwl_grab_nic_access(priv);
b481de9c 2956 if (rc) {
39aadf8c 2957 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
b481de9c
ZY
2958 return;
2959 }
2960
5d49f498 2961 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
e1623446 2962 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
5d49f498 2963 iwl_release_nic_access(priv);
b481de9c
ZY
2964
2965 if (rfkill & 0x1) {
2966 clear_bit(STATUS_RF_KILL_HW, &priv->status);
a96a27f9 2967 /* if RFKILL is not on, then wait for thermal
b481de9c 2968 * sensor in adapter to kick in */
bb8c093b 2969 while (iwl3945_hw_get_temperature(priv) == 0) {
b481de9c
ZY
2970 thermal_spin++;
2971 udelay(10);
2972 }
2973
2974 if (thermal_spin)
e1623446 2975 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
b481de9c
ZY
2976 thermal_spin * 10);
2977 } else
2978 set_bit(STATUS_RF_KILL_HW, &priv->status);
2979
9fbab516 2980 /* After the ALIVE response, we can send commands to 3945 uCode */
b481de9c
ZY
2981 set_bit(STATUS_ALIVE, &priv->status);
2982
2983 /* Clear out the uCode error bit if it is set */
2984 clear_bit(STATUS_FW_ERROR, &priv->status);
2985
775a6e27 2986 if (iwl_is_rfkill(priv))
b481de9c
ZY
2987 return;
2988
36d6825b 2989 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2990
2991 priv->active_rate = priv->rates_mask;
2992 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2993
d25aabb0 2994 iwl_power_update_mode(priv, false);
b481de9c 2995
8ccde88a 2996 if (iwl_is_associated(priv)) {
bb8c093b 2997 struct iwl3945_rxon_cmd *active_rxon =
8ccde88a 2998 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
b481de9c 2999
8ccde88a
SO
3000 memcpy(&priv->staging_rxon, &priv->active_rxon,
3001 sizeof(priv->staging_rxon));
b481de9c
ZY
3002 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3003 } else {
3004 /* Initialize our rx_config data */
8ccde88a 3005 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
3006 }
3007
9fbab516 3008 /* Configure Bluetooth device coexistence support */
17f841cd 3009 iwl_send_bt_config(priv);
b481de9c
ZY
3010
3011 /* Configure the adapter for unassociated operation */
bb8c093b 3012 iwl3945_commit_rxon(priv);
b481de9c 3013
b481de9c
ZY
3014 iwl3945_reg_txpower_periodic(priv);
3015
fe00b5a5
RC
3016 iwl3945_led_register(priv);
3017
e1623446 3018 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 3019 set_bit(STATUS_READY, &priv->status);
5a66926a 3020 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
3021
3022 if (priv->error_recovering)
bb8c093b 3023 iwl3945_error_recovery(priv);
b481de9c 3024
9bdf5eca
MA
3025 /* reassociate for ADHOC mode */
3026 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
3027 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
3028 priv->vif);
3029 if (beacon)
3030 iwl3945_mac_beacon_update(priv->hw, beacon);
3031 }
3032
b481de9c
ZY
3033 return;
3034
3035 restart:
3036 queue_work(priv->workqueue, &priv->restart);
3037}
3038
4a8a4322 3039static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 3040
4a8a4322 3041static void __iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
3042{
3043 unsigned long flags;
3044 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
3045 struct ieee80211_conf *conf = NULL;
3046
e1623446 3047 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c
ZY
3048
3049 conf = ieee80211_get_hw_conf(priv->hw);
3050
3051 if (!exit_pending)
3052 set_bit(STATUS_EXIT_PENDING, &priv->status);
3053
ab53d8af 3054 iwl3945_led_unregister(priv);
bb8c093b 3055 iwl3945_clear_stations_table(priv);
b481de9c
ZY
3056
3057 /* Unblock any waiting calls */
3058 wake_up_interruptible_all(&priv->wait_command_queue);
3059
b481de9c
ZY
3060 /* Wipe out the EXIT_PENDING status bit if we are not actually
3061 * exiting the module */
3062 if (!exit_pending)
3063 clear_bit(STATUS_EXIT_PENDING, &priv->status);
3064
3065 /* stop and reset the on-board processor */
5d49f498 3066 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
3067
3068 /* tell the device to stop sending interrupts */
0359facc 3069 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 3070 iwl_disable_interrupts(priv);
0359facc
MA
3071 spin_unlock_irqrestore(&priv->lock, flags);
3072 iwl_synchronize_irq(priv);
b481de9c
ZY
3073
3074 if (priv->mac80211_registered)
3075 ieee80211_stop_queues(priv->hw);
3076
bb8c093b 3077 /* If we have not previously called iwl3945_init() then
b481de9c 3078 * clear all bits but the RF Kill and SUSPEND bits and return */
775a6e27 3079 if (!iwl_is_init(priv)) {
b481de9c
ZY
3080 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3081 STATUS_RF_KILL_HW |
3082 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3083 STATUS_RF_KILL_SW |
9788864e
RC
3084 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3085 STATUS_GEO_CONFIGURED |
b481de9c 3086 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
ebef2008
AK
3087 STATUS_IN_SUSPEND |
3088 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3089 STATUS_EXIT_PENDING;
b481de9c
ZY
3090 goto exit;
3091 }
3092
3093 /* ...otherwise clear out all the status bits but the RF Kill and
3094 * SUSPEND bits and continue taking the NIC down. */
3095 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3096 STATUS_RF_KILL_HW |
3097 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3098 STATUS_RF_KILL_SW |
9788864e
RC
3099 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3100 STATUS_GEO_CONFIGURED |
b481de9c
ZY
3101 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
3102 STATUS_IN_SUSPEND |
3103 test_bit(STATUS_FW_ERROR, &priv->status) <<
ebef2008
AK
3104 STATUS_FW_ERROR |
3105 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3106 STATUS_EXIT_PENDING;
b481de9c 3107
e9414b6b 3108 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 3109 spin_lock_irqsave(&priv->lock, flags);
5d49f498 3110 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
3111 spin_unlock_irqrestore(&priv->lock, flags);
3112
bb8c093b
CH
3113 iwl3945_hw_txq_ctx_stop(priv);
3114 iwl3945_hw_rxq_stop(priv);
b481de9c
ZY
3115
3116 spin_lock_irqsave(&priv->lock, flags);
5d49f498
AK
3117 if (!iwl_grab_nic_access(priv)) {
3118 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 3119 APMG_CLK_VAL_DMA_CLK_RQT);
5d49f498 3120 iwl_release_nic_access(priv);
b481de9c
ZY
3121 }
3122 spin_unlock_irqrestore(&priv->lock, flags);
3123
3124 udelay(5);
3125
e9414b6b
AM
3126 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
3127 priv->cfg->ops->lib->apm_ops.stop(priv);
3128 else
3129 priv->cfg->ops->lib->apm_ops.reset(priv);
3130
b481de9c 3131 exit:
3d24a9f7 3132 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
3133
3134 if (priv->ibss_beacon)
3135 dev_kfree_skb(priv->ibss_beacon);
3136 priv->ibss_beacon = NULL;
3137
3138 /* clear out any free frames */
bb8c093b 3139 iwl3945_clear_free_frames(priv);
b481de9c
ZY
3140}
3141
4a8a4322 3142static void iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
3143{
3144 mutex_lock(&priv->mutex);
bb8c093b 3145 __iwl3945_down(priv);
b481de9c 3146 mutex_unlock(&priv->mutex);
b24d22b1 3147
bb8c093b 3148 iwl3945_cancel_deferred_work(priv);
b481de9c
ZY
3149}
3150
3151#define MAX_HW_RESTARTS 5
3152
4a8a4322 3153static int __iwl3945_up(struct iwl_priv *priv)
b481de9c
ZY
3154{
3155 int rc, i;
3156
3157 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 3158 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY
3159 return -EIO;
3160 }
3161
3162 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
39aadf8c 3163 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
b481de9c 3164 "parameter)\n");
e655b9f0
ZY
3165 return -ENODEV;
3166 }
3167
e903fbd4 3168 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 3169 IWL_ERR(priv, "ucode not available for device bring up\n");
e903fbd4
RC
3170 return -EIO;
3171 }
3172
e655b9f0 3173 /* If platform's RF_KILL switch is NOT set to KILL */
5d49f498 3174 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
3175 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3176 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3177 else {
3178 set_bit(STATUS_RF_KILL_HW, &priv->status);
3179 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
39aadf8c 3180 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
e655b9f0
ZY
3181 return -ENODEV;
3182 }
b481de9c 3183 }
80fcc9e2 3184
5d49f498 3185 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 3186
bb8c093b 3187 rc = iwl3945_hw_nic_init(priv);
b481de9c 3188 if (rc) {
15b1687c 3189 IWL_ERR(priv, "Unable to int nic\n");
b481de9c
ZY
3190 return rc;
3191 }
3192
3193 /* make sure rfkill handshake bits are cleared */
5d49f498
AK
3194 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3195 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
3196 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3197
3198 /* clear (again), then enable host interrupts */
5d49f498 3199 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
ed3b932e 3200 iwl_enable_interrupts(priv);
b481de9c
ZY
3201
3202 /* really make sure rfkill handshake bits are cleared */
5d49f498
AK
3203 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3204 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
3205
3206 /* Copy original ucode data image from disk into backup cache.
3207 * This will be used to initialize the on-board processor's
3208 * data SRAM for a clean start when the runtime program first loads. */
3209 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 3210 priv->ucode_data.len);
b481de9c 3211
e655b9f0
ZY
3212 /* We return success when we resume from suspend and rf_kill is on. */
3213 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
3214 return 0;
3215
b481de9c
ZY
3216 for (i = 0; i < MAX_HW_RESTARTS; i++) {
3217
bb8c093b 3218 iwl3945_clear_stations_table(priv);
b481de9c
ZY
3219
3220 /* load bootstrap state machine,
3221 * load bootstrap program into processor's memory,
3222 * prepare to load the "initialize" uCode */
0164b9b4 3223 priv->cfg->ops->lib->load_ucode(priv);
b481de9c
ZY
3224
3225 if (rc) {
15b1687c
WT
3226 IWL_ERR(priv,
3227 "Unable to set up bootstrap uCode: %d\n", rc);
b481de9c
ZY
3228 continue;
3229 }
3230
3231 /* start card; "initialize" will load runtime ucode */
bb8c093b 3232 iwl3945_nic_start(priv);
b481de9c 3233
e1623446 3234 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY
3235
3236 return 0;
3237 }
3238
3239 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 3240 __iwl3945_down(priv);
ebef2008 3241 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
3242
3243 /* tried to restart and config the device for as long as our
3244 * patience could withstand */
15b1687c 3245 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY
3246 return -EIO;
3247}
3248
3249
3250/*****************************************************************************
3251 *
3252 * Workqueue callbacks
3253 *
3254 *****************************************************************************/
3255
bb8c093b 3256static void iwl3945_bg_init_alive_start(struct work_struct *data)
b481de9c 3257{
4a8a4322
AK
3258 struct iwl_priv *priv =
3259 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
3260
3261 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3262 return;
3263
3264 mutex_lock(&priv->mutex);
bb8c093b 3265 iwl3945_init_alive_start(priv);
b481de9c
ZY
3266 mutex_unlock(&priv->mutex);
3267}
3268
bb8c093b 3269static void iwl3945_bg_alive_start(struct work_struct *data)
b481de9c 3270{
4a8a4322
AK
3271 struct iwl_priv *priv =
3272 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
3273
3274 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3275 return;
3276
3277 mutex_lock(&priv->mutex);
bb8c093b 3278 iwl3945_alive_start(priv);
b481de9c
ZY
3279 mutex_unlock(&priv->mutex);
3280}
3281
2663516d
HS
3282static void iwl3945_rfkill_poll(struct work_struct *data)
3283{
3284 struct iwl_priv *priv =
3285 container_of(data, struct iwl_priv, rfkill_poll.work);
3286 unsigned long status = priv->status;
3287
3288 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3289 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3290 else
3291 set_bit(STATUS_RF_KILL_HW, &priv->status);
3292
3293 if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
3294 queue_work(priv->workqueue, &priv->rf_kill);
3295
3296 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3297 round_jiffies_relative(2 * HZ));
3298
3299}
3300
b481de9c 3301#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
bb8c093b 3302static void iwl3945_bg_request_scan(struct work_struct *data)
b481de9c 3303{
4a8a4322
AK
3304 struct iwl_priv *priv =
3305 container_of(data, struct iwl_priv, request_scan);
c2d79b48 3306 struct iwl_host_cmd cmd = {
b481de9c 3307 .id = REPLY_SCAN_CMD,
bb8c093b 3308 .len = sizeof(struct iwl3945_scan_cmd),
b481de9c
ZY
3309 .meta.flags = CMD_SIZE_HUGE,
3310 };
3311 int rc = 0;
bb8c093b 3312 struct iwl3945_scan_cmd *scan;
b481de9c 3313 struct ieee80211_conf *conf = NULL;
f9340520 3314 u8 n_probes = 2;
8318d78a 3315 enum ieee80211_band band;
9387b7ca 3316 DECLARE_SSID_BUF(ssid);
b481de9c
ZY
3317
3318 conf = ieee80211_get_hw_conf(priv->hw);
3319
3320 mutex_lock(&priv->mutex);
3321
775a6e27 3322 if (!iwl_is_ready(priv)) {
39aadf8c 3323 IWL_WARN(priv, "request scan called when driver not ready.\n");
b481de9c
ZY
3324 goto done;
3325 }
3326
a96a27f9 3327 /* Make sure the scan wasn't canceled before this queued work
b481de9c
ZY
3328 * was given the chance to run... */
3329 if (!test_bit(STATUS_SCANNING, &priv->status))
3330 goto done;
3331
3332 /* This should never be called or scheduled if there is currently
3333 * a scan active in the hardware. */
3334 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
e1623446
TW
3335 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
3336 "Ignoring second request.\n");
b481de9c
ZY
3337 rc = -EIO;
3338 goto done;
3339 }
3340
3341 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 3342 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
b481de9c
ZY
3343 goto done;
3344 }
3345
3346 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
e1623446
TW
3347 IWL_DEBUG_HC(priv,
3348 "Scan request while abort pending. Queuing.\n");
b481de9c
ZY
3349 goto done;
3350 }
3351
775a6e27 3352 if (iwl_is_rfkill(priv)) {
e1623446 3353 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
b481de9c
ZY
3354 goto done;
3355 }
3356
3357 if (!test_bit(STATUS_READY, &priv->status)) {
e1623446
TW
3358 IWL_DEBUG_HC(priv,
3359 "Scan request while uninitialized. Queuing.\n");
b481de9c
ZY
3360 goto done;
3361 }
3362
3363 if (!priv->scan_bands) {
e1623446 3364 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
b481de9c
ZY
3365 goto done;
3366 }
3367
805cee5b
WT
3368 if (!priv->scan) {
3369 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
b481de9c 3370 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
805cee5b 3371 if (!priv->scan) {
b481de9c
ZY
3372 rc = -ENOMEM;
3373 goto done;
3374 }
3375 }
805cee5b 3376 scan = priv->scan;
bb8c093b 3377 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
3378
3379 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
3380 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
3381
8ccde88a 3382 if (iwl_is_associated(priv)) {
b481de9c
ZY
3383 u16 interval = 0;
3384 u32 extra;
3385 u32 suspend_time = 100;
3386 u32 scan_suspend_time = 100;
3387 unsigned long flags;
3388
e1623446 3389 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
b481de9c
ZY
3390
3391 spin_lock_irqsave(&priv->lock, flags);
3392 interval = priv->beacon_int;
3393 spin_unlock_irqrestore(&priv->lock, flags);
3394
3395 scan->suspend_time = 0;
15e869d8 3396 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
3397 if (!interval)
3398 interval = suspend_time;
3399 /*
3400 * suspend time format:
3401 * 0-19: beacon interval in usec (time before exec.)
3402 * 20-23: 0
3403 * 24-31: number of beacons (suspend between channels)
3404 */
3405
3406 extra = (suspend_time / interval) << 24;
3407 scan_suspend_time = 0xFF0FFFFF &
3408 (extra | ((suspend_time % interval) * 1024));
3409
3410 scan->suspend_time = cpu_to_le32(scan_suspend_time);
e1623446 3411 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
b481de9c
ZY
3412 scan_suspend_time, interval);
3413 }
3414
3415 /* We should add the ability for user to lock to PASSIVE ONLY */
3416 if (priv->one_direct_scan) {
e1623446
TW
3417 IWL_DEBUG_SCAN(priv, "Kicking off one direct scan for '%s'\n",
3418 print_ssid(ssid, priv->direct_ssid,
9387b7ca 3419 priv->direct_ssid_len));
b481de9c
ZY
3420 scan->direct_scan[0].id = WLAN_EID_SSID;
3421 scan->direct_scan[0].len = priv->direct_ssid_len;
3422 memcpy(scan->direct_scan[0].ssid,
3423 priv->direct_ssid, priv->direct_ssid_len);
f9340520 3424 n_probes++;
f9340520 3425 } else
e1623446 3426 IWL_DEBUG_SCAN(priv, "Kicking off one indirect scan.\n");
b481de9c
ZY
3427
3428 /* We don't build a direct scan probe request; the uCode will do
3429 * that based on the direct_mask added to each channel entry */
b481de9c 3430 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
3832ec9d 3431 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
3432 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3433
3434 /* flags + rate selection */
3435
66b5004d 3436 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
b481de9c
ZY
3437 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
3438 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
3439 scan->good_CRC_th = 0;
8318d78a 3440 band = IEEE80211_BAND_2GHZ;
66b5004d 3441 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
b481de9c
ZY
3442 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
3443 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 3444 band = IEEE80211_BAND_5GHZ;
66b5004d 3445 } else {
39aadf8c 3446 IWL_WARN(priv, "Invalid scan band count\n");
b481de9c
ZY
3447 goto done;
3448 }
3449
77fecfb8
SO
3450 scan->tx_cmd.len = cpu_to_le16(
3451 iwl_fill_probe_req(priv, band,
3452 (struct ieee80211_mgmt *)scan->data,
3453 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
3454
b481de9c
ZY
3455 /* select Rx antennas */
3456 scan->flags |= iwl3945_get_antenna_flags(priv);
3457
05c914fe 3458 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
b481de9c
ZY
3459 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
3460
f9340520
AK
3461 scan->channel_count =
3462 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
3463 n_probes,
3464 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 3465
14b54336 3466 if (scan->channel_count == 0) {
e1623446 3467 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
14b54336
RC
3468 goto done;
3469 }
3470
b481de9c 3471 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 3472 scan->channel_count * sizeof(struct iwl3945_scan_channel);
b481de9c
ZY
3473 cmd.data = scan;
3474 scan->len = cpu_to_le16(cmd.len);
3475
3476 set_bit(STATUS_SCAN_HW, &priv->status);
518099a8 3477 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
3478 if (rc)
3479 goto done;
3480
3481 queue_delayed_work(priv->workqueue, &priv->scan_check,
3482 IWL_SCAN_CHECK_WATCHDOG);
3483
3484 mutex_unlock(&priv->mutex);
3485 return;
3486
3487 done:
2420ebc1
MA
3488 /* can not perform scan make sure we clear scanning
3489 * bits from status so next scan request can be performed.
3490 * if we dont clear scanning status bit here all next scan
3491 * will fail
3492 */
3493 clear_bit(STATUS_SCAN_HW, &priv->status);
3494 clear_bit(STATUS_SCANNING, &priv->status);
3495
01ebd063 3496 /* inform mac80211 scan aborted */
b481de9c
ZY
3497 queue_work(priv->workqueue, &priv->scan_completed);
3498 mutex_unlock(&priv->mutex);
3499}
3500
bb8c093b 3501static void iwl3945_bg_up(struct work_struct *data)
b481de9c 3502{
4a8a4322 3503 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
3504
3505 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3506 return;
3507
3508 mutex_lock(&priv->mutex);
bb8c093b 3509 __iwl3945_up(priv);
b481de9c 3510 mutex_unlock(&priv->mutex);
c0af96a6 3511 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
3512}
3513
bb8c093b 3514static void iwl3945_bg_restart(struct work_struct *data)
b481de9c 3515{
4a8a4322 3516 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
3517
3518 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3519 return;
3520
bb8c093b 3521 iwl3945_down(priv);
b481de9c
ZY
3522 queue_work(priv->workqueue, &priv->up);
3523}
3524
bb8c093b 3525static void iwl3945_bg_rx_replenish(struct work_struct *data)
b481de9c 3526{
4a8a4322
AK
3527 struct iwl_priv *priv =
3528 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
3529
3530 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3531 return;
3532
3533 mutex_lock(&priv->mutex);
bb8c093b 3534 iwl3945_rx_replenish(priv);
b481de9c
ZY
3535 mutex_unlock(&priv->mutex);
3536}
3537
7878a5a4
MA
3538#define IWL_DELAY_NEXT_SCAN (HZ*2)
3539
4a8a4322 3540static void iwl3945_post_associate(struct iwl_priv *priv)
b481de9c 3541{
b481de9c
ZY
3542 int rc = 0;
3543 struct ieee80211_conf *conf = NULL;
3544
05c914fe 3545 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 3546 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
3547 return;
3548 }
3549
3550
e1623446 3551 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
8ccde88a 3552 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
3553
3554 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3555 return;
3556
322a9811 3557 if (!priv->vif || !priv->is_open)
6ef89d0a 3558 return;
322a9811 3559
af0053d6 3560 iwl_scan_cancel_timeout(priv, 200);
15e869d8 3561
b481de9c
ZY
3562 conf = ieee80211_get_hw_conf(priv->hw);
3563
8ccde88a 3564 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3565 iwl3945_commit_rxon(priv);
b481de9c 3566
28afaf91 3567 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 3568 iwl3945_setup_rxon_timing(priv);
518099a8 3569 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
3570 sizeof(priv->rxon_timing), &priv->rxon_timing);
3571 if (rc)
39aadf8c 3572 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3573 "Attempting to continue.\n");
3574
8ccde88a 3575 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c 3576
8ccde88a 3577 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3578
e1623446 3579 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY
3580 priv->assoc_id, priv->beacon_int);
3581
3582 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3583 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3584 else
8ccde88a 3585 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3586
8ccde88a 3587 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c 3588 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3589 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3590 else
8ccde88a 3591 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3592
05c914fe 3593 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3594 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c
ZY
3595
3596 }
3597
bb8c093b 3598 iwl3945_commit_rxon(priv);
b481de9c
ZY
3599
3600 switch (priv->iw_mode) {
05c914fe 3601 case NL80211_IFTYPE_STATION:
bb8c093b 3602 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
3603 break;
3604
05c914fe 3605 case NL80211_IFTYPE_ADHOC:
b481de9c 3606
ce546fd2 3607 priv->assoc_id = 1;
bb8c093b 3608 iwl3945_add_station(priv, priv->bssid, 0, 0);
b481de9c 3609 iwl3945_sync_sta(priv, IWL_STA_ID,
8318d78a 3610 (priv->band == IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
3611 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3612 CMD_ASYNC);
bb8c093b
CH
3613 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3614 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3615
3616 break;
3617
3618 default:
15b1687c 3619 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 3620 __func__, priv->iw_mode);
b481de9c
ZY
3621 break;
3622 }
3623
14d2aac5 3624 iwl_activate_qos(priv, 0);
292ae174 3625
7878a5a4
MA
3626 /* we have just associated, don't start scan too early */
3627 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
cd56d331
AK
3628}
3629
e8975581 3630static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
76bb77e0 3631
b481de9c
ZY
3632/*****************************************************************************
3633 *
3634 * mac80211 entry point functions
3635 *
3636 *****************************************************************************/
3637
5a66926a
ZY
3638#define UCODE_READY_TIMEOUT (2 * HZ)
3639
bb8c093b 3640static int iwl3945_mac_start(struct ieee80211_hw *hw)
b481de9c 3641{
4a8a4322 3642 struct iwl_priv *priv = hw->priv;
5a66926a 3643 int ret;
b481de9c 3644
e1623446 3645 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
3646
3647 /* we should be verifying the device is ready to be opened */
3648 mutex_lock(&priv->mutex);
3649
8ccde88a 3650 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
5a66926a
ZY
3651 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3652 * ucode filename and max sizes are card-specific. */
3653
3654 if (!priv->ucode_code.len) {
3655 ret = iwl3945_read_ucode(priv);
3656 if (ret) {
15b1687c 3657 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a
ZY
3658 mutex_unlock(&priv->mutex);
3659 goto out_release_irq;
3660 }
3661 }
b481de9c 3662
e655b9f0 3663 ret = __iwl3945_up(priv);
b481de9c
ZY
3664
3665 mutex_unlock(&priv->mutex);
5a66926a 3666
c0af96a6 3667 iwl_rfkill_set_hw_state(priv);
80fcc9e2 3668
e655b9f0
ZY
3669 if (ret)
3670 goto out_release_irq;
3671
e1623446 3672 IWL_DEBUG_INFO(priv, "Start UP work.\n");
e655b9f0
ZY
3673
3674 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
3675 return 0;
3676
5a66926a
ZY
3677 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3678 * mac80211 will not be run successfully. */
3679 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3680 test_bit(STATUS_READY, &priv->status),
3681 UCODE_READY_TIMEOUT);
3682 if (!ret) {
3683 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c
WT
3684 IWL_ERR(priv,
3685 "Wait for START_ALIVE timeout after %dms.\n",
3686 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5a66926a
ZY
3687 ret = -ETIMEDOUT;
3688 goto out_release_irq;
3689 }
3690 }
3691
2663516d
HS
3692 /* ucode is running and will send rfkill notifications,
3693 * no need to poll the killswitch state anymore */
3694 cancel_delayed_work(&priv->rfkill_poll);
3695
e655b9f0 3696 priv->is_open = 1;
e1623446 3697 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3698 return 0;
5a66926a
ZY
3699
3700out_release_irq:
e655b9f0 3701 priv->is_open = 0;
e1623446 3702 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
5a66926a 3703 return ret;
b481de9c
ZY
3704}
3705
bb8c093b 3706static void iwl3945_mac_stop(struct ieee80211_hw *hw)
b481de9c 3707{
4a8a4322 3708 struct iwl_priv *priv = hw->priv;
b481de9c 3709
e1623446 3710 IWL_DEBUG_MAC80211(priv, "enter\n");
6ef89d0a 3711
e655b9f0 3712 if (!priv->is_open) {
e1623446 3713 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY
3714 return;
3715 }
3716
b481de9c 3717 priv->is_open = 0;
5a66926a 3718
775a6e27 3719 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
3720 /* stop mac, cancel any scan request and clear
3721 * RXON_FILTER_ASSOC_MSK BIT
3722 */
5a66926a 3723 mutex_lock(&priv->mutex);
af0053d6 3724 iwl_scan_cancel_timeout(priv, 100);
fde3571f 3725 mutex_unlock(&priv->mutex);
fde3571f
MA
3726 }
3727
5a66926a
ZY
3728 iwl3945_down(priv);
3729
3730 flush_workqueue(priv->workqueue);
2663516d
HS
3731
3732 /* start polling the killswitch state again */
3733 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3734 round_jiffies_relative(2 * HZ));
6ef89d0a 3735
e1623446 3736 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3737}
3738
e039fa4a 3739static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3740{
4a8a4322 3741 struct iwl_priv *priv = hw->priv;
b481de9c 3742
e1623446 3743 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3744
e1623446 3745 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 3746 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 3747
e039fa4a 3748 if (iwl3945_tx_skb(priv, skb))
b481de9c
ZY
3749 dev_kfree_skb_any(skb);
3750
e1623446 3751 IWL_DEBUG_MAC80211(priv, "leave\n");
637f8837 3752 return NETDEV_TX_OK;
b481de9c
ZY
3753}
3754
bb8c093b 3755static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3756 struct ieee80211_if_init_conf *conf)
3757{
4a8a4322 3758 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3759 unsigned long flags;
3760
e1623446 3761 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
b481de9c 3762
32bfd35d 3763 if (priv->vif) {
e1623446 3764 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
864792e3 3765 return -EOPNOTSUPP;
b481de9c
ZY
3766 }
3767
3768 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 3769 priv->vif = conf->vif;
60294de3 3770 priv->iw_mode = conf->type;
b481de9c
ZY
3771
3772 spin_unlock_irqrestore(&priv->lock, flags);
3773
3774 mutex_lock(&priv->mutex);
864792e3
TW
3775
3776 if (conf->mac_addr) {
e1623446 3777 IWL_DEBUG_MAC80211(priv, "Set: %pM\n", conf->mac_addr);
864792e3
TW
3778 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
3779 }
3780
775a6e27 3781 if (iwl_is_ready(priv))
5a66926a 3782 iwl3945_set_mode(priv, conf->type);
b481de9c 3783
b481de9c
ZY
3784 mutex_unlock(&priv->mutex);
3785
e1623446 3786 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3787 return 0;
3788}
3789
3790/**
bb8c093b 3791 * iwl3945_mac_config - mac80211 config callback
b481de9c
ZY
3792 *
3793 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
3794 * be set inappropriately and the driver currently sets the hardware up to
3795 * use it whenever needed.
3796 */
e8975581 3797static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 3798{
4a8a4322 3799 struct iwl_priv *priv = hw->priv;
d20b3c65 3800 const struct iwl_channel_info *ch_info;
e8975581 3801 struct ieee80211_conf *conf = &hw->conf;
b481de9c 3802 unsigned long flags;
76bb77e0 3803 int ret = 0;
b481de9c
ZY
3804
3805 mutex_lock(&priv->mutex);
e1623446
TW
3806 IWL_DEBUG_MAC80211(priv, "enter to channel %d\n",
3807 conf->channel->hw_value);
b481de9c 3808
775a6e27 3809 if (!iwl_is_ready(priv)) {
e1623446 3810 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
76bb77e0
ZY
3811 ret = -EIO;
3812 goto out;
b481de9c
ZY
3813 }
3814
df878d8f 3815 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
b481de9c 3816 test_bit(STATUS_SCANNING, &priv->status))) {
e1623446 3817 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
a0646470 3818 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 3819 mutex_unlock(&priv->mutex);
a0646470 3820 return 0;
b481de9c
ZY
3821 }
3822
3823 spin_lock_irqsave(&priv->lock, flags);
3824
e6148917
SO
3825 ch_info = iwl_get_channel_info(priv, conf->channel->band,
3826 conf->channel->hw_value);
b481de9c 3827 if (!is_channel_valid(ch_info)) {
e1623446
TW
3828 IWL_DEBUG_SCAN(priv,
3829 "Channel %d [%d] is INVALID for this band.\n",
3830 conf->channel->hw_value, conf->channel->band);
3831 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
b481de9c 3832 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY
3833 ret = -EINVAL;
3834 goto out;
b481de9c
ZY
3835 }
3836
8ccde88a 3837 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 3838
8ccde88a 3839 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
3840
3841 /* The list of supported rates and rate mask can be different
3842 * for each phymode; since the phymode may have changed, reset
3843 * the rate mask to what mac80211 lists */
8ccde88a 3844 iwl_set_rate(priv);
b481de9c
ZY
3845
3846 spin_unlock_irqrestore(&priv->lock, flags);
3847
3848#ifdef IEEE80211_CONF_CHANNEL_SWITCH
3849 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 3850 iwl3945_hw_channel_switch(priv, conf->channel);
76bb77e0 3851 goto out;
b481de9c
ZY
3852 }
3853#endif
3854
7dc45f25
AK
3855 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
3856 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - waiting for uCode\n");
3857 goto out;
3858 }
b481de9c
ZY
3859
3860 if (!conf->radio_enabled) {
7dc45f25 3861 iwl_radio_kill_sw_disable_radio(priv);
e1623446 3862 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
76bb77e0 3863 goto out;
b481de9c
ZY
3864 }
3865
775a6e27 3866 if (iwl_is_rfkill(priv)) {
e1623446 3867 IWL_DEBUG_MAC80211(priv, "leave - RF kill\n");
76bb77e0
ZY
3868 ret = -EIO;
3869 goto out;
b481de9c
ZY
3870 }
3871
8ccde88a 3872 iwl_set_rate(priv);
b481de9c 3873
8ccde88a
SO
3874 if (memcmp(&priv->active_rxon,
3875 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 3876 iwl3945_commit_rxon(priv);
b481de9c 3877 else
e1623446 3878 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration\n");
b481de9c 3879
e1623446 3880 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3881
76bb77e0 3882out:
a0646470 3883 clear_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 3884 mutex_unlock(&priv->mutex);
76bb77e0 3885 return ret;
b481de9c
ZY
3886}
3887
4a8a4322 3888static void iwl3945_config_ap(struct iwl_priv *priv)
b481de9c
ZY
3889{
3890 int rc = 0;
3891
d986bcd1 3892 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
3893 return;
3894
3895 /* The following should be done only at AP bring up */
8ccde88a 3896 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
3897
3898 /* RXON - unassoc (to set timing command) */
8ccde88a 3899 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3900 iwl3945_commit_rxon(priv);
b481de9c
ZY
3901
3902 /* RXON Timing */
28afaf91 3903 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 3904 iwl3945_setup_rxon_timing(priv);
518099a8
SO
3905 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3906 sizeof(priv->rxon_timing),
3907 &priv->rxon_timing);
b481de9c 3908 if (rc)
39aadf8c 3909 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3910 "Attempting to continue.\n");
3911
3912 /* FIXME: what should be the assoc_id for AP? */
8ccde88a 3913 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3914 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3915 priv->staging_rxon.flags |=
b481de9c
ZY
3916 RXON_FLG_SHORT_PREAMBLE_MSK;
3917 else
8ccde88a 3918 priv->staging_rxon.flags &=
b481de9c
ZY
3919 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3920
8ccde88a 3921 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c
ZY
3922 if (priv->assoc_capability &
3923 WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3924 priv->staging_rxon.flags |=
b481de9c
ZY
3925 RXON_FLG_SHORT_SLOT_MSK;
3926 else
8ccde88a 3927 priv->staging_rxon.flags &=
b481de9c
ZY
3928 ~RXON_FLG_SHORT_SLOT_MSK;
3929
05c914fe 3930 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3931 priv->staging_rxon.flags &=
b481de9c
ZY
3932 ~RXON_FLG_SHORT_SLOT_MSK;
3933 }
3934 /* restore RXON assoc */
8ccde88a 3935 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 3936 iwl3945_commit_rxon(priv);
b5323d36 3937 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
556f8db7 3938 }
bb8c093b 3939 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3940
3941 /* FIXME - we need to add code here to detect a totally new
3942 * configuration, reset the AP, unassoc, rxon timing, assoc,
3943 * clear sta table, add BCAST sta... */
3944}
3945
32bfd35d
JB
3946static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
3947 struct ieee80211_vif *vif,
4a8a4322 3948 struct ieee80211_if_conf *conf)
b481de9c 3949{
4a8a4322 3950 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3951 int rc;
3952
3953 if (conf == NULL)
3954 return -EIO;
3955
b716bb91 3956 if (priv->vif != vif) {
e1623446 3957 IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
b716bb91
EG
3958 return 0;
3959 }
3960
9d139c81 3961 /* handle this temporarily here */
05c914fe 3962 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
3963 conf->changed & IEEE80211_IFCC_BEACON) {
3964 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
3965 if (!beacon)
3966 return -ENOMEM;
9bdf5eca 3967 mutex_lock(&priv->mutex);
9d139c81 3968 rc = iwl3945_mac_beacon_update(hw, beacon);
9bdf5eca 3969 mutex_unlock(&priv->mutex);
9d139c81
JB
3970 if (rc)
3971 return rc;
3972 }
3973
775a6e27 3974 if (!iwl_is_alive(priv))
5a66926a
ZY
3975 return -EAGAIN;
3976
b481de9c
ZY
3977 mutex_lock(&priv->mutex);
3978
b481de9c 3979 if (conf->bssid)
e1623446 3980 IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
b481de9c 3981
4150c572
JB
3982/*
3983 * very dubious code was here; the probe filtering flag is never set:
3984 *
b481de9c
ZY
3985 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
3986 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 3987 */
b481de9c 3988
05c914fe 3989 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
3990 if (!conf->bssid) {
3991 conf->bssid = priv->mac_addr;
3992 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e1623446 3993 IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
e174961c 3994 conf->bssid);
b481de9c
ZY
3995 }
3996 if (priv->ibss_beacon)
3997 dev_kfree_skb(priv->ibss_beacon);
3998
9d139c81 3999 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
4000 }
4001
775a6e27 4002 if (iwl_is_rfkill(priv))
fde3571f
MA
4003 goto done;
4004
b481de9c
ZY
4005 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
4006 !is_multicast_ether_addr(conf->bssid)) {
4007 /* If there is currently a HW scan going on in the background
4008 * then we need to cancel it else the RXON below will fail. */
af0053d6 4009 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 4010 IWL_WARN(priv, "Aborted scan still in progress "
b481de9c 4011 "after 100ms\n");
e1623446 4012 IWL_DEBUG_MAC80211(priv, "leaving:scan abort failed\n");
b481de9c
ZY
4013 mutex_unlock(&priv->mutex);
4014 return -EAGAIN;
4015 }
8ccde88a 4016 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
b481de9c
ZY
4017
4018 /* TODO: Audit driver for usage of these members and see
4019 * if mac80211 deprecates them (priv->bssid looks like it
4020 * shouldn't be there, but I haven't scanned the IBSS code
4021 * to verify) - jpk */
4022 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
4023
05c914fe 4024 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 4025 iwl3945_config_ap(priv);
b481de9c 4026 else {
bb8c093b 4027 rc = iwl3945_commit_rxon(priv);
05c914fe 4028 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
bb8c093b 4029 iwl3945_add_station(priv,
8ccde88a 4030 priv->active_rxon.bssid_addr, 1, 0);
b481de9c
ZY
4031 }
4032
4033 } else {
af0053d6 4034 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4035 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4036 iwl3945_commit_rxon(priv);
b481de9c
ZY
4037 }
4038
fde3571f 4039 done:
e1623446 4040 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4041 mutex_unlock(&priv->mutex);
4042
4043 return 0;
4044}
4045
bb8c093b 4046static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
4047 struct ieee80211_if_init_conf *conf)
4048{
4a8a4322 4049 struct iwl_priv *priv = hw->priv;
b481de9c 4050
e1623446 4051 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
4052
4053 mutex_lock(&priv->mutex);
6ef89d0a 4054
775a6e27 4055 if (iwl_is_ready_rf(priv)) {
af0053d6 4056 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4057 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
fde3571f
MA
4058 iwl3945_commit_rxon(priv);
4059 }
32bfd35d
JB
4060 if (priv->vif == conf->vif) {
4061 priv->vif = NULL;
b481de9c 4062 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY
4063 }
4064 mutex_unlock(&priv->mutex);
4065
e1623446 4066 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4067}
4068
cd56d331
AK
4069#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
4070
4071static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
4072 struct ieee80211_vif *vif,
4073 struct ieee80211_bss_conf *bss_conf,
4074 u32 changes)
4075{
4a8a4322 4076 struct iwl_priv *priv = hw->priv;
cd56d331 4077
e1623446 4078 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
cd56d331
AK
4079
4080 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
e1623446 4081 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
cd56d331
AK
4082 bss_conf->use_short_preamble);
4083 if (bss_conf->use_short_preamble)
8ccde88a 4084 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
cd56d331 4085 else
8ccde88a
SO
4086 priv->staging_rxon.flags &=
4087 ~RXON_FLG_SHORT_PREAMBLE_MSK;
cd56d331
AK
4088 }
4089
4090 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
e1623446
TW
4091 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n",
4092 bss_conf->use_cts_prot);
cd56d331 4093 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
8ccde88a 4094 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
cd56d331 4095 else
8ccde88a 4096 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
cd56d331
AK
4097 }
4098
4099 if (changes & BSS_CHANGED_ASSOC) {
e1623446 4100 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
cd56d331
AK
4101 /* This should never happen as this function should
4102 * never be called from interrupt context. */
4103 if (WARN_ON_ONCE(in_interrupt()))
4104 return;
4105 if (bss_conf->assoc) {
4106 priv->assoc_id = bss_conf->aid;
4107 priv->beacon_int = bss_conf->beacon_int;
28afaf91 4108 priv->timestamp = bss_conf->timestamp;
cd56d331 4109 priv->assoc_capability = bss_conf->assoc_capability;
3dae0c42 4110 priv->power_data.dtim_period = bss_conf->dtim_period;
cd56d331
AK
4111 priv->next_scan_jiffies = jiffies +
4112 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
4113 mutex_lock(&priv->mutex);
4114 iwl3945_post_associate(priv);
4115 mutex_unlock(&priv->mutex);
4116 } else {
4117 priv->assoc_id = 0;
e1623446
TW
4118 IWL_DEBUG_MAC80211(priv,
4119 "DISASSOC %d\n", bss_conf->assoc);
cd56d331 4120 }
8ccde88a 4121 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
e1623446
TW
4122 IWL_DEBUG_MAC80211(priv,
4123 "Associated Changes %d\n", changes);
cd56d331
AK
4124 iwl3945_send_rxon_assoc(priv);
4125 }
4126
4127}
4128
bb8c093b 4129static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB
4130 struct ieee80211_vif *vif,
4131 struct ieee80211_sta *sta,
4132 struct ieee80211_key_conf *key)
b481de9c 4133{
4a8a4322 4134 struct iwl_priv *priv = hw->priv;
dc822b5d 4135 const u8 *addr;
6e21f15c
AK
4136 int ret = 0;
4137 u8 sta_id = IWL_INVALID_STATION;
4138 u8 static_key;
b481de9c 4139
e1623446 4140 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4141
df878d8f 4142 if (iwl3945_mod_params.sw_crypto) {
e1623446 4143 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY
4144 return -EOPNOTSUPP;
4145 }
4146
42986796 4147 addr = sta ? sta->addr : iwl_bcast_addr;
6e21f15c
AK
4148 static_key = !iwl_is_associated(priv);
4149
4150 if (!static_key) {
4151 sta_id = iwl3945_hw_find_station(priv, addr);
4152 if (sta_id == IWL_INVALID_STATION) {
4153 IWL_DEBUG_MAC80211(priv, "leave - %pMnot in station map.\n",
4154 addr);
4155 return -EINVAL;
4156 }
b481de9c
ZY
4157 }
4158
4159 mutex_lock(&priv->mutex);
af0053d6 4160 iwl_scan_cancel_timeout(priv, 100);
6e21f15c 4161 mutex_unlock(&priv->mutex);
15e869d8 4162
b481de9c 4163 switch (cmd) {
6e21f15c
AK
4164 case SET_KEY:
4165 if (static_key)
4166 ret = iwl3945_set_static_key(priv, key);
4167 else
4168 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
4169 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
b481de9c
ZY
4170 break;
4171 case DISABLE_KEY:
6e21f15c
AK
4172 if (static_key)
4173 ret = iwl3945_remove_static_key(priv);
4174 else
4175 ret = iwl3945_clear_sta_key_info(priv, sta_id);
4176 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY
4177 break;
4178 default:
42986796 4179 ret = -EINVAL;
b481de9c
ZY
4180 }
4181
e1623446 4182 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 4183
42986796 4184 return ret;
b481de9c
ZY
4185}
4186
e100bb64 4187static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
4188 const struct ieee80211_tx_queue_params *params)
4189{
4a8a4322 4190 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4191 unsigned long flags;
4192 int q;
b481de9c 4193
e1623446 4194 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4195
775a6e27 4196 if (!iwl_is_ready_rf(priv)) {
e1623446 4197 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4198 return -EIO;
4199 }
4200
4201 if (queue >= AC_NUM) {
e1623446 4202 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
b481de9c
ZY
4203 return 0;
4204 }
4205
b481de9c
ZY
4206 q = AC_NUM - 1 - queue;
4207
4208 spin_lock_irqsave(&priv->lock, flags);
4209
4210 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
4211 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
4212 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4213 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 4214 cpu_to_le16((params->txop * 32));
b481de9c
ZY
4215
4216 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
4217 priv->qos_data.qos_active = 1;
4218
4219 spin_unlock_irqrestore(&priv->lock, flags);
4220
4221 mutex_lock(&priv->mutex);
05c914fe 4222 if (priv->iw_mode == NL80211_IFTYPE_AP)
14d2aac5 4223 iwl_activate_qos(priv, 1);
8ccde88a 4224 else if (priv->assoc_id && iwl_is_associated(priv))
14d2aac5 4225 iwl_activate_qos(priv, 0);
b481de9c
ZY
4226
4227 mutex_unlock(&priv->mutex);
4228
e1623446 4229 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4230 return 0;
4231}
4232
bb8c093b 4233static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
4234 struct ieee80211_tx_queue_stats *stats)
4235{
4a8a4322 4236 struct iwl_priv *priv = hw->priv;
b481de9c 4237 int i, avail;
188cf6c7 4238 struct iwl_tx_queue *txq;
d20b3c65 4239 struct iwl_queue *q;
b481de9c
ZY
4240 unsigned long flags;
4241
e1623446 4242 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4243
775a6e27 4244 if (!iwl_is_ready_rf(priv)) {
e1623446 4245 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4246 return -EIO;
4247 }
4248
4249 spin_lock_irqsave(&priv->lock, flags);
4250
4251 for (i = 0; i < AC_NUM; i++) {
188cf6c7 4252 txq = &priv->txq[i];
b481de9c 4253 q = &txq->q;
d20b3c65 4254 avail = iwl_queue_space(q);
b481de9c 4255
57ffc589
JB
4256 stats[i].len = q->n_window - avail;
4257 stats[i].limit = q->n_window - q->high_mark;
4258 stats[i].count = q->n_window;
b481de9c
ZY
4259
4260 }
4261 spin_unlock_irqrestore(&priv->lock, flags);
4262
e1623446 4263 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4264
4265 return 0;
4266}
4267
bb8c093b 4268static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 4269{
4a8a4322 4270 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4271 unsigned long flags;
4272
4273 mutex_lock(&priv->mutex);
e1623446 4274 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4275
775a6e27 4276 iwl_reset_qos(priv);
292ae174 4277
b481de9c
ZY
4278 spin_lock_irqsave(&priv->lock, flags);
4279 priv->assoc_id = 0;
4280 priv->assoc_capability = 0;
b481de9c
ZY
4281
4282 /* new association get rid of ibss beacon skb */
4283 if (priv->ibss_beacon)
4284 dev_kfree_skb(priv->ibss_beacon);
4285
4286 priv->ibss_beacon = NULL;
4287
4288 priv->beacon_int = priv->hw->conf.beacon_int;
28afaf91 4289 priv->timestamp = 0;
05c914fe 4290 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
4291 priv->beacon_int = 0;
4292
4293 spin_unlock_irqrestore(&priv->lock, flags);
4294
775a6e27 4295 if (!iwl_is_ready_rf(priv)) {
e1623446 4296 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
fde3571f
MA
4297 mutex_unlock(&priv->mutex);
4298 return;
4299 }
4300
15e869d8
MA
4301 /* we are restarting association process
4302 * clear RXON_FILTER_ASSOC_MSK bit
4303 */
05c914fe 4304 if (priv->iw_mode != NL80211_IFTYPE_AP) {
af0053d6 4305 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4306 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4307 iwl3945_commit_rxon(priv);
15e869d8
MA
4308 }
4309
b481de9c 4310 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 4311 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
15e869d8 4312
e1623446 4313 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
b481de9c
ZY
4314 mutex_unlock(&priv->mutex);
4315 return;
b481de9c
ZY
4316 }
4317
8ccde88a 4318 iwl_set_rate(priv);
b481de9c
ZY
4319
4320 mutex_unlock(&priv->mutex);
4321
e1623446 4322 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4323
4324}
4325
e039fa4a 4326static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 4327{
4a8a4322 4328 struct iwl_priv *priv = hw->priv;
b481de9c 4329 unsigned long flags;
7c4cbb6e 4330 __le64 timestamp;
b481de9c 4331
e1623446 4332 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4333
775a6e27 4334 if (!iwl_is_ready_rf(priv)) {
e1623446 4335 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4336 return -EIO;
4337 }
4338
05c914fe 4339 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
e1623446 4340 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
b481de9c
ZY
4341 return -EIO;
4342 }
4343
4344 spin_lock_irqsave(&priv->lock, flags);
4345
4346 if (priv->ibss_beacon)
4347 dev_kfree_skb(priv->ibss_beacon);
4348
4349 priv->ibss_beacon = skb;
4350
4351 priv->assoc_id = 0;
7c4cbb6e
AK
4352 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
4353 priv->timestamp = le64_to_cpu(timestamp);
b481de9c 4354
e1623446 4355 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4356 spin_unlock_irqrestore(&priv->lock, flags);
4357
775a6e27 4358 iwl_reset_qos(priv);
b481de9c 4359
dc4b1e7d 4360 iwl3945_post_associate(priv);
b481de9c 4361
b481de9c
ZY
4362
4363 return 0;
4364}
4365
4366/*****************************************************************************
4367 *
4368 * sysfs attributes
4369 *
4370 *****************************************************************************/
4371
d08853a3 4372#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
4373
4374/*
4375 * The following adds a new attribute to the sysfs representation
4376 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
4377 * used for controlling the debug level.
4378 *
4379 * See the level definitions in iwl for details.
4380 */
40b8ec0b
SO
4381static ssize_t show_debug_level(struct device *d,
4382 struct device_attribute *attr, char *buf)
b481de9c 4383{
4a8a4322 4384 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
4385
4386 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 4387}
40b8ec0b
SO
4388static ssize_t store_debug_level(struct device *d,
4389 struct device_attribute *attr,
b481de9c
ZY
4390 const char *buf, size_t count)
4391{
4a8a4322 4392 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
4393 unsigned long val;
4394 int ret;
b481de9c 4395
40b8ec0b
SO
4396 ret = strict_strtoul(buf, 0, &val);
4397 if (ret)
978785a3 4398 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 4399 else
40b8ec0b 4400 priv->debug_level = val;
b481de9c
ZY
4401
4402 return strnlen(buf, count);
4403}
4404
40b8ec0b
SO
4405static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
4406 show_debug_level, store_debug_level);
b481de9c 4407
d08853a3 4408#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 4409
b481de9c
ZY
4410static ssize_t show_temperature(struct device *d,
4411 struct device_attribute *attr, char *buf)
4412{
4a8a4322 4413 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4414
775a6e27 4415 if (!iwl_is_alive(priv))
b481de9c
ZY
4416 return -EAGAIN;
4417
bb8c093b 4418 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
b481de9c
ZY
4419}
4420
4421static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
4422
b481de9c
ZY
4423static ssize_t show_tx_power(struct device *d,
4424 struct device_attribute *attr, char *buf)
4425{
4a8a4322 4426 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
62ea9c5b 4427 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
4428}
4429
4430static ssize_t store_tx_power(struct device *d,
4431 struct device_attribute *attr,
4432 const char *buf, size_t count)
4433{
4a8a4322 4434 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4435 char *p = (char *)buf;
4436 u32 val;
4437
4438 val = simple_strtoul(p, &p, 10);
4439 if (p == buf)
978785a3 4440 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
b481de9c 4441 else
bb8c093b 4442 iwl3945_hw_reg_set_txpower(priv, val);
b481de9c
ZY
4443
4444 return count;
4445}
4446
4447static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
4448
4449static ssize_t show_flags(struct device *d,
4450 struct device_attribute *attr, char *buf)
4451{
4a8a4322 4452 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4453
8ccde88a 4454 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
b481de9c
ZY
4455}
4456
4457static ssize_t store_flags(struct device *d,
4458 struct device_attribute *attr,
4459 const char *buf, size_t count)
4460{
4a8a4322 4461 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4462 u32 flags = simple_strtoul(buf, NULL, 0);
4463
4464 mutex_lock(&priv->mutex);
8ccde88a 4465 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
b481de9c 4466 /* Cancel any currently running scans... */
af0053d6 4467 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4468 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 4469 else {
e1623446 4470 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
b481de9c 4471 flags);
8ccde88a 4472 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 4473 iwl3945_commit_rxon(priv);
b481de9c
ZY
4474 }
4475 }
4476 mutex_unlock(&priv->mutex);
4477
4478 return count;
4479}
4480
4481static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
4482
4483static ssize_t show_filter_flags(struct device *d,
4484 struct device_attribute *attr, char *buf)
4485{
4a8a4322 4486 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4487
4488 return sprintf(buf, "0x%04X\n",
8ccde88a 4489 le32_to_cpu(priv->active_rxon.filter_flags));
b481de9c
ZY
4490}
4491
4492static ssize_t store_filter_flags(struct device *d,
4493 struct device_attribute *attr,
4494 const char *buf, size_t count)
4495{
4a8a4322 4496 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4497 u32 filter_flags = simple_strtoul(buf, NULL, 0);
4498
4499 mutex_lock(&priv->mutex);
8ccde88a 4500 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
b481de9c 4501 /* Cancel any currently running scans... */
af0053d6 4502 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4503 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 4504 else {
e1623446 4505 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c 4506 "0x%04X\n", filter_flags);
8ccde88a 4507 priv->staging_rxon.filter_flags =
b481de9c 4508 cpu_to_le32(filter_flags);
bb8c093b 4509 iwl3945_commit_rxon(priv);
b481de9c
ZY
4510 }
4511 }
4512 mutex_unlock(&priv->mutex);
4513
4514 return count;
4515}
4516
4517static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
4518 store_filter_flags);
4519
c8b0e6e1 4520#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
4521
4522static ssize_t show_measurement(struct device *d,
4523 struct device_attribute *attr, char *buf)
4524{
4a8a4322 4525 struct iwl_priv *priv = dev_get_drvdata(d);
600c0e11 4526 struct iwl_spectrum_notification measure_report;
b481de9c 4527 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 4528 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
4529 unsigned long flags;
4530
4531 spin_lock_irqsave(&priv->lock, flags);
4532 if (!(priv->measurement_status & MEASUREMENT_READY)) {
4533 spin_unlock_irqrestore(&priv->lock, flags);
4534 return 0;
4535 }
4536 memcpy(&measure_report, &priv->measure_report, size);
4537 priv->measurement_status = 0;
4538 spin_unlock_irqrestore(&priv->lock, flags);
4539
4540 while (size && (PAGE_SIZE - len)) {
4541 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4542 PAGE_SIZE - len, 1);
4543 len = strlen(buf);
4544 if (PAGE_SIZE - len)
4545 buf[len++] = '\n';
4546
4547 ofs += 16;
4548 size -= min(size, 16U);
4549 }
4550
4551 return len;
4552}
4553
4554static ssize_t store_measurement(struct device *d,
4555 struct device_attribute *attr,
4556 const char *buf, size_t count)
4557{
4a8a4322 4558 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 4559 struct ieee80211_measurement_params params = {
8ccde88a 4560 .channel = le16_to_cpu(priv->active_rxon.channel),
b481de9c
ZY
4561 .start_time = cpu_to_le64(priv->last_tsf),
4562 .duration = cpu_to_le16(1),
4563 };
4564 u8 type = IWL_MEASURE_BASIC;
4565 u8 buffer[32];
4566 u8 channel;
4567
4568 if (count) {
4569 char *p = buffer;
4570 strncpy(buffer, buf, min(sizeof(buffer), count));
4571 channel = simple_strtoul(p, NULL, 0);
4572 if (channel)
4573 params.channel = channel;
4574
4575 p = buffer;
4576 while (*p && *p != ' ')
4577 p++;
4578 if (*p)
4579 type = simple_strtoul(p + 1, NULL, 0);
4580 }
4581
e1623446 4582 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
b481de9c 4583 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 4584 iwl3945_get_measurement(priv, &params, type);
b481de9c
ZY
4585
4586 return count;
4587}
4588
4589static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
4590 show_measurement, store_measurement);
c8b0e6e1 4591#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
b481de9c 4592
b481de9c
ZY
4593static ssize_t store_retry_rate(struct device *d,
4594 struct device_attribute *attr,
4595 const char *buf, size_t count)
4596{
4a8a4322 4597 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
4598
4599 priv->retry_rate = simple_strtoul(buf, NULL, 0);
4600 if (priv->retry_rate <= 0)
4601 priv->retry_rate = 1;
4602
4603 return count;
4604}
4605
4606static ssize_t show_retry_rate(struct device *d,
4607 struct device_attribute *attr, char *buf)
4608{
4a8a4322 4609 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
4610 return sprintf(buf, "%d", priv->retry_rate);
4611}
4612
4613static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
4614 store_retry_rate);
4615
d25aabb0 4616
b481de9c
ZY
4617static ssize_t store_power_level(struct device *d,
4618 struct device_attribute *attr,
4619 const char *buf, size_t count)
4620{
4a8a4322 4621 struct iwl_priv *priv = dev_get_drvdata(d);
d25aabb0
WT
4622 int ret;
4623 unsigned long mode;
4624
b481de9c 4625
b481de9c
ZY
4626 mutex_lock(&priv->mutex);
4627
775a6e27 4628 if (!iwl_is_ready(priv)) {
d25aabb0 4629 ret = -EAGAIN;
b481de9c
ZY
4630 goto out;
4631 }
4632
d25aabb0
WT
4633 ret = strict_strtoul(buf, 10, &mode);
4634 if (ret)
4635 goto out;
b481de9c 4636
d25aabb0
WT
4637 ret = iwl_power_set_user_mode(priv, mode);
4638 if (ret) {
4639 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
4640 goto out;
b481de9c 4641 }
d25aabb0 4642 ret = count;
b481de9c
ZY
4643
4644 out:
4645 mutex_unlock(&priv->mutex);
d25aabb0 4646 return ret;
b481de9c
ZY
4647}
4648
d25aabb0
WT
4649static ssize_t show_power_level(struct device *d,
4650 struct device_attribute *attr, char *buf)
4651{
4652 struct iwl_priv *priv = dev_get_drvdata(d);
4653 int mode = priv->power_data.user_power_setting;
4654 int system = priv->power_data.system_power_setting;
4655 int level = priv->power_data.power_mode;
4656 char *p = buf;
4657
4658 switch (system) {
4659 case IWL_POWER_SYS_AUTO:
4660 p += sprintf(p, "SYSTEM:auto");
4661 break;
4662 case IWL_POWER_SYS_AC:
4663 p += sprintf(p, "SYSTEM:ac");
4664 break;
4665 case IWL_POWER_SYS_BATTERY:
4666 p += sprintf(p, "SYSTEM:battery");
4667 break;
4668 }
4669
4670 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
4671 "fixed" : "auto");
4672 p += sprintf(p, "\tINDEX:%d", level);
4673 p += sprintf(p, "\n");
4674 return p - buf + 1;
4675}
4676
4677static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
4678 show_power_level, store_power_level);
4679
b481de9c
ZY
4680#define MAX_WX_STRING 80
4681
4682/* Values are in microsecond */
4683static const s32 timeout_duration[] = {
4684 350000,
4685 250000,
4686 75000,
4687 37000,
4688 25000,
4689};
4690static const s32 period_duration[] = {
4691 400000,
4692 700000,
4693 1000000,
4694 1000000,
4695 1000000
4696};
4697
b481de9c
ZY
4698static ssize_t show_channels(struct device *d,
4699 struct device_attribute *attr, char *buf)
4700{
8318d78a
JB
4701 /* all this shit doesn't belong into sysfs anyway */
4702 return 0;
b481de9c
ZY
4703}
4704
4705static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
4706
4707static ssize_t show_statistics(struct device *d,
4708 struct device_attribute *attr, char *buf)
4709{
4a8a4322 4710 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 4711 u32 size = sizeof(struct iwl3945_notif_statistics);
b481de9c 4712 u32 len = 0, ofs = 0;
f2c7e521 4713 u8 *data = (u8 *)&priv->statistics_39;
b481de9c
ZY
4714 int rc = 0;
4715
775a6e27 4716 if (!iwl_is_alive(priv))
b481de9c
ZY
4717 return -EAGAIN;
4718
4719 mutex_lock(&priv->mutex);
17f841cd 4720 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
4721 mutex_unlock(&priv->mutex);
4722
4723 if (rc) {
4724 len = sprintf(buf,
4725 "Error sending statistics request: 0x%08X\n", rc);
4726 return len;
4727 }
4728
4729 while (size && (PAGE_SIZE - len)) {
4730 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4731 PAGE_SIZE - len, 1);
4732 len = strlen(buf);
4733 if (PAGE_SIZE - len)
4734 buf[len++] = '\n';
4735
4736 ofs += 16;
4737 size -= min(size, 16U);
4738 }
4739
4740 return len;
4741}
4742
4743static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4744
4745static ssize_t show_antenna(struct device *d,
4746 struct device_attribute *attr, char *buf)
4747{
4a8a4322 4748 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 4749
775a6e27 4750 if (!iwl_is_alive(priv))
b481de9c
ZY
4751 return -EAGAIN;
4752
7e4bca5e 4753 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
b481de9c
ZY
4754}
4755
4756static ssize_t store_antenna(struct device *d,
4757 struct device_attribute *attr,
4758 const char *buf, size_t count)
4759{
7530f85f 4760 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
b481de9c 4761 int ant;
b481de9c
ZY
4762
4763 if (count == 0)
4764 return 0;
4765
4766 if (sscanf(buf, "%1i", &ant) != 1) {
e1623446 4767 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
b481de9c
ZY
4768 return count;
4769 }
4770
4771 if ((ant >= 0) && (ant <= 2)) {
e1623446 4772 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
7e4bca5e 4773 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
b481de9c 4774 } else
e1623446 4775 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
b481de9c
ZY
4776
4777
4778 return count;
4779}
4780
4781static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
4782
4783static ssize_t show_status(struct device *d,
4784 struct device_attribute *attr, char *buf)
4785{
4a8a4322 4786 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
775a6e27 4787 if (!iwl_is_alive(priv))
b481de9c
ZY
4788 return -EAGAIN;
4789 return sprintf(buf, "0x%08x\n", (int)priv->status);
4790}
4791
4792static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4793
4794static ssize_t dump_error_log(struct device *d,
4795 struct device_attribute *attr,
4796 const char *buf, size_t count)
4797{
4798 char *p = (char *)buf;
4799
4800 if (p[0] == '1')
4a8a4322 4801 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
4802
4803 return strnlen(buf, count);
4804}
4805
4806static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
4807
4808static ssize_t dump_event_log(struct device *d,
4809 struct device_attribute *attr,
4810 const char *buf, size_t count)
4811{
4812 char *p = (char *)buf;
4813
4814 if (p[0] == '1')
4a8a4322 4815 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
4816
4817 return strnlen(buf, count);
4818}
4819
4820static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
4821
4822/*****************************************************************************
4823 *
a96a27f9 4824 * driver setup and tear down
b481de9c
ZY
4825 *
4826 *****************************************************************************/
4827
4a8a4322 4828static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
b481de9c 4829{
d21050c7 4830 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
b481de9c
ZY
4831
4832 init_waitqueue_head(&priv->wait_command_queue);
4833
bb8c093b
CH
4834 INIT_WORK(&priv->up, iwl3945_bg_up);
4835 INIT_WORK(&priv->restart, iwl3945_bg_restart);
4836 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
c0af96a6 4837 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
bb8c093b 4838 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
bb8c093b
CH
4839 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
4840 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
2663516d 4841 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
77fecfb8
SO
4842 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
4843 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
4844 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
4845 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
bb8c093b
CH
4846
4847 iwl3945_hw_setup_deferred_work(priv);
b481de9c
ZY
4848
4849 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 4850 iwl3945_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
4851}
4852
4a8a4322 4853static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 4854{
bb8c093b 4855 iwl3945_hw_cancel_deferred_work(priv);
b481de9c 4856
e47eb6ad 4857 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
4858 cancel_delayed_work(&priv->scan_check);
4859 cancel_delayed_work(&priv->alive_start);
b481de9c
ZY
4860 cancel_work_sync(&priv->beacon_update);
4861}
4862
bb8c093b 4863static struct attribute *iwl3945_sysfs_entries[] = {
b481de9c
ZY
4864 &dev_attr_antenna.attr,
4865 &dev_attr_channels.attr,
4866 &dev_attr_dump_errors.attr,
4867 &dev_attr_dump_events.attr,
4868 &dev_attr_flags.attr,
4869 &dev_attr_filter_flags.attr,
c8b0e6e1 4870#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
4871 &dev_attr_measurement.attr,
4872#endif
4873 &dev_attr_power_level.attr,
b481de9c 4874 &dev_attr_retry_rate.attr,
b481de9c
ZY
4875 &dev_attr_statistics.attr,
4876 &dev_attr_status.attr,
4877 &dev_attr_temperature.attr,
b481de9c 4878 &dev_attr_tx_power.attr,
d08853a3 4879#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b
SO
4880 &dev_attr_debug_level.attr,
4881#endif
b481de9c
ZY
4882 NULL
4883};
4884
bb8c093b 4885static struct attribute_group iwl3945_attribute_group = {
b481de9c 4886 .name = NULL, /* put in device directory */
bb8c093b 4887 .attrs = iwl3945_sysfs_entries,
b481de9c
ZY
4888};
4889
bb8c093b
CH
4890static struct ieee80211_ops iwl3945_hw_ops = {
4891 .tx = iwl3945_mac_tx,
4892 .start = iwl3945_mac_start,
4893 .stop = iwl3945_mac_stop,
4894 .add_interface = iwl3945_mac_add_interface,
4895 .remove_interface = iwl3945_mac_remove_interface,
4896 .config = iwl3945_mac_config,
4897 .config_interface = iwl3945_mac_config_interface,
8ccde88a 4898 .configure_filter = iwl_configure_filter,
bb8c093b 4899 .set_key = iwl3945_mac_set_key,
bb8c093b
CH
4900 .get_tx_stats = iwl3945_mac_get_tx_stats,
4901 .conf_tx = iwl3945_mac_conf_tx,
bb8c093b 4902 .reset_tsf = iwl3945_mac_reset_tsf,
cd56d331 4903 .bss_info_changed = iwl3945_bss_info_changed,
e9dde6f6 4904 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
4905};
4906
e52119c5 4907static int iwl3945_init_drv(struct iwl_priv *priv)
90a30a02
KA
4908{
4909 int ret;
e6148917 4910 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
90a30a02
KA
4911
4912 priv->retry_rate = 1;
4913 priv->ibss_beacon = NULL;
4914
4915 spin_lock_init(&priv->lock);
3dae0c42 4916 spin_lock_init(&priv->power_data.lock);
90a30a02
KA
4917 spin_lock_init(&priv->sta_lock);
4918 spin_lock_init(&priv->hcmd_lock);
4919
4920 INIT_LIST_HEAD(&priv->free_frames);
4921
4922 mutex_init(&priv->mutex);
4923
4924 /* Clear the driver's (not device's) station table */
4925 iwl3945_clear_stations_table(priv);
4926
4927 priv->data_retry_limit = -1;
4928 priv->ieee_channels = NULL;
4929 priv->ieee_rates = NULL;
4930 priv->band = IEEE80211_BAND_2GHZ;
4931
4932 priv->iw_mode = NL80211_IFTYPE_STATION;
4933
4934 iwl_reset_qos(priv);
4935
4936 priv->qos_data.qos_active = 0;
4937 priv->qos_data.qos_cap.val = 0;
4938
4939 priv->rates_mask = IWL_RATES_MASK;
d25aabb0
WT
4940 /* If power management is turned on, default to CAM mode */
4941 priv->power_mode = IWL_POWER_MODE_CAM;
62ea9c5b 4942 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
90a30a02 4943
e6148917
SO
4944 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
4945 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4946 eeprom->version);
4947 ret = -EINVAL;
4948 goto err;
4949 }
4950 ret = iwl_init_channel_map(priv);
90a30a02
KA
4951 if (ret) {
4952 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4953 goto err;
4954 }
4955
e6148917
SO
4956 /* Set up txpower settings in driver for all channels */
4957 if (iwl3945_txpower_set_from_eeprom(priv)) {
4958 ret = -EIO;
4959 goto err_free_channel_map;
4960 }
4961
534166de 4962 ret = iwlcore_init_geos(priv);
90a30a02
KA
4963 if (ret) {
4964 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4965 goto err_free_channel_map;
4966 }
534166de
SO
4967 iwl3945_init_hw_rates(priv, priv->ieee_rates);
4968
2a4ddaab
AK
4969 return 0;
4970
4971err_free_channel_map:
4972 iwl_free_channel_map(priv);
4973err:
4974 return ret;
4975}
4976
4977static int iwl3945_setup_mac(struct iwl_priv *priv)
4978{
4979 int ret;
4980 struct ieee80211_hw *hw = priv->hw;
4981
4982 hw->rate_control_algorithm = "iwl-3945-rs";
4983 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
4984
4985 /* Tell mac80211 our characteristics */
4986 hw->flags = IEEE80211_HW_SIGNAL_DBM |
4987 IEEE80211_HW_NOISE_DBM;
4988
4989 hw->wiphy->interface_modes =
4990 BIT(NL80211_IFTYPE_STATION) |
4991 BIT(NL80211_IFTYPE_ADHOC);
4992
4993 hw->wiphy->custom_regulatory = true;
4994
4995 /* Default value; 4 EDCA QOS priorities */
4996 hw->queues = 4;
4997
4998 hw->conf.beacon_int = 100;
4999
534166de
SO
5000 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5001 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5002 &priv->bands[IEEE80211_BAND_2GHZ];
2a4ddaab 5003
534166de
SO
5004 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5005 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5006 &priv->bands[IEEE80211_BAND_5GHZ];
90a30a02 5007
2a4ddaab
AK
5008 ret = ieee80211_register_hw(priv->hw);
5009 if (ret) {
5010 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
5011 return ret;
5012 }
5013 priv->mac80211_registered = 1;
90a30a02 5014
2a4ddaab 5015 return 0;
90a30a02
KA
5016}
5017
bb8c093b 5018static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
5019{
5020 int err = 0;
4a8a4322 5021 struct iwl_priv *priv;
b481de9c 5022 struct ieee80211_hw *hw;
c0f20d91 5023 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
e6148917 5024 struct iwl3945_eeprom *eeprom;
0359facc 5025 unsigned long flags;
b481de9c 5026
cee53ddb
KA
5027 /***********************
5028 * 1. Allocating HW data
5029 * ********************/
5030
b481de9c
ZY
5031 /* mac80211 allocates memory for this device instance, including
5032 * space for this driver's private structure */
90a30a02 5033 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
b481de9c 5034 if (hw == NULL) {
a3139c59 5035 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
b481de9c
ZY
5036 err = -ENOMEM;
5037 goto out;
5038 }
b481de9c 5039 priv = hw->priv;
90a30a02 5040 SET_IEEE80211_DEV(hw, &pdev->dev);
6440adb5 5041
df878d8f
KA
5042 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
5043 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
15b1687c
WT
5044 IWL_ERR(priv,
5045 "invalid queues_num, should be between %d and %d\n",
5046 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
a3139c59 5047 err = -EINVAL;
c8f16138 5048 goto out_ieee80211_free_hw;
a3139c59
SO
5049 }
5050
90a30a02
KA
5051 /*
5052 * Disabling hardware scan means that mac80211 will perform scans
5053 * "the hard way", rather than using device's scan.
5054 */
df878d8f 5055 if (iwl3945_mod_params.disable_hw_scan) {
e1623446 5056 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
40b8ec0b
SO
5057 iwl3945_hw_ops.hw_scan = NULL;
5058 }
5059
90a30a02 5060
e1623446 5061 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
90a30a02
KA
5062 priv->cfg = cfg;
5063 priv->pci_dev = pdev;
cee53ddb 5064
d08853a3 5065#ifdef CONFIG_IWLWIFI_DEBUG
df878d8f 5066 priv->debug_level = iwl3945_mod_params.debug;
b481de9c
ZY
5067 atomic_set(&priv->restrict_refcnt, 0);
5068#endif
b481de9c 5069
cee53ddb
KA
5070 /***************************
5071 * 2. Initializing PCI bus
5072 * *************************/
b481de9c
ZY
5073 if (pci_enable_device(pdev)) {
5074 err = -ENODEV;
5075 goto out_ieee80211_free_hw;
5076 }
5077
5078 pci_set_master(pdev);
5079
b481de9c
ZY
5080 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
5081 if (!err)
5082 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
5083 if (err) {
978785a3 5084 IWL_WARN(priv, "No suitable DMA available.\n");
b481de9c
ZY
5085 goto out_pci_disable_device;
5086 }
5087
5088 pci_set_drvdata(pdev, priv);
5089 err = pci_request_regions(pdev, DRV_NAME);
5090 if (err)
5091 goto out_pci_disable_device;
6440adb5 5092
cee53ddb
KA
5093 /***********************
5094 * 3. Read REV Register
5095 * ********************/
b481de9c
ZY
5096 priv->hw_base = pci_iomap(pdev, 0, 0);
5097 if (!priv->hw_base) {
5098 err = -ENODEV;
5099 goto out_pci_release_regions;
5100 }
5101
e1623446 5102 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
b481de9c 5103 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 5104 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
b481de9c 5105
cee53ddb
KA
5106 /* We disable the RETRY_TIMEOUT register (0x41) to keep
5107 * PCI Tx retries from interfering with C3 CPU state */
5108 pci_write_config_byte(pdev, 0x41, 0x00);
b481de9c 5109
90a30a02
KA
5110 /* amp init */
5111 err = priv->cfg->ops->lib->apm_ops.init(priv);
cee53ddb 5112 if (err < 0) {
e1623446 5113 IWL_DEBUG_INFO(priv, "Failed to init APMG\n");
90a30a02 5114 goto out_iounmap;
cee53ddb 5115 }
b481de9c 5116
cee53ddb
KA
5117 /***********************
5118 * 4. Read EEPROM
5119 * ********************/
90a30a02 5120
cee53ddb 5121 /* Read the EEPROM */
e6148917 5122 err = iwl_eeprom_init(priv);
cee53ddb 5123 if (err) {
15b1687c 5124 IWL_ERR(priv, "Unable to init EEPROM\n");
c8f16138 5125 goto out_iounmap;
cee53ddb
KA
5126 }
5127 /* MAC Address location in EEPROM same for 3945/4965 */
e6148917
SO
5128 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
5129 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
e1623446 5130 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
cee53ddb 5131 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 5132
cee53ddb
KA
5133 /***********************
5134 * 5. Setup HW Constants
5135 * ********************/
b481de9c 5136 /* Device-specific setup */
3832ec9d 5137 if (iwl3945_hw_set_hw_params(priv)) {
15b1687c 5138 IWL_ERR(priv, "failed to set hw settings\n");
c8f16138 5139 goto out_eeprom_free;
b481de9c
ZY
5140 }
5141
cee53ddb
KA
5142 /***********************
5143 * 6. Setup priv
5144 * ********************/
cee53ddb 5145
90a30a02 5146 err = iwl3945_init_drv(priv);
b481de9c 5147 if (err) {
90a30a02 5148 IWL_ERR(priv, "initializing driver failed\n");
c8f16138 5149 goto out_unset_hw_params;
b481de9c
ZY
5150 }
5151
978785a3
TW
5152 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
5153 priv->cfg->name);
cee53ddb
KA
5154
5155 /***********************************
5156 * 7. Initialize Module Parameters
5157 * **********************************/
5158
5159 /* Initialize module parameter values here */
5160 /* Disable radio (SW RF KILL) via parameter when loading driver */
df878d8f 5161 if (iwl3945_mod_params.disable) {
cee53ddb 5162 set_bit(STATUS_RF_KILL_SW, &priv->status);
e1623446 5163 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
849e0dce
RC
5164 }
5165
cee53ddb
KA
5166
5167 /***********************
5168 * 8. Setup Services
5169 * ********************/
5170
5171 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 5172 iwl_disable_interrupts(priv);
cee53ddb
KA
5173 spin_unlock_irqrestore(&priv->lock, flags);
5174
2663516d
HS
5175 pci_enable_msi(priv->pci_dev);
5176
f17d08a6 5177 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
2663516d
HS
5178 DRV_NAME, priv);
5179 if (err) {
5180 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
5181 goto out_disable_msi;
5182 }
5183
cee53ddb 5184 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 5185 if (err) {
15b1687c 5186 IWL_ERR(priv, "failed to create sysfs device attributes\n");
90a30a02 5187 goto out_release_irq;
849e0dce 5188 }
849e0dce 5189
8ccde88a
SO
5190 iwl_set_rxon_channel(priv,
5191 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
cee53ddb
KA
5192 iwl3945_setup_deferred_work(priv);
5193 iwl3945_setup_rx_handlers(priv);
5194
cee53ddb 5195 /*********************************
2663516d 5196 * 9. Setup and Register mac80211
cee53ddb
KA
5197 * *******************************/
5198
2a4ddaab 5199 iwl_enable_interrupts(priv);
b481de9c 5200
2a4ddaab
AK
5201 err = iwl3945_setup_mac(priv);
5202 if (err)
5203 goto out_remove_sysfs;
cee53ddb 5204
c0af96a6 5205 err = iwl_rfkill_init(priv);
ebef2008 5206 if (err)
15b1687c 5207 IWL_ERR(priv, "Unable to initialize RFKILL system. "
ebef2008 5208 "Ignoring error: %d\n", err);
2a4ddaab
AK
5209 else
5210 iwl_rfkill_set_hw_state(priv);
ebef2008 5211
2663516d
HS
5212 /* Start monitoring the killswitch */
5213 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
5214 2 * HZ);
5215
b481de9c
ZY
5216 return 0;
5217
cee53ddb 5218 out_remove_sysfs:
c8f16138
RC
5219 destroy_workqueue(priv->workqueue);
5220 priv->workqueue = NULL;
cee53ddb 5221 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 5222 out_release_irq:
2663516d 5223 free_irq(priv->pci_dev->irq, priv);
2663516d
HS
5224 out_disable_msi:
5225 pci_disable_msi(priv->pci_dev);
c8f16138
RC
5226 iwlcore_free_geos(priv);
5227 iwl_free_channel_map(priv);
5228 out_unset_hw_params:
5229 iwl3945_unset_hw_params(priv);
5230 out_eeprom_free:
5231 iwl_eeprom_free(priv);
b481de9c
ZY
5232 out_iounmap:
5233 pci_iounmap(pdev, priv->hw_base);
5234 out_pci_release_regions:
5235 pci_release_regions(pdev);
5236 out_pci_disable_device:
5237 pci_disable_device(pdev);
5238 pci_set_drvdata(pdev, NULL);
5239 out_ieee80211_free_hw:
5240 ieee80211_free_hw(priv->hw);
5241 out:
5242 return err;
5243}
5244
c83dbf68 5245static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
b481de9c 5246{
4a8a4322 5247 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 5248 unsigned long flags;
b481de9c
ZY
5249
5250 if (!priv)
5251 return;
5252
e1623446 5253 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 5254
b481de9c 5255 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 5256
d552bfb6
KA
5257 if (priv->mac80211_registered) {
5258 ieee80211_unregister_hw(priv->hw);
5259 priv->mac80211_registered = 0;
5260 } else {
5261 iwl3945_down(priv);
5262 }
b481de9c 5263
0359facc
MA
5264 /* make sure we flush any pending irq or
5265 * tasklet for the driver
5266 */
5267 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 5268 iwl_disable_interrupts(priv);
0359facc
MA
5269 spin_unlock_irqrestore(&priv->lock, flags);
5270
5271 iwl_synchronize_irq(priv);
5272
bb8c093b 5273 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 5274
c0af96a6 5275 iwl_rfkill_unregister(priv);
2663516d
HS
5276 cancel_delayed_work(&priv->rfkill_poll);
5277
bb8c093b 5278 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
5279
5280 if (priv->rxq.bd)
51af3d3f 5281 iwl_rx_queue_free(priv, &priv->rxq);
bb8c093b 5282 iwl3945_hw_txq_ctx_free(priv);
b481de9c 5283
3832ec9d 5284 iwl3945_unset_hw_params(priv);
bb8c093b 5285 iwl3945_clear_stations_table(priv);
b481de9c 5286
6ef89d0a
MA
5287 /*netif_stop_queue(dev); */
5288 flush_workqueue(priv->workqueue);
5289
bb8c093b 5290 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
b481de9c
ZY
5291 * priv->workqueue... so we can't take down the workqueue
5292 * until now... */
5293 destroy_workqueue(priv->workqueue);
5294 priv->workqueue = NULL;
5295
2663516d
HS
5296 free_irq(pdev->irq, priv);
5297 pci_disable_msi(pdev);
5298
b481de9c
ZY
5299 pci_iounmap(pdev, priv->hw_base);
5300 pci_release_regions(pdev);
5301 pci_disable_device(pdev);
5302 pci_set_drvdata(pdev, NULL);
5303
e6148917 5304 iwl_free_channel_map(priv);
534166de 5305 iwlcore_free_geos(priv);
805cee5b 5306 kfree(priv->scan);
b481de9c
ZY
5307 if (priv->ibss_beacon)
5308 dev_kfree_skb(priv->ibss_beacon);
5309
5310 ieee80211_free_hw(priv->hw);
5311}
5312
5313#ifdef CONFIG_PM
5314
bb8c093b 5315static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 5316{
4a8a4322 5317 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 5318
e655b9f0
ZY
5319 if (priv->is_open) {
5320 set_bit(STATUS_IN_SUSPEND, &priv->status);
5321 iwl3945_mac_stop(priv->hw);
5322 priv->is_open = 1;
5323 }
2663516d
HS
5324 pci_save_state(pdev);
5325 pci_disable_device(pdev);
b481de9c
ZY
5326 pci_set_power_state(pdev, PCI_D3hot);
5327
b481de9c
ZY
5328 return 0;
5329}
5330
bb8c093b 5331static int iwl3945_pci_resume(struct pci_dev *pdev)
b481de9c 5332{
4a8a4322 5333 struct iwl_priv *priv = pci_get_drvdata(pdev);
450154e4 5334 int ret;
b481de9c 5335
b481de9c 5336 pci_set_power_state(pdev, PCI_D0);
450154e4
WT
5337 ret = pci_enable_device(pdev);
5338 if (ret)
5339 return ret;
2663516d 5340 pci_restore_state(pdev);
b481de9c 5341
e655b9f0
ZY
5342 if (priv->is_open)
5343 iwl3945_mac_start(priv->hw);
b481de9c 5344
e655b9f0 5345 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
5346 return 0;
5347}
5348
5349#endif /* CONFIG_PM */
5350
5351/*****************************************************************************
5352 *
5353 * driver and module entry point
5354 *
5355 *****************************************************************************/
5356
bb8c093b 5357static struct pci_driver iwl3945_driver = {
b481de9c 5358 .name = DRV_NAME,
bb8c093b
CH
5359 .id_table = iwl3945_hw_card_ids,
5360 .probe = iwl3945_pci_probe,
5361 .remove = __devexit_p(iwl3945_pci_remove),
b481de9c 5362#ifdef CONFIG_PM
bb8c093b
CH
5363 .suspend = iwl3945_pci_suspend,
5364 .resume = iwl3945_pci_resume,
b481de9c
ZY
5365#endif
5366};
5367
bb8c093b 5368static int __init iwl3945_init(void)
b481de9c
ZY
5369{
5370
5371 int ret;
5372 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
5373 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
5374
5375 ret = iwl3945_rate_control_register();
5376 if (ret) {
a3139c59
SO
5377 printk(KERN_ERR DRV_NAME
5378 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC
5379 return ret;
5380 }
5381
bb8c093b 5382 ret = pci_register_driver(&iwl3945_driver);
b481de9c 5383 if (ret) {
a3139c59 5384 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 5385 goto error_register;
b481de9c 5386 }
b481de9c
ZY
5387
5388 return ret;
897e1cf2 5389
897e1cf2
RC
5390error_register:
5391 iwl3945_rate_control_unregister();
5392 return ret;
b481de9c
ZY
5393}
5394
bb8c093b 5395static void __exit iwl3945_exit(void)
b481de9c 5396{
bb8c093b 5397 pci_unregister_driver(&iwl3945_driver);
897e1cf2 5398 iwl3945_rate_control_unregister();
b481de9c
ZY
5399}
5400
a0987a8d 5401MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
25cb6cad 5402
df878d8f 5403module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
b481de9c 5404MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
df878d8f 5405module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
b481de9c 5406MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9c74d9fb
SO
5407module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
5408MODULE_PARM_DESC(swcrypto,
5409 "using software crypto (default 1 [software])\n");
df878d8f 5410module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
b481de9c 5411MODULE_PARM_DESC(debug, "debug output mask");
df878d8f 5412module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
b481de9c
ZY
5413MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
5414
df878d8f 5415module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
b481de9c
ZY
5416MODULE_PARM_DESC(queues_num, "number of hw queues.");
5417
af48d048
SO
5418module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
5419MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
5420
bb8c093b
CH
5421module_exit(iwl3945_exit);
5422module_init(iwl3945_init);
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