iwlwifi: use station management ops
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
CommitLineData
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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
43#include <net/ieee80211_radiotap.h>
7e272fcf 44#include <net/lib80211.h>
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45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
a3139c59
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49#define DRV_NAME "iwl3945"
50
dbb6654c
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51#include "iwl-fh.h"
52#include "iwl-3945-fh.h"
600c0e11 53#include "iwl-commands.h"
17f841cd 54#include "iwl-sta.h"
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55#include "iwl-3945.h"
56#include "iwl-helpers.h"
5747d47f 57#include "iwl-core.h"
d20b3c65 58#include "iwl-dev.h"
b481de9c 59
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60/*
61 * module name, copyright, version, etc.
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62 */
63
64#define DRV_DESCRIPTION \
65"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
d08853a3 67#ifdef CONFIG_IWLWIFI_DEBUG
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68#define VD "d"
69#else
70#define VD
71#endif
72
c8b0e6e1 73#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
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74#define VS "s"
75#else
76#define VS
77#endif
78
eaa686c3 79#define IWL39_VERSION "1.2.26k" VD VS
01f8162a 80#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
a7b75207 81#define DRV_AUTHOR "<ilw@linux.intel.com>"
eaa686c3 82#define DRV_VERSION IWL39_VERSION
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
a7b75207 87MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
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88MODULE_LICENSE("GPL");
89
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90 /* module parameters */
91struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_MAX_NUM_QUEUES,
9c74d9fb 93 .sw_crypto = 1,
af48d048 94 .restart_fw = 1,
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95 /* the rest are 0 by default */
96};
97
b481de9c 98/*************** STATION TABLE MANAGEMENT ****
9fbab516 99 * mac80211 should be examined to determine if sta_info is duplicating
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100 * the functionality provided here
101 */
102
103/**************************************************************/
01ebd063 104#if 0 /* temporary disable till we add real remove station */
6440adb5
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105/**
106 * iwl3945_remove_station - Remove driver's knowledge of station.
107 *
108 * NOTE: This does not remove station from device's station table.
109 */
4a8a4322 110static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
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111{
112 int index = IWL_INVALID_STATION;
113 int i;
114 unsigned long flags;
115
116 spin_lock_irqsave(&priv->sta_lock, flags);
117
118 if (is_ap)
119 index = IWL_AP_ID;
120 else if (is_broadcast_ether_addr(addr))
3832ec9d 121 index = priv->hw_params.bcast_sta_id;
b481de9c 122 else
3832ec9d 123 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
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124 if (priv->stations_39[i].used &&
125 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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126 addr)) {
127 index = i;
128 break;
129 }
130
131 if (unlikely(index == IWL_INVALID_STATION))
132 goto out;
133
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134 if (priv->stations_39[index].used) {
135 priv->stations_39[index].used = 0;
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136 priv->num_stations--;
137 }
138
139 BUG_ON(priv->num_stations < 0);
140
141out:
142 spin_unlock_irqrestore(&priv->sta_lock, flags);
143 return 0;
144}
556f8db7 145#endif
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146
147/**
148 * iwl3945_clear_stations_table - Clear the driver's station table
149 *
150 * NOTE: This does not clear or otherwise alter the device's station table.
151 */
e0158e61 152void iwl3945_clear_stations_table(struct iwl_priv *priv)
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153{
154 unsigned long flags;
155
156 spin_lock_irqsave(&priv->sta_lock, flags);
157
158 priv->num_stations = 0;
f2c7e521 159 memset(priv->stations_39, 0, sizeof(priv->stations_39));
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160
161 spin_unlock_irqrestore(&priv->sta_lock, flags);
162}
163
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164/**
165 * iwl3945_add_station - Add station to station tables in driver and device
166 */
4a8a4322 167u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
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168{
169 int i;
170 int index = IWL_INVALID_STATION;
bb8c093b 171 struct iwl3945_station_entry *station;
b481de9c 172 unsigned long flags_spin;
c14c521e 173 u8 rate;
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174
175 spin_lock_irqsave(&priv->sta_lock, flags_spin);
176 if (is_ap)
177 index = IWL_AP_ID;
178 else if (is_broadcast_ether_addr(addr))
3832ec9d 179 index = priv->hw_params.bcast_sta_id;
b481de9c 180 else
3832ec9d 181 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
f2c7e521 182 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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183 addr)) {
184 index = i;
185 break;
186 }
187
f2c7e521 188 if (!priv->stations_39[i].used &&
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189 index == IWL_INVALID_STATION)
190 index = i;
191 }
192
01ebd063 193 /* These two conditions has the same outcome but keep them separate
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194 since they have different meaning */
195 if (unlikely(index == IWL_INVALID_STATION)) {
196 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
197 return index;
198 }
199
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200 if (priv->stations_39[index].used &&
201 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
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202 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
203 return index;
204 }
205
e1623446 206 IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
f2c7e521 207 station = &priv->stations_39[index];
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208 station->used = 1;
209 priv->num_stations++;
210
6440adb5 211 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 212 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
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213 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
214 station->sta.mode = 0;
215 station->sta.sta.sta_id = index;
216 station->sta.station_flags = 0;
217
8318d78a 218 if (priv->band == IEEE80211_BAND_5GHZ)
69946333
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219 rate = IWL_RATE_6M_PLCP;
220 else
221 rate = IWL_RATE_1M_PLCP;
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222
223 /* Turn on both antennas for the station... */
224 station->sta.rate_n_flags =
bb8c093b 225 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
c14c521e 226
b481de9c 227 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
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228
229 /* Add station to device's station table */
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230 iwl_send_add_sta(priv,
231 (struct iwl_addsta_cmd *)&station->sta, flags);
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232 return index;
233
234}
235
7e4bca5e
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236/**
237 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
238 * @priv: eeprom and antenna fields are used to determine antenna flags
239 *
240 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
241 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
242 *
243 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
244 * IWL_ANTENNA_MAIN - Force MAIN antenna
245 * IWL_ANTENNA_AUX - Force AUX antenna
246 */
247__le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
248{
249 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
250
251 switch (iwl3945_mod_params.antenna) {
252 case IWL_ANTENNA_DIVERSITY:
253 return 0;
254
255 case IWL_ANTENNA_MAIN:
256 if (eeprom->antenna_switch_type)
257 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
258 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
259
260 case IWL_ANTENNA_AUX:
261 if (eeprom->antenna_switch_type)
262 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
263 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
264 }
265
266 /* bad antenna selector value */
267 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
268 iwl3945_mod_params.antenna);
269
270 return 0; /* "diversity" is default if error */
271}
272
6e21f15c 273static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
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274 struct ieee80211_key_conf *keyconf,
275 u8 sta_id)
276{
277 unsigned long flags;
278 __le16 key_flags = 0;
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279 int ret;
280
281 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
282 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
283
284 if (sta_id == priv->hw_params.bcast_sta_id)
285 key_flags |= STA_KEY_MULTICAST_MSK;
286
287 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
288 keyconf->hw_key_idx = keyconf->keyidx;
289 key_flags &= ~STA_KEY_FLG_INVALID;
b481de9c 290
b481de9c 291 spin_lock_irqsave(&priv->sta_lock, flags);
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292 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
293 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
294 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
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295 keyconf->keylen);
296
f2c7e521 297 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
b481de9c 298 keyconf->keylen);
6e21f15c 299
43da9192 300 if ((priv->stations_39[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
6e21f15c 301 == STA_KEY_FLG_NO_ENC)
43da9192 302 priv->stations_39[sta_id].sta.key.key_offset =
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303 iwl_get_free_ucode_key_index(priv);
304 /* else, we are overriding an existing key => no need to allocated room
305 * in uCode. */
306
43da9192 307 WARN(priv->stations_39[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
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308 "no space for a new key");
309
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310 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
311 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
312 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c 313
6e21f15c
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314 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
315
316 ret = iwl_send_add_sta(priv,
317 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC);
318
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319 spin_unlock_irqrestore(&priv->sta_lock, flags);
320
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321 return ret;
322}
323
324static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
325 struct ieee80211_key_conf *keyconf,
326 u8 sta_id)
327{
328 return -EOPNOTSUPP;
329}
330
331static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
332 struct ieee80211_key_conf *keyconf,
333 u8 sta_id)
334{
335 return -EOPNOTSUPP;
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336}
337
4a8a4322 338static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
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339{
340 unsigned long flags;
341
342 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
343 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
344 memset(&priv->stations_39[sta_id].sta.key, 0,
4c897253 345 sizeof(struct iwl4965_keyinfo));
f2c7e521
AK
346 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
347 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
348 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
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349 spin_unlock_irqrestore(&priv->sta_lock, flags);
350
e1623446 351 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
17f841cd
SO
352 iwl_send_add_sta(priv,
353 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
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354 return 0;
355}
356
fa11d525 357static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
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358 struct ieee80211_key_conf *keyconf, u8 sta_id)
359{
360 int ret = 0;
361
362 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
363
364 switch (keyconf->alg) {
365 case ALG_CCMP:
366 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
367 break;
368 case ALG_TKIP:
369 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
370 break;
371 case ALG_WEP:
372 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
373 break;
374 default:
1e680233 375 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
6e21f15c
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376 ret = -EINVAL;
377 }
378
379 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
380 keyconf->alg, keyconf->keylen, keyconf->keyidx,
381 sta_id, ret);
382
383 return ret;
384}
385
386static int iwl3945_remove_static_key(struct iwl_priv *priv)
387{
388 int ret = -EOPNOTSUPP;
389
390 return ret;
391}
392
393static int iwl3945_set_static_key(struct iwl_priv *priv,
394 struct ieee80211_key_conf *key)
395{
396 if (key->alg == ALG_WEP)
397 return -EOPNOTSUPP;
398
399 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
400 return -EINVAL;
401}
402
4a8a4322 403static void iwl3945_clear_free_frames(struct iwl_priv *priv)
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404{
405 struct list_head *element;
406
e1623446 407 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
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408 priv->frames_count);
409
410 while (!list_empty(&priv->free_frames)) {
411 element = priv->free_frames.next;
412 list_del(element);
bb8c093b 413 kfree(list_entry(element, struct iwl3945_frame, list));
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414 priv->frames_count--;
415 }
416
417 if (priv->frames_count) {
39aadf8c 418 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
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419 priv->frames_count);
420 priv->frames_count = 0;
421 }
422}
423
4a8a4322 424static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
b481de9c 425{
bb8c093b 426 struct iwl3945_frame *frame;
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427 struct list_head *element;
428 if (list_empty(&priv->free_frames)) {
429 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
430 if (!frame) {
15b1687c 431 IWL_ERR(priv, "Could not allocate frame!\n");
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432 return NULL;
433 }
434
435 priv->frames_count++;
436 return frame;
437 }
438
439 element = priv->free_frames.next;
440 list_del(element);
bb8c093b 441 return list_entry(element, struct iwl3945_frame, list);
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442}
443
4a8a4322 444static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
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445{
446 memset(frame, 0, sizeof(*frame));
447 list_add(&frame->list, &priv->free_frames);
448}
449
4a8a4322 450unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
b481de9c 451 struct ieee80211_hdr *hdr,
73ec1cc2 452 int left)
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453{
454
8ccde88a 455 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
456 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
457 (priv->iw_mode != NL80211_IFTYPE_AP)))
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458 return 0;
459
460 if (priv->ibss_beacon->len > left)
461 return 0;
462
463 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
464
465 return priv->ibss_beacon->len;
466}
467
4a8a4322 468static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 469{
bb8c093b 470 struct iwl3945_frame *frame;
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471 unsigned int frame_size;
472 int rc;
473 u8 rate;
474
bb8c093b 475 frame = iwl3945_get_free_frame(priv);
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476
477 if (!frame) {
15b1687c 478 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
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479 "command.\n");
480 return -ENOMEM;
481 }
482
8ccde88a 483 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 484
bb8c093b 485 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 486
518099a8 487 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
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488 &frame->u.cmd[0]);
489
bb8c093b 490 iwl3945_free_frame(priv, frame);
b481de9c
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491
492 return rc;
493}
494
4a8a4322 495static void iwl3945_unset_hw_params(struct iwl_priv *priv)
b481de9c 496{
3832ec9d 497 if (priv->shared_virt)
b481de9c 498 pci_free_consistent(priv->pci_dev,
bb8c093b 499 sizeof(struct iwl3945_shared),
3832ec9d
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500 priv->shared_virt,
501 priv->shared_phys);
b481de9c
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502}
503
b481de9c 504#define MAX_UCODE_BEACON_INTERVAL 1024
c1b4aa3f 505#define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
b481de9c 506
bb8c093b 507static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
b481de9c
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508{
509 u16 new_val = 0;
510 u16 beacon_factor = 0;
511
512 beacon_factor =
513 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
514 / MAX_UCODE_BEACON_INTERVAL;
515 new_val = beacon_val / beacon_factor;
516
517 return cpu_to_le16(new_val);
518}
519
4a8a4322 520static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
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521{
522 u64 interval_tm_unit;
523 u64 tsf, result;
524 unsigned long flags;
525 struct ieee80211_conf *conf = NULL;
526 u16 beacon_int = 0;
527
528 conf = ieee80211_get_hw_conf(priv->hw);
529
530 spin_lock_irqsave(&priv->lock, flags);
28afaf91 531 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b481de9c
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532 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
533
28afaf91 534 tsf = priv->timestamp;
b481de9c
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535
536 beacon_int = priv->beacon_int;
537 spin_unlock_irqrestore(&priv->lock, flags);
538
05c914fe 539 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
b481de9c
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540 if (beacon_int == 0) {
541 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
542 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
543 } else {
544 priv->rxon_timing.beacon_interval =
545 cpu_to_le16(beacon_int);
546 priv->rxon_timing.beacon_interval =
bb8c093b 547 iwl3945_adjust_beacon_interval(
b481de9c
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548 le16_to_cpu(priv->rxon_timing.beacon_interval));
549 }
550
551 priv->rxon_timing.atim_window = 0;
552 } else {
553 priv->rxon_timing.beacon_interval =
bb8c093b 554 iwl3945_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
555 /* TODO: we need to get atim_window from upper stack
556 * for now we set to 0 */
557 priv->rxon_timing.atim_window = 0;
558 }
559
560 interval_tm_unit =
561 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
562 result = do_div(tsf, interval_tm_unit);
563 priv->rxon_timing.beacon_init_val =
564 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
565
e1623446
TW
566 IWL_DEBUG_ASSOC(priv,
567 "beacon interval %d beacon timer %d beacon tim %d\n",
b481de9c
ZY
568 le16_to_cpu(priv->rxon_timing.beacon_interval),
569 le32_to_cpu(priv->rxon_timing.beacon_init_val),
570 le16_to_cpu(priv->rxon_timing.atim_window));
571}
572
4a8a4322 573static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
b481de9c 574{
05c914fe 575 if (mode == NL80211_IFTYPE_ADHOC) {
d20b3c65 576 const struct iwl_channel_info *ch_info;
b481de9c 577
e6148917 578 ch_info = iwl_get_channel_info(priv,
8318d78a 579 priv->band,
8ccde88a 580 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
581
582 if (!ch_info || !is_channel_ibss(ch_info)) {
15b1687c 583 IWL_ERR(priv, "channel %d not IBSS channel\n",
8ccde88a 584 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
585 return -EINVAL;
586 }
587 }
588
8ccde88a 589 iwl_connection_init_rx_config(priv, mode);
b481de9c 590
40ace5b3 591 priv->cfg->ops->smgmt->clear_station_table(priv);
b481de9c 592
a96a27f9 593 /* don't commit rxon if rf-kill is on*/
775a6e27 594 if (!iwl_is_ready_rf(priv))
fde3571f
MA
595 return -EAGAIN;
596
597 cancel_delayed_work(&priv->scan_check);
af0053d6 598 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 599 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
e1623446 600 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
fde3571f
MA
601 return -EAGAIN;
602 }
603
e0158e61 604 iwlcore_commit_rxon(priv);
b481de9c
ZY
605
606 return 0;
607}
608
4a8a4322 609static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
e039fa4a 610 struct ieee80211_tx_info *info,
c2d79b48 611 struct iwl_cmd *cmd,
b481de9c 612 struct sk_buff *skb_frag,
6e21f15c 613 int sta_id)
b481de9c 614{
e52119c5 615 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
1c014420 616 struct iwl3945_hw_key *keyinfo =
6e21f15c 617 &priv->stations_39[sta_id].keyinfo;
b481de9c
ZY
618
619 switch (keyinfo->alg) {
620 case ALG_CCMP:
e52119c5
WT
621 tx->sec_ctl = TX_CMD_SEC_CCM;
622 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
e1623446 623 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
b481de9c
ZY
624 break;
625
626 case ALG_TKIP:
b481de9c
ZY
627 break;
628
629 case ALG_WEP:
e52119c5 630 tx->sec_ctl = TX_CMD_SEC_WEP |
e039fa4a 631 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
b481de9c
ZY
632
633 if (keyinfo->keylen == 13)
e52119c5 634 tx->sec_ctl |= TX_CMD_SEC_KEY128;
b481de9c 635
e52119c5 636 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
b481de9c 637
e1623446 638 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
e039fa4a 639 "with key %d\n", info->control.hw_key->hw_key_idx);
b481de9c
ZY
640 break;
641
b481de9c 642 default:
978785a3 643 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
b481de9c
ZY
644 break;
645 }
646}
647
648/*
649 * handle build REPLY_TX command notification.
650 */
4a8a4322 651static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
c2d79b48 652 struct iwl_cmd *cmd,
e039fa4a 653 struct ieee80211_tx_info *info,
e52119c5 654 struct ieee80211_hdr *hdr, u8 std_id)
b481de9c 655{
e52119c5
WT
656 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
657 __le32 tx_flags = tx->tx_flags;
fd7c8a40 658 __le16 fc = hdr->frame_control;
e6a9854b 659 u8 rc_flags = info->control.rates[0].flags;
b481de9c 660
e52119c5 661 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
e039fa4a 662 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
b481de9c 663 tx_flags |= TX_CMD_FLG_ACK_MSK;
fd7c8a40 664 if (ieee80211_is_mgmt(fc))
b481de9c 665 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
fd7c8a40 666 if (ieee80211_is_probe_resp(fc) &&
b481de9c
ZY
667 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
668 tx_flags |= TX_CMD_FLG_TSF_MSK;
669 } else {
670 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
671 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
672 }
673
e52119c5 674 tx->sta_id = std_id;
8b7b1e05 675 if (ieee80211_has_morefrags(fc))
b481de9c
ZY
676 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
677
fd7c8a40
HH
678 if (ieee80211_is_data_qos(fc)) {
679 u8 *qc = ieee80211_get_qos_ctl(hdr);
e52119c5 680 tx->tid_tspec = qc[0] & 0xf;
b481de9c 681 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 682 } else {
b481de9c 683 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 684 }
b481de9c 685
e6a9854b 686 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
b481de9c
ZY
687 tx_flags |= TX_CMD_FLG_RTS_MSK;
688 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
e6a9854b 689 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
b481de9c
ZY
690 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
691 tx_flags |= TX_CMD_FLG_CTS_MSK;
692 }
693
694 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
695 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
696
697 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
fd7c8a40
HH
698 if (ieee80211_is_mgmt(fc)) {
699 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
e52119c5 700 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 701 else
e52119c5 702 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 703 } else {
e52119c5 704 tx->timeout.pm_frame_timeout = 0;
5c8df2d5 705#ifdef CONFIG_IWLWIFI_LEDS
ab53d8af
MA
706 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
707#endif
708 }
b481de9c 709
e52119c5
WT
710 tx->driver_txop = 0;
711 tx->tx_flags = tx_flags;
712 tx->next_frame_len = 0;
b481de9c
ZY
713}
714
6440adb5
CB
715/**
716 * iwl3945_get_sta_id - Find station's index within station table
717 */
4a8a4322 718static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
b481de9c
ZY
719{
720 int sta_id;
721 u16 fc = le16_to_cpu(hdr->frame_control);
722
6440adb5 723 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY
724 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
725 is_multicast_ether_addr(hdr->addr1))
3832ec9d 726 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
727
728 switch (priv->iw_mode) {
729
6440adb5
CB
730 /* If we are a client station in a BSS network, use the special
731 * AP station entry (that's the only station we communicate with) */
05c914fe 732 case NL80211_IFTYPE_STATION:
b481de9c
ZY
733 return IWL_AP_ID;
734
735 /* If we are an AP, then find the station, or use BCAST */
05c914fe 736 case NL80211_IFTYPE_AP:
40ace5b3 737 sta_id = priv->cfg->ops->smgmt->find_station(priv, hdr->addr1);
b481de9c
ZY
738 if (sta_id != IWL_INVALID_STATION)
739 return sta_id;
3832ec9d 740 return priv->hw_params.bcast_sta_id;
b481de9c 741
6440adb5
CB
742 /* If this frame is going out to an IBSS network, find the station,
743 * or create a new station table entry */
05c914fe 744 case NL80211_IFTYPE_ADHOC: {
6440adb5 745 /* Create new station table entry */
40ace5b3 746 sta_id = priv->cfg->ops->smgmt->find_station(priv, hdr->addr1);
b481de9c
ZY
747 if (sta_id != IWL_INVALID_STATION)
748 return sta_id;
749
40ace5b3
AK
750 sta_id = priv->cfg->ops->smgmt->add_station(priv,
751 hdr->addr1, 0, CMD_ASYNC);
b481de9c
ZY
752
753 if (sta_id != IWL_INVALID_STATION)
754 return sta_id;
755
e1623446 756 IWL_DEBUG_DROP(priv, "Station %pM not in station map. "
b481de9c 757 "Defaulting to broadcast...\n",
e174961c 758 hdr->addr1);
40b8ec0b 759 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
3832ec9d 760 return priv->hw_params.bcast_sta_id;
0795af57 761 }
914233d6
SG
762 /* If we are in monitor mode, use BCAST. This is required for
763 * packet injection. */
05c914fe 764 case NL80211_IFTYPE_MONITOR:
3832ec9d 765 return priv->hw_params.bcast_sta_id;
914233d6 766
b481de9c 767 default:
39aadf8c
WT
768 IWL_WARN(priv, "Unknown mode of operation: %d\n",
769 priv->iw_mode);
3832ec9d 770 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
771 }
772}
773
774/*
775 * start REPLY_TX command process
776 */
4a8a4322 777static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
b481de9c
ZY
778{
779 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
e039fa4a 780 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e52119c5 781 struct iwl3945_tx_cmd *tx;
188cf6c7 782 struct iwl_tx_queue *txq = NULL;
d20b3c65 783 struct iwl_queue *q = NULL;
e52119c5 784 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
785 dma_addr_t phys_addr;
786 dma_addr_t txcmd_phys;
e52119c5 787 int txq_id = skb_get_queue_mapping(skb);
54dbb525
TW
788 u16 len, idx, len_org, hdr_len;
789 u8 id;
790 u8 unicast;
b481de9c 791 u8 sta_id;
54dbb525 792 u8 tid = 0;
b481de9c 793 u16 seq_number = 0;
fd7c8a40 794 __le16 fc;
b481de9c 795 u8 wait_write_ptr = 0;
54dbb525 796 u8 *qc = NULL;
b481de9c
ZY
797 unsigned long flags;
798 int rc;
799
800 spin_lock_irqsave(&priv->lock, flags);
775a6e27 801 if (iwl_is_rfkill(priv)) {
e1623446 802 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
b481de9c
ZY
803 goto drop_unlock;
804 }
805
e039fa4a 806 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
15b1687c 807 IWL_ERR(priv, "ERROR: No TX rate available.\n");
b481de9c
ZY
808 goto drop_unlock;
809 }
810
811 unicast = !is_multicast_ether_addr(hdr->addr1);
812 id = 0;
813
fd7c8a40 814 fc = hdr->frame_control;
b481de9c 815
d08853a3 816#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c 817 if (ieee80211_is_auth(fc))
e1623446 818 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
fd7c8a40 819 else if (ieee80211_is_assoc_req(fc))
e1623446 820 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
fd7c8a40 821 else if (ieee80211_is_reassoc_req(fc))
e1623446 822 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
b481de9c
ZY
823#endif
824
7878a5a4 825 /* drop all data frame if we are not associated */
914233d6 826 if (ieee80211_is_data(fc) &&
05c914fe 827 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
8ccde88a 828 (!iwl_is_associated(priv) ||
05c914fe 829 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
e1623446 830 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
b481de9c
ZY
831 goto drop_unlock;
832 }
833
834 spin_unlock_irqrestore(&priv->lock, flags);
835
7294ec95 836 hdr_len = ieee80211_hdrlen(fc);
6440adb5
CB
837
838 /* Find (or create) index into station table for destination station */
bb8c093b 839 sta_id = iwl3945_get_sta_id(priv, hdr);
b481de9c 840 if (sta_id == IWL_INVALID_STATION) {
e1623446 841 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
e174961c 842 hdr->addr1);
b481de9c
ZY
843 goto drop;
844 }
845
e1623446 846 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
b481de9c 847
fd7c8a40
HH
848 if (ieee80211_is_data_qos(fc)) {
849 qc = ieee80211_get_qos_ctl(hdr);
7294ec95 850 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
f2c7e521 851 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
b481de9c
ZY
852 IEEE80211_SCTL_SEQ;
853 hdr->seq_ctrl = cpu_to_le16(seq_number) |
854 (hdr->seq_ctrl &
c1b4aa3f 855 cpu_to_le16(IEEE80211_SCTL_FRAG));
b481de9c
ZY
856 seq_number += 0x10;
857 }
6440adb5
CB
858
859 /* Descriptor for chosen Tx queue */
188cf6c7 860 txq = &priv->txq[txq_id];
b481de9c
ZY
861 q = &txq->q;
862
863 spin_lock_irqsave(&priv->lock, flags);
864
fc4b6853 865 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 866
6440adb5 867 /* Set up driver data for this TFD */
dbb6654c 868 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
fc4b6853 869 txq->txb[q->write_ptr].skb[0] = skb;
6440adb5
CB
870
871 /* Init first empty entry in queue's array of Tx/cmd buffers */
188cf6c7 872 out_cmd = txq->cmd[idx];
e52119c5 873 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
b481de9c 874 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
e52119c5 875 memset(tx, 0, sizeof(*tx));
6440adb5
CB
876
877 /*
878 * Set up the Tx-command (not MAC!) header.
879 * Store the chosen Tx queue and TFD index within the sequence field;
880 * after Tx, uCode's Tx response will return this value so driver can
881 * locate the frame within the tx queue and do post-tx processing.
882 */
b481de9c
ZY
883 out_cmd->hdr.cmd = REPLY_TX;
884 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 885 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB
886
887 /* Copy MAC header from skb into command buffer */
e52119c5 888 memcpy(tx->hdr, hdr, hdr_len);
b481de9c 889
6440adb5
CB
890 /*
891 * Use the first empty entry in this queue's command buffer array
892 * to contain the Tx command and MAC header concatenated together
893 * (payload data will be in another buffer).
894 * Size of this varies, due to varying MAC header length.
895 * If end is not dword aligned, we'll have 2 extra bytes at the end
896 * of the MAC header (device reads on dword boundaries).
897 * We'll tell device about this padding later.
898 */
3832ec9d 899 len = sizeof(struct iwl3945_tx_cmd) +
4c897253 900 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
901
902 len_org = len;
903 len = (len + 3) & ~3;
904
905 if (len_org != len)
906 len_org = 1;
907 else
908 len_org = 0;
909
6440adb5
CB
910 /* Physical address of this Tx command's header (not MAC header!),
911 * within command buffer array. */
188cf6c7
SO
912 txcmd_phys = pci_map_single(priv->pci_dev,
913 out_cmd, sizeof(struct iwl_cmd),
914 PCI_DMA_TODEVICE);
915 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
916 pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
917 /* Add buffer containing Tx command and MAC(!) header to TFD's
918 * first entry */
919 txcmd_phys += offsetof(struct iwl_cmd, hdr);
b481de9c 920
6440adb5
CB
921 /* Add buffer containing Tx command and MAC(!) header to TFD's
922 * first entry */
7aaa1d79
SO
923 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
924 txcmd_phys, len, 1, 0);
b481de9c 925
d0f09804 926 if (info->control.hw_key)
6e21f15c 927 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
b481de9c 928
6440adb5
CB
929 /* Set up TFD's 2nd entry to point directly to remainder of skb,
930 * if any (802.11 null frames have no payload). */
b481de9c
ZY
931 len = skb->len - hdr_len;
932 if (len) {
933 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
934 len, PCI_DMA_TODEVICE);
7aaa1d79
SO
935 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
936 phys_addr, len,
937 0, U32_PAD(len));
b481de9c
ZY
938 }
939
6440adb5 940 /* Total # bytes to be transmitted */
b481de9c 941 len = (u16)skb->len;
e52119c5 942 tx->len = cpu_to_le16(len);
b481de9c
ZY
943
944 /* TODO need this for burst mode later on */
e52119c5 945 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
b481de9c
ZY
946
947 /* set is_hcca to 0; it probably will never be implemented */
e039fa4a 948 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
b481de9c 949
e52119c5
WT
950 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
951 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
b481de9c 952
8b7b1e05 953 if (!ieee80211_has_morefrags(hdr->frame_control)) {
b481de9c 954 txq->need_update = 1;
3ac7f146 955 if (qc)
f2c7e521 956 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
b481de9c
ZY
957 } else {
958 wait_write_ptr = 1;
959 txq->need_update = 0;
960 }
961
e52119c5 962 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
b481de9c 963
e52119c5 964 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
7294ec95 965 ieee80211_hdrlen(fc));
b481de9c 966
6440adb5 967 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 968 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
4f3602c8 969 rc = iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
970 spin_unlock_irqrestore(&priv->lock, flags);
971
972 if (rc)
973 return rc;
974
d20b3c65 975 if ((iwl_queue_space(q) < q->high_mark)
b481de9c
ZY
976 && priv->mac80211_registered) {
977 if (wait_write_ptr) {
978 spin_lock_irqsave(&priv->lock, flags);
979 txq->need_update = 1;
4f3602c8 980 iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
981 spin_unlock_irqrestore(&priv->lock, flags);
982 }
983
e4e72fb4 984 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
b481de9c
ZY
985 }
986
987 return 0;
988
989drop_unlock:
990 spin_unlock_irqrestore(&priv->lock, flags);
991drop:
992 return -1;
993}
994
c8b0e6e1 995#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
996
997#include "iwl-spectrum.h"
998
999#define BEACON_TIME_MASK_LOW 0x00FFFFFF
1000#define BEACON_TIME_MASK_HIGH 0xFF000000
1001#define TIME_UNIT 1024
1002
1003/*
1004 * extended beacon time format
1005 * time in usec will be changed into a 32-bit value in 8:24 format
1006 * the high 1 byte is the beacon counts
1007 * the lower 3 bytes is the time in usec within one beacon interval
1008 */
1009
bb8c093b 1010static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
1011{
1012 u32 quot;
1013 u32 rem;
1014 u32 interval = beacon_interval * 1024;
1015
1016 if (!interval || !usec)
1017 return 0;
1018
1019 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
1020 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
1021
1022 return (quot << 24) + rem;
1023}
1024
1025/* base is usually what we get from ucode with each received frame,
1026 * the same as HW timer counter counting down
1027 */
1028
bb8c093b 1029static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
1030{
1031 u32 base_low = base & BEACON_TIME_MASK_LOW;
1032 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
1033 u32 interval = beacon_interval * TIME_UNIT;
1034 u32 res = (base & BEACON_TIME_MASK_HIGH) +
1035 (addon & BEACON_TIME_MASK_HIGH);
1036
1037 if (base_low > addon_low)
1038 res += base_low - addon_low;
1039 else if (base_low < addon_low) {
1040 res += interval + base_low - addon_low;
1041 res += (1 << 24);
1042 } else
1043 res += (1 << 24);
1044
1045 return cpu_to_le32(res);
1046}
1047
4a8a4322 1048static int iwl3945_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
1049 struct ieee80211_measurement_params *params,
1050 u8 type)
1051{
600c0e11 1052 struct iwl_spectrum_cmd spectrum;
3d24a9f7 1053 struct iwl_rx_packet *res;
c2d79b48 1054 struct iwl_host_cmd cmd = {
b481de9c
ZY
1055 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
1056 .data = (void *)&spectrum,
1057 .meta.flags = CMD_WANT_SKB,
1058 };
1059 u32 add_time = le64_to_cpu(params->start_time);
1060 int rc;
1061 int spectrum_resp_status;
1062 int duration = le16_to_cpu(params->duration);
1063
8ccde88a 1064 if (iwl_is_associated(priv))
b481de9c 1065 add_time =
bb8c093b 1066 iwl3945_usecs_to_beacons(
b481de9c
ZY
1067 le64_to_cpu(params->start_time) - priv->last_tsf,
1068 le16_to_cpu(priv->rxon_timing.beacon_interval));
1069
1070 memset(&spectrum, 0, sizeof(spectrum));
1071
1072 spectrum.channel_count = cpu_to_le16(1);
1073 spectrum.flags =
1074 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
1075 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
1076 cmd.len = sizeof(spectrum);
1077 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
1078
8ccde88a 1079 if (iwl_is_associated(priv))
b481de9c 1080 spectrum.start_time =
bb8c093b 1081 iwl3945_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
1082 add_time,
1083 le16_to_cpu(priv->rxon_timing.beacon_interval));
1084 else
1085 spectrum.start_time = 0;
1086
1087 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
1088 spectrum.channels[0].channel = params->channel;
1089 spectrum.channels[0].type = type;
8ccde88a 1090 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
b481de9c
ZY
1091 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
1092 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
1093
518099a8 1094 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
1095 if (rc)
1096 return rc;
1097
3d24a9f7 1098 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 1099 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 1100 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
b481de9c
ZY
1101 rc = -EIO;
1102 }
1103
1104 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
1105 switch (spectrum_resp_status) {
1106 case 0: /* Command will be handled */
1107 if (res->u.spectrum.id != 0xff) {
e1623446 1108 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
bc434dd2 1109 res->u.spectrum.id);
b481de9c
ZY
1110 priv->measurement_status &= ~MEASUREMENT_READY;
1111 }
1112 priv->measurement_status |= MEASUREMENT_ACTIVE;
1113 rc = 0;
1114 break;
1115
1116 case 1: /* Command will not be handled */
1117 rc = -EAGAIN;
1118 break;
1119 }
1120
1121 dev_kfree_skb_any(cmd.meta.u.skb);
1122
1123 return rc;
1124}
1125#endif
1126
4a8a4322 1127static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
6100b588 1128 struct iwl_rx_mem_buffer *rxb)
b481de9c 1129{
3d24a9f7
TW
1130 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1131 struct iwl_alive_resp *palive;
b481de9c
ZY
1132 struct delayed_work *pwork;
1133
1134 palive = &pkt->u.alive_frame;
1135
e1623446 1136 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY
1137 "0x%01X 0x%01X\n",
1138 palive->is_valid, palive->ver_type,
1139 palive->ver_subtype);
1140
1141 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 1142 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
3d24a9f7
TW
1143 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
1144 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1145 pwork = &priv->init_alive_start;
1146 } else {
e1623446 1147 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 1148 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3d24a9f7 1149 sizeof(struct iwl_alive_resp));
b481de9c 1150 pwork = &priv->alive_start;
bb8c093b 1151 iwl3945_disable_events(priv);
b481de9c
ZY
1152 }
1153
1154 /* We delay the ALIVE response by 5ms to
1155 * give the HW RF Kill time to activate... */
1156 if (palive->is_valid == UCODE_VALID_OK)
1157 queue_delayed_work(priv->workqueue, pwork,
1158 msecs_to_jiffies(5));
1159 else
39aadf8c 1160 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY
1161}
1162
4a8a4322 1163static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
6100b588 1164 struct iwl_rx_mem_buffer *rxb)
b481de9c 1165{
c7e035a9 1166#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1167 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
c7e035a9 1168#endif
b481de9c 1169
e1623446 1170 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
b481de9c
ZY
1171 return;
1172}
1173
bb8c093b 1174static void iwl3945_bg_beacon_update(struct work_struct *work)
b481de9c 1175{
4a8a4322
AK
1176 struct iwl_priv *priv =
1177 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1178 struct sk_buff *beacon;
1179
1180 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1181 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1182
1183 if (!beacon) {
15b1687c 1184 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY
1185 return;
1186 }
1187
1188 mutex_lock(&priv->mutex);
1189 /* new beacon skb is allocated every time; dispose previous.*/
1190 if (priv->ibss_beacon)
1191 dev_kfree_skb(priv->ibss_beacon);
1192
1193 priv->ibss_beacon = beacon;
1194 mutex_unlock(&priv->mutex);
1195
bb8c093b 1196 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
1197}
1198
4a8a4322 1199static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
6100b588 1200 struct iwl_rx_mem_buffer *rxb)
b481de9c 1201{
d08853a3 1202#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1203 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
bb8c093b 1204 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
b481de9c
ZY
1205 u8 rate = beacon->beacon_notify_hdr.rate;
1206
e1623446 1207 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c
ZY
1208 "tsf %d %d rate %d\n",
1209 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
1210 beacon->beacon_notify_hdr.failure_frame,
1211 le32_to_cpu(beacon->ibss_mgr_status),
1212 le32_to_cpu(beacon->high_tsf),
1213 le32_to_cpu(beacon->low_tsf), rate);
1214#endif
1215
05c914fe 1216 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
1217 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1218 queue_work(priv->workqueue, &priv->beacon_update);
1219}
1220
b481de9c
ZY
1221/* Handle notification from uCode that card's power state is changing
1222 * due to software, hardware, or critical temperature RFKILL */
4a8a4322 1223static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
6100b588 1224 struct iwl_rx_mem_buffer *rxb)
b481de9c 1225{
3d24a9f7 1226 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
1227 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1228 unsigned long status = priv->status;
1229
e1623446 1230 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY
1231 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1232 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1233
5d49f498 1234 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1235 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1236
1237 if (flags & HW_CARD_DISABLED)
1238 set_bit(STATUS_RF_KILL_HW, &priv->status);
1239 else
1240 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1241
1242
1243 if (flags & SW_CARD_DISABLED)
1244 set_bit(STATUS_RF_KILL_SW, &priv->status);
1245 else
1246 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1247
af0053d6 1248 iwl_scan_cancel(priv);
b481de9c
ZY
1249
1250 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1251 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1252 (test_bit(STATUS_RF_KILL_SW, &status) !=
1253 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1254 queue_work(priv->workqueue, &priv->rf_kill);
1255 else
1256 wake_up_interruptible(&priv->wait_command_queue);
1257}
1258
1259/**
bb8c093b 1260 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1261 *
1262 * Setup the RX handlers for each of the reply types sent from the uCode
1263 * to the host.
1264 *
1265 * This function chains into the hardware specific files for them to setup
1266 * any hardware specific handlers as well.
1267 */
4a8a4322 1268static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1269{
bb8c093b
CH
1270 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
1271 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
261b9c33 1272 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
8ccde88a 1273 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
030f05ed 1274 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 1275 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
030f05ed 1276 iwl_rx_pm_debug_statistics_notif;
bb8c093b 1277 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
b481de9c 1278
9fbab516
BC
1279 /*
1280 * The same handler is used for both the REPLY to a discrete
1281 * statistics request from the host as well as for the periodic
1282 * statistics notifications (after received beacons) from the uCode.
b481de9c 1283 */
bb8c093b
CH
1284 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
1285 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
b481de9c 1286
261b9c33 1287 iwl_setup_spectrum_handlers(priv);
cade0eb2 1288 iwl_setup_rx_scan_handlers(priv);
bb8c093b 1289 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
b481de9c 1290
9fbab516 1291 /* Set up hardware specific Rx handlers */
bb8c093b 1292 iwl3945_hw_rx_handler_setup(priv);
b481de9c
ZY
1293}
1294
b481de9c
ZY
1295/************************** RX-FUNCTIONS ****************************/
1296/*
1297 * Rx theory of operation
1298 *
1299 * The host allocates 32 DMA target addresses and passes the host address
1300 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1301 * 0 to 31
1302 *
1303 * Rx Queue Indexes
1304 * The host/firmware share two index registers for managing the Rx buffers.
1305 *
1306 * The READ index maps to the first position that the firmware may be writing
1307 * to -- the driver can read up to (but not including) this position and get
1308 * good data.
1309 * The READ index is managed by the firmware once the card is enabled.
1310 *
1311 * The WRITE index maps to the last position the driver has read from -- the
1312 * position preceding WRITE is the last slot the firmware can place a packet.
1313 *
1314 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1315 * WRITE = READ.
1316 *
9fbab516 1317 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
1318 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1319 *
9fbab516 1320 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
1321 * and fire the RX interrupt. The driver can then query the READ index and
1322 * process as many packets as possible, moving the WRITE index forward as it
1323 * resets the Rx queue buffers with new memory.
1324 *
1325 * The management in the driver is as follows:
1326 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1327 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 1328 * to replenish the iwl->rxq->rx_free.
bb8c093b 1329 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
1330 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1331 * 'processed' and 'read' driver indexes as well)
1332 * + A received packet is processed and handed to the kernel network stack,
1333 * detached from the iwl->rxq. The driver 'processed' index is updated.
1334 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1335 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1336 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1337 * were enough free buffers and RX_STALLED is set it is cleared.
1338 *
1339 *
1340 * Driver sequence:
1341 *
9fbab516 1342 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 1343 * iwl3945_rx_queue_restock
9fbab516 1344 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
1345 * queue, updates firmware pointers, and updates
1346 * the WRITE index. If insufficient rx_free buffers
bb8c093b 1347 * are available, schedules iwl3945_rx_replenish
b481de9c
ZY
1348 *
1349 * -- enable interrupts --
6100b588 1350 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
b481de9c
ZY
1351 * READ INDEX, detaching the SKB from the pool.
1352 * Moves the packet buffer from queue to rx_used.
bb8c093b 1353 * Calls iwl3945_rx_queue_restock to refill any empty
b481de9c
ZY
1354 * slots.
1355 * ...
1356 *
1357 */
1358
b481de9c 1359/**
9fbab516 1360 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 1361 */
4a8a4322 1362static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
1363 dma_addr_t dma_addr)
1364{
1365 return cpu_to_le32((u32)dma_addr);
1366}
1367
1368/**
bb8c093b 1369 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 1370 *
9fbab516 1371 * If there are slots in the RX queue that need to be restocked,
b481de9c 1372 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 1373 * as we can, pulling from rx_free.
b481de9c
ZY
1374 *
1375 * This moves the 'write' index forward to catch up with 'processed', and
1376 * also updates the memory address in the firmware to reference the new
1377 * target buffer.
1378 */
4a8a4322 1379static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
b481de9c 1380{
cc2f362c 1381 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1382 struct list_head *element;
6100b588 1383 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1384 unsigned long flags;
1385 int write, rc;
1386
1387 spin_lock_irqsave(&rxq->lock, flags);
1388 write = rxq->write & ~0x7;
37d68317 1389 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 1390 /* Get next free Rx buffer, remove from free list */
b481de9c 1391 element = rxq->rx_free.next;
6100b588 1392 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
b481de9c 1393 list_del(element);
6440adb5
CB
1394
1395 /* Point to Rx buffer via next RBD in circular buffer */
6100b588 1396 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
b481de9c
ZY
1397 rxq->queue[rxq->write] = rxb;
1398 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1399 rxq->free_count--;
1400 }
1401 spin_unlock_irqrestore(&rxq->lock, flags);
1402 /* If the pre-allocated buffer pool is dropping low, schedule to
1403 * refill it */
1404 if (rxq->free_count <= RX_LOW_WATERMARK)
1405 queue_work(priv->workqueue, &priv->rx_replenish);
1406
1407
6440adb5
CB
1408 /* If we've added more space for the firmware to place data, tell it.
1409 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
1410 if ((write != (rxq->write & ~0x7))
1411 || (abs(rxq->write - rxq->read) > 7)) {
1412 spin_lock_irqsave(&rxq->lock, flags);
1413 rxq->need_update = 1;
1414 spin_unlock_irqrestore(&rxq->lock, flags);
141c43a3 1415 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
1416 if (rc)
1417 return rc;
1418 }
1419
1420 return 0;
1421}
1422
1423/**
bb8c093b 1424 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
1425 *
1426 * When moving to rx_free an SKB is allocated for the slot.
1427 *
bb8c093b 1428 * Also restock the Rx queue via iwl3945_rx_queue_restock.
01ebd063 1429 * This is called as a scheduled work item (except for during initialization)
b481de9c 1430 */
4a8a4322 1431static void iwl3945_rx_allocate(struct iwl_priv *priv)
b481de9c 1432{
cc2f362c 1433 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1434 struct list_head *element;
6100b588 1435 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1436 unsigned long flags;
1437 spin_lock_irqsave(&rxq->lock, flags);
1438 while (!list_empty(&rxq->rx_used)) {
1439 element = rxq->rx_used.next;
6100b588 1440 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
6440adb5
CB
1441
1442 /* Alloc a new receive buffer */
b481de9c 1443 rxb->skb =
1e33dc64
WT
1444 alloc_skb(priv->hw_params.rx_buf_size,
1445 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY
1446 if (!rxb->skb) {
1447 if (net_ratelimit())
978785a3 1448 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
b481de9c
ZY
1449 /* We don't reschedule replenish work here -- we will
1450 * call the restock method and if it still needs
1451 * more buffers it will schedule replenish */
1452 break;
1453 }
12342c47
ZY
1454
1455 /* If radiotap head is required, reserve some headroom here.
1456 * The physical head count is a variable rx_stats->phy_count.
1457 * We reserve 4 bytes here. Plus these extra bytes, the
1458 * headroom of the physical head should be enough for the
1459 * radiotap head that iwl3945 supported. See iwl3945_rt.
1460 */
1461 skb_reserve(rxb->skb, 4);
1462
b481de9c
ZY
1463 priv->alloc_rxb_skb++;
1464 list_del(element);
6440adb5
CB
1465
1466 /* Get physical address of RB/SKB */
1e33dc64
WT
1467 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1468 rxb->skb->data,
1469 priv->hw_params.rx_buf_size,
1470 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1471 list_add_tail(&rxb->list, &rxq->rx_free);
1472 rxq->free_count++;
1473 }
1474 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA
1475}
1476
1477/*
1478 * this should be called while priv->lock is locked
1479 */
4fd1f841 1480static void __iwl3945_rx_replenish(void *data)
5c0eef96 1481{
4a8a4322 1482 struct iwl_priv *priv = data;
5c0eef96
MA
1483
1484 iwl3945_rx_allocate(priv);
1485 iwl3945_rx_queue_restock(priv);
1486}
1487
1488
1489void iwl3945_rx_replenish(void *data)
1490{
4a8a4322 1491 struct iwl_priv *priv = data;
5c0eef96
MA
1492 unsigned long flags;
1493
1494 iwl3945_rx_allocate(priv);
b481de9c
ZY
1495
1496 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 1497 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1498 spin_unlock_irqrestore(&priv->lock, flags);
1499}
1500
b481de9c
ZY
1501/* Convert linear signal-to-noise ratio into dB */
1502static u8 ratio2dB[100] = {
1503/* 0 1 2 3 4 5 6 7 8 9 */
1504 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1505 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1506 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1507 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1508 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1509 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1510 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1511 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1512 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1513 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1514};
1515
1516/* Calculates a relative dB value from a ratio of linear
1517 * (i.e. not dB) signal levels.
1518 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 1519int iwl3945_calc_db_from_ratio(int sig_ratio)
b481de9c 1520{
221c80cf
AB
1521 /* 1000:1 or higher just report as 60 dB */
1522 if (sig_ratio >= 1000)
b481de9c
ZY
1523 return 60;
1524
221c80cf 1525 /* 100:1 or higher, divide by 10 and use table,
b481de9c 1526 * add 20 dB to make up for divide by 10 */
221c80cf 1527 if (sig_ratio >= 100)
3ac7f146 1528 return 20 + (int)ratio2dB[sig_ratio/10];
b481de9c
ZY
1529
1530 /* We shouldn't see this */
1531 if (sig_ratio < 1)
1532 return 0;
1533
1534 /* Use table for ratios 1:1 - 99:1 */
1535 return (int)ratio2dB[sig_ratio];
1536}
1537
1538#define PERFECT_RSSI (-20) /* dBm */
1539#define WORST_RSSI (-95) /* dBm */
1540#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1541
1542/* Calculate an indication of rx signal quality (a percentage, not dBm!).
1543 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1544 * about formulas used below. */
bb8c093b 1545int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
1546{
1547 int sig_qual;
1548 int degradation = PERFECT_RSSI - rssi_dbm;
1549
1550 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1551 * as indicator; formula is (signal dbm - noise dbm).
1552 * SNR at or above 40 is a great signal (100%).
1553 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1554 * Weakest usable signal is usually 10 - 15 dB SNR. */
1555 if (noise_dbm) {
1556 if (rssi_dbm - noise_dbm >= 40)
1557 return 100;
1558 else if (rssi_dbm < noise_dbm)
1559 return 0;
1560 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1561
1562 /* Else use just the signal level.
1563 * This formula is a least squares fit of data points collected and
1564 * compared with a reference system that had a percentage (%) display
1565 * for signal quality. */
1566 } else
1567 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1568 (15 * RSSI_RANGE + 62 * degradation)) /
1569 (RSSI_RANGE * RSSI_RANGE);
1570
1571 if (sig_qual > 100)
1572 sig_qual = 100;
1573 else if (sig_qual < 1)
1574 sig_qual = 0;
1575
1576 return sig_qual;
1577}
1578
1579/**
9fbab516 1580 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1581 *
1582 * Uses the priv->rx_handlers callback function array to invoke
1583 * the appropriate handlers, including command responses,
1584 * frame-received notifications, and other notifications.
1585 */
4a8a4322 1586static void iwl3945_rx_handle(struct iwl_priv *priv)
b481de9c 1587{
6100b588 1588 struct iwl_rx_mem_buffer *rxb;
3d24a9f7 1589 struct iwl_rx_packet *pkt;
cc2f362c 1590 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1591 u32 r, i;
1592 int reclaim;
1593 unsigned long flags;
5c0eef96 1594 u8 fill_rx = 0;
d68ab680 1595 u32 count = 8;
b481de9c 1596
6440adb5
CB
1597 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1598 * buffer that the driver may process (last buffer filled by ucode). */
8cd812bc 1599 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
1600 i = rxq->read;
1601
37d68317 1602 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96 1603 fill_rx = 1;
b481de9c
ZY
1604 /* Rx interrupt, but nothing sent from uCode */
1605 if (i == r)
e1623446 1606 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
b481de9c
ZY
1607
1608 while (i != r) {
1609 rxb = rxq->queue[i];
1610
9fbab516 1611 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1612 * then a bug has been introduced in the queue refilling
1613 * routines -- catch it here */
1614 BUG_ON(rxb == NULL);
1615
1616 rxq->queue[i] = NULL;
1617
6100b588 1618 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
1e33dc64 1619 priv->hw_params.rx_buf_size,
b481de9c 1620 PCI_DMA_FROMDEVICE);
3d24a9f7 1621 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1622
1623 /* Reclaim a command buffer only if this packet is a response
1624 * to a (driver-originated) command.
1625 * If the packet (e.g. Rx frame) originated from uCode,
1626 * there is no command buffer to reclaim.
1627 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1628 * but apparently a few don't get set; catch them here. */
1629 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1630 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1631 (pkt->hdr.cmd != REPLY_TX);
1632
1633 /* Based on type of command response or notification,
1634 * handle those that need handling via function in
bb8c093b 1635 * rx_handlers table. See iwl3945_setup_rx_handlers() */
b481de9c 1636 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 1637 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1638 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1639 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1640 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1641 } else {
1642 /* No handling needed */
e1623446 1643 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1644 "r %d i %d No handler needed for %s, 0x%02x\n",
1645 r, i, get_cmd_string(pkt->hdr.cmd),
1646 pkt->hdr.cmd);
1647 }
1648
1649 if (reclaim) {
9fbab516 1650 /* Invoke any callbacks, transfer the skb to caller, and
518099a8 1651 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1652 * as we reclaim the driver command queue */
1653 if (rxb && rxb->skb)
732587ab 1654 iwl_tx_cmd_complete(priv, rxb);
b481de9c 1655 else
39aadf8c 1656 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY
1657 }
1658
1659 /* For now we just don't re-use anything. We can tweak this
1660 * later to try and re-use notification packets and SKBs that
1661 * fail to Rx correctly */
1662 if (rxb->skb != NULL) {
1663 priv->alloc_rxb_skb--;
1664 dev_kfree_skb_any(rxb->skb);
1665 rxb->skb = NULL;
1666 }
1667
6100b588 1668 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1e33dc64
WT
1669 priv->hw_params.rx_buf_size,
1670 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1671 spin_lock_irqsave(&rxq->lock, flags);
1672 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1673 spin_unlock_irqrestore(&rxq->lock, flags);
1674 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1675 /* If there are a lot of unused frames,
1676 * restock the Rx queue so ucode won't assert. */
1677 if (fill_rx) {
1678 count++;
1679 if (count >= 8) {
1680 priv->rxq.read = i;
1681 __iwl3945_rx_replenish(priv);
1682 count = 0;
1683 }
1684 }
b481de9c
ZY
1685 }
1686
1687 /* Backtrack one entry */
1688 priv->rxq.read = i;
bb8c093b 1689 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1690}
1691
0359facc 1692/* call this function to flush any scheduled tasklet */
4a8a4322 1693static inline void iwl_synchronize_irq(struct iwl_priv *priv)
0359facc 1694{
a96a27f9 1695 /* wait to make sure we flush pending tasklet*/
0359facc
MA
1696 synchronize_irq(priv->pci_dev->irq);
1697 tasklet_kill(&priv->irq_tasklet);
1698}
1699
b481de9c
ZY
1700static const char *desc_lookup(int i)
1701{
1702 switch (i) {
1703 case 1:
1704 return "FAIL";
1705 case 2:
1706 return "BAD_PARAM";
1707 case 3:
1708 return "BAD_CHECKSUM";
1709 case 4:
1710 return "NMI_INTERRUPT";
1711 case 5:
1712 return "SYSASSERT";
1713 case 6:
1714 return "FATAL_ERROR";
1715 }
1716
1717 return "UNKNOWN";
1718}
1719
1720#define ERROR_START_OFFSET (1 * sizeof(u32))
1721#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1722
4a8a4322 1723static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
1724{
1725 u32 i;
1726 u32 desc, time, count, base, data1;
1727 u32 blink1, blink2, ilink1, ilink2;
1728 int rc;
1729
1730 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1731
bb8c093b 1732 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 1733 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
b481de9c
ZY
1734 return;
1735 }
1736
5d49f498 1737 rc = iwl_grab_nic_access(priv);
b481de9c 1738 if (rc) {
39aadf8c 1739 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
1740 return;
1741 }
1742
5d49f498 1743 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
1744
1745 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT
1746 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1747 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1748 priv->status, count);
b481de9c
ZY
1749 }
1750
15b1687c 1751 IWL_ERR(priv, "Desc Time asrtPC blink2 "
b481de9c
ZY
1752 "ilink1 nmiPC Line\n");
1753 for (i = ERROR_START_OFFSET;
1754 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1755 i += ERROR_ELEM_SIZE) {
5d49f498 1756 desc = iwl_read_targ_mem(priv, base + i);
b481de9c 1757 time =
5d49f498 1758 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
b481de9c 1759 blink1 =
5d49f498 1760 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
b481de9c 1761 blink2 =
5d49f498 1762 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
b481de9c 1763 ilink1 =
5d49f498 1764 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
b481de9c 1765 ilink2 =
5d49f498 1766 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
b481de9c 1767 data1 =
5d49f498 1768 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
b481de9c 1769
15b1687c
WT
1770 IWL_ERR(priv,
1771 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1772 desc_lookup(desc), desc, time, blink1, blink2,
1773 ilink1, ilink2, data1);
b481de9c
ZY
1774 }
1775
5d49f498 1776 iwl_release_nic_access(priv);
b481de9c
ZY
1777
1778}
1779
f58177b9 1780#define EVENT_START_OFFSET (6 * sizeof(u32))
b481de9c
ZY
1781
1782/**
bb8c093b 1783 * iwl3945_print_event_log - Dump error event log to syslog
b481de9c 1784 *
5d49f498 1785 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 1786 */
4a8a4322 1787static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
1788 u32 num_events, u32 mode)
1789{
1790 u32 i;
1791 u32 base; /* SRAM byte address of event log header */
1792 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1793 u32 ptr; /* SRAM byte address of log data */
1794 u32 ev, time, data; /* event log data */
1795
1796 if (num_events == 0)
1797 return;
1798
1799 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1800
1801 if (mode == 0)
1802 event_size = 2 * sizeof(u32);
1803 else
1804 event_size = 3 * sizeof(u32);
1805
1806 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1807
1808 /* "time" is actually "data" for mode 0 (no timestamp).
1809 * place event id # at far right for easier visual parsing. */
1810 for (i = 0; i < num_events; i++) {
5d49f498 1811 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 1812 ptr += sizeof(u32);
5d49f498 1813 time = iwl_read_targ_mem(priv, ptr);
b481de9c 1814 ptr += sizeof(u32);
15b1687c
WT
1815 if (mode == 0) {
1816 /* data, ev */
1817 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1818 } else {
5d49f498 1819 data = iwl_read_targ_mem(priv, ptr);
b481de9c 1820 ptr += sizeof(u32);
15b1687c 1821 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
b481de9c
ZY
1822 }
1823 }
1824}
1825
4a8a4322 1826static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY
1827{
1828 int rc;
1829 u32 base; /* SRAM byte address of event log header */
1830 u32 capacity; /* event log capacity in # entries */
1831 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1832 u32 num_wraps; /* # times uCode wrapped to top of log */
1833 u32 next_entry; /* index of next entry to be written by uCode */
1834 u32 size; /* # entries that we'll print */
1835
1836 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 1837 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 1838 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
b481de9c
ZY
1839 return;
1840 }
1841
5d49f498 1842 rc = iwl_grab_nic_access(priv);
b481de9c 1843 if (rc) {
39aadf8c 1844 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
1845 return;
1846 }
1847
1848 /* event log header */
5d49f498
AK
1849 capacity = iwl_read_targ_mem(priv, base);
1850 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1851 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1852 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
1853
1854 size = num_wraps ? capacity : next_entry;
1855
1856 /* bail out if nothing in log */
1857 if (size == 0) {
15b1687c 1858 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
5d49f498 1859 iwl_release_nic_access(priv);
b481de9c
ZY
1860 return;
1861 }
1862
15b1687c 1863 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
1864 size, num_wraps);
1865
1866 /* if uCode has wrapped back to top of log, start at the oldest entry,
1867 * i.e the next one that uCode would fill. */
1868 if (num_wraps)
bb8c093b 1869 iwl3945_print_event_log(priv, next_entry,
b481de9c
ZY
1870 capacity - next_entry, mode);
1871
1872 /* (then/else) start at top of log */
bb8c093b 1873 iwl3945_print_event_log(priv, 0, next_entry, mode);
b481de9c 1874
5d49f498 1875 iwl_release_nic_access(priv);
b481de9c
ZY
1876}
1877
4a8a4322 1878static void iwl3945_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1879{
1880 unsigned long flags;
1881
8ccde88a
SO
1882 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1883 sizeof(priv->staging_rxon));
1884 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 1885 iwlcore_commit_rxon(priv);
b481de9c 1886
40ace5b3 1887 priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 1, 0);
b481de9c
ZY
1888
1889 spin_lock_irqsave(&priv->lock, flags);
8ccde88a 1890 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
b481de9c
ZY
1891 priv->error_recovering = 0;
1892 spin_unlock_irqrestore(&priv->lock, flags);
1893}
1894
4a8a4322 1895static void iwl3945_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1896{
1897 u32 inta, handled = 0;
1898 u32 inta_fh;
1899 unsigned long flags;
d08853a3 1900#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1901 u32 inta_mask;
1902#endif
1903
1904 spin_lock_irqsave(&priv->lock, flags);
1905
1906 /* Ack/clear/reset pending uCode interrupts.
1907 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1908 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5d49f498
AK
1909 inta = iwl_read32(priv, CSR_INT);
1910 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1911
1912 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1913 * Any new interrupts that happen after this, either while we're
1914 * in this tasklet, or later, will show up in next ISR/tasklet. */
5d49f498
AK
1915 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1916 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1917
d08853a3 1918#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 1919 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1920 /* just for debug */
5d49f498 1921 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 1922 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
1923 inta, inta_mask, inta_fh);
1924 }
1925#endif
1926
1927 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1928 * atomic, make sure that inta covers all the interrupts that
1929 * we've discovered, even if FH interrupt came in just after
1930 * reading CSR_INT. */
6f83eaa1 1931 if (inta_fh & CSR39_FH_INT_RX_MASK)
b481de9c 1932 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1933 if (inta_fh & CSR39_FH_INT_TX_MASK)
b481de9c
ZY
1934 inta |= CSR_INT_BIT_FH_TX;
1935
1936 /* Now service all interrupt bits discovered above. */
1937 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 1938 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY
1939
1940 /* Tell the device to stop sending interrupts */
ed3b932e 1941 iwl_disable_interrupts(priv);
b481de9c 1942
8ccde88a 1943 iwl_irq_handle_error(priv);
b481de9c
ZY
1944
1945 handled |= CSR_INT_BIT_HW_ERR;
1946
1947 spin_unlock_irqrestore(&priv->lock, flags);
1948
1949 return;
1950 }
1951
d08853a3 1952#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 1953 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1954 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e 1955 if (inta & CSR_INT_BIT_SCD)
e1623446 1956 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 1957 "the frame/frames.\n");
b481de9c
ZY
1958
1959 /* Alive notification via Rx interrupt will do the real work */
1960 if (inta & CSR_INT_BIT_ALIVE)
e1623446 1961 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
b481de9c
ZY
1962 }
1963#endif
1964 /* Safely ignore these bits for debug checks below */
25c03d8e 1965 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1966
b481de9c
ZY
1967 /* Error detected by uCode */
1968 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT
1969 IWL_ERR(priv, "Microcode SW error detected. "
1970 "Restarting 0x%X.\n", inta);
8ccde88a 1971 iwl_irq_handle_error(priv);
b481de9c
ZY
1972 handled |= CSR_INT_BIT_SW_ERR;
1973 }
1974
1975 /* uCode wakes up after power-down sleep */
1976 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 1977 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
141c43a3 1978 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
4f3602c8
SO
1979 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1980 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1981 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1982 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1983 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1984 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1985
1986 handled |= CSR_INT_BIT_WAKEUP;
1987 }
1988
1989 /* All uCode command responses, including Tx command responses,
1990 * Rx "responses" (frame-received notification), and other
1991 * notifications from uCode come through here*/
1992 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 1993 iwl3945_rx_handle(priv);
b481de9c
ZY
1994 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1995 }
1996
1997 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 1998 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
b481de9c 1999
5d49f498
AK
2000 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
2001 if (!iwl_grab_nic_access(priv)) {
2002 iwl_write_direct32(priv, FH39_TCSR_CREDIT
bddadf86 2003 (FH39_SRVC_CHNL), 0x0);
5d49f498 2004 iwl_release_nic_access(priv);
b481de9c
ZY
2005 }
2006 handled |= CSR_INT_BIT_FH_TX;
2007 }
2008
2009 if (inta & ~handled)
15b1687c 2010 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY
2011
2012 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 2013 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 2014 inta & ~CSR_INI_SET_MASK);
39aadf8c 2015 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY
2016 }
2017
2018 /* Re-enable all interrupts */
0359facc
MA
2019 /* only Re-enable if disabled by irq */
2020 if (test_bit(STATUS_INT_ENABLED, &priv->status))
ed3b932e 2021 iwl_enable_interrupts(priv);
b481de9c 2022
d08853a3 2023#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2024 if (priv->debug_level & (IWL_DL_ISR)) {
5d49f498
AK
2025 inta = iwl_read32(priv, CSR_INT);
2026 inta_mask = iwl_read32(priv, CSR_INT_MASK);
2027 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 2028 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY
2029 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
2030 }
2031#endif
2032 spin_unlock_irqrestore(&priv->lock, flags);
2033}
2034
4a8a4322 2035static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 2036 enum ieee80211_band band,
f9340520 2037 u8 is_active, u8 n_probes,
bb8c093b 2038 struct iwl3945_scan_channel *scan_ch)
b481de9c
ZY
2039{
2040 const struct ieee80211_channel *channels = NULL;
8318d78a 2041 const struct ieee80211_supported_band *sband;
d20b3c65 2042 const struct iwl_channel_info *ch_info;
b481de9c
ZY
2043 u16 passive_dwell = 0;
2044 u16 active_dwell = 0;
2045 int added, i;
2046
cbba18c6 2047 sband = iwl_get_hw_mode(priv, band);
8318d78a 2048 if (!sband)
b481de9c
ZY
2049 return 0;
2050
8318d78a 2051 channels = sband->channels;
b481de9c 2052
77fecfb8
SO
2053 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
2054 passive_dwell = iwl_get_passive_dwell_time(priv, band);
b481de9c 2055
8f4807a1
AK
2056 if (passive_dwell <= active_dwell)
2057 passive_dwell = active_dwell + 1;
2058
8318d78a 2059 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB
2060 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
2061 continue;
2062
8318d78a 2063 scan_ch->channel = channels[i].hw_value;
b481de9c 2064
e6148917 2065 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
b481de9c 2066 if (!is_channel_valid(ch_info)) {
e1623446 2067 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
b481de9c
ZY
2068 scan_ch->channel);
2069 continue;
2070 }
2071
011a0330
AK
2072 scan_ch->active_dwell = cpu_to_le16(active_dwell);
2073 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
2074 /* If passive , set up for auto-switch
2075 * and use long active_dwell time.
2076 */
b481de9c 2077 if (!is_active || is_channel_passive(ch_info) ||
011a0330 2078 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
b481de9c 2079 scan_ch->type = 0; /* passive */
011a0330
AK
2080 if (IWL_UCODE_API(priv->ucode_ver) == 1)
2081 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
2082 } else {
b481de9c 2083 scan_ch->type = 1; /* active */
011a0330 2084 }
b481de9c 2085
011a0330
AK
2086 /* Set direct probe bits. These may be used both for active
2087 * scan channels (probes gets sent right away),
2088 * or for passive channels (probes get se sent only after
2089 * hearing clear Rx packet).*/
2090 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
2091 if (n_probes)
0d21044e 2092 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330
AK
2093 } else {
2094 /* uCode v1 does not allow setting direct probe bits on
2095 * passive channel. */
2096 if ((scan_ch->type & 1) && n_probes)
0d21044e 2097 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330 2098 }
b481de9c 2099
9fbab516 2100 /* Set txpower levels to defaults */
b481de9c
ZY
2101 scan_ch->tpc.dsp_atten = 110;
2102 /* scan_pwr_info->tpc.dsp_atten; */
2103
2104 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 2105 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
2106 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
2107 else {
2108 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
2109 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 2110 * power level:
8a1b0245 2111 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
2112 */
2113 }
2114
e1623446 2115 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
b481de9c
ZY
2116 scan_ch->channel,
2117 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
2118 (scan_ch->type & 1) ?
2119 active_dwell : passive_dwell);
2120
2121 scan_ch++;
2122 added++;
2123 }
2124
e1623446 2125 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
b481de9c
ZY
2126 return added;
2127}
2128
4a8a4322 2129static void iwl3945_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
2130 struct ieee80211_rate *rates)
2131{
2132 int i;
2133
2134 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
2135 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
2136 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2137 rates[i].hw_value_short = i;
2138 rates[i].flags = 0;
d9829a67 2139 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 2140 /*
8318d78a 2141 * If CCK != 1M then set short preamble rate flag.
b481de9c 2142 */
bb8c093b 2143 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
8318d78a 2144 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 2145 }
b481de9c
ZY
2146 }
2147}
2148
b481de9c
ZY
2149/******************************************************************************
2150 *
2151 * uCode download functions
2152 *
2153 ******************************************************************************/
2154
4a8a4322 2155static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 2156{
98c92211
TW
2157 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
2158 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
2159 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2160 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
2161 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2162 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
2163}
2164
2165/**
bb8c093b 2166 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
2167 * looking at all data.
2168 */
4a8a4322 2169static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2170{
2171 u32 val;
2172 u32 save_len = len;
2173 int rc = 0;
2174 u32 errcnt;
2175
e1623446 2176 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2177
5d49f498 2178 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2179 if (rc)
2180 return rc;
2181
5d49f498 2182 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2183 IWL39_RTC_INST_LOWER_BOUND);
b481de9c
ZY
2184
2185 errcnt = 0;
2186 for (; len > 0; len -= sizeof(u32), image++) {
2187 /* read data comes through single port, auto-incr addr */
2188 /* NOTE: Use the debugless read so we don't flood kernel log
2189 * if IWL_DL_IO is set */
5d49f498 2190 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c 2191 if (val != le32_to_cpu(*image)) {
15b1687c 2192 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2193 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2194 save_len - len, val, le32_to_cpu(*image));
2195 rc = -EIO;
2196 errcnt++;
2197 if (errcnt >= 20)
2198 break;
2199 }
2200 }
2201
5d49f498 2202 iwl_release_nic_access(priv);
b481de9c
ZY
2203
2204 if (!errcnt)
e1623446
TW
2205 IWL_DEBUG_INFO(priv,
2206 "ucode image in INSTRUCTION memory is good\n");
b481de9c
ZY
2207
2208 return rc;
2209}
2210
2211
2212/**
bb8c093b 2213 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
2214 * using sample data 100 bytes apart. If these sample points are good,
2215 * it's a pretty good bet that everything between them is good, too.
2216 */
4a8a4322 2217static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2218{
2219 u32 val;
2220 int rc = 0;
2221 u32 errcnt = 0;
2222 u32 i;
2223
e1623446 2224 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2225
5d49f498 2226 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2227 if (rc)
2228 return rc;
2229
2230 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2231 /* read data comes through single port, auto-incr addr */
2232 /* NOTE: Use the debugless read so we don't flood kernel log
2233 * if IWL_DL_IO is set */
5d49f498 2234 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2235 i + IWL39_RTC_INST_LOWER_BOUND);
5d49f498 2236 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
2237 if (val != le32_to_cpu(*image)) {
2238#if 0 /* Enable this if you want to see details */
15b1687c 2239 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2240 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2241 i, val, *image);
2242#endif
2243 rc = -EIO;
2244 errcnt++;
2245 if (errcnt >= 3)
2246 break;
2247 }
2248 }
2249
5d49f498 2250 iwl_release_nic_access(priv);
b481de9c
ZY
2251
2252 return rc;
2253}
2254
2255
2256/**
bb8c093b 2257 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
2258 * and verify its contents
2259 */
4a8a4322 2260static int iwl3945_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
2261{
2262 __le32 *image;
2263 u32 len;
2264 int rc = 0;
2265
2266 /* Try bootstrap */
2267 image = (__le32 *)priv->ucode_boot.v_addr;
2268 len = priv->ucode_boot.len;
bb8c093b 2269 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2270 if (rc == 0) {
e1623446 2271 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b481de9c
ZY
2272 return 0;
2273 }
2274
2275 /* Try initialize */
2276 image = (__le32 *)priv->ucode_init.v_addr;
2277 len = priv->ucode_init.len;
bb8c093b 2278 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2279 if (rc == 0) {
e1623446 2280 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b481de9c
ZY
2281 return 0;
2282 }
2283
2284 /* Try runtime/protocol */
2285 image = (__le32 *)priv->ucode_code.v_addr;
2286 len = priv->ucode_code.len;
bb8c093b 2287 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2288 if (rc == 0) {
e1623446 2289 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b481de9c
ZY
2290 return 0;
2291 }
2292
15b1687c 2293 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b481de9c 2294
9fbab516
BC
2295 /* Since nothing seems to match, show first several data entries in
2296 * instruction SRAM, so maybe visual inspection will give a clue.
2297 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
2298 image = (__le32 *)priv->ucode_boot.v_addr;
2299 len = priv->ucode_boot.len;
bb8c093b 2300 rc = iwl3945_verify_inst_full(priv, image, len);
b481de9c
ZY
2301
2302 return rc;
2303}
2304
4a8a4322 2305static void iwl3945_nic_start(struct iwl_priv *priv)
b481de9c
ZY
2306{
2307 /* Remove all resets to allow NIC to operate */
5d49f498 2308 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
2309}
2310
2311/**
bb8c093b 2312 * iwl3945_read_ucode - Read uCode images from disk file.
b481de9c
ZY
2313 *
2314 * Copy into buffers for card to fetch via bus-mastering
2315 */
4a8a4322 2316static int iwl3945_read_ucode(struct iwl_priv *priv)
b481de9c 2317{
a78fe754 2318 struct iwl_ucode *ucode;
a0987a8d 2319 int ret = -EINVAL, index;
b481de9c
ZY
2320 const struct firmware *ucode_raw;
2321 /* firmware file name contains uCode/driver compatibility version */
a0987a8d
RC
2322 const char *name_pre = priv->cfg->fw_name_pre;
2323 const unsigned int api_max = priv->cfg->ucode_api_max;
2324 const unsigned int api_min = priv->cfg->ucode_api_min;
2325 char buf[25];
b481de9c
ZY
2326 u8 *src;
2327 size_t len;
a0987a8d 2328 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
2329
2330 /* Ask kernel firmware_class module to get the boot firmware off disk.
2331 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
2332 for (index = api_max; index >= api_min; index--) {
2333 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2334 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2335 if (ret < 0) {
15b1687c 2336 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC
2337 buf, ret);
2338 if (ret == -ENOENT)
2339 continue;
2340 else
2341 goto error;
2342 } else {
2343 if (index < api_max)
15b1687c
WT
2344 IWL_ERR(priv, "Loaded firmware %s, "
2345 "which is deprecated. "
2346 " Please use API v%u instead.\n",
a0987a8d 2347 buf, api_max);
e1623446
TW
2348 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2349 "(%zd bytes) from disk\n",
a0987a8d
RC
2350 buf, ucode_raw->size);
2351 break;
2352 }
b481de9c
ZY
2353 }
2354
a0987a8d
RC
2355 if (ret < 0)
2356 goto error;
b481de9c
ZY
2357
2358 /* Make sure that we got at least our header! */
2359 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 2360 IWL_ERR(priv, "File size way too small!\n");
90e759d1 2361 ret = -EINVAL;
b481de9c
ZY
2362 goto err_release;
2363 }
2364
2365 /* Data from ucode file: header followed by uCode images */
2366 ucode = (void *)ucode_raw->data;
2367
c02b3acd 2368 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 2369 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY
2370 inst_size = le32_to_cpu(ucode->inst_size);
2371 data_size = le32_to_cpu(ucode->data_size);
2372 init_size = le32_to_cpu(ucode->init_size);
2373 init_data_size = le32_to_cpu(ucode->init_data_size);
2374 boot_size = le32_to_cpu(ucode->boot_size);
2375
a0987a8d
RC
2376 /* api_ver should match the api version forming part of the
2377 * firmware filename ... but we don't check for that and only rely
877d0310 2378 * on the API version read from firmware header from here on forward */
a0987a8d
RC
2379
2380 if (api_ver < api_min || api_ver > api_max) {
15b1687c 2381 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC
2382 "Driver supports v%u, firmware is v%u.\n",
2383 api_max, api_ver);
2384 priv->ucode_ver = 0;
2385 ret = -EINVAL;
2386 goto err_release;
2387 }
2388 if (api_ver != api_max)
15b1687c 2389 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
a0987a8d
RC
2390 "got %u. New firmware can be obtained "
2391 "from http://www.intellinuxwireless.org.\n",
2392 api_max, api_ver);
2393
978785a3
TW
2394 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2395 IWL_UCODE_MAJOR(priv->ucode_ver),
2396 IWL_UCODE_MINOR(priv->ucode_ver),
2397 IWL_UCODE_API(priv->ucode_ver),
2398 IWL_UCODE_SERIAL(priv->ucode_ver));
2399
e1623446 2400 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 2401 priv->ucode_ver);
e1623446
TW
2402 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2403 inst_size);
2404 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2405 data_size);
2406 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2407 init_size);
2408 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2409 init_data_size);
2410 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2411 boot_size);
b481de9c 2412
a0987a8d 2413
b481de9c
ZY
2414 /* Verify size of file vs. image size info in file's header */
2415 if (ucode_raw->size < sizeof(*ucode) +
2416 inst_size + data_size + init_size +
2417 init_data_size + boot_size) {
2418
e1623446
TW
2419 IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
2420 ucode_raw->size);
90e759d1 2421 ret = -EINVAL;
b481de9c
ZY
2422 goto err_release;
2423 }
2424
2425 /* Verify that uCode images will fit in card's SRAM */
250bdd21 2426 if (inst_size > IWL39_MAX_INST_SIZE) {
e1623446 2427 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW
2428 inst_size);
2429 ret = -EINVAL;
b481de9c
ZY
2430 goto err_release;
2431 }
2432
250bdd21 2433 if (data_size > IWL39_MAX_DATA_SIZE) {
e1623446 2434 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW
2435 data_size);
2436 ret = -EINVAL;
b481de9c
ZY
2437 goto err_release;
2438 }
250bdd21 2439 if (init_size > IWL39_MAX_INST_SIZE) {
e1623446
TW
2440 IWL_DEBUG_INFO(priv,
2441 "uCode init instr len %d too large to fit in\n",
90e759d1
TW
2442 init_size);
2443 ret = -EINVAL;
b481de9c
ZY
2444 goto err_release;
2445 }
250bdd21 2446 if (init_data_size > IWL39_MAX_DATA_SIZE) {
e1623446
TW
2447 IWL_DEBUG_INFO(priv,
2448 "uCode init data len %d too large to fit in\n",
90e759d1
TW
2449 init_data_size);
2450 ret = -EINVAL;
b481de9c
ZY
2451 goto err_release;
2452 }
250bdd21 2453 if (boot_size > IWL39_MAX_BSM_SIZE) {
e1623446
TW
2454 IWL_DEBUG_INFO(priv,
2455 "uCode boot instr len %d too large to fit in\n",
90e759d1
TW
2456 boot_size);
2457 ret = -EINVAL;
b481de9c
ZY
2458 goto err_release;
2459 }
2460
2461 /* Allocate ucode buffers for card's bus-master loading ... */
2462
2463 /* Runtime instructions and 2 copies of data:
2464 * 1) unmodified from disk
2465 * 2) backup cache for save/restore during power-downs */
2466 priv->ucode_code.len = inst_size;
98c92211 2467 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
2468
2469 priv->ucode_data.len = data_size;
98c92211 2470 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
2471
2472 priv->ucode_data_backup.len = data_size;
98c92211 2473 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 2474
90e759d1
TW
2475 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2476 !priv->ucode_data_backup.v_addr)
2477 goto err_pci_alloc;
b481de9c
ZY
2478
2479 /* Initialization instructions and data */
90e759d1
TW
2480 if (init_size && init_data_size) {
2481 priv->ucode_init.len = init_size;
98c92211 2482 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
2483
2484 priv->ucode_init_data.len = init_data_size;
98c92211 2485 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
2486
2487 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2488 goto err_pci_alloc;
2489 }
b481de9c
ZY
2490
2491 /* Bootstrap (instructions only, no data) */
90e759d1
TW
2492 if (boot_size) {
2493 priv->ucode_boot.len = boot_size;
98c92211 2494 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 2495
90e759d1
TW
2496 if (!priv->ucode_boot.v_addr)
2497 goto err_pci_alloc;
2498 }
b481de9c
ZY
2499
2500 /* Copy images into buffers for card's bus-master reads ... */
2501
2502 /* Runtime instructions (first block of data in file) */
2503 src = &ucode->data[0];
2504 len = priv->ucode_code.len;
e1623446
TW
2505 IWL_DEBUG_INFO(priv,
2506 "Copying (but not loading) uCode instr len %zd\n", len);
b481de9c 2507 memcpy(priv->ucode_code.v_addr, src, len);
e1623446 2508 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY
2509 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2510
2511 /* Runtime data (2nd block)
bb8c093b 2512 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
b481de9c
ZY
2513 src = &ucode->data[inst_size];
2514 len = priv->ucode_data.len;
e1623446
TW
2515 IWL_DEBUG_INFO(priv,
2516 "Copying (but not loading) uCode data len %zd\n", len);
b481de9c
ZY
2517 memcpy(priv->ucode_data.v_addr, src, len);
2518 memcpy(priv->ucode_data_backup.v_addr, src, len);
2519
2520 /* Initialization instructions (3rd block) */
2521 if (init_size) {
2522 src = &ucode->data[inst_size + data_size];
2523 len = priv->ucode_init.len;
e1623446
TW
2524 IWL_DEBUG_INFO(priv,
2525 "Copying (but not loading) init instr len %zd\n", len);
b481de9c
ZY
2526 memcpy(priv->ucode_init.v_addr, src, len);
2527 }
2528
2529 /* Initialization data (4th block) */
2530 if (init_data_size) {
2531 src = &ucode->data[inst_size + data_size + init_size];
2532 len = priv->ucode_init_data.len;
e1623446
TW
2533 IWL_DEBUG_INFO(priv,
2534 "Copying (but not loading) init data len %zd\n", len);
b481de9c
ZY
2535 memcpy(priv->ucode_init_data.v_addr, src, len);
2536 }
2537
2538 /* Bootstrap instructions (5th block) */
2539 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
2540 len = priv->ucode_boot.len;
e1623446
TW
2541 IWL_DEBUG_INFO(priv,
2542 "Copying (but not loading) boot instr len %zd\n", len);
b481de9c
ZY
2543 memcpy(priv->ucode_boot.v_addr, src, len);
2544
2545 /* We have our copies now, allow OS release its copies */
2546 release_firmware(ucode_raw);
2547 return 0;
2548
2549 err_pci_alloc:
15b1687c 2550 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 2551 ret = -ENOMEM;
bb8c093b 2552 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
2553
2554 err_release:
2555 release_firmware(ucode_raw);
2556
2557 error:
90e759d1 2558 return ret;
b481de9c
ZY
2559}
2560
2561
2562/**
bb8c093b 2563 * iwl3945_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
2564 *
2565 * Tell initialization uCode where to find runtime uCode.
2566 *
2567 * BSM registers initially contain pointers to initialization uCode.
2568 * We need to replace them to load runtime uCode inst and data,
2569 * and to save runtime data when powering down.
2570 */
4a8a4322 2571static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
2572{
2573 dma_addr_t pinst;
2574 dma_addr_t pdata;
2575 int rc = 0;
2576 unsigned long flags;
2577
2578 /* bits 31:0 for 3945 */
2579 pinst = priv->ucode_code.p_addr;
2580 pdata = priv->ucode_data_backup.p_addr;
2581
2582 spin_lock_irqsave(&priv->lock, flags);
5d49f498 2583 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2584 if (rc) {
2585 spin_unlock_irqrestore(&priv->lock, flags);
2586 return rc;
2587 }
2588
2589 /* Tell bootstrap uCode where to find image to load */
5d49f498
AK
2590 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2591 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2592 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
2593 priv->ucode_data.len);
2594
a96a27f9 2595 /* Inst byte count must be last to set up, bit 31 signals uCode
b481de9c 2596 * that all new ptr/size info is in place */
5d49f498 2597 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
2598 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2599
5d49f498 2600 iwl_release_nic_access(priv);
b481de9c
ZY
2601
2602 spin_unlock_irqrestore(&priv->lock, flags);
2603
e1623446 2604 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
b481de9c
ZY
2605
2606 return rc;
2607}
2608
2609/**
bb8c093b 2610 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
2611 *
2612 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2613 *
b481de9c 2614 * Tell "initialize" uCode to go ahead and load the runtime uCode.
9fbab516 2615 */
4a8a4322 2616static void iwl3945_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
2617{
2618 /* Check alive response for "valid" sign from uCode */
2619 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2620 /* We had an error bringing up the hardware, so take it
2621 * all the way back down so we can try again */
e1623446 2622 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
b481de9c
ZY
2623 goto restart;
2624 }
2625
2626 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2627 * This is a paranoid check, because we would not have gotten the
2628 * "initialize" alive if code weren't properly loaded. */
bb8c093b 2629 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2630 /* Runtime instruction load was bad;
2631 * take it all the way back down so we can try again */
e1623446 2632 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
b481de9c
ZY
2633 goto restart;
2634 }
2635
2636 /* Send pointers to protocol/runtime uCode image ... init code will
2637 * load and launch runtime uCode, which will send us another "Alive"
2638 * notification. */
e1623446 2639 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
bb8c093b 2640 if (iwl3945_set_ucode_ptrs(priv)) {
b481de9c
ZY
2641 /* Runtime instruction load won't happen;
2642 * take it all the way back down so we can try again */
e1623446 2643 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
b481de9c
ZY
2644 goto restart;
2645 }
2646 return;
2647
2648 restart:
2649 queue_work(priv->workqueue, &priv->restart);
2650}
2651
b481de9c 2652/**
bb8c093b 2653 * iwl3945_alive_start - called after REPLY_ALIVE notification received
b481de9c 2654 * from protocol/runtime uCode (initialization uCode's
bb8c093b 2655 * Alive gets handled by iwl3945_init_alive_start()).
b481de9c 2656 */
4a8a4322 2657static void iwl3945_alive_start(struct iwl_priv *priv)
b481de9c
ZY
2658{
2659 int rc = 0;
2660 int thermal_spin = 0;
2661 u32 rfkill;
2662
e1623446 2663 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY
2664
2665 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2666 /* We had an error bringing up the hardware, so take it
2667 * all the way back down so we can try again */
e1623446 2668 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY
2669 goto restart;
2670 }
2671
2672 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2673 * This is a paranoid check, because we would not have gotten the
2674 * "runtime" alive if code weren't properly loaded. */
bb8c093b 2675 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2676 /* Runtime instruction load was bad;
2677 * take it all the way back down so we can try again */
e1623446 2678 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY
2679 goto restart;
2680 }
2681
40ace5b3 2682 priv->cfg->ops->smgmt->clear_station_table(priv);
b481de9c 2683
5d49f498 2684 rc = iwl_grab_nic_access(priv);
b481de9c 2685 if (rc) {
39aadf8c 2686 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
b481de9c
ZY
2687 return;
2688 }
2689
5d49f498 2690 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
e1623446 2691 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
5d49f498 2692 iwl_release_nic_access(priv);
b481de9c
ZY
2693
2694 if (rfkill & 0x1) {
2695 clear_bit(STATUS_RF_KILL_HW, &priv->status);
a96a27f9 2696 /* if RFKILL is not on, then wait for thermal
b481de9c 2697 * sensor in adapter to kick in */
bb8c093b 2698 while (iwl3945_hw_get_temperature(priv) == 0) {
b481de9c
ZY
2699 thermal_spin++;
2700 udelay(10);
2701 }
2702
2703 if (thermal_spin)
e1623446 2704 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
b481de9c
ZY
2705 thermal_spin * 10);
2706 } else
2707 set_bit(STATUS_RF_KILL_HW, &priv->status);
2708
9fbab516 2709 /* After the ALIVE response, we can send commands to 3945 uCode */
b481de9c
ZY
2710 set_bit(STATUS_ALIVE, &priv->status);
2711
2712 /* Clear out the uCode error bit if it is set */
2713 clear_bit(STATUS_FW_ERROR, &priv->status);
2714
775a6e27 2715 if (iwl_is_rfkill(priv))
b481de9c
ZY
2716 return;
2717
36d6825b 2718 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2719
2720 priv->active_rate = priv->rates_mask;
2721 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2722
d25aabb0 2723 iwl_power_update_mode(priv, false);
b481de9c 2724
8ccde88a 2725 if (iwl_is_associated(priv)) {
bb8c093b 2726 struct iwl3945_rxon_cmd *active_rxon =
8ccde88a 2727 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
b481de9c 2728
8ccde88a
SO
2729 memcpy(&priv->staging_rxon, &priv->active_rxon,
2730 sizeof(priv->staging_rxon));
b481de9c
ZY
2731 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2732 } else {
2733 /* Initialize our rx_config data */
8ccde88a 2734 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
2735 }
2736
9fbab516 2737 /* Configure Bluetooth device coexistence support */
17f841cd 2738 iwl_send_bt_config(priv);
b481de9c
ZY
2739
2740 /* Configure the adapter for unassociated operation */
e0158e61 2741 iwlcore_commit_rxon(priv);
b481de9c 2742
b481de9c
ZY
2743 iwl3945_reg_txpower_periodic(priv);
2744
fe00b5a5
RC
2745 iwl3945_led_register(priv);
2746
e1623446 2747 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 2748 set_bit(STATUS_READY, &priv->status);
5a66926a 2749 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
2750
2751 if (priv->error_recovering)
bb8c093b 2752 iwl3945_error_recovery(priv);
b481de9c 2753
9bdf5eca
MA
2754 /* reassociate for ADHOC mode */
2755 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2756 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2757 priv->vif);
2758 if (beacon)
9944b938 2759 iwl_mac_beacon_update(priv->hw, beacon);
9bdf5eca
MA
2760 }
2761
f45c2714
AK
2762 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2763 iwl3945_set_mode(priv, priv->iw_mode);
2764
b481de9c
ZY
2765 return;
2766
2767 restart:
2768 queue_work(priv->workqueue, &priv->restart);
2769}
2770
4a8a4322 2771static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2772
4a8a4322 2773static void __iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
2774{
2775 unsigned long flags;
2776 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2777 struct ieee80211_conf *conf = NULL;
2778
e1623446 2779 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c
ZY
2780
2781 conf = ieee80211_get_hw_conf(priv->hw);
2782
2783 if (!exit_pending)
2784 set_bit(STATUS_EXIT_PENDING, &priv->status);
2785
ab53d8af 2786 iwl3945_led_unregister(priv);
40ace5b3 2787 priv->cfg->ops->smgmt->clear_station_table(priv);
b481de9c
ZY
2788
2789 /* Unblock any waiting calls */
2790 wake_up_interruptible_all(&priv->wait_command_queue);
2791
b481de9c
ZY
2792 /* Wipe out the EXIT_PENDING status bit if we are not actually
2793 * exiting the module */
2794 if (!exit_pending)
2795 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2796
2797 /* stop and reset the on-board processor */
5d49f498 2798 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2799
2800 /* tell the device to stop sending interrupts */
0359facc 2801 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 2802 iwl_disable_interrupts(priv);
0359facc
MA
2803 spin_unlock_irqrestore(&priv->lock, flags);
2804 iwl_synchronize_irq(priv);
b481de9c
ZY
2805
2806 if (priv->mac80211_registered)
2807 ieee80211_stop_queues(priv->hw);
2808
bb8c093b 2809 /* If we have not previously called iwl3945_init() then
6da3a13e 2810 * clear all bits but the RF Kill bits and return */
775a6e27 2811 if (!iwl_is_init(priv)) {
b481de9c
ZY
2812 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2813 STATUS_RF_KILL_HW |
2814 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2815 STATUS_RF_KILL_SW |
9788864e
RC
2816 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2817 STATUS_GEO_CONFIGURED |
ebef2008
AK
2818 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2819 STATUS_EXIT_PENDING;
b481de9c
ZY
2820 goto exit;
2821 }
2822
6da3a13e
WYG
2823 /* ...otherwise clear out all the status bits but the RF Kill
2824 * bits and continue taking the NIC down. */
b481de9c
ZY
2825 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2826 STATUS_RF_KILL_HW |
2827 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2828 STATUS_RF_KILL_SW |
9788864e
RC
2829 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2830 STATUS_GEO_CONFIGURED |
b481de9c 2831 test_bit(STATUS_FW_ERROR, &priv->status) <<
ebef2008
AK
2832 STATUS_FW_ERROR |
2833 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2834 STATUS_EXIT_PENDING;
b481de9c 2835
e9414b6b 2836 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 2837 spin_lock_irqsave(&priv->lock, flags);
5d49f498 2838 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2839 spin_unlock_irqrestore(&priv->lock, flags);
2840
bb8c093b
CH
2841 iwl3945_hw_txq_ctx_stop(priv);
2842 iwl3945_hw_rxq_stop(priv);
b481de9c
ZY
2843
2844 spin_lock_irqsave(&priv->lock, flags);
5d49f498
AK
2845 if (!iwl_grab_nic_access(priv)) {
2846 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 2847 APMG_CLK_VAL_DMA_CLK_RQT);
5d49f498 2848 iwl_release_nic_access(priv);
b481de9c
ZY
2849 }
2850 spin_unlock_irqrestore(&priv->lock, flags);
2851
2852 udelay(5);
2853
6da3a13e 2854 if (exit_pending)
e9414b6b
AM
2855 priv->cfg->ops->lib->apm_ops.stop(priv);
2856 else
2857 priv->cfg->ops->lib->apm_ops.reset(priv);
2858
b481de9c 2859 exit:
3d24a9f7 2860 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2861
2862 if (priv->ibss_beacon)
2863 dev_kfree_skb(priv->ibss_beacon);
2864 priv->ibss_beacon = NULL;
2865
2866 /* clear out any free frames */
bb8c093b 2867 iwl3945_clear_free_frames(priv);
b481de9c
ZY
2868}
2869
4a8a4322 2870static void iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
2871{
2872 mutex_lock(&priv->mutex);
bb8c093b 2873 __iwl3945_down(priv);
b481de9c 2874 mutex_unlock(&priv->mutex);
b24d22b1 2875
bb8c093b 2876 iwl3945_cancel_deferred_work(priv);
b481de9c
ZY
2877}
2878
2879#define MAX_HW_RESTARTS 5
2880
4a8a4322 2881static int __iwl3945_up(struct iwl_priv *priv)
b481de9c
ZY
2882{
2883 int rc, i;
2884
2885 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 2886 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY
2887 return -EIO;
2888 }
2889
2890 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
39aadf8c 2891 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
b481de9c 2892 "parameter)\n");
e655b9f0
ZY
2893 return -ENODEV;
2894 }
2895
e903fbd4 2896 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 2897 IWL_ERR(priv, "ucode not available for device bring up\n");
e903fbd4
RC
2898 return -EIO;
2899 }
2900
e655b9f0 2901 /* If platform's RF_KILL switch is NOT set to KILL */
5d49f498 2902 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
2903 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2904 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2905 else {
2906 set_bit(STATUS_RF_KILL_HW, &priv->status);
6da3a13e
WYG
2907 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2908 return -ENODEV;
b481de9c 2909 }
80fcc9e2 2910
5d49f498 2911 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2912
bb8c093b 2913 rc = iwl3945_hw_nic_init(priv);
b481de9c 2914 if (rc) {
15b1687c 2915 IWL_ERR(priv, "Unable to int nic\n");
b481de9c
ZY
2916 return rc;
2917 }
2918
2919 /* make sure rfkill handshake bits are cleared */
5d49f498
AK
2920 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2921 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2922 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2923
2924 /* clear (again), then enable host interrupts */
5d49f498 2925 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
ed3b932e 2926 iwl_enable_interrupts(priv);
b481de9c
ZY
2927
2928 /* really make sure rfkill handshake bits are cleared */
5d49f498
AK
2929 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2930 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2931
2932 /* Copy original ucode data image from disk into backup cache.
2933 * This will be used to initialize the on-board processor's
2934 * data SRAM for a clean start when the runtime program first loads. */
2935 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2936 priv->ucode_data.len);
b481de9c 2937
e655b9f0
ZY
2938 /* We return success when we resume from suspend and rf_kill is on. */
2939 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2940 return 0;
2941
b481de9c
ZY
2942 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2943
40ace5b3 2944 priv->cfg->ops->smgmt->clear_station_table(priv);
b481de9c
ZY
2945
2946 /* load bootstrap state machine,
2947 * load bootstrap program into processor's memory,
2948 * prepare to load the "initialize" uCode */
0164b9b4 2949 priv->cfg->ops->lib->load_ucode(priv);
b481de9c
ZY
2950
2951 if (rc) {
15b1687c
WT
2952 IWL_ERR(priv,
2953 "Unable to set up bootstrap uCode: %d\n", rc);
b481de9c
ZY
2954 continue;
2955 }
2956
2957 /* start card; "initialize" will load runtime ucode */
bb8c093b 2958 iwl3945_nic_start(priv);
b481de9c 2959
e1623446 2960 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY
2961
2962 return 0;
2963 }
2964
2965 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2966 __iwl3945_down(priv);
ebef2008 2967 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2968
2969 /* tried to restart and config the device for as long as our
2970 * patience could withstand */
15b1687c 2971 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY
2972 return -EIO;
2973}
2974
2975
2976/*****************************************************************************
2977 *
2978 * Workqueue callbacks
2979 *
2980 *****************************************************************************/
2981
bb8c093b 2982static void iwl3945_bg_init_alive_start(struct work_struct *data)
b481de9c 2983{
4a8a4322
AK
2984 struct iwl_priv *priv =
2985 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2986
2987 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2988 return;
2989
2990 mutex_lock(&priv->mutex);
bb8c093b 2991 iwl3945_init_alive_start(priv);
b481de9c
ZY
2992 mutex_unlock(&priv->mutex);
2993}
2994
bb8c093b 2995static void iwl3945_bg_alive_start(struct work_struct *data)
b481de9c 2996{
4a8a4322
AK
2997 struct iwl_priv *priv =
2998 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2999
3000 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3001 return;
3002
3003 mutex_lock(&priv->mutex);
bb8c093b 3004 iwl3945_alive_start(priv);
b481de9c
ZY
3005 mutex_unlock(&priv->mutex);
3006}
3007
2663516d
HS
3008static void iwl3945_rfkill_poll(struct work_struct *data)
3009{
3010 struct iwl_priv *priv =
3011 container_of(data, struct iwl_priv, rfkill_poll.work);
3012 unsigned long status = priv->status;
3013
3014 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3015 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3016 else
3017 set_bit(STATUS_RF_KILL_HW, &priv->status);
3018
3019 if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
3020 queue_work(priv->workqueue, &priv->rf_kill);
3021
3022 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3023 round_jiffies_relative(2 * HZ));
3024
3025}
3026
b481de9c 3027#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
bb8c093b 3028static void iwl3945_bg_request_scan(struct work_struct *data)
b481de9c 3029{
4a8a4322
AK
3030 struct iwl_priv *priv =
3031 container_of(data, struct iwl_priv, request_scan);
c2d79b48 3032 struct iwl_host_cmd cmd = {
b481de9c 3033 .id = REPLY_SCAN_CMD,
bb8c093b 3034 .len = sizeof(struct iwl3945_scan_cmd),
b481de9c
ZY
3035 .meta.flags = CMD_SIZE_HUGE,
3036 };
3037 int rc = 0;
bb8c093b 3038 struct iwl3945_scan_cmd *scan;
b481de9c 3039 struct ieee80211_conf *conf = NULL;
f9340520 3040 u8 n_probes = 2;
8318d78a 3041 enum ieee80211_band band;
9387b7ca 3042 DECLARE_SSID_BUF(ssid);
b481de9c
ZY
3043
3044 conf = ieee80211_get_hw_conf(priv->hw);
3045
3046 mutex_lock(&priv->mutex);
3047
775a6e27 3048 if (!iwl_is_ready(priv)) {
39aadf8c 3049 IWL_WARN(priv, "request scan called when driver not ready.\n");
b481de9c
ZY
3050 goto done;
3051 }
3052
a96a27f9 3053 /* Make sure the scan wasn't canceled before this queued work
b481de9c
ZY
3054 * was given the chance to run... */
3055 if (!test_bit(STATUS_SCANNING, &priv->status))
3056 goto done;
3057
3058 /* This should never be called or scheduled if there is currently
3059 * a scan active in the hardware. */
3060 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
e1623446
TW
3061 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
3062 "Ignoring second request.\n");
b481de9c
ZY
3063 rc = -EIO;
3064 goto done;
3065 }
3066
3067 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 3068 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
b481de9c
ZY
3069 goto done;
3070 }
3071
3072 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
e1623446
TW
3073 IWL_DEBUG_HC(priv,
3074 "Scan request while abort pending. Queuing.\n");
b481de9c
ZY
3075 goto done;
3076 }
3077
775a6e27 3078 if (iwl_is_rfkill(priv)) {
e1623446 3079 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
b481de9c
ZY
3080 goto done;
3081 }
3082
3083 if (!test_bit(STATUS_READY, &priv->status)) {
e1623446
TW
3084 IWL_DEBUG_HC(priv,
3085 "Scan request while uninitialized. Queuing.\n");
b481de9c
ZY
3086 goto done;
3087 }
3088
3089 if (!priv->scan_bands) {
e1623446 3090 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
b481de9c
ZY
3091 goto done;
3092 }
3093
805cee5b
WT
3094 if (!priv->scan) {
3095 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
b481de9c 3096 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
805cee5b 3097 if (!priv->scan) {
b481de9c
ZY
3098 rc = -ENOMEM;
3099 goto done;
3100 }
3101 }
805cee5b 3102 scan = priv->scan;
bb8c093b 3103 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
3104
3105 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
3106 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
3107
8ccde88a 3108 if (iwl_is_associated(priv)) {
b481de9c
ZY
3109 u16 interval = 0;
3110 u32 extra;
3111 u32 suspend_time = 100;
3112 u32 scan_suspend_time = 100;
3113 unsigned long flags;
3114
e1623446 3115 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
b481de9c
ZY
3116
3117 spin_lock_irqsave(&priv->lock, flags);
3118 interval = priv->beacon_int;
3119 spin_unlock_irqrestore(&priv->lock, flags);
3120
3121 scan->suspend_time = 0;
15e869d8 3122 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
3123 if (!interval)
3124 interval = suspend_time;
3125 /*
3126 * suspend time format:
3127 * 0-19: beacon interval in usec (time before exec.)
3128 * 20-23: 0
3129 * 24-31: number of beacons (suspend between channels)
3130 */
3131
3132 extra = (suspend_time / interval) << 24;
3133 scan_suspend_time = 0xFF0FFFFF &
3134 (extra | ((suspend_time % interval) * 1024));
3135
3136 scan->suspend_time = cpu_to_le32(scan_suspend_time);
e1623446 3137 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
b481de9c
ZY
3138 scan_suspend_time, interval);
3139 }
3140
3141 /* We should add the ability for user to lock to PASSIVE ONLY */
3142 if (priv->one_direct_scan) {
e1623446
TW
3143 IWL_DEBUG_SCAN(priv, "Kicking off one direct scan for '%s'\n",
3144 print_ssid(ssid, priv->direct_ssid,
9387b7ca 3145 priv->direct_ssid_len));
b481de9c
ZY
3146 scan->direct_scan[0].id = WLAN_EID_SSID;
3147 scan->direct_scan[0].len = priv->direct_ssid_len;
3148 memcpy(scan->direct_scan[0].ssid,
3149 priv->direct_ssid, priv->direct_ssid_len);
f9340520 3150 n_probes++;
f9340520 3151 } else
e1623446 3152 IWL_DEBUG_SCAN(priv, "Kicking off one indirect scan.\n");
b481de9c
ZY
3153
3154 /* We don't build a direct scan probe request; the uCode will do
3155 * that based on the direct_mask added to each channel entry */
b481de9c 3156 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
3832ec9d 3157 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
3158 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3159
3160 /* flags + rate selection */
3161
66b5004d 3162 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
b481de9c
ZY
3163 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
3164 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
3165 scan->good_CRC_th = 0;
8318d78a 3166 band = IEEE80211_BAND_2GHZ;
66b5004d 3167 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
b481de9c
ZY
3168 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
3169 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 3170 band = IEEE80211_BAND_5GHZ;
66b5004d 3171 } else {
39aadf8c 3172 IWL_WARN(priv, "Invalid scan band count\n");
b481de9c
ZY
3173 goto done;
3174 }
3175
77fecfb8
SO
3176 scan->tx_cmd.len = cpu_to_le16(
3177 iwl_fill_probe_req(priv, band,
3178 (struct ieee80211_mgmt *)scan->data,
3179 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
3180
b481de9c
ZY
3181 /* select Rx antennas */
3182 scan->flags |= iwl3945_get_antenna_flags(priv);
3183
05c914fe 3184 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
b481de9c
ZY
3185 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
3186
f9340520
AK
3187 scan->channel_count =
3188 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
3189 n_probes,
3190 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 3191
14b54336 3192 if (scan->channel_count == 0) {
e1623446 3193 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
14b54336
RC
3194 goto done;
3195 }
3196
b481de9c 3197 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 3198 scan->channel_count * sizeof(struct iwl3945_scan_channel);
b481de9c
ZY
3199 cmd.data = scan;
3200 scan->len = cpu_to_le16(cmd.len);
3201
3202 set_bit(STATUS_SCAN_HW, &priv->status);
518099a8 3203 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
3204 if (rc)
3205 goto done;
3206
3207 queue_delayed_work(priv->workqueue, &priv->scan_check,
3208 IWL_SCAN_CHECK_WATCHDOG);
3209
3210 mutex_unlock(&priv->mutex);
3211 return;
3212
3213 done:
2420ebc1
MA
3214 /* can not perform scan make sure we clear scanning
3215 * bits from status so next scan request can be performed.
3216 * if we dont clear scanning status bit here all next scan
3217 * will fail
3218 */
3219 clear_bit(STATUS_SCAN_HW, &priv->status);
3220 clear_bit(STATUS_SCANNING, &priv->status);
3221
01ebd063 3222 /* inform mac80211 scan aborted */
b481de9c
ZY
3223 queue_work(priv->workqueue, &priv->scan_completed);
3224 mutex_unlock(&priv->mutex);
3225}
3226
bb8c093b 3227static void iwl3945_bg_up(struct work_struct *data)
b481de9c 3228{
4a8a4322 3229 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
3230
3231 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3232 return;
3233
3234 mutex_lock(&priv->mutex);
bb8c093b 3235 __iwl3945_up(priv);
b481de9c 3236 mutex_unlock(&priv->mutex);
c0af96a6 3237 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
3238}
3239
bb8c093b 3240static void iwl3945_bg_restart(struct work_struct *data)
b481de9c 3241{
4a8a4322 3242 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
3243
3244 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3245 return;
3246
bb8c093b 3247 iwl3945_down(priv);
b481de9c
ZY
3248 queue_work(priv->workqueue, &priv->up);
3249}
3250
bb8c093b 3251static void iwl3945_bg_rx_replenish(struct work_struct *data)
b481de9c 3252{
4a8a4322
AK
3253 struct iwl_priv *priv =
3254 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
3255
3256 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3257 return;
3258
3259 mutex_lock(&priv->mutex);
bb8c093b 3260 iwl3945_rx_replenish(priv);
b481de9c
ZY
3261 mutex_unlock(&priv->mutex);
3262}
3263
5bbe233b
AK
3264static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
3265
7878a5a4
MA
3266#define IWL_DELAY_NEXT_SCAN (HZ*2)
3267
5bbe233b 3268void iwl3945_post_associate(struct iwl_priv *priv)
b481de9c 3269{
b481de9c
ZY
3270 int rc = 0;
3271 struct ieee80211_conf *conf = NULL;
3272
05c914fe 3273 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 3274 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
3275 return;
3276 }
3277
3278
e1623446 3279 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
8ccde88a 3280 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
3281
3282 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3283 return;
3284
322a9811 3285 if (!priv->vif || !priv->is_open)
6ef89d0a 3286 return;
322a9811 3287
af0053d6 3288 iwl_scan_cancel_timeout(priv, 200);
15e869d8 3289
b481de9c
ZY
3290 conf = ieee80211_get_hw_conf(priv->hw);
3291
8ccde88a 3292 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 3293 iwlcore_commit_rxon(priv);
b481de9c 3294
28afaf91 3295 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 3296 iwl3945_setup_rxon_timing(priv);
518099a8 3297 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
3298 sizeof(priv->rxon_timing), &priv->rxon_timing);
3299 if (rc)
39aadf8c 3300 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3301 "Attempting to continue.\n");
3302
8ccde88a 3303 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c 3304
8ccde88a 3305 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3306
e1623446 3307 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY
3308 priv->assoc_id, priv->beacon_int);
3309
3310 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3311 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3312 else
8ccde88a 3313 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3314
8ccde88a 3315 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c 3316 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3317 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3318 else
8ccde88a 3319 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3320
05c914fe 3321 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3322 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c
ZY
3323
3324 }
3325
e0158e61 3326 iwlcore_commit_rxon(priv);
b481de9c
ZY
3327
3328 switch (priv->iw_mode) {
05c914fe 3329 case NL80211_IFTYPE_STATION:
bb8c093b 3330 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
3331 break;
3332
05c914fe 3333 case NL80211_IFTYPE_ADHOC:
b481de9c 3334
ce546fd2 3335 priv->assoc_id = 1;
40ace5b3 3336 priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 0, 0);
b481de9c 3337 iwl3945_sync_sta(priv, IWL_STA_ID,
8318d78a 3338 (priv->band == IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
3339 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3340 CMD_ASYNC);
bb8c093b
CH
3341 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3342 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3343
3344 break;
3345
3346 default:
15b1687c 3347 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 3348 __func__, priv->iw_mode);
b481de9c
ZY
3349 break;
3350 }
3351
14d2aac5 3352 iwl_activate_qos(priv, 0);
292ae174 3353
7878a5a4
MA
3354 /* we have just associated, don't start scan too early */
3355 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
cd56d331
AK
3356}
3357
b481de9c
ZY
3358/*****************************************************************************
3359 *
3360 * mac80211 entry point functions
3361 *
3362 *****************************************************************************/
3363
5a66926a
ZY
3364#define UCODE_READY_TIMEOUT (2 * HZ)
3365
bb8c093b 3366static int iwl3945_mac_start(struct ieee80211_hw *hw)
b481de9c 3367{
4a8a4322 3368 struct iwl_priv *priv = hw->priv;
5a66926a 3369 int ret;
b481de9c 3370
e1623446 3371 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
3372
3373 /* we should be verifying the device is ready to be opened */
3374 mutex_lock(&priv->mutex);
3375
8ccde88a 3376 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
5a66926a
ZY
3377 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3378 * ucode filename and max sizes are card-specific. */
3379
3380 if (!priv->ucode_code.len) {
3381 ret = iwl3945_read_ucode(priv);
3382 if (ret) {
15b1687c 3383 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a
ZY
3384 mutex_unlock(&priv->mutex);
3385 goto out_release_irq;
3386 }
3387 }
b481de9c 3388
e655b9f0 3389 ret = __iwl3945_up(priv);
b481de9c
ZY
3390
3391 mutex_unlock(&priv->mutex);
5a66926a 3392
c0af96a6 3393 iwl_rfkill_set_hw_state(priv);
80fcc9e2 3394
e655b9f0
ZY
3395 if (ret)
3396 goto out_release_irq;
3397
e1623446 3398 IWL_DEBUG_INFO(priv, "Start UP work.\n");
e655b9f0 3399
5a66926a
ZY
3400 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3401 * mac80211 will not be run successfully. */
3402 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3403 test_bit(STATUS_READY, &priv->status),
3404 UCODE_READY_TIMEOUT);
3405 if (!ret) {
3406 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c
WT
3407 IWL_ERR(priv,
3408 "Wait for START_ALIVE timeout after %dms.\n",
3409 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5a66926a
ZY
3410 ret = -ETIMEDOUT;
3411 goto out_release_irq;
3412 }
3413 }
3414
2663516d
HS
3415 /* ucode is running and will send rfkill notifications,
3416 * no need to poll the killswitch state anymore */
3417 cancel_delayed_work(&priv->rfkill_poll);
3418
e655b9f0 3419 priv->is_open = 1;
e1623446 3420 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3421 return 0;
5a66926a
ZY
3422
3423out_release_irq:
e655b9f0 3424 priv->is_open = 0;
e1623446 3425 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
5a66926a 3426 return ret;
b481de9c
ZY
3427}
3428
bb8c093b 3429static void iwl3945_mac_stop(struct ieee80211_hw *hw)
b481de9c 3430{
4a8a4322 3431 struct iwl_priv *priv = hw->priv;
b481de9c 3432
e1623446 3433 IWL_DEBUG_MAC80211(priv, "enter\n");
6ef89d0a 3434
e655b9f0 3435 if (!priv->is_open) {
e1623446 3436 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY
3437 return;
3438 }
3439
b481de9c 3440 priv->is_open = 0;
5a66926a 3441
775a6e27 3442 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
3443 /* stop mac, cancel any scan request and clear
3444 * RXON_FILTER_ASSOC_MSK BIT
3445 */
5a66926a 3446 mutex_lock(&priv->mutex);
af0053d6 3447 iwl_scan_cancel_timeout(priv, 100);
fde3571f 3448 mutex_unlock(&priv->mutex);
fde3571f
MA
3449 }
3450
5a66926a
ZY
3451 iwl3945_down(priv);
3452
3453 flush_workqueue(priv->workqueue);
2663516d
HS
3454
3455 /* start polling the killswitch state again */
3456 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3457 round_jiffies_relative(2 * HZ));
6ef89d0a 3458
e1623446 3459 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3460}
3461
e039fa4a 3462static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3463{
4a8a4322 3464 struct iwl_priv *priv = hw->priv;
b481de9c 3465
e1623446 3466 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3467
e1623446 3468 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 3469 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 3470
e039fa4a 3471 if (iwl3945_tx_skb(priv, skb))
b481de9c
ZY
3472 dev_kfree_skb_any(skb);
3473
e1623446 3474 IWL_DEBUG_MAC80211(priv, "leave\n");
637f8837 3475 return NETDEV_TX_OK;
b481de9c
ZY
3476}
3477
bb8c093b 3478static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3479 struct ieee80211_if_init_conf *conf)
3480{
4a8a4322 3481 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3482 unsigned long flags;
3483
e1623446 3484 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
b481de9c 3485
32bfd35d 3486 if (priv->vif) {
e1623446 3487 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
864792e3 3488 return -EOPNOTSUPP;
b481de9c
ZY
3489 }
3490
3491 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 3492 priv->vif = conf->vif;
60294de3 3493 priv->iw_mode = conf->type;
b481de9c
ZY
3494
3495 spin_unlock_irqrestore(&priv->lock, flags);
3496
3497 mutex_lock(&priv->mutex);
864792e3
TW
3498
3499 if (conf->mac_addr) {
e1623446 3500 IWL_DEBUG_MAC80211(priv, "Set: %pM\n", conf->mac_addr);
864792e3
TW
3501 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
3502 }
3503
f45c2714
AK
3504 if (iwl3945_set_mode(priv, conf->type) == -EAGAIN)
3505 set_bit(STATUS_MODE_PENDING, &priv->status);
b481de9c 3506
b481de9c
ZY
3507 mutex_unlock(&priv->mutex);
3508
e1623446 3509 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3510 return 0;
3511}
3512
3513/**
bb8c093b 3514 * iwl3945_mac_config - mac80211 config callback
b481de9c
ZY
3515 *
3516 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
3517 * be set inappropriately and the driver currently sets the hardware up to
3518 * use it whenever needed.
3519 */
e8975581 3520static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 3521{
4a8a4322 3522 struct iwl_priv *priv = hw->priv;
d20b3c65 3523 const struct iwl_channel_info *ch_info;
e8975581 3524 struct ieee80211_conf *conf = &hw->conf;
b481de9c 3525 unsigned long flags;
76bb77e0 3526 int ret = 0;
b481de9c
ZY
3527
3528 mutex_lock(&priv->mutex);
e1623446
TW
3529 IWL_DEBUG_MAC80211(priv, "enter to channel %d\n",
3530 conf->channel->hw_value);
b481de9c 3531
775a6e27 3532 if (!iwl_is_ready(priv)) {
e1623446 3533 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
76bb77e0
ZY
3534 ret = -EIO;
3535 goto out;
b481de9c
ZY
3536 }
3537
df878d8f 3538 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
b481de9c 3539 test_bit(STATUS_SCANNING, &priv->status))) {
e1623446 3540 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
a0646470 3541 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 3542 mutex_unlock(&priv->mutex);
a0646470 3543 return 0;
b481de9c
ZY
3544 }
3545
3546 spin_lock_irqsave(&priv->lock, flags);
3547
e6148917
SO
3548 ch_info = iwl_get_channel_info(priv, conf->channel->band,
3549 conf->channel->hw_value);
b481de9c 3550 if (!is_channel_valid(ch_info)) {
e1623446
TW
3551 IWL_DEBUG_SCAN(priv,
3552 "Channel %d [%d] is INVALID for this band.\n",
3553 conf->channel->hw_value, conf->channel->band);
3554 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
b481de9c 3555 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY
3556 ret = -EINVAL;
3557 goto out;
b481de9c
ZY
3558 }
3559
8ccde88a 3560 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 3561
8ccde88a 3562 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
3563
3564 /* The list of supported rates and rate mask can be different
3565 * for each phymode; since the phymode may have changed, reset
3566 * the rate mask to what mac80211 lists */
8ccde88a 3567 iwl_set_rate(priv);
b481de9c
ZY
3568
3569 spin_unlock_irqrestore(&priv->lock, flags);
3570
3571#ifdef IEEE80211_CONF_CHANNEL_SWITCH
3572 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 3573 iwl3945_hw_channel_switch(priv, conf->channel);
76bb77e0 3574 goto out;
b481de9c
ZY
3575 }
3576#endif
3577
37fec384
MA
3578 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
3579 if (conf->radio_enabled &&
3580 iwl_radio_kill_sw_enable_radio(priv)) {
3581 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
3582 "waiting for uCode\n");
3583 goto out;
3584 }
b481de9c 3585
37fec384
MA
3586 if (!conf->radio_enabled) {
3587 iwl_radio_kill_sw_disable_radio(priv);
3588 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
3589 goto out;
3590 }
b481de9c
ZY
3591 }
3592
775a6e27 3593 if (iwl_is_rfkill(priv)) {
e1623446 3594 IWL_DEBUG_MAC80211(priv, "leave - RF kill\n");
76bb77e0
ZY
3595 ret = -EIO;
3596 goto out;
b481de9c
ZY
3597 }
3598
8ccde88a 3599 iwl_set_rate(priv);
b481de9c 3600
8ccde88a
SO
3601 if (memcmp(&priv->active_rxon,
3602 &priv->staging_rxon, sizeof(priv->staging_rxon)))
e0158e61 3603 iwlcore_commit_rxon(priv);
b481de9c 3604 else
e1623446 3605 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration\n");
b481de9c 3606
e1623446 3607 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3608
76bb77e0 3609out:
a0646470 3610 clear_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 3611 mutex_unlock(&priv->mutex);
76bb77e0 3612 return ret;
b481de9c
ZY
3613}
3614
4a8a4322 3615static void iwl3945_config_ap(struct iwl_priv *priv)
b481de9c
ZY
3616{
3617 int rc = 0;
3618
d986bcd1 3619 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
3620 return;
3621
3622 /* The following should be done only at AP bring up */
8ccde88a 3623 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
3624
3625 /* RXON - unassoc (to set timing command) */
8ccde88a 3626 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 3627 iwlcore_commit_rxon(priv);
b481de9c
ZY
3628
3629 /* RXON Timing */
28afaf91 3630 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 3631 iwl3945_setup_rxon_timing(priv);
518099a8
SO
3632 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3633 sizeof(priv->rxon_timing),
3634 &priv->rxon_timing);
b481de9c 3635 if (rc)
39aadf8c 3636 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3637 "Attempting to continue.\n");
3638
3639 /* FIXME: what should be the assoc_id for AP? */
8ccde88a 3640 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3641 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3642 priv->staging_rxon.flags |=
b481de9c
ZY
3643 RXON_FLG_SHORT_PREAMBLE_MSK;
3644 else
8ccde88a 3645 priv->staging_rxon.flags &=
b481de9c
ZY
3646 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3647
8ccde88a 3648 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c
ZY
3649 if (priv->assoc_capability &
3650 WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3651 priv->staging_rxon.flags |=
b481de9c
ZY
3652 RXON_FLG_SHORT_SLOT_MSK;
3653 else
8ccde88a 3654 priv->staging_rxon.flags &=
b481de9c
ZY
3655 ~RXON_FLG_SHORT_SLOT_MSK;
3656
05c914fe 3657 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3658 priv->staging_rxon.flags &=
b481de9c
ZY
3659 ~RXON_FLG_SHORT_SLOT_MSK;
3660 }
3661 /* restore RXON assoc */
8ccde88a 3662 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
e0158e61 3663 iwlcore_commit_rxon(priv);
40ace5b3 3664 priv->cfg->ops->smgmt->add_station(priv, iwl_bcast_addr, 0, 0);
556f8db7 3665 }
bb8c093b 3666 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3667
3668 /* FIXME - we need to add code here to detect a totally new
3669 * configuration, reset the AP, unassoc, rxon timing, assoc,
3670 * clear sta table, add BCAST sta... */
3671}
3672
32bfd35d
JB
3673static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
3674 struct ieee80211_vif *vif,
4a8a4322 3675 struct ieee80211_if_conf *conf)
b481de9c 3676{
4a8a4322 3677 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3678 int rc;
3679
3680 if (conf == NULL)
3681 return -EIO;
3682
b716bb91 3683 if (priv->vif != vif) {
e1623446 3684 IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
b716bb91
EG
3685 return 0;
3686 }
3687
9d139c81 3688 /* handle this temporarily here */
05c914fe 3689 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
3690 conf->changed & IEEE80211_IFCC_BEACON) {
3691 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
3692 if (!beacon)
3693 return -ENOMEM;
9bdf5eca 3694 mutex_lock(&priv->mutex);
9944b938 3695 rc = iwl_mac_beacon_update(hw, beacon);
9bdf5eca 3696 mutex_unlock(&priv->mutex);
9d139c81
JB
3697 if (rc)
3698 return rc;
3699 }
3700
775a6e27 3701 if (!iwl_is_alive(priv))
5a66926a
ZY
3702 return -EAGAIN;
3703
b481de9c
ZY
3704 mutex_lock(&priv->mutex);
3705
b481de9c 3706 if (conf->bssid)
e1623446 3707 IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
b481de9c 3708
4150c572
JB
3709/*
3710 * very dubious code was here; the probe filtering flag is never set:
3711 *
b481de9c
ZY
3712 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
3713 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 3714 */
b481de9c 3715
05c914fe 3716 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
3717 if (!conf->bssid) {
3718 conf->bssid = priv->mac_addr;
3719 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e1623446 3720 IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
e174961c 3721 conf->bssid);
b481de9c
ZY
3722 }
3723 if (priv->ibss_beacon)
3724 dev_kfree_skb(priv->ibss_beacon);
3725
9d139c81 3726 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
3727 }
3728
775a6e27 3729 if (iwl_is_rfkill(priv))
fde3571f
MA
3730 goto done;
3731
b481de9c
ZY
3732 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
3733 !is_multicast_ether_addr(conf->bssid)) {
3734 /* If there is currently a HW scan going on in the background
3735 * then we need to cancel it else the RXON below will fail. */
af0053d6 3736 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 3737 IWL_WARN(priv, "Aborted scan still in progress "
b481de9c 3738 "after 100ms\n");
e1623446 3739 IWL_DEBUG_MAC80211(priv, "leaving:scan abort failed\n");
b481de9c
ZY
3740 mutex_unlock(&priv->mutex);
3741 return -EAGAIN;
3742 }
8ccde88a 3743 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
b481de9c
ZY
3744
3745 /* TODO: Audit driver for usage of these members and see
3746 * if mac80211 deprecates them (priv->bssid looks like it
3747 * shouldn't be there, but I haven't scanned the IBSS code
3748 * to verify) - jpk */
3749 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
3750
05c914fe 3751 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 3752 iwl3945_config_ap(priv);
b481de9c 3753 else {
e0158e61 3754 rc = iwlcore_commit_rxon(priv);
05c914fe 3755 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
40ace5b3 3756 priv->cfg->ops->smgmt->add_station(priv,
8ccde88a 3757 priv->active_rxon.bssid_addr, 1, 0);
b481de9c
ZY
3758 }
3759
3760 } else {
af0053d6 3761 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 3762 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 3763 iwlcore_commit_rxon(priv);
b481de9c
ZY
3764 }
3765
fde3571f 3766 done:
e1623446 3767 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3768 mutex_unlock(&priv->mutex);
3769
3770 return 0;
3771}
3772
bb8c093b 3773static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3774 struct ieee80211_if_init_conf *conf)
3775{
4a8a4322 3776 struct iwl_priv *priv = hw->priv;
b481de9c 3777
e1623446 3778 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
3779
3780 mutex_lock(&priv->mutex);
6ef89d0a 3781
775a6e27 3782 if (iwl_is_ready_rf(priv)) {
af0053d6 3783 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 3784 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 3785 iwlcore_commit_rxon(priv);
fde3571f 3786 }
32bfd35d
JB
3787 if (priv->vif == conf->vif) {
3788 priv->vif = NULL;
b481de9c 3789 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY
3790 }
3791 mutex_unlock(&priv->mutex);
3792
e1623446 3793 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3794}
3795
bb8c093b 3796static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB
3797 struct ieee80211_vif *vif,
3798 struct ieee80211_sta *sta,
3799 struct ieee80211_key_conf *key)
b481de9c 3800{
4a8a4322 3801 struct iwl_priv *priv = hw->priv;
dc822b5d 3802 const u8 *addr;
6e21f15c
AK
3803 int ret = 0;
3804 u8 sta_id = IWL_INVALID_STATION;
3805 u8 static_key;
b481de9c 3806
e1623446 3807 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3808
df878d8f 3809 if (iwl3945_mod_params.sw_crypto) {
e1623446 3810 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY
3811 return -EOPNOTSUPP;
3812 }
3813
42986796 3814 addr = sta ? sta->addr : iwl_bcast_addr;
6e21f15c
AK
3815 static_key = !iwl_is_associated(priv);
3816
3817 if (!static_key) {
40ace5b3 3818 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
6e21f15c 3819 if (sta_id == IWL_INVALID_STATION) {
12514396 3820 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
6e21f15c
AK
3821 addr);
3822 return -EINVAL;
3823 }
b481de9c
ZY
3824 }
3825
3826 mutex_lock(&priv->mutex);
af0053d6 3827 iwl_scan_cancel_timeout(priv, 100);
6e21f15c 3828 mutex_unlock(&priv->mutex);
15e869d8 3829
b481de9c 3830 switch (cmd) {
6e21f15c
AK
3831 case SET_KEY:
3832 if (static_key)
3833 ret = iwl3945_set_static_key(priv, key);
3834 else
3835 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3836 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
b481de9c
ZY
3837 break;
3838 case DISABLE_KEY:
6e21f15c
AK
3839 if (static_key)
3840 ret = iwl3945_remove_static_key(priv);
3841 else
3842 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3843 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY
3844 break;
3845 default:
42986796 3846 ret = -EINVAL;
b481de9c
ZY
3847 }
3848
e1623446 3849 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3850
42986796 3851 return ret;
b481de9c
ZY
3852}
3853
bb8c093b 3854static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3855 struct ieee80211_tx_queue_stats *stats)
3856{
4a8a4322 3857 struct iwl_priv *priv = hw->priv;
b481de9c 3858 int i, avail;
188cf6c7 3859 struct iwl_tx_queue *txq;
d20b3c65 3860 struct iwl_queue *q;
b481de9c
ZY
3861 unsigned long flags;
3862
e1623446 3863 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3864
775a6e27 3865 if (!iwl_is_ready_rf(priv)) {
e1623446 3866 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
3867 return -EIO;
3868 }
3869
3870 spin_lock_irqsave(&priv->lock, flags);
3871
3872 for (i = 0; i < AC_NUM; i++) {
188cf6c7 3873 txq = &priv->txq[i];
b481de9c 3874 q = &txq->q;
d20b3c65 3875 avail = iwl_queue_space(q);
b481de9c 3876
57ffc589
JB
3877 stats[i].len = q->n_window - avail;
3878 stats[i].limit = q->n_window - q->high_mark;
3879 stats[i].count = q->n_window;
b481de9c
ZY
3880
3881 }
3882 spin_unlock_irqrestore(&priv->lock, flags);
3883
e1623446 3884 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3885
3886 return 0;
3887}
3888
bb8c093b 3889static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3890{
4a8a4322 3891 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3892 unsigned long flags;
3893
3894 mutex_lock(&priv->mutex);
e1623446 3895 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3896
775a6e27 3897 iwl_reset_qos(priv);
292ae174 3898
b481de9c
ZY
3899 spin_lock_irqsave(&priv->lock, flags);
3900 priv->assoc_id = 0;
3901 priv->assoc_capability = 0;
b481de9c
ZY
3902
3903 /* new association get rid of ibss beacon skb */
3904 if (priv->ibss_beacon)
3905 dev_kfree_skb(priv->ibss_beacon);
3906
3907 priv->ibss_beacon = NULL;
3908
3909 priv->beacon_int = priv->hw->conf.beacon_int;
28afaf91 3910 priv->timestamp = 0;
05c914fe 3911 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
3912 priv->beacon_int = 0;
3913
3914 spin_unlock_irqrestore(&priv->lock, flags);
3915
775a6e27 3916 if (!iwl_is_ready_rf(priv)) {
e1623446 3917 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
fde3571f
MA
3918 mutex_unlock(&priv->mutex);
3919 return;
3920 }
3921
15e869d8
MA
3922 /* we are restarting association process
3923 * clear RXON_FILTER_ASSOC_MSK bit
3924 */
05c914fe 3925 if (priv->iw_mode != NL80211_IFTYPE_AP) {
af0053d6 3926 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 3927 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 3928 iwlcore_commit_rxon(priv);
15e869d8
MA
3929 }
3930
b481de9c 3931 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 3932 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
15e869d8 3933
e1623446 3934 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
b481de9c
ZY
3935 mutex_unlock(&priv->mutex);
3936 return;
b481de9c
ZY
3937 }
3938
8ccde88a 3939 iwl_set_rate(priv);
b481de9c
ZY
3940
3941 mutex_unlock(&priv->mutex);
3942
e1623446 3943 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3944
3945}
3946
b481de9c
ZY
3947/*****************************************************************************
3948 *
3949 * sysfs attributes
3950 *
3951 *****************************************************************************/
3952
d08853a3 3953#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3954
3955/*
3956 * The following adds a new attribute to the sysfs representation
3957 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3958 * used for controlling the debug level.
3959 *
3960 * See the level definitions in iwl for details.
3961 */
40b8ec0b
SO
3962static ssize_t show_debug_level(struct device *d,
3963 struct device_attribute *attr, char *buf)
b481de9c 3964{
4a8a4322 3965 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
3966
3967 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3968}
40b8ec0b
SO
3969static ssize_t store_debug_level(struct device *d,
3970 struct device_attribute *attr,
b481de9c
ZY
3971 const char *buf, size_t count)
3972{
4a8a4322 3973 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
3974 unsigned long val;
3975 int ret;
b481de9c 3976
40b8ec0b
SO
3977 ret = strict_strtoul(buf, 0, &val);
3978 if (ret)
978785a3 3979 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 3980 else
40b8ec0b 3981 priv->debug_level = val;
b481de9c
ZY
3982
3983 return strnlen(buf, count);
3984}
3985
40b8ec0b
SO
3986static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3987 show_debug_level, store_debug_level);
b481de9c 3988
d08853a3 3989#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3990
b481de9c
ZY
3991static ssize_t show_temperature(struct device *d,
3992 struct device_attribute *attr, char *buf)
3993{
4a8a4322 3994 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3995
775a6e27 3996 if (!iwl_is_alive(priv))
b481de9c
ZY
3997 return -EAGAIN;
3998
bb8c093b 3999 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
b481de9c
ZY
4000}
4001
4002static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
4003
b481de9c
ZY
4004static ssize_t show_tx_power(struct device *d,
4005 struct device_attribute *attr, char *buf)
4006{
4a8a4322 4007 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
62ea9c5b 4008 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
4009}
4010
4011static ssize_t store_tx_power(struct device *d,
4012 struct device_attribute *attr,
4013 const char *buf, size_t count)
4014{
4a8a4322 4015 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4016 char *p = (char *)buf;
4017 u32 val;
4018
4019 val = simple_strtoul(p, &p, 10);
4020 if (p == buf)
978785a3 4021 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
b481de9c 4022 else
bb8c093b 4023 iwl3945_hw_reg_set_txpower(priv, val);
b481de9c
ZY
4024
4025 return count;
4026}
4027
4028static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
4029
4030static ssize_t show_flags(struct device *d,
4031 struct device_attribute *attr, char *buf)
4032{
4a8a4322 4033 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4034
8ccde88a 4035 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
b481de9c
ZY
4036}
4037
4038static ssize_t store_flags(struct device *d,
4039 struct device_attribute *attr,
4040 const char *buf, size_t count)
4041{
4a8a4322 4042 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4043 u32 flags = simple_strtoul(buf, NULL, 0);
4044
4045 mutex_lock(&priv->mutex);
8ccde88a 4046 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
b481de9c 4047 /* Cancel any currently running scans... */
af0053d6 4048 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4049 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 4050 else {
e1623446 4051 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
b481de9c 4052 flags);
8ccde88a 4053 priv->staging_rxon.flags = cpu_to_le32(flags);
e0158e61 4054 iwlcore_commit_rxon(priv);
b481de9c
ZY
4055 }
4056 }
4057 mutex_unlock(&priv->mutex);
4058
4059 return count;
4060}
4061
4062static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
4063
4064static ssize_t show_filter_flags(struct device *d,
4065 struct device_attribute *attr, char *buf)
4066{
4a8a4322 4067 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4068
4069 return sprintf(buf, "0x%04X\n",
8ccde88a 4070 le32_to_cpu(priv->active_rxon.filter_flags));
b481de9c
ZY
4071}
4072
4073static ssize_t store_filter_flags(struct device *d,
4074 struct device_attribute *attr,
4075 const char *buf, size_t count)
4076{
4a8a4322 4077 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4078 u32 filter_flags = simple_strtoul(buf, NULL, 0);
4079
4080 mutex_lock(&priv->mutex);
8ccde88a 4081 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
b481de9c 4082 /* Cancel any currently running scans... */
af0053d6 4083 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4084 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 4085 else {
e1623446 4086 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c 4087 "0x%04X\n", filter_flags);
8ccde88a 4088 priv->staging_rxon.filter_flags =
b481de9c 4089 cpu_to_le32(filter_flags);
e0158e61 4090 iwlcore_commit_rxon(priv);
b481de9c
ZY
4091 }
4092 }
4093 mutex_unlock(&priv->mutex);
4094
4095 return count;
4096}
4097
4098static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
4099 store_filter_flags);
4100
c8b0e6e1 4101#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
4102
4103static ssize_t show_measurement(struct device *d,
4104 struct device_attribute *attr, char *buf)
4105{
4a8a4322 4106 struct iwl_priv *priv = dev_get_drvdata(d);
600c0e11 4107 struct iwl_spectrum_notification measure_report;
b481de9c 4108 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 4109 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
4110 unsigned long flags;
4111
4112 spin_lock_irqsave(&priv->lock, flags);
4113 if (!(priv->measurement_status & MEASUREMENT_READY)) {
4114 spin_unlock_irqrestore(&priv->lock, flags);
4115 return 0;
4116 }
4117 memcpy(&measure_report, &priv->measure_report, size);
4118 priv->measurement_status = 0;
4119 spin_unlock_irqrestore(&priv->lock, flags);
4120
4121 while (size && (PAGE_SIZE - len)) {
4122 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4123 PAGE_SIZE - len, 1);
4124 len = strlen(buf);
4125 if (PAGE_SIZE - len)
4126 buf[len++] = '\n';
4127
4128 ofs += 16;
4129 size -= min(size, 16U);
4130 }
4131
4132 return len;
4133}
4134
4135static ssize_t store_measurement(struct device *d,
4136 struct device_attribute *attr,
4137 const char *buf, size_t count)
4138{
4a8a4322 4139 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 4140 struct ieee80211_measurement_params params = {
8ccde88a 4141 .channel = le16_to_cpu(priv->active_rxon.channel),
b481de9c
ZY
4142 .start_time = cpu_to_le64(priv->last_tsf),
4143 .duration = cpu_to_le16(1),
4144 };
4145 u8 type = IWL_MEASURE_BASIC;
4146 u8 buffer[32];
4147 u8 channel;
4148
4149 if (count) {
4150 char *p = buffer;
4151 strncpy(buffer, buf, min(sizeof(buffer), count));
4152 channel = simple_strtoul(p, NULL, 0);
4153 if (channel)
4154 params.channel = channel;
4155
4156 p = buffer;
4157 while (*p && *p != ' ')
4158 p++;
4159 if (*p)
4160 type = simple_strtoul(p + 1, NULL, 0);
4161 }
4162
e1623446 4163 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
b481de9c 4164 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 4165 iwl3945_get_measurement(priv, &params, type);
b481de9c
ZY
4166
4167 return count;
4168}
4169
4170static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
4171 show_measurement, store_measurement);
c8b0e6e1 4172#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
b481de9c 4173
b481de9c
ZY
4174static ssize_t store_retry_rate(struct device *d,
4175 struct device_attribute *attr,
4176 const char *buf, size_t count)
4177{
4a8a4322 4178 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
4179
4180 priv->retry_rate = simple_strtoul(buf, NULL, 0);
4181 if (priv->retry_rate <= 0)
4182 priv->retry_rate = 1;
4183
4184 return count;
4185}
4186
4187static ssize_t show_retry_rate(struct device *d,
4188 struct device_attribute *attr, char *buf)
4189{
4a8a4322 4190 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
4191 return sprintf(buf, "%d", priv->retry_rate);
4192}
4193
4194static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
4195 store_retry_rate);
4196
d25aabb0 4197
b481de9c
ZY
4198static ssize_t store_power_level(struct device *d,
4199 struct device_attribute *attr,
4200 const char *buf, size_t count)
4201{
4a8a4322 4202 struct iwl_priv *priv = dev_get_drvdata(d);
d25aabb0
WT
4203 int ret;
4204 unsigned long mode;
4205
b481de9c 4206
b481de9c
ZY
4207 mutex_lock(&priv->mutex);
4208
d25aabb0
WT
4209 ret = strict_strtoul(buf, 10, &mode);
4210 if (ret)
4211 goto out;
b481de9c 4212
d25aabb0
WT
4213 ret = iwl_power_set_user_mode(priv, mode);
4214 if (ret) {
4215 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
4216 goto out;
b481de9c 4217 }
d25aabb0 4218 ret = count;
b481de9c
ZY
4219
4220 out:
4221 mutex_unlock(&priv->mutex);
d25aabb0 4222 return ret;
b481de9c
ZY
4223}
4224
d25aabb0
WT
4225static ssize_t show_power_level(struct device *d,
4226 struct device_attribute *attr, char *buf)
4227{
4228 struct iwl_priv *priv = dev_get_drvdata(d);
4229 int mode = priv->power_data.user_power_setting;
4230 int system = priv->power_data.system_power_setting;
4231 int level = priv->power_data.power_mode;
4232 char *p = buf;
4233
4234 switch (system) {
4235 case IWL_POWER_SYS_AUTO:
4236 p += sprintf(p, "SYSTEM:auto");
4237 break;
4238 case IWL_POWER_SYS_AC:
4239 p += sprintf(p, "SYSTEM:ac");
4240 break;
4241 case IWL_POWER_SYS_BATTERY:
4242 p += sprintf(p, "SYSTEM:battery");
4243 break;
4244 }
4245
4246 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
4247 "fixed" : "auto");
4248 p += sprintf(p, "\tINDEX:%d", level);
4249 p += sprintf(p, "\n");
4250 return p - buf + 1;
4251}
4252
4253static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
4254 show_power_level, store_power_level);
4255
b481de9c
ZY
4256#define MAX_WX_STRING 80
4257
4258/* Values are in microsecond */
4259static const s32 timeout_duration[] = {
4260 350000,
4261 250000,
4262 75000,
4263 37000,
4264 25000,
4265};
4266static const s32 period_duration[] = {
4267 400000,
4268 700000,
4269 1000000,
4270 1000000,
4271 1000000
4272};
4273
b481de9c
ZY
4274static ssize_t show_channels(struct device *d,
4275 struct device_attribute *attr, char *buf)
4276{
8318d78a
JB
4277 /* all this shit doesn't belong into sysfs anyway */
4278 return 0;
b481de9c
ZY
4279}
4280
4281static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
4282
4283static ssize_t show_statistics(struct device *d,
4284 struct device_attribute *attr, char *buf)
4285{
4a8a4322 4286 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 4287 u32 size = sizeof(struct iwl3945_notif_statistics);
b481de9c 4288 u32 len = 0, ofs = 0;
f2c7e521 4289 u8 *data = (u8 *)&priv->statistics_39;
b481de9c
ZY
4290 int rc = 0;
4291
775a6e27 4292 if (!iwl_is_alive(priv))
b481de9c
ZY
4293 return -EAGAIN;
4294
4295 mutex_lock(&priv->mutex);
17f841cd 4296 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
4297 mutex_unlock(&priv->mutex);
4298
4299 if (rc) {
4300 len = sprintf(buf,
4301 "Error sending statistics request: 0x%08X\n", rc);
4302 return len;
4303 }
4304
4305 while (size && (PAGE_SIZE - len)) {
4306 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4307 PAGE_SIZE - len, 1);
4308 len = strlen(buf);
4309 if (PAGE_SIZE - len)
4310 buf[len++] = '\n';
4311
4312 ofs += 16;
4313 size -= min(size, 16U);
4314 }
4315
4316 return len;
4317}
4318
4319static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4320
4321static ssize_t show_antenna(struct device *d,
4322 struct device_attribute *attr, char *buf)
4323{
4a8a4322 4324 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 4325
775a6e27 4326 if (!iwl_is_alive(priv))
b481de9c
ZY
4327 return -EAGAIN;
4328
7e4bca5e 4329 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
b481de9c
ZY
4330}
4331
4332static ssize_t store_antenna(struct device *d,
4333 struct device_attribute *attr,
4334 const char *buf, size_t count)
4335{
7530f85f 4336 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
b481de9c 4337 int ant;
b481de9c
ZY
4338
4339 if (count == 0)
4340 return 0;
4341
4342 if (sscanf(buf, "%1i", &ant) != 1) {
e1623446 4343 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
b481de9c
ZY
4344 return count;
4345 }
4346
4347 if ((ant >= 0) && (ant <= 2)) {
e1623446 4348 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
7e4bca5e 4349 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
b481de9c 4350 } else
e1623446 4351 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
b481de9c
ZY
4352
4353
4354 return count;
4355}
4356
4357static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
4358
4359static ssize_t show_status(struct device *d,
4360 struct device_attribute *attr, char *buf)
4361{
4a8a4322 4362 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
775a6e27 4363 if (!iwl_is_alive(priv))
b481de9c
ZY
4364 return -EAGAIN;
4365 return sprintf(buf, "0x%08x\n", (int)priv->status);
4366}
4367
4368static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4369
4370static ssize_t dump_error_log(struct device *d,
4371 struct device_attribute *attr,
4372 const char *buf, size_t count)
4373{
4374 char *p = (char *)buf;
4375
4376 if (p[0] == '1')
4a8a4322 4377 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
4378
4379 return strnlen(buf, count);
4380}
4381
4382static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
4383
4384static ssize_t dump_event_log(struct device *d,
4385 struct device_attribute *attr,
4386 const char *buf, size_t count)
4387{
4388 char *p = (char *)buf;
4389
4390 if (p[0] == '1')
4a8a4322 4391 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
4392
4393 return strnlen(buf, count);
4394}
4395
4396static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
4397
4398/*****************************************************************************
4399 *
a96a27f9 4400 * driver setup and tear down
b481de9c
ZY
4401 *
4402 *****************************************************************************/
4403
4a8a4322 4404static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
b481de9c 4405{
d21050c7 4406 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
b481de9c
ZY
4407
4408 init_waitqueue_head(&priv->wait_command_queue);
4409
bb8c093b
CH
4410 INIT_WORK(&priv->up, iwl3945_bg_up);
4411 INIT_WORK(&priv->restart, iwl3945_bg_restart);
4412 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
c0af96a6 4413 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
bb8c093b 4414 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
bb8c093b
CH
4415 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
4416 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
2663516d 4417 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
77fecfb8
SO
4418 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
4419 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
4420 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
4421 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
bb8c093b
CH
4422
4423 iwl3945_hw_setup_deferred_work(priv);
b481de9c
ZY
4424
4425 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 4426 iwl3945_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
4427}
4428
4a8a4322 4429static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 4430{
bb8c093b 4431 iwl3945_hw_cancel_deferred_work(priv);
b481de9c 4432
e47eb6ad 4433 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
4434 cancel_delayed_work(&priv->scan_check);
4435 cancel_delayed_work(&priv->alive_start);
b481de9c
ZY
4436 cancel_work_sync(&priv->beacon_update);
4437}
4438
bb8c093b 4439static struct attribute *iwl3945_sysfs_entries[] = {
b481de9c
ZY
4440 &dev_attr_antenna.attr,
4441 &dev_attr_channels.attr,
4442 &dev_attr_dump_errors.attr,
4443 &dev_attr_dump_events.attr,
4444 &dev_attr_flags.attr,
4445 &dev_attr_filter_flags.attr,
c8b0e6e1 4446#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
4447 &dev_attr_measurement.attr,
4448#endif
4449 &dev_attr_power_level.attr,
b481de9c 4450 &dev_attr_retry_rate.attr,
b481de9c
ZY
4451 &dev_attr_statistics.attr,
4452 &dev_attr_status.attr,
4453 &dev_attr_temperature.attr,
b481de9c 4454 &dev_attr_tx_power.attr,
d08853a3 4455#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b
SO
4456 &dev_attr_debug_level.attr,
4457#endif
b481de9c
ZY
4458 NULL
4459};
4460
bb8c093b 4461static struct attribute_group iwl3945_attribute_group = {
b481de9c 4462 .name = NULL, /* put in device directory */
bb8c093b 4463 .attrs = iwl3945_sysfs_entries,
b481de9c
ZY
4464};
4465
bb8c093b
CH
4466static struct ieee80211_ops iwl3945_hw_ops = {
4467 .tx = iwl3945_mac_tx,
4468 .start = iwl3945_mac_start,
4469 .stop = iwl3945_mac_stop,
4470 .add_interface = iwl3945_mac_add_interface,
4471 .remove_interface = iwl3945_mac_remove_interface,
4472 .config = iwl3945_mac_config,
4473 .config_interface = iwl3945_mac_config_interface,
8ccde88a 4474 .configure_filter = iwl_configure_filter,
bb8c093b 4475 .set_key = iwl3945_mac_set_key,
bb8c093b 4476 .get_tx_stats = iwl3945_mac_get_tx_stats,
488829f1 4477 .conf_tx = iwl_mac_conf_tx,
bb8c093b 4478 .reset_tsf = iwl3945_mac_reset_tsf,
5bbe233b 4479 .bss_info_changed = iwl_bss_info_changed,
e9dde6f6 4480 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
4481};
4482
e52119c5 4483static int iwl3945_init_drv(struct iwl_priv *priv)
90a30a02
KA
4484{
4485 int ret;
e6148917 4486 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
90a30a02
KA
4487
4488 priv->retry_rate = 1;
4489 priv->ibss_beacon = NULL;
4490
4491 spin_lock_init(&priv->lock);
3dae0c42 4492 spin_lock_init(&priv->power_data.lock);
90a30a02
KA
4493 spin_lock_init(&priv->sta_lock);
4494 spin_lock_init(&priv->hcmd_lock);
4495
4496 INIT_LIST_HEAD(&priv->free_frames);
4497
4498 mutex_init(&priv->mutex);
4499
4500 /* Clear the driver's (not device's) station table */
40ace5b3 4501 priv->cfg->ops->smgmt->clear_station_table(priv);
90a30a02
KA
4502
4503 priv->data_retry_limit = -1;
4504 priv->ieee_channels = NULL;
4505 priv->ieee_rates = NULL;
4506 priv->band = IEEE80211_BAND_2GHZ;
4507
4508 priv->iw_mode = NL80211_IFTYPE_STATION;
4509
4510 iwl_reset_qos(priv);
4511
4512 priv->qos_data.qos_active = 0;
4513 priv->qos_data.qos_cap.val = 0;
4514
4515 priv->rates_mask = IWL_RATES_MASK;
d25aabb0
WT
4516 /* If power management is turned on, default to CAM mode */
4517 priv->power_mode = IWL_POWER_MODE_CAM;
62ea9c5b 4518 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
90a30a02 4519
e6148917
SO
4520 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
4521 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4522 eeprom->version);
4523 ret = -EINVAL;
4524 goto err;
4525 }
4526 ret = iwl_init_channel_map(priv);
90a30a02
KA
4527 if (ret) {
4528 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4529 goto err;
4530 }
4531
e6148917
SO
4532 /* Set up txpower settings in driver for all channels */
4533 if (iwl3945_txpower_set_from_eeprom(priv)) {
4534 ret = -EIO;
4535 goto err_free_channel_map;
4536 }
4537
534166de 4538 ret = iwlcore_init_geos(priv);
90a30a02
KA
4539 if (ret) {
4540 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4541 goto err_free_channel_map;
4542 }
534166de
SO
4543 iwl3945_init_hw_rates(priv, priv->ieee_rates);
4544
2a4ddaab
AK
4545 return 0;
4546
4547err_free_channel_map:
4548 iwl_free_channel_map(priv);
4549err:
4550 return ret;
4551}
4552
4553static int iwl3945_setup_mac(struct iwl_priv *priv)
4554{
4555 int ret;
4556 struct ieee80211_hw *hw = priv->hw;
4557
4558 hw->rate_control_algorithm = "iwl-3945-rs";
4559 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
4560
4561 /* Tell mac80211 our characteristics */
4562 hw->flags = IEEE80211_HW_SIGNAL_DBM |
b1c6019b
MA
4563 IEEE80211_HW_NOISE_DBM |
4564 IEEE80211_HW_SPECTRUM_MGMT;
2a4ddaab
AK
4565
4566 hw->wiphy->interface_modes =
4567 BIT(NL80211_IFTYPE_STATION) |
4568 BIT(NL80211_IFTYPE_ADHOC);
4569
4570 hw->wiphy->custom_regulatory = true;
4571
d60cc91a
JB
4572 hw->wiphy->max_scan_ssids = 1; /* WILL FIX */
4573
2a4ddaab
AK
4574 /* Default value; 4 EDCA QOS priorities */
4575 hw->queues = 4;
4576
4577 hw->conf.beacon_int = 100;
4578
534166de
SO
4579 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4580 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4581 &priv->bands[IEEE80211_BAND_2GHZ];
2a4ddaab 4582
534166de
SO
4583 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4584 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4585 &priv->bands[IEEE80211_BAND_5GHZ];
90a30a02 4586
2a4ddaab
AK
4587 ret = ieee80211_register_hw(priv->hw);
4588 if (ret) {
4589 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
4590 return ret;
4591 }
4592 priv->mac80211_registered = 1;
90a30a02 4593
2a4ddaab 4594 return 0;
90a30a02
KA
4595}
4596
bb8c093b 4597static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
4598{
4599 int err = 0;
4a8a4322 4600 struct iwl_priv *priv;
b481de9c 4601 struct ieee80211_hw *hw;
c0f20d91 4602 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
e6148917 4603 struct iwl3945_eeprom *eeprom;
0359facc 4604 unsigned long flags;
b481de9c 4605
cee53ddb
KA
4606 /***********************
4607 * 1. Allocating HW data
4608 * ********************/
4609
b481de9c
ZY
4610 /* mac80211 allocates memory for this device instance, including
4611 * space for this driver's private structure */
90a30a02 4612 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
b481de9c 4613 if (hw == NULL) {
a3139c59 4614 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
b481de9c
ZY
4615 err = -ENOMEM;
4616 goto out;
4617 }
b481de9c 4618 priv = hw->priv;
90a30a02 4619 SET_IEEE80211_DEV(hw, &pdev->dev);
6440adb5 4620
df878d8f
KA
4621 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
4622 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
15b1687c
WT
4623 IWL_ERR(priv,
4624 "invalid queues_num, should be between %d and %d\n",
4625 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
a3139c59 4626 err = -EINVAL;
c8f16138 4627 goto out_ieee80211_free_hw;
a3139c59
SO
4628 }
4629
90a30a02
KA
4630 /*
4631 * Disabling hardware scan means that mac80211 will perform scans
4632 * "the hard way", rather than using device's scan.
4633 */
df878d8f 4634 if (iwl3945_mod_params.disable_hw_scan) {
e1623446 4635 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
40b8ec0b
SO
4636 iwl3945_hw_ops.hw_scan = NULL;
4637 }
4638
90a30a02 4639
e1623446 4640 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
90a30a02
KA
4641 priv->cfg = cfg;
4642 priv->pci_dev = pdev;
cee53ddb 4643
d08853a3 4644#ifdef CONFIG_IWLWIFI_DEBUG
df878d8f 4645 priv->debug_level = iwl3945_mod_params.debug;
b481de9c
ZY
4646 atomic_set(&priv->restrict_refcnt, 0);
4647#endif
b481de9c 4648
cee53ddb
KA
4649 /***************************
4650 * 2. Initializing PCI bus
4651 * *************************/
b481de9c
ZY
4652 if (pci_enable_device(pdev)) {
4653 err = -ENODEV;
4654 goto out_ieee80211_free_hw;
4655 }
4656
4657 pci_set_master(pdev);
4658
284901a9 4659 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
b481de9c 4660 if (!err)
284901a9 4661 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
b481de9c 4662 if (err) {
978785a3 4663 IWL_WARN(priv, "No suitable DMA available.\n");
b481de9c
ZY
4664 goto out_pci_disable_device;
4665 }
4666
4667 pci_set_drvdata(pdev, priv);
4668 err = pci_request_regions(pdev, DRV_NAME);
4669 if (err)
4670 goto out_pci_disable_device;
6440adb5 4671
cee53ddb
KA
4672 /***********************
4673 * 3. Read REV Register
4674 * ********************/
b481de9c
ZY
4675 priv->hw_base = pci_iomap(pdev, 0, 0);
4676 if (!priv->hw_base) {
4677 err = -ENODEV;
4678 goto out_pci_release_regions;
4679 }
4680
e1623446 4681 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
b481de9c 4682 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 4683 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
b481de9c 4684
cee53ddb
KA
4685 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4686 * PCI Tx retries from interfering with C3 CPU state */
4687 pci_write_config_byte(pdev, 0x41, 0x00);
b481de9c 4688
90a30a02
KA
4689 /* amp init */
4690 err = priv->cfg->ops->lib->apm_ops.init(priv);
cee53ddb 4691 if (err < 0) {
d5df2a16 4692 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
90a30a02 4693 goto out_iounmap;
cee53ddb 4694 }
b481de9c 4695
cee53ddb
KA
4696 /***********************
4697 * 4. Read EEPROM
4698 * ********************/
90a30a02 4699
cee53ddb 4700 /* Read the EEPROM */
e6148917 4701 err = iwl_eeprom_init(priv);
cee53ddb 4702 if (err) {
15b1687c 4703 IWL_ERR(priv, "Unable to init EEPROM\n");
c8f16138 4704 goto out_iounmap;
cee53ddb
KA
4705 }
4706 /* MAC Address location in EEPROM same for 3945/4965 */
e6148917
SO
4707 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4708 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
e1623446 4709 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
cee53ddb 4710 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 4711
cee53ddb
KA
4712 /***********************
4713 * 5. Setup HW Constants
4714 * ********************/
b481de9c 4715 /* Device-specific setup */
3832ec9d 4716 if (iwl3945_hw_set_hw_params(priv)) {
15b1687c 4717 IWL_ERR(priv, "failed to set hw settings\n");
c8f16138 4718 goto out_eeprom_free;
b481de9c
ZY
4719 }
4720
cee53ddb
KA
4721 /***********************
4722 * 6. Setup priv
4723 * ********************/
cee53ddb 4724
90a30a02 4725 err = iwl3945_init_drv(priv);
b481de9c 4726 if (err) {
90a30a02 4727 IWL_ERR(priv, "initializing driver failed\n");
c8f16138 4728 goto out_unset_hw_params;
b481de9c
ZY
4729 }
4730
978785a3
TW
4731 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4732 priv->cfg->name);
cee53ddb
KA
4733
4734 /***********************************
4735 * 7. Initialize Module Parameters
4736 * **********************************/
4737
4738 /* Initialize module parameter values here */
4739 /* Disable radio (SW RF KILL) via parameter when loading driver */
df878d8f 4740 if (iwl3945_mod_params.disable) {
cee53ddb 4741 set_bit(STATUS_RF_KILL_SW, &priv->status);
e1623446 4742 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
849e0dce
RC
4743 }
4744
cee53ddb
KA
4745
4746 /***********************
4747 * 8. Setup Services
4748 * ********************/
4749
4750 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 4751 iwl_disable_interrupts(priv);
cee53ddb
KA
4752 spin_unlock_irqrestore(&priv->lock, flags);
4753
2663516d
HS
4754 pci_enable_msi(priv->pci_dev);
4755
f17d08a6 4756 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
2663516d
HS
4757 DRV_NAME, priv);
4758 if (err) {
4759 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4760 goto out_disable_msi;
4761 }
4762
cee53ddb 4763 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 4764 if (err) {
15b1687c 4765 IWL_ERR(priv, "failed to create sysfs device attributes\n");
90a30a02 4766 goto out_release_irq;
849e0dce 4767 }
849e0dce 4768
8ccde88a
SO
4769 iwl_set_rxon_channel(priv,
4770 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
cee53ddb
KA
4771 iwl3945_setup_deferred_work(priv);
4772 iwl3945_setup_rx_handlers(priv);
4773
cee53ddb 4774 /*********************************
2663516d 4775 * 9. Setup and Register mac80211
cee53ddb
KA
4776 * *******************************/
4777
2a4ddaab 4778 iwl_enable_interrupts(priv);
b481de9c 4779
2a4ddaab
AK
4780 err = iwl3945_setup_mac(priv);
4781 if (err)
4782 goto out_remove_sysfs;
cee53ddb 4783
c0af96a6 4784 err = iwl_rfkill_init(priv);
ebef2008 4785 if (err)
15b1687c 4786 IWL_ERR(priv, "Unable to initialize RFKILL system. "
ebef2008 4787 "Ignoring error: %d\n", err);
2a4ddaab
AK
4788 else
4789 iwl_rfkill_set_hw_state(priv);
ebef2008 4790
2663516d
HS
4791 /* Start monitoring the killswitch */
4792 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4793 2 * HZ);
4794
b481de9c
ZY
4795 return 0;
4796
cee53ddb 4797 out_remove_sysfs:
c8f16138
RC
4798 destroy_workqueue(priv->workqueue);
4799 priv->workqueue = NULL;
cee53ddb 4800 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 4801 out_release_irq:
2663516d 4802 free_irq(priv->pci_dev->irq, priv);
2663516d
HS
4803 out_disable_msi:
4804 pci_disable_msi(priv->pci_dev);
c8f16138
RC
4805 iwlcore_free_geos(priv);
4806 iwl_free_channel_map(priv);
4807 out_unset_hw_params:
4808 iwl3945_unset_hw_params(priv);
4809 out_eeprom_free:
4810 iwl_eeprom_free(priv);
b481de9c
ZY
4811 out_iounmap:
4812 pci_iounmap(pdev, priv->hw_base);
4813 out_pci_release_regions:
4814 pci_release_regions(pdev);
4815 out_pci_disable_device:
b481de9c 4816 pci_set_drvdata(pdev, NULL);
623d563e 4817 pci_disable_device(pdev);
b481de9c
ZY
4818 out_ieee80211_free_hw:
4819 ieee80211_free_hw(priv->hw);
4820 out:
4821 return err;
4822}
4823
c83dbf68 4824static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
b481de9c 4825{
4a8a4322 4826 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4827 unsigned long flags;
b481de9c
ZY
4828
4829 if (!priv)
4830 return;
4831
e1623446 4832 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 4833
b481de9c 4834 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 4835
d552bfb6
KA
4836 if (priv->mac80211_registered) {
4837 ieee80211_unregister_hw(priv->hw);
4838 priv->mac80211_registered = 0;
4839 } else {
4840 iwl3945_down(priv);
4841 }
b481de9c 4842
0359facc
MA
4843 /* make sure we flush any pending irq or
4844 * tasklet for the driver
4845 */
4846 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 4847 iwl_disable_interrupts(priv);
0359facc
MA
4848 spin_unlock_irqrestore(&priv->lock, flags);
4849
4850 iwl_synchronize_irq(priv);
4851
bb8c093b 4852 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 4853
c0af96a6 4854 iwl_rfkill_unregister(priv);
2663516d
HS
4855 cancel_delayed_work(&priv->rfkill_poll);
4856
bb8c093b 4857 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
4858
4859 if (priv->rxq.bd)
51af3d3f 4860 iwl_rx_queue_free(priv, &priv->rxq);
bb8c093b 4861 iwl3945_hw_txq_ctx_free(priv);
b481de9c 4862
3832ec9d 4863 iwl3945_unset_hw_params(priv);
40ace5b3 4864 priv->cfg->ops->smgmt->clear_station_table(priv);
b481de9c 4865
6ef89d0a
MA
4866 /*netif_stop_queue(dev); */
4867 flush_workqueue(priv->workqueue);
4868
bb8c093b 4869 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
b481de9c
ZY
4870 * priv->workqueue... so we can't take down the workqueue
4871 * until now... */
4872 destroy_workqueue(priv->workqueue);
4873 priv->workqueue = NULL;
4874
2663516d
HS
4875 free_irq(pdev->irq, priv);
4876 pci_disable_msi(pdev);
4877
b481de9c
ZY
4878 pci_iounmap(pdev, priv->hw_base);
4879 pci_release_regions(pdev);
4880 pci_disable_device(pdev);
4881 pci_set_drvdata(pdev, NULL);
4882
e6148917 4883 iwl_free_channel_map(priv);
534166de 4884 iwlcore_free_geos(priv);
805cee5b 4885 kfree(priv->scan);
b481de9c
ZY
4886 if (priv->ibss_beacon)
4887 dev_kfree_skb(priv->ibss_beacon);
4888
4889 ieee80211_free_hw(priv->hw);
4890}
4891
b481de9c
ZY
4892
4893/*****************************************************************************
4894 *
4895 * driver and module entry point
4896 *
4897 *****************************************************************************/
4898
bb8c093b 4899static struct pci_driver iwl3945_driver = {
b481de9c 4900 .name = DRV_NAME,
bb8c093b
CH
4901 .id_table = iwl3945_hw_card_ids,
4902 .probe = iwl3945_pci_probe,
4903 .remove = __devexit_p(iwl3945_pci_remove),
b481de9c 4904#ifdef CONFIG_PM
6da3a13e
WYG
4905 .suspend = iwl_pci_suspend,
4906 .resume = iwl_pci_resume,
b481de9c
ZY
4907#endif
4908};
4909
bb8c093b 4910static int __init iwl3945_init(void)
b481de9c
ZY
4911{
4912
4913 int ret;
4914 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4915 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
4916
4917 ret = iwl3945_rate_control_register();
4918 if (ret) {
a3139c59
SO
4919 printk(KERN_ERR DRV_NAME
4920 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC
4921 return ret;
4922 }
4923
bb8c093b 4924 ret = pci_register_driver(&iwl3945_driver);
b481de9c 4925 if (ret) {
a3139c59 4926 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 4927 goto error_register;
b481de9c 4928 }
b481de9c
ZY
4929
4930 return ret;
897e1cf2 4931
897e1cf2
RC
4932error_register:
4933 iwl3945_rate_control_unregister();
4934 return ret;
b481de9c
ZY
4935}
4936
bb8c093b 4937static void __exit iwl3945_exit(void)
b481de9c 4938{
bb8c093b 4939 pci_unregister_driver(&iwl3945_driver);
897e1cf2 4940 iwl3945_rate_control_unregister();
b481de9c
ZY
4941}
4942
a0987a8d 4943MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
25cb6cad 4944
df878d8f 4945module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
b481de9c 4946MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
df878d8f 4947module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
b481de9c 4948MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9c74d9fb
SO
4949module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
4950MODULE_PARM_DESC(swcrypto,
4951 "using software crypto (default 1 [software])\n");
df878d8f 4952module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
b481de9c 4953MODULE_PARM_DESC(debug, "debug output mask");
df878d8f 4954module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
b481de9c
ZY
4955MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4956
df878d8f 4957module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
b481de9c
ZY
4958MODULE_PARM_DESC(queues_num, "number of hw queues.");
4959
af48d048
SO
4960module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
4961MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4962
bb8c093b
CH
4963module_exit(iwl3945_exit);
4964module_init(iwl3945_init);
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