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iwlwifi: map A-MPDU HW queue to mac80211 A-MPDU SW queue
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
b481de9c
ZY		 41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
b481de9c
ZY		 44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
3e0d4cb1 49#include "iwl-dev.h"
fee1247a 50#include "iwl-core.h"
3395f6e9 51#include "iwl-io.h"
b481de9c 52#include "iwl-helpers.h"
6974e363 53#include "iwl-sta.h"
f0832f13 54#include "iwl-calib.h"
b481de9c 55
c79dd5b5 56static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 57 struct iwl4965_tx_queue *txq);
416e1438 58
b481de9c
ZY		 59/******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
b481de9c
ZY		 65/*
66 * module name, copyright, version, etc.
67 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
68 */
69
70#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
71
0a6857e7 72#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 73#define VD "d"
74#else
75#define VD
76#endif
77
c8b0e6e1 78#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 79#define VS "s"
80#else
81#define VS
82#endif
83
df48c323 84#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 85
b481de9c
ZY		 86
87MODULE_DESCRIPTION(DRV_DESCRIPTION);
88MODULE_VERSION(DRV_VERSION);
89MODULE_AUTHOR(DRV_COPYRIGHT);
90MODULE_LICENSE("GPL");
91
92__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
93{
94 u16 fc = le16_to_cpu(hdr->frame_control);
95 int hdr_len = ieee80211_get_hdrlen(fc);
96
97 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
98 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
99 return NULL;
100}
101
d1141dfb 102static const struct ieee80211_supported_band *iwl_get_hw_mode(
c79dd5b5 103 struct iwl_priv *priv, enum ieee80211_band band)
b481de9c 104{
8318d78a 105 return priv->hw->wiphy->bands[band];
b481de9c
ZY		 106}
107
bb8c093b 108static int iwl4965_is_empty_essid(const char *essid, int essid_len)
b481de9c
ZY		 109{
110 /* Single white space is for Linksys APs */
111 if (essid_len == 1 && essid[0] == ' ')
112 return 1;
113
114 /* Otherwise, if the entire essid is 0, we assume it is hidden */
115 while (essid_len) {
116 essid_len--;
117 if (essid[essid_len] != '\0')
118 return 0;
119 }
120
121 return 1;
122}
123
bb8c093b 124static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
b481de9c
ZY		 125{
126 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
127 const char *s = essid;
128 char *d = escaped;
129
bb8c093b 130 if (iwl4965_is_empty_essid(essid, essid_len)) {
b481de9c
ZY		 131 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
132 return escaped;
133 }
134
135 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
136 while (essid_len--) {
137 if (*s == '\0') {
138 *d++ = '\\';
139 *d++ = '0';
140 s++;
141 } else
142 *d++ = *s++;
143 }
144 *d = '\0';
145 return escaped;
146}
147
b481de9c
ZY		 148/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
149 * DMA services
150 *
151 * Theory of operation
152 *
6440adb5
CB		 153 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
154 * of buffer descriptors, each of which points to one or more data buffers for
155 * the device to read from or fill. Driver and device exchange status of each
156 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
157 * entries in each circular buffer, to protect against confusing empty and full
158 * queue states.
159 *
160 * The device reads or writes the data in the queues via the device's several
161 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
b481de9c
ZY		 162 *
163 * For Tx queue, there are low mark and high mark limits. If, after queuing
164 * the packet for Tx, free space become < low mark, Tx queue stopped. When
165 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
166 * Tx queue resumed.
167 *
6440adb5
CB		 168 * The 4965 operates with up to 17 queues: One receive queue, one transmit
169 * queue (#4) for sending commands to the device firmware, and 15 other
170 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
BC		 171 *
172 * See more detailed info in iwl-4965-hw.h.
b481de9c
ZY		 173 ***************************************************/
174
fe01b477 175int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 176{
fc4b6853 177 int s = q->read_ptr - q->write_ptr;
b481de9c 178
fc4b6853 179 if (q->read_ptr > q->write_ptr)
b481de9c
ZY		 180 s -= q->n_bd;
181
182 if (s <= 0)
183 s += q->n_window;
184 /* keep some reserve to not confuse empty and full situations */
185 s -= 2;
186 if (s < 0)
187 s = 0;
188 return s;
189}
190
b481de9c 191
bb8c093b 192static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 193{
fc4b6853
TW		 194 return q->write_ptr > q->read_ptr ?
195 (i >= q->read_ptr && i < q->write_ptr) :
196 !(i < q->read_ptr && i >= q->write_ptr);
b481de9c
ZY		 197}
198
bb8c093b 199static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 200{
6440adb5 201 /* This is for scan command, the big buffer at end of command array */
b481de9c 202 if (is_huge)
6440adb5 203 return q->n_window; /* must be power of 2 */
b481de9c 204
6440adb5 205 /* Otherwise, use normal size buffers */
b481de9c
ZY		 206 return index & (q->n_window - 1);
207}
208
6440adb5
CB		 209/**
210 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
211 */
c79dd5b5 212static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
b481de9c
ZY		 213 int count, int slots_num, u32 id)
214{
215 q->n_bd = count;
216 q->n_window = slots_num;
217 q->id = id;
218
c54b679d
TW		 219 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
220 * and iwl_queue_dec_wrap are broken. */
b481de9c
ZY		 221 BUG_ON(!is_power_of_2(count));
222
223 /* slots_num must be power-of-two size, otherwise
224 * get_cmd_index is broken. */
225 BUG_ON(!is_power_of_2(slots_num));
226
227 q->low_mark = q->n_window / 4;
228 if (q->low_mark < 4)
229 q->low_mark = 4;
230
231 q->high_mark = q->n_window / 8;
232 if (q->high_mark < 2)
233 q->high_mark = 2;
234
fc4b6853 235 q->write_ptr = q->read_ptr = 0;
b481de9c
ZY		 236
237 return 0;
238}
239
6440adb5
CB		 240/**
241 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
242 */
c79dd5b5 243static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
bb8c093b 244 struct iwl4965_tx_queue *txq, u32 id)
b481de9c
ZY		 245{
246 struct pci_dev *dev = priv->pci_dev;
247
6440adb5
CB		 248 /* Driver private data, only for Tx (not command) queues,
249 * not shared with device. */
b481de9c
ZY		 250 if (id != IWL_CMD_QUEUE_NUM) {
251 txq->txb = kmalloc(sizeof(txq->txb[0]) *
252 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
253 if (!txq->txb) {
01ebd063 254 IWL_ERROR("kmalloc for auxiliary BD "
b481de9c
ZY		 255 "structures failed\n");
256 goto error;
257 }
258 } else
259 txq->txb = NULL;
260
6440adb5
CB		 261 /* Circular buffer of transmit frame descriptors (TFDs),
262 * shared with device */
b481de9c
ZY		 263 txq->bd = pci_alloc_consistent(dev,
264 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
265 &txq->q.dma_addr);
266
267 if (!txq->bd) {
268 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
269 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
270 goto error;
271 }
272 txq->q.id = id;
273
274 return 0;
275
276 error:
277 if (txq->txb) {
278 kfree(txq->txb);
279 txq->txb = NULL;
280 }
281
282 return -ENOMEM;
283}
284
8b6eaea8
CB		 285/**
286 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
287 */
c79dd5b5 288int iwl4965_tx_queue_init(struct iwl_priv *priv,
bb8c093b 289 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
b481de9c
ZY		 290{
291 struct pci_dev *dev = priv->pci_dev;
292 int len;
293 int rc = 0;
294
8b6eaea8
CB		 295 /*
296 * Alloc buffer array for commands (Tx or other types of commands).
297 * For the command queue (#4), allocate command space + one big
298 * command for scan, since scan command is very huge; the system will
299 * not have two scans at the same time, so only one is needed.
bb54244b 300 * For normal Tx queues (all other queues), no super-size command
8b6eaea8
CB		 301 * space is needed.
302 */
857485c0 303 len = sizeof(struct iwl_cmd) * slots_num;
b481de9c
ZY		 304 if (txq_id == IWL_CMD_QUEUE_NUM)
305 len += IWL_MAX_SCAN_SIZE;
306 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
307 if (!txq->cmd)
308 return -ENOMEM;
309
8b6eaea8 310 /* Alloc driver data array and TFD circular buffer */
bb8c093b 311 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
b481de9c
ZY		 312 if (rc) {
313 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
314
315 return -ENOMEM;
316 }
317 txq->need_update = 0;
318
319 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
c54b679d 320 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
b481de9c 321 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
CB		 322
323 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 324 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 325
8b6eaea8 326 /* Tell device where to find queue */
bb8c093b 327 iwl4965_hw_tx_queue_init(priv, txq);
b481de9c
ZY		 328
329 return 0;
330}
331
332/**
bb8c093b 333 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
ZY		 334 * @txq: Transmit queue to deallocate.
335 *
336 * Empty queue by removing and destroying all BD's.
6440adb5
CB		 337 * Free all buffers.
338 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 339 */
c79dd5b5 340void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 341{
bb8c093b 342 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 343 struct pci_dev *dev = priv->pci_dev;
344 int len;
345
346 if (q->n_bd == 0)
347 return;
348
349 /* first, empty all BD's */
fc4b6853 350 for (; q->write_ptr != q->read_ptr;
c54b679d 351 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
bb8c093b 352 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 353
857485c0 354 len = sizeof(struct iwl_cmd) * q->n_window;
b481de9c
ZY		 355 if (q->id == IWL_CMD_QUEUE_NUM)
356 len += IWL_MAX_SCAN_SIZE;
357
6440adb5 358 /* De-alloc array of command/tx buffers */
b481de9c
ZY		 359 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
360
6440adb5 361 /* De-alloc circular buffer of TFDs */
b481de9c 362 if (txq->q.n_bd)
bb8c093b 363 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
ZY		 364 txq->q.n_bd, txq->bd, txq->q.dma_addr);
365
6440adb5 366 /* De-alloc array of per-TFD driver data */
b481de9c
ZY		 367 if (txq->txb) {
368 kfree(txq->txb);
369 txq->txb = NULL;
370 }
371
6440adb5 372 /* 0-fill queue descriptor structure */
b481de9c
ZY		 373 memset(txq, 0, sizeof(*txq));
374}
375
bb8c093b 376const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
b481de9c
ZY		 377
378/*************** STATION TABLE MANAGEMENT ****
9fbab516 379 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 380 * the functionality provided here
381 */
382
383/**************************************************************/
384
01ebd063 385#if 0 /* temporary disable till we add real remove station */
6440adb5
CB		 386/**
387 * iwl4965_remove_station - Remove driver's knowledge of station.
388 *
389 * NOTE: This does not remove station from device's station table.
390 */
c79dd5b5 391static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
b481de9c
ZY		 392{
393 int index = IWL_INVALID_STATION;
394 int i;
395 unsigned long flags;
396
397 spin_lock_irqsave(&priv->sta_lock, flags);
398
399 if (is_ap)
400 index = IWL_AP_ID;
401 else if (is_broadcast_ether_addr(addr))
5425e490 402 index = priv->hw_params.bcast_sta_id;
b481de9c 403 else
5425e490 404 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
b481de9c
ZY		 405 if (priv->stations[i].used &&
406 !compare_ether_addr(priv->stations[i].sta.sta.addr,
407 addr)) {
408 index = i;
409 break;
410 }
411
412 if (unlikely(index == IWL_INVALID_STATION))
413 goto out;
414
415 if (priv->stations[index].used) {
416 priv->stations[index].used = 0;
417 priv->num_stations--;
418 }
419
420 BUG_ON(priv->num_stations < 0);
421
422out:
423 spin_unlock_irqrestore(&priv->sta_lock, flags);
424 return 0;
425}
556f8db7 426#endif
b481de9c 427
6440adb5
CB		 428/**
429 * iwl4965_add_station_flags - Add station to tables in driver and device
430 */
c79dd5b5 431u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
67d62035 432 int is_ap, u8 flags, void *ht_data)
b481de9c
ZY		 433{
434 int i;
435 int index = IWL_INVALID_STATION;
bb8c093b 436 struct iwl4965_station_entry *station;
b481de9c 437 unsigned long flags_spin;
0795af57 438 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 439
440 spin_lock_irqsave(&priv->sta_lock, flags_spin);
441 if (is_ap)
442 index = IWL_AP_ID;
443 else if (is_broadcast_ether_addr(addr))
5425e490 444 index = priv->hw_params.bcast_sta_id;
b481de9c 445 else
5425e490 446 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
b481de9c
ZY		 447 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
448 addr)) {
449 index = i;
450 break;
451 }
452
453 if (!priv->stations[i].used &&
454 index == IWL_INVALID_STATION)
455 index = i;
456 }
457
458
9fbab516
BC		 459 /* These two conditions have the same outcome, but keep them separate
460 since they have different meanings */
b481de9c
ZY		 461 if (unlikely(index == IWL_INVALID_STATION)) {
462 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
463 return index;
464 }
465
466 if (priv->stations[index].used &&
467 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
468 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
469 return index;
470 }
471
472
0795af57 473 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
b481de9c
ZY		 474 station = &priv->stations[index];
475 station->used = 1;
476 priv->num_stations++;
477
6440adb5 478 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 479 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
b481de9c
ZY		 480 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
481 station->sta.mode = 0;
482 station->sta.sta.sta_id = index;
483 station->sta.station_flags = 0;
484
c8b0e6e1 485#ifdef CONFIG_IWL4965_HT
b481de9c 486 /* BCAST station and IBSS stations do not work in HT mode */
5425e490 487 if (index != priv->hw_params.bcast_sta_id &&
b481de9c 488 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR		 489 iwl4965_set_ht_add_station(priv, index,
490 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 491#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 492
493 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
CB		 494
495 /* Add station to device's station table */
bb8c093b 496 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
ZY		 497 return index;
498
499}
500
b481de9c 501
b481de9c
ZY		 502
503/*************** HOST COMMAND QUEUE FUNCTIONS *****/
504
b481de9c 505/**
bb8c093b 506 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
ZY		 507 * @priv: device private data point
508 * @cmd: a point to the ucode command structure
509 *
510 * The function returns < 0 values to indicate the operation is
511 * failed. On success, it turns the index (> 0) of command in the
512 * command queue.
513 */
857485c0 514int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
b481de9c 515{
bb8c093b
CH		 516 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
517 struct iwl4965_queue *q = &txq->q;
518 struct iwl4965_tfd_frame *tfd;
b481de9c 519 u32 *control_flags;
857485c0 520 struct iwl_cmd *out_cmd;
b481de9c
ZY		 521 u32 idx;
522 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
523 dma_addr_t phys_addr;
524 int ret;
525 unsigned long flags;
526
527 /* If any of the command structures end up being larger than
528 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
529 * we will need to increase the size of the TFD entries */
530 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
531 !(cmd->meta.flags & CMD_SIZE_HUGE));
532
fee1247a 533 if (iwl_is_rfkill(priv)) {
c342a1b9
GG		 534 IWL_DEBUG_INFO("Not sending command - RF KILL");
535 return -EIO;
536 }
537
bb8c093b 538 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
ZY		 539 IWL_ERROR("No space for Tx\n");
540 return -ENOSPC;
541 }
542
543 spin_lock_irqsave(&priv->hcmd_lock, flags);
544
fc4b6853 545 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 546 memset(tfd, 0, sizeof(*tfd));
547
548 control_flags = (u32 *) tfd;
549
fc4b6853 550 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
ZY		 551 out_cmd = &txq->cmd[idx];
552
553 out_cmd->hdr.cmd = cmd->id;
554 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
555 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
556
557 /* At this point, the out_cmd now has all of the incoming cmd
558 * information */
559
560 out_cmd->hdr.flags = 0;
561 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 562 INDEX_TO_SEQ(q->write_ptr));
b481de9c
ZY		 563 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
564 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
565
566 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
857485c0 567 offsetof(struct iwl_cmd, hdr);
bb8c093b 568 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY		 569
570 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
571 "%d bytes at %d[%d]:%d\n",
572 get_cmd_string(out_cmd->hdr.cmd),
573 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 574 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY		 575
576 txq->need_update = 1;
6440adb5
CB		 577
578 /* Set up entry in queue's byte count circular buffer */
e2a722eb 579 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
6440adb5
CB		 580
581 /* Increment and update queue's write index */
c54b679d 582 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
e2a722eb 583 ret = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 584
585 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
586 return ret ? ret : idx;
587}
588
deb09c43
EG		 589static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
590{
591 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
592
593 if (hw_decrypt)
594 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
595 else
596 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
597
598}
599
b481de9c 600/**
bb8c093b 601 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY		 602 *
603 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC		 604 * NOTE: mutex must be held before calling this fnction
605 */
c79dd5b5 606static int iwl4965_rxon_add_station(struct iwl_priv *priv,
b481de9c
ZY		 607 const u8 *addr, int is_ap)
608{
556f8db7 609 u8 sta_id;
b481de9c 610
6440adb5 611 /* Add station to device's station table */
67d62035
RR		 612#ifdef CONFIG_IWL4965_HT
613 struct ieee80211_conf *conf = &priv->hw->conf;
614 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
615
616 if ((is_ap) &&
617 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
618 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
619 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
620 0, cur_ht_config);
621 else
622#endif /* CONFIG_IWL4965_HT */
623 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
624 0, NULL);
6440adb5
CB		 625
626 /* Set up default rate scaling table in device's station table */
b481de9c
ZY		 627 iwl4965_add_station(priv, addr, is_ap);
628
556f8db7 629 return sta_id;
b481de9c
ZY		 630}
631
b481de9c 632/**
bb8c093b 633 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY		 634 *
635 * NOTE: This is really only useful during development and can eventually
636 * be #ifdef'd out once the driver is stable and folks aren't actively
637 * making changes
638 */
bb8c093b 639static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY		 640{
641 int error = 0;
642 int counter = 1;
643
644 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
645 error |= le32_to_cpu(rxon->flags &
646 (RXON_FLG_TGJ_NARROW_BAND_MSK |
647 RXON_FLG_RADAR_DETECT_MSK));
648 if (error)
649 IWL_WARNING("check 24G fields %d | %d\n",
650 counter++, error);
651 } else {
652 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
653 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
654 if (error)
655 IWL_WARNING("check 52 fields %d | %d\n",
656 counter++, error);
657 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
658 if (error)
659 IWL_WARNING("check 52 CCK %d | %d\n",
660 counter++, error);
661 }
662 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
663 if (error)
664 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
665
666 /* make sure basic rates 6Mbps and 1Mbps are supported */
667 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
668 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
669 if (error)
670 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
671
672 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
673 if (error)
674 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
675
676 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
677 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
678 if (error)
679 IWL_WARNING("check CCK and short slot %d | %d\n",
680 counter++, error);
681
682 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
683 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
684 if (error)
685 IWL_WARNING("check CCK & auto detect %d | %d\n",
686 counter++, error);
687
688 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
689 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
690 if (error)
691 IWL_WARNING("check TGG and auto detect %d | %d\n",
692 counter++, error);
693
694 if (error)
695 IWL_WARNING("Tuning to channel %d\n",
696 le16_to_cpu(rxon->channel));
697
698 if (error) {
bb8c093b 699 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY		 700 return -1;
701 }
702 return 0;
703}
704
705/**
9fbab516 706 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 707 * @priv: staging_rxon is compared to active_rxon
b481de9c 708 *
9fbab516
BC		 709 * If the RXON structure is changing enough to require a new tune,
710 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
711 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 712 */
c79dd5b5 713static int iwl4965_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY		 714{
715
716 /* These items are only settable from the full RXON command */
717 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
718 compare_ether_addr(priv->staging_rxon.bssid_addr,
719 priv->active_rxon.bssid_addr) ||
720 compare_ether_addr(priv->staging_rxon.node_addr,
721 priv->active_rxon.node_addr) ||
722 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
723 priv->active_rxon.wlap_bssid_addr) ||
724 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
725 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
726 (priv->staging_rxon.air_propagation !=
727 priv->active_rxon.air_propagation) ||
728 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
729 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
730 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
731 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
732 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
733 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
734 return 1;
735
736 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
737 * be updated with the RXON_ASSOC command -- however only some
738 * flag transitions are allowed using RXON_ASSOC */
739
740 /* Check if we are not switching bands */
741 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
742 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
743 return 1;
744
745 /* Check if we are switching association toggle */
746 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
747 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
748 return 1;
749
750 return 0;
751}
752
b481de9c 753/**
bb8c093b 754 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 755 *
01ebd063 756 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 757 * the active_rxon structure is updated with the new data. This
758 * function correctly transitions out of the RXON_ASSOC_MSK state if
759 * a HW tune is required based on the RXON structure changes.
760 */
c79dd5b5 761static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 762{
763 /* cast away the const for active_rxon in this function */
bb8c093b 764 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 765 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 766 int rc = 0;
767
fee1247a 768 if (!iwl_is_alive(priv))
b481de9c
ZY		 769 return -1;
770
771 /* always get timestamp with Rx frame */
772 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
773
bb8c093b 774 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY		 775 if (rc) {
776 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
777 return -EINVAL;
778 }
779
780 /* If we don't need to send a full RXON, we can use
bb8c093b 781 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 782 * and other flags for the current radio configuration. */
bb8c093b 783 if (!iwl4965_full_rxon_required(priv)) {
7e8c519e 784 rc = iwl_send_rxon_assoc(priv);
b481de9c
ZY		 785 if (rc) {
786 IWL_ERROR("Error setting RXON_ASSOC "
787 "configuration (%d).\n", rc);
788 return rc;
789 }
790
791 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
792
793 return 0;
794 }
795
796 /* station table will be cleared */
797 priv->assoc_station_added = 0;
798
b481de9c
ZY		 799 /* If we are currently associated and the new config requires
800 * an RXON_ASSOC and the new config wants the associated mask enabled,
801 * we must clear the associated from the active configuration
802 * before we apply the new config */
3109ece1 803 if (iwl_is_associated(priv) &&
b481de9c
ZY		 804 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
805 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
806 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
807
857485c0 808 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 809 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY		 810 &priv->active_rxon);
811
812 /* If the mask clearing failed then we set
813 * active_rxon back to what it was previously */
814 if (rc) {
815 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
816 IWL_ERROR("Error clearing ASSOC_MSK on current "
817 "configuration (%d).\n", rc);
818 return rc;
819 }
b481de9c
ZY		 820 }
821
822 IWL_DEBUG_INFO("Sending RXON\n"
823 "* with%s RXON_FILTER_ASSOC_MSK\n"
824 "* channel = %d\n"
0795af57 825 "* bssid = %s\n",
b481de9c
ZY		 826 ((priv->staging_rxon.filter_flags &
827 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
828 le16_to_cpu(priv->staging_rxon.channel),
0795af57 829 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 830
099b40b7 831 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
b481de9c 832 /* Apply the new configuration */
857485c0 833 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 834 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY		 835 if (rc) {
836 IWL_ERROR("Error setting new configuration (%d).\n", rc);
837 return rc;
838 }
839
bf85ea4f 840 iwlcore_clear_stations_table(priv);
556f8db7 841
b481de9c
ZY		 842 if (!priv->error_recovering)
843 priv->start_calib = 0;
844
f0832f13 845 iwl_init_sensitivity(priv);
b481de9c
ZY		 846
847 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
848
849 /* If we issue a new RXON command which required a tune then we must
850 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 851 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 852 if (rc) {
853 IWL_ERROR("Error setting Tx power (%d).\n", rc);
854 return rc;
855 }
856
857 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 858 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY		 859 IWL_INVALID_STATION) {
860 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
861 return -EIO;
862 }
863
864 /* If we have set the ASSOC_MSK and we are in BSS mode then
865 * add the IWL_AP_ID to the station rate table */
3109ece1 866 if (iwl_is_associated(priv) &&
b481de9c 867 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 868 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY		 869 == IWL_INVALID_STATION) {
870 IWL_ERROR("Error adding AP address for transmit.\n");
871 return -EIO;
872 }
873 priv->assoc_station_added = 1;
6974e363
EG		 874 if (priv->default_wep_key &&
875 iwl_send_static_wepkey_cmd(priv, 0))
876 IWL_ERROR("Could not send WEP static key.\n");
b481de9c
ZY		 877 }
878
879 return 0;
880}
881
5da4b55f
MA		 882void iwl4965_update_chain_flags(struct iwl_priv *priv)
883{
884
c7de35cd 885 iwl_set_rxon_chain(priv);
5da4b55f
MA		 886 iwl4965_commit_rxon(priv);
887}
888
c79dd5b5 889static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 890{
bb8c093b 891 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY		 892 .flags = 3,
893 .lead_time = 0xAA,
894 .max_kill = 1,
895 .kill_ack_mask = 0,
896 .kill_cts_mask = 0,
897 };
898
857485c0 899 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 900 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY		 901}
902
c79dd5b5 903static int iwl4965_send_scan_abort(struct iwl_priv *priv)
b481de9c
ZY		 904{
905 int rc = 0;
bb8c093b 906 struct iwl4965_rx_packet *res;
857485c0 907 struct iwl_host_cmd cmd = {
b481de9c
ZY		 908 .id = REPLY_SCAN_ABORT_CMD,
909 .meta.flags = CMD_WANT_SKB,
910 };
911
912 /* If there isn't a scan actively going on in the hardware
913 * then we are in between scan bands and not actually
914 * actively scanning, so don't send the abort command */
915 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
916 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
917 return 0;
918 }
919
857485c0 920 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 921 if (rc) {
922 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
923 return rc;
924 }
925
bb8c093b 926 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 927 if (res->u.status != CAN_ABORT_STATUS) {
928 /* The scan abort will return 1 for success or
929 * 2 for "failure". A failure condition can be
930 * due to simply not being in an active scan which
931 * can occur if we send the scan abort before we
932 * the microcode has notified us that a scan is
933 * completed. */
934 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
935 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
936 clear_bit(STATUS_SCAN_HW, &priv->status);
937 }
938
939 dev_kfree_skb_any(cmd.meta.u.skb);
940
941 return rc;
942}
943
b481de9c
ZY		 944/*
945 * CARD_STATE_CMD
946 *
9fbab516 947 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY		 948 *
949 * When in the 'enable' state the card operates as normal.
950 * When in the 'disable' state, the card enters into a low power mode.
951 * When in the 'halt' state, the card is shut down and must be fully
952 * restarted to come back on.
953 */
c79dd5b5 954static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
b481de9c 955{
857485c0 956 struct iwl_host_cmd cmd = {
b481de9c
ZY		 957 .id = REPLY_CARD_STATE_CMD,
958 .len = sizeof(u32),
959 .data = &flags,
960 .meta.flags = meta_flag,
961 };
962
857485c0 963 return iwl_send_cmd(priv, &cmd);
b481de9c
ZY		 964}
965
c79dd5b5 966int iwl4965_send_add_station(struct iwl_priv *priv,
bb8c093b 967 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 968{
bb8c093b 969 struct iwl4965_rx_packet *res = NULL;
b481de9c 970 int rc = 0;
857485c0 971 struct iwl_host_cmd cmd = {
b481de9c 972 .id = REPLY_ADD_STA,
bb8c093b 973 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY		 974 .meta.flags = flags,
975 .data = sta,
976 };
977
9e5b806c 978 if (!(flags & CMD_ASYNC))
b481de9c
ZY		 979 cmd.meta.flags |= CMD_WANT_SKB;
980
857485c0 981 rc = iwl_send_cmd(priv, &cmd);
b481de9c
ZY		 982
983 if (rc || (flags & CMD_ASYNC))
984 return rc;
985
bb8c093b 986 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 987 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
988 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
989 res->hdr.flags);
990 rc = -EIO;
991 }
992
993 if (rc == 0) {
994 switch (res->u.add_sta.status) {
995 case ADD_STA_SUCCESS_MSK:
996 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
997 break;
998 default:
999 rc = -EIO;
1000 IWL_WARNING("REPLY_ADD_STA failed\n");
1001 break;
1002 }
1003 }
1004
1005 priv->alloc_rxb_skb--;
1006 dev_kfree_skb_any(cmd.meta.u.skb);
1007
1008 return rc;
1009}
1010
c79dd5b5 1011static void iwl4965_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 1012{
1013 struct list_head *element;
1014
1015 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1016 priv->frames_count);
1017
1018 while (!list_empty(&priv->free_frames)) {
1019 element = priv->free_frames.next;
1020 list_del(element);
bb8c093b 1021 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY		 1022 priv->frames_count--;
1023 }
1024
1025 if (priv->frames_count) {
1026 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1027 priv->frames_count);
1028 priv->frames_count = 0;
1029 }
1030}
1031
c79dd5b5 1032static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
b481de9c 1033{
bb8c093b 1034 struct iwl4965_frame *frame;
b481de9c
ZY		 1035 struct list_head *element;
1036 if (list_empty(&priv->free_frames)) {
1037 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1038 if (!frame) {
1039 IWL_ERROR("Could not allocate frame!\n");
1040 return NULL;
1041 }
1042
1043 priv->frames_count++;
1044 return frame;
1045 }
1046
1047 element = priv->free_frames.next;
1048 list_del(element);
bb8c093b 1049 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY		 1050}
1051
c79dd5b5 1052static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY		 1053{
1054 memset(frame, 0, sizeof(*frame));
1055 list_add(&frame->list, &priv->free_frames);
1056}
1057
c79dd5b5 1058unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
b481de9c
ZY		 1059 struct ieee80211_hdr *hdr,
1060 const u8 *dest, int left)
1061{
1062
3109ece1 1063 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY		 1064 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1065 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1066 return 0;
1067
1068 if (priv->ibss_beacon->len > left)
1069 return 0;
1070
1071 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1072
1073 return priv->ibss_beacon->len;
1074}
1075
39e88504 1076static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 1077{
39e88504
GC		 1078 int i;
1079 int rate_mask;
1080
1081 /* Set rate mask*/
1082 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1083 rate_mask = priv->active_rate_basic & 0xF;
1084 else
1085 rate_mask = priv->active_rate_basic & 0xFF0;
b481de9c 1086
39e88504 1087 /* Find lowest valid rate */
b481de9c 1088 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
39e88504 1089 i = iwl4965_rates[i].next_ieee) {
b481de9c 1090 if (rate_mask & (1 << i))
bb8c093b 1091 return iwl4965_rates[i].plcp;
b481de9c
ZY		 1092 }
1093
39e88504
GC		 1094 /* No valid rate was found. Assign the lowest one */
1095 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1096 return IWL_RATE_1M_PLCP;
1097 else
1098 return IWL_RATE_6M_PLCP;
b481de9c
ZY		 1099}
1100
c79dd5b5 1101static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 1102{
bb8c093b 1103 struct iwl4965_frame *frame;
b481de9c
ZY		 1104 unsigned int frame_size;
1105 int rc;
1106 u8 rate;
1107
bb8c093b 1108 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY		 1109
1110 if (!frame) {
1111 IWL_ERROR("Could not obtain free frame buffer for beacon "
1112 "command.\n");
1113 return -ENOMEM;
1114 }
1115
39e88504 1116 rate = iwl4965_rate_get_lowest_plcp(priv);
b481de9c 1117
bb8c093b 1118 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1119
857485c0 1120 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 1121 &frame->u.cmd[0]);
1122
bb8c093b 1123 iwl4965_free_frame(priv, frame);
b481de9c
ZY		 1124
1125 return rc;
1126}
1127
b481de9c
ZY		 1128/******************************************************************************
1129 *
1130 * Misc. internal state and helper functions
1131 *
1132 ******************************************************************************/
b481de9c 1133
b481de9c 1134/**
bb8c093b 1135 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY		 1136 *
1137 * return : set the bit for each supported rate insert in ie
1138 */
bb8c093b 1139static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1140 u16 basic_rate, int *left)
b481de9c
ZY		 1141{
1142 u16 ret_rates = 0, bit;
1143 int i;
c7c46676
TW		 1144 u8 *cnt = ie;
1145 u8 *rates = ie + 1;
b481de9c
ZY		 1146
1147 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1148 if (bit & supported_rate) {
1149 ret_rates |= bit;
bb8c093b 1150 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW		 1151 ((bit & basic_rate) ? 0x80 : 0x00);
1152 (*cnt)++;
1153 (*left)--;
1154 if ((*left <= 0) ||
1155 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY		 1156 break;
1157 }
1158 }
1159
1160 return ret_rates;
1161}
1162
d1141dfb
EG		 1163#ifdef CONFIG_IWL4965_HT
1164static void iwl4965_ht_conf(struct iwl_priv *priv,
1165 struct ieee80211_bss_conf *bss_conf)
1166{
1167 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
1168 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
1169 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
1170
1171 IWL_DEBUG_MAC80211("enter: \n");
1172
1173 iwl_conf->is_ht = bss_conf->assoc_ht;
1174
1175 if (!iwl_conf->is_ht)
1176 return;
1177
1178 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
1179
1180 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
1181 iwl_conf->sgf |= 0x1;
1182 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
1183 iwl_conf->sgf |= 0x2;
1184
1185 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
1186 iwl_conf->max_amsdu_size =
1187 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
1188
1189 iwl_conf->supported_chan_width =
1190 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
1191 iwl_conf->extension_chan_offset =
1192 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
1193 /* If no above or below channel supplied disable FAT channel */
1194 if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
1195 iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
1196 iwl_conf->supported_chan_width = 0;
1197
1198 iwl_conf->tx_mimo_ps_mode =
1199 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
1200 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
1201
1202 iwl_conf->control_channel = ht_bss_conf->primary_channel;
1203 iwl_conf->tx_chan_width =
1204 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
1205 iwl_conf->ht_protection =
1206 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
1207 iwl_conf->non_GF_STA_present =
1208 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
1209
1210 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
1211 IWL_DEBUG_MAC80211("leave\n");
1212}
1213
1214static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband,
1215 u8 *pos, int *left)
1216{
1217 struct ieee80211_ht_cap *ht_cap;
1218
1219 if (!sband || !sband->ht_info.ht_supported)
1220 return;
1221
1222 if (*left < sizeof(struct ieee80211_ht_cap))
1223 return;
1224
1225 *pos++ = sizeof(struct ieee80211_ht_cap);
1226 ht_cap = (struct ieee80211_ht_cap *) pos;
1227
1228 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
1229 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
1230 ht_cap->ampdu_params_info =
1231 (sband->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
1232 ((sband->ht_info.ampdu_density << 2) &
1233 IEEE80211_HT_CAP_AMPDU_DENSITY);
1234 *left -= sizeof(struct ieee80211_ht_cap);
1235}
1236#else
1237static inline void iwl4965_ht_conf(struct iwl_priv *priv,
1238 struct ieee80211_bss_conf *bss_conf)
1239{
1240}
1241static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband,
1242 u8 *pos, int *left)
1243{
1244}
1245#endif
1246
1247
b481de9c 1248/**
bb8c093b 1249 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1250 */
c79dd5b5 1251static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
78330fdd
TW		 1252 enum ieee80211_band band,
1253 struct ieee80211_mgmt *frame,
1254 int left, int is_direct)
b481de9c
ZY		 1255{
1256 int len = 0;
1257 u8 *pos = NULL;
bee488db 1258 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
78330fdd 1259 const struct ieee80211_supported_band *sband =
d1141dfb 1260 iwl_get_hw_mode(priv, band);
b481de9c
ZY		 1261
1262 /* Make sure there is enough space for the probe request,
1263 * two mandatory IEs and the data */
1264 left -= 24;
1265 if (left < 0)
1266 return 0;
1267 len += 24;
1268
1269 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1270 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1271 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1272 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY		 1273 frame->seq_ctrl = 0;
1274
1275 /* fill in our indirect SSID IE */
1276 /* ...next IE... */
1277
1278 left -= 2;
1279 if (left < 0)
1280 return 0;
1281 len += 2;
1282 pos = &(frame->u.probe_req.variable[0]);
1283 *pos++ = WLAN_EID_SSID;
1284 *pos++ = 0;
1285
1286 /* fill in our direct SSID IE... */
1287 if (is_direct) {
1288 /* ...next IE... */
1289 left -= 2 + priv->essid_len;
1290 if (left < 0)
1291 return 0;
1292 /* ... fill it in... */
1293 *pos++ = WLAN_EID_SSID;
1294 *pos++ = priv->essid_len;
1295 memcpy(pos, priv->essid, priv->essid_len);
1296 pos += priv->essid_len;
1297 len += 2 + priv->essid_len;
1298 }
1299
1300 /* fill in supported rate */
1301 /* ...next IE... */
1302 left -= 2;
1303 if (left < 0)
1304 return 0;
c7c46676 1305
b481de9c
ZY		 1306 /* ... fill it in... */
1307 *pos++ = WLAN_EID_SUPP_RATES;
1308 *pos = 0;
c7c46676 1309
bee488db 1310 /* exclude 60M rate */
1311 active_rates = priv->rates_mask;
1312 active_rates &= ~IWL_RATE_60M_MASK;
1313
1314 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1315
c7c46676 1316 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1317 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1318 active_rate_basic, &left);
c7c46676
TW		 1319 active_rates &= ~ret_rates;
1320
bb8c093b 1321 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1322 active_rate_basic, &left);
c7c46676
TW		 1323 active_rates &= ~ret_rates;
1324
b481de9c
ZY		 1325 len += 2 + *pos;
1326 pos += (*pos) + 1;
c7c46676 1327 if (active_rates == 0)
b481de9c
ZY		 1328 goto fill_end;
1329
1330 /* fill in supported extended rate */
1331 /* ...next IE... */
1332 left -= 2;
1333 if (left < 0)
1334 return 0;
1335 /* ... fill it in... */
1336 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1337 *pos = 0;
bb8c093b 1338 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1339 active_rate_basic, &left);
b481de9c
ZY		 1340 if (*pos > 0)
1341 len += 2 + *pos;
1342
b481de9c 1343 fill_end:
d1141dfb
EG		 1344 /* fill in HT IE */
1345 left -= 2;
1346 if (left < 0)
1347 return 0;
1348
1349 *pos++ = WLAN_EID_HT_CAPABILITY;
1350 *pos = 0;
1351
1352 iwl_ht_cap_to_ie(sband, pos, &left);
1353
1354 if (*pos > 0)
1355 len += 2 + *pos;
b481de9c
ZY		 1356 return (u16)len;
1357}
1358
1359/*
1360 * QoS support
1361*/
c79dd5b5 1362static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 1363 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY		 1364{
1365
857485c0 1366 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
bb8c093b 1367 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY		 1368}
1369
c79dd5b5 1370static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY		 1371{
1372 unsigned long flags;
1373
b481de9c
ZY		 1374 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1375 return;
1376
1377 if (!priv->qos_data.qos_enable)
1378 return;
1379
1380 spin_lock_irqsave(&priv->lock, flags);
1381 priv->qos_data.def_qos_parm.qos_flags = 0;
1382
1383 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1384 !priv->qos_data.qos_cap.q_AP.txop_request)
1385 priv->qos_data.def_qos_parm.qos_flags |=
1386 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 1387 if (priv->qos_data.qos_active)
1388 priv->qos_data.def_qos_parm.qos_flags |=
1389 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1390
c8b0e6e1 1391#ifdef CONFIG_IWL4965_HT
fd105e79 1392 if (priv->current_ht_config.is_ht)
f1f1f5c7 1393 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 1394#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 1395
b481de9c
ZY		 1396 spin_unlock_irqrestore(&priv->lock, flags);
1397
3109ece1 1398 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW		 1399 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
1400 priv->qos_data.qos_active,
1401 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 1402
bb8c093b 1403 iwl4965_send_qos_params_command(priv,
b481de9c
ZY		 1404 &(priv->qos_data.def_qos_parm));
1405 }
1406}
1407
c79dd5b5 1408int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 1409{
1410 /* Filter incoming packets to determine if they are targeted toward
1411 * this network, discarding packets coming from ourselves */
1412 switch (priv->iw_mode) {
1413 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
1414 /* packets from our adapter are dropped (echo) */
1415 if (!compare_ether_addr(header->addr2, priv->mac_addr))
1416 return 0;
1417 /* {broad,multi}cast packets to our IBSS go through */
1418 if (is_multicast_ether_addr(header->addr1))
1419 return !compare_ether_addr(header->addr3, priv->bssid);
1420 /* packets to our adapter go through */
1421 return !compare_ether_addr(header->addr1, priv->mac_addr);
1422 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
1423 /* packets from our adapter are dropped (echo) */
1424 if (!compare_ether_addr(header->addr3, priv->mac_addr))
1425 return 0;
1426 /* {broad,multi}cast packets to our BSS go through */
1427 if (is_multicast_ether_addr(header->addr1))
1428 return !compare_ether_addr(header->addr2, priv->bssid);
1429 /* packets to our adapter go through */
1430 return !compare_ether_addr(header->addr1, priv->mac_addr);
69dc5d9d
TW		 1431 default:
1432 break;
b481de9c
ZY		 1433 }
1434
1435 return 1;
1436}
1437
1438#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1439
bb8c093b 1440static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY		 1441{
1442 switch (status & TX_STATUS_MSK) {
1443 case TX_STATUS_SUCCESS:
1444 return "SUCCESS";
1445 TX_STATUS_ENTRY(SHORT_LIMIT);
1446 TX_STATUS_ENTRY(LONG_LIMIT);
1447 TX_STATUS_ENTRY(FIFO_UNDERRUN);
1448 TX_STATUS_ENTRY(MGMNT_ABORT);
1449 TX_STATUS_ENTRY(NEXT_FRAG);
1450 TX_STATUS_ENTRY(LIFE_EXPIRE);
1451 TX_STATUS_ENTRY(DEST_PS);
1452 TX_STATUS_ENTRY(ABORTED);
1453 TX_STATUS_ENTRY(BT_RETRY);
1454 TX_STATUS_ENTRY(STA_INVALID);
1455 TX_STATUS_ENTRY(FRAG_DROPPED);
1456 TX_STATUS_ENTRY(TID_DISABLE);
1457 TX_STATUS_ENTRY(FRAME_FLUSHED);
1458 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
1459 TX_STATUS_ENTRY(TX_LOCKED);
1460 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
1461 }
1462
1463 return "UNKNOWN";
1464}
1465
1466/**
bb8c093b 1467 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY		 1468 *
1469 * NOTE: priv->mutex is not required before calling this function
1470 */
c79dd5b5 1471static int iwl4965_scan_cancel(struct iwl_priv *priv)
b481de9c
ZY		 1472{
1473 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1474 clear_bit(STATUS_SCANNING, &priv->status);
1475 return 0;
1476 }
1477
1478 if (test_bit(STATUS_SCANNING, &priv->status)) {
1479 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1480 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1481 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1482 queue_work(priv->workqueue, &priv->abort_scan);
1483
1484 } else
1485 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1486
1487 return test_bit(STATUS_SCANNING, &priv->status);
1488 }
1489
1490 return 0;
1491}
1492
1493/**
bb8c093b 1494 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY		 1495 * @ms: amount of time to wait (in milliseconds) for scan to abort
1496 *
1497 * NOTE: priv->mutex must be held before calling this function
1498 */
c79dd5b5 1499static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
b481de9c
ZY		 1500{
1501 unsigned long now = jiffies;
1502 int ret;
1503
bb8c093b 1504 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY		 1505 if (ret && ms) {
1506 mutex_unlock(&priv->mutex);
1507 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1508 test_bit(STATUS_SCANNING, &priv->status))
1509 msleep(1);
1510 mutex_lock(&priv->mutex);
1511
1512 return test_bit(STATUS_SCANNING, &priv->status);
1513 }
1514
1515 return ret;
1516}
1517
c79dd5b5 1518static void iwl4965_sequence_reset(struct iwl_priv *priv)
b481de9c
ZY		 1519{
1520 /* Reset ieee stats */
1521
1522 /* We don't reset the net_device_stats (ieee->stats) on
1523 * re-association */
1524
1525 priv->last_seq_num = -1;
1526 priv->last_frag_num = -1;
1527 priv->last_packet_time = 0;
1528
bb8c093b 1529 iwl4965_scan_cancel(priv);
b481de9c
ZY		 1530}
1531
1532#define MAX_UCODE_BEACON_INTERVAL 4096
1533#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1534
bb8c093b 1535static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 1536{
1537 u16 new_val = 0;
1538 u16 beacon_factor = 0;
1539
1540 beacon_factor =
1541 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1542 / MAX_UCODE_BEACON_INTERVAL;
1543 new_val = beacon_val / beacon_factor;
1544
1545 return cpu_to_le16(new_val);
1546}
1547
c79dd5b5 1548static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY		 1549{
1550 u64 interval_tm_unit;
1551 u64 tsf, result;
1552 unsigned long flags;
1553 struct ieee80211_conf *conf = NULL;
1554 u16 beacon_int = 0;
1555
1556 conf = ieee80211_get_hw_conf(priv->hw);
1557
1558 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW		 1559 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
1560 priv->rxon_timing.timestamp.dw[0] =
1561 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c
ZY		 1562
1563 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1564
3109ece1 1565 tsf = priv->timestamp;
b481de9c
ZY		 1566
1567 beacon_int = priv->beacon_int;
1568 spin_unlock_irqrestore(&priv->lock, flags);
1569
1570 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
1571 if (beacon_int == 0) {
1572 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1573 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1574 } else {
1575 priv->rxon_timing.beacon_interval =
1576 cpu_to_le16(beacon_int);
1577 priv->rxon_timing.beacon_interval =
bb8c093b 1578 iwl4965_adjust_beacon_interval(
b481de9c
ZY		 1579 le16_to_cpu(priv->rxon_timing.beacon_interval));
1580 }
1581
1582 priv->rxon_timing.atim_window = 0;
1583 } else {
1584 priv->rxon_timing.beacon_interval =
bb8c093b 1585 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY		 1586 /* TODO: we need to get atim_window from upper stack
1587 * for now we set to 0 */
1588 priv->rxon_timing.atim_window = 0;
1589 }
1590
1591 interval_tm_unit =
1592 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1593 result = do_div(tsf, interval_tm_unit);
1594 priv->rxon_timing.beacon_init_val =
1595 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1596
1597 IWL_DEBUG_ASSOC
1598 ("beacon interval %d beacon timer %d beacon tim %d\n",
1599 le16_to_cpu(priv->rxon_timing.beacon_interval),
1600 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1601 le16_to_cpu(priv->rxon_timing.atim_window));
1602}
1603
c79dd5b5 1604static int iwl4965_scan_initiate(struct iwl_priv *priv)
b481de9c
ZY		 1605{
1606 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1607 IWL_ERROR("APs don't scan.\n");
1608 return 0;
1609 }
1610
fee1247a 1611 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 1612 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1613 return -EIO;
1614 }
1615
1616 if (test_bit(STATUS_SCANNING, &priv->status)) {
1617 IWL_DEBUG_SCAN("Scan already in progress.\n");
1618 return -EAGAIN;
1619 }
1620
1621 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1622 IWL_DEBUG_SCAN("Scan request while abort pending. "
1623 "Queuing.\n");
1624 return -EAGAIN;
1625 }
1626
1627 IWL_DEBUG_INFO("Starting scan...\n");
1628 priv->scan_bands = 2;
1629 set_bit(STATUS_SCANNING, &priv->status);
1630 priv->scan_start = jiffies;
1631 priv->scan_pass_start = priv->scan_start;
1632
1633 queue_work(priv->workqueue, &priv->request_scan);
1634
1635 return 0;
1636}
1637
b481de9c 1638
c79dd5b5 1639static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
8318d78a 1640 enum ieee80211_band band)
b481de9c 1641{
8318d78a 1642 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY		 1643 priv->staging_rxon.flags &=
1644 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1645 | RXON_FLG_CCK_MSK);
1646 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1647 } else {
508e32e1 1648 /* Copied from iwl4965_post_associate() */
b481de9c
ZY		 1649 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1650 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1651 else
1652 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1653
1654 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
1655 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1656
1657 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1658 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1659 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1660 }
1661}
1662
1663/*
01ebd063 1664 * initialize rxon structure with default values from eeprom
b481de9c 1665 */
c79dd5b5 1666static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 1667{
bf85ea4f 1668 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 1669
1670 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1671
1672 switch (priv->iw_mode) {
1673 case IEEE80211_IF_TYPE_AP:
1674 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1675 break;
1676
1677 case IEEE80211_IF_TYPE_STA:
1678 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1679 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1680 break;
1681
1682 case IEEE80211_IF_TYPE_IBSS:
1683 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1684 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1685 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1686 RXON_FILTER_ACCEPT_GRP_MSK;
1687 break;
1688
1689 case IEEE80211_IF_TYPE_MNTR:
1690 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1691 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1692 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1693 break;
69dc5d9d
TW		 1694 default:
1695 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
1696 break;
b481de9c
ZY		 1697 }
1698
1699#if 0
1700 /* TODO: Figure out when short_preamble would be set and cache from
1701 * that */
1702 if (!hw_to_local(priv->hw)->short_preamble)
1703 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1704 else
1705 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1706#endif
1707
8622e705 1708 ch_info = iwl_get_channel_info(priv, priv->band,
b481de9c
ZY		 1709 le16_to_cpu(priv->staging_rxon.channel));
1710
1711 if (!ch_info)
1712 ch_info = &priv->channel_info[0];
1713
1714 /*
1715 * in some case A channels are all non IBSS
1716 * in this case force B/G channel
1717 */
1718 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
1719 !(is_channel_ibss(ch_info)))
1720 ch_info = &priv->channel_info[0];
1721
1722 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 1723 priv->band = ch_info->band;
b481de9c 1724
8318d78a 1725 iwl4965_set_flags_for_phymode(priv, priv->band);
b481de9c
ZY		 1726
1727 priv->staging_rxon.ofdm_basic_rates =
1728 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1729 priv->staging_rxon.cck_basic_rates =
1730 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1731
1732 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
1733 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
1734 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1735 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1736 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1737 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 1738 iwl_set_rxon_chain(priv);
b481de9c
ZY		 1739}
1740
c79dd5b5 1741static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 1742{
b481de9c 1743 if (mode == IEEE80211_IF_TYPE_IBSS) {
bf85ea4f 1744 const struct iwl_channel_info *ch_info;
b481de9c 1745
8622e705 1746 ch_info = iwl_get_channel_info(priv,
8318d78a 1747 priv->band,
b481de9c
ZY		 1748 le16_to_cpu(priv->staging_rxon.channel));
1749
1750 if (!ch_info || !is_channel_ibss(ch_info)) {
1751 IWL_ERROR("channel %d not IBSS channel\n",
1752 le16_to_cpu(priv->staging_rxon.channel));
1753 return -EINVAL;
1754 }
1755 }
1756
b481de9c
ZY		 1757 priv->iw_mode = mode;
1758
bb8c093b 1759 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 1760 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1761
bf85ea4f 1762 iwlcore_clear_stations_table(priv);
b481de9c 1763
fde3571f 1764 /* dont commit rxon if rf-kill is on*/
fee1247a 1765 if (!iwl_is_ready_rf(priv))
fde3571f
MA		 1766 return -EAGAIN;
1767
1768 cancel_delayed_work(&priv->scan_check);
1769 if (iwl4965_scan_cancel_timeout(priv, 100)) {
1770 IWL_WARNING("Aborted scan still in progress after 100ms\n");
1771 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
1772 return -EAGAIN;
1773 }
1774
bb8c093b 1775 iwl4965_commit_rxon(priv);
b481de9c
ZY		 1776
1777 return 0;
1778}
1779
c79dd5b5 1780static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
b481de9c 1781 struct ieee80211_tx_control *ctl,
857485c0 1782 struct iwl_cmd *cmd,
b481de9c 1783 struct sk_buff *skb_frag,
deb09c43 1784 int sta_id)
b481de9c 1785{
deb09c43 1786 struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
6974e363
EG		 1787 struct iwl_wep_key *wepkey;
1788 int keyidx = 0;
1789
1c014420 1790 BUG_ON(ctl->hw_key->hw_key_idx > 3);
b481de9c
ZY		 1791
1792 switch (keyinfo->alg) {
1793 case ALG_CCMP:
1794 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
1795 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
8236e183
MS		 1796 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
1797 cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
b481de9c
ZY		 1798 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
1799 break;
1800
1801 case ALG_TKIP:
b481de9c 1802 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2bc75089
EG		 1803 ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
1804 IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
1805 IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
b481de9c
ZY		 1806 break;
1807
1808 case ALG_WEP:
1c014420 1809 wepkey = &priv->wep_keys[ctl->hw_key->hw_key_idx];
6974e363
EG		 1810 cmd->cmd.tx.sec_ctl = 0;
1811 if (priv->default_wep_key) {
1812 /* the WEP key was sent as static */
1c014420 1813 keyidx = ctl->hw_key->hw_key_idx;
6974e363
EG		 1814 memcpy(&cmd->cmd.tx.key[3], wepkey->key,
1815 wepkey->key_size);
1816 if (wepkey->key_size == WEP_KEY_LEN_128)
1817 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
1818 } else {
0211ddda
EG		 1819 /* the WEP key was sent as dynamic */
1820 keyidx = keyinfo->keyidx;
1821 memcpy(&cmd->cmd.tx.key[3], keyinfo->key,
1822 keyinfo->keylen);
1823 if (keyinfo->keylen == WEP_KEY_LEN_128)
1824 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
6974e363 1825 }
b481de9c 1826
6974e363
EG		 1827 cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP |
1828 (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
b481de9c
ZY		 1829
1830 IWL_DEBUG_TX("Configuring packet for WEP encryption "
6974e363 1831 "with key %d\n", keyidx);
b481de9c
ZY		 1832 break;
1833
b481de9c
ZY		 1834 default:
1835 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
1836 break;
1837 }
1838}
1839
1840/*
1841 * handle build REPLY_TX command notification.
1842 */
c79dd5b5 1843static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
857485c0 1844 struct iwl_cmd *cmd,
b481de9c
ZY		 1845 struct ieee80211_tx_control *ctrl,
1846 struct ieee80211_hdr *hdr,
1847 int is_unicast, u8 std_id)
1848{
1849 __le16 *qc;
1850 u16 fc = le16_to_cpu(hdr->frame_control);
1851 __le32 tx_flags = cmd->cmd.tx.tx_flags;
1852
1853 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1854 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
1855 tx_flags |= TX_CMD_FLG_ACK_MSK;
1856 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
1857 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1858 if (ieee80211_is_probe_response(fc) &&
1859 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
1860 tx_flags |= TX_CMD_FLG_TSF_MSK;
1861 } else {
1862 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
1863 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1864 }
1865
87e4f7df
TW		 1866 if (ieee80211_is_back_request(fc))
1867 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
1868
1869
b481de9c
ZY		 1870 cmd->cmd.tx.sta_id = std_id;
1871 if (ieee80211_get_morefrag(hdr))
1872 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
1873
1874 qc = ieee80211_get_qos_ctrl(hdr);
1875 if (qc) {
1876 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
1877 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
1878 } else
1879 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1880
1881 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
1882 tx_flags |= TX_CMD_FLG_RTS_MSK;
1883 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
1884 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
1885 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1886 tx_flags |= TX_CMD_FLG_CTS_MSK;
1887 }
1888
1889 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
1890 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
1891
1892 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
1893 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1894 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
1895 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 1896 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 1897 else
bc434dd2 1898 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 1899 } else {
b481de9c 1900 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
ab53d8af 1901 }
b481de9c
ZY		 1902
1903 cmd->cmd.tx.driver_txop = 0;
1904 cmd->cmd.tx.tx_flags = tx_flags;
1905 cmd->cmd.tx.next_frame_len = 0;
1906}
19758bef
TW		 1907static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
1908{
1909 /* 0 - mgmt, 1 - cnt, 2 - data */
1910 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
1911 priv->tx_stats[idx].cnt++;
1912 priv->tx_stats[idx].bytes += len;
1913}
6440adb5
CB		 1914/**
1915 * iwl4965_get_sta_id - Find station's index within station table
1916 *
1917 * If new IBSS station, create new entry in station table
1918 */
c79dd5b5 1919static int iwl4965_get_sta_id(struct iwl_priv *priv,
9fbab516 1920 struct ieee80211_hdr *hdr)
b481de9c
ZY		 1921{
1922 int sta_id;
1923 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 1924 DECLARE_MAC_BUF(mac);
b481de9c 1925
6440adb5 1926 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY		 1927 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
1928 is_multicast_ether_addr(hdr->addr1))
5425e490 1929 return priv->hw_params.bcast_sta_id;
b481de9c
ZY		 1930
1931 switch (priv->iw_mode) {
1932
6440adb5
CB		 1933 /* If we are a client station in a BSS network, use the special
1934 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY		 1935 case IEEE80211_IF_TYPE_STA:
1936 return IWL_AP_ID;
1937
1938 /* If we are an AP, then find the station, or use BCAST */
1939 case IEEE80211_IF_TYPE_AP:
947b13a7 1940 sta_id = iwl_find_station(priv, hdr->addr1);
b481de9c
ZY		 1941 if (sta_id != IWL_INVALID_STATION)
1942 return sta_id;
5425e490 1943 return priv->hw_params.bcast_sta_id;
b481de9c 1944
6440adb5
CB		 1945 /* If this frame is going out to an IBSS network, find the station,
1946 * or create a new station table entry */
b481de9c 1947 case IEEE80211_IF_TYPE_IBSS:
947b13a7 1948 sta_id = iwl_find_station(priv, hdr->addr1);
b481de9c
ZY		 1949 if (sta_id != IWL_INVALID_STATION)
1950 return sta_id;
1951
6440adb5 1952 /* Create new station table entry */
67d62035
RR		 1953 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
1954 0, CMD_ASYNC, NULL);
b481de9c
ZY		 1955
1956 if (sta_id != IWL_INVALID_STATION)
1957 return sta_id;
1958
0795af57 1959 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 1960 "Defaulting to broadcast...\n",
0795af57 1961 print_mac(mac, hdr->addr1));
0a6857e7 1962 iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
5425e490 1963 return priv->hw_params.bcast_sta_id;
b481de9c
ZY		 1964
1965 default:
01ebd063 1966 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
5425e490 1967 return priv->hw_params.bcast_sta_id;
b481de9c
ZY		 1968 }
1969}
1970
1971/*
1972 * start REPLY_TX command process
1973 */
c79dd5b5 1974static int iwl4965_tx_skb(struct iwl_priv *priv,
b481de9c
ZY		 1975 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
1976{
1977 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 1978 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY		 1979 u32 *control_flags;
1980 int txq_id = ctl->queue;
bb8c093b
CH		 1981 struct iwl4965_tx_queue *txq = NULL;
1982 struct iwl4965_queue *q = NULL;
b481de9c
ZY		 1983 dma_addr_t phys_addr;
1984 dma_addr_t txcmd_phys;
87e4f7df 1985 dma_addr_t scratch_phys;
857485c0 1986 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY		 1987 u16 len, idx, len_org;
1988 u8 id, hdr_len, unicast;
1989 u8 sta_id;
1990 u16 seq_number = 0;
1991 u16 fc;
1992 __le16 *qc;
1993 u8 wait_write_ptr = 0;
1994 unsigned long flags;
1995 int rc;
1996
1997 spin_lock_irqsave(&priv->lock, flags);
fee1247a 1998 if (iwl_is_rfkill(priv)) {
b481de9c
ZY		 1999 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2000 goto drop_unlock;
2001 }
2002
32bfd35d
JB		 2003 if (!priv->vif) {
2004 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
b481de9c
ZY		 2005 goto drop_unlock;
2006 }
2007
8318d78a 2008 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
b481de9c
ZY		 2009 IWL_ERROR("ERROR: No TX rate available.\n");
2010 goto drop_unlock;
2011 }
2012
2013 unicast = !is_multicast_ether_addr(hdr->addr1);
2014 id = 0;
2015
2016 fc = le16_to_cpu(hdr->frame_control);
2017
0a6857e7 2018#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 2019 if (ieee80211_is_auth(fc))
2020 IWL_DEBUG_TX("Sending AUTH frame\n");
2021 else if (ieee80211_is_assoc_request(fc))
2022 IWL_DEBUG_TX("Sending ASSOC frame\n");
2023 else if (ieee80211_is_reassoc_request(fc))
2024 IWL_DEBUG_TX("Sending REASSOC frame\n");
2025#endif
2026
7878a5a4 2027 /* drop all data frame if we are not associated */
76f3915b 2028 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
3109ece1 2029 (!iwl_is_associated(priv) ||
a6477249 2030 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
76f3915b 2031 !priv->assoc_station_added)) {
3109ece1 2032 IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
b481de9c
ZY		 2033 goto drop_unlock;
2034 }
2035
2036 spin_unlock_irqrestore(&priv->lock, flags);
2037
2038 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
CB		 2039
2040 /* Find (or create) index into station table for destination station */
bb8c093b 2041 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2042 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 2043 DECLARE_MAC_BUF(mac);
2044
2045 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2046 print_mac(mac, hdr->addr1));
b481de9c
ZY		 2047 goto drop;
2048 }
2049
07bc28ed 2050 IWL_DEBUG_TX("station Id %d\n", sta_id);
b481de9c
ZY		 2051
2052 qc = ieee80211_get_qos_ctrl(hdr);
2053 if (qc) {
2054 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2055 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2056 IEEE80211_SCTL_SEQ;
2057 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2058 (hdr->seq_ctrl &
2059 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2060 seq_number += 0x10;
c8b0e6e1 2061#ifdef CONFIG_IWL4965_HT
b481de9c 2062 /* aggregation is on for this <sta,tid> */
fe01b477 2063 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
b481de9c 2064 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
fe01b477 2065 priv->stations[sta_id].tid[tid].tfds_in_queue++;
c8b0e6e1 2066#endif /* CONFIG_IWL4965_HT */
b481de9c 2067 }
6440adb5
CB		 2068
2069 /* Descriptor for chosen Tx queue */
b481de9c
ZY		 2070 txq = &priv->txq[txq_id];
2071 q = &txq->q;
2072
2073 spin_lock_irqsave(&priv->lock, flags);
2074
6440adb5 2075 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2076 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 2077 memset(tfd, 0, sizeof(*tfd));
2078 control_flags = (u32 *) tfd;
fc4b6853 2079 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2080
6440adb5 2081 /* Set up driver data for this TFD */
bb8c093b 2082 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW		 2083 txq->txb[q->write_ptr].skb[0] = skb;
2084 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2085 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
CB		 2086
2087 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY		 2088 out_cmd = &txq->cmd[idx];
2089 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2090 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
CB		 2091
2092 /*
2093 * Set up the Tx-command (not MAC!) header.
2094 * Store the chosen Tx queue and TFD index within the sequence field;
2095 * after Tx, uCode's Tx response will return this value so driver can
2096 * locate the frame within the tx queue and do post-tx processing.
2097 */
b481de9c
ZY		 2098 out_cmd->hdr.cmd = REPLY_TX;
2099 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2100 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB		 2101
2102 /* Copy MAC header from skb into command buffer */
b481de9c
ZY		 2103 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2104
6440adb5
CB		 2105 /*
2106 * Use the first empty entry in this queue's command buffer array
2107 * to contain the Tx command and MAC header concatenated together
2108 * (payload data will be in another buffer).
2109 * Size of this varies, due to varying MAC header length.
2110 * If end is not dword aligned, we'll have 2 extra bytes at the end
2111 * of the MAC header (device reads on dword boundaries).
2112 * We'll tell device about this padding later.
2113 */
5425e490 2114 len = priv->hw_params.tx_cmd_len +
857485c0 2115 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY		 2116
2117 len_org = len;
2118 len = (len + 3) & ~3;
2119
2120 if (len_org != len)
2121 len_org = 1;
2122 else
2123 len_org = 0;
2124
6440adb5
CB		 2125 /* Physical address of this Tx command's header (not MAC header!),
2126 * within command buffer array. */
857485c0
TW		 2127 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2128 offsetof(struct iwl_cmd, hdr);
b481de9c 2129
6440adb5
CB		 2130 /* Add buffer containing Tx command and MAC(!) header to TFD's
2131 * first entry */
bb8c093b 2132 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY		 2133
2134 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
deb09c43 2135 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
b481de9c 2136
6440adb5
CB		 2137 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2138 * if any (802.11 null frames have no payload). */
b481de9c
ZY		 2139 len = skb->len - hdr_len;
2140 if (len) {
2141 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2142 len, PCI_DMA_TODEVICE);
bb8c093b 2143 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY		 2144 }
2145
6440adb5 2146 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY		 2147 if (len_org)
2148 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
2149
6440adb5 2150 /* Total # bytes to be transmitted */
b481de9c
ZY		 2151 len = (u16)skb->len;
2152 out_cmd->cmd.tx.len = cpu_to_le16(len);
2153
2154 /* TODO need this for burst mode later on */
bb8c093b 2155 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY		 2156
2157 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 2158 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c 2159
19758bef
TW		 2160 iwl_update_tx_stats(priv, fc, len);
2161
857485c0 2162 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
87e4f7df
TW		 2163 offsetof(struct iwl4965_tx_cmd, scratch);
2164 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
2165 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
2166
b481de9c
ZY		 2167 if (!ieee80211_get_morefrag(hdr)) {
2168 txq->need_update = 1;
2169 if (qc) {
2170 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2171 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2172 }
2173 } else {
2174 wait_write_ptr = 1;
2175 txq->need_update = 0;
2176 }
2177
0a6857e7 2178 iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY		 2179 sizeof(out_cmd->cmd.tx));
2180
0a6857e7 2181 iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY		 2182 ieee80211_get_hdrlen(fc));
2183
6440adb5 2184 /* Set up entry for this TFD in Tx byte-count array */
e2a722eb 2185 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, len);
b481de9c 2186
6440adb5 2187 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 2188 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 2189 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2190 spin_unlock_irqrestore(&priv->lock, flags);
2191
2192 if (rc)
2193 return rc;
2194
bb8c093b 2195 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY		 2196 && priv->mac80211_registered) {
2197 if (wait_write_ptr) {
2198 spin_lock_irqsave(&priv->lock, flags);
2199 txq->need_update = 1;
bb8c093b 2200 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2201 spin_unlock_irqrestore(&priv->lock, flags);
2202 }
2203
2204 ieee80211_stop_queue(priv->hw, ctl->queue);
2205 }
2206
2207 return 0;
2208
2209drop_unlock:
2210 spin_unlock_irqrestore(&priv->lock, flags);
2211drop:
2212 return -1;
2213}
2214
c79dd5b5 2215static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 2216{
8318d78a 2217 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY		 2218 struct ieee80211_rate *rate;
2219 int i;
2220
d1141dfb 2221 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA		 2222 if (!hw) {
2223 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2224 return;
2225 }
b481de9c
ZY		 2226
2227 priv->active_rate = 0;
2228 priv->active_rate_basic = 0;
2229
8318d78a
JB		 2230 for (i = 0; i < hw->n_bitrates; i++) {
2231 rate = &(hw->bitrates[i]);
2232 if (rate->hw_value < IWL_RATE_COUNT)
2233 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY		 2234 }
2235
2236 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2237 priv->active_rate, priv->active_rate_basic);
2238
2239 /*
2240 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2241 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2242 * OFDM
2243 */
2244 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2245 priv->staging_rxon.cck_basic_rates =
2246 ((priv->active_rate_basic &
2247 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2248 else
2249 priv->staging_rxon.cck_basic_rates =
2250 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2251
2252 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2253 priv->staging_rxon.ofdm_basic_rates =
2254 ((priv->active_rate_basic &
2255 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2256 IWL_FIRST_OFDM_RATE) & 0xFF;
2257 else
2258 priv->staging_rxon.ofdm_basic_rates =
2259 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2260}
2261
ad97edd2 2262void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY		 2263{
2264 unsigned long flags;
2265
2266 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2267 return;
2268
2269 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2270 disable_radio ? "OFF" : "ON");
2271
2272 if (disable_radio) {
bb8c093b 2273 iwl4965_scan_cancel(priv);
b481de9c
ZY		 2274 /* FIXME: This is a workaround for AP */
2275 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2276 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2277 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 2278 CSR_UCODE_SW_BIT_RFKILL);
2279 spin_unlock_irqrestore(&priv->lock, flags);
ad97edd2 2280 /* call the host command only if no hw rf-kill set */
59003835
MA		 2281 if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
2282 iwl_is_ready(priv))
ad97edd2
MA		 2283 iwl4965_send_card_state(priv,
2284 CARD_STATE_CMD_DISABLE,
2285 0);
b481de9c 2286 set_bit(STATUS_RF_KILL_SW, &priv->status);
ad97edd2
MA		 2287
2288 /* make sure mac80211 stop sending Tx frame */
2289 if (priv->mac80211_registered)
2290 ieee80211_stop_queues(priv->hw);
b481de9c
ZY		 2291 }
2292 return;
2293 }
2294
2295 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2296 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 2297
2298 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2299 spin_unlock_irqrestore(&priv->lock, flags);
2300
2301 /* wake up ucode */
2302 msleep(10);
2303
2304 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 2305 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2306 if (!iwl_grab_nic_access(priv))
2307 iwl_release_nic_access(priv);
b481de9c
ZY		 2308 spin_unlock_irqrestore(&priv->lock, flags);
2309
2310 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2311 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2312 "disabled by HW switch\n");
2313 return;
2314 }
2315
2316 queue_work(priv->workqueue, &priv->restart);
2317 return;
2318}
2319
b481de9c
ZY		 2320#define IWL_PACKET_RETRY_TIME HZ
2321
c79dd5b5 2322int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 2323{
2324 u16 sc = le16_to_cpu(header->seq_ctrl);
2325 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2326 u16 frag = sc & IEEE80211_SCTL_FRAG;
2327 u16 *last_seq, *last_frag;
2328 unsigned long *last_time;
2329
2330 switch (priv->iw_mode) {
2331 case IEEE80211_IF_TYPE_IBSS:{
2332 struct list_head *p;
bb8c093b 2333 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY		 2334 u8 *mac = header->addr2;
2335 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2336
2337 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 2338 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY		 2339 if (!compare_ether_addr(entry->mac, mac))
2340 break;
2341 }
2342 if (p == &priv->ibss_mac_hash[index]) {
2343 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2344 if (!entry) {
bc434dd2 2345 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY		 2346 return 0;
2347 }
2348 memcpy(entry->mac, mac, ETH_ALEN);
2349 entry->seq_num = seq;
2350 entry->frag_num = frag;
2351 entry->packet_time = jiffies;
bc434dd2 2352 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY		 2353 return 0;
2354 }
2355 last_seq = &entry->seq_num;
2356 last_frag = &entry->frag_num;
2357 last_time = &entry->packet_time;
2358 break;
2359 }
2360 case IEEE80211_IF_TYPE_STA:
2361 last_seq = &priv->last_seq_num;
2362 last_frag = &priv->last_frag_num;
2363 last_time = &priv->last_packet_time;
2364 break;
2365 default:
2366 return 0;
2367 }
2368 if ((*last_seq == seq) &&
2369 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2370 if (*last_frag == frag)
2371 goto drop;
2372 if (*last_frag + 1 != frag)
2373 /* out-of-order fragment */
2374 goto drop;
2375 } else
2376 *last_seq = seq;
2377
2378 *last_frag = frag;
2379 *last_time = jiffies;
2380 return 0;
2381
2382 drop:
2383 return 1;
2384}
2385
c8b0e6e1 2386#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 2387
2388#include "iwl-spectrum.h"
2389
2390#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2391#define BEACON_TIME_MASK_HIGH 0xFF000000
2392#define TIME_UNIT 1024
2393
2394/*
2395 * extended beacon time format
2396 * time in usec will be changed into a 32-bit value in 8:24 format
2397 * the high 1 byte is the beacon counts
2398 * the lower 3 bytes is the time in usec within one beacon interval
2399 */
2400
bb8c093b 2401static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY		 2402{
2403 u32 quot;
2404 u32 rem;
2405 u32 interval = beacon_interval * 1024;
2406
2407 if (!interval || !usec)
2408 return 0;
2409
2410 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2411 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2412
2413 return (quot << 24) + rem;
2414}
2415
2416/* base is usually what we get from ucode with each received frame,
2417 * the same as HW timer counter counting down
2418 */
2419
bb8c093b 2420static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY		 2421{
2422 u32 base_low = base & BEACON_TIME_MASK_LOW;
2423 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2424 u32 interval = beacon_interval * TIME_UNIT;
2425 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2426 (addon & BEACON_TIME_MASK_HIGH);
2427
2428 if (base_low > addon_low)
2429 res += base_low - addon_low;
2430 else if (base_low < addon_low) {
2431 res += interval + base_low - addon_low;
2432 res += (1 << 24);
2433 } else
2434 res += (1 << 24);
2435
2436 return cpu_to_le32(res);
2437}
2438
c79dd5b5 2439static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY		 2440 struct ieee80211_measurement_params *params,
2441 u8 type)
2442{
bb8c093b
CH		 2443 struct iwl4965_spectrum_cmd spectrum;
2444 struct iwl4965_rx_packet *res;
857485c0 2445 struct iwl_host_cmd cmd = {
b481de9c
ZY		 2446 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2447 .data = (void *)&spectrum,
2448 .meta.flags = CMD_WANT_SKB,
2449 };
2450 u32 add_time = le64_to_cpu(params->start_time);
2451 int rc;
2452 int spectrum_resp_status;
2453 int duration = le16_to_cpu(params->duration);
2454
3109ece1 2455 if (iwl_is_associated(priv))
b481de9c 2456 add_time =
bb8c093b 2457 iwl4965_usecs_to_beacons(
b481de9c
ZY		 2458 le64_to_cpu(params->start_time) - priv->last_tsf,
2459 le16_to_cpu(priv->rxon_timing.beacon_interval));
2460
2461 memset(&spectrum, 0, sizeof(spectrum));
2462
2463 spectrum.channel_count = cpu_to_le16(1);
2464 spectrum.flags =
2465 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2466 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2467 cmd.len = sizeof(spectrum);
2468 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2469
3109ece1 2470 if (iwl_is_associated(priv))
b481de9c 2471 spectrum.start_time =
bb8c093b 2472 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY		 2473 add_time,
2474 le16_to_cpu(priv->rxon_timing.beacon_interval));
2475 else
2476 spectrum.start_time = 0;
2477
2478 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2479 spectrum.channels[0].channel = params->channel;
2480 spectrum.channels[0].type = type;
2481 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2482 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2483 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2484
857485c0 2485 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 2486 if (rc)
2487 return rc;
2488
bb8c093b 2489 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 2490 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2491 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2492 rc = -EIO;
2493 }
2494
2495 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2496 switch (spectrum_resp_status) {
2497 case 0: /* Command will be handled */
2498 if (res->u.spectrum.id != 0xff) {
2499 IWL_DEBUG_INFO
2500 ("Replaced existing measurement: %d\n",
2501 res->u.spectrum.id);
2502 priv->measurement_status &= ~MEASUREMENT_READY;
2503 }
2504 priv->measurement_status |= MEASUREMENT_ACTIVE;
2505 rc = 0;
2506 break;
2507
2508 case 1: /* Command will not be handled */
2509 rc = -EAGAIN;
2510 break;
2511 }
2512
2513 dev_kfree_skb_any(cmd.meta.u.skb);
2514
2515 return rc;
2516}
2517#endif
2518
c79dd5b5 2519static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
bb8c093b 2520 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY		 2521{
2522
2523 tx_sta->status.ack_signal = 0;
2524 tx_sta->status.excessive_retries = 0;
b481de9c
ZY		 2525
2526 if (in_interrupt())
2527 ieee80211_tx_status_irqsafe(priv->hw,
2528 tx_sta->skb[0], &(tx_sta->status));
2529 else
2530 ieee80211_tx_status(priv->hw,
2531 tx_sta->skb[0], &(tx_sta->status));
2532
2533 tx_sta->skb[0] = NULL;
2534}
2535
2536/**
6440adb5 2537 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 2538 *
6440adb5
CB		 2539 * When FW advances 'R' index, all entries between old and new 'R' index
2540 * need to be reclaimed. As result, some free space forms. If there is
2541 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 2542 */
c79dd5b5 2543int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
b481de9c 2544{
bb8c093b
CH		 2545 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
2546 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 2547 int nfreed = 0;
2548
2549 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
2550 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
2551 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 2552 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY		 2553 return 0;
2554 }
2555
c54b679d 2556 for (index = iwl_queue_inc_wrap(index, q->n_bd);
fc4b6853 2557 q->read_ptr != index;
c54b679d 2558 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 2559 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 2560 iwl4965_txstatus_to_ieee(priv,
fc4b6853 2561 &(txq->txb[txq->q.read_ptr]));
bb8c093b 2562 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY		 2563 } else if (nfreed > 1) {
2564 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 2565 q->write_ptr, q->read_ptr);
b481de9c
ZY		 2566 queue_work(priv->workqueue, &priv->restart);
2567 }
2568 nfreed++;
2569 }
2570
b481de9c
ZY		 2571 return nfreed;
2572}
2573
bb8c093b 2574static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY		 2575{
2576 status &= TX_STATUS_MSK;
2577 return (status == TX_STATUS_SUCCESS)
2578 || (status == TX_STATUS_DIRECT_DONE);
2579}
2580
2581/******************************************************************************
2582 *
2583 * Generic RX handler implementations
2584 *
2585 ******************************************************************************/
c8b0e6e1 2586#ifdef CONFIG_IWL4965_HT
b481de9c 2587
c79dd5b5 2588static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
b481de9c
ZY		 2589 struct ieee80211_hdr *hdr)
2590{
2591 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
2592 return IWL_AP_ID;
2593 else {
2594 u8 *da = ieee80211_get_DA(hdr);
947b13a7 2595 return iwl_find_station(priv, da);
b481de9c
ZY		 2596 }
2597}
2598
bb8c093b 2599static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
c79dd5b5 2600 struct iwl_priv *priv, int txq_id, int idx)
b481de9c
ZY		 2601{
2602 if (priv->txq[txq_id].txb[idx].skb[0])
2603 return (struct ieee80211_hdr *)priv->txq[txq_id].
2604 txb[idx].skb[0]->data;
2605 return NULL;
2606}
2607
bb8c093b 2608static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY		 2609{
2610 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
2611 tx_resp->frame_count);
2612 return le32_to_cpu(*scd_ssn) & MAX_SN;
2613
2614}
6440adb5
CB		 2615
2616/**
2617 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2618 */
c79dd5b5 2619static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
bb8c093b 2620 struct iwl4965_ht_agg *agg,
fe01b477 2621 struct iwl4965_tx_resp_agg *tx_resp,
b481de9c
ZY		 2622 u16 start_idx)
2623{
fe01b477
RR		 2624 u16 status;
2625 struct agg_tx_status *frame_status = &tx_resp->status;
b481de9c
ZY		 2626 struct ieee80211_tx_status *tx_status = NULL;
2627 struct ieee80211_hdr *hdr = NULL;
2628 int i, sh;
2629 int txq_id, idx;
2630 u16 seq;
2631
2632 if (agg->wait_for_ba)
6440adb5 2633 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY		 2634
2635 agg->frame_count = tx_resp->frame_count;
2636 agg->start_idx = start_idx;
2637 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 2638 agg->bitmap = 0;
b481de9c 2639
6440adb5 2640 /* # frames attempted by Tx command */
b481de9c 2641 if (agg->frame_count == 1) {
6440adb5 2642 /* Only one frame was attempted; no block-ack will arrive */
fe01b477
RR		 2643 status = le16_to_cpu(frame_status[0].status);
2644 seq = le16_to_cpu(frame_status[0].sequence);
2645 idx = SEQ_TO_INDEX(seq);
2646 txq_id = SEQ_TO_QUEUE(seq);
b481de9c 2647
b481de9c 2648 /* FIXME: code repetition */
fe01b477
RR		 2649 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2650 agg->frame_count, agg->start_idx, idx);
b481de9c 2651
fe01b477 2652 tx_status = &(priv->txq[txq_id].txb[idx].status);
b481de9c 2653 tx_status->retry_count = tx_resp->failure_frame;
fe01b477 2654 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
bb8c093b 2655 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c 2656 IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 2657 iwl4965_hwrate_to_tx_control(priv,
2658 le32_to_cpu(tx_resp->rate_n_flags),
2659 &tx_status->control);
b481de9c
ZY		 2660 /* FIXME: code repetition end */
2661
2662 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2663 status & 0xff, tx_resp->failure_frame);
2664 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 2665 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY		 2666
2667 agg->wait_for_ba = 0;
2668 } else {
6440adb5 2669 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY		 2670 u64 bitmap = 0;
2671 int start = agg->start_idx;
2672
6440adb5 2673 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY		 2674 for (i = 0; i < agg->frame_count; i++) {
2675 u16 sc;
fe01b477
RR		 2676 status = le16_to_cpu(frame_status[i].status);
2677 seq = le16_to_cpu(frame_status[i].sequence);
b481de9c
ZY		 2678 idx = SEQ_TO_INDEX(seq);
2679 txq_id = SEQ_TO_QUEUE(seq);
2680
2681 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2682 AGG_TX_STATE_ABORT_MSK))
2683 continue;
2684
2685 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2686 agg->frame_count, txq_id, idx);
2687
bb8c093b 2688 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY		 2689
2690 sc = le16_to_cpu(hdr->seq_ctrl);
2691 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2692 IWL_ERROR("BUG_ON idx doesn't match seq control"
2693 " idx=%d, seq_idx=%d, seq=%d\n",
2694 idx, SEQ_TO_SN(sc),
2695 hdr->seq_ctrl);
2696 return -1;
2697 }
2698
2699 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2700 i, idx, SEQ_TO_SN(sc));
2701
2702 sh = idx - start;
2703 if (sh > 64) {
2704 sh = (start - idx) + 0xff;
2705 bitmap = bitmap << sh;
2706 sh = 0;
2707 start = idx;
2708 } else if (sh < -64)
2709 sh = 0xff - (start - idx);
2710 else if (sh < 0) {
2711 sh = start - idx;
2712 start = idx;
2713 bitmap = bitmap << sh;
2714 sh = 0;
2715 }
2716 bitmap |= (1 << sh);
2717 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
2718 start, (u32)(bitmap & 0xFFFFFFFF));
2719 }
2720
fe01b477 2721 agg->bitmap = bitmap;
b481de9c
ZY		 2722 agg->start_idx = start;
2723 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 2724 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
b481de9c 2725 agg->frame_count, agg->start_idx,
06501d29 2726 (unsigned long long)agg->bitmap);
b481de9c
ZY		 2727
2728 if (bitmap)
2729 agg->wait_for_ba = 1;
2730 }
2731 return 0;
2732}
2733#endif
b481de9c 2734
6440adb5
CB		 2735/**
2736 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2737 */
c79dd5b5 2738static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
bb8c093b 2739 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2740{
bb8c093b 2741 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 2742 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2743 int txq_id = SEQ_TO_QUEUE(sequence);
2744 int index = SEQ_TO_INDEX(sequence);
bb8c093b 2745 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 2746 struct ieee80211_tx_status *tx_status;
bb8c093b 2747 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 2748 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1 2749#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 2750 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
2751 struct ieee80211_hdr *hdr;
2752 __le16 *qc;
b481de9c
ZY		 2753#endif
2754
2755 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
2756 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2757 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW		 2758 index, txq->q.n_bd, txq->q.write_ptr,
2759 txq->q.read_ptr);
b481de9c
ZY		 2760 return;
2761 }
2762
c8b0e6e1 2763#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 2764 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
2765 qc = ieee80211_get_qos_ctrl(hdr);
2766
2767 if (qc)
2768 tid = le16_to_cpu(*qc) & 0xf;
2769
2770 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
2771 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2772 IWL_ERROR("Station not known\n");
2773 return;
2774 }
2775
b481de9c 2776 if (txq->sched_retry) {
bb8c093b 2777 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
bb8c093b 2778 struct iwl4965_ht_agg *agg = NULL;
b481de9c 2779
fe01b477 2780 if (!qc)
b481de9c 2781 return;
b481de9c
ZY		 2782
2783 agg = &priv->stations[sta_id].tid[tid].agg;
2784
fe01b477
RR		 2785 iwl4965_tx_status_reply_tx(priv, agg,
2786 (struct iwl4965_tx_resp_agg *)tx_resp, index);
b481de9c
ZY		 2787
2788 if ((tx_resp->frame_count == 1) &&
bb8c093b 2789 !iwl4965_is_tx_success(status)) {
b481de9c
ZY		 2790 /* TODO: send BAR */
2791 }
2792
fe01b477 2793 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
0d0b2c1c 2794 int freed, ampdu_q;
c54b679d 2795 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY		 2796 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2797 "%d index %d\n", scd_ssn , index);
fe01b477
RR		 2798 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
2799 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2800
2801 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
2802 txq_id >= 0 && priv->mac80211_registered &&
0d0b2c1c
RR		 2803 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) {
2804 /* calculate mac80211 ampdu sw queue to wake */
2805 ampdu_q = txq_id - IWL_BACK_QUEUE_FIRST_ID +
2806 priv->hw->queues;
2807 if (agg->state == IWL_AGG_OFF)
2808 ieee80211_wake_queue(priv->hw, txq_id);
2809 else
2810 ieee80211_wake_queue(priv->hw, ampdu_q);
2811 }
fe01b477 2812 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
b481de9c
ZY		 2813 }
2814 } else {
c8b0e6e1 2815#endif /* CONFIG_IWL4965_HT */
fc4b6853 2816 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY		 2817
2818 tx_status->retry_count = tx_resp->failure_frame;
b481de9c 2819 tx_status->flags =
bb8c093b 2820 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 2821 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
2822 &tx_status->control);
b481de9c 2823
b481de9c 2824 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 2825 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY		 2826 status, le32_to_cpu(tx_resp->rate_n_flags),
2827 tx_resp->failure_frame);
2828
2829 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
fe01b477
RR		 2830 if (index != -1) {
2831 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
2832#ifdef CONFIG_IWL4965_HT
2833 if (tid != MAX_TID_COUNT)
2834 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2835 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
0d0b2c1c 2836 (txq_id >= 0) && priv->mac80211_registered)
fe01b477
RR		 2837 ieee80211_wake_queue(priv->hw, txq_id);
2838 if (tid != MAX_TID_COUNT)
2839 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
2840#endif
2841 }
c8b0e6e1 2842#ifdef CONFIG_IWL4965_HT
b481de9c 2843 }
c8b0e6e1 2844#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 2845
2846 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2847 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
2848}
2849
2850
c79dd5b5 2851static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
bb8c093b 2852 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2853{
bb8c093b
CH		 2854 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2855 struct iwl4965_alive_resp *palive;
b481de9c
ZY		 2856 struct delayed_work *pwork;
2857
2858 palive = &pkt->u.alive_frame;
2859
2860 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2861 "0x%01X 0x%01X\n",
2862 palive->is_valid, palive->ver_type,
2863 palive->ver_subtype);
2864
2865 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2866 IWL_DEBUG_INFO("Initialization Alive received.\n");
2867 memcpy(&priv->card_alive_init,
2868 &pkt->u.alive_frame,
bb8c093b 2869 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY		 2870 pwork = &priv->init_alive_start;
2871 } else {
2872 IWL_DEBUG_INFO("Runtime Alive received.\n");
2873 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 2874 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 2875 pwork = &priv->alive_start;
2876 }
2877
2878 /* We delay the ALIVE response by 5ms to
2879 * give the HW RF Kill time to activate... */
2880 if (palive->is_valid == UCODE_VALID_OK)
2881 queue_delayed_work(priv->workqueue, pwork,
2882 msecs_to_jiffies(5));
2883 else
2884 IWL_WARNING("uCode did not respond OK.\n");
2885}
2886
c79dd5b5 2887static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
bb8c093b 2888 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2889{
bb8c093b 2890 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 2891
2892 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2893 return;
2894}
2895
c79dd5b5 2896static void iwl4965_rx_reply_error(struct iwl_priv *priv,
bb8c093b 2897 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2898{
bb8c093b 2899 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 2900
2901 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
2902 "seq 0x%04X ser 0x%08X\n",
2903 le32_to_cpu(pkt->u.err_resp.error_type),
2904 get_cmd_string(pkt->u.err_resp.cmd_id),
2905 pkt->u.err_resp.cmd_id,
2906 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2907 le32_to_cpu(pkt->u.err_resp.error_info));
2908}
2909
2910#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2911
c79dd5b5 2912static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2913{
bb8c093b
CH		 2914 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2915 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
2916 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 2917 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2918 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2919 rxon->channel = csa->channel;
2920 priv->staging_rxon.channel = csa->channel;
2921}
2922
c79dd5b5 2923static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
bb8c093b 2924 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2925{
c8b0e6e1 2926#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH		 2927 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2928 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY		 2929
2930 if (!report->state) {
2931 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2932 "Spectrum Measure Notification: Start\n");
2933 return;
2934 }
2935
2936 memcpy(&priv->measure_report, report, sizeof(*report));
2937 priv->measurement_status |= MEASUREMENT_READY;
2938#endif
2939}
2940
c79dd5b5 2941static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
bb8c093b 2942 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2943{
0a6857e7 2944#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 2945 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2946 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 2947 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2948 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2949#endif
2950}
2951
c79dd5b5 2952static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
bb8c093b 2953 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2954{
bb8c093b 2955 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 2956 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2957 "notification for %s:\n",
2958 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
0a6857e7 2959 iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 2960}
2961
bb8c093b 2962static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 2963{
c79dd5b5
TW		 2964 struct iwl_priv *priv =
2965 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 2966 struct sk_buff *beacon;
2967
2968 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
32bfd35d 2969 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
b481de9c
ZY		 2970
2971 if (!beacon) {
2972 IWL_ERROR("update beacon failed\n");
2973 return;
2974 }
2975
2976 mutex_lock(&priv->mutex);
2977 /* new beacon skb is allocated every time; dispose previous.*/
2978 if (priv->ibss_beacon)
2979 dev_kfree_skb(priv->ibss_beacon);
2980
2981 priv->ibss_beacon = beacon;
2982 mutex_unlock(&priv->mutex);
2983
bb8c093b 2984 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 2985}
2986
c79dd5b5 2987static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
bb8c093b 2988 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2989{
0a6857e7 2990#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 2991 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2992 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
2993 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 2994
2995 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
2996 "tsf %d %d rate %d\n",
2997 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
2998 beacon->beacon_notify_hdr.failure_frame,
2999 le32_to_cpu(beacon->ibss_mgr_status),
3000 le32_to_cpu(beacon->high_tsf),
3001 le32_to_cpu(beacon->low_tsf), rate);
3002#endif
3003
3004 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3005 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3006 queue_work(priv->workqueue, &priv->beacon_update);
3007}
3008
3009/* Service response to REPLY_SCAN_CMD (0x80) */
c79dd5b5 3010static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
bb8c093b 3011 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3012{
0a6857e7 3013#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3014 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3015 struct iwl4965_scanreq_notification *notif =
3016 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY		 3017
3018 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3019#endif
3020}
3021
3022/* Service SCAN_START_NOTIFICATION (0x82) */
c79dd5b5 3023static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
bb8c093b 3024 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3025{
bb8c093b
CH		 3026 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3027 struct iwl4965_scanstart_notification *notif =
3028 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY		 3029 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3030 IWL_DEBUG_SCAN("Scan start: "
3031 "%d [802.11%s] "
3032 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3033 notif->channel,
3034 notif->band ? "bg" : "a",
3035 notif->tsf_high,
3036 notif->tsf_low, notif->status, notif->beacon_timer);
3037}
3038
3039/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
c79dd5b5 3040static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
bb8c093b 3041 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3042{
bb8c093b
CH		 3043 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3044 struct iwl4965_scanresults_notification *notif =
3045 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY		 3046
3047 IWL_DEBUG_SCAN("Scan ch.res: "
3048 "%d [802.11%s] "
3049 "(TSF: 0x%08X:%08X) - %d "
3050 "elapsed=%lu usec (%dms since last)\n",
3051 notif->channel,
3052 notif->band ? "bg" : "a",
3053 le32_to_cpu(notif->tsf_high),
3054 le32_to_cpu(notif->tsf_low),
3055 le32_to_cpu(notif->statistics[0]),
3056 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3057 jiffies_to_msecs(elapsed_jiffies
3058 (priv->last_scan_jiffies, jiffies)));
3059
3060 priv->last_scan_jiffies = jiffies;
7878a5a4 3061 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3062}
3063
3064/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
c79dd5b5 3065static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
bb8c093b 3066 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3067{
bb8c093b
CH		 3068 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3069 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY		 3070
3071 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3072 scan_notif->scanned_channels,
3073 scan_notif->tsf_low,
3074 scan_notif->tsf_high, scan_notif->status);
3075
3076 /* The HW is no longer scanning */
3077 clear_bit(STATUS_SCAN_HW, &priv->status);
3078
3079 /* The scan completion notification came in, so kill that timer... */
3080 cancel_delayed_work(&priv->scan_check);
3081
3082 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3083 (priv->scan_bands == 2) ? "2.4" : "5.2",
3084 jiffies_to_msecs(elapsed_jiffies
3085 (priv->scan_pass_start, jiffies)));
3086
3087 /* Remove this scanned band from the list
3088 * of pending bands to scan */
3089 priv->scan_bands--;
3090
3091 /* If a request to abort was given, or the scan did not succeed
3092 * then we reset the scan state machine and terminate,
3093 * re-queuing another scan if one has been requested */
3094 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3095 IWL_DEBUG_INFO("Aborted scan completed.\n");
3096 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3097 } else {
3098 /* If there are more bands on this scan pass reschedule */
3099 if (priv->scan_bands > 0)
3100 goto reschedule;
3101 }
3102
3103 priv->last_scan_jiffies = jiffies;
7878a5a4 3104 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3105 IWL_DEBUG_INFO("Setting scan to off\n");
3106
3107 clear_bit(STATUS_SCANNING, &priv->status);
3108
3109 IWL_DEBUG_INFO("Scan took %dms\n",
3110 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3111
3112 queue_work(priv->workqueue, &priv->scan_completed);
3113
3114 return;
3115
3116reschedule:
3117 priv->scan_pass_start = jiffies;
3118 queue_work(priv->workqueue, &priv->request_scan);
3119}
3120
3121/* Handle notification from uCode that card's power state is changing
3122 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 3123static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
bb8c093b 3124 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3125{
bb8c093b 3126 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3127 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3128 unsigned long status = priv->status;
3129
3130 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3131 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3132 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3133
3134 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3135 RF_CARD_DISABLED)) {
3136
3395f6e9 3137 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 3138 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3139
3395f6e9
TW		 3140 if (!iwl_grab_nic_access(priv)) {
3141 iwl_write_direct32(
b481de9c
ZY		 3142 priv, HBUS_TARG_MBX_C,
3143 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3144
3395f6e9 3145 iwl_release_nic_access(priv);
b481de9c
ZY		 3146 }
3147
3148 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 3149 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 3150 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW		 3151 if (!iwl_grab_nic_access(priv)) {
3152 iwl_write_direct32(
b481de9c
ZY		 3153 priv, HBUS_TARG_MBX_C,
3154 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3155
3395f6e9 3156 iwl_release_nic_access(priv);
b481de9c
ZY		 3157 }
3158 }
3159
3160 if (flags & RF_CARD_DISABLED) {
3395f6e9 3161 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 3162 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW		 3163 iwl_read32(priv, CSR_UCODE_DRV_GP1);
3164 if (!iwl_grab_nic_access(priv))
3165 iwl_release_nic_access(priv);
b481de9c
ZY		 3166 }
3167 }
3168
3169 if (flags & HW_CARD_DISABLED)
3170 set_bit(STATUS_RF_KILL_HW, &priv->status);
3171 else
3172 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3173
3174
3175 if (flags & SW_CARD_DISABLED)
3176 set_bit(STATUS_RF_KILL_SW, &priv->status);
3177 else
3178 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3179
3180 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 3181 iwl4965_scan_cancel(priv);
b481de9c
ZY		 3182
3183 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3184 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3185 (test_bit(STATUS_RF_KILL_SW, &status) !=
3186 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3187 queue_work(priv->workqueue, &priv->rf_kill);
3188 else
3189 wake_up_interruptible(&priv->wait_command_queue);
3190}
3191
3192/**
bb8c093b 3193 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 3194 *
3195 * Setup the RX handlers for each of the reply types sent from the uCode
3196 * to the host.
3197 *
3198 * This function chains into the hardware specific files for them to setup
3199 * any hardware specific handlers as well.
3200 */
c79dd5b5 3201static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 3202{
bb8c093b
CH		 3203 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
3204 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
3205 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
3206 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 3207 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH		 3208 iwl4965_rx_spectrum_measure_notif;
3209 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 3210 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH		 3211 iwl4965_rx_pm_debug_statistics_notif;
3212 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 3213
9fbab516
BC		 3214 /*
3215 * The same handler is used for both the REPLY to a discrete
3216 * statistics request from the host as well as for the periodic
3217 * statistics notifications (after received beacons) from the uCode.
b481de9c 3218 */
bb8c093b
CH		 3219 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
3220 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 3221
bb8c093b
CH		 3222 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
3223 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 3224 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 3225 iwl4965_rx_scan_results_notif;
b481de9c 3226 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH		 3227 iwl4965_rx_scan_complete_notif;
3228 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
3229 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 3230
9fbab516 3231 /* Set up hardware specific Rx handlers */
d4789efe 3232 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY		 3233}
3234
3235/**
bb8c093b 3236 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY		 3237 * @rxb: Rx buffer to reclaim
3238 *
3239 * If an Rx buffer has an async callback associated with it the callback
3240 * will be executed. The attached skb (if present) will only be freed
3241 * if the callback returns 1
3242 */
c79dd5b5 3243static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
bb8c093b 3244 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3245{
bb8c093b 3246 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 3247 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3248 int txq_id = SEQ_TO_QUEUE(sequence);
3249 int index = SEQ_TO_INDEX(sequence);
3250 int huge = sequence & SEQ_HUGE_FRAME;
3251 int cmd_index;
857485c0 3252 struct iwl_cmd *cmd;
b481de9c
ZY		 3253
3254 /* If a Tx command is being handled and it isn't in the actual
3255 * command queue then there a command routing bug has been introduced
3256 * in the queue management code. */
3257 if (txq_id != IWL_CMD_QUEUE_NUM)
3258 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3259 txq_id, pkt->hdr.cmd);
3260 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3261
3262 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3263 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3264
3265 /* Input error checking is done when commands are added to queue. */
3266 if (cmd->meta.flags & CMD_WANT_SKB) {
3267 cmd->meta.source->u.skb = rxb->skb;
3268 rxb->skb = NULL;
3269 } else if (cmd->meta.u.callback &&
3270 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3271 rxb->skb = NULL;
3272
bb8c093b 3273 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY		 3274
3275 if (!(cmd->meta.flags & CMD_ASYNC)) {
3276 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3277 wake_up_interruptible(&priv->wait_command_queue);
3278 }
3279}
3280
3281/************************** RX-FUNCTIONS ****************************/
3282/*
3283 * Rx theory of operation
3284 *
9fbab516
BC		 3285 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
3286 * each of which point to Receive Buffers to be filled by 4965. These get
3287 * used not only for Rx frames, but for any command response or notification
3288 * from the 4965. The driver and 4965 manage the Rx buffers by means
3289 * of indexes into the circular buffer.
b481de9c
ZY		 3290 *
3291 * Rx Queue Indexes
3292 * The host/firmware share two index registers for managing the Rx buffers.
3293 *
3294 * The READ index maps to the first position that the firmware may be writing
3295 * to -- the driver can read up to (but not including) this position and get
3296 * good data.
3297 * The READ index is managed by the firmware once the card is enabled.
3298 *
3299 * The WRITE index maps to the last position the driver has read from -- the
3300 * position preceding WRITE is the last slot the firmware can place a packet.
3301 *
3302 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3303 * WRITE = READ.
3304 *
9fbab516 3305 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY		 3306 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3307 *
9fbab516 3308 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY		 3309 * and fire the RX interrupt. The driver can then query the READ index and
3310 * process as many packets as possible, moving the WRITE index forward as it
3311 * resets the Rx queue buffers with new memory.
3312 *
3313 * The management in the driver is as follows:
3314 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3315 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 3316 * to replenish the iwl->rxq->rx_free.
bb8c093b 3317 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY		 3318 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3319 * 'processed' and 'read' driver indexes as well)
3320 * + A received packet is processed and handed to the kernel network stack,
3321 * detached from the iwl->rxq. The driver 'processed' index is updated.
3322 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3323 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3324 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3325 * were enough free buffers and RX_STALLED is set it is cleared.
3326 *
3327 *
3328 * Driver sequence:
3329 *
9fbab516
BC		 3330 * iwl4965_rx_queue_alloc() Allocates rx_free
3331 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 3332 * iwl4965_rx_queue_restock
9fbab516 3333 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY		 3334 * queue, updates firmware pointers, and updates
3335 * the WRITE index. If insufficient rx_free buffers
bb8c093b 3336 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY		 3337 *
3338 * -- enable interrupts --
9fbab516 3339 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY		 3340 * READ INDEX, detaching the SKB from the pool.
3341 * Moves the packet buffer from queue to rx_used.
bb8c093b 3342 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY		 3343 * slots.
3344 * ...
3345 *
3346 */
3347
3348/**
bb8c093b 3349 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 3350 */
bb8c093b 3351static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY		 3352{
3353 int s = q->read - q->write;
3354 if (s <= 0)
3355 s += RX_QUEUE_SIZE;
3356 /* keep some buffer to not confuse full and empty queue */
3357 s -= 2;
3358 if (s < 0)
3359 s = 0;
3360 return s;
3361}
3362
3363/**
bb8c093b 3364 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 3365 */
c79dd5b5 3366int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY		 3367{
3368 u32 reg = 0;
3369 int rc = 0;
3370 unsigned long flags;
3371
3372 spin_lock_irqsave(&q->lock, flags);
3373
3374 if (q->need_update == 0)
3375 goto exit_unlock;
3376
6440adb5 3377 /* If power-saving is in use, make sure device is awake */
b481de9c 3378 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3395f6e9 3379 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 3380
3381 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3395f6e9 3382 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 3383 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3384 goto exit_unlock;
3385 }
3386
3395f6e9 3387 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 3388 if (rc)
3389 goto exit_unlock;
3390
6440adb5 3391 /* Device expects a multiple of 8 */
3395f6e9 3392 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 3393 q->write & ~0x7);
3395f6e9 3394 iwl_release_nic_access(priv);
6440adb5
CB		 3395
3396 /* Else device is assumed to be awake */
b481de9c 3397 } else
6440adb5 3398 /* Device expects a multiple of 8 */
3395f6e9 3399 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY		 3400
3401
3402 q->need_update = 0;
3403
3404 exit_unlock:
3405 spin_unlock_irqrestore(&q->lock, flags);
3406 return rc;
3407}
3408
3409/**
9fbab516 3410 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 3411 */
c79dd5b5 3412static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY		 3413 dma_addr_t dma_addr)
3414{
3415 return cpu_to_le32((u32)(dma_addr >> 8));
3416}
3417
3418
3419/**
bb8c093b 3420 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 3421 *
9fbab516 3422 * If there are slots in the RX queue that need to be restocked,
b481de9c 3423 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 3424 * as we can, pulling from rx_free.
b481de9c
ZY		 3425 *
3426 * This moves the 'write' index forward to catch up with 'processed', and
3427 * also updates the memory address in the firmware to reference the new
3428 * target buffer.
3429 */
c79dd5b5 3430static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
b481de9c 3431{
bb8c093b 3432 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3433 struct list_head *element;
bb8c093b 3434 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 3435 unsigned long flags;
3436 int write, rc;
3437
3438 spin_lock_irqsave(&rxq->lock, flags);
3439 write = rxq->write & ~0x7;
bb8c093b 3440 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 3441 /* Get next free Rx buffer, remove from free list */
b481de9c 3442 element = rxq->rx_free.next;
bb8c093b 3443 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 3444 list_del(element);
6440adb5
CB		 3445
3446 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 3447 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY		 3448 rxq->queue[rxq->write] = rxb;
3449 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3450 rxq->free_count--;
3451 }
3452 spin_unlock_irqrestore(&rxq->lock, flags);
3453 /* If the pre-allocated buffer pool is dropping low, schedule to
3454 * refill it */
3455 if (rxq->free_count <= RX_LOW_WATERMARK)
3456 queue_work(priv->workqueue, &priv->rx_replenish);
3457
3458
6440adb5
CB		 3459 /* If we've added more space for the firmware to place data, tell it.
3460 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY		 3461 if ((write != (rxq->write & ~0x7))
3462 || (abs(rxq->write - rxq->read) > 7)) {
3463 spin_lock_irqsave(&rxq->lock, flags);
3464 rxq->need_update = 1;
3465 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 3466 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY		 3467 if (rc)
3468 return rc;
3469 }
3470
3471 return 0;
3472}
3473
3474/**
bb8c093b 3475 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY		 3476 *
3477 * When moving to rx_free an SKB is allocated for the slot.
3478 *
bb8c093b 3479 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 3480 * This is called as a scheduled work item (except for during initialization)
b481de9c 3481 */
c79dd5b5 3482static void iwl4965_rx_allocate(struct iwl_priv *priv)
b481de9c 3483{
bb8c093b 3484 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3485 struct list_head *element;
bb8c093b 3486 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 3487 unsigned long flags;
3488 spin_lock_irqsave(&rxq->lock, flags);
3489 while (!list_empty(&rxq->rx_used)) {
3490 element = rxq->rx_used.next;
bb8c093b 3491 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
CB		 3492
3493 /* Alloc a new receive buffer */
b481de9c 3494 rxb->skb =
5425e490 3495 alloc_skb(priv->hw_params.rx_buf_size,
9ee1ba47 3496 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY		 3497 if (!rxb->skb) {
3498 if (net_ratelimit())
3499 printk(KERN_CRIT DRV_NAME
3500 ": Can not allocate SKB buffers\n");
3501 /* We don't reschedule replenish work here -- we will
3502 * call the restock method and if it still needs
3503 * more buffers it will schedule replenish */
3504 break;
3505 }
3506 priv->alloc_rxb_skb++;
3507 list_del(element);
6440adb5
CB		 3508
3509 /* Get physical address of RB/SKB */
b481de9c
ZY		 3510 rxb->dma_addr =
3511 pci_map_single(priv->pci_dev, rxb->skb->data,
5425e490 3512 priv->hw_params.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3513 list_add_tail(&rxb->list, &rxq->rx_free);
3514 rxq->free_count++;
3515 }
3516 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA		 3517}
3518
3519/*
3520 * this should be called while priv->lock is locked
3521*/
4fd1f841 3522static void __iwl4965_rx_replenish(void *data)
5c0eef96 3523{
c79dd5b5 3524 struct iwl_priv *priv = data;
5c0eef96
MA		 3525
3526 iwl4965_rx_allocate(priv);
3527 iwl4965_rx_queue_restock(priv);
3528}
3529
3530
3531void iwl4965_rx_replenish(void *data)
3532{
c79dd5b5 3533 struct iwl_priv *priv = data;
5c0eef96
MA		 3534 unsigned long flags;
3535
3536 iwl4965_rx_allocate(priv);
b481de9c
ZY		 3537
3538 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3539 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 3540 spin_unlock_irqrestore(&priv->lock, flags);
3541}
3542
3543/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 3544 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY		 3545 * This free routine walks the list of POOL entries and if SKB is set to
3546 * non NULL it is unmapped and freed
3547 */
c79dd5b5 3548static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 3549{
3550 int i;
3551 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3552 if (rxq->pool[i].skb != NULL) {
3553 pci_unmap_single(priv->pci_dev,
3554 rxq->pool[i].dma_addr,
5425e490 3555 priv->hw_params.rx_buf_size,
9ee1ba47 3556 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3557 dev_kfree_skb(rxq->pool[i].skb);
3558 }
3559 }
3560
3561 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3562 rxq->dma_addr);
3563 rxq->bd = NULL;
3564}
3565
c79dd5b5 3566int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
b481de9c 3567{
bb8c093b 3568 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 3569 struct pci_dev *dev = priv->pci_dev;
3570 int i;
3571
3572 spin_lock_init(&rxq->lock);
3573 INIT_LIST_HEAD(&rxq->rx_free);
3574 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
CB		 3575
3576 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY		 3577 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3578 if (!rxq->bd)
3579 return -ENOMEM;
6440adb5 3580
b481de9c
ZY		 3581 /* Fill the rx_used queue with _all_ of the Rx buffers */
3582 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3583 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 3584
b481de9c
ZY		 3585 /* Set us so that we have processed and used all buffers, but have
3586 * not restocked the Rx queue with fresh buffers */
3587 rxq->read = rxq->write = 0;
3588 rxq->free_count = 0;
3589 rxq->need_update = 0;
3590 return 0;
3591}
3592
c79dd5b5 3593void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 3594{
3595 unsigned long flags;
3596 int i;
3597 spin_lock_irqsave(&rxq->lock, flags);
3598 INIT_LIST_HEAD(&rxq->rx_free);
3599 INIT_LIST_HEAD(&rxq->rx_used);
3600 /* Fill the rx_used queue with _all_ of the Rx buffers */
3601 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3602 /* In the reset function, these buffers may have been allocated
3603 * to an SKB, so we need to unmap and free potential storage */
3604 if (rxq->pool[i].skb != NULL) {
3605 pci_unmap_single(priv->pci_dev,
3606 rxq->pool[i].dma_addr,
5425e490 3607 priv->hw_params.rx_buf_size,
9ee1ba47 3608 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3609 priv->alloc_rxb_skb--;
3610 dev_kfree_skb(rxq->pool[i].skb);
3611 rxq->pool[i].skb = NULL;
3612 }
3613 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3614 }
3615
3616 /* Set us so that we have processed and used all buffers, but have
3617 * not restocked the Rx queue with fresh buffers */
3618 rxq->read = rxq->write = 0;
3619 rxq->free_count = 0;
3620 spin_unlock_irqrestore(&rxq->lock, flags);
3621}
3622
3623/* Convert linear signal-to-noise ratio into dB */
3624static u8 ratio2dB[100] = {
3625/* 0 1 2 3 4 5 6 7 8 9 */
3626 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3627 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3628 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3629 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3630 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3631 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3632 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3633 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3634 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3635 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3636};
3637
3638/* Calculates a relative dB value from a ratio of linear
3639 * (i.e. not dB) signal levels.
3640 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 3641int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 3642{
c899a575
AB		 3643 /* 1000:1 or higher just report as 60 dB */
3644 if (sig_ratio >= 1000)
b481de9c
ZY		 3645 return 60;
3646
c899a575 3647 /* 100:1 or higher, divide by 10 and use table,
b481de9c 3648 * add 20 dB to make up for divide by 10 */
c899a575 3649 if (sig_ratio >= 100)
b481de9c
ZY		 3650 return (20 + (int)ratio2dB[sig_ratio/10]);
3651
3652 /* We shouldn't see this */
3653 if (sig_ratio < 1)
3654 return 0;
3655
3656 /* Use table for ratios 1:1 - 99:1 */
3657 return (int)ratio2dB[sig_ratio];
3658}
3659
3660#define PERFECT_RSSI (-20) /* dBm */
3661#define WORST_RSSI (-95) /* dBm */
3662#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3663
3664/* Calculate an indication of rx signal quality (a percentage, not dBm!).
3665 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3666 * about formulas used below. */
bb8c093b 3667int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY		 3668{
3669 int sig_qual;
3670 int degradation = PERFECT_RSSI - rssi_dbm;
3671
3672 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3673 * as indicator; formula is (signal dbm - noise dbm).
3674 * SNR at or above 40 is a great signal (100%).
3675 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3676 * Weakest usable signal is usually 10 - 15 dB SNR. */
3677 if (noise_dbm) {
3678 if (rssi_dbm - noise_dbm >= 40)
3679 return 100;
3680 else if (rssi_dbm < noise_dbm)
3681 return 0;
3682 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3683
3684 /* Else use just the signal level.
3685 * This formula is a least squares fit of data points collected and
3686 * compared with a reference system that had a percentage (%) display
3687 * for signal quality. */
3688 } else
3689 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3690 (15 * RSSI_RANGE + 62 * degradation)) /
3691 (RSSI_RANGE * RSSI_RANGE);
3692
3693 if (sig_qual > 100)
3694 sig_qual = 100;
3695 else if (sig_qual < 1)
3696 sig_qual = 0;
3697
3698 return sig_qual;
3699}
3700
3701/**
9fbab516 3702 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 3703 *
3704 * Uses the priv->rx_handlers callback function array to invoke
3705 * the appropriate handlers, including command responses,
3706 * frame-received notifications, and other notifications.
3707 */
c79dd5b5 3708static void iwl4965_rx_handle(struct iwl_priv *priv)
b481de9c 3709{
bb8c093b
CH		 3710 struct iwl4965_rx_mem_buffer *rxb;
3711 struct iwl4965_rx_packet *pkt;
3712 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 3713 u32 r, i;
3714 int reclaim;
3715 unsigned long flags;
5c0eef96 3716 u8 fill_rx = 0;
d68ab680 3717 u32 count = 8;
b481de9c 3718
6440adb5
CB		 3719 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3720 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 3721 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY		 3722 i = rxq->read;
3723
3724 /* Rx interrupt, but nothing sent from uCode */
3725 if (i == r)
3726 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3727
5c0eef96
MA		 3728 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3729 fill_rx = 1;
3730
b481de9c
ZY		 3731 while (i != r) {
3732 rxb = rxq->queue[i];
3733
9fbab516 3734 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 3735 * then a bug has been introduced in the queue refilling
3736 * routines -- catch it here */
3737 BUG_ON(rxb == NULL);
3738
3739 rxq->queue[i] = NULL;
3740
3741 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 3742 priv->hw_params.rx_buf_size,
b481de9c 3743 PCI_DMA_FROMDEVICE);
bb8c093b 3744 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 3745
3746 /* Reclaim a command buffer only if this packet is a response
3747 * to a (driver-originated) command.
3748 * If the packet (e.g. Rx frame) originated from uCode,
3749 * there is no command buffer to reclaim.
3750 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3751 * but apparently a few don't get set; catch them here. */
3752 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3753 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 3754 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 3755 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 3756 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3757 (pkt->hdr.cmd != REPLY_TX);
3758
3759 /* Based on type of command response or notification,
3760 * handle those that need handling via function in
bb8c093b 3761 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY		 3762 if (priv->rx_handlers[pkt->hdr.cmd]) {
3763 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3764 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3765 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3766 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3767 } else {
3768 /* No handling needed */
3769 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3770 "r %d i %d No handler needed for %s, 0x%02x\n",
3771 r, i, get_cmd_string(pkt->hdr.cmd),
3772 pkt->hdr.cmd);
3773 }
3774
3775 if (reclaim) {
9fbab516 3776 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 3777 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY		 3778 * as we reclaim the driver command queue */
3779 if (rxb && rxb->skb)
bb8c093b 3780 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY		 3781 else
3782 IWL_WARNING("Claim null rxb?\n");
3783 }
3784
3785 /* For now we just don't re-use anything. We can tweak this
3786 * later to try and re-use notification packets and SKBs that
3787 * fail to Rx correctly */
3788 if (rxb->skb != NULL) {
3789 priv->alloc_rxb_skb--;
3790 dev_kfree_skb_any(rxb->skb);
3791 rxb->skb = NULL;
3792 }
3793
3794 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 3795 priv->hw_params.rx_buf_size,
9ee1ba47 3796 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3797 spin_lock_irqsave(&rxq->lock, flags);
3798 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3799 spin_unlock_irqrestore(&rxq->lock, flags);
3800 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 3801 /* If there are a lot of unused frames,
3802 * restock the Rx queue so ucode wont assert. */
3803 if (fill_rx) {
3804 count++;
3805 if (count >= 8) {
3806 priv->rxq.read = i;
3807 __iwl4965_rx_replenish(priv);
3808 count = 0;
3809 }
3810 }
b481de9c
ZY		 3811 }
3812
3813 /* Backtrack one entry */
3814 priv->rxq.read = i;
bb8c093b 3815 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 3816}
3817
6440adb5
CB		 3818/**
3819 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
3820 */
c79dd5b5 3821static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 3822 struct iwl4965_tx_queue *txq)
b481de9c
ZY		 3823{
3824 u32 reg = 0;
3825 int rc = 0;
3826 int txq_id = txq->q.id;
3827
3828 if (txq->need_update == 0)
3829 return rc;
3830
3831 /* if we're trying to save power */
3832 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3833 /* wake up nic if it's powered down ...
3834 * uCode will wake up, and interrupt us again, so next
3835 * time we'll skip this part. */
3395f6e9 3836 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 3837
3838 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3839 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3395f6e9 3840 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 3841 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3842 return rc;
3843 }
3844
3845 /* restore this queue's parameters in nic hardware. */
3395f6e9 3846 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 3847 if (rc)
3848 return rc;
3395f6e9 3849 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 3850 txq->q.write_ptr | (txq_id << 8));
3395f6e9 3851 iwl_release_nic_access(priv);
b481de9c
ZY		 3852
3853 /* else not in power-save mode, uCode will never sleep when we're
3854 * trying to tx (during RFKILL, we're not trying to tx). */
3855 } else
3395f6e9 3856 iwl_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 3857 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY		 3858
3859 txq->need_update = 0;
3860
3861 return rc;
3862}
3863
0a6857e7 3864#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 3865static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 3866{
0795af57
JP		 3867 DECLARE_MAC_BUF(mac);
3868
b481de9c 3869 IWL_DEBUG_RADIO("RX CONFIG:\n");
0a6857e7 3870 iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 3871 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3872 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3873 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3874 le32_to_cpu(rxon->filter_flags));
3875 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3876 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3877 rxon->ofdm_basic_rates);
3878 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP		 3879 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
3880 print_mac(mac, rxon->node_addr));
3881 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
3882 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY		 3883 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3884}
3885#endif
3886
c79dd5b5 3887static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 3888{
3889 IWL_DEBUG_ISR("Enabling interrupts\n");
3890 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 3891 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY		 3892}
3893
0359facc
MA		 3894/* call this function to flush any scheduled tasklet */
3895static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3896{
3897 /* wait to make sure we flush pedding tasklet*/
3898 synchronize_irq(priv->pci_dev->irq);
3899 tasklet_kill(&priv->irq_tasklet);
3900}
3901
c79dd5b5 3902static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 3903{
3904 clear_bit(STATUS_INT_ENABLED, &priv->status);
3905
3906 /* disable interrupts from uCode/NIC to host */
3395f6e9 3907 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 3908
3909 /* acknowledge/clear/reset any interrupts still pending
3910 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW		 3911 iwl_write32(priv, CSR_INT, 0xffffffff);
3912 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY		 3913 IWL_DEBUG_ISR("Disabled interrupts\n");
3914}
3915
3916static const char *desc_lookup(int i)
3917{
3918 switch (i) {
3919 case 1:
3920 return "FAIL";
3921 case 2:
3922 return "BAD_PARAM";
3923 case 3:
3924 return "BAD_CHECKSUM";
3925 case 4:
3926 return "NMI_INTERRUPT";
3927 case 5:
3928 return "SYSASSERT";
3929 case 6:
3930 return "FATAL_ERROR";
3931 }
3932
3933 return "UNKNOWN";
3934}
3935
3936#define ERROR_START_OFFSET (1 * sizeof(u32))
3937#define ERROR_ELEM_SIZE (7 * sizeof(u32))
3938
c79dd5b5 3939static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY		 3940{
3941 u32 data2, line;
3942 u32 desc, time, count, base, data1;
3943 u32 blink1, blink2, ilink1, ilink2;
3944 int rc;
3945
3946 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3947
57aab75a 3948 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY		 3949 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
3950 return;
3951 }
3952
3395f6e9 3953 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 3954 if (rc) {
3955 IWL_WARNING("Can not read from adapter at this time.\n");
3956 return;
3957 }
3958
3395f6e9 3959 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY		 3960
3961 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3962 IWL_ERROR("Start IWL Error Log Dump:\n");
2acae16e 3963 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
b481de9c
ZY		 3964 }
3965
3395f6e9
TW		 3966 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
3967 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
3968 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
3969 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
3970 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
3971 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
3972 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
3973 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
3974 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY		 3975
3976 IWL_ERROR("Desc Time "
3977 "data1 data2 line\n");
3978 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
3979 desc_lookup(desc), desc, time, data1, data2, line);
3980 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
3981 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
3982 ilink1, ilink2);
3983
3395f6e9 3984 iwl_release_nic_access(priv);
b481de9c
ZY		 3985}
3986
3987#define EVENT_START_OFFSET (4 * sizeof(u32))
3988
3989/**
bb8c093b 3990 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 3991 *
3395f6e9 3992 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 3993 */
c79dd5b5 3994static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY		 3995 u32 num_events, u32 mode)
3996{
3997 u32 i;
3998 u32 base; /* SRAM byte address of event log header */
3999 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4000 u32 ptr; /* SRAM byte address of log data */
4001 u32 ev, time, data; /* event log data */
4002
4003 if (num_events == 0)
4004 return;
4005
4006 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4007
4008 if (mode == 0)
4009 event_size = 2 * sizeof(u32);
4010 else
4011 event_size = 3 * sizeof(u32);
4012
4013 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4014
4015 /* "time" is actually "data" for mode 0 (no timestamp).
4016 * place event id # at far right for easier visual parsing. */
4017 for (i = 0; i < num_events; i++) {
3395f6e9 4018 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 4019 ptr += sizeof(u32);
3395f6e9 4020 time = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY		 4021 ptr += sizeof(u32);
4022 if (mode == 0)
4023 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4024 else {
3395f6e9 4025 data = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY		 4026 ptr += sizeof(u32);
4027 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4028 }
4029 }
4030}
4031
c79dd5b5 4032static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY		 4033{
4034 int rc;
4035 u32 base; /* SRAM byte address of event log header */
4036 u32 capacity; /* event log capacity in # entries */
4037 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4038 u32 num_wraps; /* # times uCode wrapped to top of log */
4039 u32 next_entry; /* index of next entry to be written by uCode */
4040 u32 size; /* # entries that we'll print */
4041
4042 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
57aab75a 4043 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4044 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4045 return;
4046 }
4047
3395f6e9 4048 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 4049 if (rc) {
4050 IWL_WARNING("Can not read from adapter at this time.\n");
4051 return;
4052 }
4053
4054 /* event log header */
3395f6e9
TW		 4055 capacity = iwl_read_targ_mem(priv, base);
4056 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4057 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4058 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY		 4059
4060 size = num_wraps ? capacity : next_entry;
4061
4062 /* bail out if nothing in log */
4063 if (size == 0) {
583fab37 4064 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
3395f6e9 4065 iwl_release_nic_access(priv);
b481de9c
ZY		 4066 return;
4067 }
4068
583fab37 4069 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY		 4070 size, num_wraps);
4071
4072 /* if uCode has wrapped back to top of log, start at the oldest entry,
4073 * i.e the next one that uCode would fill. */
4074 if (num_wraps)
bb8c093b 4075 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY		 4076 capacity - next_entry, mode);
4077
4078 /* (then/else) start at top of log */
bb8c093b 4079 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 4080
3395f6e9 4081 iwl_release_nic_access(priv);
b481de9c
ZY		 4082}
4083
4084/**
bb8c093b 4085 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 4086 */
c79dd5b5 4087static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 4088{
bb8c093b 4089 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY		 4090 set_bit(STATUS_FW_ERROR, &priv->status);
4091
4092 /* Cancel currently queued command. */
4093 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4094
0a6857e7
TW		 4095#ifdef CONFIG_IWLWIFI_DEBUG
4096 if (iwl_debug_level & IWL_DL_FW_ERRORS) {
bb8c093b
CH		 4097 iwl4965_dump_nic_error_log(priv);
4098 iwl4965_dump_nic_event_log(priv);
4099 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY		 4100 }
4101#endif
4102
4103 wake_up_interruptible(&priv->wait_command_queue);
4104
4105 /* Keep the restart process from trying to send host
4106 * commands by clearing the INIT status bit */
4107 clear_bit(STATUS_READY, &priv->status);
4108
4109 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4110 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4111 "Restarting adapter due to uCode error.\n");
4112
3109ece1 4113 if (iwl_is_associated(priv)) {
b481de9c
ZY		 4114 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4115 sizeof(priv->recovery_rxon));
4116 priv->error_recovering = 1;
4117 }
4118 queue_work(priv->workqueue, &priv->restart);
4119 }
4120}
4121
c79dd5b5 4122static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 4123{
4124 unsigned long flags;
4125
4126 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4127 sizeof(priv->staging_rxon));
4128 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4129 iwl4965_commit_rxon(priv);
b481de9c 4130
bb8c093b 4131 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 4132
4133 spin_lock_irqsave(&priv->lock, flags);
4134 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4135 priv->error_recovering = 0;
4136 spin_unlock_irqrestore(&priv->lock, flags);
4137}
4138
c79dd5b5 4139static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 4140{
4141 u32 inta, handled = 0;
4142 u32 inta_fh;
4143 unsigned long flags;
0a6857e7 4144#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 4145 u32 inta_mask;
4146#endif
4147
4148 spin_lock_irqsave(&priv->lock, flags);
4149
4150 /* Ack/clear/reset pending uCode interrupts.
4151 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4152 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW		 4153 inta = iwl_read32(priv, CSR_INT);
4154 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY		 4155
4156 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4157 * Any new interrupts that happen after this, either while we're
4158 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW		 4159 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4160 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 4161
0a6857e7
TW		 4162#ifdef CONFIG_IWLWIFI_DEBUG
4163 if (iwl_debug_level & IWL_DL_ISR) {
9fbab516 4164 /* just for debug */
3395f6e9 4165 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 4166 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4167 inta, inta_mask, inta_fh);
4168 }
4169#endif
4170
4171 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4172 * atomic, make sure that inta covers all the interrupts that
4173 * we've discovered, even if FH interrupt came in just after
4174 * reading CSR_INT. */
6f83eaa1 4175 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 4176 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 4177 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 4178 inta |= CSR_INT_BIT_FH_TX;
4179
4180 /* Now service all interrupt bits discovered above. */
4181 if (inta & CSR_INT_BIT_HW_ERR) {
4182 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4183
4184 /* Tell the device to stop sending interrupts */
bb8c093b 4185 iwl4965_disable_interrupts(priv);
b481de9c 4186
bb8c093b 4187 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4188
4189 handled |= CSR_INT_BIT_HW_ERR;
4190
4191 spin_unlock_irqrestore(&priv->lock, flags);
4192
4193 return;
4194 }
4195
0a6857e7
TW		 4196#ifdef CONFIG_IWLWIFI_DEBUG
4197 if (iwl_debug_level & (IWL_DL_ISR)) {
b481de9c 4198 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP		 4199 if (inta & CSR_INT_BIT_SCD)
4200 IWL_DEBUG_ISR("Scheduler finished to transmit "
4201 "the frame/frames.\n");
b481de9c
ZY		 4202
4203 /* Alive notification via Rx interrupt will do the real work */
4204 if (inta & CSR_INT_BIT_ALIVE)
4205 IWL_DEBUG_ISR("Alive interrupt\n");
4206 }
4207#endif
4208 /* Safely ignore these bits for debug checks below */
25c03d8e 4209 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 4210
9fbab516 4211 /* HW RF KILL switch toggled */
b481de9c
ZY		 4212 if (inta & CSR_INT_BIT_RF_KILL) {
4213 int hw_rf_kill = 0;
3395f6e9 4214 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 4215 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4216 hw_rf_kill = 1;
4217
4218 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4219 "RF_KILL bit toggled to %s.\n",
4220 hw_rf_kill ? "disable radio":"enable radio");
4221
4222 /* Queue restart only if RF_KILL switch was set to "kill"
4223 * when we loaded driver, and is now set to "enable".
4224 * After we're Alive, RF_KILL gets handled by
3230455d 4225 * iwl4965_rx_card_state_notif() */
53e49093
ZY		 4226 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4227 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 4228 queue_work(priv->workqueue, &priv->restart);
53e49093 4229 }
b481de9c
ZY		 4230
4231 handled |= CSR_INT_BIT_RF_KILL;
4232 }
4233
9fbab516 4234 /* Chip got too hot and stopped itself */
b481de9c
ZY		 4235 if (inta & CSR_INT_BIT_CT_KILL) {
4236 IWL_ERROR("Microcode CT kill error detected.\n");
4237 handled |= CSR_INT_BIT_CT_KILL;
4238 }
4239
4240 /* Error detected by uCode */
4241 if (inta & CSR_INT_BIT_SW_ERR) {
4242 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4243 inta);
bb8c093b 4244 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4245 handled |= CSR_INT_BIT_SW_ERR;
4246 }
4247
4248 /* uCode wakes up after power-down sleep */
4249 if (inta & CSR_INT_BIT_WAKEUP) {
4250 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH		 4251 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
4252 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4253 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4254 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4255 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4256 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4257 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 4258
4259 handled |= CSR_INT_BIT_WAKEUP;
4260 }
4261
4262 /* All uCode command responses, including Tx command responses,
4263 * Rx "responses" (frame-received notification), and other
4264 * notifications from uCode come through here*/
4265 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 4266 iwl4965_rx_handle(priv);
b481de9c
ZY		 4267 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4268 }
4269
4270 if (inta & CSR_INT_BIT_FH_TX) {
4271 IWL_DEBUG_ISR("Tx interrupt\n");
4272 handled |= CSR_INT_BIT_FH_TX;
4273 }
4274
4275 if (inta & ~handled)
4276 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4277
4278 if (inta & ~CSR_INI_SET_MASK) {
4279 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4280 inta & ~CSR_INI_SET_MASK);
4281 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4282 }
4283
4284 /* Re-enable all interrupts */
0359facc
MA		 4285 /* only Re-enable if diabled by irq */
4286 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4287 iwl4965_enable_interrupts(priv);
b481de9c 4288
0a6857e7
TW		 4289#ifdef CONFIG_IWLWIFI_DEBUG
4290 if (iwl_debug_level & (IWL_DL_ISR)) {
3395f6e9
TW		 4291 inta = iwl_read32(priv, CSR_INT);
4292 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4293 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4294 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4295 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4296 }
4297#endif
4298 spin_unlock_irqrestore(&priv->lock, flags);
4299}
4300
bb8c093b 4301static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 4302{
c79dd5b5 4303 struct iwl_priv *priv = data;
b481de9c
ZY		 4304 u32 inta, inta_mask;
4305 u32 inta_fh;
4306 if (!priv)
4307 return IRQ_NONE;
4308
4309 spin_lock(&priv->lock);
4310
4311 /* Disable (but don't clear!) interrupts here to avoid
4312 * back-to-back ISRs and sporadic interrupts from our NIC.
4313 * If we have something to service, the tasklet will re-enable ints.
4314 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW		 4315 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4316 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4317
4318 /* Discover which interrupts are active/pending */
3395f6e9
TW		 4319 inta = iwl_read32(priv, CSR_INT);
4320 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4321
4322 /* Ignore interrupt if there's nothing in NIC to service.
4323 * This may be due to IRQ shared with another device,
4324 * or due to sporadic interrupts thrown from our NIC. */
4325 if (!inta && !inta_fh) {
4326 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4327 goto none;
4328 }
4329
4330 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 4331 /* Hardware disappeared. It might have already raised
4332 * an interrupt */
b481de9c 4333 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 4334 goto unplugged;
b481de9c
ZY		 4335 }
4336
4337 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4338 inta, inta_mask, inta_fh);
4339
25c03d8e
JP		 4340 inta &= ~CSR_INT_BIT_SCD;
4341
bb8c093b 4342 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 4343 if (likely(inta || inta_fh))
4344 tasklet_schedule(&priv->irq_tasklet);
b481de9c 4345
66fbb541
ON		 4346 unplugged:
4347 spin_unlock(&priv->lock);
b481de9c
ZY		 4348 return IRQ_HANDLED;
4349
4350 none:
4351 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA		 4352 /* only Re-enable if diabled by irq */
4353 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4354 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 4355 spin_unlock(&priv->lock);
4356 return IRQ_NONE;
4357}
4358
b481de9c
ZY		 4359/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4360 * sending probe req. This should be set long enough to hear probe responses
4361 * from more than one AP. */
4362#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4363#define IWL_ACTIVE_DWELL_TIME_52 (10)
4364
4365/* For faster active scanning, scan will move to the next channel if fewer than
4366 * PLCP_QUIET_THRESH packets are heard on this channel within
4367 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4368 * time if it's a quiet channel (nothing responded to our probe, and there's
4369 * no other traffic).
4370 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4371#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4372#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4373
4374/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4375 * Must be set longer than active dwell time.
4376 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4377#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4378#define IWL_PASSIVE_DWELL_TIME_52 (10)
4379#define IWL_PASSIVE_DWELL_BASE (100)
4380#define IWL_CHANNEL_TUNE_TIME 5
4381
c79dd5b5 4382static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
8318d78a 4383 enum ieee80211_band band)
b481de9c 4384{
8318d78a 4385 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 4386 return IWL_ACTIVE_DWELL_TIME_52;
4387 else
4388 return IWL_ACTIVE_DWELL_TIME_24;
4389}
4390
c79dd5b5 4391static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
8318d78a 4392 enum ieee80211_band band)
b481de9c 4393{
8318d78a
JB		 4394 u16 active = iwl4965_get_active_dwell_time(priv, band);
4395 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
b481de9c
ZY		 4396 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4397 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4398
3109ece1 4399 if (iwl_is_associated(priv)) {
b481de9c
ZY		 4400 /* If we're associated, we clamp the maximum passive
4401 * dwell time to be 98% of the beacon interval (minus
4402 * 2 * channel tune time) */
4403 passive = priv->beacon_int;
4404 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4405 passive = IWL_PASSIVE_DWELL_BASE;
4406 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4407 }
4408
4409 if (passive <= active)
4410 passive = active + 1;
4411
4412 return passive;
4413}
4414
c79dd5b5 4415static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 4416 enum ieee80211_band band,
b481de9c 4417 u8 is_active, u8 direct_mask,
bb8c093b 4418 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY		 4419{
4420 const struct ieee80211_channel *channels = NULL;
8318d78a 4421 const struct ieee80211_supported_band *sband;
bf85ea4f 4422 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 4423 u16 passive_dwell = 0;
4424 u16 active_dwell = 0;
4425 int added, i;
4426
d1141dfb 4427 sband = iwl_get_hw_mode(priv, band);
8318d78a 4428 if (!sband)
b481de9c
ZY		 4429 return 0;
4430
8318d78a 4431 channels = sband->channels;
b481de9c 4432
8318d78a
JB		 4433 active_dwell = iwl4965_get_active_dwell_time(priv, band);
4434 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
b481de9c 4435
8318d78a 4436 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB		 4437 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4438 continue;
4439
8318d78a 4440 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
b481de9c 4441
8622e705 4442 ch_info = iwl_get_channel_info(priv, band,
9fbab516 4443 scan_ch->channel);
b481de9c
ZY		 4444 if (!is_channel_valid(ch_info)) {
4445 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4446 scan_ch->channel);
4447 continue;
4448 }
4449
4450 if (!is_active || is_channel_passive(ch_info) ||
8318d78a 4451 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
b481de9c
ZY		 4452 scan_ch->type = 0; /* passive */
4453 else
4454 scan_ch->type = 1; /* active */
4455
4456 if (scan_ch->type & 1)
4457 scan_ch->type |= (direct_mask << 1);
4458
b481de9c
ZY		 4459 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4460 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4461
9fbab516 4462 /* Set txpower levels to defaults */
b481de9c
ZY		 4463 scan_ch->tpc.dsp_atten = 110;
4464 /* scan_pwr_info->tpc.dsp_atten; */
4465
4466 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 4467 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 4468 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4469 else {
4470 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4471 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 4472 * power level:
8a1b0245 4473 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY		 4474 */
4475 }
4476
4477 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4478 scan_ch->channel,
4479 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4480 (scan_ch->type & 1) ?
4481 active_dwell : passive_dwell);
4482
4483 scan_ch++;
4484 added++;
4485 }
4486
4487 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4488 return added;
4489}
4490
b481de9c
ZY		 4491/******************************************************************************
4492 *
4493 * uCode download functions
4494 *
4495 ******************************************************************************/
4496
c79dd5b5 4497static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 4498{
98c92211
TW		 4499 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4500 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4501 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4502 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4503 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4504 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 4505}
4506
c79dd5b5 4507static void iwl4965_nic_start(struct iwl_priv *priv)
b481de9c
ZY		 4508{
4509 /* Remove all resets to allow NIC to operate */
3395f6e9 4510 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY		 4511}
4512
90e759d1 4513
b481de9c 4514/**
bb8c093b 4515 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 4516 *
4517 * Copy into buffers for card to fetch via bus-mastering
4518 */
c79dd5b5 4519static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 4520{
bb8c093b 4521 struct iwl4965_ucode *ucode;
90e759d1 4522 int ret;
b481de9c 4523 const struct firmware *ucode_raw;
4bf775cd 4524 const char *name = priv->cfg->fw_name;
b481de9c
ZY		 4525 u8 *src;
4526 size_t len;
4527 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
4528
4529 /* Ask kernel firmware_class module to get the boot firmware off disk.
4530 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW		 4531 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
4532 if (ret < 0) {
4533 IWL_ERROR("%s firmware file req failed: Reason %d\n",
4534 name, ret);
b481de9c
ZY		 4535 goto error;
4536 }
4537
4538 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
4539 name, ucode_raw->size);
4540
4541 /* Make sure that we got at least our header! */
4542 if (ucode_raw->size < sizeof(*ucode)) {
4543 IWL_ERROR("File size way too small!\n");
90e759d1 4544 ret = -EINVAL;
b481de9c
ZY		 4545 goto err_release;
4546 }
4547
4548 /* Data from ucode file: header followed by uCode images */
4549 ucode = (void *)ucode_raw->data;
4550
4551 ver = le32_to_cpu(ucode->ver);
4552 inst_size = le32_to_cpu(ucode->inst_size);
4553 data_size = le32_to_cpu(ucode->data_size);
4554 init_size = le32_to_cpu(ucode->init_size);
4555 init_data_size = le32_to_cpu(ucode->init_data_size);
4556 boot_size = le32_to_cpu(ucode->boot_size);
4557
4558 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
4559 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
4560 inst_size);
4561 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
4562 data_size);
4563 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
4564 init_size);
4565 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
4566 init_data_size);
4567 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
4568 boot_size);
4569
4570 /* Verify size of file vs. image size info in file's header */
4571 if (ucode_raw->size < sizeof(*ucode) +
4572 inst_size + data_size + init_size +
4573 init_data_size + boot_size) {
4574
4575 IWL_DEBUG_INFO("uCode file size %d too small\n",
4576 (int)ucode_raw->size);
90e759d1 4577 ret = -EINVAL;
b481de9c
ZY		 4578 goto err_release;
4579 }
4580
4581 /* Verify that uCode images will fit in card's SRAM */
099b40b7 4582 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW		 4583 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
4584 inst_size);
4585 ret = -EINVAL;
b481de9c
ZY		 4586 goto err_release;
4587 }
4588
099b40b7 4589 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW		 4590 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
4591 data_size);
4592 ret = -EINVAL;
b481de9c
ZY		 4593 goto err_release;
4594 }
099b40b7 4595 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 4596 IWL_DEBUG_INFO
90e759d1
TW		 4597 ("uCode init instr len %d too large to fit in\n",
4598 init_size);
4599 ret = -EINVAL;
b481de9c
ZY		 4600 goto err_release;
4601 }
099b40b7 4602 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 4603 IWL_DEBUG_INFO
90e759d1
TW		 4604 ("uCode init data len %d too large to fit in\n",
4605 init_data_size);
4606 ret = -EINVAL;
b481de9c
ZY		 4607 goto err_release;
4608 }
099b40b7 4609 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 4610 IWL_DEBUG_INFO
90e759d1
TW		 4611 ("uCode boot instr len %d too large to fit in\n",
4612 boot_size);
4613 ret = -EINVAL;
b481de9c
ZY		 4614 goto err_release;
4615 }
4616
4617 /* Allocate ucode buffers for card's bus-master loading ... */
4618
4619 /* Runtime instructions and 2 copies of data:
4620 * 1) unmodified from disk
4621 * 2) backup cache for save/restore during power-downs */
4622 priv->ucode_code.len = inst_size;
98c92211 4623 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 4624
4625 priv->ucode_data.len = data_size;
98c92211 4626 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 4627
4628 priv->ucode_data_backup.len = data_size;
98c92211 4629 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY		 4630
4631 /* Initialization instructions and data */
90e759d1
TW		 4632 if (init_size && init_data_size) {
4633 priv->ucode_init.len = init_size;
98c92211 4634 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 4635
4636 priv->ucode_init_data.len = init_data_size;
98c92211 4637 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 4638
4639 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
4640 goto err_pci_alloc;
4641 }
b481de9c
ZY		 4642
4643 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 4644 if (boot_size) {
4645 priv->ucode_boot.len = boot_size;
98c92211 4646 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 4647
90e759d1
TW		 4648 if (!priv->ucode_boot.v_addr)
4649 goto err_pci_alloc;
4650 }
b481de9c
ZY		 4651
4652 /* Copy images into buffers for card's bus-master reads ... */
4653
4654 /* Runtime instructions (first block of data in file) */
4655 src = &ucode->data[0];
4656 len = priv->ucode_code.len;
90e759d1 4657 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 4658 memcpy(priv->ucode_code.v_addr, src, len);
4659 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4660 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
4661
4662 /* Runtime data (2nd block)
bb8c093b 4663 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY		 4664 src = &ucode->data[inst_size];
4665 len = priv->ucode_data.len;
90e759d1 4666 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 4667 memcpy(priv->ucode_data.v_addr, src, len);
4668 memcpy(priv->ucode_data_backup.v_addr, src, len);
4669
4670 /* Initialization instructions (3rd block) */
4671 if (init_size) {
4672 src = &ucode->data[inst_size + data_size];
4673 len = priv->ucode_init.len;
90e759d1
TW		 4674 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
4675 len);
b481de9c
ZY		 4676 memcpy(priv->ucode_init.v_addr, src, len);
4677 }
4678
4679 /* Initialization data (4th block) */
4680 if (init_data_size) {
4681 src = &ucode->data[inst_size + data_size + init_size];
4682 len = priv->ucode_init_data.len;
90e759d1
TW		 4683 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
4684 len);
b481de9c
ZY		 4685 memcpy(priv->ucode_init_data.v_addr, src, len);
4686 }
4687
4688 /* Bootstrap instructions (5th block) */
4689 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
4690 len = priv->ucode_boot.len;
90e759d1 4691 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 4692 memcpy(priv->ucode_boot.v_addr, src, len);
4693
4694 /* We have our copies now, allow OS release its copies */
4695 release_firmware(ucode_raw);
4696 return 0;
4697
4698 err_pci_alloc:
4699 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 4700 ret = -ENOMEM;
bb8c093b 4701 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 4702
4703 err_release:
4704 release_firmware(ucode_raw);
4705
4706 error:
90e759d1 4707 return ret;
b481de9c
ZY		 4708}
4709
4710
4711/**
bb8c093b 4712 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY		 4713 *
4714 * Tell initialization uCode where to find runtime uCode.
4715 *
4716 * BSM registers initially contain pointers to initialization uCode.
4717 * We need to replace them to load runtime uCode inst and data,
4718 * and to save runtime data when powering down.
4719 */
c79dd5b5 4720static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY		 4721{
4722 dma_addr_t pinst;
4723 dma_addr_t pdata;
4724 int rc = 0;
4725 unsigned long flags;
4726
4727 /* bits 35:4 for 4965 */
4728 pinst = priv->ucode_code.p_addr >> 4;
4729 pdata = priv->ucode_data_backup.p_addr >> 4;
4730
4731 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 4732 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 4733 if (rc) {
4734 spin_unlock_irqrestore(&priv->lock, flags);
4735 return rc;
4736 }
4737
4738 /* Tell bootstrap uCode where to find image to load */
3395f6e9
TW		 4739 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
4740 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
4741 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY		 4742 priv->ucode_data.len);
4743
4744 /* Inst bytecount must be last to set up, bit 31 signals uCode
4745 * that all new ptr/size info is in place */
3395f6e9 4746 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY		 4747 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
4748
3395f6e9 4749 iwl_release_nic_access(priv);
b481de9c
ZY		 4750
4751 spin_unlock_irqrestore(&priv->lock, flags);
4752
4753 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
4754
4755 return rc;
4756}
4757
4758/**
bb8c093b 4759 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY		 4760 *
4761 * Called after REPLY_ALIVE notification received from "initialize" uCode.
4762 *
4763 * The 4965 "initialize" ALIVE reply contains calibration data for:
4764 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
4765 * (3945 does not contain this data).
4766 *
4767 * Tell "initialize" uCode to go ahead and load the runtime uCode.
4768*/
c79dd5b5 4769static void iwl4965_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY		 4770{
4771 /* Check alive response for "valid" sign from uCode */
4772 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
4773 /* We had an error bringing up the hardware, so take it
4774 * all the way back down so we can try again */
4775 IWL_DEBUG_INFO("Initialize Alive failed.\n");
4776 goto restart;
4777 }
4778
4779 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
4780 * This is a paranoid check, because we would not have gotten the
4781 * "initialize" alive if code weren't properly loaded. */
b0692f2f 4782 if (iwl_verify_ucode(priv)) {
b481de9c
ZY		 4783 /* Runtime instruction load was bad;
4784 * take it all the way back down so we can try again */
4785 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
4786 goto restart;
4787 }
4788
4789 /* Calculate temperature */
4790 priv->temperature = iwl4965_get_temperature(priv);
4791
4792 /* Send pointers to protocol/runtime uCode image ... init code will
4793 * load and launch runtime uCode, which will send us another "Alive"
4794 * notification. */
4795 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 4796 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY		 4797 /* Runtime instruction load won't happen;
4798 * take it all the way back down so we can try again */
4799 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
4800 goto restart;
4801 }
4802 return;
4803
4804 restart:
4805 queue_work(priv->workqueue, &priv->restart);
4806}
4807
4808
4809/**
bb8c093b 4810 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 4811 * from protocol/runtime uCode (initialization uCode's
bb8c093b 4812 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 4813 */
c79dd5b5 4814static void iwl4965_alive_start(struct iwl_priv *priv)
b481de9c 4815{
57aab75a 4816 int ret = 0;
b481de9c
ZY		 4817
4818 IWL_DEBUG_INFO("Runtime Alive received.\n");
4819
4820 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
4821 /* We had an error bringing up the hardware, so take it
4822 * all the way back down so we can try again */
4823 IWL_DEBUG_INFO("Alive failed.\n");
4824 goto restart;
4825 }
4826
4827 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
4828 * This is a paranoid check, because we would not have gotten the
4829 * "runtime" alive if code weren't properly loaded. */
b0692f2f 4830 if (iwl_verify_ucode(priv)) {
b481de9c
ZY		 4831 /* Runtime instruction load was bad;
4832 * take it all the way back down so we can try again */
4833 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
4834 goto restart;
4835 }
4836
bf85ea4f 4837 iwlcore_clear_stations_table(priv);
b481de9c 4838
57aab75a
TW		 4839 ret = priv->cfg->ops->lib->alive_notify(priv);
4840 if (ret) {
b481de9c 4841 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 4842 ret);
b481de9c
ZY		 4843 goto restart;
4844 }
4845
9fbab516 4846 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY		 4847 set_bit(STATUS_ALIVE, &priv->status);
4848
4849 /* Clear out the uCode error bit if it is set */
4850 clear_bit(STATUS_FW_ERROR, &priv->status);
4851
fee1247a 4852 if (iwl_is_rfkill(priv))
b481de9c
ZY		 4853 return;
4854
5a66926a 4855 ieee80211_start_queues(priv->hw);
b481de9c
ZY		 4856
4857 priv->active_rate = priv->rates_mask;
4858 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
4859
3109ece1 4860 if (iwl_is_associated(priv)) {
bb8c093b
CH		 4861 struct iwl4965_rxon_cmd *active_rxon =
4862 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY		 4863
4864 memcpy(&priv->staging_rxon, &priv->active_rxon,
4865 sizeof(priv->staging_rxon));
4866 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4867 } else {
4868 /* Initialize our rx_config data */
bb8c093b 4869 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 4870 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
4871 }
4872
9fbab516 4873 /* Configure Bluetooth device coexistence support */
bb8c093b 4874 iwl4965_send_bt_config(priv);
b481de9c
ZY		 4875
4876 /* Configure the adapter for unassociated operation */
bb8c093b 4877 iwl4965_commit_rxon(priv);
b481de9c
ZY		 4878
4879 /* At this point, the NIC is initialized and operational */
4880 priv->notif_missed_beacons = 0;
b481de9c
ZY		 4881
4882 iwl4965_rf_kill_ct_config(priv);
5a66926a 4883
fe00b5a5
RC		 4884 iwl_leds_register(priv);
4885
b481de9c 4886 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 4887 set_bit(STATUS_READY, &priv->status);
5a66926a 4888 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 4889
4890 if (priv->error_recovering)
bb8c093b 4891 iwl4965_error_recovery(priv);
b481de9c 4892
c8381fdc 4893 iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
84363e6e 4894 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
b481de9c
ZY		 4895 return;
4896
4897 restart:
4898 queue_work(priv->workqueue, &priv->restart);
4899}
4900
c79dd5b5 4901static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 4902
c79dd5b5 4903static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 4904{
4905 unsigned long flags;
4906 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
4907 struct ieee80211_conf *conf = NULL;
4908
4909 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
4910
4911 conf = ieee80211_get_hw_conf(priv->hw);
4912
4913 if (!exit_pending)
4914 set_bit(STATUS_EXIT_PENDING, &priv->status);
4915
ab53d8af
MA		 4916 iwl_leds_unregister(priv);
4917
c8381fdc
MA		 4918 iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
4919
bf85ea4f 4920 iwlcore_clear_stations_table(priv);
b481de9c
ZY		 4921
4922 /* Unblock any waiting calls */
4923 wake_up_interruptible_all(&priv->wait_command_queue);
4924
b481de9c
ZY		 4925 /* Wipe out the EXIT_PENDING status bit if we are not actually
4926 * exiting the module */
4927 if (!exit_pending)
4928 clear_bit(STATUS_EXIT_PENDING, &priv->status);
4929
4930 /* stop and reset the on-board processor */
3395f6e9 4931 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 4932
4933 /* tell the device to stop sending interrupts */
0359facc 4934 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 4935 iwl4965_disable_interrupts(priv);
0359facc
MA		 4936 spin_unlock_irqrestore(&priv->lock, flags);
4937 iwl_synchronize_irq(priv);
b481de9c
ZY		 4938
4939 if (priv->mac80211_registered)
4940 ieee80211_stop_queues(priv->hw);
4941
bb8c093b 4942 /* If we have not previously called iwl4965_init() then
b481de9c 4943 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 4944 if (!iwl_is_init(priv)) {
b481de9c
ZY		 4945 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
4946 STATUS_RF_KILL_HW |
4947 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
4948 STATUS_RF_KILL_SW |
9788864e
RC		 4949 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
4950 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 4951 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
4952 STATUS_IN_SUSPEND;
4953 goto exit;
4954 }
4955
4956 /* ...otherwise clear out all the status bits but the RF Kill and
4957 * SUSPEND bits and continue taking the NIC down. */
4958 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
4959 STATUS_RF_KILL_HW |
4960 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
4961 STATUS_RF_KILL_SW |
9788864e
RC		 4962 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
4963 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 4964 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
4965 STATUS_IN_SUSPEND |
4966 test_bit(STATUS_FW_ERROR, &priv->status) <<
4967 STATUS_FW_ERROR;
4968
4969 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 4970 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 4971 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 4972 spin_unlock_irqrestore(&priv->lock, flags);
4973
bb8c093b
CH		 4974 iwl4965_hw_txq_ctx_stop(priv);
4975 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY		 4976
4977 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 4978 if (!iwl_grab_nic_access(priv)) {
4979 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 4980 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 4981 iwl_release_nic_access(priv);
b481de9c
ZY		 4982 }
4983 spin_unlock_irqrestore(&priv->lock, flags);
4984
4985 udelay(5);
4986
bb8c093b 4987 iwl4965_hw_nic_stop_master(priv);
3395f6e9 4988 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
bb8c093b 4989 iwl4965_hw_nic_reset(priv);
399f4900 4990 priv->cfg->ops->lib->free_shared_mem(priv);
b481de9c
ZY		 4991
4992 exit:
bb8c093b 4993 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 4994
4995 if (priv->ibss_beacon)
4996 dev_kfree_skb(priv->ibss_beacon);
4997 priv->ibss_beacon = NULL;
4998
4999 /* clear out any free frames */
bb8c093b 5000 iwl4965_clear_free_frames(priv);
b481de9c
ZY		 5001}
5002
c79dd5b5 5003static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 5004{
5005 mutex_lock(&priv->mutex);
bb8c093b 5006 __iwl4965_down(priv);
b481de9c 5007 mutex_unlock(&priv->mutex);
b24d22b1 5008
bb8c093b 5009 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY		 5010}
5011
5012#define MAX_HW_RESTARTS 5
5013
c79dd5b5 5014static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 5015{
57aab75a
TW		 5016 int i;
5017 int ret;
b481de9c
ZY		 5018
5019 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5020 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5021 return -EIO;
5022 }
5023
5024 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5025 IWL_WARNING("Radio disabled by SW RF kill (module "
5026 "parameter)\n");
ad97edd2 5027 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY		 5028 return -ENODEV;
5029 }
5030
e903fbd4
RC		 5031 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5032 IWL_ERROR("ucode not available for device bringup\n");
5033 return -EIO;
5034 }
5035
e655b9f0 5036 /* If platform's RF_KILL switch is NOT set to KILL */
3395f6e9 5037 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY		 5038 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5039 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5040 else {
5041 set_bit(STATUS_RF_KILL_HW, &priv->status);
5042 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
ad97edd2 5043 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY		 5044 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5045 return -ENODEV;
5046 }
b481de9c
ZY		 5047 }
5048
ad97edd2 5049 iwl_rfkill_set_hw_state(priv);
3395f6e9 5050 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 5051
399f4900
RR		 5052 ret = priv->cfg->ops->lib->alloc_shared_mem(priv);
5053 if (ret) {
5054 IWL_ERROR("Unable to allocate shared memory\n");
5055 return ret;
5056 }
5057
57aab75a
TW		 5058 ret = priv->cfg->ops->lib->hw_nic_init(priv);
5059 if (ret) {
5060 IWL_ERROR("Unable to init nic\n");
5061 return ret;
b481de9c
ZY		 5062 }
5063
5064 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW		 5065 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5066 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 5067 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5068
5069 /* clear (again), then enable host interrupts */
3395f6e9 5070 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 5071 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 5072
5073 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW		 5074 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5075 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 5076
5077 /* Copy original ucode data image from disk into backup cache.
5078 * This will be used to initialize the on-board processor's
5079 * data SRAM for a clean start when the runtime program first loads. */
5080 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 5081 priv->ucode_data.len);
b481de9c 5082
e655b9f0
ZY		 5083 /* We return success when we resume from suspend and rf_kill is on. */
5084 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
b481de9c 5085 return 0;
b481de9c
ZY		 5086
5087 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5088
bf85ea4f 5089 iwlcore_clear_stations_table(priv);
b481de9c
ZY		 5090
5091 /* load bootstrap state machine,
5092 * load bootstrap program into processor's memory,
5093 * prepare to load the "initialize" uCode */
57aab75a 5094 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 5095
57aab75a
TW		 5096 if (ret) {
5097 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY		 5098 continue;
5099 }
5100
5101 /* start card; "initialize" will load runtime ucode */
bb8c093b 5102 iwl4965_nic_start(priv);
b481de9c 5103
b481de9c
ZY		 5104 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5105
5106 return 0;
5107 }
5108
5109 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 5110 __iwl4965_down(priv);
b481de9c
ZY		 5111
5112 /* tried to restart and config the device for as long as our
5113 * patience could withstand */
5114 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5115 return -EIO;
5116}
5117
5118
5119/*****************************************************************************
5120 *
5121 * Workqueue callbacks
5122 *
5123 *****************************************************************************/
5124
bb8c093b 5125static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 5126{
c79dd5b5
TW		 5127 struct iwl_priv *priv =
5128 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 5129
5130 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5131 return;
5132
5133 mutex_lock(&priv->mutex);
bb8c093b 5134 iwl4965_init_alive_start(priv);
b481de9c
ZY		 5135 mutex_unlock(&priv->mutex);
5136}
5137
bb8c093b 5138static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 5139{
c79dd5b5
TW		 5140 struct iwl_priv *priv =
5141 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 5142
5143 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5144 return;
5145
5146 mutex_lock(&priv->mutex);
bb8c093b 5147 iwl4965_alive_start(priv);
b481de9c
ZY		 5148 mutex_unlock(&priv->mutex);
5149}
5150
bb8c093b 5151static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 5152{
c79dd5b5 5153 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY		 5154
5155 wake_up_interruptible(&priv->wait_command_queue);
5156
5157 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5158 return;
5159
5160 mutex_lock(&priv->mutex);
5161
fee1247a 5162 if (!iwl_is_rfkill(priv)) {
b481de9c
ZY		 5163 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5164 "HW and/or SW RF Kill no longer active, restarting "
5165 "device\n");
5166 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5167 queue_work(priv->workqueue, &priv->restart);
5168 } else {
ad97edd2
MA		 5169 /* make sure mac80211 stop sending Tx frame */
5170 if (priv->mac80211_registered)
5171 ieee80211_stop_queues(priv->hw);
b481de9c
ZY		 5172
5173 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5174 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5175 "disabled by SW switch\n");
5176 else
5177 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
5178 "Kill switch must be turned off for "
5179 "wireless networking to work.\n");
5180 }
ad97edd2
MA		 5181 iwl_rfkill_set_hw_state(priv);
5182
b481de9c
ZY		 5183 mutex_unlock(&priv->mutex);
5184}
5185
5186#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5187
bb8c093b 5188static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 5189{
c79dd5b5
TW		 5190 struct iwl_priv *priv =
5191 container_of(data, struct iwl_priv, scan_check.work);
b481de9c
ZY		 5192
5193 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5194 return;
5195
5196 mutex_lock(&priv->mutex);
5197 if (test_bit(STATUS_SCANNING, &priv->status) ||
5198 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5199 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5200 "Scan completion watchdog resetting adapter (%dms)\n",
5201 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 5202
b481de9c 5203 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 5204 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 5205 }
5206 mutex_unlock(&priv->mutex);
5207}
5208
bb8c093b 5209static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 5210{
c79dd5b5
TW		 5211 struct iwl_priv *priv =
5212 container_of(data, struct iwl_priv, request_scan);
857485c0 5213 struct iwl_host_cmd cmd = {
b481de9c 5214 .id = REPLY_SCAN_CMD,
bb8c093b 5215 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY		 5216 .meta.flags = CMD_SIZE_HUGE,
5217 };
bb8c093b 5218 struct iwl4965_scan_cmd *scan;
b481de9c 5219 struct ieee80211_conf *conf = NULL;
78330fdd 5220 u16 cmd_len;
8318d78a 5221 enum ieee80211_band band;
78330fdd 5222 u8 direct_mask;
857485c0 5223 int ret = 0;
b481de9c
ZY		 5224
5225 conf = ieee80211_get_hw_conf(priv->hw);
5226
5227 mutex_lock(&priv->mutex);
5228
fee1247a 5229 if (!iwl_is_ready(priv)) {
b481de9c
ZY		 5230 IWL_WARNING("request scan called when driver not ready.\n");
5231 goto done;
5232 }
5233
5234 /* Make sure the scan wasn't cancelled before this queued work
5235 * was given the chance to run... */
5236 if (!test_bit(STATUS_SCANNING, &priv->status))
5237 goto done;
5238
5239 /* This should never be called or scheduled if there is currently
5240 * a scan active in the hardware. */
5241 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5242 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5243 "Ignoring second request.\n");
857485c0 5244 ret = -EIO;
b481de9c
ZY		 5245 goto done;
5246 }
5247
5248 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5249 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5250 goto done;
5251 }
5252
5253 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5254 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5255 goto done;
5256 }
5257
fee1247a 5258 if (iwl_is_rfkill(priv)) {
b481de9c
ZY		 5259 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5260 goto done;
5261 }
5262
5263 if (!test_bit(STATUS_READY, &priv->status)) {
5264 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
5265 goto done;
5266 }
5267
5268 if (!priv->scan_bands) {
5269 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5270 goto done;
5271 }
5272
5273 if (!priv->scan) {
bb8c093b 5274 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY		 5275 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5276 if (!priv->scan) {
857485c0 5277 ret = -ENOMEM;
b481de9c
ZY		 5278 goto done;
5279 }
5280 }
5281 scan = priv->scan;
bb8c093b 5282 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY		 5283
5284 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5285 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5286
3109ece1 5287 if (iwl_is_associated(priv)) {
b481de9c
ZY		 5288 u16 interval = 0;
5289 u32 extra;
5290 u32 suspend_time = 100;
5291 u32 scan_suspend_time = 100;
5292 unsigned long flags;
5293
5294 IWL_DEBUG_INFO("Scanning while associated...\n");
5295
5296 spin_lock_irqsave(&priv->lock, flags);
5297 interval = priv->beacon_int;
5298 spin_unlock_irqrestore(&priv->lock, flags);
5299
5300 scan->suspend_time = 0;
052c4b9f 5301 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY		 5302 if (!interval)
5303 interval = suspend_time;
5304
5305 extra = (suspend_time / interval) << 22;
5306 scan_suspend_time = (extra |
5307 ((suspend_time % interval) * 1024));
5308 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5309 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5310 scan_suspend_time, interval);
5311 }
5312
5313 /* We should add the ability for user to lock to PASSIVE ONLY */
5314 if (priv->one_direct_scan) {
5315 IWL_DEBUG_SCAN
5316 ("Kicking off one direct scan for '%s'\n",
bb8c093b 5317 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY		 5318 priv->direct_ssid_len));
5319 scan->direct_scan[0].id = WLAN_EID_SSID;
5320 scan->direct_scan[0].len = priv->direct_ssid_len;
5321 memcpy(scan->direct_scan[0].ssid,
5322 priv->direct_ssid, priv->direct_ssid_len);
5323 direct_mask = 1;
3109ece1 5324 } else if (!iwl_is_associated(priv) && priv->essid_len) {
786b4557
BM		 5325 IWL_DEBUG_SCAN
5326 ("Kicking off one direct scan for '%s' when not associated\n",
5327 iwl4965_escape_essid(priv->essid, priv->essid_len));
b481de9c
ZY		 5328 scan->direct_scan[0].id = WLAN_EID_SSID;
5329 scan->direct_scan[0].len = priv->essid_len;
5330 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
5331 direct_mask = 1;
857485c0 5332 } else {
786b4557 5333 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
b481de9c 5334 direct_mask = 0;
857485c0 5335 }
b481de9c 5336
b481de9c 5337 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
5425e490 5338 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY		 5339 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
5340
b481de9c
ZY		 5341
5342 switch (priv->scan_bands) {
5343 case 2:
5344 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
5345 scan->tx_cmd.rate_n_flags =
bb8c093b 5346 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY		 5347 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
5348
5349 scan->good_CRC_th = 0;
8318d78a 5350 band = IEEE80211_BAND_2GHZ;
b481de9c
ZY		 5351 break;
5352
5353 case 1:
5354 scan->tx_cmd.rate_n_flags =
bb8c093b 5355 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY		 5356 RATE_MCS_ANT_B_MSK);
5357 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 5358 band = IEEE80211_BAND_5GHZ;
b481de9c
ZY		 5359 break;
5360
5361 default:
5362 IWL_WARNING("Invalid scan band count\n");
5363 goto done;
5364 }
5365
78330fdd
TW		 5366 /* We don't build a direct scan probe request; the uCode will do
5367 * that based on the direct_mask added to each channel entry */
5368 cmd_len = iwl4965_fill_probe_req(priv, band,
5369 (struct ieee80211_mgmt *)scan->data,
5370 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
5371
5372 scan->tx_cmd.len = cpu_to_le16(cmd_len);
b481de9c
ZY		 5373 /* select Rx chains */
5374
5375 /* Force use of chains B and C (0x6) for scan Rx.
5376 * Avoid A (0x1) because of its off-channel reception on A-band.
5377 * MIMO is not used here, but value is required to make uCode happy. */
5378 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
5379 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
5380 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
5381 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
5382
5383 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
5384 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
5385
786b4557 5386 if (direct_mask)
26c0f03f
RC		 5387 scan->channel_count =
5388 iwl4965_get_channels_for_scan(
5389 priv, band, 1, /* active */
5390 direct_mask,
5391 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
786b4557 5392 else
26c0f03f
RC		 5393 scan->channel_count =
5394 iwl4965_get_channels_for_scan(
5395 priv, band, 0, /* passive */
5396 direct_mask,
5397 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 5398
5da4b55f
MA		 5399 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
5400 RXON_FILTER_BCON_AWARE_MSK);
b481de9c 5401 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 5402 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY		 5403 cmd.data = scan;
5404 scan->len = cpu_to_le16(cmd.len);
5405
5406 set_bit(STATUS_SCAN_HW, &priv->status);
857485c0
TW		 5407 ret = iwl_send_cmd_sync(priv, &cmd);
5408 if (ret)
b481de9c
ZY		 5409 goto done;
5410
5411 queue_delayed_work(priv->workqueue, &priv->scan_check,
5412 IWL_SCAN_CHECK_WATCHDOG);
5413
5414 mutex_unlock(&priv->mutex);
5415 return;
5416
5417 done:
01ebd063 5418 /* inform mac80211 scan aborted */
b481de9c
ZY		 5419 queue_work(priv->workqueue, &priv->scan_completed);
5420 mutex_unlock(&priv->mutex);
5421}
5422
bb8c093b 5423static void iwl4965_bg_up(struct work_struct *data)
b481de9c 5424{
c79dd5b5 5425 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 5426
5427 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5428 return;
5429
5430 mutex_lock(&priv->mutex);
bb8c093b 5431 __iwl4965_up(priv);
b481de9c
ZY		 5432 mutex_unlock(&priv->mutex);
5433}
5434
bb8c093b 5435static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 5436{
c79dd5b5 5437 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 5438
5439 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5440 return;
5441
bb8c093b 5442 iwl4965_down(priv);
b481de9c
ZY		 5443 queue_work(priv->workqueue, &priv->up);
5444}
5445
bb8c093b 5446static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 5447{
c79dd5b5
TW		 5448 struct iwl_priv *priv =
5449 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 5450
5451 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5452 return;
5453
5454 mutex_lock(&priv->mutex);
bb8c093b 5455 iwl4965_rx_replenish(priv);
b481de9c
ZY		 5456 mutex_unlock(&priv->mutex);
5457}
5458
7878a5a4
MA		 5459#define IWL_DELAY_NEXT_SCAN (HZ*2)
5460
508e32e1 5461static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 5462{
b481de9c 5463 struct ieee80211_conf *conf = NULL;
857485c0 5464 int ret = 0;
0795af57 5465 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 5466
5467 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
5468 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
5469 return;
5470 }
5471
0795af57
JP		 5472 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
5473 priv->assoc_id,
5474 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY		 5475
5476
5477 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5478 return;
5479
b481de9c 5480
508e32e1 5481 if (!priv->vif || !priv->is_open)
948c171c 5482 return;
508e32e1 5483
bb8c093b 5484 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 5485
b481de9c
ZY		 5486 conf = ieee80211_get_hw_conf(priv->hw);
5487
5488 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 5489 iwl4965_commit_rxon(priv);
b481de9c 5490
bb8c093b
CH		 5491 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
5492 iwl4965_setup_rxon_timing(priv);
857485c0 5493 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 5494 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 5495 if (ret)
b481de9c
ZY		 5496 IWL_WARNING("REPLY_RXON_TIMING failed - "
5497 "Attempting to continue.\n");
5498
5499 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5500
c8b0e6e1 5501#ifdef CONFIG_IWL4965_HT
fd105e79
RR		 5502 if (priv->current_ht_config.is_ht)
5503 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 5504#endif /* CONFIG_IWL4965_HT*/
c7de35cd 5505 iwl_set_rxon_chain(priv);
b481de9c
ZY		 5506 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
5507
5508 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
5509 priv->assoc_id, priv->beacon_int);
5510
5511 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
5512 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5513 else
5514 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5515
5516 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
5517 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
5518 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
5519 else
5520 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5521
5522 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
5523 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5524
5525 }
5526
bb8c093b 5527 iwl4965_commit_rxon(priv);
b481de9c
ZY		 5528
5529 switch (priv->iw_mode) {
5530 case IEEE80211_IF_TYPE_STA:
bb8c093b 5531 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY		 5532 break;
5533
5534 case IEEE80211_IF_TYPE_IBSS:
5535
5536 /* clear out the station table */
bf85ea4f 5537 iwlcore_clear_stations_table(priv);
b481de9c 5538
bb8c093b
CH		 5539 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
5540 iwl4965_rxon_add_station(priv, priv->bssid, 0);
5541 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
5542 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 5543
5544 break;
5545
5546 default:
5547 IWL_ERROR("%s Should not be called in %d mode\n",
5548 __FUNCTION__, priv->iw_mode);
5549 break;
5550 }
5551
bb8c093b 5552 iwl4965_sequence_reset(priv);
b481de9c 5553
b481de9c 5554 /* Enable Rx differential gain and sensitivity calibrations */
f0832f13 5555 iwl_chain_noise_reset(priv);
b481de9c 5556 priv->start_calib = 1;
b481de9c
ZY		 5557
5558 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
5559 priv->assoc_station_added = 1;
5560
bb8c093b 5561 iwl4965_activate_qos(priv, 0);
292ae174 5562
5da4b55f 5563 iwl_power_update_mode(priv, 0);
7878a5a4
MA		 5564 /* we have just associated, don't start scan too early */
5565 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
508e32e1
RC		 5566}
5567
5568
5569static void iwl4965_bg_post_associate(struct work_struct *data)
5570{
5571 struct iwl_priv *priv = container_of(data, struct iwl_priv,
5572 post_associate.work);
5573
5574 mutex_lock(&priv->mutex);
5575 iwl4965_post_associate(priv);
b481de9c 5576 mutex_unlock(&priv->mutex);
508e32e1 5577
b481de9c
ZY		 5578}
5579
bb8c093b 5580static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 5581{
c79dd5b5 5582 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
b481de9c 5583
fee1247a 5584 if (!iwl_is_ready(priv))
b481de9c
ZY		 5585 return;
5586
5587 mutex_lock(&priv->mutex);
5588
5589 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 5590 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 5591
5592 mutex_unlock(&priv->mutex);
5593}
5594
76bb77e0
ZY		 5595static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
5596
bb8c093b 5597static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 5598{
c79dd5b5
TW		 5599 struct iwl_priv *priv =
5600 container_of(work, struct iwl_priv, scan_completed);
b481de9c
ZY		 5601
5602 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
5603
5604 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5605 return;
5606
a0646470
ZY		 5607 if (test_bit(STATUS_CONF_PENDING, &priv->status))
5608 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 5609
b481de9c
ZY		 5610 ieee80211_scan_completed(priv->hw);
5611
5612 /* Since setting the TXPOWER may have been deferred while
5613 * performing the scan, fire one off */
5614 mutex_lock(&priv->mutex);
bb8c093b 5615 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 5616 mutex_unlock(&priv->mutex);
5617}
5618
5619/*****************************************************************************
5620 *
5621 * mac80211 entry point functions
5622 *
5623 *****************************************************************************/
5624
5a66926a
ZY		 5625#define UCODE_READY_TIMEOUT (2 * HZ)
5626
bb8c093b 5627static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 5628{
c79dd5b5 5629 struct iwl_priv *priv = hw->priv;
5a66926a 5630 int ret;
b481de9c
ZY		 5631
5632 IWL_DEBUG_MAC80211("enter\n");
5633
5a66926a
ZY		 5634 if (pci_enable_device(priv->pci_dev)) {
5635 IWL_ERROR("Fail to pci_enable_device\n");
5636 return -ENODEV;
5637 }
5638 pci_restore_state(priv->pci_dev);
5639 pci_enable_msi(priv->pci_dev);
5640
5641 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
5642 DRV_NAME, priv);
5643 if (ret) {
5644 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
5645 goto out_disable_msi;
5646 }
5647
b481de9c
ZY		 5648 /* we should be verifying the device is ready to be opened */
5649 mutex_lock(&priv->mutex);
5650
5a66926a
ZY		 5651 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
5652 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
5653 * ucode filename and max sizes are card-specific. */
b481de9c 5654
5a66926a
ZY		 5655 if (!priv->ucode_code.len) {
5656 ret = iwl4965_read_ucode(priv);
5657 if (ret) {
5658 IWL_ERROR("Could not read microcode: %d\n", ret);
5659 mutex_unlock(&priv->mutex);
5660 goto out_release_irq;
5661 }
5662 }
b481de9c 5663
e655b9f0 5664 ret = __iwl4965_up(priv);
5a66926a 5665
b481de9c 5666 mutex_unlock(&priv->mutex);
5a66926a 5667
e655b9f0
ZY		 5668 if (ret)
5669 goto out_release_irq;
5670
5671 IWL_DEBUG_INFO("Start UP work done.\n");
5672
5673 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
5674 return 0;
5675
5a66926a
ZY		 5676 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
5677 * mac80211 will not be run successfully. */
5678 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
5679 test_bit(STATUS_READY, &priv->status),
5680 UCODE_READY_TIMEOUT);
5681 if (!ret) {
5682 if (!test_bit(STATUS_READY, &priv->status)) {
5683 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
5684 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5685 ret = -ETIMEDOUT;
5686 goto out_release_irq;
5687 }
5688 }
5689
e655b9f0 5690 priv->is_open = 1;
b481de9c
ZY		 5691 IWL_DEBUG_MAC80211("leave\n");
5692 return 0;
5a66926a
ZY		 5693
5694out_release_irq:
5695 free_irq(priv->pci_dev->irq, priv);
5696out_disable_msi:
5697 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY		 5698 pci_disable_device(priv->pci_dev);
5699 priv->is_open = 0;
5700 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 5701 return ret;
b481de9c
ZY		 5702}
5703
bb8c093b 5704static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 5705{
c79dd5b5 5706 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 5707
5708 IWL_DEBUG_MAC80211("enter\n");
948c171c 5709
e655b9f0
ZY		 5710 if (!priv->is_open) {
5711 IWL_DEBUG_MAC80211("leave - skip\n");
5712 return;
5713 }
5714
b481de9c 5715 priv->is_open = 0;
5a66926a 5716
fee1247a 5717 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY		 5718 /* stop mac, cancel any scan request and clear
5719 * RXON_FILTER_ASSOC_MSK BIT
5720 */
5a66926a
ZY		 5721 mutex_lock(&priv->mutex);
5722 iwl4965_scan_cancel_timeout(priv, 100);
5723 cancel_delayed_work(&priv->post_associate);
fde3571f 5724 mutex_unlock(&priv->mutex);
fde3571f
MA		 5725 }
5726
5a66926a
ZY		 5727 iwl4965_down(priv);
5728
5729 flush_workqueue(priv->workqueue);
5730 free_irq(priv->pci_dev->irq, priv);
5731 pci_disable_msi(priv->pci_dev);
5732 pci_save_state(priv->pci_dev);
5733 pci_disable_device(priv->pci_dev);
948c171c 5734
b481de9c 5735 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 5736}
5737
bb8c093b 5738static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 5739 struct ieee80211_tx_control *ctl)
5740{
c79dd5b5 5741 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 5742
5743 IWL_DEBUG_MAC80211("enter\n");
5744
5745 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
5746 IWL_DEBUG_MAC80211("leave - monitor\n");
5747 return -1;
5748 }
5749
5750 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
8318d78a 5751 ctl->tx_rate->bitrate);
b481de9c 5752
bb8c093b 5753 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY		 5754 dev_kfree_skb_any(skb);
5755
5756 IWL_DEBUG_MAC80211("leave\n");
5757 return 0;
5758}
5759
bb8c093b 5760static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 5761 struct ieee80211_if_init_conf *conf)
5762{
c79dd5b5 5763 struct iwl_priv *priv = hw->priv;
b481de9c 5764 unsigned long flags;
0795af57 5765 DECLARE_MAC_BUF(mac);
b481de9c 5766
32bfd35d 5767 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 5768
32bfd35d
JB		 5769 if (priv->vif) {
5770 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 5771 return -EOPNOTSUPP;
b481de9c
ZY		 5772 }
5773
5774 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 5775 priv->vif = conf->vif;
b481de9c
ZY		 5776
5777 spin_unlock_irqrestore(&priv->lock, flags);
5778
5779 mutex_lock(&priv->mutex);
864792e3
TW		 5780
5781 if (conf->mac_addr) {
5782 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
5783 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
5784 }
b481de9c 5785
fee1247a 5786 if (iwl_is_ready(priv))
5a66926a
ZY		 5787 iwl4965_set_mode(priv, conf->type);
5788
b481de9c
ZY		 5789 mutex_unlock(&priv->mutex);
5790
5a66926a 5791 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 5792 return 0;
5793}
5794
5795/**
bb8c093b 5796 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY		 5797 *
5798 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
5799 * be set inappropriately and the driver currently sets the hardware up to
5800 * use it whenever needed.
5801 */
bb8c093b 5802static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 5803{
c79dd5b5 5804 struct iwl_priv *priv = hw->priv;
bf85ea4f 5805 const struct iwl_channel_info *ch_info;
b481de9c 5806 unsigned long flags;
76bb77e0 5807 int ret = 0;
b481de9c
ZY		 5808
5809 mutex_lock(&priv->mutex);
8318d78a 5810 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 5811
12342c47
ZY		 5812 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
5813
fee1247a 5814 if (!iwl_is_ready(priv)) {
b481de9c 5815 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 5816 ret = -EIO;
5817 goto out;
b481de9c
ZY		 5818 }
5819
1ea87396 5820 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 5821 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY		 5822 IWL_DEBUG_MAC80211("leave - scanning\n");
5823 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 5824 mutex_unlock(&priv->mutex);
a0646470 5825 return 0;
b481de9c
ZY		 5826 }
5827
5828 spin_lock_irqsave(&priv->lock, flags);
5829
8622e705 5830 ch_info = iwl_get_channel_info(priv, conf->channel->band,
8318d78a 5831 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 5832 if (!is_channel_valid(ch_info)) {
b481de9c
ZY		 5833 IWL_DEBUG_MAC80211("leave - invalid channel\n");
5834 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY		 5835 ret = -EINVAL;
5836 goto out;
b481de9c
ZY		 5837 }
5838
c8b0e6e1 5839#ifdef CONFIG_IWL4965_HT
78330fdd 5840 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 5841 * from any ht related info since 2.4 does not
5842 * support ht */
78330fdd 5843 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
b481de9c
ZY		 5844#ifdef IEEE80211_CONF_CHANNEL_SWITCH
5845 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
5846#endif
5847 )
5848 priv->staging_rxon.flags = 0;
c8b0e6e1 5849#endif /* CONFIG_IWL4965_HT */
b481de9c 5850
c7de35cd 5851 iwl_set_rxon_channel(priv, conf->channel->band,
8318d78a 5852 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 5853
8318d78a 5854 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
b481de9c
ZY		 5855
5856 /* The list of supported rates and rate mask can be different
8318d78a 5857 * for each band; since the band may have changed, reset
b481de9c 5858 * the rate mask to what mac80211 lists */
bb8c093b 5859 iwl4965_set_rate(priv);
b481de9c
ZY		 5860
5861 spin_unlock_irqrestore(&priv->lock, flags);
5862
5863#ifdef IEEE80211_CONF_CHANNEL_SWITCH
5864 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 5865 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 5866 goto out;
b481de9c
ZY		 5867 }
5868#endif
5869
ad97edd2
MA		 5870 if (priv->cfg->ops->lib->radio_kill_sw)
5871 priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY		 5872
5873 if (!conf->radio_enabled) {
5874 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 5875 goto out;
b481de9c
ZY		 5876 }
5877
fee1247a 5878 if (iwl_is_rfkill(priv)) {
b481de9c 5879 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 5880 ret = -EIO;
5881 goto out;
b481de9c
ZY		 5882 }
5883
bb8c093b 5884 iwl4965_set_rate(priv);
b481de9c
ZY		 5885
5886 if (memcmp(&priv->active_rxon,
5887 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 5888 iwl4965_commit_rxon(priv);
b481de9c
ZY		 5889 else
5890 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
5891
5892 IWL_DEBUG_MAC80211("leave\n");
5893
a0646470
ZY		 5894out:
5895 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 5896 mutex_unlock(&priv->mutex);
76bb77e0 5897 return ret;
b481de9c
ZY		 5898}
5899
c79dd5b5 5900static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 5901{
857485c0 5902 int ret = 0;
b481de9c 5903
d986bcd1 5904 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 5905 return;
5906
5907 /* The following should be done only at AP bring up */
5908 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
5909
5910 /* RXON - unassoc (to set timing command) */
5911 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 5912 iwl4965_commit_rxon(priv);
b481de9c
ZY		 5913
5914 /* RXON Timing */
bb8c093b
CH		 5915 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
5916 iwl4965_setup_rxon_timing(priv);
857485c0 5917 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 5918 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 5919 if (ret)
b481de9c
ZY		 5920 IWL_WARNING("REPLY_RXON_TIMING failed - "
5921 "Attempting to continue.\n");
5922
c7de35cd 5923 iwl_set_rxon_chain(priv);
b481de9c
ZY		 5924
5925 /* FIXME: what should be the assoc_id for AP? */
5926 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
5927 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
5928 priv->staging_rxon.flags |=
5929 RXON_FLG_SHORT_PREAMBLE_MSK;
5930 else
5931 priv->staging_rxon.flags &=
5932 ~RXON_FLG_SHORT_PREAMBLE_MSK;
5933
5934 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
5935 if (priv->assoc_capability &
5936 WLAN_CAPABILITY_SHORT_SLOT_TIME)
5937 priv->staging_rxon.flags |=
5938 RXON_FLG_SHORT_SLOT_MSK;
5939 else
5940 priv->staging_rxon.flags &=
5941 ~RXON_FLG_SHORT_SLOT_MSK;
5942
5943 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
5944 priv->staging_rxon.flags &=
5945 ~RXON_FLG_SHORT_SLOT_MSK;
5946 }
5947 /* restore RXON assoc */
5948 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 5949 iwl4965_commit_rxon(priv);
bb8c093b 5950 iwl4965_activate_qos(priv, 1);
bb8c093b 5951 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 5952 }
bb8c093b 5953 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 5954
5955 /* FIXME - we need to add code here to detect a totally new
5956 * configuration, reset the AP, unassoc, rxon timing, assoc,
5957 * clear sta table, add BCAST sta... */
5958}
5959
32bfd35d
JB		 5960static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
5961 struct ieee80211_vif *vif,
b481de9c
ZY		 5962 struct ieee80211_if_conf *conf)
5963{
c79dd5b5 5964 struct iwl_priv *priv = hw->priv;
0795af57 5965 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 5966 unsigned long flags;
5967 int rc;
5968
5969 if (conf == NULL)
5970 return -EIO;
5971
b716bb91
EG		 5972 if (priv->vif != vif) {
5973 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG		 5974 return 0;
5975 }
5976
b481de9c
ZY		 5977 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
5978 (!conf->beacon || !conf->ssid_len)) {
5979 IWL_DEBUG_MAC80211
5980 ("Leaving in AP mode because HostAPD is not ready.\n");
5981 return 0;
5982 }
5983
fee1247a 5984 if (!iwl_is_alive(priv))
5a66926a
ZY		 5985 return -EAGAIN;
5986
b481de9c
ZY		 5987 mutex_lock(&priv->mutex);
5988
b481de9c 5989 if (conf->bssid)
0795af57
JP		 5990 IWL_DEBUG_MAC80211("bssid: %s\n",
5991 print_mac(mac, conf->bssid));
b481de9c 5992
4150c572
JB		 5993/*
5994 * very dubious code was here; the probe filtering flag is never set:
5995 *
b481de9c
ZY		 5996 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
5997 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 5998 */
b481de9c
ZY		 5999
6000 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6001 if (!conf->bssid) {
6002 conf->bssid = priv->mac_addr;
6003 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP		 6004 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6005 print_mac(mac, conf->bssid));
b481de9c
ZY		 6006 }
6007 if (priv->ibss_beacon)
6008 dev_kfree_skb(priv->ibss_beacon);
6009
6010 priv->ibss_beacon = conf->beacon;
6011 }
6012
fee1247a 6013 if (iwl_is_rfkill(priv))
fde3571f
MA		 6014 goto done;
6015
b481de9c
ZY		 6016 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6017 !is_multicast_ether_addr(conf->bssid)) {
6018 /* If there is currently a HW scan going on in the background
6019 * then we need to cancel it else the RXON below will fail. */
bb8c093b 6020 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY		 6021 IWL_WARNING("Aborted scan still in progress "
6022 "after 100ms\n");
6023 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6024 mutex_unlock(&priv->mutex);
6025 return -EAGAIN;
6026 }
6027 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6028
6029 /* TODO: Audit driver for usage of these members and see
6030 * if mac80211 deprecates them (priv->bssid looks like it
6031 * shouldn't be there, but I haven't scanned the IBSS code
6032 * to verify) - jpk */
6033 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6034
6035 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6036 iwl4965_config_ap(priv);
b481de9c 6037 else {
bb8c093b 6038 rc = iwl4965_commit_rxon(priv);
b481de9c 6039 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 6040 iwl4965_rxon_add_station(
b481de9c
ZY		 6041 priv, priv->active_rxon.bssid_addr, 1);
6042 }
6043
6044 } else {
bb8c093b 6045 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 6046 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6047 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6048 }
6049
fde3571f 6050 done:
b481de9c
ZY		 6051 spin_lock_irqsave(&priv->lock, flags);
6052 if (!conf->ssid_len)
6053 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6054 else
6055 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6056
6057 priv->essid_len = conf->ssid_len;
6058 spin_unlock_irqrestore(&priv->lock, flags);
6059
6060 IWL_DEBUG_MAC80211("leave\n");
6061 mutex_unlock(&priv->mutex);
6062
6063 return 0;
6064}
6065
bb8c093b 6066static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 6067 unsigned int changed_flags,
6068 unsigned int *total_flags,
6069 int mc_count, struct dev_addr_list *mc_list)
6070{
6071 /*
6072 * XXX: dummy
bb8c093b 6073 * see also iwl4965_connection_init_rx_config
4150c572
JB		 6074 */
6075 *total_flags = 0;
6076}
6077
bb8c093b 6078static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 6079 struct ieee80211_if_init_conf *conf)
6080{
c79dd5b5 6081 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6082
6083 IWL_DEBUG_MAC80211("enter\n");
6084
6085 mutex_lock(&priv->mutex);
948c171c 6086
fee1247a 6087 if (iwl_is_ready_rf(priv)) {
fde3571f
MA		 6088 iwl4965_scan_cancel_timeout(priv, 100);
6089 cancel_delayed_work(&priv->post_associate);
6090 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6091 iwl4965_commit_rxon(priv);
6092 }
32bfd35d
JB		 6093 if (priv->vif == conf->vif) {
6094 priv->vif = NULL;
b481de9c
ZY		 6095 memset(priv->bssid, 0, ETH_ALEN);
6096 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6097 priv->essid_len = 0;
6098 }
6099 mutex_unlock(&priv->mutex);
6100
6101 IWL_DEBUG_MAC80211("leave\n");
6102
6103}
471b3efd 6104
3109ece1 6105#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB		 6106static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
6107 struct ieee80211_vif *vif,
6108 struct ieee80211_bss_conf *bss_conf,
6109 u32 changes)
220173b0 6110{
c79dd5b5 6111 struct iwl_priv *priv = hw->priv;
220173b0 6112
3109ece1
TW		 6113 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6114
471b3efd 6115 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW		 6116 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6117 bss_conf->use_short_preamble);
471b3efd 6118 if (bss_conf->use_short_preamble)
220173b0
TW		 6119 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6120 else
6121 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6122 }
6123
471b3efd 6124 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 6125 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 6126 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 6127 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6128 else
6129 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6130 }
6131
98952d5d 6132 if (changes & BSS_CHANGED_HT) {
3109ece1 6133 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d 6134 iwl4965_ht_conf(priv, bss_conf);
c7de35cd 6135 iwl_set_rxon_chain(priv);
98952d5d
TW		 6136 }
6137
471b3efd 6138 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 6139 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC		 6140 /* This should never happen as this function should
6141 * never be called from interrupt context. */
6142 if (WARN_ON_ONCE(in_interrupt()))
6143 return;
3109ece1
TW		 6144 if (bss_conf->assoc) {
6145 priv->assoc_id = bss_conf->aid;
6146 priv->beacon_int = bss_conf->beacon_int;
6147 priv->timestamp = bss_conf->timestamp;
6148 priv->assoc_capability = bss_conf->assoc_capability;
6149 priv->next_scan_jiffies = jiffies +
6150 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC		 6151 mutex_lock(&priv->mutex);
6152 iwl4965_post_associate(priv);
6153 mutex_unlock(&priv->mutex);
3109ece1
TW		 6154 } else {
6155 priv->assoc_id = 0;
6156 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6157 }
6158 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
6159 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 6160 iwl_send_rxon_assoc(priv);
471b3efd
JB		 6161 }
6162
220173b0 6163}
b481de9c 6164
bb8c093b 6165static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY		 6166{
6167 int rc = 0;
6168 unsigned long flags;
c79dd5b5 6169 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6170
6171 IWL_DEBUG_MAC80211("enter\n");
6172
052c4b9f 6173 mutex_lock(&priv->mutex);
b481de9c
ZY		 6174 spin_lock_irqsave(&priv->lock, flags);
6175
fee1247a 6176 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 6177 rc = -EIO;
6178 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6179 goto out_unlock;
6180 }
6181
6182 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
6183 rc = -EIO;
6184 IWL_ERROR("ERROR: APs don't scan\n");
6185 goto out_unlock;
6186 }
6187
7878a5a4
MA		 6188 /* we don't schedule scan within next_scan_jiffies period */
6189 if (priv->next_scan_jiffies &&
6190 time_after(priv->next_scan_jiffies, jiffies)) {
6191 rc = -EAGAIN;
6192 goto out_unlock;
6193 }
b481de9c 6194 /* if we just finished scan ask for delay */
7878a5a4
MA		 6195 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
6196 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY		 6197 rc = -EAGAIN;
6198 goto out_unlock;
6199 }
6200 if (len) {
7878a5a4 6201 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 6202 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY		 6203
6204 priv->one_direct_scan = 1;
6205 priv->direct_ssid_len = (u8)
6206 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6207 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA		 6208 } else
6209 priv->one_direct_scan = 0;
b481de9c 6210
bb8c093b 6211 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY		 6212
6213 IWL_DEBUG_MAC80211("leave\n");
6214
6215out_unlock:
6216 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 6217 mutex_unlock(&priv->mutex);
b481de9c
ZY		 6218
6219 return rc;
6220}
6221
ab885f8c
EG		 6222static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
6223 struct ieee80211_key_conf *keyconf, const u8 *addr,
6224 u32 iv32, u16 *phase1key)
6225{
6226 struct iwl_priv *priv = hw->priv;
6227 u8 sta_id = IWL_INVALID_STATION;
6228 unsigned long flags;
6229 __le16 key_flags = 0;
6230 int i;
6231 DECLARE_MAC_BUF(mac);
6232
6233 IWL_DEBUG_MAC80211("enter\n");
6234
947b13a7 6235 sta_id = iwl_find_station(priv, addr);
ab885f8c
EG		 6236 if (sta_id == IWL_INVALID_STATION) {
6237 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6238 print_mac(mac, addr));
6239 return;
6240 }
6241
6242 iwl4965_scan_cancel_timeout(priv, 100);
6243
6244 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
6245 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
6246 key_flags &= ~STA_KEY_FLG_INVALID;
6247
5425e490 6248 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG		 6249 key_flags |= STA_KEY_MULTICAST_MSK;
6250
6251 spin_lock_irqsave(&priv->sta_lock, flags);
6252
ab885f8c
EG		 6253 priv->stations[sta_id].sta.key.key_flags = key_flags;
6254 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
6255
6256 for (i = 0; i < 5; i++)
6257 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
6258 cpu_to_le16(phase1key[i]);
6259
6260 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
6261 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
6262
6263 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
6264
6265 spin_unlock_irqrestore(&priv->sta_lock, flags);
6266
6267 IWL_DEBUG_MAC80211("leave\n");
6268}
6269
bb8c093b 6270static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY		 6271 const u8 *local_addr, const u8 *addr,
6272 struct ieee80211_key_conf *key)
6273{
c79dd5b5 6274 struct iwl_priv *priv = hw->priv;
0795af57 6275 DECLARE_MAC_BUF(mac);
deb09c43
EG		 6276 int ret = 0;
6277 u8 sta_id = IWL_INVALID_STATION;
6974e363 6278 u8 is_default_wep_key = 0;
b481de9c
ZY		 6279
6280 IWL_DEBUG_MAC80211("enter\n");
6281
099b40b7 6282 if (priv->hw_params.sw_crypto) {
b481de9c
ZY		 6283 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6284 return -EOPNOTSUPP;
6285 }
6286
6287 if (is_zero_ether_addr(addr))
6288 /* only support pairwise keys */
6289 return -EOPNOTSUPP;
6290
947b13a7 6291 sta_id = iwl_find_station(priv, addr);
6974e363
EG		 6292 if (sta_id == IWL_INVALID_STATION) {
6293 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6294 print_mac(mac, addr));
6295 return -EINVAL;
b481de9c 6296
deb09c43 6297 }
b481de9c 6298
6974e363 6299 mutex_lock(&priv->mutex);
bb8c093b 6300 iwl4965_scan_cancel_timeout(priv, 100);
6974e363
EG		 6301 mutex_unlock(&priv->mutex);
6302
6303 /* If we are getting WEP group key and we didn't receive any key mapping
6304 * so far, we are in legacy wep mode (group key only), otherwise we are
6305 * in 1X mode.
6306 * In legacy wep mode, we use another host command to the uCode */
5425e490 6307 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
6974e363
EG		 6308 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
6309 if (cmd == SET_KEY)
6310 is_default_wep_key = !priv->key_mapping_key;
6311 else
6312 is_default_wep_key = priv->default_wep_key;
6313 }
052c4b9f 6314
b481de9c 6315 switch (cmd) {
deb09c43 6316 case SET_KEY:
6974e363
EG		 6317 if (is_default_wep_key)
6318 ret = iwl_set_default_wep_key(priv, key);
deb09c43 6319 else
7480513f 6320 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG		 6321
6322 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY		 6323 break;
6324 case DISABLE_KEY:
6974e363
EG		 6325 if (is_default_wep_key)
6326 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 6327 else
3ec47732 6328 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG		 6329
6330 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY		 6331 break;
6332 default:
deb09c43 6333 ret = -EINVAL;
b481de9c
ZY		 6334 }
6335
6336 IWL_DEBUG_MAC80211("leave\n");
b481de9c 6337
deb09c43 6338 return ret;
b481de9c
ZY		 6339}
6340
e100bb64 6341static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY		 6342 const struct ieee80211_tx_queue_params *params)
6343{
c79dd5b5 6344 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6345 unsigned long flags;
6346 int q;
b481de9c
ZY		 6347
6348 IWL_DEBUG_MAC80211("enter\n");
6349
fee1247a 6350 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 6351 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6352 return -EIO;
6353 }
6354
6355 if (queue >= AC_NUM) {
6356 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
6357 return 0;
6358 }
6359
b481de9c
ZY		 6360 if (!priv->qos_data.qos_enable) {
6361 priv->qos_data.qos_active = 0;
6362 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
6363 return 0;
6364 }
6365 q = AC_NUM - 1 - queue;
6366
6367 spin_lock_irqsave(&priv->lock, flags);
6368
6369 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
6370 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
6371 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
6372 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 6373 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 6374
6375 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
6376 priv->qos_data.qos_active = 1;
6377
6378 spin_unlock_irqrestore(&priv->lock, flags);
6379
6380 mutex_lock(&priv->mutex);
6381 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6382 iwl4965_activate_qos(priv, 1);
3109ece1 6383 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 6384 iwl4965_activate_qos(priv, 0);
b481de9c
ZY		 6385
6386 mutex_unlock(&priv->mutex);
6387
b481de9c
ZY		 6388 IWL_DEBUG_MAC80211("leave\n");
6389 return 0;
6390}
6391
bb8c093b 6392static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 6393 struct ieee80211_tx_queue_stats *stats)
6394{
c79dd5b5 6395 struct iwl_priv *priv = hw->priv;
b481de9c 6396 int i, avail;
bb8c093b
CH		 6397 struct iwl4965_tx_queue *txq;
6398 struct iwl4965_queue *q;
b481de9c
ZY		 6399 unsigned long flags;
6400
6401 IWL_DEBUG_MAC80211("enter\n");
6402
fee1247a 6403 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 6404 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6405 return -EIO;
6406 }
6407
6408 spin_lock_irqsave(&priv->lock, flags);
6409
6410 for (i = 0; i < AC_NUM; i++) {
6411 txq = &priv->txq[i];
6412 q = &txq->q;
bb8c093b 6413 avail = iwl4965_queue_space(q);
b481de9c 6414
57ffc589
JB		 6415 stats[i].len = q->n_window - avail;
6416 stats[i].limit = q->n_window - q->high_mark;
6417 stats[i].count = q->n_window;
b481de9c
ZY		 6418
6419 }
6420 spin_unlock_irqrestore(&priv->lock, flags);
6421
6422 IWL_DEBUG_MAC80211("leave\n");
6423
6424 return 0;
6425}
6426
bb8c093b 6427static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 6428 struct ieee80211_low_level_stats *stats)
6429{
6430 IWL_DEBUG_MAC80211("enter\n");
6431 IWL_DEBUG_MAC80211("leave\n");
6432
6433 return 0;
6434}
6435
bb8c093b 6436static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY		 6437{
6438 IWL_DEBUG_MAC80211("enter\n");
6439 IWL_DEBUG_MAC80211("leave\n");
6440
6441 return 0;
6442}
6443
bb8c093b 6444static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 6445{
c79dd5b5 6446 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6447 unsigned long flags;
6448
6449 mutex_lock(&priv->mutex);
6450 IWL_DEBUG_MAC80211("enter\n");
6451
6452 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 6453#ifdef CONFIG_IWL4965_HT
b481de9c 6454 spin_lock_irqsave(&priv->lock, flags);
fd105e79 6455 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 6456 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 6457#endif /* CONFIG_IWL4965_HT */
b481de9c 6458
c7de35cd 6459 iwl_reset_qos(priv);
b481de9c
ZY		 6460
6461 cancel_delayed_work(&priv->post_associate);
6462
6463 spin_lock_irqsave(&priv->lock, flags);
6464 priv->assoc_id = 0;
6465 priv->assoc_capability = 0;
b481de9c
ZY		 6466 priv->assoc_station_added = 0;
6467
6468 /* new association get rid of ibss beacon skb */
6469 if (priv->ibss_beacon)
6470 dev_kfree_skb(priv->ibss_beacon);
6471
6472 priv->ibss_beacon = NULL;
6473
6474 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 6475 priv->timestamp = 0;
b481de9c
ZY		 6476 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
6477 priv->beacon_int = 0;
6478
6479 spin_unlock_irqrestore(&priv->lock, flags);
6480
fee1247a 6481 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA		 6482 IWL_DEBUG_MAC80211("leave - not ready\n");
6483 mutex_unlock(&priv->mutex);
6484 return;
6485 }
6486
052c4b9f 6487 /* we are restarting association process
6488 * clear RXON_FILTER_ASSOC_MSK bit
6489 */
6490 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 6491 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 6492 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6493 iwl4965_commit_rxon(priv);
052c4b9f 6494 }
6495
5da4b55f
MA		 6496 iwl_power_update_mode(priv, 0);
6497
b481de9c
ZY		 6498 /* Per mac80211.h: This is only used in IBSS mode... */
6499 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 6500
b481de9c
ZY		 6501 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
6502 mutex_unlock(&priv->mutex);
6503 return;
6504 }
6505
bb8c093b 6506 iwl4965_set_rate(priv);
b481de9c
ZY		 6507
6508 mutex_unlock(&priv->mutex);
6509
6510 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 6511}
6512
bb8c093b 6513static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 6514 struct ieee80211_tx_control *control)
6515{
c79dd5b5 6516 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6517 unsigned long flags;
6518
6519 mutex_lock(&priv->mutex);
6520 IWL_DEBUG_MAC80211("enter\n");
6521
fee1247a 6522 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 6523 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6524 mutex_unlock(&priv->mutex);
6525 return -EIO;
6526 }
6527
6528 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
6529 IWL_DEBUG_MAC80211("leave - not IBSS\n");
6530 mutex_unlock(&priv->mutex);
6531 return -EIO;
6532 }
6533
6534 spin_lock_irqsave(&priv->lock, flags);
6535
6536 if (priv->ibss_beacon)
6537 dev_kfree_skb(priv->ibss_beacon);
6538
6539 priv->ibss_beacon = skb;
6540
6541 priv->assoc_id = 0;
6542
6543 IWL_DEBUG_MAC80211("leave\n");
6544 spin_unlock_irqrestore(&priv->lock, flags);
6545
c7de35cd 6546 iwl_reset_qos(priv);
b481de9c
ZY		 6547
6548 queue_work(priv->workqueue, &priv->post_associate.work);
6549
6550 mutex_unlock(&priv->mutex);
6551
6552 return 0;
6553}
6554
b481de9c
ZY		 6555/*****************************************************************************
6556 *
6557 * sysfs attributes
6558 *
6559 *****************************************************************************/
6560
0a6857e7 6561#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 6562
6563/*
6564 * The following adds a new attribute to the sysfs representation
6565 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
6566 * used for controlling the debug level.
6567 *
6568 * See the level definitions in iwl for details.
6569 */
6570
6571static ssize_t show_debug_level(struct device_driver *d, char *buf)
6572{
0a6857e7 6573 return sprintf(buf, "0x%08X\n", iwl_debug_level);
b481de9c
ZY		 6574}
6575static ssize_t store_debug_level(struct device_driver *d,
6576 const char *buf, size_t count)
6577{
6578 char *p = (char *)buf;
6579 u32 val;
6580
6581 val = simple_strtoul(p, &p, 0);
6582 if (p == buf)
6583 printk(KERN_INFO DRV_NAME
6584 ": %s is not in hex or decimal form.\n", buf);
6585 else
0a6857e7 6586 iwl_debug_level = val;
b481de9c
ZY		 6587
6588 return strnlen(buf, count);
6589}
6590
6591static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
6592 show_debug_level, store_debug_level);
6593
0a6857e7 6594#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 6595
b481de9c
ZY		 6596
6597static ssize_t show_temperature(struct device *d,
6598 struct device_attribute *attr, char *buf)
6599{
c79dd5b5 6600 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 6601
fee1247a 6602 if (!iwl_is_alive(priv))
b481de9c
ZY		 6603 return -EAGAIN;
6604
bb8c093b 6605 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY		 6606}
6607
6608static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
6609
6610static ssize_t show_rs_window(struct device *d,
6611 struct device_attribute *attr,
6612 char *buf)
6613{
c79dd5b5 6614 struct iwl_priv *priv = d->driver_data;
bb8c093b 6615 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY		 6616}
6617static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
6618
6619static ssize_t show_tx_power(struct device *d,
6620 struct device_attribute *attr, char *buf)
6621{
c79dd5b5 6622 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6623 return sprintf(buf, "%d\n", priv->user_txpower_limit);
6624}
6625
6626static ssize_t store_tx_power(struct device *d,
6627 struct device_attribute *attr,
6628 const char *buf, size_t count)
6629{
c79dd5b5 6630 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6631 char *p = (char *)buf;
6632 u32 val;
6633
6634 val = simple_strtoul(p, &p, 10);
6635 if (p == buf)
6636 printk(KERN_INFO DRV_NAME
6637 ": %s is not in decimal form.\n", buf);
6638 else
bb8c093b 6639 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY		 6640
6641 return count;
6642}
6643
6644static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
6645
6646static ssize_t show_flags(struct device *d,
6647 struct device_attribute *attr, char *buf)
6648{
c79dd5b5 6649 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6650
6651 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
6652}
6653
6654static ssize_t store_flags(struct device *d,
6655 struct device_attribute *attr,
6656 const char *buf, size_t count)
6657{
c79dd5b5 6658 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6659 u32 flags = simple_strtoul(buf, NULL, 0);
6660
6661 mutex_lock(&priv->mutex);
6662 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
6663 /* Cancel any currently running scans... */
bb8c093b 6664 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 6665 IWL_WARNING("Could not cancel scan.\n");
6666 else {
6667 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
6668 flags);
6669 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 6670 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6671 }
6672 }
6673 mutex_unlock(&priv->mutex);
6674
6675 return count;
6676}
6677
6678static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
6679
6680static ssize_t show_filter_flags(struct device *d,
6681 struct device_attribute *attr, char *buf)
6682{
c79dd5b5 6683 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6684
6685 return sprintf(buf, "0x%04X\n",
6686 le32_to_cpu(priv->active_rxon.filter_flags));
6687}
6688
6689static ssize_t store_filter_flags(struct device *d,
6690 struct device_attribute *attr,
6691 const char *buf, size_t count)
6692{
c79dd5b5 6693 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6694 u32 filter_flags = simple_strtoul(buf, NULL, 0);
6695
6696 mutex_lock(&priv->mutex);
6697 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
6698 /* Cancel any currently running scans... */
bb8c093b 6699 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 6700 IWL_WARNING("Could not cancel scan.\n");
6701 else {
6702 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
6703 "0x%04X\n", filter_flags);
6704 priv->staging_rxon.filter_flags =
6705 cpu_to_le32(filter_flags);
bb8c093b 6706 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6707 }
6708 }
6709 mutex_unlock(&priv->mutex);
6710
6711 return count;
6712}
6713
6714static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
6715 store_filter_flags);
6716
c8b0e6e1 6717#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 6718
6719static ssize_t show_measurement(struct device *d,
6720 struct device_attribute *attr, char *buf)
6721{
c79dd5b5 6722 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 6723 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY		 6724 u32 size = sizeof(measure_report), len = 0, ofs = 0;
6725 u8 *data = (u8 *) & measure_report;
6726 unsigned long flags;
6727
6728 spin_lock_irqsave(&priv->lock, flags);
6729 if (!(priv->measurement_status & MEASUREMENT_READY)) {
6730 spin_unlock_irqrestore(&priv->lock, flags);
6731 return 0;
6732 }
6733 memcpy(&measure_report, &priv->measure_report, size);
6734 priv->measurement_status = 0;
6735 spin_unlock_irqrestore(&priv->lock, flags);
6736
6737 while (size && (PAGE_SIZE - len)) {
6738 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
6739 PAGE_SIZE - len, 1);
6740 len = strlen(buf);
6741 if (PAGE_SIZE - len)
6742 buf[len++] = '\n';
6743
6744 ofs += 16;
6745 size -= min(size, 16U);
6746 }
6747
6748 return len;
6749}
6750
6751static ssize_t store_measurement(struct device *d,
6752 struct device_attribute *attr,
6753 const char *buf, size_t count)
6754{
c79dd5b5 6755 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 6756 struct ieee80211_measurement_params params = {
6757 .channel = le16_to_cpu(priv->active_rxon.channel),
6758 .start_time = cpu_to_le64(priv->last_tsf),
6759 .duration = cpu_to_le16(1),
6760 };
6761 u8 type = IWL_MEASURE_BASIC;
6762 u8 buffer[32];
6763 u8 channel;
6764
6765 if (count) {
6766 char *p = buffer;
6767 strncpy(buffer, buf, min(sizeof(buffer), count));
6768 channel = simple_strtoul(p, NULL, 0);
6769 if (channel)
6770 params.channel = channel;
6771
6772 p = buffer;
6773 while (*p && *p != ' ')
6774 p++;
6775 if (*p)
6776 type = simple_strtoul(p + 1, NULL, 0);
6777 }
6778
6779 IWL_DEBUG_INFO("Invoking measurement of type %d on "
6780 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 6781 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY		 6782
6783 return count;
6784}
6785
6786static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
6787 show_measurement, store_measurement);
c8b0e6e1 6788#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY		 6789
6790static ssize_t store_retry_rate(struct device *d,
6791 struct device_attribute *attr,
6792 const char *buf, size_t count)
6793{
c79dd5b5 6794 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 6795
6796 priv->retry_rate = simple_strtoul(buf, NULL, 0);
6797 if (priv->retry_rate <= 0)
6798 priv->retry_rate = 1;
6799
6800 return count;
6801}
6802
6803static ssize_t show_retry_rate(struct device *d,
6804 struct device_attribute *attr, char *buf)
6805{
c79dd5b5 6806 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 6807 return sprintf(buf, "%d", priv->retry_rate);
6808}
6809
6810static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
6811 store_retry_rate);
6812
6813static ssize_t store_power_level(struct device *d,
6814 struct device_attribute *attr,
6815 const char *buf, size_t count)
6816{
c79dd5b5 6817 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 6818 int rc;
6819 int mode;
6820
6821 mode = simple_strtoul(buf, NULL, 0);
6822 mutex_lock(&priv->mutex);
6823
fee1247a 6824 if (!iwl_is_ready(priv)) {
b481de9c
ZY		 6825 rc = -EAGAIN;
6826 goto out;
6827 }
6828
5da4b55f
MA		 6829 rc = iwl_power_set_user_mode(priv, mode);
6830 if (rc) {
6831 IWL_DEBUG_MAC80211("failed setting power mode.\n");
6832 goto out;
b481de9c 6833 }
b481de9c
ZY		 6834 rc = count;
6835
6836 out:
6837 mutex_unlock(&priv->mutex);
6838 return rc;
6839}
6840
6841#define MAX_WX_STRING 80
6842
6843/* Values are in microsecond */
6844static const s32 timeout_duration[] = {
6845 350000,
6846 250000,
6847 75000,
6848 37000,
6849 25000,
6850};
6851static const s32 period_duration[] = {
6852 400000,
6853 700000,
6854 1000000,
6855 1000000,
6856 1000000
6857};
6858
6859static ssize_t show_power_level(struct device *d,
6860 struct device_attribute *attr, char *buf)
6861{
c79dd5b5 6862 struct iwl_priv *priv = dev_get_drvdata(d);
5da4b55f 6863 int level = priv->power_data.power_mode;
b481de9c
ZY		 6864 char *p = buf;
6865
6866 p += sprintf(p, "%d ", level);
6867 switch (level) {
6868 case IWL_POWER_MODE_CAM:
6869 case IWL_POWER_AC:
6870 p += sprintf(p, "(AC)");
6871 break;
6872 case IWL_POWER_BATTERY:
6873 p += sprintf(p, "(BATTERY)");
6874 break;
6875 default:
6876 p += sprintf(p,
6877 "(Timeout %dms, Period %dms)",
6878 timeout_duration[level - 1] / 1000,
6879 period_duration[level - 1] / 1000);
6880 }
5da4b55f 6881/*
b481de9c
ZY		 6882 if (!(priv->power_mode & IWL_POWER_ENABLED))
6883 p += sprintf(p, " OFF\n");
6884 else
6885 p += sprintf(p, " \n");
5da4b55f
MA		 6886*/
6887 p += sprintf(p, " \n");
b481de9c 6888 return (p - buf + 1);
b481de9c
ZY		 6889}
6890
6891static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
6892 store_power_level);
6893
6894static ssize_t show_channels(struct device *d,
6895 struct device_attribute *attr, char *buf)
6896{
8318d78a
JB		 6897 /* all this shit doesn't belong into sysfs anyway */
6898 return 0;
b481de9c
ZY		 6899}
6900
6901static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
6902
6903static ssize_t show_statistics(struct device *d,
6904 struct device_attribute *attr, char *buf)
6905{
c79dd5b5 6906 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 6907 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY		 6908 u32 len = 0, ofs = 0;
6909 u8 *data = (u8 *) & priv->statistics;
6910 int rc = 0;
6911
fee1247a 6912 if (!iwl_is_alive(priv))
b481de9c
ZY		 6913 return -EAGAIN;
6914
6915 mutex_lock(&priv->mutex);
49ea8596 6916 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY		 6917 mutex_unlock(&priv->mutex);
6918
6919 if (rc) {
6920 len = sprintf(buf,
6921 "Error sending statistics request: 0x%08X\n", rc);
6922 return len;
6923 }
6924
6925 while (size && (PAGE_SIZE - len)) {
6926 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
6927 PAGE_SIZE - len, 1);
6928 len = strlen(buf);
6929 if (PAGE_SIZE - len)
6930 buf[len++] = '\n';
6931
6932 ofs += 16;
6933 size -= min(size, 16U);
6934 }
6935
6936 return len;
6937}
6938
6939static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
6940
b481de9c
ZY		 6941static ssize_t show_status(struct device *d,
6942 struct device_attribute *attr, char *buf)
6943{
c79dd5b5 6944 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 6945 if (!iwl_is_alive(priv))
b481de9c
ZY		 6946 return -EAGAIN;
6947 return sprintf(buf, "0x%08x\n", (int)priv->status);
6948}
6949
6950static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
6951
6952static ssize_t dump_error_log(struct device *d,
6953 struct device_attribute *attr,
6954 const char *buf, size_t count)
6955{
6956 char *p = (char *)buf;
6957
6958 if (p[0] == '1')
c79dd5b5 6959 iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 6960
6961 return strnlen(buf, count);
6962}
6963
6964static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
6965
6966static ssize_t dump_event_log(struct device *d,
6967 struct device_attribute *attr,
6968 const char *buf, size_t count)
6969{
6970 char *p = (char *)buf;
6971
6972 if (p[0] == '1')
c79dd5b5 6973 iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 6974
6975 return strnlen(buf, count);
6976}
6977
6978static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
6979
6980/*****************************************************************************
6981 *
6982 * driver setup and teardown
6983 *
6984 *****************************************************************************/
6985
c79dd5b5 6986static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY		 6987{
6988 priv->workqueue = create_workqueue(DRV_NAME);
6989
6990 init_waitqueue_head(&priv->wait_command_queue);
6991
bb8c093b
CH		 6992 INIT_WORK(&priv->up, iwl4965_bg_up);
6993 INIT_WORK(&priv->restart, iwl4965_bg_restart);
6994 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
6995 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
6996 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
6997 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
6998 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
6999 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
7000 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
7001 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
7002 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
7003 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
7004
7005 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY		 7006
7007 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 7008 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 7009}
7010
c79dd5b5 7011static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 7012{
bb8c093b 7013 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 7014
3ae6a054 7015 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY		 7016 cancel_delayed_work(&priv->scan_check);
7017 cancel_delayed_work(&priv->alive_start);
7018 cancel_delayed_work(&priv->post_associate);
7019 cancel_work_sync(&priv->beacon_update);
7020}
7021
bb8c093b 7022static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY		 7023 &dev_attr_channels.attr,
7024 &dev_attr_dump_errors.attr,
7025 &dev_attr_dump_events.attr,
7026 &dev_attr_flags.attr,
7027 &dev_attr_filter_flags.attr,
c8b0e6e1 7028#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 7029 &dev_attr_measurement.attr,
7030#endif
7031 &dev_attr_power_level.attr,
7032 &dev_attr_retry_rate.attr,
b481de9c
ZY		 7033 &dev_attr_rs_window.attr,
7034 &dev_attr_statistics.attr,
7035 &dev_attr_status.attr,
7036 &dev_attr_temperature.attr,
b481de9c
ZY		 7037 &dev_attr_tx_power.attr,
7038
7039 NULL
7040};
7041
bb8c093b 7042static struct attribute_group iwl4965_attribute_group = {
b481de9c 7043 .name = NULL, /* put in device directory */
bb8c093b 7044 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY		 7045};
7046
bb8c093b
CH		 7047static struct ieee80211_ops iwl4965_hw_ops = {
7048 .tx = iwl4965_mac_tx,
7049 .start = iwl4965_mac_start,
7050 .stop = iwl4965_mac_stop,
7051 .add_interface = iwl4965_mac_add_interface,
7052 .remove_interface = iwl4965_mac_remove_interface,
7053 .config = iwl4965_mac_config,
7054 .config_interface = iwl4965_mac_config_interface,
7055 .configure_filter = iwl4965_configure_filter,
7056 .set_key = iwl4965_mac_set_key,
ab885f8c 7057 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH		 7058 .get_stats = iwl4965_mac_get_stats,
7059 .get_tx_stats = iwl4965_mac_get_tx_stats,
7060 .conf_tx = iwl4965_mac_conf_tx,
7061 .get_tsf = iwl4965_mac_get_tsf,
7062 .reset_tsf = iwl4965_mac_reset_tsf,
7063 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 7064 .bss_info_changed = iwl4965_bss_info_changed,
c8b0e6e1 7065#ifdef CONFIG_IWL4965_HT
9ab46173 7066 .ampdu_action = iwl4965_mac_ampdu_action,
c8b0e6e1 7067#endif /* CONFIG_IWL4965_HT */
bb8c093b 7068 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY		 7069};
7070
bb8c093b 7071static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 7072{
7073 int err = 0;
c79dd5b5 7074 struct iwl_priv *priv;
b481de9c 7075 struct ieee80211_hw *hw;
82b9a121 7076 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 7077 unsigned long flags;
5a66926a 7078 DECLARE_MAC_BUF(mac);
b481de9c 7079
316c30d9
AK		 7080 /************************
7081 * 1. Allocating HW data
7082 ************************/
7083
6440adb5
CB		 7084 /* Disabling hardware scan means that mac80211 will perform scans
7085 * "the hard way", rather than using device's scan. */
1ea87396 7086 if (cfg->mod_params->disable_hw_scan) {
b481de9c 7087 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 7088 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY		 7089 }
7090
1d0a082d
AK		 7091 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
7092 if (!hw) {
b481de9c
ZY		 7093 err = -ENOMEM;
7094 goto out;
7095 }
1d0a082d
AK		 7096 priv = hw->priv;
7097 /* At this point both hw and priv are allocated. */
7098
b481de9c
ZY		 7099 SET_IEEE80211_DEV(hw, &pdev->dev);
7100
7101 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 7102 priv->cfg = cfg;
b481de9c 7103 priv->pci_dev = pdev;
316c30d9 7104
0a6857e7 7105#ifdef CONFIG_IWLWIFI_DEBUG
1ea87396 7106 iwl_debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY		 7107 atomic_set(&priv->restrict_refcnt, 0);
7108#endif
b481de9c 7109
316c30d9
AK		 7110 /**************************
7111 * 2. Initializing PCI bus
7112 **************************/
7113 if (pci_enable_device(pdev)) {
7114 err = -ENODEV;
7115 goto out_ieee80211_free_hw;
7116 }
7117
7118 pci_set_master(pdev);
7119
cc2a8ea8 7120 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
316c30d9 7121 if (!err)
cc2a8ea8
RR		 7122 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
7123 if (err) {
7124 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7125 if (!err)
7126 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7127 /* both attempts failed: */
316c30d9 7128 if (err) {
cc2a8ea8
RR		 7129 printk(KERN_WARNING "%s: No suitable DMA available.\n",
7130 DRV_NAME);
316c30d9 7131 goto out_pci_disable_device;
cc2a8ea8 7132 }
316c30d9
AK		 7133 }
7134
7135 err = pci_request_regions(pdev, DRV_NAME);
7136 if (err)
7137 goto out_pci_disable_device;
7138
7139 pci_set_drvdata(pdev, priv);
7140
7141 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7142 * PCI Tx retries from interfering with C3 CPU state */
7143 pci_write_config_byte(pdev, 0x41, 0x00);
7144
7145 /***********************
7146 * 3. Read REV register
7147 ***********************/
7148 priv->hw_base = pci_iomap(pdev, 0, 0);
7149 if (!priv->hw_base) {
7150 err = -ENODEV;
7151 goto out_pci_release_regions;
7152 }
7153
7154 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7155 (unsigned long long) pci_resource_len(pdev, 0));
7156 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7157
b661c819 7158 iwl_hw_detect(priv);
316c30d9 7159 printk(KERN_INFO DRV_NAME
b661c819
TW		 7160 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
7161 priv->cfg->name, priv->hw_rev);
316c30d9 7162
91238714
TW		 7163 /* amp init */
7164 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 7165 if (err < 0) {
91238714 7166 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK		 7167 goto out_iounmap;
7168 }
91238714
TW		 7169 /*****************
7170 * 4. Read EEPROM
7171 *****************/
316c30d9
AK		 7172 /* Read the EEPROM */
7173 err = iwl_eeprom_init(priv);
7174 if (err) {
7175 IWL_ERROR("Unable to init EEPROM\n");
7176 goto out_iounmap;
7177 }
8614f360
TW		 7178 err = iwl_eeprom_check_version(priv);
7179 if (err)
7180 goto out_iounmap;
7181
316c30d9
AK		 7182 /* MAC Address location in EEPROM same for 3945/4965 */
7183 iwl_eeprom_get_mac(priv, priv->mac_addr);
7184 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
7185 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7186
7187 /************************
7188 * 5. Setup HW constants
7189 ************************/
7190 /* Device-specific setup */
5425e490
TW		 7191 if (priv->cfg->ops->lib->set_hw_params(priv)) {
7192 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 7193 goto out_free_eeprom;
316c30d9
AK		 7194 }
7195
7196 /*******************
7197 * 6. Setup hw/priv
7198 *******************/
b481de9c 7199
bf85ea4f
AK		 7200 err = iwl_setup(priv);
7201 if (err)
399f4900 7202 goto out_free_eeprom;
bf85ea4f 7203 /* At this point both hw and priv are initialized. */
316c30d9
AK		 7204
7205 /**********************************
7206 * 7. Initialize module parameters
7207 **********************************/
7208
7209 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 7210 if (priv->cfg->mod_params->disable) {
316c30d9
AK		 7211 set_bit(STATUS_RF_KILL_SW, &priv->status);
7212 IWL_DEBUG_INFO("Radio disabled.\n");
7213 }
7214
1ea87396 7215 if (priv->cfg->mod_params->enable_qos)
316c30d9
AK		 7216 priv->qos_data.qos_enable = 1;
7217
7218 /********************
7219 * 8. Setup services
7220 ********************/
0359facc 7221 spin_lock_irqsave(&priv->lock, flags);
316c30d9 7222 iwl4965_disable_interrupts(priv);
0359facc 7223 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK		 7224
7225 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
7226 if (err) {
7227 IWL_ERROR("failed to create sysfs device attributes\n");
399f4900 7228 goto out_free_eeprom;
316c30d9
AK		 7229 }
7230
7231 err = iwl_dbgfs_register(priv, DRV_NAME);
7232 if (err) {
7233 IWL_ERROR("failed to create debugfs files\n");
7234 goto out_remove_sysfs;
7235 }
7236
7237 iwl4965_setup_deferred_work(priv);
7238 iwl4965_setup_rx_handlers(priv);
7239
7240 /********************
7241 * 9. Conclude
7242 ********************/
5a66926a
ZY		 7243 pci_save_state(pdev);
7244 pci_disable_device(pdev);
b481de9c 7245
c8381fdc
MA		 7246 /* notify iwlcore to init */
7247 iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
b481de9c
ZY		 7248 return 0;
7249
316c30d9
AK		 7250 out_remove_sysfs:
7251 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
073d3f5f
TW		 7252 out_free_eeprom:
7253 iwl_eeprom_free(priv);
b481de9c
ZY		 7254 out_iounmap:
7255 pci_iounmap(pdev, priv->hw_base);
7256 out_pci_release_regions:
7257 pci_release_regions(pdev);
316c30d9 7258 pci_set_drvdata(pdev, NULL);
b481de9c
ZY		 7259 out_pci_disable_device:
7260 pci_disable_device(pdev);
b481de9c
ZY		 7261 out_ieee80211_free_hw:
7262 ieee80211_free_hw(priv->hw);
7263 out:
7264 return err;
7265}
7266
c83dbf68 7267static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 7268{
c79dd5b5 7269 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY		 7270 struct list_head *p, *q;
7271 int i;
0359facc 7272 unsigned long flags;
b481de9c
ZY		 7273
7274 if (!priv)
7275 return;
7276
7277 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7278
c4f55232
RR		 7279 if (priv->mac80211_registered) {
7280 ieee80211_unregister_hw(priv->hw);
7281 priv->mac80211_registered = 0;
7282 }
7283
b481de9c 7284 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 7285
bb8c093b 7286 iwl4965_down(priv);
b481de9c 7287
0359facc
MA		 7288 /* make sure we flush any pending irq or
7289 * tasklet for the driver
7290 */
7291 spin_lock_irqsave(&priv->lock, flags);
7292 iwl4965_disable_interrupts(priv);
7293 spin_unlock_irqrestore(&priv->lock, flags);
7294
7295 iwl_synchronize_irq(priv);
7296
b481de9c
ZY		 7297 /* Free MAC hash list for ADHOC */
7298 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
7299 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
7300 list_del(p);
bb8c093b 7301 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY		 7302 }
7303 }
7304
c8381fdc 7305 iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
712b6cf5 7306 iwl_dbgfs_unregister(priv);
bb8c093b 7307 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 7308
bb8c093b 7309 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 7310
7311 if (priv->rxq.bd)
bb8c093b
CH		 7312 iwl4965_rx_queue_free(priv, &priv->rxq);
7313 iwl4965_hw_txq_ctx_free(priv);
b481de9c 7314
bf85ea4f 7315 iwlcore_clear_stations_table(priv);
073d3f5f 7316 iwl_eeprom_free(priv);
b481de9c 7317
b481de9c 7318
948c171c
MA		 7319 /*netif_stop_queue(dev); */
7320 flush_workqueue(priv->workqueue);
7321
bb8c093b 7322 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY		 7323 * priv->workqueue... so we can't take down the workqueue
7324 * until now... */
7325 destroy_workqueue(priv->workqueue);
7326 priv->workqueue = NULL;
7327
b481de9c
ZY		 7328 pci_iounmap(pdev, priv->hw_base);
7329 pci_release_regions(pdev);
7330 pci_disable_device(pdev);
7331 pci_set_drvdata(pdev, NULL);
7332
bf85ea4f 7333 iwl_free_channel_map(priv);
c7de35cd 7334 iwlcore_free_geos(priv);
b481de9c
ZY		 7335
7336 if (priv->ibss_beacon)
7337 dev_kfree_skb(priv->ibss_beacon);
7338
7339 ieee80211_free_hw(priv->hw);
7340}
7341
7342#ifdef CONFIG_PM
7343
bb8c093b 7344static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 7345{
c79dd5b5 7346 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 7347
e655b9f0
ZY		 7348 if (priv->is_open) {
7349 set_bit(STATUS_IN_SUSPEND, &priv->status);
7350 iwl4965_mac_stop(priv->hw);
7351 priv->is_open = 1;
7352 }
b481de9c 7353
b481de9c
ZY		 7354 pci_set_power_state(pdev, PCI_D3hot);
7355
b481de9c
ZY		 7356 return 0;
7357}
7358
bb8c093b 7359static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 7360{
c79dd5b5 7361 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 7362
b481de9c 7363 pci_set_power_state(pdev, PCI_D0);
b481de9c 7364
e655b9f0
ZY		 7365 if (priv->is_open)
7366 iwl4965_mac_start(priv->hw);
b481de9c 7367
e655b9f0 7368 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 7369 return 0;
7370}
7371
7372#endif /* CONFIG_PM */
7373
7374/*****************************************************************************
7375 *
7376 * driver and module entry point
7377 *
7378 *****************************************************************************/
7379
fed9017e
RR		 7380/* Hardware specific file defines the PCI IDs table for that hardware module */
7381static struct pci_device_id iwl_hw_card_ids[] = {
7382 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
7383 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
5a6a256e
TW		 7384#ifdef CONFIG_IWL5000
7385 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
7386 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
7387 {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)},
7388#endif /* CONFIG_IWL5000 */
fed9017e
RR		 7389 {0}
7390};
7391MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
7392
7393static struct pci_driver iwl_driver = {
b481de9c 7394 .name = DRV_NAME,
fed9017e 7395 .id_table = iwl_hw_card_ids,
bb8c093b
CH		 7396 .probe = iwl4965_pci_probe,
7397 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 7398#ifdef CONFIG_PM
bb8c093b
CH		 7399 .suspend = iwl4965_pci_suspend,
7400 .resume = iwl4965_pci_resume,
b481de9c
ZY		 7401#endif
7402};
7403
bb8c093b 7404static int __init iwl4965_init(void)
b481de9c
ZY		 7405{
7406
7407 int ret;
7408 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
7409 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC		 7410
7411 ret = iwl4965_rate_control_register();
7412 if (ret) {
7413 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
7414 return ret;
7415 }
7416
fed9017e 7417 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY		 7418 if (ret) {
7419 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 7420 goto error_register;
b481de9c 7421 }
0a6857e7 7422#ifdef CONFIG_IWLWIFI_DEBUG
fed9017e 7423 ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
b481de9c
ZY		 7424 if (ret) {
7425 IWL_ERROR("Unable to create driver sysfs file\n");
897e1cf2 7426 goto error_debug;
b481de9c
ZY		 7427 }
7428#endif
7429
7430 return ret;
897e1cf2
RC		 7431
7432#ifdef CONFIG_IWLWIFI_DEBUG
7433error_debug:
fed9017e 7434 pci_unregister_driver(&iwl_driver);
897e1cf2
RC		 7435#endif
7436error_register:
7437 iwl4965_rate_control_unregister();
7438 return ret;
b481de9c
ZY		 7439}
7440
bb8c093b 7441static void __exit iwl4965_exit(void)
b481de9c 7442{
0a6857e7 7443#ifdef CONFIG_IWLWIFI_DEBUG
fed9017e 7444 driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
b481de9c 7445#endif
fed9017e 7446 pci_unregister_driver(&iwl_driver);
897e1cf2 7447 iwl4965_rate_control_unregister();
b481de9c
ZY		 7448}
7449
bb8c093b
CH		 7450module_exit(iwl4965_exit);
7451module_init(iwl4965_init);
Linux kernel - Deliverables
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