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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
32 | #include <linux/version.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/pci.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/skbuff.h> | |
38 | #include <linux/netdevice.h> | |
39 | #include <linux/wireless.h> | |
40 | #include <linux/firmware.h> | |
b481de9c ZY |
41 | #include <linux/etherdevice.h> |
42 | #include <linux/if_arp.h> | |
43 | ||
b481de9c ZY |
44 | #include <net/mac80211.h> |
45 | ||
46 | #include <asm/div64.h> | |
47 | ||
6bc913bd | 48 | #include "iwl-eeprom.h" |
3e0d4cb1 | 49 | #include "iwl-dev.h" |
fee1247a | 50 | #include "iwl-core.h" |
3395f6e9 | 51 | #include "iwl-io.h" |
b481de9c | 52 | #include "iwl-helpers.h" |
6974e363 | 53 | #include "iwl-sta.h" |
f0832f13 | 54 | #include "iwl-calib.h" |
b481de9c | 55 | |
416e1438 | 56 | |
b481de9c ZY |
57 | /****************************************************************************** |
58 | * | |
59 | * module boiler plate | |
60 | * | |
61 | ******************************************************************************/ | |
62 | ||
b481de9c ZY |
63 | /* |
64 | * module name, copyright, version, etc. | |
65 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
66 | */ | |
67 | ||
68 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux" | |
69 | ||
0a6857e7 | 70 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
71 | #define VD "d" |
72 | #else | |
73 | #define VD | |
74 | #endif | |
75 | ||
c8b0e6e1 | 76 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
77 | #define VS "s" |
78 | #else | |
79 | #define VS | |
80 | #endif | |
81 | ||
df48c323 | 82 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 83 | |
b481de9c ZY |
84 | |
85 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
86 | MODULE_VERSION(DRV_VERSION); | |
87 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
88 | MODULE_LICENSE("GPL"); | |
89 | ||
b481de9c | 90 | /*************** STATION TABLE MANAGEMENT **** |
9fbab516 | 91 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
92 | * the functionality provided here |
93 | */ | |
94 | ||
95 | /**************************************************************/ | |
96 | ||
b481de9c | 97 | |
b481de9c | 98 | |
deb09c43 EG |
99 | static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
100 | { | |
c1adf9fb | 101 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
deb09c43 EG |
102 | |
103 | if (hw_decrypt) | |
104 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
105 | else | |
106 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
107 | ||
108 | } | |
109 | ||
b481de9c | 110 | /** |
bb8c093b | 111 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
112 | * |
113 | * NOTE: This is really only useful during development and can eventually | |
114 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
115 | * making changes | |
116 | */ | |
c1adf9fb | 117 | static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon) |
b481de9c ZY |
118 | { |
119 | int error = 0; | |
120 | int counter = 1; | |
121 | ||
122 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
123 | error |= le32_to_cpu(rxon->flags & | |
124 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
125 | RXON_FLG_RADAR_DETECT_MSK)); | |
126 | if (error) | |
127 | IWL_WARNING("check 24G fields %d | %d\n", | |
128 | counter++, error); | |
129 | } else { | |
130 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
131 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
132 | if (error) | |
133 | IWL_WARNING("check 52 fields %d | %d\n", | |
134 | counter++, error); | |
135 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
136 | if (error) | |
137 | IWL_WARNING("check 52 CCK %d | %d\n", | |
138 | counter++, error); | |
139 | } | |
140 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
141 | if (error) | |
142 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
143 | ||
144 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
145 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
146 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
147 | if (error) | |
148 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
149 | ||
150 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
151 | if (error) | |
152 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
153 | ||
154 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
155 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
156 | if (error) | |
157 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
158 | counter++, error); | |
159 | ||
160 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
161 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
162 | if (error) | |
163 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
164 | counter++, error); | |
165 | ||
166 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
167 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
168 | if (error) | |
169 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
170 | counter++, error); | |
171 | ||
172 | if (error) | |
173 | IWL_WARNING("Tuning to channel %d\n", | |
174 | le16_to_cpu(rxon->channel)); | |
175 | ||
176 | if (error) { | |
bb8c093b | 177 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
178 | return -1; |
179 | } | |
180 | return 0; | |
181 | } | |
182 | ||
183 | /** | |
9fbab516 | 184 | * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 185 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 186 | * |
9fbab516 BC |
187 | * If the RXON structure is changing enough to require a new tune, |
188 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
189 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 190 | */ |
c79dd5b5 | 191 | static int iwl4965_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
192 | { |
193 | ||
194 | /* These items are only settable from the full RXON command */ | |
5d1e2325 | 195 | if (!(iwl_is_associated(priv)) || |
b481de9c ZY |
196 | compare_ether_addr(priv->staging_rxon.bssid_addr, |
197 | priv->active_rxon.bssid_addr) || | |
198 | compare_ether_addr(priv->staging_rxon.node_addr, | |
199 | priv->active_rxon.node_addr) || | |
200 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
201 | priv->active_rxon.wlap_bssid_addr) || | |
202 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
203 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
204 | (priv->staging_rxon.air_propagation != | |
205 | priv->active_rxon.air_propagation) || | |
206 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
207 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
208 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
209 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
210 | (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) || | |
211 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) | |
212 | return 1; | |
213 | ||
214 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
215 | * be updated with the RXON_ASSOC command -- however only some | |
216 | * flag transitions are allowed using RXON_ASSOC */ | |
217 | ||
218 | /* Check if we are not switching bands */ | |
219 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
220 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
221 | return 1; | |
222 | ||
223 | /* Check if we are switching association toggle */ | |
224 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
225 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
226 | return 1; | |
227 | ||
228 | return 0; | |
229 | } | |
230 | ||
b481de9c | 231 | /** |
bb8c093b | 232 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 233 | * |
01ebd063 | 234 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
235 | * the active_rxon structure is updated with the new data. This |
236 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
237 | * a HW tune is required based on the RXON structure changes. | |
238 | */ | |
c79dd5b5 | 239 | static int iwl4965_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
240 | { |
241 | /* cast away the const for active_rxon in this function */ | |
c1adf9fb | 242 | struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
0795af57 | 243 | DECLARE_MAC_BUF(mac); |
43d59b32 EG |
244 | int ret; |
245 | bool new_assoc = | |
246 | !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK); | |
b481de9c | 247 | |
fee1247a | 248 | if (!iwl_is_alive(priv)) |
43d59b32 | 249 | return -EBUSY; |
b481de9c ZY |
250 | |
251 | /* always get timestamp with Rx frame */ | |
252 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
253 | ||
43d59b32 EG |
254 | ret = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
255 | if (ret) { | |
b481de9c ZY |
256 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); |
257 | return -EINVAL; | |
258 | } | |
259 | ||
260 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 261 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 262 | * and other flags for the current radio configuration. */ |
bb8c093b | 263 | if (!iwl4965_full_rxon_required(priv)) { |
43d59b32 EG |
264 | ret = iwl_send_rxon_assoc(priv); |
265 | if (ret) { | |
266 | IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret); | |
267 | return ret; | |
b481de9c ZY |
268 | } |
269 | ||
270 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
271 | return 0; |
272 | } | |
273 | ||
274 | /* station table will be cleared */ | |
275 | priv->assoc_station_added = 0; | |
276 | ||
b481de9c ZY |
277 | /* If we are currently associated and the new config requires |
278 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
279 | * we must clear the associated from the active configuration | |
280 | * before we apply the new config */ | |
43d59b32 | 281 | if (iwl_is_associated(priv) && new_assoc) { |
b481de9c ZY |
282 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); |
283 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
284 | ||
43d59b32 | 285 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, |
c1adf9fb | 286 | sizeof(struct iwl_rxon_cmd), |
b481de9c ZY |
287 | &priv->active_rxon); |
288 | ||
289 | /* If the mask clearing failed then we set | |
290 | * active_rxon back to what it was previously */ | |
43d59b32 | 291 | if (ret) { |
b481de9c | 292 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; |
43d59b32 EG |
293 | IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret); |
294 | return ret; | |
b481de9c | 295 | } |
b481de9c ZY |
296 | } |
297 | ||
298 | IWL_DEBUG_INFO("Sending RXON\n" | |
299 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
300 | "* channel = %d\n" | |
0795af57 | 301 | "* bssid = %s\n", |
43d59b32 | 302 | (new_assoc ? "" : "out"), |
b481de9c | 303 | le16_to_cpu(priv->staging_rxon.channel), |
0795af57 | 304 | print_mac(mac, priv->staging_rxon.bssid_addr)); |
b481de9c | 305 | |
099b40b7 | 306 | iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
43d59b32 EG |
307 | |
308 | /* Apply the new configuration | |
309 | * RXON unassoc clears the station table in uCode, send it before | |
310 | * we add the bcast station. If assoc bit is set, we will send RXON | |
311 | * after having added the bcast and bssid station. | |
312 | */ | |
313 | if (!new_assoc) { | |
314 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
c1adf9fb | 315 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); |
43d59b32 EG |
316 | if (ret) { |
317 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
318 | return ret; | |
319 | } | |
320 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
321 | } |
322 | ||
bf85ea4f | 323 | iwlcore_clear_stations_table(priv); |
556f8db7 | 324 | |
b481de9c ZY |
325 | if (!priv->error_recovering) |
326 | priv->start_calib = 0; | |
327 | ||
f0832f13 | 328 | iwl_init_sensitivity(priv); |
b481de9c | 329 | |
b481de9c ZY |
330 | /* If we issue a new RXON command which required a tune then we must |
331 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
43d59b32 EG |
332 | ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); |
333 | if (ret) { | |
334 | IWL_ERROR("Error sending TX power (%d)\n", ret); | |
335 | return ret; | |
b481de9c ZY |
336 | } |
337 | ||
338 | /* Add the broadcast address so we can send broadcast frames */ | |
4f40e4d9 | 339 | if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == |
43d59b32 | 340 | IWL_INVALID_STATION) { |
b481de9c ZY |
341 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); |
342 | return -EIO; | |
343 | } | |
344 | ||
345 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
346 | * add the IWL_AP_ID to the station rate table */ | |
43d59b32 | 347 | if (new_assoc && (priv->iw_mode == IEEE80211_IF_TYPE_STA)) { |
4f40e4d9 | 348 | if (iwl_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1) |
b481de9c ZY |
349 | == IWL_INVALID_STATION) { |
350 | IWL_ERROR("Error adding AP address for transmit.\n"); | |
351 | return -EIO; | |
352 | } | |
353 | priv->assoc_station_added = 1; | |
6974e363 EG |
354 | if (priv->default_wep_key && |
355 | iwl_send_static_wepkey_cmd(priv, 0)) | |
356 | IWL_ERROR("Could not send WEP static key.\n"); | |
43d59b32 EG |
357 | |
358 | /* Apply the new configuration | |
359 | * RXON assoc doesn't clear the station table in uCode, | |
360 | */ | |
361 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
362 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); | |
363 | if (ret) { | |
364 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
365 | return ret; | |
366 | } | |
367 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
368 | } |
369 | ||
370 | return 0; | |
371 | } | |
372 | ||
5da4b55f MA |
373 | void iwl4965_update_chain_flags(struct iwl_priv *priv) |
374 | { | |
375 | ||
c7de35cd | 376 | iwl_set_rxon_chain(priv); |
5da4b55f MA |
377 | iwl4965_commit_rxon(priv); |
378 | } | |
379 | ||
c79dd5b5 | 380 | static int iwl4965_send_bt_config(struct iwl_priv *priv) |
b481de9c | 381 | { |
bb8c093b | 382 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
383 | .flags = 3, |
384 | .lead_time = 0xAA, | |
385 | .max_kill = 1, | |
386 | .kill_ack_mask = 0, | |
387 | .kill_cts_mask = 0, | |
388 | }; | |
389 | ||
857485c0 | 390 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 391 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
392 | } |
393 | ||
fcab423d | 394 | static void iwl_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
395 | { |
396 | struct list_head *element; | |
397 | ||
398 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
399 | priv->frames_count); | |
400 | ||
401 | while (!list_empty(&priv->free_frames)) { | |
402 | element = priv->free_frames.next; | |
403 | list_del(element); | |
fcab423d | 404 | kfree(list_entry(element, struct iwl_frame, list)); |
b481de9c ZY |
405 | priv->frames_count--; |
406 | } | |
407 | ||
408 | if (priv->frames_count) { | |
409 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
410 | priv->frames_count); | |
411 | priv->frames_count = 0; | |
412 | } | |
413 | } | |
414 | ||
fcab423d | 415 | static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv) |
b481de9c | 416 | { |
fcab423d | 417 | struct iwl_frame *frame; |
b481de9c ZY |
418 | struct list_head *element; |
419 | if (list_empty(&priv->free_frames)) { | |
420 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
421 | if (!frame) { | |
422 | IWL_ERROR("Could not allocate frame!\n"); | |
423 | return NULL; | |
424 | } | |
425 | ||
426 | priv->frames_count++; | |
427 | return frame; | |
428 | } | |
429 | ||
430 | element = priv->free_frames.next; | |
431 | list_del(element); | |
fcab423d | 432 | return list_entry(element, struct iwl_frame, list); |
b481de9c ZY |
433 | } |
434 | ||
fcab423d | 435 | static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame) |
b481de9c ZY |
436 | { |
437 | memset(frame, 0, sizeof(*frame)); | |
438 | list_add(&frame->list, &priv->free_frames); | |
439 | } | |
440 | ||
c79dd5b5 | 441 | unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv, |
b481de9c ZY |
442 | struct ieee80211_hdr *hdr, |
443 | const u8 *dest, int left) | |
444 | { | |
445 | ||
3109ece1 | 446 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
b481de9c ZY |
447 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && |
448 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) | |
449 | return 0; | |
450 | ||
451 | if (priv->ibss_beacon->len > left) | |
452 | return 0; | |
453 | ||
454 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
455 | ||
456 | return priv->ibss_beacon->len; | |
457 | } | |
458 | ||
39e88504 | 459 | static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv) |
b481de9c | 460 | { |
39e88504 GC |
461 | int i; |
462 | int rate_mask; | |
463 | ||
464 | /* Set rate mask*/ | |
465 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
466 | rate_mask = priv->active_rate_basic & 0xF; | |
467 | else | |
468 | rate_mask = priv->active_rate_basic & 0xFF0; | |
b481de9c | 469 | |
39e88504 | 470 | /* Find lowest valid rate */ |
b481de9c | 471 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; |
1826dcc0 | 472 | i = iwl_rates[i].next_ieee) { |
b481de9c | 473 | if (rate_mask & (1 << i)) |
1826dcc0 | 474 | return iwl_rates[i].plcp; |
b481de9c ZY |
475 | } |
476 | ||
39e88504 GC |
477 | /* No valid rate was found. Assign the lowest one */ |
478 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
479 | return IWL_RATE_1M_PLCP; | |
480 | else | |
481 | return IWL_RATE_6M_PLCP; | |
b481de9c ZY |
482 | } |
483 | ||
c79dd5b5 | 484 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 485 | { |
fcab423d | 486 | struct iwl_frame *frame; |
b481de9c ZY |
487 | unsigned int frame_size; |
488 | int rc; | |
489 | u8 rate; | |
490 | ||
fcab423d | 491 | frame = iwl_get_free_frame(priv); |
b481de9c ZY |
492 | |
493 | if (!frame) { | |
494 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
495 | "command.\n"); | |
496 | return -ENOMEM; | |
497 | } | |
498 | ||
39e88504 | 499 | rate = iwl4965_rate_get_lowest_plcp(priv); |
b481de9c | 500 | |
bb8c093b | 501 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 502 | |
857485c0 | 503 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
504 | &frame->u.cmd[0]); |
505 | ||
fcab423d | 506 | iwl_free_frame(priv, frame); |
b481de9c ZY |
507 | |
508 | return rc; | |
509 | } | |
510 | ||
b481de9c ZY |
511 | /****************************************************************************** |
512 | * | |
513 | * Misc. internal state and helper functions | |
514 | * | |
515 | ******************************************************************************/ | |
b481de9c | 516 | |
d1141dfb EG |
517 | static void iwl4965_ht_conf(struct iwl_priv *priv, |
518 | struct ieee80211_bss_conf *bss_conf) | |
519 | { | |
520 | struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf; | |
521 | struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf; | |
522 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; | |
523 | ||
524 | IWL_DEBUG_MAC80211("enter: \n"); | |
525 | ||
526 | iwl_conf->is_ht = bss_conf->assoc_ht; | |
527 | ||
528 | if (!iwl_conf->is_ht) | |
529 | return; | |
530 | ||
531 | priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
532 | ||
533 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) | |
a9841013 | 534 | iwl_conf->sgf |= HT_SHORT_GI_20MHZ; |
d1141dfb | 535 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) |
a9841013 | 536 | iwl_conf->sgf |= HT_SHORT_GI_40MHZ; |
d1141dfb EG |
537 | |
538 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
539 | iwl_conf->max_amsdu_size = | |
540 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
541 | ||
542 | iwl_conf->supported_chan_width = | |
543 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH); | |
544 | iwl_conf->extension_chan_offset = | |
545 | ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET; | |
546 | /* If no above or below channel supplied disable FAT channel */ | |
963f5517 EG |
547 | if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE && |
548 | iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) { | |
549 | iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE; | |
d1141dfb | 550 | iwl_conf->supported_chan_width = 0; |
963f5517 | 551 | } |
d1141dfb EG |
552 | |
553 | iwl_conf->tx_mimo_ps_mode = | |
554 | (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
555 | memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16); | |
556 | ||
557 | iwl_conf->control_channel = ht_bss_conf->primary_channel; | |
558 | iwl_conf->tx_chan_width = | |
559 | !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH); | |
560 | iwl_conf->ht_protection = | |
561 | ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION; | |
562 | iwl_conf->non_GF_STA_present = | |
563 | !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT); | |
564 | ||
565 | IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel); | |
566 | IWL_DEBUG_MAC80211("leave\n"); | |
567 | } | |
568 | ||
b481de9c ZY |
569 | /* |
570 | * QoS support | |
571 | */ | |
c79dd5b5 | 572 | static int iwl4965_send_qos_params_command(struct iwl_priv *priv, |
bb8c093b | 573 | struct iwl4965_qosparam_cmd *qos) |
b481de9c ZY |
574 | { |
575 | ||
857485c0 | 576 | return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM, |
bb8c093b | 577 | sizeof(struct iwl4965_qosparam_cmd), qos); |
b481de9c ZY |
578 | } |
579 | ||
c79dd5b5 | 580 | static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c ZY |
581 | { |
582 | unsigned long flags; | |
583 | ||
b481de9c ZY |
584 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
585 | return; | |
586 | ||
587 | if (!priv->qos_data.qos_enable) | |
588 | return; | |
589 | ||
590 | spin_lock_irqsave(&priv->lock, flags); | |
591 | priv->qos_data.def_qos_parm.qos_flags = 0; | |
592 | ||
593 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
594 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
595 | priv->qos_data.def_qos_parm.qos_flags |= | |
596 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
597 | if (priv->qos_data.qos_active) |
598 | priv->qos_data.def_qos_parm.qos_flags |= | |
599 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
600 | ||
fd105e79 | 601 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 602 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
f1f1f5c7 | 603 | |
b481de9c ZY |
604 | spin_unlock_irqrestore(&priv->lock, flags); |
605 | ||
3109ece1 | 606 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
607 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
608 | priv->qos_data.qos_active, | |
609 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 610 | |
bb8c093b | 611 | iwl4965_send_qos_params_command(priv, |
b481de9c ZY |
612 | &(priv->qos_data.def_qos_parm)); |
613 | } | |
614 | } | |
615 | ||
c79dd5b5 | 616 | int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
617 | { |
618 | /* Filter incoming packets to determine if they are targeted toward | |
619 | * this network, discarding packets coming from ourselves */ | |
620 | switch (priv->iw_mode) { | |
621 | case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */ | |
622 | /* packets from our adapter are dropped (echo) */ | |
623 | if (!compare_ether_addr(header->addr2, priv->mac_addr)) | |
624 | return 0; | |
625 | /* {broad,multi}cast packets to our IBSS go through */ | |
626 | if (is_multicast_ether_addr(header->addr1)) | |
627 | return !compare_ether_addr(header->addr3, priv->bssid); | |
628 | /* packets to our adapter go through */ | |
629 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
630 | case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */ | |
631 | /* packets from our adapter are dropped (echo) */ | |
632 | if (!compare_ether_addr(header->addr3, priv->mac_addr)) | |
633 | return 0; | |
634 | /* {broad,multi}cast packets to our BSS go through */ | |
635 | if (is_multicast_ether_addr(header->addr1)) | |
636 | return !compare_ether_addr(header->addr2, priv->bssid); | |
637 | /* packets to our adapter go through */ | |
638 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
69dc5d9d TW |
639 | default: |
640 | break; | |
b481de9c ZY |
641 | } |
642 | ||
643 | return 1; | |
644 | } | |
645 | ||
c79dd5b5 | 646 | static void iwl4965_sequence_reset(struct iwl_priv *priv) |
b481de9c ZY |
647 | { |
648 | /* Reset ieee stats */ | |
649 | ||
650 | /* We don't reset the net_device_stats (ieee->stats) on | |
651 | * re-association */ | |
652 | ||
653 | priv->last_seq_num = -1; | |
654 | priv->last_frag_num = -1; | |
655 | priv->last_packet_time = 0; | |
656 | ||
2a421b91 | 657 | iwl_scan_cancel(priv); |
b481de9c ZY |
658 | } |
659 | ||
660 | #define MAX_UCODE_BEACON_INTERVAL 4096 | |
661 | #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA) | |
662 | ||
bb8c093b | 663 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
664 | { |
665 | u16 new_val = 0; | |
666 | u16 beacon_factor = 0; | |
667 | ||
668 | beacon_factor = | |
669 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
670 | / MAX_UCODE_BEACON_INTERVAL; | |
671 | new_val = beacon_val / beacon_factor; | |
672 | ||
673 | return cpu_to_le16(new_val); | |
674 | } | |
675 | ||
c79dd5b5 | 676 | static void iwl4965_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c ZY |
677 | { |
678 | u64 interval_tm_unit; | |
679 | u64 tsf, result; | |
680 | unsigned long flags; | |
681 | struct ieee80211_conf *conf = NULL; | |
682 | u16 beacon_int = 0; | |
683 | ||
684 | conf = ieee80211_get_hw_conf(priv->hw); | |
685 | ||
686 | spin_lock_irqsave(&priv->lock, flags); | |
3109ece1 TW |
687 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32); |
688 | priv->rxon_timing.timestamp.dw[0] = | |
689 | cpu_to_le32(priv->timestamp & 0xFFFFFFFF); | |
b481de9c ZY |
690 | |
691 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; | |
692 | ||
3109ece1 | 693 | tsf = priv->timestamp; |
b481de9c ZY |
694 | |
695 | beacon_int = priv->beacon_int; | |
696 | spin_unlock_irqrestore(&priv->lock, flags); | |
697 | ||
698 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
699 | if (beacon_int == 0) { | |
700 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
701 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
702 | } else { | |
703 | priv->rxon_timing.beacon_interval = | |
704 | cpu_to_le16(beacon_int); | |
705 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 706 | iwl4965_adjust_beacon_interval( |
b481de9c ZY |
707 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
708 | } | |
709 | ||
710 | priv->rxon_timing.atim_window = 0; | |
711 | } else { | |
712 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 713 | iwl4965_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
714 | /* TODO: we need to get atim_window from upper stack |
715 | * for now we set to 0 */ | |
716 | priv->rxon_timing.atim_window = 0; | |
717 | } | |
718 | ||
719 | interval_tm_unit = | |
720 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
721 | result = do_div(tsf, interval_tm_unit); | |
722 | priv->rxon_timing.beacon_init_val = | |
723 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
724 | ||
725 | IWL_DEBUG_ASSOC | |
726 | ("beacon interval %d beacon timer %d beacon tim %d\n", | |
727 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
728 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
729 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
730 | } | |
731 | ||
82a66bbb TW |
732 | static void iwl_set_flags_for_band(struct iwl_priv *priv, |
733 | enum ieee80211_band band) | |
b481de9c | 734 | { |
8318d78a | 735 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
736 | priv->staging_rxon.flags &= |
737 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
738 | | RXON_FLG_CCK_MSK); | |
739 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
740 | } else { | |
508e32e1 | 741 | /* Copied from iwl4965_post_associate() */ |
b481de9c ZY |
742 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
743 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
744 | else | |
745 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
746 | ||
747 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
748 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
749 | ||
750 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
751 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
752 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
753 | } | |
754 | } | |
755 | ||
756 | /* | |
01ebd063 | 757 | * initialize rxon structure with default values from eeprom |
b481de9c | 758 | */ |
c79dd5b5 | 759 | static void iwl4965_connection_init_rx_config(struct iwl_priv *priv) |
b481de9c | 760 | { |
bf85ea4f | 761 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
762 | |
763 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
764 | ||
765 | switch (priv->iw_mode) { | |
766 | case IEEE80211_IF_TYPE_AP: | |
767 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; | |
768 | break; | |
769 | ||
770 | case IEEE80211_IF_TYPE_STA: | |
771 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; | |
772 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
773 | break; | |
774 | ||
775 | case IEEE80211_IF_TYPE_IBSS: | |
776 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; | |
777 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
778 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
779 | RXON_FILTER_ACCEPT_GRP_MSK; | |
780 | break; | |
781 | ||
782 | case IEEE80211_IF_TYPE_MNTR: | |
783 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; | |
784 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
785 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
786 | break; | |
69dc5d9d TW |
787 | default: |
788 | IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode); | |
789 | break; | |
b481de9c ZY |
790 | } |
791 | ||
792 | #if 0 | |
793 | /* TODO: Figure out when short_preamble would be set and cache from | |
794 | * that */ | |
795 | if (!hw_to_local(priv->hw)->short_preamble) | |
796 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
797 | else | |
798 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
799 | #endif | |
800 | ||
8622e705 | 801 | ch_info = iwl_get_channel_info(priv, priv->band, |
b481de9c ZY |
802 | le16_to_cpu(priv->staging_rxon.channel)); |
803 | ||
804 | if (!ch_info) | |
805 | ch_info = &priv->channel_info[0]; | |
806 | ||
807 | /* | |
808 | * in some case A channels are all non IBSS | |
809 | * in this case force B/G channel | |
810 | */ | |
811 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | |
812 | !(is_channel_ibss(ch_info))) | |
813 | ch_info = &priv->channel_info[0]; | |
814 | ||
815 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 816 | priv->band = ch_info->band; |
b481de9c | 817 | |
82a66bbb | 818 | iwl_set_flags_for_band(priv, priv->band); |
b481de9c ZY |
819 | |
820 | priv->staging_rxon.ofdm_basic_rates = | |
821 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
822 | priv->staging_rxon.cck_basic_rates = | |
823 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
824 | ||
825 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
826 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
827 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
828 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
829 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
830 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
c7de35cd | 831 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
832 | } |
833 | ||
c79dd5b5 | 834 | static int iwl4965_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 835 | { |
b481de9c ZY |
836 | priv->iw_mode = mode; |
837 | ||
398f9e76 AK |
838 | /* init channel/phymode to values given at driver init */ |
839 | iwl_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6); | |
840 | ||
bb8c093b | 841 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
842 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
843 | ||
bf85ea4f | 844 | iwlcore_clear_stations_table(priv); |
b481de9c | 845 | |
fde3571f | 846 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 847 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
848 | return -EAGAIN; |
849 | ||
850 | cancel_delayed_work(&priv->scan_check); | |
2a421b91 | 851 | if (iwl_scan_cancel_timeout(priv, 100)) { |
fde3571f MA |
852 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); |
853 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
854 | return -EAGAIN; | |
855 | } | |
856 | ||
bb8c093b | 857 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
858 | |
859 | return 0; | |
860 | } | |
861 | ||
c79dd5b5 | 862 | static void iwl4965_set_rate(struct iwl_priv *priv) |
b481de9c | 863 | { |
8318d78a | 864 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
865 | struct ieee80211_rate *rate; |
866 | int i; | |
867 | ||
d1141dfb | 868 | hw = iwl_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
869 | if (!hw) { |
870 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
871 | return; | |
872 | } | |
b481de9c ZY |
873 | |
874 | priv->active_rate = 0; | |
875 | priv->active_rate_basic = 0; | |
876 | ||
8318d78a JB |
877 | for (i = 0; i < hw->n_bitrates; i++) { |
878 | rate = &(hw->bitrates[i]); | |
879 | if (rate->hw_value < IWL_RATE_COUNT) | |
880 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
881 | } |
882 | ||
883 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
884 | priv->active_rate, priv->active_rate_basic); | |
885 | ||
886 | /* | |
887 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
888 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
889 | * OFDM | |
890 | */ | |
891 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
892 | priv->staging_rxon.cck_basic_rates = | |
893 | ((priv->active_rate_basic & | |
894 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
895 | else | |
896 | priv->staging_rxon.cck_basic_rates = | |
897 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
898 | ||
899 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
900 | priv->staging_rxon.ofdm_basic_rates = | |
901 | ((priv->active_rate_basic & | |
902 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
903 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
904 | else | |
905 | priv->staging_rxon.ofdm_basic_rates = | |
906 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
907 | } | |
908 | ||
b481de9c ZY |
909 | #define IWL_PACKET_RETRY_TIME HZ |
910 | ||
c79dd5b5 | 911 | int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
912 | { |
913 | u16 sc = le16_to_cpu(header->seq_ctrl); | |
914 | u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4; | |
915 | u16 frag = sc & IEEE80211_SCTL_FRAG; | |
916 | u16 *last_seq, *last_frag; | |
917 | unsigned long *last_time; | |
918 | ||
919 | switch (priv->iw_mode) { | |
920 | case IEEE80211_IF_TYPE_IBSS:{ | |
921 | struct list_head *p; | |
bb8c093b | 922 | struct iwl4965_ibss_seq *entry = NULL; |
b481de9c ZY |
923 | u8 *mac = header->addr2; |
924 | int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1); | |
925 | ||
926 | __list_for_each(p, &priv->ibss_mac_hash[index]) { | |
bb8c093b | 927 | entry = list_entry(p, struct iwl4965_ibss_seq, list); |
b481de9c ZY |
928 | if (!compare_ether_addr(entry->mac, mac)) |
929 | break; | |
930 | } | |
931 | if (p == &priv->ibss_mac_hash[index]) { | |
932 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
933 | if (!entry) { | |
bc434dd2 | 934 | IWL_ERROR("Cannot malloc new mac entry\n"); |
b481de9c ZY |
935 | return 0; |
936 | } | |
937 | memcpy(entry->mac, mac, ETH_ALEN); | |
938 | entry->seq_num = seq; | |
939 | entry->frag_num = frag; | |
940 | entry->packet_time = jiffies; | |
bc434dd2 | 941 | list_add(&entry->list, &priv->ibss_mac_hash[index]); |
b481de9c ZY |
942 | return 0; |
943 | } | |
944 | last_seq = &entry->seq_num; | |
945 | last_frag = &entry->frag_num; | |
946 | last_time = &entry->packet_time; | |
947 | break; | |
948 | } | |
949 | case IEEE80211_IF_TYPE_STA: | |
950 | last_seq = &priv->last_seq_num; | |
951 | last_frag = &priv->last_frag_num; | |
952 | last_time = &priv->last_packet_time; | |
953 | break; | |
954 | default: | |
955 | return 0; | |
956 | } | |
957 | if ((*last_seq == seq) && | |
958 | time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) { | |
959 | if (*last_frag == frag) | |
960 | goto drop; | |
961 | if (*last_frag + 1 != frag) | |
962 | /* out-of-order fragment */ | |
963 | goto drop; | |
964 | } else | |
965 | *last_seq = seq; | |
966 | ||
967 | *last_frag = frag; | |
968 | *last_time = jiffies; | |
969 | return 0; | |
970 | ||
971 | drop: | |
972 | return 1; | |
973 | } | |
974 | ||
c8b0e6e1 | 975 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
976 | |
977 | #include "iwl-spectrum.h" | |
978 | ||
979 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
980 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
981 | #define TIME_UNIT 1024 | |
982 | ||
983 | /* | |
984 | * extended beacon time format | |
985 | * time in usec will be changed into a 32-bit value in 8:24 format | |
986 | * the high 1 byte is the beacon counts | |
987 | * the lower 3 bytes is the time in usec within one beacon interval | |
988 | */ | |
989 | ||
bb8c093b | 990 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
991 | { |
992 | u32 quot; | |
993 | u32 rem; | |
994 | u32 interval = beacon_interval * 1024; | |
995 | ||
996 | if (!interval || !usec) | |
997 | return 0; | |
998 | ||
999 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
1000 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
1001 | ||
1002 | return (quot << 24) + rem; | |
1003 | } | |
1004 | ||
1005 | /* base is usually what we get from ucode with each received frame, | |
1006 | * the same as HW timer counter counting down | |
1007 | */ | |
1008 | ||
bb8c093b | 1009 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
1010 | { |
1011 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
1012 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
1013 | u32 interval = beacon_interval * TIME_UNIT; | |
1014 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
1015 | (addon & BEACON_TIME_MASK_HIGH); | |
1016 | ||
1017 | if (base_low > addon_low) | |
1018 | res += base_low - addon_low; | |
1019 | else if (base_low < addon_low) { | |
1020 | res += interval + base_low - addon_low; | |
1021 | res += (1 << 24); | |
1022 | } else | |
1023 | res += (1 << 24); | |
1024 | ||
1025 | return cpu_to_le32(res); | |
1026 | } | |
1027 | ||
c79dd5b5 | 1028 | static int iwl4965_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
1029 | struct ieee80211_measurement_params *params, |
1030 | u8 type) | |
1031 | { | |
bb8c093b | 1032 | struct iwl4965_spectrum_cmd spectrum; |
db11d634 | 1033 | struct iwl_rx_packet *res; |
857485c0 | 1034 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
1035 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
1036 | .data = (void *)&spectrum, | |
1037 | .meta.flags = CMD_WANT_SKB, | |
1038 | }; | |
1039 | u32 add_time = le64_to_cpu(params->start_time); | |
1040 | int rc; | |
1041 | int spectrum_resp_status; | |
1042 | int duration = le16_to_cpu(params->duration); | |
1043 | ||
3109ece1 | 1044 | if (iwl_is_associated(priv)) |
b481de9c | 1045 | add_time = |
bb8c093b | 1046 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
1047 | le64_to_cpu(params->start_time) - priv->last_tsf, |
1048 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
1049 | ||
1050 | memset(&spectrum, 0, sizeof(spectrum)); | |
1051 | ||
1052 | spectrum.channel_count = cpu_to_le16(1); | |
1053 | spectrum.flags = | |
1054 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
1055 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
1056 | cmd.len = sizeof(spectrum); | |
1057 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
1058 | ||
3109ece1 | 1059 | if (iwl_is_associated(priv)) |
b481de9c | 1060 | spectrum.start_time = |
bb8c093b | 1061 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
1062 | add_time, |
1063 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
1064 | else | |
1065 | spectrum.start_time = 0; | |
1066 | ||
1067 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
1068 | spectrum.channels[0].channel = params->channel; | |
1069 | spectrum.channels[0].type = type; | |
1070 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
1071 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
1072 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
1073 | ||
857485c0 | 1074 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
1075 | if (rc) |
1076 | return rc; | |
1077 | ||
db11d634 | 1078 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
1079 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
1080 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
1081 | rc = -EIO; | |
1082 | } | |
1083 | ||
1084 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
1085 | switch (spectrum_resp_status) { | |
1086 | case 0: /* Command will be handled */ | |
1087 | if (res->u.spectrum.id != 0xff) { | |
1088 | IWL_DEBUG_INFO | |
1089 | ("Replaced existing measurement: %d\n", | |
1090 | res->u.spectrum.id); | |
1091 | priv->measurement_status &= ~MEASUREMENT_READY; | |
1092 | } | |
1093 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
1094 | rc = 0; | |
1095 | break; | |
1096 | ||
1097 | case 1: /* Command will not be handled */ | |
1098 | rc = -EAGAIN; | |
1099 | break; | |
1100 | } | |
1101 | ||
1102 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1103 | ||
1104 | return rc; | |
1105 | } | |
1106 | #endif | |
1107 | ||
b481de9c ZY |
1108 | /****************************************************************************** |
1109 | * | |
1110 | * Generic RX handler implementations | |
1111 | * | |
1112 | ******************************************************************************/ | |
885ba202 TW |
1113 | static void iwl_rx_reply_alive(struct iwl_priv *priv, |
1114 | struct iwl_rx_mem_buffer *rxb) | |
b481de9c | 1115 | { |
db11d634 | 1116 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
885ba202 | 1117 | struct iwl_alive_resp *palive; |
b481de9c ZY |
1118 | struct delayed_work *pwork; |
1119 | ||
1120 | palive = &pkt->u.alive_frame; | |
1121 | ||
1122 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
1123 | "0x%01X 0x%01X\n", | |
1124 | palive->is_valid, palive->ver_type, | |
1125 | palive->ver_subtype); | |
1126 | ||
1127 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
1128 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
1129 | memcpy(&priv->card_alive_init, | |
1130 | &pkt->u.alive_frame, | |
885ba202 | 1131 | sizeof(struct iwl_init_alive_resp)); |
b481de9c ZY |
1132 | pwork = &priv->init_alive_start; |
1133 | } else { | |
1134 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
1135 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
885ba202 | 1136 | sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
1137 | pwork = &priv->alive_start; |
1138 | } | |
1139 | ||
1140 | /* We delay the ALIVE response by 5ms to | |
1141 | * give the HW RF Kill time to activate... */ | |
1142 | if (palive->is_valid == UCODE_VALID_OK) | |
1143 | queue_delayed_work(priv->workqueue, pwork, | |
1144 | msecs_to_jiffies(5)); | |
1145 | else | |
1146 | IWL_WARNING("uCode did not respond OK.\n"); | |
1147 | } | |
1148 | ||
c79dd5b5 | 1149 | static void iwl4965_rx_reply_error(struct iwl_priv *priv, |
a55360e4 | 1150 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1151 | { |
db11d634 | 1152 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1153 | |
1154 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
1155 | "seq 0x%04X ser 0x%08X\n", | |
1156 | le32_to_cpu(pkt->u.err_resp.error_type), | |
1157 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
1158 | pkt->u.err_resp.cmd_id, | |
1159 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
1160 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
1161 | } | |
1162 | ||
1163 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1164 | ||
a55360e4 | 1165 | static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1166 | { |
db11d634 | 1167 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
c1adf9fb | 1168 | struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon; |
bb8c093b | 1169 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); |
b481de9c ZY |
1170 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
1171 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
1172 | rxon->channel = csa->channel; | |
1173 | priv->staging_rxon.channel = csa->channel; | |
1174 | } | |
1175 | ||
c79dd5b5 | 1176 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
a55360e4 | 1177 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1178 | { |
c8b0e6e1 | 1179 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
db11d634 | 1180 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1181 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); |
b481de9c ZY |
1182 | |
1183 | if (!report->state) { | |
f3d67999 EK |
1184 | IWL_DEBUG(IWL_DL_11H, |
1185 | "Spectrum Measure Notification: Start\n"); | |
b481de9c ZY |
1186 | return; |
1187 | } | |
1188 | ||
1189 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
1190 | priv->measurement_status |= MEASUREMENT_READY; | |
1191 | #endif | |
1192 | } | |
1193 | ||
c79dd5b5 | 1194 | static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv, |
a55360e4 | 1195 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1196 | { |
0a6857e7 | 1197 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1198 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1199 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); |
b481de9c ZY |
1200 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
1201 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
1202 | #endif | |
1203 | } | |
1204 | ||
c79dd5b5 | 1205 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
a55360e4 | 1206 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1207 | { |
db11d634 | 1208 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1209 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
1210 | "notification for %s:\n", | |
1211 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bf403db8 | 1212 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
1213 | } |
1214 | ||
bb8c093b | 1215 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 1216 | { |
c79dd5b5 TW |
1217 | struct iwl_priv *priv = |
1218 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
1219 | struct sk_buff *beacon; |
1220 | ||
1221 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
e039fa4a | 1222 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
b481de9c ZY |
1223 | |
1224 | if (!beacon) { | |
1225 | IWL_ERROR("update beacon failed\n"); | |
1226 | return; | |
1227 | } | |
1228 | ||
1229 | mutex_lock(&priv->mutex); | |
1230 | /* new beacon skb is allocated every time; dispose previous.*/ | |
1231 | if (priv->ibss_beacon) | |
1232 | dev_kfree_skb(priv->ibss_beacon); | |
1233 | ||
1234 | priv->ibss_beacon = beacon; | |
1235 | mutex_unlock(&priv->mutex); | |
1236 | ||
bb8c093b | 1237 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
1238 | } |
1239 | ||
4e39317d EG |
1240 | /** |
1241 | * iwl4965_bg_statistics_periodic - Timer callback to queue statistics | |
1242 | * | |
1243 | * This callback is provided in order to send a statistics request. | |
1244 | * | |
1245 | * This timer function is continually reset to execute within | |
1246 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
1247 | * was received. We need to ensure we receive the statistics in order | |
1248 | * to update the temperature used for calibrating the TXPOWER. | |
1249 | */ | |
1250 | static void iwl4965_bg_statistics_periodic(unsigned long data) | |
1251 | { | |
1252 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
1253 | ||
1254 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
1255 | return; | |
1256 | ||
1257 | iwl_send_statistics_request(priv, CMD_ASYNC); | |
1258 | } | |
1259 | ||
c79dd5b5 | 1260 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, |
a55360e4 | 1261 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1262 | { |
0a6857e7 | 1263 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1264 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1265 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); |
e7d326ac | 1266 | u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
b481de9c ZY |
1267 | |
1268 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
1269 | "tsf %d %d rate %d\n", | |
25a6572c | 1270 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, |
b481de9c ZY |
1271 | beacon->beacon_notify_hdr.failure_frame, |
1272 | le32_to_cpu(beacon->ibss_mgr_status), | |
1273 | le32_to_cpu(beacon->high_tsf), | |
1274 | le32_to_cpu(beacon->low_tsf), rate); | |
1275 | #endif | |
1276 | ||
1277 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && | |
1278 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) | |
1279 | queue_work(priv->workqueue, &priv->beacon_update); | |
1280 | } | |
1281 | ||
b481de9c ZY |
1282 | /* Handle notification from uCode that card's power state is changing |
1283 | * due to software, hardware, or critical temperature RFKILL */ | |
c79dd5b5 | 1284 | static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, |
a55360e4 | 1285 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1286 | { |
db11d634 | 1287 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1288 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
1289 | unsigned long status = priv->status; | |
1290 | ||
1291 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
1292 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
1293 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
1294 | ||
1295 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
1296 | RF_CARD_DISABLED)) { | |
1297 | ||
3395f6e9 | 1298 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
1299 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
1300 | ||
3395f6e9 TW |
1301 | if (!iwl_grab_nic_access(priv)) { |
1302 | iwl_write_direct32( | |
b481de9c ZY |
1303 | priv, HBUS_TARG_MBX_C, |
1304 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1305 | ||
3395f6e9 | 1306 | iwl_release_nic_access(priv); |
b481de9c ZY |
1307 | } |
1308 | ||
1309 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 1310 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 1311 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
1312 | if (!iwl_grab_nic_access(priv)) { |
1313 | iwl_write_direct32( | |
b481de9c ZY |
1314 | priv, HBUS_TARG_MBX_C, |
1315 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1316 | ||
3395f6e9 | 1317 | iwl_release_nic_access(priv); |
b481de9c ZY |
1318 | } |
1319 | } | |
1320 | ||
1321 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 1322 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 1323 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
1324 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
1325 | if (!iwl_grab_nic_access(priv)) | |
1326 | iwl_release_nic_access(priv); | |
b481de9c ZY |
1327 | } |
1328 | } | |
1329 | ||
1330 | if (flags & HW_CARD_DISABLED) | |
1331 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
1332 | else | |
1333 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
1334 | ||
1335 | ||
1336 | if (flags & SW_CARD_DISABLED) | |
1337 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
1338 | else | |
1339 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
1340 | ||
1341 | if (!(flags & RXON_CARD_DISABLED)) | |
2a421b91 | 1342 | iwl_scan_cancel(priv); |
b481de9c ZY |
1343 | |
1344 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
1345 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
1346 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
1347 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
1348 | queue_work(priv->workqueue, &priv->rf_kill); | |
1349 | else | |
1350 | wake_up_interruptible(&priv->wait_command_queue); | |
1351 | } | |
1352 | ||
37a44211 RR |
1353 | /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD). |
1354 | * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */ | |
1355 | static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv, | |
1356 | struct iwl_rx_mem_buffer *rxb) | |
1357 | { | |
1358 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; | |
1359 | priv->last_phy_res[0] = 1; | |
1360 | memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]), | |
1361 | sizeof(struct iwl4965_rx_phy_res)); | |
1362 | } | |
1363 | ||
b481de9c | 1364 | /** |
bb8c093b | 1365 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
1366 | * |
1367 | * Setup the RX handlers for each of the reply types sent from the uCode | |
1368 | * to the host. | |
1369 | * | |
1370 | * This function chains into the hardware specific files for them to setup | |
1371 | * any hardware specific handlers as well. | |
1372 | */ | |
c79dd5b5 | 1373 | static void iwl4965_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 1374 | { |
885ba202 | 1375 | priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive; |
bb8c093b CH |
1376 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; |
1377 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 1378 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
1379 | iwl4965_rx_spectrum_measure_notif; |
1380 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 1381 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
1382 | iwl4965_rx_pm_debug_statistics_notif; |
1383 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 1384 | |
9fbab516 BC |
1385 | /* |
1386 | * The same handler is used for both the REPLY to a discrete | |
1387 | * statistics request from the host as well as for the periodic | |
1388 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 1389 | */ |
bb8c093b CH |
1390 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics; |
1391 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics; | |
2a421b91 TW |
1392 | |
1393 | iwl_setup_rx_scan_handlers(priv); | |
1394 | ||
37a44211 | 1395 | /* status change handler */ |
bb8c093b | 1396 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; |
b481de9c | 1397 | |
c1354754 TW |
1398 | priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] = |
1399 | iwl_rx_missed_beacon_notif; | |
37a44211 RR |
1400 | /* Rx handlers */ |
1401 | priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy; | |
1402 | priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx; | |
9fbab516 | 1403 | /* Set up hardware specific Rx handlers */ |
d4789efe | 1404 | priv->cfg->ops->lib->rx_handler_setup(priv); |
b481de9c ZY |
1405 | } |
1406 | ||
5c0eef96 MA |
1407 | /* |
1408 | * this should be called while priv->lock is locked | |
1409 | */ | |
a55360e4 | 1410 | static void __iwl_rx_replenish(struct iwl_priv *priv) |
b481de9c | 1411 | { |
a55360e4 TW |
1412 | iwl_rx_allocate(priv); |
1413 | iwl_rx_queue_restock(priv); | |
b481de9c ZY |
1414 | } |
1415 | ||
b481de9c ZY |
1416 | |
1417 | /** | |
a55360e4 | 1418 | * iwl_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
1419 | * |
1420 | * Uses the priv->rx_handlers callback function array to invoke | |
1421 | * the appropriate handlers, including command responses, | |
1422 | * frame-received notifications, and other notifications. | |
1423 | */ | |
a55360e4 | 1424 | void iwl_rx_handle(struct iwl_priv *priv) |
b481de9c | 1425 | { |
a55360e4 | 1426 | struct iwl_rx_mem_buffer *rxb; |
db11d634 | 1427 | struct iwl_rx_packet *pkt; |
a55360e4 | 1428 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
1429 | u32 r, i; |
1430 | int reclaim; | |
1431 | unsigned long flags; | |
5c0eef96 | 1432 | u8 fill_rx = 0; |
d68ab680 | 1433 | u32 count = 8; |
b481de9c | 1434 | |
6440adb5 CB |
1435 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
1436 | * buffer that the driver may process (last buffer filled by ucode). */ | |
d67f5489 | 1437 | r = priv->cfg->ops->lib->shared_mem_rx_idx(priv); |
b481de9c ZY |
1438 | i = rxq->read; |
1439 | ||
1440 | /* Rx interrupt, but nothing sent from uCode */ | |
1441 | if (i == r) | |
f3d67999 | 1442 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i); |
b481de9c | 1443 | |
a55360e4 | 1444 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 MA |
1445 | fill_rx = 1; |
1446 | ||
b481de9c ZY |
1447 | while (i != r) { |
1448 | rxb = rxq->queue[i]; | |
1449 | ||
9fbab516 | 1450 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
1451 | * then a bug has been introduced in the queue refilling |
1452 | * routines -- catch it here */ | |
1453 | BUG_ON(rxb == NULL); | |
1454 | ||
1455 | rxq->queue[i] = NULL; | |
1456 | ||
1457 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1458 | priv->hw_params.rx_buf_size, |
b481de9c | 1459 | PCI_DMA_FROMDEVICE); |
db11d634 | 1460 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1461 | |
1462 | /* Reclaim a command buffer only if this packet is a response | |
1463 | * to a (driver-originated) command. | |
1464 | * If the packet (e.g. Rx frame) originated from uCode, | |
1465 | * there is no command buffer to reclaim. | |
1466 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
1467 | * but apparently a few don't get set; catch them here. */ | |
1468 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
1469 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 1470 | (pkt->hdr.cmd != REPLY_RX) && |
cfe01709 | 1471 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
1472 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
1473 | (pkt->hdr.cmd != REPLY_TX); | |
1474 | ||
1475 | /* Based on type of command response or notification, | |
1476 | * handle those that need handling via function in | |
bb8c093b | 1477 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c | 1478 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
f3d67999 EK |
1479 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r, |
1480 | i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
b481de9c ZY |
1481 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); |
1482 | } else { | |
1483 | /* No handling needed */ | |
f3d67999 | 1484 | IWL_DEBUG(IWL_DL_RX, |
b481de9c ZY |
1485 | "r %d i %d No handler needed for %s, 0x%02x\n", |
1486 | r, i, get_cmd_string(pkt->hdr.cmd), | |
1487 | pkt->hdr.cmd); | |
1488 | } | |
1489 | ||
1490 | if (reclaim) { | |
9fbab516 | 1491 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 1492 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
1493 | * as we reclaim the driver command queue */ |
1494 | if (rxb && rxb->skb) | |
17b88929 | 1495 | iwl_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
1496 | else |
1497 | IWL_WARNING("Claim null rxb?\n"); | |
1498 | } | |
1499 | ||
1500 | /* For now we just don't re-use anything. We can tweak this | |
1501 | * later to try and re-use notification packets and SKBs that | |
1502 | * fail to Rx correctly */ | |
1503 | if (rxb->skb != NULL) { | |
1504 | priv->alloc_rxb_skb--; | |
1505 | dev_kfree_skb_any(rxb->skb); | |
1506 | rxb->skb = NULL; | |
1507 | } | |
1508 | ||
1509 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1510 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 1511 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
1512 | spin_lock_irqsave(&rxq->lock, flags); |
1513 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
1514 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1515 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
1516 | /* If there are a lot of unused frames, |
1517 | * restock the Rx queue so ucode wont assert. */ | |
1518 | if (fill_rx) { | |
1519 | count++; | |
1520 | if (count >= 8) { | |
1521 | priv->rxq.read = i; | |
a55360e4 | 1522 | __iwl_rx_replenish(priv); |
5c0eef96 MA |
1523 | count = 0; |
1524 | } | |
1525 | } | |
b481de9c ZY |
1526 | } |
1527 | ||
1528 | /* Backtrack one entry */ | |
1529 | priv->rxq.read = i; | |
a55360e4 TW |
1530 | iwl_rx_queue_restock(priv); |
1531 | } | |
a55360e4 TW |
1532 | |
1533 | #define PERFECT_RSSI (-20) /* dBm */ | |
1534 | #define WORST_RSSI (-95) /* dBm */ | |
1535 | #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI) | |
1536 | ||
1537 | /* Calculate an indication of rx signal quality (a percentage, not dBm!). | |
1538 | * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info | |
1539 | * about formulas used below. */ | |
1540 | int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm) | |
1541 | { | |
1542 | int sig_qual; | |
1543 | int degradation = PERFECT_RSSI - rssi_dbm; | |
1544 | ||
1545 | /* If we get a noise measurement, use signal-to-noise ratio (SNR) | |
1546 | * as indicator; formula is (signal dbm - noise dbm). | |
1547 | * SNR at or above 40 is a great signal (100%). | |
1548 | * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator. | |
1549 | * Weakest usable signal is usually 10 - 15 dB SNR. */ | |
1550 | if (noise_dbm) { | |
1551 | if (rssi_dbm - noise_dbm >= 40) | |
1552 | return 100; | |
1553 | else if (rssi_dbm < noise_dbm) | |
1554 | return 0; | |
1555 | sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2; | |
1556 | ||
1557 | /* Else use just the signal level. | |
1558 | * This formula is a least squares fit of data points collected and | |
1559 | * compared with a reference system that had a percentage (%) display | |
1560 | * for signal quality. */ | |
1561 | } else | |
1562 | sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation * | |
1563 | (15 * RSSI_RANGE + 62 * degradation)) / | |
1564 | (RSSI_RANGE * RSSI_RANGE); | |
1565 | ||
1566 | if (sig_qual > 100) | |
1567 | sig_qual = 100; | |
1568 | else if (sig_qual < 1) | |
1569 | sig_qual = 0; | |
1570 | ||
1571 | return sig_qual; | |
b481de9c ZY |
1572 | } |
1573 | ||
0a6857e7 | 1574 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1575 | static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv) |
b481de9c | 1576 | { |
c1adf9fb | 1577 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
0795af57 JP |
1578 | DECLARE_MAC_BUF(mac); |
1579 | ||
b481de9c | 1580 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bf403db8 | 1581 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
1582 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
1583 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
1584 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
1585 | le32_to_cpu(rxon->filter_flags)); | |
1586 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
1587 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
1588 | rxon->ofdm_basic_rates); | |
1589 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
0795af57 JP |
1590 | IWL_DEBUG_RADIO("u8[6] node_addr: %s\n", |
1591 | print_mac(mac, rxon->node_addr)); | |
1592 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n", | |
1593 | print_mac(mac, rxon->bssid_addr)); | |
b481de9c ZY |
1594 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
1595 | } | |
1596 | #endif | |
1597 | ||
c79dd5b5 | 1598 | static void iwl4965_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1599 | { |
1600 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
1601 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
3395f6e9 | 1602 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
1603 | } |
1604 | ||
0359facc MA |
1605 | /* call this function to flush any scheduled tasklet */ |
1606 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
1607 | { | |
1608 | /* wait to make sure we flush pedding tasklet*/ | |
1609 | synchronize_irq(priv->pci_dev->irq); | |
1610 | tasklet_kill(&priv->irq_tasklet); | |
1611 | } | |
1612 | ||
c79dd5b5 | 1613 | static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1614 | { |
1615 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
1616 | ||
1617 | /* disable interrupts from uCode/NIC to host */ | |
3395f6e9 | 1618 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
1619 | |
1620 | /* acknowledge/clear/reset any interrupts still pending | |
1621 | * from uCode or flow handler (Rx/Tx DMA) */ | |
3395f6e9 TW |
1622 | iwl_write32(priv, CSR_INT, 0xffffffff); |
1623 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
1624 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
1625 | } | |
1626 | ||
b481de9c | 1627 | |
b481de9c | 1628 | /** |
bb8c093b | 1629 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 1630 | */ |
c79dd5b5 | 1631 | static void iwl4965_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 1632 | { |
bb8c093b | 1633 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
1634 | set_bit(STATUS_FW_ERROR, &priv->status); |
1635 | ||
1636 | /* Cancel currently queued command. */ | |
1637 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
1638 | ||
0a6857e7 | 1639 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1640 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
ede0cba4 | 1641 | iwl_dump_nic_error_log(priv); |
189a2b59 | 1642 | iwl_dump_nic_event_log(priv); |
bf403db8 | 1643 | iwl4965_print_rx_config_cmd(priv); |
b481de9c ZY |
1644 | } |
1645 | #endif | |
1646 | ||
1647 | wake_up_interruptible(&priv->wait_command_queue); | |
1648 | ||
1649 | /* Keep the restart process from trying to send host | |
1650 | * commands by clearing the INIT status bit */ | |
1651 | clear_bit(STATUS_READY, &priv->status); | |
1652 | ||
1653 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
f3d67999 | 1654 | IWL_DEBUG(IWL_DL_FW_ERRORS, |
b481de9c ZY |
1655 | "Restarting adapter due to uCode error.\n"); |
1656 | ||
3109ece1 | 1657 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
1658 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
1659 | sizeof(priv->recovery_rxon)); | |
1660 | priv->error_recovering = 1; | |
1661 | } | |
3a1081e8 EK |
1662 | if (priv->cfg->mod_params->restart_fw) |
1663 | queue_work(priv->workqueue, &priv->restart); | |
b481de9c ZY |
1664 | } |
1665 | } | |
1666 | ||
c79dd5b5 | 1667 | static void iwl4965_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
1668 | { |
1669 | unsigned long flags; | |
1670 | ||
1671 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
1672 | sizeof(priv->staging_rxon)); | |
1673 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 1674 | iwl4965_commit_rxon(priv); |
b481de9c | 1675 | |
4f40e4d9 | 1676 | iwl_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
1677 | |
1678 | spin_lock_irqsave(&priv->lock, flags); | |
1679 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
1680 | priv->error_recovering = 0; | |
1681 | spin_unlock_irqrestore(&priv->lock, flags); | |
1682 | } | |
1683 | ||
c79dd5b5 | 1684 | static void iwl4965_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
1685 | { |
1686 | u32 inta, handled = 0; | |
1687 | u32 inta_fh; | |
1688 | unsigned long flags; | |
0a6857e7 | 1689 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1690 | u32 inta_mask; |
1691 | #endif | |
1692 | ||
1693 | spin_lock_irqsave(&priv->lock, flags); | |
1694 | ||
1695 | /* Ack/clear/reset pending uCode interrupts. | |
1696 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
1697 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
1698 | inta = iwl_read32(priv, CSR_INT); |
1699 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
1700 | |
1701 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
1702 | * Any new interrupts that happen after this, either while we're | |
1703 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
1704 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
1705 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 1706 | |
0a6857e7 | 1707 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1708 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 1709 | /* just for debug */ |
3395f6e9 | 1710 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
1711 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
1712 | inta, inta_mask, inta_fh); | |
1713 | } | |
1714 | #endif | |
1715 | ||
1716 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
1717 | * atomic, make sure that inta covers all the interrupts that | |
1718 | * we've discovered, even if FH interrupt came in just after | |
1719 | * reading CSR_INT. */ | |
6f83eaa1 | 1720 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 1721 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 1722 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
1723 | inta |= CSR_INT_BIT_FH_TX; |
1724 | ||
1725 | /* Now service all interrupt bits discovered above. */ | |
1726 | if (inta & CSR_INT_BIT_HW_ERR) { | |
1727 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
1728 | ||
1729 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 1730 | iwl4965_disable_interrupts(priv); |
b481de9c | 1731 | |
bb8c093b | 1732 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1733 | |
1734 | handled |= CSR_INT_BIT_HW_ERR; | |
1735 | ||
1736 | spin_unlock_irqrestore(&priv->lock, flags); | |
1737 | ||
1738 | return; | |
1739 | } | |
1740 | ||
0a6857e7 | 1741 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1742 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 1743 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
1744 | if (inta & CSR_INT_BIT_SCD) |
1745 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
1746 | "the frame/frames.\n"); | |
b481de9c ZY |
1747 | |
1748 | /* Alive notification via Rx interrupt will do the real work */ | |
1749 | if (inta & CSR_INT_BIT_ALIVE) | |
1750 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
1751 | } | |
1752 | #endif | |
1753 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 1754 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 1755 | |
9fbab516 | 1756 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
1757 | if (inta & CSR_INT_BIT_RF_KILL) { |
1758 | int hw_rf_kill = 0; | |
3395f6e9 | 1759 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
1760 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
1761 | hw_rf_kill = 1; | |
1762 | ||
f3d67999 | 1763 | IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n", |
b481de9c ZY |
1764 | hw_rf_kill ? "disable radio":"enable radio"); |
1765 | ||
1766 | /* Queue restart only if RF_KILL switch was set to "kill" | |
1767 | * when we loaded driver, and is now set to "enable". | |
1768 | * After we're Alive, RF_KILL gets handled by | |
3230455d | 1769 | * iwl4965_rx_card_state_notif() */ |
53e49093 ZY |
1770 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) { |
1771 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
b481de9c | 1772 | queue_work(priv->workqueue, &priv->restart); |
53e49093 | 1773 | } |
b481de9c ZY |
1774 | |
1775 | handled |= CSR_INT_BIT_RF_KILL; | |
1776 | } | |
1777 | ||
9fbab516 | 1778 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
1779 | if (inta & CSR_INT_BIT_CT_KILL) { |
1780 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
1781 | handled |= CSR_INT_BIT_CT_KILL; | |
1782 | } | |
1783 | ||
1784 | /* Error detected by uCode */ | |
1785 | if (inta & CSR_INT_BIT_SW_ERR) { | |
1786 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
1787 | inta); | |
bb8c093b | 1788 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1789 | handled |= CSR_INT_BIT_SW_ERR; |
1790 | } | |
1791 | ||
1792 | /* uCode wakes up after power-down sleep */ | |
1793 | if (inta & CSR_INT_BIT_WAKEUP) { | |
1794 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
a55360e4 | 1795 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
babcebfa TW |
1796 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
1797 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); | |
1798 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); | |
1799 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); | |
1800 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); | |
1801 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
1802 | |
1803 | handled |= CSR_INT_BIT_WAKEUP; | |
1804 | } | |
1805 | ||
1806 | /* All uCode command responses, including Tx command responses, | |
1807 | * Rx "responses" (frame-received notification), and other | |
1808 | * notifications from uCode come through here*/ | |
1809 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
a55360e4 | 1810 | iwl_rx_handle(priv); |
b481de9c ZY |
1811 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
1812 | } | |
1813 | ||
1814 | if (inta & CSR_INT_BIT_FH_TX) { | |
1815 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
1816 | handled |= CSR_INT_BIT_FH_TX; | |
dbb983b7 RR |
1817 | /* FH finished to write, send event */ |
1818 | priv->ucode_write_complete = 1; | |
1819 | wake_up_interruptible(&priv->wait_command_queue); | |
b481de9c ZY |
1820 | } |
1821 | ||
1822 | if (inta & ~handled) | |
1823 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
1824 | ||
1825 | if (inta & ~CSR_INI_SET_MASK) { | |
1826 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
1827 | inta & ~CSR_INI_SET_MASK); | |
1828 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
1829 | } | |
1830 | ||
1831 | /* Re-enable all interrupts */ | |
0359facc MA |
1832 | /* only Re-enable if diabled by irq */ |
1833 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1834 | iwl4965_enable_interrupts(priv); | |
b481de9c | 1835 | |
0a6857e7 | 1836 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1837 | if (priv->debug_level & (IWL_DL_ISR)) { |
3395f6e9 TW |
1838 | inta = iwl_read32(priv, CSR_INT); |
1839 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
1840 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1841 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
1842 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
1843 | } | |
1844 | #endif | |
1845 | spin_unlock_irqrestore(&priv->lock, flags); | |
1846 | } | |
1847 | ||
bb8c093b | 1848 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 1849 | { |
c79dd5b5 | 1850 | struct iwl_priv *priv = data; |
b481de9c ZY |
1851 | u32 inta, inta_mask; |
1852 | u32 inta_fh; | |
1853 | if (!priv) | |
1854 | return IRQ_NONE; | |
1855 | ||
1856 | spin_lock(&priv->lock); | |
1857 | ||
1858 | /* Disable (but don't clear!) interrupts here to avoid | |
1859 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
1860 | * If we have something to service, the tasklet will re-enable ints. | |
1861 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
1862 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
1863 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
1864 | |
1865 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
1866 | inta = iwl_read32(priv, CSR_INT); |
1867 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1868 | |
1869 | /* Ignore interrupt if there's nothing in NIC to service. | |
1870 | * This may be due to IRQ shared with another device, | |
1871 | * or due to sporadic interrupts thrown from our NIC. */ | |
1872 | if (!inta && !inta_fh) { | |
1873 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
1874 | goto none; | |
1875 | } | |
1876 | ||
1877 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
1878 | /* Hardware disappeared. It might have already raised |
1879 | * an interrupt */ | |
b481de9c | 1880 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 1881 | goto unplugged; |
b481de9c ZY |
1882 | } |
1883 | ||
1884 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
1885 | inta, inta_mask, inta_fh); | |
1886 | ||
25c03d8e JP |
1887 | inta &= ~CSR_INT_BIT_SCD; |
1888 | ||
bb8c093b | 1889 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
1890 | if (likely(inta || inta_fh)) |
1891 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 1892 | |
66fbb541 ON |
1893 | unplugged: |
1894 | spin_unlock(&priv->lock); | |
b481de9c ZY |
1895 | return IRQ_HANDLED; |
1896 | ||
1897 | none: | |
1898 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
1899 | /* only Re-enable if diabled by irq */ |
1900 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1901 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
1902 | spin_unlock(&priv->lock); |
1903 | return IRQ_NONE; | |
1904 | } | |
1905 | ||
b481de9c ZY |
1906 | /****************************************************************************** |
1907 | * | |
1908 | * uCode download functions | |
1909 | * | |
1910 | ******************************************************************************/ | |
1911 | ||
c79dd5b5 | 1912 | static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 1913 | { |
98c92211 TW |
1914 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
1915 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
1916 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
1917 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
1918 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
1919 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
1920 | } |
1921 | ||
edcdf8b2 RR |
1922 | static void iwl4965_nic_start(struct iwl_priv *priv) |
1923 | { | |
1924 | /* Remove all resets to allow NIC to operate */ | |
1925 | iwl_write32(priv, CSR_RESET, 0); | |
1926 | } | |
1927 | ||
1928 | ||
b481de9c | 1929 | /** |
bb8c093b | 1930 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
1931 | * |
1932 | * Copy into buffers for card to fetch via bus-mastering | |
1933 | */ | |
c79dd5b5 | 1934 | static int iwl4965_read_ucode(struct iwl_priv *priv) |
b481de9c | 1935 | { |
14b3d338 | 1936 | struct iwl_ucode *ucode; |
90e759d1 | 1937 | int ret; |
b481de9c | 1938 | const struct firmware *ucode_raw; |
4bf775cd | 1939 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
1940 | u8 *src; |
1941 | size_t len; | |
1942 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
1943 | ||
1944 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
1945 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
1946 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
1947 | if (ret < 0) { | |
1948 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
1949 | name, ret); | |
b481de9c ZY |
1950 | goto error; |
1951 | } | |
1952 | ||
1953 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
1954 | name, ucode_raw->size); | |
1955 | ||
1956 | /* Make sure that we got at least our header! */ | |
1957 | if (ucode_raw->size < sizeof(*ucode)) { | |
1958 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 1959 | ret = -EINVAL; |
b481de9c ZY |
1960 | goto err_release; |
1961 | } | |
1962 | ||
1963 | /* Data from ucode file: header followed by uCode images */ | |
1964 | ucode = (void *)ucode_raw->data; | |
1965 | ||
1966 | ver = le32_to_cpu(ucode->ver); | |
1967 | inst_size = le32_to_cpu(ucode->inst_size); | |
1968 | data_size = le32_to_cpu(ucode->data_size); | |
1969 | init_size = le32_to_cpu(ucode->init_size); | |
1970 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
1971 | boot_size = le32_to_cpu(ucode->boot_size); | |
1972 | ||
1973 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
1974 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
1975 | inst_size); | |
1976 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
1977 | data_size); | |
1978 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
1979 | init_size); | |
1980 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
1981 | init_data_size); | |
1982 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
1983 | boot_size); | |
1984 | ||
1985 | /* Verify size of file vs. image size info in file's header */ | |
1986 | if (ucode_raw->size < sizeof(*ucode) + | |
1987 | inst_size + data_size + init_size + | |
1988 | init_data_size + boot_size) { | |
1989 | ||
1990 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
1991 | (int)ucode_raw->size); | |
90e759d1 | 1992 | ret = -EINVAL; |
b481de9c ZY |
1993 | goto err_release; |
1994 | } | |
1995 | ||
1996 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 1997 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
1998 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
1999 | inst_size); | |
2000 | ret = -EINVAL; | |
b481de9c ZY |
2001 | goto err_release; |
2002 | } | |
2003 | ||
099b40b7 | 2004 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
2005 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
2006 | data_size); | |
2007 | ret = -EINVAL; | |
b481de9c ZY |
2008 | goto err_release; |
2009 | } | |
099b40b7 | 2010 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 2011 | IWL_DEBUG_INFO |
90e759d1 TW |
2012 | ("uCode init instr len %d too large to fit in\n", |
2013 | init_size); | |
2014 | ret = -EINVAL; | |
b481de9c ZY |
2015 | goto err_release; |
2016 | } | |
099b40b7 | 2017 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 2018 | IWL_DEBUG_INFO |
90e759d1 TW |
2019 | ("uCode init data len %d too large to fit in\n", |
2020 | init_data_size); | |
2021 | ret = -EINVAL; | |
b481de9c ZY |
2022 | goto err_release; |
2023 | } | |
099b40b7 | 2024 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 2025 | IWL_DEBUG_INFO |
90e759d1 TW |
2026 | ("uCode boot instr len %d too large to fit in\n", |
2027 | boot_size); | |
2028 | ret = -EINVAL; | |
b481de9c ZY |
2029 | goto err_release; |
2030 | } | |
2031 | ||
2032 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
2033 | ||
2034 | /* Runtime instructions and 2 copies of data: | |
2035 | * 1) unmodified from disk | |
2036 | * 2) backup cache for save/restore during power-downs */ | |
2037 | priv->ucode_code.len = inst_size; | |
98c92211 | 2038 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
2039 | |
2040 | priv->ucode_data.len = data_size; | |
98c92211 | 2041 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
2042 | |
2043 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 2044 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
2045 | |
2046 | /* Initialization instructions and data */ | |
90e759d1 TW |
2047 | if (init_size && init_data_size) { |
2048 | priv->ucode_init.len = init_size; | |
98c92211 | 2049 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
2050 | |
2051 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 2052 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
2053 | |
2054 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
2055 | goto err_pci_alloc; | |
2056 | } | |
b481de9c ZY |
2057 | |
2058 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
2059 | if (boot_size) { |
2060 | priv->ucode_boot.len = boot_size; | |
98c92211 | 2061 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 2062 | |
90e759d1 TW |
2063 | if (!priv->ucode_boot.v_addr) |
2064 | goto err_pci_alloc; | |
2065 | } | |
b481de9c ZY |
2066 | |
2067 | /* Copy images into buffers for card's bus-master reads ... */ | |
2068 | ||
2069 | /* Runtime instructions (first block of data in file) */ | |
2070 | src = &ucode->data[0]; | |
2071 | len = priv->ucode_code.len; | |
90e759d1 | 2072 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
2073 | memcpy(priv->ucode_code.v_addr, src, len); |
2074 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
2075 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
2076 | ||
2077 | /* Runtime data (2nd block) | |
bb8c093b | 2078 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
2079 | src = &ucode->data[inst_size]; |
2080 | len = priv->ucode_data.len; | |
90e759d1 | 2081 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
2082 | memcpy(priv->ucode_data.v_addr, src, len); |
2083 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
2084 | ||
2085 | /* Initialization instructions (3rd block) */ | |
2086 | if (init_size) { | |
2087 | src = &ucode->data[inst_size + data_size]; | |
2088 | len = priv->ucode_init.len; | |
90e759d1 TW |
2089 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
2090 | len); | |
b481de9c ZY |
2091 | memcpy(priv->ucode_init.v_addr, src, len); |
2092 | } | |
2093 | ||
2094 | /* Initialization data (4th block) */ | |
2095 | if (init_data_size) { | |
2096 | src = &ucode->data[inst_size + data_size + init_size]; | |
2097 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
2098 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
2099 | len); | |
b481de9c ZY |
2100 | memcpy(priv->ucode_init_data.v_addr, src, len); |
2101 | } | |
2102 | ||
2103 | /* Bootstrap instructions (5th block) */ | |
2104 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
2105 | len = priv->ucode_boot.len; | |
90e759d1 | 2106 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
2107 | memcpy(priv->ucode_boot.v_addr, src, len); |
2108 | ||
2109 | /* We have our copies now, allow OS release its copies */ | |
2110 | release_firmware(ucode_raw); | |
2111 | return 0; | |
2112 | ||
2113 | err_pci_alloc: | |
2114 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 2115 | ret = -ENOMEM; |
bb8c093b | 2116 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
2117 | |
2118 | err_release: | |
2119 | release_firmware(ucode_raw); | |
2120 | ||
2121 | error: | |
90e759d1 | 2122 | return ret; |
b481de9c ZY |
2123 | } |
2124 | ||
b481de9c | 2125 | /** |
4a4a9e81 | 2126 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 2127 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 2128 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 2129 | */ |
4a4a9e81 | 2130 | static void iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 2131 | { |
57aab75a | 2132 | int ret = 0; |
b481de9c ZY |
2133 | |
2134 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
2135 | ||
2136 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
2137 | /* We had an error bringing up the hardware, so take it | |
2138 | * all the way back down so we can try again */ | |
2139 | IWL_DEBUG_INFO("Alive failed.\n"); | |
2140 | goto restart; | |
2141 | } | |
2142 | ||
2143 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
2144 | * This is a paranoid check, because we would not have gotten the | |
2145 | * "runtime" alive if code weren't properly loaded. */ | |
b0692f2f | 2146 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
2147 | /* Runtime instruction load was bad; |
2148 | * take it all the way back down so we can try again */ | |
2149 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
2150 | goto restart; | |
2151 | } | |
2152 | ||
bf85ea4f | 2153 | iwlcore_clear_stations_table(priv); |
57aab75a TW |
2154 | ret = priv->cfg->ops->lib->alive_notify(priv); |
2155 | if (ret) { | |
b481de9c | 2156 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 2157 | ret); |
b481de9c ZY |
2158 | goto restart; |
2159 | } | |
2160 | ||
9fbab516 | 2161 | /* After the ALIVE response, we can send host commands to 4965 uCode */ |
b481de9c ZY |
2162 | set_bit(STATUS_ALIVE, &priv->status); |
2163 | ||
fee1247a | 2164 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
2165 | return; |
2166 | ||
36d6825b | 2167 | ieee80211_wake_queues(priv->hw); |
b481de9c ZY |
2168 | |
2169 | priv->active_rate = priv->rates_mask; | |
2170 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
2171 | ||
3109ece1 | 2172 | if (iwl_is_associated(priv)) { |
c1adf9fb GG |
2173 | struct iwl_rxon_cmd *active_rxon = |
2174 | (struct iwl_rxon_cmd *)&priv->active_rxon; | |
b481de9c ZY |
2175 | |
2176 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
2177 | sizeof(priv->staging_rxon)); | |
2178 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
2179 | } else { | |
2180 | /* Initialize our rx_config data */ | |
bb8c093b | 2181 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
2182 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
2183 | } | |
2184 | ||
9fbab516 | 2185 | /* Configure Bluetooth device coexistence support */ |
bb8c093b | 2186 | iwl4965_send_bt_config(priv); |
b481de9c | 2187 | |
4a4a9e81 TW |
2188 | iwl_reset_run_time_calib(priv); |
2189 | ||
b481de9c | 2190 | /* Configure the adapter for unassociated operation */ |
bb8c093b | 2191 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2192 | |
2193 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 2194 | iwl_rf_kill_ct_config(priv); |
5a66926a | 2195 | |
fe00b5a5 RC |
2196 | iwl_leds_register(priv); |
2197 | ||
b481de9c | 2198 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 2199 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 2200 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
2201 | |
2202 | if (priv->error_recovering) | |
bb8c093b | 2203 | iwl4965_error_recovery(priv); |
b481de9c | 2204 | |
58d0f361 | 2205 | iwl_power_update_mode(priv, 1); |
84363e6e | 2206 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); |
c46fbefa AK |
2207 | |
2208 | if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status)) | |
2209 | iwl4965_set_mode(priv, priv->iw_mode); | |
2210 | ||
b481de9c ZY |
2211 | return; |
2212 | ||
2213 | restart: | |
2214 | queue_work(priv->workqueue, &priv->restart); | |
2215 | } | |
2216 | ||
4e39317d | 2217 | static void iwl_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 2218 | |
c79dd5b5 | 2219 | static void __iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2220 | { |
2221 | unsigned long flags; | |
2222 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
b481de9c ZY |
2223 | |
2224 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
2225 | ||
b481de9c ZY |
2226 | if (!exit_pending) |
2227 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
2228 | ||
ab53d8af MA |
2229 | iwl_leds_unregister(priv); |
2230 | ||
bf85ea4f | 2231 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
2232 | |
2233 | /* Unblock any waiting calls */ | |
2234 | wake_up_interruptible_all(&priv->wait_command_queue); | |
2235 | ||
b481de9c ZY |
2236 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
2237 | * exiting the module */ | |
2238 | if (!exit_pending) | |
2239 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
2240 | ||
2241 | /* stop and reset the on-board processor */ | |
3395f6e9 | 2242 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
2243 | |
2244 | /* tell the device to stop sending interrupts */ | |
0359facc | 2245 | spin_lock_irqsave(&priv->lock, flags); |
bb8c093b | 2246 | iwl4965_disable_interrupts(priv); |
0359facc MA |
2247 | spin_unlock_irqrestore(&priv->lock, flags); |
2248 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
2249 | |
2250 | if (priv->mac80211_registered) | |
2251 | ieee80211_stop_queues(priv->hw); | |
2252 | ||
bb8c093b | 2253 | /* If we have not previously called iwl4965_init() then |
b481de9c | 2254 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 2255 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
2256 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
2257 | STATUS_RF_KILL_HW | | |
2258 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2259 | STATUS_RF_KILL_SW | | |
9788864e RC |
2260 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2261 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
2262 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
2263 | STATUS_IN_SUSPEND; | |
2264 | goto exit; | |
2265 | } | |
2266 | ||
2267 | /* ...otherwise clear out all the status bits but the RF Kill and | |
2268 | * SUSPEND bits and continue taking the NIC down. */ | |
2269 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
2270 | STATUS_RF_KILL_HW | | |
2271 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2272 | STATUS_RF_KILL_SW | | |
9788864e RC |
2273 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2274 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
2275 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
2276 | STATUS_IN_SUSPEND | | |
2277 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
2278 | STATUS_FW_ERROR; | |
2279 | ||
2280 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2281 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 2282 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
2283 | spin_unlock_irqrestore(&priv->lock, flags); |
2284 | ||
da1bc453 | 2285 | iwl_txq_ctx_stop(priv); |
b3bbacb7 | 2286 | iwl_rxq_stop(priv); |
b481de9c ZY |
2287 | |
2288 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
2289 | if (!iwl_grab_nic_access(priv)) { |
2290 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 2291 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 2292 | iwl_release_nic_access(priv); |
b481de9c ZY |
2293 | } |
2294 | spin_unlock_irqrestore(&priv->lock, flags); | |
2295 | ||
2296 | udelay(5); | |
2297 | ||
7f066108 TW |
2298 | /* FIXME: apm_ops.suspend(priv) */ |
2299 | priv->cfg->ops->lib->apm_ops.reset(priv); | |
399f4900 | 2300 | priv->cfg->ops->lib->free_shared_mem(priv); |
b481de9c ZY |
2301 | |
2302 | exit: | |
885ba202 | 2303 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
2304 | |
2305 | if (priv->ibss_beacon) | |
2306 | dev_kfree_skb(priv->ibss_beacon); | |
2307 | priv->ibss_beacon = NULL; | |
2308 | ||
2309 | /* clear out any free frames */ | |
fcab423d | 2310 | iwl_clear_free_frames(priv); |
b481de9c ZY |
2311 | } |
2312 | ||
c79dd5b5 | 2313 | static void iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2314 | { |
2315 | mutex_lock(&priv->mutex); | |
bb8c093b | 2316 | __iwl4965_down(priv); |
b481de9c | 2317 | mutex_unlock(&priv->mutex); |
b24d22b1 | 2318 | |
4e39317d | 2319 | iwl_cancel_deferred_work(priv); |
b481de9c ZY |
2320 | } |
2321 | ||
2322 | #define MAX_HW_RESTARTS 5 | |
2323 | ||
c79dd5b5 | 2324 | static int __iwl4965_up(struct iwl_priv *priv) |
b481de9c | 2325 | { |
57aab75a TW |
2326 | int i; |
2327 | int ret; | |
b481de9c ZY |
2328 | |
2329 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
2330 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
2331 | return -EIO; | |
2332 | } | |
2333 | ||
e903fbd4 RC |
2334 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
2335 | IWL_ERROR("ucode not available for device bringup\n"); | |
2336 | return -EIO; | |
2337 | } | |
2338 | ||
e655b9f0 | 2339 | /* If platform's RF_KILL switch is NOT set to KILL */ |
3395f6e9 | 2340 | if (iwl_read32(priv, CSR_GP_CNTRL) & |
e655b9f0 ZY |
2341 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
2342 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
2343 | else { | |
2344 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
2345 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) { | |
ad97edd2 | 2346 | iwl_rfkill_set_hw_state(priv); |
e655b9f0 ZY |
2347 | IWL_WARNING("Radio disabled by HW RF Kill switch\n"); |
2348 | return -ENODEV; | |
2349 | } | |
b481de9c ZY |
2350 | } |
2351 | ||
ad97edd2 | 2352 | iwl_rfkill_set_hw_state(priv); |
3395f6e9 | 2353 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 2354 | |
399f4900 RR |
2355 | ret = priv->cfg->ops->lib->alloc_shared_mem(priv); |
2356 | if (ret) { | |
2357 | IWL_ERROR("Unable to allocate shared memory\n"); | |
2358 | return ret; | |
2359 | } | |
2360 | ||
1053d35f | 2361 | ret = iwl_hw_nic_init(priv); |
57aab75a TW |
2362 | if (ret) { |
2363 | IWL_ERROR("Unable to init nic\n"); | |
2364 | return ret; | |
b481de9c ZY |
2365 | } |
2366 | ||
2367 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2368 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2369 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
2370 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
2371 | ||
2372 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 2373 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
bb8c093b | 2374 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
2375 | |
2376 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2377 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2378 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
2379 | |
2380 | /* Copy original ucode data image from disk into backup cache. | |
2381 | * This will be used to initialize the on-board processor's | |
2382 | * data SRAM for a clean start when the runtime program first loads. */ | |
2383 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 2384 | priv->ucode_data.len); |
b481de9c | 2385 | |
e655b9f0 | 2386 | /* We return success when we resume from suspend and rf_kill is on. */ |
64e72c3e MA |
2387 | if (test_bit(STATUS_RF_KILL_HW, &priv->status) || |
2388 | test_bit(STATUS_RF_KILL_SW, &priv->status)) | |
b481de9c | 2389 | return 0; |
b481de9c ZY |
2390 | |
2391 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | |
2392 | ||
bf85ea4f | 2393 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
2394 | |
2395 | /* load bootstrap state machine, | |
2396 | * load bootstrap program into processor's memory, | |
2397 | * prepare to load the "initialize" uCode */ | |
57aab75a | 2398 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 2399 | |
57aab75a TW |
2400 | if (ret) { |
2401 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
2402 | continue; |
2403 | } | |
2404 | ||
f3d5b45b EG |
2405 | /* Clear out the uCode error bit if it is set */ |
2406 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
2407 | ||
b481de9c | 2408 | /* start card; "initialize" will load runtime ucode */ |
edcdf8b2 | 2409 | iwl4965_nic_start(priv); |
b481de9c | 2410 | |
b481de9c ZY |
2411 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
2412 | ||
2413 | return 0; | |
2414 | } | |
2415 | ||
2416 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 2417 | __iwl4965_down(priv); |
64e72c3e | 2418 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c ZY |
2419 | |
2420 | /* tried to restart and config the device for as long as our | |
2421 | * patience could withstand */ | |
2422 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
2423 | return -EIO; | |
2424 | } | |
2425 | ||
2426 | ||
2427 | /***************************************************************************** | |
2428 | * | |
2429 | * Workqueue callbacks | |
2430 | * | |
2431 | *****************************************************************************/ | |
2432 | ||
4a4a9e81 | 2433 | static void iwl_bg_init_alive_start(struct work_struct *data) |
b481de9c | 2434 | { |
c79dd5b5 TW |
2435 | struct iwl_priv *priv = |
2436 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
2437 | |
2438 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2439 | return; | |
2440 | ||
2441 | mutex_lock(&priv->mutex); | |
f3ccc08c | 2442 | priv->cfg->ops->lib->init_alive_start(priv); |
b481de9c ZY |
2443 | mutex_unlock(&priv->mutex); |
2444 | } | |
2445 | ||
4a4a9e81 | 2446 | static void iwl_bg_alive_start(struct work_struct *data) |
b481de9c | 2447 | { |
c79dd5b5 TW |
2448 | struct iwl_priv *priv = |
2449 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
2450 | |
2451 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2452 | return; | |
2453 | ||
2454 | mutex_lock(&priv->mutex); | |
4a4a9e81 | 2455 | iwl_alive_start(priv); |
b481de9c ZY |
2456 | mutex_unlock(&priv->mutex); |
2457 | } | |
2458 | ||
bb8c093b | 2459 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 2460 | { |
c79dd5b5 | 2461 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
2462 | |
2463 | wake_up_interruptible(&priv->wait_command_queue); | |
2464 | ||
2465 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2466 | return; | |
2467 | ||
2468 | mutex_lock(&priv->mutex); | |
2469 | ||
fee1247a | 2470 | if (!iwl_is_rfkill(priv)) { |
f3d67999 | 2471 | IWL_DEBUG(IWL_DL_RF_KILL, |
b481de9c ZY |
2472 | "HW and/or SW RF Kill no longer active, restarting " |
2473 | "device\n"); | |
2474 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2475 | queue_work(priv->workqueue, &priv->restart); | |
2476 | } else { | |
ad97edd2 MA |
2477 | /* make sure mac80211 stop sending Tx frame */ |
2478 | if (priv->mac80211_registered) | |
2479 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2480 | |
2481 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
2482 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2483 | "disabled by SW switch\n"); | |
2484 | else | |
2485 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
2486 | "Kill switch must be turned off for " | |
2487 | "wireless networking to work.\n"); | |
2488 | } | |
ad97edd2 MA |
2489 | iwl_rfkill_set_hw_state(priv); |
2490 | ||
b481de9c ZY |
2491 | mutex_unlock(&priv->mutex); |
2492 | } | |
2493 | ||
4419e39b AK |
2494 | static void iwl4965_bg_set_monitor(struct work_struct *work) |
2495 | { | |
2496 | struct iwl_priv *priv = container_of(work, | |
2497 | struct iwl_priv, set_monitor); | |
c46fbefa | 2498 | int ret; |
4419e39b AK |
2499 | |
2500 | IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n"); | |
2501 | ||
2502 | mutex_lock(&priv->mutex); | |
2503 | ||
c46fbefa AK |
2504 | ret = iwl4965_set_mode(priv, IEEE80211_IF_TYPE_MNTR); |
2505 | ||
2506 | if (ret) { | |
2507 | if (ret == -EAGAIN) | |
2508 | IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n"); | |
2509 | else | |
2510 | IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret); | |
2511 | } | |
4419e39b AK |
2512 | |
2513 | mutex_unlock(&priv->mutex); | |
2514 | } | |
2515 | ||
16e727e8 EG |
2516 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
2517 | { | |
2518 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
2519 | run_time_calib_work); | |
2520 | ||
2521 | mutex_lock(&priv->mutex); | |
2522 | ||
2523 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | |
2524 | test_bit(STATUS_SCANNING, &priv->status)) { | |
2525 | mutex_unlock(&priv->mutex); | |
2526 | return; | |
2527 | } | |
2528 | ||
2529 | if (priv->start_calib) { | |
2530 | iwl_chain_noise_calibration(priv, &priv->statistics); | |
2531 | ||
2532 | iwl_sensitivity_calibration(priv, &priv->statistics); | |
2533 | } | |
2534 | ||
2535 | mutex_unlock(&priv->mutex); | |
2536 | return; | |
2537 | } | |
2538 | ||
bb8c093b | 2539 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 2540 | { |
c79dd5b5 | 2541 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
2542 | |
2543 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2544 | return; | |
2545 | ||
2546 | mutex_lock(&priv->mutex); | |
bb8c093b | 2547 | __iwl4965_up(priv); |
b481de9c ZY |
2548 | mutex_unlock(&priv->mutex); |
2549 | } | |
2550 | ||
bb8c093b | 2551 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 2552 | { |
c79dd5b5 | 2553 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
2554 | |
2555 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2556 | return; | |
2557 | ||
bb8c093b | 2558 | iwl4965_down(priv); |
b481de9c ZY |
2559 | queue_work(priv->workqueue, &priv->up); |
2560 | } | |
2561 | ||
bb8c093b | 2562 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 2563 | { |
c79dd5b5 TW |
2564 | struct iwl_priv *priv = |
2565 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
2566 | |
2567 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2568 | return; | |
2569 | ||
2570 | mutex_lock(&priv->mutex); | |
a55360e4 | 2571 | iwl_rx_replenish(priv); |
b481de9c ZY |
2572 | mutex_unlock(&priv->mutex); |
2573 | } | |
2574 | ||
7878a5a4 MA |
2575 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
2576 | ||
508e32e1 | 2577 | static void iwl4965_post_associate(struct iwl_priv *priv) |
b481de9c | 2578 | { |
b481de9c | 2579 | struct ieee80211_conf *conf = NULL; |
857485c0 | 2580 | int ret = 0; |
0795af57 | 2581 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
2582 | |
2583 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
2584 | IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__); | |
2585 | return; | |
2586 | } | |
2587 | ||
0795af57 JP |
2588 | IWL_DEBUG_ASSOC("Associated as %d to: %s\n", |
2589 | priv->assoc_id, | |
2590 | print_mac(mac, priv->active_rxon.bssid_addr)); | |
b481de9c ZY |
2591 | |
2592 | ||
2593 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2594 | return; | |
2595 | ||
b481de9c | 2596 | |
508e32e1 | 2597 | if (!priv->vif || !priv->is_open) |
948c171c | 2598 | return; |
508e32e1 | 2599 | |
2a421b91 | 2600 | iwl_scan_cancel_timeout(priv, 200); |
052c4b9f | 2601 | |
b481de9c ZY |
2602 | conf = ieee80211_get_hw_conf(priv->hw); |
2603 | ||
2604 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2605 | iwl4965_commit_rxon(priv); |
b481de9c | 2606 | |
bb8c093b CH |
2607 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
2608 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 2609 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2610 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2611 | if (ret) |
b481de9c ZY |
2612 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2613 | "Attempting to continue.\n"); | |
2614 | ||
2615 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
2616 | ||
fd105e79 | 2617 | if (priv->current_ht_config.is_ht) |
47c5196e | 2618 | iwl_set_rxon_ht(priv, &priv->current_ht_config); |
4f85f5b3 | 2619 | |
c7de35cd | 2620 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2621 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
2622 | ||
2623 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
2624 | priv->assoc_id, priv->beacon_int); | |
2625 | ||
2626 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2627 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
2628 | else | |
2629 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2630 | ||
2631 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2632 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2633 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2634 | else | |
2635 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2636 | ||
2637 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2638 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2639 | ||
2640 | } | |
2641 | ||
bb8c093b | 2642 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2643 | |
2644 | switch (priv->iw_mode) { | |
2645 | case IEEE80211_IF_TYPE_STA: | |
bb8c093b | 2646 | iwl4965_rate_scale_init(priv->hw, IWL_AP_ID); |
b481de9c ZY |
2647 | break; |
2648 | ||
2649 | case IEEE80211_IF_TYPE_IBSS: | |
2650 | ||
c46fbefa AK |
2651 | /* assume default assoc id */ |
2652 | priv->assoc_id = 1; | |
b481de9c | 2653 | |
4f40e4d9 | 2654 | iwl_rxon_add_station(priv, priv->bssid, 0); |
bb8c093b CH |
2655 | iwl4965_rate_scale_init(priv->hw, IWL_STA_ID); |
2656 | iwl4965_send_beacon_cmd(priv); | |
b481de9c ZY |
2657 | |
2658 | break; | |
2659 | ||
2660 | default: | |
2661 | IWL_ERROR("%s Should not be called in %d mode\n", | |
2662 | __FUNCTION__, priv->iw_mode); | |
2663 | break; | |
2664 | } | |
2665 | ||
bb8c093b | 2666 | iwl4965_sequence_reset(priv); |
b481de9c | 2667 | |
b481de9c | 2668 | /* Enable Rx differential gain and sensitivity calibrations */ |
f0832f13 | 2669 | iwl_chain_noise_reset(priv); |
b481de9c | 2670 | priv->start_calib = 1; |
b481de9c ZY |
2671 | |
2672 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2673 | priv->assoc_station_added = 1; | |
2674 | ||
bb8c093b | 2675 | iwl4965_activate_qos(priv, 0); |
292ae174 | 2676 | |
5da4b55f | 2677 | iwl_power_update_mode(priv, 0); |
7878a5a4 MA |
2678 | /* we have just associated, don't start scan too early */ |
2679 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; | |
508e32e1 RC |
2680 | } |
2681 | ||
2682 | ||
2683 | static void iwl4965_bg_post_associate(struct work_struct *data) | |
2684 | { | |
2685 | struct iwl_priv *priv = container_of(data, struct iwl_priv, | |
2686 | post_associate.work); | |
2687 | ||
2688 | mutex_lock(&priv->mutex); | |
2689 | iwl4965_post_associate(priv); | |
b481de9c | 2690 | mutex_unlock(&priv->mutex); |
508e32e1 | 2691 | |
b481de9c ZY |
2692 | } |
2693 | ||
76bb77e0 ZY |
2694 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf); |
2695 | ||
2a421b91 | 2696 | static void iwl_bg_scan_completed(struct work_struct *work) |
b481de9c | 2697 | { |
c79dd5b5 TW |
2698 | struct iwl_priv *priv = |
2699 | container_of(work, struct iwl_priv, scan_completed); | |
b481de9c | 2700 | |
630fe9b6 | 2701 | IWL_DEBUG_SCAN("SCAN complete scan\n"); |
b481de9c ZY |
2702 | |
2703 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2704 | return; | |
2705 | ||
a0646470 ZY |
2706 | if (test_bit(STATUS_CONF_PENDING, &priv->status)) |
2707 | iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw)); | |
76bb77e0 | 2708 | |
b481de9c ZY |
2709 | ieee80211_scan_completed(priv->hw); |
2710 | ||
2711 | /* Since setting the TXPOWER may have been deferred while | |
2712 | * performing the scan, fire one off */ | |
2713 | mutex_lock(&priv->mutex); | |
630fe9b6 | 2714 | iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); |
b481de9c ZY |
2715 | mutex_unlock(&priv->mutex); |
2716 | } | |
2717 | ||
2718 | /***************************************************************************** | |
2719 | * | |
2720 | * mac80211 entry point functions | |
2721 | * | |
2722 | *****************************************************************************/ | |
2723 | ||
5a66926a ZY |
2724 | #define UCODE_READY_TIMEOUT (2 * HZ) |
2725 | ||
bb8c093b | 2726 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 2727 | { |
c79dd5b5 | 2728 | struct iwl_priv *priv = hw->priv; |
5a66926a | 2729 | int ret; |
b481de9c ZY |
2730 | |
2731 | IWL_DEBUG_MAC80211("enter\n"); | |
2732 | ||
5a66926a ZY |
2733 | if (pci_enable_device(priv->pci_dev)) { |
2734 | IWL_ERROR("Fail to pci_enable_device\n"); | |
2735 | return -ENODEV; | |
2736 | } | |
2737 | pci_restore_state(priv->pci_dev); | |
2738 | pci_enable_msi(priv->pci_dev); | |
2739 | ||
2740 | ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED, | |
2741 | DRV_NAME, priv); | |
2742 | if (ret) { | |
2743 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
2744 | goto out_disable_msi; | |
2745 | } | |
2746 | ||
b481de9c ZY |
2747 | /* we should be verifying the device is ready to be opened */ |
2748 | mutex_lock(&priv->mutex); | |
2749 | ||
c1adf9fb | 2750 | memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd)); |
5a66926a ZY |
2751 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... |
2752 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 2753 | |
5a66926a ZY |
2754 | if (!priv->ucode_code.len) { |
2755 | ret = iwl4965_read_ucode(priv); | |
2756 | if (ret) { | |
2757 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
2758 | mutex_unlock(&priv->mutex); | |
2759 | goto out_release_irq; | |
2760 | } | |
2761 | } | |
b481de9c | 2762 | |
e655b9f0 | 2763 | ret = __iwl4965_up(priv); |
5a66926a | 2764 | |
b481de9c | 2765 | mutex_unlock(&priv->mutex); |
5a66926a | 2766 | |
e655b9f0 ZY |
2767 | if (ret) |
2768 | goto out_release_irq; | |
2769 | ||
2770 | IWL_DEBUG_INFO("Start UP work done.\n"); | |
2771 | ||
2772 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
2773 | return 0; | |
2774 | ||
fe9b6b72 | 2775 | /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from |
5a66926a | 2776 | * mac80211 will not be run successfully. */ |
fe9b6b72 RR |
2777 | if (priv->ucode_type == UCODE_RT) { |
2778 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | |
2779 | test_bit(STATUS_READY, &priv->status), | |
2780 | UCODE_READY_TIMEOUT); | |
2781 | if (!ret) { | |
2782 | if (!test_bit(STATUS_READY, &priv->status)) { | |
2783 | IWL_ERROR("START_ALIVE timeout after %dms.\n", | |
2784 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
2785 | ret = -ETIMEDOUT; | |
2786 | goto out_release_irq; | |
2787 | } | |
5a66926a | 2788 | } |
5a66926a | 2789 | |
fe9b6b72 RR |
2790 | priv->is_open = 1; |
2791 | } | |
b481de9c ZY |
2792 | IWL_DEBUG_MAC80211("leave\n"); |
2793 | return 0; | |
5a66926a ZY |
2794 | |
2795 | out_release_irq: | |
2796 | free_irq(priv->pci_dev->irq, priv); | |
2797 | out_disable_msi: | |
2798 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
2799 | pci_disable_device(priv->pci_dev); |
2800 | priv->is_open = 0; | |
2801 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 2802 | return ret; |
b481de9c ZY |
2803 | } |
2804 | ||
bb8c093b | 2805 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 2806 | { |
c79dd5b5 | 2807 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2808 | |
2809 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 2810 | |
e655b9f0 ZY |
2811 | if (!priv->is_open) { |
2812 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
2813 | return; | |
2814 | } | |
2815 | ||
b481de9c | 2816 | priv->is_open = 0; |
5a66926a | 2817 | |
fee1247a | 2818 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
2819 | /* stop mac, cancel any scan request and clear |
2820 | * RXON_FILTER_ASSOC_MSK BIT | |
2821 | */ | |
5a66926a | 2822 | mutex_lock(&priv->mutex); |
2a421b91 | 2823 | iwl_scan_cancel_timeout(priv, 100); |
5a66926a | 2824 | cancel_delayed_work(&priv->post_associate); |
fde3571f | 2825 | mutex_unlock(&priv->mutex); |
fde3571f MA |
2826 | } |
2827 | ||
5a66926a ZY |
2828 | iwl4965_down(priv); |
2829 | ||
2830 | flush_workqueue(priv->workqueue); | |
2831 | free_irq(priv->pci_dev->irq, priv); | |
2832 | pci_disable_msi(priv->pci_dev); | |
2833 | pci_save_state(priv->pci_dev); | |
2834 | pci_disable_device(priv->pci_dev); | |
948c171c | 2835 | |
b481de9c | 2836 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2837 | } |
2838 | ||
e039fa4a | 2839 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 2840 | { |
c79dd5b5 | 2841 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2842 | |
2843 | IWL_DEBUG_MAC80211("enter\n"); | |
2844 | ||
2845 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | |
2846 | IWL_DEBUG_MAC80211("leave - monitor\n"); | |
2847 | return -1; | |
2848 | } | |
2849 | ||
2850 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | |
e039fa4a | 2851 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
b481de9c | 2852 | |
e039fa4a | 2853 | if (iwl_tx_skb(priv, skb)) |
b481de9c ZY |
2854 | dev_kfree_skb_any(skb); |
2855 | ||
2856 | IWL_DEBUG_MAC80211("leave\n"); | |
2857 | return 0; | |
2858 | } | |
2859 | ||
bb8c093b | 2860 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
2861 | struct ieee80211_if_init_conf *conf) |
2862 | { | |
c79dd5b5 | 2863 | struct iwl_priv *priv = hw->priv; |
b481de9c | 2864 | unsigned long flags; |
0795af57 | 2865 | DECLARE_MAC_BUF(mac); |
b481de9c | 2866 | |
32bfd35d | 2867 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 2868 | |
32bfd35d JB |
2869 | if (priv->vif) { |
2870 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 2871 | return -EOPNOTSUPP; |
b481de9c ZY |
2872 | } |
2873 | ||
2874 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 2875 | priv->vif = conf->vif; |
b481de9c ZY |
2876 | |
2877 | spin_unlock_irqrestore(&priv->lock, flags); | |
2878 | ||
2879 | mutex_lock(&priv->mutex); | |
864792e3 TW |
2880 | |
2881 | if (conf->mac_addr) { | |
2882 | IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr)); | |
2883 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | |
2884 | } | |
b481de9c | 2885 | |
c46fbefa AK |
2886 | if (iwl4965_set_mode(priv, conf->type) == -EAGAIN) |
2887 | /* we are not ready, will run again when ready */ | |
2888 | set_bit(STATUS_MODE_PENDING, &priv->status); | |
5a66926a | 2889 | |
b481de9c ZY |
2890 | mutex_unlock(&priv->mutex); |
2891 | ||
5a66926a | 2892 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2893 | return 0; |
2894 | } | |
2895 | ||
2896 | /** | |
bb8c093b | 2897 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
2898 | * |
2899 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
2900 | * be set inappropriately and the driver currently sets the hardware up to | |
2901 | * use it whenever needed. | |
2902 | */ | |
bb8c093b | 2903 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
b481de9c | 2904 | { |
c79dd5b5 | 2905 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 2906 | const struct iwl_channel_info *ch_info; |
b481de9c | 2907 | unsigned long flags; |
76bb77e0 | 2908 | int ret = 0; |
82a66bbb | 2909 | u16 channel; |
b481de9c ZY |
2910 | |
2911 | mutex_lock(&priv->mutex); | |
8318d78a | 2912 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 2913 | |
12342c47 ZY |
2914 | priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP); |
2915 | ||
14a08a7f | 2916 | if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) { |
64e72c3e | 2917 | IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n"); |
14a08a7f | 2918 | goto out; |
64e72c3e MA |
2919 | } |
2920 | ||
14a08a7f EG |
2921 | if (!conf->radio_enabled) |
2922 | iwl_radio_kill_sw_disable_radio(priv); | |
2923 | ||
fee1247a | 2924 | if (!iwl_is_ready(priv)) { |
b481de9c | 2925 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
2926 | ret = -EIO; |
2927 | goto out; | |
b481de9c ZY |
2928 | } |
2929 | ||
1ea87396 | 2930 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 2931 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 ZY |
2932 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
2933 | set_bit(STATUS_CONF_PENDING, &priv->status); | |
b481de9c | 2934 | mutex_unlock(&priv->mutex); |
a0646470 | 2935 | return 0; |
b481de9c ZY |
2936 | } |
2937 | ||
82a66bbb TW |
2938 | channel = ieee80211_frequency_to_channel(conf->channel->center_freq); |
2939 | ch_info = iwl_get_channel_info(priv, conf->channel->band, channel); | |
b481de9c | 2940 | if (!is_channel_valid(ch_info)) { |
b481de9c | 2941 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
76bb77e0 ZY |
2942 | ret = -EINVAL; |
2943 | goto out; | |
b481de9c ZY |
2944 | } |
2945 | ||
398f9e76 AK |
2946 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS && |
2947 | !is_channel_ibss(ch_info)) { | |
2948 | IWL_ERROR("channel %d in band %d not IBSS channel\n", | |
2949 | conf->channel->hw_value, conf->channel->band); | |
2950 | ret = -EINVAL; | |
2951 | goto out; | |
2952 | } | |
2953 | ||
82a66bbb TW |
2954 | spin_lock_irqsave(&priv->lock, flags); |
2955 | ||
78330fdd | 2956 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
2957 | * from any ht related info since 2.4 does not |
2958 | * support ht */ | |
82a66bbb | 2959 | if ((le16_to_cpu(priv->staging_rxon.channel) != channel) |
b481de9c ZY |
2960 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
2961 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
2962 | #endif | |
2963 | ) | |
2964 | priv->staging_rxon.flags = 0; | |
b481de9c | 2965 | |
82a66bbb | 2966 | iwl_set_rxon_channel(priv, conf->channel->band, channel); |
b481de9c | 2967 | |
82a66bbb | 2968 | iwl_set_flags_for_band(priv, conf->channel->band); |
b481de9c ZY |
2969 | |
2970 | /* The list of supported rates and rate mask can be different | |
8318d78a | 2971 | * for each band; since the band may have changed, reset |
b481de9c | 2972 | * the rate mask to what mac80211 lists */ |
bb8c093b | 2973 | iwl4965_set_rate(priv); |
b481de9c ZY |
2974 | |
2975 | spin_unlock_irqrestore(&priv->lock, flags); | |
2976 | ||
2977 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
2978 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 2979 | iwl4965_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 2980 | goto out; |
b481de9c ZY |
2981 | } |
2982 | #endif | |
2983 | ||
b481de9c ZY |
2984 | if (!conf->radio_enabled) { |
2985 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 2986 | goto out; |
b481de9c ZY |
2987 | } |
2988 | ||
fee1247a | 2989 | if (iwl_is_rfkill(priv)) { |
b481de9c | 2990 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
2991 | ret = -EIO; |
2992 | goto out; | |
b481de9c ZY |
2993 | } |
2994 | ||
630fe9b6 TW |
2995 | IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n", |
2996 | priv->tx_power_user_lmt, conf->power_level); | |
2997 | ||
2998 | iwl_set_tx_power(priv, conf->power_level, false); | |
2999 | ||
bb8c093b | 3000 | iwl4965_set_rate(priv); |
b481de9c ZY |
3001 | |
3002 | if (memcmp(&priv->active_rxon, | |
3003 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 3004 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3005 | else |
3006 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
3007 | ||
3008 | IWL_DEBUG_MAC80211("leave\n"); | |
3009 | ||
a0646470 ZY |
3010 | out: |
3011 | clear_bit(STATUS_CONF_PENDING, &priv->status); | |
5a66926a | 3012 | mutex_unlock(&priv->mutex); |
76bb77e0 | 3013 | return ret; |
b481de9c ZY |
3014 | } |
3015 | ||
c79dd5b5 | 3016 | static void iwl4965_config_ap(struct iwl_priv *priv) |
b481de9c | 3017 | { |
857485c0 | 3018 | int ret = 0; |
b481de9c | 3019 | |
d986bcd1 | 3020 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
3021 | return; |
3022 | ||
3023 | /* The following should be done only at AP bring up */ | |
5d1e2325 | 3024 | if (!(iwl_is_associated(priv))) { |
b481de9c ZY |
3025 | |
3026 | /* RXON - unassoc (to set timing command) */ | |
3027 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 3028 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3029 | |
3030 | /* RXON Timing */ | |
bb8c093b CH |
3031 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
3032 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 3033 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 3034 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 3035 | if (ret) |
b481de9c ZY |
3036 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
3037 | "Attempting to continue.\n"); | |
3038 | ||
c7de35cd | 3039 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
3040 | |
3041 | /* FIXME: what should be the assoc_id for AP? */ | |
3042 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
3043 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
3044 | priv->staging_rxon.flags |= | |
3045 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
3046 | else | |
3047 | priv->staging_rxon.flags &= | |
3048 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
3049 | ||
3050 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
3051 | if (priv->assoc_capability & | |
3052 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
3053 | priv->staging_rxon.flags |= | |
3054 | RXON_FLG_SHORT_SLOT_MSK; | |
3055 | else | |
3056 | priv->staging_rxon.flags &= | |
3057 | ~RXON_FLG_SHORT_SLOT_MSK; | |
3058 | ||
3059 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
3060 | priv->staging_rxon.flags &= | |
3061 | ~RXON_FLG_SHORT_SLOT_MSK; | |
3062 | } | |
3063 | /* restore RXON assoc */ | |
3064 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 3065 | iwl4965_commit_rxon(priv); |
bb8c093b | 3066 | iwl4965_activate_qos(priv, 1); |
4f40e4d9 | 3067 | iwl_rxon_add_station(priv, iwl_bcast_addr, 0); |
e1493deb | 3068 | } |
bb8c093b | 3069 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
3070 | |
3071 | /* FIXME - we need to add code here to detect a totally new | |
3072 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
3073 | * clear sta table, add BCAST sta... */ | |
3074 | } | |
3075 | ||
32bfd35d JB |
3076 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, |
3077 | struct ieee80211_vif *vif, | |
b481de9c ZY |
3078 | struct ieee80211_if_conf *conf) |
3079 | { | |
c79dd5b5 | 3080 | struct iwl_priv *priv = hw->priv; |
0795af57 | 3081 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
3082 | unsigned long flags; |
3083 | int rc; | |
3084 | ||
3085 | if (conf == NULL) | |
3086 | return -EIO; | |
3087 | ||
b716bb91 EG |
3088 | if (priv->vif != vif) { |
3089 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
3090 | return 0; |
3091 | } | |
3092 | ||
b481de9c ZY |
3093 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && |
3094 | (!conf->beacon || !conf->ssid_len)) { | |
3095 | IWL_DEBUG_MAC80211 | |
3096 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
3097 | return 0; | |
3098 | } | |
3099 | ||
fee1247a | 3100 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
3101 | return -EAGAIN; |
3102 | ||
b481de9c ZY |
3103 | mutex_lock(&priv->mutex); |
3104 | ||
b481de9c | 3105 | if (conf->bssid) |
0795af57 JP |
3106 | IWL_DEBUG_MAC80211("bssid: %s\n", |
3107 | print_mac(mac, conf->bssid)); | |
b481de9c | 3108 | |
4150c572 JB |
3109 | /* |
3110 | * very dubious code was here; the probe filtering flag is never set: | |
3111 | * | |
b481de9c ZY |
3112 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
3113 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 3114 | */ |
b481de9c ZY |
3115 | |
3116 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
3117 | if (!conf->bssid) { | |
3118 | conf->bssid = priv->mac_addr; | |
3119 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
0795af57 JP |
3120 | IWL_DEBUG_MAC80211("bssid was set to: %s\n", |
3121 | print_mac(mac, conf->bssid)); | |
b481de9c ZY |
3122 | } |
3123 | if (priv->ibss_beacon) | |
3124 | dev_kfree_skb(priv->ibss_beacon); | |
3125 | ||
3126 | priv->ibss_beacon = conf->beacon; | |
3127 | } | |
3128 | ||
fee1247a | 3129 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
3130 | goto done; |
3131 | ||
b481de9c ZY |
3132 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
3133 | !is_multicast_ether_addr(conf->bssid)) { | |
3134 | /* If there is currently a HW scan going on in the background | |
3135 | * then we need to cancel it else the RXON below will fail. */ | |
2a421b91 | 3136 | if (iwl_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
3137 | IWL_WARNING("Aborted scan still in progress " |
3138 | "after 100ms\n"); | |
3139 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
3140 | mutex_unlock(&priv->mutex); | |
3141 | return -EAGAIN; | |
3142 | } | |
3143 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
3144 | ||
3145 | /* TODO: Audit driver for usage of these members and see | |
3146 | * if mac80211 deprecates them (priv->bssid looks like it | |
3147 | * shouldn't be there, but I haven't scanned the IBSS code | |
3148 | * to verify) - jpk */ | |
3149 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
3150 | ||
3151 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 3152 | iwl4965_config_ap(priv); |
b481de9c | 3153 | else { |
bb8c093b | 3154 | rc = iwl4965_commit_rxon(priv); |
b481de9c | 3155 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc) |
4f40e4d9 | 3156 | iwl_rxon_add_station( |
b481de9c ZY |
3157 | priv, priv->active_rxon.bssid_addr, 1); |
3158 | } | |
3159 | ||
3160 | } else { | |
2a421b91 | 3161 | iwl_scan_cancel_timeout(priv, 100); |
b481de9c | 3162 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3163 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3164 | } |
3165 | ||
fde3571f | 3166 | done: |
b481de9c ZY |
3167 | spin_lock_irqsave(&priv->lock, flags); |
3168 | if (!conf->ssid_len) | |
3169 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3170 | else | |
3171 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
3172 | ||
3173 | priv->essid_len = conf->ssid_len; | |
3174 | spin_unlock_irqrestore(&priv->lock, flags); | |
3175 | ||
3176 | IWL_DEBUG_MAC80211("leave\n"); | |
3177 | mutex_unlock(&priv->mutex); | |
3178 | ||
3179 | return 0; | |
3180 | } | |
3181 | ||
bb8c093b | 3182 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
3183 | unsigned int changed_flags, |
3184 | unsigned int *total_flags, | |
3185 | int mc_count, struct dev_addr_list *mc_list) | |
3186 | { | |
3187 | /* | |
3188 | * XXX: dummy | |
bb8c093b | 3189 | * see also iwl4965_connection_init_rx_config |
4150c572 | 3190 | */ |
4419e39b AK |
3191 | struct iwl_priv *priv = hw->priv; |
3192 | int new_flags = 0; | |
3193 | if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) { | |
3194 | if (*total_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) { | |
3195 | IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n", | |
3196 | IEEE80211_IF_TYPE_MNTR, | |
3197 | changed_flags, *total_flags); | |
3198 | /* queue work 'cuz mac80211 is holding a lock which | |
3199 | * prevents us from issuing (synchronous) f/w cmds */ | |
3200 | queue_work(priv->workqueue, &priv->set_monitor); | |
3201 | new_flags &= FIF_PROMISC_IN_BSS | | |
3202 | FIF_OTHER_BSS | | |
3203 | FIF_ALLMULTI; | |
3204 | } | |
3205 | } | |
3206 | *total_flags = new_flags; | |
4150c572 JB |
3207 | } |
3208 | ||
bb8c093b | 3209 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
3210 | struct ieee80211_if_init_conf *conf) |
3211 | { | |
c79dd5b5 | 3212 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3213 | |
3214 | IWL_DEBUG_MAC80211("enter\n"); | |
3215 | ||
3216 | mutex_lock(&priv->mutex); | |
948c171c | 3217 | |
fee1247a | 3218 | if (iwl_is_ready_rf(priv)) { |
2a421b91 | 3219 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f MA |
3220 | cancel_delayed_work(&priv->post_associate); |
3221 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
3222 | iwl4965_commit_rxon(priv); | |
3223 | } | |
32bfd35d JB |
3224 | if (priv->vif == conf->vif) { |
3225 | priv->vif = NULL; | |
b481de9c ZY |
3226 | memset(priv->bssid, 0, ETH_ALEN); |
3227 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3228 | priv->essid_len = 0; | |
3229 | } | |
3230 | mutex_unlock(&priv->mutex); | |
3231 | ||
3232 | IWL_DEBUG_MAC80211("leave\n"); | |
3233 | ||
3234 | } | |
471b3efd | 3235 | |
3109ece1 | 3236 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
471b3efd JB |
3237 | static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, |
3238 | struct ieee80211_vif *vif, | |
3239 | struct ieee80211_bss_conf *bss_conf, | |
3240 | u32 changes) | |
220173b0 | 3241 | { |
c79dd5b5 | 3242 | struct iwl_priv *priv = hw->priv; |
220173b0 | 3243 | |
3109ece1 TW |
3244 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
3245 | ||
471b3efd | 3246 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
3247 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
3248 | bss_conf->use_short_preamble); | |
471b3efd | 3249 | if (bss_conf->use_short_preamble) |
220173b0 TW |
3250 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
3251 | else | |
3252 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
3253 | } | |
3254 | ||
471b3efd | 3255 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 3256 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 3257 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
3258 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
3259 | else | |
3260 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
3261 | } | |
3262 | ||
98952d5d | 3263 | if (changes & BSS_CHANGED_HT) { |
3109ece1 | 3264 | IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht); |
98952d5d | 3265 | iwl4965_ht_conf(priv, bss_conf); |
c7de35cd | 3266 | iwl_set_rxon_chain(priv); |
98952d5d TW |
3267 | } |
3268 | ||
471b3efd | 3269 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 3270 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
3271 | /* This should never happen as this function should |
3272 | * never be called from interrupt context. */ | |
3273 | if (WARN_ON_ONCE(in_interrupt())) | |
3274 | return; | |
3109ece1 TW |
3275 | if (bss_conf->assoc) { |
3276 | priv->assoc_id = bss_conf->aid; | |
3277 | priv->beacon_int = bss_conf->beacon_int; | |
3278 | priv->timestamp = bss_conf->timestamp; | |
3279 | priv->assoc_capability = bss_conf->assoc_capability; | |
3280 | priv->next_scan_jiffies = jiffies + | |
3281 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 RC |
3282 | mutex_lock(&priv->mutex); |
3283 | iwl4965_post_associate(priv); | |
3284 | mutex_unlock(&priv->mutex); | |
3109ece1 TW |
3285 | } else { |
3286 | priv->assoc_id = 0; | |
3287 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
3288 | } | |
3289 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
3290 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 3291 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
3292 | } |
3293 | ||
220173b0 | 3294 | } |
b481de9c | 3295 | |
bb8c093b | 3296 | static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len) |
b481de9c ZY |
3297 | { |
3298 | int rc = 0; | |
3299 | unsigned long flags; | |
c79dd5b5 | 3300 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3301 | |
3302 | IWL_DEBUG_MAC80211("enter\n"); | |
3303 | ||
052c4b9f | 3304 | mutex_lock(&priv->mutex); |
b481de9c ZY |
3305 | spin_lock_irqsave(&priv->lock, flags); |
3306 | ||
fee1247a | 3307 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3308 | rc = -EIO; |
3309 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); | |
3310 | goto out_unlock; | |
3311 | } | |
3312 | ||
3313 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */ | |
3314 | rc = -EIO; | |
3315 | IWL_ERROR("ERROR: APs don't scan\n"); | |
3316 | goto out_unlock; | |
3317 | } | |
3318 | ||
7878a5a4 MA |
3319 | /* we don't schedule scan within next_scan_jiffies period */ |
3320 | if (priv->next_scan_jiffies && | |
3321 | time_after(priv->next_scan_jiffies, jiffies)) { | |
3322 | rc = -EAGAIN; | |
3323 | goto out_unlock; | |
3324 | } | |
b481de9c | 3325 | /* if we just finished scan ask for delay */ |
7878a5a4 MA |
3326 | if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies + |
3327 | IWL_DELAY_NEXT_SCAN, jiffies)) { | |
b481de9c ZY |
3328 | rc = -EAGAIN; |
3329 | goto out_unlock; | |
3330 | } | |
3331 | if (len) { | |
7878a5a4 | 3332 | IWL_DEBUG_SCAN("direct scan for %s [%d]\n ", |
2a421b91 | 3333 | iwl_escape_essid(ssid, len), (int)len); |
b481de9c ZY |
3334 | |
3335 | priv->one_direct_scan = 1; | |
3336 | priv->direct_ssid_len = (u8) | |
3337 | min((u8) len, (u8) IW_ESSID_MAX_SIZE); | |
3338 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); | |
948c171c MA |
3339 | } else |
3340 | priv->one_direct_scan = 0; | |
b481de9c | 3341 | |
2a421b91 | 3342 | rc = iwl_scan_initiate(priv); |
b481de9c ZY |
3343 | |
3344 | IWL_DEBUG_MAC80211("leave\n"); | |
3345 | ||
3346 | out_unlock: | |
3347 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 3348 | mutex_unlock(&priv->mutex); |
b481de9c ZY |
3349 | |
3350 | return rc; | |
3351 | } | |
3352 | ||
ab885f8c EG |
3353 | static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
3354 | struct ieee80211_key_conf *keyconf, const u8 *addr, | |
3355 | u32 iv32, u16 *phase1key) | |
3356 | { | |
3357 | struct iwl_priv *priv = hw->priv; | |
3358 | u8 sta_id = IWL_INVALID_STATION; | |
3359 | unsigned long flags; | |
3360 | __le16 key_flags = 0; | |
3361 | int i; | |
3362 | DECLARE_MAC_BUF(mac); | |
3363 | ||
3364 | IWL_DEBUG_MAC80211("enter\n"); | |
3365 | ||
947b13a7 | 3366 | sta_id = iwl_find_station(priv, addr); |
ab885f8c EG |
3367 | if (sta_id == IWL_INVALID_STATION) { |
3368 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
3369 | print_mac(mac, addr)); | |
3370 | return; | |
3371 | } | |
3372 | ||
2a421b91 | 3373 | iwl_scan_cancel_timeout(priv, 100); |
ab885f8c EG |
3374 | |
3375 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
3376 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
3377 | key_flags &= ~STA_KEY_FLG_INVALID; | |
3378 | ||
5425e490 | 3379 | if (sta_id == priv->hw_params.bcast_sta_id) |
ab885f8c EG |
3380 | key_flags |= STA_KEY_MULTICAST_MSK; |
3381 | ||
3382 | spin_lock_irqsave(&priv->sta_lock, flags); | |
3383 | ||
ab885f8c EG |
3384 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
3385 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
3386 | ||
3387 | for (i = 0; i < 5; i++) | |
3388 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
3389 | cpu_to_le16(phase1key[i]); | |
3390 | ||
3391 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
3392 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
3393 | ||
133636de | 3394 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
ab885f8c EG |
3395 | |
3396 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
3397 | ||
3398 | IWL_DEBUG_MAC80211("leave\n"); | |
3399 | } | |
3400 | ||
bb8c093b | 3401 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
3402 | const u8 *local_addr, const u8 *addr, |
3403 | struct ieee80211_key_conf *key) | |
3404 | { | |
c79dd5b5 | 3405 | struct iwl_priv *priv = hw->priv; |
0795af57 | 3406 | DECLARE_MAC_BUF(mac); |
deb09c43 EG |
3407 | int ret = 0; |
3408 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 3409 | u8 is_default_wep_key = 0; |
b481de9c ZY |
3410 | |
3411 | IWL_DEBUG_MAC80211("enter\n"); | |
3412 | ||
099b40b7 | 3413 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
3414 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
3415 | return -EOPNOTSUPP; | |
3416 | } | |
3417 | ||
3418 | if (is_zero_ether_addr(addr)) | |
3419 | /* only support pairwise keys */ | |
3420 | return -EOPNOTSUPP; | |
3421 | ||
947b13a7 | 3422 | sta_id = iwl_find_station(priv, addr); |
6974e363 EG |
3423 | if (sta_id == IWL_INVALID_STATION) { |
3424 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
3425 | print_mac(mac, addr)); | |
3426 | return -EINVAL; | |
b481de9c | 3427 | |
deb09c43 | 3428 | } |
b481de9c | 3429 | |
6974e363 | 3430 | mutex_lock(&priv->mutex); |
2a421b91 | 3431 | iwl_scan_cancel_timeout(priv, 100); |
6974e363 EG |
3432 | mutex_unlock(&priv->mutex); |
3433 | ||
3434 | /* If we are getting WEP group key and we didn't receive any key mapping | |
3435 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
3436 | * in 1X mode. | |
3437 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 3438 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
6974e363 EG |
3439 | priv->iw_mode != IEEE80211_IF_TYPE_AP) { |
3440 | if (cmd == SET_KEY) | |
3441 | is_default_wep_key = !priv->key_mapping_key; | |
3442 | else | |
ccc038ab EG |
3443 | is_default_wep_key = |
3444 | (key->hw_key_idx == HW_KEY_DEFAULT); | |
6974e363 | 3445 | } |
052c4b9f | 3446 | |
b481de9c | 3447 | switch (cmd) { |
deb09c43 | 3448 | case SET_KEY: |
6974e363 EG |
3449 | if (is_default_wep_key) |
3450 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 3451 | else |
7480513f | 3452 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3453 | |
3454 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
3455 | break; |
3456 | case DISABLE_KEY: | |
6974e363 EG |
3457 | if (is_default_wep_key) |
3458 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 3459 | else |
3ec47732 | 3460 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3461 | |
3462 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
3463 | break; |
3464 | default: | |
deb09c43 | 3465 | ret = -EINVAL; |
b481de9c ZY |
3466 | } |
3467 | ||
3468 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 3469 | |
deb09c43 | 3470 | return ret; |
b481de9c ZY |
3471 | } |
3472 | ||
e100bb64 | 3473 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
3474 | const struct ieee80211_tx_queue_params *params) |
3475 | { | |
c79dd5b5 | 3476 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3477 | unsigned long flags; |
3478 | int q; | |
b481de9c ZY |
3479 | |
3480 | IWL_DEBUG_MAC80211("enter\n"); | |
3481 | ||
fee1247a | 3482 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3483 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3484 | return -EIO; | |
3485 | } | |
3486 | ||
3487 | if (queue >= AC_NUM) { | |
3488 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
3489 | return 0; | |
3490 | } | |
3491 | ||
b481de9c ZY |
3492 | if (!priv->qos_data.qos_enable) { |
3493 | priv->qos_data.qos_active = 0; | |
3494 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
3495 | return 0; | |
3496 | } | |
3497 | q = AC_NUM - 1 - queue; | |
3498 | ||
3499 | spin_lock_irqsave(&priv->lock, flags); | |
3500 | ||
3501 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
3502 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
3503 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
3504 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 3505 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
3506 | |
3507 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
3508 | priv->qos_data.qos_active = 1; | |
3509 | ||
3510 | spin_unlock_irqrestore(&priv->lock, flags); | |
3511 | ||
3512 | mutex_lock(&priv->mutex); | |
3513 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 3514 | iwl4965_activate_qos(priv, 1); |
3109ece1 | 3515 | else if (priv->assoc_id && iwl_is_associated(priv)) |
bb8c093b | 3516 | iwl4965_activate_qos(priv, 0); |
b481de9c ZY |
3517 | |
3518 | mutex_unlock(&priv->mutex); | |
3519 | ||
b481de9c ZY |
3520 | IWL_DEBUG_MAC80211("leave\n"); |
3521 | return 0; | |
3522 | } | |
3523 | ||
bb8c093b | 3524 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3525 | struct ieee80211_tx_queue_stats *stats) |
3526 | { | |
c79dd5b5 | 3527 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3528 | int i, avail; |
16466903 | 3529 | struct iwl_tx_queue *txq; |
443cfd45 | 3530 | struct iwl_queue *q; |
b481de9c ZY |
3531 | unsigned long flags; |
3532 | ||
3533 | IWL_DEBUG_MAC80211("enter\n"); | |
3534 | ||
fee1247a | 3535 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3536 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3537 | return -EIO; | |
3538 | } | |
3539 | ||
3540 | spin_lock_irqsave(&priv->lock, flags); | |
3541 | ||
3542 | for (i = 0; i < AC_NUM; i++) { | |
3543 | txq = &priv->txq[i]; | |
3544 | q = &txq->q; | |
443cfd45 | 3545 | avail = iwl_queue_space(q); |
b481de9c | 3546 | |
57ffc589 JB |
3547 | stats[i].len = q->n_window - avail; |
3548 | stats[i].limit = q->n_window - q->high_mark; | |
3549 | stats[i].count = q->n_window; | |
b481de9c ZY |
3550 | |
3551 | } | |
3552 | spin_unlock_irqrestore(&priv->lock, flags); | |
3553 | ||
3554 | IWL_DEBUG_MAC80211("leave\n"); | |
3555 | ||
3556 | return 0; | |
3557 | } | |
3558 | ||
bb8c093b | 3559 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3560 | struct ieee80211_low_level_stats *stats) |
3561 | { | |
bf403db8 EK |
3562 | struct iwl_priv *priv = hw->priv; |
3563 | ||
3564 | priv = hw->priv; | |
b481de9c ZY |
3565 | IWL_DEBUG_MAC80211("enter\n"); |
3566 | IWL_DEBUG_MAC80211("leave\n"); | |
3567 | ||
3568 | return 0; | |
3569 | } | |
3570 | ||
bb8c093b | 3571 | static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw) |
b481de9c | 3572 | { |
bf403db8 EK |
3573 | struct iwl_priv *priv; |
3574 | ||
3575 | priv = hw->priv; | |
b481de9c ZY |
3576 | IWL_DEBUG_MAC80211("enter\n"); |
3577 | IWL_DEBUG_MAC80211("leave\n"); | |
3578 | ||
3579 | return 0; | |
3580 | } | |
3581 | ||
bb8c093b | 3582 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 3583 | { |
c79dd5b5 | 3584 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3585 | unsigned long flags; |
3586 | ||
3587 | mutex_lock(&priv->mutex); | |
3588 | IWL_DEBUG_MAC80211("enter\n"); | |
3589 | ||
3590 | priv->lq_mngr.lq_ready = 0; | |
b481de9c | 3591 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 3592 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 3593 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3594 | |
c7de35cd | 3595 | iwl_reset_qos(priv); |
b481de9c ZY |
3596 | |
3597 | cancel_delayed_work(&priv->post_associate); | |
3598 | ||
3599 | spin_lock_irqsave(&priv->lock, flags); | |
3600 | priv->assoc_id = 0; | |
3601 | priv->assoc_capability = 0; | |
b481de9c ZY |
3602 | priv->assoc_station_added = 0; |
3603 | ||
3604 | /* new association get rid of ibss beacon skb */ | |
3605 | if (priv->ibss_beacon) | |
3606 | dev_kfree_skb(priv->ibss_beacon); | |
3607 | ||
3608 | priv->ibss_beacon = NULL; | |
3609 | ||
3610 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 3611 | priv->timestamp = 0; |
b481de9c ZY |
3612 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA)) |
3613 | priv->beacon_int = 0; | |
3614 | ||
3615 | spin_unlock_irqrestore(&priv->lock, flags); | |
3616 | ||
fee1247a | 3617 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
3618 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
3619 | mutex_unlock(&priv->mutex); | |
3620 | return; | |
3621 | } | |
3622 | ||
052c4b9f | 3623 | /* we are restarting association process |
3624 | * clear RXON_FILTER_ASSOC_MSK bit | |
3625 | */ | |
3626 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
2a421b91 | 3627 | iwl_scan_cancel_timeout(priv, 100); |
052c4b9f | 3628 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3629 | iwl4965_commit_rxon(priv); |
052c4b9f | 3630 | } |
3631 | ||
5da4b55f MA |
3632 | iwl_power_update_mode(priv, 0); |
3633 | ||
b481de9c ZY |
3634 | /* Per mac80211.h: This is only used in IBSS mode... */ |
3635 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
052c4b9f | 3636 | |
b481de9c ZY |
3637 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
3638 | mutex_unlock(&priv->mutex); | |
3639 | return; | |
3640 | } | |
3641 | ||
bb8c093b | 3642 | iwl4965_set_rate(priv); |
b481de9c ZY |
3643 | |
3644 | mutex_unlock(&priv->mutex); | |
3645 | ||
3646 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
3647 | } |
3648 | ||
e039fa4a | 3649 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 3650 | { |
c79dd5b5 | 3651 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3652 | unsigned long flags; |
3653 | ||
3654 | mutex_lock(&priv->mutex); | |
3655 | IWL_DEBUG_MAC80211("enter\n"); | |
3656 | ||
fee1247a | 3657 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3658 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3659 | mutex_unlock(&priv->mutex); | |
3660 | return -EIO; | |
3661 | } | |
3662 | ||
3663 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
3664 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); | |
3665 | mutex_unlock(&priv->mutex); | |
3666 | return -EIO; | |
3667 | } | |
3668 | ||
3669 | spin_lock_irqsave(&priv->lock, flags); | |
3670 | ||
3671 | if (priv->ibss_beacon) | |
3672 | dev_kfree_skb(priv->ibss_beacon); | |
3673 | ||
3674 | priv->ibss_beacon = skb; | |
3675 | ||
3676 | priv->assoc_id = 0; | |
3677 | ||
3678 | IWL_DEBUG_MAC80211("leave\n"); | |
3679 | spin_unlock_irqrestore(&priv->lock, flags); | |
3680 | ||
c7de35cd | 3681 | iwl_reset_qos(priv); |
b481de9c | 3682 | |
c46fbefa | 3683 | iwl4965_post_associate(priv); |
b481de9c ZY |
3684 | |
3685 | mutex_unlock(&priv->mutex); | |
3686 | ||
3687 | return 0; | |
3688 | } | |
3689 | ||
b481de9c ZY |
3690 | /***************************************************************************** |
3691 | * | |
3692 | * sysfs attributes | |
3693 | * | |
3694 | *****************************************************************************/ | |
3695 | ||
0a6857e7 | 3696 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
3697 | |
3698 | /* | |
3699 | * The following adds a new attribute to the sysfs representation | |
3700 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
3701 | * used for controlling the debug level. | |
3702 | * | |
3703 | * See the level definitions in iwl for details. | |
3704 | */ | |
3705 | ||
8cf769c6 EK |
3706 | static ssize_t show_debug_level(struct device *d, |
3707 | struct device_attribute *attr, char *buf) | |
b481de9c | 3708 | { |
8cf769c6 EK |
3709 | struct iwl_priv *priv = d->driver_data; |
3710 | ||
3711 | return sprintf(buf, "0x%08X\n", priv->debug_level); | |
b481de9c | 3712 | } |
8cf769c6 EK |
3713 | static ssize_t store_debug_level(struct device *d, |
3714 | struct device_attribute *attr, | |
b481de9c ZY |
3715 | const char *buf, size_t count) |
3716 | { | |
8cf769c6 | 3717 | struct iwl_priv *priv = d->driver_data; |
b481de9c ZY |
3718 | char *p = (char *)buf; |
3719 | u32 val; | |
3720 | ||
3721 | val = simple_strtoul(p, &p, 0); | |
3722 | if (p == buf) | |
3723 | printk(KERN_INFO DRV_NAME | |
3724 | ": %s is not in hex or decimal form.\n", buf); | |
3725 | else | |
8cf769c6 | 3726 | priv->debug_level = val; |
b481de9c ZY |
3727 | |
3728 | return strnlen(buf, count); | |
3729 | } | |
3730 | ||
8cf769c6 EK |
3731 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, |
3732 | show_debug_level, store_debug_level); | |
3733 | ||
b481de9c | 3734 | |
0a6857e7 | 3735 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 3736 | |
b481de9c | 3737 | |
bc6f59bc TW |
3738 | static ssize_t show_version(struct device *d, |
3739 | struct device_attribute *attr, char *buf) | |
3740 | { | |
3741 | struct iwl_priv *priv = d->driver_data; | |
885ba202 | 3742 | struct iwl_alive_resp *palive = &priv->card_alive; |
f236a265 TW |
3743 | ssize_t pos = 0; |
3744 | u16 eeprom_ver; | |
bc6f59bc TW |
3745 | |
3746 | if (palive->is_valid) | |
f236a265 TW |
3747 | pos += sprintf(buf + pos, |
3748 | "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n" | |
3749 | "fw type: 0x%01X 0x%01X\n", | |
bc6f59bc TW |
3750 | palive->ucode_major, palive->ucode_minor, |
3751 | palive->sw_rev[0], palive->sw_rev[1], | |
3752 | palive->ver_type, palive->ver_subtype); | |
bc6f59bc | 3753 | else |
f236a265 TW |
3754 | pos += sprintf(buf + pos, "fw not loaded\n"); |
3755 | ||
3756 | if (priv->eeprom) { | |
3757 | eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION); | |
3758 | pos += sprintf(buf + pos, "EEPROM version: 0x%x\n", | |
3759 | eeprom_ver); | |
3760 | } else { | |
3761 | pos += sprintf(buf + pos, "EEPROM not initialzed\n"); | |
3762 | } | |
3763 | ||
3764 | return pos; | |
bc6f59bc TW |
3765 | } |
3766 | ||
3767 | static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL); | |
3768 | ||
b481de9c ZY |
3769 | static ssize_t show_temperature(struct device *d, |
3770 | struct device_attribute *attr, char *buf) | |
3771 | { | |
c79dd5b5 | 3772 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 3773 | |
fee1247a | 3774 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
3775 | return -EAGAIN; |
3776 | ||
91dbc5bd | 3777 | return sprintf(buf, "%d\n", priv->temperature); |
b481de9c ZY |
3778 | } |
3779 | ||
3780 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
3781 | ||
3782 | static ssize_t show_rs_window(struct device *d, | |
3783 | struct device_attribute *attr, | |
3784 | char *buf) | |
3785 | { | |
c79dd5b5 | 3786 | struct iwl_priv *priv = d->driver_data; |
bb8c093b | 3787 | return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID); |
b481de9c ZY |
3788 | } |
3789 | static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL); | |
3790 | ||
3791 | static ssize_t show_tx_power(struct device *d, | |
3792 | struct device_attribute *attr, char *buf) | |
3793 | { | |
c79dd5b5 | 3794 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
630fe9b6 | 3795 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); |
b481de9c ZY |
3796 | } |
3797 | ||
3798 | static ssize_t store_tx_power(struct device *d, | |
3799 | struct device_attribute *attr, | |
3800 | const char *buf, size_t count) | |
3801 | { | |
c79dd5b5 | 3802 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3803 | char *p = (char *)buf; |
3804 | u32 val; | |
3805 | ||
3806 | val = simple_strtoul(p, &p, 10); | |
3807 | if (p == buf) | |
3808 | printk(KERN_INFO DRV_NAME | |
3809 | ": %s is not in decimal form.\n", buf); | |
3810 | else | |
630fe9b6 | 3811 | iwl_set_tx_power(priv, val, false); |
b481de9c ZY |
3812 | |
3813 | return count; | |
3814 | } | |
3815 | ||
3816 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
3817 | ||
3818 | static ssize_t show_flags(struct device *d, | |
3819 | struct device_attribute *attr, char *buf) | |
3820 | { | |
c79dd5b5 | 3821 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3822 | |
3823 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
3824 | } | |
3825 | ||
3826 | static ssize_t store_flags(struct device *d, | |
3827 | struct device_attribute *attr, | |
3828 | const char *buf, size_t count) | |
3829 | { | |
c79dd5b5 | 3830 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3831 | u32 flags = simple_strtoul(buf, NULL, 0); |
3832 | ||
3833 | mutex_lock(&priv->mutex); | |
3834 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
3835 | /* Cancel any currently running scans... */ | |
2a421b91 | 3836 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3837 | IWL_WARNING("Could not cancel scan.\n"); |
3838 | else { | |
3839 | IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n", | |
3840 | flags); | |
3841 | priv->staging_rxon.flags = cpu_to_le32(flags); | |
bb8c093b | 3842 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3843 | } |
3844 | } | |
3845 | mutex_unlock(&priv->mutex); | |
3846 | ||
3847 | return count; | |
3848 | } | |
3849 | ||
3850 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
3851 | ||
3852 | static ssize_t show_filter_flags(struct device *d, | |
3853 | struct device_attribute *attr, char *buf) | |
3854 | { | |
c79dd5b5 | 3855 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3856 | |
3857 | return sprintf(buf, "0x%04X\n", | |
3858 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
3859 | } | |
3860 | ||
3861 | static ssize_t store_filter_flags(struct device *d, | |
3862 | struct device_attribute *attr, | |
3863 | const char *buf, size_t count) | |
3864 | { | |
c79dd5b5 | 3865 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3866 | u32 filter_flags = simple_strtoul(buf, NULL, 0); |
3867 | ||
3868 | mutex_lock(&priv->mutex); | |
3869 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
3870 | /* Cancel any currently running scans... */ | |
2a421b91 | 3871 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3872 | IWL_WARNING("Could not cancel scan.\n"); |
3873 | else { | |
3874 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
3875 | "0x%04X\n", filter_flags); | |
3876 | priv->staging_rxon.filter_flags = | |
3877 | cpu_to_le32(filter_flags); | |
bb8c093b | 3878 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3879 | } |
3880 | } | |
3881 | mutex_unlock(&priv->mutex); | |
3882 | ||
3883 | return count; | |
3884 | } | |
3885 | ||
3886 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
3887 | store_filter_flags); | |
3888 | ||
c8b0e6e1 | 3889 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
3890 | |
3891 | static ssize_t show_measurement(struct device *d, | |
3892 | struct device_attribute *attr, char *buf) | |
3893 | { | |
c79dd5b5 | 3894 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 3895 | struct iwl4965_spectrum_notification measure_report; |
b481de9c ZY |
3896 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
3897 | u8 *data = (u8 *) & measure_report; | |
3898 | unsigned long flags; | |
3899 | ||
3900 | spin_lock_irqsave(&priv->lock, flags); | |
3901 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
3902 | spin_unlock_irqrestore(&priv->lock, flags); | |
3903 | return 0; | |
3904 | } | |
3905 | memcpy(&measure_report, &priv->measure_report, size); | |
3906 | priv->measurement_status = 0; | |
3907 | spin_unlock_irqrestore(&priv->lock, flags); | |
3908 | ||
3909 | while (size && (PAGE_SIZE - len)) { | |
3910 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
3911 | PAGE_SIZE - len, 1); | |
3912 | len = strlen(buf); | |
3913 | if (PAGE_SIZE - len) | |
3914 | buf[len++] = '\n'; | |
3915 | ||
3916 | ofs += 16; | |
3917 | size -= min(size, 16U); | |
3918 | } | |
3919 | ||
3920 | return len; | |
3921 | } | |
3922 | ||
3923 | static ssize_t store_measurement(struct device *d, | |
3924 | struct device_attribute *attr, | |
3925 | const char *buf, size_t count) | |
3926 | { | |
c79dd5b5 | 3927 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3928 | struct ieee80211_measurement_params params = { |
3929 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
3930 | .start_time = cpu_to_le64(priv->last_tsf), | |
3931 | .duration = cpu_to_le16(1), | |
3932 | }; | |
3933 | u8 type = IWL_MEASURE_BASIC; | |
3934 | u8 buffer[32]; | |
3935 | u8 channel; | |
3936 | ||
3937 | if (count) { | |
3938 | char *p = buffer; | |
3939 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
3940 | channel = simple_strtoul(p, NULL, 0); | |
3941 | if (channel) | |
3942 | params.channel = channel; | |
3943 | ||
3944 | p = buffer; | |
3945 | while (*p && *p != ' ') | |
3946 | p++; | |
3947 | if (*p) | |
3948 | type = simple_strtoul(p + 1, NULL, 0); | |
3949 | } | |
3950 | ||
3951 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
3952 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 3953 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
3954 | |
3955 | return count; | |
3956 | } | |
3957 | ||
3958 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
3959 | show_measurement, store_measurement); | |
c8b0e6e1 | 3960 | #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
3961 | |
3962 | static ssize_t store_retry_rate(struct device *d, | |
3963 | struct device_attribute *attr, | |
3964 | const char *buf, size_t count) | |
3965 | { | |
c79dd5b5 | 3966 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3967 | |
3968 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | |
3969 | if (priv->retry_rate <= 0) | |
3970 | priv->retry_rate = 1; | |
3971 | ||
3972 | return count; | |
3973 | } | |
3974 | ||
3975 | static ssize_t show_retry_rate(struct device *d, | |
3976 | struct device_attribute *attr, char *buf) | |
3977 | { | |
c79dd5b5 | 3978 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3979 | return sprintf(buf, "%d", priv->retry_rate); |
3980 | } | |
3981 | ||
3982 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
3983 | store_retry_rate); | |
3984 | ||
3985 | static ssize_t store_power_level(struct device *d, | |
3986 | struct device_attribute *attr, | |
3987 | const char *buf, size_t count) | |
3988 | { | |
c79dd5b5 | 3989 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3990 | int rc; |
3991 | int mode; | |
3992 | ||
3993 | mode = simple_strtoul(buf, NULL, 0); | |
3994 | mutex_lock(&priv->mutex); | |
3995 | ||
fee1247a | 3996 | if (!iwl_is_ready(priv)) { |
b481de9c ZY |
3997 | rc = -EAGAIN; |
3998 | goto out; | |
3999 | } | |
4000 | ||
5da4b55f MA |
4001 | rc = iwl_power_set_user_mode(priv, mode); |
4002 | if (rc) { | |
4003 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); | |
4004 | goto out; | |
b481de9c | 4005 | } |
b481de9c ZY |
4006 | rc = count; |
4007 | ||
4008 | out: | |
4009 | mutex_unlock(&priv->mutex); | |
4010 | return rc; | |
4011 | } | |
4012 | ||
4013 | #define MAX_WX_STRING 80 | |
4014 | ||
4015 | /* Values are in microsecond */ | |
4016 | static const s32 timeout_duration[] = { | |
4017 | 350000, | |
4018 | 250000, | |
4019 | 75000, | |
4020 | 37000, | |
4021 | 25000, | |
4022 | }; | |
4023 | static const s32 period_duration[] = { | |
4024 | 400000, | |
4025 | 700000, | |
4026 | 1000000, | |
4027 | 1000000, | |
4028 | 1000000 | |
4029 | }; | |
4030 | ||
4031 | static ssize_t show_power_level(struct device *d, | |
4032 | struct device_attribute *attr, char *buf) | |
4033 | { | |
c79dd5b5 | 4034 | struct iwl_priv *priv = dev_get_drvdata(d); |
5da4b55f | 4035 | int level = priv->power_data.power_mode; |
b481de9c ZY |
4036 | char *p = buf; |
4037 | ||
4038 | p += sprintf(p, "%d ", level); | |
4039 | switch (level) { | |
4040 | case IWL_POWER_MODE_CAM: | |
4041 | case IWL_POWER_AC: | |
4042 | p += sprintf(p, "(AC)"); | |
4043 | break; | |
4044 | case IWL_POWER_BATTERY: | |
4045 | p += sprintf(p, "(BATTERY)"); | |
4046 | break; | |
4047 | default: | |
4048 | p += sprintf(p, | |
4049 | "(Timeout %dms, Period %dms)", | |
4050 | timeout_duration[level - 1] / 1000, | |
4051 | period_duration[level - 1] / 1000); | |
4052 | } | |
5da4b55f | 4053 | /* |
b481de9c ZY |
4054 | if (!(priv->power_mode & IWL_POWER_ENABLED)) |
4055 | p += sprintf(p, " OFF\n"); | |
4056 | else | |
4057 | p += sprintf(p, " \n"); | |
5da4b55f MA |
4058 | */ |
4059 | p += sprintf(p, " \n"); | |
b481de9c | 4060 | return (p - buf + 1); |
b481de9c ZY |
4061 | } |
4062 | ||
4063 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
4064 | store_power_level); | |
4065 | ||
4066 | static ssize_t show_channels(struct device *d, | |
4067 | struct device_attribute *attr, char *buf) | |
4068 | { | |
5d72a1f5 EK |
4069 | |
4070 | struct iwl_priv *priv = dev_get_drvdata(d); | |
4071 | struct ieee80211_channel *channels = NULL; | |
4072 | const struct ieee80211_supported_band *supp_band = NULL; | |
4073 | int len = 0, i; | |
4074 | int count = 0; | |
4075 | ||
4076 | if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status)) | |
4077 | return -EAGAIN; | |
4078 | ||
4079 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ); | |
4080 | channels = supp_band->channels; | |
4081 | count = supp_band->n_channels; | |
4082 | ||
4083 | len += sprintf(&buf[len], | |
4084 | "Displaying %d channels in 2.4GHz band " | |
4085 | "(802.11bg):\n", count); | |
4086 | ||
4087 | for (i = 0; i < count; i++) | |
4088 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
4089 | ieee80211_frequency_to_channel( | |
4090 | channels[i].center_freq), | |
4091 | channels[i].max_power, | |
4092 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
4093 | " (IEEE 802.11h required)" : "", | |
4094 | (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
4095 | || (channels[i].flags & | |
4096 | IEEE80211_CHAN_RADAR)) ? "" : | |
4097 | ", IBSS", | |
4098 | channels[i].flags & | |
4099 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
4100 | "passive only" : "active/passive"); | |
4101 | ||
4102 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ); | |
4103 | channels = supp_band->channels; | |
4104 | count = supp_band->n_channels; | |
4105 | ||
4106 | len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band " | |
4107 | "(802.11a):\n", count); | |
4108 | ||
4109 | for (i = 0; i < count; i++) | |
4110 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
4111 | ieee80211_frequency_to_channel( | |
4112 | channels[i].center_freq), | |
4113 | channels[i].max_power, | |
4114 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
4115 | " (IEEE 802.11h required)" : "", | |
4116 | ((channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
4117 | || (channels[i].flags & | |
4118 | IEEE80211_CHAN_RADAR)) ? "" : | |
4119 | ", IBSS", | |
4120 | channels[i].flags & | |
4121 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
4122 | "passive only" : "active/passive"); | |
4123 | ||
4124 | return len; | |
b481de9c ZY |
4125 | } |
4126 | ||
4127 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
4128 | ||
4129 | static ssize_t show_statistics(struct device *d, | |
4130 | struct device_attribute *attr, char *buf) | |
4131 | { | |
c79dd5b5 | 4132 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 4133 | u32 size = sizeof(struct iwl4965_notif_statistics); |
b481de9c ZY |
4134 | u32 len = 0, ofs = 0; |
4135 | u8 *data = (u8 *) & priv->statistics; | |
4136 | int rc = 0; | |
4137 | ||
fee1247a | 4138 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4139 | return -EAGAIN; |
4140 | ||
4141 | mutex_lock(&priv->mutex); | |
49ea8596 | 4142 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
4143 | mutex_unlock(&priv->mutex); |
4144 | ||
4145 | if (rc) { | |
4146 | len = sprintf(buf, | |
4147 | "Error sending statistics request: 0x%08X\n", rc); | |
4148 | return len; | |
4149 | } | |
4150 | ||
4151 | while (size && (PAGE_SIZE - len)) { | |
4152 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
4153 | PAGE_SIZE - len, 1); | |
4154 | len = strlen(buf); | |
4155 | if (PAGE_SIZE - len) | |
4156 | buf[len++] = '\n'; | |
4157 | ||
4158 | ofs += 16; | |
4159 | size -= min(size, 16U); | |
4160 | } | |
4161 | ||
4162 | return len; | |
4163 | } | |
4164 | ||
4165 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
4166 | ||
b481de9c ZY |
4167 | static ssize_t show_status(struct device *d, |
4168 | struct device_attribute *attr, char *buf) | |
4169 | { | |
c79dd5b5 | 4170 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 4171 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4172 | return -EAGAIN; |
4173 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
4174 | } | |
4175 | ||
4176 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
4177 | ||
b481de9c ZY |
4178 | /***************************************************************************** |
4179 | * | |
4180 | * driver setup and teardown | |
4181 | * | |
4182 | *****************************************************************************/ | |
4183 | ||
4e39317d | 4184 | static void iwl_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
4185 | { |
4186 | priv->workqueue = create_workqueue(DRV_NAME); | |
4187 | ||
4188 | init_waitqueue_head(&priv->wait_command_queue); | |
4189 | ||
bb8c093b CH |
4190 | INIT_WORK(&priv->up, iwl4965_bg_up); |
4191 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
4192 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
bb8c093b CH |
4193 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); |
4194 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
4419e39b | 4195 | INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor); |
16e727e8 | 4196 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); |
bb8c093b | 4197 | INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate); |
4a4a9e81 TW |
4198 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start); |
4199 | INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start); | |
2a421b91 TW |
4200 | |
4201 | /* FIXME : remove when resolved PENDING */ | |
4202 | INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed); | |
4203 | iwl_setup_scan_deferred_work(priv); | |
bb8c093b | 4204 | |
4e39317d EG |
4205 | if (priv->cfg->ops->lib->setup_deferred_work) |
4206 | priv->cfg->ops->lib->setup_deferred_work(priv); | |
4207 | ||
4208 | init_timer(&priv->statistics_periodic); | |
4209 | priv->statistics_periodic.data = (unsigned long)priv; | |
4210 | priv->statistics_periodic.function = iwl4965_bg_statistics_periodic; | |
b481de9c ZY |
4211 | |
4212 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 4213 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
4214 | } |
4215 | ||
4e39317d | 4216 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 4217 | { |
4e39317d EG |
4218 | if (priv->cfg->ops->lib->cancel_deferred_work) |
4219 | priv->cfg->ops->lib->cancel_deferred_work(priv); | |
b481de9c | 4220 | |
3ae6a054 | 4221 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c ZY |
4222 | cancel_delayed_work(&priv->scan_check); |
4223 | cancel_delayed_work(&priv->alive_start); | |
4224 | cancel_delayed_work(&priv->post_associate); | |
4225 | cancel_work_sync(&priv->beacon_update); | |
4e39317d | 4226 | del_timer_sync(&priv->statistics_periodic); |
b481de9c ZY |
4227 | } |
4228 | ||
bb8c093b | 4229 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c | 4230 | &dev_attr_channels.attr, |
b481de9c ZY |
4231 | &dev_attr_flags.attr, |
4232 | &dev_attr_filter_flags.attr, | |
c8b0e6e1 | 4233 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
4234 | &dev_attr_measurement.attr, |
4235 | #endif | |
4236 | &dev_attr_power_level.attr, | |
4237 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
4238 | &dev_attr_rs_window.attr, |
4239 | &dev_attr_statistics.attr, | |
4240 | &dev_attr_status.attr, | |
4241 | &dev_attr_temperature.attr, | |
b481de9c | 4242 | &dev_attr_tx_power.attr, |
8cf769c6 EK |
4243 | #ifdef CONFIG_IWLWIFI_DEBUG |
4244 | &dev_attr_debug_level.attr, | |
4245 | #endif | |
bc6f59bc | 4246 | &dev_attr_version.attr, |
b481de9c ZY |
4247 | |
4248 | NULL | |
4249 | }; | |
4250 | ||
bb8c093b | 4251 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 4252 | .name = NULL, /* put in device directory */ |
bb8c093b | 4253 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
4254 | }; |
4255 | ||
bb8c093b CH |
4256 | static struct ieee80211_ops iwl4965_hw_ops = { |
4257 | .tx = iwl4965_mac_tx, | |
4258 | .start = iwl4965_mac_start, | |
4259 | .stop = iwl4965_mac_stop, | |
4260 | .add_interface = iwl4965_mac_add_interface, | |
4261 | .remove_interface = iwl4965_mac_remove_interface, | |
4262 | .config = iwl4965_mac_config, | |
4263 | .config_interface = iwl4965_mac_config_interface, | |
4264 | .configure_filter = iwl4965_configure_filter, | |
4265 | .set_key = iwl4965_mac_set_key, | |
ab885f8c | 4266 | .update_tkip_key = iwl4965_mac_update_tkip_key, |
bb8c093b CH |
4267 | .get_stats = iwl4965_mac_get_stats, |
4268 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
4269 | .conf_tx = iwl4965_mac_conf_tx, | |
4270 | .get_tsf = iwl4965_mac_get_tsf, | |
4271 | .reset_tsf = iwl4965_mac_reset_tsf, | |
4272 | .beacon_update = iwl4965_mac_beacon_update, | |
471b3efd | 4273 | .bss_info_changed = iwl4965_bss_info_changed, |
9ab46173 | 4274 | .ampdu_action = iwl4965_mac_ampdu_action, |
bb8c093b | 4275 | .hw_scan = iwl4965_mac_hw_scan |
b481de9c ZY |
4276 | }; |
4277 | ||
bb8c093b | 4278 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
4279 | { |
4280 | int err = 0; | |
c79dd5b5 | 4281 | struct iwl_priv *priv; |
b481de9c | 4282 | struct ieee80211_hw *hw; |
82b9a121 | 4283 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 4284 | unsigned long flags; |
5a66926a | 4285 | DECLARE_MAC_BUF(mac); |
b481de9c | 4286 | |
316c30d9 AK |
4287 | /************************ |
4288 | * 1. Allocating HW data | |
4289 | ************************/ | |
4290 | ||
6440adb5 CB |
4291 | /* Disabling hardware scan means that mac80211 will perform scans |
4292 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 4293 | if (cfg->mod_params->disable_hw_scan) { |
bf403db8 EK |
4294 | if (cfg->mod_params->debug & IWL_DL_INFO) |
4295 | dev_printk(KERN_DEBUG, &(pdev->dev), | |
4296 | "Disabling hw_scan\n"); | |
bb8c093b | 4297 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
4298 | } |
4299 | ||
1d0a082d AK |
4300 | hw = iwl_alloc_all(cfg, &iwl4965_hw_ops); |
4301 | if (!hw) { | |
b481de9c ZY |
4302 | err = -ENOMEM; |
4303 | goto out; | |
4304 | } | |
1d0a082d AK |
4305 | priv = hw->priv; |
4306 | /* At this point both hw and priv are allocated. */ | |
4307 | ||
b481de9c ZY |
4308 | SET_IEEE80211_DEV(hw, &pdev->dev); |
4309 | ||
4310 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 4311 | priv->cfg = cfg; |
b481de9c | 4312 | priv->pci_dev = pdev; |
316c30d9 | 4313 | |
0a6857e7 | 4314 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 4315 | priv->debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
4316 | atomic_set(&priv->restrict_refcnt, 0); |
4317 | #endif | |
b481de9c | 4318 | |
316c30d9 AK |
4319 | /************************** |
4320 | * 2. Initializing PCI bus | |
4321 | **************************/ | |
4322 | if (pci_enable_device(pdev)) { | |
4323 | err = -ENODEV; | |
4324 | goto out_ieee80211_free_hw; | |
4325 | } | |
4326 | ||
4327 | pci_set_master(pdev); | |
4328 | ||
cc2a8ea8 | 4329 | err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); |
316c30d9 | 4330 | if (!err) |
cc2a8ea8 RR |
4331 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
4332 | if (err) { | |
4333 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
4334 | if (!err) | |
4335 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
4336 | /* both attempts failed: */ | |
316c30d9 | 4337 | if (err) { |
cc2a8ea8 RR |
4338 | printk(KERN_WARNING "%s: No suitable DMA available.\n", |
4339 | DRV_NAME); | |
316c30d9 | 4340 | goto out_pci_disable_device; |
cc2a8ea8 | 4341 | } |
316c30d9 AK |
4342 | } |
4343 | ||
4344 | err = pci_request_regions(pdev, DRV_NAME); | |
4345 | if (err) | |
4346 | goto out_pci_disable_device; | |
4347 | ||
4348 | pci_set_drvdata(pdev, priv); | |
4349 | ||
4350 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | |
4351 | * PCI Tx retries from interfering with C3 CPU state */ | |
4352 | pci_write_config_byte(pdev, 0x41, 0x00); | |
4353 | ||
4354 | /*********************** | |
4355 | * 3. Read REV register | |
4356 | ***********************/ | |
4357 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
4358 | if (!priv->hw_base) { | |
4359 | err = -ENODEV; | |
4360 | goto out_pci_release_regions; | |
4361 | } | |
4362 | ||
4363 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
4364 | (unsigned long long) pci_resource_len(pdev, 0)); | |
4365 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
4366 | ||
b661c819 | 4367 | iwl_hw_detect(priv); |
316c30d9 | 4368 | printk(KERN_INFO DRV_NAME |
b661c819 TW |
4369 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
4370 | priv->cfg->name, priv->hw_rev); | |
316c30d9 | 4371 | |
91238714 TW |
4372 | /* amp init */ |
4373 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
316c30d9 | 4374 | if (err < 0) { |
91238714 | 4375 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
316c30d9 AK |
4376 | goto out_iounmap; |
4377 | } | |
91238714 TW |
4378 | /***************** |
4379 | * 4. Read EEPROM | |
4380 | *****************/ | |
316c30d9 AK |
4381 | /* Read the EEPROM */ |
4382 | err = iwl_eeprom_init(priv); | |
4383 | if (err) { | |
4384 | IWL_ERROR("Unable to init EEPROM\n"); | |
4385 | goto out_iounmap; | |
4386 | } | |
8614f360 TW |
4387 | err = iwl_eeprom_check_version(priv); |
4388 | if (err) | |
4389 | goto out_iounmap; | |
4390 | ||
02883017 | 4391 | /* extract MAC Address */ |
316c30d9 AK |
4392 | iwl_eeprom_get_mac(priv, priv->mac_addr); |
4393 | IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr)); | |
4394 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | |
4395 | ||
4396 | /************************ | |
4397 | * 5. Setup HW constants | |
4398 | ************************/ | |
4399 | /* Device-specific setup */ | |
5425e490 TW |
4400 | if (priv->cfg->ops->lib->set_hw_params(priv)) { |
4401 | IWL_ERROR("failed to set hw parameters\n"); | |
073d3f5f | 4402 | goto out_free_eeprom; |
316c30d9 AK |
4403 | } |
4404 | ||
4405 | /******************* | |
6ba87956 | 4406 | * 6. Setup priv |
316c30d9 | 4407 | *******************/ |
b481de9c | 4408 | |
6ba87956 | 4409 | err = iwl_init_drv(priv); |
bf85ea4f | 4410 | if (err) |
399f4900 | 4411 | goto out_free_eeprom; |
bf85ea4f | 4412 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
4413 | |
4414 | /********************************** | |
4415 | * 7. Initialize module parameters | |
4416 | **********************************/ | |
4417 | ||
4418 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 4419 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
4420 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
4421 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
4422 | } | |
4423 | ||
316c30d9 AK |
4424 | /******************** |
4425 | * 8. Setup services | |
4426 | ********************/ | |
0359facc | 4427 | spin_lock_irqsave(&priv->lock, flags); |
316c30d9 | 4428 | iwl4965_disable_interrupts(priv); |
0359facc | 4429 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 AK |
4430 | |
4431 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4432 | if (err) { | |
4433 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
6ba87956 | 4434 | goto out_uninit_drv; |
316c30d9 AK |
4435 | } |
4436 | ||
316c30d9 | 4437 | |
4e39317d | 4438 | iwl_setup_deferred_work(priv); |
316c30d9 AK |
4439 | iwl4965_setup_rx_handlers(priv); |
4440 | ||
4441 | /******************** | |
4442 | * 9. Conclude | |
4443 | ********************/ | |
5a66926a ZY |
4444 | pci_save_state(pdev); |
4445 | pci_disable_device(pdev); | |
b481de9c | 4446 | |
6ba87956 TW |
4447 | /********************************** |
4448 | * 10. Setup and register mac80211 | |
4449 | **********************************/ | |
4450 | ||
4451 | err = iwl_setup_mac(priv); | |
4452 | if (err) | |
4453 | goto out_remove_sysfs; | |
4454 | ||
4455 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
4456 | if (err) | |
4457 | IWL_ERROR("failed to create debugfs files\n"); | |
4458 | ||
58d0f361 EG |
4459 | err = iwl_rfkill_init(priv); |
4460 | if (err) | |
4461 | IWL_ERROR("Unable to initialize RFKILL system. " | |
4462 | "Ignoring error: %d\n", err); | |
4463 | iwl_power_initialize(priv); | |
b481de9c ZY |
4464 | return 0; |
4465 | ||
316c30d9 AK |
4466 | out_remove_sysfs: |
4467 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
6ba87956 TW |
4468 | out_uninit_drv: |
4469 | iwl_uninit_drv(priv); | |
073d3f5f TW |
4470 | out_free_eeprom: |
4471 | iwl_eeprom_free(priv); | |
b481de9c ZY |
4472 | out_iounmap: |
4473 | pci_iounmap(pdev, priv->hw_base); | |
4474 | out_pci_release_regions: | |
4475 | pci_release_regions(pdev); | |
316c30d9 | 4476 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
4477 | out_pci_disable_device: |
4478 | pci_disable_device(pdev); | |
b481de9c ZY |
4479 | out_ieee80211_free_hw: |
4480 | ieee80211_free_hw(priv->hw); | |
4481 | out: | |
4482 | return err; | |
4483 | } | |
4484 | ||
c83dbf68 | 4485 | static void __devexit iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 4486 | { |
c79dd5b5 | 4487 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c ZY |
4488 | struct list_head *p, *q; |
4489 | int i; | |
0359facc | 4490 | unsigned long flags; |
b481de9c ZY |
4491 | |
4492 | if (!priv) | |
4493 | return; | |
4494 | ||
4495 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
4496 | ||
67249625 EG |
4497 | iwl_dbgfs_unregister(priv); |
4498 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4499 | ||
c4f55232 RR |
4500 | if (priv->mac80211_registered) { |
4501 | ieee80211_unregister_hw(priv->hw); | |
4502 | priv->mac80211_registered = 0; | |
4503 | } | |
4504 | ||
b481de9c | 4505 | set_bit(STATUS_EXIT_PENDING, &priv->status); |
b24d22b1 | 4506 | |
bb8c093b | 4507 | iwl4965_down(priv); |
b481de9c | 4508 | |
0359facc MA |
4509 | /* make sure we flush any pending irq or |
4510 | * tasklet for the driver | |
4511 | */ | |
4512 | spin_lock_irqsave(&priv->lock, flags); | |
4513 | iwl4965_disable_interrupts(priv); | |
4514 | spin_unlock_irqrestore(&priv->lock, flags); | |
4515 | ||
4516 | iwl_synchronize_irq(priv); | |
4517 | ||
b481de9c ZY |
4518 | /* Free MAC hash list for ADHOC */ |
4519 | for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) { | |
4520 | list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) { | |
4521 | list_del(p); | |
bb8c093b | 4522 | kfree(list_entry(p, struct iwl4965_ibss_seq, list)); |
b481de9c ZY |
4523 | } |
4524 | } | |
4525 | ||
58d0f361 | 4526 | iwl_rfkill_unregister(priv); |
bb8c093b | 4527 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
4528 | |
4529 | if (priv->rxq.bd) | |
a55360e4 | 4530 | iwl_rx_queue_free(priv, &priv->rxq); |
1053d35f | 4531 | iwl_hw_txq_ctx_free(priv); |
b481de9c | 4532 | |
bf85ea4f | 4533 | iwlcore_clear_stations_table(priv); |
073d3f5f | 4534 | iwl_eeprom_free(priv); |
b481de9c | 4535 | |
b481de9c | 4536 | |
948c171c MA |
4537 | /*netif_stop_queue(dev); */ |
4538 | flush_workqueue(priv->workqueue); | |
4539 | ||
bb8c093b | 4540 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
4541 | * priv->workqueue... so we can't take down the workqueue |
4542 | * until now... */ | |
4543 | destroy_workqueue(priv->workqueue); | |
4544 | priv->workqueue = NULL; | |
4545 | ||
b481de9c ZY |
4546 | pci_iounmap(pdev, priv->hw_base); |
4547 | pci_release_regions(pdev); | |
4548 | pci_disable_device(pdev); | |
4549 | pci_set_drvdata(pdev, NULL); | |
4550 | ||
6ba87956 | 4551 | iwl_uninit_drv(priv); |
b481de9c ZY |
4552 | |
4553 | if (priv->ibss_beacon) | |
4554 | dev_kfree_skb(priv->ibss_beacon); | |
4555 | ||
4556 | ieee80211_free_hw(priv->hw); | |
4557 | } | |
4558 | ||
4559 | #ifdef CONFIG_PM | |
4560 | ||
bb8c093b | 4561 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 4562 | { |
c79dd5b5 | 4563 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4564 | |
e655b9f0 ZY |
4565 | if (priv->is_open) { |
4566 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
4567 | iwl4965_mac_stop(priv->hw); | |
4568 | priv->is_open = 1; | |
4569 | } | |
b481de9c | 4570 | |
b481de9c ZY |
4571 | pci_set_power_state(pdev, PCI_D3hot); |
4572 | ||
b481de9c ZY |
4573 | return 0; |
4574 | } | |
4575 | ||
bb8c093b | 4576 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 4577 | { |
c79dd5b5 | 4578 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4579 | |
b481de9c | 4580 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 4581 | |
e655b9f0 ZY |
4582 | if (priv->is_open) |
4583 | iwl4965_mac_start(priv->hw); | |
b481de9c | 4584 | |
e655b9f0 | 4585 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
4586 | return 0; |
4587 | } | |
4588 | ||
4589 | #endif /* CONFIG_PM */ | |
4590 | ||
4591 | /***************************************************************************** | |
4592 | * | |
4593 | * driver and module entry point | |
4594 | * | |
4595 | *****************************************************************************/ | |
4596 | ||
fed9017e RR |
4597 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
4598 | static struct pci_device_id iwl_hw_card_ids[] = { | |
4599 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
4600 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
5a6a256e TW |
4601 | #ifdef CONFIG_IWL5000 |
4602 | {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, | |
4603 | {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, | |
4604 | {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)}, | |
4605 | #endif /* CONFIG_IWL5000 */ | |
fed9017e RR |
4606 | {0} |
4607 | }; | |
4608 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
4609 | ||
4610 | static struct pci_driver iwl_driver = { | |
b481de9c | 4611 | .name = DRV_NAME, |
fed9017e | 4612 | .id_table = iwl_hw_card_ids, |
bb8c093b CH |
4613 | .probe = iwl4965_pci_probe, |
4614 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 4615 | #ifdef CONFIG_PM |
bb8c093b CH |
4616 | .suspend = iwl4965_pci_suspend, |
4617 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
4618 | #endif |
4619 | }; | |
4620 | ||
bb8c093b | 4621 | static int __init iwl4965_init(void) |
b481de9c ZY |
4622 | { |
4623 | ||
4624 | int ret; | |
4625 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
4626 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 RC |
4627 | |
4628 | ret = iwl4965_rate_control_register(); | |
4629 | if (ret) { | |
4630 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
4631 | return ret; | |
4632 | } | |
4633 | ||
fed9017e | 4634 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
4635 | if (ret) { |
4636 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 4637 | goto error_register; |
b481de9c | 4638 | } |
b481de9c ZY |
4639 | |
4640 | return ret; | |
897e1cf2 | 4641 | |
897e1cf2 RC |
4642 | error_register: |
4643 | iwl4965_rate_control_unregister(); | |
4644 | return ret; | |
b481de9c ZY |
4645 | } |
4646 | ||
bb8c093b | 4647 | static void __exit iwl4965_exit(void) |
b481de9c | 4648 | { |
fed9017e | 4649 | pci_unregister_driver(&iwl_driver); |
897e1cf2 | 4650 | iwl4965_rate_control_unregister(); |
b481de9c ZY |
4651 | } |
4652 | ||
bb8c093b CH |
4653 | module_exit(iwl4965_exit); |
4654 | module_init(iwl4965_init); |