projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ssb: Add Gigabit Ethernet driver
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
b481de9c
ZY		 41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
b481de9c
ZY		 44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
b481de9c
ZY		 48#include "iwl-4965.h"
49#include "iwl-helpers.h"
50
c8b0e6e1 51#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 52u32 iwl4965_debug_level;
b481de9c
ZY		 53#endif
54
bb8c093b
CH		 55static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
56 struct iwl4965_tx_queue *txq);
416e1438 57
b481de9c
ZY		 58/******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64/* module parameters */
6440adb5
CB		 65static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
66static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
9fbab516
BC		 67static int iwl4965_param_disable; /* def: enable radio */
68static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
69int iwl4965_param_hwcrypto; /* def: using software encryption */
6440adb5
CB		 70static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
71int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
9ee1ba47 72int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
b481de9c
ZY		 73
74/*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
80
c8b0e6e1 81#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY		 82#define VD "d"
83#else
84#define VD
85#endif
86
c8b0e6e1 87#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 88#define VS "s"
89#else
90#define VS
91#endif
92
b9e0b449 93#define IWLWIFI_VERSION "1.2.26k" VD VS
b481de9c
ZY		 94#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
95#define DRV_VERSION IWLWIFI_VERSION
96
97/* Change firmware file name, using "-" and incrementing number,
98 * *only* when uCode interface or architecture changes so that it
99 * is not compatible with earlier drivers.
100 * This number will also appear in << 8 position of 1st dword of uCode file */
101#define IWL4965_UCODE_API "-1"
102
103MODULE_DESCRIPTION(DRV_DESCRIPTION);
104MODULE_VERSION(DRV_VERSION);
105MODULE_AUTHOR(DRV_COPYRIGHT);
106MODULE_LICENSE("GPL");
107
108__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
109{
110 u16 fc = le16_to_cpu(hdr->frame_control);
111 int hdr_len = ieee80211_get_hdrlen(fc);
112
113 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
114 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
115 return NULL;
116}
117
8318d78a
JB		 118static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
119 struct iwl4965_priv *priv, enum ieee80211_band band)
b481de9c 120{
8318d78a 121 return priv->hw->wiphy->bands[band];
b481de9c
ZY		 122}
123
bb8c093b 124static int iwl4965_is_empty_essid(const char *essid, int essid_len)
b481de9c
ZY		 125{
126 /* Single white space is for Linksys APs */
127 if (essid_len == 1 && essid[0] == ' ')
128 return 1;
129
130 /* Otherwise, if the entire essid is 0, we assume it is hidden */
131 while (essid_len) {
132 essid_len--;
133 if (essid[essid_len] != '\0')
134 return 0;
135 }
136
137 return 1;
138}
139
bb8c093b 140static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
b481de9c
ZY		 141{
142 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
143 const char *s = essid;
144 char *d = escaped;
145
bb8c093b 146 if (iwl4965_is_empty_essid(essid, essid_len)) {
b481de9c
ZY		 147 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
148 return escaped;
149 }
150
151 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
152 while (essid_len--) {
153 if (*s == '\0') {
154 *d++ = '\\';
155 *d++ = '0';
156 s++;
157 } else
158 *d++ = *s++;
159 }
160 *d = '\0';
161 return escaped;
162}
163
bb8c093b 164static void iwl4965_print_hex_dump(int level, void *p, u32 len)
b481de9c 165{
c8b0e6e1 166#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 167 if (!(iwl4965_debug_level & level))
b481de9c
ZY		 168 return;
169
170 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
171 p, len, 1);
172#endif
173}
174
175/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
176 * DMA services
177 *
178 * Theory of operation
179 *
6440adb5
CB		 180 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
181 * of buffer descriptors, each of which points to one or more data buffers for
182 * the device to read from or fill. Driver and device exchange status of each
183 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
184 * entries in each circular buffer, to protect against confusing empty and full
185 * queue states.
186 *
187 * The device reads or writes the data in the queues via the device's several
188 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
b481de9c
ZY		 189 *
190 * For Tx queue, there are low mark and high mark limits. If, after queuing
191 * the packet for Tx, free space become < low mark, Tx queue stopped. When
192 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
193 * Tx queue resumed.
194 *
6440adb5
CB		 195 * The 4965 operates with up to 17 queues: One receive queue, one transmit
196 * queue (#4) for sending commands to the device firmware, and 15 other
197 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
BC		 198 *
199 * See more detailed info in iwl-4965-hw.h.
b481de9c
ZY		 200 ***************************************************/
201
fe01b477 202int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 203{
fc4b6853 204 int s = q->read_ptr - q->write_ptr;
b481de9c 205
fc4b6853 206 if (q->read_ptr > q->write_ptr)
b481de9c
ZY		 207 s -= q->n_bd;
208
209 if (s <= 0)
210 s += q->n_window;
211 /* keep some reserve to not confuse empty and full situations */
212 s -= 2;
213 if (s < 0)
214 s = 0;
215 return s;
216}
217
6440adb5
CB		 218/**
219 * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
220 * @index -- current index
221 * @n_bd -- total number of entries in queue (must be power of 2)
222 */
bb8c093b 223static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
b481de9c
ZY		 224{
225 return ++index & (n_bd - 1);
226}
227
6440adb5
CB		 228/**
229 * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
230 * @index -- current index
231 * @n_bd -- total number of entries in queue (must be power of 2)
232 */
bb8c093b 233static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
b481de9c
ZY		 234{
235 return --index & (n_bd - 1);
236}
237
bb8c093b 238static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 239{
fc4b6853
TW		 240 return q->write_ptr > q->read_ptr ?
241 (i >= q->read_ptr && i < q->write_ptr) :
242 !(i < q->read_ptr && i >= q->write_ptr);
b481de9c
ZY		 243}
244
bb8c093b 245static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 246{
6440adb5 247 /* This is for scan command, the big buffer at end of command array */
b481de9c 248 if (is_huge)
6440adb5 249 return q->n_window; /* must be power of 2 */
b481de9c 250
6440adb5 251 /* Otherwise, use normal size buffers */
b481de9c
ZY		 252 return index & (q->n_window - 1);
253}
254
6440adb5
CB		 255/**
256 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
257 */
bb8c093b 258static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
b481de9c
ZY		 259 int count, int slots_num, u32 id)
260{
261 q->n_bd = count;
262 q->n_window = slots_num;
263 q->id = id;
264
bb8c093b
CH		 265 /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
266 * and iwl4965_queue_dec_wrap are broken. */
b481de9c
ZY		 267 BUG_ON(!is_power_of_2(count));
268
269 /* slots_num must be power-of-two size, otherwise
270 * get_cmd_index is broken. */
271 BUG_ON(!is_power_of_2(slots_num));
272
273 q->low_mark = q->n_window / 4;
274 if (q->low_mark < 4)
275 q->low_mark = 4;
276
277 q->high_mark = q->n_window / 8;
278 if (q->high_mark < 2)
279 q->high_mark = 2;
280
fc4b6853 281 q->write_ptr = q->read_ptr = 0;
b481de9c
ZY		 282
283 return 0;
284}
285
6440adb5
CB		 286/**
287 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
288 */
bb8c093b
CH		 289static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
290 struct iwl4965_tx_queue *txq, u32 id)
b481de9c
ZY		 291{
292 struct pci_dev *dev = priv->pci_dev;
293
6440adb5
CB		 294 /* Driver private data, only for Tx (not command) queues,
295 * not shared with device. */
b481de9c
ZY		 296 if (id != IWL_CMD_QUEUE_NUM) {
297 txq->txb = kmalloc(sizeof(txq->txb[0]) *
298 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
299 if (!txq->txb) {
01ebd063 300 IWL_ERROR("kmalloc for auxiliary BD "
b481de9c
ZY		 301 "structures failed\n");
302 goto error;
303 }
304 } else
305 txq->txb = NULL;
306
6440adb5
CB		 307 /* Circular buffer of transmit frame descriptors (TFDs),
308 * shared with device */
b481de9c
ZY		 309 txq->bd = pci_alloc_consistent(dev,
310 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
311 &txq->q.dma_addr);
312
313 if (!txq->bd) {
314 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
315 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
316 goto error;
317 }
318 txq->q.id = id;
319
320 return 0;
321
322 error:
323 if (txq->txb) {
324 kfree(txq->txb);
325 txq->txb = NULL;
326 }
327
328 return -ENOMEM;
329}
330
8b6eaea8
CB		 331/**
332 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
333 */
bb8c093b
CH		 334int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
335 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
b481de9c
ZY		 336{
337 struct pci_dev *dev = priv->pci_dev;
338 int len;
339 int rc = 0;
340
8b6eaea8
CB		 341 /*
342 * Alloc buffer array for commands (Tx or other types of commands).
343 * For the command queue (#4), allocate command space + one big
344 * command for scan, since scan command is very huge; the system will
345 * not have two scans at the same time, so only one is needed.
bb54244b 346 * For normal Tx queues (all other queues), no super-size command
8b6eaea8
CB		 347 * space is needed.
348 */
bb8c093b 349 len = sizeof(struct iwl4965_cmd) * slots_num;
b481de9c
ZY		 350 if (txq_id == IWL_CMD_QUEUE_NUM)
351 len += IWL_MAX_SCAN_SIZE;
352 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
353 if (!txq->cmd)
354 return -ENOMEM;
355
8b6eaea8 356 /* Alloc driver data array and TFD circular buffer */
bb8c093b 357 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
b481de9c
ZY		 358 if (rc) {
359 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
360
361 return -ENOMEM;
362 }
363 txq->need_update = 0;
364
365 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
bb8c093b 366 * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
b481de9c 367 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
CB		 368
369 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 370 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 371
8b6eaea8 372 /* Tell device where to find queue */
bb8c093b 373 iwl4965_hw_tx_queue_init(priv, txq);
b481de9c
ZY		 374
375 return 0;
376}
377
378/**
bb8c093b 379 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
ZY		 380 * @txq: Transmit queue to deallocate.
381 *
382 * Empty queue by removing and destroying all BD's.
6440adb5
CB		 383 * Free all buffers.
384 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 385 */
bb8c093b 386void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 387{
bb8c093b 388 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 389 struct pci_dev *dev = priv->pci_dev;
390 int len;
391
392 if (q->n_bd == 0)
393 return;
394
395 /* first, empty all BD's */
fc4b6853 396 for (; q->write_ptr != q->read_ptr;
bb8c093b
CH		 397 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
398 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 399
bb8c093b 400 len = sizeof(struct iwl4965_cmd) * q->n_window;
b481de9c
ZY		 401 if (q->id == IWL_CMD_QUEUE_NUM)
402 len += IWL_MAX_SCAN_SIZE;
403
6440adb5 404 /* De-alloc array of command/tx buffers */
b481de9c
ZY		 405 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
406
6440adb5 407 /* De-alloc circular buffer of TFDs */
b481de9c 408 if (txq->q.n_bd)
bb8c093b 409 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
ZY		 410 txq->q.n_bd, txq->bd, txq->q.dma_addr);
411
6440adb5 412 /* De-alloc array of per-TFD driver data */
b481de9c
ZY		 413 if (txq->txb) {
414 kfree(txq->txb);
415 txq->txb = NULL;
416 }
417
6440adb5 418 /* 0-fill queue descriptor structure */
b481de9c
ZY		 419 memset(txq, 0, sizeof(*txq));
420}
421
bb8c093b 422const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
b481de9c
ZY		 423
424/*************** STATION TABLE MANAGEMENT ****
9fbab516 425 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 426 * the functionality provided here
427 */
428
429/**************************************************************/
430
01ebd063 431#if 0 /* temporary disable till we add real remove station */
6440adb5
CB		 432/**
433 * iwl4965_remove_station - Remove driver's knowledge of station.
434 *
435 * NOTE: This does not remove station from device's station table.
436 */
bb8c093b 437static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
b481de9c
ZY		 438{
439 int index = IWL_INVALID_STATION;
440 int i;
441 unsigned long flags;
442
443 spin_lock_irqsave(&priv->sta_lock, flags);
444
445 if (is_ap)
446 index = IWL_AP_ID;
447 else if (is_broadcast_ether_addr(addr))
448 index = priv->hw_setting.bcast_sta_id;
449 else
450 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
451 if (priv->stations[i].used &&
452 !compare_ether_addr(priv->stations[i].sta.sta.addr,
453 addr)) {
454 index = i;
455 break;
456 }
457
458 if (unlikely(index == IWL_INVALID_STATION))
459 goto out;
460
461 if (priv->stations[index].used) {
462 priv->stations[index].used = 0;
463 priv->num_stations--;
464 }
465
466 BUG_ON(priv->num_stations < 0);
467
468out:
469 spin_unlock_irqrestore(&priv->sta_lock, flags);
470 return 0;
471}
556f8db7 472#endif
b481de9c 473
6440adb5
CB		 474/**
475 * iwl4965_clear_stations_table - Clear the driver's station table
476 *
477 * NOTE: This does not clear or otherwise alter the device's station table.
478 */
bb8c093b 479static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
b481de9c
ZY		 480{
481 unsigned long flags;
482
483 spin_lock_irqsave(&priv->sta_lock, flags);
484
485 priv->num_stations = 0;
486 memset(priv->stations, 0, sizeof(priv->stations));
487
488 spin_unlock_irqrestore(&priv->sta_lock, flags);
489}
490
6440adb5
CB		 491/**
492 * iwl4965_add_station_flags - Add station to tables in driver and device
493 */
67d62035
RR		 494u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
495 int is_ap, u8 flags, void *ht_data)
b481de9c
ZY		 496{
497 int i;
498 int index = IWL_INVALID_STATION;
bb8c093b 499 struct iwl4965_station_entry *station;
b481de9c 500 unsigned long flags_spin;
0795af57 501 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 502
503 spin_lock_irqsave(&priv->sta_lock, flags_spin);
504 if (is_ap)
505 index = IWL_AP_ID;
506 else if (is_broadcast_ether_addr(addr))
507 index = priv->hw_setting.bcast_sta_id;
508 else
509 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
510 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
511 addr)) {
512 index = i;
513 break;
514 }
515
516 if (!priv->stations[i].used &&
517 index == IWL_INVALID_STATION)
518 index = i;
519 }
520
521
9fbab516
BC		 522 /* These two conditions have the same outcome, but keep them separate
523 since they have different meanings */
b481de9c
ZY		 524 if (unlikely(index == IWL_INVALID_STATION)) {
525 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
526 return index;
527 }
528
529 if (priv->stations[index].used &&
530 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
531 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
532 return index;
533 }
534
535
0795af57 536 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
b481de9c
ZY		 537 station = &priv->stations[index];
538 station->used = 1;
539 priv->num_stations++;
540
6440adb5 541 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 542 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
b481de9c
ZY		 543 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
544 station->sta.mode = 0;
545 station->sta.sta.sta_id = index;
546 station->sta.station_flags = 0;
547
c8b0e6e1 548#ifdef CONFIG_IWL4965_HT
b481de9c
ZY		 549 /* BCAST station and IBSS stations do not work in HT mode */
550 if (index != priv->hw_setting.bcast_sta_id &&
551 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR		 552 iwl4965_set_ht_add_station(priv, index,
553 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 554#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 555
556 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
CB		 557
558 /* Add station to device's station table */
bb8c093b 559 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
ZY		 560 return index;
561
562}
563
564/*************** DRIVER STATUS FUNCTIONS *****/
565
bb8c093b 566static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
b481de9c
ZY		 567{
568 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
569 * set but EXIT_PENDING is not */
570 return test_bit(STATUS_READY, &priv->status) &&
571 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
572 !test_bit(STATUS_EXIT_PENDING, &priv->status);
573}
574
bb8c093b 575static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
b481de9c
ZY		 576{
577 return test_bit(STATUS_ALIVE, &priv->status);
578}
579
bb8c093b 580static inline int iwl4965_is_init(struct iwl4965_priv *priv)
b481de9c
ZY		 581{
582 return test_bit(STATUS_INIT, &priv->status);
583}
584
bb8c093b 585static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
b481de9c
ZY		 586{
587 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
588 test_bit(STATUS_RF_KILL_SW, &priv->status);
589}
590
bb8c093b 591static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
b481de9c
ZY		 592{
593
bb8c093b 594 if (iwl4965_is_rfkill(priv))
b481de9c
ZY		 595 return 0;
596
bb8c093b 597 return iwl4965_is_ready(priv);
b481de9c
ZY		 598}
599
600/*************** HOST COMMAND QUEUE FUNCTIONS *****/
601
602#define IWL_CMD(x) case x : return #x
603
604static const char *get_cmd_string(u8 cmd)
605{
606 switch (cmd) {
607 IWL_CMD(REPLY_ALIVE);
608 IWL_CMD(REPLY_ERROR);
609 IWL_CMD(REPLY_RXON);
610 IWL_CMD(REPLY_RXON_ASSOC);
611 IWL_CMD(REPLY_QOS_PARAM);
612 IWL_CMD(REPLY_RXON_TIMING);
613 IWL_CMD(REPLY_ADD_STA);
614 IWL_CMD(REPLY_REMOVE_STA);
615 IWL_CMD(REPLY_REMOVE_ALL_STA);
616 IWL_CMD(REPLY_TX);
617 IWL_CMD(REPLY_RATE_SCALE);
618 IWL_CMD(REPLY_LEDS_CMD);
619 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
620 IWL_CMD(RADAR_NOTIFICATION);
621 IWL_CMD(REPLY_QUIET_CMD);
622 IWL_CMD(REPLY_CHANNEL_SWITCH);
623 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
624 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
625 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
626 IWL_CMD(POWER_TABLE_CMD);
627 IWL_CMD(PM_SLEEP_NOTIFICATION);
628 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
629 IWL_CMD(REPLY_SCAN_CMD);
630 IWL_CMD(REPLY_SCAN_ABORT_CMD);
631 IWL_CMD(SCAN_START_NOTIFICATION);
632 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
633 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
634 IWL_CMD(BEACON_NOTIFICATION);
635 IWL_CMD(REPLY_TX_BEACON);
636 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
637 IWL_CMD(QUIET_NOTIFICATION);
638 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
639 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
640 IWL_CMD(REPLY_BT_CONFIG);
641 IWL_CMD(REPLY_STATISTICS_CMD);
642 IWL_CMD(STATISTICS_NOTIFICATION);
643 IWL_CMD(REPLY_CARD_STATE_CMD);
644 IWL_CMD(CARD_STATE_NOTIFICATION);
645 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
646 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
647 IWL_CMD(SENSITIVITY_CMD);
648 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
649 IWL_CMD(REPLY_RX_PHY_CMD);
650 IWL_CMD(REPLY_RX_MPDU_CMD);
651 IWL_CMD(REPLY_4965_RX);
652 IWL_CMD(REPLY_COMPRESSED_BA);
653 default:
654 return "UNKNOWN";
655
656 }
657}
658
659#define HOST_COMPLETE_TIMEOUT (HZ / 2)
660
661/**
bb8c093b 662 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
ZY		 663 * @priv: device private data point
664 * @cmd: a point to the ucode command structure
665 *
666 * The function returns < 0 values to indicate the operation is
667 * failed. On success, it turns the index (> 0) of command in the
668 * command queue.
669 */
bb8c093b 670static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c 671{
bb8c093b
CH		 672 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
673 struct iwl4965_queue *q = &txq->q;
674 struct iwl4965_tfd_frame *tfd;
b481de9c 675 u32 *control_flags;
bb8c093b 676 struct iwl4965_cmd *out_cmd;
b481de9c
ZY		 677 u32 idx;
678 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
679 dma_addr_t phys_addr;
680 int ret;
681 unsigned long flags;
682
683 /* If any of the command structures end up being larger than
684 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
685 * we will need to increase the size of the TFD entries */
686 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
687 !(cmd->meta.flags & CMD_SIZE_HUGE));
688
c342a1b9
GG		 689 if (iwl4965_is_rfkill(priv)) {
690 IWL_DEBUG_INFO("Not sending command - RF KILL");
691 return -EIO;
692 }
693
bb8c093b 694 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
ZY		 695 IWL_ERROR("No space for Tx\n");
696 return -ENOSPC;
697 }
698
699 spin_lock_irqsave(&priv->hcmd_lock, flags);
700
fc4b6853 701 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 702 memset(tfd, 0, sizeof(*tfd));
703
704 control_flags = (u32 *) tfd;
705
fc4b6853 706 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
ZY		 707 out_cmd = &txq->cmd[idx];
708
709 out_cmd->hdr.cmd = cmd->id;
710 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
711 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
712
713 /* At this point, the out_cmd now has all of the incoming cmd
714 * information */
715
716 out_cmd->hdr.flags = 0;
717 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 718 INDEX_TO_SEQ(q->write_ptr));
b481de9c
ZY		 719 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
720 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
721
722 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
bb8c093b
CH		 723 offsetof(struct iwl4965_cmd, hdr);
724 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY		 725
726 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
727 "%d bytes at %d[%d]:%d\n",
728 get_cmd_string(out_cmd->hdr.cmd),
729 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 730 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY		 731
732 txq->need_update = 1;
6440adb5
CB		 733
734 /* Set up entry in queue's byte count circular buffer */
b481de9c 735 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
6440adb5
CB		 736
737 /* Increment and update queue's write index */
bb8c093b
CH		 738 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
739 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 740
741 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
742 return ret ? ret : idx;
743}
744
bb8c093b 745static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c
ZY		 746{
747 int ret;
748
749 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
750
751 /* An asynchronous command can not expect an SKB to be set. */
752 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
753
754 /* An asynchronous command MUST have a callback. */
755 BUG_ON(!cmd->meta.u.callback);
756
757 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
758 return -EBUSY;
759
bb8c093b 760 ret = iwl4965_enqueue_hcmd(priv, cmd);
b481de9c 761 if (ret < 0) {
bb8c093b 762 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
b481de9c
ZY		 763 get_cmd_string(cmd->id), ret);
764 return ret;
765 }
766 return 0;
767}
768
bb8c093b 769static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c
ZY		 770{
771 int cmd_idx;
772 int ret;
773 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
774
775 BUG_ON(cmd->meta.flags & CMD_ASYNC);
776
777 /* A synchronous command can not have a callback set. */
778 BUG_ON(cmd->meta.u.callback != NULL);
779
780 if (atomic_xchg(&entry, 1)) {
781 IWL_ERROR("Error sending %s: Already sending a host command\n",
782 get_cmd_string(cmd->id));
783 return -EBUSY;
784 }
785
786 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
787
788 if (cmd->meta.flags & CMD_WANT_SKB)
789 cmd->meta.source = &cmd->meta;
790
bb8c093b 791 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
b481de9c
ZY		 792 if (cmd_idx < 0) {
793 ret = cmd_idx;
bb8c093b 794 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
b481de9c
ZY		 795 get_cmd_string(cmd->id), ret);
796 goto out;
797 }
798
799 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
800 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
801 HOST_COMPLETE_TIMEOUT);
802 if (!ret) {
803 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
804 IWL_ERROR("Error sending %s: time out after %dms.\n",
805 get_cmd_string(cmd->id),
806 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
807
808 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
809 ret = -ETIMEDOUT;
810 goto cancel;
811 }
812 }
813
814 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
815 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
816 get_cmd_string(cmd->id));
817 ret = -ECANCELED;
818 goto fail;
819 }
820 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
821 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
822 get_cmd_string(cmd->id));
823 ret = -EIO;
824 goto fail;
825 }
826 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
827 IWL_ERROR("Error: Response NULL in '%s'\n",
828 get_cmd_string(cmd->id));
829 ret = -EIO;
830 goto out;
831 }
832
833 ret = 0;
834 goto out;
835
836cancel:
837 if (cmd->meta.flags & CMD_WANT_SKB) {
bb8c093b 838 struct iwl4965_cmd *qcmd;
b481de9c
ZY		 839
840 /* Cancel the CMD_WANT_SKB flag for the cmd in the
841 * TX cmd queue. Otherwise in case the cmd comes
842 * in later, it will possibly set an invalid
843 * address (cmd->meta.source). */
844 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
845 qcmd->meta.flags &= ~CMD_WANT_SKB;
846 }
847fail:
848 if (cmd->meta.u.skb) {
849 dev_kfree_skb_any(cmd->meta.u.skb);
850 cmd->meta.u.skb = NULL;
851 }
852out:
853 atomic_set(&entry, 0);
854 return ret;
855}
856
bb8c093b 857int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c 858{
b481de9c 859 if (cmd->meta.flags & CMD_ASYNC)
bb8c093b 860 return iwl4965_send_cmd_async(priv, cmd);
b481de9c 861
bb8c093b 862 return iwl4965_send_cmd_sync(priv, cmd);
b481de9c
ZY		 863}
864
bb8c093b 865int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
b481de9c 866{
bb8c093b 867 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 868 .id = id,
869 .len = len,
870 .data = data,
871 };
872
bb8c093b 873 return iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 874}
875
bb8c093b 876static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
b481de9c 877{
bb8c093b 878 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 879 .id = id,
880 .len = sizeof(val),
881 .data = &val,
882 };
883
bb8c093b 884 return iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 885}
886
bb8c093b 887int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
b481de9c 888{
bb8c093b 889 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
b481de9c
ZY		 890}
891
892/**
bb8c093b 893 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY		 894 *
895 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC		 896 * NOTE: mutex must be held before calling this fnction
897 */
bb8c093b 898static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
b481de9c
ZY		 899 const u8 *addr, int is_ap)
900{
556f8db7 901 u8 sta_id;
b481de9c 902
6440adb5 903 /* Add station to device's station table */
67d62035
RR		 904#ifdef CONFIG_IWL4965_HT
905 struct ieee80211_conf *conf = &priv->hw->conf;
906 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
907
908 if ((is_ap) &&
909 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
910 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
911 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
912 0, cur_ht_config);
913 else
914#endif /* CONFIG_IWL4965_HT */
915 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
916 0, NULL);
6440adb5
CB		 917
918 /* Set up default rate scaling table in device's station table */
b481de9c
ZY		 919 iwl4965_add_station(priv, addr, is_ap);
920
556f8db7 921 return sta_id;
b481de9c
ZY		 922}
923
924/**
bb8c093b 925 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
b481de9c
ZY		 926 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
927 * @channel: Any channel valid for the requested phymode
928
929 * In addition to setting the staging RXON, priv->phymode is also set.
930 *
931 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
932 * in the staging RXON flag structure based on the phymode
933 */
8318d78a
JB		 934static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
935 enum ieee80211_band band,
9fbab516 936 u16 channel)
b481de9c 937{
8318d78a 938 if (!iwl4965_get_channel_info(priv, band, channel)) {
b481de9c 939 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
8318d78a 940 channel, band);
b481de9c
ZY		 941 return -EINVAL;
942 }
943
944 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
8318d78a 945 (priv->band == band))
b481de9c
ZY		 946 return 0;
947
948 priv->staging_rxon.channel = cpu_to_le16(channel);
8318d78a 949 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 950 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
951 else
952 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
953
8318d78a 954 priv->band = band;
b481de9c 955
8318d78a 956 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
b481de9c
ZY		 957
958 return 0;
959}
960
961/**
bb8c093b 962 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY		 963 *
964 * NOTE: This is really only useful during development and can eventually
965 * be #ifdef'd out once the driver is stable and folks aren't actively
966 * making changes
967 */
bb8c093b 968static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY		 969{
970 int error = 0;
971 int counter = 1;
972
973 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
974 error |= le32_to_cpu(rxon->flags &
975 (RXON_FLG_TGJ_NARROW_BAND_MSK |
976 RXON_FLG_RADAR_DETECT_MSK));
977 if (error)
978 IWL_WARNING("check 24G fields %d | %d\n",
979 counter++, error);
980 } else {
981 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
982 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
983 if (error)
984 IWL_WARNING("check 52 fields %d | %d\n",
985 counter++, error);
986 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
987 if (error)
988 IWL_WARNING("check 52 CCK %d | %d\n",
989 counter++, error);
990 }
991 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
992 if (error)
993 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
994
995 /* make sure basic rates 6Mbps and 1Mbps are supported */
996 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
997 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
998 if (error)
999 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
1000
1001 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
1002 if (error)
1003 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
1004
1005 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
1006 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
1007 if (error)
1008 IWL_WARNING("check CCK and short slot %d | %d\n",
1009 counter++, error);
1010
1011 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
1012 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
1013 if (error)
1014 IWL_WARNING("check CCK & auto detect %d | %d\n",
1015 counter++, error);
1016
1017 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
1018 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
1019 if (error)
1020 IWL_WARNING("check TGG and auto detect %d | %d\n",
1021 counter++, error);
1022
1023 if (error)
1024 IWL_WARNING("Tuning to channel %d\n",
1025 le16_to_cpu(rxon->channel));
1026
1027 if (error) {
bb8c093b 1028 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY		 1029 return -1;
1030 }
1031 return 0;
1032}
1033
1034/**
9fbab516 1035 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 1036 * @priv: staging_rxon is compared to active_rxon
b481de9c 1037 *
9fbab516
BC		 1038 * If the RXON structure is changing enough to require a new tune,
1039 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1040 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 1041 */
bb8c093b 1042static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
b481de9c
ZY		 1043{
1044
1045 /* These items are only settable from the full RXON command */
1046 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1047 compare_ether_addr(priv->staging_rxon.bssid_addr,
1048 priv->active_rxon.bssid_addr) ||
1049 compare_ether_addr(priv->staging_rxon.node_addr,
1050 priv->active_rxon.node_addr) ||
1051 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1052 priv->active_rxon.wlap_bssid_addr) ||
1053 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1054 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1055 (priv->staging_rxon.air_propagation !=
1056 priv->active_rxon.air_propagation) ||
1057 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1058 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1059 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1060 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1061 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1062 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1063 return 1;
1064
1065 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1066 * be updated with the RXON_ASSOC command -- however only some
1067 * flag transitions are allowed using RXON_ASSOC */
1068
1069 /* Check if we are not switching bands */
1070 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1071 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1072 return 1;
1073
1074 /* Check if we are switching association toggle */
1075 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1076 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1077 return 1;
1078
1079 return 0;
1080}
1081
bb8c093b 1082static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
b481de9c
ZY		 1083{
1084 int rc = 0;
bb8c093b
CH		 1085 struct iwl4965_rx_packet *res = NULL;
1086 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1087 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1088 .id = REPLY_RXON_ASSOC,
1089 .len = sizeof(rxon_assoc),
1090 .meta.flags = CMD_WANT_SKB,
1091 .data = &rxon_assoc,
1092 };
bb8c093b
CH		 1093 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1094 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
b481de9c
ZY		 1095
1096 if ((rxon1->flags == rxon2->flags) &&
1097 (rxon1->filter_flags == rxon2->filter_flags) &&
1098 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1099 (rxon1->ofdm_ht_single_stream_basic_rates ==
1100 rxon2->ofdm_ht_single_stream_basic_rates) &&
1101 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1102 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1103 (rxon1->rx_chain == rxon2->rx_chain) &&
1104 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1105 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1106 return 0;
1107 }
1108
1109 rxon_assoc.flags = priv->staging_rxon.flags;
1110 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1111 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1112 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1113 rxon_assoc.reserved = 0;
1114 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1115 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1116 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1117 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1118 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1119
bb8c093b 1120 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 1121 if (rc)
1122 return rc;
1123
bb8c093b 1124 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1125 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1126 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1127 rc = -EIO;
1128 }
1129
1130 priv->alloc_rxb_skb--;
1131 dev_kfree_skb_any(cmd.meta.u.skb);
1132
1133 return rc;
1134}
1135
1136/**
bb8c093b 1137 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 1138 *
01ebd063 1139 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 1140 * the active_rxon structure is updated with the new data. This
1141 * function correctly transitions out of the RXON_ASSOC_MSK state if
1142 * a HW tune is required based on the RXON structure changes.
1143 */
bb8c093b 1144static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
b481de9c
ZY		 1145{
1146 /* cast away the const for active_rxon in this function */
bb8c093b 1147 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 1148 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 1149 int rc = 0;
1150
bb8c093b 1151 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 1152 return -1;
1153
1154 /* always get timestamp with Rx frame */
1155 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1156
bb8c093b 1157 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY		 1158 if (rc) {
1159 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1160 return -EINVAL;
1161 }
1162
1163 /* If we don't need to send a full RXON, we can use
bb8c093b 1164 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 1165 * and other flags for the current radio configuration. */
bb8c093b
CH		 1166 if (!iwl4965_full_rxon_required(priv)) {
1167 rc = iwl4965_send_rxon_assoc(priv);
b481de9c
ZY		 1168 if (rc) {
1169 IWL_ERROR("Error setting RXON_ASSOC "
1170 "configuration (%d).\n", rc);
1171 return rc;
1172 }
1173
1174 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1175
1176 return 0;
1177 }
1178
1179 /* station table will be cleared */
1180 priv->assoc_station_added = 0;
1181
c8b0e6e1 1182#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 1183 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1184 if (!priv->error_recovering)
1185 priv->start_calib = 0;
1186
1187 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 1188#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 1189
1190 /* If we are currently associated and the new config requires
1191 * an RXON_ASSOC and the new config wants the associated mask enabled,
1192 * we must clear the associated from the active configuration
1193 * before we apply the new config */
bb8c093b 1194 if (iwl4965_is_associated(priv) &&
b481de9c
ZY		 1195 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1196 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1197 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1198
bb8c093b
CH		 1199 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1200 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY		 1201 &priv->active_rxon);
1202
1203 /* If the mask clearing failed then we set
1204 * active_rxon back to what it was previously */
1205 if (rc) {
1206 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1207 IWL_ERROR("Error clearing ASSOC_MSK on current "
1208 "configuration (%d).\n", rc);
1209 return rc;
1210 }
b481de9c
ZY		 1211 }
1212
1213 IWL_DEBUG_INFO("Sending RXON\n"
1214 "* with%s RXON_FILTER_ASSOC_MSK\n"
1215 "* channel = %d\n"
0795af57 1216 "* bssid = %s\n",
b481de9c
ZY		 1217 ((priv->staging_rxon.filter_flags &
1218 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1219 le16_to_cpu(priv->staging_rxon.channel),
0795af57 1220 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c
ZY		 1221
1222 /* Apply the new configuration */
bb8c093b
CH		 1223 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1224 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY		 1225 if (rc) {
1226 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1227 return rc;
1228 }
1229
bb8c093b 1230 iwl4965_clear_stations_table(priv);
556f8db7 1231
c8b0e6e1 1232#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 1233 if (!priv->error_recovering)
1234 priv->start_calib = 0;
1235
1236 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1237 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 1238#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 1239
1240 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1241
1242 /* If we issue a new RXON command which required a tune then we must
1243 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 1244 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 1245 if (rc) {
1246 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1247 return rc;
1248 }
1249
1250 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 1251 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY		 1252 IWL_INVALID_STATION) {
1253 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1254 return -EIO;
1255 }
1256
1257 /* If we have set the ASSOC_MSK and we are in BSS mode then
1258 * add the IWL_AP_ID to the station rate table */
bb8c093b 1259 if (iwl4965_is_associated(priv) &&
b481de9c 1260 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 1261 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY		 1262 == IWL_INVALID_STATION) {
1263 IWL_ERROR("Error adding AP address for transmit.\n");
1264 return -EIO;
1265 }
1266 priv->assoc_station_added = 1;
1267 }
1268
1269 return 0;
1270}
1271
bb8c093b 1272static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
b481de9c 1273{
bb8c093b 1274 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY		 1275 .flags = 3,
1276 .lead_time = 0xAA,
1277 .max_kill = 1,
1278 .kill_ack_mask = 0,
1279 .kill_cts_mask = 0,
1280 };
1281
bb8c093b
CH		 1282 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1283 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY		 1284}
1285
bb8c093b 1286static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
b481de9c
ZY		 1287{
1288 int rc = 0;
bb8c093b
CH		 1289 struct iwl4965_rx_packet *res;
1290 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1291 .id = REPLY_SCAN_ABORT_CMD,
1292 .meta.flags = CMD_WANT_SKB,
1293 };
1294
1295 /* If there isn't a scan actively going on in the hardware
1296 * then we are in between scan bands and not actually
1297 * actively scanning, so don't send the abort command */
1298 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1299 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1300 return 0;
1301 }
1302
bb8c093b 1303 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 1304 if (rc) {
1305 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1306 return rc;
1307 }
1308
bb8c093b 1309 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1310 if (res->u.status != CAN_ABORT_STATUS) {
1311 /* The scan abort will return 1 for success or
1312 * 2 for "failure". A failure condition can be
1313 * due to simply not being in an active scan which
1314 * can occur if we send the scan abort before we
1315 * the microcode has notified us that a scan is
1316 * completed. */
1317 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1318 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1319 clear_bit(STATUS_SCAN_HW, &priv->status);
1320 }
1321
1322 dev_kfree_skb_any(cmd.meta.u.skb);
1323
1324 return rc;
1325}
1326
bb8c093b
CH		 1327static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
1328 struct iwl4965_cmd *cmd,
b481de9c
ZY		 1329 struct sk_buff *skb)
1330{
1331 return 1;
1332}
1333
1334/*
1335 * CARD_STATE_CMD
1336 *
9fbab516 1337 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY		 1338 *
1339 * When in the 'enable' state the card operates as normal.
1340 * When in the 'disable' state, the card enters into a low power mode.
1341 * When in the 'halt' state, the card is shut down and must be fully
1342 * restarted to come back on.
1343 */
bb8c093b 1344static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
b481de9c 1345{
bb8c093b 1346 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1347 .id = REPLY_CARD_STATE_CMD,
1348 .len = sizeof(u32),
1349 .data = &flags,
1350 .meta.flags = meta_flag,
1351 };
1352
1353 if (meta_flag & CMD_ASYNC)
bb8c093b 1354 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
b481de9c 1355
bb8c093b 1356 return iwl4965_send_cmd(priv, &cmd);
b481de9c
ZY		 1357}
1358
bb8c093b
CH		 1359static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
1360 struct iwl4965_cmd *cmd, struct sk_buff *skb)
b481de9c 1361{
bb8c093b 1362 struct iwl4965_rx_packet *res = NULL;
b481de9c
ZY		 1363
1364 if (!skb) {
1365 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1366 return 1;
1367 }
1368
bb8c093b 1369 res = (struct iwl4965_rx_packet *)skb->data;
b481de9c
ZY		 1370 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1371 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1372 res->hdr.flags);
1373 return 1;
1374 }
1375
1376 switch (res->u.add_sta.status) {
1377 case ADD_STA_SUCCESS_MSK:
1378 break;
1379 default:
1380 break;
1381 }
1382
1383 /* We didn't cache the SKB; let the caller free it */
1384 return 1;
1385}
1386
bb8c093b
CH		 1387int iwl4965_send_add_station(struct iwl4965_priv *priv,
1388 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 1389{
bb8c093b 1390 struct iwl4965_rx_packet *res = NULL;
b481de9c 1391 int rc = 0;
bb8c093b 1392 struct iwl4965_host_cmd cmd = {
b481de9c 1393 .id = REPLY_ADD_STA,
bb8c093b 1394 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY		 1395 .meta.flags = flags,
1396 .data = sta,
1397 };
1398
1399 if (flags & CMD_ASYNC)
bb8c093b 1400 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
b481de9c
ZY		 1401 else
1402 cmd.meta.flags |= CMD_WANT_SKB;
1403
bb8c093b 1404 rc = iwl4965_send_cmd(priv, &cmd);
b481de9c
ZY		 1405
1406 if (rc || (flags & CMD_ASYNC))
1407 return rc;
1408
bb8c093b 1409 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1410 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1411 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1412 res->hdr.flags);
1413 rc = -EIO;
1414 }
1415
1416 if (rc == 0) {
1417 switch (res->u.add_sta.status) {
1418 case ADD_STA_SUCCESS_MSK:
1419 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1420 break;
1421 default:
1422 rc = -EIO;
1423 IWL_WARNING("REPLY_ADD_STA failed\n");
1424 break;
1425 }
1426 }
1427
1428 priv->alloc_rxb_skb--;
1429 dev_kfree_skb_any(cmd.meta.u.skb);
1430
1431 return rc;
1432}
1433
bb8c093b 1434static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
b481de9c
ZY		 1435 struct ieee80211_key_conf *keyconf,
1436 u8 sta_id)
1437{
1438 unsigned long flags;
1439 __le16 key_flags = 0;
1440
1441 switch (keyconf->alg) {
1442 case ALG_CCMP:
1443 key_flags |= STA_KEY_FLG_CCMP;
1444 key_flags |= cpu_to_le16(
1445 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1446 key_flags &= ~STA_KEY_FLG_INVALID;
1447 break;
1448 case ALG_TKIP:
1449 case ALG_WEP:
b481de9c
ZY		 1450 default:
1451 return -EINVAL;
1452 }
1453 spin_lock_irqsave(&priv->sta_lock, flags);
1454 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1455 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1456 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1457 keyconf->keylen);
1458
1459 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1460 keyconf->keylen);
1461 priv->stations[sta_id].sta.key.key_flags = key_flags;
1462 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1463 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1464
1465 spin_unlock_irqrestore(&priv->sta_lock, flags);
1466
1467 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
bb8c093b 1468 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY		 1469 return 0;
1470}
1471
bb8c093b 1472static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
b481de9c
ZY		 1473{
1474 unsigned long flags;
1475
1476 spin_lock_irqsave(&priv->sta_lock, flags);
bb8c093b
CH		 1477 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1478 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
b481de9c
ZY		 1479 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1480 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1481 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1482 spin_unlock_irqrestore(&priv->sta_lock, flags);
1483
1484 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
bb8c093b 1485 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY		 1486 return 0;
1487}
1488
bb8c093b 1489static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
b481de9c
ZY		 1490{
1491 struct list_head *element;
1492
1493 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1494 priv->frames_count);
1495
1496 while (!list_empty(&priv->free_frames)) {
1497 element = priv->free_frames.next;
1498 list_del(element);
bb8c093b 1499 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY		 1500 priv->frames_count--;
1501 }
1502
1503 if (priv->frames_count) {
1504 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1505 priv->frames_count);
1506 priv->frames_count = 0;
1507 }
1508}
1509
bb8c093b 1510static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
b481de9c 1511{
bb8c093b 1512 struct iwl4965_frame *frame;
b481de9c
ZY		 1513 struct list_head *element;
1514 if (list_empty(&priv->free_frames)) {
1515 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1516 if (!frame) {
1517 IWL_ERROR("Could not allocate frame!\n");
1518 return NULL;
1519 }
1520
1521 priv->frames_count++;
1522 return frame;
1523 }
1524
1525 element = priv->free_frames.next;
1526 list_del(element);
bb8c093b 1527 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY		 1528}
1529
bb8c093b 1530static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY		 1531{
1532 memset(frame, 0, sizeof(*frame));
1533 list_add(&frame->list, &priv->free_frames);
1534}
1535
bb8c093b 1536unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
b481de9c
ZY		 1537 struct ieee80211_hdr *hdr,
1538 const u8 *dest, int left)
1539{
1540
bb8c093b 1541 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY		 1542 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1543 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1544 return 0;
1545
1546 if (priv->ibss_beacon->len > left)
1547 return 0;
1548
1549 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1550
1551 return priv->ibss_beacon->len;
1552}
1553
bb8c093b 1554int iwl4965_rate_index_from_plcp(int plcp)
b481de9c
ZY		 1555{
1556 int i = 0;
1557
77626355 1558 /* 4965 HT rate format */
b481de9c
ZY		 1559 if (plcp & RATE_MCS_HT_MSK) {
1560 i = (plcp & 0xff);
1561
1562 if (i >= IWL_RATE_MIMO_6M_PLCP)
1563 i = i - IWL_RATE_MIMO_6M_PLCP;
1564
1565 i += IWL_FIRST_OFDM_RATE;
1566 /* skip 9M not supported in ht*/
1567 if (i >= IWL_RATE_9M_INDEX)
1568 i += 1;
1569 if ((i >= IWL_FIRST_OFDM_RATE) &&
1570 (i <= IWL_LAST_OFDM_RATE))
1571 return i;
77626355
BC		 1572
1573 /* 4965 legacy rate format, search for match in table */
b481de9c 1574 } else {
bb8c093b
CH		 1575 for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
1576 if (iwl4965_rates[i].plcp == (plcp &0xFF))
b481de9c
ZY		 1577 return i;
1578 }
1579 return -1;
1580}
1581
bb8c093b 1582static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
b481de9c
ZY		 1583{
1584 u8 i;
1585
1586 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
bb8c093b 1587 i = iwl4965_rates[i].next_ieee) {
b481de9c 1588 if (rate_mask & (1 << i))
bb8c093b 1589 return iwl4965_rates[i].plcp;
b481de9c
ZY		 1590 }
1591
1592 return IWL_RATE_INVALID;
1593}
1594
bb8c093b 1595static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
b481de9c 1596{
bb8c093b 1597 struct iwl4965_frame *frame;
b481de9c
ZY		 1598 unsigned int frame_size;
1599 int rc;
1600 u8 rate;
1601
bb8c093b 1602 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY		 1603
1604 if (!frame) {
1605 IWL_ERROR("Could not obtain free frame buffer for beacon "
1606 "command.\n");
1607 return -ENOMEM;
1608 }
1609
1610 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
bb8c093b 1611 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
b481de9c
ZY		 1612 0xFF0);
1613 if (rate == IWL_INVALID_RATE)
1614 rate = IWL_RATE_6M_PLCP;
1615 } else {
bb8c093b 1616 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
b481de9c
ZY		 1617 if (rate == IWL_INVALID_RATE)
1618 rate = IWL_RATE_1M_PLCP;
1619 }
1620
bb8c093b 1621 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1622
bb8c093b 1623 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 1624 &frame->u.cmd[0]);
1625
bb8c093b 1626 iwl4965_free_frame(priv, frame);
b481de9c
ZY		 1627
1628 return rc;
1629}
1630
1631/******************************************************************************
1632 *
1633 * EEPROM related functions
1634 *
1635 ******************************************************************************/
1636
bb8c093b 1637static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
b481de9c
ZY		 1638{
1639 memcpy(mac, priv->eeprom.mac_address, 6);
1640}
1641
74a3a250
RC		 1642static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
1643{
1644 iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1645 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
1646}
1647
b481de9c 1648/**
bb8c093b 1649 * iwl4965_eeprom_init - read EEPROM contents
b481de9c 1650 *
6440adb5 1651 * Load the EEPROM contents from adapter into priv->eeprom
b481de9c
ZY		 1652 *
1653 * NOTE: This routine uses the non-debug IO access functions.
1654 */
bb8c093b 1655int iwl4965_eeprom_init(struct iwl4965_priv *priv)
b481de9c 1656{
58ff6d4d 1657 u16 *e = (u16 *)&priv->eeprom;
bb8c093b 1658 u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
b481de9c
ZY		 1659 u32 r;
1660 int sz = sizeof(priv->eeprom);
1661 int rc;
1662 int i;
1663 u16 addr;
1664
1665 /* The EEPROM structure has several padding buffers within it
1666 * and when adding new EEPROM maps is subject to programmer errors
1667 * which may be very difficult to identify without explicitly
1668 * checking the resulting size of the eeprom map. */
1669 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1670
1671 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1672 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1673 return -ENOENT;
1674 }
1675
6440adb5 1676 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
bb8c093b 1677 rc = iwl4965_eeprom_acquire_semaphore(priv);
b481de9c 1678 if (rc < 0) {
91e17473 1679 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
b481de9c
ZY		 1680 return -ENOENT;
1681 }
1682
1683 /* eeprom is an array of 16bit values */
1684 for (addr = 0; addr < sz; addr += sizeof(u16)) {
bb8c093b
CH		 1685 _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
1686 _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
b481de9c
ZY		 1687
1688 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1689 i += IWL_EEPROM_ACCESS_DELAY) {
bb8c093b 1690 r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
b481de9c
ZY		 1691 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1692 break;
1693 udelay(IWL_EEPROM_ACCESS_DELAY);
1694 }
1695
1696 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1697 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1698 rc = -ETIMEDOUT;
1699 goto done;
1700 }
58ff6d4d 1701 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
b481de9c
ZY		 1702 }
1703 rc = 0;
1704
1705done:
bb8c093b 1706 iwl4965_eeprom_release_semaphore(priv);
b481de9c
ZY		 1707 return rc;
1708}
1709
1710/******************************************************************************
1711 *
1712 * Misc. internal state and helper functions
1713 *
1714 ******************************************************************************/
c8b0e6e1 1715#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY		 1716
1717/**
bb8c093b 1718 * iwl4965_report_frame - dump frame to syslog during debug sessions
b481de9c 1719 *
9fbab516 1720 * You may hack this function to show different aspects of received frames,
b481de9c
ZY		 1721 * including selective frame dumps.
1722 * group100 parameter selects whether to show 1 out of 100 good frames.
1723 *
9fbab516
BC		 1724 * TODO: This was originally written for 3945, need to audit for
1725 * proper operation with 4965.
b481de9c 1726 */
bb8c093b
CH		 1727void iwl4965_report_frame(struct iwl4965_priv *priv,
1728 struct iwl4965_rx_packet *pkt,
b481de9c
ZY		 1729 struct ieee80211_hdr *header, int group100)
1730{
1731 u32 to_us;
1732 u32 print_summary = 0;
1733 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1734 u32 hundred = 0;
1735 u32 dataframe = 0;
1736 u16 fc;
1737 u16 seq_ctl;
1738 u16 channel;
1739 u16 phy_flags;
1740 int rate_sym;
1741 u16 length;
1742 u16 status;
1743 u16 bcn_tmr;
1744 u32 tsf_low;
1745 u64 tsf;
1746 u8 rssi;
1747 u8 agc;
1748 u16 sig_avg;
1749 u16 noise_diff;
bb8c093b
CH		 1750 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1751 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1752 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
b481de9c
ZY		 1753 u8 *data = IWL_RX_DATA(pkt);
1754
1755 /* MAC header */
1756 fc = le16_to_cpu(header->frame_control);
1757 seq_ctl = le16_to_cpu(header->seq_ctrl);
1758
1759 /* metadata */
1760 channel = le16_to_cpu(rx_hdr->channel);
1761 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1762 rate_sym = rx_hdr->rate;
1763 length = le16_to_cpu(rx_hdr->len);
1764
1765 /* end-of-frame status and timestamp */
1766 status = le32_to_cpu(rx_end->status);
1767 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1768 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1769 tsf = le64_to_cpu(rx_end->timestamp);
1770
1771 /* signal statistics */
1772 rssi = rx_stats->rssi;
1773 agc = rx_stats->agc;
1774 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1775 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1776
1777 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1778
1779 /* if data frame is to us and all is good,
1780 * (optionally) print summary for only 1 out of every 100 */
1781 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1782 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1783 dataframe = 1;
1784 if (!group100)
1785 print_summary = 1; /* print each frame */
1786 else if (priv->framecnt_to_us < 100) {
1787 priv->framecnt_to_us++;
1788 print_summary = 0;
1789 } else {
1790 priv->framecnt_to_us = 0;
1791 print_summary = 1;
1792 hundred = 1;
1793 }
1794 } else {
1795 /* print summary for all other frames */
1796 print_summary = 1;
1797 }
1798
1799 if (print_summary) {
1800 char *title;
1801 u32 rate;
1802
1803 if (hundred)
1804 title = "100Frames";
1805 else if (fc & IEEE80211_FCTL_RETRY)
1806 title = "Retry";
1807 else if (ieee80211_is_assoc_response(fc))
1808 title = "AscRsp";
1809 else if (ieee80211_is_reassoc_response(fc))
1810 title = "RasRsp";
1811 else if (ieee80211_is_probe_response(fc)) {
1812 title = "PrbRsp";
1813 print_dump = 1; /* dump frame contents */
1814 } else if (ieee80211_is_beacon(fc)) {
1815 title = "Beacon";
1816 print_dump = 1; /* dump frame contents */
1817 } else if (ieee80211_is_atim(fc))
1818 title = "ATIM";
1819 else if (ieee80211_is_auth(fc))
1820 title = "Auth";
1821 else if (ieee80211_is_deauth(fc))
1822 title = "DeAuth";
1823 else if (ieee80211_is_disassoc(fc))
1824 title = "DisAssoc";
1825 else
1826 title = "Frame";
1827
bb8c093b 1828 rate = iwl4965_rate_index_from_plcp(rate_sym);
b481de9c
ZY		 1829 if (rate == -1)
1830 rate = 0;
1831 else
bb8c093b 1832 rate = iwl4965_rates[rate].ieee / 2;
b481de9c
ZY		 1833
1834 /* print frame summary.
1835 * MAC addresses show just the last byte (for brevity),
1836 * but you can hack it to show more, if you'd like to. */
1837 if (dataframe)
1838 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1839 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1840 title, fc, header->addr1[5],
1841 length, rssi, channel, rate);
1842 else {
1843 /* src/dst addresses assume managed mode */
1844 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1845 "src=0x%02x, rssi=%u, tim=%lu usec, "
1846 "phy=0x%02x, chnl=%d\n",
1847 title, fc, header->addr1[5],
1848 header->addr3[5], rssi,
1849 tsf_low - priv->scan_start_tsf,
1850 phy_flags, channel);
1851 }
1852 }
1853 if (print_dump)
bb8c093b 1854 iwl4965_print_hex_dump(IWL_DL_RX, data, length);
b481de9c
ZY		 1855}
1856#endif
1857
bb8c093b 1858static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
b481de9c
ZY		 1859{
1860 if (priv->hw_setting.shared_virt)
1861 pci_free_consistent(priv->pci_dev,
bb8c093b 1862 sizeof(struct iwl4965_shared),
b481de9c
ZY		 1863 priv->hw_setting.shared_virt,
1864 priv->hw_setting.shared_phys);
1865}
1866
1867/**
bb8c093b 1868 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY		 1869 *
1870 * return : set the bit for each supported rate insert in ie
1871 */
bb8c093b 1872static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1873 u16 basic_rate, int *left)
b481de9c
ZY		 1874{
1875 u16 ret_rates = 0, bit;
1876 int i;
c7c46676
TW		 1877 u8 *cnt = ie;
1878 u8 *rates = ie + 1;
b481de9c
ZY		 1879
1880 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1881 if (bit & supported_rate) {
1882 ret_rates |= bit;
bb8c093b 1883 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW		 1884 ((bit & basic_rate) ? 0x80 : 0x00);
1885 (*cnt)++;
1886 (*left)--;
1887 if ((*left <= 0) ||
1888 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY		 1889 break;
1890 }
1891 }
1892
1893 return ret_rates;
1894}
1895
b481de9c 1896/**
bb8c093b 1897 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1898 */
bb8c093b 1899static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
78330fdd
TW		 1900 enum ieee80211_band band,
1901 struct ieee80211_mgmt *frame,
1902 int left, int is_direct)
b481de9c
ZY		 1903{
1904 int len = 0;
1905 u8 *pos = NULL;
bee488db 1906 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
8fb88032 1907#ifdef CONFIG_IWL4965_HT
78330fdd
TW		 1908 const struct ieee80211_supported_band *sband =
1909 iwl4965_get_hw_mode(priv, band);
8fb88032 1910#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 1911
1912 /* Make sure there is enough space for the probe request,
1913 * two mandatory IEs and the data */
1914 left -= 24;
1915 if (left < 0)
1916 return 0;
1917 len += 24;
1918
1919 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1920 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1921 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1922 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY		 1923 frame->seq_ctrl = 0;
1924
1925 /* fill in our indirect SSID IE */
1926 /* ...next IE... */
1927
1928 left -= 2;
1929 if (left < 0)
1930 return 0;
1931 len += 2;
1932 pos = &(frame->u.probe_req.variable[0]);
1933 *pos++ = WLAN_EID_SSID;
1934 *pos++ = 0;
1935
1936 /* fill in our direct SSID IE... */
1937 if (is_direct) {
1938 /* ...next IE... */
1939 left -= 2 + priv->essid_len;
1940 if (left < 0)
1941 return 0;
1942 /* ... fill it in... */
1943 *pos++ = WLAN_EID_SSID;
1944 *pos++ = priv->essid_len;
1945 memcpy(pos, priv->essid, priv->essid_len);
1946 pos += priv->essid_len;
1947 len += 2 + priv->essid_len;
1948 }
1949
1950 /* fill in supported rate */
1951 /* ...next IE... */
1952 left -= 2;
1953 if (left < 0)
1954 return 0;
c7c46676 1955
b481de9c
ZY		 1956 /* ... fill it in... */
1957 *pos++ = WLAN_EID_SUPP_RATES;
1958 *pos = 0;
c7c46676 1959
bee488db 1960 /* exclude 60M rate */
1961 active_rates = priv->rates_mask;
1962 active_rates &= ~IWL_RATE_60M_MASK;
1963
1964 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1965
c7c46676 1966 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1967 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1968 active_rate_basic, &left);
c7c46676
TW		 1969 active_rates &= ~ret_rates;
1970
bb8c093b 1971 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1972 active_rate_basic, &left);
c7c46676
TW		 1973 active_rates &= ~ret_rates;
1974
b481de9c
ZY		 1975 len += 2 + *pos;
1976 pos += (*pos) + 1;
c7c46676 1977 if (active_rates == 0)
b481de9c
ZY		 1978 goto fill_end;
1979
1980 /* fill in supported extended rate */
1981 /* ...next IE... */
1982 left -= 2;
1983 if (left < 0)
1984 return 0;
1985 /* ... fill it in... */
1986 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1987 *pos = 0;
bb8c093b 1988 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1989 active_rate_basic, &left);
b481de9c
ZY		 1990 if (*pos > 0)
1991 len += 2 + *pos;
1992
c8b0e6e1 1993#ifdef CONFIG_IWL4965_HT
78330fdd
TW		 1994 if (sband && sband->ht_info.ht_supported) {
1995 struct ieee80211_ht_cap *ht_cap;
b481de9c
ZY		 1996 pos += (*pos) + 1;
1997 *pos++ = WLAN_EID_HT_CAPABILITY;
8fb88032 1998 *pos++ = sizeof(struct ieee80211_ht_cap);
78330fdd
TW		 1999 ht_cap = (struct ieee80211_ht_cap *)pos;
2000 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
2001 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
2002 ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
2003 IEEE80211_HT_CAP_AMPDU_FACTOR) |
2004 ((sband->ht_info.ampdu_density << 2) &
2005 IEEE80211_HT_CAP_AMPDU_DENSITY);
8fb88032 2006 len += 2 + sizeof(struct ieee80211_ht_cap);
b481de9c 2007 }
c8b0e6e1 2008#endif /*CONFIG_IWL4965_HT */
b481de9c
ZY		 2009
2010 fill_end:
2011 return (u16)len;
2012}
2013
2014/*
2015 * QoS support
2016*/
bb8c093b
CH		 2017static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
2018 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY		 2019{
2020
bb8c093b
CH		 2021 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
2022 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY		 2023}
2024
bb8c093b 2025static void iwl4965_reset_qos(struct iwl4965_priv *priv)
b481de9c
ZY		 2026{
2027 u16 cw_min = 15;
2028 u16 cw_max = 1023;
2029 u8 aifs = 2;
2030 u8 is_legacy = 0;
2031 unsigned long flags;
2032 int i;
2033
2034 spin_lock_irqsave(&priv->lock, flags);
2035 priv->qos_data.qos_active = 0;
2036
2037 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
2038 if (priv->qos_data.qos_enable)
2039 priv->qos_data.qos_active = 1;
2040 if (!(priv->active_rate & 0xfff0)) {
2041 cw_min = 31;
2042 is_legacy = 1;
2043 }
2044 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2045 if (priv->qos_data.qos_enable)
2046 priv->qos_data.qos_active = 1;
2047 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
2048 cw_min = 31;
2049 is_legacy = 1;
2050 }
2051
2052 if (priv->qos_data.qos_active)
2053 aifs = 3;
2054
2055 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
2056 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
2057 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
2058 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
2059 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
2060
2061 if (priv->qos_data.qos_active) {
2062 i = 1;
2063 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
2064 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
2065 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
2066 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2067 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2068
2069 i = 2;
2070 priv->qos_data.def_qos_parm.ac[i].cw_min =
2071 cpu_to_le16((cw_min + 1) / 2 - 1);
2072 priv->qos_data.def_qos_parm.ac[i].cw_max =
2073 cpu_to_le16(cw_max);
2074 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2075 if (is_legacy)
2076 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2077 cpu_to_le16(6016);
2078 else
2079 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2080 cpu_to_le16(3008);
2081 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2082
2083 i = 3;
2084 priv->qos_data.def_qos_parm.ac[i].cw_min =
2085 cpu_to_le16((cw_min + 1) / 4 - 1);
2086 priv->qos_data.def_qos_parm.ac[i].cw_max =
2087 cpu_to_le16((cw_max + 1) / 2 - 1);
2088 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2089 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2090 if (is_legacy)
2091 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2092 cpu_to_le16(3264);
2093 else
2094 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2095 cpu_to_le16(1504);
2096 } else {
2097 for (i = 1; i < 4; i++) {
2098 priv->qos_data.def_qos_parm.ac[i].cw_min =
2099 cpu_to_le16(cw_min);
2100 priv->qos_data.def_qos_parm.ac[i].cw_max =
2101 cpu_to_le16(cw_max);
2102 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2103 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2104 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2105 }
2106 }
2107 IWL_DEBUG_QOS("set QoS to default \n");
2108
2109 spin_unlock_irqrestore(&priv->lock, flags);
2110}
2111
bb8c093b 2112static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
b481de9c
ZY		 2113{
2114 unsigned long flags;
2115
b481de9c
ZY		 2116 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2117 return;
2118
2119 if (!priv->qos_data.qos_enable)
2120 return;
2121
2122 spin_lock_irqsave(&priv->lock, flags);
2123 priv->qos_data.def_qos_parm.qos_flags = 0;
2124
2125 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2126 !priv->qos_data.qos_cap.q_AP.txop_request)
2127 priv->qos_data.def_qos_parm.qos_flags |=
2128 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 2129 if (priv->qos_data.qos_active)
2130 priv->qos_data.def_qos_parm.qos_flags |=
2131 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2132
c8b0e6e1 2133#ifdef CONFIG_IWL4965_HT
fd105e79 2134 if (priv->current_ht_config.is_ht)
f1f1f5c7 2135 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 2136#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 2137
b481de9c
ZY		 2138 spin_unlock_irqrestore(&priv->lock, flags);
2139
bb8c093b 2140 if (force || iwl4965_is_associated(priv)) {
f1f1f5c7
TW		 2141 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
2142 priv->qos_data.qos_active,
2143 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 2144
bb8c093b 2145 iwl4965_send_qos_params_command(priv,
b481de9c
ZY		 2146 &(priv->qos_data.def_qos_parm));
2147 }
2148}
2149
b481de9c
ZY		 2150/*
2151 * Power management (not Tx power!) functions
2152 */
2153#define MSEC_TO_USEC 1024
2154
2155#define NOSLP __constant_cpu_to_le16(0), 0, 0
2156#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
2157#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2158#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2159 __constant_cpu_to_le32(X1), \
2160 __constant_cpu_to_le32(X2), \
2161 __constant_cpu_to_le32(X3), \
2162 __constant_cpu_to_le32(X4)}
2163
2164
2165/* default power management (not Tx power) table values */
2166/* for tim 0-10 */
bb8c093b 2167static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
b481de9c
ZY		 2168 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2169 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2170 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2171 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2172 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2173 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2174};
2175
2176/* for tim > 10 */
bb8c093b 2177static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
b481de9c
ZY		 2178 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2179 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2180 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2181 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2182 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2183 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2184 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2185 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2186 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2187 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2188};
2189
bb8c093b 2190int iwl4965_power_init_handle(struct iwl4965_priv *priv)
b481de9c
ZY		 2191{
2192 int rc = 0, i;
bb8c093b
CH		 2193 struct iwl4965_power_mgr *pow_data;
2194 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
b481de9c
ZY		 2195 u16 pci_pm;
2196
2197 IWL_DEBUG_POWER("Initialize power \n");
2198
2199 pow_data = &(priv->power_data);
2200
2201 memset(pow_data, 0, sizeof(*pow_data));
2202
2203 pow_data->active_index = IWL_POWER_RANGE_0;
2204 pow_data->dtim_val = 0xffff;
2205
2206 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2207 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2208
2209 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2210 if (rc != 0)
2211 return 0;
2212 else {
bb8c093b 2213 struct iwl4965_powertable_cmd *cmd;
b481de9c
ZY		 2214
2215 IWL_DEBUG_POWER("adjust power command flags\n");
2216
2217 for (i = 0; i < IWL_POWER_AC; i++) {
2218 cmd = &pow_data->pwr_range_0[i].cmd;
2219
2220 if (pci_pm & 0x1)
2221 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2222 else
2223 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2224 }
2225 }
2226 return rc;
2227}
2228
bb8c093b
CH		 2229static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
2230 struct iwl4965_powertable_cmd *cmd, u32 mode)
b481de9c
ZY		 2231{
2232 int rc = 0, i;
2233 u8 skip;
2234 u32 max_sleep = 0;
bb8c093b 2235 struct iwl4965_power_vec_entry *range;
b481de9c 2236 u8 period = 0;
bb8c093b 2237 struct iwl4965_power_mgr *pow_data;
b481de9c
ZY		 2238
2239 if (mode > IWL_POWER_INDEX_5) {
2240 IWL_DEBUG_POWER("Error invalid power mode \n");
2241 return -1;
2242 }
2243 pow_data = &(priv->power_data);
2244
2245 if (pow_data->active_index == IWL_POWER_RANGE_0)
2246 range = &pow_data->pwr_range_0[0];
2247 else
2248 range = &pow_data->pwr_range_1[1];
2249
bb8c093b 2250 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
b481de9c
ZY		 2251
2252#ifdef IWL_MAC80211_DISABLE
2253 if (priv->assoc_network != NULL) {
2254 unsigned long flags;
2255
2256 period = priv->assoc_network->tim.tim_period;
2257 }
2258#endif /*IWL_MAC80211_DISABLE */
2259 skip = range[mode].no_dtim;
2260
2261 if (period == 0) {
2262 period = 1;
2263 skip = 0;
2264 }
2265
2266 if (skip == 0) {
2267 max_sleep = period;
2268 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2269 } else {
2270 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2271 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2272 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2273 }
2274
2275 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2276 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2277 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2278 }
2279
2280 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2281 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2282 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2283 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2284 le32_to_cpu(cmd->sleep_interval[0]),
2285 le32_to_cpu(cmd->sleep_interval[1]),
2286 le32_to_cpu(cmd->sleep_interval[2]),
2287 le32_to_cpu(cmd->sleep_interval[3]),
2288 le32_to_cpu(cmd->sleep_interval[4]));
2289
2290 return rc;
2291}
2292
bb8c093b 2293static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
b481de9c 2294{
9a62f73b 2295 u32 uninitialized_var(final_mode);
b481de9c 2296 int rc;
bb8c093b 2297 struct iwl4965_powertable_cmd cmd;
b481de9c
ZY		 2298
2299 /* If on battery, set to 3,
01ebd063 2300 * if plugged into AC power, set to CAM ("continuously aware mode"),
b481de9c
ZY		 2301 * else user level */
2302 switch (mode) {
2303 case IWL_POWER_BATTERY:
2304 final_mode = IWL_POWER_INDEX_3;
2305 break;
2306 case IWL_POWER_AC:
2307 final_mode = IWL_POWER_MODE_CAM;
2308 break;
2309 default:
2310 final_mode = mode;
2311 break;
2312 }
2313
2314 cmd.keep_alive_beacons = 0;
2315
bb8c093b 2316 iwl4965_update_power_cmd(priv, &cmd, final_mode);
b481de9c 2317
bb8c093b 2318 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
b481de9c
ZY		 2319
2320 if (final_mode == IWL_POWER_MODE_CAM)
2321 clear_bit(STATUS_POWER_PMI, &priv->status);
2322 else
2323 set_bit(STATUS_POWER_PMI, &priv->status);
2324
2325 return rc;
2326}
2327
bb8c093b 2328int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 2329{
2330 /* Filter incoming packets to determine if they are targeted toward
2331 * this network, discarding packets coming from ourselves */
2332 switch (priv->iw_mode) {
2333 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2334 /* packets from our adapter are dropped (echo) */
2335 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2336 return 0;
2337 /* {broad,multi}cast packets to our IBSS go through */
2338 if (is_multicast_ether_addr(header->addr1))
2339 return !compare_ether_addr(header->addr3, priv->bssid);
2340 /* packets to our adapter go through */
2341 return !compare_ether_addr(header->addr1, priv->mac_addr);
2342 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2343 /* packets from our adapter are dropped (echo) */
2344 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2345 return 0;
2346 /* {broad,multi}cast packets to our BSS go through */
2347 if (is_multicast_ether_addr(header->addr1))
2348 return !compare_ether_addr(header->addr2, priv->bssid);
2349 /* packets to our adapter go through */
2350 return !compare_ether_addr(header->addr1, priv->mac_addr);
2351 }
2352
2353 return 1;
2354}
2355
2356#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2357
bb8c093b 2358static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY		 2359{
2360 switch (status & TX_STATUS_MSK) {
2361 case TX_STATUS_SUCCESS:
2362 return "SUCCESS";
2363 TX_STATUS_ENTRY(SHORT_LIMIT);
2364 TX_STATUS_ENTRY(LONG_LIMIT);
2365 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2366 TX_STATUS_ENTRY(MGMNT_ABORT);
2367 TX_STATUS_ENTRY(NEXT_FRAG);
2368 TX_STATUS_ENTRY(LIFE_EXPIRE);
2369 TX_STATUS_ENTRY(DEST_PS);
2370 TX_STATUS_ENTRY(ABORTED);
2371 TX_STATUS_ENTRY(BT_RETRY);
2372 TX_STATUS_ENTRY(STA_INVALID);
2373 TX_STATUS_ENTRY(FRAG_DROPPED);
2374 TX_STATUS_ENTRY(TID_DISABLE);
2375 TX_STATUS_ENTRY(FRAME_FLUSHED);
2376 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2377 TX_STATUS_ENTRY(TX_LOCKED);
2378 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2379 }
2380
2381 return "UNKNOWN";
2382}
2383
2384/**
bb8c093b 2385 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY		 2386 *
2387 * NOTE: priv->mutex is not required before calling this function
2388 */
bb8c093b 2389static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
b481de9c
ZY		 2390{
2391 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2392 clear_bit(STATUS_SCANNING, &priv->status);
2393 return 0;
2394 }
2395
2396 if (test_bit(STATUS_SCANNING, &priv->status)) {
2397 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2398 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2399 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2400 queue_work(priv->workqueue, &priv->abort_scan);
2401
2402 } else
2403 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2404
2405 return test_bit(STATUS_SCANNING, &priv->status);
2406 }
2407
2408 return 0;
2409}
2410
2411/**
bb8c093b 2412 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY		 2413 * @ms: amount of time to wait (in milliseconds) for scan to abort
2414 *
2415 * NOTE: priv->mutex must be held before calling this function
2416 */
bb8c093b 2417static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
b481de9c
ZY		 2418{
2419 unsigned long now = jiffies;
2420 int ret;
2421
bb8c093b 2422 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY		 2423 if (ret && ms) {
2424 mutex_unlock(&priv->mutex);
2425 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2426 test_bit(STATUS_SCANNING, &priv->status))
2427 msleep(1);
2428 mutex_lock(&priv->mutex);
2429
2430 return test_bit(STATUS_SCANNING, &priv->status);
2431 }
2432
2433 return ret;
2434}
2435
bb8c093b 2436static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
b481de9c
ZY		 2437{
2438 /* Reset ieee stats */
2439
2440 /* We don't reset the net_device_stats (ieee->stats) on
2441 * re-association */
2442
2443 priv->last_seq_num = -1;
2444 priv->last_frag_num = -1;
2445 priv->last_packet_time = 0;
2446
bb8c093b 2447 iwl4965_scan_cancel(priv);
b481de9c
ZY		 2448}
2449
2450#define MAX_UCODE_BEACON_INTERVAL 4096
2451#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2452
bb8c093b 2453static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 2454{
2455 u16 new_val = 0;
2456 u16 beacon_factor = 0;
2457
2458 beacon_factor =
2459 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2460 / MAX_UCODE_BEACON_INTERVAL;
2461 new_val = beacon_val / beacon_factor;
2462
2463 return cpu_to_le16(new_val);
2464}
2465
bb8c093b 2466static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
b481de9c
ZY		 2467{
2468 u64 interval_tm_unit;
2469 u64 tsf, result;
2470 unsigned long flags;
2471 struct ieee80211_conf *conf = NULL;
2472 u16 beacon_int = 0;
2473
2474 conf = ieee80211_get_hw_conf(priv->hw);
2475
2476 spin_lock_irqsave(&priv->lock, flags);
2477 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2478 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2479
2480 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2481
2482 tsf = priv->timestamp1;
2483 tsf = ((tsf << 32) | priv->timestamp0);
2484
2485 beacon_int = priv->beacon_int;
2486 spin_unlock_irqrestore(&priv->lock, flags);
2487
2488 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2489 if (beacon_int == 0) {
2490 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2491 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2492 } else {
2493 priv->rxon_timing.beacon_interval =
2494 cpu_to_le16(beacon_int);
2495 priv->rxon_timing.beacon_interval =
bb8c093b 2496 iwl4965_adjust_beacon_interval(
b481de9c
ZY		 2497 le16_to_cpu(priv->rxon_timing.beacon_interval));
2498 }
2499
2500 priv->rxon_timing.atim_window = 0;
2501 } else {
2502 priv->rxon_timing.beacon_interval =
bb8c093b 2503 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY		 2504 /* TODO: we need to get atim_window from upper stack
2505 * for now we set to 0 */
2506 priv->rxon_timing.atim_window = 0;
2507 }
2508
2509 interval_tm_unit =
2510 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2511 result = do_div(tsf, interval_tm_unit);
2512 priv->rxon_timing.beacon_init_val =
2513 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2514
2515 IWL_DEBUG_ASSOC
2516 ("beacon interval %d beacon timer %d beacon tim %d\n",
2517 le16_to_cpu(priv->rxon_timing.beacon_interval),
2518 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2519 le16_to_cpu(priv->rxon_timing.atim_window));
2520}
2521
bb8c093b 2522static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
b481de9c
ZY		 2523{
2524 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2525 IWL_ERROR("APs don't scan.\n");
2526 return 0;
2527 }
2528
bb8c093b 2529 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 2530 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2531 return -EIO;
2532 }
2533
2534 if (test_bit(STATUS_SCANNING, &priv->status)) {
2535 IWL_DEBUG_SCAN("Scan already in progress.\n");
2536 return -EAGAIN;
2537 }
2538
2539 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2540 IWL_DEBUG_SCAN("Scan request while abort pending. "
2541 "Queuing.\n");
2542 return -EAGAIN;
2543 }
2544
2545 IWL_DEBUG_INFO("Starting scan...\n");
2546 priv->scan_bands = 2;
2547 set_bit(STATUS_SCANNING, &priv->status);
2548 priv->scan_start = jiffies;
2549 priv->scan_pass_start = priv->scan_start;
2550
2551 queue_work(priv->workqueue, &priv->request_scan);
2552
2553 return 0;
2554}
2555
bb8c093b 2556static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
b481de9c 2557{
bb8c093b 2558 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
b481de9c
ZY		 2559
2560 if (hw_decrypt)
2561 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2562 else
2563 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2564
2565 return 0;
2566}
2567
8318d78a
JB		 2568static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
2569 enum ieee80211_band band)
b481de9c 2570{
8318d78a 2571 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY		 2572 priv->staging_rxon.flags &=
2573 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2574 | RXON_FLG_CCK_MSK);
2575 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2576 } else {
bb8c093b 2577 /* Copied from iwl4965_bg_post_associate() */
b481de9c
ZY		 2578 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2579 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2580 else
2581 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2582
2583 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2584 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2585
2586 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2587 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2588 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2589 }
2590}
2591
2592/*
01ebd063 2593 * initialize rxon structure with default values from eeprom
b481de9c 2594 */
bb8c093b 2595static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
b481de9c 2596{
bb8c093b 2597 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 2598
2599 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2600
2601 switch (priv->iw_mode) {
2602 case IEEE80211_IF_TYPE_AP:
2603 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2604 break;
2605
2606 case IEEE80211_IF_TYPE_STA:
2607 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2608 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2609 break;
2610
2611 case IEEE80211_IF_TYPE_IBSS:
2612 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2613 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2614 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2615 RXON_FILTER_ACCEPT_GRP_MSK;
2616 break;
2617
2618 case IEEE80211_IF_TYPE_MNTR:
2619 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2620 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2621 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2622 break;
2623 }
2624
2625#if 0
2626 /* TODO: Figure out when short_preamble would be set and cache from
2627 * that */
2628 if (!hw_to_local(priv->hw)->short_preamble)
2629 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2630 else
2631 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2632#endif
2633
8318d78a 2634 ch_info = iwl4965_get_channel_info(priv, priv->band,
b481de9c
ZY		 2635 le16_to_cpu(priv->staging_rxon.channel));
2636
2637 if (!ch_info)
2638 ch_info = &priv->channel_info[0];
2639
2640 /*
2641 * in some case A channels are all non IBSS
2642 * in this case force B/G channel
2643 */
2644 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2645 !(is_channel_ibss(ch_info)))
2646 ch_info = &priv->channel_info[0];
2647
2648 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 2649 priv->band = ch_info->band;
b481de9c 2650
8318d78a 2651 iwl4965_set_flags_for_phymode(priv, priv->band);
b481de9c
ZY		 2652
2653 priv->staging_rxon.ofdm_basic_rates =
2654 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2655 priv->staging_rxon.cck_basic_rates =
2656 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2657
2658 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2659 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2660 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2661 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2662 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2663 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2664 iwl4965_set_rxon_chain(priv);
2665}
2666
bb8c093b 2667static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
b481de9c 2668{
b481de9c 2669 if (mode == IEEE80211_IF_TYPE_IBSS) {
bb8c093b 2670 const struct iwl4965_channel_info *ch_info;
b481de9c 2671
bb8c093b 2672 ch_info = iwl4965_get_channel_info(priv,
8318d78a 2673 priv->band,
b481de9c
ZY		 2674 le16_to_cpu(priv->staging_rxon.channel));
2675
2676 if (!ch_info || !is_channel_ibss(ch_info)) {
2677 IWL_ERROR("channel %d not IBSS channel\n",
2678 le16_to_cpu(priv->staging_rxon.channel));
2679 return -EINVAL;
2680 }
2681 }
2682
b481de9c
ZY		 2683 priv->iw_mode = mode;
2684
bb8c093b 2685 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 2686 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2687
bb8c093b 2688 iwl4965_clear_stations_table(priv);
b481de9c 2689
fde3571f
MA		 2690 /* dont commit rxon if rf-kill is on*/
2691 if (!iwl4965_is_ready_rf(priv))
2692 return -EAGAIN;
2693
2694 cancel_delayed_work(&priv->scan_check);
2695 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2696 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2697 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2698 return -EAGAIN;
2699 }
2700
bb8c093b 2701 iwl4965_commit_rxon(priv);
b481de9c
ZY		 2702
2703 return 0;
2704}
2705
bb8c093b 2706static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
b481de9c 2707 struct ieee80211_tx_control *ctl,
bb8c093b 2708 struct iwl4965_cmd *cmd,
b481de9c
ZY		 2709 struct sk_buff *skb_frag,
2710 int last_frag)
2711{
bb8c093b 2712 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
b481de9c
ZY		 2713
2714 switch (keyinfo->alg) {
2715 case ALG_CCMP:
2716 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2717 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2718 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2719 break;
2720
2721 case ALG_TKIP:
2722#if 0
2723 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2724
2725 if (last_frag)
2726 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2727 8);
2728 else
2729 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2730#endif
2731 break;
2732
2733 case ALG_WEP:
2734 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2735 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2736
2737 if (keyinfo->keylen == 13)
2738 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2739
2740 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2741
2742 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2743 "with key %d\n", ctl->key_idx);
2744 break;
2745
b481de9c
ZY		 2746 default:
2747 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2748 break;
2749 }
2750}
2751
2752/*
2753 * handle build REPLY_TX command notification.
2754 */
bb8c093b
CH		 2755static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
2756 struct iwl4965_cmd *cmd,
b481de9c
ZY		 2757 struct ieee80211_tx_control *ctrl,
2758 struct ieee80211_hdr *hdr,
2759 int is_unicast, u8 std_id)
2760{
2761 __le16 *qc;
2762 u16 fc = le16_to_cpu(hdr->frame_control);
2763 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2764
2765 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2766 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2767 tx_flags |= TX_CMD_FLG_ACK_MSK;
2768 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2769 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2770 if (ieee80211_is_probe_response(fc) &&
2771 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2772 tx_flags |= TX_CMD_FLG_TSF_MSK;
2773 } else {
2774 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2775 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2776 }
2777
87e4f7df
TW		 2778 if (ieee80211_is_back_request(fc))
2779 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2780
2781
b481de9c
ZY		 2782 cmd->cmd.tx.sta_id = std_id;
2783 if (ieee80211_get_morefrag(hdr))
2784 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2785
2786 qc = ieee80211_get_qos_ctrl(hdr);
2787 if (qc) {
2788 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2789 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2790 } else
2791 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2792
2793 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2794 tx_flags |= TX_CMD_FLG_RTS_MSK;
2795 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2796 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2797 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2798 tx_flags |= TX_CMD_FLG_CTS_MSK;
2799 }
2800
2801 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2802 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2803
2804 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2805 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2806 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2807 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 2808 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 2809 else
bc434dd2 2810 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
b481de9c
ZY		 2811 } else
2812 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2813
2814 cmd->cmd.tx.driver_txop = 0;
2815 cmd->cmd.tx.tx_flags = tx_flags;
2816 cmd->cmd.tx.next_frame_len = 0;
2817}
2818
6440adb5
CB		 2819/**
2820 * iwl4965_get_sta_id - Find station's index within station table
2821 *
2822 * If new IBSS station, create new entry in station table
2823 */
9fbab516
BC		 2824static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
2825 struct ieee80211_hdr *hdr)
b481de9c
ZY		 2826{
2827 int sta_id;
2828 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 2829 DECLARE_MAC_BUF(mac);
b481de9c 2830
6440adb5 2831 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY		 2832 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2833 is_multicast_ether_addr(hdr->addr1))
2834 return priv->hw_setting.bcast_sta_id;
2835
2836 switch (priv->iw_mode) {
2837
6440adb5
CB		 2838 /* If we are a client station in a BSS network, use the special
2839 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY		 2840 case IEEE80211_IF_TYPE_STA:
2841 return IWL_AP_ID;
2842
2843 /* If we are an AP, then find the station, or use BCAST */
2844 case IEEE80211_IF_TYPE_AP:
bb8c093b 2845 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2846 if (sta_id != IWL_INVALID_STATION)
2847 return sta_id;
2848 return priv->hw_setting.bcast_sta_id;
2849
6440adb5
CB		 2850 /* If this frame is going out to an IBSS network, find the station,
2851 * or create a new station table entry */
b481de9c 2852 case IEEE80211_IF_TYPE_IBSS:
bb8c093b 2853 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2854 if (sta_id != IWL_INVALID_STATION)
2855 return sta_id;
2856
6440adb5 2857 /* Create new station table entry */
67d62035
RR		 2858 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2859 0, CMD_ASYNC, NULL);
b481de9c
ZY		 2860
2861 if (sta_id != IWL_INVALID_STATION)
2862 return sta_id;
2863
0795af57 2864 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 2865 "Defaulting to broadcast...\n",
0795af57 2866 print_mac(mac, hdr->addr1));
bb8c093b 2867 iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
b481de9c
ZY		 2868 return priv->hw_setting.bcast_sta_id;
2869
2870 default:
01ebd063 2871 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
b481de9c
ZY		 2872 return priv->hw_setting.bcast_sta_id;
2873 }
2874}
2875
2876/*
2877 * start REPLY_TX command process
2878 */
bb8c093b 2879static int iwl4965_tx_skb(struct iwl4965_priv *priv,
b481de9c
ZY		 2880 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2881{
2882 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 2883 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY		 2884 u32 *control_flags;
2885 int txq_id = ctl->queue;
bb8c093b
CH		 2886 struct iwl4965_tx_queue *txq = NULL;
2887 struct iwl4965_queue *q = NULL;
b481de9c
ZY		 2888 dma_addr_t phys_addr;
2889 dma_addr_t txcmd_phys;
87e4f7df 2890 dma_addr_t scratch_phys;
bb8c093b 2891 struct iwl4965_cmd *out_cmd = NULL;
b481de9c
ZY		 2892 u16 len, idx, len_org;
2893 u8 id, hdr_len, unicast;
2894 u8 sta_id;
2895 u16 seq_number = 0;
2896 u16 fc;
2897 __le16 *qc;
2898 u8 wait_write_ptr = 0;
2899 unsigned long flags;
2900 int rc;
2901
2902 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2903 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 2904 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2905 goto drop_unlock;
2906 }
2907
32bfd35d
JB		 2908 if (!priv->vif) {
2909 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
b481de9c
ZY		 2910 goto drop_unlock;
2911 }
2912
8318d78a 2913 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
b481de9c
ZY		 2914 IWL_ERROR("ERROR: No TX rate available.\n");
2915 goto drop_unlock;
2916 }
2917
2918 unicast = !is_multicast_ether_addr(hdr->addr1);
2919 id = 0;
2920
2921 fc = le16_to_cpu(hdr->frame_control);
2922
c8b0e6e1 2923#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY		 2924 if (ieee80211_is_auth(fc))
2925 IWL_DEBUG_TX("Sending AUTH frame\n");
2926 else if (ieee80211_is_assoc_request(fc))
2927 IWL_DEBUG_TX("Sending ASSOC frame\n");
2928 else if (ieee80211_is_reassoc_request(fc))
2929 IWL_DEBUG_TX("Sending REASSOC frame\n");
2930#endif
2931
7878a5a4 2932 /* drop all data frame if we are not associated */
76f3915b
GG		 2933 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
2934 (!iwl4965_is_associated(priv) ||
a6477249 2935 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
76f3915b 2936 !priv->assoc_station_added)) {
bb8c093b 2937 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
b481de9c
ZY		 2938 goto drop_unlock;
2939 }
2940
2941 spin_unlock_irqrestore(&priv->lock, flags);
2942
2943 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
CB		 2944
2945 /* Find (or create) index into station table for destination station */
bb8c093b 2946 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2947 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 2948 DECLARE_MAC_BUF(mac);
2949
2950 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2951 print_mac(mac, hdr->addr1));
b481de9c
ZY		 2952 goto drop;
2953 }
2954
2955 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2956
2957 qc = ieee80211_get_qos_ctrl(hdr);
2958 if (qc) {
2959 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2960 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2961 IEEE80211_SCTL_SEQ;
2962 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2963 (hdr->seq_ctrl &
2964 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2965 seq_number += 0x10;
c8b0e6e1 2966#ifdef CONFIG_IWL4965_HT
b481de9c 2967 /* aggregation is on for this <sta,tid> */
fe01b477 2968 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
b481de9c 2969 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
fe01b477 2970 priv->stations[sta_id].tid[tid].tfds_in_queue++;
c8b0e6e1 2971#endif /* CONFIG_IWL4965_HT */
b481de9c 2972 }
6440adb5
CB		 2973
2974 /* Descriptor for chosen Tx queue */
b481de9c
ZY		 2975 txq = &priv->txq[txq_id];
2976 q = &txq->q;
2977
2978 spin_lock_irqsave(&priv->lock, flags);
2979
6440adb5 2980 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2981 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 2982 memset(tfd, 0, sizeof(*tfd));
2983 control_flags = (u32 *) tfd;
fc4b6853 2984 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2985
6440adb5 2986 /* Set up driver data for this TFD */
bb8c093b 2987 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW		 2988 txq->txb[q->write_ptr].skb[0] = skb;
2989 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2990 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
CB		 2991
2992 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY		 2993 out_cmd = &txq->cmd[idx];
2994 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2995 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
CB		 2996
2997 /*
2998 * Set up the Tx-command (not MAC!) header.
2999 * Store the chosen Tx queue and TFD index within the sequence field;
3000 * after Tx, uCode's Tx response will return this value so driver can
3001 * locate the frame within the tx queue and do post-tx processing.
3002 */
b481de9c
ZY		 3003 out_cmd->hdr.cmd = REPLY_TX;
3004 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 3005 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB		 3006
3007 /* Copy MAC header from skb into command buffer */
b481de9c
ZY		 3008 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
3009
6440adb5
CB		 3010 /*
3011 * Use the first empty entry in this queue's command buffer array
3012 * to contain the Tx command and MAC header concatenated together
3013 * (payload data will be in another buffer).
3014 * Size of this varies, due to varying MAC header length.
3015 * If end is not dword aligned, we'll have 2 extra bytes at the end
3016 * of the MAC header (device reads on dword boundaries).
3017 * We'll tell device about this padding later.
3018 */
b481de9c 3019 len = priv->hw_setting.tx_cmd_len +
bb8c093b 3020 sizeof(struct iwl4965_cmd_header) + hdr_len;
b481de9c
ZY		 3021
3022 len_org = len;
3023 len = (len + 3) & ~3;
3024
3025 if (len_org != len)
3026 len_org = 1;
3027 else
3028 len_org = 0;
3029
6440adb5
CB		 3030 /* Physical address of this Tx command's header (not MAC header!),
3031 * within command buffer array. */
bb8c093b
CH		 3032 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
3033 offsetof(struct iwl4965_cmd, hdr);
b481de9c 3034
6440adb5
CB		 3035 /* Add buffer containing Tx command and MAC(!) header to TFD's
3036 * first entry */
bb8c093b 3037 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY		 3038
3039 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
bb8c093b 3040 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
b481de9c 3041
6440adb5
CB		 3042 /* Set up TFD's 2nd entry to point directly to remainder of skb,
3043 * if any (802.11 null frames have no payload). */
b481de9c
ZY		 3044 len = skb->len - hdr_len;
3045 if (len) {
3046 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
3047 len, PCI_DMA_TODEVICE);
bb8c093b 3048 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY		 3049 }
3050
6440adb5 3051 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY		 3052 if (len_org)
3053 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
3054
6440adb5 3055 /* Total # bytes to be transmitted */
b481de9c
ZY		 3056 len = (u16)skb->len;
3057 out_cmd->cmd.tx.len = cpu_to_le16(len);
3058
3059 /* TODO need this for burst mode later on */
bb8c093b 3060 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY		 3061
3062 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 3063 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c 3064
87e4f7df
TW		 3065 scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
3066 offsetof(struct iwl4965_tx_cmd, scratch);
3067 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
3068 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
3069
b481de9c
ZY		 3070 if (!ieee80211_get_morefrag(hdr)) {
3071 txq->need_update = 1;
3072 if (qc) {
3073 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
3074 priv->stations[sta_id].tid[tid].seq_number = seq_number;
3075 }
3076 } else {
3077 wait_write_ptr = 1;
3078 txq->need_update = 0;
3079 }
3080
bb8c093b 3081 iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY		 3082 sizeof(out_cmd->cmd.tx));
3083
bb8c093b 3084 iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY		 3085 ieee80211_get_hdrlen(fc));
3086
6440adb5 3087 /* Set up entry for this TFD in Tx byte-count array */
b481de9c
ZY		 3088 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
3089
6440adb5 3090 /* Tell device the write index *just past* this latest filled TFD */
bb8c093b
CH		 3091 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
3092 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 3093 spin_unlock_irqrestore(&priv->lock, flags);
3094
3095 if (rc)
3096 return rc;
3097
bb8c093b 3098 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY		 3099 && priv->mac80211_registered) {
3100 if (wait_write_ptr) {
3101 spin_lock_irqsave(&priv->lock, flags);
3102 txq->need_update = 1;
bb8c093b 3103 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 3104 spin_unlock_irqrestore(&priv->lock, flags);
3105 }
3106
3107 ieee80211_stop_queue(priv->hw, ctl->queue);
3108 }
3109
3110 return 0;
3111
3112drop_unlock:
3113 spin_unlock_irqrestore(&priv->lock, flags);
3114drop:
3115 return -1;
3116}
3117
bb8c093b 3118static void iwl4965_set_rate(struct iwl4965_priv *priv)
b481de9c 3119{
8318d78a 3120 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY		 3121 struct ieee80211_rate *rate;
3122 int i;
3123
8318d78a 3124 hw = iwl4965_get_hw_mode(priv, priv->band);
c4ba9621
SA		 3125 if (!hw) {
3126 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3127 return;
3128 }
b481de9c
ZY		 3129
3130 priv->active_rate = 0;
3131 priv->active_rate_basic = 0;
3132
8318d78a
JB		 3133 for (i = 0; i < hw->n_bitrates; i++) {
3134 rate = &(hw->bitrates[i]);
3135 if (rate->hw_value < IWL_RATE_COUNT)
3136 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY		 3137 }
3138
3139 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3140 priv->active_rate, priv->active_rate_basic);
3141
3142 /*
3143 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3144 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3145 * OFDM
3146 */
3147 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3148 priv->staging_rxon.cck_basic_rates =
3149 ((priv->active_rate_basic &
3150 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3151 else
3152 priv->staging_rxon.cck_basic_rates =
3153 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3154
3155 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3156 priv->staging_rxon.ofdm_basic_rates =
3157 ((priv->active_rate_basic &
3158 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3159 IWL_FIRST_OFDM_RATE) & 0xFF;
3160 else
3161 priv->staging_rxon.ofdm_basic_rates =
3162 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3163}
3164
bb8c093b 3165static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
b481de9c
ZY		 3166{
3167 unsigned long flags;
3168
3169 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3170 return;
3171
3172 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3173 disable_radio ? "OFF" : "ON");
3174
3175 if (disable_radio) {
bb8c093b 3176 iwl4965_scan_cancel(priv);
b481de9c
ZY		 3177 /* FIXME: This is a workaround for AP */
3178 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3179 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3180 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 3181 CSR_UCODE_SW_BIT_RFKILL);
3182 spin_unlock_irqrestore(&priv->lock, flags);
bb8c093b 3183 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
b481de9c
ZY		 3184 set_bit(STATUS_RF_KILL_SW, &priv->status);
3185 }
3186 return;
3187 }
3188
3189 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3190 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 3191
3192 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3193 spin_unlock_irqrestore(&priv->lock, flags);
3194
3195 /* wake up ucode */
3196 msleep(10);
3197
3198 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH		 3199 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3200 if (!iwl4965_grab_nic_access(priv))
3201 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3202 spin_unlock_irqrestore(&priv->lock, flags);
3203
3204 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3205 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3206 "disabled by HW switch\n");
3207 return;
3208 }
3209
3210 queue_work(priv->workqueue, &priv->restart);
3211 return;
3212}
3213
bb8c093b 3214void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
b481de9c
ZY		 3215 u32 decrypt_res, struct ieee80211_rx_status *stats)
3216{
3217 u16 fc =
3218 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3219
3220 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3221 return;
3222
3223 if (!(fc & IEEE80211_FCTL_PROTECTED))
3224 return;
3225
3226 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3227 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3228 case RX_RES_STATUS_SEC_TYPE_TKIP:
3229 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3230 RX_RES_STATUS_BAD_ICV_MIC)
3231 stats->flag |= RX_FLAG_MMIC_ERROR;
3232 case RX_RES_STATUS_SEC_TYPE_WEP:
3233 case RX_RES_STATUS_SEC_TYPE_CCMP:
3234 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3235 RX_RES_STATUS_DECRYPT_OK) {
3236 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3237 stats->flag |= RX_FLAG_DECRYPTED;
3238 }
3239 break;
3240
3241 default:
3242 break;
3243 }
3244}
3245
b481de9c
ZY		 3246
3247#define IWL_PACKET_RETRY_TIME HZ
3248
bb8c093b 3249int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 3250{
3251 u16 sc = le16_to_cpu(header->seq_ctrl);
3252 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3253 u16 frag = sc & IEEE80211_SCTL_FRAG;
3254 u16 *last_seq, *last_frag;
3255 unsigned long *last_time;
3256
3257 switch (priv->iw_mode) {
3258 case IEEE80211_IF_TYPE_IBSS:{
3259 struct list_head *p;
bb8c093b 3260 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY		 3261 u8 *mac = header->addr2;
3262 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3263
3264 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 3265 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY		 3266 if (!compare_ether_addr(entry->mac, mac))
3267 break;
3268 }
3269 if (p == &priv->ibss_mac_hash[index]) {
3270 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3271 if (!entry) {
bc434dd2 3272 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY		 3273 return 0;
3274 }
3275 memcpy(entry->mac, mac, ETH_ALEN);
3276 entry->seq_num = seq;
3277 entry->frag_num = frag;
3278 entry->packet_time = jiffies;
bc434dd2 3279 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY		 3280 return 0;
3281 }
3282 last_seq = &entry->seq_num;
3283 last_frag = &entry->frag_num;
3284 last_time = &entry->packet_time;
3285 break;
3286 }
3287 case IEEE80211_IF_TYPE_STA:
3288 last_seq = &priv->last_seq_num;
3289 last_frag = &priv->last_frag_num;
3290 last_time = &priv->last_packet_time;
3291 break;
3292 default:
3293 return 0;
3294 }
3295 if ((*last_seq == seq) &&
3296 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3297 if (*last_frag == frag)
3298 goto drop;
3299 if (*last_frag + 1 != frag)
3300 /* out-of-order fragment */
3301 goto drop;
3302 } else
3303 *last_seq = seq;
3304
3305 *last_frag = frag;
3306 *last_time = jiffies;
3307 return 0;
3308
3309 drop:
3310 return 1;
3311}
3312
c8b0e6e1 3313#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 3314
3315#include "iwl-spectrum.h"
3316
3317#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3318#define BEACON_TIME_MASK_HIGH 0xFF000000
3319#define TIME_UNIT 1024
3320
3321/*
3322 * extended beacon time format
3323 * time in usec will be changed into a 32-bit value in 8:24 format
3324 * the high 1 byte is the beacon counts
3325 * the lower 3 bytes is the time in usec within one beacon interval
3326 */
3327
bb8c093b 3328static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY		 3329{
3330 u32 quot;
3331 u32 rem;
3332 u32 interval = beacon_interval * 1024;
3333
3334 if (!interval || !usec)
3335 return 0;
3336
3337 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3338 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3339
3340 return (quot << 24) + rem;
3341}
3342
3343/* base is usually what we get from ucode with each received frame,
3344 * the same as HW timer counter counting down
3345 */
3346
bb8c093b 3347static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY		 3348{
3349 u32 base_low = base & BEACON_TIME_MASK_LOW;
3350 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3351 u32 interval = beacon_interval * TIME_UNIT;
3352 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3353 (addon & BEACON_TIME_MASK_HIGH);
3354
3355 if (base_low > addon_low)
3356 res += base_low - addon_low;
3357 else if (base_low < addon_low) {
3358 res += interval + base_low - addon_low;
3359 res += (1 << 24);
3360 } else
3361 res += (1 << 24);
3362
3363 return cpu_to_le32(res);
3364}
3365
bb8c093b 3366static int iwl4965_get_measurement(struct iwl4965_priv *priv,
b481de9c
ZY		 3367 struct ieee80211_measurement_params *params,
3368 u8 type)
3369{
bb8c093b
CH		 3370 struct iwl4965_spectrum_cmd spectrum;
3371 struct iwl4965_rx_packet *res;
3372 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 3373 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3374 .data = (void *)&spectrum,
3375 .meta.flags = CMD_WANT_SKB,
3376 };
3377 u32 add_time = le64_to_cpu(params->start_time);
3378 int rc;
3379 int spectrum_resp_status;
3380 int duration = le16_to_cpu(params->duration);
3381
bb8c093b 3382 if (iwl4965_is_associated(priv))
b481de9c 3383 add_time =
bb8c093b 3384 iwl4965_usecs_to_beacons(
b481de9c
ZY		 3385 le64_to_cpu(params->start_time) - priv->last_tsf,
3386 le16_to_cpu(priv->rxon_timing.beacon_interval));
3387
3388 memset(&spectrum, 0, sizeof(spectrum));
3389
3390 spectrum.channel_count = cpu_to_le16(1);
3391 spectrum.flags =
3392 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3393 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3394 cmd.len = sizeof(spectrum);
3395 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3396
bb8c093b 3397 if (iwl4965_is_associated(priv))
b481de9c 3398 spectrum.start_time =
bb8c093b 3399 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY		 3400 add_time,
3401 le16_to_cpu(priv->rxon_timing.beacon_interval));
3402 else
3403 spectrum.start_time = 0;
3404
3405 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3406 spectrum.channels[0].channel = params->channel;
3407 spectrum.channels[0].type = type;
3408 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3409 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3410 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3411
bb8c093b 3412 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 3413 if (rc)
3414 return rc;
3415
bb8c093b 3416 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 3417 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3418 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3419 rc = -EIO;
3420 }
3421
3422 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3423 switch (spectrum_resp_status) {
3424 case 0: /* Command will be handled */
3425 if (res->u.spectrum.id != 0xff) {
3426 IWL_DEBUG_INFO
3427 ("Replaced existing measurement: %d\n",
3428 res->u.spectrum.id);
3429 priv->measurement_status &= ~MEASUREMENT_READY;
3430 }
3431 priv->measurement_status |= MEASUREMENT_ACTIVE;
3432 rc = 0;
3433 break;
3434
3435 case 1: /* Command will not be handled */
3436 rc = -EAGAIN;
3437 break;
3438 }
3439
3440 dev_kfree_skb_any(cmd.meta.u.skb);
3441
3442 return rc;
3443}
3444#endif
3445
bb8c093b
CH		 3446static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
3447 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY		 3448{
3449
3450 tx_sta->status.ack_signal = 0;
3451 tx_sta->status.excessive_retries = 0;
3452 tx_sta->status.queue_length = 0;
3453 tx_sta->status.queue_number = 0;
3454
3455 if (in_interrupt())
3456 ieee80211_tx_status_irqsafe(priv->hw,
3457 tx_sta->skb[0], &(tx_sta->status));
3458 else
3459 ieee80211_tx_status(priv->hw,
3460 tx_sta->skb[0], &(tx_sta->status));
3461
3462 tx_sta->skb[0] = NULL;
3463}
3464
3465/**
6440adb5 3466 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 3467 *
6440adb5
CB		 3468 * When FW advances 'R' index, all entries between old and new 'R' index
3469 * need to be reclaimed. As result, some free space forms. If there is
3470 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 3471 */
bb8c093b 3472int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
b481de9c 3473{
bb8c093b
CH		 3474 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3475 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 3476 int nfreed = 0;
3477
3478 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3479 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3480 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 3481 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY		 3482 return 0;
3483 }
3484
bb8c093b 3485 for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
fc4b6853 3486 q->read_ptr != index;
bb8c093b 3487 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 3488 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 3489 iwl4965_txstatus_to_ieee(priv,
fc4b6853 3490 &(txq->txb[txq->q.read_ptr]));
bb8c093b 3491 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY		 3492 } else if (nfreed > 1) {
3493 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 3494 q->write_ptr, q->read_ptr);
b481de9c
ZY		 3495 queue_work(priv->workqueue, &priv->restart);
3496 }
3497 nfreed++;
3498 }
3499
fe01b477 3500/* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY		 3501 (txq_id != IWL_CMD_QUEUE_NUM) &&
3502 priv->mac80211_registered)
fe01b477 3503 ieee80211_wake_queue(priv->hw, txq_id); */
b481de9c
ZY		 3504
3505
3506 return nfreed;
3507}
3508
bb8c093b 3509static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY		 3510{
3511 status &= TX_STATUS_MSK;
3512 return (status == TX_STATUS_SUCCESS)
3513 || (status == TX_STATUS_DIRECT_DONE);
3514}
3515
3516/******************************************************************************
3517 *
3518 * Generic RX handler implementations
3519 *
3520 ******************************************************************************/
c8b0e6e1 3521#ifdef CONFIG_IWL4965_HT
b481de9c 3522
bb8c093b 3523static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
b481de9c
ZY		 3524 struct ieee80211_hdr *hdr)
3525{
3526 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3527 return IWL_AP_ID;
3528 else {
3529 u8 *da = ieee80211_get_DA(hdr);
bb8c093b 3530 return iwl4965_hw_find_station(priv, da);
b481de9c
ZY		 3531 }
3532}
3533
bb8c093b
CH		 3534static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
3535 struct iwl4965_priv *priv, int txq_id, int idx)
b481de9c
ZY		 3536{
3537 if (priv->txq[txq_id].txb[idx].skb[0])
3538 return (struct ieee80211_hdr *)priv->txq[txq_id].
3539 txb[idx].skb[0]->data;
3540 return NULL;
3541}
3542
bb8c093b 3543static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY		 3544{
3545 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3546 tx_resp->frame_count);
3547 return le32_to_cpu(*scd_ssn) & MAX_SN;
3548
3549}
6440adb5
CB		 3550
3551/**
3552 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3553 */
bb8c093b
CH		 3554static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
3555 struct iwl4965_ht_agg *agg,
fe01b477 3556 struct iwl4965_tx_resp_agg *tx_resp,
b481de9c
ZY		 3557 u16 start_idx)
3558{
fe01b477
RR		 3559 u16 status;
3560 struct agg_tx_status *frame_status = &tx_resp->status;
b481de9c
ZY		 3561 struct ieee80211_tx_status *tx_status = NULL;
3562 struct ieee80211_hdr *hdr = NULL;
3563 int i, sh;
3564 int txq_id, idx;
3565 u16 seq;
3566
3567 if (agg->wait_for_ba)
6440adb5 3568 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY		 3569
3570 agg->frame_count = tx_resp->frame_count;
3571 agg->start_idx = start_idx;
3572 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 3573 agg->bitmap = 0;
b481de9c 3574
6440adb5 3575 /* # frames attempted by Tx command */
b481de9c 3576 if (agg->frame_count == 1) {
6440adb5 3577 /* Only one frame was attempted; no block-ack will arrive */
fe01b477
RR		 3578 status = le16_to_cpu(frame_status[0].status);
3579 seq = le16_to_cpu(frame_status[0].sequence);
3580 idx = SEQ_TO_INDEX(seq);
3581 txq_id = SEQ_TO_QUEUE(seq);
b481de9c 3582
b481de9c 3583 /* FIXME: code repetition */
fe01b477
RR		 3584 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3585 agg->frame_count, agg->start_idx, idx);
b481de9c 3586
fe01b477 3587 tx_status = &(priv->txq[txq_id].txb[idx].status);
b481de9c
ZY		 3588 tx_status->retry_count = tx_resp->failure_frame;
3589 tx_status->queue_number = status & 0xff;
fe01b477
RR		 3590 tx_status->queue_length = tx_resp->failure_rts;
3591 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
bb8c093b 3592 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c 3593 IEEE80211_TX_STATUS_ACK : 0;
78330fdd 3594 /* FIXME Wrong Rate
b481de9c 3595 tx_status->control.tx_rate =
78330fdd 3596 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags); */
b481de9c
ZY		 3597 /* FIXME: code repetition end */
3598
3599 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3600 status & 0xff, tx_resp->failure_frame);
3601 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 3602 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY		 3603
3604 agg->wait_for_ba = 0;
3605 } else {
6440adb5 3606 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY		 3607 u64 bitmap = 0;
3608 int start = agg->start_idx;
3609
6440adb5 3610 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY		 3611 for (i = 0; i < agg->frame_count; i++) {
3612 u16 sc;
fe01b477
RR		 3613 status = le16_to_cpu(frame_status[i].status);
3614 seq = le16_to_cpu(frame_status[i].sequence);
b481de9c
ZY		 3615 idx = SEQ_TO_INDEX(seq);
3616 txq_id = SEQ_TO_QUEUE(seq);
3617
3618 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3619 AGG_TX_STATE_ABORT_MSK))
3620 continue;
3621
3622 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3623 agg->frame_count, txq_id, idx);
3624
bb8c093b 3625 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY		 3626
3627 sc = le16_to_cpu(hdr->seq_ctrl);
3628 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3629 IWL_ERROR("BUG_ON idx doesn't match seq control"
3630 " idx=%d, seq_idx=%d, seq=%d\n",
3631 idx, SEQ_TO_SN(sc),
3632 hdr->seq_ctrl);
3633 return -1;
3634 }
3635
3636 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3637 i, idx, SEQ_TO_SN(sc));
3638
3639 sh = idx - start;
3640 if (sh > 64) {
3641 sh = (start - idx) + 0xff;
3642 bitmap = bitmap << sh;
3643 sh = 0;
3644 start = idx;
3645 } else if (sh < -64)
3646 sh = 0xff - (start - idx);
3647 else if (sh < 0) {
3648 sh = start - idx;
3649 start = idx;
3650 bitmap = bitmap << sh;
3651 sh = 0;
3652 }
3653 bitmap |= (1 << sh);
3654 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3655 start, (u32)(bitmap & 0xFFFFFFFF));
3656 }
3657
fe01b477 3658 agg->bitmap = bitmap;
b481de9c
ZY		 3659 agg->start_idx = start;
3660 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 3661 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
b481de9c 3662 agg->frame_count, agg->start_idx,
fe01b477 3663 agg->bitmap);
b481de9c
ZY		 3664
3665 if (bitmap)
3666 agg->wait_for_ba = 1;
3667 }
3668 return 0;
3669}
3670#endif
b481de9c 3671
6440adb5
CB		 3672/**
3673 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3674 */
bb8c093b
CH		 3675static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
3676 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3677{
bb8c093b 3678 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3679 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3680 int txq_id = SEQ_TO_QUEUE(sequence);
3681 int index = SEQ_TO_INDEX(sequence);
bb8c093b 3682 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 3683 struct ieee80211_tx_status *tx_status;
bb8c093b 3684 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 3685 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1 3686#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 3687 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3688 struct ieee80211_hdr *hdr;
3689 __le16 *qc;
b481de9c
ZY		 3690#endif
3691
3692 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3693 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3694 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW		 3695 index, txq->q.n_bd, txq->q.write_ptr,
3696 txq->q.read_ptr);
b481de9c
ZY		 3697 return;
3698 }
3699
c8b0e6e1 3700#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 3701 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3702 qc = ieee80211_get_qos_ctrl(hdr);
3703
3704 if (qc)
3705 tid = le16_to_cpu(*qc) & 0xf;
3706
3707 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
3708 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3709 IWL_ERROR("Station not known\n");
3710 return;
3711 }
3712
b481de9c 3713 if (txq->sched_retry) {
bb8c093b 3714 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
bb8c093b 3715 struct iwl4965_ht_agg *agg = NULL;
b481de9c 3716
fe01b477 3717 if (!qc)
b481de9c 3718 return;
b481de9c
ZY		 3719
3720 agg = &priv->stations[sta_id].tid[tid].agg;
3721
fe01b477
RR		 3722 iwl4965_tx_status_reply_tx(priv, agg,
3723 (struct iwl4965_tx_resp_agg *)tx_resp, index);
b481de9c
ZY		 3724
3725 if ((tx_resp->frame_count == 1) &&
bb8c093b 3726 !iwl4965_is_tx_success(status)) {
b481de9c
ZY		 3727 /* TODO: send BAR */
3728 }
3729
fe01b477
RR		 3730 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3731 int freed;
bb8c093b 3732 index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY		 3733 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3734 "%d index %d\n", scd_ssn , index);
fe01b477
RR		 3735 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3736 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3737
3738 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3739 txq_id >= 0 && priv->mac80211_registered &&
3740 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3741 ieee80211_wake_queue(priv->hw, txq_id);
3742
3743 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
b481de9c
ZY		 3744 }
3745 } else {
c8b0e6e1 3746#endif /* CONFIG_IWL4965_HT */
fc4b6853 3747 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY		 3748
3749 tx_status->retry_count = tx_resp->failure_frame;
3750 tx_status->queue_number = status;
3751 tx_status->queue_length = tx_resp->bt_kill_count;
3752 tx_status->queue_length |= tx_resp->failure_rts;
3753
3754 tx_status->flags =
bb8c093b 3755 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
b481de9c 3756
b481de9c 3757 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 3758 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY		 3759 status, le32_to_cpu(tx_resp->rate_n_flags),
3760 tx_resp->failure_frame);
3761
3762 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
fe01b477
RR		 3763 if (index != -1) {
3764 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3765#ifdef CONFIG_IWL4965_HT
3766 if (tid != MAX_TID_COUNT)
3767 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3768 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3769 (txq_id >= 0) &&
3770 priv->mac80211_registered)
3771 ieee80211_wake_queue(priv->hw, txq_id);
3772 if (tid != MAX_TID_COUNT)
3773 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
3774#endif
3775 }
c8b0e6e1 3776#ifdef CONFIG_IWL4965_HT
b481de9c 3777 }
c8b0e6e1 3778#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 3779
3780 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3781 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3782}
3783
3784
bb8c093b
CH		 3785static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
3786 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3787{
bb8c093b
CH		 3788 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3789 struct iwl4965_alive_resp *palive;
b481de9c
ZY		 3790 struct delayed_work *pwork;
3791
3792 palive = &pkt->u.alive_frame;
3793
3794 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3795 "0x%01X 0x%01X\n",
3796 palive->is_valid, palive->ver_type,
3797 palive->ver_subtype);
3798
3799 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3800 IWL_DEBUG_INFO("Initialization Alive received.\n");
3801 memcpy(&priv->card_alive_init,
3802 &pkt->u.alive_frame,
bb8c093b 3803 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY		 3804 pwork = &priv->init_alive_start;
3805 } else {
3806 IWL_DEBUG_INFO("Runtime Alive received.\n");
3807 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 3808 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 3809 pwork = &priv->alive_start;
3810 }
3811
3812 /* We delay the ALIVE response by 5ms to
3813 * give the HW RF Kill time to activate... */
3814 if (palive->is_valid == UCODE_VALID_OK)
3815 queue_delayed_work(priv->workqueue, pwork,
3816 msecs_to_jiffies(5));
3817 else
3818 IWL_WARNING("uCode did not respond OK.\n");
3819}
3820
bb8c093b
CH		 3821static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
3822 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3823{
bb8c093b 3824 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3825
3826 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3827 return;
3828}
3829
bb8c093b
CH		 3830static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
3831 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3832{
bb8c093b 3833 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3834
3835 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3836 "seq 0x%04X ser 0x%08X\n",
3837 le32_to_cpu(pkt->u.err_resp.error_type),
3838 get_cmd_string(pkt->u.err_resp.cmd_id),
3839 pkt->u.err_resp.cmd_id,
3840 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3841 le32_to_cpu(pkt->u.err_resp.error_info));
3842}
3843
3844#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3845
bb8c093b 3846static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3847{
bb8c093b
CH		 3848 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3849 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3850 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 3851 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3852 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3853 rxon->channel = csa->channel;
3854 priv->staging_rxon.channel = csa->channel;
3855}
3856
bb8c093b
CH		 3857static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
3858 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3859{
c8b0e6e1 3860#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH		 3861 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3862 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY		 3863
3864 if (!report->state) {
3865 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3866 "Spectrum Measure Notification: Start\n");
3867 return;
3868 }
3869
3870 memcpy(&priv->measure_report, report, sizeof(*report));
3871 priv->measurement_status |= MEASUREMENT_READY;
3872#endif
3873}
3874
bb8c093b
CH		 3875static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
3876 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3877{
c8b0e6e1 3878#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 3879 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3880 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 3881 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3882 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3883#endif
3884}
3885
bb8c093b
CH		 3886static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
3887 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3888{
bb8c093b 3889 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3890 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3891 "notification for %s:\n",
3892 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bb8c093b 3893 iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 3894}
3895
bb8c093b 3896static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 3897{
bb8c093b
CH		 3898 struct iwl4965_priv *priv =
3899 container_of(work, struct iwl4965_priv, beacon_update);
b481de9c
ZY		 3900 struct sk_buff *beacon;
3901
3902 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
32bfd35d 3903 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
b481de9c
ZY		 3904
3905 if (!beacon) {
3906 IWL_ERROR("update beacon failed\n");
3907 return;
3908 }
3909
3910 mutex_lock(&priv->mutex);
3911 /* new beacon skb is allocated every time; dispose previous.*/
3912 if (priv->ibss_beacon)
3913 dev_kfree_skb(priv->ibss_beacon);
3914
3915 priv->ibss_beacon = beacon;
3916 mutex_unlock(&priv->mutex);
3917
bb8c093b 3918 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 3919}
3920
bb8c093b
CH		 3921static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
3922 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3923{
c8b0e6e1 3924#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 3925 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3926 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3927 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 3928
3929 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3930 "tsf %d %d rate %d\n",
3931 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3932 beacon->beacon_notify_hdr.failure_frame,
3933 le32_to_cpu(beacon->ibss_mgr_status),
3934 le32_to_cpu(beacon->high_tsf),
3935 le32_to_cpu(beacon->low_tsf), rate);
3936#endif
3937
3938 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3939 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3940 queue_work(priv->workqueue, &priv->beacon_update);
3941}
3942
3943/* Service response to REPLY_SCAN_CMD (0x80) */
bb8c093b
CH		 3944static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
3945 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3946{
c8b0e6e1 3947#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 3948 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3949 struct iwl4965_scanreq_notification *notif =
3950 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY		 3951
3952 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3953#endif
3954}
3955
3956/* Service SCAN_START_NOTIFICATION (0x82) */
bb8c093b
CH		 3957static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
3958 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3959{
bb8c093b
CH		 3960 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3961 struct iwl4965_scanstart_notification *notif =
3962 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY		 3963 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3964 IWL_DEBUG_SCAN("Scan start: "
3965 "%d [802.11%s] "
3966 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3967 notif->channel,
3968 notif->band ? "bg" : "a",
3969 notif->tsf_high,
3970 notif->tsf_low, notif->status, notif->beacon_timer);
3971}
3972
3973/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
bb8c093b
CH		 3974static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
3975 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3976{
bb8c093b
CH		 3977 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3978 struct iwl4965_scanresults_notification *notif =
3979 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY		 3980
3981 IWL_DEBUG_SCAN("Scan ch.res: "
3982 "%d [802.11%s] "
3983 "(TSF: 0x%08X:%08X) - %d "
3984 "elapsed=%lu usec (%dms since last)\n",
3985 notif->channel,
3986 notif->band ? "bg" : "a",
3987 le32_to_cpu(notif->tsf_high),
3988 le32_to_cpu(notif->tsf_low),
3989 le32_to_cpu(notif->statistics[0]),
3990 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3991 jiffies_to_msecs(elapsed_jiffies
3992 (priv->last_scan_jiffies, jiffies)));
3993
3994 priv->last_scan_jiffies = jiffies;
7878a5a4 3995 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3996}
3997
3998/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
bb8c093b
CH		 3999static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
4000 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4001{
bb8c093b
CH		 4002 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4003 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY		 4004
4005 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
4006 scan_notif->scanned_channels,
4007 scan_notif->tsf_low,
4008 scan_notif->tsf_high, scan_notif->status);
4009
4010 /* The HW is no longer scanning */
4011 clear_bit(STATUS_SCAN_HW, &priv->status);
4012
4013 /* The scan completion notification came in, so kill that timer... */
4014 cancel_delayed_work(&priv->scan_check);
4015
4016 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
4017 (priv->scan_bands == 2) ? "2.4" : "5.2",
4018 jiffies_to_msecs(elapsed_jiffies
4019 (priv->scan_pass_start, jiffies)));
4020
4021 /* Remove this scanned band from the list
4022 * of pending bands to scan */
4023 priv->scan_bands--;
4024
4025 /* If a request to abort was given, or the scan did not succeed
4026 * then we reset the scan state machine and terminate,
4027 * re-queuing another scan if one has been requested */
4028 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
4029 IWL_DEBUG_INFO("Aborted scan completed.\n");
4030 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
4031 } else {
4032 /* If there are more bands on this scan pass reschedule */
4033 if (priv->scan_bands > 0)
4034 goto reschedule;
4035 }
4036
4037 priv->last_scan_jiffies = jiffies;
7878a5a4 4038 priv->next_scan_jiffies = 0;
b481de9c
ZY		 4039 IWL_DEBUG_INFO("Setting scan to off\n");
4040
4041 clear_bit(STATUS_SCANNING, &priv->status);
4042
4043 IWL_DEBUG_INFO("Scan took %dms\n",
4044 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
4045
4046 queue_work(priv->workqueue, &priv->scan_completed);
4047
4048 return;
4049
4050reschedule:
4051 priv->scan_pass_start = jiffies;
4052 queue_work(priv->workqueue, &priv->request_scan);
4053}
4054
4055/* Handle notification from uCode that card's power state is changing
4056 * due to software, hardware, or critical temperature RFKILL */
bb8c093b
CH		 4057static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
4058 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4059{
bb8c093b 4060 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 4061 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4062 unsigned long status = priv->status;
4063
4064 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
4065 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4066 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
4067
4068 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
4069 RF_CARD_DISABLED)) {
4070
bb8c093b 4071 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 4072 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4073
bb8c093b
CH		 4074 if (!iwl4965_grab_nic_access(priv)) {
4075 iwl4965_write_direct32(
b481de9c
ZY		 4076 priv, HBUS_TARG_MBX_C,
4077 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4078
bb8c093b 4079 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4080 }
4081
4082 if (!(flags & RXON_CARD_DISABLED)) {
bb8c093b 4083 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 4084 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
bb8c093b
CH		 4085 if (!iwl4965_grab_nic_access(priv)) {
4086 iwl4965_write_direct32(
b481de9c
ZY		 4087 priv, HBUS_TARG_MBX_C,
4088 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4089
bb8c093b 4090 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4091 }
4092 }
4093
4094 if (flags & RF_CARD_DISABLED) {
bb8c093b 4095 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 4096 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
bb8c093b
CH		 4097 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4098 if (!iwl4965_grab_nic_access(priv))
4099 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4100 }
4101 }
4102
4103 if (flags & HW_CARD_DISABLED)
4104 set_bit(STATUS_RF_KILL_HW, &priv->status);
4105 else
4106 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4107
4108
4109 if (flags & SW_CARD_DISABLED)
4110 set_bit(STATUS_RF_KILL_SW, &priv->status);
4111 else
4112 clear_bit(STATUS_RF_KILL_SW, &priv->status);
4113
4114 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 4115 iwl4965_scan_cancel(priv);
b481de9c
ZY		 4116
4117 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
4118 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
4119 (test_bit(STATUS_RF_KILL_SW, &status) !=
4120 test_bit(STATUS_RF_KILL_SW, &priv->status)))
4121 queue_work(priv->workqueue, &priv->rf_kill);
4122 else
4123 wake_up_interruptible(&priv->wait_command_queue);
4124}
4125
4126/**
bb8c093b 4127 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 4128 *
4129 * Setup the RX handlers for each of the reply types sent from the uCode
4130 * to the host.
4131 *
4132 * This function chains into the hardware specific files for them to setup
4133 * any hardware specific handlers as well.
4134 */
bb8c093b 4135static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
b481de9c 4136{
bb8c093b
CH		 4137 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
4138 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
4139 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
4140 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 4141 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH		 4142 iwl4965_rx_spectrum_measure_notif;
4143 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 4144 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH		 4145 iwl4965_rx_pm_debug_statistics_notif;
4146 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 4147
9fbab516
BC		 4148 /*
4149 * The same handler is used for both the REPLY to a discrete
4150 * statistics request from the host as well as for the periodic
4151 * statistics notifications (after received beacons) from the uCode.
b481de9c 4152 */
bb8c093b
CH		 4153 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
4154 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 4155
bb8c093b
CH		 4156 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
4157 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 4158 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 4159 iwl4965_rx_scan_results_notif;
b481de9c 4160 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH		 4161 iwl4965_rx_scan_complete_notif;
4162 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
4163 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 4164
9fbab516 4165 /* Set up hardware specific Rx handlers */
bb8c093b 4166 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY		 4167}
4168
4169/**
bb8c093b 4170 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY		 4171 * @rxb: Rx buffer to reclaim
4172 *
4173 * If an Rx buffer has an async callback associated with it the callback
4174 * will be executed. The attached skb (if present) will only be freed
4175 * if the callback returns 1
4176 */
bb8c093b
CH		 4177static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
4178 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4179{
bb8c093b 4180 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 4181 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
4182 int txq_id = SEQ_TO_QUEUE(sequence);
4183 int index = SEQ_TO_INDEX(sequence);
4184 int huge = sequence & SEQ_HUGE_FRAME;
4185 int cmd_index;
bb8c093b 4186 struct iwl4965_cmd *cmd;
b481de9c
ZY		 4187
4188 /* If a Tx command is being handled and it isn't in the actual
4189 * command queue then there a command routing bug has been introduced
4190 * in the queue management code. */
4191 if (txq_id != IWL_CMD_QUEUE_NUM)
4192 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
4193 txq_id, pkt->hdr.cmd);
4194 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
4195
4196 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
4197 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
4198
4199 /* Input error checking is done when commands are added to queue. */
4200 if (cmd->meta.flags & CMD_WANT_SKB) {
4201 cmd->meta.source->u.skb = rxb->skb;
4202 rxb->skb = NULL;
4203 } else if (cmd->meta.u.callback &&
4204 !cmd->meta.u.callback(priv, cmd, rxb->skb))
4205 rxb->skb = NULL;
4206
bb8c093b 4207 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY		 4208
4209 if (!(cmd->meta.flags & CMD_ASYNC)) {
4210 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4211 wake_up_interruptible(&priv->wait_command_queue);
4212 }
4213}
4214
4215/************************** RX-FUNCTIONS ****************************/
4216/*
4217 * Rx theory of operation
4218 *
9fbab516
BC		 4219 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
4220 * each of which point to Receive Buffers to be filled by 4965. These get
4221 * used not only for Rx frames, but for any command response or notification
4222 * from the 4965. The driver and 4965 manage the Rx buffers by means
4223 * of indexes into the circular buffer.
b481de9c
ZY		 4224 *
4225 * Rx Queue Indexes
4226 * The host/firmware share two index registers for managing the Rx buffers.
4227 *
4228 * The READ index maps to the first position that the firmware may be writing
4229 * to -- the driver can read up to (but not including) this position and get
4230 * good data.
4231 * The READ index is managed by the firmware once the card is enabled.
4232 *
4233 * The WRITE index maps to the last position the driver has read from -- the
4234 * position preceding WRITE is the last slot the firmware can place a packet.
4235 *
4236 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
4237 * WRITE = READ.
4238 *
9fbab516 4239 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY		 4240 * INDEX position, and WRITE to the last (READ - 1 wrapped)
4241 *
9fbab516 4242 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY		 4243 * and fire the RX interrupt. The driver can then query the READ index and
4244 * process as many packets as possible, moving the WRITE index forward as it
4245 * resets the Rx queue buffers with new memory.
4246 *
4247 * The management in the driver is as follows:
4248 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
4249 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 4250 * to replenish the iwl->rxq->rx_free.
bb8c093b 4251 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY		 4252 * iwl->rxq is replenished and the READ INDEX is updated (updating the
4253 * 'processed' and 'read' driver indexes as well)
4254 * + A received packet is processed and handed to the kernel network stack,
4255 * detached from the iwl->rxq. The driver 'processed' index is updated.
4256 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
4257 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
4258 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
4259 * were enough free buffers and RX_STALLED is set it is cleared.
4260 *
4261 *
4262 * Driver sequence:
4263 *
9fbab516
BC		 4264 * iwl4965_rx_queue_alloc() Allocates rx_free
4265 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 4266 * iwl4965_rx_queue_restock
9fbab516 4267 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY		 4268 * queue, updates firmware pointers, and updates
4269 * the WRITE index. If insufficient rx_free buffers
bb8c093b 4270 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY		 4271 *
4272 * -- enable interrupts --
9fbab516 4273 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY		 4274 * READ INDEX, detaching the SKB from the pool.
4275 * Moves the packet buffer from queue to rx_used.
bb8c093b 4276 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY		 4277 * slots.
4278 * ...
4279 *
4280 */
4281
4282/**
bb8c093b 4283 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 4284 */
bb8c093b 4285static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY		 4286{
4287 int s = q->read - q->write;
4288 if (s <= 0)
4289 s += RX_QUEUE_SIZE;
4290 /* keep some buffer to not confuse full and empty queue */
4291 s -= 2;
4292 if (s < 0)
4293 s = 0;
4294 return s;
4295}
4296
4297/**
bb8c093b 4298 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 4299 */
bb8c093b 4300int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY		 4301{
4302 u32 reg = 0;
4303 int rc = 0;
4304 unsigned long flags;
4305
4306 spin_lock_irqsave(&q->lock, flags);
4307
4308 if (q->need_update == 0)
4309 goto exit_unlock;
4310
6440adb5 4311 /* If power-saving is in use, make sure device is awake */
b481de9c 4312 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
bb8c093b 4313 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 4314
4315 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
bb8c093b 4316 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 4317 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4318 goto exit_unlock;
4319 }
4320
bb8c093b 4321 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4322 if (rc)
4323 goto exit_unlock;
4324
6440adb5 4325 /* Device expects a multiple of 8 */
bb8c093b 4326 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 4327 q->write & ~0x7);
bb8c093b 4328 iwl4965_release_nic_access(priv);
6440adb5
CB		 4329
4330 /* Else device is assumed to be awake */
b481de9c 4331 } else
6440adb5 4332 /* Device expects a multiple of 8 */
bb8c093b 4333 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY		 4334
4335
4336 q->need_update = 0;
4337
4338 exit_unlock:
4339 spin_unlock_irqrestore(&q->lock, flags);
4340 return rc;
4341}
4342
4343/**
9fbab516 4344 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 4345 */
bb8c093b 4346static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
b481de9c
ZY		 4347 dma_addr_t dma_addr)
4348{
4349 return cpu_to_le32((u32)(dma_addr >> 8));
4350}
4351
4352
4353/**
bb8c093b 4354 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 4355 *
9fbab516 4356 * If there are slots in the RX queue that need to be restocked,
b481de9c 4357 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 4358 * as we can, pulling from rx_free.
b481de9c
ZY		 4359 *
4360 * This moves the 'write' index forward to catch up with 'processed', and
4361 * also updates the memory address in the firmware to reference the new
4362 * target buffer.
4363 */
bb8c093b 4364static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
b481de9c 4365{
bb8c093b 4366 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 4367 struct list_head *element;
bb8c093b 4368 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 4369 unsigned long flags;
4370 int write, rc;
4371
4372 spin_lock_irqsave(&rxq->lock, flags);
4373 write = rxq->write & ~0x7;
bb8c093b 4374 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 4375 /* Get next free Rx buffer, remove from free list */
b481de9c 4376 element = rxq->rx_free.next;
bb8c093b 4377 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 4378 list_del(element);
6440adb5
CB		 4379
4380 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 4381 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY		 4382 rxq->queue[rxq->write] = rxb;
4383 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4384 rxq->free_count--;
4385 }
4386 spin_unlock_irqrestore(&rxq->lock, flags);
4387 /* If the pre-allocated buffer pool is dropping low, schedule to
4388 * refill it */
4389 if (rxq->free_count <= RX_LOW_WATERMARK)
4390 queue_work(priv->workqueue, &priv->rx_replenish);
4391
4392
6440adb5
CB		 4393 /* If we've added more space for the firmware to place data, tell it.
4394 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY		 4395 if ((write != (rxq->write & ~0x7))
4396 || (abs(rxq->write - rxq->read) > 7)) {
4397 spin_lock_irqsave(&rxq->lock, flags);
4398 rxq->need_update = 1;
4399 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 4400 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY		 4401 if (rc)
4402 return rc;
4403 }
4404
4405 return 0;
4406}
4407
4408/**
bb8c093b 4409 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY		 4410 *
4411 * When moving to rx_free an SKB is allocated for the slot.
4412 *
bb8c093b 4413 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 4414 * This is called as a scheduled work item (except for during initialization)
b481de9c 4415 */
5c0eef96 4416static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
b481de9c 4417{
bb8c093b 4418 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 4419 struct list_head *element;
bb8c093b 4420 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 4421 unsigned long flags;
4422 spin_lock_irqsave(&rxq->lock, flags);
4423 while (!list_empty(&rxq->rx_used)) {
4424 element = rxq->rx_used.next;
bb8c093b 4425 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
CB		 4426
4427 /* Alloc a new receive buffer */
b481de9c 4428 rxb->skb =
9ee1ba47
RR		 4429 alloc_skb(priv->hw_setting.rx_buf_size,
4430 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY		 4431 if (!rxb->skb) {
4432 if (net_ratelimit())
4433 printk(KERN_CRIT DRV_NAME
4434 ": Can not allocate SKB buffers\n");
4435 /* We don't reschedule replenish work here -- we will
4436 * call the restock method and if it still needs
4437 * more buffers it will schedule replenish */
4438 break;
4439 }
4440 priv->alloc_rxb_skb++;
4441 list_del(element);
6440adb5
CB		 4442
4443 /* Get physical address of RB/SKB */
b481de9c
ZY		 4444 rxb->dma_addr =
4445 pci_map_single(priv->pci_dev, rxb->skb->data,
9ee1ba47 4446 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4447 list_add_tail(&rxb->list, &rxq->rx_free);
4448 rxq->free_count++;
4449 }
4450 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA		 4451}
4452
4453/*
4454 * this should be called while priv->lock is locked
4455*/
4fd1f841 4456static void __iwl4965_rx_replenish(void *data)
5c0eef96
MA		 4457{
4458 struct iwl4965_priv *priv = data;
4459
4460 iwl4965_rx_allocate(priv);
4461 iwl4965_rx_queue_restock(priv);
4462}
4463
4464
4465void iwl4965_rx_replenish(void *data)
4466{
4467 struct iwl4965_priv *priv = data;
4468 unsigned long flags;
4469
4470 iwl4965_rx_allocate(priv);
b481de9c
ZY		 4471
4472 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 4473 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 4474 spin_unlock_irqrestore(&priv->lock, flags);
4475}
4476
4477/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 4478 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY		 4479 * This free routine walks the list of POOL entries and if SKB is set to
4480 * non NULL it is unmapped and freed
4481 */
bb8c093b 4482static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 4483{
4484 int i;
4485 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4486 if (rxq->pool[i].skb != NULL) {
4487 pci_unmap_single(priv->pci_dev,
4488 rxq->pool[i].dma_addr,
9ee1ba47
RR		 4489 priv->hw_setting.rx_buf_size,
4490 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4491 dev_kfree_skb(rxq->pool[i].skb);
4492 }
4493 }
4494
4495 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4496 rxq->dma_addr);
4497 rxq->bd = NULL;
4498}
4499
bb8c093b 4500int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
b481de9c 4501{
bb8c093b 4502 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 4503 struct pci_dev *dev = priv->pci_dev;
4504 int i;
4505
4506 spin_lock_init(&rxq->lock);
4507 INIT_LIST_HEAD(&rxq->rx_free);
4508 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
CB		 4509
4510 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY		 4511 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4512 if (!rxq->bd)
4513 return -ENOMEM;
6440adb5 4514
b481de9c
ZY		 4515 /* Fill the rx_used queue with _all_ of the Rx buffers */
4516 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4517 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 4518
b481de9c
ZY		 4519 /* Set us so that we have processed and used all buffers, but have
4520 * not restocked the Rx queue with fresh buffers */
4521 rxq->read = rxq->write = 0;
4522 rxq->free_count = 0;
4523 rxq->need_update = 0;
4524 return 0;
4525}
4526
bb8c093b 4527void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 4528{
4529 unsigned long flags;
4530 int i;
4531 spin_lock_irqsave(&rxq->lock, flags);
4532 INIT_LIST_HEAD(&rxq->rx_free);
4533 INIT_LIST_HEAD(&rxq->rx_used);
4534 /* Fill the rx_used queue with _all_ of the Rx buffers */
4535 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4536 /* In the reset function, these buffers may have been allocated
4537 * to an SKB, so we need to unmap and free potential storage */
4538 if (rxq->pool[i].skb != NULL) {
4539 pci_unmap_single(priv->pci_dev,
4540 rxq->pool[i].dma_addr,
9ee1ba47
RR		 4541 priv->hw_setting.rx_buf_size,
4542 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4543 priv->alloc_rxb_skb--;
4544 dev_kfree_skb(rxq->pool[i].skb);
4545 rxq->pool[i].skb = NULL;
4546 }
4547 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4548 }
4549
4550 /* Set us so that we have processed and used all buffers, but have
4551 * not restocked the Rx queue with fresh buffers */
4552 rxq->read = rxq->write = 0;
4553 rxq->free_count = 0;
4554 spin_unlock_irqrestore(&rxq->lock, flags);
4555}
4556
4557/* Convert linear signal-to-noise ratio into dB */
4558static u8 ratio2dB[100] = {
4559/* 0 1 2 3 4 5 6 7 8 9 */
4560 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4561 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4562 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4563 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4564 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4565 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4566 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4567 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4568 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4569 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4570};
4571
4572/* Calculates a relative dB value from a ratio of linear
4573 * (i.e. not dB) signal levels.
4574 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 4575int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 4576{
c899a575
AB		 4577 /* 1000:1 or higher just report as 60 dB */
4578 if (sig_ratio >= 1000)
b481de9c
ZY		 4579 return 60;
4580
c899a575 4581 /* 100:1 or higher, divide by 10 and use table,
b481de9c 4582 * add 20 dB to make up for divide by 10 */
c899a575 4583 if (sig_ratio >= 100)
b481de9c
ZY		 4584 return (20 + (int)ratio2dB[sig_ratio/10]);
4585
4586 /* We shouldn't see this */
4587 if (sig_ratio < 1)
4588 return 0;
4589
4590 /* Use table for ratios 1:1 - 99:1 */
4591 return (int)ratio2dB[sig_ratio];
4592}
4593
4594#define PERFECT_RSSI (-20) /* dBm */
4595#define WORST_RSSI (-95) /* dBm */
4596#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4597
4598/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4599 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4600 * about formulas used below. */
bb8c093b 4601int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY		 4602{
4603 int sig_qual;
4604 int degradation = PERFECT_RSSI - rssi_dbm;
4605
4606 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4607 * as indicator; formula is (signal dbm - noise dbm).
4608 * SNR at or above 40 is a great signal (100%).
4609 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4610 * Weakest usable signal is usually 10 - 15 dB SNR. */
4611 if (noise_dbm) {
4612 if (rssi_dbm - noise_dbm >= 40)
4613 return 100;
4614 else if (rssi_dbm < noise_dbm)
4615 return 0;
4616 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4617
4618 /* Else use just the signal level.
4619 * This formula is a least squares fit of data points collected and
4620 * compared with a reference system that had a percentage (%) display
4621 * for signal quality. */
4622 } else
4623 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4624 (15 * RSSI_RANGE + 62 * degradation)) /
4625 (RSSI_RANGE * RSSI_RANGE);
4626
4627 if (sig_qual > 100)
4628 sig_qual = 100;
4629 else if (sig_qual < 1)
4630 sig_qual = 0;
4631
4632 return sig_qual;
4633}
4634
4635/**
9fbab516 4636 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 4637 *
4638 * Uses the priv->rx_handlers callback function array to invoke
4639 * the appropriate handlers, including command responses,
4640 * frame-received notifications, and other notifications.
4641 */
bb8c093b 4642static void iwl4965_rx_handle(struct iwl4965_priv *priv)
b481de9c 4643{
bb8c093b
CH		 4644 struct iwl4965_rx_mem_buffer *rxb;
4645 struct iwl4965_rx_packet *pkt;
4646 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 4647 u32 r, i;
4648 int reclaim;
4649 unsigned long flags;
5c0eef96 4650 u8 fill_rx = 0;
d68ab680 4651 u32 count = 8;
b481de9c 4652
6440adb5
CB		 4653 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4654 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 4655 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY		 4656 i = rxq->read;
4657
4658 /* Rx interrupt, but nothing sent from uCode */
4659 if (i == r)
4660 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4661
5c0eef96
MA		 4662 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4663 fill_rx = 1;
4664
b481de9c
ZY		 4665 while (i != r) {
4666 rxb = rxq->queue[i];
4667
9fbab516 4668 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 4669 * then a bug has been introduced in the queue refilling
4670 * routines -- catch it here */
4671 BUG_ON(rxb == NULL);
4672
4673 rxq->queue[i] = NULL;
4674
4675 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
9ee1ba47 4676 priv->hw_setting.rx_buf_size,
b481de9c 4677 PCI_DMA_FROMDEVICE);
bb8c093b 4678 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 4679
4680 /* Reclaim a command buffer only if this packet is a response
4681 * to a (driver-originated) command.
4682 * If the packet (e.g. Rx frame) originated from uCode,
4683 * there is no command buffer to reclaim.
4684 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4685 * but apparently a few don't get set; catch them here. */
4686 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4687 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4688 (pkt->hdr.cmd != REPLY_4965_RX) &&
cfe01709 4689 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 4690 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4691 (pkt->hdr.cmd != REPLY_TX);
4692
4693 /* Based on type of command response or notification,
4694 * handle those that need handling via function in
bb8c093b 4695 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY		 4696 if (priv->rx_handlers[pkt->hdr.cmd]) {
4697 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4698 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4699 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4700 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4701 } else {
4702 /* No handling needed */
4703 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4704 "r %d i %d No handler needed for %s, 0x%02x\n",
4705 r, i, get_cmd_string(pkt->hdr.cmd),
4706 pkt->hdr.cmd);
4707 }
4708
4709 if (reclaim) {
9fbab516
BC		 4710 /* Invoke any callbacks, transfer the skb to caller, and
4711 * fire off the (possibly) blocking iwl4965_send_cmd()
b481de9c
ZY		 4712 * as we reclaim the driver command queue */
4713 if (rxb && rxb->skb)
bb8c093b 4714 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY		 4715 else
4716 IWL_WARNING("Claim null rxb?\n");
4717 }
4718
4719 /* For now we just don't re-use anything. We can tweak this
4720 * later to try and re-use notification packets and SKBs that
4721 * fail to Rx correctly */
4722 if (rxb->skb != NULL) {
4723 priv->alloc_rxb_skb--;
4724 dev_kfree_skb_any(rxb->skb);
4725 rxb->skb = NULL;
4726 }
4727
4728 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
9ee1ba47
RR		 4729 priv->hw_setting.rx_buf_size,
4730 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4731 spin_lock_irqsave(&rxq->lock, flags);
4732 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4733 spin_unlock_irqrestore(&rxq->lock, flags);
4734 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 4735 /* If there are a lot of unused frames,
4736 * restock the Rx queue so ucode wont assert. */
4737 if (fill_rx) {
4738 count++;
4739 if (count >= 8) {
4740 priv->rxq.read = i;
4741 __iwl4965_rx_replenish(priv);
4742 count = 0;
4743 }
4744 }
b481de9c
ZY		 4745 }
4746
4747 /* Backtrack one entry */
4748 priv->rxq.read = i;
bb8c093b 4749 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 4750}
4751
6440adb5
CB		 4752/**
4753 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4754 */
bb8c093b
CH		 4755static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
4756 struct iwl4965_tx_queue *txq)
b481de9c
ZY		 4757{
4758 u32 reg = 0;
4759 int rc = 0;
4760 int txq_id = txq->q.id;
4761
4762 if (txq->need_update == 0)
4763 return rc;
4764
4765 /* if we're trying to save power */
4766 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4767 /* wake up nic if it's powered down ...
4768 * uCode will wake up, and interrupt us again, so next
4769 * time we'll skip this part. */
bb8c093b 4770 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 4771
4772 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4773 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
bb8c093b 4774 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 4775 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4776 return rc;
4777 }
4778
4779 /* restore this queue's parameters in nic hardware. */
bb8c093b 4780 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4781 if (rc)
4782 return rc;
bb8c093b 4783 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 4784 txq->q.write_ptr | (txq_id << 8));
bb8c093b 4785 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4786
4787 /* else not in power-save mode, uCode will never sleep when we're
4788 * trying to tx (during RFKILL, we're not trying to tx). */
4789 } else
bb8c093b 4790 iwl4965_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 4791 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY		 4792
4793 txq->need_update = 0;
4794
4795 return rc;
4796}
4797
c8b0e6e1 4798#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 4799static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 4800{
0795af57
JP		 4801 DECLARE_MAC_BUF(mac);
4802
b481de9c 4803 IWL_DEBUG_RADIO("RX CONFIG:\n");
bb8c093b 4804 iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 4805 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4806 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4807 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4808 le32_to_cpu(rxon->filter_flags));
4809 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4810 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4811 rxon->ofdm_basic_rates);
4812 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP		 4813 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4814 print_mac(mac, rxon->node_addr));
4815 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4816 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY		 4817 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4818}
4819#endif
4820
bb8c093b 4821static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
b481de9c
ZY		 4822{
4823 IWL_DEBUG_ISR("Enabling interrupts\n");
4824 set_bit(STATUS_INT_ENABLED, &priv->status);
bb8c093b 4825 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY		 4826}
4827
bb8c093b 4828static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
b481de9c
ZY		 4829{
4830 clear_bit(STATUS_INT_ENABLED, &priv->status);
4831
4832 /* disable interrupts from uCode/NIC to host */
bb8c093b 4833 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4834
4835 /* acknowledge/clear/reset any interrupts still pending
4836 * from uCode or flow handler (Rx/Tx DMA) */
bb8c093b
CH		 4837 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4838 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY		 4839 IWL_DEBUG_ISR("Disabled interrupts\n");
4840}
4841
4842static const char *desc_lookup(int i)
4843{
4844 switch (i) {
4845 case 1:
4846 return "FAIL";
4847 case 2:
4848 return "BAD_PARAM";
4849 case 3:
4850 return "BAD_CHECKSUM";
4851 case 4:
4852 return "NMI_INTERRUPT";
4853 case 5:
4854 return "SYSASSERT";
4855 case 6:
4856 return "FATAL_ERROR";
4857 }
4858
4859 return "UNKNOWN";
4860}
4861
4862#define ERROR_START_OFFSET (1 * sizeof(u32))
4863#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4864
bb8c093b 4865static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
b481de9c
ZY		 4866{
4867 u32 data2, line;
4868 u32 desc, time, count, base, data1;
4869 u32 blink1, blink2, ilink1, ilink2;
4870 int rc;
4871
4872 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4873
bb8c093b 4874 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4875 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4876 return;
4877 }
4878
bb8c093b 4879 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4880 if (rc) {
4881 IWL_WARNING("Can not read from adapter at this time.\n");
4882 return;
4883 }
4884
bb8c093b 4885 count = iwl4965_read_targ_mem(priv, base);
b481de9c
ZY		 4886
4887 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4888 IWL_ERROR("Start IWL Error Log Dump:\n");
4889 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4890 priv->status, priv->config, count);
4891 }
4892
bb8c093b
CH		 4893 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4894 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4895 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4896 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4897 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4898 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4899 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4900 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4901 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY		 4902
4903 IWL_ERROR("Desc Time "
4904 "data1 data2 line\n");
4905 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4906 desc_lookup(desc), desc, time, data1, data2, line);
4907 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4908 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4909 ilink1, ilink2);
4910
bb8c093b 4911 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4912}
4913
4914#define EVENT_START_OFFSET (4 * sizeof(u32))
4915
4916/**
bb8c093b 4917 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 4918 *
bb8c093b 4919 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
b481de9c 4920 */
bb8c093b 4921static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
b481de9c
ZY		 4922 u32 num_events, u32 mode)
4923{
4924 u32 i;
4925 u32 base; /* SRAM byte address of event log header */
4926 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4927 u32 ptr; /* SRAM byte address of log data */
4928 u32 ev, time, data; /* event log data */
4929
4930 if (num_events == 0)
4931 return;
4932
4933 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4934
4935 if (mode == 0)
4936 event_size = 2 * sizeof(u32);
4937 else
4938 event_size = 3 * sizeof(u32);
4939
4940 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4941
4942 /* "time" is actually "data" for mode 0 (no timestamp).
4943 * place event id # at far right for easier visual parsing. */
4944 for (i = 0; i < num_events; i++) {
bb8c093b 4945 ev = iwl4965_read_targ_mem(priv, ptr);
b481de9c 4946 ptr += sizeof(u32);
bb8c093b 4947 time = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY		 4948 ptr += sizeof(u32);
4949 if (mode == 0)
4950 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4951 else {
bb8c093b 4952 data = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY		 4953 ptr += sizeof(u32);
4954 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4955 }
4956 }
4957}
4958
bb8c093b 4959static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
b481de9c
ZY		 4960{
4961 int rc;
4962 u32 base; /* SRAM byte address of event log header */
4963 u32 capacity; /* event log capacity in # entries */
4964 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4965 u32 num_wraps; /* # times uCode wrapped to top of log */
4966 u32 next_entry; /* index of next entry to be written by uCode */
4967 u32 size; /* # entries that we'll print */
4968
4969 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 4970 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4971 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4972 return;
4973 }
4974
bb8c093b 4975 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4976 if (rc) {
4977 IWL_WARNING("Can not read from adapter at this time.\n");
4978 return;
4979 }
4980
4981 /* event log header */
bb8c093b
CH		 4982 capacity = iwl4965_read_targ_mem(priv, base);
4983 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
4984 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
4985 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY		 4986
4987 size = num_wraps ? capacity : next_entry;
4988
4989 /* bail out if nothing in log */
4990 if (size == 0) {
583fab37 4991 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
bb8c093b 4992 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4993 return;
4994 }
4995
583fab37 4996 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY		 4997 size, num_wraps);
4998
4999 /* if uCode has wrapped back to top of log, start at the oldest entry,
5000 * i.e the next one that uCode would fill. */
5001 if (num_wraps)
bb8c093b 5002 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY		 5003 capacity - next_entry, mode);
5004
5005 /* (then/else) start at top of log */
bb8c093b 5006 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 5007
bb8c093b 5008 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5009}
5010
5011/**
bb8c093b 5012 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 5013 */
bb8c093b 5014static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
b481de9c 5015{
bb8c093b 5016 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY		 5017 set_bit(STATUS_FW_ERROR, &priv->status);
5018
5019 /* Cancel currently queued command. */
5020 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
5021
c8b0e6e1 5022#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 5023 if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
5024 iwl4965_dump_nic_error_log(priv);
5025 iwl4965_dump_nic_event_log(priv);
5026 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY		 5027 }
5028#endif
5029
5030 wake_up_interruptible(&priv->wait_command_queue);
5031
5032 /* Keep the restart process from trying to send host
5033 * commands by clearing the INIT status bit */
5034 clear_bit(STATUS_READY, &priv->status);
5035
5036 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5037 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
5038 "Restarting adapter due to uCode error.\n");
5039
bb8c093b 5040 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 5041 memcpy(&priv->recovery_rxon, &priv->active_rxon,
5042 sizeof(priv->recovery_rxon));
5043 priv->error_recovering = 1;
5044 }
5045 queue_work(priv->workqueue, &priv->restart);
5046 }
5047}
5048
bb8c093b 5049static void iwl4965_error_recovery(struct iwl4965_priv *priv)
b481de9c
ZY		 5050{
5051 unsigned long flags;
5052
5053 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
5054 sizeof(priv->staging_rxon));
5055 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 5056 iwl4965_commit_rxon(priv);
b481de9c 5057
bb8c093b 5058 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 5059
5060 spin_lock_irqsave(&priv->lock, flags);
5061 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
5062 priv->error_recovering = 0;
5063 spin_unlock_irqrestore(&priv->lock, flags);
5064}
5065
bb8c093b 5066static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
b481de9c
ZY		 5067{
5068 u32 inta, handled = 0;
5069 u32 inta_fh;
5070 unsigned long flags;
c8b0e6e1 5071#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY		 5072 u32 inta_mask;
5073#endif
5074
5075 spin_lock_irqsave(&priv->lock, flags);
5076
5077 /* Ack/clear/reset pending uCode interrupts.
5078 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
5079 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
bb8c093b
CH		 5080 inta = iwl4965_read32(priv, CSR_INT);
5081 iwl4965_write32(priv, CSR_INT, inta);
b481de9c
ZY		 5082
5083 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
5084 * Any new interrupts that happen after this, either while we're
5085 * in this tasklet, or later, will show up in next ISR/tasklet. */
bb8c093b
CH		 5086 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5087 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 5088
c8b0e6e1 5089#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 5090 if (iwl4965_debug_level & IWL_DL_ISR) {
9fbab516
BC		 5091 /* just for debug */
5092 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 5093 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5094 inta, inta_mask, inta_fh);
5095 }
5096#endif
5097
5098 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
5099 * atomic, make sure that inta covers all the interrupts that
5100 * we've discovered, even if FH interrupt came in just after
5101 * reading CSR_INT. */
5102 if (inta_fh & CSR_FH_INT_RX_MASK)
5103 inta |= CSR_INT_BIT_FH_RX;
5104 if (inta_fh & CSR_FH_INT_TX_MASK)
5105 inta |= CSR_INT_BIT_FH_TX;
5106
5107 /* Now service all interrupt bits discovered above. */
5108 if (inta & CSR_INT_BIT_HW_ERR) {
5109 IWL_ERROR("Microcode HW error detected. Restarting.\n");
5110
5111 /* Tell the device to stop sending interrupts */
bb8c093b 5112 iwl4965_disable_interrupts(priv);
b481de9c 5113
bb8c093b 5114 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 5115
5116 handled |= CSR_INT_BIT_HW_ERR;
5117
5118 spin_unlock_irqrestore(&priv->lock, flags);
5119
5120 return;
5121 }
5122
c8b0e6e1 5123#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 5124 if (iwl4965_debug_level & (IWL_DL_ISR)) {
b481de9c 5125 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP		 5126 if (inta & CSR_INT_BIT_SCD)
5127 IWL_DEBUG_ISR("Scheduler finished to transmit "
5128 "the frame/frames.\n");
b481de9c
ZY		 5129
5130 /* Alive notification via Rx interrupt will do the real work */
5131 if (inta & CSR_INT_BIT_ALIVE)
5132 IWL_DEBUG_ISR("Alive interrupt\n");
5133 }
5134#endif
5135 /* Safely ignore these bits for debug checks below */
25c03d8e 5136 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 5137
9fbab516 5138 /* HW RF KILL switch toggled */
b481de9c
ZY		 5139 if (inta & CSR_INT_BIT_RF_KILL) {
5140 int hw_rf_kill = 0;
bb8c093b 5141 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 5142 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
5143 hw_rf_kill = 1;
5144
5145 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
5146 "RF_KILL bit toggled to %s.\n",
5147 hw_rf_kill ? "disable radio":"enable radio");
5148
5149 /* Queue restart only if RF_KILL switch was set to "kill"
5150 * when we loaded driver, and is now set to "enable".
5151 * After we're Alive, RF_KILL gets handled by
3230455d 5152 * iwl4965_rx_card_state_notif() */
53e49093
ZY		 5153 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
5154 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 5155 queue_work(priv->workqueue, &priv->restart);
53e49093 5156 }
b481de9c
ZY		 5157
5158 handled |= CSR_INT_BIT_RF_KILL;
5159 }
5160
9fbab516 5161 /* Chip got too hot and stopped itself */
b481de9c
ZY		 5162 if (inta & CSR_INT_BIT_CT_KILL) {
5163 IWL_ERROR("Microcode CT kill error detected.\n");
5164 handled |= CSR_INT_BIT_CT_KILL;
5165 }
5166
5167 /* Error detected by uCode */
5168 if (inta & CSR_INT_BIT_SW_ERR) {
5169 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
5170 inta);
bb8c093b 5171 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 5172 handled |= CSR_INT_BIT_SW_ERR;
5173 }
5174
5175 /* uCode wakes up after power-down sleep */
5176 if (inta & CSR_INT_BIT_WAKEUP) {
5177 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH		 5178 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
5179 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
5180 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
5181 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
5182 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
5183 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
5184 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 5185
5186 handled |= CSR_INT_BIT_WAKEUP;
5187 }
5188
5189 /* All uCode command responses, including Tx command responses,
5190 * Rx "responses" (frame-received notification), and other
5191 * notifications from uCode come through here*/
5192 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 5193 iwl4965_rx_handle(priv);
b481de9c
ZY		 5194 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
5195 }
5196
5197 if (inta & CSR_INT_BIT_FH_TX) {
5198 IWL_DEBUG_ISR("Tx interrupt\n");
5199 handled |= CSR_INT_BIT_FH_TX;
5200 }
5201
5202 if (inta & ~handled)
5203 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
5204
5205 if (inta & ~CSR_INI_SET_MASK) {
5206 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
5207 inta & ~CSR_INI_SET_MASK);
5208 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
5209 }
5210
5211 /* Re-enable all interrupts */
bb8c093b 5212 iwl4965_enable_interrupts(priv);
b481de9c 5213
c8b0e6e1 5214#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 5215 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5216 inta = iwl4965_read32(priv, CSR_INT);
5217 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5218 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 5219 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
5220 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
5221 }
5222#endif
5223 spin_unlock_irqrestore(&priv->lock, flags);
5224}
5225
bb8c093b 5226static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 5227{
bb8c093b 5228 struct iwl4965_priv *priv = data;
b481de9c
ZY		 5229 u32 inta, inta_mask;
5230 u32 inta_fh;
5231 if (!priv)
5232 return IRQ_NONE;
5233
5234 spin_lock(&priv->lock);
5235
5236 /* Disable (but don't clear!) interrupts here to avoid
5237 * back-to-back ISRs and sporadic interrupts from our NIC.
5238 * If we have something to service, the tasklet will re-enable ints.
5239 * If we *don't* have something, we'll re-enable before leaving here. */
bb8c093b
CH		 5240 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
5241 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 5242
5243 /* Discover which interrupts are active/pending */
bb8c093b
CH		 5244 inta = iwl4965_read32(priv, CSR_INT);
5245 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 5246
5247 /* Ignore interrupt if there's nothing in NIC to service.
5248 * This may be due to IRQ shared with another device,
5249 * or due to sporadic interrupts thrown from our NIC. */
5250 if (!inta && !inta_fh) {
5251 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5252 goto none;
5253 }
5254
5255 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 5256 /* Hardware disappeared. It might have already raised
5257 * an interrupt */
b481de9c 5258 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 5259 goto unplugged;
b481de9c
ZY		 5260 }
5261
5262 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5263 inta, inta_mask, inta_fh);
5264
25c03d8e
JP		 5265 inta &= ~CSR_INT_BIT_SCD;
5266
bb8c093b 5267 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 5268 if (likely(inta || inta_fh))
5269 tasklet_schedule(&priv->irq_tasklet);
b481de9c 5270
66fbb541
ON		 5271 unplugged:
5272 spin_unlock(&priv->lock);
b481de9c
ZY		 5273 return IRQ_HANDLED;
5274
5275 none:
5276 /* re-enable interrupts here since we don't have anything to service. */
bb8c093b 5277 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 5278 spin_unlock(&priv->lock);
5279 return IRQ_NONE;
5280}
5281
5282/************************** EEPROM BANDS ****************************
5283 *
bb8c093b 5284 * The iwl4965_eeprom_band definitions below provide the mapping from the
b481de9c
ZY		 5285 * EEPROM contents to the specific channel number supported for each
5286 * band.
5287 *
bb8c093b 5288 * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
b481de9c
ZY		 5289 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5290 * The specific geography and calibration information for that channel
5291 * is contained in the eeprom map itself.
5292 *
5293 * During init, we copy the eeprom information and channel map
5294 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5295 *
5296 * channel_map_24/52 provides the index in the channel_info array for a
5297 * given channel. We have to have two separate maps as there is channel
5298 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5299 * band_2
5300 *
5301 * A value of 0xff stored in the channel_map indicates that the channel
5302 * is not supported by the hardware at all.
5303 *
5304 * A value of 0xfe in the channel_map indicates that the channel is not
5305 * valid for Tx with the current hardware. This means that
5306 * while the system can tune and receive on a given channel, it may not
5307 * be able to associate or transmit any frames on that
5308 * channel. There is no corresponding channel information for that
5309 * entry.
5310 *
5311 *********************************************************************/
5312
5313/* 2.4 GHz */
bb8c093b 5314static const u8 iwl4965_eeprom_band_1[14] = {
b481de9c
ZY		 5315 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5316};
5317
5318/* 5.2 GHz bands */
9fbab516 5319static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
b481de9c
ZY		 5320 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5321};
5322
9fbab516 5323static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
b481de9c
ZY		 5324 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5325};
5326
bb8c093b 5327static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
b481de9c
ZY		 5328 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5329};
5330
bb8c093b 5331static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
b481de9c
ZY		 5332 145, 149, 153, 157, 161, 165
5333};
5334
bb8c093b 5335static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
b481de9c
ZY		 5336 1, 2, 3, 4, 5, 6, 7
5337};
5338
bb8c093b 5339static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
b481de9c
ZY		 5340 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5341};
5342
9fbab516
BC		 5343static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
5344 int band,
b481de9c 5345 int *eeprom_ch_count,
bb8c093b 5346 const struct iwl4965_eeprom_channel
b481de9c
ZY		 5347 **eeprom_ch_info,
5348 const u8 **eeprom_ch_index)
5349{
5350 switch (band) {
5351 case 1: /* 2.4GHz band */
bb8c093b 5352 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
b481de9c 5353 *eeprom_ch_info = priv->eeprom.band_1_channels;
bb8c093b 5354 *eeprom_ch_index = iwl4965_eeprom_band_1;
b481de9c 5355 break;
9fbab516 5356 case 2: /* 4.9GHz band */
bb8c093b 5357 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
b481de9c 5358 *eeprom_ch_info = priv->eeprom.band_2_channels;
bb8c093b 5359 *eeprom_ch_index = iwl4965_eeprom_band_2;
b481de9c
ZY		 5360 break;
5361 case 3: /* 5.2GHz band */
bb8c093b 5362 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
b481de9c 5363 *eeprom_ch_info = priv->eeprom.band_3_channels;
bb8c093b 5364 *eeprom_ch_index = iwl4965_eeprom_band_3;
b481de9c 5365 break;
9fbab516 5366 case 4: /* 5.5GHz band */
bb8c093b 5367 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
b481de9c 5368 *eeprom_ch_info = priv->eeprom.band_4_channels;
bb8c093b 5369 *eeprom_ch_index = iwl4965_eeprom_band_4;
b481de9c 5370 break;
9fbab516 5371 case 5: /* 5.7GHz band */
bb8c093b 5372 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
b481de9c 5373 *eeprom_ch_info = priv->eeprom.band_5_channels;
bb8c093b 5374 *eeprom_ch_index = iwl4965_eeprom_band_5;
b481de9c 5375 break;
9fbab516 5376 case 6: /* 2.4GHz FAT channels */
bb8c093b 5377 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
b481de9c 5378 *eeprom_ch_info = priv->eeprom.band_24_channels;
bb8c093b 5379 *eeprom_ch_index = iwl4965_eeprom_band_6;
b481de9c 5380 break;
9fbab516 5381 case 7: /* 5 GHz FAT channels */
bb8c093b 5382 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
b481de9c 5383 *eeprom_ch_info = priv->eeprom.band_52_channels;
bb8c093b 5384 *eeprom_ch_index = iwl4965_eeprom_band_7;
b481de9c
ZY		 5385 break;
5386 default:
5387 BUG();
5388 return;
5389 }
5390}
5391
6440adb5
CB		 5392/**
5393 * iwl4965_get_channel_info - Find driver's private channel info
5394 *
5395 * Based on band and channel number.
5396 */
bb8c093b 5397const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
8318d78a 5398 enum ieee80211_band band, u16 channel)
b481de9c
ZY		 5399{
5400 int i;
5401
8318d78a
JB		 5402 switch (band) {
5403 case IEEE80211_BAND_5GHZ:
b481de9c
ZY		 5404 for (i = 14; i < priv->channel_count; i++) {
5405 if (priv->channel_info[i].channel == channel)
5406 return &priv->channel_info[i];
5407 }
5408 break;
8318d78a 5409 case IEEE80211_BAND_2GHZ:
b481de9c
ZY		 5410 if (channel >= 1 && channel <= 14)
5411 return &priv->channel_info[channel - 1];
5412 break;
8318d78a
JB		 5413 default:
5414 BUG();
b481de9c
ZY		 5415 }
5416
5417 return NULL;
5418}
5419
5420#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5421 ? # x " " : "")
5422
6440adb5
CB		 5423/**
5424 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5425 */
bb8c093b 5426static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
b481de9c
ZY		 5427{
5428 int eeprom_ch_count = 0;
5429 const u8 *eeprom_ch_index = NULL;
bb8c093b 5430 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
b481de9c 5431 int band, ch;
bb8c093b 5432 struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 5433
5434 if (priv->channel_count) {
5435 IWL_DEBUG_INFO("Channel map already initialized.\n");
5436 return 0;
5437 }
5438
5439 if (priv->eeprom.version < 0x2f) {
5440 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5441 priv->eeprom.version);
5442 return -EINVAL;
5443 }
5444
5445 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5446
5447 priv->channel_count =
bb8c093b
CH		 5448 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5449 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5450 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5451 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5452 ARRAY_SIZE(iwl4965_eeprom_band_5);
b481de9c
ZY		 5453
5454 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5455
bb8c093b 5456 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
b481de9c
ZY		 5457 priv->channel_count, GFP_KERNEL);
5458 if (!priv->channel_info) {
5459 IWL_ERROR("Could not allocate channel_info\n");
5460 priv->channel_count = 0;
5461 return -ENOMEM;
5462 }
5463
5464 ch_info = priv->channel_info;
5465
5466 /* Loop through the 5 EEPROM bands adding them in order to the
5467 * channel map we maintain (that contains additional information than
5468 * what just in the EEPROM) */
5469 for (band = 1; band <= 5; band++) {
5470
bb8c093b 5471 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
b481de9c
ZY		 5472 &eeprom_ch_info, &eeprom_ch_index);
5473
5474 /* Loop through each band adding each of the channels */
5475 for (ch = 0; ch < eeprom_ch_count; ch++) {
5476 ch_info->channel = eeprom_ch_index[ch];
8318d78a
JB		 5477 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
5478 IEEE80211_BAND_5GHZ;
b481de9c
ZY		 5479
5480 /* permanently store EEPROM's channel regulatory flags
5481 * and max power in channel info database. */
5482 ch_info->eeprom = eeprom_ch_info[ch];
5483
5484 /* Copy the run-time flags so they are there even on
5485 * invalid channels */
5486 ch_info->flags = eeprom_ch_info[ch].flags;
5487
5488 if (!(is_channel_valid(ch_info))) {
5489 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5490 "No traffic\n",
5491 ch_info->channel,
5492 ch_info->flags,
5493 is_channel_a_band(ch_info) ?
5494 "5.2" : "2.4");
5495 ch_info++;
5496 continue;
5497 }
5498
5499 /* Initialize regulatory-based run-time data */
5500 ch_info->max_power_avg = ch_info->curr_txpow =
5501 eeprom_ch_info[ch].max_power_avg;
5502 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5503 ch_info->min_power = 0;
5504
5505 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5506 " %ddBm): Ad-Hoc %ssupported\n",
5507 ch_info->channel,
5508 is_channel_a_band(ch_info) ?
5509 "5.2" : "2.4",
5510 CHECK_AND_PRINT(IBSS),
5511 CHECK_AND_PRINT(ACTIVE),
5512 CHECK_AND_PRINT(RADAR),
5513 CHECK_AND_PRINT(WIDE),
5514 CHECK_AND_PRINT(NARROW),
5515 CHECK_AND_PRINT(DFS),
5516 eeprom_ch_info[ch].flags,
5517 eeprom_ch_info[ch].max_power_avg,
5518 ((eeprom_ch_info[ch].
5519 flags & EEPROM_CHANNEL_IBSS)
5520 && !(eeprom_ch_info[ch].
5521 flags & EEPROM_CHANNEL_RADAR))
5522 ? "" : "not ");
5523
5524 /* Set the user_txpower_limit to the highest power
5525 * supported by any channel */
5526 if (eeprom_ch_info[ch].max_power_avg >
5527 priv->user_txpower_limit)
5528 priv->user_txpower_limit =
5529 eeprom_ch_info[ch].max_power_avg;
5530
5531 ch_info++;
5532 }
5533 }
5534
6440adb5 5535 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
b481de9c 5536 for (band = 6; band <= 7; band++) {
8318d78a 5537 enum ieee80211_band ieeeband;
b481de9c
ZY		 5538 u8 fat_extension_chan;
5539
bb8c093b 5540 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
b481de9c
ZY		 5541 &eeprom_ch_info, &eeprom_ch_index);
5542
6440adb5 5543 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
8318d78a 5544 ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
6440adb5 5545
b481de9c
ZY		 5546 /* Loop through each band adding each of the channels */
5547 for (ch = 0; ch < eeprom_ch_count; ch++) {
5548
5549 if ((band == 6) &&
5550 ((eeprom_ch_index[ch] == 5) ||
5551 (eeprom_ch_index[ch] == 6) ||
5552 (eeprom_ch_index[ch] == 7)))
5553 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5554 else
5555 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5556
6440adb5 5557 /* Set up driver's info for lower half */
8318d78a 5558 iwl4965_set_fat_chan_info(priv, ieeeband,
b481de9c
ZY		 5559 eeprom_ch_index[ch],
5560 &(eeprom_ch_info[ch]),
5561 fat_extension_chan);
5562
6440adb5 5563 /* Set up driver's info for upper half */
8318d78a 5564 iwl4965_set_fat_chan_info(priv, ieeeband,
b481de9c
ZY		 5565 (eeprom_ch_index[ch] + 4),
5566 &(eeprom_ch_info[ch]),
5567 HT_IE_EXT_CHANNEL_BELOW);
5568 }
5569 }
5570
5571 return 0;
5572}
5573
849e0dce
RC		 5574/*
5575 * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
5576 */
5577static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
5578{
5579 kfree(priv->channel_info);
5580 priv->channel_count = 0;
5581}
5582
b481de9c
ZY		 5583/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5584 * sending probe req. This should be set long enough to hear probe responses
5585 * from more than one AP. */
5586#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5587#define IWL_ACTIVE_DWELL_TIME_52 (10)
5588
5589/* For faster active scanning, scan will move to the next channel if fewer than
5590 * PLCP_QUIET_THRESH packets are heard on this channel within
5591 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5592 * time if it's a quiet channel (nothing responded to our probe, and there's
5593 * no other traffic).
5594 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5595#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5596#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5597
5598/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5599 * Must be set longer than active dwell time.
5600 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5601#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5602#define IWL_PASSIVE_DWELL_TIME_52 (10)
5603#define IWL_PASSIVE_DWELL_BASE (100)
5604#define IWL_CHANNEL_TUNE_TIME 5
5605
8318d78a
JB		 5606static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
5607 enum ieee80211_band band)
b481de9c 5608{
8318d78a 5609 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 5610 return IWL_ACTIVE_DWELL_TIME_52;
5611 else
5612 return IWL_ACTIVE_DWELL_TIME_24;
5613}
5614
8318d78a
JB		 5615static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
5616 enum ieee80211_band band)
b481de9c 5617{
8318d78a
JB		 5618 u16 active = iwl4965_get_active_dwell_time(priv, band);
5619 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
b481de9c
ZY		 5620 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5621 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5622
bb8c093b 5623 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 5624 /* If we're associated, we clamp the maximum passive
5625 * dwell time to be 98% of the beacon interval (minus
5626 * 2 * channel tune time) */
5627 passive = priv->beacon_int;
5628 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5629 passive = IWL_PASSIVE_DWELL_BASE;
5630 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5631 }
5632
5633 if (passive <= active)
5634 passive = active + 1;
5635
5636 return passive;
5637}
5638
8318d78a
JB		 5639static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
5640 enum ieee80211_band band,
b481de9c 5641 u8 is_active, u8 direct_mask,
bb8c093b 5642 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY		 5643{
5644 const struct ieee80211_channel *channels = NULL;
8318d78a 5645 const struct ieee80211_supported_band *sband;
bb8c093b 5646 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 5647 u16 passive_dwell = 0;
5648 u16 active_dwell = 0;
5649 int added, i;
5650
8318d78a
JB		 5651 sband = iwl4965_get_hw_mode(priv, band);
5652 if (!sband)
b481de9c
ZY		 5653 return 0;
5654
8318d78a 5655 channels = sband->channels;
b481de9c 5656
8318d78a
JB		 5657 active_dwell = iwl4965_get_active_dwell_time(priv, band);
5658 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
b481de9c 5659
8318d78a
JB		 5660 for (i = 0, added = 0; i < sband->n_channels; i++) {
5661 if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
b481de9c 5662 le16_to_cpu(priv->active_rxon.channel)) {
bb8c093b 5663 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 5664 IWL_DEBUG_SCAN
5665 ("Skipping current channel %d\n",
5666 le16_to_cpu(priv->active_rxon.channel));
5667 continue;
5668 }
5669 } else if (priv->only_active_channel)
5670 continue;
5671
8318d78a 5672 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
b481de9c 5673
8318d78a 5674 ch_info = iwl4965_get_channel_info(priv, band,
9fbab516 5675 scan_ch->channel);
b481de9c
ZY		 5676 if (!is_channel_valid(ch_info)) {
5677 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5678 scan_ch->channel);
5679 continue;
5680 }
5681
5682 if (!is_active || is_channel_passive(ch_info) ||
8318d78a 5683 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
b481de9c
ZY		 5684 scan_ch->type = 0; /* passive */
5685 else
5686 scan_ch->type = 1; /* active */
5687
5688 if (scan_ch->type & 1)
5689 scan_ch->type |= (direct_mask << 1);
5690
5691 if (is_channel_narrow(ch_info))
5692 scan_ch->type |= (1 << 7);
5693
5694 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5695 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5696
9fbab516 5697 /* Set txpower levels to defaults */
b481de9c
ZY		 5698 scan_ch->tpc.dsp_atten = 110;
5699 /* scan_pwr_info->tpc.dsp_atten; */
5700
5701 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 5702 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 5703 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5704 else {
5705 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5706 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 5707 * power level:
8a1b0245 5708 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY		 5709 */
5710 }
5711
5712 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5713 scan_ch->channel,
5714 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5715 (scan_ch->type & 1) ?
5716 active_dwell : passive_dwell);
5717
5718 scan_ch++;
5719 added++;
5720 }
5721
5722 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5723 return added;
5724}
5725
bb8c093b 5726static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
b481de9c
ZY		 5727 struct ieee80211_rate *rates)
5728{
5729 int i;
5730
5731 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB		 5732 rates[i].bitrate = iwl4965_rates[i].ieee * 5;
5733 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5734 rates[i].hw_value_short = i;
5735 rates[i].flags = 0;
5736 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 5737 /*
8318d78a 5738 * If CCK != 1M then set short preamble rate flag.
b481de9c 5739 */
bb8c093b 5740 rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
8318d78a 5741 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 5742 }
b481de9c 5743 }
b481de9c
ZY		 5744}
5745
5746/**
bb8c093b 5747 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
b481de9c 5748 */
bb8c093b 5749static int iwl4965_init_geos(struct iwl4965_priv *priv)
b481de9c 5750{
bb8c093b 5751 struct iwl4965_channel_info *ch;
8318d78a 5752 struct ieee80211_supported_band *band;
b481de9c
ZY		 5753 struct ieee80211_channel *channels;
5754 struct ieee80211_channel *geo_ch;
5755 struct ieee80211_rate *rates;
5756 int i = 0;
b481de9c 5757
8318d78a
JB		 5758 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5759 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
b481de9c
ZY		 5760 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5761 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5762 return 0;
5763 }
5764
b481de9c
ZY		 5765 channels = kzalloc(sizeof(struct ieee80211_channel) *
5766 priv->channel_count, GFP_KERNEL);
8318d78a 5767 if (!channels)
b481de9c 5768 return -ENOMEM;
b481de9c
ZY		 5769
5770 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5771 GFP_KERNEL);
5772 if (!rates) {
b481de9c
ZY		 5773 kfree(channels);
5774 return -ENOMEM;
5775 }
5776
b481de9c 5777 /* 5.2GHz channels start after the 2.4GHz channels */
8318d78a
JB		 5778 band = &priv->bands[IEEE80211_BAND_5GHZ];
5779 band->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
5780 band->bitrates = &rates[4];
5781 band->n_bitrates = 8; /* just OFDM */
5782
78330fdd
TW		 5783 iwl4965_init_ht_hw_capab(&band->ht_info, IEEE80211_BAND_5GHZ);
5784
8318d78a
JB		 5785 band = &priv->bands[IEEE80211_BAND_2GHZ];
5786 band->channels = channels;
5787 band->bitrates = rates;
5788 band->n_bitrates = 12; /* OFDM & CCK */
b481de9c 5789
78330fdd
TW		 5790 iwl4965_init_ht_hw_capab(&band->ht_info, IEEE80211_BAND_2GHZ);
5791
b481de9c
ZY		 5792 priv->ieee_channels = channels;
5793 priv->ieee_rates = rates;
5794
bb8c093b 5795 iwl4965_init_hw_rates(priv, rates);
b481de9c
ZY		 5796
5797 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5798 ch = &priv->channel_info[i];
5799
5800 if (!is_channel_valid(ch)) {
5801 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5802 "skipping.\n",
5803 ch->channel, is_channel_a_band(ch) ?
5804 "5.2" : "2.4");
5805 continue;
5806 }
5807
5808 if (is_channel_a_band(ch)) {
8318d78a
JB		 5809 geo_ch = &priv->bands[IEEE80211_BAND_5GHZ].channels[priv->bands[IEEE80211_BAND_5GHZ].n_channels++];
5810 } else
5811 geo_ch = &priv->bands[IEEE80211_BAND_2GHZ].channels[priv->bands[IEEE80211_BAND_2GHZ].n_channels++];
b481de9c 5812
8318d78a
JB		 5813 geo_ch->center_freq = ieee80211chan2mhz(ch->channel);
5814 geo_ch->max_power = ch->max_power_avg;
5815 geo_ch->max_antenna_gain = 0xff;
7b72304d 5816 geo_ch->hw_value = ch->channel;
b481de9c
ZY		 5817
5818 if (is_channel_valid(ch)) {
8318d78a
JB		 5819 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5820 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
b481de9c 5821
8318d78a
JB		 5822 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5823 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
b481de9c
ZY		 5824
5825 if (ch->flags & EEPROM_CHANNEL_RADAR)
8318d78a 5826 geo_ch->flags |= IEEE80211_CHAN_RADAR;
b481de9c
ZY		 5827
5828 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5829 priv->max_channel_txpower_limit =
5830 ch->max_power_avg;
8318d78a
JB		 5831 } else
5832 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
b481de9c
ZY		 5833 }
5834
8318d78a 5835 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && priv->is_abg) {
b481de9c
ZY		 5836 printk(KERN_INFO DRV_NAME
5837 ": Incorrectly detected BG card as ABG. Please send "
5838 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5839 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5840 priv->is_abg = 0;
5841 }
5842
5843 printk(KERN_INFO DRV_NAME
5844 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
8318d78a
JB		 5845 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5846 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
b481de9c 5847
8318d78a
JB		 5848 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
5849 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
b481de9c 5850
b481de9c
ZY		 5851 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5852
5853 return 0;
5854}
5855
849e0dce
RC		 5856/*
5857 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
5858 */
5859static void iwl4965_free_geos(struct iwl4965_priv *priv)
5860{
849e0dce
RC		 5861 kfree(priv->ieee_channels);
5862 kfree(priv->ieee_rates);
5863 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5864}
5865
b481de9c
ZY		 5866/******************************************************************************
5867 *
5868 * uCode download functions
5869 *
5870 ******************************************************************************/
5871
bb8c093b 5872static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
b481de9c 5873{
98c92211
TW		 5874 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5875 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5876 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5877 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5878 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5879 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 5880}
5881
5882/**
bb8c093b 5883 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY		 5884 * looking at all data.
5885 */
4fd1f841 5886static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
9fbab516 5887 u32 len)
b481de9c
ZY		 5888{
5889 u32 val;
5890 u32 save_len = len;
5891 int rc = 0;
5892 u32 errcnt;
5893
5894 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5895
bb8c093b 5896 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5897 if (rc)
5898 return rc;
5899
bb8c093b 5900 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
b481de9c
ZY		 5901
5902 errcnt = 0;
5903 for (; len > 0; len -= sizeof(u32), image++) {
5904 /* read data comes through single port, auto-incr addr */
5905 /* NOTE: Use the debugless read so we don't flood kernel log
5906 * if IWL_DL_IO is set */
bb8c093b 5907 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 5908 if (val != le32_to_cpu(*image)) {
5909 IWL_ERROR("uCode INST section is invalid at "
5910 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5911 save_len - len, val, le32_to_cpu(*image));
5912 rc = -EIO;
5913 errcnt++;
5914 if (errcnt >= 20)
5915 break;
5916 }
5917 }
5918
bb8c093b 5919 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5920
5921 if (!errcnt)
5922 IWL_DEBUG_INFO
5923 ("ucode image in INSTRUCTION memory is good\n");
5924
5925 return rc;
5926}
5927
5928
5929/**
bb8c093b 5930 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY		 5931 * using sample data 100 bytes apart. If these sample points are good,
5932 * it's a pretty good bet that everything between them is good, too.
5933 */
bb8c093b 5934static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
b481de9c
ZY		 5935{
5936 u32 val;
5937 int rc = 0;
5938 u32 errcnt = 0;
5939 u32 i;
5940
5941 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5942
bb8c093b 5943 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5944 if (rc)
5945 return rc;
5946
5947 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5948 /* read data comes through single port, auto-incr addr */
5949 /* NOTE: Use the debugless read so we don't flood kernel log
5950 * if IWL_DL_IO is set */
bb8c093b 5951 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
b481de9c 5952 i + RTC_INST_LOWER_BOUND);
bb8c093b 5953 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 5954 if (val != le32_to_cpu(*image)) {
5955#if 0 /* Enable this if you want to see details */
5956 IWL_ERROR("uCode INST section is invalid at "
5957 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5958 i, val, *image);
5959#endif
5960 rc = -EIO;
5961 errcnt++;
5962 if (errcnt >= 3)
5963 break;
5964 }
5965 }
5966
bb8c093b 5967 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5968
5969 return rc;
5970}
5971
5972
5973/**
bb8c093b 5974 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY		 5975 * and verify its contents
5976 */
bb8c093b 5977static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
b481de9c
ZY		 5978{
5979 __le32 *image;
5980 u32 len;
5981 int rc = 0;
5982
5983 /* Try bootstrap */
5984 image = (__le32 *)priv->ucode_boot.v_addr;
5985 len = priv->ucode_boot.len;
bb8c093b 5986 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5987 if (rc == 0) {
5988 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5989 return 0;
5990 }
5991
5992 /* Try initialize */
5993 image = (__le32 *)priv->ucode_init.v_addr;
5994 len = priv->ucode_init.len;
bb8c093b 5995 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5996 if (rc == 0) {
5997 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5998 return 0;
5999 }
6000
6001 /* Try runtime/protocol */
6002 image = (__le32 *)priv->ucode_code.v_addr;
6003 len = priv->ucode_code.len;
bb8c093b 6004 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 6005 if (rc == 0) {
6006 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
6007 return 0;
6008 }
6009
6010 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
6011
9fbab516
BC		 6012 /* Since nothing seems to match, show first several data entries in
6013 * instruction SRAM, so maybe visual inspection will give a clue.
6014 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY		 6015 image = (__le32 *)priv->ucode_boot.v_addr;
6016 len = priv->ucode_boot.len;
bb8c093b 6017 rc = iwl4965_verify_inst_full(priv, image, len);
b481de9c
ZY		 6018
6019 return rc;
6020}
6021
6022
6023/* check contents of special bootstrap uCode SRAM */
bb8c093b 6024static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
b481de9c
ZY		 6025{
6026 __le32 *image = priv->ucode_boot.v_addr;
6027 u32 len = priv->ucode_boot.len;
6028 u32 reg;
6029 u32 val;
6030
6031 IWL_DEBUG_INFO("Begin verify bsm\n");
6032
6033 /* verify BSM SRAM contents */
bb8c093b 6034 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
b481de9c
ZY		 6035 for (reg = BSM_SRAM_LOWER_BOUND;
6036 reg < BSM_SRAM_LOWER_BOUND + len;
6037 reg += sizeof(u32), image ++) {
bb8c093b 6038 val = iwl4965_read_prph(priv, reg);
b481de9c
ZY		 6039 if (val != le32_to_cpu(*image)) {
6040 IWL_ERROR("BSM uCode verification failed at "
6041 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
6042 BSM_SRAM_LOWER_BOUND,
6043 reg - BSM_SRAM_LOWER_BOUND, len,
6044 val, le32_to_cpu(*image));
6045 return -EIO;
6046 }
6047 }
6048
6049 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
6050
6051 return 0;
6052}
6053
6054/**
bb8c093b 6055 * iwl4965_load_bsm - Load bootstrap instructions
b481de9c
ZY		 6056 *
6057 * BSM operation:
6058 *
6059 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
6060 * in special SRAM that does not power down during RFKILL. When powering back
6061 * up after power-saving sleeps (or during initial uCode load), the BSM loads
6062 * the bootstrap program into the on-board processor, and starts it.
6063 *
6064 * The bootstrap program loads (via DMA) instructions and data for a new
6065 * program from host DRAM locations indicated by the host driver in the
6066 * BSM_DRAM_* registers. Once the new program is loaded, it starts
6067 * automatically.
6068 *
6069 * When initializing the NIC, the host driver points the BSM to the
6070 * "initialize" uCode image. This uCode sets up some internal data, then
6071 * notifies host via "initialize alive" that it is complete.
6072 *
6073 * The host then replaces the BSM_DRAM_* pointer values to point to the
6074 * normal runtime uCode instructions and a backup uCode data cache buffer
6075 * (filled initially with starting data values for the on-board processor),
6076 * then triggers the "initialize" uCode to load and launch the runtime uCode,
6077 * which begins normal operation.
6078 *
6079 * When doing a power-save shutdown, runtime uCode saves data SRAM into
6080 * the backup data cache in DRAM before SRAM is powered down.
6081 *
6082 * When powering back up, the BSM loads the bootstrap program. This reloads
6083 * the runtime uCode instructions and the backup data cache into SRAM,
6084 * and re-launches the runtime uCode from where it left off.
6085 */
bb8c093b 6086static int iwl4965_load_bsm(struct iwl4965_priv *priv)
b481de9c
ZY		 6087{
6088 __le32 *image = priv->ucode_boot.v_addr;
6089 u32 len = priv->ucode_boot.len;
6090 dma_addr_t pinst;
6091 dma_addr_t pdata;
6092 u32 inst_len;
6093 u32 data_len;
6094 int rc;
6095 int i;
6096 u32 done;
6097 u32 reg_offset;
6098
6099 IWL_DEBUG_INFO("Begin load bsm\n");
6100
6101 /* make sure bootstrap program is no larger than BSM's SRAM size */
6102 if (len > IWL_MAX_BSM_SIZE)
6103 return -EINVAL;
6104
6105 /* Tell bootstrap uCode where to find the "Initialize" uCode
9fbab516 6106 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
bb8c093b 6107 * NOTE: iwl4965_initialize_alive_start() will replace these values,
b481de9c
ZY		 6108 * after the "initialize" uCode has run, to point to
6109 * runtime/protocol instructions and backup data cache. */
6110 pinst = priv->ucode_init.p_addr >> 4;
6111 pdata = priv->ucode_init_data.p_addr >> 4;
6112 inst_len = priv->ucode_init.len;
6113 data_len = priv->ucode_init_data.len;
6114
bb8c093b 6115 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 6116 if (rc)
6117 return rc;
6118
bb8c093b
CH		 6119 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6120 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6121 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
6122 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
b481de9c
ZY		 6123
6124 /* Fill BSM memory with bootstrap instructions */
6125 for (reg_offset = BSM_SRAM_LOWER_BOUND;
6126 reg_offset < BSM_SRAM_LOWER_BOUND + len;
6127 reg_offset += sizeof(u32), image++)
bb8c093b 6128 _iwl4965_write_prph(priv, reg_offset,
b481de9c
ZY		 6129 le32_to_cpu(*image));
6130
bb8c093b 6131 rc = iwl4965_verify_bsm(priv);
b481de9c 6132 if (rc) {
bb8c093b 6133 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6134 return rc;
6135 }
6136
6137 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
bb8c093b
CH		 6138 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
6139 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
b481de9c 6140 RTC_INST_LOWER_BOUND);
bb8c093b 6141 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
b481de9c
ZY		 6142
6143 /* Load bootstrap code into instruction SRAM now,
6144 * to prepare to load "initialize" uCode */
bb8c093b 6145 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY		 6146 BSM_WR_CTRL_REG_BIT_START);
6147
6148 /* Wait for load of bootstrap uCode to finish */
6149 for (i = 0; i < 100; i++) {
bb8c093b 6150 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
b481de9c
ZY		 6151 if (!(done & BSM_WR_CTRL_REG_BIT_START))
6152 break;
6153 udelay(10);
6154 }
6155 if (i < 100)
6156 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
6157 else {
6158 IWL_ERROR("BSM write did not complete!\n");
6159 return -EIO;
6160 }
6161
6162 /* Enable future boot loads whenever power management unit triggers it
6163 * (e.g. when powering back up after power-save shutdown) */
bb8c093b 6164 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY		 6165 BSM_WR_CTRL_REG_BIT_START_EN);
6166
bb8c093b 6167 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6168
6169 return 0;
6170}
6171
bb8c093b 6172static void iwl4965_nic_start(struct iwl4965_priv *priv)
b481de9c
ZY		 6173{
6174 /* Remove all resets to allow NIC to operate */
bb8c093b 6175 iwl4965_write32(priv, CSR_RESET, 0);
b481de9c
ZY		 6176}
6177
90e759d1 6178
b481de9c 6179/**
bb8c093b 6180 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 6181 *
6182 * Copy into buffers for card to fetch via bus-mastering
6183 */
bb8c093b 6184static int iwl4965_read_ucode(struct iwl4965_priv *priv)
b481de9c 6185{
bb8c093b 6186 struct iwl4965_ucode *ucode;
90e759d1 6187 int ret;
b481de9c
ZY		 6188 const struct firmware *ucode_raw;
6189 const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
6190 u8 *src;
6191 size_t len;
6192 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
6193
6194 /* Ask kernel firmware_class module to get the boot firmware off disk.
6195 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW		 6196 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
6197 if (ret < 0) {
6198 IWL_ERROR("%s firmware file req failed: Reason %d\n",
6199 name, ret);
b481de9c
ZY		 6200 goto error;
6201 }
6202
6203 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
6204 name, ucode_raw->size);
6205
6206 /* Make sure that we got at least our header! */
6207 if (ucode_raw->size < sizeof(*ucode)) {
6208 IWL_ERROR("File size way too small!\n");
90e759d1 6209 ret = -EINVAL;
b481de9c
ZY		 6210 goto err_release;
6211 }
6212
6213 /* Data from ucode file: header followed by uCode images */
6214 ucode = (void *)ucode_raw->data;
6215
6216 ver = le32_to_cpu(ucode->ver);
6217 inst_size = le32_to_cpu(ucode->inst_size);
6218 data_size = le32_to_cpu(ucode->data_size);
6219 init_size = le32_to_cpu(ucode->init_size);
6220 init_data_size = le32_to_cpu(ucode->init_data_size);
6221 boot_size = le32_to_cpu(ucode->boot_size);
6222
6223 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
6224 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
6225 inst_size);
6226 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
6227 data_size);
6228 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
6229 init_size);
6230 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
6231 init_data_size);
6232 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
6233 boot_size);
6234
6235 /* Verify size of file vs. image size info in file's header */
6236 if (ucode_raw->size < sizeof(*ucode) +
6237 inst_size + data_size + init_size +
6238 init_data_size + boot_size) {
6239
6240 IWL_DEBUG_INFO("uCode file size %d too small\n",
6241 (int)ucode_raw->size);
90e759d1 6242 ret = -EINVAL;
b481de9c
ZY		 6243 goto err_release;
6244 }
6245
6246 /* Verify that uCode images will fit in card's SRAM */
6247 if (inst_size > IWL_MAX_INST_SIZE) {
90e759d1
TW		 6248 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
6249 inst_size);
6250 ret = -EINVAL;
b481de9c
ZY		 6251 goto err_release;
6252 }
6253
6254 if (data_size > IWL_MAX_DATA_SIZE) {
90e759d1
TW		 6255 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
6256 data_size);
6257 ret = -EINVAL;
b481de9c
ZY		 6258 goto err_release;
6259 }
6260 if (init_size > IWL_MAX_INST_SIZE) {
6261 IWL_DEBUG_INFO
90e759d1
TW		 6262 ("uCode init instr len %d too large to fit in\n",
6263 init_size);
6264 ret = -EINVAL;
b481de9c
ZY		 6265 goto err_release;
6266 }
6267 if (init_data_size > IWL_MAX_DATA_SIZE) {
6268 IWL_DEBUG_INFO
90e759d1
TW		 6269 ("uCode init data len %d too large to fit in\n",
6270 init_data_size);
6271 ret = -EINVAL;
b481de9c
ZY		 6272 goto err_release;
6273 }
6274 if (boot_size > IWL_MAX_BSM_SIZE) {
6275 IWL_DEBUG_INFO
90e759d1
TW		 6276 ("uCode boot instr len %d too large to fit in\n",
6277 boot_size);
6278 ret = -EINVAL;
b481de9c
ZY		 6279 goto err_release;
6280 }
6281
6282 /* Allocate ucode buffers for card's bus-master loading ... */
6283
6284 /* Runtime instructions and 2 copies of data:
6285 * 1) unmodified from disk
6286 * 2) backup cache for save/restore during power-downs */
6287 priv->ucode_code.len = inst_size;
98c92211 6288 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 6289
6290 priv->ucode_data.len = data_size;
98c92211 6291 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 6292
6293 priv->ucode_data_backup.len = data_size;
98c92211 6294 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY		 6295
6296 /* Initialization instructions and data */
90e759d1
TW		 6297 if (init_size && init_data_size) {
6298 priv->ucode_init.len = init_size;
98c92211 6299 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 6300
6301 priv->ucode_init_data.len = init_data_size;
98c92211 6302 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 6303
6304 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6305 goto err_pci_alloc;
6306 }
b481de9c
ZY		 6307
6308 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 6309 if (boot_size) {
6310 priv->ucode_boot.len = boot_size;
98c92211 6311 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 6312
90e759d1
TW		 6313 if (!priv->ucode_boot.v_addr)
6314 goto err_pci_alloc;
6315 }
b481de9c
ZY		 6316
6317 /* Copy images into buffers for card's bus-master reads ... */
6318
6319 /* Runtime instructions (first block of data in file) */
6320 src = &ucode->data[0];
6321 len = priv->ucode_code.len;
90e759d1 6322 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 6323 memcpy(priv->ucode_code.v_addr, src, len);
6324 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6325 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6326
6327 /* Runtime data (2nd block)
bb8c093b 6328 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY		 6329 src = &ucode->data[inst_size];
6330 len = priv->ucode_data.len;
90e759d1 6331 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 6332 memcpy(priv->ucode_data.v_addr, src, len);
6333 memcpy(priv->ucode_data_backup.v_addr, src, len);
6334
6335 /* Initialization instructions (3rd block) */
6336 if (init_size) {
6337 src = &ucode->data[inst_size + data_size];
6338 len = priv->ucode_init.len;
90e759d1
TW		 6339 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6340 len);
b481de9c
ZY		 6341 memcpy(priv->ucode_init.v_addr, src, len);
6342 }
6343
6344 /* Initialization data (4th block) */
6345 if (init_data_size) {
6346 src = &ucode->data[inst_size + data_size + init_size];
6347 len = priv->ucode_init_data.len;
90e759d1
TW		 6348 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6349 len);
b481de9c
ZY		 6350 memcpy(priv->ucode_init_data.v_addr, src, len);
6351 }
6352
6353 /* Bootstrap instructions (5th block) */
6354 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6355 len = priv->ucode_boot.len;
90e759d1 6356 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 6357 memcpy(priv->ucode_boot.v_addr, src, len);
6358
6359 /* We have our copies now, allow OS release its copies */
6360 release_firmware(ucode_raw);
6361 return 0;
6362
6363 err_pci_alloc:
6364 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 6365 ret = -ENOMEM;
bb8c093b 6366 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 6367
6368 err_release:
6369 release_firmware(ucode_raw);
6370
6371 error:
90e759d1 6372 return ret;
b481de9c
ZY		 6373}
6374
6375
6376/**
bb8c093b 6377 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY		 6378 *
6379 * Tell initialization uCode where to find runtime uCode.
6380 *
6381 * BSM registers initially contain pointers to initialization uCode.
6382 * We need to replace them to load runtime uCode inst and data,
6383 * and to save runtime data when powering down.
6384 */
bb8c093b 6385static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
b481de9c
ZY		 6386{
6387 dma_addr_t pinst;
6388 dma_addr_t pdata;
6389 int rc = 0;
6390 unsigned long flags;
6391
6392 /* bits 35:4 for 4965 */
6393 pinst = priv->ucode_code.p_addr >> 4;
6394 pdata = priv->ucode_data_backup.p_addr >> 4;
6395
6396 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 6397 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 6398 if (rc) {
6399 spin_unlock_irqrestore(&priv->lock, flags);
6400 return rc;
6401 }
6402
6403 /* Tell bootstrap uCode where to find image to load */
bb8c093b
CH		 6404 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6405 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6406 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY		 6407 priv->ucode_data.len);
6408
6409 /* Inst bytecount must be last to set up, bit 31 signals uCode
6410 * that all new ptr/size info is in place */
bb8c093b 6411 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY		 6412 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6413
bb8c093b 6414 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6415
6416 spin_unlock_irqrestore(&priv->lock, flags);
6417
6418 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6419
6420 return rc;
6421}
6422
6423/**
bb8c093b 6424 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY		 6425 *
6426 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6427 *
6428 * The 4965 "initialize" ALIVE reply contains calibration data for:
6429 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6430 * (3945 does not contain this data).
6431 *
6432 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6433*/
bb8c093b 6434static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
b481de9c
ZY		 6435{
6436 /* Check alive response for "valid" sign from uCode */
6437 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6438 /* We had an error bringing up the hardware, so take it
6439 * all the way back down so we can try again */
6440 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6441 goto restart;
6442 }
6443
6444 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6445 * This is a paranoid check, because we would not have gotten the
6446 * "initialize" alive if code weren't properly loaded. */
bb8c093b 6447 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 6448 /* Runtime instruction load was bad;
6449 * take it all the way back down so we can try again */
6450 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6451 goto restart;
6452 }
6453
6454 /* Calculate temperature */
6455 priv->temperature = iwl4965_get_temperature(priv);
6456
6457 /* Send pointers to protocol/runtime uCode image ... init code will
6458 * load and launch runtime uCode, which will send us another "Alive"
6459 * notification. */
6460 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 6461 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY		 6462 /* Runtime instruction load won't happen;
6463 * take it all the way back down so we can try again */
6464 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6465 goto restart;
6466 }
6467 return;
6468
6469 restart:
6470 queue_work(priv->workqueue, &priv->restart);
6471}
6472
6473
6474/**
bb8c093b 6475 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 6476 * from protocol/runtime uCode (initialization uCode's
bb8c093b 6477 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 6478 */
bb8c093b 6479static void iwl4965_alive_start(struct iwl4965_priv *priv)
b481de9c
ZY		 6480{
6481 int rc = 0;
6482
6483 IWL_DEBUG_INFO("Runtime Alive received.\n");
6484
6485 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6486 /* We had an error bringing up the hardware, so take it
6487 * all the way back down so we can try again */
6488 IWL_DEBUG_INFO("Alive failed.\n");
6489 goto restart;
6490 }
6491
6492 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6493 * This is a paranoid check, because we would not have gotten the
6494 * "runtime" alive if code weren't properly loaded. */
bb8c093b 6495 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 6496 /* Runtime instruction load was bad;
6497 * take it all the way back down so we can try again */
6498 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6499 goto restart;
6500 }
6501
bb8c093b 6502 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6503
6504 rc = iwl4965_alive_notify(priv);
6505 if (rc) {
6506 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6507 rc);
6508 goto restart;
6509 }
6510
9fbab516 6511 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY		 6512 set_bit(STATUS_ALIVE, &priv->status);
6513
6514 /* Clear out the uCode error bit if it is set */
6515 clear_bit(STATUS_FW_ERROR, &priv->status);
6516
bb8c093b 6517 if (iwl4965_is_rfkill(priv))
b481de9c
ZY		 6518 return;
6519
5a66926a 6520 ieee80211_start_queues(priv->hw);
b481de9c
ZY		 6521
6522 priv->active_rate = priv->rates_mask;
6523 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6524
bb8c093b 6525 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
b481de9c 6526
bb8c093b
CH		 6527 if (iwl4965_is_associated(priv)) {
6528 struct iwl4965_rxon_cmd *active_rxon =
6529 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY		 6530
6531 memcpy(&priv->staging_rxon, &priv->active_rxon,
6532 sizeof(priv->staging_rxon));
6533 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6534 } else {
6535 /* Initialize our rx_config data */
bb8c093b 6536 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 6537 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6538 }
6539
9fbab516 6540 /* Configure Bluetooth device coexistence support */
bb8c093b 6541 iwl4965_send_bt_config(priv);
b481de9c
ZY		 6542
6543 /* Configure the adapter for unassociated operation */
bb8c093b 6544 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6545
6546 /* At this point, the NIC is initialized and operational */
6547 priv->notif_missed_beacons = 0;
6548 set_bit(STATUS_READY, &priv->status);
6549
6550 iwl4965_rf_kill_ct_config(priv);
5a66926a 6551
b481de9c 6552 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5a66926a 6553 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 6554
6555 if (priv->error_recovering)
bb8c093b 6556 iwl4965_error_recovery(priv);
b481de9c
ZY		 6557
6558 return;
6559
6560 restart:
6561 queue_work(priv->workqueue, &priv->restart);
6562}
6563
bb8c093b 6564static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
b481de9c 6565
bb8c093b 6566static void __iwl4965_down(struct iwl4965_priv *priv)
b481de9c
ZY		 6567{
6568 unsigned long flags;
6569 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6570 struct ieee80211_conf *conf = NULL;
6571
6572 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6573
6574 conf = ieee80211_get_hw_conf(priv->hw);
6575
6576 if (!exit_pending)
6577 set_bit(STATUS_EXIT_PENDING, &priv->status);
6578
bb8c093b 6579 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6580
6581 /* Unblock any waiting calls */
6582 wake_up_interruptible_all(&priv->wait_command_queue);
6583
b481de9c
ZY		 6584 /* Wipe out the EXIT_PENDING status bit if we are not actually
6585 * exiting the module */
6586 if (!exit_pending)
6587 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6588
6589 /* stop and reset the on-board processor */
bb8c093b 6590 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 6591
6592 /* tell the device to stop sending interrupts */
bb8c093b 6593 iwl4965_disable_interrupts(priv);
b481de9c
ZY		 6594
6595 if (priv->mac80211_registered)
6596 ieee80211_stop_queues(priv->hw);
6597
bb8c093b 6598 /* If we have not previously called iwl4965_init() then
b481de9c 6599 * clear all bits but the RF Kill and SUSPEND bits and return */
bb8c093b 6600 if (!iwl4965_is_init(priv)) {
b481de9c
ZY		 6601 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6602 STATUS_RF_KILL_HW |
6603 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6604 STATUS_RF_KILL_SW |
9788864e
RC		 6605 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6606 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 6607 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6608 STATUS_IN_SUSPEND;
6609 goto exit;
6610 }
6611
6612 /* ...otherwise clear out all the status bits but the RF Kill and
6613 * SUSPEND bits and continue taking the NIC down. */
6614 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6615 STATUS_RF_KILL_HW |
6616 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6617 STATUS_RF_KILL_SW |
9788864e
RC		 6618 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6619 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 6620 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6621 STATUS_IN_SUSPEND |
6622 test_bit(STATUS_FW_ERROR, &priv->status) <<
6623 STATUS_FW_ERROR;
6624
6625 spin_lock_irqsave(&priv->lock, flags);
9fbab516
BC		 6626 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6627 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 6628 spin_unlock_irqrestore(&priv->lock, flags);
6629
bb8c093b
CH		 6630 iwl4965_hw_txq_ctx_stop(priv);
6631 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY		 6632
6633 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH		 6634 if (!iwl4965_grab_nic_access(priv)) {
6635 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 6636 APMG_CLK_VAL_DMA_CLK_RQT);
bb8c093b 6637 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6638 }
6639 spin_unlock_irqrestore(&priv->lock, flags);
6640
6641 udelay(5);
6642
bb8c093b
CH		 6643 iwl4965_hw_nic_stop_master(priv);
6644 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6645 iwl4965_hw_nic_reset(priv);
b481de9c
ZY		 6646
6647 exit:
bb8c093b 6648 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 6649
6650 if (priv->ibss_beacon)
6651 dev_kfree_skb(priv->ibss_beacon);
6652 priv->ibss_beacon = NULL;
6653
6654 /* clear out any free frames */
bb8c093b 6655 iwl4965_clear_free_frames(priv);
b481de9c
ZY		 6656}
6657
bb8c093b 6658static void iwl4965_down(struct iwl4965_priv *priv)
b481de9c
ZY		 6659{
6660 mutex_lock(&priv->mutex);
bb8c093b 6661 __iwl4965_down(priv);
b481de9c 6662 mutex_unlock(&priv->mutex);
b24d22b1 6663
bb8c093b 6664 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY		 6665}
6666
6667#define MAX_HW_RESTARTS 5
6668
bb8c093b 6669static int __iwl4965_up(struct iwl4965_priv *priv)
b481de9c
ZY		 6670{
6671 int rc, i;
b481de9c
ZY		 6672
6673 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6674 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6675 return -EIO;
6676 }
6677
6678 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6679 IWL_WARNING("Radio disabled by SW RF kill (module "
6680 "parameter)\n");
e655b9f0
ZY		 6681 return -ENODEV;
6682 }
6683
e903fbd4
RC		 6684 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6685 IWL_ERROR("ucode not available for device bringup\n");
6686 return -EIO;
6687 }
6688
e655b9f0
ZY		 6689 /* If platform's RF_KILL switch is NOT set to KILL */
6690 if (iwl4965_read32(priv, CSR_GP_CNTRL) &
6691 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6692 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6693 else {
6694 set_bit(STATUS_RF_KILL_HW, &priv->status);
6695 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6696 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6697 return -ENODEV;
6698 }
b481de9c
ZY		 6699 }
6700
bb8c093b 6701 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 6702
bb8c093b 6703 rc = iwl4965_hw_nic_init(priv);
b481de9c
ZY		 6704 if (rc) {
6705 IWL_ERROR("Unable to int nic\n");
6706 return rc;
6707 }
6708
6709 /* make sure rfkill handshake bits are cleared */
bb8c093b
CH		 6710 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6711 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 6712 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6713
6714 /* clear (again), then enable host interrupts */
bb8c093b
CH		 6715 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6716 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 6717
6718 /* really make sure rfkill handshake bits are cleared */
bb8c093b
CH		 6719 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6720 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 6721
6722 /* Copy original ucode data image from disk into backup cache.
6723 * This will be used to initialize the on-board processor's
6724 * data SRAM for a clean start when the runtime program first loads. */
6725 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 6726 priv->ucode_data.len);
b481de9c 6727
e655b9f0
ZY		 6728 /* We return success when we resume from suspend and rf_kill is on. */
6729 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
b481de9c 6730 return 0;
b481de9c
ZY		 6731
6732 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6733
bb8c093b 6734 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6735
6736 /* load bootstrap state machine,
6737 * load bootstrap program into processor's memory,
6738 * prepare to load the "initialize" uCode */
bb8c093b 6739 rc = iwl4965_load_bsm(priv);
b481de9c
ZY		 6740
6741 if (rc) {
6742 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6743 continue;
6744 }
6745
6746 /* start card; "initialize" will load runtime ucode */
bb8c093b 6747 iwl4965_nic_start(priv);
b481de9c 6748
b481de9c
ZY		 6749 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6750
6751 return 0;
6752 }
6753
6754 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 6755 __iwl4965_down(priv);
b481de9c
ZY		 6756
6757 /* tried to restart and config the device for as long as our
6758 * patience could withstand */
6759 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6760 return -EIO;
6761}
6762
6763
6764/*****************************************************************************
6765 *
6766 * Workqueue callbacks
6767 *
6768 *****************************************************************************/
6769
bb8c093b 6770static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 6771{
bb8c093b
CH		 6772 struct iwl4965_priv *priv =
6773 container_of(data, struct iwl4965_priv, init_alive_start.work);
b481de9c
ZY		 6774
6775 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6776 return;
6777
6778 mutex_lock(&priv->mutex);
bb8c093b 6779 iwl4965_init_alive_start(priv);
b481de9c
ZY		 6780 mutex_unlock(&priv->mutex);
6781}
6782
bb8c093b 6783static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 6784{
bb8c093b
CH		 6785 struct iwl4965_priv *priv =
6786 container_of(data, struct iwl4965_priv, alive_start.work);
b481de9c
ZY		 6787
6788 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6789 return;
6790
6791 mutex_lock(&priv->mutex);
bb8c093b 6792 iwl4965_alive_start(priv);
b481de9c
ZY		 6793 mutex_unlock(&priv->mutex);
6794}
6795
bb8c093b 6796static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 6797{
bb8c093b 6798 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
b481de9c
ZY		 6799
6800 wake_up_interruptible(&priv->wait_command_queue);
6801
6802 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6803 return;
6804
6805 mutex_lock(&priv->mutex);
6806
bb8c093b 6807 if (!iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 6808 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6809 "HW and/or SW RF Kill no longer active, restarting "
6810 "device\n");
6811 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6812 queue_work(priv->workqueue, &priv->restart);
6813 } else {
6814
6815 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6816 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6817 "disabled by SW switch\n");
6818 else
6819 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6820 "Kill switch must be turned off for "
6821 "wireless networking to work.\n");
6822 }
6823 mutex_unlock(&priv->mutex);
6824}
6825
6826#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6827
bb8c093b 6828static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 6829{
bb8c093b
CH		 6830 struct iwl4965_priv *priv =
6831 container_of(data, struct iwl4965_priv, scan_check.work);
b481de9c
ZY		 6832
6833 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6834 return;
6835
6836 mutex_lock(&priv->mutex);
6837 if (test_bit(STATUS_SCANNING, &priv->status) ||
6838 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6839 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6840 "Scan completion watchdog resetting adapter (%dms)\n",
6841 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 6842
b481de9c 6843 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 6844 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 6845 }
6846 mutex_unlock(&priv->mutex);
6847}
6848
bb8c093b 6849static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 6850{
bb8c093b
CH		 6851 struct iwl4965_priv *priv =
6852 container_of(data, struct iwl4965_priv, request_scan);
6853 struct iwl4965_host_cmd cmd = {
b481de9c 6854 .id = REPLY_SCAN_CMD,
bb8c093b 6855 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY		 6856 .meta.flags = CMD_SIZE_HUGE,
6857 };
6858 int rc = 0;
bb8c093b 6859 struct iwl4965_scan_cmd *scan;
b481de9c 6860 struct ieee80211_conf *conf = NULL;
78330fdd 6861 u16 cmd_len;
8318d78a 6862 enum ieee80211_band band;
78330fdd 6863 u8 direct_mask;
b481de9c
ZY		 6864
6865 conf = ieee80211_get_hw_conf(priv->hw);
6866
6867 mutex_lock(&priv->mutex);
6868
bb8c093b 6869 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY		 6870 IWL_WARNING("request scan called when driver not ready.\n");
6871 goto done;
6872 }
6873
6874 /* Make sure the scan wasn't cancelled before this queued work
6875 * was given the chance to run... */
6876 if (!test_bit(STATUS_SCANNING, &priv->status))
6877 goto done;
6878
6879 /* This should never be called or scheduled if there is currently
6880 * a scan active in the hardware. */
6881 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6882 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6883 "Ignoring second request.\n");
6884 rc = -EIO;
6885 goto done;
6886 }
6887
6888 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6889 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6890 goto done;
6891 }
6892
6893 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6894 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6895 goto done;
6896 }
6897
bb8c093b 6898 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 6899 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6900 goto done;
6901 }
6902
6903 if (!test_bit(STATUS_READY, &priv->status)) {
6904 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6905 goto done;
6906 }
6907
6908 if (!priv->scan_bands) {
6909 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6910 goto done;
6911 }
6912
6913 if (!priv->scan) {
bb8c093b 6914 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY		 6915 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6916 if (!priv->scan) {
6917 rc = -ENOMEM;
6918 goto done;
6919 }
6920 }
6921 scan = priv->scan;
bb8c093b 6922 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY		 6923
6924 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6925 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6926
bb8c093b 6927 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 6928 u16 interval = 0;
6929 u32 extra;
6930 u32 suspend_time = 100;
6931 u32 scan_suspend_time = 100;
6932 unsigned long flags;
6933
6934 IWL_DEBUG_INFO("Scanning while associated...\n");
6935
6936 spin_lock_irqsave(&priv->lock, flags);
6937 interval = priv->beacon_int;
6938 spin_unlock_irqrestore(&priv->lock, flags);
6939
6940 scan->suspend_time = 0;
052c4b9f 6941 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY		 6942 if (!interval)
6943 interval = suspend_time;
6944
6945 extra = (suspend_time / interval) << 22;
6946 scan_suspend_time = (extra |
6947 ((suspend_time % interval) * 1024));
6948 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6949 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6950 scan_suspend_time, interval);
6951 }
6952
6953 /* We should add the ability for user to lock to PASSIVE ONLY */
6954 if (priv->one_direct_scan) {
6955 IWL_DEBUG_SCAN
6956 ("Kicking off one direct scan for '%s'\n",
bb8c093b 6957 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY		 6958 priv->direct_ssid_len));
6959 scan->direct_scan[0].id = WLAN_EID_SSID;
6960 scan->direct_scan[0].len = priv->direct_ssid_len;
6961 memcpy(scan->direct_scan[0].ssid,
6962 priv->direct_ssid, priv->direct_ssid_len);
6963 direct_mask = 1;
bb8c093b 6964 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
b481de9c
ZY		 6965 scan->direct_scan[0].id = WLAN_EID_SSID;
6966 scan->direct_scan[0].len = priv->essid_len;
6967 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6968 direct_mask = 1;
6969 } else
6970 direct_mask = 0;
6971
b481de9c
ZY		 6972 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6973 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6974 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6975
b481de9c
ZY		 6976
6977 switch (priv->scan_bands) {
6978 case 2:
6979 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6980 scan->tx_cmd.rate_n_flags =
bb8c093b 6981 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY		 6982 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
6983
6984 scan->good_CRC_th = 0;
8318d78a 6985 band = IEEE80211_BAND_2GHZ;
b481de9c
ZY		 6986 break;
6987
6988 case 1:
6989 scan->tx_cmd.rate_n_flags =
bb8c093b 6990 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY		 6991 RATE_MCS_ANT_B_MSK);
6992 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 6993 band = IEEE80211_BAND_5GHZ;
b481de9c
ZY		 6994 break;
6995
6996 default:
6997 IWL_WARNING("Invalid scan band count\n");
6998 goto done;
6999 }
7000
78330fdd
TW		 7001 /* We don't build a direct scan probe request; the uCode will do
7002 * that based on the direct_mask added to each channel entry */
7003 cmd_len = iwl4965_fill_probe_req(priv, band,
7004 (struct ieee80211_mgmt *)scan->data,
7005 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
7006
7007 scan->tx_cmd.len = cpu_to_le16(cmd_len);
b481de9c
ZY		 7008 /* select Rx chains */
7009
7010 /* Force use of chains B and C (0x6) for scan Rx.
7011 * Avoid A (0x1) because of its off-channel reception on A-band.
7012 * MIMO is not used here, but value is required to make uCode happy. */
7013 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
7014 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
7015 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
7016 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
7017
7018 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
7019 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
7020
7021 if (direct_mask)
7022 IWL_DEBUG_SCAN
7023 ("Initiating direct scan for %s.\n",
bb8c093b 7024 iwl4965_escape_essid(priv->essid, priv->essid_len));
b481de9c
ZY		 7025 else
7026 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
7027
7028 scan->channel_count =
bb8c093b 7029 iwl4965_get_channels_for_scan(
8318d78a 7030 priv, band, 1, /* active */
b481de9c
ZY		 7031 direct_mask,
7032 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
7033
7034 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 7035 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY		 7036 cmd.data = scan;
7037 scan->len = cpu_to_le16(cmd.len);
7038
7039 set_bit(STATUS_SCAN_HW, &priv->status);
bb8c093b 7040 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 7041 if (rc)
7042 goto done;
7043
7044 queue_delayed_work(priv->workqueue, &priv->scan_check,
7045 IWL_SCAN_CHECK_WATCHDOG);
7046
7047 mutex_unlock(&priv->mutex);
7048 return;
7049
7050 done:
01ebd063 7051 /* inform mac80211 scan aborted */
b481de9c
ZY		 7052 queue_work(priv->workqueue, &priv->scan_completed);
7053 mutex_unlock(&priv->mutex);
7054}
7055
bb8c093b 7056static void iwl4965_bg_up(struct work_struct *data)
b481de9c 7057{
bb8c093b 7058 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
b481de9c
ZY		 7059
7060 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7061 return;
7062
7063 mutex_lock(&priv->mutex);
bb8c093b 7064 __iwl4965_up(priv);
b481de9c
ZY		 7065 mutex_unlock(&priv->mutex);
7066}
7067
bb8c093b 7068static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 7069{
bb8c093b 7070 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
b481de9c
ZY		 7071
7072 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7073 return;
7074
bb8c093b 7075 iwl4965_down(priv);
b481de9c
ZY		 7076 queue_work(priv->workqueue, &priv->up);
7077}
7078
bb8c093b 7079static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 7080{
bb8c093b
CH		 7081 struct iwl4965_priv *priv =
7082 container_of(data, struct iwl4965_priv, rx_replenish);
b481de9c
ZY		 7083
7084 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7085 return;
7086
7087 mutex_lock(&priv->mutex);
bb8c093b 7088 iwl4965_rx_replenish(priv);
b481de9c
ZY		 7089 mutex_unlock(&priv->mutex);
7090}
7091
7878a5a4
MA		 7092#define IWL_DELAY_NEXT_SCAN (HZ*2)
7093
bb8c093b 7094static void iwl4965_bg_post_associate(struct work_struct *data)
b481de9c 7095{
bb8c093b 7096 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
b481de9c
ZY		 7097 post_associate.work);
7098
7099 int rc = 0;
7100 struct ieee80211_conf *conf = NULL;
0795af57 7101 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7102
7103 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7104 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
7105 return;
7106 }
7107
0795af57
JP		 7108 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
7109 priv->assoc_id,
7110 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY		 7111
7112
7113 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7114 return;
7115
7116 mutex_lock(&priv->mutex);
7117
32bfd35d 7118 if (!priv->vif || !priv->is_open) {
948c171c
MA		 7119 mutex_unlock(&priv->mutex);
7120 return;
7121 }
bb8c093b 7122 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 7123
b481de9c
ZY		 7124 conf = ieee80211_get_hw_conf(priv->hw);
7125
7126 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7127 iwl4965_commit_rxon(priv);
b481de9c 7128
bb8c093b
CH		 7129 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7130 iwl4965_setup_rxon_timing(priv);
7131 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY		 7132 sizeof(priv->rxon_timing), &priv->rxon_timing);
7133 if (rc)
7134 IWL_WARNING("REPLY_RXON_TIMING failed - "
7135 "Attempting to continue.\n");
7136
7137 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7138
c8b0e6e1 7139#ifdef CONFIG_IWL4965_HT
fd105e79
RR		 7140 if (priv->current_ht_config.is_ht)
7141 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 7142#endif /* CONFIG_IWL4965_HT*/
b481de9c
ZY		 7143 iwl4965_set_rxon_chain(priv);
7144 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7145
7146 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
7147 priv->assoc_id, priv->beacon_int);
7148
7149 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7150 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7151 else
7152 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7153
7154 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7155 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
7156 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
7157 else
7158 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7159
7160 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7161 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7162
7163 }
7164
bb8c093b 7165 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7166
7167 switch (priv->iw_mode) {
7168 case IEEE80211_IF_TYPE_STA:
bb8c093b 7169 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY		 7170 break;
7171
7172 case IEEE80211_IF_TYPE_IBSS:
7173
7174 /* clear out the station table */
bb8c093b 7175 iwl4965_clear_stations_table(priv);
b481de9c 7176
bb8c093b
CH		 7177 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7178 iwl4965_rxon_add_station(priv, priv->bssid, 0);
7179 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
7180 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 7181
7182 break;
7183
7184 default:
7185 IWL_ERROR("%s Should not be called in %d mode\n",
7186 __FUNCTION__, priv->iw_mode);
7187 break;
7188 }
7189
bb8c093b 7190 iwl4965_sequence_reset(priv);
b481de9c 7191
c8b0e6e1 7192#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 7193 /* Enable Rx differential gain and sensitivity calibrations */
7194 iwl4965_chain_noise_reset(priv);
7195 priv->start_calib = 1;
c8b0e6e1 7196#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 7197
7198 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7199 priv->assoc_station_added = 1;
7200
bb8c093b 7201 iwl4965_activate_qos(priv, 0);
292ae174 7202
7878a5a4
MA		 7203 /* we have just associated, don't start scan too early */
7204 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
b481de9c
ZY		 7205 mutex_unlock(&priv->mutex);
7206}
7207
bb8c093b 7208static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 7209{
bb8c093b 7210 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
b481de9c 7211
bb8c093b 7212 if (!iwl4965_is_ready(priv))
b481de9c
ZY		 7213 return;
7214
7215 mutex_lock(&priv->mutex);
7216
7217 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 7218 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 7219
7220 mutex_unlock(&priv->mutex);
7221}
7222
76bb77e0
ZY		 7223static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
7224
bb8c093b 7225static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 7226{
bb8c093b
CH		 7227 struct iwl4965_priv *priv =
7228 container_of(work, struct iwl4965_priv, scan_completed);
b481de9c
ZY		 7229
7230 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
7231
7232 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7233 return;
7234
a0646470
ZY		 7235 if (test_bit(STATUS_CONF_PENDING, &priv->status))
7236 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 7237
b481de9c
ZY		 7238 ieee80211_scan_completed(priv->hw);
7239
7240 /* Since setting the TXPOWER may have been deferred while
7241 * performing the scan, fire one off */
7242 mutex_lock(&priv->mutex);
bb8c093b 7243 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 7244 mutex_unlock(&priv->mutex);
7245}
7246
7247/*****************************************************************************
7248 *
7249 * mac80211 entry point functions
7250 *
7251 *****************************************************************************/
7252
5a66926a
ZY		 7253#define UCODE_READY_TIMEOUT (2 * HZ)
7254
bb8c093b 7255static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 7256{
bb8c093b 7257 struct iwl4965_priv *priv = hw->priv;
5a66926a 7258 int ret;
b481de9c
ZY		 7259
7260 IWL_DEBUG_MAC80211("enter\n");
7261
5a66926a
ZY		 7262 if (pci_enable_device(priv->pci_dev)) {
7263 IWL_ERROR("Fail to pci_enable_device\n");
7264 return -ENODEV;
7265 }
7266 pci_restore_state(priv->pci_dev);
7267 pci_enable_msi(priv->pci_dev);
7268
7269 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
7270 DRV_NAME, priv);
7271 if (ret) {
7272 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
7273 goto out_disable_msi;
7274 }
7275
b481de9c
ZY		 7276 /* we should be verifying the device is ready to be opened */
7277 mutex_lock(&priv->mutex);
7278
5a66926a
ZY		 7279 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
7280 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
7281 * ucode filename and max sizes are card-specific. */
b481de9c 7282
5a66926a
ZY		 7283 if (!priv->ucode_code.len) {
7284 ret = iwl4965_read_ucode(priv);
7285 if (ret) {
7286 IWL_ERROR("Could not read microcode: %d\n", ret);
7287 mutex_unlock(&priv->mutex);
7288 goto out_release_irq;
7289 }
7290 }
b481de9c 7291
e655b9f0 7292 ret = __iwl4965_up(priv);
5a66926a 7293
b481de9c 7294 mutex_unlock(&priv->mutex);
5a66926a 7295
e655b9f0
ZY		 7296 if (ret)
7297 goto out_release_irq;
7298
7299 IWL_DEBUG_INFO("Start UP work done.\n");
7300
7301 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
7302 return 0;
7303
5a66926a
ZY		 7304 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
7305 * mac80211 will not be run successfully. */
7306 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
7307 test_bit(STATUS_READY, &priv->status),
7308 UCODE_READY_TIMEOUT);
7309 if (!ret) {
7310 if (!test_bit(STATUS_READY, &priv->status)) {
7311 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
7312 jiffies_to_msecs(UCODE_READY_TIMEOUT));
7313 ret = -ETIMEDOUT;
7314 goto out_release_irq;
7315 }
7316 }
7317
e655b9f0 7318 priv->is_open = 1;
b481de9c
ZY		 7319 IWL_DEBUG_MAC80211("leave\n");
7320 return 0;
5a66926a
ZY		 7321
7322out_release_irq:
7323 free_irq(priv->pci_dev->irq, priv);
7324out_disable_msi:
7325 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY		 7326 pci_disable_device(priv->pci_dev);
7327 priv->is_open = 0;
7328 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 7329 return ret;
b481de9c
ZY		 7330}
7331
bb8c093b 7332static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 7333{
bb8c093b 7334 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7335
7336 IWL_DEBUG_MAC80211("enter\n");
948c171c 7337
e655b9f0
ZY		 7338 if (!priv->is_open) {
7339 IWL_DEBUG_MAC80211("leave - skip\n");
7340 return;
7341 }
7342
b481de9c 7343 priv->is_open = 0;
5a66926a
ZY		 7344
7345 if (iwl4965_is_ready_rf(priv)) {
e655b9f0
ZY		 7346 /* stop mac, cancel any scan request and clear
7347 * RXON_FILTER_ASSOC_MSK BIT
7348 */
5a66926a
ZY		 7349 mutex_lock(&priv->mutex);
7350 iwl4965_scan_cancel_timeout(priv, 100);
7351 cancel_delayed_work(&priv->post_associate);
fde3571f 7352 mutex_unlock(&priv->mutex);
fde3571f
MA		 7353 }
7354
5a66926a
ZY		 7355 iwl4965_down(priv);
7356
7357 flush_workqueue(priv->workqueue);
7358 free_irq(priv->pci_dev->irq, priv);
7359 pci_disable_msi(priv->pci_dev);
7360 pci_save_state(priv->pci_dev);
7361 pci_disable_device(priv->pci_dev);
948c171c 7362
b481de9c 7363 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7364}
7365
bb8c093b 7366static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 7367 struct ieee80211_tx_control *ctl)
7368{
bb8c093b 7369 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7370
7371 IWL_DEBUG_MAC80211("enter\n");
7372
7373 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7374 IWL_DEBUG_MAC80211("leave - monitor\n");
7375 return -1;
7376 }
7377
7378 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
8318d78a 7379 ctl->tx_rate->bitrate);
b481de9c 7380
bb8c093b 7381 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY		 7382 dev_kfree_skb_any(skb);
7383
7384 IWL_DEBUG_MAC80211("leave\n");
7385 return 0;
7386}
7387
bb8c093b 7388static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 7389 struct ieee80211_if_init_conf *conf)
7390{
bb8c093b 7391 struct iwl4965_priv *priv = hw->priv;
b481de9c 7392 unsigned long flags;
0795af57 7393 DECLARE_MAC_BUF(mac);
b481de9c 7394
32bfd35d 7395 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 7396
32bfd35d
JB		 7397 if (priv->vif) {
7398 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 7399 return -EOPNOTSUPP;
b481de9c
ZY		 7400 }
7401
7402 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 7403 priv->vif = conf->vif;
b481de9c
ZY		 7404
7405 spin_unlock_irqrestore(&priv->lock, flags);
7406
7407 mutex_lock(&priv->mutex);
864792e3
TW		 7408
7409 if (conf->mac_addr) {
7410 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7411 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7412 }
b481de9c 7413
5a66926a
ZY		 7414 if (iwl4965_is_ready(priv))
7415 iwl4965_set_mode(priv, conf->type);
7416
b481de9c
ZY		 7417 mutex_unlock(&priv->mutex);
7418
5a66926a 7419 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7420 return 0;
7421}
7422
7423/**
bb8c093b 7424 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY		 7425 *
7426 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7427 * be set inappropriately and the driver currently sets the hardware up to
7428 * use it whenever needed.
7429 */
bb8c093b 7430static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 7431{
bb8c093b
CH		 7432 struct iwl4965_priv *priv = hw->priv;
7433 const struct iwl4965_channel_info *ch_info;
b481de9c 7434 unsigned long flags;
76bb77e0 7435 int ret = 0;
b481de9c
ZY		 7436
7437 mutex_lock(&priv->mutex);
8318d78a 7438 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 7439
12342c47
ZY		 7440 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7441
bb8c093b 7442 if (!iwl4965_is_ready(priv)) {
b481de9c 7443 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 7444 ret = -EIO;
7445 goto out;
b481de9c
ZY		 7446 }
7447
bb8c093b 7448 if (unlikely(!iwl4965_param_disable_hw_scan &&
b481de9c 7449 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY		 7450 IWL_DEBUG_MAC80211("leave - scanning\n");
7451 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 7452 mutex_unlock(&priv->mutex);
a0646470 7453 return 0;
b481de9c
ZY		 7454 }
7455
7456 spin_lock_irqsave(&priv->lock, flags);
7457
8318d78a
JB		 7458 ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
7459 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 7460 if (!is_channel_valid(ch_info)) {
b481de9c
ZY		 7461 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7462 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY		 7463 ret = -EINVAL;
7464 goto out;
b481de9c
ZY		 7465 }
7466
c8b0e6e1 7467#ifdef CONFIG_IWL4965_HT
78330fdd 7468 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 7469 * from any ht related info since 2.4 does not
7470 * support ht */
78330fdd 7471 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
b481de9c
ZY		 7472#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7473 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7474#endif
7475 )
7476 priv->staging_rxon.flags = 0;
c8b0e6e1 7477#endif /* CONFIG_IWL4965_HT */
b481de9c 7478
8318d78a
JB		 7479 iwl4965_set_rxon_channel(priv, conf->channel->band,
7480 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 7481
8318d78a 7482 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
b481de9c
ZY		 7483
7484 /* The list of supported rates and rate mask can be different
8318d78a 7485 * for each band; since the band may have changed, reset
b481de9c 7486 * the rate mask to what mac80211 lists */
bb8c093b 7487 iwl4965_set_rate(priv);
b481de9c
ZY		 7488
7489 spin_unlock_irqrestore(&priv->lock, flags);
7490
7491#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7492 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 7493 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 7494 goto out;
b481de9c
ZY		 7495 }
7496#endif
7497
bb8c093b 7498 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY		 7499
7500 if (!conf->radio_enabled) {
7501 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 7502 goto out;
b481de9c
ZY		 7503 }
7504
bb8c093b 7505 if (iwl4965_is_rfkill(priv)) {
b481de9c 7506 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 7507 ret = -EIO;
7508 goto out;
b481de9c
ZY		 7509 }
7510
bb8c093b 7511 iwl4965_set_rate(priv);
b481de9c
ZY		 7512
7513 if (memcmp(&priv->active_rxon,
7514 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 7515 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7516 else
7517 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7518
7519 IWL_DEBUG_MAC80211("leave\n");
7520
a0646470
ZY		 7521out:
7522 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 7523 mutex_unlock(&priv->mutex);
76bb77e0 7524 return ret;
b481de9c
ZY		 7525}
7526
bb8c093b 7527static void iwl4965_config_ap(struct iwl4965_priv *priv)
b481de9c
ZY		 7528{
7529 int rc = 0;
7530
d986bcd1 7531 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 7532 return;
7533
7534 /* The following should be done only at AP bring up */
7535 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7536
7537 /* RXON - unassoc (to set timing command) */
7538 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7539 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7540
7541 /* RXON Timing */
bb8c093b
CH		 7542 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7543 iwl4965_setup_rxon_timing(priv);
7544 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY		 7545 sizeof(priv->rxon_timing), &priv->rxon_timing);
7546 if (rc)
7547 IWL_WARNING("REPLY_RXON_TIMING failed - "
7548 "Attempting to continue.\n");
7549
7550 iwl4965_set_rxon_chain(priv);
7551
7552 /* FIXME: what should be the assoc_id for AP? */
7553 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7554 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7555 priv->staging_rxon.flags |=
7556 RXON_FLG_SHORT_PREAMBLE_MSK;
7557 else
7558 priv->staging_rxon.flags &=
7559 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7560
7561 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7562 if (priv->assoc_capability &
7563 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7564 priv->staging_rxon.flags |=
7565 RXON_FLG_SHORT_SLOT_MSK;
7566 else
7567 priv->staging_rxon.flags &=
7568 ~RXON_FLG_SHORT_SLOT_MSK;
7569
7570 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7571 priv->staging_rxon.flags &=
7572 ~RXON_FLG_SHORT_SLOT_MSK;
7573 }
7574 /* restore RXON assoc */
7575 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 7576 iwl4965_commit_rxon(priv);
bb8c093b 7577 iwl4965_activate_qos(priv, 1);
bb8c093b 7578 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 7579 }
bb8c093b 7580 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 7581
7582 /* FIXME - we need to add code here to detect a totally new
7583 * configuration, reset the AP, unassoc, rxon timing, assoc,
7584 * clear sta table, add BCAST sta... */
7585}
7586
32bfd35d
JB		 7587static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
7588 struct ieee80211_vif *vif,
b481de9c
ZY		 7589 struct ieee80211_if_conf *conf)
7590{
bb8c093b 7591 struct iwl4965_priv *priv = hw->priv;
0795af57 7592 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7593 unsigned long flags;
7594 int rc;
7595
7596 if (conf == NULL)
7597 return -EIO;
7598
7599 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7600 (!conf->beacon || !conf->ssid_len)) {
7601 IWL_DEBUG_MAC80211
7602 ("Leaving in AP mode because HostAPD is not ready.\n");
7603 return 0;
7604 }
7605
5a66926a
ZY		 7606 if (!iwl4965_is_alive(priv))
7607 return -EAGAIN;
7608
b481de9c
ZY		 7609 mutex_lock(&priv->mutex);
7610
b481de9c 7611 if (conf->bssid)
0795af57
JP		 7612 IWL_DEBUG_MAC80211("bssid: %s\n",
7613 print_mac(mac, conf->bssid));
b481de9c 7614
4150c572
JB		 7615/*
7616 * very dubious code was here; the probe filtering flag is never set:
7617 *
b481de9c
ZY		 7618 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7619 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572
JB		 7620 */
7621 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
b481de9c
ZY		 7622 IWL_DEBUG_MAC80211("leave - scanning\n");
7623 mutex_unlock(&priv->mutex);
7624 return 0;
7625 }
7626
32bfd35d
JB		 7627 if (priv->vif != vif) {
7628 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b481de9c
ZY		 7629 mutex_unlock(&priv->mutex);
7630 return 0;
7631 }
7632
7633 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7634 if (!conf->bssid) {
7635 conf->bssid = priv->mac_addr;
7636 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP		 7637 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7638 print_mac(mac, conf->bssid));
b481de9c
ZY		 7639 }
7640 if (priv->ibss_beacon)
7641 dev_kfree_skb(priv->ibss_beacon);
7642
7643 priv->ibss_beacon = conf->beacon;
7644 }
7645
fde3571f
MA		 7646 if (iwl4965_is_rfkill(priv))
7647 goto done;
7648
b481de9c
ZY		 7649 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7650 !is_multicast_ether_addr(conf->bssid)) {
7651 /* If there is currently a HW scan going on in the background
7652 * then we need to cancel it else the RXON below will fail. */
bb8c093b 7653 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY		 7654 IWL_WARNING("Aborted scan still in progress "
7655 "after 100ms\n");
7656 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7657 mutex_unlock(&priv->mutex);
7658 return -EAGAIN;
7659 }
7660 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7661
7662 /* TODO: Audit driver for usage of these members and see
7663 * if mac80211 deprecates them (priv->bssid looks like it
7664 * shouldn't be there, but I haven't scanned the IBSS code
7665 * to verify) - jpk */
7666 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7667
7668 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 7669 iwl4965_config_ap(priv);
b481de9c 7670 else {
bb8c093b 7671 rc = iwl4965_commit_rxon(priv);
b481de9c 7672 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 7673 iwl4965_rxon_add_station(
b481de9c
ZY		 7674 priv, priv->active_rxon.bssid_addr, 1);
7675 }
7676
7677 } else {
bb8c093b 7678 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 7679 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7680 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7681 }
7682
fde3571f 7683 done:
b481de9c
ZY		 7684 spin_lock_irqsave(&priv->lock, flags);
7685 if (!conf->ssid_len)
7686 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7687 else
7688 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7689
7690 priv->essid_len = conf->ssid_len;
7691 spin_unlock_irqrestore(&priv->lock, flags);
7692
7693 IWL_DEBUG_MAC80211("leave\n");
7694 mutex_unlock(&priv->mutex);
7695
7696 return 0;
7697}
7698
bb8c093b 7699static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 7700 unsigned int changed_flags,
7701 unsigned int *total_flags,
7702 int mc_count, struct dev_addr_list *mc_list)
7703{
7704 /*
7705 * XXX: dummy
bb8c093b 7706 * see also iwl4965_connection_init_rx_config
4150c572
JB		 7707 */
7708 *total_flags = 0;
7709}
7710
bb8c093b 7711static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 7712 struct ieee80211_if_init_conf *conf)
7713{
bb8c093b 7714 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7715
7716 IWL_DEBUG_MAC80211("enter\n");
7717
7718 mutex_lock(&priv->mutex);
948c171c 7719
fde3571f
MA		 7720 if (iwl4965_is_ready_rf(priv)) {
7721 iwl4965_scan_cancel_timeout(priv, 100);
7722 cancel_delayed_work(&priv->post_associate);
7723 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7724 iwl4965_commit_rxon(priv);
7725 }
32bfd35d
JB		 7726 if (priv->vif == conf->vif) {
7727 priv->vif = NULL;
b481de9c
ZY		 7728 memset(priv->bssid, 0, ETH_ALEN);
7729 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7730 priv->essid_len = 0;
7731 }
7732 mutex_unlock(&priv->mutex);
7733
7734 IWL_DEBUG_MAC80211("leave\n");
7735
7736}
471b3efd
JB		 7737
7738static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
7739 struct ieee80211_vif *vif,
7740 struct ieee80211_bss_conf *bss_conf,
7741 u32 changes)
220173b0 7742{
bb8c093b 7743 struct iwl4965_priv *priv = hw->priv;
220173b0 7744
471b3efd
JB		 7745 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
7746 if (bss_conf->use_short_preamble)
220173b0
TW		 7747 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7748 else
7749 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7750 }
7751
471b3efd 7752 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
8318d78a 7753 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 7754 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7755 else
7756 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7757 }
7758
471b3efd
JB		 7759 if (changes & BSS_CHANGED_ASSOC) {
7760 /*
7761 * TODO:
7762 * do stuff instead of sniffing assoc resp
7763 */
7764 }
7765
bb8c093b
CH		 7766 if (iwl4965_is_associated(priv))
7767 iwl4965_send_rxon_assoc(priv);
220173b0 7768}
b481de9c 7769
bb8c093b 7770static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY		 7771{
7772 int rc = 0;
7773 unsigned long flags;
bb8c093b 7774 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7775
7776 IWL_DEBUG_MAC80211("enter\n");
7777
052c4b9f 7778 mutex_lock(&priv->mutex);
b481de9c
ZY		 7779 spin_lock_irqsave(&priv->lock, flags);
7780
bb8c093b 7781 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7782 rc = -EIO;
7783 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7784 goto out_unlock;
7785 }
7786
7787 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7788 rc = -EIO;
7789 IWL_ERROR("ERROR: APs don't scan\n");
7790 goto out_unlock;
7791 }
7792
7878a5a4
MA		 7793 /* we don't schedule scan within next_scan_jiffies period */
7794 if (priv->next_scan_jiffies &&
7795 time_after(priv->next_scan_jiffies, jiffies)) {
7796 rc = -EAGAIN;
7797 goto out_unlock;
7798 }
b481de9c 7799 /* if we just finished scan ask for delay */
7878a5a4
MA		 7800 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7801 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY		 7802 rc = -EAGAIN;
7803 goto out_unlock;
7804 }
7805 if (len) {
7878a5a4 7806 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 7807 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY		 7808
7809 priv->one_direct_scan = 1;
7810 priv->direct_ssid_len = (u8)
7811 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7812 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA		 7813 } else
7814 priv->one_direct_scan = 0;
b481de9c 7815
bb8c093b 7816 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY		 7817
7818 IWL_DEBUG_MAC80211("leave\n");
7819
7820out_unlock:
7821 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 7822 mutex_unlock(&priv->mutex);
b481de9c
ZY		 7823
7824 return rc;
7825}
7826
bb8c093b 7827static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY		 7828 const u8 *local_addr, const u8 *addr,
7829 struct ieee80211_key_conf *key)
7830{
bb8c093b 7831 struct iwl4965_priv *priv = hw->priv;
0795af57 7832 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7833 int rc = 0;
7834 u8 sta_id;
7835
7836 IWL_DEBUG_MAC80211("enter\n");
7837
bb8c093b 7838 if (!iwl4965_param_hwcrypto) {
b481de9c
ZY		 7839 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7840 return -EOPNOTSUPP;
7841 }
7842
7843 if (is_zero_ether_addr(addr))
7844 /* only support pairwise keys */
7845 return -EOPNOTSUPP;
7846
bb8c093b 7847 sta_id = iwl4965_hw_find_station(priv, addr);
b481de9c 7848 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 7849 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7850 print_mac(mac, addr));
b481de9c
ZY		 7851 return -EINVAL;
7852 }
7853
7854 mutex_lock(&priv->mutex);
7855
bb8c093b 7856 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7857
b481de9c
ZY		 7858 switch (cmd) {
7859 case SET_KEY:
bb8c093b 7860 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
b481de9c 7861 if (!rc) {
bb8c093b
CH		 7862 iwl4965_set_rxon_hwcrypto(priv, 1);
7863 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7864 key->hw_key_idx = sta_id;
7865 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7866 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7867 }
7868 break;
7869 case DISABLE_KEY:
bb8c093b 7870 rc = iwl4965_clear_sta_key_info(priv, sta_id);
b481de9c 7871 if (!rc) {
bb8c093b
CH		 7872 iwl4965_set_rxon_hwcrypto(priv, 0);
7873 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7874 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7875 }
7876 break;
7877 default:
7878 rc = -EINVAL;
7879 }
7880
7881 IWL_DEBUG_MAC80211("leave\n");
7882 mutex_unlock(&priv->mutex);
7883
7884 return rc;
7885}
7886
bb8c093b 7887static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY		 7888 const struct ieee80211_tx_queue_params *params)
7889{
bb8c093b 7890 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7891 unsigned long flags;
7892 int q;
b481de9c
ZY		 7893
7894 IWL_DEBUG_MAC80211("enter\n");
7895
bb8c093b 7896 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7897 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7898 return -EIO;
7899 }
7900
7901 if (queue >= AC_NUM) {
7902 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7903 return 0;
7904 }
7905
b481de9c
ZY		 7906 if (!priv->qos_data.qos_enable) {
7907 priv->qos_data.qos_active = 0;
7908 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7909 return 0;
7910 }
7911 q = AC_NUM - 1 - queue;
7912
7913 spin_lock_irqsave(&priv->lock, flags);
7914
7915 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7916 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7917 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7918 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 7919 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 7920
7921 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7922 priv->qos_data.qos_active = 1;
7923
7924 spin_unlock_irqrestore(&priv->lock, flags);
7925
7926 mutex_lock(&priv->mutex);
7927 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b
CH		 7928 iwl4965_activate_qos(priv, 1);
7929 else if (priv->assoc_id && iwl4965_is_associated(priv))
7930 iwl4965_activate_qos(priv, 0);
b481de9c
ZY		 7931
7932 mutex_unlock(&priv->mutex);
7933
b481de9c
ZY		 7934 IWL_DEBUG_MAC80211("leave\n");
7935 return 0;
7936}
7937
bb8c093b 7938static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 7939 struct ieee80211_tx_queue_stats *stats)
7940{
bb8c093b 7941 struct iwl4965_priv *priv = hw->priv;
b481de9c 7942 int i, avail;
bb8c093b
CH		 7943 struct iwl4965_tx_queue *txq;
7944 struct iwl4965_queue *q;
b481de9c
ZY		 7945 unsigned long flags;
7946
7947 IWL_DEBUG_MAC80211("enter\n");
7948
bb8c093b 7949 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7950 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7951 return -EIO;
7952 }
7953
7954 spin_lock_irqsave(&priv->lock, flags);
7955
7956 for (i = 0; i < AC_NUM; i++) {
7957 txq = &priv->txq[i];
7958 q = &txq->q;
bb8c093b 7959 avail = iwl4965_queue_space(q);
b481de9c
ZY		 7960
7961 stats->data[i].len = q->n_window - avail;
7962 stats->data[i].limit = q->n_window - q->high_mark;
7963 stats->data[i].count = q->n_window;
7964
7965 }
7966 spin_unlock_irqrestore(&priv->lock, flags);
7967
7968 IWL_DEBUG_MAC80211("leave\n");
7969
7970 return 0;
7971}
7972
bb8c093b 7973static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 7974 struct ieee80211_low_level_stats *stats)
7975{
7976 IWL_DEBUG_MAC80211("enter\n");
7977 IWL_DEBUG_MAC80211("leave\n");
7978
7979 return 0;
7980}
7981
bb8c093b 7982static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY		 7983{
7984 IWL_DEBUG_MAC80211("enter\n");
7985 IWL_DEBUG_MAC80211("leave\n");
7986
7987 return 0;
7988}
7989
bb8c093b 7990static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 7991{
bb8c093b 7992 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7993 unsigned long flags;
7994
7995 mutex_lock(&priv->mutex);
7996 IWL_DEBUG_MAC80211("enter\n");
7997
7998 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 7999#ifdef CONFIG_IWL4965_HT
b481de9c 8000 spin_lock_irqsave(&priv->lock, flags);
fd105e79 8001 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 8002 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 8003#endif /* CONFIG_IWL4965_HT */
b481de9c 8004
bb8c093b 8005 iwl4965_reset_qos(priv);
b481de9c
ZY		 8006
8007 cancel_delayed_work(&priv->post_associate);
8008
8009 spin_lock_irqsave(&priv->lock, flags);
8010 priv->assoc_id = 0;
8011 priv->assoc_capability = 0;
8012 priv->call_post_assoc_from_beacon = 0;
8013 priv->assoc_station_added = 0;
8014
8015 /* new association get rid of ibss beacon skb */
8016 if (priv->ibss_beacon)
8017 dev_kfree_skb(priv->ibss_beacon);
8018
8019 priv->ibss_beacon = NULL;
8020
8021 priv->beacon_int = priv->hw->conf.beacon_int;
8022 priv->timestamp1 = 0;
8023 priv->timestamp0 = 0;
8024 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
8025 priv->beacon_int = 0;
8026
8027 spin_unlock_irqrestore(&priv->lock, flags);
8028
fde3571f
MA		 8029 if (!iwl4965_is_ready_rf(priv)) {
8030 IWL_DEBUG_MAC80211("leave - not ready\n");
8031 mutex_unlock(&priv->mutex);
8032 return;
8033 }
8034
052c4b9f 8035 /* we are restarting association process
8036 * clear RXON_FILTER_ASSOC_MSK bit
8037 */
8038 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 8039 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 8040 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 8041 iwl4965_commit_rxon(priv);
052c4b9f 8042 }
8043
b481de9c
ZY		 8044 /* Per mac80211.h: This is only used in IBSS mode... */
8045 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 8046
b481de9c
ZY		 8047 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
8048 mutex_unlock(&priv->mutex);
8049 return;
8050 }
8051
b481de9c
ZY		 8052 priv->only_active_channel = 0;
8053
bb8c093b 8054 iwl4965_set_rate(priv);
b481de9c
ZY		 8055
8056 mutex_unlock(&priv->mutex);
8057
8058 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 8059}
8060
bb8c093b 8061static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 8062 struct ieee80211_tx_control *control)
8063{
bb8c093b 8064 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 8065 unsigned long flags;
8066
8067 mutex_lock(&priv->mutex);
8068 IWL_DEBUG_MAC80211("enter\n");
8069
bb8c093b 8070 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 8071 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8072 mutex_unlock(&priv->mutex);
8073 return -EIO;
8074 }
8075
8076 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8077 IWL_DEBUG_MAC80211("leave - not IBSS\n");
8078 mutex_unlock(&priv->mutex);
8079 return -EIO;
8080 }
8081
8082 spin_lock_irqsave(&priv->lock, flags);
8083
8084 if (priv->ibss_beacon)
8085 dev_kfree_skb(priv->ibss_beacon);
8086
8087 priv->ibss_beacon = skb;
8088
8089 priv->assoc_id = 0;
8090
8091 IWL_DEBUG_MAC80211("leave\n");
8092 spin_unlock_irqrestore(&priv->lock, flags);
8093
bb8c093b 8094 iwl4965_reset_qos(priv);
b481de9c
ZY		 8095
8096 queue_work(priv->workqueue, &priv->post_associate.work);
8097
8098 mutex_unlock(&priv->mutex);
8099
8100 return 0;
8101}
8102
c8b0e6e1 8103#ifdef CONFIG_IWL4965_HT
b481de9c 8104
fd105e79
RR		 8105static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
8106 struct iwl4965_priv *priv)
b481de9c 8107{
fd105e79
RR		 8108 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
8109 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
8110 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
b481de9c
ZY		 8111
8112 IWL_DEBUG_MAC80211("enter: \n");
8113
fd105e79
RR		 8114 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
8115 iwl_conf->is_ht = 0;
8116 return;
b481de9c
ZY		 8117 }
8118
fd105e79
RR		 8119 iwl_conf->is_ht = 1;
8120 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8121
8122 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
8123 iwl_conf->sgf |= 0x1;
8124 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
8125 iwl_conf->sgf |= 0x2;
8126
8127 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
8128 iwl_conf->max_amsdu_size =
8129 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
8130 iwl_conf->supported_chan_width =
8131 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
8132 iwl_conf->tx_mimo_ps_mode =
8133 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8134 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
8135
8136 iwl_conf->control_channel = ht_bss_conf->primary_channel;
8137 iwl_conf->extension_chan_offset =
8138 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
8139 iwl_conf->tx_chan_width =
8140 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
8141 iwl_conf->ht_protection =
8142 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
8143 iwl_conf->non_GF_STA_present =
8144 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
8145
8146 IWL_DEBUG_MAC80211("control channel %d\n",
8147 iwl_conf->control_channel);
b481de9c 8148 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 8149}
8150
bb8c093b 8151static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
fd105e79 8152 struct ieee80211_conf *conf)
b481de9c 8153{
bb8c093b 8154 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 8155
8156 IWL_DEBUG_MAC80211("enter: \n");
8157
fd105e79 8158 iwl4965_ht_info_fill(conf, priv);
b481de9c
ZY		 8159 iwl4965_set_rxon_chain(priv);
8160
8161 if (priv && priv->assoc_id &&
8162 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
8163 unsigned long flags;
8164
8165 spin_lock_irqsave(&priv->lock, flags);
8166 if (priv->beacon_int)
8167 queue_work(priv->workqueue, &priv->post_associate.work);
8168 else
8169 priv->call_post_assoc_from_beacon = 1;
8170 spin_unlock_irqrestore(&priv->lock, flags);
8171 }
8172
fd105e79
RR		 8173 IWL_DEBUG_MAC80211("leave:\n");
8174 return 0;
b481de9c
ZY		 8175}
8176
c8b0e6e1 8177#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 8178
8179/*****************************************************************************
8180 *
8181 * sysfs attributes
8182 *
8183 *****************************************************************************/
8184
c8b0e6e1 8185#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY		 8186
8187/*
8188 * The following adds a new attribute to the sysfs representation
8189 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
8190 * used for controlling the debug level.
8191 *
8192 * See the level definitions in iwl for details.
8193 */
8194
8195static ssize_t show_debug_level(struct device_driver *d, char *buf)
8196{
bb8c093b 8197 return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
b481de9c
ZY		 8198}
8199static ssize_t store_debug_level(struct device_driver *d,
8200 const char *buf, size_t count)
8201{
8202 char *p = (char *)buf;
8203 u32 val;
8204
8205 val = simple_strtoul(p, &p, 0);
8206 if (p == buf)
8207 printk(KERN_INFO DRV_NAME
8208 ": %s is not in hex or decimal form.\n", buf);
8209 else
bb8c093b 8210 iwl4965_debug_level = val;
b481de9c
ZY		 8211
8212 return strnlen(buf, count);
8213}
8214
8215static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
8216 show_debug_level, store_debug_level);
8217
c8b0e6e1 8218#endif /* CONFIG_IWL4965_DEBUG */
b481de9c
ZY		 8219
8220static ssize_t show_rf_kill(struct device *d,
8221 struct device_attribute *attr, char *buf)
8222{
8223 /*
8224 * 0 - RF kill not enabled
8225 * 1 - SW based RF kill active (sysfs)
8226 * 2 - HW based RF kill active
8227 * 3 - Both HW and SW based RF kill active
8228 */
bb8c093b 8229 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8230 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
8231 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
8232
8233 return sprintf(buf, "%i\n", val);
8234}
8235
8236static ssize_t store_rf_kill(struct device *d,
8237 struct device_attribute *attr,
8238 const char *buf, size_t count)
8239{
bb8c093b 8240 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8241
8242 mutex_lock(&priv->mutex);
bb8c093b 8243 iwl4965_radio_kill_sw(priv, buf[0] == '1');
b481de9c
ZY		 8244 mutex_unlock(&priv->mutex);
8245
8246 return count;
8247}
8248
8249static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
8250
8251static ssize_t show_temperature(struct device *d,
8252 struct device_attribute *attr, char *buf)
8253{
bb8c093b 8254 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c 8255
bb8c093b 8256 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8257 return -EAGAIN;
8258
bb8c093b 8259 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY		 8260}
8261
8262static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
8263
8264static ssize_t show_rs_window(struct device *d,
8265 struct device_attribute *attr,
8266 char *buf)
8267{
bb8c093b
CH		 8268 struct iwl4965_priv *priv = d->driver_data;
8269 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY		 8270}
8271static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8272
8273static ssize_t show_tx_power(struct device *d,
8274 struct device_attribute *attr, char *buf)
8275{
bb8c093b 8276 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8277 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8278}
8279
8280static ssize_t store_tx_power(struct device *d,
8281 struct device_attribute *attr,
8282 const char *buf, size_t count)
8283{
bb8c093b 8284 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8285 char *p = (char *)buf;
8286 u32 val;
8287
8288 val = simple_strtoul(p, &p, 10);
8289 if (p == buf)
8290 printk(KERN_INFO DRV_NAME
8291 ": %s is not in decimal form.\n", buf);
8292 else
bb8c093b 8293 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY		 8294
8295 return count;
8296}
8297
8298static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8299
8300static ssize_t show_flags(struct device *d,
8301 struct device_attribute *attr, char *buf)
8302{
bb8c093b 8303 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8304
8305 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8306}
8307
8308static ssize_t store_flags(struct device *d,
8309 struct device_attribute *attr,
8310 const char *buf, size_t count)
8311{
bb8c093b 8312 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8313 u32 flags = simple_strtoul(buf, NULL, 0);
8314
8315 mutex_lock(&priv->mutex);
8316 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8317 /* Cancel any currently running scans... */
bb8c093b 8318 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 8319 IWL_WARNING("Could not cancel scan.\n");
8320 else {
8321 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8322 flags);
8323 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 8324 iwl4965_commit_rxon(priv);
b481de9c
ZY		 8325 }
8326 }
8327 mutex_unlock(&priv->mutex);
8328
8329 return count;
8330}
8331
8332static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8333
8334static ssize_t show_filter_flags(struct device *d,
8335 struct device_attribute *attr, char *buf)
8336{
bb8c093b 8337 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8338
8339 return sprintf(buf, "0x%04X\n",
8340 le32_to_cpu(priv->active_rxon.filter_flags));
8341}
8342
8343static ssize_t store_filter_flags(struct device *d,
8344 struct device_attribute *attr,
8345 const char *buf, size_t count)
8346{
bb8c093b 8347 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8348 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8349
8350 mutex_lock(&priv->mutex);
8351 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8352 /* Cancel any currently running scans... */
bb8c093b 8353 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 8354 IWL_WARNING("Could not cancel scan.\n");
8355 else {
8356 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8357 "0x%04X\n", filter_flags);
8358 priv->staging_rxon.filter_flags =
8359 cpu_to_le32(filter_flags);
bb8c093b 8360 iwl4965_commit_rxon(priv);
b481de9c
ZY		 8361 }
8362 }
8363 mutex_unlock(&priv->mutex);
8364
8365 return count;
8366}
8367
8368static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8369 store_filter_flags);
8370
c8b0e6e1 8371#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 8372
8373static ssize_t show_measurement(struct device *d,
8374 struct device_attribute *attr, char *buf)
8375{
bb8c093b
CH		 8376 struct iwl4965_priv *priv = dev_get_drvdata(d);
8377 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY		 8378 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8379 u8 *data = (u8 *) & measure_report;
8380 unsigned long flags;
8381
8382 spin_lock_irqsave(&priv->lock, flags);
8383 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8384 spin_unlock_irqrestore(&priv->lock, flags);
8385 return 0;
8386 }
8387 memcpy(&measure_report, &priv->measure_report, size);
8388 priv->measurement_status = 0;
8389 spin_unlock_irqrestore(&priv->lock, flags);
8390
8391 while (size && (PAGE_SIZE - len)) {
8392 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8393 PAGE_SIZE - len, 1);
8394 len = strlen(buf);
8395 if (PAGE_SIZE - len)
8396 buf[len++] = '\n';
8397
8398 ofs += 16;
8399 size -= min(size, 16U);
8400 }
8401
8402 return len;
8403}
8404
8405static ssize_t store_measurement(struct device *d,
8406 struct device_attribute *attr,
8407 const char *buf, size_t count)
8408{
bb8c093b 8409 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8410 struct ieee80211_measurement_params params = {
8411 .channel = le16_to_cpu(priv->active_rxon.channel),
8412 .start_time = cpu_to_le64(priv->last_tsf),
8413 .duration = cpu_to_le16(1),
8414 };
8415 u8 type = IWL_MEASURE_BASIC;
8416 u8 buffer[32];
8417 u8 channel;
8418
8419 if (count) {
8420 char *p = buffer;
8421 strncpy(buffer, buf, min(sizeof(buffer), count));
8422 channel = simple_strtoul(p, NULL, 0);
8423 if (channel)
8424 params.channel = channel;
8425
8426 p = buffer;
8427 while (*p && *p != ' ')
8428 p++;
8429 if (*p)
8430 type = simple_strtoul(p + 1, NULL, 0);
8431 }
8432
8433 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8434 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 8435 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY		 8436
8437 return count;
8438}
8439
8440static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8441 show_measurement, store_measurement);
c8b0e6e1 8442#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY		 8443
8444static ssize_t store_retry_rate(struct device *d,
8445 struct device_attribute *attr,
8446 const char *buf, size_t count)
8447{
bb8c093b 8448 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8449
8450 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8451 if (priv->retry_rate <= 0)
8452 priv->retry_rate = 1;
8453
8454 return count;
8455}
8456
8457static ssize_t show_retry_rate(struct device *d,
8458 struct device_attribute *attr, char *buf)
8459{
bb8c093b 8460 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8461 return sprintf(buf, "%d", priv->retry_rate);
8462}
8463
8464static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8465 store_retry_rate);
8466
8467static ssize_t store_power_level(struct device *d,
8468 struct device_attribute *attr,
8469 const char *buf, size_t count)
8470{
bb8c093b 8471 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8472 int rc;
8473 int mode;
8474
8475 mode = simple_strtoul(buf, NULL, 0);
8476 mutex_lock(&priv->mutex);
8477
bb8c093b 8478 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY		 8479 rc = -EAGAIN;
8480 goto out;
8481 }
8482
8483 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8484 mode = IWL_POWER_AC;
8485 else
8486 mode |= IWL_POWER_ENABLED;
8487
8488 if (mode != priv->power_mode) {
bb8c093b 8489 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
b481de9c
ZY		 8490 if (rc) {
8491 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8492 goto out;
8493 }
8494 priv->power_mode = mode;
8495 }
8496
8497 rc = count;
8498
8499 out:
8500 mutex_unlock(&priv->mutex);
8501 return rc;
8502}
8503
8504#define MAX_WX_STRING 80
8505
8506/* Values are in microsecond */
8507static const s32 timeout_duration[] = {
8508 350000,
8509 250000,
8510 75000,
8511 37000,
8512 25000,
8513};
8514static const s32 period_duration[] = {
8515 400000,
8516 700000,
8517 1000000,
8518 1000000,
8519 1000000
8520};
8521
8522static ssize_t show_power_level(struct device *d,
8523 struct device_attribute *attr, char *buf)
8524{
bb8c093b 8525 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8526 int level = IWL_POWER_LEVEL(priv->power_mode);
8527 char *p = buf;
8528
8529 p += sprintf(p, "%d ", level);
8530 switch (level) {
8531 case IWL_POWER_MODE_CAM:
8532 case IWL_POWER_AC:
8533 p += sprintf(p, "(AC)");
8534 break;
8535 case IWL_POWER_BATTERY:
8536 p += sprintf(p, "(BATTERY)");
8537 break;
8538 default:
8539 p += sprintf(p,
8540 "(Timeout %dms, Period %dms)",
8541 timeout_duration[level - 1] / 1000,
8542 period_duration[level - 1] / 1000);
8543 }
8544
8545 if (!(priv->power_mode & IWL_POWER_ENABLED))
8546 p += sprintf(p, " OFF\n");
8547 else
8548 p += sprintf(p, " \n");
8549
8550 return (p - buf + 1);
8551
8552}
8553
8554static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8555 store_power_level);
8556
8557static ssize_t show_channels(struct device *d,
8558 struct device_attribute *attr, char *buf)
8559{
8318d78a
JB		 8560 /* all this shit doesn't belong into sysfs anyway */
8561 return 0;
b481de9c
ZY		 8562}
8563
8564static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8565
8566static ssize_t show_statistics(struct device *d,
8567 struct device_attribute *attr, char *buf)
8568{
bb8c093b
CH		 8569 struct iwl4965_priv *priv = dev_get_drvdata(d);
8570 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY		 8571 u32 len = 0, ofs = 0;
8572 u8 *data = (u8 *) & priv->statistics;
8573 int rc = 0;
8574
bb8c093b 8575 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8576 return -EAGAIN;
8577
8578 mutex_lock(&priv->mutex);
bb8c093b 8579 rc = iwl4965_send_statistics_request(priv);
b481de9c
ZY		 8580 mutex_unlock(&priv->mutex);
8581
8582 if (rc) {
8583 len = sprintf(buf,
8584 "Error sending statistics request: 0x%08X\n", rc);
8585 return len;
8586 }
8587
8588 while (size && (PAGE_SIZE - len)) {
8589 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8590 PAGE_SIZE - len, 1);
8591 len = strlen(buf);
8592 if (PAGE_SIZE - len)
8593 buf[len++] = '\n';
8594
8595 ofs += 16;
8596 size -= min(size, 16U);
8597 }
8598
8599 return len;
8600}
8601
8602static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8603
8604static ssize_t show_antenna(struct device *d,
8605 struct device_attribute *attr, char *buf)
8606{
bb8c093b 8607 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c 8608
bb8c093b 8609 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8610 return -EAGAIN;
8611
8612 return sprintf(buf, "%d\n", priv->antenna);
8613}
8614
8615static ssize_t store_antenna(struct device *d,
8616 struct device_attribute *attr,
8617 const char *buf, size_t count)
8618{
8619 int ant;
bb8c093b 8620 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8621
8622 if (count == 0)
8623 return 0;
8624
8625 if (sscanf(buf, "%1i", &ant) != 1) {
8626 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8627 return count;
8628 }
8629
8630 if ((ant >= 0) && (ant <= 2)) {
8631 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
bb8c093b 8632 priv->antenna = (enum iwl4965_antenna)ant;
b481de9c
ZY		 8633 } else
8634 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8635
8636
8637 return count;
8638}
8639
8640static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8641
8642static ssize_t show_status(struct device *d,
8643 struct device_attribute *attr, char *buf)
8644{
bb8c093b
CH		 8645 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8646 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8647 return -EAGAIN;
8648 return sprintf(buf, "0x%08x\n", (int)priv->status);
8649}
8650
8651static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8652
8653static ssize_t dump_error_log(struct device *d,
8654 struct device_attribute *attr,
8655 const char *buf, size_t count)
8656{
8657 char *p = (char *)buf;
8658
8659 if (p[0] == '1')
bb8c093b 8660 iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
b481de9c
ZY		 8661
8662 return strnlen(buf, count);
8663}
8664
8665static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8666
8667static ssize_t dump_event_log(struct device *d,
8668 struct device_attribute *attr,
8669 const char *buf, size_t count)
8670{
8671 char *p = (char *)buf;
8672
8673 if (p[0] == '1')
bb8c093b 8674 iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
b481de9c
ZY		 8675
8676 return strnlen(buf, count);
8677}
8678
8679static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8680
8681/*****************************************************************************
8682 *
8683 * driver setup and teardown
8684 *
8685 *****************************************************************************/
8686
bb8c093b 8687static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
b481de9c
ZY		 8688{
8689 priv->workqueue = create_workqueue(DRV_NAME);
8690
8691 init_waitqueue_head(&priv->wait_command_queue);
8692
bb8c093b
CH		 8693 INIT_WORK(&priv->up, iwl4965_bg_up);
8694 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8695 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8696 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
8697 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
8698 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
8699 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
8700 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
8701 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
8702 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
8703 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
8704 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
8705
8706 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY		 8707
8708 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 8709 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 8710}
8711
bb8c093b 8712static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
b481de9c 8713{
bb8c093b 8714 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 8715
3ae6a054 8716 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY		 8717 cancel_delayed_work(&priv->scan_check);
8718 cancel_delayed_work(&priv->alive_start);
8719 cancel_delayed_work(&priv->post_associate);
8720 cancel_work_sync(&priv->beacon_update);
8721}
8722
bb8c093b 8723static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY		 8724 &dev_attr_antenna.attr,
8725 &dev_attr_channels.attr,
8726 &dev_attr_dump_errors.attr,
8727 &dev_attr_dump_events.attr,
8728 &dev_attr_flags.attr,
8729 &dev_attr_filter_flags.attr,
c8b0e6e1 8730#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 8731 &dev_attr_measurement.attr,
8732#endif
8733 &dev_attr_power_level.attr,
8734 &dev_attr_retry_rate.attr,
8735 &dev_attr_rf_kill.attr,
8736 &dev_attr_rs_window.attr,
8737 &dev_attr_statistics.attr,
8738 &dev_attr_status.attr,
8739 &dev_attr_temperature.attr,
b481de9c
ZY		 8740 &dev_attr_tx_power.attr,
8741
8742 NULL
8743};
8744
bb8c093b 8745static struct attribute_group iwl4965_attribute_group = {
b481de9c 8746 .name = NULL, /* put in device directory */
bb8c093b 8747 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY		 8748};
8749
bb8c093b
CH		 8750static struct ieee80211_ops iwl4965_hw_ops = {
8751 .tx = iwl4965_mac_tx,
8752 .start = iwl4965_mac_start,
8753 .stop = iwl4965_mac_stop,
8754 .add_interface = iwl4965_mac_add_interface,
8755 .remove_interface = iwl4965_mac_remove_interface,
8756 .config = iwl4965_mac_config,
8757 .config_interface = iwl4965_mac_config_interface,
8758 .configure_filter = iwl4965_configure_filter,
8759 .set_key = iwl4965_mac_set_key,
8760 .get_stats = iwl4965_mac_get_stats,
8761 .get_tx_stats = iwl4965_mac_get_tx_stats,
8762 .conf_tx = iwl4965_mac_conf_tx,
8763 .get_tsf = iwl4965_mac_get_tsf,
8764 .reset_tsf = iwl4965_mac_reset_tsf,
8765 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 8766 .bss_info_changed = iwl4965_bss_info_changed,
c8b0e6e1 8767#ifdef CONFIG_IWL4965_HT
bb8c093b 8768 .conf_ht = iwl4965_mac_conf_ht,
9ab46173 8769 .ampdu_action = iwl4965_mac_ampdu_action,
c8b0e6e1 8770#endif /* CONFIG_IWL4965_HT */
bb8c093b 8771 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY		 8772};
8773
bb8c093b 8774static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 8775{
8776 int err = 0;
bb8c093b 8777 struct iwl4965_priv *priv;
b481de9c
ZY		 8778 struct ieee80211_hw *hw;
8779 int i;
5a66926a 8780 DECLARE_MAC_BUF(mac);
b481de9c 8781
6440adb5
CB		 8782 /* Disabling hardware scan means that mac80211 will perform scans
8783 * "the hard way", rather than using device's scan. */
bb8c093b 8784 if (iwl4965_param_disable_hw_scan) {
b481de9c 8785 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 8786 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY		 8787 }
8788
bb8c093b
CH		 8789 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8790 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
b481de9c
ZY		 8791 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8792 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8793 err = -EINVAL;
8794 goto out;
8795 }
8796
8797 /* mac80211 allocates memory for this device instance, including
8798 * space for this driver's private structure */
bb8c093b 8799 hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
b481de9c
ZY		 8800 if (hw == NULL) {
8801 IWL_ERROR("Can not allocate network device\n");
8802 err = -ENOMEM;
8803 goto out;
8804 }
8805 SET_IEEE80211_DEV(hw, &pdev->dev);
8806
f51359a8
JB		 8807 hw->rate_control_algorithm = "iwl-4965-rs";
8808
b481de9c
ZY		 8809 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8810 priv = hw->priv;
8811 priv->hw = hw;
8812
8813 priv->pci_dev = pdev;
bb8c093b 8814 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
c8b0e6e1 8815#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 8816 iwl4965_debug_level = iwl4965_param_debug;
b481de9c
ZY		 8817 atomic_set(&priv->restrict_refcnt, 0);
8818#endif
8819 priv->retry_rate = 1;
8820
8821 priv->ibss_beacon = NULL;
8822
8823 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8824 * the range of signal quality values that we'll provide.
8825 * Negative values for level/noise indicate that we'll provide dBm.
8826 * For WE, at least, non-0 values here *enable* display of values
8827 * in app (iwconfig). */
8828 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8829 hw->max_noise = -20; /* noise level, negative indicates dBm */
8830 hw->max_signal = 100; /* link quality indication (%) */
8831
8832 /* Tell mac80211 our Tx characteristics */
8833 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8834
6440adb5 8835 /* Default value; 4 EDCA QOS priorities */
b481de9c 8836 hw->queues = 4;
c8b0e6e1 8837#ifdef CONFIG_IWL4965_HT
6440adb5 8838 /* Enhanced value; more queues, to support 11n aggregation */
b481de9c 8839 hw->queues = 16;
c8b0e6e1 8840#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 8841
8842 spin_lock_init(&priv->lock);
8843 spin_lock_init(&priv->power_data.lock);
8844 spin_lock_init(&priv->sta_lock);
8845 spin_lock_init(&priv->hcmd_lock);
8846 spin_lock_init(&priv->lq_mngr.lock);
8847
8848 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8849 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8850
8851 INIT_LIST_HEAD(&priv->free_frames);
8852
8853 mutex_init(&priv->mutex);
8854 if (pci_enable_device(pdev)) {
8855 err = -ENODEV;
8856 goto out_ieee80211_free_hw;
8857 }
8858
8859 pci_set_master(pdev);
8860
6440adb5 8861 /* Clear the driver's (not device's) station table */
bb8c093b 8862 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 8863
8864 priv->data_retry_limit = -1;
8865 priv->ieee_channels = NULL;
8866 priv->ieee_rates = NULL;
8318d78a 8867 priv->band = IEEE80211_BAND_2GHZ;
b481de9c
ZY		 8868
8869 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8870 if (!err)
8871 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8872 if (err) {
8873 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8874 goto out_pci_disable_device;
8875 }
8876
8877 pci_set_drvdata(pdev, priv);
8878 err = pci_request_regions(pdev, DRV_NAME);
8879 if (err)
8880 goto out_pci_disable_device;
6440adb5 8881
b481de9c
ZY		 8882 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8883 * PCI Tx retries from interfering with C3 CPU state */
8884 pci_write_config_byte(pdev, 0x41, 0x00);
6440adb5 8885
b481de9c
ZY		 8886 priv->hw_base = pci_iomap(pdev, 0, 0);
8887 if (!priv->hw_base) {
8888 err = -ENODEV;
8889 goto out_pci_release_regions;
8890 }
8891
8892 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8893 (unsigned long long) pci_resource_len(pdev, 0));
8894 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8895
8896 /* Initialize module parameter values here */
8897
6440adb5 8898 /* Disable radio (SW RF KILL) via parameter when loading driver */
bb8c093b 8899 if (iwl4965_param_disable) {
b481de9c
ZY		 8900 set_bit(STATUS_RF_KILL_SW, &priv->status);
8901 IWL_DEBUG_INFO("Radio disabled.\n");
8902 }
8903
8904 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8905
8906 priv->ps_mode = 0;
8907 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
b481de9c
ZY		 8908 priv->valid_antenna = 0x7; /* assume all 3 connected */
8909 priv->ps_mode = IWL_MIMO_PS_NONE;
b481de9c 8910
6440adb5 8911 /* Choose which receivers/antennas to use */
b481de9c
ZY		 8912 iwl4965_set_rxon_chain(priv);
8913
8914 printk(KERN_INFO DRV_NAME
8915 ": Detected Intel Wireless WiFi Link 4965AGN\n");
8916
8917 /* Device-specific setup */
bb8c093b 8918 if (iwl4965_hw_set_hw_setting(priv)) {
b481de9c 8919 IWL_ERROR("failed to set hw settings\n");
b481de9c
ZY		 8920 goto out_iounmap;
8921 }
8922
bb8c093b 8923 if (iwl4965_param_qos_enable)
b481de9c
ZY		 8924 priv->qos_data.qos_enable = 1;
8925
bb8c093b 8926 iwl4965_reset_qos(priv);
b481de9c
ZY		 8927
8928 priv->qos_data.qos_active = 0;
8929 priv->qos_data.qos_cap.val = 0;
b481de9c 8930
8318d78a 8931 iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
bb8c093b
CH		 8932 iwl4965_setup_deferred_work(priv);
8933 iwl4965_setup_rx_handlers(priv);
b481de9c
ZY		 8934
8935 priv->rates_mask = IWL_RATES_MASK;
8936 /* If power management is turned on, default to AC mode */
8937 priv->power_mode = IWL_POWER_AC;
8938 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8939
bb8c093b 8940 iwl4965_disable_interrupts(priv);
49df2b33 8941
bb8c093b 8942 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c
ZY		 8943 if (err) {
8944 IWL_ERROR("failed to create sysfs device attributes\n");
b481de9c
ZY		 8945 goto out_release_irq;
8946 }
8947
5a66926a
ZY		 8948 /* nic init */
8949 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8950 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8951
8952 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8953 err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
8954 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8955 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8956 if (err < 0) {
8957 IWL_DEBUG_INFO("Failed to init the card\n");
8958 goto out_remove_sysfs;
8959 }
8960 /* Read the EEPROM */
8961 err = iwl4965_eeprom_init(priv);
b481de9c 8962 if (err) {
5a66926a
ZY		 8963 IWL_ERROR("Unable to init EEPROM\n");
8964 goto out_remove_sysfs;
b481de9c 8965 }
5a66926a
ZY		 8966 /* MAC Address location in EEPROM same for 3945/4965 */
8967 get_eeprom_mac(priv, priv->mac_addr);
8968 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8969 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 8970
849e0dce
RC		 8971 err = iwl4965_init_channel_map(priv);
8972 if (err) {
8973 IWL_ERROR("initializing regulatory failed: %d\n", err);
8974 goto out_remove_sysfs;
8975 }
8976
8977 err = iwl4965_init_geos(priv);
8978 if (err) {
8979 IWL_ERROR("initializing geos failed: %d\n", err);
8980 goto out_free_channel_map;
8981 }
849e0dce 8982
5a66926a
ZY		 8983 iwl4965_rate_control_register(priv->hw);
8984 err = ieee80211_register_hw(priv->hw);
8985 if (err) {
8986 IWL_ERROR("Failed to register network device (error %d)\n", err);
849e0dce 8987 goto out_free_geos;
5a66926a 8988 }
b481de9c 8989
5a66926a
ZY		 8990 priv->hw->conf.beacon_int = 100;
8991 priv->mac80211_registered = 1;
8992 pci_save_state(pdev);
8993 pci_disable_device(pdev);
b481de9c
ZY		 8994
8995 return 0;
8996
849e0dce
RC		 8997 out_free_geos:
8998 iwl4965_free_geos(priv);
8999 out_free_channel_map:
9000 iwl4965_free_channel_map(priv);
5a66926a 9001 out_remove_sysfs:
bb8c093b 9002 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c
ZY		 9003
9004 out_release_irq:
b481de9c
ZY		 9005 destroy_workqueue(priv->workqueue);
9006 priv->workqueue = NULL;
bb8c093b 9007 iwl4965_unset_hw_setting(priv);
b481de9c
ZY		 9008
9009 out_iounmap:
9010 pci_iounmap(pdev, priv->hw_base);
9011 out_pci_release_regions:
9012 pci_release_regions(pdev);
9013 out_pci_disable_device:
9014 pci_disable_device(pdev);
9015 pci_set_drvdata(pdev, NULL);
9016 out_ieee80211_free_hw:
9017 ieee80211_free_hw(priv->hw);
9018 out:
9019 return err;
9020}
9021
bb8c093b 9022static void iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 9023{
bb8c093b 9024 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY		 9025 struct list_head *p, *q;
9026 int i;
9027
9028 if (!priv)
9029 return;
9030
9031 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
9032
b481de9c 9033 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 9034
bb8c093b 9035 iwl4965_down(priv);
b481de9c
ZY		 9036
9037 /* Free MAC hash list for ADHOC */
9038 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
9039 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
9040 list_del(p);
bb8c093b 9041 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY		 9042 }
9043 }
9044
bb8c093b 9045 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 9046
bb8c093b 9047 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 9048
9049 if (priv->rxq.bd)
bb8c093b
CH		 9050 iwl4965_rx_queue_free(priv, &priv->rxq);
9051 iwl4965_hw_txq_ctx_free(priv);
b481de9c 9052
bb8c093b
CH		 9053 iwl4965_unset_hw_setting(priv);
9054 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 9055
9056 if (priv->mac80211_registered) {
9057 ieee80211_unregister_hw(priv->hw);
bb8c093b 9058 iwl4965_rate_control_unregister(priv->hw);
b481de9c
ZY		 9059 }
9060
948c171c
MA		 9061 /*netif_stop_queue(dev); */
9062 flush_workqueue(priv->workqueue);
9063
bb8c093b 9064 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY		 9065 * priv->workqueue... so we can't take down the workqueue
9066 * until now... */
9067 destroy_workqueue(priv->workqueue);
9068 priv->workqueue = NULL;
9069
b481de9c
ZY		 9070 pci_iounmap(pdev, priv->hw_base);
9071 pci_release_regions(pdev);
9072 pci_disable_device(pdev);
9073 pci_set_drvdata(pdev, NULL);
9074
849e0dce
RC		 9075 iwl4965_free_channel_map(priv);
9076 iwl4965_free_geos(priv);
b481de9c
ZY		 9077
9078 if (priv->ibss_beacon)
9079 dev_kfree_skb(priv->ibss_beacon);
9080
9081 ieee80211_free_hw(priv->hw);
9082}
9083
9084#ifdef CONFIG_PM
9085
bb8c093b 9086static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 9087{
bb8c093b 9088 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
b481de9c 9089
e655b9f0
ZY		 9090 if (priv->is_open) {
9091 set_bit(STATUS_IN_SUSPEND, &priv->status);
9092 iwl4965_mac_stop(priv->hw);
9093 priv->is_open = 1;
9094 }
b481de9c 9095
b481de9c
ZY		 9096 pci_set_power_state(pdev, PCI_D3hot);
9097
b481de9c
ZY		 9098 return 0;
9099}
9100
bb8c093b 9101static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 9102{
bb8c093b 9103 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
b481de9c 9104
b481de9c 9105 pci_set_power_state(pdev, PCI_D0);
b481de9c 9106
e655b9f0
ZY		 9107 if (priv->is_open)
9108 iwl4965_mac_start(priv->hw);
b481de9c 9109
e655b9f0 9110 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 9111 return 0;
9112}
9113
9114#endif /* CONFIG_PM */
9115
9116/*****************************************************************************
9117 *
9118 * driver and module entry point
9119 *
9120 *****************************************************************************/
9121
bb8c093b 9122static struct pci_driver iwl4965_driver = {
b481de9c 9123 .name = DRV_NAME,
bb8c093b
CH		 9124 .id_table = iwl4965_hw_card_ids,
9125 .probe = iwl4965_pci_probe,
9126 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 9127#ifdef CONFIG_PM
bb8c093b
CH		 9128 .suspend = iwl4965_pci_suspend,
9129 .resume = iwl4965_pci_resume,
b481de9c
ZY		 9130#endif
9131};
9132
bb8c093b 9133static int __init iwl4965_init(void)
b481de9c
ZY		 9134{
9135
9136 int ret;
9137 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
9138 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
bb8c093b 9139 ret = pci_register_driver(&iwl4965_driver);
b481de9c
ZY		 9140 if (ret) {
9141 IWL_ERROR("Unable to initialize PCI module\n");
9142 return ret;
9143 }
c8b0e6e1 9144#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 9145 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c
ZY		 9146 if (ret) {
9147 IWL_ERROR("Unable to create driver sysfs file\n");
bb8c093b 9148 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY		 9149 return ret;
9150 }
9151#endif
9152
9153 return ret;
9154}
9155
bb8c093b 9156static void __exit iwl4965_exit(void)
b481de9c 9157{
c8b0e6e1 9158#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 9159 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c 9160#endif
bb8c093b 9161 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY		 9162}
9163
bb8c093b 9164module_param_named(antenna, iwl4965_param_antenna, int, 0444);
b481de9c 9165MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
bb8c093b 9166module_param_named(disable, iwl4965_param_disable, int, 0444);
b481de9c 9167MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
bb8c093b 9168module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
b481de9c
ZY		 9169MODULE_PARM_DESC(hwcrypto,
9170 "using hardware crypto engine (default 0 [software])\n");
bb8c093b 9171module_param_named(debug, iwl4965_param_debug, int, 0444);
b481de9c 9172MODULE_PARM_DESC(debug, "debug output mask");
bb8c093b 9173module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
b481de9c
ZY		 9174MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
9175
bb8c093b 9176module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
b481de9c
ZY		 9177MODULE_PARM_DESC(queues_num, "number of hw queues.");
9178
9179/* QoS */
bb8c093b 9180module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
b481de9c 9181MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
9ee1ba47
RR		 9182module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
9183MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
b481de9c 9184
bb8c093b
CH		 9185module_exit(iwl4965_exit);
9186module_init(iwl4965_init);
Linux kernel - Deliverables
This page took 0.834223 seconds and 5 git commands to generate.