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iwlwifi: rename struct iwl4965_priv to struct iwl_priv
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
b481de9c
ZY		 41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
b481de9c
ZY		 44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
82b9a121 49#include "iwl-core.h"
b481de9c
ZY		 50#include "iwl-4965.h"
51#include "iwl-helpers.h"
52
c79dd5b5 53static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 54 struct iwl4965_tx_queue *txq);
416e1438 55
b481de9c
ZY		 56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
62/* module parameters */
6440adb5
CB		 63static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
64static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
9fbab516
BC		 65static int iwl4965_param_disable; /* def: enable radio */
66static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
67int iwl4965_param_hwcrypto; /* def: using software encryption */
6440adb5
CB		 68static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
69int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
9ee1ba47 70int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
b481de9c
ZY		 71
72/*
73 * module name, copyright, version, etc.
74 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
75 */
76
77#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
78
0a6857e7 79#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 80#define VD "d"
81#else
82#define VD
83#endif
84
c8b0e6e1 85#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 86#define VS "s"
87#else
88#define VS
89#endif
90
df48c323 91#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 92
b481de9c
ZY		 93
94MODULE_DESCRIPTION(DRV_DESCRIPTION);
95MODULE_VERSION(DRV_VERSION);
96MODULE_AUTHOR(DRV_COPYRIGHT);
97MODULE_LICENSE("GPL");
98
99__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
100{
101 u16 fc = le16_to_cpu(hdr->frame_control);
102 int hdr_len = ieee80211_get_hdrlen(fc);
103
104 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
105 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
106 return NULL;
107}
108
8318d78a 109static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
c79dd5b5 110 struct iwl_priv *priv, enum ieee80211_band band)
b481de9c 111{
8318d78a 112 return priv->hw->wiphy->bands[band];
b481de9c
ZY		 113}
114
bb8c093b 115static int iwl4965_is_empty_essid(const char *essid, int essid_len)
b481de9c
ZY		 116{
117 /* Single white space is for Linksys APs */
118 if (essid_len == 1 && essid[0] == ' ')
119 return 1;
120
121 /* Otherwise, if the entire essid is 0, we assume it is hidden */
122 while (essid_len) {
123 essid_len--;
124 if (essid[essid_len] != '\0')
125 return 0;
126 }
127
128 return 1;
129}
130
bb8c093b 131static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
b481de9c
ZY		 132{
133 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
134 const char *s = essid;
135 char *d = escaped;
136
bb8c093b 137 if (iwl4965_is_empty_essid(essid, essid_len)) {
b481de9c
ZY		 138 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
139 return escaped;
140 }
141
142 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
143 while (essid_len--) {
144 if (*s == '\0') {
145 *d++ = '\\';
146 *d++ = '0';
147 s++;
148 } else
149 *d++ = *s++;
150 }
151 *d = '\0';
152 return escaped;
153}
154
b481de9c
ZY		 155/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
156 * DMA services
157 *
158 * Theory of operation
159 *
6440adb5
CB		 160 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
161 * of buffer descriptors, each of which points to one or more data buffers for
162 * the device to read from or fill. Driver and device exchange status of each
163 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
164 * entries in each circular buffer, to protect against confusing empty and full
165 * queue states.
166 *
167 * The device reads or writes the data in the queues via the device's several
168 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
b481de9c
ZY		 169 *
170 * For Tx queue, there are low mark and high mark limits. If, after queuing
171 * the packet for Tx, free space become < low mark, Tx queue stopped. When
172 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
173 * Tx queue resumed.
174 *
6440adb5
CB		 175 * The 4965 operates with up to 17 queues: One receive queue, one transmit
176 * queue (#4) for sending commands to the device firmware, and 15 other
177 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
BC		 178 *
179 * See more detailed info in iwl-4965-hw.h.
b481de9c
ZY		 180 ***************************************************/
181
fe01b477 182int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 183{
fc4b6853 184 int s = q->read_ptr - q->write_ptr;
b481de9c 185
fc4b6853 186 if (q->read_ptr > q->write_ptr)
b481de9c
ZY		 187 s -= q->n_bd;
188
189 if (s <= 0)
190 s += q->n_window;
191 /* keep some reserve to not confuse empty and full situations */
192 s -= 2;
193 if (s < 0)
194 s = 0;
195 return s;
196}
197
b481de9c 198
bb8c093b 199static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 200{
fc4b6853
TW		 201 return q->write_ptr > q->read_ptr ?
202 (i >= q->read_ptr && i < q->write_ptr) :
203 !(i < q->read_ptr && i >= q->write_ptr);
b481de9c
ZY		 204}
205
bb8c093b 206static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 207{
6440adb5 208 /* This is for scan command, the big buffer at end of command array */
b481de9c 209 if (is_huge)
6440adb5 210 return q->n_window; /* must be power of 2 */
b481de9c 211
6440adb5 212 /* Otherwise, use normal size buffers */
b481de9c
ZY		 213 return index & (q->n_window - 1);
214}
215
6440adb5
CB		 216/**
217 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
218 */
c79dd5b5 219static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
b481de9c
ZY		 220 int count, int slots_num, u32 id)
221{
222 q->n_bd = count;
223 q->n_window = slots_num;
224 q->id = id;
225
c54b679d
TW		 226 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
227 * and iwl_queue_dec_wrap are broken. */
b481de9c
ZY		 228 BUG_ON(!is_power_of_2(count));
229
230 /* slots_num must be power-of-two size, otherwise
231 * get_cmd_index is broken. */
232 BUG_ON(!is_power_of_2(slots_num));
233
234 q->low_mark = q->n_window / 4;
235 if (q->low_mark < 4)
236 q->low_mark = 4;
237
238 q->high_mark = q->n_window / 8;
239 if (q->high_mark < 2)
240 q->high_mark = 2;
241
fc4b6853 242 q->write_ptr = q->read_ptr = 0;
b481de9c
ZY		 243
244 return 0;
245}
246
6440adb5
CB		 247/**
248 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
249 */
c79dd5b5 250static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
bb8c093b 251 struct iwl4965_tx_queue *txq, u32 id)
b481de9c
ZY		 252{
253 struct pci_dev *dev = priv->pci_dev;
254
6440adb5
CB		 255 /* Driver private data, only for Tx (not command) queues,
256 * not shared with device. */
b481de9c
ZY		 257 if (id != IWL_CMD_QUEUE_NUM) {
258 txq->txb = kmalloc(sizeof(txq->txb[0]) *
259 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
260 if (!txq->txb) {
01ebd063 261 IWL_ERROR("kmalloc for auxiliary BD "
b481de9c
ZY		 262 "structures failed\n");
263 goto error;
264 }
265 } else
266 txq->txb = NULL;
267
6440adb5
CB		 268 /* Circular buffer of transmit frame descriptors (TFDs),
269 * shared with device */
b481de9c
ZY		 270 txq->bd = pci_alloc_consistent(dev,
271 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
272 &txq->q.dma_addr);
273
274 if (!txq->bd) {
275 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
276 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
277 goto error;
278 }
279 txq->q.id = id;
280
281 return 0;
282
283 error:
284 if (txq->txb) {
285 kfree(txq->txb);
286 txq->txb = NULL;
287 }
288
289 return -ENOMEM;
290}
291
8b6eaea8
CB		 292/**
293 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
294 */
c79dd5b5 295int iwl4965_tx_queue_init(struct iwl_priv *priv,
bb8c093b 296 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
b481de9c
ZY		 297{
298 struct pci_dev *dev = priv->pci_dev;
299 int len;
300 int rc = 0;
301
8b6eaea8
CB		 302 /*
303 * Alloc buffer array for commands (Tx or other types of commands).
304 * For the command queue (#4), allocate command space + one big
305 * command for scan, since scan command is very huge; the system will
306 * not have two scans at the same time, so only one is needed.
bb54244b 307 * For normal Tx queues (all other queues), no super-size command
8b6eaea8
CB		 308 * space is needed.
309 */
bb8c093b 310 len = sizeof(struct iwl4965_cmd) * slots_num;
b481de9c
ZY		 311 if (txq_id == IWL_CMD_QUEUE_NUM)
312 len += IWL_MAX_SCAN_SIZE;
313 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
314 if (!txq->cmd)
315 return -ENOMEM;
316
8b6eaea8 317 /* Alloc driver data array and TFD circular buffer */
bb8c093b 318 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
b481de9c
ZY		 319 if (rc) {
320 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
321
322 return -ENOMEM;
323 }
324 txq->need_update = 0;
325
326 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
c54b679d 327 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
b481de9c 328 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
CB		 329
330 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 331 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 332
8b6eaea8 333 /* Tell device where to find queue */
bb8c093b 334 iwl4965_hw_tx_queue_init(priv, txq);
b481de9c
ZY		 335
336 return 0;
337}
338
339/**
bb8c093b 340 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
ZY		 341 * @txq: Transmit queue to deallocate.
342 *
343 * Empty queue by removing and destroying all BD's.
6440adb5
CB		 344 * Free all buffers.
345 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 346 */
c79dd5b5 347void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 348{
bb8c093b 349 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 350 struct pci_dev *dev = priv->pci_dev;
351 int len;
352
353 if (q->n_bd == 0)
354 return;
355
356 /* first, empty all BD's */
fc4b6853 357 for (; q->write_ptr != q->read_ptr;
c54b679d 358 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
bb8c093b 359 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 360
bb8c093b 361 len = sizeof(struct iwl4965_cmd) * q->n_window;
b481de9c
ZY		 362 if (q->id == IWL_CMD_QUEUE_NUM)
363 len += IWL_MAX_SCAN_SIZE;
364
6440adb5 365 /* De-alloc array of command/tx buffers */
b481de9c
ZY		 366 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
367
6440adb5 368 /* De-alloc circular buffer of TFDs */
b481de9c 369 if (txq->q.n_bd)
bb8c093b 370 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
ZY		 371 txq->q.n_bd, txq->bd, txq->q.dma_addr);
372
6440adb5 373 /* De-alloc array of per-TFD driver data */
b481de9c
ZY		 374 if (txq->txb) {
375 kfree(txq->txb);
376 txq->txb = NULL;
377 }
378
6440adb5 379 /* 0-fill queue descriptor structure */
b481de9c
ZY		 380 memset(txq, 0, sizeof(*txq));
381}
382
bb8c093b 383const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
b481de9c
ZY		 384
385/*************** STATION TABLE MANAGEMENT ****
9fbab516 386 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 387 * the functionality provided here
388 */
389
390/**************************************************************/
391
01ebd063 392#if 0 /* temporary disable till we add real remove station */
6440adb5
CB		 393/**
394 * iwl4965_remove_station - Remove driver's knowledge of station.
395 *
396 * NOTE: This does not remove station from device's station table.
397 */
c79dd5b5 398static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
b481de9c
ZY		 399{
400 int index = IWL_INVALID_STATION;
401 int i;
402 unsigned long flags;
403
404 spin_lock_irqsave(&priv->sta_lock, flags);
405
406 if (is_ap)
407 index = IWL_AP_ID;
408 else if (is_broadcast_ether_addr(addr))
409 index = priv->hw_setting.bcast_sta_id;
410 else
411 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
412 if (priv->stations[i].used &&
413 !compare_ether_addr(priv->stations[i].sta.sta.addr,
414 addr)) {
415 index = i;
416 break;
417 }
418
419 if (unlikely(index == IWL_INVALID_STATION))
420 goto out;
421
422 if (priv->stations[index].used) {
423 priv->stations[index].used = 0;
424 priv->num_stations--;
425 }
426
427 BUG_ON(priv->num_stations < 0);
428
429out:
430 spin_unlock_irqrestore(&priv->sta_lock, flags);
431 return 0;
432}
556f8db7 433#endif
b481de9c 434
6440adb5
CB		 435/**
436 * iwl4965_clear_stations_table - Clear the driver's station table
437 *
438 * NOTE: This does not clear or otherwise alter the device's station table.
439 */
c79dd5b5 440static void iwl4965_clear_stations_table(struct iwl_priv *priv)
b481de9c
ZY		 441{
442 unsigned long flags;
443
444 spin_lock_irqsave(&priv->sta_lock, flags);
445
446 priv->num_stations = 0;
447 memset(priv->stations, 0, sizeof(priv->stations));
448
449 spin_unlock_irqrestore(&priv->sta_lock, flags);
450}
451
6440adb5
CB		 452/**
453 * iwl4965_add_station_flags - Add station to tables in driver and device
454 */
c79dd5b5 455u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
67d62035 456 int is_ap, u8 flags, void *ht_data)
b481de9c
ZY		 457{
458 int i;
459 int index = IWL_INVALID_STATION;
bb8c093b 460 struct iwl4965_station_entry *station;
b481de9c 461 unsigned long flags_spin;
0795af57 462 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 463
464 spin_lock_irqsave(&priv->sta_lock, flags_spin);
465 if (is_ap)
466 index = IWL_AP_ID;
467 else if (is_broadcast_ether_addr(addr))
468 index = priv->hw_setting.bcast_sta_id;
469 else
470 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
471 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
472 addr)) {
473 index = i;
474 break;
475 }
476
477 if (!priv->stations[i].used &&
478 index == IWL_INVALID_STATION)
479 index = i;
480 }
481
482
9fbab516
BC		 483 /* These two conditions have the same outcome, but keep them separate
484 since they have different meanings */
b481de9c
ZY		 485 if (unlikely(index == IWL_INVALID_STATION)) {
486 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
487 return index;
488 }
489
490 if (priv->stations[index].used &&
491 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
492 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
493 return index;
494 }
495
496
0795af57 497 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
b481de9c
ZY		 498 station = &priv->stations[index];
499 station->used = 1;
500 priv->num_stations++;
501
6440adb5 502 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 503 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
b481de9c
ZY		 504 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
505 station->sta.mode = 0;
506 station->sta.sta.sta_id = index;
507 station->sta.station_flags = 0;
508
c8b0e6e1 509#ifdef CONFIG_IWL4965_HT
b481de9c
ZY		 510 /* BCAST station and IBSS stations do not work in HT mode */
511 if (index != priv->hw_setting.bcast_sta_id &&
512 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR		 513 iwl4965_set_ht_add_station(priv, index,
514 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 515#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 516
517 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
CB		 518
519 /* Add station to device's station table */
bb8c093b 520 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
ZY		 521 return index;
522
523}
524
525/*************** DRIVER STATUS FUNCTIONS *****/
526
c79dd5b5 527static inline int iwl4965_is_ready(struct iwl_priv *priv)
b481de9c
ZY		 528{
529 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
530 * set but EXIT_PENDING is not */
531 return test_bit(STATUS_READY, &priv->status) &&
532 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
533 !test_bit(STATUS_EXIT_PENDING, &priv->status);
534}
535
c79dd5b5 536static inline int iwl4965_is_alive(struct iwl_priv *priv)
b481de9c
ZY		 537{
538 return test_bit(STATUS_ALIVE, &priv->status);
539}
540
c79dd5b5 541static inline int iwl4965_is_init(struct iwl_priv *priv)
b481de9c
ZY		 542{
543 return test_bit(STATUS_INIT, &priv->status);
544}
545
c79dd5b5 546static inline int iwl4965_is_rfkill(struct iwl_priv *priv)
b481de9c
ZY		 547{
548 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
549 test_bit(STATUS_RF_KILL_SW, &priv->status);
550}
551
c79dd5b5 552static inline int iwl4965_is_ready_rf(struct iwl_priv *priv)
b481de9c
ZY		 553{
554
bb8c093b 555 if (iwl4965_is_rfkill(priv))
b481de9c
ZY		 556 return 0;
557
bb8c093b 558 return iwl4965_is_ready(priv);
b481de9c
ZY		 559}
560
561/*************** HOST COMMAND QUEUE FUNCTIONS *****/
562
563#define IWL_CMD(x) case x : return #x
564
565static const char *get_cmd_string(u8 cmd)
566{
567 switch (cmd) {
568 IWL_CMD(REPLY_ALIVE);
569 IWL_CMD(REPLY_ERROR);
570 IWL_CMD(REPLY_RXON);
571 IWL_CMD(REPLY_RXON_ASSOC);
572 IWL_CMD(REPLY_QOS_PARAM);
573 IWL_CMD(REPLY_RXON_TIMING);
574 IWL_CMD(REPLY_ADD_STA);
575 IWL_CMD(REPLY_REMOVE_STA);
576 IWL_CMD(REPLY_REMOVE_ALL_STA);
577 IWL_CMD(REPLY_TX);
578 IWL_CMD(REPLY_RATE_SCALE);
579 IWL_CMD(REPLY_LEDS_CMD);
580 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
581 IWL_CMD(RADAR_NOTIFICATION);
582 IWL_CMD(REPLY_QUIET_CMD);
583 IWL_CMD(REPLY_CHANNEL_SWITCH);
584 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
585 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
586 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
587 IWL_CMD(POWER_TABLE_CMD);
588 IWL_CMD(PM_SLEEP_NOTIFICATION);
589 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
590 IWL_CMD(REPLY_SCAN_CMD);
591 IWL_CMD(REPLY_SCAN_ABORT_CMD);
592 IWL_CMD(SCAN_START_NOTIFICATION);
593 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
594 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
595 IWL_CMD(BEACON_NOTIFICATION);
596 IWL_CMD(REPLY_TX_BEACON);
597 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
598 IWL_CMD(QUIET_NOTIFICATION);
599 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
600 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
601 IWL_CMD(REPLY_BT_CONFIG);
602 IWL_CMD(REPLY_STATISTICS_CMD);
603 IWL_CMD(STATISTICS_NOTIFICATION);
604 IWL_CMD(REPLY_CARD_STATE_CMD);
605 IWL_CMD(CARD_STATE_NOTIFICATION);
606 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
607 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
608 IWL_CMD(SENSITIVITY_CMD);
609 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
610 IWL_CMD(REPLY_RX_PHY_CMD);
611 IWL_CMD(REPLY_RX_MPDU_CMD);
612 IWL_CMD(REPLY_4965_RX);
613 IWL_CMD(REPLY_COMPRESSED_BA);
614 default:
615 return "UNKNOWN";
616
617 }
618}
619
620#define HOST_COMPLETE_TIMEOUT (HZ / 2)
621
622/**
bb8c093b 623 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
ZY		 624 * @priv: device private data point
625 * @cmd: a point to the ucode command structure
626 *
627 * The function returns < 0 values to indicate the operation is
628 * failed. On success, it turns the index (> 0) of command in the
629 * command queue.
630 */
c79dd5b5 631static int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c 632{
bb8c093b
CH		 633 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
634 struct iwl4965_queue *q = &txq->q;
635 struct iwl4965_tfd_frame *tfd;
b481de9c 636 u32 *control_flags;
bb8c093b 637 struct iwl4965_cmd *out_cmd;
b481de9c
ZY		 638 u32 idx;
639 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
640 dma_addr_t phys_addr;
641 int ret;
642 unsigned long flags;
643
644 /* If any of the command structures end up being larger than
645 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
646 * we will need to increase the size of the TFD entries */
647 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
648 !(cmd->meta.flags & CMD_SIZE_HUGE));
649
c342a1b9
GG		 650 if (iwl4965_is_rfkill(priv)) {
651 IWL_DEBUG_INFO("Not sending command - RF KILL");
652 return -EIO;
653 }
654
bb8c093b 655 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
ZY		 656 IWL_ERROR("No space for Tx\n");
657 return -ENOSPC;
658 }
659
660 spin_lock_irqsave(&priv->hcmd_lock, flags);
661
fc4b6853 662 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 663 memset(tfd, 0, sizeof(*tfd));
664
665 control_flags = (u32 *) tfd;
666
fc4b6853 667 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
ZY		 668 out_cmd = &txq->cmd[idx];
669
670 out_cmd->hdr.cmd = cmd->id;
671 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
672 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
673
674 /* At this point, the out_cmd now has all of the incoming cmd
675 * information */
676
677 out_cmd->hdr.flags = 0;
678 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 679 INDEX_TO_SEQ(q->write_ptr));
b481de9c
ZY		 680 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
681 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
682
683 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
bb8c093b
CH		 684 offsetof(struct iwl4965_cmd, hdr);
685 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY		 686
687 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
688 "%d bytes at %d[%d]:%d\n",
689 get_cmd_string(out_cmd->hdr.cmd),
690 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 691 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY		 692
693 txq->need_update = 1;
6440adb5
CB		 694
695 /* Set up entry in queue's byte count circular buffer */
b481de9c 696 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
6440adb5
CB		 697
698 /* Increment and update queue's write index */
c54b679d 699 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 700 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 701
702 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
703 return ret ? ret : idx;
704}
705
c79dd5b5 706static int iwl4965_send_cmd_async(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c
ZY		 707{
708 int ret;
709
710 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
711
712 /* An asynchronous command can not expect an SKB to be set. */
713 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
714
715 /* An asynchronous command MUST have a callback. */
716 BUG_ON(!cmd->meta.u.callback);
717
718 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
719 return -EBUSY;
720
bb8c093b 721 ret = iwl4965_enqueue_hcmd(priv, cmd);
b481de9c 722 if (ret < 0) {
bb8c093b 723 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
b481de9c
ZY		 724 get_cmd_string(cmd->id), ret);
725 return ret;
726 }
727 return 0;
728}
729
c79dd5b5 730static int iwl4965_send_cmd_sync(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c
ZY		 731{
732 int cmd_idx;
733 int ret;
734 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
735
736 BUG_ON(cmd->meta.flags & CMD_ASYNC);
737
738 /* A synchronous command can not have a callback set. */
739 BUG_ON(cmd->meta.u.callback != NULL);
740
741 if (atomic_xchg(&entry, 1)) {
742 IWL_ERROR("Error sending %s: Already sending a host command\n",
743 get_cmd_string(cmd->id));
744 return -EBUSY;
745 }
746
747 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
748
749 if (cmd->meta.flags & CMD_WANT_SKB)
750 cmd->meta.source = &cmd->meta;
751
bb8c093b 752 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
b481de9c
ZY		 753 if (cmd_idx < 0) {
754 ret = cmd_idx;
bb8c093b 755 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
b481de9c
ZY		 756 get_cmd_string(cmd->id), ret);
757 goto out;
758 }
759
760 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
761 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
762 HOST_COMPLETE_TIMEOUT);
763 if (!ret) {
764 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
765 IWL_ERROR("Error sending %s: time out after %dms.\n",
766 get_cmd_string(cmd->id),
767 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
768
769 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
770 ret = -ETIMEDOUT;
771 goto cancel;
772 }
773 }
774
775 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
776 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
777 get_cmd_string(cmd->id));
778 ret = -ECANCELED;
779 goto fail;
780 }
781 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
782 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
783 get_cmd_string(cmd->id));
784 ret = -EIO;
785 goto fail;
786 }
787 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
788 IWL_ERROR("Error: Response NULL in '%s'\n",
789 get_cmd_string(cmd->id));
790 ret = -EIO;
791 goto out;
792 }
793
794 ret = 0;
795 goto out;
796
797cancel:
798 if (cmd->meta.flags & CMD_WANT_SKB) {
bb8c093b 799 struct iwl4965_cmd *qcmd;
b481de9c
ZY		 800
801 /* Cancel the CMD_WANT_SKB flag for the cmd in the
802 * TX cmd queue. Otherwise in case the cmd comes
803 * in later, it will possibly set an invalid
804 * address (cmd->meta.source). */
805 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
806 qcmd->meta.flags &= ~CMD_WANT_SKB;
807 }
808fail:
809 if (cmd->meta.u.skb) {
810 dev_kfree_skb_any(cmd->meta.u.skb);
811 cmd->meta.u.skb = NULL;
812 }
813out:
814 atomic_set(&entry, 0);
815 return ret;
816}
817
c79dd5b5 818int iwl4965_send_cmd(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c 819{
b481de9c 820 if (cmd->meta.flags & CMD_ASYNC)
bb8c093b 821 return iwl4965_send_cmd_async(priv, cmd);
b481de9c 822
bb8c093b 823 return iwl4965_send_cmd_sync(priv, cmd);
b481de9c
ZY		 824}
825
c79dd5b5 826int iwl4965_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
b481de9c 827{
bb8c093b 828 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 829 .id = id,
830 .len = len,
831 .data = data,
832 };
833
bb8c093b 834 return iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 835}
836
c79dd5b5 837static int __must_check iwl4965_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
b481de9c 838{
bb8c093b 839 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 840 .id = id,
841 .len = sizeof(val),
842 .data = &val,
843 };
844
bb8c093b 845 return iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 846}
847
c79dd5b5 848int iwl4965_send_statistics_request(struct iwl_priv *priv)
b481de9c 849{
bb8c093b 850 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
b481de9c
ZY		 851}
852
853/**
bb8c093b 854 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY		 855 *
856 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC		 857 * NOTE: mutex must be held before calling this fnction
858 */
c79dd5b5 859static int iwl4965_rxon_add_station(struct iwl_priv *priv,
b481de9c
ZY		 860 const u8 *addr, int is_ap)
861{
556f8db7 862 u8 sta_id;
b481de9c 863
6440adb5 864 /* Add station to device's station table */
67d62035
RR		 865#ifdef CONFIG_IWL4965_HT
866 struct ieee80211_conf *conf = &priv->hw->conf;
867 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
868
869 if ((is_ap) &&
870 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
871 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
872 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
873 0, cur_ht_config);
874 else
875#endif /* CONFIG_IWL4965_HT */
876 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
877 0, NULL);
6440adb5
CB		 878
879 /* Set up default rate scaling table in device's station table */
b481de9c
ZY		 880 iwl4965_add_station(priv, addr, is_ap);
881
556f8db7 882 return sta_id;
b481de9c
ZY		 883}
884
885/**
bb8c093b 886 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
b481de9c
ZY		 887 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
888 * @channel: Any channel valid for the requested phymode
889
890 * In addition to setting the staging RXON, priv->phymode is also set.
891 *
892 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
893 * in the staging RXON flag structure based on the phymode
894 */
c79dd5b5 895static int iwl4965_set_rxon_channel(struct iwl_priv *priv,
8318d78a 896 enum ieee80211_band band,
9fbab516 897 u16 channel)
b481de9c 898{
8318d78a 899 if (!iwl4965_get_channel_info(priv, band, channel)) {
b481de9c 900 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
8318d78a 901 channel, band);
b481de9c
ZY		 902 return -EINVAL;
903 }
904
905 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
8318d78a 906 (priv->band == band))
b481de9c
ZY		 907 return 0;
908
909 priv->staging_rxon.channel = cpu_to_le16(channel);
8318d78a 910 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 911 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
912 else
913 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
914
8318d78a 915 priv->band = band;
b481de9c 916
8318d78a 917 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
b481de9c
ZY		 918
919 return 0;
920}
921
922/**
bb8c093b 923 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY		 924 *
925 * NOTE: This is really only useful during development and can eventually
926 * be #ifdef'd out once the driver is stable and folks aren't actively
927 * making changes
928 */
bb8c093b 929static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY		 930{
931 int error = 0;
932 int counter = 1;
933
934 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
935 error |= le32_to_cpu(rxon->flags &
936 (RXON_FLG_TGJ_NARROW_BAND_MSK |
937 RXON_FLG_RADAR_DETECT_MSK));
938 if (error)
939 IWL_WARNING("check 24G fields %d | %d\n",
940 counter++, error);
941 } else {
942 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
943 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
944 if (error)
945 IWL_WARNING("check 52 fields %d | %d\n",
946 counter++, error);
947 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
948 if (error)
949 IWL_WARNING("check 52 CCK %d | %d\n",
950 counter++, error);
951 }
952 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
953 if (error)
954 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
955
956 /* make sure basic rates 6Mbps and 1Mbps are supported */
957 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
958 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
959 if (error)
960 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
961
962 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
963 if (error)
964 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
965
966 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
967 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
968 if (error)
969 IWL_WARNING("check CCK and short slot %d | %d\n",
970 counter++, error);
971
972 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
973 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
974 if (error)
975 IWL_WARNING("check CCK & auto detect %d | %d\n",
976 counter++, error);
977
978 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
979 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
980 if (error)
981 IWL_WARNING("check TGG and auto detect %d | %d\n",
982 counter++, error);
983
984 if (error)
985 IWL_WARNING("Tuning to channel %d\n",
986 le16_to_cpu(rxon->channel));
987
988 if (error) {
bb8c093b 989 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY		 990 return -1;
991 }
992 return 0;
993}
994
995/**
9fbab516 996 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 997 * @priv: staging_rxon is compared to active_rxon
b481de9c 998 *
9fbab516
BC		 999 * If the RXON structure is changing enough to require a new tune,
1000 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1001 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 1002 */
c79dd5b5 1003static int iwl4965_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY		 1004{
1005
1006 /* These items are only settable from the full RXON command */
1007 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1008 compare_ether_addr(priv->staging_rxon.bssid_addr,
1009 priv->active_rxon.bssid_addr) ||
1010 compare_ether_addr(priv->staging_rxon.node_addr,
1011 priv->active_rxon.node_addr) ||
1012 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1013 priv->active_rxon.wlap_bssid_addr) ||
1014 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1015 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1016 (priv->staging_rxon.air_propagation !=
1017 priv->active_rxon.air_propagation) ||
1018 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1019 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1020 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1021 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1022 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1023 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1024 return 1;
1025
1026 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1027 * be updated with the RXON_ASSOC command -- however only some
1028 * flag transitions are allowed using RXON_ASSOC */
1029
1030 /* Check if we are not switching bands */
1031 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1032 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1033 return 1;
1034
1035 /* Check if we are switching association toggle */
1036 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1037 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1038 return 1;
1039
1040 return 0;
1041}
1042
c79dd5b5 1043static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
b481de9c
ZY		 1044{
1045 int rc = 0;
bb8c093b
CH		 1046 struct iwl4965_rx_packet *res = NULL;
1047 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1048 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1049 .id = REPLY_RXON_ASSOC,
1050 .len = sizeof(rxon_assoc),
1051 .meta.flags = CMD_WANT_SKB,
1052 .data = &rxon_assoc,
1053 };
bb8c093b
CH		 1054 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1055 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
b481de9c
ZY		 1056
1057 if ((rxon1->flags == rxon2->flags) &&
1058 (rxon1->filter_flags == rxon2->filter_flags) &&
1059 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1060 (rxon1->ofdm_ht_single_stream_basic_rates ==
1061 rxon2->ofdm_ht_single_stream_basic_rates) &&
1062 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1063 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1064 (rxon1->rx_chain == rxon2->rx_chain) &&
1065 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1066 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1067 return 0;
1068 }
1069
1070 rxon_assoc.flags = priv->staging_rxon.flags;
1071 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1072 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1073 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1074 rxon_assoc.reserved = 0;
1075 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1076 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1077 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1078 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1079 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1080
bb8c093b 1081 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 1082 if (rc)
1083 return rc;
1084
bb8c093b 1085 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1086 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1087 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1088 rc = -EIO;
1089 }
1090
1091 priv->alloc_rxb_skb--;
1092 dev_kfree_skb_any(cmd.meta.u.skb);
1093
1094 return rc;
1095}
1096
1097/**
bb8c093b 1098 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 1099 *
01ebd063 1100 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 1101 * the active_rxon structure is updated with the new data. This
1102 * function correctly transitions out of the RXON_ASSOC_MSK state if
1103 * a HW tune is required based on the RXON structure changes.
1104 */
c79dd5b5 1105static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 1106{
1107 /* cast away the const for active_rxon in this function */
bb8c093b 1108 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 1109 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 1110 int rc = 0;
1111
bb8c093b 1112 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 1113 return -1;
1114
1115 /* always get timestamp with Rx frame */
1116 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1117
bb8c093b 1118 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY		 1119 if (rc) {
1120 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1121 return -EINVAL;
1122 }
1123
1124 /* If we don't need to send a full RXON, we can use
bb8c093b 1125 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 1126 * and other flags for the current radio configuration. */
bb8c093b
CH		 1127 if (!iwl4965_full_rxon_required(priv)) {
1128 rc = iwl4965_send_rxon_assoc(priv);
b481de9c
ZY		 1129 if (rc) {
1130 IWL_ERROR("Error setting RXON_ASSOC "
1131 "configuration (%d).\n", rc);
1132 return rc;
1133 }
1134
1135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1136
1137 return 0;
1138 }
1139
1140 /* station table will be cleared */
1141 priv->assoc_station_added = 0;
1142
c8b0e6e1 1143#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 1144 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1145 if (!priv->error_recovering)
1146 priv->start_calib = 0;
1147
1148 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 1149#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 1150
1151 /* If we are currently associated and the new config requires
1152 * an RXON_ASSOC and the new config wants the associated mask enabled,
1153 * we must clear the associated from the active configuration
1154 * before we apply the new config */
bb8c093b 1155 if (iwl4965_is_associated(priv) &&
b481de9c
ZY		 1156 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1157 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1158 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1159
bb8c093b
CH		 1160 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1161 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY		 1162 &priv->active_rxon);
1163
1164 /* If the mask clearing failed then we set
1165 * active_rxon back to what it was previously */
1166 if (rc) {
1167 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1168 IWL_ERROR("Error clearing ASSOC_MSK on current "
1169 "configuration (%d).\n", rc);
1170 return rc;
1171 }
b481de9c
ZY		 1172 }
1173
1174 IWL_DEBUG_INFO("Sending RXON\n"
1175 "* with%s RXON_FILTER_ASSOC_MSK\n"
1176 "* channel = %d\n"
0795af57 1177 "* bssid = %s\n",
b481de9c
ZY		 1178 ((priv->staging_rxon.filter_flags &
1179 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1180 le16_to_cpu(priv->staging_rxon.channel),
0795af57 1181 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c
ZY		 1182
1183 /* Apply the new configuration */
bb8c093b
CH		 1184 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1185 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY		 1186 if (rc) {
1187 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1188 return rc;
1189 }
1190
bb8c093b 1191 iwl4965_clear_stations_table(priv);
556f8db7 1192
c8b0e6e1 1193#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 1194 if (!priv->error_recovering)
1195 priv->start_calib = 0;
1196
1197 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1198 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 1199#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 1200
1201 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1202
1203 /* If we issue a new RXON command which required a tune then we must
1204 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 1205 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 1206 if (rc) {
1207 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1208 return rc;
1209 }
1210
1211 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 1212 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY		 1213 IWL_INVALID_STATION) {
1214 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1215 return -EIO;
1216 }
1217
1218 /* If we have set the ASSOC_MSK and we are in BSS mode then
1219 * add the IWL_AP_ID to the station rate table */
bb8c093b 1220 if (iwl4965_is_associated(priv) &&
b481de9c 1221 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 1222 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY		 1223 == IWL_INVALID_STATION) {
1224 IWL_ERROR("Error adding AP address for transmit.\n");
1225 return -EIO;
1226 }
1227 priv->assoc_station_added = 1;
1228 }
1229
1230 return 0;
1231}
1232
c79dd5b5 1233static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 1234{
bb8c093b 1235 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY		 1236 .flags = 3,
1237 .lead_time = 0xAA,
1238 .max_kill = 1,
1239 .kill_ack_mask = 0,
1240 .kill_cts_mask = 0,
1241 };
1242
bb8c093b
CH		 1243 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1244 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY		 1245}
1246
c79dd5b5 1247static int iwl4965_send_scan_abort(struct iwl_priv *priv)
b481de9c
ZY		 1248{
1249 int rc = 0;
bb8c093b
CH		 1250 struct iwl4965_rx_packet *res;
1251 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1252 .id = REPLY_SCAN_ABORT_CMD,
1253 .meta.flags = CMD_WANT_SKB,
1254 };
1255
1256 /* If there isn't a scan actively going on in the hardware
1257 * then we are in between scan bands and not actually
1258 * actively scanning, so don't send the abort command */
1259 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1260 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1261 return 0;
1262 }
1263
bb8c093b 1264 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 1265 if (rc) {
1266 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1267 return rc;
1268 }
1269
bb8c093b 1270 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1271 if (res->u.status != CAN_ABORT_STATUS) {
1272 /* The scan abort will return 1 for success or
1273 * 2 for "failure". A failure condition can be
1274 * due to simply not being in an active scan which
1275 * can occur if we send the scan abort before we
1276 * the microcode has notified us that a scan is
1277 * completed. */
1278 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1279 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1280 clear_bit(STATUS_SCAN_HW, &priv->status);
1281 }
1282
1283 dev_kfree_skb_any(cmd.meta.u.skb);
1284
1285 return rc;
1286}
1287
c79dd5b5 1288static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
bb8c093b 1289 struct iwl4965_cmd *cmd,
b481de9c
ZY		 1290 struct sk_buff *skb)
1291{
1292 return 1;
1293}
1294
1295/*
1296 * CARD_STATE_CMD
1297 *
9fbab516 1298 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY		 1299 *
1300 * When in the 'enable' state the card operates as normal.
1301 * When in the 'disable' state, the card enters into a low power mode.
1302 * When in the 'halt' state, the card is shut down and must be fully
1303 * restarted to come back on.
1304 */
c79dd5b5 1305static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
b481de9c 1306{
bb8c093b 1307 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1308 .id = REPLY_CARD_STATE_CMD,
1309 .len = sizeof(u32),
1310 .data = &flags,
1311 .meta.flags = meta_flag,
1312 };
1313
1314 if (meta_flag & CMD_ASYNC)
bb8c093b 1315 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
b481de9c 1316
bb8c093b 1317 return iwl4965_send_cmd(priv, &cmd);
b481de9c
ZY		 1318}
1319
c79dd5b5 1320static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
bb8c093b 1321 struct iwl4965_cmd *cmd, struct sk_buff *skb)
b481de9c 1322{
bb8c093b 1323 struct iwl4965_rx_packet *res = NULL;
b481de9c
ZY		 1324
1325 if (!skb) {
1326 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1327 return 1;
1328 }
1329
bb8c093b 1330 res = (struct iwl4965_rx_packet *)skb->data;
b481de9c
ZY		 1331 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1332 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1333 res->hdr.flags);
1334 return 1;
1335 }
1336
1337 switch (res->u.add_sta.status) {
1338 case ADD_STA_SUCCESS_MSK:
1339 break;
1340 default:
1341 break;
1342 }
1343
1344 /* We didn't cache the SKB; let the caller free it */
1345 return 1;
1346}
1347
c79dd5b5 1348int iwl4965_send_add_station(struct iwl_priv *priv,
bb8c093b 1349 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 1350{
bb8c093b 1351 struct iwl4965_rx_packet *res = NULL;
b481de9c 1352 int rc = 0;
bb8c093b 1353 struct iwl4965_host_cmd cmd = {
b481de9c 1354 .id = REPLY_ADD_STA,
bb8c093b 1355 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY		 1356 .meta.flags = flags,
1357 .data = sta,
1358 };
1359
1360 if (flags & CMD_ASYNC)
bb8c093b 1361 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
b481de9c
ZY		 1362 else
1363 cmd.meta.flags |= CMD_WANT_SKB;
1364
bb8c093b 1365 rc = iwl4965_send_cmd(priv, &cmd);
b481de9c
ZY		 1366
1367 if (rc || (flags & CMD_ASYNC))
1368 return rc;
1369
bb8c093b 1370 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1371 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1372 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1373 res->hdr.flags);
1374 rc = -EIO;
1375 }
1376
1377 if (rc == 0) {
1378 switch (res->u.add_sta.status) {
1379 case ADD_STA_SUCCESS_MSK:
1380 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1381 break;
1382 default:
1383 rc = -EIO;
1384 IWL_WARNING("REPLY_ADD_STA failed\n");
1385 break;
1386 }
1387 }
1388
1389 priv->alloc_rxb_skb--;
1390 dev_kfree_skb_any(cmd.meta.u.skb);
1391
1392 return rc;
1393}
1394
c79dd5b5 1395static int iwl4965_update_sta_key_info(struct iwl_priv *priv,
b481de9c
ZY		 1396 struct ieee80211_key_conf *keyconf,
1397 u8 sta_id)
1398{
1399 unsigned long flags;
1400 __le16 key_flags = 0;
1401
1402 switch (keyconf->alg) {
1403 case ALG_CCMP:
1404 key_flags |= STA_KEY_FLG_CCMP;
1405 key_flags |= cpu_to_le16(
1406 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1407 key_flags &= ~STA_KEY_FLG_INVALID;
1408 break;
1409 case ALG_TKIP:
1410 case ALG_WEP:
b481de9c
ZY		 1411 default:
1412 return -EINVAL;
1413 }
1414 spin_lock_irqsave(&priv->sta_lock, flags);
1415 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1416 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1417 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1418 keyconf->keylen);
1419
1420 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1421 keyconf->keylen);
1422 priv->stations[sta_id].sta.key.key_flags = key_flags;
1423 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1424 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1425
1426 spin_unlock_irqrestore(&priv->sta_lock, flags);
1427
1428 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
bb8c093b 1429 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY		 1430 return 0;
1431}
1432
c79dd5b5 1433static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
b481de9c
ZY		 1434{
1435 unsigned long flags;
1436
1437 spin_lock_irqsave(&priv->sta_lock, flags);
bb8c093b
CH		 1438 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1439 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
b481de9c
ZY		 1440 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1441 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1442 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1443 spin_unlock_irqrestore(&priv->sta_lock, flags);
1444
1445 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
bb8c093b 1446 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY		 1447 return 0;
1448}
1449
c79dd5b5 1450static void iwl4965_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 1451{
1452 struct list_head *element;
1453
1454 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1455 priv->frames_count);
1456
1457 while (!list_empty(&priv->free_frames)) {
1458 element = priv->free_frames.next;
1459 list_del(element);
bb8c093b 1460 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY		 1461 priv->frames_count--;
1462 }
1463
1464 if (priv->frames_count) {
1465 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1466 priv->frames_count);
1467 priv->frames_count = 0;
1468 }
1469}
1470
c79dd5b5 1471static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
b481de9c 1472{
bb8c093b 1473 struct iwl4965_frame *frame;
b481de9c
ZY		 1474 struct list_head *element;
1475 if (list_empty(&priv->free_frames)) {
1476 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1477 if (!frame) {
1478 IWL_ERROR("Could not allocate frame!\n");
1479 return NULL;
1480 }
1481
1482 priv->frames_count++;
1483 return frame;
1484 }
1485
1486 element = priv->free_frames.next;
1487 list_del(element);
bb8c093b 1488 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY		 1489}
1490
c79dd5b5 1491static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY		 1492{
1493 memset(frame, 0, sizeof(*frame));
1494 list_add(&frame->list, &priv->free_frames);
1495}
1496
c79dd5b5 1497unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
b481de9c
ZY		 1498 struct ieee80211_hdr *hdr,
1499 const u8 *dest, int left)
1500{
1501
bb8c093b 1502 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY		 1503 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1504 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1505 return 0;
1506
1507 if (priv->ibss_beacon->len > left)
1508 return 0;
1509
1510 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1511
1512 return priv->ibss_beacon->len;
1513}
1514
bb8c093b 1515static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
b481de9c
ZY		 1516{
1517 u8 i;
1518
1519 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
bb8c093b 1520 i = iwl4965_rates[i].next_ieee) {
b481de9c 1521 if (rate_mask & (1 << i))
bb8c093b 1522 return iwl4965_rates[i].plcp;
b481de9c
ZY		 1523 }
1524
1525 return IWL_RATE_INVALID;
1526}
1527
c79dd5b5 1528static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 1529{
bb8c093b 1530 struct iwl4965_frame *frame;
b481de9c
ZY		 1531 unsigned int frame_size;
1532 int rc;
1533 u8 rate;
1534
bb8c093b 1535 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY		 1536
1537 if (!frame) {
1538 IWL_ERROR("Could not obtain free frame buffer for beacon "
1539 "command.\n");
1540 return -ENOMEM;
1541 }
1542
1543 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
bb8c093b 1544 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
b481de9c
ZY		 1545 0xFF0);
1546 if (rate == IWL_INVALID_RATE)
1547 rate = IWL_RATE_6M_PLCP;
1548 } else {
bb8c093b 1549 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
b481de9c
ZY		 1550 if (rate == IWL_INVALID_RATE)
1551 rate = IWL_RATE_1M_PLCP;
1552 }
1553
bb8c093b 1554 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1555
bb8c093b 1556 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 1557 &frame->u.cmd[0]);
1558
bb8c093b 1559 iwl4965_free_frame(priv, frame);
b481de9c
ZY		 1560
1561 return rc;
1562}
1563
b481de9c
ZY		 1564/******************************************************************************
1565 *
1566 * Misc. internal state and helper functions
1567 *
1568 ******************************************************************************/
b481de9c 1569
c79dd5b5 1570static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
b481de9c
ZY		 1571{
1572 if (priv->hw_setting.shared_virt)
1573 pci_free_consistent(priv->pci_dev,
bb8c093b 1574 sizeof(struct iwl4965_shared),
b481de9c
ZY		 1575 priv->hw_setting.shared_virt,
1576 priv->hw_setting.shared_phys);
1577}
1578
1579/**
bb8c093b 1580 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY		 1581 *
1582 * return : set the bit for each supported rate insert in ie
1583 */
bb8c093b 1584static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1585 u16 basic_rate, int *left)
b481de9c
ZY		 1586{
1587 u16 ret_rates = 0, bit;
1588 int i;
c7c46676
TW		 1589 u8 *cnt = ie;
1590 u8 *rates = ie + 1;
b481de9c
ZY		 1591
1592 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1593 if (bit & supported_rate) {
1594 ret_rates |= bit;
bb8c093b 1595 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW		 1596 ((bit & basic_rate) ? 0x80 : 0x00);
1597 (*cnt)++;
1598 (*left)--;
1599 if ((*left <= 0) ||
1600 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY		 1601 break;
1602 }
1603 }
1604
1605 return ret_rates;
1606}
1607
b481de9c 1608/**
bb8c093b 1609 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1610 */
c79dd5b5 1611static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
78330fdd
TW		 1612 enum ieee80211_band band,
1613 struct ieee80211_mgmt *frame,
1614 int left, int is_direct)
b481de9c
ZY		 1615{
1616 int len = 0;
1617 u8 *pos = NULL;
bee488db 1618 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
8fb88032 1619#ifdef CONFIG_IWL4965_HT
78330fdd
TW		 1620 const struct ieee80211_supported_band *sband =
1621 iwl4965_get_hw_mode(priv, band);
8fb88032 1622#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 1623
1624 /* Make sure there is enough space for the probe request,
1625 * two mandatory IEs and the data */
1626 left -= 24;
1627 if (left < 0)
1628 return 0;
1629 len += 24;
1630
1631 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1632 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1633 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1634 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY		 1635 frame->seq_ctrl = 0;
1636
1637 /* fill in our indirect SSID IE */
1638 /* ...next IE... */
1639
1640 left -= 2;
1641 if (left < 0)
1642 return 0;
1643 len += 2;
1644 pos = &(frame->u.probe_req.variable[0]);
1645 *pos++ = WLAN_EID_SSID;
1646 *pos++ = 0;
1647
1648 /* fill in our direct SSID IE... */
1649 if (is_direct) {
1650 /* ...next IE... */
1651 left -= 2 + priv->essid_len;
1652 if (left < 0)
1653 return 0;
1654 /* ... fill it in... */
1655 *pos++ = WLAN_EID_SSID;
1656 *pos++ = priv->essid_len;
1657 memcpy(pos, priv->essid, priv->essid_len);
1658 pos += priv->essid_len;
1659 len += 2 + priv->essid_len;
1660 }
1661
1662 /* fill in supported rate */
1663 /* ...next IE... */
1664 left -= 2;
1665 if (left < 0)
1666 return 0;
c7c46676 1667
b481de9c
ZY		 1668 /* ... fill it in... */
1669 *pos++ = WLAN_EID_SUPP_RATES;
1670 *pos = 0;
c7c46676 1671
bee488db 1672 /* exclude 60M rate */
1673 active_rates = priv->rates_mask;
1674 active_rates &= ~IWL_RATE_60M_MASK;
1675
1676 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1677
c7c46676 1678 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1679 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1680 active_rate_basic, &left);
c7c46676
TW		 1681 active_rates &= ~ret_rates;
1682
bb8c093b 1683 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1684 active_rate_basic, &left);
c7c46676
TW		 1685 active_rates &= ~ret_rates;
1686
b481de9c
ZY		 1687 len += 2 + *pos;
1688 pos += (*pos) + 1;
c7c46676 1689 if (active_rates == 0)
b481de9c
ZY		 1690 goto fill_end;
1691
1692 /* fill in supported extended rate */
1693 /* ...next IE... */
1694 left -= 2;
1695 if (left < 0)
1696 return 0;
1697 /* ... fill it in... */
1698 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1699 *pos = 0;
bb8c093b 1700 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1701 active_rate_basic, &left);
b481de9c
ZY		 1702 if (*pos > 0)
1703 len += 2 + *pos;
1704
c8b0e6e1 1705#ifdef CONFIG_IWL4965_HT
78330fdd
TW		 1706 if (sband && sband->ht_info.ht_supported) {
1707 struct ieee80211_ht_cap *ht_cap;
b481de9c
ZY		 1708 pos += (*pos) + 1;
1709 *pos++ = WLAN_EID_HT_CAPABILITY;
8fb88032 1710 *pos++ = sizeof(struct ieee80211_ht_cap);
78330fdd
TW		 1711 ht_cap = (struct ieee80211_ht_cap *)pos;
1712 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
1713 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
1714 ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
1715 IEEE80211_HT_CAP_AMPDU_FACTOR) |
1716 ((sband->ht_info.ampdu_density << 2) &
1717 IEEE80211_HT_CAP_AMPDU_DENSITY);
8fb88032 1718 len += 2 + sizeof(struct ieee80211_ht_cap);
b481de9c 1719 }
c8b0e6e1 1720#endif /*CONFIG_IWL4965_HT */
b481de9c
ZY		 1721
1722 fill_end:
1723 return (u16)len;
1724}
1725
1726/*
1727 * QoS support
1728*/
c79dd5b5 1729static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 1730 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY		 1731{
1732
bb8c093b
CH		 1733 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1734 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY		 1735}
1736
c79dd5b5 1737static void iwl4965_reset_qos(struct iwl_priv *priv)
b481de9c
ZY		 1738{
1739 u16 cw_min = 15;
1740 u16 cw_max = 1023;
1741 u8 aifs = 2;
1742 u8 is_legacy = 0;
1743 unsigned long flags;
1744 int i;
1745
1746 spin_lock_irqsave(&priv->lock, flags);
1747 priv->qos_data.qos_active = 0;
1748
1749 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1750 if (priv->qos_data.qos_enable)
1751 priv->qos_data.qos_active = 1;
1752 if (!(priv->active_rate & 0xfff0)) {
1753 cw_min = 31;
1754 is_legacy = 1;
1755 }
1756 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1757 if (priv->qos_data.qos_enable)
1758 priv->qos_data.qos_active = 1;
1759 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1760 cw_min = 31;
1761 is_legacy = 1;
1762 }
1763
1764 if (priv->qos_data.qos_active)
1765 aifs = 3;
1766
1767 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1768 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1769 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1770 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1771 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1772
1773 if (priv->qos_data.qos_active) {
1774 i = 1;
1775 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1776 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1777 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1778 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1779 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1780
1781 i = 2;
1782 priv->qos_data.def_qos_parm.ac[i].cw_min =
1783 cpu_to_le16((cw_min + 1) / 2 - 1);
1784 priv->qos_data.def_qos_parm.ac[i].cw_max =
1785 cpu_to_le16(cw_max);
1786 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1787 if (is_legacy)
1788 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1789 cpu_to_le16(6016);
1790 else
1791 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1792 cpu_to_le16(3008);
1793 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1794
1795 i = 3;
1796 priv->qos_data.def_qos_parm.ac[i].cw_min =
1797 cpu_to_le16((cw_min + 1) / 4 - 1);
1798 priv->qos_data.def_qos_parm.ac[i].cw_max =
1799 cpu_to_le16((cw_max + 1) / 2 - 1);
1800 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1801 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1802 if (is_legacy)
1803 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1804 cpu_to_le16(3264);
1805 else
1806 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1807 cpu_to_le16(1504);
1808 } else {
1809 for (i = 1; i < 4; i++) {
1810 priv->qos_data.def_qos_parm.ac[i].cw_min =
1811 cpu_to_le16(cw_min);
1812 priv->qos_data.def_qos_parm.ac[i].cw_max =
1813 cpu_to_le16(cw_max);
1814 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1815 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1816 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1817 }
1818 }
1819 IWL_DEBUG_QOS("set QoS to default \n");
1820
1821 spin_unlock_irqrestore(&priv->lock, flags);
1822}
1823
c79dd5b5 1824static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY		 1825{
1826 unsigned long flags;
1827
b481de9c
ZY		 1828 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1829 return;
1830
1831 if (!priv->qos_data.qos_enable)
1832 return;
1833
1834 spin_lock_irqsave(&priv->lock, flags);
1835 priv->qos_data.def_qos_parm.qos_flags = 0;
1836
1837 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1838 !priv->qos_data.qos_cap.q_AP.txop_request)
1839 priv->qos_data.def_qos_parm.qos_flags |=
1840 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 1841 if (priv->qos_data.qos_active)
1842 priv->qos_data.def_qos_parm.qos_flags |=
1843 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1844
c8b0e6e1 1845#ifdef CONFIG_IWL4965_HT
fd105e79 1846 if (priv->current_ht_config.is_ht)
f1f1f5c7 1847 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 1848#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 1849
b481de9c
ZY		 1850 spin_unlock_irqrestore(&priv->lock, flags);
1851
bb8c093b 1852 if (force || iwl4965_is_associated(priv)) {
f1f1f5c7
TW		 1853 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
1854 priv->qos_data.qos_active,
1855 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 1856
bb8c093b 1857 iwl4965_send_qos_params_command(priv,
b481de9c
ZY		 1858 &(priv->qos_data.def_qos_parm));
1859 }
1860}
1861
b481de9c
ZY		 1862/*
1863 * Power management (not Tx power!) functions
1864 */
1865#define MSEC_TO_USEC 1024
1866
1867#define NOSLP __constant_cpu_to_le16(0), 0, 0
1868#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1869#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1870#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1871 __constant_cpu_to_le32(X1), \
1872 __constant_cpu_to_le32(X2), \
1873 __constant_cpu_to_le32(X3), \
1874 __constant_cpu_to_le32(X4)}
1875
1876
1877/* default power management (not Tx power) table values */
1878/* for tim 0-10 */
bb8c093b 1879static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
b481de9c
ZY		 1880 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1881 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1882 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1883 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1884 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1885 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1886};
1887
1888/* for tim > 10 */
bb8c093b 1889static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
b481de9c
ZY		 1890 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1891 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1892 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1893 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1894 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1895 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1896 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1897 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1898 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1899 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1900};
1901
c79dd5b5 1902int iwl4965_power_init_handle(struct iwl_priv *priv)
b481de9c
ZY		 1903{
1904 int rc = 0, i;
bb8c093b
CH		 1905 struct iwl4965_power_mgr *pow_data;
1906 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
b481de9c
ZY		 1907 u16 pci_pm;
1908
1909 IWL_DEBUG_POWER("Initialize power \n");
1910
1911 pow_data = &(priv->power_data);
1912
1913 memset(pow_data, 0, sizeof(*pow_data));
1914
1915 pow_data->active_index = IWL_POWER_RANGE_0;
1916 pow_data->dtim_val = 0xffff;
1917
1918 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1919 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1920
1921 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1922 if (rc != 0)
1923 return 0;
1924 else {
bb8c093b 1925 struct iwl4965_powertable_cmd *cmd;
b481de9c
ZY		 1926
1927 IWL_DEBUG_POWER("adjust power command flags\n");
1928
1929 for (i = 0; i < IWL_POWER_AC; i++) {
1930 cmd = &pow_data->pwr_range_0[i].cmd;
1931
1932 if (pci_pm & 0x1)
1933 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1934 else
1935 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1936 }
1937 }
1938 return rc;
1939}
1940
c79dd5b5 1941static int iwl4965_update_power_cmd(struct iwl_priv *priv,
bb8c093b 1942 struct iwl4965_powertable_cmd *cmd, u32 mode)
b481de9c
ZY		 1943{
1944 int rc = 0, i;
1945 u8 skip;
1946 u32 max_sleep = 0;
bb8c093b 1947 struct iwl4965_power_vec_entry *range;
b481de9c 1948 u8 period = 0;
bb8c093b 1949 struct iwl4965_power_mgr *pow_data;
b481de9c
ZY		 1950
1951 if (mode > IWL_POWER_INDEX_5) {
1952 IWL_DEBUG_POWER("Error invalid power mode \n");
1953 return -1;
1954 }
1955 pow_data = &(priv->power_data);
1956
1957 if (pow_data->active_index == IWL_POWER_RANGE_0)
1958 range = &pow_data->pwr_range_0[0];
1959 else
1960 range = &pow_data->pwr_range_1[1];
1961
bb8c093b 1962 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
b481de9c
ZY		 1963
1964#ifdef IWL_MAC80211_DISABLE
1965 if (priv->assoc_network != NULL) {
1966 unsigned long flags;
1967
1968 period = priv->assoc_network->tim.tim_period;
1969 }
1970#endif /*IWL_MAC80211_DISABLE */
1971 skip = range[mode].no_dtim;
1972
1973 if (period == 0) {
1974 period = 1;
1975 skip = 0;
1976 }
1977
1978 if (skip == 0) {
1979 max_sleep = period;
1980 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1981 } else {
1982 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1983 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1984 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1985 }
1986
1987 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1988 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1989 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1990 }
1991
1992 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1993 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1994 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1995 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1996 le32_to_cpu(cmd->sleep_interval[0]),
1997 le32_to_cpu(cmd->sleep_interval[1]),
1998 le32_to_cpu(cmd->sleep_interval[2]),
1999 le32_to_cpu(cmd->sleep_interval[3]),
2000 le32_to_cpu(cmd->sleep_interval[4]));
2001
2002 return rc;
2003}
2004
c79dd5b5 2005static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
b481de9c 2006{
9a62f73b 2007 u32 uninitialized_var(final_mode);
b481de9c 2008 int rc;
bb8c093b 2009 struct iwl4965_powertable_cmd cmd;
b481de9c
ZY		 2010
2011 /* If on battery, set to 3,
01ebd063 2012 * if plugged into AC power, set to CAM ("continuously aware mode"),
b481de9c
ZY		 2013 * else user level */
2014 switch (mode) {
2015 case IWL_POWER_BATTERY:
2016 final_mode = IWL_POWER_INDEX_3;
2017 break;
2018 case IWL_POWER_AC:
2019 final_mode = IWL_POWER_MODE_CAM;
2020 break;
2021 default:
2022 final_mode = mode;
2023 break;
2024 }
2025
2026 cmd.keep_alive_beacons = 0;
2027
bb8c093b 2028 iwl4965_update_power_cmd(priv, &cmd, final_mode);
b481de9c 2029
bb8c093b 2030 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
b481de9c
ZY		 2031
2032 if (final_mode == IWL_POWER_MODE_CAM)
2033 clear_bit(STATUS_POWER_PMI, &priv->status);
2034 else
2035 set_bit(STATUS_POWER_PMI, &priv->status);
2036
2037 return rc;
2038}
2039
c79dd5b5 2040int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 2041{
2042 /* Filter incoming packets to determine if they are targeted toward
2043 * this network, discarding packets coming from ourselves */
2044 switch (priv->iw_mode) {
2045 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2046 /* packets from our adapter are dropped (echo) */
2047 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2048 return 0;
2049 /* {broad,multi}cast packets to our IBSS go through */
2050 if (is_multicast_ether_addr(header->addr1))
2051 return !compare_ether_addr(header->addr3, priv->bssid);
2052 /* packets to our adapter go through */
2053 return !compare_ether_addr(header->addr1, priv->mac_addr);
2054 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2055 /* packets from our adapter are dropped (echo) */
2056 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2057 return 0;
2058 /* {broad,multi}cast packets to our BSS go through */
2059 if (is_multicast_ether_addr(header->addr1))
2060 return !compare_ether_addr(header->addr2, priv->bssid);
2061 /* packets to our adapter go through */
2062 return !compare_ether_addr(header->addr1, priv->mac_addr);
2063 }
2064
2065 return 1;
2066}
2067
2068#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2069
bb8c093b 2070static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY		 2071{
2072 switch (status & TX_STATUS_MSK) {
2073 case TX_STATUS_SUCCESS:
2074 return "SUCCESS";
2075 TX_STATUS_ENTRY(SHORT_LIMIT);
2076 TX_STATUS_ENTRY(LONG_LIMIT);
2077 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2078 TX_STATUS_ENTRY(MGMNT_ABORT);
2079 TX_STATUS_ENTRY(NEXT_FRAG);
2080 TX_STATUS_ENTRY(LIFE_EXPIRE);
2081 TX_STATUS_ENTRY(DEST_PS);
2082 TX_STATUS_ENTRY(ABORTED);
2083 TX_STATUS_ENTRY(BT_RETRY);
2084 TX_STATUS_ENTRY(STA_INVALID);
2085 TX_STATUS_ENTRY(FRAG_DROPPED);
2086 TX_STATUS_ENTRY(TID_DISABLE);
2087 TX_STATUS_ENTRY(FRAME_FLUSHED);
2088 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2089 TX_STATUS_ENTRY(TX_LOCKED);
2090 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2091 }
2092
2093 return "UNKNOWN";
2094}
2095
2096/**
bb8c093b 2097 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY		 2098 *
2099 * NOTE: priv->mutex is not required before calling this function
2100 */
c79dd5b5 2101static int iwl4965_scan_cancel(struct iwl_priv *priv)
b481de9c
ZY		 2102{
2103 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2104 clear_bit(STATUS_SCANNING, &priv->status);
2105 return 0;
2106 }
2107
2108 if (test_bit(STATUS_SCANNING, &priv->status)) {
2109 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2110 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2111 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2112 queue_work(priv->workqueue, &priv->abort_scan);
2113
2114 } else
2115 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2116
2117 return test_bit(STATUS_SCANNING, &priv->status);
2118 }
2119
2120 return 0;
2121}
2122
2123/**
bb8c093b 2124 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY		 2125 * @ms: amount of time to wait (in milliseconds) for scan to abort
2126 *
2127 * NOTE: priv->mutex must be held before calling this function
2128 */
c79dd5b5 2129static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
b481de9c
ZY		 2130{
2131 unsigned long now = jiffies;
2132 int ret;
2133
bb8c093b 2134 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY		 2135 if (ret && ms) {
2136 mutex_unlock(&priv->mutex);
2137 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2138 test_bit(STATUS_SCANNING, &priv->status))
2139 msleep(1);
2140 mutex_lock(&priv->mutex);
2141
2142 return test_bit(STATUS_SCANNING, &priv->status);
2143 }
2144
2145 return ret;
2146}
2147
c79dd5b5 2148static void iwl4965_sequence_reset(struct iwl_priv *priv)
b481de9c
ZY		 2149{
2150 /* Reset ieee stats */
2151
2152 /* We don't reset the net_device_stats (ieee->stats) on
2153 * re-association */
2154
2155 priv->last_seq_num = -1;
2156 priv->last_frag_num = -1;
2157 priv->last_packet_time = 0;
2158
bb8c093b 2159 iwl4965_scan_cancel(priv);
b481de9c
ZY		 2160}
2161
2162#define MAX_UCODE_BEACON_INTERVAL 4096
2163#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2164
bb8c093b 2165static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 2166{
2167 u16 new_val = 0;
2168 u16 beacon_factor = 0;
2169
2170 beacon_factor =
2171 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2172 / MAX_UCODE_BEACON_INTERVAL;
2173 new_val = beacon_val / beacon_factor;
2174
2175 return cpu_to_le16(new_val);
2176}
2177
c79dd5b5 2178static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY		 2179{
2180 u64 interval_tm_unit;
2181 u64 tsf, result;
2182 unsigned long flags;
2183 struct ieee80211_conf *conf = NULL;
2184 u16 beacon_int = 0;
2185
2186 conf = ieee80211_get_hw_conf(priv->hw);
2187
2188 spin_lock_irqsave(&priv->lock, flags);
2189 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2190 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2191
2192 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2193
2194 tsf = priv->timestamp1;
2195 tsf = ((tsf << 32) | priv->timestamp0);
2196
2197 beacon_int = priv->beacon_int;
2198 spin_unlock_irqrestore(&priv->lock, flags);
2199
2200 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2201 if (beacon_int == 0) {
2202 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2203 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2204 } else {
2205 priv->rxon_timing.beacon_interval =
2206 cpu_to_le16(beacon_int);
2207 priv->rxon_timing.beacon_interval =
bb8c093b 2208 iwl4965_adjust_beacon_interval(
b481de9c
ZY		 2209 le16_to_cpu(priv->rxon_timing.beacon_interval));
2210 }
2211
2212 priv->rxon_timing.atim_window = 0;
2213 } else {
2214 priv->rxon_timing.beacon_interval =
bb8c093b 2215 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY		 2216 /* TODO: we need to get atim_window from upper stack
2217 * for now we set to 0 */
2218 priv->rxon_timing.atim_window = 0;
2219 }
2220
2221 interval_tm_unit =
2222 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2223 result = do_div(tsf, interval_tm_unit);
2224 priv->rxon_timing.beacon_init_val =
2225 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2226
2227 IWL_DEBUG_ASSOC
2228 ("beacon interval %d beacon timer %d beacon tim %d\n",
2229 le16_to_cpu(priv->rxon_timing.beacon_interval),
2230 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2231 le16_to_cpu(priv->rxon_timing.atim_window));
2232}
2233
c79dd5b5 2234static int iwl4965_scan_initiate(struct iwl_priv *priv)
b481de9c
ZY		 2235{
2236 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2237 IWL_ERROR("APs don't scan.\n");
2238 return 0;
2239 }
2240
bb8c093b 2241 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 2242 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2243 return -EIO;
2244 }
2245
2246 if (test_bit(STATUS_SCANNING, &priv->status)) {
2247 IWL_DEBUG_SCAN("Scan already in progress.\n");
2248 return -EAGAIN;
2249 }
2250
2251 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2252 IWL_DEBUG_SCAN("Scan request while abort pending. "
2253 "Queuing.\n");
2254 return -EAGAIN;
2255 }
2256
2257 IWL_DEBUG_INFO("Starting scan...\n");
2258 priv->scan_bands = 2;
2259 set_bit(STATUS_SCANNING, &priv->status);
2260 priv->scan_start = jiffies;
2261 priv->scan_pass_start = priv->scan_start;
2262
2263 queue_work(priv->workqueue, &priv->request_scan);
2264
2265 return 0;
2266}
2267
c79dd5b5 2268static int iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
b481de9c 2269{
bb8c093b 2270 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
b481de9c
ZY		 2271
2272 if (hw_decrypt)
2273 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2274 else
2275 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2276
2277 return 0;
2278}
2279
c79dd5b5 2280static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
8318d78a 2281 enum ieee80211_band band)
b481de9c 2282{
8318d78a 2283 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY		 2284 priv->staging_rxon.flags &=
2285 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2286 | RXON_FLG_CCK_MSK);
2287 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2288 } else {
bb8c093b 2289 /* Copied from iwl4965_bg_post_associate() */
b481de9c
ZY		 2290 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2291 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2292 else
2293 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2294
2295 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2296 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2297
2298 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2299 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2300 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2301 }
2302}
2303
2304/*
01ebd063 2305 * initialize rxon structure with default values from eeprom
b481de9c 2306 */
c79dd5b5 2307static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 2308{
bb8c093b 2309 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 2310
2311 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2312
2313 switch (priv->iw_mode) {
2314 case IEEE80211_IF_TYPE_AP:
2315 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2316 break;
2317
2318 case IEEE80211_IF_TYPE_STA:
2319 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2320 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2321 break;
2322
2323 case IEEE80211_IF_TYPE_IBSS:
2324 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2325 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2326 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2327 RXON_FILTER_ACCEPT_GRP_MSK;
2328 break;
2329
2330 case IEEE80211_IF_TYPE_MNTR:
2331 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2332 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2333 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2334 break;
2335 }
2336
2337#if 0
2338 /* TODO: Figure out when short_preamble would be set and cache from
2339 * that */
2340 if (!hw_to_local(priv->hw)->short_preamble)
2341 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2342 else
2343 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2344#endif
2345
8318d78a 2346 ch_info = iwl4965_get_channel_info(priv, priv->band,
b481de9c
ZY		 2347 le16_to_cpu(priv->staging_rxon.channel));
2348
2349 if (!ch_info)
2350 ch_info = &priv->channel_info[0];
2351
2352 /*
2353 * in some case A channels are all non IBSS
2354 * in this case force B/G channel
2355 */
2356 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2357 !(is_channel_ibss(ch_info)))
2358 ch_info = &priv->channel_info[0];
2359
2360 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 2361 priv->band = ch_info->band;
b481de9c 2362
8318d78a 2363 iwl4965_set_flags_for_phymode(priv, priv->band);
b481de9c
ZY		 2364
2365 priv->staging_rxon.ofdm_basic_rates =
2366 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2367 priv->staging_rxon.cck_basic_rates =
2368 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2369
2370 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2371 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2372 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2373 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2374 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2375 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2376 iwl4965_set_rxon_chain(priv);
2377}
2378
c79dd5b5 2379static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 2380{
b481de9c 2381 if (mode == IEEE80211_IF_TYPE_IBSS) {
bb8c093b 2382 const struct iwl4965_channel_info *ch_info;
b481de9c 2383
bb8c093b 2384 ch_info = iwl4965_get_channel_info(priv,
8318d78a 2385 priv->band,
b481de9c
ZY		 2386 le16_to_cpu(priv->staging_rxon.channel));
2387
2388 if (!ch_info || !is_channel_ibss(ch_info)) {
2389 IWL_ERROR("channel %d not IBSS channel\n",
2390 le16_to_cpu(priv->staging_rxon.channel));
2391 return -EINVAL;
2392 }
2393 }
2394
b481de9c
ZY		 2395 priv->iw_mode = mode;
2396
bb8c093b 2397 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 2398 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2399
bb8c093b 2400 iwl4965_clear_stations_table(priv);
b481de9c 2401
fde3571f
MA		 2402 /* dont commit rxon if rf-kill is on*/
2403 if (!iwl4965_is_ready_rf(priv))
2404 return -EAGAIN;
2405
2406 cancel_delayed_work(&priv->scan_check);
2407 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2408 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2409 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2410 return -EAGAIN;
2411 }
2412
bb8c093b 2413 iwl4965_commit_rxon(priv);
b481de9c
ZY		 2414
2415 return 0;
2416}
2417
c79dd5b5 2418static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
b481de9c 2419 struct ieee80211_tx_control *ctl,
bb8c093b 2420 struct iwl4965_cmd *cmd,
b481de9c
ZY		 2421 struct sk_buff *skb_frag,
2422 int last_frag)
2423{
bb8c093b 2424 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
b481de9c
ZY		 2425
2426 switch (keyinfo->alg) {
2427 case ALG_CCMP:
2428 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2429 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
8236e183
MS		 2430 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
2431 cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
b481de9c
ZY		 2432 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2433 break;
2434
2435 case ALG_TKIP:
2436#if 0
2437 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2438
2439 if (last_frag)
2440 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2441 8);
2442 else
2443 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2444#endif
2445 break;
2446
2447 case ALG_WEP:
2448 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2449 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2450
2451 if (keyinfo->keylen == 13)
2452 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2453
2454 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2455
2456 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2457 "with key %d\n", ctl->key_idx);
2458 break;
2459
b481de9c
ZY		 2460 default:
2461 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2462 break;
2463 }
2464}
2465
2466/*
2467 * handle build REPLY_TX command notification.
2468 */
c79dd5b5 2469static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
bb8c093b 2470 struct iwl4965_cmd *cmd,
b481de9c
ZY		 2471 struct ieee80211_tx_control *ctrl,
2472 struct ieee80211_hdr *hdr,
2473 int is_unicast, u8 std_id)
2474{
2475 __le16 *qc;
2476 u16 fc = le16_to_cpu(hdr->frame_control);
2477 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2478
2479 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2480 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2481 tx_flags |= TX_CMD_FLG_ACK_MSK;
2482 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2483 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2484 if (ieee80211_is_probe_response(fc) &&
2485 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2486 tx_flags |= TX_CMD_FLG_TSF_MSK;
2487 } else {
2488 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2489 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2490 }
2491
87e4f7df
TW		 2492 if (ieee80211_is_back_request(fc))
2493 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2494
2495
b481de9c
ZY		 2496 cmd->cmd.tx.sta_id = std_id;
2497 if (ieee80211_get_morefrag(hdr))
2498 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2499
2500 qc = ieee80211_get_qos_ctrl(hdr);
2501 if (qc) {
2502 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2503 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2504 } else
2505 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2506
2507 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2508 tx_flags |= TX_CMD_FLG_RTS_MSK;
2509 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2510 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2511 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2512 tx_flags |= TX_CMD_FLG_CTS_MSK;
2513 }
2514
2515 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2516 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2517
2518 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2519 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2520 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2521 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 2522 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 2523 else
bc434dd2 2524 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
b481de9c
ZY		 2525 } else
2526 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2527
2528 cmd->cmd.tx.driver_txop = 0;
2529 cmd->cmd.tx.tx_flags = tx_flags;
2530 cmd->cmd.tx.next_frame_len = 0;
2531}
2532
6440adb5
CB		 2533/**
2534 * iwl4965_get_sta_id - Find station's index within station table
2535 *
2536 * If new IBSS station, create new entry in station table
2537 */
c79dd5b5 2538static int iwl4965_get_sta_id(struct iwl_priv *priv,
9fbab516 2539 struct ieee80211_hdr *hdr)
b481de9c
ZY		 2540{
2541 int sta_id;
2542 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 2543 DECLARE_MAC_BUF(mac);
b481de9c 2544
6440adb5 2545 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY		 2546 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2547 is_multicast_ether_addr(hdr->addr1))
2548 return priv->hw_setting.bcast_sta_id;
2549
2550 switch (priv->iw_mode) {
2551
6440adb5
CB		 2552 /* If we are a client station in a BSS network, use the special
2553 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY		 2554 case IEEE80211_IF_TYPE_STA:
2555 return IWL_AP_ID;
2556
2557 /* If we are an AP, then find the station, or use BCAST */
2558 case IEEE80211_IF_TYPE_AP:
bb8c093b 2559 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2560 if (sta_id != IWL_INVALID_STATION)
2561 return sta_id;
2562 return priv->hw_setting.bcast_sta_id;
2563
6440adb5
CB		 2564 /* If this frame is going out to an IBSS network, find the station,
2565 * or create a new station table entry */
b481de9c 2566 case IEEE80211_IF_TYPE_IBSS:
bb8c093b 2567 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2568 if (sta_id != IWL_INVALID_STATION)
2569 return sta_id;
2570
6440adb5 2571 /* Create new station table entry */
67d62035
RR		 2572 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2573 0, CMD_ASYNC, NULL);
b481de9c
ZY		 2574
2575 if (sta_id != IWL_INVALID_STATION)
2576 return sta_id;
2577
0795af57 2578 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 2579 "Defaulting to broadcast...\n",
0795af57 2580 print_mac(mac, hdr->addr1));
0a6857e7 2581 iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
b481de9c
ZY		 2582 return priv->hw_setting.bcast_sta_id;
2583
2584 default:
01ebd063 2585 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
b481de9c
ZY		 2586 return priv->hw_setting.bcast_sta_id;
2587 }
2588}
2589
2590/*
2591 * start REPLY_TX command process
2592 */
c79dd5b5 2593static int iwl4965_tx_skb(struct iwl_priv *priv,
b481de9c
ZY		 2594 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2595{
2596 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 2597 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY		 2598 u32 *control_flags;
2599 int txq_id = ctl->queue;
bb8c093b
CH		 2600 struct iwl4965_tx_queue *txq = NULL;
2601 struct iwl4965_queue *q = NULL;
b481de9c
ZY		 2602 dma_addr_t phys_addr;
2603 dma_addr_t txcmd_phys;
87e4f7df 2604 dma_addr_t scratch_phys;
bb8c093b 2605 struct iwl4965_cmd *out_cmd = NULL;
b481de9c
ZY		 2606 u16 len, idx, len_org;
2607 u8 id, hdr_len, unicast;
2608 u8 sta_id;
2609 u16 seq_number = 0;
2610 u16 fc;
2611 __le16 *qc;
2612 u8 wait_write_ptr = 0;
2613 unsigned long flags;
2614 int rc;
2615
2616 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2617 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 2618 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2619 goto drop_unlock;
2620 }
2621
32bfd35d
JB		 2622 if (!priv->vif) {
2623 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
b481de9c
ZY		 2624 goto drop_unlock;
2625 }
2626
8318d78a 2627 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
b481de9c
ZY		 2628 IWL_ERROR("ERROR: No TX rate available.\n");
2629 goto drop_unlock;
2630 }
2631
2632 unicast = !is_multicast_ether_addr(hdr->addr1);
2633 id = 0;
2634
2635 fc = le16_to_cpu(hdr->frame_control);
2636
0a6857e7 2637#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 2638 if (ieee80211_is_auth(fc))
2639 IWL_DEBUG_TX("Sending AUTH frame\n");
2640 else if (ieee80211_is_assoc_request(fc))
2641 IWL_DEBUG_TX("Sending ASSOC frame\n");
2642 else if (ieee80211_is_reassoc_request(fc))
2643 IWL_DEBUG_TX("Sending REASSOC frame\n");
2644#endif
2645
7878a5a4 2646 /* drop all data frame if we are not associated */
76f3915b
GG		 2647 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
2648 (!iwl4965_is_associated(priv) ||
a6477249 2649 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
76f3915b 2650 !priv->assoc_station_added)) {
bb8c093b 2651 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
b481de9c
ZY		 2652 goto drop_unlock;
2653 }
2654
2655 spin_unlock_irqrestore(&priv->lock, flags);
2656
2657 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
CB		 2658
2659 /* Find (or create) index into station table for destination station */
bb8c093b 2660 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2661 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 2662 DECLARE_MAC_BUF(mac);
2663
2664 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2665 print_mac(mac, hdr->addr1));
b481de9c
ZY		 2666 goto drop;
2667 }
2668
2669 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2670
2671 qc = ieee80211_get_qos_ctrl(hdr);
2672 if (qc) {
2673 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2674 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2675 IEEE80211_SCTL_SEQ;
2676 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2677 (hdr->seq_ctrl &
2678 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2679 seq_number += 0x10;
c8b0e6e1 2680#ifdef CONFIG_IWL4965_HT
b481de9c 2681 /* aggregation is on for this <sta,tid> */
fe01b477 2682 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
b481de9c 2683 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
fe01b477 2684 priv->stations[sta_id].tid[tid].tfds_in_queue++;
c8b0e6e1 2685#endif /* CONFIG_IWL4965_HT */
b481de9c 2686 }
6440adb5
CB		 2687
2688 /* Descriptor for chosen Tx queue */
b481de9c
ZY		 2689 txq = &priv->txq[txq_id];
2690 q = &txq->q;
2691
2692 spin_lock_irqsave(&priv->lock, flags);
2693
6440adb5 2694 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2695 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 2696 memset(tfd, 0, sizeof(*tfd));
2697 control_flags = (u32 *) tfd;
fc4b6853 2698 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2699
6440adb5 2700 /* Set up driver data for this TFD */
bb8c093b 2701 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW		 2702 txq->txb[q->write_ptr].skb[0] = skb;
2703 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2704 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
CB		 2705
2706 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY		 2707 out_cmd = &txq->cmd[idx];
2708 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2709 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
CB		 2710
2711 /*
2712 * Set up the Tx-command (not MAC!) header.
2713 * Store the chosen Tx queue and TFD index within the sequence field;
2714 * after Tx, uCode's Tx response will return this value so driver can
2715 * locate the frame within the tx queue and do post-tx processing.
2716 */
b481de9c
ZY		 2717 out_cmd->hdr.cmd = REPLY_TX;
2718 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2719 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB		 2720
2721 /* Copy MAC header from skb into command buffer */
b481de9c
ZY		 2722 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2723
6440adb5
CB		 2724 /*
2725 * Use the first empty entry in this queue's command buffer array
2726 * to contain the Tx command and MAC header concatenated together
2727 * (payload data will be in another buffer).
2728 * Size of this varies, due to varying MAC header length.
2729 * If end is not dword aligned, we'll have 2 extra bytes at the end
2730 * of the MAC header (device reads on dword boundaries).
2731 * We'll tell device about this padding later.
2732 */
b481de9c 2733 len = priv->hw_setting.tx_cmd_len +
bb8c093b 2734 sizeof(struct iwl4965_cmd_header) + hdr_len;
b481de9c
ZY		 2735
2736 len_org = len;
2737 len = (len + 3) & ~3;
2738
2739 if (len_org != len)
2740 len_org = 1;
2741 else
2742 len_org = 0;
2743
6440adb5
CB		 2744 /* Physical address of this Tx command's header (not MAC header!),
2745 * within command buffer array. */
bb8c093b
CH		 2746 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
2747 offsetof(struct iwl4965_cmd, hdr);
b481de9c 2748
6440adb5
CB		 2749 /* Add buffer containing Tx command and MAC(!) header to TFD's
2750 * first entry */
bb8c093b 2751 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY		 2752
2753 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
bb8c093b 2754 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
b481de9c 2755
6440adb5
CB		 2756 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2757 * if any (802.11 null frames have no payload). */
b481de9c
ZY		 2758 len = skb->len - hdr_len;
2759 if (len) {
2760 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2761 len, PCI_DMA_TODEVICE);
bb8c093b 2762 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY		 2763 }
2764
6440adb5 2765 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY		 2766 if (len_org)
2767 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
2768
6440adb5 2769 /* Total # bytes to be transmitted */
b481de9c
ZY		 2770 len = (u16)skb->len;
2771 out_cmd->cmd.tx.len = cpu_to_le16(len);
2772
2773 /* TODO need this for burst mode later on */
bb8c093b 2774 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY		 2775
2776 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 2777 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c 2778
87e4f7df
TW		 2779 scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
2780 offsetof(struct iwl4965_tx_cmd, scratch);
2781 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
2782 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
2783
b481de9c
ZY		 2784 if (!ieee80211_get_morefrag(hdr)) {
2785 txq->need_update = 1;
2786 if (qc) {
2787 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2788 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2789 }
2790 } else {
2791 wait_write_ptr = 1;
2792 txq->need_update = 0;
2793 }
2794
0a6857e7 2795 iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY		 2796 sizeof(out_cmd->cmd.tx));
2797
0a6857e7 2798 iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY		 2799 ieee80211_get_hdrlen(fc));
2800
6440adb5 2801 /* Set up entry for this TFD in Tx byte-count array */
b481de9c
ZY		 2802 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
2803
6440adb5 2804 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 2805 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 2806 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2807 spin_unlock_irqrestore(&priv->lock, flags);
2808
2809 if (rc)
2810 return rc;
2811
bb8c093b 2812 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY		 2813 && priv->mac80211_registered) {
2814 if (wait_write_ptr) {
2815 spin_lock_irqsave(&priv->lock, flags);
2816 txq->need_update = 1;
bb8c093b 2817 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2818 spin_unlock_irqrestore(&priv->lock, flags);
2819 }
2820
2821 ieee80211_stop_queue(priv->hw, ctl->queue);
2822 }
2823
2824 return 0;
2825
2826drop_unlock:
2827 spin_unlock_irqrestore(&priv->lock, flags);
2828drop:
2829 return -1;
2830}
2831
c79dd5b5 2832static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 2833{
8318d78a 2834 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY		 2835 struct ieee80211_rate *rate;
2836 int i;
2837
8318d78a 2838 hw = iwl4965_get_hw_mode(priv, priv->band);
c4ba9621
SA		 2839 if (!hw) {
2840 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2841 return;
2842 }
b481de9c
ZY		 2843
2844 priv->active_rate = 0;
2845 priv->active_rate_basic = 0;
2846
8318d78a
JB		 2847 for (i = 0; i < hw->n_bitrates; i++) {
2848 rate = &(hw->bitrates[i]);
2849 if (rate->hw_value < IWL_RATE_COUNT)
2850 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY		 2851 }
2852
2853 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2854 priv->active_rate, priv->active_rate_basic);
2855
2856 /*
2857 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2858 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2859 * OFDM
2860 */
2861 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2862 priv->staging_rxon.cck_basic_rates =
2863 ((priv->active_rate_basic &
2864 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2865 else
2866 priv->staging_rxon.cck_basic_rates =
2867 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2868
2869 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2870 priv->staging_rxon.ofdm_basic_rates =
2871 ((priv->active_rate_basic &
2872 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2873 IWL_FIRST_OFDM_RATE) & 0xFF;
2874 else
2875 priv->staging_rxon.ofdm_basic_rates =
2876 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2877}
2878
c79dd5b5 2879static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY		 2880{
2881 unsigned long flags;
2882
2883 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2884 return;
2885
2886 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2887 disable_radio ? "OFF" : "ON");
2888
2889 if (disable_radio) {
bb8c093b 2890 iwl4965_scan_cancel(priv);
b481de9c
ZY		 2891 /* FIXME: This is a workaround for AP */
2892 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2893 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2894 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 2895 CSR_UCODE_SW_BIT_RFKILL);
2896 spin_unlock_irqrestore(&priv->lock, flags);
bb8c093b 2897 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
b481de9c
ZY		 2898 set_bit(STATUS_RF_KILL_SW, &priv->status);
2899 }
2900 return;
2901 }
2902
2903 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2904 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 2905
2906 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2907 spin_unlock_irqrestore(&priv->lock, flags);
2908
2909 /* wake up ucode */
2910 msleep(10);
2911
2912 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH		 2913 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
2914 if (!iwl4965_grab_nic_access(priv))
2915 iwl4965_release_nic_access(priv);
b481de9c
ZY		 2916 spin_unlock_irqrestore(&priv->lock, flags);
2917
2918 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2919 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2920 "disabled by HW switch\n");
2921 return;
2922 }
2923
2924 queue_work(priv->workqueue, &priv->restart);
2925 return;
2926}
2927
c79dd5b5 2928void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
b481de9c
ZY		 2929 u32 decrypt_res, struct ieee80211_rx_status *stats)
2930{
2931 u16 fc =
2932 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2933
2934 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2935 return;
2936
2937 if (!(fc & IEEE80211_FCTL_PROTECTED))
2938 return;
2939
2940 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2941 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2942 case RX_RES_STATUS_SEC_TYPE_TKIP:
2943 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2944 RX_RES_STATUS_BAD_ICV_MIC)
2945 stats->flag |= RX_FLAG_MMIC_ERROR;
2946 case RX_RES_STATUS_SEC_TYPE_WEP:
2947 case RX_RES_STATUS_SEC_TYPE_CCMP:
2948 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2949 RX_RES_STATUS_DECRYPT_OK) {
2950 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2951 stats->flag |= RX_FLAG_DECRYPTED;
2952 }
2953 break;
2954
2955 default:
2956 break;
2957 }
2958}
2959
b481de9c
ZY		 2960
2961#define IWL_PACKET_RETRY_TIME HZ
2962
c79dd5b5 2963int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 2964{
2965 u16 sc = le16_to_cpu(header->seq_ctrl);
2966 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2967 u16 frag = sc & IEEE80211_SCTL_FRAG;
2968 u16 *last_seq, *last_frag;
2969 unsigned long *last_time;
2970
2971 switch (priv->iw_mode) {
2972 case IEEE80211_IF_TYPE_IBSS:{
2973 struct list_head *p;
bb8c093b 2974 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY		 2975 u8 *mac = header->addr2;
2976 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2977
2978 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 2979 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY		 2980 if (!compare_ether_addr(entry->mac, mac))
2981 break;
2982 }
2983 if (p == &priv->ibss_mac_hash[index]) {
2984 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2985 if (!entry) {
bc434dd2 2986 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY		 2987 return 0;
2988 }
2989 memcpy(entry->mac, mac, ETH_ALEN);
2990 entry->seq_num = seq;
2991 entry->frag_num = frag;
2992 entry->packet_time = jiffies;
bc434dd2 2993 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY		 2994 return 0;
2995 }
2996 last_seq = &entry->seq_num;
2997 last_frag = &entry->frag_num;
2998 last_time = &entry->packet_time;
2999 break;
3000 }
3001 case IEEE80211_IF_TYPE_STA:
3002 last_seq = &priv->last_seq_num;
3003 last_frag = &priv->last_frag_num;
3004 last_time = &priv->last_packet_time;
3005 break;
3006 default:
3007 return 0;
3008 }
3009 if ((*last_seq == seq) &&
3010 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3011 if (*last_frag == frag)
3012 goto drop;
3013 if (*last_frag + 1 != frag)
3014 /* out-of-order fragment */
3015 goto drop;
3016 } else
3017 *last_seq = seq;
3018
3019 *last_frag = frag;
3020 *last_time = jiffies;
3021 return 0;
3022
3023 drop:
3024 return 1;
3025}
3026
c8b0e6e1 3027#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 3028
3029#include "iwl-spectrum.h"
3030
3031#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3032#define BEACON_TIME_MASK_HIGH 0xFF000000
3033#define TIME_UNIT 1024
3034
3035/*
3036 * extended beacon time format
3037 * time in usec will be changed into a 32-bit value in 8:24 format
3038 * the high 1 byte is the beacon counts
3039 * the lower 3 bytes is the time in usec within one beacon interval
3040 */
3041
bb8c093b 3042static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY		 3043{
3044 u32 quot;
3045 u32 rem;
3046 u32 interval = beacon_interval * 1024;
3047
3048 if (!interval || !usec)
3049 return 0;
3050
3051 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3052 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3053
3054 return (quot << 24) + rem;
3055}
3056
3057/* base is usually what we get from ucode with each received frame,
3058 * the same as HW timer counter counting down
3059 */
3060
bb8c093b 3061static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY		 3062{
3063 u32 base_low = base & BEACON_TIME_MASK_LOW;
3064 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3065 u32 interval = beacon_interval * TIME_UNIT;
3066 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3067 (addon & BEACON_TIME_MASK_HIGH);
3068
3069 if (base_low > addon_low)
3070 res += base_low - addon_low;
3071 else if (base_low < addon_low) {
3072 res += interval + base_low - addon_low;
3073 res += (1 << 24);
3074 } else
3075 res += (1 << 24);
3076
3077 return cpu_to_le32(res);
3078}
3079
c79dd5b5 3080static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY		 3081 struct ieee80211_measurement_params *params,
3082 u8 type)
3083{
bb8c093b
CH		 3084 struct iwl4965_spectrum_cmd spectrum;
3085 struct iwl4965_rx_packet *res;
3086 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 3087 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3088 .data = (void *)&spectrum,
3089 .meta.flags = CMD_WANT_SKB,
3090 };
3091 u32 add_time = le64_to_cpu(params->start_time);
3092 int rc;
3093 int spectrum_resp_status;
3094 int duration = le16_to_cpu(params->duration);
3095
bb8c093b 3096 if (iwl4965_is_associated(priv))
b481de9c 3097 add_time =
bb8c093b 3098 iwl4965_usecs_to_beacons(
b481de9c
ZY		 3099 le64_to_cpu(params->start_time) - priv->last_tsf,
3100 le16_to_cpu(priv->rxon_timing.beacon_interval));
3101
3102 memset(&spectrum, 0, sizeof(spectrum));
3103
3104 spectrum.channel_count = cpu_to_le16(1);
3105 spectrum.flags =
3106 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3107 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3108 cmd.len = sizeof(spectrum);
3109 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3110
bb8c093b 3111 if (iwl4965_is_associated(priv))
b481de9c 3112 spectrum.start_time =
bb8c093b 3113 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY		 3114 add_time,
3115 le16_to_cpu(priv->rxon_timing.beacon_interval));
3116 else
3117 spectrum.start_time = 0;
3118
3119 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3120 spectrum.channels[0].channel = params->channel;
3121 spectrum.channels[0].type = type;
3122 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3123 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3124 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3125
bb8c093b 3126 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 3127 if (rc)
3128 return rc;
3129
bb8c093b 3130 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 3131 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3132 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3133 rc = -EIO;
3134 }
3135
3136 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3137 switch (spectrum_resp_status) {
3138 case 0: /* Command will be handled */
3139 if (res->u.spectrum.id != 0xff) {
3140 IWL_DEBUG_INFO
3141 ("Replaced existing measurement: %d\n",
3142 res->u.spectrum.id);
3143 priv->measurement_status &= ~MEASUREMENT_READY;
3144 }
3145 priv->measurement_status |= MEASUREMENT_ACTIVE;
3146 rc = 0;
3147 break;
3148
3149 case 1: /* Command will not be handled */
3150 rc = -EAGAIN;
3151 break;
3152 }
3153
3154 dev_kfree_skb_any(cmd.meta.u.skb);
3155
3156 return rc;
3157}
3158#endif
3159
c79dd5b5 3160static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
bb8c093b 3161 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY		 3162{
3163
3164 tx_sta->status.ack_signal = 0;
3165 tx_sta->status.excessive_retries = 0;
3166 tx_sta->status.queue_length = 0;
3167 tx_sta->status.queue_number = 0;
3168
3169 if (in_interrupt())
3170 ieee80211_tx_status_irqsafe(priv->hw,
3171 tx_sta->skb[0], &(tx_sta->status));
3172 else
3173 ieee80211_tx_status(priv->hw,
3174 tx_sta->skb[0], &(tx_sta->status));
3175
3176 tx_sta->skb[0] = NULL;
3177}
3178
3179/**
6440adb5 3180 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 3181 *
6440adb5
CB		 3182 * When FW advances 'R' index, all entries between old and new 'R' index
3183 * need to be reclaimed. As result, some free space forms. If there is
3184 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 3185 */
c79dd5b5 3186int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
b481de9c 3187{
bb8c093b
CH		 3188 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3189 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 3190 int nfreed = 0;
3191
3192 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3193 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3194 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 3195 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY		 3196 return 0;
3197 }
3198
c54b679d 3199 for (index = iwl_queue_inc_wrap(index, q->n_bd);
fc4b6853 3200 q->read_ptr != index;
c54b679d 3201 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 3202 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 3203 iwl4965_txstatus_to_ieee(priv,
fc4b6853 3204 &(txq->txb[txq->q.read_ptr]));
bb8c093b 3205 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY		 3206 } else if (nfreed > 1) {
3207 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 3208 q->write_ptr, q->read_ptr);
b481de9c
ZY		 3209 queue_work(priv->workqueue, &priv->restart);
3210 }
3211 nfreed++;
3212 }
3213
fe01b477 3214/* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY		 3215 (txq_id != IWL_CMD_QUEUE_NUM) &&
3216 priv->mac80211_registered)
fe01b477 3217 ieee80211_wake_queue(priv->hw, txq_id); */
b481de9c
ZY		 3218
3219
3220 return nfreed;
3221}
3222
bb8c093b 3223static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY		 3224{
3225 status &= TX_STATUS_MSK;
3226 return (status == TX_STATUS_SUCCESS)
3227 || (status == TX_STATUS_DIRECT_DONE);
3228}
3229
3230/******************************************************************************
3231 *
3232 * Generic RX handler implementations
3233 *
3234 ******************************************************************************/
c8b0e6e1 3235#ifdef CONFIG_IWL4965_HT
b481de9c 3236
c79dd5b5 3237static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
b481de9c
ZY		 3238 struct ieee80211_hdr *hdr)
3239{
3240 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3241 return IWL_AP_ID;
3242 else {
3243 u8 *da = ieee80211_get_DA(hdr);
bb8c093b 3244 return iwl4965_hw_find_station(priv, da);
b481de9c
ZY		 3245 }
3246}
3247
bb8c093b 3248static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
c79dd5b5 3249 struct iwl_priv *priv, int txq_id, int idx)
b481de9c
ZY		 3250{
3251 if (priv->txq[txq_id].txb[idx].skb[0])
3252 return (struct ieee80211_hdr *)priv->txq[txq_id].
3253 txb[idx].skb[0]->data;
3254 return NULL;
3255}
3256
bb8c093b 3257static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY		 3258{
3259 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3260 tx_resp->frame_count);
3261 return le32_to_cpu(*scd_ssn) & MAX_SN;
3262
3263}
6440adb5
CB		 3264
3265/**
3266 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3267 */
c79dd5b5 3268static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
bb8c093b 3269 struct iwl4965_ht_agg *agg,
fe01b477 3270 struct iwl4965_tx_resp_agg *tx_resp,
b481de9c
ZY		 3271 u16 start_idx)
3272{
fe01b477
RR		 3273 u16 status;
3274 struct agg_tx_status *frame_status = &tx_resp->status;
b481de9c
ZY		 3275 struct ieee80211_tx_status *tx_status = NULL;
3276 struct ieee80211_hdr *hdr = NULL;
3277 int i, sh;
3278 int txq_id, idx;
3279 u16 seq;
3280
3281 if (agg->wait_for_ba)
6440adb5 3282 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY		 3283
3284 agg->frame_count = tx_resp->frame_count;
3285 agg->start_idx = start_idx;
3286 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 3287 agg->bitmap = 0;
b481de9c 3288
6440adb5 3289 /* # frames attempted by Tx command */
b481de9c 3290 if (agg->frame_count == 1) {
6440adb5 3291 /* Only one frame was attempted; no block-ack will arrive */
fe01b477
RR		 3292 status = le16_to_cpu(frame_status[0].status);
3293 seq = le16_to_cpu(frame_status[0].sequence);
3294 idx = SEQ_TO_INDEX(seq);
3295 txq_id = SEQ_TO_QUEUE(seq);
b481de9c 3296
b481de9c 3297 /* FIXME: code repetition */
fe01b477
RR		 3298 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3299 agg->frame_count, agg->start_idx, idx);
b481de9c 3300
fe01b477 3301 tx_status = &(priv->txq[txq_id].txb[idx].status);
b481de9c
ZY		 3302 tx_status->retry_count = tx_resp->failure_frame;
3303 tx_status->queue_number = status & 0xff;
fe01b477
RR		 3304 tx_status->queue_length = tx_resp->failure_rts;
3305 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
bb8c093b 3306 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c 3307 IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 3308 iwl4965_hwrate_to_tx_control(priv,
3309 le32_to_cpu(tx_resp->rate_n_flags),
3310 &tx_status->control);
b481de9c
ZY		 3311 /* FIXME: code repetition end */
3312
3313 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3314 status & 0xff, tx_resp->failure_frame);
3315 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 3316 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY		 3317
3318 agg->wait_for_ba = 0;
3319 } else {
6440adb5 3320 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY		 3321 u64 bitmap = 0;
3322 int start = agg->start_idx;
3323
6440adb5 3324 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY		 3325 for (i = 0; i < agg->frame_count; i++) {
3326 u16 sc;
fe01b477
RR		 3327 status = le16_to_cpu(frame_status[i].status);
3328 seq = le16_to_cpu(frame_status[i].sequence);
b481de9c
ZY		 3329 idx = SEQ_TO_INDEX(seq);
3330 txq_id = SEQ_TO_QUEUE(seq);
3331
3332 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3333 AGG_TX_STATE_ABORT_MSK))
3334 continue;
3335
3336 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3337 agg->frame_count, txq_id, idx);
3338
bb8c093b 3339 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY		 3340
3341 sc = le16_to_cpu(hdr->seq_ctrl);
3342 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3343 IWL_ERROR("BUG_ON idx doesn't match seq control"
3344 " idx=%d, seq_idx=%d, seq=%d\n",
3345 idx, SEQ_TO_SN(sc),
3346 hdr->seq_ctrl);
3347 return -1;
3348 }
3349
3350 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3351 i, idx, SEQ_TO_SN(sc));
3352
3353 sh = idx - start;
3354 if (sh > 64) {
3355 sh = (start - idx) + 0xff;
3356 bitmap = bitmap << sh;
3357 sh = 0;
3358 start = idx;
3359 } else if (sh < -64)
3360 sh = 0xff - (start - idx);
3361 else if (sh < 0) {
3362 sh = start - idx;
3363 start = idx;
3364 bitmap = bitmap << sh;
3365 sh = 0;
3366 }
3367 bitmap |= (1 << sh);
3368 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3369 start, (u32)(bitmap & 0xFFFFFFFF));
3370 }
3371
fe01b477 3372 agg->bitmap = bitmap;
b481de9c
ZY		 3373 agg->start_idx = start;
3374 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 3375 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
b481de9c 3376 agg->frame_count, agg->start_idx,
fe01b477 3377 agg->bitmap);
b481de9c
ZY		 3378
3379 if (bitmap)
3380 agg->wait_for_ba = 1;
3381 }
3382 return 0;
3383}
3384#endif
b481de9c 3385
6440adb5
CB		 3386/**
3387 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3388 */
c79dd5b5 3389static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
bb8c093b 3390 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3391{
bb8c093b 3392 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3393 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3394 int txq_id = SEQ_TO_QUEUE(sequence);
3395 int index = SEQ_TO_INDEX(sequence);
bb8c093b 3396 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 3397 struct ieee80211_tx_status *tx_status;
bb8c093b 3398 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 3399 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1 3400#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 3401 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3402 struct ieee80211_hdr *hdr;
3403 __le16 *qc;
b481de9c
ZY		 3404#endif
3405
3406 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3407 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3408 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW		 3409 index, txq->q.n_bd, txq->q.write_ptr,
3410 txq->q.read_ptr);
b481de9c
ZY		 3411 return;
3412 }
3413
c8b0e6e1 3414#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 3415 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3416 qc = ieee80211_get_qos_ctrl(hdr);
3417
3418 if (qc)
3419 tid = le16_to_cpu(*qc) & 0xf;
3420
3421 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
3422 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3423 IWL_ERROR("Station not known\n");
3424 return;
3425 }
3426
b481de9c 3427 if (txq->sched_retry) {
bb8c093b 3428 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
bb8c093b 3429 struct iwl4965_ht_agg *agg = NULL;
b481de9c 3430
fe01b477 3431 if (!qc)
b481de9c 3432 return;
b481de9c
ZY		 3433
3434 agg = &priv->stations[sta_id].tid[tid].agg;
3435
fe01b477
RR		 3436 iwl4965_tx_status_reply_tx(priv, agg,
3437 (struct iwl4965_tx_resp_agg *)tx_resp, index);
b481de9c
ZY		 3438
3439 if ((tx_resp->frame_count == 1) &&
bb8c093b 3440 !iwl4965_is_tx_success(status)) {
b481de9c
ZY		 3441 /* TODO: send BAR */
3442 }
3443
fe01b477
RR		 3444 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3445 int freed;
c54b679d 3446 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY		 3447 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3448 "%d index %d\n", scd_ssn , index);
fe01b477
RR		 3449 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3450 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3451
3452 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3453 txq_id >= 0 && priv->mac80211_registered &&
3454 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3455 ieee80211_wake_queue(priv->hw, txq_id);
3456
3457 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
b481de9c
ZY		 3458 }
3459 } else {
c8b0e6e1 3460#endif /* CONFIG_IWL4965_HT */
fc4b6853 3461 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY		 3462
3463 tx_status->retry_count = tx_resp->failure_frame;
3464 tx_status->queue_number = status;
3465 tx_status->queue_length = tx_resp->bt_kill_count;
3466 tx_status->queue_length |= tx_resp->failure_rts;
b481de9c 3467 tx_status->flags =
bb8c093b 3468 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 3469 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
3470 &tx_status->control);
b481de9c 3471
b481de9c 3472 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 3473 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY		 3474 status, le32_to_cpu(tx_resp->rate_n_flags),
3475 tx_resp->failure_frame);
3476
3477 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
fe01b477
RR		 3478 if (index != -1) {
3479 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3480#ifdef CONFIG_IWL4965_HT
3481 if (tid != MAX_TID_COUNT)
3482 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3483 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3484 (txq_id >= 0) &&
3485 priv->mac80211_registered)
3486 ieee80211_wake_queue(priv->hw, txq_id);
3487 if (tid != MAX_TID_COUNT)
3488 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
3489#endif
3490 }
c8b0e6e1 3491#ifdef CONFIG_IWL4965_HT
b481de9c 3492 }
c8b0e6e1 3493#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 3494
3495 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3496 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3497}
3498
3499
c79dd5b5 3500static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
bb8c093b 3501 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3502{
bb8c093b
CH		 3503 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3504 struct iwl4965_alive_resp *palive;
b481de9c
ZY		 3505 struct delayed_work *pwork;
3506
3507 palive = &pkt->u.alive_frame;
3508
3509 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3510 "0x%01X 0x%01X\n",
3511 palive->is_valid, palive->ver_type,
3512 palive->ver_subtype);
3513
3514 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3515 IWL_DEBUG_INFO("Initialization Alive received.\n");
3516 memcpy(&priv->card_alive_init,
3517 &pkt->u.alive_frame,
bb8c093b 3518 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY		 3519 pwork = &priv->init_alive_start;
3520 } else {
3521 IWL_DEBUG_INFO("Runtime Alive received.\n");
3522 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 3523 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 3524 pwork = &priv->alive_start;
3525 }
3526
3527 /* We delay the ALIVE response by 5ms to
3528 * give the HW RF Kill time to activate... */
3529 if (palive->is_valid == UCODE_VALID_OK)
3530 queue_delayed_work(priv->workqueue, pwork,
3531 msecs_to_jiffies(5));
3532 else
3533 IWL_WARNING("uCode did not respond OK.\n");
3534}
3535
c79dd5b5 3536static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
bb8c093b 3537 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3538{
bb8c093b 3539 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3540
3541 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3542 return;
3543}
3544
c79dd5b5 3545static void iwl4965_rx_reply_error(struct iwl_priv *priv,
bb8c093b 3546 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3547{
bb8c093b 3548 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3549
3550 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3551 "seq 0x%04X ser 0x%08X\n",
3552 le32_to_cpu(pkt->u.err_resp.error_type),
3553 get_cmd_string(pkt->u.err_resp.cmd_id),
3554 pkt->u.err_resp.cmd_id,
3555 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3556 le32_to_cpu(pkt->u.err_resp.error_info));
3557}
3558
3559#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3560
c79dd5b5 3561static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3562{
bb8c093b
CH		 3563 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3564 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3565 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 3566 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3567 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3568 rxon->channel = csa->channel;
3569 priv->staging_rxon.channel = csa->channel;
3570}
3571
c79dd5b5 3572static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
bb8c093b 3573 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3574{
c8b0e6e1 3575#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH		 3576 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3577 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY		 3578
3579 if (!report->state) {
3580 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3581 "Spectrum Measure Notification: Start\n");
3582 return;
3583 }
3584
3585 memcpy(&priv->measure_report, report, sizeof(*report));
3586 priv->measurement_status |= MEASUREMENT_READY;
3587#endif
3588}
3589
c79dd5b5 3590static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
bb8c093b 3591 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3592{
0a6857e7 3593#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3594 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3595 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 3596 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3597 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3598#endif
3599}
3600
c79dd5b5 3601static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
bb8c093b 3602 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3603{
bb8c093b 3604 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3605 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3606 "notification for %s:\n",
3607 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
0a6857e7 3608 iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 3609}
3610
bb8c093b 3611static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 3612{
c79dd5b5
TW		 3613 struct iwl_priv *priv =
3614 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 3615 struct sk_buff *beacon;
3616
3617 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
32bfd35d 3618 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
b481de9c
ZY		 3619
3620 if (!beacon) {
3621 IWL_ERROR("update beacon failed\n");
3622 return;
3623 }
3624
3625 mutex_lock(&priv->mutex);
3626 /* new beacon skb is allocated every time; dispose previous.*/
3627 if (priv->ibss_beacon)
3628 dev_kfree_skb(priv->ibss_beacon);
3629
3630 priv->ibss_beacon = beacon;
3631 mutex_unlock(&priv->mutex);
3632
bb8c093b 3633 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 3634}
3635
c79dd5b5 3636static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
bb8c093b 3637 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3638{
0a6857e7 3639#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3640 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3641 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3642 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 3643
3644 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3645 "tsf %d %d rate %d\n",
3646 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3647 beacon->beacon_notify_hdr.failure_frame,
3648 le32_to_cpu(beacon->ibss_mgr_status),
3649 le32_to_cpu(beacon->high_tsf),
3650 le32_to_cpu(beacon->low_tsf), rate);
3651#endif
3652
3653 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3654 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3655 queue_work(priv->workqueue, &priv->beacon_update);
3656}
3657
3658/* Service response to REPLY_SCAN_CMD (0x80) */
c79dd5b5 3659static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
bb8c093b 3660 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3661{
0a6857e7 3662#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3663 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3664 struct iwl4965_scanreq_notification *notif =
3665 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY		 3666
3667 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3668#endif
3669}
3670
3671/* Service SCAN_START_NOTIFICATION (0x82) */
c79dd5b5 3672static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
bb8c093b 3673 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3674{
bb8c093b
CH		 3675 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3676 struct iwl4965_scanstart_notification *notif =
3677 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY		 3678 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3679 IWL_DEBUG_SCAN("Scan start: "
3680 "%d [802.11%s] "
3681 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3682 notif->channel,
3683 notif->band ? "bg" : "a",
3684 notif->tsf_high,
3685 notif->tsf_low, notif->status, notif->beacon_timer);
3686}
3687
3688/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
c79dd5b5 3689static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
bb8c093b 3690 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3691{
bb8c093b
CH		 3692 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3693 struct iwl4965_scanresults_notification *notif =
3694 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY		 3695
3696 IWL_DEBUG_SCAN("Scan ch.res: "
3697 "%d [802.11%s] "
3698 "(TSF: 0x%08X:%08X) - %d "
3699 "elapsed=%lu usec (%dms since last)\n",
3700 notif->channel,
3701 notif->band ? "bg" : "a",
3702 le32_to_cpu(notif->tsf_high),
3703 le32_to_cpu(notif->tsf_low),
3704 le32_to_cpu(notif->statistics[0]),
3705 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3706 jiffies_to_msecs(elapsed_jiffies
3707 (priv->last_scan_jiffies, jiffies)));
3708
3709 priv->last_scan_jiffies = jiffies;
7878a5a4 3710 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3711}
3712
3713/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
c79dd5b5 3714static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
bb8c093b 3715 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3716{
bb8c093b
CH		 3717 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3718 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY		 3719
3720 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3721 scan_notif->scanned_channels,
3722 scan_notif->tsf_low,
3723 scan_notif->tsf_high, scan_notif->status);
3724
3725 /* The HW is no longer scanning */
3726 clear_bit(STATUS_SCAN_HW, &priv->status);
3727
3728 /* The scan completion notification came in, so kill that timer... */
3729 cancel_delayed_work(&priv->scan_check);
3730
3731 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3732 (priv->scan_bands == 2) ? "2.4" : "5.2",
3733 jiffies_to_msecs(elapsed_jiffies
3734 (priv->scan_pass_start, jiffies)));
3735
3736 /* Remove this scanned band from the list
3737 * of pending bands to scan */
3738 priv->scan_bands--;
3739
3740 /* If a request to abort was given, or the scan did not succeed
3741 * then we reset the scan state machine and terminate,
3742 * re-queuing another scan if one has been requested */
3743 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3744 IWL_DEBUG_INFO("Aborted scan completed.\n");
3745 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3746 } else {
3747 /* If there are more bands on this scan pass reschedule */
3748 if (priv->scan_bands > 0)
3749 goto reschedule;
3750 }
3751
3752 priv->last_scan_jiffies = jiffies;
7878a5a4 3753 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3754 IWL_DEBUG_INFO("Setting scan to off\n");
3755
3756 clear_bit(STATUS_SCANNING, &priv->status);
3757
3758 IWL_DEBUG_INFO("Scan took %dms\n",
3759 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3760
3761 queue_work(priv->workqueue, &priv->scan_completed);
3762
3763 return;
3764
3765reschedule:
3766 priv->scan_pass_start = jiffies;
3767 queue_work(priv->workqueue, &priv->request_scan);
3768}
3769
3770/* Handle notification from uCode that card's power state is changing
3771 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 3772static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
bb8c093b 3773 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3774{
bb8c093b 3775 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3776 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3777 unsigned long status = priv->status;
3778
3779 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3780 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3781 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3782
3783 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3784 RF_CARD_DISABLED)) {
3785
bb8c093b 3786 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 3787 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3788
bb8c093b
CH		 3789 if (!iwl4965_grab_nic_access(priv)) {
3790 iwl4965_write_direct32(
b481de9c
ZY		 3791 priv, HBUS_TARG_MBX_C,
3792 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3793
bb8c093b 3794 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3795 }
3796
3797 if (!(flags & RXON_CARD_DISABLED)) {
bb8c093b 3798 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 3799 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
bb8c093b
CH		 3800 if (!iwl4965_grab_nic_access(priv)) {
3801 iwl4965_write_direct32(
b481de9c
ZY		 3802 priv, HBUS_TARG_MBX_C,
3803 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3804
bb8c093b 3805 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3806 }
3807 }
3808
3809 if (flags & RF_CARD_DISABLED) {
bb8c093b 3810 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 3811 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
bb8c093b
CH		 3812 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3813 if (!iwl4965_grab_nic_access(priv))
3814 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3815 }
3816 }
3817
3818 if (flags & HW_CARD_DISABLED)
3819 set_bit(STATUS_RF_KILL_HW, &priv->status);
3820 else
3821 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3822
3823
3824 if (flags & SW_CARD_DISABLED)
3825 set_bit(STATUS_RF_KILL_SW, &priv->status);
3826 else
3827 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3828
3829 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 3830 iwl4965_scan_cancel(priv);
b481de9c
ZY		 3831
3832 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3833 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3834 (test_bit(STATUS_RF_KILL_SW, &status) !=
3835 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3836 queue_work(priv->workqueue, &priv->rf_kill);
3837 else
3838 wake_up_interruptible(&priv->wait_command_queue);
3839}
3840
3841/**
bb8c093b 3842 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 3843 *
3844 * Setup the RX handlers for each of the reply types sent from the uCode
3845 * to the host.
3846 *
3847 * This function chains into the hardware specific files for them to setup
3848 * any hardware specific handlers as well.
3849 */
c79dd5b5 3850static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 3851{
bb8c093b
CH		 3852 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
3853 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
3854 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
3855 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 3856 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH		 3857 iwl4965_rx_spectrum_measure_notif;
3858 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 3859 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH		 3860 iwl4965_rx_pm_debug_statistics_notif;
3861 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 3862
9fbab516
BC		 3863 /*
3864 * The same handler is used for both the REPLY to a discrete
3865 * statistics request from the host as well as for the periodic
3866 * statistics notifications (after received beacons) from the uCode.
b481de9c 3867 */
bb8c093b
CH		 3868 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
3869 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 3870
bb8c093b
CH		 3871 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
3872 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 3873 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 3874 iwl4965_rx_scan_results_notif;
b481de9c 3875 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH		 3876 iwl4965_rx_scan_complete_notif;
3877 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
3878 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 3879
9fbab516 3880 /* Set up hardware specific Rx handlers */
bb8c093b 3881 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY		 3882}
3883
3884/**
bb8c093b 3885 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY		 3886 * @rxb: Rx buffer to reclaim
3887 *
3888 * If an Rx buffer has an async callback associated with it the callback
3889 * will be executed. The attached skb (if present) will only be freed
3890 * if the callback returns 1
3891 */
c79dd5b5 3892static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
bb8c093b 3893 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3894{
bb8c093b 3895 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 3896 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3897 int txq_id = SEQ_TO_QUEUE(sequence);
3898 int index = SEQ_TO_INDEX(sequence);
3899 int huge = sequence & SEQ_HUGE_FRAME;
3900 int cmd_index;
bb8c093b 3901 struct iwl4965_cmd *cmd;
b481de9c
ZY		 3902
3903 /* If a Tx command is being handled and it isn't in the actual
3904 * command queue then there a command routing bug has been introduced
3905 * in the queue management code. */
3906 if (txq_id != IWL_CMD_QUEUE_NUM)
3907 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3908 txq_id, pkt->hdr.cmd);
3909 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3910
3911 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3912 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3913
3914 /* Input error checking is done when commands are added to queue. */
3915 if (cmd->meta.flags & CMD_WANT_SKB) {
3916 cmd->meta.source->u.skb = rxb->skb;
3917 rxb->skb = NULL;
3918 } else if (cmd->meta.u.callback &&
3919 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3920 rxb->skb = NULL;
3921
bb8c093b 3922 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY		 3923
3924 if (!(cmd->meta.flags & CMD_ASYNC)) {
3925 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3926 wake_up_interruptible(&priv->wait_command_queue);
3927 }
3928}
3929
3930/************************** RX-FUNCTIONS ****************************/
3931/*
3932 * Rx theory of operation
3933 *
9fbab516
BC		 3934 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
3935 * each of which point to Receive Buffers to be filled by 4965. These get
3936 * used not only for Rx frames, but for any command response or notification
3937 * from the 4965. The driver and 4965 manage the Rx buffers by means
3938 * of indexes into the circular buffer.
b481de9c
ZY		 3939 *
3940 * Rx Queue Indexes
3941 * The host/firmware share two index registers for managing the Rx buffers.
3942 *
3943 * The READ index maps to the first position that the firmware may be writing
3944 * to -- the driver can read up to (but not including) this position and get
3945 * good data.
3946 * The READ index is managed by the firmware once the card is enabled.
3947 *
3948 * The WRITE index maps to the last position the driver has read from -- the
3949 * position preceding WRITE is the last slot the firmware can place a packet.
3950 *
3951 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3952 * WRITE = READ.
3953 *
9fbab516 3954 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY		 3955 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3956 *
9fbab516 3957 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY		 3958 * and fire the RX interrupt. The driver can then query the READ index and
3959 * process as many packets as possible, moving the WRITE index forward as it
3960 * resets the Rx queue buffers with new memory.
3961 *
3962 * The management in the driver is as follows:
3963 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3964 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 3965 * to replenish the iwl->rxq->rx_free.
bb8c093b 3966 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY		 3967 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3968 * 'processed' and 'read' driver indexes as well)
3969 * + A received packet is processed and handed to the kernel network stack,
3970 * detached from the iwl->rxq. The driver 'processed' index is updated.
3971 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3972 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3973 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3974 * were enough free buffers and RX_STALLED is set it is cleared.
3975 *
3976 *
3977 * Driver sequence:
3978 *
9fbab516
BC		 3979 * iwl4965_rx_queue_alloc() Allocates rx_free
3980 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 3981 * iwl4965_rx_queue_restock
9fbab516 3982 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY		 3983 * queue, updates firmware pointers, and updates
3984 * the WRITE index. If insufficient rx_free buffers
bb8c093b 3985 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY		 3986 *
3987 * -- enable interrupts --
9fbab516 3988 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY		 3989 * READ INDEX, detaching the SKB from the pool.
3990 * Moves the packet buffer from queue to rx_used.
bb8c093b 3991 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY		 3992 * slots.
3993 * ...
3994 *
3995 */
3996
3997/**
bb8c093b 3998 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 3999 */
bb8c093b 4000static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY		 4001{
4002 int s = q->read - q->write;
4003 if (s <= 0)
4004 s += RX_QUEUE_SIZE;
4005 /* keep some buffer to not confuse full and empty queue */
4006 s -= 2;
4007 if (s < 0)
4008 s = 0;
4009 return s;
4010}
4011
4012/**
bb8c093b 4013 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 4014 */
c79dd5b5 4015int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY		 4016{
4017 u32 reg = 0;
4018 int rc = 0;
4019 unsigned long flags;
4020
4021 spin_lock_irqsave(&q->lock, flags);
4022
4023 if (q->need_update == 0)
4024 goto exit_unlock;
4025
6440adb5 4026 /* If power-saving is in use, make sure device is awake */
b481de9c 4027 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
bb8c093b 4028 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 4029
4030 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
bb8c093b 4031 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 4032 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4033 goto exit_unlock;
4034 }
4035
bb8c093b 4036 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4037 if (rc)
4038 goto exit_unlock;
4039
6440adb5 4040 /* Device expects a multiple of 8 */
bb8c093b 4041 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 4042 q->write & ~0x7);
bb8c093b 4043 iwl4965_release_nic_access(priv);
6440adb5
CB		 4044
4045 /* Else device is assumed to be awake */
b481de9c 4046 } else
6440adb5 4047 /* Device expects a multiple of 8 */
bb8c093b 4048 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY		 4049
4050
4051 q->need_update = 0;
4052
4053 exit_unlock:
4054 spin_unlock_irqrestore(&q->lock, flags);
4055 return rc;
4056}
4057
4058/**
9fbab516 4059 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 4060 */
c79dd5b5 4061static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY		 4062 dma_addr_t dma_addr)
4063{
4064 return cpu_to_le32((u32)(dma_addr >> 8));
4065}
4066
4067
4068/**
bb8c093b 4069 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 4070 *
9fbab516 4071 * If there are slots in the RX queue that need to be restocked,
b481de9c 4072 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 4073 * as we can, pulling from rx_free.
b481de9c
ZY		 4074 *
4075 * This moves the 'write' index forward to catch up with 'processed', and
4076 * also updates the memory address in the firmware to reference the new
4077 * target buffer.
4078 */
c79dd5b5 4079static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
b481de9c 4080{
bb8c093b 4081 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 4082 struct list_head *element;
bb8c093b 4083 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 4084 unsigned long flags;
4085 int write, rc;
4086
4087 spin_lock_irqsave(&rxq->lock, flags);
4088 write = rxq->write & ~0x7;
bb8c093b 4089 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 4090 /* Get next free Rx buffer, remove from free list */
b481de9c 4091 element = rxq->rx_free.next;
bb8c093b 4092 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 4093 list_del(element);
6440adb5
CB		 4094
4095 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 4096 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY		 4097 rxq->queue[rxq->write] = rxb;
4098 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4099 rxq->free_count--;
4100 }
4101 spin_unlock_irqrestore(&rxq->lock, flags);
4102 /* If the pre-allocated buffer pool is dropping low, schedule to
4103 * refill it */
4104 if (rxq->free_count <= RX_LOW_WATERMARK)
4105 queue_work(priv->workqueue, &priv->rx_replenish);
4106
4107
6440adb5
CB		 4108 /* If we've added more space for the firmware to place data, tell it.
4109 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY		 4110 if ((write != (rxq->write & ~0x7))
4111 || (abs(rxq->write - rxq->read) > 7)) {
4112 spin_lock_irqsave(&rxq->lock, flags);
4113 rxq->need_update = 1;
4114 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 4115 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY		 4116 if (rc)
4117 return rc;
4118 }
4119
4120 return 0;
4121}
4122
4123/**
bb8c093b 4124 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY		 4125 *
4126 * When moving to rx_free an SKB is allocated for the slot.
4127 *
bb8c093b 4128 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 4129 * This is called as a scheduled work item (except for during initialization)
b481de9c 4130 */
c79dd5b5 4131static void iwl4965_rx_allocate(struct iwl_priv *priv)
b481de9c 4132{
bb8c093b 4133 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 4134 struct list_head *element;
bb8c093b 4135 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 4136 unsigned long flags;
4137 spin_lock_irqsave(&rxq->lock, flags);
4138 while (!list_empty(&rxq->rx_used)) {
4139 element = rxq->rx_used.next;
bb8c093b 4140 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
CB		 4141
4142 /* Alloc a new receive buffer */
b481de9c 4143 rxb->skb =
9ee1ba47
RR		 4144 alloc_skb(priv->hw_setting.rx_buf_size,
4145 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY		 4146 if (!rxb->skb) {
4147 if (net_ratelimit())
4148 printk(KERN_CRIT DRV_NAME
4149 ": Can not allocate SKB buffers\n");
4150 /* We don't reschedule replenish work here -- we will
4151 * call the restock method and if it still needs
4152 * more buffers it will schedule replenish */
4153 break;
4154 }
4155 priv->alloc_rxb_skb++;
4156 list_del(element);
6440adb5
CB		 4157
4158 /* Get physical address of RB/SKB */
b481de9c
ZY		 4159 rxb->dma_addr =
4160 pci_map_single(priv->pci_dev, rxb->skb->data,
9ee1ba47 4161 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4162 list_add_tail(&rxb->list, &rxq->rx_free);
4163 rxq->free_count++;
4164 }
4165 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA		 4166}
4167
4168/*
4169 * this should be called while priv->lock is locked
4170*/
4fd1f841 4171static void __iwl4965_rx_replenish(void *data)
5c0eef96 4172{
c79dd5b5 4173 struct iwl_priv *priv = data;
5c0eef96
MA		 4174
4175 iwl4965_rx_allocate(priv);
4176 iwl4965_rx_queue_restock(priv);
4177}
4178
4179
4180void iwl4965_rx_replenish(void *data)
4181{
c79dd5b5 4182 struct iwl_priv *priv = data;
5c0eef96
MA		 4183 unsigned long flags;
4184
4185 iwl4965_rx_allocate(priv);
b481de9c
ZY		 4186
4187 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 4188 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 4189 spin_unlock_irqrestore(&priv->lock, flags);
4190}
4191
4192/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 4193 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY		 4194 * This free routine walks the list of POOL entries and if SKB is set to
4195 * non NULL it is unmapped and freed
4196 */
c79dd5b5 4197static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 4198{
4199 int i;
4200 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4201 if (rxq->pool[i].skb != NULL) {
4202 pci_unmap_single(priv->pci_dev,
4203 rxq->pool[i].dma_addr,
9ee1ba47
RR		 4204 priv->hw_setting.rx_buf_size,
4205 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4206 dev_kfree_skb(rxq->pool[i].skb);
4207 }
4208 }
4209
4210 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4211 rxq->dma_addr);
4212 rxq->bd = NULL;
4213}
4214
c79dd5b5 4215int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
b481de9c 4216{
bb8c093b 4217 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 4218 struct pci_dev *dev = priv->pci_dev;
4219 int i;
4220
4221 spin_lock_init(&rxq->lock);
4222 INIT_LIST_HEAD(&rxq->rx_free);
4223 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
CB		 4224
4225 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY		 4226 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4227 if (!rxq->bd)
4228 return -ENOMEM;
6440adb5 4229
b481de9c
ZY		 4230 /* Fill the rx_used queue with _all_ of the Rx buffers */
4231 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4232 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 4233
b481de9c
ZY		 4234 /* Set us so that we have processed and used all buffers, but have
4235 * not restocked the Rx queue with fresh buffers */
4236 rxq->read = rxq->write = 0;
4237 rxq->free_count = 0;
4238 rxq->need_update = 0;
4239 return 0;
4240}
4241
c79dd5b5 4242void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 4243{
4244 unsigned long flags;
4245 int i;
4246 spin_lock_irqsave(&rxq->lock, flags);
4247 INIT_LIST_HEAD(&rxq->rx_free);
4248 INIT_LIST_HEAD(&rxq->rx_used);
4249 /* Fill the rx_used queue with _all_ of the Rx buffers */
4250 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4251 /* In the reset function, these buffers may have been allocated
4252 * to an SKB, so we need to unmap and free potential storage */
4253 if (rxq->pool[i].skb != NULL) {
4254 pci_unmap_single(priv->pci_dev,
4255 rxq->pool[i].dma_addr,
9ee1ba47
RR		 4256 priv->hw_setting.rx_buf_size,
4257 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4258 priv->alloc_rxb_skb--;
4259 dev_kfree_skb(rxq->pool[i].skb);
4260 rxq->pool[i].skb = NULL;
4261 }
4262 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4263 }
4264
4265 /* Set us so that we have processed and used all buffers, but have
4266 * not restocked the Rx queue with fresh buffers */
4267 rxq->read = rxq->write = 0;
4268 rxq->free_count = 0;
4269 spin_unlock_irqrestore(&rxq->lock, flags);
4270}
4271
4272/* Convert linear signal-to-noise ratio into dB */
4273static u8 ratio2dB[100] = {
4274/* 0 1 2 3 4 5 6 7 8 9 */
4275 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4276 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4277 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4278 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4279 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4280 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4281 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4282 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4283 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4284 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4285};
4286
4287/* Calculates a relative dB value from a ratio of linear
4288 * (i.e. not dB) signal levels.
4289 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 4290int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 4291{
c899a575
AB		 4292 /* 1000:1 or higher just report as 60 dB */
4293 if (sig_ratio >= 1000)
b481de9c
ZY		 4294 return 60;
4295
c899a575 4296 /* 100:1 or higher, divide by 10 and use table,
b481de9c 4297 * add 20 dB to make up for divide by 10 */
c899a575 4298 if (sig_ratio >= 100)
b481de9c
ZY		 4299 return (20 + (int)ratio2dB[sig_ratio/10]);
4300
4301 /* We shouldn't see this */
4302 if (sig_ratio < 1)
4303 return 0;
4304
4305 /* Use table for ratios 1:1 - 99:1 */
4306 return (int)ratio2dB[sig_ratio];
4307}
4308
4309#define PERFECT_RSSI (-20) /* dBm */
4310#define WORST_RSSI (-95) /* dBm */
4311#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4312
4313/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4314 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4315 * about formulas used below. */
bb8c093b 4316int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY		 4317{
4318 int sig_qual;
4319 int degradation = PERFECT_RSSI - rssi_dbm;
4320
4321 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4322 * as indicator; formula is (signal dbm - noise dbm).
4323 * SNR at or above 40 is a great signal (100%).
4324 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4325 * Weakest usable signal is usually 10 - 15 dB SNR. */
4326 if (noise_dbm) {
4327 if (rssi_dbm - noise_dbm >= 40)
4328 return 100;
4329 else if (rssi_dbm < noise_dbm)
4330 return 0;
4331 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4332
4333 /* Else use just the signal level.
4334 * This formula is a least squares fit of data points collected and
4335 * compared with a reference system that had a percentage (%) display
4336 * for signal quality. */
4337 } else
4338 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4339 (15 * RSSI_RANGE + 62 * degradation)) /
4340 (RSSI_RANGE * RSSI_RANGE);
4341
4342 if (sig_qual > 100)
4343 sig_qual = 100;
4344 else if (sig_qual < 1)
4345 sig_qual = 0;
4346
4347 return sig_qual;
4348}
4349
4350/**
9fbab516 4351 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 4352 *
4353 * Uses the priv->rx_handlers callback function array to invoke
4354 * the appropriate handlers, including command responses,
4355 * frame-received notifications, and other notifications.
4356 */
c79dd5b5 4357static void iwl4965_rx_handle(struct iwl_priv *priv)
b481de9c 4358{
bb8c093b
CH		 4359 struct iwl4965_rx_mem_buffer *rxb;
4360 struct iwl4965_rx_packet *pkt;
4361 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 4362 u32 r, i;
4363 int reclaim;
4364 unsigned long flags;
5c0eef96 4365 u8 fill_rx = 0;
d68ab680 4366 u32 count = 8;
b481de9c 4367
6440adb5
CB		 4368 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4369 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 4370 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY		 4371 i = rxq->read;
4372
4373 /* Rx interrupt, but nothing sent from uCode */
4374 if (i == r)
4375 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4376
5c0eef96
MA		 4377 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4378 fill_rx = 1;
4379
b481de9c
ZY		 4380 while (i != r) {
4381 rxb = rxq->queue[i];
4382
9fbab516 4383 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 4384 * then a bug has been introduced in the queue refilling
4385 * routines -- catch it here */
4386 BUG_ON(rxb == NULL);
4387
4388 rxq->queue[i] = NULL;
4389
4390 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
9ee1ba47 4391 priv->hw_setting.rx_buf_size,
b481de9c 4392 PCI_DMA_FROMDEVICE);
bb8c093b 4393 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 4394
4395 /* Reclaim a command buffer only if this packet is a response
4396 * to a (driver-originated) command.
4397 * If the packet (e.g. Rx frame) originated from uCode,
4398 * there is no command buffer to reclaim.
4399 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4400 * but apparently a few don't get set; catch them here. */
4401 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4402 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4403 (pkt->hdr.cmd != REPLY_4965_RX) &&
cfe01709 4404 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 4405 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4406 (pkt->hdr.cmd != REPLY_TX);
4407
4408 /* Based on type of command response or notification,
4409 * handle those that need handling via function in
bb8c093b 4410 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY		 4411 if (priv->rx_handlers[pkt->hdr.cmd]) {
4412 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4413 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4414 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4415 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4416 } else {
4417 /* No handling needed */
4418 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4419 "r %d i %d No handler needed for %s, 0x%02x\n",
4420 r, i, get_cmd_string(pkt->hdr.cmd),
4421 pkt->hdr.cmd);
4422 }
4423
4424 if (reclaim) {
9fbab516
BC		 4425 /* Invoke any callbacks, transfer the skb to caller, and
4426 * fire off the (possibly) blocking iwl4965_send_cmd()
b481de9c
ZY		 4427 * as we reclaim the driver command queue */
4428 if (rxb && rxb->skb)
bb8c093b 4429 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY		 4430 else
4431 IWL_WARNING("Claim null rxb?\n");
4432 }
4433
4434 /* For now we just don't re-use anything. We can tweak this
4435 * later to try and re-use notification packets and SKBs that
4436 * fail to Rx correctly */
4437 if (rxb->skb != NULL) {
4438 priv->alloc_rxb_skb--;
4439 dev_kfree_skb_any(rxb->skb);
4440 rxb->skb = NULL;
4441 }
4442
4443 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
9ee1ba47
RR		 4444 priv->hw_setting.rx_buf_size,
4445 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4446 spin_lock_irqsave(&rxq->lock, flags);
4447 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4448 spin_unlock_irqrestore(&rxq->lock, flags);
4449 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 4450 /* If there are a lot of unused frames,
4451 * restock the Rx queue so ucode wont assert. */
4452 if (fill_rx) {
4453 count++;
4454 if (count >= 8) {
4455 priv->rxq.read = i;
4456 __iwl4965_rx_replenish(priv);
4457 count = 0;
4458 }
4459 }
b481de9c
ZY		 4460 }
4461
4462 /* Backtrack one entry */
4463 priv->rxq.read = i;
bb8c093b 4464 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 4465}
4466
6440adb5
CB		 4467/**
4468 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4469 */
c79dd5b5 4470static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 4471 struct iwl4965_tx_queue *txq)
b481de9c
ZY		 4472{
4473 u32 reg = 0;
4474 int rc = 0;
4475 int txq_id = txq->q.id;
4476
4477 if (txq->need_update == 0)
4478 return rc;
4479
4480 /* if we're trying to save power */
4481 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4482 /* wake up nic if it's powered down ...
4483 * uCode will wake up, and interrupt us again, so next
4484 * time we'll skip this part. */
bb8c093b 4485 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 4486
4487 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4488 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
bb8c093b 4489 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 4490 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4491 return rc;
4492 }
4493
4494 /* restore this queue's parameters in nic hardware. */
bb8c093b 4495 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4496 if (rc)
4497 return rc;
bb8c093b 4498 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 4499 txq->q.write_ptr | (txq_id << 8));
bb8c093b 4500 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4501
4502 /* else not in power-save mode, uCode will never sleep when we're
4503 * trying to tx (during RFKILL, we're not trying to tx). */
4504 } else
bb8c093b 4505 iwl4965_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 4506 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY		 4507
4508 txq->need_update = 0;
4509
4510 return rc;
4511}
4512
0a6857e7 4513#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 4514static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 4515{
0795af57
JP		 4516 DECLARE_MAC_BUF(mac);
4517
b481de9c 4518 IWL_DEBUG_RADIO("RX CONFIG:\n");
0a6857e7 4519 iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 4520 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4521 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4522 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4523 le32_to_cpu(rxon->filter_flags));
4524 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4525 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4526 rxon->ofdm_basic_rates);
4527 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP		 4528 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4529 print_mac(mac, rxon->node_addr));
4530 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4531 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY		 4532 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4533}
4534#endif
4535
c79dd5b5 4536static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 4537{
4538 IWL_DEBUG_ISR("Enabling interrupts\n");
4539 set_bit(STATUS_INT_ENABLED, &priv->status);
bb8c093b 4540 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY		 4541}
4542
c79dd5b5 4543static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 4544{
4545 clear_bit(STATUS_INT_ENABLED, &priv->status);
4546
4547 /* disable interrupts from uCode/NIC to host */
bb8c093b 4548 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4549
4550 /* acknowledge/clear/reset any interrupts still pending
4551 * from uCode or flow handler (Rx/Tx DMA) */
bb8c093b
CH		 4552 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4553 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY		 4554 IWL_DEBUG_ISR("Disabled interrupts\n");
4555}
4556
4557static const char *desc_lookup(int i)
4558{
4559 switch (i) {
4560 case 1:
4561 return "FAIL";
4562 case 2:
4563 return "BAD_PARAM";
4564 case 3:
4565 return "BAD_CHECKSUM";
4566 case 4:
4567 return "NMI_INTERRUPT";
4568 case 5:
4569 return "SYSASSERT";
4570 case 6:
4571 return "FATAL_ERROR";
4572 }
4573
4574 return "UNKNOWN";
4575}
4576
4577#define ERROR_START_OFFSET (1 * sizeof(u32))
4578#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4579
c79dd5b5 4580static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY		 4581{
4582 u32 data2, line;
4583 u32 desc, time, count, base, data1;
4584 u32 blink1, blink2, ilink1, ilink2;
4585 int rc;
4586
4587 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4588
bb8c093b 4589 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4590 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4591 return;
4592 }
4593
bb8c093b 4594 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4595 if (rc) {
4596 IWL_WARNING("Can not read from adapter at this time.\n");
4597 return;
4598 }
4599
bb8c093b 4600 count = iwl4965_read_targ_mem(priv, base);
b481de9c
ZY		 4601
4602 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4603 IWL_ERROR("Start IWL Error Log Dump:\n");
2acae16e 4604 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
b481de9c
ZY		 4605 }
4606
bb8c093b
CH		 4607 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4608 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4609 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4610 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4611 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4612 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4613 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4614 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4615 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY		 4616
4617 IWL_ERROR("Desc Time "
4618 "data1 data2 line\n");
4619 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4620 desc_lookup(desc), desc, time, data1, data2, line);
4621 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4622 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4623 ilink1, ilink2);
4624
bb8c093b 4625 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4626}
4627
4628#define EVENT_START_OFFSET (4 * sizeof(u32))
4629
4630/**
bb8c093b 4631 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 4632 *
bb8c093b 4633 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
b481de9c 4634 */
c79dd5b5 4635static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY		 4636 u32 num_events, u32 mode)
4637{
4638 u32 i;
4639 u32 base; /* SRAM byte address of event log header */
4640 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4641 u32 ptr; /* SRAM byte address of log data */
4642 u32 ev, time, data; /* event log data */
4643
4644 if (num_events == 0)
4645 return;
4646
4647 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4648
4649 if (mode == 0)
4650 event_size = 2 * sizeof(u32);
4651 else
4652 event_size = 3 * sizeof(u32);
4653
4654 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4655
4656 /* "time" is actually "data" for mode 0 (no timestamp).
4657 * place event id # at far right for easier visual parsing. */
4658 for (i = 0; i < num_events; i++) {
bb8c093b 4659 ev = iwl4965_read_targ_mem(priv, ptr);
b481de9c 4660 ptr += sizeof(u32);
bb8c093b 4661 time = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY		 4662 ptr += sizeof(u32);
4663 if (mode == 0)
4664 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4665 else {
bb8c093b 4666 data = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY		 4667 ptr += sizeof(u32);
4668 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4669 }
4670 }
4671}
4672
c79dd5b5 4673static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY		 4674{
4675 int rc;
4676 u32 base; /* SRAM byte address of event log header */
4677 u32 capacity; /* event log capacity in # entries */
4678 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4679 u32 num_wraps; /* # times uCode wrapped to top of log */
4680 u32 next_entry; /* index of next entry to be written by uCode */
4681 u32 size; /* # entries that we'll print */
4682
4683 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 4684 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4685 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4686 return;
4687 }
4688
bb8c093b 4689 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4690 if (rc) {
4691 IWL_WARNING("Can not read from adapter at this time.\n");
4692 return;
4693 }
4694
4695 /* event log header */
bb8c093b
CH		 4696 capacity = iwl4965_read_targ_mem(priv, base);
4697 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
4698 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
4699 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY		 4700
4701 size = num_wraps ? capacity : next_entry;
4702
4703 /* bail out if nothing in log */
4704 if (size == 0) {
583fab37 4705 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
bb8c093b 4706 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4707 return;
4708 }
4709
583fab37 4710 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY		 4711 size, num_wraps);
4712
4713 /* if uCode has wrapped back to top of log, start at the oldest entry,
4714 * i.e the next one that uCode would fill. */
4715 if (num_wraps)
bb8c093b 4716 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY		 4717 capacity - next_entry, mode);
4718
4719 /* (then/else) start at top of log */
bb8c093b 4720 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 4721
bb8c093b 4722 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4723}
4724
4725/**
bb8c093b 4726 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 4727 */
c79dd5b5 4728static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 4729{
bb8c093b 4730 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY		 4731 set_bit(STATUS_FW_ERROR, &priv->status);
4732
4733 /* Cancel currently queued command. */
4734 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4735
0a6857e7
TW		 4736#ifdef CONFIG_IWLWIFI_DEBUG
4737 if (iwl_debug_level & IWL_DL_FW_ERRORS) {
bb8c093b
CH		 4738 iwl4965_dump_nic_error_log(priv);
4739 iwl4965_dump_nic_event_log(priv);
4740 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY		 4741 }
4742#endif
4743
4744 wake_up_interruptible(&priv->wait_command_queue);
4745
4746 /* Keep the restart process from trying to send host
4747 * commands by clearing the INIT status bit */
4748 clear_bit(STATUS_READY, &priv->status);
4749
4750 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4751 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4752 "Restarting adapter due to uCode error.\n");
4753
bb8c093b 4754 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 4755 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4756 sizeof(priv->recovery_rxon));
4757 priv->error_recovering = 1;
4758 }
4759 queue_work(priv->workqueue, &priv->restart);
4760 }
4761}
4762
c79dd5b5 4763static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 4764{
4765 unsigned long flags;
4766
4767 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4768 sizeof(priv->staging_rxon));
4769 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4770 iwl4965_commit_rxon(priv);
b481de9c 4771
bb8c093b 4772 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 4773
4774 spin_lock_irqsave(&priv->lock, flags);
4775 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4776 priv->error_recovering = 0;
4777 spin_unlock_irqrestore(&priv->lock, flags);
4778}
4779
c79dd5b5 4780static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 4781{
4782 u32 inta, handled = 0;
4783 u32 inta_fh;
4784 unsigned long flags;
0a6857e7 4785#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 4786 u32 inta_mask;
4787#endif
4788
4789 spin_lock_irqsave(&priv->lock, flags);
4790
4791 /* Ack/clear/reset pending uCode interrupts.
4792 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4793 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
bb8c093b
CH		 4794 inta = iwl4965_read32(priv, CSR_INT);
4795 iwl4965_write32(priv, CSR_INT, inta);
b481de9c
ZY		 4796
4797 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4798 * Any new interrupts that happen after this, either while we're
4799 * in this tasklet, or later, will show up in next ISR/tasklet. */
bb8c093b
CH		 4800 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
4801 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 4802
0a6857e7
TW		 4803#ifdef CONFIG_IWLWIFI_DEBUG
4804 if (iwl_debug_level & IWL_DL_ISR) {
9fbab516
BC		 4805 /* just for debug */
4806 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 4807 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4808 inta, inta_mask, inta_fh);
4809 }
4810#endif
4811
4812 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4813 * atomic, make sure that inta covers all the interrupts that
4814 * we've discovered, even if FH interrupt came in just after
4815 * reading CSR_INT. */
6f83eaa1 4816 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 4817 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 4818 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 4819 inta |= CSR_INT_BIT_FH_TX;
4820
4821 /* Now service all interrupt bits discovered above. */
4822 if (inta & CSR_INT_BIT_HW_ERR) {
4823 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4824
4825 /* Tell the device to stop sending interrupts */
bb8c093b 4826 iwl4965_disable_interrupts(priv);
b481de9c 4827
bb8c093b 4828 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4829
4830 handled |= CSR_INT_BIT_HW_ERR;
4831
4832 spin_unlock_irqrestore(&priv->lock, flags);
4833
4834 return;
4835 }
4836
0a6857e7
TW		 4837#ifdef CONFIG_IWLWIFI_DEBUG
4838 if (iwl_debug_level & (IWL_DL_ISR)) {
b481de9c 4839 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP		 4840 if (inta & CSR_INT_BIT_SCD)
4841 IWL_DEBUG_ISR("Scheduler finished to transmit "
4842 "the frame/frames.\n");
b481de9c
ZY		 4843
4844 /* Alive notification via Rx interrupt will do the real work */
4845 if (inta & CSR_INT_BIT_ALIVE)
4846 IWL_DEBUG_ISR("Alive interrupt\n");
4847 }
4848#endif
4849 /* Safely ignore these bits for debug checks below */
25c03d8e 4850 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 4851
9fbab516 4852 /* HW RF KILL switch toggled */
b481de9c
ZY		 4853 if (inta & CSR_INT_BIT_RF_KILL) {
4854 int hw_rf_kill = 0;
bb8c093b 4855 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 4856 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4857 hw_rf_kill = 1;
4858
4859 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4860 "RF_KILL bit toggled to %s.\n",
4861 hw_rf_kill ? "disable radio":"enable radio");
4862
4863 /* Queue restart only if RF_KILL switch was set to "kill"
4864 * when we loaded driver, and is now set to "enable".
4865 * After we're Alive, RF_KILL gets handled by
3230455d 4866 * iwl4965_rx_card_state_notif() */
53e49093
ZY		 4867 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4868 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 4869 queue_work(priv->workqueue, &priv->restart);
53e49093 4870 }
b481de9c
ZY		 4871
4872 handled |= CSR_INT_BIT_RF_KILL;
4873 }
4874
9fbab516 4875 /* Chip got too hot and stopped itself */
b481de9c
ZY		 4876 if (inta & CSR_INT_BIT_CT_KILL) {
4877 IWL_ERROR("Microcode CT kill error detected.\n");
4878 handled |= CSR_INT_BIT_CT_KILL;
4879 }
4880
4881 /* Error detected by uCode */
4882 if (inta & CSR_INT_BIT_SW_ERR) {
4883 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4884 inta);
bb8c093b 4885 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4886 handled |= CSR_INT_BIT_SW_ERR;
4887 }
4888
4889 /* uCode wakes up after power-down sleep */
4890 if (inta & CSR_INT_BIT_WAKEUP) {
4891 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH		 4892 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
4893 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4894 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4895 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4896 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4897 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4898 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 4899
4900 handled |= CSR_INT_BIT_WAKEUP;
4901 }
4902
4903 /* All uCode command responses, including Tx command responses,
4904 * Rx "responses" (frame-received notification), and other
4905 * notifications from uCode come through here*/
4906 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 4907 iwl4965_rx_handle(priv);
b481de9c
ZY		 4908 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4909 }
4910
4911 if (inta & CSR_INT_BIT_FH_TX) {
4912 IWL_DEBUG_ISR("Tx interrupt\n");
4913 handled |= CSR_INT_BIT_FH_TX;
4914 }
4915
4916 if (inta & ~handled)
4917 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4918
4919 if (inta & ~CSR_INI_SET_MASK) {
4920 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4921 inta & ~CSR_INI_SET_MASK);
4922 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4923 }
4924
4925 /* Re-enable all interrupts */
bb8c093b 4926 iwl4965_enable_interrupts(priv);
b481de9c 4927
0a6857e7
TW		 4928#ifdef CONFIG_IWLWIFI_DEBUG
4929 if (iwl_debug_level & (IWL_DL_ISR)) {
bb8c093b
CH		 4930 inta = iwl4965_read32(priv, CSR_INT);
4931 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
4932 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4933 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4934 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4935 }
4936#endif
4937 spin_unlock_irqrestore(&priv->lock, flags);
4938}
4939
bb8c093b 4940static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 4941{
c79dd5b5 4942 struct iwl_priv *priv = data;
b481de9c
ZY		 4943 u32 inta, inta_mask;
4944 u32 inta_fh;
4945 if (!priv)
4946 return IRQ_NONE;
4947
4948 spin_lock(&priv->lock);
4949
4950 /* Disable (but don't clear!) interrupts here to avoid
4951 * back-to-back ISRs and sporadic interrupts from our NIC.
4952 * If we have something to service, the tasklet will re-enable ints.
4953 * If we *don't* have something, we'll re-enable before leaving here. */
bb8c093b
CH		 4954 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
4955 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4956
4957 /* Discover which interrupts are active/pending */
bb8c093b
CH		 4958 inta = iwl4965_read32(priv, CSR_INT);
4959 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4960
4961 /* Ignore interrupt if there's nothing in NIC to service.
4962 * This may be due to IRQ shared with another device,
4963 * or due to sporadic interrupts thrown from our NIC. */
4964 if (!inta && !inta_fh) {
4965 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4966 goto none;
4967 }
4968
4969 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 4970 /* Hardware disappeared. It might have already raised
4971 * an interrupt */
b481de9c 4972 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 4973 goto unplugged;
b481de9c
ZY		 4974 }
4975
4976 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4977 inta, inta_mask, inta_fh);
4978
25c03d8e
JP		 4979 inta &= ~CSR_INT_BIT_SCD;
4980
bb8c093b 4981 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 4982 if (likely(inta || inta_fh))
4983 tasklet_schedule(&priv->irq_tasklet);
b481de9c 4984
66fbb541
ON		 4985 unplugged:
4986 spin_unlock(&priv->lock);
b481de9c
ZY		 4987 return IRQ_HANDLED;
4988
4989 none:
4990 /* re-enable interrupts here since we don't have anything to service. */
bb8c093b 4991 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 4992 spin_unlock(&priv->lock);
4993 return IRQ_NONE;
4994}
4995
4996/************************** EEPROM BANDS ****************************
4997 *
bb8c093b 4998 * The iwl4965_eeprom_band definitions below provide the mapping from the
b481de9c
ZY		 4999 * EEPROM contents to the specific channel number supported for each
5000 * band.
5001 *
c79dd5b5 5002 * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
b481de9c
ZY		 5003 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5004 * The specific geography and calibration information for that channel
5005 * is contained in the eeprom map itself.
5006 *
5007 * During init, we copy the eeprom information and channel map
5008 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5009 *
5010 * channel_map_24/52 provides the index in the channel_info array for a
5011 * given channel. We have to have two separate maps as there is channel
5012 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5013 * band_2
5014 *
5015 * A value of 0xff stored in the channel_map indicates that the channel
5016 * is not supported by the hardware at all.
5017 *
5018 * A value of 0xfe in the channel_map indicates that the channel is not
5019 * valid for Tx with the current hardware. This means that
5020 * while the system can tune and receive on a given channel, it may not
5021 * be able to associate or transmit any frames on that
5022 * channel. There is no corresponding channel information for that
5023 * entry.
5024 *
5025 *********************************************************************/
5026
5027/* 2.4 GHz */
bb8c093b 5028static const u8 iwl4965_eeprom_band_1[14] = {
b481de9c
ZY		 5029 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5030};
5031
5032/* 5.2 GHz bands */
9fbab516 5033static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
b481de9c
ZY		 5034 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5035};
5036
9fbab516 5037static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
b481de9c
ZY		 5038 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5039};
5040
bb8c093b 5041static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
b481de9c
ZY		 5042 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5043};
5044
bb8c093b 5045static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
b481de9c
ZY		 5046 145, 149, 153, 157, 161, 165
5047};
5048
bb8c093b 5049static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
b481de9c
ZY		 5050 1, 2, 3, 4, 5, 6, 7
5051};
5052
bb8c093b 5053static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
b481de9c
ZY		 5054 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5055};
5056
c79dd5b5 5057static void iwl4965_init_band_reference(const struct iwl_priv *priv,
9fbab516 5058 int band,
b481de9c 5059 int *eeprom_ch_count,
bb8c093b 5060 const struct iwl4965_eeprom_channel
b481de9c
ZY		 5061 **eeprom_ch_info,
5062 const u8 **eeprom_ch_index)
5063{
5064 switch (band) {
5065 case 1: /* 2.4GHz band */
bb8c093b 5066 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
b481de9c 5067 *eeprom_ch_info = priv->eeprom.band_1_channels;
bb8c093b 5068 *eeprom_ch_index = iwl4965_eeprom_band_1;
b481de9c 5069 break;
9fbab516 5070 case 2: /* 4.9GHz band */
bb8c093b 5071 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
b481de9c 5072 *eeprom_ch_info = priv->eeprom.band_2_channels;
bb8c093b 5073 *eeprom_ch_index = iwl4965_eeprom_band_2;
b481de9c
ZY		 5074 break;
5075 case 3: /* 5.2GHz band */
bb8c093b 5076 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
b481de9c 5077 *eeprom_ch_info = priv->eeprom.band_3_channels;
bb8c093b 5078 *eeprom_ch_index = iwl4965_eeprom_band_3;
b481de9c 5079 break;
9fbab516 5080 case 4: /* 5.5GHz band */
bb8c093b 5081 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
b481de9c 5082 *eeprom_ch_info = priv->eeprom.band_4_channels;
bb8c093b 5083 *eeprom_ch_index = iwl4965_eeprom_band_4;
b481de9c 5084 break;
9fbab516 5085 case 5: /* 5.7GHz band */
bb8c093b 5086 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
b481de9c 5087 *eeprom_ch_info = priv->eeprom.band_5_channels;
bb8c093b 5088 *eeprom_ch_index = iwl4965_eeprom_band_5;
b481de9c 5089 break;
9fbab516 5090 case 6: /* 2.4GHz FAT channels */
bb8c093b 5091 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
b481de9c 5092 *eeprom_ch_info = priv->eeprom.band_24_channels;
bb8c093b 5093 *eeprom_ch_index = iwl4965_eeprom_band_6;
b481de9c 5094 break;
9fbab516 5095 case 7: /* 5 GHz FAT channels */
bb8c093b 5096 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
b481de9c 5097 *eeprom_ch_info = priv->eeprom.band_52_channels;
bb8c093b 5098 *eeprom_ch_index = iwl4965_eeprom_band_7;
b481de9c
ZY		 5099 break;
5100 default:
5101 BUG();
5102 return;
5103 }
5104}
5105
6440adb5
CB		 5106/**
5107 * iwl4965_get_channel_info - Find driver's private channel info
5108 *
5109 * Based on band and channel number.
5110 */
c79dd5b5 5111const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl_priv *priv,
8318d78a 5112 enum ieee80211_band band, u16 channel)
b481de9c
ZY		 5113{
5114 int i;
5115
8318d78a
JB		 5116 switch (band) {
5117 case IEEE80211_BAND_5GHZ:
b481de9c
ZY		 5118 for (i = 14; i < priv->channel_count; i++) {
5119 if (priv->channel_info[i].channel == channel)
5120 return &priv->channel_info[i];
5121 }
5122 break;
8318d78a 5123 case IEEE80211_BAND_2GHZ:
b481de9c
ZY		 5124 if (channel >= 1 && channel <= 14)
5125 return &priv->channel_info[channel - 1];
5126 break;
8318d78a
JB		 5127 default:
5128 BUG();
b481de9c
ZY		 5129 }
5130
5131 return NULL;
5132}
5133
5134#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5135 ? # x " " : "")
5136
6440adb5
CB		 5137/**
5138 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5139 */
c79dd5b5 5140static int iwl4965_init_channel_map(struct iwl_priv *priv)
b481de9c
ZY		 5141{
5142 int eeprom_ch_count = 0;
5143 const u8 *eeprom_ch_index = NULL;
bb8c093b 5144 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
b481de9c 5145 int band, ch;
bb8c093b 5146 struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 5147
5148 if (priv->channel_count) {
5149 IWL_DEBUG_INFO("Channel map already initialized.\n");
5150 return 0;
5151 }
5152
5153 if (priv->eeprom.version < 0x2f) {
5154 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5155 priv->eeprom.version);
5156 return -EINVAL;
5157 }
5158
5159 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5160
5161 priv->channel_count =
bb8c093b
CH		 5162 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5163 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5164 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5165 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5166 ARRAY_SIZE(iwl4965_eeprom_band_5);
b481de9c
ZY		 5167
5168 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5169
bb8c093b 5170 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
b481de9c
ZY		 5171 priv->channel_count, GFP_KERNEL);
5172 if (!priv->channel_info) {
5173 IWL_ERROR("Could not allocate channel_info\n");
5174 priv->channel_count = 0;
5175 return -ENOMEM;
5176 }
5177
5178 ch_info = priv->channel_info;
5179
5180 /* Loop through the 5 EEPROM bands adding them in order to the
5181 * channel map we maintain (that contains additional information than
5182 * what just in the EEPROM) */
5183 for (band = 1; band <= 5; band++) {
5184
bb8c093b 5185 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
b481de9c
ZY		 5186 &eeprom_ch_info, &eeprom_ch_index);
5187
5188 /* Loop through each band adding each of the channels */
5189 for (ch = 0; ch < eeprom_ch_count; ch++) {
5190 ch_info->channel = eeprom_ch_index[ch];
8318d78a
JB		 5191 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
5192 IEEE80211_BAND_5GHZ;
b481de9c
ZY		 5193
5194 /* permanently store EEPROM's channel regulatory flags
5195 * and max power in channel info database. */
5196 ch_info->eeprom = eeprom_ch_info[ch];
5197
5198 /* Copy the run-time flags so they are there even on
5199 * invalid channels */
5200 ch_info->flags = eeprom_ch_info[ch].flags;
5201
5202 if (!(is_channel_valid(ch_info))) {
5203 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5204 "No traffic\n",
5205 ch_info->channel,
5206 ch_info->flags,
5207 is_channel_a_band(ch_info) ?
5208 "5.2" : "2.4");
5209 ch_info++;
5210 continue;
5211 }
5212
5213 /* Initialize regulatory-based run-time data */
5214 ch_info->max_power_avg = ch_info->curr_txpow =
5215 eeprom_ch_info[ch].max_power_avg;
5216 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5217 ch_info->min_power = 0;
5218
8211ef78 5219 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
b481de9c
ZY		 5220 " %ddBm): Ad-Hoc %ssupported\n",
5221 ch_info->channel,
5222 is_channel_a_band(ch_info) ?
5223 "5.2" : "2.4",
8211ef78 5224 CHECK_AND_PRINT(VALID),
b481de9c
ZY		 5225 CHECK_AND_PRINT(IBSS),
5226 CHECK_AND_PRINT(ACTIVE),
5227 CHECK_AND_PRINT(RADAR),
5228 CHECK_AND_PRINT(WIDE),
5229 CHECK_AND_PRINT(NARROW),
5230 CHECK_AND_PRINT(DFS),
5231 eeprom_ch_info[ch].flags,
5232 eeprom_ch_info[ch].max_power_avg,
5233 ((eeprom_ch_info[ch].
5234 flags & EEPROM_CHANNEL_IBSS)
5235 && !(eeprom_ch_info[ch].
5236 flags & EEPROM_CHANNEL_RADAR))
5237 ? "" : "not ");
5238
5239 /* Set the user_txpower_limit to the highest power
5240 * supported by any channel */
5241 if (eeprom_ch_info[ch].max_power_avg >
5242 priv->user_txpower_limit)
5243 priv->user_txpower_limit =
5244 eeprom_ch_info[ch].max_power_avg;
5245
5246 ch_info++;
5247 }
5248 }
5249
6440adb5 5250 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
b481de9c 5251 for (band = 6; band <= 7; band++) {
8318d78a 5252 enum ieee80211_band ieeeband;
b481de9c
ZY		 5253 u8 fat_extension_chan;
5254
bb8c093b 5255 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
b481de9c
ZY		 5256 &eeprom_ch_info, &eeprom_ch_index);
5257
6440adb5 5258 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
8318d78a 5259 ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
6440adb5 5260
b481de9c
ZY		 5261 /* Loop through each band adding each of the channels */
5262 for (ch = 0; ch < eeprom_ch_count; ch++) {
5263
5264 if ((band == 6) &&
5265 ((eeprom_ch_index[ch] == 5) ||
5266 (eeprom_ch_index[ch] == 6) ||
5267 (eeprom_ch_index[ch] == 7)))
5268 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5269 else
5270 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5271
6440adb5 5272 /* Set up driver's info for lower half */
8318d78a 5273 iwl4965_set_fat_chan_info(priv, ieeeband,
b481de9c
ZY		 5274 eeprom_ch_index[ch],
5275 &(eeprom_ch_info[ch]),
5276 fat_extension_chan);
5277
6440adb5 5278 /* Set up driver's info for upper half */
8318d78a 5279 iwl4965_set_fat_chan_info(priv, ieeeband,
b481de9c
ZY		 5280 (eeprom_ch_index[ch] + 4),
5281 &(eeprom_ch_info[ch]),
5282 HT_IE_EXT_CHANNEL_BELOW);
5283 }
5284 }
5285
5286 return 0;
5287}
5288
849e0dce
RC		 5289/*
5290 * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
5291 */
c79dd5b5 5292static void iwl4965_free_channel_map(struct iwl_priv *priv)
849e0dce
RC		 5293{
5294 kfree(priv->channel_info);
5295 priv->channel_count = 0;
5296}
5297
b481de9c
ZY		 5298/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5299 * sending probe req. This should be set long enough to hear probe responses
5300 * from more than one AP. */
5301#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5302#define IWL_ACTIVE_DWELL_TIME_52 (10)
5303
5304/* For faster active scanning, scan will move to the next channel if fewer than
5305 * PLCP_QUIET_THRESH packets are heard on this channel within
5306 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5307 * time if it's a quiet channel (nothing responded to our probe, and there's
5308 * no other traffic).
5309 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5310#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5311#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5312
5313/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5314 * Must be set longer than active dwell time.
5315 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5316#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5317#define IWL_PASSIVE_DWELL_TIME_52 (10)
5318#define IWL_PASSIVE_DWELL_BASE (100)
5319#define IWL_CHANNEL_TUNE_TIME 5
5320
c79dd5b5 5321static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
8318d78a 5322 enum ieee80211_band band)
b481de9c 5323{
8318d78a 5324 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 5325 return IWL_ACTIVE_DWELL_TIME_52;
5326 else
5327 return IWL_ACTIVE_DWELL_TIME_24;
5328}
5329
c79dd5b5 5330static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
8318d78a 5331 enum ieee80211_band band)
b481de9c 5332{
8318d78a
JB		 5333 u16 active = iwl4965_get_active_dwell_time(priv, band);
5334 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
b481de9c
ZY		 5335 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5336 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5337
bb8c093b 5338 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 5339 /* If we're associated, we clamp the maximum passive
5340 * dwell time to be 98% of the beacon interval (minus
5341 * 2 * channel tune time) */
5342 passive = priv->beacon_int;
5343 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5344 passive = IWL_PASSIVE_DWELL_BASE;
5345 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5346 }
5347
5348 if (passive <= active)
5349 passive = active + 1;
5350
5351 return passive;
5352}
5353
c79dd5b5 5354static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 5355 enum ieee80211_band band,
b481de9c 5356 u8 is_active, u8 direct_mask,
bb8c093b 5357 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY		 5358{
5359 const struct ieee80211_channel *channels = NULL;
8318d78a 5360 const struct ieee80211_supported_band *sband;
bb8c093b 5361 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 5362 u16 passive_dwell = 0;
5363 u16 active_dwell = 0;
5364 int added, i;
5365
8318d78a
JB		 5366 sband = iwl4965_get_hw_mode(priv, band);
5367 if (!sband)
b481de9c
ZY		 5368 return 0;
5369
8318d78a 5370 channels = sband->channels;
b481de9c 5371
8318d78a
JB		 5372 active_dwell = iwl4965_get_active_dwell_time(priv, band);
5373 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
b481de9c 5374
8318d78a
JB		 5375 for (i = 0, added = 0; i < sband->n_channels; i++) {
5376 if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
b481de9c 5377 le16_to_cpu(priv->active_rxon.channel)) {
bb8c093b 5378 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 5379 IWL_DEBUG_SCAN
5380 ("Skipping current channel %d\n",
5381 le16_to_cpu(priv->active_rxon.channel));
5382 continue;
5383 }
5384 } else if (priv->only_active_channel)
5385 continue;
5386
8318d78a 5387 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
b481de9c 5388
8318d78a 5389 ch_info = iwl4965_get_channel_info(priv, band,
9fbab516 5390 scan_ch->channel);
b481de9c
ZY		 5391 if (!is_channel_valid(ch_info)) {
5392 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5393 scan_ch->channel);
5394 continue;
5395 }
5396
5397 if (!is_active || is_channel_passive(ch_info) ||
8318d78a 5398 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
b481de9c
ZY		 5399 scan_ch->type = 0; /* passive */
5400 else
5401 scan_ch->type = 1; /* active */
5402
5403 if (scan_ch->type & 1)
5404 scan_ch->type |= (direct_mask << 1);
5405
5406 if (is_channel_narrow(ch_info))
5407 scan_ch->type |= (1 << 7);
5408
5409 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5410 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5411
9fbab516 5412 /* Set txpower levels to defaults */
b481de9c
ZY		 5413 scan_ch->tpc.dsp_atten = 110;
5414 /* scan_pwr_info->tpc.dsp_atten; */
5415
5416 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 5417 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 5418 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5419 else {
5420 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5421 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 5422 * power level:
8a1b0245 5423 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY		 5424 */
5425 }
5426
5427 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5428 scan_ch->channel,
5429 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5430 (scan_ch->type & 1) ?
5431 active_dwell : passive_dwell);
5432
5433 scan_ch++;
5434 added++;
5435 }
5436
5437 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5438 return added;
5439}
5440
c79dd5b5 5441static void iwl4965_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY		 5442 struct ieee80211_rate *rates)
5443{
5444 int i;
5445
5446 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB		 5447 rates[i].bitrate = iwl4965_rates[i].ieee * 5;
5448 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5449 rates[i].hw_value_short = i;
5450 rates[i].flags = 0;
5451 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 5452 /*
8318d78a 5453 * If CCK != 1M then set short preamble rate flag.
b481de9c 5454 */
35cdeaf4
TW		 5455 rates[i].flags |=
5456 (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
5457 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 5458 }
b481de9c 5459 }
b481de9c
ZY		 5460}
5461
5462/**
bb8c093b 5463 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
b481de9c 5464 */
c79dd5b5 5465static int iwl4965_init_geos(struct iwl_priv *priv)
b481de9c 5466{
bb8c093b 5467 struct iwl4965_channel_info *ch;
8211ef78 5468 struct ieee80211_supported_band *sband;
b481de9c
ZY		 5469 struct ieee80211_channel *channels;
5470 struct ieee80211_channel *geo_ch;
5471 struct ieee80211_rate *rates;
5472 int i = 0;
b481de9c 5473
8318d78a
JB		 5474 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5475 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
b481de9c
ZY		 5476 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5477 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5478 return 0;
5479 }
5480
b481de9c
ZY		 5481 channels = kzalloc(sizeof(struct ieee80211_channel) *
5482 priv->channel_count, GFP_KERNEL);
8318d78a 5483 if (!channels)
b481de9c 5484 return -ENOMEM;
b481de9c 5485
8211ef78 5486 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
b481de9c
ZY		 5487 GFP_KERNEL);
5488 if (!rates) {
b481de9c
ZY		 5489 kfree(channels);
5490 return -ENOMEM;
5491 }
5492
b481de9c 5493 /* 5.2GHz channels start after the 2.4GHz channels */
8211ef78
TW		 5494 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5495 sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
5496 /* just OFDM */
5497 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5498 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
8318d78a 5499
8211ef78 5500 iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
78330fdd 5501
8211ef78
TW		 5502 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5503 sband->channels = channels;
5504 /* OFDM & CCK */
5505 sband->bitrates = rates;
5506 sband->n_bitrates = IWL_RATE_COUNT;
b481de9c 5507
8211ef78 5508 iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
78330fdd 5509
b481de9c
ZY		 5510 priv->ieee_channels = channels;
5511 priv->ieee_rates = rates;
5512
bb8c093b 5513 iwl4965_init_hw_rates(priv, rates);
b481de9c 5514
8211ef78 5515 for (i = 0; i < priv->channel_count; i++) {
b481de9c
ZY		 5516 ch = &priv->channel_info[i];
5517
8211ef78
TW		 5518 /* FIXME: might be removed if scan is OK */
5519 if (!is_channel_valid(ch))
b481de9c 5520 continue;
b481de9c 5521
8211ef78
TW		 5522 if (is_channel_a_band(ch))
5523 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5524 else
5525 sband = &priv->bands[IEEE80211_BAND_2GHZ];
b481de9c 5526
8211ef78
TW		 5527 geo_ch = &sband->channels[sband->n_channels++];
5528
5529 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
8318d78a
JB		 5530 geo_ch->max_power = ch->max_power_avg;
5531 geo_ch->max_antenna_gain = 0xff;
7b72304d 5532 geo_ch->hw_value = ch->channel;
b481de9c
ZY		 5533
5534 if (is_channel_valid(ch)) {
8318d78a
JB		 5535 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5536 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
b481de9c 5537
8318d78a
JB		 5538 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5539 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
b481de9c
ZY		 5540
5541 if (ch->flags & EEPROM_CHANNEL_RADAR)
8318d78a 5542 geo_ch->flags |= IEEE80211_CHAN_RADAR;
b481de9c
ZY		 5543
5544 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5545 priv->max_channel_txpower_limit =
5546 ch->max_power_avg;
8211ef78 5547 } else {
8318d78a 5548 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
8211ef78
TW		 5549 }
5550
5551 /* Save flags for reg domain usage */
5552 geo_ch->orig_flags = geo_ch->flags;
5553
5554 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5555 ch->channel, geo_ch->center_freq,
5556 is_channel_a_band(ch) ? "5.2" : "2.4",
5557 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5558 "restricted" : "valid",
5559 geo_ch->flags);
b481de9c
ZY		 5560 }
5561
82b9a121
TW		 5562 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5563 priv->cfg->sku & IWL_SKU_A) {
b481de9c
ZY		 5564 printk(KERN_INFO DRV_NAME
5565 ": Incorrectly detected BG card as ABG. Please send "
5566 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5567 priv->pci_dev->device, priv->pci_dev->subsystem_device);
82b9a121 5568 priv->cfg->sku &= ~IWL_SKU_A;
b481de9c
ZY		 5569 }
5570
5571 printk(KERN_INFO DRV_NAME
5572 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
8318d78a
JB		 5573 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5574 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
b481de9c 5575
8318d78a
JB		 5576 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
5577 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
b481de9c 5578
b481de9c
ZY		 5579 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5580
5581 return 0;
5582}
5583
849e0dce
RC		 5584/*
5585 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
5586 */
c79dd5b5 5587static void iwl4965_free_geos(struct iwl_priv *priv)
849e0dce 5588{
849e0dce
RC		 5589 kfree(priv->ieee_channels);
5590 kfree(priv->ieee_rates);
5591 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5592}
5593
b481de9c
ZY		 5594/******************************************************************************
5595 *
5596 * uCode download functions
5597 *
5598 ******************************************************************************/
5599
c79dd5b5 5600static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 5601{
98c92211
TW		 5602 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5603 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5604 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5605 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5606 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5607 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 5608}
5609
5610/**
bb8c093b 5611 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY		 5612 * looking at all data.
5613 */
c79dd5b5 5614static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
9fbab516 5615 u32 len)
b481de9c
ZY		 5616{
5617 u32 val;
5618 u32 save_len = len;
5619 int rc = 0;
5620 u32 errcnt;
5621
5622 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5623
bb8c093b 5624 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5625 if (rc)
5626 return rc;
5627
bb8c093b 5628 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
b481de9c
ZY		 5629
5630 errcnt = 0;
5631 for (; len > 0; len -= sizeof(u32), image++) {
5632 /* read data comes through single port, auto-incr addr */
5633 /* NOTE: Use the debugless read so we don't flood kernel log
5634 * if IWL_DL_IO is set */
bb8c093b 5635 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 5636 if (val != le32_to_cpu(*image)) {
5637 IWL_ERROR("uCode INST section is invalid at "
5638 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5639 save_len - len, val, le32_to_cpu(*image));
5640 rc = -EIO;
5641 errcnt++;
5642 if (errcnt >= 20)
5643 break;
5644 }
5645 }
5646
bb8c093b 5647 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5648
5649 if (!errcnt)
5650 IWL_DEBUG_INFO
5651 ("ucode image in INSTRUCTION memory is good\n");
5652
5653 return rc;
5654}
5655
5656
5657/**
bb8c093b 5658 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY		 5659 * using sample data 100 bytes apart. If these sample points are good,
5660 * it's a pretty good bet that everything between them is good, too.
5661 */
c79dd5b5 5662static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY		 5663{
5664 u32 val;
5665 int rc = 0;
5666 u32 errcnt = 0;
5667 u32 i;
5668
5669 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5670
bb8c093b 5671 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5672 if (rc)
5673 return rc;
5674
5675 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5676 /* read data comes through single port, auto-incr addr */
5677 /* NOTE: Use the debugless read so we don't flood kernel log
5678 * if IWL_DL_IO is set */
bb8c093b 5679 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
b481de9c 5680 i + RTC_INST_LOWER_BOUND);
bb8c093b 5681 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 5682 if (val != le32_to_cpu(*image)) {
5683#if 0 /* Enable this if you want to see details */
5684 IWL_ERROR("uCode INST section is invalid at "
5685 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5686 i, val, *image);
5687#endif
5688 rc = -EIO;
5689 errcnt++;
5690 if (errcnt >= 3)
5691 break;
5692 }
5693 }
5694
bb8c093b 5695 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5696
5697 return rc;
5698}
5699
5700
5701/**
bb8c093b 5702 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY		 5703 * and verify its contents
5704 */
c79dd5b5 5705static int iwl4965_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY		 5706{
5707 __le32 *image;
5708 u32 len;
5709 int rc = 0;
5710
5711 /* Try bootstrap */
5712 image = (__le32 *)priv->ucode_boot.v_addr;
5713 len = priv->ucode_boot.len;
bb8c093b 5714 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5715 if (rc == 0) {
5716 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5717 return 0;
5718 }
5719
5720 /* Try initialize */
5721 image = (__le32 *)priv->ucode_init.v_addr;
5722 len = priv->ucode_init.len;
bb8c093b 5723 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5724 if (rc == 0) {
5725 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5726 return 0;
5727 }
5728
5729 /* Try runtime/protocol */
5730 image = (__le32 *)priv->ucode_code.v_addr;
5731 len = priv->ucode_code.len;
bb8c093b 5732 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5733 if (rc == 0) {
5734 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5735 return 0;
5736 }
5737
5738 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5739
9fbab516
BC		 5740 /* Since nothing seems to match, show first several data entries in
5741 * instruction SRAM, so maybe visual inspection will give a clue.
5742 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY		 5743 image = (__le32 *)priv->ucode_boot.v_addr;
5744 len = priv->ucode_boot.len;
bb8c093b 5745 rc = iwl4965_verify_inst_full(priv, image, len);
b481de9c
ZY		 5746
5747 return rc;
5748}
5749
5750
5751/* check contents of special bootstrap uCode SRAM */
c79dd5b5 5752static int iwl4965_verify_bsm(struct iwl_priv *priv)
b481de9c
ZY		 5753{
5754 __le32 *image = priv->ucode_boot.v_addr;
5755 u32 len = priv->ucode_boot.len;
5756 u32 reg;
5757 u32 val;
5758
5759 IWL_DEBUG_INFO("Begin verify bsm\n");
5760
5761 /* verify BSM SRAM contents */
bb8c093b 5762 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
b481de9c
ZY		 5763 for (reg = BSM_SRAM_LOWER_BOUND;
5764 reg < BSM_SRAM_LOWER_BOUND + len;
5765 reg += sizeof(u32), image ++) {
bb8c093b 5766 val = iwl4965_read_prph(priv, reg);
b481de9c
ZY		 5767 if (val != le32_to_cpu(*image)) {
5768 IWL_ERROR("BSM uCode verification failed at "
5769 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5770 BSM_SRAM_LOWER_BOUND,
5771 reg - BSM_SRAM_LOWER_BOUND, len,
5772 val, le32_to_cpu(*image));
5773 return -EIO;
5774 }
5775 }
5776
5777 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5778
5779 return 0;
5780}
5781
5782/**
bb8c093b 5783 * iwl4965_load_bsm - Load bootstrap instructions
b481de9c
ZY		 5784 *
5785 * BSM operation:
5786 *
5787 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5788 * in special SRAM that does not power down during RFKILL. When powering back
5789 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5790 * the bootstrap program into the on-board processor, and starts it.
5791 *
5792 * The bootstrap program loads (via DMA) instructions and data for a new
5793 * program from host DRAM locations indicated by the host driver in the
5794 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5795 * automatically.
5796 *
5797 * When initializing the NIC, the host driver points the BSM to the
5798 * "initialize" uCode image. This uCode sets up some internal data, then
5799 * notifies host via "initialize alive" that it is complete.
5800 *
5801 * The host then replaces the BSM_DRAM_* pointer values to point to the
5802 * normal runtime uCode instructions and a backup uCode data cache buffer
5803 * (filled initially with starting data values for the on-board processor),
5804 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5805 * which begins normal operation.
5806 *
5807 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5808 * the backup data cache in DRAM before SRAM is powered down.
5809 *
5810 * When powering back up, the BSM loads the bootstrap program. This reloads
5811 * the runtime uCode instructions and the backup data cache into SRAM,
5812 * and re-launches the runtime uCode from where it left off.
5813 */
c79dd5b5 5814static int iwl4965_load_bsm(struct iwl_priv *priv)
b481de9c
ZY		 5815{
5816 __le32 *image = priv->ucode_boot.v_addr;
5817 u32 len = priv->ucode_boot.len;
5818 dma_addr_t pinst;
5819 dma_addr_t pdata;
5820 u32 inst_len;
5821 u32 data_len;
5822 int rc;
5823 int i;
5824 u32 done;
5825 u32 reg_offset;
5826
5827 IWL_DEBUG_INFO("Begin load bsm\n");
5828
5829 /* make sure bootstrap program is no larger than BSM's SRAM size */
5830 if (len > IWL_MAX_BSM_SIZE)
5831 return -EINVAL;
5832
5833 /* Tell bootstrap uCode where to find the "Initialize" uCode
9fbab516 5834 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
bb8c093b 5835 * NOTE: iwl4965_initialize_alive_start() will replace these values,
b481de9c
ZY		 5836 * after the "initialize" uCode has run, to point to
5837 * runtime/protocol instructions and backup data cache. */
5838 pinst = priv->ucode_init.p_addr >> 4;
5839 pdata = priv->ucode_init_data.p_addr >> 4;
5840 inst_len = priv->ucode_init.len;
5841 data_len = priv->ucode_init_data.len;
5842
bb8c093b 5843 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5844 if (rc)
5845 return rc;
5846
bb8c093b
CH		 5847 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5848 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5849 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5850 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
b481de9c
ZY		 5851
5852 /* Fill BSM memory with bootstrap instructions */
5853 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5854 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5855 reg_offset += sizeof(u32), image++)
bb8c093b 5856 _iwl4965_write_prph(priv, reg_offset,
b481de9c
ZY		 5857 le32_to_cpu(*image));
5858
bb8c093b 5859 rc = iwl4965_verify_bsm(priv);
b481de9c 5860 if (rc) {
bb8c093b 5861 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5862 return rc;
5863 }
5864
5865 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
bb8c093b
CH		 5866 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5867 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
b481de9c 5868 RTC_INST_LOWER_BOUND);
bb8c093b 5869 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
b481de9c
ZY		 5870
5871 /* Load bootstrap code into instruction SRAM now,
5872 * to prepare to load "initialize" uCode */
bb8c093b 5873 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY		 5874 BSM_WR_CTRL_REG_BIT_START);
5875
5876 /* Wait for load of bootstrap uCode to finish */
5877 for (i = 0; i < 100; i++) {
bb8c093b 5878 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
b481de9c
ZY		 5879 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5880 break;
5881 udelay(10);
5882 }
5883 if (i < 100)
5884 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5885 else {
5886 IWL_ERROR("BSM write did not complete!\n");
5887 return -EIO;
5888 }
5889
5890 /* Enable future boot loads whenever power management unit triggers it
5891 * (e.g. when powering back up after power-save shutdown) */
bb8c093b 5892 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY		 5893 BSM_WR_CTRL_REG_BIT_START_EN);
5894
bb8c093b 5895 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5896
5897 return 0;
5898}
5899
c79dd5b5 5900static void iwl4965_nic_start(struct iwl_priv *priv)
b481de9c
ZY		 5901{
5902 /* Remove all resets to allow NIC to operate */
bb8c093b 5903 iwl4965_write32(priv, CSR_RESET, 0);
b481de9c
ZY		 5904}
5905
90e759d1 5906
b481de9c 5907/**
bb8c093b 5908 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 5909 *
5910 * Copy into buffers for card to fetch via bus-mastering
5911 */
c79dd5b5 5912static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 5913{
bb8c093b 5914 struct iwl4965_ucode *ucode;
90e759d1 5915 int ret;
b481de9c 5916 const struct firmware *ucode_raw;
4bf775cd 5917 const char *name = priv->cfg->fw_name;
b481de9c
ZY		 5918 u8 *src;
5919 size_t len;
5920 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5921
5922 /* Ask kernel firmware_class module to get the boot firmware off disk.
5923 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW		 5924 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5925 if (ret < 0) {
5926 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5927 name, ret);
b481de9c
ZY		 5928 goto error;
5929 }
5930
5931 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5932 name, ucode_raw->size);
5933
5934 /* Make sure that we got at least our header! */
5935 if (ucode_raw->size < sizeof(*ucode)) {
5936 IWL_ERROR("File size way too small!\n");
90e759d1 5937 ret = -EINVAL;
b481de9c
ZY		 5938 goto err_release;
5939 }
5940
5941 /* Data from ucode file: header followed by uCode images */
5942 ucode = (void *)ucode_raw->data;
5943
5944 ver = le32_to_cpu(ucode->ver);
5945 inst_size = le32_to_cpu(ucode->inst_size);
5946 data_size = le32_to_cpu(ucode->data_size);
5947 init_size = le32_to_cpu(ucode->init_size);
5948 init_data_size = le32_to_cpu(ucode->init_data_size);
5949 boot_size = le32_to_cpu(ucode->boot_size);
5950
5951 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5952 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
5953 inst_size);
5954 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
5955 data_size);
5956 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
5957 init_size);
5958 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
5959 init_data_size);
5960 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
5961 boot_size);
5962
5963 /* Verify size of file vs. image size info in file's header */
5964 if (ucode_raw->size < sizeof(*ucode) +
5965 inst_size + data_size + init_size +
5966 init_data_size + boot_size) {
5967
5968 IWL_DEBUG_INFO("uCode file size %d too small\n",
5969 (int)ucode_raw->size);
90e759d1 5970 ret = -EINVAL;
b481de9c
ZY		 5971 goto err_release;
5972 }
5973
5974 /* Verify that uCode images will fit in card's SRAM */
5975 if (inst_size > IWL_MAX_INST_SIZE) {
90e759d1
TW		 5976 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5977 inst_size);
5978 ret = -EINVAL;
b481de9c
ZY		 5979 goto err_release;
5980 }
5981
5982 if (data_size > IWL_MAX_DATA_SIZE) {
90e759d1
TW		 5983 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5984 data_size);
5985 ret = -EINVAL;
b481de9c
ZY		 5986 goto err_release;
5987 }
5988 if (init_size > IWL_MAX_INST_SIZE) {
5989 IWL_DEBUG_INFO
90e759d1
TW		 5990 ("uCode init instr len %d too large to fit in\n",
5991 init_size);
5992 ret = -EINVAL;
b481de9c
ZY		 5993 goto err_release;
5994 }
5995 if (init_data_size > IWL_MAX_DATA_SIZE) {
5996 IWL_DEBUG_INFO
90e759d1
TW		 5997 ("uCode init data len %d too large to fit in\n",
5998 init_data_size);
5999 ret = -EINVAL;
b481de9c
ZY		 6000 goto err_release;
6001 }
6002 if (boot_size > IWL_MAX_BSM_SIZE) {
6003 IWL_DEBUG_INFO
90e759d1
TW		 6004 ("uCode boot instr len %d too large to fit in\n",
6005 boot_size);
6006 ret = -EINVAL;
b481de9c
ZY		 6007 goto err_release;
6008 }
6009
6010 /* Allocate ucode buffers for card's bus-master loading ... */
6011
6012 /* Runtime instructions and 2 copies of data:
6013 * 1) unmodified from disk
6014 * 2) backup cache for save/restore during power-downs */
6015 priv->ucode_code.len = inst_size;
98c92211 6016 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 6017
6018 priv->ucode_data.len = data_size;
98c92211 6019 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 6020
6021 priv->ucode_data_backup.len = data_size;
98c92211 6022 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY		 6023
6024 /* Initialization instructions and data */
90e759d1
TW		 6025 if (init_size && init_data_size) {
6026 priv->ucode_init.len = init_size;
98c92211 6027 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 6028
6029 priv->ucode_init_data.len = init_data_size;
98c92211 6030 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 6031
6032 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6033 goto err_pci_alloc;
6034 }
b481de9c
ZY		 6035
6036 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 6037 if (boot_size) {
6038 priv->ucode_boot.len = boot_size;
98c92211 6039 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 6040
90e759d1
TW		 6041 if (!priv->ucode_boot.v_addr)
6042 goto err_pci_alloc;
6043 }
b481de9c
ZY		 6044
6045 /* Copy images into buffers for card's bus-master reads ... */
6046
6047 /* Runtime instructions (first block of data in file) */
6048 src = &ucode->data[0];
6049 len = priv->ucode_code.len;
90e759d1 6050 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 6051 memcpy(priv->ucode_code.v_addr, src, len);
6052 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6053 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6054
6055 /* Runtime data (2nd block)
bb8c093b 6056 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY		 6057 src = &ucode->data[inst_size];
6058 len = priv->ucode_data.len;
90e759d1 6059 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 6060 memcpy(priv->ucode_data.v_addr, src, len);
6061 memcpy(priv->ucode_data_backup.v_addr, src, len);
6062
6063 /* Initialization instructions (3rd block) */
6064 if (init_size) {
6065 src = &ucode->data[inst_size + data_size];
6066 len = priv->ucode_init.len;
90e759d1
TW		 6067 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6068 len);
b481de9c
ZY		 6069 memcpy(priv->ucode_init.v_addr, src, len);
6070 }
6071
6072 /* Initialization data (4th block) */
6073 if (init_data_size) {
6074 src = &ucode->data[inst_size + data_size + init_size];
6075 len = priv->ucode_init_data.len;
90e759d1
TW		 6076 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6077 len);
b481de9c
ZY		 6078 memcpy(priv->ucode_init_data.v_addr, src, len);
6079 }
6080
6081 /* Bootstrap instructions (5th block) */
6082 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6083 len = priv->ucode_boot.len;
90e759d1 6084 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 6085 memcpy(priv->ucode_boot.v_addr, src, len);
6086
6087 /* We have our copies now, allow OS release its copies */
6088 release_firmware(ucode_raw);
6089 return 0;
6090
6091 err_pci_alloc:
6092 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 6093 ret = -ENOMEM;
bb8c093b 6094 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 6095
6096 err_release:
6097 release_firmware(ucode_raw);
6098
6099 error:
90e759d1 6100 return ret;
b481de9c
ZY		 6101}
6102
6103
6104/**
bb8c093b 6105 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY		 6106 *
6107 * Tell initialization uCode where to find runtime uCode.
6108 *
6109 * BSM registers initially contain pointers to initialization uCode.
6110 * We need to replace them to load runtime uCode inst and data,
6111 * and to save runtime data when powering down.
6112 */
c79dd5b5 6113static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY		 6114{
6115 dma_addr_t pinst;
6116 dma_addr_t pdata;
6117 int rc = 0;
6118 unsigned long flags;
6119
6120 /* bits 35:4 for 4965 */
6121 pinst = priv->ucode_code.p_addr >> 4;
6122 pdata = priv->ucode_data_backup.p_addr >> 4;
6123
6124 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 6125 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 6126 if (rc) {
6127 spin_unlock_irqrestore(&priv->lock, flags);
6128 return rc;
6129 }
6130
6131 /* Tell bootstrap uCode where to find image to load */
bb8c093b
CH		 6132 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6133 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6134 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY		 6135 priv->ucode_data.len);
6136
6137 /* Inst bytecount must be last to set up, bit 31 signals uCode
6138 * that all new ptr/size info is in place */
bb8c093b 6139 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY		 6140 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6141
bb8c093b 6142 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6143
6144 spin_unlock_irqrestore(&priv->lock, flags);
6145
6146 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6147
6148 return rc;
6149}
6150
6151/**
bb8c093b 6152 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY		 6153 *
6154 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6155 *
6156 * The 4965 "initialize" ALIVE reply contains calibration data for:
6157 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6158 * (3945 does not contain this data).
6159 *
6160 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6161*/
c79dd5b5 6162static void iwl4965_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY		 6163{
6164 /* Check alive response for "valid" sign from uCode */
6165 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6166 /* We had an error bringing up the hardware, so take it
6167 * all the way back down so we can try again */
6168 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6169 goto restart;
6170 }
6171
6172 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6173 * This is a paranoid check, because we would not have gotten the
6174 * "initialize" alive if code weren't properly loaded. */
bb8c093b 6175 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 6176 /* Runtime instruction load was bad;
6177 * take it all the way back down so we can try again */
6178 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6179 goto restart;
6180 }
6181
6182 /* Calculate temperature */
6183 priv->temperature = iwl4965_get_temperature(priv);
6184
6185 /* Send pointers to protocol/runtime uCode image ... init code will
6186 * load and launch runtime uCode, which will send us another "Alive"
6187 * notification. */
6188 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 6189 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY		 6190 /* Runtime instruction load won't happen;
6191 * take it all the way back down so we can try again */
6192 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6193 goto restart;
6194 }
6195 return;
6196
6197 restart:
6198 queue_work(priv->workqueue, &priv->restart);
6199}
6200
6201
6202/**
bb8c093b 6203 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 6204 * from protocol/runtime uCode (initialization uCode's
bb8c093b 6205 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 6206 */
c79dd5b5 6207static void iwl4965_alive_start(struct iwl_priv *priv)
b481de9c
ZY		 6208{
6209 int rc = 0;
6210
6211 IWL_DEBUG_INFO("Runtime Alive received.\n");
6212
6213 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6214 /* We had an error bringing up the hardware, so take it
6215 * all the way back down so we can try again */
6216 IWL_DEBUG_INFO("Alive failed.\n");
6217 goto restart;
6218 }
6219
6220 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6221 * This is a paranoid check, because we would not have gotten the
6222 * "runtime" alive if code weren't properly loaded. */
bb8c093b 6223 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 6224 /* Runtime instruction load was bad;
6225 * take it all the way back down so we can try again */
6226 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6227 goto restart;
6228 }
6229
bb8c093b 6230 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6231
6232 rc = iwl4965_alive_notify(priv);
6233 if (rc) {
6234 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6235 rc);
6236 goto restart;
6237 }
6238
9fbab516 6239 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY		 6240 set_bit(STATUS_ALIVE, &priv->status);
6241
6242 /* Clear out the uCode error bit if it is set */
6243 clear_bit(STATUS_FW_ERROR, &priv->status);
6244
bb8c093b 6245 if (iwl4965_is_rfkill(priv))
b481de9c
ZY		 6246 return;
6247
5a66926a 6248 ieee80211_start_queues(priv->hw);
b481de9c
ZY		 6249
6250 priv->active_rate = priv->rates_mask;
6251 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6252
bb8c093b 6253 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
b481de9c 6254
bb8c093b
CH		 6255 if (iwl4965_is_associated(priv)) {
6256 struct iwl4965_rxon_cmd *active_rxon =
6257 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY		 6258
6259 memcpy(&priv->staging_rxon, &priv->active_rxon,
6260 sizeof(priv->staging_rxon));
6261 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6262 } else {
6263 /* Initialize our rx_config data */
bb8c093b 6264 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 6265 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6266 }
6267
9fbab516 6268 /* Configure Bluetooth device coexistence support */
bb8c093b 6269 iwl4965_send_bt_config(priv);
b481de9c
ZY		 6270
6271 /* Configure the adapter for unassociated operation */
bb8c093b 6272 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6273
6274 /* At this point, the NIC is initialized and operational */
6275 priv->notif_missed_beacons = 0;
6276 set_bit(STATUS_READY, &priv->status);
6277
6278 iwl4965_rf_kill_ct_config(priv);
5a66926a 6279
b481de9c 6280 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5a66926a 6281 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 6282
6283 if (priv->error_recovering)
bb8c093b 6284 iwl4965_error_recovery(priv);
b481de9c
ZY		 6285
6286 return;
6287
6288 restart:
6289 queue_work(priv->workqueue, &priv->restart);
6290}
6291
c79dd5b5 6292static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 6293
c79dd5b5 6294static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 6295{
6296 unsigned long flags;
6297 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6298 struct ieee80211_conf *conf = NULL;
6299
6300 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6301
6302 conf = ieee80211_get_hw_conf(priv->hw);
6303
6304 if (!exit_pending)
6305 set_bit(STATUS_EXIT_PENDING, &priv->status);
6306
bb8c093b 6307 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6308
6309 /* Unblock any waiting calls */
6310 wake_up_interruptible_all(&priv->wait_command_queue);
6311
b481de9c
ZY		 6312 /* Wipe out the EXIT_PENDING status bit if we are not actually
6313 * exiting the module */
6314 if (!exit_pending)
6315 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6316
6317 /* stop and reset the on-board processor */
bb8c093b 6318 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 6319
6320 /* tell the device to stop sending interrupts */
bb8c093b 6321 iwl4965_disable_interrupts(priv);
b481de9c
ZY		 6322
6323 if (priv->mac80211_registered)
6324 ieee80211_stop_queues(priv->hw);
6325
bb8c093b 6326 /* If we have not previously called iwl4965_init() then
b481de9c 6327 * clear all bits but the RF Kill and SUSPEND bits and return */
bb8c093b 6328 if (!iwl4965_is_init(priv)) {
b481de9c
ZY		 6329 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6330 STATUS_RF_KILL_HW |
6331 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6332 STATUS_RF_KILL_SW |
9788864e
RC		 6333 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6334 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 6335 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6336 STATUS_IN_SUSPEND;
6337 goto exit;
6338 }
6339
6340 /* ...otherwise clear out all the status bits but the RF Kill and
6341 * SUSPEND bits and continue taking the NIC down. */
6342 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6343 STATUS_RF_KILL_HW |
6344 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6345 STATUS_RF_KILL_SW |
9788864e
RC		 6346 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6347 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 6348 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6349 STATUS_IN_SUSPEND |
6350 test_bit(STATUS_FW_ERROR, &priv->status) <<
6351 STATUS_FW_ERROR;
6352
6353 spin_lock_irqsave(&priv->lock, flags);
9fbab516
BC		 6354 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6355 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 6356 spin_unlock_irqrestore(&priv->lock, flags);
6357
bb8c093b
CH		 6358 iwl4965_hw_txq_ctx_stop(priv);
6359 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY		 6360
6361 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH		 6362 if (!iwl4965_grab_nic_access(priv)) {
6363 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 6364 APMG_CLK_VAL_DMA_CLK_RQT);
bb8c093b 6365 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6366 }
6367 spin_unlock_irqrestore(&priv->lock, flags);
6368
6369 udelay(5);
6370
bb8c093b
CH		 6371 iwl4965_hw_nic_stop_master(priv);
6372 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6373 iwl4965_hw_nic_reset(priv);
b481de9c
ZY		 6374
6375 exit:
bb8c093b 6376 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 6377
6378 if (priv->ibss_beacon)
6379 dev_kfree_skb(priv->ibss_beacon);
6380 priv->ibss_beacon = NULL;
6381
6382 /* clear out any free frames */
bb8c093b 6383 iwl4965_clear_free_frames(priv);
b481de9c
ZY		 6384}
6385
c79dd5b5 6386static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 6387{
6388 mutex_lock(&priv->mutex);
bb8c093b 6389 __iwl4965_down(priv);
b481de9c 6390 mutex_unlock(&priv->mutex);
b24d22b1 6391
bb8c093b 6392 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY		 6393}
6394
6395#define MAX_HW_RESTARTS 5
6396
c79dd5b5 6397static int __iwl4965_up(struct iwl_priv *priv)
b481de9c
ZY		 6398{
6399 int rc, i;
b481de9c
ZY		 6400
6401 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6402 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6403 return -EIO;
6404 }
6405
6406 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6407 IWL_WARNING("Radio disabled by SW RF kill (module "
6408 "parameter)\n");
e655b9f0
ZY		 6409 return -ENODEV;
6410 }
6411
e903fbd4
RC		 6412 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6413 IWL_ERROR("ucode not available for device bringup\n");
6414 return -EIO;
6415 }
6416
e655b9f0
ZY		 6417 /* If platform's RF_KILL switch is NOT set to KILL */
6418 if (iwl4965_read32(priv, CSR_GP_CNTRL) &
6419 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6420 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6421 else {
6422 set_bit(STATUS_RF_KILL_HW, &priv->status);
6423 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6424 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6425 return -ENODEV;
6426 }
b481de9c
ZY		 6427 }
6428
bb8c093b 6429 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 6430
bb8c093b 6431 rc = iwl4965_hw_nic_init(priv);
b481de9c
ZY		 6432 if (rc) {
6433 IWL_ERROR("Unable to int nic\n");
6434 return rc;
6435 }
6436
6437 /* make sure rfkill handshake bits are cleared */
bb8c093b
CH		 6438 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6439 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 6440 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6441
6442 /* clear (again), then enable host interrupts */
bb8c093b
CH		 6443 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6444 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 6445
6446 /* really make sure rfkill handshake bits are cleared */
bb8c093b
CH		 6447 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6448 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 6449
6450 /* Copy original ucode data image from disk into backup cache.
6451 * This will be used to initialize the on-board processor's
6452 * data SRAM for a clean start when the runtime program first loads. */
6453 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 6454 priv->ucode_data.len);
b481de9c 6455
e655b9f0
ZY		 6456 /* We return success when we resume from suspend and rf_kill is on. */
6457 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
b481de9c 6458 return 0;
b481de9c
ZY		 6459
6460 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6461
bb8c093b 6462 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6463
6464 /* load bootstrap state machine,
6465 * load bootstrap program into processor's memory,
6466 * prepare to load the "initialize" uCode */
bb8c093b 6467 rc = iwl4965_load_bsm(priv);
b481de9c
ZY		 6468
6469 if (rc) {
6470 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6471 continue;
6472 }
6473
6474 /* start card; "initialize" will load runtime ucode */
bb8c093b 6475 iwl4965_nic_start(priv);
b481de9c 6476
b481de9c
ZY		 6477 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6478
6479 return 0;
6480 }
6481
6482 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 6483 __iwl4965_down(priv);
b481de9c
ZY		 6484
6485 /* tried to restart and config the device for as long as our
6486 * patience could withstand */
6487 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6488 return -EIO;
6489}
6490
6491
6492/*****************************************************************************
6493 *
6494 * Workqueue callbacks
6495 *
6496 *****************************************************************************/
6497
bb8c093b 6498static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 6499{
c79dd5b5
TW		 6500 struct iwl_priv *priv =
6501 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 6502
6503 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6504 return;
6505
6506 mutex_lock(&priv->mutex);
bb8c093b 6507 iwl4965_init_alive_start(priv);
b481de9c
ZY		 6508 mutex_unlock(&priv->mutex);
6509}
6510
bb8c093b 6511static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 6512{
c79dd5b5
TW		 6513 struct iwl_priv *priv =
6514 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 6515
6516 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6517 return;
6518
6519 mutex_lock(&priv->mutex);
bb8c093b 6520 iwl4965_alive_start(priv);
b481de9c
ZY		 6521 mutex_unlock(&priv->mutex);
6522}
6523
bb8c093b 6524static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 6525{
c79dd5b5 6526 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY		 6527
6528 wake_up_interruptible(&priv->wait_command_queue);
6529
6530 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6531 return;
6532
6533 mutex_lock(&priv->mutex);
6534
bb8c093b 6535 if (!iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 6536 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6537 "HW and/or SW RF Kill no longer active, restarting "
6538 "device\n");
6539 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6540 queue_work(priv->workqueue, &priv->restart);
6541 } else {
6542
6543 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6544 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6545 "disabled by SW switch\n");
6546 else
6547 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6548 "Kill switch must be turned off for "
6549 "wireless networking to work.\n");
6550 }
6551 mutex_unlock(&priv->mutex);
6552}
6553
6554#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6555
bb8c093b 6556static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 6557{
c79dd5b5
TW		 6558 struct iwl_priv *priv =
6559 container_of(data, struct iwl_priv, scan_check.work);
b481de9c
ZY		 6560
6561 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6562 return;
6563
6564 mutex_lock(&priv->mutex);
6565 if (test_bit(STATUS_SCANNING, &priv->status) ||
6566 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6567 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6568 "Scan completion watchdog resetting adapter (%dms)\n",
6569 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 6570
b481de9c 6571 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 6572 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 6573 }
6574 mutex_unlock(&priv->mutex);
6575}
6576
bb8c093b 6577static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 6578{
c79dd5b5
TW		 6579 struct iwl_priv *priv =
6580 container_of(data, struct iwl_priv, request_scan);
bb8c093b 6581 struct iwl4965_host_cmd cmd = {
b481de9c 6582 .id = REPLY_SCAN_CMD,
bb8c093b 6583 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY		 6584 .meta.flags = CMD_SIZE_HUGE,
6585 };
6586 int rc = 0;
bb8c093b 6587 struct iwl4965_scan_cmd *scan;
b481de9c 6588 struct ieee80211_conf *conf = NULL;
78330fdd 6589 u16 cmd_len;
8318d78a 6590 enum ieee80211_band band;
78330fdd 6591 u8 direct_mask;
b481de9c
ZY		 6592
6593 conf = ieee80211_get_hw_conf(priv->hw);
6594
6595 mutex_lock(&priv->mutex);
6596
bb8c093b 6597 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY		 6598 IWL_WARNING("request scan called when driver not ready.\n");
6599 goto done;
6600 }
6601
6602 /* Make sure the scan wasn't cancelled before this queued work
6603 * was given the chance to run... */
6604 if (!test_bit(STATUS_SCANNING, &priv->status))
6605 goto done;
6606
6607 /* This should never be called or scheduled if there is currently
6608 * a scan active in the hardware. */
6609 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6610 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6611 "Ignoring second request.\n");
6612 rc = -EIO;
6613 goto done;
6614 }
6615
6616 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6617 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6618 goto done;
6619 }
6620
6621 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6622 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6623 goto done;
6624 }
6625
bb8c093b 6626 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 6627 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6628 goto done;
6629 }
6630
6631 if (!test_bit(STATUS_READY, &priv->status)) {
6632 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6633 goto done;
6634 }
6635
6636 if (!priv->scan_bands) {
6637 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6638 goto done;
6639 }
6640
6641 if (!priv->scan) {
bb8c093b 6642 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY		 6643 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6644 if (!priv->scan) {
6645 rc = -ENOMEM;
6646 goto done;
6647 }
6648 }
6649 scan = priv->scan;
bb8c093b 6650 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY		 6651
6652 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6653 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6654
bb8c093b 6655 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 6656 u16 interval = 0;
6657 u32 extra;
6658 u32 suspend_time = 100;
6659 u32 scan_suspend_time = 100;
6660 unsigned long flags;
6661
6662 IWL_DEBUG_INFO("Scanning while associated...\n");
6663
6664 spin_lock_irqsave(&priv->lock, flags);
6665 interval = priv->beacon_int;
6666 spin_unlock_irqrestore(&priv->lock, flags);
6667
6668 scan->suspend_time = 0;
052c4b9f 6669 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY		 6670 if (!interval)
6671 interval = suspend_time;
6672
6673 extra = (suspend_time / interval) << 22;
6674 scan_suspend_time = (extra |
6675 ((suspend_time % interval) * 1024));
6676 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6677 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6678 scan_suspend_time, interval);
6679 }
6680
6681 /* We should add the ability for user to lock to PASSIVE ONLY */
6682 if (priv->one_direct_scan) {
6683 IWL_DEBUG_SCAN
6684 ("Kicking off one direct scan for '%s'\n",
bb8c093b 6685 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY		 6686 priv->direct_ssid_len));
6687 scan->direct_scan[0].id = WLAN_EID_SSID;
6688 scan->direct_scan[0].len = priv->direct_ssid_len;
6689 memcpy(scan->direct_scan[0].ssid,
6690 priv->direct_ssid, priv->direct_ssid_len);
6691 direct_mask = 1;
bb8c093b 6692 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
b481de9c
ZY		 6693 scan->direct_scan[0].id = WLAN_EID_SSID;
6694 scan->direct_scan[0].len = priv->essid_len;
6695 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6696 direct_mask = 1;
6697 } else
6698 direct_mask = 0;
6699
b481de9c
ZY		 6700 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6701 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6702 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6703
b481de9c
ZY		 6704
6705 switch (priv->scan_bands) {
6706 case 2:
6707 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6708 scan->tx_cmd.rate_n_flags =
bb8c093b 6709 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY		 6710 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
6711
6712 scan->good_CRC_th = 0;
8318d78a 6713 band = IEEE80211_BAND_2GHZ;
b481de9c
ZY		 6714 break;
6715
6716 case 1:
6717 scan->tx_cmd.rate_n_flags =
bb8c093b 6718 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY		 6719 RATE_MCS_ANT_B_MSK);
6720 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 6721 band = IEEE80211_BAND_5GHZ;
b481de9c
ZY		 6722 break;
6723
6724 default:
6725 IWL_WARNING("Invalid scan band count\n");
6726 goto done;
6727 }
6728
78330fdd
TW		 6729 /* We don't build a direct scan probe request; the uCode will do
6730 * that based on the direct_mask added to each channel entry */
6731 cmd_len = iwl4965_fill_probe_req(priv, band,
6732 (struct ieee80211_mgmt *)scan->data,
6733 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
6734
6735 scan->tx_cmd.len = cpu_to_le16(cmd_len);
b481de9c
ZY		 6736 /* select Rx chains */
6737
6738 /* Force use of chains B and C (0x6) for scan Rx.
6739 * Avoid A (0x1) because of its off-channel reception on A-band.
6740 * MIMO is not used here, but value is required to make uCode happy. */
6741 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
6742 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
6743 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
6744 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
6745
6746 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6747 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6748
26c0f03f 6749 if (direct_mask) {
b481de9c
ZY		 6750 IWL_DEBUG_SCAN
6751 ("Initiating direct scan for %s.\n",
bb8c093b 6752 iwl4965_escape_essid(priv->essid, priv->essid_len));
26c0f03f
RC		 6753 scan->channel_count =
6754 iwl4965_get_channels_for_scan(
6755 priv, band, 1, /* active */
6756 direct_mask,
6757 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6758 } else {
b481de9c 6759 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
26c0f03f
RC		 6760 scan->channel_count =
6761 iwl4965_get_channels_for_scan(
6762 priv, band, 0, /* passive */
6763 direct_mask,
6764 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6765 }
b481de9c
ZY		 6766
6767 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 6768 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY		 6769 cmd.data = scan;
6770 scan->len = cpu_to_le16(cmd.len);
6771
6772 set_bit(STATUS_SCAN_HW, &priv->status);
bb8c093b 6773 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 6774 if (rc)
6775 goto done;
6776
6777 queue_delayed_work(priv->workqueue, &priv->scan_check,
6778 IWL_SCAN_CHECK_WATCHDOG);
6779
6780 mutex_unlock(&priv->mutex);
6781 return;
6782
6783 done:
01ebd063 6784 /* inform mac80211 scan aborted */
b481de9c
ZY		 6785 queue_work(priv->workqueue, &priv->scan_completed);
6786 mutex_unlock(&priv->mutex);
6787}
6788
bb8c093b 6789static void iwl4965_bg_up(struct work_struct *data)
b481de9c 6790{
c79dd5b5 6791 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 6792
6793 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6794 return;
6795
6796 mutex_lock(&priv->mutex);
bb8c093b 6797 __iwl4965_up(priv);
b481de9c
ZY		 6798 mutex_unlock(&priv->mutex);
6799}
6800
bb8c093b 6801static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 6802{
c79dd5b5 6803 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 6804
6805 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6806 return;
6807
bb8c093b 6808 iwl4965_down(priv);
b481de9c
ZY		 6809 queue_work(priv->workqueue, &priv->up);
6810}
6811
bb8c093b 6812static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 6813{
c79dd5b5
TW		 6814 struct iwl_priv *priv =
6815 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 6816
6817 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6818 return;
6819
6820 mutex_lock(&priv->mutex);
bb8c093b 6821 iwl4965_rx_replenish(priv);
b481de9c
ZY		 6822 mutex_unlock(&priv->mutex);
6823}
6824
7878a5a4
MA		 6825#define IWL_DELAY_NEXT_SCAN (HZ*2)
6826
bb8c093b 6827static void iwl4965_bg_post_associate(struct work_struct *data)
b481de9c 6828{
c79dd5b5 6829 struct iwl_priv *priv = container_of(data, struct iwl_priv,
b481de9c
ZY		 6830 post_associate.work);
6831
6832 int rc = 0;
6833 struct ieee80211_conf *conf = NULL;
0795af57 6834 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 6835
6836 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6837 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6838 return;
6839 }
6840
0795af57
JP		 6841 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6842 priv->assoc_id,
6843 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY		 6844
6845
6846 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6847 return;
6848
6849 mutex_lock(&priv->mutex);
6850
32bfd35d 6851 if (!priv->vif || !priv->is_open) {
948c171c
MA		 6852 mutex_unlock(&priv->mutex);
6853 return;
6854 }
bb8c093b 6855 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 6856
b481de9c
ZY		 6857 conf = ieee80211_get_hw_conf(priv->hw);
6858
6859 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6860 iwl4965_commit_rxon(priv);
b481de9c 6861
bb8c093b
CH		 6862 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
6863 iwl4965_setup_rxon_timing(priv);
6864 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY		 6865 sizeof(priv->rxon_timing), &priv->rxon_timing);
6866 if (rc)
6867 IWL_WARNING("REPLY_RXON_TIMING failed - "
6868 "Attempting to continue.\n");
6869
6870 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6871
c8b0e6e1 6872#ifdef CONFIG_IWL4965_HT
fd105e79
RR		 6873 if (priv->current_ht_config.is_ht)
6874 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 6875#endif /* CONFIG_IWL4965_HT*/
b481de9c
ZY		 6876 iwl4965_set_rxon_chain(priv);
6877 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6878
6879 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6880 priv->assoc_id, priv->beacon_int);
6881
6882 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6883 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6884 else
6885 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6886
6887 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6888 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6889 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6890 else
6891 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6892
6893 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6894 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6895
6896 }
6897
bb8c093b 6898 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6899
6900 switch (priv->iw_mode) {
6901 case IEEE80211_IF_TYPE_STA:
bb8c093b 6902 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY		 6903 break;
6904
6905 case IEEE80211_IF_TYPE_IBSS:
6906
6907 /* clear out the station table */
bb8c093b 6908 iwl4965_clear_stations_table(priv);
b481de9c 6909
bb8c093b
CH		 6910 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
6911 iwl4965_rxon_add_station(priv, priv->bssid, 0);
6912 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
6913 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 6914
6915 break;
6916
6917 default:
6918 IWL_ERROR("%s Should not be called in %d mode\n",
6919 __FUNCTION__, priv->iw_mode);
6920 break;
6921 }
6922
bb8c093b 6923 iwl4965_sequence_reset(priv);
b481de9c 6924
c8b0e6e1 6925#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 6926 /* Enable Rx differential gain and sensitivity calibrations */
6927 iwl4965_chain_noise_reset(priv);
6928 priv->start_calib = 1;
c8b0e6e1 6929#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 6930
6931 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6932 priv->assoc_station_added = 1;
6933
bb8c093b 6934 iwl4965_activate_qos(priv, 0);
292ae174 6935
7878a5a4
MA		 6936 /* we have just associated, don't start scan too early */
6937 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
b481de9c
ZY		 6938 mutex_unlock(&priv->mutex);
6939}
6940
bb8c093b 6941static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 6942{
c79dd5b5 6943 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
b481de9c 6944
bb8c093b 6945 if (!iwl4965_is_ready(priv))
b481de9c
ZY		 6946 return;
6947
6948 mutex_lock(&priv->mutex);
6949
6950 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 6951 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 6952
6953 mutex_unlock(&priv->mutex);
6954}
6955
76bb77e0
ZY		 6956static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6957
bb8c093b 6958static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 6959{
c79dd5b5
TW		 6960 struct iwl_priv *priv =
6961 container_of(work, struct iwl_priv, scan_completed);
b481de9c
ZY		 6962
6963 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6964
6965 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6966 return;
6967
a0646470
ZY		 6968 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6969 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 6970
b481de9c
ZY		 6971 ieee80211_scan_completed(priv->hw);
6972
6973 /* Since setting the TXPOWER may have been deferred while
6974 * performing the scan, fire one off */
6975 mutex_lock(&priv->mutex);
bb8c093b 6976 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 6977 mutex_unlock(&priv->mutex);
6978}
6979
6980/*****************************************************************************
6981 *
6982 * mac80211 entry point functions
6983 *
6984 *****************************************************************************/
6985
5a66926a
ZY		 6986#define UCODE_READY_TIMEOUT (2 * HZ)
6987
bb8c093b 6988static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 6989{
c79dd5b5 6990 struct iwl_priv *priv = hw->priv;
5a66926a 6991 int ret;
b481de9c
ZY		 6992
6993 IWL_DEBUG_MAC80211("enter\n");
6994
5a66926a
ZY		 6995 if (pci_enable_device(priv->pci_dev)) {
6996 IWL_ERROR("Fail to pci_enable_device\n");
6997 return -ENODEV;
6998 }
6999 pci_restore_state(priv->pci_dev);
7000 pci_enable_msi(priv->pci_dev);
7001
7002 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
7003 DRV_NAME, priv);
7004 if (ret) {
7005 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
7006 goto out_disable_msi;
7007 }
7008
b481de9c
ZY		 7009 /* we should be verifying the device is ready to be opened */
7010 mutex_lock(&priv->mutex);
7011
5a66926a
ZY		 7012 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
7013 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
7014 * ucode filename and max sizes are card-specific. */
b481de9c 7015
5a66926a
ZY		 7016 if (!priv->ucode_code.len) {
7017 ret = iwl4965_read_ucode(priv);
7018 if (ret) {
7019 IWL_ERROR("Could not read microcode: %d\n", ret);
7020 mutex_unlock(&priv->mutex);
7021 goto out_release_irq;
7022 }
7023 }
b481de9c 7024
e655b9f0 7025 ret = __iwl4965_up(priv);
5a66926a 7026
b481de9c 7027 mutex_unlock(&priv->mutex);
5a66926a 7028
e655b9f0
ZY		 7029 if (ret)
7030 goto out_release_irq;
7031
7032 IWL_DEBUG_INFO("Start UP work done.\n");
7033
7034 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
7035 return 0;
7036
5a66926a
ZY		 7037 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
7038 * mac80211 will not be run successfully. */
7039 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
7040 test_bit(STATUS_READY, &priv->status),
7041 UCODE_READY_TIMEOUT);
7042 if (!ret) {
7043 if (!test_bit(STATUS_READY, &priv->status)) {
7044 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
7045 jiffies_to_msecs(UCODE_READY_TIMEOUT));
7046 ret = -ETIMEDOUT;
7047 goto out_release_irq;
7048 }
7049 }
7050
e655b9f0 7051 priv->is_open = 1;
b481de9c
ZY		 7052 IWL_DEBUG_MAC80211("leave\n");
7053 return 0;
5a66926a
ZY		 7054
7055out_release_irq:
7056 free_irq(priv->pci_dev->irq, priv);
7057out_disable_msi:
7058 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY		 7059 pci_disable_device(priv->pci_dev);
7060 priv->is_open = 0;
7061 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 7062 return ret;
b481de9c
ZY		 7063}
7064
bb8c093b 7065static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 7066{
c79dd5b5 7067 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7068
7069 IWL_DEBUG_MAC80211("enter\n");
948c171c 7070
e655b9f0
ZY		 7071 if (!priv->is_open) {
7072 IWL_DEBUG_MAC80211("leave - skip\n");
7073 return;
7074 }
7075
b481de9c 7076 priv->is_open = 0;
5a66926a
ZY		 7077
7078 if (iwl4965_is_ready_rf(priv)) {
e655b9f0
ZY		 7079 /* stop mac, cancel any scan request and clear
7080 * RXON_FILTER_ASSOC_MSK BIT
7081 */
5a66926a
ZY		 7082 mutex_lock(&priv->mutex);
7083 iwl4965_scan_cancel_timeout(priv, 100);
7084 cancel_delayed_work(&priv->post_associate);
fde3571f 7085 mutex_unlock(&priv->mutex);
fde3571f
MA		 7086 }
7087
5a66926a
ZY		 7088 iwl4965_down(priv);
7089
7090 flush_workqueue(priv->workqueue);
7091 free_irq(priv->pci_dev->irq, priv);
7092 pci_disable_msi(priv->pci_dev);
7093 pci_save_state(priv->pci_dev);
7094 pci_disable_device(priv->pci_dev);
948c171c 7095
b481de9c 7096 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7097}
7098
bb8c093b 7099static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 7100 struct ieee80211_tx_control *ctl)
7101{
c79dd5b5 7102 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7103
7104 IWL_DEBUG_MAC80211("enter\n");
7105
7106 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7107 IWL_DEBUG_MAC80211("leave - monitor\n");
7108 return -1;
7109 }
7110
7111 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
8318d78a 7112 ctl->tx_rate->bitrate);
b481de9c 7113
bb8c093b 7114 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY		 7115 dev_kfree_skb_any(skb);
7116
7117 IWL_DEBUG_MAC80211("leave\n");
7118 return 0;
7119}
7120
bb8c093b 7121static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 7122 struct ieee80211_if_init_conf *conf)
7123{
c79dd5b5 7124 struct iwl_priv *priv = hw->priv;
b481de9c 7125 unsigned long flags;
0795af57 7126 DECLARE_MAC_BUF(mac);
b481de9c 7127
32bfd35d 7128 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 7129
32bfd35d
JB		 7130 if (priv->vif) {
7131 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 7132 return -EOPNOTSUPP;
b481de9c
ZY		 7133 }
7134
7135 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 7136 priv->vif = conf->vif;
b481de9c
ZY		 7137
7138 spin_unlock_irqrestore(&priv->lock, flags);
7139
7140 mutex_lock(&priv->mutex);
864792e3
TW		 7141
7142 if (conf->mac_addr) {
7143 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7144 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7145 }
b481de9c 7146
5a66926a
ZY		 7147 if (iwl4965_is_ready(priv))
7148 iwl4965_set_mode(priv, conf->type);
7149
b481de9c
ZY		 7150 mutex_unlock(&priv->mutex);
7151
5a66926a 7152 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7153 return 0;
7154}
7155
7156/**
bb8c093b 7157 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY		 7158 *
7159 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7160 * be set inappropriately and the driver currently sets the hardware up to
7161 * use it whenever needed.
7162 */
bb8c093b 7163static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 7164{
c79dd5b5 7165 struct iwl_priv *priv = hw->priv;
bb8c093b 7166 const struct iwl4965_channel_info *ch_info;
b481de9c 7167 unsigned long flags;
76bb77e0 7168 int ret = 0;
b481de9c
ZY		 7169
7170 mutex_lock(&priv->mutex);
8318d78a 7171 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 7172
12342c47
ZY		 7173 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7174
bb8c093b 7175 if (!iwl4965_is_ready(priv)) {
b481de9c 7176 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 7177 ret = -EIO;
7178 goto out;
b481de9c
ZY		 7179 }
7180
bb8c093b 7181 if (unlikely(!iwl4965_param_disable_hw_scan &&
b481de9c 7182 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY		 7183 IWL_DEBUG_MAC80211("leave - scanning\n");
7184 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 7185 mutex_unlock(&priv->mutex);
a0646470 7186 return 0;
b481de9c
ZY		 7187 }
7188
7189 spin_lock_irqsave(&priv->lock, flags);
7190
8318d78a
JB		 7191 ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
7192 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 7193 if (!is_channel_valid(ch_info)) {
b481de9c
ZY		 7194 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7195 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY		 7196 ret = -EINVAL;
7197 goto out;
b481de9c
ZY		 7198 }
7199
c8b0e6e1 7200#ifdef CONFIG_IWL4965_HT
78330fdd 7201 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 7202 * from any ht related info since 2.4 does not
7203 * support ht */
78330fdd 7204 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
b481de9c
ZY		 7205#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7206 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7207#endif
7208 )
7209 priv->staging_rxon.flags = 0;
c8b0e6e1 7210#endif /* CONFIG_IWL4965_HT */
b481de9c 7211
8318d78a
JB		 7212 iwl4965_set_rxon_channel(priv, conf->channel->band,
7213 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 7214
8318d78a 7215 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
b481de9c
ZY		 7216
7217 /* The list of supported rates and rate mask can be different
8318d78a 7218 * for each band; since the band may have changed, reset
b481de9c 7219 * the rate mask to what mac80211 lists */
bb8c093b 7220 iwl4965_set_rate(priv);
b481de9c
ZY		 7221
7222 spin_unlock_irqrestore(&priv->lock, flags);
7223
7224#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7225 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 7226 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 7227 goto out;
b481de9c
ZY		 7228 }
7229#endif
7230
bb8c093b 7231 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY		 7232
7233 if (!conf->radio_enabled) {
7234 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 7235 goto out;
b481de9c
ZY		 7236 }
7237
bb8c093b 7238 if (iwl4965_is_rfkill(priv)) {
b481de9c 7239 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 7240 ret = -EIO;
7241 goto out;
b481de9c
ZY		 7242 }
7243
bb8c093b 7244 iwl4965_set_rate(priv);
b481de9c
ZY		 7245
7246 if (memcmp(&priv->active_rxon,
7247 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 7248 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7249 else
7250 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7251
7252 IWL_DEBUG_MAC80211("leave\n");
7253
a0646470
ZY		 7254out:
7255 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 7256 mutex_unlock(&priv->mutex);
76bb77e0 7257 return ret;
b481de9c
ZY		 7258}
7259
c79dd5b5 7260static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c
ZY		 7261{
7262 int rc = 0;
7263
d986bcd1 7264 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 7265 return;
7266
7267 /* The following should be done only at AP bring up */
7268 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7269
7270 /* RXON - unassoc (to set timing command) */
7271 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7272 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7273
7274 /* RXON Timing */
bb8c093b
CH		 7275 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7276 iwl4965_setup_rxon_timing(priv);
7277 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY		 7278 sizeof(priv->rxon_timing), &priv->rxon_timing);
7279 if (rc)
7280 IWL_WARNING("REPLY_RXON_TIMING failed - "
7281 "Attempting to continue.\n");
7282
7283 iwl4965_set_rxon_chain(priv);
7284
7285 /* FIXME: what should be the assoc_id for AP? */
7286 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7287 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7288 priv->staging_rxon.flags |=
7289 RXON_FLG_SHORT_PREAMBLE_MSK;
7290 else
7291 priv->staging_rxon.flags &=
7292 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7293
7294 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7295 if (priv->assoc_capability &
7296 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7297 priv->staging_rxon.flags |=
7298 RXON_FLG_SHORT_SLOT_MSK;
7299 else
7300 priv->staging_rxon.flags &=
7301 ~RXON_FLG_SHORT_SLOT_MSK;
7302
7303 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7304 priv->staging_rxon.flags &=
7305 ~RXON_FLG_SHORT_SLOT_MSK;
7306 }
7307 /* restore RXON assoc */
7308 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 7309 iwl4965_commit_rxon(priv);
bb8c093b 7310 iwl4965_activate_qos(priv, 1);
bb8c093b 7311 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 7312 }
bb8c093b 7313 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 7314
7315 /* FIXME - we need to add code here to detect a totally new
7316 * configuration, reset the AP, unassoc, rxon timing, assoc,
7317 * clear sta table, add BCAST sta... */
7318}
7319
32bfd35d
JB		 7320static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
7321 struct ieee80211_vif *vif,
b481de9c
ZY		 7322 struct ieee80211_if_conf *conf)
7323{
c79dd5b5 7324 struct iwl_priv *priv = hw->priv;
0795af57 7325 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7326 unsigned long flags;
7327 int rc;
7328
7329 if (conf == NULL)
7330 return -EIO;
7331
b716bb91
EG		 7332 if (priv->vif != vif) {
7333 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
7334 mutex_unlock(&priv->mutex);
7335 return 0;
7336 }
7337
b481de9c
ZY		 7338 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7339 (!conf->beacon || !conf->ssid_len)) {
7340 IWL_DEBUG_MAC80211
7341 ("Leaving in AP mode because HostAPD is not ready.\n");
7342 return 0;
7343 }
7344
5a66926a
ZY		 7345 if (!iwl4965_is_alive(priv))
7346 return -EAGAIN;
7347
b481de9c
ZY		 7348 mutex_lock(&priv->mutex);
7349
b481de9c 7350 if (conf->bssid)
0795af57
JP		 7351 IWL_DEBUG_MAC80211("bssid: %s\n",
7352 print_mac(mac, conf->bssid));
b481de9c 7353
4150c572
JB		 7354/*
7355 * very dubious code was here; the probe filtering flag is never set:
7356 *
b481de9c
ZY		 7357 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7358 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 7359 */
b481de9c
ZY		 7360
7361 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7362 if (!conf->bssid) {
7363 conf->bssid = priv->mac_addr;
7364 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP		 7365 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7366 print_mac(mac, conf->bssid));
b481de9c
ZY		 7367 }
7368 if (priv->ibss_beacon)
7369 dev_kfree_skb(priv->ibss_beacon);
7370
7371 priv->ibss_beacon = conf->beacon;
7372 }
7373
fde3571f
MA		 7374 if (iwl4965_is_rfkill(priv))
7375 goto done;
7376
b481de9c
ZY		 7377 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7378 !is_multicast_ether_addr(conf->bssid)) {
7379 /* If there is currently a HW scan going on in the background
7380 * then we need to cancel it else the RXON below will fail. */
bb8c093b 7381 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY		 7382 IWL_WARNING("Aborted scan still in progress "
7383 "after 100ms\n");
7384 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7385 mutex_unlock(&priv->mutex);
7386 return -EAGAIN;
7387 }
7388 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7389
7390 /* TODO: Audit driver for usage of these members and see
7391 * if mac80211 deprecates them (priv->bssid looks like it
7392 * shouldn't be there, but I haven't scanned the IBSS code
7393 * to verify) - jpk */
7394 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7395
7396 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 7397 iwl4965_config_ap(priv);
b481de9c 7398 else {
bb8c093b 7399 rc = iwl4965_commit_rxon(priv);
b481de9c 7400 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 7401 iwl4965_rxon_add_station(
b481de9c
ZY		 7402 priv, priv->active_rxon.bssid_addr, 1);
7403 }
7404
7405 } else {
bb8c093b 7406 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 7407 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7408 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7409 }
7410
fde3571f 7411 done:
b481de9c
ZY		 7412 spin_lock_irqsave(&priv->lock, flags);
7413 if (!conf->ssid_len)
7414 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7415 else
7416 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7417
7418 priv->essid_len = conf->ssid_len;
7419 spin_unlock_irqrestore(&priv->lock, flags);
7420
7421 IWL_DEBUG_MAC80211("leave\n");
7422 mutex_unlock(&priv->mutex);
7423
7424 return 0;
7425}
7426
bb8c093b 7427static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 7428 unsigned int changed_flags,
7429 unsigned int *total_flags,
7430 int mc_count, struct dev_addr_list *mc_list)
7431{
7432 /*
7433 * XXX: dummy
bb8c093b 7434 * see also iwl4965_connection_init_rx_config
4150c572
JB		 7435 */
7436 *total_flags = 0;
7437}
7438
bb8c093b 7439static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 7440 struct ieee80211_if_init_conf *conf)
7441{
c79dd5b5 7442 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7443
7444 IWL_DEBUG_MAC80211("enter\n");
7445
7446 mutex_lock(&priv->mutex);
948c171c 7447
fde3571f
MA		 7448 if (iwl4965_is_ready_rf(priv)) {
7449 iwl4965_scan_cancel_timeout(priv, 100);
7450 cancel_delayed_work(&priv->post_associate);
7451 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7452 iwl4965_commit_rxon(priv);
7453 }
32bfd35d
JB		 7454 if (priv->vif == conf->vif) {
7455 priv->vif = NULL;
b481de9c
ZY		 7456 memset(priv->bssid, 0, ETH_ALEN);
7457 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7458 priv->essid_len = 0;
7459 }
7460 mutex_unlock(&priv->mutex);
7461
7462 IWL_DEBUG_MAC80211("leave\n");
7463
7464}
471b3efd
JB		 7465
7466static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
7467 struct ieee80211_vif *vif,
7468 struct ieee80211_bss_conf *bss_conf,
7469 u32 changes)
220173b0 7470{
c79dd5b5 7471 struct iwl_priv *priv = hw->priv;
220173b0 7472
471b3efd
JB		 7473 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
7474 if (bss_conf->use_short_preamble)
220173b0
TW		 7475 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7476 else
7477 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7478 }
7479
471b3efd 7480 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
8318d78a 7481 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 7482 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7483 else
7484 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7485 }
7486
471b3efd
JB		 7487 if (changes & BSS_CHANGED_ASSOC) {
7488 /*
7489 * TODO:
7490 * do stuff instead of sniffing assoc resp
7491 */
7492 }
7493
bb8c093b
CH		 7494 if (iwl4965_is_associated(priv))
7495 iwl4965_send_rxon_assoc(priv);
220173b0 7496}
b481de9c 7497
bb8c093b 7498static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY		 7499{
7500 int rc = 0;
7501 unsigned long flags;
c79dd5b5 7502 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7503
7504 IWL_DEBUG_MAC80211("enter\n");
7505
052c4b9f 7506 mutex_lock(&priv->mutex);
b481de9c
ZY		 7507 spin_lock_irqsave(&priv->lock, flags);
7508
bb8c093b 7509 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7510 rc = -EIO;
7511 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7512 goto out_unlock;
7513 }
7514
7515 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7516 rc = -EIO;
7517 IWL_ERROR("ERROR: APs don't scan\n");
7518 goto out_unlock;
7519 }
7520
7878a5a4
MA		 7521 /* we don't schedule scan within next_scan_jiffies period */
7522 if (priv->next_scan_jiffies &&
7523 time_after(priv->next_scan_jiffies, jiffies)) {
7524 rc = -EAGAIN;
7525 goto out_unlock;
7526 }
b481de9c 7527 /* if we just finished scan ask for delay */
7878a5a4
MA		 7528 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7529 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY		 7530 rc = -EAGAIN;
7531 goto out_unlock;
7532 }
7533 if (len) {
7878a5a4 7534 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 7535 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY		 7536
7537 priv->one_direct_scan = 1;
7538 priv->direct_ssid_len = (u8)
7539 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7540 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA		 7541 } else
7542 priv->one_direct_scan = 0;
b481de9c 7543
bb8c093b 7544 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY		 7545
7546 IWL_DEBUG_MAC80211("leave\n");
7547
7548out_unlock:
7549 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 7550 mutex_unlock(&priv->mutex);
b481de9c
ZY		 7551
7552 return rc;
7553}
7554
bb8c093b 7555static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY		 7556 const u8 *local_addr, const u8 *addr,
7557 struct ieee80211_key_conf *key)
7558{
c79dd5b5 7559 struct iwl_priv *priv = hw->priv;
0795af57 7560 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7561 int rc = 0;
7562 u8 sta_id;
7563
7564 IWL_DEBUG_MAC80211("enter\n");
7565
bb8c093b 7566 if (!iwl4965_param_hwcrypto) {
b481de9c
ZY		 7567 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7568 return -EOPNOTSUPP;
7569 }
7570
7571 if (is_zero_ether_addr(addr))
7572 /* only support pairwise keys */
7573 return -EOPNOTSUPP;
7574
bb8c093b 7575 sta_id = iwl4965_hw_find_station(priv, addr);
b481de9c 7576 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 7577 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7578 print_mac(mac, addr));
b481de9c
ZY		 7579 return -EINVAL;
7580 }
7581
7582 mutex_lock(&priv->mutex);
7583
bb8c093b 7584 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7585
b481de9c
ZY		 7586 switch (cmd) {
7587 case SET_KEY:
bb8c093b 7588 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
b481de9c 7589 if (!rc) {
bb8c093b
CH		 7590 iwl4965_set_rxon_hwcrypto(priv, 1);
7591 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7592 key->hw_key_idx = sta_id;
7593 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7594 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7595 }
7596 break;
7597 case DISABLE_KEY:
bb8c093b 7598 rc = iwl4965_clear_sta_key_info(priv, sta_id);
b481de9c 7599 if (!rc) {
bb8c093b
CH		 7600 iwl4965_set_rxon_hwcrypto(priv, 0);
7601 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7602 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7603 }
7604 break;
7605 default:
7606 rc = -EINVAL;
7607 }
7608
7609 IWL_DEBUG_MAC80211("leave\n");
7610 mutex_unlock(&priv->mutex);
7611
7612 return rc;
7613}
7614
bb8c093b 7615static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY		 7616 const struct ieee80211_tx_queue_params *params)
7617{
c79dd5b5 7618 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7619 unsigned long flags;
7620 int q;
b481de9c
ZY		 7621
7622 IWL_DEBUG_MAC80211("enter\n");
7623
bb8c093b 7624 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7625 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7626 return -EIO;
7627 }
7628
7629 if (queue >= AC_NUM) {
7630 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7631 return 0;
7632 }
7633
b481de9c
ZY		 7634 if (!priv->qos_data.qos_enable) {
7635 priv->qos_data.qos_active = 0;
7636 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7637 return 0;
7638 }
7639 q = AC_NUM - 1 - queue;
7640
7641 spin_lock_irqsave(&priv->lock, flags);
7642
7643 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7644 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7645 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7646 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 7647 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 7648
7649 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7650 priv->qos_data.qos_active = 1;
7651
7652 spin_unlock_irqrestore(&priv->lock, flags);
7653
7654 mutex_lock(&priv->mutex);
7655 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b
CH		 7656 iwl4965_activate_qos(priv, 1);
7657 else if (priv->assoc_id && iwl4965_is_associated(priv))
7658 iwl4965_activate_qos(priv, 0);
b481de9c
ZY		 7659
7660 mutex_unlock(&priv->mutex);
7661
b481de9c
ZY		 7662 IWL_DEBUG_MAC80211("leave\n");
7663 return 0;
7664}
7665
bb8c093b 7666static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 7667 struct ieee80211_tx_queue_stats *stats)
7668{
c79dd5b5 7669 struct iwl_priv *priv = hw->priv;
b481de9c 7670 int i, avail;
bb8c093b
CH		 7671 struct iwl4965_tx_queue *txq;
7672 struct iwl4965_queue *q;
b481de9c
ZY		 7673 unsigned long flags;
7674
7675 IWL_DEBUG_MAC80211("enter\n");
7676
bb8c093b 7677 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7678 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7679 return -EIO;
7680 }
7681
7682 spin_lock_irqsave(&priv->lock, flags);
7683
7684 for (i = 0; i < AC_NUM; i++) {
7685 txq = &priv->txq[i];
7686 q = &txq->q;
bb8c093b 7687 avail = iwl4965_queue_space(q);
b481de9c
ZY		 7688
7689 stats->data[i].len = q->n_window - avail;
7690 stats->data[i].limit = q->n_window - q->high_mark;
7691 stats->data[i].count = q->n_window;
7692
7693 }
7694 spin_unlock_irqrestore(&priv->lock, flags);
7695
7696 IWL_DEBUG_MAC80211("leave\n");
7697
7698 return 0;
7699}
7700
bb8c093b 7701static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 7702 struct ieee80211_low_level_stats *stats)
7703{
7704 IWL_DEBUG_MAC80211("enter\n");
7705 IWL_DEBUG_MAC80211("leave\n");
7706
7707 return 0;
7708}
7709
bb8c093b 7710static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY		 7711{
7712 IWL_DEBUG_MAC80211("enter\n");
7713 IWL_DEBUG_MAC80211("leave\n");
7714
7715 return 0;
7716}
7717
bb8c093b 7718static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 7719{
c79dd5b5 7720 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7721 unsigned long flags;
7722
7723 mutex_lock(&priv->mutex);
7724 IWL_DEBUG_MAC80211("enter\n");
7725
7726 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 7727#ifdef CONFIG_IWL4965_HT
b481de9c 7728 spin_lock_irqsave(&priv->lock, flags);
fd105e79 7729 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 7730 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 7731#endif /* CONFIG_IWL4965_HT */
b481de9c 7732
bb8c093b 7733 iwl4965_reset_qos(priv);
b481de9c
ZY		 7734
7735 cancel_delayed_work(&priv->post_associate);
7736
7737 spin_lock_irqsave(&priv->lock, flags);
7738 priv->assoc_id = 0;
7739 priv->assoc_capability = 0;
7740 priv->call_post_assoc_from_beacon = 0;
7741 priv->assoc_station_added = 0;
7742
7743 /* new association get rid of ibss beacon skb */
7744 if (priv->ibss_beacon)
7745 dev_kfree_skb(priv->ibss_beacon);
7746
7747 priv->ibss_beacon = NULL;
7748
7749 priv->beacon_int = priv->hw->conf.beacon_int;
7750 priv->timestamp1 = 0;
7751 priv->timestamp0 = 0;
7752 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7753 priv->beacon_int = 0;
7754
7755 spin_unlock_irqrestore(&priv->lock, flags);
7756
fde3571f
MA		 7757 if (!iwl4965_is_ready_rf(priv)) {
7758 IWL_DEBUG_MAC80211("leave - not ready\n");
7759 mutex_unlock(&priv->mutex);
7760 return;
7761 }
7762
052c4b9f 7763 /* we are restarting association process
7764 * clear RXON_FILTER_ASSOC_MSK bit
7765 */
7766 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 7767 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7768 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7769 iwl4965_commit_rxon(priv);
052c4b9f 7770 }
7771
b481de9c
ZY		 7772 /* Per mac80211.h: This is only used in IBSS mode... */
7773 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 7774
b481de9c
ZY		 7775 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7776 mutex_unlock(&priv->mutex);
7777 return;
7778 }
7779
b481de9c
ZY		 7780 priv->only_active_channel = 0;
7781
bb8c093b 7782 iwl4965_set_rate(priv);
b481de9c
ZY		 7783
7784 mutex_unlock(&priv->mutex);
7785
7786 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7787}
7788
bb8c093b 7789static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 7790 struct ieee80211_tx_control *control)
7791{
c79dd5b5 7792 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7793 unsigned long flags;
7794
7795 mutex_lock(&priv->mutex);
7796 IWL_DEBUG_MAC80211("enter\n");
7797
bb8c093b 7798 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7799 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7800 mutex_unlock(&priv->mutex);
7801 return -EIO;
7802 }
7803
7804 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7805 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7806 mutex_unlock(&priv->mutex);
7807 return -EIO;
7808 }
7809
7810 spin_lock_irqsave(&priv->lock, flags);
7811
7812 if (priv->ibss_beacon)
7813 dev_kfree_skb(priv->ibss_beacon);
7814
7815 priv->ibss_beacon = skb;
7816
7817 priv->assoc_id = 0;
7818
7819 IWL_DEBUG_MAC80211("leave\n");
7820 spin_unlock_irqrestore(&priv->lock, flags);
7821
bb8c093b 7822 iwl4965_reset_qos(priv);
b481de9c
ZY		 7823
7824 queue_work(priv->workqueue, &priv->post_associate.work);
7825
7826 mutex_unlock(&priv->mutex);
7827
7828 return 0;
7829}
7830
c8b0e6e1 7831#ifdef CONFIG_IWL4965_HT
b481de9c 7832
fd105e79 7833static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
c79dd5b5 7834 struct iwl_priv *priv)
b481de9c 7835{
fd105e79
RR		 7836 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
7837 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
7838 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
b481de9c
ZY		 7839
7840 IWL_DEBUG_MAC80211("enter: \n");
7841
fd105e79
RR		 7842 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
7843 iwl_conf->is_ht = 0;
7844 return;
b481de9c
ZY		 7845 }
7846
fd105e79
RR		 7847 iwl_conf->is_ht = 1;
7848 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
7849
7850 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
7851 iwl_conf->sgf |= 0x1;
7852 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
7853 iwl_conf->sgf |= 0x2;
7854
7855 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
7856 iwl_conf->max_amsdu_size =
7857 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
134eb5d3 7858
fd105e79
RR		 7859 iwl_conf->supported_chan_width =
7860 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
134eb5d3
GC		 7861 iwl_conf->extension_chan_offset =
7862 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
7863 /* If no above or below channel supplied disable FAT channel */
7864 if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
7865 iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
7866 iwl_conf->supported_chan_width = 0;
7867
fd105e79
RR		 7868 iwl_conf->tx_mimo_ps_mode =
7869 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
7870 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
7871
7872 iwl_conf->control_channel = ht_bss_conf->primary_channel;
fd105e79
RR		 7873 iwl_conf->tx_chan_width =
7874 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
7875 iwl_conf->ht_protection =
7876 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
7877 iwl_conf->non_GF_STA_present =
7878 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
7879
7880 IWL_DEBUG_MAC80211("control channel %d\n",
7881 iwl_conf->control_channel);
b481de9c 7882 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7883}
7884
bb8c093b 7885static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
fd105e79 7886 struct ieee80211_conf *conf)
b481de9c 7887{
c79dd5b5 7888 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7889
7890 IWL_DEBUG_MAC80211("enter: \n");
7891
fd105e79 7892 iwl4965_ht_info_fill(conf, priv);
b481de9c
ZY		 7893 iwl4965_set_rxon_chain(priv);
7894
7895 if (priv && priv->assoc_id &&
7896 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
7897 unsigned long flags;
7898
7899 spin_lock_irqsave(&priv->lock, flags);
7900 if (priv->beacon_int)
7901 queue_work(priv->workqueue, &priv->post_associate.work);
7902 else
7903 priv->call_post_assoc_from_beacon = 1;
7904 spin_unlock_irqrestore(&priv->lock, flags);
7905 }
7906
fd105e79
RR		 7907 IWL_DEBUG_MAC80211("leave:\n");
7908 return 0;
b481de9c
ZY		 7909}
7910
c8b0e6e1 7911#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 7912
7913/*****************************************************************************
7914 *
7915 * sysfs attributes
7916 *
7917 *****************************************************************************/
7918
0a6857e7 7919#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 7920
7921/*
7922 * The following adds a new attribute to the sysfs representation
7923 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7924 * used for controlling the debug level.
7925 *
7926 * See the level definitions in iwl for details.
7927 */
7928
7929static ssize_t show_debug_level(struct device_driver *d, char *buf)
7930{
0a6857e7 7931 return sprintf(buf, "0x%08X\n", iwl_debug_level);
b481de9c
ZY		 7932}
7933static ssize_t store_debug_level(struct device_driver *d,
7934 const char *buf, size_t count)
7935{
7936 char *p = (char *)buf;
7937 u32 val;
7938
7939 val = simple_strtoul(p, &p, 0);
7940 if (p == buf)
7941 printk(KERN_INFO DRV_NAME
7942 ": %s is not in hex or decimal form.\n", buf);
7943 else
0a6857e7 7944 iwl_debug_level = val;
b481de9c
ZY		 7945
7946 return strnlen(buf, count);
7947}
7948
7949static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7950 show_debug_level, store_debug_level);
7951
0a6857e7 7952#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c
ZY		 7953
7954static ssize_t show_rf_kill(struct device *d,
7955 struct device_attribute *attr, char *buf)
7956{
7957 /*
7958 * 0 - RF kill not enabled
7959 * 1 - SW based RF kill active (sysfs)
7960 * 2 - HW based RF kill active
7961 * 3 - Both HW and SW based RF kill active
7962 */
c79dd5b5 7963 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7964 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7965 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7966
7967 return sprintf(buf, "%i\n", val);
7968}
7969
7970static ssize_t store_rf_kill(struct device *d,
7971 struct device_attribute *attr,
7972 const char *buf, size_t count)
7973{
c79dd5b5 7974 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7975
7976 mutex_lock(&priv->mutex);
bb8c093b 7977 iwl4965_radio_kill_sw(priv, buf[0] == '1');
b481de9c
ZY		 7978 mutex_unlock(&priv->mutex);
7979
7980 return count;
7981}
7982
7983static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7984
7985static ssize_t show_temperature(struct device *d,
7986 struct device_attribute *attr, char *buf)
7987{
c79dd5b5 7988 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 7989
bb8c093b 7990 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 7991 return -EAGAIN;
7992
bb8c093b 7993 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY		 7994}
7995
7996static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7997
7998static ssize_t show_rs_window(struct device *d,
7999 struct device_attribute *attr,
8000 char *buf)
8001{
c79dd5b5 8002 struct iwl_priv *priv = d->driver_data;
bb8c093b 8003 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY		 8004}
8005static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8006
8007static ssize_t show_tx_power(struct device *d,
8008 struct device_attribute *attr, char *buf)
8009{
c79dd5b5 8010 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8011 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8012}
8013
8014static ssize_t store_tx_power(struct device *d,
8015 struct device_attribute *attr,
8016 const char *buf, size_t count)
8017{
c79dd5b5 8018 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8019 char *p = (char *)buf;
8020 u32 val;
8021
8022 val = simple_strtoul(p, &p, 10);
8023 if (p == buf)
8024 printk(KERN_INFO DRV_NAME
8025 ": %s is not in decimal form.\n", buf);
8026 else
bb8c093b 8027 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY		 8028
8029 return count;
8030}
8031
8032static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8033
8034static ssize_t show_flags(struct device *d,
8035 struct device_attribute *attr, char *buf)
8036{
c79dd5b5 8037 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8038
8039 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8040}
8041
8042static ssize_t store_flags(struct device *d,
8043 struct device_attribute *attr,
8044 const char *buf, size_t count)
8045{
c79dd5b5 8046 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8047 u32 flags = simple_strtoul(buf, NULL, 0);
8048
8049 mutex_lock(&priv->mutex);
8050 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8051 /* Cancel any currently running scans... */
bb8c093b 8052 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 8053 IWL_WARNING("Could not cancel scan.\n");
8054 else {
8055 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8056 flags);
8057 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 8058 iwl4965_commit_rxon(priv);
b481de9c
ZY		 8059 }
8060 }
8061 mutex_unlock(&priv->mutex);
8062
8063 return count;
8064}
8065
8066static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8067
8068static ssize_t show_filter_flags(struct device *d,
8069 struct device_attribute *attr, char *buf)
8070{
c79dd5b5 8071 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8072
8073 return sprintf(buf, "0x%04X\n",
8074 le32_to_cpu(priv->active_rxon.filter_flags));
8075}
8076
8077static ssize_t store_filter_flags(struct device *d,
8078 struct device_attribute *attr,
8079 const char *buf, size_t count)
8080{
c79dd5b5 8081 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8082 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8083
8084 mutex_lock(&priv->mutex);
8085 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8086 /* Cancel any currently running scans... */
bb8c093b 8087 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 8088 IWL_WARNING("Could not cancel scan.\n");
8089 else {
8090 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8091 "0x%04X\n", filter_flags);
8092 priv->staging_rxon.filter_flags =
8093 cpu_to_le32(filter_flags);
bb8c093b 8094 iwl4965_commit_rxon(priv);
b481de9c
ZY		 8095 }
8096 }
8097 mutex_unlock(&priv->mutex);
8098
8099 return count;
8100}
8101
8102static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8103 store_filter_flags);
8104
c8b0e6e1 8105#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 8106
8107static ssize_t show_measurement(struct device *d,
8108 struct device_attribute *attr, char *buf)
8109{
c79dd5b5 8110 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 8111 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY		 8112 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8113 u8 *data = (u8 *) & measure_report;
8114 unsigned long flags;
8115
8116 spin_lock_irqsave(&priv->lock, flags);
8117 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8118 spin_unlock_irqrestore(&priv->lock, flags);
8119 return 0;
8120 }
8121 memcpy(&measure_report, &priv->measure_report, size);
8122 priv->measurement_status = 0;
8123 spin_unlock_irqrestore(&priv->lock, flags);
8124
8125 while (size && (PAGE_SIZE - len)) {
8126 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8127 PAGE_SIZE - len, 1);
8128 len = strlen(buf);
8129 if (PAGE_SIZE - len)
8130 buf[len++] = '\n';
8131
8132 ofs += 16;
8133 size -= min(size, 16U);
8134 }
8135
8136 return len;
8137}
8138
8139static ssize_t store_measurement(struct device *d,
8140 struct device_attribute *attr,
8141 const char *buf, size_t count)
8142{
c79dd5b5 8143 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8144 struct ieee80211_measurement_params params = {
8145 .channel = le16_to_cpu(priv->active_rxon.channel),
8146 .start_time = cpu_to_le64(priv->last_tsf),
8147 .duration = cpu_to_le16(1),
8148 };
8149 u8 type = IWL_MEASURE_BASIC;
8150 u8 buffer[32];
8151 u8 channel;
8152
8153 if (count) {
8154 char *p = buffer;
8155 strncpy(buffer, buf, min(sizeof(buffer), count));
8156 channel = simple_strtoul(p, NULL, 0);
8157 if (channel)
8158 params.channel = channel;
8159
8160 p = buffer;
8161 while (*p && *p != ' ')
8162 p++;
8163 if (*p)
8164 type = simple_strtoul(p + 1, NULL, 0);
8165 }
8166
8167 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8168 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 8169 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY		 8170
8171 return count;
8172}
8173
8174static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8175 show_measurement, store_measurement);
c8b0e6e1 8176#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY		 8177
8178static ssize_t store_retry_rate(struct device *d,
8179 struct device_attribute *attr,
8180 const char *buf, size_t count)
8181{
c79dd5b5 8182 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8183
8184 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8185 if (priv->retry_rate <= 0)
8186 priv->retry_rate = 1;
8187
8188 return count;
8189}
8190
8191static ssize_t show_retry_rate(struct device *d,
8192 struct device_attribute *attr, char *buf)
8193{
c79dd5b5 8194 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8195 return sprintf(buf, "%d", priv->retry_rate);
8196}
8197
8198static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8199 store_retry_rate);
8200
8201static ssize_t store_power_level(struct device *d,
8202 struct device_attribute *attr,
8203 const char *buf, size_t count)
8204{
c79dd5b5 8205 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8206 int rc;
8207 int mode;
8208
8209 mode = simple_strtoul(buf, NULL, 0);
8210 mutex_lock(&priv->mutex);
8211
bb8c093b 8212 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY		 8213 rc = -EAGAIN;
8214 goto out;
8215 }
8216
8217 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8218 mode = IWL_POWER_AC;
8219 else
8220 mode |= IWL_POWER_ENABLED;
8221
8222 if (mode != priv->power_mode) {
bb8c093b 8223 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
b481de9c
ZY		 8224 if (rc) {
8225 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8226 goto out;
8227 }
8228 priv->power_mode = mode;
8229 }
8230
8231 rc = count;
8232
8233 out:
8234 mutex_unlock(&priv->mutex);
8235 return rc;
8236}
8237
8238#define MAX_WX_STRING 80
8239
8240/* Values are in microsecond */
8241static const s32 timeout_duration[] = {
8242 350000,
8243 250000,
8244 75000,
8245 37000,
8246 25000,
8247};
8248static const s32 period_duration[] = {
8249 400000,
8250 700000,
8251 1000000,
8252 1000000,
8253 1000000
8254};
8255
8256static ssize_t show_power_level(struct device *d,
8257 struct device_attribute *attr, char *buf)
8258{
c79dd5b5 8259 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8260 int level = IWL_POWER_LEVEL(priv->power_mode);
8261 char *p = buf;
8262
8263 p += sprintf(p, "%d ", level);
8264 switch (level) {
8265 case IWL_POWER_MODE_CAM:
8266 case IWL_POWER_AC:
8267 p += sprintf(p, "(AC)");
8268 break;
8269 case IWL_POWER_BATTERY:
8270 p += sprintf(p, "(BATTERY)");
8271 break;
8272 default:
8273 p += sprintf(p,
8274 "(Timeout %dms, Period %dms)",
8275 timeout_duration[level - 1] / 1000,
8276 period_duration[level - 1] / 1000);
8277 }
8278
8279 if (!(priv->power_mode & IWL_POWER_ENABLED))
8280 p += sprintf(p, " OFF\n");
8281 else
8282 p += sprintf(p, " \n");
8283
8284 return (p - buf + 1);
8285
8286}
8287
8288static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8289 store_power_level);
8290
8291static ssize_t show_channels(struct device *d,
8292 struct device_attribute *attr, char *buf)
8293{
8318d78a
JB		 8294 /* all this shit doesn't belong into sysfs anyway */
8295 return 0;
b481de9c
ZY		 8296}
8297
8298static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8299
8300static ssize_t show_statistics(struct device *d,
8301 struct device_attribute *attr, char *buf)
8302{
c79dd5b5 8303 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 8304 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY		 8305 u32 len = 0, ofs = 0;
8306 u8 *data = (u8 *) & priv->statistics;
8307 int rc = 0;
8308
bb8c093b 8309 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8310 return -EAGAIN;
8311
8312 mutex_lock(&priv->mutex);
bb8c093b 8313 rc = iwl4965_send_statistics_request(priv);
b481de9c
ZY		 8314 mutex_unlock(&priv->mutex);
8315
8316 if (rc) {
8317 len = sprintf(buf,
8318 "Error sending statistics request: 0x%08X\n", rc);
8319 return len;
8320 }
8321
8322 while (size && (PAGE_SIZE - len)) {
8323 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8324 PAGE_SIZE - len, 1);
8325 len = strlen(buf);
8326 if (PAGE_SIZE - len)
8327 buf[len++] = '\n';
8328
8329 ofs += 16;
8330 size -= min(size, 16U);
8331 }
8332
8333 return len;
8334}
8335
8336static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8337
8338static ssize_t show_antenna(struct device *d,
8339 struct device_attribute *attr, char *buf)
8340{
c79dd5b5 8341 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 8342
bb8c093b 8343 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8344 return -EAGAIN;
8345
8346 return sprintf(buf, "%d\n", priv->antenna);
8347}
8348
8349static ssize_t store_antenna(struct device *d,
8350 struct device_attribute *attr,
8351 const char *buf, size_t count)
8352{
8353 int ant;
c79dd5b5 8354 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8355
8356 if (count == 0)
8357 return 0;
8358
8359 if (sscanf(buf, "%1i", &ant) != 1) {
8360 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8361 return count;
8362 }
8363
8364 if ((ant >= 0) && (ant <= 2)) {
8365 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
bb8c093b 8366 priv->antenna = (enum iwl4965_antenna)ant;
b481de9c
ZY		 8367 } else
8368 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8369
8370
8371 return count;
8372}
8373
8374static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8375
8376static ssize_t show_status(struct device *d,
8377 struct device_attribute *attr, char *buf)
8378{
c79dd5b5 8379 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
bb8c093b 8380 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8381 return -EAGAIN;
8382 return sprintf(buf, "0x%08x\n", (int)priv->status);
8383}
8384
8385static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8386
8387static ssize_t dump_error_log(struct device *d,
8388 struct device_attribute *attr,
8389 const char *buf, size_t count)
8390{
8391 char *p = (char *)buf;
8392
8393 if (p[0] == '1')
c79dd5b5 8394 iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 8395
8396 return strnlen(buf, count);
8397}
8398
8399static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8400
8401static ssize_t dump_event_log(struct device *d,
8402 struct device_attribute *attr,
8403 const char *buf, size_t count)
8404{
8405 char *p = (char *)buf;
8406
8407 if (p[0] == '1')
c79dd5b5 8408 iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 8409
8410 return strnlen(buf, count);
8411}
8412
8413static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8414
8415/*****************************************************************************
8416 *
8417 * driver setup and teardown
8418 *
8419 *****************************************************************************/
8420
c79dd5b5 8421static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY		 8422{
8423 priv->workqueue = create_workqueue(DRV_NAME);
8424
8425 init_waitqueue_head(&priv->wait_command_queue);
8426
bb8c093b
CH		 8427 INIT_WORK(&priv->up, iwl4965_bg_up);
8428 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8429 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8430 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
8431 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
8432 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
8433 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
8434 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
8435 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
8436 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
8437 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
8438 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
8439
8440 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY		 8441
8442 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 8443 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 8444}
8445
c79dd5b5 8446static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 8447{
bb8c093b 8448 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 8449
3ae6a054 8450 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY		 8451 cancel_delayed_work(&priv->scan_check);
8452 cancel_delayed_work(&priv->alive_start);
8453 cancel_delayed_work(&priv->post_associate);
8454 cancel_work_sync(&priv->beacon_update);
8455}
8456
bb8c093b 8457static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY		 8458 &dev_attr_antenna.attr,
8459 &dev_attr_channels.attr,
8460 &dev_attr_dump_errors.attr,
8461 &dev_attr_dump_events.attr,
8462 &dev_attr_flags.attr,
8463 &dev_attr_filter_flags.attr,
c8b0e6e1 8464#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 8465 &dev_attr_measurement.attr,
8466#endif
8467 &dev_attr_power_level.attr,
8468 &dev_attr_retry_rate.attr,
8469 &dev_attr_rf_kill.attr,
8470 &dev_attr_rs_window.attr,
8471 &dev_attr_statistics.attr,
8472 &dev_attr_status.attr,
8473 &dev_attr_temperature.attr,
b481de9c
ZY		 8474 &dev_attr_tx_power.attr,
8475
8476 NULL
8477};
8478
bb8c093b 8479static struct attribute_group iwl4965_attribute_group = {
b481de9c 8480 .name = NULL, /* put in device directory */
bb8c093b 8481 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY		 8482};
8483
bb8c093b
CH		 8484static struct ieee80211_ops iwl4965_hw_ops = {
8485 .tx = iwl4965_mac_tx,
8486 .start = iwl4965_mac_start,
8487 .stop = iwl4965_mac_stop,
8488 .add_interface = iwl4965_mac_add_interface,
8489 .remove_interface = iwl4965_mac_remove_interface,
8490 .config = iwl4965_mac_config,
8491 .config_interface = iwl4965_mac_config_interface,
8492 .configure_filter = iwl4965_configure_filter,
8493 .set_key = iwl4965_mac_set_key,
8494 .get_stats = iwl4965_mac_get_stats,
8495 .get_tx_stats = iwl4965_mac_get_tx_stats,
8496 .conf_tx = iwl4965_mac_conf_tx,
8497 .get_tsf = iwl4965_mac_get_tsf,
8498 .reset_tsf = iwl4965_mac_reset_tsf,
8499 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 8500 .bss_info_changed = iwl4965_bss_info_changed,
c8b0e6e1 8501#ifdef CONFIG_IWL4965_HT
bb8c093b 8502 .conf_ht = iwl4965_mac_conf_ht,
9ab46173 8503 .ampdu_action = iwl4965_mac_ampdu_action,
c8b0e6e1 8504#endif /* CONFIG_IWL4965_HT */
bb8c093b 8505 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY		 8506};
8507
bb8c093b 8508static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 8509{
8510 int err = 0;
c79dd5b5 8511 struct iwl_priv *priv;
b481de9c 8512 struct ieee80211_hw *hw;
82b9a121 8513 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
b481de9c 8514 int i;
5a66926a 8515 DECLARE_MAC_BUF(mac);
b481de9c 8516
6440adb5
CB		 8517 /* Disabling hardware scan means that mac80211 will perform scans
8518 * "the hard way", rather than using device's scan. */
bb8c093b 8519 if (iwl4965_param_disable_hw_scan) {
b481de9c 8520 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 8521 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY		 8522 }
8523
bb8c093b
CH		 8524 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8525 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
b481de9c
ZY		 8526 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8527 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8528 err = -EINVAL;
8529 goto out;
8530 }
8531
8532 /* mac80211 allocates memory for this device instance, including
8533 * space for this driver's private structure */
c79dd5b5 8534 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl4965_hw_ops);
b481de9c
ZY		 8535 if (hw == NULL) {
8536 IWL_ERROR("Can not allocate network device\n");
8537 err = -ENOMEM;
8538 goto out;
8539 }
8540 SET_IEEE80211_DEV(hw, &pdev->dev);
8541
f51359a8
JB		 8542 hw->rate_control_algorithm = "iwl-4965-rs";
8543
b481de9c
ZY		 8544 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8545 priv = hw->priv;
8546 priv->hw = hw;
82b9a121 8547 priv->cfg = cfg;
b481de9c
ZY		 8548
8549 priv->pci_dev = pdev;
bb8c093b 8550 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
0a6857e7
TW		 8551#ifdef CONFIG_IWLWIFI_DEBUG
8552 iwl_debug_level = iwl4965_param_debug;
b481de9c
ZY		 8553 atomic_set(&priv->restrict_refcnt, 0);
8554#endif
8555 priv->retry_rate = 1;
8556
8557 priv->ibss_beacon = NULL;
8558
8559 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8560 * the range of signal quality values that we'll provide.
8561 * Negative values for level/noise indicate that we'll provide dBm.
8562 * For WE, at least, non-0 values here *enable* display of values
8563 * in app (iwconfig). */
8564 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8565 hw->max_noise = -20; /* noise level, negative indicates dBm */
8566 hw->max_signal = 100; /* link quality indication (%) */
8567
8568 /* Tell mac80211 our Tx characteristics */
8569 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8570
6440adb5 8571 /* Default value; 4 EDCA QOS priorities */
b481de9c 8572 hw->queues = 4;
c8b0e6e1 8573#ifdef CONFIG_IWL4965_HT
6440adb5 8574 /* Enhanced value; more queues, to support 11n aggregation */
b481de9c 8575 hw->queues = 16;
c8b0e6e1 8576#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 8577
8578 spin_lock_init(&priv->lock);
8579 spin_lock_init(&priv->power_data.lock);
8580 spin_lock_init(&priv->sta_lock);
8581 spin_lock_init(&priv->hcmd_lock);
8582 spin_lock_init(&priv->lq_mngr.lock);
8583
8584 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8585 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8586
8587 INIT_LIST_HEAD(&priv->free_frames);
8588
8589 mutex_init(&priv->mutex);
8590 if (pci_enable_device(pdev)) {
8591 err = -ENODEV;
8592 goto out_ieee80211_free_hw;
8593 }
8594
8595 pci_set_master(pdev);
8596
6440adb5 8597 /* Clear the driver's (not device's) station table */
bb8c093b 8598 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 8599
8600 priv->data_retry_limit = -1;
8601 priv->ieee_channels = NULL;
8602 priv->ieee_rates = NULL;
8318d78a 8603 priv->band = IEEE80211_BAND_2GHZ;
b481de9c
ZY		 8604
8605 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8606 if (!err)
8607 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8608 if (err) {
8609 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8610 goto out_pci_disable_device;
8611 }
8612
8613 pci_set_drvdata(pdev, priv);
8614 err = pci_request_regions(pdev, DRV_NAME);
8615 if (err)
8616 goto out_pci_disable_device;
6440adb5 8617
b481de9c
ZY		 8618 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8619 * PCI Tx retries from interfering with C3 CPU state */
8620 pci_write_config_byte(pdev, 0x41, 0x00);
6440adb5 8621
b481de9c
ZY		 8622 priv->hw_base = pci_iomap(pdev, 0, 0);
8623 if (!priv->hw_base) {
8624 err = -ENODEV;
8625 goto out_pci_release_regions;
8626 }
8627
8628 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8629 (unsigned long long) pci_resource_len(pdev, 0));
8630 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8631
8632 /* Initialize module parameter values here */
8633
6440adb5 8634 /* Disable radio (SW RF KILL) via parameter when loading driver */
bb8c093b 8635 if (iwl4965_param_disable) {
b481de9c
ZY		 8636 set_bit(STATUS_RF_KILL_SW, &priv->status);
8637 IWL_DEBUG_INFO("Radio disabled.\n");
8638 }
8639
8640 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8641
8642 priv->ps_mode = 0;
8643 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
b481de9c
ZY		 8644 priv->valid_antenna = 0x7; /* assume all 3 connected */
8645 priv->ps_mode = IWL_MIMO_PS_NONE;
b481de9c 8646
6440adb5 8647 /* Choose which receivers/antennas to use */
b481de9c
ZY		 8648 iwl4965_set_rxon_chain(priv);
8649
82b9a121 8650
b481de9c 8651 printk(KERN_INFO DRV_NAME
82b9a121 8652 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
b481de9c
ZY		 8653
8654 /* Device-specific setup */
bb8c093b 8655 if (iwl4965_hw_set_hw_setting(priv)) {
b481de9c 8656 IWL_ERROR("failed to set hw settings\n");
b481de9c
ZY		 8657 goto out_iounmap;
8658 }
8659
bb8c093b 8660 if (iwl4965_param_qos_enable)
b481de9c
ZY		 8661 priv->qos_data.qos_enable = 1;
8662
bb8c093b 8663 iwl4965_reset_qos(priv);
b481de9c
ZY		 8664
8665 priv->qos_data.qos_active = 0;
8666 priv->qos_data.qos_cap.val = 0;
b481de9c 8667
8318d78a 8668 iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
bb8c093b
CH		 8669 iwl4965_setup_deferred_work(priv);
8670 iwl4965_setup_rx_handlers(priv);
b481de9c
ZY		 8671
8672 priv->rates_mask = IWL_RATES_MASK;
8673 /* If power management is turned on, default to AC mode */
8674 priv->power_mode = IWL_POWER_AC;
8675 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8676
bb8c093b 8677 iwl4965_disable_interrupts(priv);
49df2b33 8678
bb8c093b 8679 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c
ZY		 8680 if (err) {
8681 IWL_ERROR("failed to create sysfs device attributes\n");
b481de9c
ZY		 8682 goto out_release_irq;
8683 }
8684
5a66926a
ZY		 8685 /* nic init */
8686 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8687 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8688
8689 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8690 err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
8691 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8692 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8693 if (err < 0) {
8694 IWL_DEBUG_INFO("Failed to init the card\n");
8695 goto out_remove_sysfs;
8696 }
8697 /* Read the EEPROM */
6bc913bd 8698 err = iwl_eeprom_init(priv);
b481de9c 8699 if (err) {
5a66926a
ZY		 8700 IWL_ERROR("Unable to init EEPROM\n");
8701 goto out_remove_sysfs;
b481de9c 8702 }
5a66926a 8703 /* MAC Address location in EEPROM same for 3945/4965 */
6bc913bd 8704 iwl_eeprom_get_mac(priv, priv->mac_addr);
5a66926a
ZY		 8705 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8706 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 8707
849e0dce
RC		 8708 err = iwl4965_init_channel_map(priv);
8709 if (err) {
8710 IWL_ERROR("initializing regulatory failed: %d\n", err);
8711 goto out_remove_sysfs;
8712 }
8713
8714 err = iwl4965_init_geos(priv);
8715 if (err) {
8716 IWL_ERROR("initializing geos failed: %d\n", err);
8717 goto out_free_channel_map;
8718 }
849e0dce 8719
5a66926a
ZY		 8720 iwl4965_rate_control_register(priv->hw);
8721 err = ieee80211_register_hw(priv->hw);
8722 if (err) {
8723 IWL_ERROR("Failed to register network device (error %d)\n", err);
849e0dce 8724 goto out_free_geos;
5a66926a 8725 }
b481de9c 8726
5a66926a
ZY		 8727 priv->hw->conf.beacon_int = 100;
8728 priv->mac80211_registered = 1;
8729 pci_save_state(pdev);
8730 pci_disable_device(pdev);
b481de9c
ZY		 8731
8732 return 0;
8733
849e0dce
RC		 8734 out_free_geos:
8735 iwl4965_free_geos(priv);
8736 out_free_channel_map:
8737 iwl4965_free_channel_map(priv);
5a66926a 8738 out_remove_sysfs:
bb8c093b 8739 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c
ZY		 8740
8741 out_release_irq:
b481de9c
ZY		 8742 destroy_workqueue(priv->workqueue);
8743 priv->workqueue = NULL;
bb8c093b 8744 iwl4965_unset_hw_setting(priv);
b481de9c
ZY		 8745
8746 out_iounmap:
8747 pci_iounmap(pdev, priv->hw_base);
8748 out_pci_release_regions:
8749 pci_release_regions(pdev);
8750 out_pci_disable_device:
8751 pci_disable_device(pdev);
8752 pci_set_drvdata(pdev, NULL);
8753 out_ieee80211_free_hw:
8754 ieee80211_free_hw(priv->hw);
8755 out:
8756 return err;
8757}
8758
bb8c093b 8759static void iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 8760{
c79dd5b5 8761 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY		 8762 struct list_head *p, *q;
8763 int i;
8764
8765 if (!priv)
8766 return;
8767
8768 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8769
b481de9c 8770 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 8771
bb8c093b 8772 iwl4965_down(priv);
b481de9c
ZY		 8773
8774 /* Free MAC hash list for ADHOC */
8775 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8776 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8777 list_del(p);
bb8c093b 8778 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY		 8779 }
8780 }
8781
bb8c093b 8782 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 8783
bb8c093b 8784 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 8785
8786 if (priv->rxq.bd)
bb8c093b
CH		 8787 iwl4965_rx_queue_free(priv, &priv->rxq);
8788 iwl4965_hw_txq_ctx_free(priv);
b481de9c 8789
bb8c093b
CH		 8790 iwl4965_unset_hw_setting(priv);
8791 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 8792
8793 if (priv->mac80211_registered) {
8794 ieee80211_unregister_hw(priv->hw);
bb8c093b 8795 iwl4965_rate_control_unregister(priv->hw);
b481de9c
ZY		 8796 }
8797
948c171c
MA		 8798 /*netif_stop_queue(dev); */
8799 flush_workqueue(priv->workqueue);
8800
bb8c093b 8801 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY		 8802 * priv->workqueue... so we can't take down the workqueue
8803 * until now... */
8804 destroy_workqueue(priv->workqueue);
8805 priv->workqueue = NULL;
8806
b481de9c
ZY		 8807 pci_iounmap(pdev, priv->hw_base);
8808 pci_release_regions(pdev);
8809 pci_disable_device(pdev);
8810 pci_set_drvdata(pdev, NULL);
8811
849e0dce
RC		 8812 iwl4965_free_channel_map(priv);
8813 iwl4965_free_geos(priv);
b481de9c
ZY		 8814
8815 if (priv->ibss_beacon)
8816 dev_kfree_skb(priv->ibss_beacon);
8817
8818 ieee80211_free_hw(priv->hw);
8819}
8820
8821#ifdef CONFIG_PM
8822
bb8c093b 8823static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 8824{
c79dd5b5 8825 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 8826
e655b9f0
ZY		 8827 if (priv->is_open) {
8828 set_bit(STATUS_IN_SUSPEND, &priv->status);
8829 iwl4965_mac_stop(priv->hw);
8830 priv->is_open = 1;
8831 }
b481de9c 8832
b481de9c
ZY		 8833 pci_set_power_state(pdev, PCI_D3hot);
8834
b481de9c
ZY		 8835 return 0;
8836}
8837
bb8c093b 8838static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 8839{
c79dd5b5 8840 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 8841
b481de9c 8842 pci_set_power_state(pdev, PCI_D0);
b481de9c 8843
e655b9f0
ZY		 8844 if (priv->is_open)
8845 iwl4965_mac_start(priv->hw);
b481de9c 8846
e655b9f0 8847 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 8848 return 0;
8849}
8850
8851#endif /* CONFIG_PM */
8852
8853/*****************************************************************************
8854 *
8855 * driver and module entry point
8856 *
8857 *****************************************************************************/
8858
bb8c093b 8859static struct pci_driver iwl4965_driver = {
b481de9c 8860 .name = DRV_NAME,
bb8c093b
CH		 8861 .id_table = iwl4965_hw_card_ids,
8862 .probe = iwl4965_pci_probe,
8863 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 8864#ifdef CONFIG_PM
bb8c093b
CH		 8865 .suspend = iwl4965_pci_suspend,
8866 .resume = iwl4965_pci_resume,
b481de9c
ZY		 8867#endif
8868};
8869
bb8c093b 8870static int __init iwl4965_init(void)
b481de9c
ZY		 8871{
8872
8873 int ret;
8874 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8875 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
bb8c093b 8876 ret = pci_register_driver(&iwl4965_driver);
b481de9c
ZY		 8877 if (ret) {
8878 IWL_ERROR("Unable to initialize PCI module\n");
8879 return ret;
8880 }
0a6857e7 8881#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 8882 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c
ZY		 8883 if (ret) {
8884 IWL_ERROR("Unable to create driver sysfs file\n");
bb8c093b 8885 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY		 8886 return ret;
8887 }
8888#endif
8889
8890 return ret;
8891}
8892
bb8c093b 8893static void __exit iwl4965_exit(void)
b481de9c 8894{
0a6857e7 8895#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 8896 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c 8897#endif
bb8c093b 8898 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY		 8899}
8900
bb8c093b 8901module_param_named(antenna, iwl4965_param_antenna, int, 0444);
b481de9c 8902MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
bb8c093b 8903module_param_named(disable, iwl4965_param_disable, int, 0444);
b481de9c 8904MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
bb8c093b 8905module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
b481de9c
ZY		 8906MODULE_PARM_DESC(hwcrypto,
8907 "using hardware crypto engine (default 0 [software])\n");
bb8c093b 8908module_param_named(debug, iwl4965_param_debug, int, 0444);
b481de9c 8909MODULE_PARM_DESC(debug, "debug output mask");
bb8c093b 8910module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
b481de9c
ZY		 8911MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8912
bb8c093b 8913module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
b481de9c
ZY		 8914MODULE_PARM_DESC(queues_num, "number of hw queues.");
8915
8916/* QoS */
bb8c093b 8917module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
b481de9c 8918MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
9ee1ba47
RR		 8919module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
8920MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
b481de9c 8921
bb8c093b
CH		 8922module_exit(iwl4965_exit);
8923module_init(iwl4965_init);
Linux kernel - Deliverables
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