iwlwifi: HT IE in probe request clean up
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
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41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
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44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
b481de9c 49#include "iwl-4965.h"
fee1247a 50#include "iwl-core.h"
3395f6e9 51#include "iwl-io.h"
b481de9c 52#include "iwl-helpers.h"
6974e363 53#include "iwl-sta.h"
f0832f13 54#include "iwl-calib.h"
b481de9c 55
c79dd5b5 56static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 57 struct iwl4965_tx_queue *txq);
416e1438 58
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59/******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
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65/*
66 * module name, copyright, version, etc.
67 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
68 */
69
70#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
71
0a6857e7 72#ifdef CONFIG_IWLWIFI_DEBUG
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73#define VD "d"
74#else
75#define VD
76#endif
77
c8b0e6e1 78#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
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79#define VS "s"
80#else
81#define VS
82#endif
83
df48c323 84#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 85
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86
87MODULE_DESCRIPTION(DRV_DESCRIPTION);
88MODULE_VERSION(DRV_VERSION);
89MODULE_AUTHOR(DRV_COPYRIGHT);
90MODULE_LICENSE("GPL");
91
92__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
93{
94 u16 fc = le16_to_cpu(hdr->frame_control);
95 int hdr_len = ieee80211_get_hdrlen(fc);
96
97 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
98 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
99 return NULL;
100}
101
d1141dfb 102static const struct ieee80211_supported_band *iwl_get_hw_mode(
c79dd5b5 103 struct iwl_priv *priv, enum ieee80211_band band)
b481de9c 104{
8318d78a 105 return priv->hw->wiphy->bands[band];
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106}
107
bb8c093b 108static int iwl4965_is_empty_essid(const char *essid, int essid_len)
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109{
110 /* Single white space is for Linksys APs */
111 if (essid_len == 1 && essid[0] == ' ')
112 return 1;
113
114 /* Otherwise, if the entire essid is 0, we assume it is hidden */
115 while (essid_len) {
116 essid_len--;
117 if (essid[essid_len] != '\0')
118 return 0;
119 }
120
121 return 1;
122}
123
bb8c093b 124static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
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125{
126 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
127 const char *s = essid;
128 char *d = escaped;
129
bb8c093b 130 if (iwl4965_is_empty_essid(essid, essid_len)) {
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131 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
132 return escaped;
133 }
134
135 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
136 while (essid_len--) {
137 if (*s == '\0') {
138 *d++ = '\\';
139 *d++ = '0';
140 s++;
141 } else
142 *d++ = *s++;
143 }
144 *d = '\0';
145 return escaped;
146}
147
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148/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
149 * DMA services
150 *
151 * Theory of operation
152 *
6440adb5
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153 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
154 * of buffer descriptors, each of which points to one or more data buffers for
155 * the device to read from or fill. Driver and device exchange status of each
156 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
157 * entries in each circular buffer, to protect against confusing empty and full
158 * queue states.
159 *
160 * The device reads or writes the data in the queues via the device's several
161 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
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162 *
163 * For Tx queue, there are low mark and high mark limits. If, after queuing
164 * the packet for Tx, free space become < low mark, Tx queue stopped. When
165 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
166 * Tx queue resumed.
167 *
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168 * The 4965 operates with up to 17 queues: One receive queue, one transmit
169 * queue (#4) for sending commands to the device firmware, and 15 other
170 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
BC
171 *
172 * See more detailed info in iwl-4965-hw.h.
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173 ***************************************************/
174
fe01b477 175int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 176{
fc4b6853 177 int s = q->read_ptr - q->write_ptr;
b481de9c 178
fc4b6853 179 if (q->read_ptr > q->write_ptr)
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180 s -= q->n_bd;
181
182 if (s <= 0)
183 s += q->n_window;
184 /* keep some reserve to not confuse empty and full situations */
185 s -= 2;
186 if (s < 0)
187 s = 0;
188 return s;
189}
190
b481de9c 191
bb8c093b 192static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 193{
fc4b6853
TW
194 return q->write_ptr > q->read_ptr ?
195 (i >= q->read_ptr && i < q->write_ptr) :
196 !(i < q->read_ptr && i >= q->write_ptr);
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197}
198
bb8c093b 199static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 200{
6440adb5 201 /* This is for scan command, the big buffer at end of command array */
b481de9c 202 if (is_huge)
6440adb5 203 return q->n_window; /* must be power of 2 */
b481de9c 204
6440adb5 205 /* Otherwise, use normal size buffers */
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206 return index & (q->n_window - 1);
207}
208
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209/**
210 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
211 */
c79dd5b5 212static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
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213 int count, int slots_num, u32 id)
214{
215 q->n_bd = count;
216 q->n_window = slots_num;
217 q->id = id;
218
c54b679d
TW
219 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
220 * and iwl_queue_dec_wrap are broken. */
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221 BUG_ON(!is_power_of_2(count));
222
223 /* slots_num must be power-of-two size, otherwise
224 * get_cmd_index is broken. */
225 BUG_ON(!is_power_of_2(slots_num));
226
227 q->low_mark = q->n_window / 4;
228 if (q->low_mark < 4)
229 q->low_mark = 4;
230
231 q->high_mark = q->n_window / 8;
232 if (q->high_mark < 2)
233 q->high_mark = 2;
234
fc4b6853 235 q->write_ptr = q->read_ptr = 0;
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236
237 return 0;
238}
239
6440adb5
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240/**
241 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
242 */
c79dd5b5 243static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
bb8c093b 244 struct iwl4965_tx_queue *txq, u32 id)
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245{
246 struct pci_dev *dev = priv->pci_dev;
247
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248 /* Driver private data, only for Tx (not command) queues,
249 * not shared with device. */
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250 if (id != IWL_CMD_QUEUE_NUM) {
251 txq->txb = kmalloc(sizeof(txq->txb[0]) *
252 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
253 if (!txq->txb) {
01ebd063 254 IWL_ERROR("kmalloc for auxiliary BD "
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255 "structures failed\n");
256 goto error;
257 }
258 } else
259 txq->txb = NULL;
260
6440adb5
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261 /* Circular buffer of transmit frame descriptors (TFDs),
262 * shared with device */
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263 txq->bd = pci_alloc_consistent(dev,
264 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
265 &txq->q.dma_addr);
266
267 if (!txq->bd) {
268 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
269 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
270 goto error;
271 }
272 txq->q.id = id;
273
274 return 0;
275
276 error:
277 if (txq->txb) {
278 kfree(txq->txb);
279 txq->txb = NULL;
280 }
281
282 return -ENOMEM;
283}
284
8b6eaea8
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285/**
286 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
287 */
c79dd5b5 288int iwl4965_tx_queue_init(struct iwl_priv *priv,
bb8c093b 289 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
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290{
291 struct pci_dev *dev = priv->pci_dev;
292 int len;
293 int rc = 0;
294
8b6eaea8
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295 /*
296 * Alloc buffer array for commands (Tx or other types of commands).
297 * For the command queue (#4), allocate command space + one big
298 * command for scan, since scan command is very huge; the system will
299 * not have two scans at the same time, so only one is needed.
bb54244b 300 * For normal Tx queues (all other queues), no super-size command
8b6eaea8
CB
301 * space is needed.
302 */
857485c0 303 len = sizeof(struct iwl_cmd) * slots_num;
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304 if (txq_id == IWL_CMD_QUEUE_NUM)
305 len += IWL_MAX_SCAN_SIZE;
306 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
307 if (!txq->cmd)
308 return -ENOMEM;
309
8b6eaea8 310 /* Alloc driver data array and TFD circular buffer */
bb8c093b 311 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
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312 if (rc) {
313 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
314
315 return -ENOMEM;
316 }
317 txq->need_update = 0;
318
319 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
c54b679d 320 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
b481de9c 321 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
CB
322
323 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 324 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 325
8b6eaea8 326 /* Tell device where to find queue */
bb8c093b 327 iwl4965_hw_tx_queue_init(priv, txq);
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328
329 return 0;
330}
331
332/**
bb8c093b 333 * iwl4965_tx_queue_free - Deallocate DMA queue.
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334 * @txq: Transmit queue to deallocate.
335 *
336 * Empty queue by removing and destroying all BD's.
6440adb5
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337 * Free all buffers.
338 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 339 */
c79dd5b5 340void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 341{
bb8c093b 342 struct iwl4965_queue *q = &txq->q;
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343 struct pci_dev *dev = priv->pci_dev;
344 int len;
345
346 if (q->n_bd == 0)
347 return;
348
349 /* first, empty all BD's */
fc4b6853 350 for (; q->write_ptr != q->read_ptr;
c54b679d 351 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
bb8c093b 352 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 353
857485c0 354 len = sizeof(struct iwl_cmd) * q->n_window;
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355 if (q->id == IWL_CMD_QUEUE_NUM)
356 len += IWL_MAX_SCAN_SIZE;
357
6440adb5 358 /* De-alloc array of command/tx buffers */
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359 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
360
6440adb5 361 /* De-alloc circular buffer of TFDs */
b481de9c 362 if (txq->q.n_bd)
bb8c093b 363 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
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364 txq->q.n_bd, txq->bd, txq->q.dma_addr);
365
6440adb5 366 /* De-alloc array of per-TFD driver data */
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367 if (txq->txb) {
368 kfree(txq->txb);
369 txq->txb = NULL;
370 }
371
6440adb5 372 /* 0-fill queue descriptor structure */
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373 memset(txq, 0, sizeof(*txq));
374}
375
bb8c093b 376const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
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377
378/*************** STATION TABLE MANAGEMENT ****
9fbab516 379 * mac80211 should be examined to determine if sta_info is duplicating
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380 * the functionality provided here
381 */
382
383/**************************************************************/
384
01ebd063 385#if 0 /* temporary disable till we add real remove station */
6440adb5
CB
386/**
387 * iwl4965_remove_station - Remove driver's knowledge of station.
388 *
389 * NOTE: This does not remove station from device's station table.
390 */
c79dd5b5 391static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
b481de9c
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392{
393 int index = IWL_INVALID_STATION;
394 int i;
395 unsigned long flags;
396
397 spin_lock_irqsave(&priv->sta_lock, flags);
398
399 if (is_ap)
400 index = IWL_AP_ID;
401 else if (is_broadcast_ether_addr(addr))
5425e490 402 index = priv->hw_params.bcast_sta_id;
b481de9c 403 else
5425e490 404 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
b481de9c
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405 if (priv->stations[i].used &&
406 !compare_ether_addr(priv->stations[i].sta.sta.addr,
407 addr)) {
408 index = i;
409 break;
410 }
411
412 if (unlikely(index == IWL_INVALID_STATION))
413 goto out;
414
415 if (priv->stations[index].used) {
416 priv->stations[index].used = 0;
417 priv->num_stations--;
418 }
419
420 BUG_ON(priv->num_stations < 0);
421
422out:
423 spin_unlock_irqrestore(&priv->sta_lock, flags);
424 return 0;
425}
556f8db7 426#endif
b481de9c 427
6440adb5
CB
428/**
429 * iwl4965_add_station_flags - Add station to tables in driver and device
430 */
c79dd5b5 431u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
67d62035 432 int is_ap, u8 flags, void *ht_data)
b481de9c
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433{
434 int i;
435 int index = IWL_INVALID_STATION;
bb8c093b 436 struct iwl4965_station_entry *station;
b481de9c 437 unsigned long flags_spin;
0795af57 438 DECLARE_MAC_BUF(mac);
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439
440 spin_lock_irqsave(&priv->sta_lock, flags_spin);
441 if (is_ap)
442 index = IWL_AP_ID;
443 else if (is_broadcast_ether_addr(addr))
5425e490 444 index = priv->hw_params.bcast_sta_id;
b481de9c 445 else
5425e490 446 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
b481de9c
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447 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
448 addr)) {
449 index = i;
450 break;
451 }
452
453 if (!priv->stations[i].used &&
454 index == IWL_INVALID_STATION)
455 index = i;
456 }
457
458
9fbab516
BC
459 /* These two conditions have the same outcome, but keep them separate
460 since they have different meanings */
b481de9c
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461 if (unlikely(index == IWL_INVALID_STATION)) {
462 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
463 return index;
464 }
465
466 if (priv->stations[index].used &&
467 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
468 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
469 return index;
470 }
471
472
0795af57 473 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
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474 station = &priv->stations[index];
475 station->used = 1;
476 priv->num_stations++;
477
6440adb5 478 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 479 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
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480 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
481 station->sta.mode = 0;
482 station->sta.sta.sta_id = index;
483 station->sta.station_flags = 0;
484
c8b0e6e1 485#ifdef CONFIG_IWL4965_HT
b481de9c 486 /* BCAST station and IBSS stations do not work in HT mode */
5425e490 487 if (index != priv->hw_params.bcast_sta_id &&
b481de9c 488 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR
489 iwl4965_set_ht_add_station(priv, index,
490 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 491#endif /*CONFIG_IWL4965_HT*/
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492
493 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
CB
494
495 /* Add station to device's station table */
bb8c093b 496 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
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497 return index;
498
499}
500
b481de9c 501
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502
503/*************** HOST COMMAND QUEUE FUNCTIONS *****/
504
b481de9c 505/**
bb8c093b 506 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
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507 * @priv: device private data point
508 * @cmd: a point to the ucode command structure
509 *
510 * The function returns < 0 values to indicate the operation is
511 * failed. On success, it turns the index (> 0) of command in the
512 * command queue.
513 */
857485c0 514int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
b481de9c 515{
bb8c093b
CH
516 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
517 struct iwl4965_queue *q = &txq->q;
518 struct iwl4965_tfd_frame *tfd;
b481de9c 519 u32 *control_flags;
857485c0 520 struct iwl_cmd *out_cmd;
b481de9c
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521 u32 idx;
522 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
523 dma_addr_t phys_addr;
524 int ret;
525 unsigned long flags;
526
527 /* If any of the command structures end up being larger than
528 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
529 * we will need to increase the size of the TFD entries */
530 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
531 !(cmd->meta.flags & CMD_SIZE_HUGE));
532
fee1247a 533 if (iwl_is_rfkill(priv)) {
c342a1b9
GG
534 IWL_DEBUG_INFO("Not sending command - RF KILL");
535 return -EIO;
536 }
537
bb8c093b 538 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
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539 IWL_ERROR("No space for Tx\n");
540 return -ENOSPC;
541 }
542
543 spin_lock_irqsave(&priv->hcmd_lock, flags);
544
fc4b6853 545 tfd = &txq->bd[q->write_ptr];
b481de9c
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546 memset(tfd, 0, sizeof(*tfd));
547
548 control_flags = (u32 *) tfd;
549
fc4b6853 550 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
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551 out_cmd = &txq->cmd[idx];
552
553 out_cmd->hdr.cmd = cmd->id;
554 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
555 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
556
557 /* At this point, the out_cmd now has all of the incoming cmd
558 * information */
559
560 out_cmd->hdr.flags = 0;
561 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 562 INDEX_TO_SEQ(q->write_ptr));
b481de9c
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563 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
564 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
565
566 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
857485c0 567 offsetof(struct iwl_cmd, hdr);
bb8c093b 568 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY
569
570 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
571 "%d bytes at %d[%d]:%d\n",
572 get_cmd_string(out_cmd->hdr.cmd),
573 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 574 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY
575
576 txq->need_update = 1;
6440adb5
CB
577
578 /* Set up entry in queue's byte count circular buffer */
e2a722eb 579 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
6440adb5
CB
580
581 /* Increment and update queue's write index */
c54b679d 582 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
e2a722eb 583 ret = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
584
585 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
586 return ret ? ret : idx;
587}
588
deb09c43
EG
589static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
590{
591 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
592
593 if (hw_decrypt)
594 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
595 else
596 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
597
598}
599
b481de9c 600/**
bb8c093b 601 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY
602 *
603 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC
604 * NOTE: mutex must be held before calling this fnction
605 */
c79dd5b5 606static int iwl4965_rxon_add_station(struct iwl_priv *priv,
b481de9c
ZY
607 const u8 *addr, int is_ap)
608{
556f8db7 609 u8 sta_id;
b481de9c 610
6440adb5 611 /* Add station to device's station table */
67d62035
RR
612#ifdef CONFIG_IWL4965_HT
613 struct ieee80211_conf *conf = &priv->hw->conf;
614 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
615
616 if ((is_ap) &&
617 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
618 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
619 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
620 0, cur_ht_config);
621 else
622#endif /* CONFIG_IWL4965_HT */
623 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
624 0, NULL);
6440adb5
CB
625
626 /* Set up default rate scaling table in device's station table */
b481de9c
ZY
627 iwl4965_add_station(priv, addr, is_ap);
628
556f8db7 629 return sta_id;
b481de9c
ZY
630}
631
b481de9c 632/**
bb8c093b 633 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY
634 *
635 * NOTE: This is really only useful during development and can eventually
636 * be #ifdef'd out once the driver is stable and folks aren't actively
637 * making changes
638 */
bb8c093b 639static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY
640{
641 int error = 0;
642 int counter = 1;
643
644 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
645 error |= le32_to_cpu(rxon->flags &
646 (RXON_FLG_TGJ_NARROW_BAND_MSK |
647 RXON_FLG_RADAR_DETECT_MSK));
648 if (error)
649 IWL_WARNING("check 24G fields %d | %d\n",
650 counter++, error);
651 } else {
652 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
653 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
654 if (error)
655 IWL_WARNING("check 52 fields %d | %d\n",
656 counter++, error);
657 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
658 if (error)
659 IWL_WARNING("check 52 CCK %d | %d\n",
660 counter++, error);
661 }
662 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
663 if (error)
664 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
665
666 /* make sure basic rates 6Mbps and 1Mbps are supported */
667 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
668 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
669 if (error)
670 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
671
672 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
673 if (error)
674 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
675
676 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
677 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
678 if (error)
679 IWL_WARNING("check CCK and short slot %d | %d\n",
680 counter++, error);
681
682 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
683 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
684 if (error)
685 IWL_WARNING("check CCK & auto detect %d | %d\n",
686 counter++, error);
687
688 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
689 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
690 if (error)
691 IWL_WARNING("check TGG and auto detect %d | %d\n",
692 counter++, error);
693
694 if (error)
695 IWL_WARNING("Tuning to channel %d\n",
696 le16_to_cpu(rxon->channel));
697
698 if (error) {
bb8c093b 699 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY
700 return -1;
701 }
702 return 0;
703}
704
705/**
9fbab516 706 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 707 * @priv: staging_rxon is compared to active_rxon
b481de9c 708 *
9fbab516
BC
709 * If the RXON structure is changing enough to require a new tune,
710 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
711 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 712 */
c79dd5b5 713static int iwl4965_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY
714{
715
716 /* These items are only settable from the full RXON command */
717 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
718 compare_ether_addr(priv->staging_rxon.bssid_addr,
719 priv->active_rxon.bssid_addr) ||
720 compare_ether_addr(priv->staging_rxon.node_addr,
721 priv->active_rxon.node_addr) ||
722 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
723 priv->active_rxon.wlap_bssid_addr) ||
724 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
725 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
726 (priv->staging_rxon.air_propagation !=
727 priv->active_rxon.air_propagation) ||
728 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
729 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
730 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
731 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
732 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
733 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
734 return 1;
735
736 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
737 * be updated with the RXON_ASSOC command -- however only some
738 * flag transitions are allowed using RXON_ASSOC */
739
740 /* Check if we are not switching bands */
741 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
742 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
743 return 1;
744
745 /* Check if we are switching association toggle */
746 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
747 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
748 return 1;
749
750 return 0;
751}
752
b481de9c 753/**
bb8c093b 754 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 755 *
01ebd063 756 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY
757 * the active_rxon structure is updated with the new data. This
758 * function correctly transitions out of the RXON_ASSOC_MSK state if
759 * a HW tune is required based on the RXON structure changes.
760 */
c79dd5b5 761static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY
762{
763 /* cast away the const for active_rxon in this function */
bb8c093b 764 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 765 DECLARE_MAC_BUF(mac);
b481de9c
ZY
766 int rc = 0;
767
fee1247a 768 if (!iwl_is_alive(priv))
b481de9c
ZY
769 return -1;
770
771 /* always get timestamp with Rx frame */
772 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
773
bb8c093b 774 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY
775 if (rc) {
776 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
777 return -EINVAL;
778 }
779
780 /* If we don't need to send a full RXON, we can use
bb8c093b 781 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 782 * and other flags for the current radio configuration. */
bb8c093b 783 if (!iwl4965_full_rxon_required(priv)) {
7e8c519e 784 rc = iwl_send_rxon_assoc(priv);
b481de9c
ZY
785 if (rc) {
786 IWL_ERROR("Error setting RXON_ASSOC "
787 "configuration (%d).\n", rc);
788 return rc;
789 }
790
791 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
792
793 return 0;
794 }
795
796 /* station table will be cleared */
797 priv->assoc_station_added = 0;
798
b481de9c
ZY
799 /* If we are currently associated and the new config requires
800 * an RXON_ASSOC and the new config wants the associated mask enabled,
801 * we must clear the associated from the active configuration
802 * before we apply the new config */
3109ece1 803 if (iwl_is_associated(priv) &&
b481de9c
ZY
804 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
805 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
806 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
807
857485c0 808 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 809 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY
810 &priv->active_rxon);
811
812 /* If the mask clearing failed then we set
813 * active_rxon back to what it was previously */
814 if (rc) {
815 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
816 IWL_ERROR("Error clearing ASSOC_MSK on current "
817 "configuration (%d).\n", rc);
818 return rc;
819 }
b481de9c
ZY
820 }
821
822 IWL_DEBUG_INFO("Sending RXON\n"
823 "* with%s RXON_FILTER_ASSOC_MSK\n"
824 "* channel = %d\n"
0795af57 825 "* bssid = %s\n",
b481de9c
ZY
826 ((priv->staging_rxon.filter_flags &
827 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
828 le16_to_cpu(priv->staging_rxon.channel),
0795af57 829 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 830
099b40b7 831 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
b481de9c 832 /* Apply the new configuration */
857485c0 833 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 834 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY
835 if (rc) {
836 IWL_ERROR("Error setting new configuration (%d).\n", rc);
837 return rc;
838 }
839
bf85ea4f 840 iwlcore_clear_stations_table(priv);
556f8db7 841
b481de9c
ZY
842 if (!priv->error_recovering)
843 priv->start_calib = 0;
844
f0832f13 845 iwl_init_sensitivity(priv);
b481de9c
ZY
846
847 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
848
849 /* If we issue a new RXON command which required a tune then we must
850 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 851 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY
852 if (rc) {
853 IWL_ERROR("Error setting Tx power (%d).\n", rc);
854 return rc;
855 }
856
857 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 858 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY
859 IWL_INVALID_STATION) {
860 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
861 return -EIO;
862 }
863
864 /* If we have set the ASSOC_MSK and we are in BSS mode then
865 * add the IWL_AP_ID to the station rate table */
3109ece1 866 if (iwl_is_associated(priv) &&
b481de9c 867 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 868 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY
869 == IWL_INVALID_STATION) {
870 IWL_ERROR("Error adding AP address for transmit.\n");
871 return -EIO;
872 }
873 priv->assoc_station_added = 1;
6974e363
EG
874 if (priv->default_wep_key &&
875 iwl_send_static_wepkey_cmd(priv, 0))
876 IWL_ERROR("Could not send WEP static key.\n");
b481de9c
ZY
877 }
878
879 return 0;
880}
881
5da4b55f
MA
882void iwl4965_update_chain_flags(struct iwl_priv *priv)
883{
884
885 iwl4965_set_rxon_chain(priv);
886 iwl4965_commit_rxon(priv);
887}
888
c79dd5b5 889static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 890{
bb8c093b 891 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY
892 .flags = 3,
893 .lead_time = 0xAA,
894 .max_kill = 1,
895 .kill_ack_mask = 0,
896 .kill_cts_mask = 0,
897 };
898
857485c0 899 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 900 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY
901}
902
c79dd5b5 903static int iwl4965_send_scan_abort(struct iwl_priv *priv)
b481de9c
ZY
904{
905 int rc = 0;
bb8c093b 906 struct iwl4965_rx_packet *res;
857485c0 907 struct iwl_host_cmd cmd = {
b481de9c
ZY
908 .id = REPLY_SCAN_ABORT_CMD,
909 .meta.flags = CMD_WANT_SKB,
910 };
911
912 /* If there isn't a scan actively going on in the hardware
913 * then we are in between scan bands and not actually
914 * actively scanning, so don't send the abort command */
915 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
916 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
917 return 0;
918 }
919
857485c0 920 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
921 if (rc) {
922 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
923 return rc;
924 }
925
bb8c093b 926 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
927 if (res->u.status != CAN_ABORT_STATUS) {
928 /* The scan abort will return 1 for success or
929 * 2 for "failure". A failure condition can be
930 * due to simply not being in an active scan which
931 * can occur if we send the scan abort before we
932 * the microcode has notified us that a scan is
933 * completed. */
934 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
935 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
936 clear_bit(STATUS_SCAN_HW, &priv->status);
937 }
938
939 dev_kfree_skb_any(cmd.meta.u.skb);
940
941 return rc;
942}
943
b481de9c
ZY
944/*
945 * CARD_STATE_CMD
946 *
9fbab516 947 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY
948 *
949 * When in the 'enable' state the card operates as normal.
950 * When in the 'disable' state, the card enters into a low power mode.
951 * When in the 'halt' state, the card is shut down and must be fully
952 * restarted to come back on.
953 */
c79dd5b5 954static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
b481de9c 955{
857485c0 956 struct iwl_host_cmd cmd = {
b481de9c
ZY
957 .id = REPLY_CARD_STATE_CMD,
958 .len = sizeof(u32),
959 .data = &flags,
960 .meta.flags = meta_flag,
961 };
962
857485c0 963 return iwl_send_cmd(priv, &cmd);
b481de9c
ZY
964}
965
c79dd5b5 966int iwl4965_send_add_station(struct iwl_priv *priv,
bb8c093b 967 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 968{
bb8c093b 969 struct iwl4965_rx_packet *res = NULL;
b481de9c 970 int rc = 0;
857485c0 971 struct iwl_host_cmd cmd = {
b481de9c 972 .id = REPLY_ADD_STA,
bb8c093b 973 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY
974 .meta.flags = flags,
975 .data = sta,
976 };
977
9e5b806c 978 if (!(flags & CMD_ASYNC))
b481de9c
ZY
979 cmd.meta.flags |= CMD_WANT_SKB;
980
857485c0 981 rc = iwl_send_cmd(priv, &cmd);
b481de9c
ZY
982
983 if (rc || (flags & CMD_ASYNC))
984 return rc;
985
bb8c093b 986 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
987 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
988 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
989 res->hdr.flags);
990 rc = -EIO;
991 }
992
993 if (rc == 0) {
994 switch (res->u.add_sta.status) {
995 case ADD_STA_SUCCESS_MSK:
996 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
997 break;
998 default:
999 rc = -EIO;
1000 IWL_WARNING("REPLY_ADD_STA failed\n");
1001 break;
1002 }
1003 }
1004
1005 priv->alloc_rxb_skb--;
1006 dev_kfree_skb_any(cmd.meta.u.skb);
1007
1008 return rc;
1009}
1010
c79dd5b5 1011static void iwl4965_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY
1012{
1013 struct list_head *element;
1014
1015 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1016 priv->frames_count);
1017
1018 while (!list_empty(&priv->free_frames)) {
1019 element = priv->free_frames.next;
1020 list_del(element);
bb8c093b 1021 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY
1022 priv->frames_count--;
1023 }
1024
1025 if (priv->frames_count) {
1026 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1027 priv->frames_count);
1028 priv->frames_count = 0;
1029 }
1030}
1031
c79dd5b5 1032static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
b481de9c 1033{
bb8c093b 1034 struct iwl4965_frame *frame;
b481de9c
ZY
1035 struct list_head *element;
1036 if (list_empty(&priv->free_frames)) {
1037 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1038 if (!frame) {
1039 IWL_ERROR("Could not allocate frame!\n");
1040 return NULL;
1041 }
1042
1043 priv->frames_count++;
1044 return frame;
1045 }
1046
1047 element = priv->free_frames.next;
1048 list_del(element);
bb8c093b 1049 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY
1050}
1051
c79dd5b5 1052static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY
1053{
1054 memset(frame, 0, sizeof(*frame));
1055 list_add(&frame->list, &priv->free_frames);
1056}
1057
c79dd5b5 1058unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
b481de9c
ZY
1059 struct ieee80211_hdr *hdr,
1060 const u8 *dest, int left)
1061{
1062
3109ece1 1063 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY
1064 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1065 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1066 return 0;
1067
1068 if (priv->ibss_beacon->len > left)
1069 return 0;
1070
1071 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1072
1073 return priv->ibss_beacon->len;
1074}
1075
bb8c093b 1076static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
b481de9c
ZY
1077{
1078 u8 i;
1079
1080 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
bb8c093b 1081 i = iwl4965_rates[i].next_ieee) {
b481de9c 1082 if (rate_mask & (1 << i))
bb8c093b 1083 return iwl4965_rates[i].plcp;
b481de9c
ZY
1084 }
1085
1086 return IWL_RATE_INVALID;
1087}
1088
c79dd5b5 1089static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 1090{
bb8c093b 1091 struct iwl4965_frame *frame;
b481de9c
ZY
1092 unsigned int frame_size;
1093 int rc;
1094 u8 rate;
1095
bb8c093b 1096 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY
1097
1098 if (!frame) {
1099 IWL_ERROR("Could not obtain free frame buffer for beacon "
1100 "command.\n");
1101 return -ENOMEM;
1102 }
1103
1104 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
bb8c093b 1105 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
b481de9c
ZY
1106 0xFF0);
1107 if (rate == IWL_INVALID_RATE)
1108 rate = IWL_RATE_6M_PLCP;
1109 } else {
bb8c093b 1110 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
b481de9c
ZY
1111 if (rate == IWL_INVALID_RATE)
1112 rate = IWL_RATE_1M_PLCP;
1113 }
1114
bb8c093b 1115 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1116
857485c0 1117 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
1118 &frame->u.cmd[0]);
1119
bb8c093b 1120 iwl4965_free_frame(priv, frame);
b481de9c
ZY
1121
1122 return rc;
1123}
1124
b481de9c
ZY
1125/******************************************************************************
1126 *
1127 * Misc. internal state and helper functions
1128 *
1129 ******************************************************************************/
b481de9c 1130
5425e490 1131static void iwl4965_unset_hw_params(struct iwl_priv *priv)
b481de9c 1132{
059ff826 1133 if (priv->shared_virt)
b481de9c 1134 pci_free_consistent(priv->pci_dev,
bb8c093b 1135 sizeof(struct iwl4965_shared),
059ff826
TW
1136 priv->shared_virt,
1137 priv->shared_phys);
b481de9c
ZY
1138}
1139
1140/**
bb8c093b 1141 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY
1142 *
1143 * return : set the bit for each supported rate insert in ie
1144 */
bb8c093b 1145static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1146 u16 basic_rate, int *left)
b481de9c
ZY
1147{
1148 u16 ret_rates = 0, bit;
1149 int i;
c7c46676
TW
1150 u8 *cnt = ie;
1151 u8 *rates = ie + 1;
b481de9c
ZY
1152
1153 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1154 if (bit & supported_rate) {
1155 ret_rates |= bit;
bb8c093b 1156 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW
1157 ((bit & basic_rate) ? 0x80 : 0x00);
1158 (*cnt)++;
1159 (*left)--;
1160 if ((*left <= 0) ||
1161 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY
1162 break;
1163 }
1164 }
1165
1166 return ret_rates;
1167}
1168
d1141dfb
EG
1169#ifdef CONFIG_IWL4965_HT
1170static void iwl4965_ht_conf(struct iwl_priv *priv,
1171 struct ieee80211_bss_conf *bss_conf)
1172{
1173 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
1174 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
1175 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
1176
1177 IWL_DEBUG_MAC80211("enter: \n");
1178
1179 iwl_conf->is_ht = bss_conf->assoc_ht;
1180
1181 if (!iwl_conf->is_ht)
1182 return;
1183
1184 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
1185
1186 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
1187 iwl_conf->sgf |= 0x1;
1188 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
1189 iwl_conf->sgf |= 0x2;
1190
1191 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
1192 iwl_conf->max_amsdu_size =
1193 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
1194
1195 iwl_conf->supported_chan_width =
1196 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
1197 iwl_conf->extension_chan_offset =
1198 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
1199 /* If no above or below channel supplied disable FAT channel */
1200 if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
1201 iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
1202 iwl_conf->supported_chan_width = 0;
1203
1204 iwl_conf->tx_mimo_ps_mode =
1205 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
1206 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
1207
1208 iwl_conf->control_channel = ht_bss_conf->primary_channel;
1209 iwl_conf->tx_chan_width =
1210 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
1211 iwl_conf->ht_protection =
1212 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
1213 iwl_conf->non_GF_STA_present =
1214 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
1215
1216 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
1217 IWL_DEBUG_MAC80211("leave\n");
1218}
1219
1220static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband,
1221 u8 *pos, int *left)
1222{
1223 struct ieee80211_ht_cap *ht_cap;
1224
1225 if (!sband || !sband->ht_info.ht_supported)
1226 return;
1227
1228 if (*left < sizeof(struct ieee80211_ht_cap))
1229 return;
1230
1231 *pos++ = sizeof(struct ieee80211_ht_cap);
1232 ht_cap = (struct ieee80211_ht_cap *) pos;
1233
1234 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
1235 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
1236 ht_cap->ampdu_params_info =
1237 (sband->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
1238 ((sband->ht_info.ampdu_density << 2) &
1239 IEEE80211_HT_CAP_AMPDU_DENSITY);
1240 *left -= sizeof(struct ieee80211_ht_cap);
1241}
1242#else
1243static inline void iwl4965_ht_conf(struct iwl_priv *priv,
1244 struct ieee80211_bss_conf *bss_conf)
1245{
1246}
1247static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband,
1248 u8 *pos, int *left)
1249{
1250}
1251#endif
1252
1253
b481de9c 1254/**
bb8c093b 1255 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1256 */
c79dd5b5 1257static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
78330fdd
TW
1258 enum ieee80211_band band,
1259 struct ieee80211_mgmt *frame,
1260 int left, int is_direct)
b481de9c
ZY
1261{
1262 int len = 0;
1263 u8 *pos = NULL;
bee488db 1264 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
78330fdd 1265 const struct ieee80211_supported_band *sband =
d1141dfb 1266 iwl_get_hw_mode(priv, band);
b481de9c
ZY
1267
1268 /* Make sure there is enough space for the probe request,
1269 * two mandatory IEs and the data */
1270 left -= 24;
1271 if (left < 0)
1272 return 0;
1273 len += 24;
1274
1275 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1276 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1277 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1278 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY
1279 frame->seq_ctrl = 0;
1280
1281 /* fill in our indirect SSID IE */
1282 /* ...next IE... */
1283
1284 left -= 2;
1285 if (left < 0)
1286 return 0;
1287 len += 2;
1288 pos = &(frame->u.probe_req.variable[0]);
1289 *pos++ = WLAN_EID_SSID;
1290 *pos++ = 0;
1291
1292 /* fill in our direct SSID IE... */
1293 if (is_direct) {
1294 /* ...next IE... */
1295 left -= 2 + priv->essid_len;
1296 if (left < 0)
1297 return 0;
1298 /* ... fill it in... */
1299 *pos++ = WLAN_EID_SSID;
1300 *pos++ = priv->essid_len;
1301 memcpy(pos, priv->essid, priv->essid_len);
1302 pos += priv->essid_len;
1303 len += 2 + priv->essid_len;
1304 }
1305
1306 /* fill in supported rate */
1307 /* ...next IE... */
1308 left -= 2;
1309 if (left < 0)
1310 return 0;
c7c46676 1311
b481de9c
ZY
1312 /* ... fill it in... */
1313 *pos++ = WLAN_EID_SUPP_RATES;
1314 *pos = 0;
c7c46676 1315
bee488db 1316 /* exclude 60M rate */
1317 active_rates = priv->rates_mask;
1318 active_rates &= ~IWL_RATE_60M_MASK;
1319
1320 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1321
c7c46676 1322 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1323 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1324 active_rate_basic, &left);
c7c46676
TW
1325 active_rates &= ~ret_rates;
1326
bb8c093b 1327 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1328 active_rate_basic, &left);
c7c46676
TW
1329 active_rates &= ~ret_rates;
1330
b481de9c
ZY
1331 len += 2 + *pos;
1332 pos += (*pos) + 1;
c7c46676 1333 if (active_rates == 0)
b481de9c
ZY
1334 goto fill_end;
1335
1336 /* fill in supported extended rate */
1337 /* ...next IE... */
1338 left -= 2;
1339 if (left < 0)
1340 return 0;
1341 /* ... fill it in... */
1342 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1343 *pos = 0;
bb8c093b 1344 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1345 active_rate_basic, &left);
b481de9c
ZY
1346 if (*pos > 0)
1347 len += 2 + *pos;
1348
b481de9c 1349 fill_end:
d1141dfb
EG
1350 /* fill in HT IE */
1351 left -= 2;
1352 if (left < 0)
1353 return 0;
1354
1355 *pos++ = WLAN_EID_HT_CAPABILITY;
1356 *pos = 0;
1357
1358 iwl_ht_cap_to_ie(sband, pos, &left);
1359
1360 if (*pos > 0)
1361 len += 2 + *pos;
b481de9c
ZY
1362 return (u16)len;
1363}
1364
1365/*
1366 * QoS support
1367*/
c79dd5b5 1368static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 1369 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY
1370{
1371
857485c0 1372 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
bb8c093b 1373 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY
1374}
1375
c79dd5b5 1376static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY
1377{
1378 unsigned long flags;
1379
b481de9c
ZY
1380 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1381 return;
1382
1383 if (!priv->qos_data.qos_enable)
1384 return;
1385
1386 spin_lock_irqsave(&priv->lock, flags);
1387 priv->qos_data.def_qos_parm.qos_flags = 0;
1388
1389 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1390 !priv->qos_data.qos_cap.q_AP.txop_request)
1391 priv->qos_data.def_qos_parm.qos_flags |=
1392 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
1393 if (priv->qos_data.qos_active)
1394 priv->qos_data.def_qos_parm.qos_flags |=
1395 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1396
c8b0e6e1 1397#ifdef CONFIG_IWL4965_HT
fd105e79 1398 if (priv->current_ht_config.is_ht)
f1f1f5c7 1399 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 1400#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 1401
b481de9c
ZY
1402 spin_unlock_irqrestore(&priv->lock, flags);
1403
3109ece1 1404 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
1405 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
1406 priv->qos_data.qos_active,
1407 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 1408
bb8c093b 1409 iwl4965_send_qos_params_command(priv,
b481de9c
ZY
1410 &(priv->qos_data.def_qos_parm));
1411 }
1412}
1413
c79dd5b5 1414int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY
1415{
1416 /* Filter incoming packets to determine if they are targeted toward
1417 * this network, discarding packets coming from ourselves */
1418 switch (priv->iw_mode) {
1419 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
1420 /* packets from our adapter are dropped (echo) */
1421 if (!compare_ether_addr(header->addr2, priv->mac_addr))
1422 return 0;
1423 /* {broad,multi}cast packets to our IBSS go through */
1424 if (is_multicast_ether_addr(header->addr1))
1425 return !compare_ether_addr(header->addr3, priv->bssid);
1426 /* packets to our adapter go through */
1427 return !compare_ether_addr(header->addr1, priv->mac_addr);
1428 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
1429 /* packets from our adapter are dropped (echo) */
1430 if (!compare_ether_addr(header->addr3, priv->mac_addr))
1431 return 0;
1432 /* {broad,multi}cast packets to our BSS go through */
1433 if (is_multicast_ether_addr(header->addr1))
1434 return !compare_ether_addr(header->addr2, priv->bssid);
1435 /* packets to our adapter go through */
1436 return !compare_ether_addr(header->addr1, priv->mac_addr);
69dc5d9d
TW
1437 default:
1438 break;
b481de9c
ZY
1439 }
1440
1441 return 1;
1442}
1443
1444#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1445
bb8c093b 1446static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY
1447{
1448 switch (status & TX_STATUS_MSK) {
1449 case TX_STATUS_SUCCESS:
1450 return "SUCCESS";
1451 TX_STATUS_ENTRY(SHORT_LIMIT);
1452 TX_STATUS_ENTRY(LONG_LIMIT);
1453 TX_STATUS_ENTRY(FIFO_UNDERRUN);
1454 TX_STATUS_ENTRY(MGMNT_ABORT);
1455 TX_STATUS_ENTRY(NEXT_FRAG);
1456 TX_STATUS_ENTRY(LIFE_EXPIRE);
1457 TX_STATUS_ENTRY(DEST_PS);
1458 TX_STATUS_ENTRY(ABORTED);
1459 TX_STATUS_ENTRY(BT_RETRY);
1460 TX_STATUS_ENTRY(STA_INVALID);
1461 TX_STATUS_ENTRY(FRAG_DROPPED);
1462 TX_STATUS_ENTRY(TID_DISABLE);
1463 TX_STATUS_ENTRY(FRAME_FLUSHED);
1464 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
1465 TX_STATUS_ENTRY(TX_LOCKED);
1466 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
1467 }
1468
1469 return "UNKNOWN";
1470}
1471
1472/**
bb8c093b 1473 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY
1474 *
1475 * NOTE: priv->mutex is not required before calling this function
1476 */
c79dd5b5 1477static int iwl4965_scan_cancel(struct iwl_priv *priv)
b481de9c
ZY
1478{
1479 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1480 clear_bit(STATUS_SCANNING, &priv->status);
1481 return 0;
1482 }
1483
1484 if (test_bit(STATUS_SCANNING, &priv->status)) {
1485 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1486 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1487 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1488 queue_work(priv->workqueue, &priv->abort_scan);
1489
1490 } else
1491 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1492
1493 return test_bit(STATUS_SCANNING, &priv->status);
1494 }
1495
1496 return 0;
1497}
1498
1499/**
bb8c093b 1500 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY
1501 * @ms: amount of time to wait (in milliseconds) for scan to abort
1502 *
1503 * NOTE: priv->mutex must be held before calling this function
1504 */
c79dd5b5 1505static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
b481de9c
ZY
1506{
1507 unsigned long now = jiffies;
1508 int ret;
1509
bb8c093b 1510 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY
1511 if (ret && ms) {
1512 mutex_unlock(&priv->mutex);
1513 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1514 test_bit(STATUS_SCANNING, &priv->status))
1515 msleep(1);
1516 mutex_lock(&priv->mutex);
1517
1518 return test_bit(STATUS_SCANNING, &priv->status);
1519 }
1520
1521 return ret;
1522}
1523
c79dd5b5 1524static void iwl4965_sequence_reset(struct iwl_priv *priv)
b481de9c
ZY
1525{
1526 /* Reset ieee stats */
1527
1528 /* We don't reset the net_device_stats (ieee->stats) on
1529 * re-association */
1530
1531 priv->last_seq_num = -1;
1532 priv->last_frag_num = -1;
1533 priv->last_packet_time = 0;
1534
bb8c093b 1535 iwl4965_scan_cancel(priv);
b481de9c
ZY
1536}
1537
1538#define MAX_UCODE_BEACON_INTERVAL 4096
1539#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1540
bb8c093b 1541static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
1542{
1543 u16 new_val = 0;
1544 u16 beacon_factor = 0;
1545
1546 beacon_factor =
1547 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1548 / MAX_UCODE_BEACON_INTERVAL;
1549 new_val = beacon_val / beacon_factor;
1550
1551 return cpu_to_le16(new_val);
1552}
1553
c79dd5b5 1554static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
1555{
1556 u64 interval_tm_unit;
1557 u64 tsf, result;
1558 unsigned long flags;
1559 struct ieee80211_conf *conf = NULL;
1560 u16 beacon_int = 0;
1561
1562 conf = ieee80211_get_hw_conf(priv->hw);
1563
1564 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW
1565 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
1566 priv->rxon_timing.timestamp.dw[0] =
1567 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c
ZY
1568
1569 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1570
3109ece1 1571 tsf = priv->timestamp;
b481de9c
ZY
1572
1573 beacon_int = priv->beacon_int;
1574 spin_unlock_irqrestore(&priv->lock, flags);
1575
1576 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
1577 if (beacon_int == 0) {
1578 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1579 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1580 } else {
1581 priv->rxon_timing.beacon_interval =
1582 cpu_to_le16(beacon_int);
1583 priv->rxon_timing.beacon_interval =
bb8c093b 1584 iwl4965_adjust_beacon_interval(
b481de9c
ZY
1585 le16_to_cpu(priv->rxon_timing.beacon_interval));
1586 }
1587
1588 priv->rxon_timing.atim_window = 0;
1589 } else {
1590 priv->rxon_timing.beacon_interval =
bb8c093b 1591 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
1592 /* TODO: we need to get atim_window from upper stack
1593 * for now we set to 0 */
1594 priv->rxon_timing.atim_window = 0;
1595 }
1596
1597 interval_tm_unit =
1598 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1599 result = do_div(tsf, interval_tm_unit);
1600 priv->rxon_timing.beacon_init_val =
1601 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1602
1603 IWL_DEBUG_ASSOC
1604 ("beacon interval %d beacon timer %d beacon tim %d\n",
1605 le16_to_cpu(priv->rxon_timing.beacon_interval),
1606 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1607 le16_to_cpu(priv->rxon_timing.atim_window));
1608}
1609
c79dd5b5 1610static int iwl4965_scan_initiate(struct iwl_priv *priv)
b481de9c
ZY
1611{
1612 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1613 IWL_ERROR("APs don't scan.\n");
1614 return 0;
1615 }
1616
fee1247a 1617 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
1618 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1619 return -EIO;
1620 }
1621
1622 if (test_bit(STATUS_SCANNING, &priv->status)) {
1623 IWL_DEBUG_SCAN("Scan already in progress.\n");
1624 return -EAGAIN;
1625 }
1626
1627 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1628 IWL_DEBUG_SCAN("Scan request while abort pending. "
1629 "Queuing.\n");
1630 return -EAGAIN;
1631 }
1632
1633 IWL_DEBUG_INFO("Starting scan...\n");
1634 priv->scan_bands = 2;
1635 set_bit(STATUS_SCANNING, &priv->status);
1636 priv->scan_start = jiffies;
1637 priv->scan_pass_start = priv->scan_start;
1638
1639 queue_work(priv->workqueue, &priv->request_scan);
1640
1641 return 0;
1642}
1643
b481de9c 1644
c79dd5b5 1645static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
8318d78a 1646 enum ieee80211_band band)
b481de9c 1647{
8318d78a 1648 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
1649 priv->staging_rxon.flags &=
1650 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1651 | RXON_FLG_CCK_MSK);
1652 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1653 } else {
508e32e1 1654 /* Copied from iwl4965_post_associate() */
b481de9c
ZY
1655 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1656 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1657 else
1658 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1659
1660 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
1661 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1662
1663 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1664 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1665 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1666 }
1667}
1668
1669/*
01ebd063 1670 * initialize rxon structure with default values from eeprom
b481de9c 1671 */
c79dd5b5 1672static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 1673{
bf85ea4f 1674 const struct iwl_channel_info *ch_info;
b481de9c
ZY
1675
1676 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1677
1678 switch (priv->iw_mode) {
1679 case IEEE80211_IF_TYPE_AP:
1680 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1681 break;
1682
1683 case IEEE80211_IF_TYPE_STA:
1684 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1685 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1686 break;
1687
1688 case IEEE80211_IF_TYPE_IBSS:
1689 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1690 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1691 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1692 RXON_FILTER_ACCEPT_GRP_MSK;
1693 break;
1694
1695 case IEEE80211_IF_TYPE_MNTR:
1696 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1697 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1698 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1699 break;
69dc5d9d
TW
1700 default:
1701 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
1702 break;
b481de9c
ZY
1703 }
1704
1705#if 0
1706 /* TODO: Figure out when short_preamble would be set and cache from
1707 * that */
1708 if (!hw_to_local(priv->hw)->short_preamble)
1709 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1710 else
1711 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1712#endif
1713
8622e705 1714 ch_info = iwl_get_channel_info(priv, priv->band,
b481de9c
ZY
1715 le16_to_cpu(priv->staging_rxon.channel));
1716
1717 if (!ch_info)
1718 ch_info = &priv->channel_info[0];
1719
1720 /*
1721 * in some case A channels are all non IBSS
1722 * in this case force B/G channel
1723 */
1724 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
1725 !(is_channel_ibss(ch_info)))
1726 ch_info = &priv->channel_info[0];
1727
1728 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 1729 priv->band = ch_info->band;
b481de9c 1730
8318d78a 1731 iwl4965_set_flags_for_phymode(priv, priv->band);
b481de9c
ZY
1732
1733 priv->staging_rxon.ofdm_basic_rates =
1734 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1735 priv->staging_rxon.cck_basic_rates =
1736 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1737
1738 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
1739 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
1740 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1741 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1742 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1743 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1744 iwl4965_set_rxon_chain(priv);
1745}
1746
c79dd5b5 1747static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 1748{
b481de9c 1749 if (mode == IEEE80211_IF_TYPE_IBSS) {
bf85ea4f 1750 const struct iwl_channel_info *ch_info;
b481de9c 1751
8622e705 1752 ch_info = iwl_get_channel_info(priv,
8318d78a 1753 priv->band,
b481de9c
ZY
1754 le16_to_cpu(priv->staging_rxon.channel));
1755
1756 if (!ch_info || !is_channel_ibss(ch_info)) {
1757 IWL_ERROR("channel %d not IBSS channel\n",
1758 le16_to_cpu(priv->staging_rxon.channel));
1759 return -EINVAL;
1760 }
1761 }
1762
b481de9c
ZY
1763 priv->iw_mode = mode;
1764
bb8c093b 1765 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
1766 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1767
bf85ea4f 1768 iwlcore_clear_stations_table(priv);
b481de9c 1769
fde3571f 1770 /* dont commit rxon if rf-kill is on*/
fee1247a 1771 if (!iwl_is_ready_rf(priv))
fde3571f
MA
1772 return -EAGAIN;
1773
1774 cancel_delayed_work(&priv->scan_check);
1775 if (iwl4965_scan_cancel_timeout(priv, 100)) {
1776 IWL_WARNING("Aborted scan still in progress after 100ms\n");
1777 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
1778 return -EAGAIN;
1779 }
1780
bb8c093b 1781 iwl4965_commit_rxon(priv);
b481de9c
ZY
1782
1783 return 0;
1784}
1785
c79dd5b5 1786static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
b481de9c 1787 struct ieee80211_tx_control *ctl,
857485c0 1788 struct iwl_cmd *cmd,
b481de9c 1789 struct sk_buff *skb_frag,
deb09c43 1790 int sta_id)
b481de9c 1791{
deb09c43 1792 struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
6974e363
EG
1793 struct iwl_wep_key *wepkey;
1794 int keyidx = 0;
1795
1c014420 1796 BUG_ON(ctl->hw_key->hw_key_idx > 3);
b481de9c
ZY
1797
1798 switch (keyinfo->alg) {
1799 case ALG_CCMP:
1800 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
1801 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
8236e183
MS
1802 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
1803 cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
b481de9c
ZY
1804 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
1805 break;
1806
1807 case ALG_TKIP:
b481de9c 1808 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2bc75089
EG
1809 ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
1810 IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
1811 IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
b481de9c
ZY
1812 break;
1813
1814 case ALG_WEP:
1c014420 1815 wepkey = &priv->wep_keys[ctl->hw_key->hw_key_idx];
6974e363
EG
1816 cmd->cmd.tx.sec_ctl = 0;
1817 if (priv->default_wep_key) {
1818 /* the WEP key was sent as static */
1c014420 1819 keyidx = ctl->hw_key->hw_key_idx;
6974e363
EG
1820 memcpy(&cmd->cmd.tx.key[3], wepkey->key,
1821 wepkey->key_size);
1822 if (wepkey->key_size == WEP_KEY_LEN_128)
1823 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
1824 } else {
0211ddda
EG
1825 /* the WEP key was sent as dynamic */
1826 keyidx = keyinfo->keyidx;
1827 memcpy(&cmd->cmd.tx.key[3], keyinfo->key,
1828 keyinfo->keylen);
1829 if (keyinfo->keylen == WEP_KEY_LEN_128)
1830 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
6974e363 1831 }
b481de9c 1832
6974e363
EG
1833 cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP |
1834 (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
b481de9c
ZY
1835
1836 IWL_DEBUG_TX("Configuring packet for WEP encryption "
6974e363 1837 "with key %d\n", keyidx);
b481de9c
ZY
1838 break;
1839
b481de9c
ZY
1840 default:
1841 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
1842 break;
1843 }
1844}
1845
1846/*
1847 * handle build REPLY_TX command notification.
1848 */
c79dd5b5 1849static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
857485c0 1850 struct iwl_cmd *cmd,
b481de9c
ZY
1851 struct ieee80211_tx_control *ctrl,
1852 struct ieee80211_hdr *hdr,
1853 int is_unicast, u8 std_id)
1854{
1855 __le16 *qc;
1856 u16 fc = le16_to_cpu(hdr->frame_control);
1857 __le32 tx_flags = cmd->cmd.tx.tx_flags;
1858
1859 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1860 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
1861 tx_flags |= TX_CMD_FLG_ACK_MSK;
1862 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
1863 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1864 if (ieee80211_is_probe_response(fc) &&
1865 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
1866 tx_flags |= TX_CMD_FLG_TSF_MSK;
1867 } else {
1868 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
1869 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1870 }
1871
87e4f7df
TW
1872 if (ieee80211_is_back_request(fc))
1873 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
1874
1875
b481de9c
ZY
1876 cmd->cmd.tx.sta_id = std_id;
1877 if (ieee80211_get_morefrag(hdr))
1878 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
1879
1880 qc = ieee80211_get_qos_ctrl(hdr);
1881 if (qc) {
1882 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
1883 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
1884 } else
1885 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1886
1887 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
1888 tx_flags |= TX_CMD_FLG_RTS_MSK;
1889 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
1890 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
1891 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1892 tx_flags |= TX_CMD_FLG_CTS_MSK;
1893 }
1894
1895 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
1896 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
1897
1898 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
1899 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1900 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
1901 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 1902 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 1903 else
bc434dd2 1904 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 1905 } else {
b481de9c 1906 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
ab53d8af 1907 }
b481de9c
ZY
1908
1909 cmd->cmd.tx.driver_txop = 0;
1910 cmd->cmd.tx.tx_flags = tx_flags;
1911 cmd->cmd.tx.next_frame_len = 0;
1912}
19758bef
TW
1913static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
1914{
1915 /* 0 - mgmt, 1 - cnt, 2 - data */
1916 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
1917 priv->tx_stats[idx].cnt++;
1918 priv->tx_stats[idx].bytes += len;
1919}
6440adb5
CB
1920/**
1921 * iwl4965_get_sta_id - Find station's index within station table
1922 *
1923 * If new IBSS station, create new entry in station table
1924 */
c79dd5b5 1925static int iwl4965_get_sta_id(struct iwl_priv *priv,
9fbab516 1926 struct ieee80211_hdr *hdr)
b481de9c
ZY
1927{
1928 int sta_id;
1929 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 1930 DECLARE_MAC_BUF(mac);
b481de9c 1931
6440adb5 1932 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY
1933 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
1934 is_multicast_ether_addr(hdr->addr1))
5425e490 1935 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
1936
1937 switch (priv->iw_mode) {
1938
6440adb5
CB
1939 /* If we are a client station in a BSS network, use the special
1940 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY
1941 case IEEE80211_IF_TYPE_STA:
1942 return IWL_AP_ID;
1943
1944 /* If we are an AP, then find the station, or use BCAST */
1945 case IEEE80211_IF_TYPE_AP:
947b13a7 1946 sta_id = iwl_find_station(priv, hdr->addr1);
b481de9c
ZY
1947 if (sta_id != IWL_INVALID_STATION)
1948 return sta_id;
5425e490 1949 return priv->hw_params.bcast_sta_id;
b481de9c 1950
6440adb5
CB
1951 /* If this frame is going out to an IBSS network, find the station,
1952 * or create a new station table entry */
b481de9c 1953 case IEEE80211_IF_TYPE_IBSS:
947b13a7 1954 sta_id = iwl_find_station(priv, hdr->addr1);
b481de9c
ZY
1955 if (sta_id != IWL_INVALID_STATION)
1956 return sta_id;
1957
6440adb5 1958 /* Create new station table entry */
67d62035
RR
1959 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
1960 0, CMD_ASYNC, NULL);
b481de9c
ZY
1961
1962 if (sta_id != IWL_INVALID_STATION)
1963 return sta_id;
1964
0795af57 1965 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 1966 "Defaulting to broadcast...\n",
0795af57 1967 print_mac(mac, hdr->addr1));
0a6857e7 1968 iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
5425e490 1969 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
1970
1971 default:
01ebd063 1972 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
5425e490 1973 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
1974 }
1975}
1976
1977/*
1978 * start REPLY_TX command process
1979 */
c79dd5b5 1980static int iwl4965_tx_skb(struct iwl_priv *priv,
b481de9c
ZY
1981 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
1982{
1983 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 1984 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY
1985 u32 *control_flags;
1986 int txq_id = ctl->queue;
bb8c093b
CH
1987 struct iwl4965_tx_queue *txq = NULL;
1988 struct iwl4965_queue *q = NULL;
b481de9c
ZY
1989 dma_addr_t phys_addr;
1990 dma_addr_t txcmd_phys;
87e4f7df 1991 dma_addr_t scratch_phys;
857485c0 1992 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
1993 u16 len, idx, len_org;
1994 u8 id, hdr_len, unicast;
1995 u8 sta_id;
1996 u16 seq_number = 0;
1997 u16 fc;
1998 __le16 *qc;
1999 u8 wait_write_ptr = 0;
2000 unsigned long flags;
2001 int rc;
2002
2003 spin_lock_irqsave(&priv->lock, flags);
fee1247a 2004 if (iwl_is_rfkill(priv)) {
b481de9c
ZY
2005 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2006 goto drop_unlock;
2007 }
2008
32bfd35d
JB
2009 if (!priv->vif) {
2010 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
b481de9c
ZY
2011 goto drop_unlock;
2012 }
2013
8318d78a 2014 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
b481de9c
ZY
2015 IWL_ERROR("ERROR: No TX rate available.\n");
2016 goto drop_unlock;
2017 }
2018
2019 unicast = !is_multicast_ether_addr(hdr->addr1);
2020 id = 0;
2021
2022 fc = le16_to_cpu(hdr->frame_control);
2023
0a6857e7 2024#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
2025 if (ieee80211_is_auth(fc))
2026 IWL_DEBUG_TX("Sending AUTH frame\n");
2027 else if (ieee80211_is_assoc_request(fc))
2028 IWL_DEBUG_TX("Sending ASSOC frame\n");
2029 else if (ieee80211_is_reassoc_request(fc))
2030 IWL_DEBUG_TX("Sending REASSOC frame\n");
2031#endif
2032
7878a5a4 2033 /* drop all data frame if we are not associated */
76f3915b 2034 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
3109ece1 2035 (!iwl_is_associated(priv) ||
a6477249 2036 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
76f3915b 2037 !priv->assoc_station_added)) {
3109ece1 2038 IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
b481de9c
ZY
2039 goto drop_unlock;
2040 }
2041
2042 spin_unlock_irqrestore(&priv->lock, flags);
2043
2044 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
CB
2045
2046 /* Find (or create) index into station table for destination station */
bb8c093b 2047 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2048 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP
2049 DECLARE_MAC_BUF(mac);
2050
2051 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2052 print_mac(mac, hdr->addr1));
b481de9c
ZY
2053 goto drop;
2054 }
2055
2056 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2057
2058 qc = ieee80211_get_qos_ctrl(hdr);
2059 if (qc) {
2060 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2061 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2062 IEEE80211_SCTL_SEQ;
2063 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2064 (hdr->seq_ctrl &
2065 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2066 seq_number += 0x10;
c8b0e6e1 2067#ifdef CONFIG_IWL4965_HT
b481de9c 2068 /* aggregation is on for this <sta,tid> */
fe01b477 2069 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
b481de9c 2070 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
fe01b477 2071 priv->stations[sta_id].tid[tid].tfds_in_queue++;
c8b0e6e1 2072#endif /* CONFIG_IWL4965_HT */
b481de9c 2073 }
6440adb5
CB
2074
2075 /* Descriptor for chosen Tx queue */
b481de9c
ZY
2076 txq = &priv->txq[txq_id];
2077 q = &txq->q;
2078
2079 spin_lock_irqsave(&priv->lock, flags);
2080
6440adb5 2081 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2082 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY
2083 memset(tfd, 0, sizeof(*tfd));
2084 control_flags = (u32 *) tfd;
fc4b6853 2085 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2086
6440adb5 2087 /* Set up driver data for this TFD */
bb8c093b 2088 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW
2089 txq->txb[q->write_ptr].skb[0] = skb;
2090 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2091 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
CB
2092
2093 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY
2094 out_cmd = &txq->cmd[idx];
2095 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2096 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
CB
2097
2098 /*
2099 * Set up the Tx-command (not MAC!) header.
2100 * Store the chosen Tx queue and TFD index within the sequence field;
2101 * after Tx, uCode's Tx response will return this value so driver can
2102 * locate the frame within the tx queue and do post-tx processing.
2103 */
b481de9c
ZY
2104 out_cmd->hdr.cmd = REPLY_TX;
2105 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2106 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB
2107
2108 /* Copy MAC header from skb into command buffer */
b481de9c
ZY
2109 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2110
6440adb5
CB
2111 /*
2112 * Use the first empty entry in this queue's command buffer array
2113 * to contain the Tx command and MAC header concatenated together
2114 * (payload data will be in another buffer).
2115 * Size of this varies, due to varying MAC header length.
2116 * If end is not dword aligned, we'll have 2 extra bytes at the end
2117 * of the MAC header (device reads on dword boundaries).
2118 * We'll tell device about this padding later.
2119 */
5425e490 2120 len = priv->hw_params.tx_cmd_len +
857485c0 2121 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
2122
2123 len_org = len;
2124 len = (len + 3) & ~3;
2125
2126 if (len_org != len)
2127 len_org = 1;
2128 else
2129 len_org = 0;
2130
6440adb5
CB
2131 /* Physical address of this Tx command's header (not MAC header!),
2132 * within command buffer array. */
857485c0
TW
2133 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2134 offsetof(struct iwl_cmd, hdr);
b481de9c 2135
6440adb5
CB
2136 /* Add buffer containing Tx command and MAC(!) header to TFD's
2137 * first entry */
bb8c093b 2138 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY
2139
2140 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
deb09c43 2141 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
b481de9c 2142
6440adb5
CB
2143 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2144 * if any (802.11 null frames have no payload). */
b481de9c
ZY
2145 len = skb->len - hdr_len;
2146 if (len) {
2147 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2148 len, PCI_DMA_TODEVICE);
bb8c093b 2149 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY
2150 }
2151
6440adb5 2152 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY
2153 if (len_org)
2154 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
2155
6440adb5 2156 /* Total # bytes to be transmitted */
b481de9c
ZY
2157 len = (u16)skb->len;
2158 out_cmd->cmd.tx.len = cpu_to_le16(len);
2159
2160 /* TODO need this for burst mode later on */
bb8c093b 2161 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY
2162
2163 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 2164 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c 2165
19758bef
TW
2166 iwl_update_tx_stats(priv, fc, len);
2167
857485c0 2168 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
87e4f7df
TW
2169 offsetof(struct iwl4965_tx_cmd, scratch);
2170 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
2171 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
2172
b481de9c
ZY
2173 if (!ieee80211_get_morefrag(hdr)) {
2174 txq->need_update = 1;
2175 if (qc) {
2176 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2177 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2178 }
2179 } else {
2180 wait_write_ptr = 1;
2181 txq->need_update = 0;
2182 }
2183
0a6857e7 2184 iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY
2185 sizeof(out_cmd->cmd.tx));
2186
0a6857e7 2187 iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY
2188 ieee80211_get_hdrlen(fc));
2189
6440adb5 2190 /* Set up entry for this TFD in Tx byte-count array */
e2a722eb 2191 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, len);
b481de9c 2192
6440adb5 2193 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 2194 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 2195 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
2196 spin_unlock_irqrestore(&priv->lock, flags);
2197
2198 if (rc)
2199 return rc;
2200
bb8c093b 2201 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY
2202 && priv->mac80211_registered) {
2203 if (wait_write_ptr) {
2204 spin_lock_irqsave(&priv->lock, flags);
2205 txq->need_update = 1;
bb8c093b 2206 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
2207 spin_unlock_irqrestore(&priv->lock, flags);
2208 }
2209
2210 ieee80211_stop_queue(priv->hw, ctl->queue);
2211 }
2212
2213 return 0;
2214
2215drop_unlock:
2216 spin_unlock_irqrestore(&priv->lock, flags);
2217drop:
2218 return -1;
2219}
2220
c79dd5b5 2221static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 2222{
8318d78a 2223 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
2224 struct ieee80211_rate *rate;
2225 int i;
2226
d1141dfb 2227 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
2228 if (!hw) {
2229 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2230 return;
2231 }
b481de9c
ZY
2232
2233 priv->active_rate = 0;
2234 priv->active_rate_basic = 0;
2235
8318d78a
JB
2236 for (i = 0; i < hw->n_bitrates; i++) {
2237 rate = &(hw->bitrates[i]);
2238 if (rate->hw_value < IWL_RATE_COUNT)
2239 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
2240 }
2241
2242 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2243 priv->active_rate, priv->active_rate_basic);
2244
2245 /*
2246 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2247 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2248 * OFDM
2249 */
2250 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2251 priv->staging_rxon.cck_basic_rates =
2252 ((priv->active_rate_basic &
2253 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2254 else
2255 priv->staging_rxon.cck_basic_rates =
2256 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2257
2258 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2259 priv->staging_rxon.ofdm_basic_rates =
2260 ((priv->active_rate_basic &
2261 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2262 IWL_FIRST_OFDM_RATE) & 0xFF;
2263 else
2264 priv->staging_rxon.ofdm_basic_rates =
2265 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2266}
2267
ad97edd2 2268void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY
2269{
2270 unsigned long flags;
2271
2272 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2273 return;
2274
2275 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2276 disable_radio ? "OFF" : "ON");
2277
2278 if (disable_radio) {
bb8c093b 2279 iwl4965_scan_cancel(priv);
b481de9c
ZY
2280 /* FIXME: This is a workaround for AP */
2281 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2282 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2283 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
2284 CSR_UCODE_SW_BIT_RFKILL);
2285 spin_unlock_irqrestore(&priv->lock, flags);
ad97edd2 2286 /* call the host command only if no hw rf-kill set */
59003835
MA
2287 if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
2288 iwl_is_ready(priv))
ad97edd2
MA
2289 iwl4965_send_card_state(priv,
2290 CARD_STATE_CMD_DISABLE,
2291 0);
b481de9c 2292 set_bit(STATUS_RF_KILL_SW, &priv->status);
ad97edd2
MA
2293
2294 /* make sure mac80211 stop sending Tx frame */
2295 if (priv->mac80211_registered)
2296 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2297 }
2298 return;
2299 }
2300
2301 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2302 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2303
2304 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2305 spin_unlock_irqrestore(&priv->lock, flags);
2306
2307 /* wake up ucode */
2308 msleep(10);
2309
2310 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
2311 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2312 if (!iwl_grab_nic_access(priv))
2313 iwl_release_nic_access(priv);
b481de9c
ZY
2314 spin_unlock_irqrestore(&priv->lock, flags);
2315
2316 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2317 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2318 "disabled by HW switch\n");
2319 return;
2320 }
2321
2322 queue_work(priv->workqueue, &priv->restart);
2323 return;
2324}
2325
b481de9c
ZY
2326#define IWL_PACKET_RETRY_TIME HZ
2327
c79dd5b5 2328int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY
2329{
2330 u16 sc = le16_to_cpu(header->seq_ctrl);
2331 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2332 u16 frag = sc & IEEE80211_SCTL_FRAG;
2333 u16 *last_seq, *last_frag;
2334 unsigned long *last_time;
2335
2336 switch (priv->iw_mode) {
2337 case IEEE80211_IF_TYPE_IBSS:{
2338 struct list_head *p;
bb8c093b 2339 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY
2340 u8 *mac = header->addr2;
2341 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2342
2343 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 2344 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY
2345 if (!compare_ether_addr(entry->mac, mac))
2346 break;
2347 }
2348 if (p == &priv->ibss_mac_hash[index]) {
2349 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2350 if (!entry) {
bc434dd2 2351 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY
2352 return 0;
2353 }
2354 memcpy(entry->mac, mac, ETH_ALEN);
2355 entry->seq_num = seq;
2356 entry->frag_num = frag;
2357 entry->packet_time = jiffies;
bc434dd2 2358 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY
2359 return 0;
2360 }
2361 last_seq = &entry->seq_num;
2362 last_frag = &entry->frag_num;
2363 last_time = &entry->packet_time;
2364 break;
2365 }
2366 case IEEE80211_IF_TYPE_STA:
2367 last_seq = &priv->last_seq_num;
2368 last_frag = &priv->last_frag_num;
2369 last_time = &priv->last_packet_time;
2370 break;
2371 default:
2372 return 0;
2373 }
2374 if ((*last_seq == seq) &&
2375 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2376 if (*last_frag == frag)
2377 goto drop;
2378 if (*last_frag + 1 != frag)
2379 /* out-of-order fragment */
2380 goto drop;
2381 } else
2382 *last_seq = seq;
2383
2384 *last_frag = frag;
2385 *last_time = jiffies;
2386 return 0;
2387
2388 drop:
2389 return 1;
2390}
2391
c8b0e6e1 2392#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
2393
2394#include "iwl-spectrum.h"
2395
2396#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2397#define BEACON_TIME_MASK_HIGH 0xFF000000
2398#define TIME_UNIT 1024
2399
2400/*
2401 * extended beacon time format
2402 * time in usec will be changed into a 32-bit value in 8:24 format
2403 * the high 1 byte is the beacon counts
2404 * the lower 3 bytes is the time in usec within one beacon interval
2405 */
2406
bb8c093b 2407static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
2408{
2409 u32 quot;
2410 u32 rem;
2411 u32 interval = beacon_interval * 1024;
2412
2413 if (!interval || !usec)
2414 return 0;
2415
2416 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2417 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2418
2419 return (quot << 24) + rem;
2420}
2421
2422/* base is usually what we get from ucode with each received frame,
2423 * the same as HW timer counter counting down
2424 */
2425
bb8c093b 2426static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
2427{
2428 u32 base_low = base & BEACON_TIME_MASK_LOW;
2429 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2430 u32 interval = beacon_interval * TIME_UNIT;
2431 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2432 (addon & BEACON_TIME_MASK_HIGH);
2433
2434 if (base_low > addon_low)
2435 res += base_low - addon_low;
2436 else if (base_low < addon_low) {
2437 res += interval + base_low - addon_low;
2438 res += (1 << 24);
2439 } else
2440 res += (1 << 24);
2441
2442 return cpu_to_le32(res);
2443}
2444
c79dd5b5 2445static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
2446 struct ieee80211_measurement_params *params,
2447 u8 type)
2448{
bb8c093b
CH
2449 struct iwl4965_spectrum_cmd spectrum;
2450 struct iwl4965_rx_packet *res;
857485c0 2451 struct iwl_host_cmd cmd = {
b481de9c
ZY
2452 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2453 .data = (void *)&spectrum,
2454 .meta.flags = CMD_WANT_SKB,
2455 };
2456 u32 add_time = le64_to_cpu(params->start_time);
2457 int rc;
2458 int spectrum_resp_status;
2459 int duration = le16_to_cpu(params->duration);
2460
3109ece1 2461 if (iwl_is_associated(priv))
b481de9c 2462 add_time =
bb8c093b 2463 iwl4965_usecs_to_beacons(
b481de9c
ZY
2464 le64_to_cpu(params->start_time) - priv->last_tsf,
2465 le16_to_cpu(priv->rxon_timing.beacon_interval));
2466
2467 memset(&spectrum, 0, sizeof(spectrum));
2468
2469 spectrum.channel_count = cpu_to_le16(1);
2470 spectrum.flags =
2471 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2472 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2473 cmd.len = sizeof(spectrum);
2474 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2475
3109ece1 2476 if (iwl_is_associated(priv))
b481de9c 2477 spectrum.start_time =
bb8c093b 2478 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
2479 add_time,
2480 le16_to_cpu(priv->rxon_timing.beacon_interval));
2481 else
2482 spectrum.start_time = 0;
2483
2484 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2485 spectrum.channels[0].channel = params->channel;
2486 spectrum.channels[0].type = type;
2487 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2488 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2489 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2490
857485c0 2491 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
2492 if (rc)
2493 return rc;
2494
bb8c093b 2495 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
2496 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2497 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2498 rc = -EIO;
2499 }
2500
2501 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2502 switch (spectrum_resp_status) {
2503 case 0: /* Command will be handled */
2504 if (res->u.spectrum.id != 0xff) {
2505 IWL_DEBUG_INFO
2506 ("Replaced existing measurement: %d\n",
2507 res->u.spectrum.id);
2508 priv->measurement_status &= ~MEASUREMENT_READY;
2509 }
2510 priv->measurement_status |= MEASUREMENT_ACTIVE;
2511 rc = 0;
2512 break;
2513
2514 case 1: /* Command will not be handled */
2515 rc = -EAGAIN;
2516 break;
2517 }
2518
2519 dev_kfree_skb_any(cmd.meta.u.skb);
2520
2521 return rc;
2522}
2523#endif
2524
c79dd5b5 2525static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
bb8c093b 2526 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY
2527{
2528
2529 tx_sta->status.ack_signal = 0;
2530 tx_sta->status.excessive_retries = 0;
2531 tx_sta->status.queue_length = 0;
2532 tx_sta->status.queue_number = 0;
2533
2534 if (in_interrupt())
2535 ieee80211_tx_status_irqsafe(priv->hw,
2536 tx_sta->skb[0], &(tx_sta->status));
2537 else
2538 ieee80211_tx_status(priv->hw,
2539 tx_sta->skb[0], &(tx_sta->status));
2540
2541 tx_sta->skb[0] = NULL;
2542}
2543
2544/**
6440adb5 2545 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 2546 *
6440adb5
CB
2547 * When FW advances 'R' index, all entries between old and new 'R' index
2548 * need to be reclaimed. As result, some free space forms. If there is
2549 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 2550 */
c79dd5b5 2551int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
b481de9c 2552{
bb8c093b
CH
2553 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
2554 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY
2555 int nfreed = 0;
2556
2557 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
2558 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
2559 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 2560 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY
2561 return 0;
2562 }
2563
c54b679d 2564 for (index = iwl_queue_inc_wrap(index, q->n_bd);
fc4b6853 2565 q->read_ptr != index;
c54b679d 2566 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 2567 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 2568 iwl4965_txstatus_to_ieee(priv,
fc4b6853 2569 &(txq->txb[txq->q.read_ptr]));
bb8c093b 2570 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY
2571 } else if (nfreed > 1) {
2572 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 2573 q->write_ptr, q->read_ptr);
b481de9c
ZY
2574 queue_work(priv->workqueue, &priv->restart);
2575 }
2576 nfreed++;
2577 }
2578
fe01b477 2579/* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY
2580 (txq_id != IWL_CMD_QUEUE_NUM) &&
2581 priv->mac80211_registered)
fe01b477 2582 ieee80211_wake_queue(priv->hw, txq_id); */
b481de9c
ZY
2583
2584
2585 return nfreed;
2586}
2587
bb8c093b 2588static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY
2589{
2590 status &= TX_STATUS_MSK;
2591 return (status == TX_STATUS_SUCCESS)
2592 || (status == TX_STATUS_DIRECT_DONE);
2593}
2594
2595/******************************************************************************
2596 *
2597 * Generic RX handler implementations
2598 *
2599 ******************************************************************************/
c8b0e6e1 2600#ifdef CONFIG_IWL4965_HT
b481de9c 2601
c79dd5b5 2602static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
b481de9c
ZY
2603 struct ieee80211_hdr *hdr)
2604{
2605 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
2606 return IWL_AP_ID;
2607 else {
2608 u8 *da = ieee80211_get_DA(hdr);
947b13a7 2609 return iwl_find_station(priv, da);
b481de9c
ZY
2610 }
2611}
2612
bb8c093b 2613static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
c79dd5b5 2614 struct iwl_priv *priv, int txq_id, int idx)
b481de9c
ZY
2615{
2616 if (priv->txq[txq_id].txb[idx].skb[0])
2617 return (struct ieee80211_hdr *)priv->txq[txq_id].
2618 txb[idx].skb[0]->data;
2619 return NULL;
2620}
2621
bb8c093b 2622static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY
2623{
2624 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
2625 tx_resp->frame_count);
2626 return le32_to_cpu(*scd_ssn) & MAX_SN;
2627
2628}
6440adb5
CB
2629
2630/**
2631 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2632 */
c79dd5b5 2633static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
bb8c093b 2634 struct iwl4965_ht_agg *agg,
fe01b477 2635 struct iwl4965_tx_resp_agg *tx_resp,
b481de9c
ZY
2636 u16 start_idx)
2637{
fe01b477
RR
2638 u16 status;
2639 struct agg_tx_status *frame_status = &tx_resp->status;
b481de9c
ZY
2640 struct ieee80211_tx_status *tx_status = NULL;
2641 struct ieee80211_hdr *hdr = NULL;
2642 int i, sh;
2643 int txq_id, idx;
2644 u16 seq;
2645
2646 if (agg->wait_for_ba)
6440adb5 2647 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY
2648
2649 agg->frame_count = tx_resp->frame_count;
2650 agg->start_idx = start_idx;
2651 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 2652 agg->bitmap = 0;
b481de9c 2653
6440adb5 2654 /* # frames attempted by Tx command */
b481de9c 2655 if (agg->frame_count == 1) {
6440adb5 2656 /* Only one frame was attempted; no block-ack will arrive */
fe01b477
RR
2657 status = le16_to_cpu(frame_status[0].status);
2658 seq = le16_to_cpu(frame_status[0].sequence);
2659 idx = SEQ_TO_INDEX(seq);
2660 txq_id = SEQ_TO_QUEUE(seq);
b481de9c 2661
b481de9c 2662 /* FIXME: code repetition */
fe01b477
RR
2663 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2664 agg->frame_count, agg->start_idx, idx);
b481de9c 2665
fe01b477 2666 tx_status = &(priv->txq[txq_id].txb[idx].status);
b481de9c
ZY
2667 tx_status->retry_count = tx_resp->failure_frame;
2668 tx_status->queue_number = status & 0xff;
fe01b477
RR
2669 tx_status->queue_length = tx_resp->failure_rts;
2670 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
bb8c093b 2671 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c 2672 IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR
2673 iwl4965_hwrate_to_tx_control(priv,
2674 le32_to_cpu(tx_resp->rate_n_flags),
2675 &tx_status->control);
b481de9c
ZY
2676 /* FIXME: code repetition end */
2677
2678 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2679 status & 0xff, tx_resp->failure_frame);
2680 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 2681 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY
2682
2683 agg->wait_for_ba = 0;
2684 } else {
6440adb5 2685 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY
2686 u64 bitmap = 0;
2687 int start = agg->start_idx;
2688
6440adb5 2689 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY
2690 for (i = 0; i < agg->frame_count; i++) {
2691 u16 sc;
fe01b477
RR
2692 status = le16_to_cpu(frame_status[i].status);
2693 seq = le16_to_cpu(frame_status[i].sequence);
b481de9c
ZY
2694 idx = SEQ_TO_INDEX(seq);
2695 txq_id = SEQ_TO_QUEUE(seq);
2696
2697 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2698 AGG_TX_STATE_ABORT_MSK))
2699 continue;
2700
2701 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2702 agg->frame_count, txq_id, idx);
2703
bb8c093b 2704 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY
2705
2706 sc = le16_to_cpu(hdr->seq_ctrl);
2707 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2708 IWL_ERROR("BUG_ON idx doesn't match seq control"
2709 " idx=%d, seq_idx=%d, seq=%d\n",
2710 idx, SEQ_TO_SN(sc),
2711 hdr->seq_ctrl);
2712 return -1;
2713 }
2714
2715 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2716 i, idx, SEQ_TO_SN(sc));
2717
2718 sh = idx - start;
2719 if (sh > 64) {
2720 sh = (start - idx) + 0xff;
2721 bitmap = bitmap << sh;
2722 sh = 0;
2723 start = idx;
2724 } else if (sh < -64)
2725 sh = 0xff - (start - idx);
2726 else if (sh < 0) {
2727 sh = start - idx;
2728 start = idx;
2729 bitmap = bitmap << sh;
2730 sh = 0;
2731 }
2732 bitmap |= (1 << sh);
2733 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
2734 start, (u32)(bitmap & 0xFFFFFFFF));
2735 }
2736
fe01b477 2737 agg->bitmap = bitmap;
b481de9c
ZY
2738 agg->start_idx = start;
2739 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 2740 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
b481de9c 2741 agg->frame_count, agg->start_idx,
06501d29 2742 (unsigned long long)agg->bitmap);
b481de9c
ZY
2743
2744 if (bitmap)
2745 agg->wait_for_ba = 1;
2746 }
2747 return 0;
2748}
2749#endif
b481de9c 2750
6440adb5
CB
2751/**
2752 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2753 */
c79dd5b5 2754static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
bb8c093b 2755 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2756{
bb8c093b 2757 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
2758 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2759 int txq_id = SEQ_TO_QUEUE(sequence);
2760 int index = SEQ_TO_INDEX(sequence);
bb8c093b 2761 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 2762 struct ieee80211_tx_status *tx_status;
bb8c093b 2763 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 2764 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1 2765#ifdef CONFIG_IWL4965_HT
fe01b477
RR
2766 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
2767 struct ieee80211_hdr *hdr;
2768 __le16 *qc;
b481de9c
ZY
2769#endif
2770
2771 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
2772 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2773 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW
2774 index, txq->q.n_bd, txq->q.write_ptr,
2775 txq->q.read_ptr);
b481de9c
ZY
2776 return;
2777 }
2778
c8b0e6e1 2779#ifdef CONFIG_IWL4965_HT
fe01b477
RR
2780 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
2781 qc = ieee80211_get_qos_ctrl(hdr);
2782
2783 if (qc)
2784 tid = le16_to_cpu(*qc) & 0xf;
2785
2786 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
2787 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2788 IWL_ERROR("Station not known\n");
2789 return;
2790 }
2791
b481de9c 2792 if (txq->sched_retry) {
bb8c093b 2793 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
bb8c093b 2794 struct iwl4965_ht_agg *agg = NULL;
b481de9c 2795
fe01b477 2796 if (!qc)
b481de9c 2797 return;
b481de9c
ZY
2798
2799 agg = &priv->stations[sta_id].tid[tid].agg;
2800
fe01b477
RR
2801 iwl4965_tx_status_reply_tx(priv, agg,
2802 (struct iwl4965_tx_resp_agg *)tx_resp, index);
b481de9c
ZY
2803
2804 if ((tx_resp->frame_count == 1) &&
bb8c093b 2805 !iwl4965_is_tx_success(status)) {
b481de9c
ZY
2806 /* TODO: send BAR */
2807 }
2808
fe01b477
RR
2809 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2810 int freed;
c54b679d 2811 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY
2812 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2813 "%d index %d\n", scd_ssn , index);
fe01b477
RR
2814 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
2815 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2816
2817 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
2818 txq_id >= 0 && priv->mac80211_registered &&
2819 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
2820 ieee80211_wake_queue(priv->hw, txq_id);
2821
2822 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
b481de9c
ZY
2823 }
2824 } else {
c8b0e6e1 2825#endif /* CONFIG_IWL4965_HT */
fc4b6853 2826 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY
2827
2828 tx_status->retry_count = tx_resp->failure_frame;
2829 tx_status->queue_number = status;
2830 tx_status->queue_length = tx_resp->bt_kill_count;
2831 tx_status->queue_length |= tx_resp->failure_rts;
b481de9c 2832 tx_status->flags =
bb8c093b 2833 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR
2834 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
2835 &tx_status->control);
b481de9c 2836
b481de9c 2837 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 2838 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY
2839 status, le32_to_cpu(tx_resp->rate_n_flags),
2840 tx_resp->failure_frame);
2841
2842 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
fe01b477
RR
2843 if (index != -1) {
2844 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
2845#ifdef CONFIG_IWL4965_HT
2846 if (tid != MAX_TID_COUNT)
2847 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2848 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
2849 (txq_id >= 0) &&
2850 priv->mac80211_registered)
2851 ieee80211_wake_queue(priv->hw, txq_id);
2852 if (tid != MAX_TID_COUNT)
2853 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
2854#endif
2855 }
c8b0e6e1 2856#ifdef CONFIG_IWL4965_HT
b481de9c 2857 }
c8b0e6e1 2858#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY
2859
2860 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2861 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
2862}
2863
2864
c79dd5b5 2865static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
bb8c093b 2866 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2867{
bb8c093b
CH
2868 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2869 struct iwl4965_alive_resp *palive;
b481de9c
ZY
2870 struct delayed_work *pwork;
2871
2872 palive = &pkt->u.alive_frame;
2873
2874 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2875 "0x%01X 0x%01X\n",
2876 palive->is_valid, palive->ver_type,
2877 palive->ver_subtype);
2878
2879 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2880 IWL_DEBUG_INFO("Initialization Alive received.\n");
2881 memcpy(&priv->card_alive_init,
2882 &pkt->u.alive_frame,
bb8c093b 2883 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY
2884 pwork = &priv->init_alive_start;
2885 } else {
2886 IWL_DEBUG_INFO("Runtime Alive received.\n");
2887 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 2888 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY
2889 pwork = &priv->alive_start;
2890 }
2891
2892 /* We delay the ALIVE response by 5ms to
2893 * give the HW RF Kill time to activate... */
2894 if (palive->is_valid == UCODE_VALID_OK)
2895 queue_delayed_work(priv->workqueue, pwork,
2896 msecs_to_jiffies(5));
2897 else
2898 IWL_WARNING("uCode did not respond OK.\n");
2899}
2900
c79dd5b5 2901static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
bb8c093b 2902 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2903{
bb8c093b 2904 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
2905
2906 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2907 return;
2908}
2909
c79dd5b5 2910static void iwl4965_rx_reply_error(struct iwl_priv *priv,
bb8c093b 2911 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2912{
bb8c093b 2913 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
2914
2915 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
2916 "seq 0x%04X ser 0x%08X\n",
2917 le32_to_cpu(pkt->u.err_resp.error_type),
2918 get_cmd_string(pkt->u.err_resp.cmd_id),
2919 pkt->u.err_resp.cmd_id,
2920 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2921 le32_to_cpu(pkt->u.err_resp.error_info));
2922}
2923
2924#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2925
c79dd5b5 2926static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2927{
bb8c093b
CH
2928 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2929 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
2930 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
2931 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2932 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2933 rxon->channel = csa->channel;
2934 priv->staging_rxon.channel = csa->channel;
2935}
2936
c79dd5b5 2937static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
bb8c093b 2938 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2939{
c8b0e6e1 2940#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH
2941 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2942 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
2943
2944 if (!report->state) {
2945 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2946 "Spectrum Measure Notification: Start\n");
2947 return;
2948 }
2949
2950 memcpy(&priv->measure_report, report, sizeof(*report));
2951 priv->measurement_status |= MEASUREMENT_READY;
2952#endif
2953}
2954
c79dd5b5 2955static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
bb8c093b 2956 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2957{
0a6857e7 2958#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH
2959 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2960 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
2961 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2962 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2963#endif
2964}
2965
c79dd5b5 2966static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
bb8c093b 2967 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2968{
bb8c093b 2969 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
2970 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2971 "notification for %s:\n",
2972 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
0a6857e7 2973 iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
2974}
2975
bb8c093b 2976static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 2977{
c79dd5b5
TW
2978 struct iwl_priv *priv =
2979 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
2980 struct sk_buff *beacon;
2981
2982 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
32bfd35d 2983 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
b481de9c
ZY
2984
2985 if (!beacon) {
2986 IWL_ERROR("update beacon failed\n");
2987 return;
2988 }
2989
2990 mutex_lock(&priv->mutex);
2991 /* new beacon skb is allocated every time; dispose previous.*/
2992 if (priv->ibss_beacon)
2993 dev_kfree_skb(priv->ibss_beacon);
2994
2995 priv->ibss_beacon = beacon;
2996 mutex_unlock(&priv->mutex);
2997
bb8c093b 2998 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2999}
3000
c79dd5b5 3001static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
bb8c093b 3002 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3003{
0a6857e7 3004#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH
3005 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3006 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3007 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
3008
3009 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3010 "tsf %d %d rate %d\n",
3011 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3012 beacon->beacon_notify_hdr.failure_frame,
3013 le32_to_cpu(beacon->ibss_mgr_status),
3014 le32_to_cpu(beacon->high_tsf),
3015 le32_to_cpu(beacon->low_tsf), rate);
3016#endif
3017
3018 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3019 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3020 queue_work(priv->workqueue, &priv->beacon_update);
3021}
3022
3023/* Service response to REPLY_SCAN_CMD (0x80) */
c79dd5b5 3024static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
bb8c093b 3025 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3026{
0a6857e7 3027#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH
3028 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3029 struct iwl4965_scanreq_notification *notif =
3030 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY
3031
3032 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3033#endif
3034}
3035
3036/* Service SCAN_START_NOTIFICATION (0x82) */
c79dd5b5 3037static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
bb8c093b 3038 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3039{
bb8c093b
CH
3040 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3041 struct iwl4965_scanstart_notification *notif =
3042 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY
3043 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3044 IWL_DEBUG_SCAN("Scan start: "
3045 "%d [802.11%s] "
3046 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3047 notif->channel,
3048 notif->band ? "bg" : "a",
3049 notif->tsf_high,
3050 notif->tsf_low, notif->status, notif->beacon_timer);
3051}
3052
3053/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
c79dd5b5 3054static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
bb8c093b 3055 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3056{
bb8c093b
CH
3057 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3058 struct iwl4965_scanresults_notification *notif =
3059 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY
3060
3061 IWL_DEBUG_SCAN("Scan ch.res: "
3062 "%d [802.11%s] "
3063 "(TSF: 0x%08X:%08X) - %d "
3064 "elapsed=%lu usec (%dms since last)\n",
3065 notif->channel,
3066 notif->band ? "bg" : "a",
3067 le32_to_cpu(notif->tsf_high),
3068 le32_to_cpu(notif->tsf_low),
3069 le32_to_cpu(notif->statistics[0]),
3070 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3071 jiffies_to_msecs(elapsed_jiffies
3072 (priv->last_scan_jiffies, jiffies)));
3073
3074 priv->last_scan_jiffies = jiffies;
7878a5a4 3075 priv->next_scan_jiffies = 0;
b481de9c
ZY
3076}
3077
3078/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
c79dd5b5 3079static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
bb8c093b 3080 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3081{
bb8c093b
CH
3082 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3083 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY
3084
3085 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3086 scan_notif->scanned_channels,
3087 scan_notif->tsf_low,
3088 scan_notif->tsf_high, scan_notif->status);
3089
3090 /* The HW is no longer scanning */
3091 clear_bit(STATUS_SCAN_HW, &priv->status);
3092
3093 /* The scan completion notification came in, so kill that timer... */
3094 cancel_delayed_work(&priv->scan_check);
3095
3096 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3097 (priv->scan_bands == 2) ? "2.4" : "5.2",
3098 jiffies_to_msecs(elapsed_jiffies
3099 (priv->scan_pass_start, jiffies)));
3100
3101 /* Remove this scanned band from the list
3102 * of pending bands to scan */
3103 priv->scan_bands--;
3104
3105 /* If a request to abort was given, or the scan did not succeed
3106 * then we reset the scan state machine and terminate,
3107 * re-queuing another scan if one has been requested */
3108 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3109 IWL_DEBUG_INFO("Aborted scan completed.\n");
3110 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3111 } else {
3112 /* If there are more bands on this scan pass reschedule */
3113 if (priv->scan_bands > 0)
3114 goto reschedule;
3115 }
3116
3117 priv->last_scan_jiffies = jiffies;
7878a5a4 3118 priv->next_scan_jiffies = 0;
b481de9c
ZY
3119 IWL_DEBUG_INFO("Setting scan to off\n");
3120
3121 clear_bit(STATUS_SCANNING, &priv->status);
3122
3123 IWL_DEBUG_INFO("Scan took %dms\n",
3124 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3125
3126 queue_work(priv->workqueue, &priv->scan_completed);
3127
3128 return;
3129
3130reschedule:
3131 priv->scan_pass_start = jiffies;
3132 queue_work(priv->workqueue, &priv->request_scan);
3133}
3134
3135/* Handle notification from uCode that card's power state is changing
3136 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 3137static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
bb8c093b 3138 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3139{
bb8c093b 3140 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
3141 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3142 unsigned long status = priv->status;
3143
3144 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3145 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3146 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3147
3148 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3149 RF_CARD_DISABLED)) {
3150
3395f6e9 3151 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
3152 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3153
3395f6e9
TW
3154 if (!iwl_grab_nic_access(priv)) {
3155 iwl_write_direct32(
b481de9c
ZY
3156 priv, HBUS_TARG_MBX_C,
3157 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3158
3395f6e9 3159 iwl_release_nic_access(priv);
b481de9c
ZY
3160 }
3161
3162 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 3163 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 3164 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
3165 if (!iwl_grab_nic_access(priv)) {
3166 iwl_write_direct32(
b481de9c
ZY
3167 priv, HBUS_TARG_MBX_C,
3168 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3169
3395f6e9 3170 iwl_release_nic_access(priv);
b481de9c
ZY
3171 }
3172 }
3173
3174 if (flags & RF_CARD_DISABLED) {
3395f6e9 3175 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 3176 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
3177 iwl_read32(priv, CSR_UCODE_DRV_GP1);
3178 if (!iwl_grab_nic_access(priv))
3179 iwl_release_nic_access(priv);
b481de9c
ZY
3180 }
3181 }
3182
3183 if (flags & HW_CARD_DISABLED)
3184 set_bit(STATUS_RF_KILL_HW, &priv->status);
3185 else
3186 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3187
3188
3189 if (flags & SW_CARD_DISABLED)
3190 set_bit(STATUS_RF_KILL_SW, &priv->status);
3191 else
3192 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3193
3194 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 3195 iwl4965_scan_cancel(priv);
b481de9c
ZY
3196
3197 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3198 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3199 (test_bit(STATUS_RF_KILL_SW, &status) !=
3200 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3201 queue_work(priv->workqueue, &priv->rf_kill);
3202 else
3203 wake_up_interruptible(&priv->wait_command_queue);
3204}
3205
3206/**
bb8c093b 3207 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
3208 *
3209 * Setup the RX handlers for each of the reply types sent from the uCode
3210 * to the host.
3211 *
3212 * This function chains into the hardware specific files for them to setup
3213 * any hardware specific handlers as well.
3214 */
c79dd5b5 3215static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 3216{
bb8c093b
CH
3217 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
3218 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
3219 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
3220 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 3221 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
3222 iwl4965_rx_spectrum_measure_notif;
3223 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 3224 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
3225 iwl4965_rx_pm_debug_statistics_notif;
3226 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 3227
9fbab516
BC
3228 /*
3229 * The same handler is used for both the REPLY to a discrete
3230 * statistics request from the host as well as for the periodic
3231 * statistics notifications (after received beacons) from the uCode.
b481de9c 3232 */
bb8c093b
CH
3233 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
3234 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 3235
bb8c093b
CH
3236 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
3237 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 3238 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 3239 iwl4965_rx_scan_results_notif;
b481de9c 3240 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH
3241 iwl4965_rx_scan_complete_notif;
3242 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
3243 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 3244
9fbab516 3245 /* Set up hardware specific Rx handlers */
bb8c093b 3246 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY
3247}
3248
3249/**
bb8c093b 3250 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY
3251 * @rxb: Rx buffer to reclaim
3252 *
3253 * If an Rx buffer has an async callback associated with it the callback
3254 * will be executed. The attached skb (if present) will only be freed
3255 * if the callback returns 1
3256 */
c79dd5b5 3257static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
bb8c093b 3258 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3259{
bb8c093b 3260 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY
3261 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3262 int txq_id = SEQ_TO_QUEUE(sequence);
3263 int index = SEQ_TO_INDEX(sequence);
3264 int huge = sequence & SEQ_HUGE_FRAME;
3265 int cmd_index;
857485c0 3266 struct iwl_cmd *cmd;
b481de9c
ZY
3267
3268 /* If a Tx command is being handled and it isn't in the actual
3269 * command queue then there a command routing bug has been introduced
3270 * in the queue management code. */
3271 if (txq_id != IWL_CMD_QUEUE_NUM)
3272 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3273 txq_id, pkt->hdr.cmd);
3274 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3275
3276 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3277 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3278
3279 /* Input error checking is done when commands are added to queue. */
3280 if (cmd->meta.flags & CMD_WANT_SKB) {
3281 cmd->meta.source->u.skb = rxb->skb;
3282 rxb->skb = NULL;
3283 } else if (cmd->meta.u.callback &&
3284 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3285 rxb->skb = NULL;
3286
bb8c093b 3287 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY
3288
3289 if (!(cmd->meta.flags & CMD_ASYNC)) {
3290 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3291 wake_up_interruptible(&priv->wait_command_queue);
3292 }
3293}
3294
3295/************************** RX-FUNCTIONS ****************************/
3296/*
3297 * Rx theory of operation
3298 *
9fbab516
BC
3299 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
3300 * each of which point to Receive Buffers to be filled by 4965. These get
3301 * used not only for Rx frames, but for any command response or notification
3302 * from the 4965. The driver and 4965 manage the Rx buffers by means
3303 * of indexes into the circular buffer.
b481de9c
ZY
3304 *
3305 * Rx Queue Indexes
3306 * The host/firmware share two index registers for managing the Rx buffers.
3307 *
3308 * The READ index maps to the first position that the firmware may be writing
3309 * to -- the driver can read up to (but not including) this position and get
3310 * good data.
3311 * The READ index is managed by the firmware once the card is enabled.
3312 *
3313 * The WRITE index maps to the last position the driver has read from -- the
3314 * position preceding WRITE is the last slot the firmware can place a packet.
3315 *
3316 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3317 * WRITE = READ.
3318 *
9fbab516 3319 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
3320 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3321 *
9fbab516 3322 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
3323 * and fire the RX interrupt. The driver can then query the READ index and
3324 * process as many packets as possible, moving the WRITE index forward as it
3325 * resets the Rx queue buffers with new memory.
3326 *
3327 * The management in the driver is as follows:
3328 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3329 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 3330 * to replenish the iwl->rxq->rx_free.
bb8c093b 3331 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
3332 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3333 * 'processed' and 'read' driver indexes as well)
3334 * + A received packet is processed and handed to the kernel network stack,
3335 * detached from the iwl->rxq. The driver 'processed' index is updated.
3336 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3337 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3338 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3339 * were enough free buffers and RX_STALLED is set it is cleared.
3340 *
3341 *
3342 * Driver sequence:
3343 *
9fbab516
BC
3344 * iwl4965_rx_queue_alloc() Allocates rx_free
3345 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 3346 * iwl4965_rx_queue_restock
9fbab516 3347 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
3348 * queue, updates firmware pointers, and updates
3349 * the WRITE index. If insufficient rx_free buffers
bb8c093b 3350 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY
3351 *
3352 * -- enable interrupts --
9fbab516 3353 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY
3354 * READ INDEX, detaching the SKB from the pool.
3355 * Moves the packet buffer from queue to rx_used.
bb8c093b 3356 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY
3357 * slots.
3358 * ...
3359 *
3360 */
3361
3362/**
bb8c093b 3363 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 3364 */
bb8c093b 3365static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY
3366{
3367 int s = q->read - q->write;
3368 if (s <= 0)
3369 s += RX_QUEUE_SIZE;
3370 /* keep some buffer to not confuse full and empty queue */
3371 s -= 2;
3372 if (s < 0)
3373 s = 0;
3374 return s;
3375}
3376
3377/**
bb8c093b 3378 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 3379 */
c79dd5b5 3380int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY
3381{
3382 u32 reg = 0;
3383 int rc = 0;
3384 unsigned long flags;
3385
3386 spin_lock_irqsave(&q->lock, flags);
3387
3388 if (q->need_update == 0)
3389 goto exit_unlock;
3390
6440adb5 3391 /* If power-saving is in use, make sure device is awake */
b481de9c 3392 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3395f6e9 3393 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY
3394
3395 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3395f6e9 3396 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY
3397 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3398 goto exit_unlock;
3399 }
3400
3395f6e9 3401 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
3402 if (rc)
3403 goto exit_unlock;
3404
6440adb5 3405 /* Device expects a multiple of 8 */
3395f6e9 3406 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 3407 q->write & ~0x7);
3395f6e9 3408 iwl_release_nic_access(priv);
6440adb5
CB
3409
3410 /* Else device is assumed to be awake */
b481de9c 3411 } else
6440adb5 3412 /* Device expects a multiple of 8 */
3395f6e9 3413 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY
3414
3415
3416 q->need_update = 0;
3417
3418 exit_unlock:
3419 spin_unlock_irqrestore(&q->lock, flags);
3420 return rc;
3421}
3422
3423/**
9fbab516 3424 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 3425 */
c79dd5b5 3426static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
3427 dma_addr_t dma_addr)
3428{
3429 return cpu_to_le32((u32)(dma_addr >> 8));
3430}
3431
3432
3433/**
bb8c093b 3434 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 3435 *
9fbab516 3436 * If there are slots in the RX queue that need to be restocked,
b481de9c 3437 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 3438 * as we can, pulling from rx_free.
b481de9c
ZY
3439 *
3440 * This moves the 'write' index forward to catch up with 'processed', and
3441 * also updates the memory address in the firmware to reference the new
3442 * target buffer.
3443 */
c79dd5b5 3444static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
b481de9c 3445{
bb8c093b 3446 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3447 struct list_head *element;
bb8c093b 3448 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY
3449 unsigned long flags;
3450 int write, rc;
3451
3452 spin_lock_irqsave(&rxq->lock, flags);
3453 write = rxq->write & ~0x7;
bb8c093b 3454 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 3455 /* Get next free Rx buffer, remove from free list */
b481de9c 3456 element = rxq->rx_free.next;
bb8c093b 3457 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 3458 list_del(element);
6440adb5
CB
3459
3460 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 3461 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY
3462 rxq->queue[rxq->write] = rxb;
3463 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3464 rxq->free_count--;
3465 }
3466 spin_unlock_irqrestore(&rxq->lock, flags);
3467 /* If the pre-allocated buffer pool is dropping low, schedule to
3468 * refill it */
3469 if (rxq->free_count <= RX_LOW_WATERMARK)
3470 queue_work(priv->workqueue, &priv->rx_replenish);
3471
3472
6440adb5
CB
3473 /* If we've added more space for the firmware to place data, tell it.
3474 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
3475 if ((write != (rxq->write & ~0x7))
3476 || (abs(rxq->write - rxq->read) > 7)) {
3477 spin_lock_irqsave(&rxq->lock, flags);
3478 rxq->need_update = 1;
3479 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 3480 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
3481 if (rc)
3482 return rc;
3483 }
3484
3485 return 0;
3486}
3487
3488/**
bb8c093b 3489 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
3490 *
3491 * When moving to rx_free an SKB is allocated for the slot.
3492 *
bb8c093b 3493 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 3494 * This is called as a scheduled work item (except for during initialization)
b481de9c 3495 */
c79dd5b5 3496static void iwl4965_rx_allocate(struct iwl_priv *priv)
b481de9c 3497{
bb8c093b 3498 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3499 struct list_head *element;
bb8c093b 3500 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY
3501 unsigned long flags;
3502 spin_lock_irqsave(&rxq->lock, flags);
3503 while (!list_empty(&rxq->rx_used)) {
3504 element = rxq->rx_used.next;
bb8c093b 3505 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
CB
3506
3507 /* Alloc a new receive buffer */
b481de9c 3508 rxb->skb =
5425e490 3509 alloc_skb(priv->hw_params.rx_buf_size,
9ee1ba47 3510 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY
3511 if (!rxb->skb) {
3512 if (net_ratelimit())
3513 printk(KERN_CRIT DRV_NAME
3514 ": Can not allocate SKB buffers\n");
3515 /* We don't reschedule replenish work here -- we will
3516 * call the restock method and if it still needs
3517 * more buffers it will schedule replenish */
3518 break;
3519 }
3520 priv->alloc_rxb_skb++;
3521 list_del(element);
6440adb5
CB
3522
3523 /* Get physical address of RB/SKB */
b481de9c
ZY
3524 rxb->dma_addr =
3525 pci_map_single(priv->pci_dev, rxb->skb->data,
5425e490 3526 priv->hw_params.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY
3527 list_add_tail(&rxb->list, &rxq->rx_free);
3528 rxq->free_count++;
3529 }
3530 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA
3531}
3532
3533/*
3534 * this should be called while priv->lock is locked
3535*/
4fd1f841 3536static void __iwl4965_rx_replenish(void *data)
5c0eef96 3537{
c79dd5b5 3538 struct iwl_priv *priv = data;
5c0eef96
MA
3539
3540 iwl4965_rx_allocate(priv);
3541 iwl4965_rx_queue_restock(priv);
3542}
3543
3544
3545void iwl4965_rx_replenish(void *data)
3546{
c79dd5b5 3547 struct iwl_priv *priv = data;
5c0eef96
MA
3548 unsigned long flags;
3549
3550 iwl4965_rx_allocate(priv);
b481de9c
ZY
3551
3552 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3553 iwl4965_rx_queue_restock(priv);
b481de9c
ZY
3554 spin_unlock_irqrestore(&priv->lock, flags);
3555}
3556
3557/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 3558 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY
3559 * This free routine walks the list of POOL entries and if SKB is set to
3560 * non NULL it is unmapped and freed
3561 */
c79dd5b5 3562static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY
3563{
3564 int i;
3565 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3566 if (rxq->pool[i].skb != NULL) {
3567 pci_unmap_single(priv->pci_dev,
3568 rxq->pool[i].dma_addr,
5425e490 3569 priv->hw_params.rx_buf_size,
9ee1ba47 3570 PCI_DMA_FROMDEVICE);
b481de9c
ZY
3571 dev_kfree_skb(rxq->pool[i].skb);
3572 }
3573 }
3574
3575 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3576 rxq->dma_addr);
3577 rxq->bd = NULL;
3578}
3579
c79dd5b5 3580int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
b481de9c 3581{
bb8c093b 3582 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
3583 struct pci_dev *dev = priv->pci_dev;
3584 int i;
3585
3586 spin_lock_init(&rxq->lock);
3587 INIT_LIST_HEAD(&rxq->rx_free);
3588 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
CB
3589
3590 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY
3591 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3592 if (!rxq->bd)
3593 return -ENOMEM;
6440adb5 3594
b481de9c
ZY
3595 /* Fill the rx_used queue with _all_ of the Rx buffers */
3596 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3597 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 3598
b481de9c
ZY
3599 /* Set us so that we have processed and used all buffers, but have
3600 * not restocked the Rx queue with fresh buffers */
3601 rxq->read = rxq->write = 0;
3602 rxq->free_count = 0;
3603 rxq->need_update = 0;
3604 return 0;
3605}
3606
c79dd5b5 3607void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY
3608{
3609 unsigned long flags;
3610 int i;
3611 spin_lock_irqsave(&rxq->lock, flags);
3612 INIT_LIST_HEAD(&rxq->rx_free);
3613 INIT_LIST_HEAD(&rxq->rx_used);
3614 /* Fill the rx_used queue with _all_ of the Rx buffers */
3615 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3616 /* In the reset function, these buffers may have been allocated
3617 * to an SKB, so we need to unmap and free potential storage */
3618 if (rxq->pool[i].skb != NULL) {
3619 pci_unmap_single(priv->pci_dev,
3620 rxq->pool[i].dma_addr,
5425e490 3621 priv->hw_params.rx_buf_size,
9ee1ba47 3622 PCI_DMA_FROMDEVICE);
b481de9c
ZY
3623 priv->alloc_rxb_skb--;
3624 dev_kfree_skb(rxq->pool[i].skb);
3625 rxq->pool[i].skb = NULL;
3626 }
3627 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3628 }
3629
3630 /* Set us so that we have processed and used all buffers, but have
3631 * not restocked the Rx queue with fresh buffers */
3632 rxq->read = rxq->write = 0;
3633 rxq->free_count = 0;
3634 spin_unlock_irqrestore(&rxq->lock, flags);
3635}
3636
3637/* Convert linear signal-to-noise ratio into dB */
3638static u8 ratio2dB[100] = {
3639/* 0 1 2 3 4 5 6 7 8 9 */
3640 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3641 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3642 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3643 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3644 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3645 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3646 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3647 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3648 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3649 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3650};
3651
3652/* Calculates a relative dB value from a ratio of linear
3653 * (i.e. not dB) signal levels.
3654 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 3655int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 3656{
c899a575
AB
3657 /* 1000:1 or higher just report as 60 dB */
3658 if (sig_ratio >= 1000)
b481de9c
ZY
3659 return 60;
3660
c899a575 3661 /* 100:1 or higher, divide by 10 and use table,
b481de9c 3662 * add 20 dB to make up for divide by 10 */
c899a575 3663 if (sig_ratio >= 100)
b481de9c
ZY
3664 return (20 + (int)ratio2dB[sig_ratio/10]);
3665
3666 /* We shouldn't see this */
3667 if (sig_ratio < 1)
3668 return 0;
3669
3670 /* Use table for ratios 1:1 - 99:1 */
3671 return (int)ratio2dB[sig_ratio];
3672}
3673
3674#define PERFECT_RSSI (-20) /* dBm */
3675#define WORST_RSSI (-95) /* dBm */
3676#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3677
3678/* Calculate an indication of rx signal quality (a percentage, not dBm!).
3679 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3680 * about formulas used below. */
bb8c093b 3681int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
3682{
3683 int sig_qual;
3684 int degradation = PERFECT_RSSI - rssi_dbm;
3685
3686 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3687 * as indicator; formula is (signal dbm - noise dbm).
3688 * SNR at or above 40 is a great signal (100%).
3689 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3690 * Weakest usable signal is usually 10 - 15 dB SNR. */
3691 if (noise_dbm) {
3692 if (rssi_dbm - noise_dbm >= 40)
3693 return 100;
3694 else if (rssi_dbm < noise_dbm)
3695 return 0;
3696 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3697
3698 /* Else use just the signal level.
3699 * This formula is a least squares fit of data points collected and
3700 * compared with a reference system that had a percentage (%) display
3701 * for signal quality. */
3702 } else
3703 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3704 (15 * RSSI_RANGE + 62 * degradation)) /
3705 (RSSI_RANGE * RSSI_RANGE);
3706
3707 if (sig_qual > 100)
3708 sig_qual = 100;
3709 else if (sig_qual < 1)
3710 sig_qual = 0;
3711
3712 return sig_qual;
3713}
3714
3715/**
9fbab516 3716 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
3717 *
3718 * Uses the priv->rx_handlers callback function array to invoke
3719 * the appropriate handlers, including command responses,
3720 * frame-received notifications, and other notifications.
3721 */
c79dd5b5 3722static void iwl4965_rx_handle(struct iwl_priv *priv)
b481de9c 3723{
bb8c093b
CH
3724 struct iwl4965_rx_mem_buffer *rxb;
3725 struct iwl4965_rx_packet *pkt;
3726 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
3727 u32 r, i;
3728 int reclaim;
3729 unsigned long flags;
5c0eef96 3730 u8 fill_rx = 0;
d68ab680 3731 u32 count = 8;
b481de9c 3732
6440adb5
CB
3733 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3734 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 3735 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY
3736 i = rxq->read;
3737
3738 /* Rx interrupt, but nothing sent from uCode */
3739 if (i == r)
3740 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3741
5c0eef96
MA
3742 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3743 fill_rx = 1;
3744
b481de9c
ZY
3745 while (i != r) {
3746 rxb = rxq->queue[i];
3747
9fbab516 3748 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
3749 * then a bug has been introduced in the queue refilling
3750 * routines -- catch it here */
3751 BUG_ON(rxb == NULL);
3752
3753 rxq->queue[i] = NULL;
3754
3755 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 3756 priv->hw_params.rx_buf_size,
b481de9c 3757 PCI_DMA_FROMDEVICE);
bb8c093b 3758 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY
3759
3760 /* Reclaim a command buffer only if this packet is a response
3761 * to a (driver-originated) command.
3762 * If the packet (e.g. Rx frame) originated from uCode,
3763 * there is no command buffer to reclaim.
3764 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3765 * but apparently a few don't get set; catch them here. */
3766 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3767 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 3768 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 3769 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
3770 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3771 (pkt->hdr.cmd != REPLY_TX);
3772
3773 /* Based on type of command response or notification,
3774 * handle those that need handling via function in
bb8c093b 3775 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY
3776 if (priv->rx_handlers[pkt->hdr.cmd]) {
3777 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3778 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3779 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3780 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3781 } else {
3782 /* No handling needed */
3783 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3784 "r %d i %d No handler needed for %s, 0x%02x\n",
3785 r, i, get_cmd_string(pkt->hdr.cmd),
3786 pkt->hdr.cmd);
3787 }
3788
3789 if (reclaim) {
9fbab516 3790 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 3791 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
3792 * as we reclaim the driver command queue */
3793 if (rxb && rxb->skb)
bb8c093b 3794 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY
3795 else
3796 IWL_WARNING("Claim null rxb?\n");
3797 }
3798
3799 /* For now we just don't re-use anything. We can tweak this
3800 * later to try and re-use notification packets and SKBs that
3801 * fail to Rx correctly */
3802 if (rxb->skb != NULL) {
3803 priv->alloc_rxb_skb--;
3804 dev_kfree_skb_any(rxb->skb);
3805 rxb->skb = NULL;
3806 }
3807
3808 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 3809 priv->hw_params.rx_buf_size,
9ee1ba47 3810 PCI_DMA_FROMDEVICE);
b481de9c
ZY
3811 spin_lock_irqsave(&rxq->lock, flags);
3812 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3813 spin_unlock_irqrestore(&rxq->lock, flags);
3814 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
3815 /* If there are a lot of unused frames,
3816 * restock the Rx queue so ucode wont assert. */
3817 if (fill_rx) {
3818 count++;
3819 if (count >= 8) {
3820 priv->rxq.read = i;
3821 __iwl4965_rx_replenish(priv);
3822 count = 0;
3823 }
3824 }
b481de9c
ZY
3825 }
3826
3827 /* Backtrack one entry */
3828 priv->rxq.read = i;
bb8c093b 3829 iwl4965_rx_queue_restock(priv);
b481de9c
ZY
3830}
3831
6440adb5
CB
3832/**
3833 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
3834 */
c79dd5b5 3835static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 3836 struct iwl4965_tx_queue *txq)
b481de9c
ZY
3837{
3838 u32 reg = 0;
3839 int rc = 0;
3840 int txq_id = txq->q.id;
3841
3842 if (txq->need_update == 0)
3843 return rc;
3844
3845 /* if we're trying to save power */
3846 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3847 /* wake up nic if it's powered down ...
3848 * uCode will wake up, and interrupt us again, so next
3849 * time we'll skip this part. */
3395f6e9 3850 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY
3851
3852 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3853 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3395f6e9 3854 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY
3855 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3856 return rc;
3857 }
3858
3859 /* restore this queue's parameters in nic hardware. */
3395f6e9 3860 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
3861 if (rc)
3862 return rc;
3395f6e9 3863 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 3864 txq->q.write_ptr | (txq_id << 8));
3395f6e9 3865 iwl_release_nic_access(priv);
b481de9c
ZY
3866
3867 /* else not in power-save mode, uCode will never sleep when we're
3868 * trying to tx (during RFKILL, we're not trying to tx). */
3869 } else
3395f6e9 3870 iwl_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 3871 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY
3872
3873 txq->need_update = 0;
3874
3875 return rc;
3876}
3877
0a6857e7 3878#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 3879static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 3880{
0795af57
JP
3881 DECLARE_MAC_BUF(mac);
3882
b481de9c 3883 IWL_DEBUG_RADIO("RX CONFIG:\n");
0a6857e7 3884 iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
3885 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3886 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3887 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3888 le32_to_cpu(rxon->filter_flags));
3889 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3890 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3891 rxon->ofdm_basic_rates);
3892 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP
3893 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
3894 print_mac(mac, rxon->node_addr));
3895 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
3896 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY
3897 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3898}
3899#endif
3900
c79dd5b5 3901static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
3902{
3903 IWL_DEBUG_ISR("Enabling interrupts\n");
3904 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 3905 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
3906}
3907
0359facc
MA
3908/* call this function to flush any scheduled tasklet */
3909static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3910{
3911 /* wait to make sure we flush pedding tasklet*/
3912 synchronize_irq(priv->pci_dev->irq);
3913 tasklet_kill(&priv->irq_tasklet);
3914}
3915
c79dd5b5 3916static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
3917{
3918 clear_bit(STATUS_INT_ENABLED, &priv->status);
3919
3920 /* disable interrupts from uCode/NIC to host */
3395f6e9 3921 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
3922
3923 /* acknowledge/clear/reset any interrupts still pending
3924 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW
3925 iwl_write32(priv, CSR_INT, 0xffffffff);
3926 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
3927 IWL_DEBUG_ISR("Disabled interrupts\n");
3928}
3929
3930static const char *desc_lookup(int i)
3931{
3932 switch (i) {
3933 case 1:
3934 return "FAIL";
3935 case 2:
3936 return "BAD_PARAM";
3937 case 3:
3938 return "BAD_CHECKSUM";
3939 case 4:
3940 return "NMI_INTERRUPT";
3941 case 5:
3942 return "SYSASSERT";
3943 case 6:
3944 return "FATAL_ERROR";
3945 }
3946
3947 return "UNKNOWN";
3948}
3949
3950#define ERROR_START_OFFSET (1 * sizeof(u32))
3951#define ERROR_ELEM_SIZE (7 * sizeof(u32))
3952
c79dd5b5 3953static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
3954{
3955 u32 data2, line;
3956 u32 desc, time, count, base, data1;
3957 u32 blink1, blink2, ilink1, ilink2;
3958 int rc;
3959
3960 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3961
57aab75a 3962 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY
3963 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
3964 return;
3965 }
3966
3395f6e9 3967 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
3968 if (rc) {
3969 IWL_WARNING("Can not read from adapter at this time.\n");
3970 return;
3971 }
3972
3395f6e9 3973 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
3974
3975 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3976 IWL_ERROR("Start IWL Error Log Dump:\n");
2acae16e 3977 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
b481de9c
ZY
3978 }
3979
3395f6e9
TW
3980 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
3981 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
3982 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
3983 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
3984 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
3985 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
3986 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
3987 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
3988 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY
3989
3990 IWL_ERROR("Desc Time "
3991 "data1 data2 line\n");
3992 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
3993 desc_lookup(desc), desc, time, data1, data2, line);
3994 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
3995 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
3996 ilink1, ilink2);
3997
3395f6e9 3998 iwl_release_nic_access(priv);
b481de9c
ZY
3999}
4000
4001#define EVENT_START_OFFSET (4 * sizeof(u32))
4002
4003/**
bb8c093b 4004 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 4005 *
3395f6e9 4006 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 4007 */
c79dd5b5 4008static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
4009 u32 num_events, u32 mode)
4010{
4011 u32 i;
4012 u32 base; /* SRAM byte address of event log header */
4013 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4014 u32 ptr; /* SRAM byte address of log data */
4015 u32 ev, time, data; /* event log data */
4016
4017 if (num_events == 0)
4018 return;
4019
4020 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4021
4022 if (mode == 0)
4023 event_size = 2 * sizeof(u32);
4024 else
4025 event_size = 3 * sizeof(u32);
4026
4027 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4028
4029 /* "time" is actually "data" for mode 0 (no timestamp).
4030 * place event id # at far right for easier visual parsing. */
4031 for (i = 0; i < num_events; i++) {
3395f6e9 4032 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 4033 ptr += sizeof(u32);
3395f6e9 4034 time = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY
4035 ptr += sizeof(u32);
4036 if (mode == 0)
4037 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4038 else {
3395f6e9 4039 data = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY
4040 ptr += sizeof(u32);
4041 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4042 }
4043 }
4044}
4045
c79dd5b5 4046static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY
4047{
4048 int rc;
4049 u32 base; /* SRAM byte address of event log header */
4050 u32 capacity; /* event log capacity in # entries */
4051 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4052 u32 num_wraps; /* # times uCode wrapped to top of log */
4053 u32 next_entry; /* index of next entry to be written by uCode */
4054 u32 size; /* # entries that we'll print */
4055
4056 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
57aab75a 4057 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY
4058 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4059 return;
4060 }
4061
3395f6e9 4062 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4063 if (rc) {
4064 IWL_WARNING("Can not read from adapter at this time.\n");
4065 return;
4066 }
4067
4068 /* event log header */
3395f6e9
TW
4069 capacity = iwl_read_targ_mem(priv, base);
4070 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4071 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4072 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
4073
4074 size = num_wraps ? capacity : next_entry;
4075
4076 /* bail out if nothing in log */
4077 if (size == 0) {
583fab37 4078 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
3395f6e9 4079 iwl_release_nic_access(priv);
b481de9c
ZY
4080 return;
4081 }
4082
583fab37 4083 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
4084 size, num_wraps);
4085
4086 /* if uCode has wrapped back to top of log, start at the oldest entry,
4087 * i.e the next one that uCode would fill. */
4088 if (num_wraps)
bb8c093b 4089 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY
4090 capacity - next_entry, mode);
4091
4092 /* (then/else) start at top of log */
bb8c093b 4093 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 4094
3395f6e9 4095 iwl_release_nic_access(priv);
b481de9c
ZY
4096}
4097
4098/**
bb8c093b 4099 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 4100 */
c79dd5b5 4101static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 4102{
bb8c093b 4103 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
4104 set_bit(STATUS_FW_ERROR, &priv->status);
4105
4106 /* Cancel currently queued command. */
4107 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4108
0a6857e7
TW
4109#ifdef CONFIG_IWLWIFI_DEBUG
4110 if (iwl_debug_level & IWL_DL_FW_ERRORS) {
bb8c093b
CH
4111 iwl4965_dump_nic_error_log(priv);
4112 iwl4965_dump_nic_event_log(priv);
4113 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY
4114 }
4115#endif
4116
4117 wake_up_interruptible(&priv->wait_command_queue);
4118
4119 /* Keep the restart process from trying to send host
4120 * commands by clearing the INIT status bit */
4121 clear_bit(STATUS_READY, &priv->status);
4122
4123 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4124 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4125 "Restarting adapter due to uCode error.\n");
4126
3109ece1 4127 if (iwl_is_associated(priv)) {
b481de9c
ZY
4128 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4129 sizeof(priv->recovery_rxon));
4130 priv->error_recovering = 1;
4131 }
4132 queue_work(priv->workqueue, &priv->restart);
4133 }
4134}
4135
c79dd5b5 4136static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
4137{
4138 unsigned long flags;
4139
4140 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4141 sizeof(priv->staging_rxon));
4142 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4143 iwl4965_commit_rxon(priv);
b481de9c 4144
bb8c093b 4145 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
4146
4147 spin_lock_irqsave(&priv->lock, flags);
4148 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4149 priv->error_recovering = 0;
4150 spin_unlock_irqrestore(&priv->lock, flags);
4151}
4152
c79dd5b5 4153static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
4154{
4155 u32 inta, handled = 0;
4156 u32 inta_fh;
4157 unsigned long flags;
0a6857e7 4158#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
4159 u32 inta_mask;
4160#endif
4161
4162 spin_lock_irqsave(&priv->lock, flags);
4163
4164 /* Ack/clear/reset pending uCode interrupts.
4165 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4166 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
4167 inta = iwl_read32(priv, CSR_INT);
4168 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
4169
4170 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4171 * Any new interrupts that happen after this, either while we're
4172 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
4173 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4174 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 4175
0a6857e7
TW
4176#ifdef CONFIG_IWLWIFI_DEBUG
4177 if (iwl_debug_level & IWL_DL_ISR) {
9fbab516 4178 /* just for debug */
3395f6e9 4179 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
4180 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4181 inta, inta_mask, inta_fh);
4182 }
4183#endif
4184
4185 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4186 * atomic, make sure that inta covers all the interrupts that
4187 * we've discovered, even if FH interrupt came in just after
4188 * reading CSR_INT. */
6f83eaa1 4189 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 4190 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 4191 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
4192 inta |= CSR_INT_BIT_FH_TX;
4193
4194 /* Now service all interrupt bits discovered above. */
4195 if (inta & CSR_INT_BIT_HW_ERR) {
4196 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4197
4198 /* Tell the device to stop sending interrupts */
bb8c093b 4199 iwl4965_disable_interrupts(priv);
b481de9c 4200
bb8c093b 4201 iwl4965_irq_handle_error(priv);
b481de9c
ZY
4202
4203 handled |= CSR_INT_BIT_HW_ERR;
4204
4205 spin_unlock_irqrestore(&priv->lock, flags);
4206
4207 return;
4208 }
4209
0a6857e7
TW
4210#ifdef CONFIG_IWLWIFI_DEBUG
4211 if (iwl_debug_level & (IWL_DL_ISR)) {
b481de9c 4212 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
4213 if (inta & CSR_INT_BIT_SCD)
4214 IWL_DEBUG_ISR("Scheduler finished to transmit "
4215 "the frame/frames.\n");
b481de9c
ZY
4216
4217 /* Alive notification via Rx interrupt will do the real work */
4218 if (inta & CSR_INT_BIT_ALIVE)
4219 IWL_DEBUG_ISR("Alive interrupt\n");
4220 }
4221#endif
4222 /* Safely ignore these bits for debug checks below */
25c03d8e 4223 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 4224
9fbab516 4225 /* HW RF KILL switch toggled */
b481de9c
ZY
4226 if (inta & CSR_INT_BIT_RF_KILL) {
4227 int hw_rf_kill = 0;
3395f6e9 4228 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
4229 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4230 hw_rf_kill = 1;
4231
4232 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4233 "RF_KILL bit toggled to %s.\n",
4234 hw_rf_kill ? "disable radio":"enable radio");
4235
4236 /* Queue restart only if RF_KILL switch was set to "kill"
4237 * when we loaded driver, and is now set to "enable".
4238 * After we're Alive, RF_KILL gets handled by
3230455d 4239 * iwl4965_rx_card_state_notif() */
53e49093
ZY
4240 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4241 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 4242 queue_work(priv->workqueue, &priv->restart);
53e49093 4243 }
b481de9c
ZY
4244
4245 handled |= CSR_INT_BIT_RF_KILL;
4246 }
4247
9fbab516 4248 /* Chip got too hot and stopped itself */
b481de9c
ZY
4249 if (inta & CSR_INT_BIT_CT_KILL) {
4250 IWL_ERROR("Microcode CT kill error detected.\n");
4251 handled |= CSR_INT_BIT_CT_KILL;
4252 }
4253
4254 /* Error detected by uCode */
4255 if (inta & CSR_INT_BIT_SW_ERR) {
4256 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4257 inta);
bb8c093b 4258 iwl4965_irq_handle_error(priv);
b481de9c
ZY
4259 handled |= CSR_INT_BIT_SW_ERR;
4260 }
4261
4262 /* uCode wakes up after power-down sleep */
4263 if (inta & CSR_INT_BIT_WAKEUP) {
4264 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH
4265 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
4266 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4267 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4268 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4269 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4270 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4271 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
4272
4273 handled |= CSR_INT_BIT_WAKEUP;
4274 }
4275
4276 /* All uCode command responses, including Tx command responses,
4277 * Rx "responses" (frame-received notification), and other
4278 * notifications from uCode come through here*/
4279 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 4280 iwl4965_rx_handle(priv);
b481de9c
ZY
4281 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4282 }
4283
4284 if (inta & CSR_INT_BIT_FH_TX) {
4285 IWL_DEBUG_ISR("Tx interrupt\n");
4286 handled |= CSR_INT_BIT_FH_TX;
4287 }
4288
4289 if (inta & ~handled)
4290 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4291
4292 if (inta & ~CSR_INI_SET_MASK) {
4293 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4294 inta & ~CSR_INI_SET_MASK);
4295 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4296 }
4297
4298 /* Re-enable all interrupts */
0359facc
MA
4299 /* only Re-enable if diabled by irq */
4300 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4301 iwl4965_enable_interrupts(priv);
b481de9c 4302
0a6857e7
TW
4303#ifdef CONFIG_IWLWIFI_DEBUG
4304 if (iwl_debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
4305 inta = iwl_read32(priv, CSR_INT);
4306 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4307 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
4308 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4309 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4310 }
4311#endif
4312 spin_unlock_irqrestore(&priv->lock, flags);
4313}
4314
bb8c093b 4315static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 4316{
c79dd5b5 4317 struct iwl_priv *priv = data;
b481de9c
ZY
4318 u32 inta, inta_mask;
4319 u32 inta_fh;
4320 if (!priv)
4321 return IRQ_NONE;
4322
4323 spin_lock(&priv->lock);
4324
4325 /* Disable (but don't clear!) interrupts here to avoid
4326 * back-to-back ISRs and sporadic interrupts from our NIC.
4327 * If we have something to service, the tasklet will re-enable ints.
4328 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
4329 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4330 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
4331
4332 /* Discover which interrupts are active/pending */
3395f6e9
TW
4333 inta = iwl_read32(priv, CSR_INT);
4334 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
4335
4336 /* Ignore interrupt if there's nothing in NIC to service.
4337 * This may be due to IRQ shared with another device,
4338 * or due to sporadic interrupts thrown from our NIC. */
4339 if (!inta && !inta_fh) {
4340 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4341 goto none;
4342 }
4343
4344 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
4345 /* Hardware disappeared. It might have already raised
4346 * an interrupt */
b481de9c 4347 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 4348 goto unplugged;
b481de9c
ZY
4349 }
4350
4351 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4352 inta, inta_mask, inta_fh);
4353
25c03d8e
JP
4354 inta &= ~CSR_INT_BIT_SCD;
4355
bb8c093b 4356 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
4357 if (likely(inta || inta_fh))
4358 tasklet_schedule(&priv->irq_tasklet);
b481de9c 4359
66fbb541
ON
4360 unplugged:
4361 spin_unlock(&priv->lock);
b481de9c
ZY
4362 return IRQ_HANDLED;
4363
4364 none:
4365 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
4366 /* only Re-enable if diabled by irq */
4367 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4368 iwl4965_enable_interrupts(priv);
b481de9c
ZY
4369 spin_unlock(&priv->lock);
4370 return IRQ_NONE;
4371}
4372
b481de9c
ZY
4373/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4374 * sending probe req. This should be set long enough to hear probe responses
4375 * from more than one AP. */
4376#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4377#define IWL_ACTIVE_DWELL_TIME_52 (10)
4378
4379/* For faster active scanning, scan will move to the next channel if fewer than
4380 * PLCP_QUIET_THRESH packets are heard on this channel within
4381 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4382 * time if it's a quiet channel (nothing responded to our probe, and there's
4383 * no other traffic).
4384 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4385#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4386#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4387
4388/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4389 * Must be set longer than active dwell time.
4390 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4391#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4392#define IWL_PASSIVE_DWELL_TIME_52 (10)
4393#define IWL_PASSIVE_DWELL_BASE (100)
4394#define IWL_CHANNEL_TUNE_TIME 5
4395
c79dd5b5 4396static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
8318d78a 4397 enum ieee80211_band band)
b481de9c 4398{
8318d78a 4399 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
4400 return IWL_ACTIVE_DWELL_TIME_52;
4401 else
4402 return IWL_ACTIVE_DWELL_TIME_24;
4403}
4404
c79dd5b5 4405static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
8318d78a 4406 enum ieee80211_band band)
b481de9c 4407{
8318d78a
JB
4408 u16 active = iwl4965_get_active_dwell_time(priv, band);
4409 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
4410 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4411 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4412
3109ece1 4413 if (iwl_is_associated(priv)) {
b481de9c
ZY
4414 /* If we're associated, we clamp the maximum passive
4415 * dwell time to be 98% of the beacon interval (minus
4416 * 2 * channel tune time) */
4417 passive = priv->beacon_int;
4418 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4419 passive = IWL_PASSIVE_DWELL_BASE;
4420 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4421 }
4422
4423 if (passive <= active)
4424 passive = active + 1;
4425
4426 return passive;
4427}
4428
c79dd5b5 4429static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 4430 enum ieee80211_band band,
b481de9c 4431 u8 is_active, u8 direct_mask,
bb8c093b 4432 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY
4433{
4434 const struct ieee80211_channel *channels = NULL;
8318d78a 4435 const struct ieee80211_supported_band *sband;
bf85ea4f 4436 const struct iwl_channel_info *ch_info;
b481de9c
ZY
4437 u16 passive_dwell = 0;
4438 u16 active_dwell = 0;
4439 int added, i;
4440
d1141dfb 4441 sband = iwl_get_hw_mode(priv, band);
8318d78a 4442 if (!sband)
b481de9c
ZY
4443 return 0;
4444
8318d78a 4445 channels = sband->channels;
b481de9c 4446
8318d78a
JB
4447 active_dwell = iwl4965_get_active_dwell_time(priv, band);
4448 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
b481de9c 4449
8318d78a 4450 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB
4451 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4452 continue;
4453
8318d78a 4454 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
b481de9c 4455
8622e705 4456 ch_info = iwl_get_channel_info(priv, band,
9fbab516 4457 scan_ch->channel);
b481de9c
ZY
4458 if (!is_channel_valid(ch_info)) {
4459 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4460 scan_ch->channel);
4461 continue;
4462 }
4463
4464 if (!is_active || is_channel_passive(ch_info) ||
8318d78a 4465 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
b481de9c
ZY
4466 scan_ch->type = 0; /* passive */
4467 else
4468 scan_ch->type = 1; /* active */
4469
4470 if (scan_ch->type & 1)
4471 scan_ch->type |= (direct_mask << 1);
4472
b481de9c
ZY
4473 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4474 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4475
9fbab516 4476 /* Set txpower levels to defaults */
b481de9c
ZY
4477 scan_ch->tpc.dsp_atten = 110;
4478 /* scan_pwr_info->tpc.dsp_atten; */
4479
4480 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 4481 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
4482 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4483 else {
4484 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4485 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 4486 * power level:
8a1b0245 4487 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
4488 */
4489 }
4490
4491 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4492 scan_ch->channel,
4493 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4494 (scan_ch->type & 1) ?
4495 active_dwell : passive_dwell);
4496
4497 scan_ch++;
4498 added++;
4499 }
4500
4501 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4502 return added;
4503}
4504
c79dd5b5 4505static void iwl4965_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
4506 struct ieee80211_rate *rates)
4507{
4508 int i;
4509
4510 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
4511 rates[i].bitrate = iwl4965_rates[i].ieee * 5;
4512 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4513 rates[i].hw_value_short = i;
4514 rates[i].flags = 0;
4515 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 4516 /*
8318d78a 4517 * If CCK != 1M then set short preamble rate flag.
b481de9c 4518 */
35cdeaf4
TW
4519 rates[i].flags |=
4520 (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
4521 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 4522 }
b481de9c 4523 }
b481de9c
ZY
4524}
4525
4526/**
bb8c093b 4527 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
b481de9c 4528 */
bf85ea4f 4529int iwl4965_init_geos(struct iwl_priv *priv)
b481de9c 4530{
bf85ea4f 4531 struct iwl_channel_info *ch;
8211ef78 4532 struct ieee80211_supported_band *sband;
b481de9c
ZY
4533 struct ieee80211_channel *channels;
4534 struct ieee80211_channel *geo_ch;
4535 struct ieee80211_rate *rates;
4536 int i = 0;
b481de9c 4537
8318d78a
JB
4538 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4539 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
b481de9c
ZY
4540 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4541 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4542 return 0;
4543 }
4544
b481de9c
ZY
4545 channels = kzalloc(sizeof(struct ieee80211_channel) *
4546 priv->channel_count, GFP_KERNEL);
8318d78a 4547 if (!channels)
b481de9c 4548 return -ENOMEM;
b481de9c 4549
8211ef78 4550 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
b481de9c
ZY
4551 GFP_KERNEL);
4552 if (!rates) {
b481de9c
ZY
4553 kfree(channels);
4554 return -ENOMEM;
4555 }
4556
b481de9c 4557 /* 5.2GHz channels start after the 2.4GHz channels */
8211ef78 4558 sband = &priv->bands[IEEE80211_BAND_5GHZ];
bf85ea4f 4559 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
8211ef78
TW
4560 /* just OFDM */
4561 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4562 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
8318d78a 4563
1ea87396 4564 iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
78330fdd 4565
8211ef78
TW
4566 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4567 sband->channels = channels;
4568 /* OFDM & CCK */
4569 sband->bitrates = rates;
4570 sband->n_bitrates = IWL_RATE_COUNT;
b481de9c 4571
1ea87396 4572 iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
78330fdd 4573
b481de9c
ZY
4574 priv->ieee_channels = channels;
4575 priv->ieee_rates = rates;
4576
bb8c093b 4577 iwl4965_init_hw_rates(priv, rates);
b481de9c 4578
8211ef78 4579 for (i = 0; i < priv->channel_count; i++) {
b481de9c
ZY
4580 ch = &priv->channel_info[i];
4581
8211ef78
TW
4582 /* FIXME: might be removed if scan is OK */
4583 if (!is_channel_valid(ch))
b481de9c 4584 continue;
b481de9c 4585
8211ef78
TW
4586 if (is_channel_a_band(ch))
4587 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4588 else
4589 sband = &priv->bands[IEEE80211_BAND_2GHZ];
b481de9c 4590
8211ef78
TW
4591 geo_ch = &sband->channels[sband->n_channels++];
4592
4593 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
8318d78a
JB
4594 geo_ch->max_power = ch->max_power_avg;
4595 geo_ch->max_antenna_gain = 0xff;
7b72304d 4596 geo_ch->hw_value = ch->channel;
b481de9c
ZY
4597
4598 if (is_channel_valid(ch)) {
8318d78a
JB
4599 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4600 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
b481de9c 4601
8318d78a
JB
4602 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4603 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
b481de9c
ZY
4604
4605 if (ch->flags & EEPROM_CHANNEL_RADAR)
8318d78a 4606 geo_ch->flags |= IEEE80211_CHAN_RADAR;
b481de9c
ZY
4607
4608 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4609 priv->max_channel_txpower_limit =
4610 ch->max_power_avg;
8211ef78 4611 } else {
8318d78a 4612 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
8211ef78
TW
4613 }
4614
4615 /* Save flags for reg domain usage */
4616 geo_ch->orig_flags = geo_ch->flags;
4617
4618 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4619 ch->channel, geo_ch->center_freq,
4620 is_channel_a_band(ch) ? "5.2" : "2.4",
4621 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4622 "restricted" : "valid",
4623 geo_ch->flags);
b481de9c
ZY
4624 }
4625
82b9a121
TW
4626 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4627 priv->cfg->sku & IWL_SKU_A) {
b481de9c
ZY
4628 printk(KERN_INFO DRV_NAME
4629 ": Incorrectly detected BG card as ABG. Please send "
4630 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
4631 priv->pci_dev->device, priv->pci_dev->subsystem_device);
82b9a121 4632 priv->cfg->sku &= ~IWL_SKU_A;
b481de9c
ZY
4633 }
4634
4635 printk(KERN_INFO DRV_NAME
4636 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
8318d78a
JB
4637 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4638 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
b481de9c 4639
e0e0a67e
JL
4640 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4641 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4642 &priv->bands[IEEE80211_BAND_2GHZ];
4643 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4644 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4645 &priv->bands[IEEE80211_BAND_5GHZ];
b481de9c 4646
b481de9c
ZY
4647 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4648
4649 return 0;
4650}
4651
849e0dce
RC
4652/*
4653 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
4654 */
bf85ea4f 4655void iwl4965_free_geos(struct iwl_priv *priv)
849e0dce 4656{
849e0dce
RC
4657 kfree(priv->ieee_channels);
4658 kfree(priv->ieee_rates);
4659 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4660}
4661
b481de9c
ZY
4662/******************************************************************************
4663 *
4664 * uCode download functions
4665 *
4666 ******************************************************************************/
4667
c79dd5b5 4668static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 4669{
98c92211
TW
4670 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4671 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4672 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4673 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4674 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4675 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
4676}
4677
4678/**
bb8c093b 4679 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
4680 * looking at all data.
4681 */
c79dd5b5 4682static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
9fbab516 4683 u32 len)
b481de9c
ZY
4684{
4685 u32 val;
4686 u32 save_len = len;
4687 int rc = 0;
4688 u32 errcnt;
4689
4690 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4691
3395f6e9 4692 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4693 if (rc)
4694 return rc;
4695
3395f6e9 4696 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
b481de9c
ZY
4697
4698 errcnt = 0;
4699 for (; len > 0; len -= sizeof(u32), image++) {
4700 /* read data comes through single port, auto-incr addr */
4701 /* NOTE: Use the debugless read so we don't flood kernel log
4702 * if IWL_DL_IO is set */
3395f6e9 4703 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
4704 if (val != le32_to_cpu(*image)) {
4705 IWL_ERROR("uCode INST section is invalid at "
4706 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4707 save_len - len, val, le32_to_cpu(*image));
4708 rc = -EIO;
4709 errcnt++;
4710 if (errcnt >= 20)
4711 break;
4712 }
4713 }
4714
3395f6e9 4715 iwl_release_nic_access(priv);
b481de9c
ZY
4716
4717 if (!errcnt)
4718 IWL_DEBUG_INFO
4719 ("ucode image in INSTRUCTION memory is good\n");
4720
4721 return rc;
4722}
4723
4724
4725/**
bb8c093b 4726 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
4727 * using sample data 100 bytes apart. If these sample points are good,
4728 * it's a pretty good bet that everything between them is good, too.
4729 */
c79dd5b5 4730static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
4731{
4732 u32 val;
4733 int rc = 0;
4734 u32 errcnt = 0;
4735 u32 i;
4736
4737 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4738
3395f6e9 4739 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4740 if (rc)
4741 return rc;
4742
4743 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4744 /* read data comes through single port, auto-incr addr */
4745 /* NOTE: Use the debugless read so we don't flood kernel log
4746 * if IWL_DL_IO is set */
3395f6e9 4747 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
b481de9c 4748 i + RTC_INST_LOWER_BOUND);
3395f6e9 4749 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
4750 if (val != le32_to_cpu(*image)) {
4751#if 0 /* Enable this if you want to see details */
4752 IWL_ERROR("uCode INST section is invalid at "
4753 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4754 i, val, *image);
4755#endif
4756 rc = -EIO;
4757 errcnt++;
4758 if (errcnt >= 3)
4759 break;
4760 }
4761 }
4762
3395f6e9 4763 iwl_release_nic_access(priv);
b481de9c
ZY
4764
4765 return rc;
4766}
4767
4768
4769/**
bb8c093b 4770 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
4771 * and verify its contents
4772 */
c79dd5b5 4773static int iwl4965_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
4774{
4775 __le32 *image;
4776 u32 len;
4777 int rc = 0;
4778
4779 /* Try bootstrap */
4780 image = (__le32 *)priv->ucode_boot.v_addr;
4781 len = priv->ucode_boot.len;
bb8c093b 4782 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
4783 if (rc == 0) {
4784 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
4785 return 0;
4786 }
4787
4788 /* Try initialize */
4789 image = (__le32 *)priv->ucode_init.v_addr;
4790 len = priv->ucode_init.len;
bb8c093b 4791 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
4792 if (rc == 0) {
4793 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
4794 return 0;
4795 }
4796
4797 /* Try runtime/protocol */
4798 image = (__le32 *)priv->ucode_code.v_addr;
4799 len = priv->ucode_code.len;
bb8c093b 4800 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
4801 if (rc == 0) {
4802 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
4803 return 0;
4804 }
4805
4806 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
4807
9fbab516
BC
4808 /* Since nothing seems to match, show first several data entries in
4809 * instruction SRAM, so maybe visual inspection will give a clue.
4810 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
4811 image = (__le32 *)priv->ucode_boot.v_addr;
4812 len = priv->ucode_boot.len;
bb8c093b 4813 rc = iwl4965_verify_inst_full(priv, image, len);
b481de9c
ZY
4814
4815 return rc;
4816}
4817
c79dd5b5 4818static void iwl4965_nic_start(struct iwl_priv *priv)
b481de9c
ZY
4819{
4820 /* Remove all resets to allow NIC to operate */
3395f6e9 4821 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
4822}
4823
90e759d1 4824
b481de9c 4825/**
bb8c093b 4826 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
4827 *
4828 * Copy into buffers for card to fetch via bus-mastering
4829 */
c79dd5b5 4830static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 4831{
bb8c093b 4832 struct iwl4965_ucode *ucode;
90e759d1 4833 int ret;
b481de9c 4834 const struct firmware *ucode_raw;
4bf775cd 4835 const char *name = priv->cfg->fw_name;
b481de9c
ZY
4836 u8 *src;
4837 size_t len;
4838 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
4839
4840 /* Ask kernel firmware_class module to get the boot firmware off disk.
4841 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
4842 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
4843 if (ret < 0) {
4844 IWL_ERROR("%s firmware file req failed: Reason %d\n",
4845 name, ret);
b481de9c
ZY
4846 goto error;
4847 }
4848
4849 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
4850 name, ucode_raw->size);
4851
4852 /* Make sure that we got at least our header! */
4853 if (ucode_raw->size < sizeof(*ucode)) {
4854 IWL_ERROR("File size way too small!\n");
90e759d1 4855 ret = -EINVAL;
b481de9c
ZY
4856 goto err_release;
4857 }
4858
4859 /* Data from ucode file: header followed by uCode images */
4860 ucode = (void *)ucode_raw->data;
4861
4862 ver = le32_to_cpu(ucode->ver);
4863 inst_size = le32_to_cpu(ucode->inst_size);
4864 data_size = le32_to_cpu(ucode->data_size);
4865 init_size = le32_to_cpu(ucode->init_size);
4866 init_data_size = le32_to_cpu(ucode->init_data_size);
4867 boot_size = le32_to_cpu(ucode->boot_size);
4868
4869 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
4870 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
4871 inst_size);
4872 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
4873 data_size);
4874 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
4875 init_size);
4876 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
4877 init_data_size);
4878 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
4879 boot_size);
4880
4881 /* Verify size of file vs. image size info in file's header */
4882 if (ucode_raw->size < sizeof(*ucode) +
4883 inst_size + data_size + init_size +
4884 init_data_size + boot_size) {
4885
4886 IWL_DEBUG_INFO("uCode file size %d too small\n",
4887 (int)ucode_raw->size);
90e759d1 4888 ret = -EINVAL;
b481de9c
ZY
4889 goto err_release;
4890 }
4891
4892 /* Verify that uCode images will fit in card's SRAM */
099b40b7 4893 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
4894 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
4895 inst_size);
4896 ret = -EINVAL;
b481de9c
ZY
4897 goto err_release;
4898 }
4899
099b40b7 4900 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
4901 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
4902 data_size);
4903 ret = -EINVAL;
b481de9c
ZY
4904 goto err_release;
4905 }
099b40b7 4906 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 4907 IWL_DEBUG_INFO
90e759d1
TW
4908 ("uCode init instr len %d too large to fit in\n",
4909 init_size);
4910 ret = -EINVAL;
b481de9c
ZY
4911 goto err_release;
4912 }
099b40b7 4913 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 4914 IWL_DEBUG_INFO
90e759d1
TW
4915 ("uCode init data len %d too large to fit in\n",
4916 init_data_size);
4917 ret = -EINVAL;
b481de9c
ZY
4918 goto err_release;
4919 }
099b40b7 4920 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 4921 IWL_DEBUG_INFO
90e759d1
TW
4922 ("uCode boot instr len %d too large to fit in\n",
4923 boot_size);
4924 ret = -EINVAL;
b481de9c
ZY
4925 goto err_release;
4926 }
4927
4928 /* Allocate ucode buffers for card's bus-master loading ... */
4929
4930 /* Runtime instructions and 2 copies of data:
4931 * 1) unmodified from disk
4932 * 2) backup cache for save/restore during power-downs */
4933 priv->ucode_code.len = inst_size;
98c92211 4934 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
4935
4936 priv->ucode_data.len = data_size;
98c92211 4937 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
4938
4939 priv->ucode_data_backup.len = data_size;
98c92211 4940 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
4941
4942 /* Initialization instructions and data */
90e759d1
TW
4943 if (init_size && init_data_size) {
4944 priv->ucode_init.len = init_size;
98c92211 4945 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
4946
4947 priv->ucode_init_data.len = init_data_size;
98c92211 4948 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
4949
4950 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
4951 goto err_pci_alloc;
4952 }
b481de9c
ZY
4953
4954 /* Bootstrap (instructions only, no data) */
90e759d1
TW
4955 if (boot_size) {
4956 priv->ucode_boot.len = boot_size;
98c92211 4957 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 4958
90e759d1
TW
4959 if (!priv->ucode_boot.v_addr)
4960 goto err_pci_alloc;
4961 }
b481de9c
ZY
4962
4963 /* Copy images into buffers for card's bus-master reads ... */
4964
4965 /* Runtime instructions (first block of data in file) */
4966 src = &ucode->data[0];
4967 len = priv->ucode_code.len;
90e759d1 4968 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
4969 memcpy(priv->ucode_code.v_addr, src, len);
4970 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4971 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
4972
4973 /* Runtime data (2nd block)
bb8c093b 4974 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
4975 src = &ucode->data[inst_size];
4976 len = priv->ucode_data.len;
90e759d1 4977 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
4978 memcpy(priv->ucode_data.v_addr, src, len);
4979 memcpy(priv->ucode_data_backup.v_addr, src, len);
4980
4981 /* Initialization instructions (3rd block) */
4982 if (init_size) {
4983 src = &ucode->data[inst_size + data_size];
4984 len = priv->ucode_init.len;
90e759d1
TW
4985 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
4986 len);
b481de9c
ZY
4987 memcpy(priv->ucode_init.v_addr, src, len);
4988 }
4989
4990 /* Initialization data (4th block) */
4991 if (init_data_size) {
4992 src = &ucode->data[inst_size + data_size + init_size];
4993 len = priv->ucode_init_data.len;
90e759d1
TW
4994 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
4995 len);
b481de9c
ZY
4996 memcpy(priv->ucode_init_data.v_addr, src, len);
4997 }
4998
4999 /* Bootstrap instructions (5th block) */
5000 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5001 len = priv->ucode_boot.len;
90e759d1 5002 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
5003 memcpy(priv->ucode_boot.v_addr, src, len);
5004
5005 /* We have our copies now, allow OS release its copies */
5006 release_firmware(ucode_raw);
5007 return 0;
5008
5009 err_pci_alloc:
5010 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 5011 ret = -ENOMEM;
bb8c093b 5012 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
5013
5014 err_release:
5015 release_firmware(ucode_raw);
5016
5017 error:
90e759d1 5018 return ret;
b481de9c
ZY
5019}
5020
5021
5022/**
bb8c093b 5023 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
5024 *
5025 * Tell initialization uCode where to find runtime uCode.
5026 *
5027 * BSM registers initially contain pointers to initialization uCode.
5028 * We need to replace them to load runtime uCode inst and data,
5029 * and to save runtime data when powering down.
5030 */
c79dd5b5 5031static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
5032{
5033 dma_addr_t pinst;
5034 dma_addr_t pdata;
5035 int rc = 0;
5036 unsigned long flags;
5037
5038 /* bits 35:4 for 4965 */
5039 pinst = priv->ucode_code.p_addr >> 4;
5040 pdata = priv->ucode_data_backup.p_addr >> 4;
5041
5042 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 5043 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
5044 if (rc) {
5045 spin_unlock_irqrestore(&priv->lock, flags);
5046 return rc;
5047 }
5048
5049 /* Tell bootstrap uCode where to find image to load */
3395f6e9
TW
5050 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5051 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5052 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
5053 priv->ucode_data.len);
5054
5055 /* Inst bytecount must be last to set up, bit 31 signals uCode
5056 * that all new ptr/size info is in place */
3395f6e9 5057 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
5058 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5059
3395f6e9 5060 iwl_release_nic_access(priv);
b481de9c
ZY
5061
5062 spin_unlock_irqrestore(&priv->lock, flags);
5063
5064 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5065
5066 return rc;
5067}
5068
5069/**
bb8c093b 5070 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
5071 *
5072 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5073 *
5074 * The 4965 "initialize" ALIVE reply contains calibration data for:
5075 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
5076 * (3945 does not contain this data).
5077 *
5078 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5079*/
c79dd5b5 5080static void iwl4965_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
5081{
5082 /* Check alive response for "valid" sign from uCode */
5083 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5084 /* We had an error bringing up the hardware, so take it
5085 * all the way back down so we can try again */
5086 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5087 goto restart;
5088 }
5089
5090 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5091 * This is a paranoid check, because we would not have gotten the
5092 * "initialize" alive if code weren't properly loaded. */
bb8c093b 5093 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY
5094 /* Runtime instruction load was bad;
5095 * take it all the way back down so we can try again */
5096 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5097 goto restart;
5098 }
5099
5100 /* Calculate temperature */
5101 priv->temperature = iwl4965_get_temperature(priv);
5102
5103 /* Send pointers to protocol/runtime uCode image ... init code will
5104 * load and launch runtime uCode, which will send us another "Alive"
5105 * notification. */
5106 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 5107 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY
5108 /* Runtime instruction load won't happen;
5109 * take it all the way back down so we can try again */
5110 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5111 goto restart;
5112 }
5113 return;
5114
5115 restart:
5116 queue_work(priv->workqueue, &priv->restart);
5117}
5118
5119
5120/**
bb8c093b 5121 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 5122 * from protocol/runtime uCode (initialization uCode's
bb8c093b 5123 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 5124 */
c79dd5b5 5125static void iwl4965_alive_start(struct iwl_priv *priv)
b481de9c 5126{
57aab75a 5127 int ret = 0;
b481de9c
ZY
5128
5129 IWL_DEBUG_INFO("Runtime Alive received.\n");
5130
5131 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5132 /* We had an error bringing up the hardware, so take it
5133 * all the way back down so we can try again */
5134 IWL_DEBUG_INFO("Alive failed.\n");
5135 goto restart;
5136 }
5137
5138 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5139 * This is a paranoid check, because we would not have gotten the
5140 * "runtime" alive if code weren't properly loaded. */
bb8c093b 5141 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY
5142 /* Runtime instruction load was bad;
5143 * take it all the way back down so we can try again */
5144 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5145 goto restart;
5146 }
5147
bf85ea4f 5148 iwlcore_clear_stations_table(priv);
b481de9c 5149
57aab75a
TW
5150 ret = priv->cfg->ops->lib->alive_notify(priv);
5151 if (ret) {
b481de9c 5152 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 5153 ret);
b481de9c
ZY
5154 goto restart;
5155 }
5156
9fbab516 5157 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
5158 set_bit(STATUS_ALIVE, &priv->status);
5159
5160 /* Clear out the uCode error bit if it is set */
5161 clear_bit(STATUS_FW_ERROR, &priv->status);
5162
fee1247a 5163 if (iwl_is_rfkill(priv))
b481de9c
ZY
5164 return;
5165
5a66926a 5166 ieee80211_start_queues(priv->hw);
b481de9c
ZY
5167
5168 priv->active_rate = priv->rates_mask;
5169 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5170
3109ece1 5171 if (iwl_is_associated(priv)) {
bb8c093b
CH
5172 struct iwl4965_rxon_cmd *active_rxon =
5173 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY
5174
5175 memcpy(&priv->staging_rxon, &priv->active_rxon,
5176 sizeof(priv->staging_rxon));
5177 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5178 } else {
5179 /* Initialize our rx_config data */
bb8c093b 5180 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
5181 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5182 }
5183
9fbab516 5184 /* Configure Bluetooth device coexistence support */
bb8c093b 5185 iwl4965_send_bt_config(priv);
b481de9c
ZY
5186
5187 /* Configure the adapter for unassociated operation */
bb8c093b 5188 iwl4965_commit_rxon(priv);
b481de9c
ZY
5189
5190 /* At this point, the NIC is initialized and operational */
5191 priv->notif_missed_beacons = 0;
b481de9c
ZY
5192
5193 iwl4965_rf_kill_ct_config(priv);
5a66926a 5194
fe00b5a5
RC
5195 iwl_leds_register(priv);
5196
b481de9c 5197 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 5198 set_bit(STATUS_READY, &priv->status);
5a66926a 5199 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
5200
5201 if (priv->error_recovering)
bb8c093b 5202 iwl4965_error_recovery(priv);
b481de9c 5203
c8381fdc 5204 iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
84363e6e 5205 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
b481de9c
ZY
5206 return;
5207
5208 restart:
5209 queue_work(priv->workqueue, &priv->restart);
5210}
5211
c79dd5b5 5212static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 5213
c79dd5b5 5214static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
5215{
5216 unsigned long flags;
5217 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5218 struct ieee80211_conf *conf = NULL;
5219
5220 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5221
5222 conf = ieee80211_get_hw_conf(priv->hw);
5223
5224 if (!exit_pending)
5225 set_bit(STATUS_EXIT_PENDING, &priv->status);
5226
ab53d8af
MA
5227 iwl_leds_unregister(priv);
5228
c8381fdc
MA
5229 iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
5230
bf85ea4f 5231 iwlcore_clear_stations_table(priv);
b481de9c
ZY
5232
5233 /* Unblock any waiting calls */
5234 wake_up_interruptible_all(&priv->wait_command_queue);
5235
b481de9c
ZY
5236 /* Wipe out the EXIT_PENDING status bit if we are not actually
5237 * exiting the module */
5238 if (!exit_pending)
5239 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5240
5241 /* stop and reset the on-board processor */
3395f6e9 5242 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
5243
5244 /* tell the device to stop sending interrupts */
0359facc 5245 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 5246 iwl4965_disable_interrupts(priv);
0359facc
MA
5247 spin_unlock_irqrestore(&priv->lock, flags);
5248 iwl_synchronize_irq(priv);
b481de9c
ZY
5249
5250 if (priv->mac80211_registered)
5251 ieee80211_stop_queues(priv->hw);
5252
bb8c093b 5253 /* If we have not previously called iwl4965_init() then
b481de9c 5254 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 5255 if (!iwl_is_init(priv)) {
b481de9c
ZY
5256 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5257 STATUS_RF_KILL_HW |
5258 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5259 STATUS_RF_KILL_SW |
9788864e
RC
5260 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5261 STATUS_GEO_CONFIGURED |
b481de9c
ZY
5262 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5263 STATUS_IN_SUSPEND;
5264 goto exit;
5265 }
5266
5267 /* ...otherwise clear out all the status bits but the RF Kill and
5268 * SUSPEND bits and continue taking the NIC down. */
5269 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5270 STATUS_RF_KILL_HW |
5271 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5272 STATUS_RF_KILL_SW |
9788864e
RC
5273 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5274 STATUS_GEO_CONFIGURED |
b481de9c
ZY
5275 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5276 STATUS_IN_SUSPEND |
5277 test_bit(STATUS_FW_ERROR, &priv->status) <<
5278 STATUS_FW_ERROR;
5279
5280 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 5281 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 5282 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
5283 spin_unlock_irqrestore(&priv->lock, flags);
5284
bb8c093b
CH
5285 iwl4965_hw_txq_ctx_stop(priv);
5286 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY
5287
5288 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
5289 if (!iwl_grab_nic_access(priv)) {
5290 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 5291 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 5292 iwl_release_nic_access(priv);
b481de9c
ZY
5293 }
5294 spin_unlock_irqrestore(&priv->lock, flags);
5295
5296 udelay(5);
5297
bb8c093b 5298 iwl4965_hw_nic_stop_master(priv);
3395f6e9 5299 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
bb8c093b 5300 iwl4965_hw_nic_reset(priv);
b481de9c
ZY
5301
5302 exit:
bb8c093b 5303 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY
5304
5305 if (priv->ibss_beacon)
5306 dev_kfree_skb(priv->ibss_beacon);
5307 priv->ibss_beacon = NULL;
5308
5309 /* clear out any free frames */
bb8c093b 5310 iwl4965_clear_free_frames(priv);
b481de9c
ZY
5311}
5312
c79dd5b5 5313static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
5314{
5315 mutex_lock(&priv->mutex);
bb8c093b 5316 __iwl4965_down(priv);
b481de9c 5317 mutex_unlock(&priv->mutex);
b24d22b1 5318
bb8c093b 5319 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY
5320}
5321
5322#define MAX_HW_RESTARTS 5
5323
c79dd5b5 5324static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 5325{
57aab75a
TW
5326 int i;
5327 int ret;
b481de9c
ZY
5328
5329 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5330 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5331 return -EIO;
5332 }
5333
5334 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5335 IWL_WARNING("Radio disabled by SW RF kill (module "
5336 "parameter)\n");
ad97edd2 5337 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY
5338 return -ENODEV;
5339 }
5340
e903fbd4
RC
5341 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5342 IWL_ERROR("ucode not available for device bringup\n");
5343 return -EIO;
5344 }
5345
e655b9f0 5346 /* If platform's RF_KILL switch is NOT set to KILL */
3395f6e9 5347 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
5348 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5349 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5350 else {
5351 set_bit(STATUS_RF_KILL_HW, &priv->status);
5352 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
ad97edd2 5353 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY
5354 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5355 return -ENODEV;
5356 }
b481de9c
ZY
5357 }
5358
ad97edd2 5359 iwl_rfkill_set_hw_state(priv);
3395f6e9 5360 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 5361
57aab75a
TW
5362 ret = priv->cfg->ops->lib->hw_nic_init(priv);
5363 if (ret) {
5364 IWL_ERROR("Unable to init nic\n");
5365 return ret;
b481de9c
ZY
5366 }
5367
5368 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
5369 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5370 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
5371 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5372
5373 /* clear (again), then enable host interrupts */
3395f6e9 5374 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 5375 iwl4965_enable_interrupts(priv);
b481de9c
ZY
5376
5377 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
5378 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5379 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
5380
5381 /* Copy original ucode data image from disk into backup cache.
5382 * This will be used to initialize the on-board processor's
5383 * data SRAM for a clean start when the runtime program first loads. */
5384 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 5385 priv->ucode_data.len);
b481de9c 5386
e655b9f0
ZY
5387 /* We return success when we resume from suspend and rf_kill is on. */
5388 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
b481de9c 5389 return 0;
b481de9c
ZY
5390
5391 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5392
bf85ea4f 5393 iwlcore_clear_stations_table(priv);
b481de9c
ZY
5394
5395 /* load bootstrap state machine,
5396 * load bootstrap program into processor's memory,
5397 * prepare to load the "initialize" uCode */
57aab75a 5398 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 5399
57aab75a
TW
5400 if (ret) {
5401 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
5402 continue;
5403 }
5404
5405 /* start card; "initialize" will load runtime ucode */
bb8c093b 5406 iwl4965_nic_start(priv);
b481de9c 5407
b481de9c
ZY
5408 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5409
5410 return 0;
5411 }
5412
5413 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 5414 __iwl4965_down(priv);
b481de9c
ZY
5415
5416 /* tried to restart and config the device for as long as our
5417 * patience could withstand */
5418 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5419 return -EIO;
5420}
5421
5422
5423/*****************************************************************************
5424 *
5425 * Workqueue callbacks
5426 *
5427 *****************************************************************************/
5428
bb8c093b 5429static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 5430{
c79dd5b5
TW
5431 struct iwl_priv *priv =
5432 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
5433
5434 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5435 return;
5436
5437 mutex_lock(&priv->mutex);
bb8c093b 5438 iwl4965_init_alive_start(priv);
b481de9c
ZY
5439 mutex_unlock(&priv->mutex);
5440}
5441
bb8c093b 5442static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 5443{
c79dd5b5
TW
5444 struct iwl_priv *priv =
5445 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
5446
5447 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5448 return;
5449
5450 mutex_lock(&priv->mutex);
bb8c093b 5451 iwl4965_alive_start(priv);
b481de9c
ZY
5452 mutex_unlock(&priv->mutex);
5453}
5454
bb8c093b 5455static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 5456{
c79dd5b5 5457 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
5458
5459 wake_up_interruptible(&priv->wait_command_queue);
5460
5461 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5462 return;
5463
5464 mutex_lock(&priv->mutex);
5465
fee1247a 5466 if (!iwl_is_rfkill(priv)) {
b481de9c
ZY
5467 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5468 "HW and/or SW RF Kill no longer active, restarting "
5469 "device\n");
5470 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5471 queue_work(priv->workqueue, &priv->restart);
5472 } else {
ad97edd2
MA
5473 /* make sure mac80211 stop sending Tx frame */
5474 if (priv->mac80211_registered)
5475 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
5476
5477 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5478 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5479 "disabled by SW switch\n");
5480 else
5481 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
5482 "Kill switch must be turned off for "
5483 "wireless networking to work.\n");
5484 }
ad97edd2
MA
5485 iwl_rfkill_set_hw_state(priv);
5486
b481de9c
ZY
5487 mutex_unlock(&priv->mutex);
5488}
5489
5490#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5491
bb8c093b 5492static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 5493{
c79dd5b5
TW
5494 struct iwl_priv *priv =
5495 container_of(data, struct iwl_priv, scan_check.work);
b481de9c
ZY
5496
5497 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5498 return;
5499
5500 mutex_lock(&priv->mutex);
5501 if (test_bit(STATUS_SCANNING, &priv->status) ||
5502 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5503 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5504 "Scan completion watchdog resetting adapter (%dms)\n",
5505 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 5506
b481de9c 5507 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 5508 iwl4965_send_scan_abort(priv);
b481de9c
ZY
5509 }
5510 mutex_unlock(&priv->mutex);
5511}
5512
bb8c093b 5513static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 5514{
c79dd5b5
TW
5515 struct iwl_priv *priv =
5516 container_of(data, struct iwl_priv, request_scan);
857485c0 5517 struct iwl_host_cmd cmd = {
b481de9c 5518 .id = REPLY_SCAN_CMD,
bb8c093b 5519 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY
5520 .meta.flags = CMD_SIZE_HUGE,
5521 };
bb8c093b 5522 struct iwl4965_scan_cmd *scan;
b481de9c 5523 struct ieee80211_conf *conf = NULL;
78330fdd 5524 u16 cmd_len;
8318d78a 5525 enum ieee80211_band band;
78330fdd 5526 u8 direct_mask;
857485c0 5527 int ret = 0;
b481de9c
ZY
5528
5529 conf = ieee80211_get_hw_conf(priv->hw);
5530
5531 mutex_lock(&priv->mutex);
5532
fee1247a 5533 if (!iwl_is_ready(priv)) {
b481de9c
ZY
5534 IWL_WARNING("request scan called when driver not ready.\n");
5535 goto done;
5536 }
5537
5538 /* Make sure the scan wasn't cancelled before this queued work
5539 * was given the chance to run... */
5540 if (!test_bit(STATUS_SCANNING, &priv->status))
5541 goto done;
5542
5543 /* This should never be called or scheduled if there is currently
5544 * a scan active in the hardware. */
5545 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5546 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5547 "Ignoring second request.\n");
857485c0 5548 ret = -EIO;
b481de9c
ZY
5549 goto done;
5550 }
5551
5552 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5553 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5554 goto done;
5555 }
5556
5557 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5558 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5559 goto done;
5560 }
5561
fee1247a 5562 if (iwl_is_rfkill(priv)) {
b481de9c
ZY
5563 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5564 goto done;
5565 }
5566
5567 if (!test_bit(STATUS_READY, &priv->status)) {
5568 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
5569 goto done;
5570 }
5571
5572 if (!priv->scan_bands) {
5573 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5574 goto done;
5575 }
5576
5577 if (!priv->scan) {
bb8c093b 5578 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY
5579 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5580 if (!priv->scan) {
857485c0 5581 ret = -ENOMEM;
b481de9c
ZY
5582 goto done;
5583 }
5584 }
5585 scan = priv->scan;
bb8c093b 5586 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
5587
5588 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5589 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5590
3109ece1 5591 if (iwl_is_associated(priv)) {
b481de9c
ZY
5592 u16 interval = 0;
5593 u32 extra;
5594 u32 suspend_time = 100;
5595 u32 scan_suspend_time = 100;
5596 unsigned long flags;
5597
5598 IWL_DEBUG_INFO("Scanning while associated...\n");
5599
5600 spin_lock_irqsave(&priv->lock, flags);
5601 interval = priv->beacon_int;
5602 spin_unlock_irqrestore(&priv->lock, flags);
5603
5604 scan->suspend_time = 0;
052c4b9f 5605 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
5606 if (!interval)
5607 interval = suspend_time;
5608
5609 extra = (suspend_time / interval) << 22;
5610 scan_suspend_time = (extra |
5611 ((suspend_time % interval) * 1024));
5612 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5613 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5614 scan_suspend_time, interval);
5615 }
5616
5617 /* We should add the ability for user to lock to PASSIVE ONLY */
5618 if (priv->one_direct_scan) {
5619 IWL_DEBUG_SCAN
5620 ("Kicking off one direct scan for '%s'\n",
bb8c093b 5621 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY
5622 priv->direct_ssid_len));
5623 scan->direct_scan[0].id = WLAN_EID_SSID;
5624 scan->direct_scan[0].len = priv->direct_ssid_len;
5625 memcpy(scan->direct_scan[0].ssid,
5626 priv->direct_ssid, priv->direct_ssid_len);
5627 direct_mask = 1;
3109ece1 5628 } else if (!iwl_is_associated(priv) && priv->essid_len) {
786b4557
BM
5629 IWL_DEBUG_SCAN
5630 ("Kicking off one direct scan for '%s' when not associated\n",
5631 iwl4965_escape_essid(priv->essid, priv->essid_len));
b481de9c
ZY
5632 scan->direct_scan[0].id = WLAN_EID_SSID;
5633 scan->direct_scan[0].len = priv->essid_len;
5634 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
5635 direct_mask = 1;
857485c0 5636 } else {
786b4557 5637 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
b481de9c 5638 direct_mask = 0;
857485c0 5639 }
b481de9c 5640
b481de9c 5641 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
5425e490 5642 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
5643 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
5644
b481de9c
ZY
5645
5646 switch (priv->scan_bands) {
5647 case 2:
5648 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
5649 scan->tx_cmd.rate_n_flags =
bb8c093b 5650 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY
5651 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
5652
5653 scan->good_CRC_th = 0;
8318d78a 5654 band = IEEE80211_BAND_2GHZ;
b481de9c
ZY
5655 break;
5656
5657 case 1:
5658 scan->tx_cmd.rate_n_flags =
bb8c093b 5659 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY
5660 RATE_MCS_ANT_B_MSK);
5661 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 5662 band = IEEE80211_BAND_5GHZ;
b481de9c
ZY
5663 break;
5664
5665 default:
5666 IWL_WARNING("Invalid scan band count\n");
5667 goto done;
5668 }
5669
78330fdd
TW
5670 /* We don't build a direct scan probe request; the uCode will do
5671 * that based on the direct_mask added to each channel entry */
5672 cmd_len = iwl4965_fill_probe_req(priv, band,
5673 (struct ieee80211_mgmt *)scan->data,
5674 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
5675
5676 scan->tx_cmd.len = cpu_to_le16(cmd_len);
b481de9c
ZY
5677 /* select Rx chains */
5678
5679 /* Force use of chains B and C (0x6) for scan Rx.
5680 * Avoid A (0x1) because of its off-channel reception on A-band.
5681 * MIMO is not used here, but value is required to make uCode happy. */
5682 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
5683 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
5684 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
5685 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
5686
5687 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
5688 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
5689
786b4557 5690 if (direct_mask)
26c0f03f
RC
5691 scan->channel_count =
5692 iwl4965_get_channels_for_scan(
5693 priv, band, 1, /* active */
5694 direct_mask,
5695 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
786b4557 5696 else
26c0f03f
RC
5697 scan->channel_count =
5698 iwl4965_get_channels_for_scan(
5699 priv, band, 0, /* passive */
5700 direct_mask,
5701 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 5702
5da4b55f
MA
5703 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
5704 RXON_FILTER_BCON_AWARE_MSK);
b481de9c 5705 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 5706 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY
5707 cmd.data = scan;
5708 scan->len = cpu_to_le16(cmd.len);
5709
5710 set_bit(STATUS_SCAN_HW, &priv->status);
857485c0
TW
5711 ret = iwl_send_cmd_sync(priv, &cmd);
5712 if (ret)
b481de9c
ZY
5713 goto done;
5714
5715 queue_delayed_work(priv->workqueue, &priv->scan_check,
5716 IWL_SCAN_CHECK_WATCHDOG);
5717
5718 mutex_unlock(&priv->mutex);
5719 return;
5720
5721 done:
01ebd063 5722 /* inform mac80211 scan aborted */
b481de9c
ZY
5723 queue_work(priv->workqueue, &priv->scan_completed);
5724 mutex_unlock(&priv->mutex);
5725}
5726
bb8c093b 5727static void iwl4965_bg_up(struct work_struct *data)
b481de9c 5728{
c79dd5b5 5729 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
5730
5731 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5732 return;
5733
5734 mutex_lock(&priv->mutex);
bb8c093b 5735 __iwl4965_up(priv);
b481de9c
ZY
5736 mutex_unlock(&priv->mutex);
5737}
5738
bb8c093b 5739static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 5740{
c79dd5b5 5741 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
5742
5743 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5744 return;
5745
bb8c093b 5746 iwl4965_down(priv);
b481de9c
ZY
5747 queue_work(priv->workqueue, &priv->up);
5748}
5749
bb8c093b 5750static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 5751{
c79dd5b5
TW
5752 struct iwl_priv *priv =
5753 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
5754
5755 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5756 return;
5757
5758 mutex_lock(&priv->mutex);
bb8c093b 5759 iwl4965_rx_replenish(priv);
b481de9c
ZY
5760 mutex_unlock(&priv->mutex);
5761}
5762
7878a5a4
MA
5763#define IWL_DELAY_NEXT_SCAN (HZ*2)
5764
508e32e1 5765static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 5766{
b481de9c 5767 struct ieee80211_conf *conf = NULL;
857485c0 5768 int ret = 0;
0795af57 5769 DECLARE_MAC_BUF(mac);
b481de9c
ZY
5770
5771 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
5772 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
5773 return;
5774 }
5775
0795af57
JP
5776 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
5777 priv->assoc_id,
5778 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY
5779
5780
5781 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5782 return;
5783
b481de9c 5784
508e32e1 5785 if (!priv->vif || !priv->is_open)
948c171c 5786 return;
508e32e1 5787
bb8c093b 5788 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 5789
b481de9c
ZY
5790 conf = ieee80211_get_hw_conf(priv->hw);
5791
5792 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 5793 iwl4965_commit_rxon(priv);
b481de9c 5794
bb8c093b
CH
5795 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
5796 iwl4965_setup_rxon_timing(priv);
857485c0 5797 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 5798 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 5799 if (ret)
b481de9c
ZY
5800 IWL_WARNING("REPLY_RXON_TIMING failed - "
5801 "Attempting to continue.\n");
5802
5803 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5804
c8b0e6e1 5805#ifdef CONFIG_IWL4965_HT
fd105e79
RR
5806 if (priv->current_ht_config.is_ht)
5807 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 5808#endif /* CONFIG_IWL4965_HT*/
b481de9c
ZY
5809 iwl4965_set_rxon_chain(priv);
5810 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
5811
5812 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
5813 priv->assoc_id, priv->beacon_int);
5814
5815 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
5816 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5817 else
5818 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5819
5820 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
5821 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
5822 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
5823 else
5824 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5825
5826 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
5827 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5828
5829 }
5830
bb8c093b 5831 iwl4965_commit_rxon(priv);
b481de9c
ZY
5832
5833 switch (priv->iw_mode) {
5834 case IEEE80211_IF_TYPE_STA:
bb8c093b 5835 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
5836 break;
5837
5838 case IEEE80211_IF_TYPE_IBSS:
5839
5840 /* clear out the station table */
bf85ea4f 5841 iwlcore_clear_stations_table(priv);
b481de9c 5842
bb8c093b
CH
5843 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
5844 iwl4965_rxon_add_station(priv, priv->bssid, 0);
5845 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
5846 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
5847
5848 break;
5849
5850 default:
5851 IWL_ERROR("%s Should not be called in %d mode\n",
5852 __FUNCTION__, priv->iw_mode);
5853 break;
5854 }
5855
bb8c093b 5856 iwl4965_sequence_reset(priv);
b481de9c 5857
b481de9c 5858 /* Enable Rx differential gain and sensitivity calibrations */
f0832f13 5859 iwl_chain_noise_reset(priv);
b481de9c 5860 priv->start_calib = 1;
b481de9c
ZY
5861
5862 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
5863 priv->assoc_station_added = 1;
5864
bb8c093b 5865 iwl4965_activate_qos(priv, 0);
292ae174 5866
5da4b55f 5867 iwl_power_update_mode(priv, 0);
7878a5a4
MA
5868 /* we have just associated, don't start scan too early */
5869 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
508e32e1
RC
5870}
5871
5872
5873static void iwl4965_bg_post_associate(struct work_struct *data)
5874{
5875 struct iwl_priv *priv = container_of(data, struct iwl_priv,
5876 post_associate.work);
5877
5878 mutex_lock(&priv->mutex);
5879 iwl4965_post_associate(priv);
b481de9c 5880 mutex_unlock(&priv->mutex);
508e32e1 5881
b481de9c
ZY
5882}
5883
bb8c093b 5884static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 5885{
c79dd5b5 5886 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
b481de9c 5887
fee1247a 5888 if (!iwl_is_ready(priv))
b481de9c
ZY
5889 return;
5890
5891 mutex_lock(&priv->mutex);
5892
5893 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 5894 iwl4965_send_scan_abort(priv);
b481de9c
ZY
5895
5896 mutex_unlock(&priv->mutex);
5897}
5898
76bb77e0
ZY
5899static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
5900
bb8c093b 5901static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 5902{
c79dd5b5
TW
5903 struct iwl_priv *priv =
5904 container_of(work, struct iwl_priv, scan_completed);
b481de9c
ZY
5905
5906 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
5907
5908 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5909 return;
5910
a0646470
ZY
5911 if (test_bit(STATUS_CONF_PENDING, &priv->status))
5912 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 5913
b481de9c
ZY
5914 ieee80211_scan_completed(priv->hw);
5915
5916 /* Since setting the TXPOWER may have been deferred while
5917 * performing the scan, fire one off */
5918 mutex_lock(&priv->mutex);
bb8c093b 5919 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY
5920 mutex_unlock(&priv->mutex);
5921}
5922
5923/*****************************************************************************
5924 *
5925 * mac80211 entry point functions
5926 *
5927 *****************************************************************************/
5928
5a66926a
ZY
5929#define UCODE_READY_TIMEOUT (2 * HZ)
5930
bb8c093b 5931static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 5932{
c79dd5b5 5933 struct iwl_priv *priv = hw->priv;
5a66926a 5934 int ret;
b481de9c
ZY
5935
5936 IWL_DEBUG_MAC80211("enter\n");
5937
5a66926a
ZY
5938 if (pci_enable_device(priv->pci_dev)) {
5939 IWL_ERROR("Fail to pci_enable_device\n");
5940 return -ENODEV;
5941 }
5942 pci_restore_state(priv->pci_dev);
5943 pci_enable_msi(priv->pci_dev);
5944
5945 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
5946 DRV_NAME, priv);
5947 if (ret) {
5948 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
5949 goto out_disable_msi;
5950 }
5951
b481de9c
ZY
5952 /* we should be verifying the device is ready to be opened */
5953 mutex_lock(&priv->mutex);
5954
5a66926a
ZY
5955 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
5956 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
5957 * ucode filename and max sizes are card-specific. */
b481de9c 5958
5a66926a
ZY
5959 if (!priv->ucode_code.len) {
5960 ret = iwl4965_read_ucode(priv);
5961 if (ret) {
5962 IWL_ERROR("Could not read microcode: %d\n", ret);
5963 mutex_unlock(&priv->mutex);
5964 goto out_release_irq;
5965 }
5966 }
b481de9c 5967
e655b9f0 5968 ret = __iwl4965_up(priv);
5a66926a 5969
b481de9c 5970 mutex_unlock(&priv->mutex);
5a66926a 5971
e655b9f0
ZY
5972 if (ret)
5973 goto out_release_irq;
5974
5975 IWL_DEBUG_INFO("Start UP work done.\n");
5976
5977 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
5978 return 0;
5979
5a66926a
ZY
5980 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
5981 * mac80211 will not be run successfully. */
5982 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
5983 test_bit(STATUS_READY, &priv->status),
5984 UCODE_READY_TIMEOUT);
5985 if (!ret) {
5986 if (!test_bit(STATUS_READY, &priv->status)) {
5987 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
5988 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5989 ret = -ETIMEDOUT;
5990 goto out_release_irq;
5991 }
5992 }
5993
e655b9f0 5994 priv->is_open = 1;
b481de9c
ZY
5995 IWL_DEBUG_MAC80211("leave\n");
5996 return 0;
5a66926a
ZY
5997
5998out_release_irq:
5999 free_irq(priv->pci_dev->irq, priv);
6000out_disable_msi:
6001 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
6002 pci_disable_device(priv->pci_dev);
6003 priv->is_open = 0;
6004 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 6005 return ret;
b481de9c
ZY
6006}
6007
bb8c093b 6008static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 6009{
c79dd5b5 6010 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6011
6012 IWL_DEBUG_MAC80211("enter\n");
948c171c 6013
e655b9f0
ZY
6014 if (!priv->is_open) {
6015 IWL_DEBUG_MAC80211("leave - skip\n");
6016 return;
6017 }
6018
b481de9c 6019 priv->is_open = 0;
5a66926a 6020
fee1247a 6021 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
6022 /* stop mac, cancel any scan request and clear
6023 * RXON_FILTER_ASSOC_MSK BIT
6024 */
5a66926a
ZY
6025 mutex_lock(&priv->mutex);
6026 iwl4965_scan_cancel_timeout(priv, 100);
6027 cancel_delayed_work(&priv->post_associate);
fde3571f 6028 mutex_unlock(&priv->mutex);
fde3571f
MA
6029 }
6030
5a66926a
ZY
6031 iwl4965_down(priv);
6032
6033 flush_workqueue(priv->workqueue);
6034 free_irq(priv->pci_dev->irq, priv);
6035 pci_disable_msi(priv->pci_dev);
6036 pci_save_state(priv->pci_dev);
6037 pci_disable_device(priv->pci_dev);
948c171c 6038
b481de9c 6039 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
6040}
6041
bb8c093b 6042static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY
6043 struct ieee80211_tx_control *ctl)
6044{
c79dd5b5 6045 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6046
6047 IWL_DEBUG_MAC80211("enter\n");
6048
6049 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6050 IWL_DEBUG_MAC80211("leave - monitor\n");
6051 return -1;
6052 }
6053
6054 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
8318d78a 6055 ctl->tx_rate->bitrate);
b481de9c 6056
bb8c093b 6057 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY
6058 dev_kfree_skb_any(skb);
6059
6060 IWL_DEBUG_MAC80211("leave\n");
6061 return 0;
6062}
6063
bb8c093b 6064static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
6065 struct ieee80211_if_init_conf *conf)
6066{
c79dd5b5 6067 struct iwl_priv *priv = hw->priv;
b481de9c 6068 unsigned long flags;
0795af57 6069 DECLARE_MAC_BUF(mac);
b481de9c 6070
32bfd35d 6071 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 6072
32bfd35d
JB
6073 if (priv->vif) {
6074 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 6075 return -EOPNOTSUPP;
b481de9c
ZY
6076 }
6077
6078 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 6079 priv->vif = conf->vif;
b481de9c
ZY
6080
6081 spin_unlock_irqrestore(&priv->lock, flags);
6082
6083 mutex_lock(&priv->mutex);
864792e3
TW
6084
6085 if (conf->mac_addr) {
6086 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
6087 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6088 }
b481de9c 6089
fee1247a 6090 if (iwl_is_ready(priv))
5a66926a
ZY
6091 iwl4965_set_mode(priv, conf->type);
6092
b481de9c
ZY
6093 mutex_unlock(&priv->mutex);
6094
5a66926a 6095 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
6096 return 0;
6097}
6098
6099/**
bb8c093b 6100 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
6101 *
6102 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6103 * be set inappropriately and the driver currently sets the hardware up to
6104 * use it whenever needed.
6105 */
bb8c093b 6106static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 6107{
c79dd5b5 6108 struct iwl_priv *priv = hw->priv;
bf85ea4f 6109 const struct iwl_channel_info *ch_info;
b481de9c 6110 unsigned long flags;
76bb77e0 6111 int ret = 0;
b481de9c
ZY
6112
6113 mutex_lock(&priv->mutex);
8318d78a 6114 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 6115
12342c47
ZY
6116 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6117
fee1247a 6118 if (!iwl_is_ready(priv)) {
b481de9c 6119 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
6120 ret = -EIO;
6121 goto out;
b481de9c
ZY
6122 }
6123
1ea87396 6124 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 6125 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY
6126 IWL_DEBUG_MAC80211("leave - scanning\n");
6127 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 6128 mutex_unlock(&priv->mutex);
a0646470 6129 return 0;
b481de9c
ZY
6130 }
6131
6132 spin_lock_irqsave(&priv->lock, flags);
6133
8622e705 6134 ch_info = iwl_get_channel_info(priv, conf->channel->band,
8318d78a 6135 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 6136 if (!is_channel_valid(ch_info)) {
b481de9c
ZY
6137 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6138 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY
6139 ret = -EINVAL;
6140 goto out;
b481de9c
ZY
6141 }
6142
c8b0e6e1 6143#ifdef CONFIG_IWL4965_HT
78330fdd 6144 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
6145 * from any ht related info since 2.4 does not
6146 * support ht */
78330fdd 6147 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
b481de9c
ZY
6148#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6149 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
6150#endif
6151 )
6152 priv->staging_rxon.flags = 0;
c8b0e6e1 6153#endif /* CONFIG_IWL4965_HT */
b481de9c 6154
bf85ea4f 6155 iwlcore_set_rxon_channel(priv, conf->channel->band,
8318d78a 6156 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 6157
8318d78a 6158 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
b481de9c
ZY
6159
6160 /* The list of supported rates and rate mask can be different
8318d78a 6161 * for each band; since the band may have changed, reset
b481de9c 6162 * the rate mask to what mac80211 lists */
bb8c093b 6163 iwl4965_set_rate(priv);
b481de9c
ZY
6164
6165 spin_unlock_irqrestore(&priv->lock, flags);
6166
6167#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6168 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 6169 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 6170 goto out;
b481de9c
ZY
6171 }
6172#endif
6173
ad97edd2
MA
6174 if (priv->cfg->ops->lib->radio_kill_sw)
6175 priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY
6176
6177 if (!conf->radio_enabled) {
6178 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 6179 goto out;
b481de9c
ZY
6180 }
6181
fee1247a 6182 if (iwl_is_rfkill(priv)) {
b481de9c 6183 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
6184 ret = -EIO;
6185 goto out;
b481de9c
ZY
6186 }
6187
bb8c093b 6188 iwl4965_set_rate(priv);
b481de9c
ZY
6189
6190 if (memcmp(&priv->active_rxon,
6191 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 6192 iwl4965_commit_rxon(priv);
b481de9c
ZY
6193 else
6194 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6195
6196 IWL_DEBUG_MAC80211("leave\n");
6197
a0646470
ZY
6198out:
6199 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 6200 mutex_unlock(&priv->mutex);
76bb77e0 6201 return ret;
b481de9c
ZY
6202}
6203
c79dd5b5 6204static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 6205{
857485c0 6206 int ret = 0;
b481de9c 6207
d986bcd1 6208 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
6209 return;
6210
6211 /* The following should be done only at AP bring up */
6212 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6213
6214 /* RXON - unassoc (to set timing command) */
6215 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6216 iwl4965_commit_rxon(priv);
b481de9c
ZY
6217
6218 /* RXON Timing */
bb8c093b
CH
6219 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
6220 iwl4965_setup_rxon_timing(priv);
857485c0 6221 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 6222 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 6223 if (ret)
b481de9c
ZY
6224 IWL_WARNING("REPLY_RXON_TIMING failed - "
6225 "Attempting to continue.\n");
6226
6227 iwl4965_set_rxon_chain(priv);
6228
6229 /* FIXME: what should be the assoc_id for AP? */
6230 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6231 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6232 priv->staging_rxon.flags |=
6233 RXON_FLG_SHORT_PREAMBLE_MSK;
6234 else
6235 priv->staging_rxon.flags &=
6236 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6237
6238 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6239 if (priv->assoc_capability &
6240 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6241 priv->staging_rxon.flags |=
6242 RXON_FLG_SHORT_SLOT_MSK;
6243 else
6244 priv->staging_rxon.flags &=
6245 ~RXON_FLG_SHORT_SLOT_MSK;
6246
6247 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6248 priv->staging_rxon.flags &=
6249 ~RXON_FLG_SHORT_SLOT_MSK;
6250 }
6251 /* restore RXON assoc */
6252 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 6253 iwl4965_commit_rxon(priv);
bb8c093b 6254 iwl4965_activate_qos(priv, 1);
bb8c093b 6255 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 6256 }
bb8c093b 6257 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
6258
6259 /* FIXME - we need to add code here to detect a totally new
6260 * configuration, reset the AP, unassoc, rxon timing, assoc,
6261 * clear sta table, add BCAST sta... */
6262}
6263
32bfd35d
JB
6264static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
6265 struct ieee80211_vif *vif,
b481de9c
ZY
6266 struct ieee80211_if_conf *conf)
6267{
c79dd5b5 6268 struct iwl_priv *priv = hw->priv;
0795af57 6269 DECLARE_MAC_BUF(mac);
b481de9c
ZY
6270 unsigned long flags;
6271 int rc;
6272
6273 if (conf == NULL)
6274 return -EIO;
6275
b716bb91
EG
6276 if (priv->vif != vif) {
6277 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
6278 return 0;
6279 }
6280
b481de9c
ZY
6281 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6282 (!conf->beacon || !conf->ssid_len)) {
6283 IWL_DEBUG_MAC80211
6284 ("Leaving in AP mode because HostAPD is not ready.\n");
6285 return 0;
6286 }
6287
fee1247a 6288 if (!iwl_is_alive(priv))
5a66926a
ZY
6289 return -EAGAIN;
6290
b481de9c
ZY
6291 mutex_lock(&priv->mutex);
6292
b481de9c 6293 if (conf->bssid)
0795af57
JP
6294 IWL_DEBUG_MAC80211("bssid: %s\n",
6295 print_mac(mac, conf->bssid));
b481de9c 6296
4150c572
JB
6297/*
6298 * very dubious code was here; the probe filtering flag is never set:
6299 *
b481de9c
ZY
6300 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6301 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 6302 */
b481de9c
ZY
6303
6304 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6305 if (!conf->bssid) {
6306 conf->bssid = priv->mac_addr;
6307 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP
6308 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6309 print_mac(mac, conf->bssid));
b481de9c
ZY
6310 }
6311 if (priv->ibss_beacon)
6312 dev_kfree_skb(priv->ibss_beacon);
6313
6314 priv->ibss_beacon = conf->beacon;
6315 }
6316
fee1247a 6317 if (iwl_is_rfkill(priv))
fde3571f
MA
6318 goto done;
6319
b481de9c
ZY
6320 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6321 !is_multicast_ether_addr(conf->bssid)) {
6322 /* If there is currently a HW scan going on in the background
6323 * then we need to cancel it else the RXON below will fail. */
bb8c093b 6324 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
6325 IWL_WARNING("Aborted scan still in progress "
6326 "after 100ms\n");
6327 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6328 mutex_unlock(&priv->mutex);
6329 return -EAGAIN;
6330 }
6331 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6332
6333 /* TODO: Audit driver for usage of these members and see
6334 * if mac80211 deprecates them (priv->bssid looks like it
6335 * shouldn't be there, but I haven't scanned the IBSS code
6336 * to verify) - jpk */
6337 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6338
6339 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6340 iwl4965_config_ap(priv);
b481de9c 6341 else {
bb8c093b 6342 rc = iwl4965_commit_rxon(priv);
b481de9c 6343 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 6344 iwl4965_rxon_add_station(
b481de9c
ZY
6345 priv, priv->active_rxon.bssid_addr, 1);
6346 }
6347
6348 } else {
bb8c093b 6349 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 6350 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6351 iwl4965_commit_rxon(priv);
b481de9c
ZY
6352 }
6353
fde3571f 6354 done:
b481de9c
ZY
6355 spin_lock_irqsave(&priv->lock, flags);
6356 if (!conf->ssid_len)
6357 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6358 else
6359 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6360
6361 priv->essid_len = conf->ssid_len;
6362 spin_unlock_irqrestore(&priv->lock, flags);
6363
6364 IWL_DEBUG_MAC80211("leave\n");
6365 mutex_unlock(&priv->mutex);
6366
6367 return 0;
6368}
6369
bb8c093b 6370static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
6371 unsigned int changed_flags,
6372 unsigned int *total_flags,
6373 int mc_count, struct dev_addr_list *mc_list)
6374{
6375 /*
6376 * XXX: dummy
bb8c093b 6377 * see also iwl4965_connection_init_rx_config
4150c572
JB
6378 */
6379 *total_flags = 0;
6380}
6381
bb8c093b 6382static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
6383 struct ieee80211_if_init_conf *conf)
6384{
c79dd5b5 6385 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6386
6387 IWL_DEBUG_MAC80211("enter\n");
6388
6389 mutex_lock(&priv->mutex);
948c171c 6390
fee1247a 6391 if (iwl_is_ready_rf(priv)) {
fde3571f
MA
6392 iwl4965_scan_cancel_timeout(priv, 100);
6393 cancel_delayed_work(&priv->post_associate);
6394 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6395 iwl4965_commit_rxon(priv);
6396 }
32bfd35d
JB
6397 if (priv->vif == conf->vif) {
6398 priv->vif = NULL;
b481de9c
ZY
6399 memset(priv->bssid, 0, ETH_ALEN);
6400 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6401 priv->essid_len = 0;
6402 }
6403 mutex_unlock(&priv->mutex);
6404
6405 IWL_DEBUG_MAC80211("leave\n");
6406
6407}
471b3efd 6408
3109ece1 6409#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB
6410static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
6411 struct ieee80211_vif *vif,
6412 struct ieee80211_bss_conf *bss_conf,
6413 u32 changes)
220173b0 6414{
c79dd5b5 6415 struct iwl_priv *priv = hw->priv;
220173b0 6416
3109ece1
TW
6417 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6418
471b3efd 6419 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
6420 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6421 bss_conf->use_short_preamble);
471b3efd 6422 if (bss_conf->use_short_preamble)
220173b0
TW
6423 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6424 else
6425 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6426 }
6427
471b3efd 6428 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 6429 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 6430 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
6431 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6432 else
6433 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6434 }
6435
98952d5d 6436 if (changes & BSS_CHANGED_HT) {
3109ece1 6437 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d
TW
6438 iwl4965_ht_conf(priv, bss_conf);
6439 iwl4965_set_rxon_chain(priv);
6440 }
6441
471b3efd 6442 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 6443 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
6444 /* This should never happen as this function should
6445 * never be called from interrupt context. */
6446 if (WARN_ON_ONCE(in_interrupt()))
6447 return;
3109ece1
TW
6448 if (bss_conf->assoc) {
6449 priv->assoc_id = bss_conf->aid;
6450 priv->beacon_int = bss_conf->beacon_int;
6451 priv->timestamp = bss_conf->timestamp;
6452 priv->assoc_capability = bss_conf->assoc_capability;
6453 priv->next_scan_jiffies = jiffies +
6454 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC
6455 mutex_lock(&priv->mutex);
6456 iwl4965_post_associate(priv);
6457 mutex_unlock(&priv->mutex);
3109ece1
TW
6458 } else {
6459 priv->assoc_id = 0;
6460 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6461 }
6462 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
6463 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 6464 iwl_send_rxon_assoc(priv);
471b3efd
JB
6465 }
6466
220173b0 6467}
b481de9c 6468
bb8c093b 6469static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY
6470{
6471 int rc = 0;
6472 unsigned long flags;
c79dd5b5 6473 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6474
6475 IWL_DEBUG_MAC80211("enter\n");
6476
052c4b9f 6477 mutex_lock(&priv->mutex);
b481de9c
ZY
6478 spin_lock_irqsave(&priv->lock, flags);
6479
fee1247a 6480 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6481 rc = -EIO;
6482 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6483 goto out_unlock;
6484 }
6485
6486 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
6487 rc = -EIO;
6488 IWL_ERROR("ERROR: APs don't scan\n");
6489 goto out_unlock;
6490 }
6491
7878a5a4
MA
6492 /* we don't schedule scan within next_scan_jiffies period */
6493 if (priv->next_scan_jiffies &&
6494 time_after(priv->next_scan_jiffies, jiffies)) {
6495 rc = -EAGAIN;
6496 goto out_unlock;
6497 }
b481de9c 6498 /* if we just finished scan ask for delay */
7878a5a4
MA
6499 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
6500 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY
6501 rc = -EAGAIN;
6502 goto out_unlock;
6503 }
6504 if (len) {
7878a5a4 6505 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 6506 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY
6507
6508 priv->one_direct_scan = 1;
6509 priv->direct_ssid_len = (u8)
6510 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6511 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA
6512 } else
6513 priv->one_direct_scan = 0;
b481de9c 6514
bb8c093b 6515 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY
6516
6517 IWL_DEBUG_MAC80211("leave\n");
6518
6519out_unlock:
6520 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 6521 mutex_unlock(&priv->mutex);
b481de9c
ZY
6522
6523 return rc;
6524}
6525
ab885f8c
EG
6526static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
6527 struct ieee80211_key_conf *keyconf, const u8 *addr,
6528 u32 iv32, u16 *phase1key)
6529{
6530 struct iwl_priv *priv = hw->priv;
6531 u8 sta_id = IWL_INVALID_STATION;
6532 unsigned long flags;
6533 __le16 key_flags = 0;
6534 int i;
6535 DECLARE_MAC_BUF(mac);
6536
6537 IWL_DEBUG_MAC80211("enter\n");
6538
947b13a7 6539 sta_id = iwl_find_station(priv, addr);
ab885f8c
EG
6540 if (sta_id == IWL_INVALID_STATION) {
6541 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6542 print_mac(mac, addr));
6543 return;
6544 }
6545
6546 iwl4965_scan_cancel_timeout(priv, 100);
6547
6548 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
6549 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
6550 key_flags &= ~STA_KEY_FLG_INVALID;
6551
5425e490 6552 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG
6553 key_flags |= STA_KEY_MULTICAST_MSK;
6554
6555 spin_lock_irqsave(&priv->sta_lock, flags);
6556
ab885f8c
EG
6557 priv->stations[sta_id].sta.key.key_flags = key_flags;
6558 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
6559
6560 for (i = 0; i < 5; i++)
6561 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
6562 cpu_to_le16(phase1key[i]);
6563
6564 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
6565 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
6566
6567 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
6568
6569 spin_unlock_irqrestore(&priv->sta_lock, flags);
6570
6571 IWL_DEBUG_MAC80211("leave\n");
6572}
6573
bb8c093b 6574static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
6575 const u8 *local_addr, const u8 *addr,
6576 struct ieee80211_key_conf *key)
6577{
c79dd5b5 6578 struct iwl_priv *priv = hw->priv;
0795af57 6579 DECLARE_MAC_BUF(mac);
deb09c43
EG
6580 int ret = 0;
6581 u8 sta_id = IWL_INVALID_STATION;
6974e363 6582 u8 is_default_wep_key = 0;
b481de9c
ZY
6583
6584 IWL_DEBUG_MAC80211("enter\n");
6585
099b40b7 6586 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
6587 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6588 return -EOPNOTSUPP;
6589 }
6590
6591 if (is_zero_ether_addr(addr))
6592 /* only support pairwise keys */
6593 return -EOPNOTSUPP;
6594
947b13a7 6595 sta_id = iwl_find_station(priv, addr);
6974e363
EG
6596 if (sta_id == IWL_INVALID_STATION) {
6597 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6598 print_mac(mac, addr));
6599 return -EINVAL;
b481de9c 6600
deb09c43 6601 }
b481de9c 6602
6974e363 6603 mutex_lock(&priv->mutex);
bb8c093b 6604 iwl4965_scan_cancel_timeout(priv, 100);
6974e363
EG
6605 mutex_unlock(&priv->mutex);
6606
6607 /* If we are getting WEP group key and we didn't receive any key mapping
6608 * so far, we are in legacy wep mode (group key only), otherwise we are
6609 * in 1X mode.
6610 * In legacy wep mode, we use another host command to the uCode */
5425e490 6611 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
6974e363
EG
6612 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
6613 if (cmd == SET_KEY)
6614 is_default_wep_key = !priv->key_mapping_key;
6615 else
6616 is_default_wep_key = priv->default_wep_key;
6617 }
052c4b9f 6618
b481de9c 6619 switch (cmd) {
deb09c43 6620 case SET_KEY:
6974e363
EG
6621 if (is_default_wep_key)
6622 ret = iwl_set_default_wep_key(priv, key);
deb09c43 6623 else
7480513f 6624 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
6625
6626 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
6627 break;
6628 case DISABLE_KEY:
6974e363
EG
6629 if (is_default_wep_key)
6630 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 6631 else
3ec47732 6632 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
6633
6634 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
6635 break;
6636 default:
deb09c43 6637 ret = -EINVAL;
b481de9c
ZY
6638 }
6639
6640 IWL_DEBUG_MAC80211("leave\n");
b481de9c 6641
deb09c43 6642 return ret;
b481de9c
ZY
6643}
6644
bb8c093b 6645static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY
6646 const struct ieee80211_tx_queue_params *params)
6647{
c79dd5b5 6648 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6649 unsigned long flags;
6650 int q;
b481de9c
ZY
6651
6652 IWL_DEBUG_MAC80211("enter\n");
6653
fee1247a 6654 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6655 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6656 return -EIO;
6657 }
6658
6659 if (queue >= AC_NUM) {
6660 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
6661 return 0;
6662 }
6663
b481de9c
ZY
6664 if (!priv->qos_data.qos_enable) {
6665 priv->qos_data.qos_active = 0;
6666 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
6667 return 0;
6668 }
6669 q = AC_NUM - 1 - queue;
6670
6671 spin_lock_irqsave(&priv->lock, flags);
6672
6673 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
6674 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
6675 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
6676 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 6677 cpu_to_le16((params->txop * 32));
b481de9c
ZY
6678
6679 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
6680 priv->qos_data.qos_active = 1;
6681
6682 spin_unlock_irqrestore(&priv->lock, flags);
6683
6684 mutex_lock(&priv->mutex);
6685 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6686 iwl4965_activate_qos(priv, 1);
3109ece1 6687 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 6688 iwl4965_activate_qos(priv, 0);
b481de9c
ZY
6689
6690 mutex_unlock(&priv->mutex);
6691
b481de9c
ZY
6692 IWL_DEBUG_MAC80211("leave\n");
6693 return 0;
6694}
6695
bb8c093b 6696static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
6697 struct ieee80211_tx_queue_stats *stats)
6698{
c79dd5b5 6699 struct iwl_priv *priv = hw->priv;
b481de9c 6700 int i, avail;
bb8c093b
CH
6701 struct iwl4965_tx_queue *txq;
6702 struct iwl4965_queue *q;
b481de9c
ZY
6703 unsigned long flags;
6704
6705 IWL_DEBUG_MAC80211("enter\n");
6706
fee1247a 6707 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6708 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6709 return -EIO;
6710 }
6711
6712 spin_lock_irqsave(&priv->lock, flags);
6713
6714 for (i = 0; i < AC_NUM; i++) {
6715 txq = &priv->txq[i];
6716 q = &txq->q;
bb8c093b 6717 avail = iwl4965_queue_space(q);
b481de9c
ZY
6718
6719 stats->data[i].len = q->n_window - avail;
6720 stats->data[i].limit = q->n_window - q->high_mark;
6721 stats->data[i].count = q->n_window;
6722
6723 }
6724 spin_unlock_irqrestore(&priv->lock, flags);
6725
6726 IWL_DEBUG_MAC80211("leave\n");
6727
6728 return 0;
6729}
6730
bb8c093b 6731static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
6732 struct ieee80211_low_level_stats *stats)
6733{
6734 IWL_DEBUG_MAC80211("enter\n");
6735 IWL_DEBUG_MAC80211("leave\n");
6736
6737 return 0;
6738}
6739
bb8c093b 6740static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY
6741{
6742 IWL_DEBUG_MAC80211("enter\n");
6743 IWL_DEBUG_MAC80211("leave\n");
6744
6745 return 0;
6746}
6747
bb8c093b 6748static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 6749{
c79dd5b5 6750 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6751 unsigned long flags;
6752
6753 mutex_lock(&priv->mutex);
6754 IWL_DEBUG_MAC80211("enter\n");
6755
6756 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 6757#ifdef CONFIG_IWL4965_HT
b481de9c 6758 spin_lock_irqsave(&priv->lock, flags);
fd105e79 6759 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 6760 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 6761#endif /* CONFIG_IWL4965_HT */
b481de9c 6762
bf85ea4f 6763 iwlcore_reset_qos(priv);
b481de9c
ZY
6764
6765 cancel_delayed_work(&priv->post_associate);
6766
6767 spin_lock_irqsave(&priv->lock, flags);
6768 priv->assoc_id = 0;
6769 priv->assoc_capability = 0;
b481de9c
ZY
6770 priv->assoc_station_added = 0;
6771
6772 /* new association get rid of ibss beacon skb */
6773 if (priv->ibss_beacon)
6774 dev_kfree_skb(priv->ibss_beacon);
6775
6776 priv->ibss_beacon = NULL;
6777
6778 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 6779 priv->timestamp = 0;
b481de9c
ZY
6780 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
6781 priv->beacon_int = 0;
6782
6783 spin_unlock_irqrestore(&priv->lock, flags);
6784
fee1247a 6785 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
6786 IWL_DEBUG_MAC80211("leave - not ready\n");
6787 mutex_unlock(&priv->mutex);
6788 return;
6789 }
6790
052c4b9f 6791 /* we are restarting association process
6792 * clear RXON_FILTER_ASSOC_MSK bit
6793 */
6794 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 6795 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 6796 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6797 iwl4965_commit_rxon(priv);
052c4b9f 6798 }
6799
5da4b55f
MA
6800 iwl_power_update_mode(priv, 0);
6801
b481de9c
ZY
6802 /* Per mac80211.h: This is only used in IBSS mode... */
6803 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 6804
b481de9c
ZY
6805 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
6806 mutex_unlock(&priv->mutex);
6807 return;
6808 }
6809
bb8c093b 6810 iwl4965_set_rate(priv);
b481de9c
ZY
6811
6812 mutex_unlock(&priv->mutex);
6813
6814 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
6815}
6816
bb8c093b 6817static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY
6818 struct ieee80211_tx_control *control)
6819{
c79dd5b5 6820 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6821 unsigned long flags;
6822
6823 mutex_lock(&priv->mutex);
6824 IWL_DEBUG_MAC80211("enter\n");
6825
fee1247a 6826 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6827 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6828 mutex_unlock(&priv->mutex);
6829 return -EIO;
6830 }
6831
6832 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
6833 IWL_DEBUG_MAC80211("leave - not IBSS\n");
6834 mutex_unlock(&priv->mutex);
6835 return -EIO;
6836 }
6837
6838 spin_lock_irqsave(&priv->lock, flags);
6839
6840 if (priv->ibss_beacon)
6841 dev_kfree_skb(priv->ibss_beacon);
6842
6843 priv->ibss_beacon = skb;
6844
6845 priv->assoc_id = 0;
6846
6847 IWL_DEBUG_MAC80211("leave\n");
6848 spin_unlock_irqrestore(&priv->lock, flags);
6849
bf85ea4f 6850 iwlcore_reset_qos(priv);
b481de9c
ZY
6851
6852 queue_work(priv->workqueue, &priv->post_associate.work);
6853
6854 mutex_unlock(&priv->mutex);
6855
6856 return 0;
6857}
6858
b481de9c
ZY
6859/*****************************************************************************
6860 *
6861 * sysfs attributes
6862 *
6863 *****************************************************************************/
6864
0a6857e7 6865#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
6866
6867/*
6868 * The following adds a new attribute to the sysfs representation
6869 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
6870 * used for controlling the debug level.
6871 *
6872 * See the level definitions in iwl for details.
6873 */
6874
6875static ssize_t show_debug_level(struct device_driver *d, char *buf)
6876{
0a6857e7 6877 return sprintf(buf, "0x%08X\n", iwl_debug_level);
b481de9c
ZY
6878}
6879static ssize_t store_debug_level(struct device_driver *d,
6880 const char *buf, size_t count)
6881{
6882 char *p = (char *)buf;
6883 u32 val;
6884
6885 val = simple_strtoul(p, &p, 0);
6886 if (p == buf)
6887 printk(KERN_INFO DRV_NAME
6888 ": %s is not in hex or decimal form.\n", buf);
6889 else
0a6857e7 6890 iwl_debug_level = val;
b481de9c
ZY
6891
6892 return strnlen(buf, count);
6893}
6894
6895static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
6896 show_debug_level, store_debug_level);
6897
0a6857e7 6898#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 6899
b481de9c
ZY
6900
6901static ssize_t show_temperature(struct device *d,
6902 struct device_attribute *attr, char *buf)
6903{
c79dd5b5 6904 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 6905
fee1247a 6906 if (!iwl_is_alive(priv))
b481de9c
ZY
6907 return -EAGAIN;
6908
bb8c093b 6909 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY
6910}
6911
6912static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
6913
6914static ssize_t show_rs_window(struct device *d,
6915 struct device_attribute *attr,
6916 char *buf)
6917{
c79dd5b5 6918 struct iwl_priv *priv = d->driver_data;
bb8c093b 6919 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY
6920}
6921static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
6922
6923static ssize_t show_tx_power(struct device *d,
6924 struct device_attribute *attr, char *buf)
6925{
c79dd5b5 6926 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6927 return sprintf(buf, "%d\n", priv->user_txpower_limit);
6928}
6929
6930static ssize_t store_tx_power(struct device *d,
6931 struct device_attribute *attr,
6932 const char *buf, size_t count)
6933{
c79dd5b5 6934 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6935 char *p = (char *)buf;
6936 u32 val;
6937
6938 val = simple_strtoul(p, &p, 10);
6939 if (p == buf)
6940 printk(KERN_INFO DRV_NAME
6941 ": %s is not in decimal form.\n", buf);
6942 else
bb8c093b 6943 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY
6944
6945 return count;
6946}
6947
6948static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
6949
6950static ssize_t show_flags(struct device *d,
6951 struct device_attribute *attr, char *buf)
6952{
c79dd5b5 6953 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6954
6955 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
6956}
6957
6958static ssize_t store_flags(struct device *d,
6959 struct device_attribute *attr,
6960 const char *buf, size_t count)
6961{
c79dd5b5 6962 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6963 u32 flags = simple_strtoul(buf, NULL, 0);
6964
6965 mutex_lock(&priv->mutex);
6966 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
6967 /* Cancel any currently running scans... */
bb8c093b 6968 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY
6969 IWL_WARNING("Could not cancel scan.\n");
6970 else {
6971 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
6972 flags);
6973 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 6974 iwl4965_commit_rxon(priv);
b481de9c
ZY
6975 }
6976 }
6977 mutex_unlock(&priv->mutex);
6978
6979 return count;
6980}
6981
6982static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
6983
6984static ssize_t show_filter_flags(struct device *d,
6985 struct device_attribute *attr, char *buf)
6986{
c79dd5b5 6987 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6988
6989 return sprintf(buf, "0x%04X\n",
6990 le32_to_cpu(priv->active_rxon.filter_flags));
6991}
6992
6993static ssize_t store_filter_flags(struct device *d,
6994 struct device_attribute *attr,
6995 const char *buf, size_t count)
6996{
c79dd5b5 6997 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
6998 u32 filter_flags = simple_strtoul(buf, NULL, 0);
6999
7000 mutex_lock(&priv->mutex);
7001 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7002 /* Cancel any currently running scans... */
bb8c093b 7003 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY
7004 IWL_WARNING("Could not cancel scan.\n");
7005 else {
7006 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7007 "0x%04X\n", filter_flags);
7008 priv->staging_rxon.filter_flags =
7009 cpu_to_le32(filter_flags);
bb8c093b 7010 iwl4965_commit_rxon(priv);
b481de9c
ZY
7011 }
7012 }
7013 mutex_unlock(&priv->mutex);
7014
7015 return count;
7016}
7017
7018static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7019 store_filter_flags);
7020
c8b0e6e1 7021#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
7022
7023static ssize_t show_measurement(struct device *d,
7024 struct device_attribute *attr, char *buf)
7025{
c79dd5b5 7026 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 7027 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY
7028 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7029 u8 *data = (u8 *) & measure_report;
7030 unsigned long flags;
7031
7032 spin_lock_irqsave(&priv->lock, flags);
7033 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7034 spin_unlock_irqrestore(&priv->lock, flags);
7035 return 0;
7036 }
7037 memcpy(&measure_report, &priv->measure_report, size);
7038 priv->measurement_status = 0;
7039 spin_unlock_irqrestore(&priv->lock, flags);
7040
7041 while (size && (PAGE_SIZE - len)) {
7042 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7043 PAGE_SIZE - len, 1);
7044 len = strlen(buf);
7045 if (PAGE_SIZE - len)
7046 buf[len++] = '\n';
7047
7048 ofs += 16;
7049 size -= min(size, 16U);
7050 }
7051
7052 return len;
7053}
7054
7055static ssize_t store_measurement(struct device *d,
7056 struct device_attribute *attr,
7057 const char *buf, size_t count)
7058{
c79dd5b5 7059 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7060 struct ieee80211_measurement_params params = {
7061 .channel = le16_to_cpu(priv->active_rxon.channel),
7062 .start_time = cpu_to_le64(priv->last_tsf),
7063 .duration = cpu_to_le16(1),
7064 };
7065 u8 type = IWL_MEASURE_BASIC;
7066 u8 buffer[32];
7067 u8 channel;
7068
7069 if (count) {
7070 char *p = buffer;
7071 strncpy(buffer, buf, min(sizeof(buffer), count));
7072 channel = simple_strtoul(p, NULL, 0);
7073 if (channel)
7074 params.channel = channel;
7075
7076 p = buffer;
7077 while (*p && *p != ' ')
7078 p++;
7079 if (*p)
7080 type = simple_strtoul(p + 1, NULL, 0);
7081 }
7082
7083 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7084 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 7085 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
7086
7087 return count;
7088}
7089
7090static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7091 show_measurement, store_measurement);
c8b0e6e1 7092#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY
7093
7094static ssize_t store_retry_rate(struct device *d,
7095 struct device_attribute *attr,
7096 const char *buf, size_t count)
7097{
c79dd5b5 7098 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7099
7100 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7101 if (priv->retry_rate <= 0)
7102 priv->retry_rate = 1;
7103
7104 return count;
7105}
7106
7107static ssize_t show_retry_rate(struct device *d,
7108 struct device_attribute *attr, char *buf)
7109{
c79dd5b5 7110 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7111 return sprintf(buf, "%d", priv->retry_rate);
7112}
7113
7114static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7115 store_retry_rate);
7116
7117static ssize_t store_power_level(struct device *d,
7118 struct device_attribute *attr,
7119 const char *buf, size_t count)
7120{
c79dd5b5 7121 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7122 int rc;
7123 int mode;
7124
7125 mode = simple_strtoul(buf, NULL, 0);
7126 mutex_lock(&priv->mutex);
7127
fee1247a 7128 if (!iwl_is_ready(priv)) {
b481de9c
ZY
7129 rc = -EAGAIN;
7130 goto out;
7131 }
7132
5da4b55f
MA
7133 rc = iwl_power_set_user_mode(priv, mode);
7134 if (rc) {
7135 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7136 goto out;
b481de9c 7137 }
b481de9c
ZY
7138 rc = count;
7139
7140 out:
7141 mutex_unlock(&priv->mutex);
7142 return rc;
7143}
7144
7145#define MAX_WX_STRING 80
7146
7147/* Values are in microsecond */
7148static const s32 timeout_duration[] = {
7149 350000,
7150 250000,
7151 75000,
7152 37000,
7153 25000,
7154};
7155static const s32 period_duration[] = {
7156 400000,
7157 700000,
7158 1000000,
7159 1000000,
7160 1000000
7161};
7162
7163static ssize_t show_power_level(struct device *d,
7164 struct device_attribute *attr, char *buf)
7165{
c79dd5b5 7166 struct iwl_priv *priv = dev_get_drvdata(d);
5da4b55f 7167 int level = priv->power_data.power_mode;
b481de9c
ZY
7168 char *p = buf;
7169
7170 p += sprintf(p, "%d ", level);
7171 switch (level) {
7172 case IWL_POWER_MODE_CAM:
7173 case IWL_POWER_AC:
7174 p += sprintf(p, "(AC)");
7175 break;
7176 case IWL_POWER_BATTERY:
7177 p += sprintf(p, "(BATTERY)");
7178 break;
7179 default:
7180 p += sprintf(p,
7181 "(Timeout %dms, Period %dms)",
7182 timeout_duration[level - 1] / 1000,
7183 period_duration[level - 1] / 1000);
7184 }
5da4b55f 7185/*
b481de9c
ZY
7186 if (!(priv->power_mode & IWL_POWER_ENABLED))
7187 p += sprintf(p, " OFF\n");
7188 else
7189 p += sprintf(p, " \n");
5da4b55f
MA
7190*/
7191 p += sprintf(p, " \n");
b481de9c 7192 return (p - buf + 1);
b481de9c
ZY
7193}
7194
7195static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7196 store_power_level);
7197
7198static ssize_t show_channels(struct device *d,
7199 struct device_attribute *attr, char *buf)
7200{
8318d78a
JB
7201 /* all this shit doesn't belong into sysfs anyway */
7202 return 0;
b481de9c
ZY
7203}
7204
7205static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7206
7207static ssize_t show_statistics(struct device *d,
7208 struct device_attribute *attr, char *buf)
7209{
c79dd5b5 7210 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 7211 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY
7212 u32 len = 0, ofs = 0;
7213 u8 *data = (u8 *) & priv->statistics;
7214 int rc = 0;
7215
fee1247a 7216 if (!iwl_is_alive(priv))
b481de9c
ZY
7217 return -EAGAIN;
7218
7219 mutex_lock(&priv->mutex);
49ea8596 7220 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
7221 mutex_unlock(&priv->mutex);
7222
7223 if (rc) {
7224 len = sprintf(buf,
7225 "Error sending statistics request: 0x%08X\n", rc);
7226 return len;
7227 }
7228
7229 while (size && (PAGE_SIZE - len)) {
7230 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7231 PAGE_SIZE - len, 1);
7232 len = strlen(buf);
7233 if (PAGE_SIZE - len)
7234 buf[len++] = '\n';
7235
7236 ofs += 16;
7237 size -= min(size, 16U);
7238 }
7239
7240 return len;
7241}
7242
7243static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7244
7245static ssize_t show_antenna(struct device *d,
7246 struct device_attribute *attr, char *buf)
7247{
c79dd5b5 7248 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 7249
fee1247a 7250 if (!iwl_is_alive(priv))
b481de9c
ZY
7251 return -EAGAIN;
7252
7253 return sprintf(buf, "%d\n", priv->antenna);
7254}
7255
7256static ssize_t store_antenna(struct device *d,
7257 struct device_attribute *attr,
7258 const char *buf, size_t count)
7259{
7260 int ant;
c79dd5b5 7261 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7262
7263 if (count == 0)
7264 return 0;
7265
7266 if (sscanf(buf, "%1i", &ant) != 1) {
7267 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7268 return count;
7269 }
7270
7271 if ((ant >= 0) && (ant <= 2)) {
7272 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
bb8c093b 7273 priv->antenna = (enum iwl4965_antenna)ant;
b481de9c
ZY
7274 } else
7275 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7276
7277
7278 return count;
7279}
7280
7281static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7282
7283static ssize_t show_status(struct device *d,
7284 struct device_attribute *attr, char *buf)
7285{
c79dd5b5 7286 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 7287 if (!iwl_is_alive(priv))
b481de9c
ZY
7288 return -EAGAIN;
7289 return sprintf(buf, "0x%08x\n", (int)priv->status);
7290}
7291
7292static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7293
7294static ssize_t dump_error_log(struct device *d,
7295 struct device_attribute *attr,
7296 const char *buf, size_t count)
7297{
7298 char *p = (char *)buf;
7299
7300 if (p[0] == '1')
c79dd5b5 7301 iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
7302
7303 return strnlen(buf, count);
7304}
7305
7306static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7307
7308static ssize_t dump_event_log(struct device *d,
7309 struct device_attribute *attr,
7310 const char *buf, size_t count)
7311{
7312 char *p = (char *)buf;
7313
7314 if (p[0] == '1')
c79dd5b5 7315 iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
7316
7317 return strnlen(buf, count);
7318}
7319
7320static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7321
7322/*****************************************************************************
7323 *
7324 * driver setup and teardown
7325 *
7326 *****************************************************************************/
7327
c79dd5b5 7328static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
7329{
7330 priv->workqueue = create_workqueue(DRV_NAME);
7331
7332 init_waitqueue_head(&priv->wait_command_queue);
7333
bb8c093b
CH
7334 INIT_WORK(&priv->up, iwl4965_bg_up);
7335 INIT_WORK(&priv->restart, iwl4965_bg_restart);
7336 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
7337 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
7338 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
7339 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
7340 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
7341 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
7342 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
7343 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
7344 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
7345 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
7346
7347 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY
7348
7349 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 7350 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
7351}
7352
c79dd5b5 7353static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 7354{
bb8c093b 7355 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 7356
3ae6a054 7357 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
7358 cancel_delayed_work(&priv->scan_check);
7359 cancel_delayed_work(&priv->alive_start);
7360 cancel_delayed_work(&priv->post_associate);
7361 cancel_work_sync(&priv->beacon_update);
7362}
7363
bb8c093b 7364static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY
7365 &dev_attr_antenna.attr,
7366 &dev_attr_channels.attr,
7367 &dev_attr_dump_errors.attr,
7368 &dev_attr_dump_events.attr,
7369 &dev_attr_flags.attr,
7370 &dev_attr_filter_flags.attr,
c8b0e6e1 7371#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
7372 &dev_attr_measurement.attr,
7373#endif
7374 &dev_attr_power_level.attr,
7375 &dev_attr_retry_rate.attr,
b481de9c
ZY
7376 &dev_attr_rs_window.attr,
7377 &dev_attr_statistics.attr,
7378 &dev_attr_status.attr,
7379 &dev_attr_temperature.attr,
b481de9c
ZY
7380 &dev_attr_tx_power.attr,
7381
7382 NULL
7383};
7384
bb8c093b 7385static struct attribute_group iwl4965_attribute_group = {
b481de9c 7386 .name = NULL, /* put in device directory */
bb8c093b 7387 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
7388};
7389
bb8c093b
CH
7390static struct ieee80211_ops iwl4965_hw_ops = {
7391 .tx = iwl4965_mac_tx,
7392 .start = iwl4965_mac_start,
7393 .stop = iwl4965_mac_stop,
7394 .add_interface = iwl4965_mac_add_interface,
7395 .remove_interface = iwl4965_mac_remove_interface,
7396 .config = iwl4965_mac_config,
7397 .config_interface = iwl4965_mac_config_interface,
7398 .configure_filter = iwl4965_configure_filter,
7399 .set_key = iwl4965_mac_set_key,
ab885f8c 7400 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH
7401 .get_stats = iwl4965_mac_get_stats,
7402 .get_tx_stats = iwl4965_mac_get_tx_stats,
7403 .conf_tx = iwl4965_mac_conf_tx,
7404 .get_tsf = iwl4965_mac_get_tsf,
7405 .reset_tsf = iwl4965_mac_reset_tsf,
7406 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 7407 .bss_info_changed = iwl4965_bss_info_changed,
c8b0e6e1 7408#ifdef CONFIG_IWL4965_HT
9ab46173 7409 .ampdu_action = iwl4965_mac_ampdu_action,
c8b0e6e1 7410#endif /* CONFIG_IWL4965_HT */
bb8c093b 7411 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY
7412};
7413
bb8c093b 7414static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
7415{
7416 int err = 0;
c79dd5b5 7417 struct iwl_priv *priv;
b481de9c 7418 struct ieee80211_hw *hw;
82b9a121 7419 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 7420 unsigned long flags;
5a66926a 7421 DECLARE_MAC_BUF(mac);
b481de9c 7422
316c30d9
AK
7423 /************************
7424 * 1. Allocating HW data
7425 ************************/
7426
6440adb5
CB
7427 /* Disabling hardware scan means that mac80211 will perform scans
7428 * "the hard way", rather than using device's scan. */
1ea87396 7429 if (cfg->mod_params->disable_hw_scan) {
b481de9c 7430 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 7431 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
7432 }
7433
1d0a082d
AK
7434 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
7435 if (!hw) {
b481de9c
ZY
7436 err = -ENOMEM;
7437 goto out;
7438 }
1d0a082d
AK
7439 priv = hw->priv;
7440 /* At this point both hw and priv are allocated. */
7441
b481de9c
ZY
7442 SET_IEEE80211_DEV(hw, &pdev->dev);
7443
7444 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 7445 priv->cfg = cfg;
b481de9c 7446 priv->pci_dev = pdev;
316c30d9 7447
0a6857e7 7448#ifdef CONFIG_IWLWIFI_DEBUG
1ea87396 7449 iwl_debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
7450 atomic_set(&priv->restrict_refcnt, 0);
7451#endif
b481de9c 7452
316c30d9
AK
7453 /**************************
7454 * 2. Initializing PCI bus
7455 **************************/
7456 if (pci_enable_device(pdev)) {
7457 err = -ENODEV;
7458 goto out_ieee80211_free_hw;
7459 }
7460
7461 pci_set_master(pdev);
7462
cc2a8ea8 7463 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
316c30d9 7464 if (!err)
cc2a8ea8
RR
7465 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
7466 if (err) {
7467 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7468 if (!err)
7469 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7470 /* both attempts failed: */
316c30d9 7471 if (err) {
cc2a8ea8
RR
7472 printk(KERN_WARNING "%s: No suitable DMA available.\n",
7473 DRV_NAME);
316c30d9 7474 goto out_pci_disable_device;
cc2a8ea8 7475 }
316c30d9
AK
7476 }
7477
7478 err = pci_request_regions(pdev, DRV_NAME);
7479 if (err)
7480 goto out_pci_disable_device;
7481
7482 pci_set_drvdata(pdev, priv);
7483
7484 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7485 * PCI Tx retries from interfering with C3 CPU state */
7486 pci_write_config_byte(pdev, 0x41, 0x00);
7487
7488 /***********************
7489 * 3. Read REV register
7490 ***********************/
7491 priv->hw_base = pci_iomap(pdev, 0, 0);
7492 if (!priv->hw_base) {
7493 err = -ENODEV;
7494 goto out_pci_release_regions;
7495 }
7496
7497 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7498 (unsigned long long) pci_resource_len(pdev, 0));
7499 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7500
7501 printk(KERN_INFO DRV_NAME
7502 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
7503
7504 /*****************
7505 * 4. Read EEPROM
7506 *****************/
7507 /* nic init */
3395f6e9 7508 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
316c30d9
AK
7509 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7510
3395f6e9
TW
7511 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7512 err = iwl_poll_bit(priv, CSR_GP_CNTRL,
316c30d9
AK
7513 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
7514 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7515 if (err < 0) {
7516 IWL_DEBUG_INFO("Failed to init the card\n");
7517 goto out_iounmap;
7518 }
7519 /* Read the EEPROM */
7520 err = iwl_eeprom_init(priv);
7521 if (err) {
7522 IWL_ERROR("Unable to init EEPROM\n");
7523 goto out_iounmap;
7524 }
7525 /* MAC Address location in EEPROM same for 3945/4965 */
7526 iwl_eeprom_get_mac(priv, priv->mac_addr);
7527 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
7528 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7529
7530 /************************
7531 * 5. Setup HW constants
7532 ************************/
7533 /* Device-specific setup */
5425e490
TW
7534 if (priv->cfg->ops->lib->set_hw_params(priv)) {
7535 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 7536 goto out_free_eeprom;
316c30d9
AK
7537 }
7538
7539 /*******************
7540 * 6. Setup hw/priv
7541 *******************/
b481de9c 7542
bf85ea4f
AK
7543 err = iwl_setup(priv);
7544 if (err)
5425e490 7545 goto out_unset_hw_params;
bf85ea4f 7546 /* At this point both hw and priv are initialized. */
316c30d9
AK
7547
7548 /**********************************
7549 * 7. Initialize module parameters
7550 **********************************/
7551
7552 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 7553 if (priv->cfg->mod_params->disable) {
316c30d9
AK
7554 set_bit(STATUS_RF_KILL_SW, &priv->status);
7555 IWL_DEBUG_INFO("Radio disabled.\n");
7556 }
7557
1ea87396 7558 if (priv->cfg->mod_params->enable_qos)
316c30d9
AK
7559 priv->qos_data.qos_enable = 1;
7560
7561 /********************
7562 * 8. Setup services
7563 ********************/
0359facc 7564 spin_lock_irqsave(&priv->lock, flags);
316c30d9 7565 iwl4965_disable_interrupts(priv);
0359facc 7566 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK
7567
7568 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
7569 if (err) {
7570 IWL_ERROR("failed to create sysfs device attributes\n");
5425e490 7571 goto out_unset_hw_params;
316c30d9
AK
7572 }
7573
7574 err = iwl_dbgfs_register(priv, DRV_NAME);
7575 if (err) {
7576 IWL_ERROR("failed to create debugfs files\n");
7577 goto out_remove_sysfs;
7578 }
7579
7580 iwl4965_setup_deferred_work(priv);
7581 iwl4965_setup_rx_handlers(priv);
7582
7583 /********************
7584 * 9. Conclude
7585 ********************/
5a66926a
ZY
7586 pci_save_state(pdev);
7587 pci_disable_device(pdev);
b481de9c 7588
c8381fdc
MA
7589 /* notify iwlcore to init */
7590 iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
b481de9c
ZY
7591 return 0;
7592
316c30d9
AK
7593 out_remove_sysfs:
7594 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
5425e490
TW
7595 out_unset_hw_params:
7596 iwl4965_unset_hw_params(priv);
073d3f5f
TW
7597 out_free_eeprom:
7598 iwl_eeprom_free(priv);
b481de9c
ZY
7599 out_iounmap:
7600 pci_iounmap(pdev, priv->hw_base);
7601 out_pci_release_regions:
7602 pci_release_regions(pdev);
316c30d9 7603 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
7604 out_pci_disable_device:
7605 pci_disable_device(pdev);
b481de9c
ZY
7606 out_ieee80211_free_hw:
7607 ieee80211_free_hw(priv->hw);
7608 out:
7609 return err;
7610}
7611
c83dbf68 7612static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 7613{
c79dd5b5 7614 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY
7615 struct list_head *p, *q;
7616 int i;
0359facc 7617 unsigned long flags;
b481de9c
ZY
7618
7619 if (!priv)
7620 return;
7621
7622 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7623
c4f55232
RR
7624 if (priv->mac80211_registered) {
7625 ieee80211_unregister_hw(priv->hw);
7626 priv->mac80211_registered = 0;
7627 }
7628
b481de9c 7629 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 7630
bb8c093b 7631 iwl4965_down(priv);
b481de9c 7632
0359facc
MA
7633 /* make sure we flush any pending irq or
7634 * tasklet for the driver
7635 */
7636 spin_lock_irqsave(&priv->lock, flags);
7637 iwl4965_disable_interrupts(priv);
7638 spin_unlock_irqrestore(&priv->lock, flags);
7639
7640 iwl_synchronize_irq(priv);
7641
b481de9c
ZY
7642 /* Free MAC hash list for ADHOC */
7643 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
7644 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
7645 list_del(p);
bb8c093b 7646 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY
7647 }
7648 }
7649
c8381fdc 7650 iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
712b6cf5 7651 iwl_dbgfs_unregister(priv);
bb8c093b 7652 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 7653
bb8c093b 7654 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
7655
7656 if (priv->rxq.bd)
bb8c093b
CH
7657 iwl4965_rx_queue_free(priv, &priv->rxq);
7658 iwl4965_hw_txq_ctx_free(priv);
b481de9c 7659
5425e490 7660 iwl4965_unset_hw_params(priv);
bf85ea4f 7661 iwlcore_clear_stations_table(priv);
073d3f5f 7662 iwl_eeprom_free(priv);
b481de9c 7663
b481de9c 7664
948c171c
MA
7665 /*netif_stop_queue(dev); */
7666 flush_workqueue(priv->workqueue);
7667
bb8c093b 7668 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
7669 * priv->workqueue... so we can't take down the workqueue
7670 * until now... */
7671 destroy_workqueue(priv->workqueue);
7672 priv->workqueue = NULL;
7673
b481de9c
ZY
7674 pci_iounmap(pdev, priv->hw_base);
7675 pci_release_regions(pdev);
7676 pci_disable_device(pdev);
7677 pci_set_drvdata(pdev, NULL);
7678
bf85ea4f 7679 iwl_free_channel_map(priv);
849e0dce 7680 iwl4965_free_geos(priv);
b481de9c
ZY
7681
7682 if (priv->ibss_beacon)
7683 dev_kfree_skb(priv->ibss_beacon);
7684
7685 ieee80211_free_hw(priv->hw);
7686}
7687
7688#ifdef CONFIG_PM
7689
bb8c093b 7690static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 7691{
c79dd5b5 7692 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 7693
e655b9f0
ZY
7694 if (priv->is_open) {
7695 set_bit(STATUS_IN_SUSPEND, &priv->status);
7696 iwl4965_mac_stop(priv->hw);
7697 priv->is_open = 1;
7698 }
b481de9c 7699
b481de9c
ZY
7700 pci_set_power_state(pdev, PCI_D3hot);
7701
b481de9c
ZY
7702 return 0;
7703}
7704
bb8c093b 7705static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 7706{
c79dd5b5 7707 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 7708
b481de9c 7709 pci_set_power_state(pdev, PCI_D0);
b481de9c 7710
e655b9f0
ZY
7711 if (priv->is_open)
7712 iwl4965_mac_start(priv->hw);
b481de9c 7713
e655b9f0 7714 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
7715 return 0;
7716}
7717
7718#endif /* CONFIG_PM */
7719
7720/*****************************************************************************
7721 *
7722 * driver and module entry point
7723 *
7724 *****************************************************************************/
7725
fed9017e
RR
7726/* Hardware specific file defines the PCI IDs table for that hardware module */
7727static struct pci_device_id iwl_hw_card_ids[] = {
7728 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
7729 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
7730 {0}
7731};
7732MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
7733
7734static struct pci_driver iwl_driver = {
b481de9c 7735 .name = DRV_NAME,
fed9017e 7736 .id_table = iwl_hw_card_ids,
bb8c093b
CH
7737 .probe = iwl4965_pci_probe,
7738 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 7739#ifdef CONFIG_PM
bb8c093b
CH
7740 .suspend = iwl4965_pci_suspend,
7741 .resume = iwl4965_pci_resume,
b481de9c
ZY
7742#endif
7743};
7744
bb8c093b 7745static int __init iwl4965_init(void)
b481de9c
ZY
7746{
7747
7748 int ret;
7749 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
7750 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
7751
7752 ret = iwl4965_rate_control_register();
7753 if (ret) {
7754 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
7755 return ret;
7756 }
7757
fed9017e 7758 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
7759 if (ret) {
7760 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 7761 goto error_register;
b481de9c 7762 }
0a6857e7 7763#ifdef CONFIG_IWLWIFI_DEBUG
fed9017e 7764 ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
b481de9c
ZY
7765 if (ret) {
7766 IWL_ERROR("Unable to create driver sysfs file\n");
897e1cf2 7767 goto error_debug;
b481de9c
ZY
7768 }
7769#endif
7770
7771 return ret;
897e1cf2
RC
7772
7773#ifdef CONFIG_IWLWIFI_DEBUG
7774error_debug:
fed9017e 7775 pci_unregister_driver(&iwl_driver);
897e1cf2
RC
7776#endif
7777error_register:
7778 iwl4965_rate_control_unregister();
7779 return ret;
b481de9c
ZY
7780}
7781
bb8c093b 7782static void __exit iwl4965_exit(void)
b481de9c 7783{
0a6857e7 7784#ifdef CONFIG_IWLWIFI_DEBUG
fed9017e 7785 driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
b481de9c 7786#endif
fed9017e 7787 pci_unregister_driver(&iwl_driver);
897e1cf2 7788 iwl4965_rate_control_unregister();
b481de9c
ZY
7789}
7790
bb8c093b
CH
7791module_exit(iwl4965_exit);
7792module_init(iwl4965_init);
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