Commit | Line | Data |
---|---|---|
8973a6e7 RD |
1 | /* |
2 | * This file contains the handling of command. | |
3 | * It prepares command and sends it to firmware when it is ready. | |
4 | */ | |
876c9d3a | 5 | |
a6b7a407 | 6 | #include <linux/hardirq.h> |
7919b89c | 7 | #include <linux/kfifo.h> |
e93156e7 | 8 | #include <linux/sched.h> |
5a0e3ad6 | 9 | #include <linux/slab.h> |
a45b6f4f | 10 | #include <linux/if_arp.h> |
e93156e7 | 11 | |
876c9d3a | 12 | #include "decl.h" |
e86dc1ca | 13 | #include "cfg.h" |
6e66f03f | 14 | #include "cmd.h" |
876c9d3a | 15 | |
9fb7663d DW |
16 | #define CAL_NF(nf) ((s32)(-(s32)(nf))) |
17 | #define CAL_RSSI(snr, nf) ((s32)((s32)(snr) + CAL_NF(nf))) | |
e93156e7 | 18 | |
8db4a2b9 | 19 | /** |
8973a6e7 | 20 | * lbs_cmd_copyback - Simple callback that copies response back into command |
8db4a2b9 | 21 | * |
8973a6e7 RD |
22 | * @priv: A pointer to &struct lbs_private structure |
23 | * @extra: A pointer to the original command structure for which | |
24 | * 'resp' is a response | |
25 | * @resp: A pointer to the command response | |
8db4a2b9 | 26 | * |
8973a6e7 | 27 | * returns: 0 on success, error on failure |
8db4a2b9 HS |
28 | */ |
29 | int lbs_cmd_copyback(struct lbs_private *priv, unsigned long extra, | |
30 | struct cmd_header *resp) | |
31 | { | |
32 | struct cmd_header *buf = (void *)extra; | |
33 | uint16_t copy_len; | |
34 | ||
35 | copy_len = min(le16_to_cpu(buf->size), le16_to_cpu(resp->size)); | |
36 | memcpy(buf, resp, copy_len); | |
37 | return 0; | |
38 | } | |
39 | EXPORT_SYMBOL_GPL(lbs_cmd_copyback); | |
40 | ||
41 | /** | |
8973a6e7 RD |
42 | * lbs_cmd_async_callback - Simple callback that ignores the result. |
43 | * Use this if you just want to send a command to the hardware, but don't | |
8db4a2b9 HS |
44 | * care for the result. |
45 | * | |
8973a6e7 RD |
46 | * @priv: ignored |
47 | * @extra: ignored | |
48 | * @resp: ignored | |
8db4a2b9 | 49 | * |
8973a6e7 | 50 | * returns: 0 for success |
8db4a2b9 HS |
51 | */ |
52 | static int lbs_cmd_async_callback(struct lbs_private *priv, unsigned long extra, | |
53 | struct cmd_header *resp) | |
54 | { | |
55 | return 0; | |
56 | } | |
57 | ||
58 | ||
876c9d3a | 59 | /** |
8973a6e7 RD |
60 | * is_command_allowed_in_ps - tests if a command is allowed in Power Save mode |
61 | * | |
62 | * @cmd: the command ID | |
876c9d3a | 63 | * |
8973a6e7 | 64 | * returns: 1 if allowed, 0 if not allowed |
876c9d3a | 65 | */ |
852e1f2a | 66 | static u8 is_command_allowed_in_ps(u16 cmd) |
876c9d3a | 67 | { |
852e1f2a DW |
68 | switch (cmd) { |
69 | case CMD_802_11_RSSI: | |
70 | return 1; | |
66fceb69 AK |
71 | case CMD_802_11_HOST_SLEEP_CFG: |
72 | return 1; | |
852e1f2a DW |
73 | default: |
74 | break; | |
876c9d3a | 75 | } |
876c9d3a MT |
76 | return 0; |
77 | } | |
78 | ||
6e66f03f | 79 | /** |
8973a6e7 RD |
80 | * lbs_update_hw_spec - Updates the hardware details like MAC address |
81 | * and regulatory region | |
6e66f03f | 82 | * |
8973a6e7 | 83 | * @priv: A pointer to &struct lbs_private structure |
6e66f03f | 84 | * |
8973a6e7 | 85 | * returns: 0 on success, error on failure |
6e66f03f DW |
86 | */ |
87 | int lbs_update_hw_spec(struct lbs_private *priv) | |
876c9d3a | 88 | { |
6e66f03f DW |
89 | struct cmd_ds_get_hw_spec cmd; |
90 | int ret = -1; | |
91 | u32 i; | |
876c9d3a | 92 | |
9012b28a | 93 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 94 | |
6e66f03f DW |
95 | memset(&cmd, 0, sizeof(cmd)); |
96 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
97 | memcpy(cmd.permanentaddr, priv->current_addr, ETH_ALEN); | |
689442dc | 98 | ret = lbs_cmd_with_response(priv, CMD_GET_HW_SPEC, &cmd); |
6e66f03f DW |
99 | if (ret) |
100 | goto out; | |
101 | ||
102 | priv->fwcapinfo = le32_to_cpu(cmd.fwcapinfo); | |
6e66f03f | 103 | |
dac10a9f HS |
104 | /* The firmware release is in an interesting format: the patch |
105 | * level is in the most significant nibble ... so fix that: */ | |
106 | priv->fwrelease = le32_to_cpu(cmd.fwrelease); | |
107 | priv->fwrelease = (priv->fwrelease << 8) | | |
108 | (priv->fwrelease >> 24 & 0xff); | |
109 | ||
110 | /* Some firmware capabilities: | |
111 | * CF card firmware 5.0.16p0: cap 0x00000303 | |
112 | * USB dongle firmware 5.110.17p2: cap 0x00000303 | |
113 | */ | |
f3a57fd1 | 114 | netdev_info(priv->dev, "%pM, fw %u.%u.%up%u, cap 0x%08x\n", |
e174961c | 115 | cmd.permanentaddr, |
dac10a9f HS |
116 | priv->fwrelease >> 24 & 0xff, |
117 | priv->fwrelease >> 16 & 0xff, | |
118 | priv->fwrelease >> 8 & 0xff, | |
119 | priv->fwrelease & 0xff, | |
120 | priv->fwcapinfo); | |
6e66f03f DW |
121 | lbs_deb_cmd("GET_HW_SPEC: hardware interface 0x%x, hardware spec 0x%04x\n", |
122 | cmd.hwifversion, cmd.version); | |
123 | ||
124 | /* Clamp region code to 8-bit since FW spec indicates that it should | |
125 | * only ever be 8-bit, even though the field size is 16-bit. Some firmware | |
126 | * returns non-zero high 8 bits here. | |
15483996 MV |
127 | * |
128 | * Firmware version 4.0.102 used in CF8381 has region code shifted. We | |
129 | * need to check for this problem and handle it properly. | |
6e66f03f | 130 | */ |
15483996 MV |
131 | if (MRVL_FW_MAJOR_REV(priv->fwrelease) == MRVL_FW_V4) |
132 | priv->regioncode = (le16_to_cpu(cmd.regioncode) >> 8) & 0xFF; | |
133 | else | |
134 | priv->regioncode = le16_to_cpu(cmd.regioncode) & 0xFF; | |
6e66f03f DW |
135 | |
136 | for (i = 0; i < MRVDRV_MAX_REGION_CODE; i++) { | |
137 | /* use the region code to search for the index */ | |
138 | if (priv->regioncode == lbs_region_code_to_index[i]) | |
139 | break; | |
140 | } | |
141 | ||
142 | /* if it's unidentified region code, use the default (USA) */ | |
143 | if (i >= MRVDRV_MAX_REGION_CODE) { | |
144 | priv->regioncode = 0x10; | |
f3a57fd1 JP |
145 | netdev_info(priv->dev, |
146 | "unidentified region code; using the default (USA)\n"); | |
6e66f03f DW |
147 | } |
148 | ||
149 | if (priv->current_addr[0] == 0xff) | |
150 | memmove(priv->current_addr, cmd.permanentaddr, ETH_ALEN); | |
876c9d3a | 151 | |
75abde4d VK |
152 | if (!priv->copied_hwaddr) { |
153 | memcpy(priv->dev->dev_addr, priv->current_addr, ETH_ALEN); | |
154 | if (priv->mesh_dev) | |
155 | memcpy(priv->mesh_dev->dev_addr, | |
156 | priv->current_addr, ETH_ALEN); | |
157 | priv->copied_hwaddr = 1; | |
158 | } | |
6e66f03f | 159 | |
6e66f03f | 160 | out: |
9012b28a | 161 | lbs_deb_leave(LBS_DEB_CMD); |
6e66f03f | 162 | return ret; |
876c9d3a MT |
163 | } |
164 | ||
66fceb69 AK |
165 | static int lbs_ret_host_sleep_cfg(struct lbs_private *priv, unsigned long dummy, |
166 | struct cmd_header *resp) | |
167 | { | |
168 | lbs_deb_enter(LBS_DEB_CMD); | |
1311843c | 169 | if (priv->is_host_sleep_activated) { |
66fceb69 AK |
170 | priv->is_host_sleep_configured = 0; |
171 | if (priv->psstate == PS_STATE_FULL_POWER) { | |
172 | priv->is_host_sleep_activated = 0; | |
173 | wake_up_interruptible(&priv->host_sleep_q); | |
174 | } | |
175 | } else { | |
176 | priv->is_host_sleep_configured = 1; | |
177 | } | |
178 | lbs_deb_leave(LBS_DEB_CMD); | |
179 | return 0; | |
180 | } | |
181 | ||
582c1b53 AN |
182 | int lbs_host_sleep_cfg(struct lbs_private *priv, uint32_t criteria, |
183 | struct wol_config *p_wol_config) | |
6ce4fd2a DW |
184 | { |
185 | struct cmd_ds_host_sleep cmd_config; | |
186 | int ret; | |
187 | ||
ae63a33e DS |
188 | /* |
189 | * Certain firmware versions do not support EHS_REMOVE_WAKEUP command | |
190 | * and the card will return a failure. Since we need to be | |
191 | * able to reset the mask, in those cases we set a 0 mask instead. | |
192 | */ | |
193 | if (criteria == EHS_REMOVE_WAKEUP && !priv->ehs_remove_supported) | |
194 | criteria = 0; | |
195 | ||
9fae899c | 196 | cmd_config.hdr.size = cpu_to_le16(sizeof(cmd_config)); |
6ce4fd2a | 197 | cmd_config.criteria = cpu_to_le32(criteria); |
506e9025 DW |
198 | cmd_config.gpio = priv->wol_gpio; |
199 | cmd_config.gap = priv->wol_gap; | |
6ce4fd2a | 200 | |
582c1b53 AN |
201 | if (p_wol_config != NULL) |
202 | memcpy((uint8_t *)&cmd_config.wol_conf, (uint8_t *)p_wol_config, | |
203 | sizeof(struct wol_config)); | |
204 | else | |
205 | cmd_config.wol_conf.action = CMD_ACT_ACTION_NONE; | |
206 | ||
66fceb69 AK |
207 | ret = __lbs_cmd(priv, CMD_802_11_HOST_SLEEP_CFG, &cmd_config.hdr, |
208 | le16_to_cpu(cmd_config.hdr.size), | |
209 | lbs_ret_host_sleep_cfg, 0); | |
506e9025 | 210 | if (!ret) { |
66fceb69 | 211 | if (p_wol_config) |
582c1b53 AN |
212 | memcpy((uint8_t *) p_wol_config, |
213 | (uint8_t *)&cmd_config.wol_conf, | |
214 | sizeof(struct wol_config)); | |
506e9025 | 215 | } else { |
f3a57fd1 | 216 | netdev_info(priv->dev, "HOST_SLEEP_CFG failed %d\n", ret); |
6ce4fd2a | 217 | } |
506e9025 | 218 | |
6ce4fd2a DW |
219 | return ret; |
220 | } | |
221 | EXPORT_SYMBOL_GPL(lbs_host_sleep_cfg); | |
222 | ||
0bb64087 | 223 | /** |
8973a6e7 | 224 | * lbs_set_ps_mode - Sets the Power Save mode |
0bb64087 | 225 | * |
8973a6e7 RD |
226 | * @priv: A pointer to &struct lbs_private structure |
227 | * @cmd_action: The Power Save operation (PS_MODE_ACTION_ENTER_PS or | |
0bb64087 | 228 | * PS_MODE_ACTION_EXIT_PS) |
8973a6e7 | 229 | * @block: Whether to block on a response or not |
0bb64087 | 230 | * |
8973a6e7 | 231 | * returns: 0 on success, error on failure |
0bb64087 DW |
232 | */ |
233 | int lbs_set_ps_mode(struct lbs_private *priv, u16 cmd_action, bool block) | |
876c9d3a | 234 | { |
0bb64087 DW |
235 | struct cmd_ds_802_11_ps_mode cmd; |
236 | int ret = 0; | |
876c9d3a | 237 | |
9012b28a | 238 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 239 | |
0bb64087 DW |
240 | memset(&cmd, 0, sizeof(cmd)); |
241 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
242 | cmd.action = cpu_to_le16(cmd_action); | |
876c9d3a | 243 | |
0bb64087 DW |
244 | if (cmd_action == PS_MODE_ACTION_ENTER_PS) { |
245 | lbs_deb_cmd("PS_MODE: action ENTER_PS\n"); | |
246 | cmd.multipledtim = cpu_to_le16(1); /* Default DTIM multiple */ | |
247 | } else if (cmd_action == PS_MODE_ACTION_EXIT_PS) { | |
248 | lbs_deb_cmd("PS_MODE: action EXIT_PS\n"); | |
249 | } else { | |
250 | /* We don't handle CONFIRM_SLEEP here because it needs to | |
251 | * be fastpathed to the firmware. | |
252 | */ | |
253 | lbs_deb_cmd("PS_MODE: unknown action 0x%X\n", cmd_action); | |
254 | ret = -EOPNOTSUPP; | |
255 | goto out; | |
876c9d3a MT |
256 | } |
257 | ||
0bb64087 DW |
258 | if (block) |
259 | ret = lbs_cmd_with_response(priv, CMD_802_11_PS_MODE, &cmd); | |
260 | else | |
261 | lbs_cmd_async(priv, CMD_802_11_PS_MODE, &cmd.hdr, sizeof (cmd)); | |
262 | ||
263 | out: | |
264 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
265 | return ret; | |
876c9d3a MT |
266 | } |
267 | ||
3fbe104c DW |
268 | int lbs_cmd_802_11_sleep_params(struct lbs_private *priv, uint16_t cmd_action, |
269 | struct sleep_params *sp) | |
876c9d3a | 270 | { |
3fbe104c DW |
271 | struct cmd_ds_802_11_sleep_params cmd; |
272 | int ret; | |
876c9d3a | 273 | |
9012b28a | 274 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 275 | |
0aef64d7 | 276 | if (cmd_action == CMD_ACT_GET) { |
3fbe104c DW |
277 | memset(&cmd, 0, sizeof(cmd)); |
278 | } else { | |
279 | cmd.error = cpu_to_le16(sp->sp_error); | |
280 | cmd.offset = cpu_to_le16(sp->sp_offset); | |
281 | cmd.stabletime = cpu_to_le16(sp->sp_stabletime); | |
282 | cmd.calcontrol = sp->sp_calcontrol; | |
283 | cmd.externalsleepclk = sp->sp_extsleepclk; | |
284 | cmd.reserved = cpu_to_le16(sp->sp_reserved); | |
876c9d3a | 285 | } |
3fbe104c DW |
286 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
287 | cmd.action = cpu_to_le16(cmd_action); | |
876c9d3a | 288 | |
3fbe104c DW |
289 | ret = lbs_cmd_with_response(priv, CMD_802_11_SLEEP_PARAMS, &cmd); |
290 | ||
291 | if (!ret) { | |
292 | lbs_deb_cmd("error 0x%x, offset 0x%x, stabletime 0x%x, " | |
293 | "calcontrol 0x%x extsleepclk 0x%x\n", | |
294 | le16_to_cpu(cmd.error), le16_to_cpu(cmd.offset), | |
295 | le16_to_cpu(cmd.stabletime), cmd.calcontrol, | |
296 | cmd.externalsleepclk); | |
297 | ||
298 | sp->sp_error = le16_to_cpu(cmd.error); | |
299 | sp->sp_offset = le16_to_cpu(cmd.offset); | |
300 | sp->sp_stabletime = le16_to_cpu(cmd.stabletime); | |
301 | sp->sp_calcontrol = cmd.calcontrol; | |
302 | sp->sp_extsleepclk = cmd.externalsleepclk; | |
303 | sp->sp_reserved = le16_to_cpu(cmd.reserved); | |
304 | } | |
305 | ||
306 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
876c9d3a MT |
307 | return 0; |
308 | } | |
309 | ||
49125454 AK |
310 | static int lbs_wait_for_ds_awake(struct lbs_private *priv) |
311 | { | |
312 | int ret = 0; | |
313 | ||
314 | lbs_deb_enter(LBS_DEB_CMD); | |
315 | ||
316 | if (priv->is_deep_sleep) { | |
317 | if (!wait_event_interruptible_timeout(priv->ds_awake_q, | |
318 | !priv->is_deep_sleep, (10 * HZ))) { | |
f3a57fd1 | 319 | netdev_err(priv->dev, "ds_awake_q: timer expired\n"); |
49125454 AK |
320 | ret = -1; |
321 | } | |
322 | } | |
323 | ||
324 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
325 | return ret; | |
326 | } | |
327 | ||
328 | int lbs_set_deep_sleep(struct lbs_private *priv, int deep_sleep) | |
329 | { | |
330 | int ret = 0; | |
331 | ||
332 | lbs_deb_enter(LBS_DEB_CMD); | |
333 | ||
334 | if (deep_sleep) { | |
335 | if (priv->is_deep_sleep != 1) { | |
336 | lbs_deb_cmd("deep sleep: sleep\n"); | |
337 | BUG_ON(!priv->enter_deep_sleep); | |
338 | ret = priv->enter_deep_sleep(priv); | |
339 | if (!ret) { | |
340 | netif_stop_queue(priv->dev); | |
341 | netif_carrier_off(priv->dev); | |
342 | } | |
343 | } else { | |
f3a57fd1 | 344 | netdev_err(priv->dev, "deep sleep: already enabled\n"); |
49125454 AK |
345 | } |
346 | } else { | |
347 | if (priv->is_deep_sleep) { | |
348 | lbs_deb_cmd("deep sleep: wakeup\n"); | |
349 | BUG_ON(!priv->exit_deep_sleep); | |
350 | ret = priv->exit_deep_sleep(priv); | |
351 | if (!ret) { | |
352 | ret = lbs_wait_for_ds_awake(priv); | |
353 | if (ret) | |
f3a57fd1 JP |
354 | netdev_err(priv->dev, |
355 | "deep sleep: wakeup failed\n"); | |
49125454 AK |
356 | } |
357 | } | |
358 | } | |
359 | ||
360 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
361 | return ret; | |
362 | } | |
363 | ||
1311843c AK |
364 | static int lbs_ret_host_sleep_activate(struct lbs_private *priv, |
365 | unsigned long dummy, | |
366 | struct cmd_header *cmd) | |
367 | { | |
368 | lbs_deb_enter(LBS_DEB_FW); | |
369 | priv->is_host_sleep_activated = 1; | |
370 | wake_up_interruptible(&priv->host_sleep_q); | |
371 | lbs_deb_leave(LBS_DEB_FW); | |
372 | return 0; | |
373 | } | |
374 | ||
375 | int lbs_set_host_sleep(struct lbs_private *priv, int host_sleep) | |
376 | { | |
377 | struct cmd_header cmd; | |
378 | int ret = 0; | |
379 | uint32_t criteria = EHS_REMOVE_WAKEUP; | |
380 | ||
381 | lbs_deb_enter(LBS_DEB_CMD); | |
382 | ||
383 | if (host_sleep) { | |
384 | if (priv->is_host_sleep_activated != 1) { | |
385 | memset(&cmd, 0, sizeof(cmd)); | |
386 | ret = lbs_host_sleep_cfg(priv, priv->wol_criteria, | |
387 | (struct wol_config *)NULL); | |
388 | if (ret) { | |
f3a57fd1 JP |
389 | netdev_info(priv->dev, |
390 | "Host sleep configuration failed: %d\n", | |
391 | ret); | |
1311843c AK |
392 | return ret; |
393 | } | |
394 | if (priv->psstate == PS_STATE_FULL_POWER) { | |
395 | ret = __lbs_cmd(priv, | |
396 | CMD_802_11_HOST_SLEEP_ACTIVATE, | |
397 | &cmd, | |
398 | sizeof(cmd), | |
399 | lbs_ret_host_sleep_activate, 0); | |
400 | if (ret) | |
f3a57fd1 JP |
401 | netdev_info(priv->dev, |
402 | "HOST_SLEEP_ACTIVATE failed: %d\n", | |
403 | ret); | |
1311843c AK |
404 | } |
405 | ||
406 | if (!wait_event_interruptible_timeout( | |
407 | priv->host_sleep_q, | |
408 | priv->is_host_sleep_activated, | |
409 | (10 * HZ))) { | |
f3a57fd1 JP |
410 | netdev_err(priv->dev, |
411 | "host_sleep_q: timer expired\n"); | |
1311843c AK |
412 | ret = -1; |
413 | } | |
414 | } else { | |
f3a57fd1 | 415 | netdev_err(priv->dev, "host sleep: already enabled\n"); |
1311843c AK |
416 | } |
417 | } else { | |
418 | if (priv->is_host_sleep_activated) | |
419 | ret = lbs_host_sleep_cfg(priv, criteria, | |
420 | (struct wol_config *)NULL); | |
421 | } | |
422 | ||
423 | return ret; | |
424 | } | |
425 | ||
39fcf7a3 | 426 | /** |
8973a6e7 | 427 | * lbs_set_snmp_mib - Set an SNMP MIB value |
39fcf7a3 | 428 | * |
8973a6e7 RD |
429 | * @priv: A pointer to &struct lbs_private structure |
430 | * @oid: The OID to set in the firmware | |
431 | * @val: Value to set the OID to | |
39fcf7a3 | 432 | * |
8973a6e7 | 433 | * returns: 0 on success, error on failure |
39fcf7a3 DW |
434 | */ |
435 | int lbs_set_snmp_mib(struct lbs_private *priv, u32 oid, u16 val) | |
876c9d3a | 436 | { |
39fcf7a3 DW |
437 | struct cmd_ds_802_11_snmp_mib cmd; |
438 | int ret; | |
876c9d3a | 439 | |
9012b28a | 440 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 441 | |
39fcf7a3 DW |
442 | memset(&cmd, 0, sizeof (cmd)); |
443 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
444 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
445 | cmd.oid = cpu_to_le16((u16) oid); | |
876c9d3a | 446 | |
39fcf7a3 DW |
447 | switch (oid) { |
448 | case SNMP_MIB_OID_BSS_TYPE: | |
449 | cmd.bufsize = cpu_to_le16(sizeof(u8)); | |
fef0640e | 450 | cmd.value[0] = val; |
39fcf7a3 DW |
451 | break; |
452 | case SNMP_MIB_OID_11D_ENABLE: | |
453 | case SNMP_MIB_OID_FRAG_THRESHOLD: | |
454 | case SNMP_MIB_OID_RTS_THRESHOLD: | |
455 | case SNMP_MIB_OID_SHORT_RETRY_LIMIT: | |
456 | case SNMP_MIB_OID_LONG_RETRY_LIMIT: | |
457 | cmd.bufsize = cpu_to_le16(sizeof(u16)); | |
458 | *((__le16 *)(&cmd.value)) = cpu_to_le16(val); | |
876c9d3a | 459 | break; |
39fcf7a3 DW |
460 | default: |
461 | lbs_deb_cmd("SNMP_CMD: (set) unhandled OID 0x%x\n", oid); | |
462 | ret = -EINVAL; | |
463 | goto out; | |
876c9d3a MT |
464 | } |
465 | ||
39fcf7a3 DW |
466 | lbs_deb_cmd("SNMP_CMD: (set) oid 0x%x, oid size 0x%x, value 0x%x\n", |
467 | le16_to_cpu(cmd.oid), le16_to_cpu(cmd.bufsize), val); | |
876c9d3a | 468 | |
39fcf7a3 | 469 | ret = lbs_cmd_with_response(priv, CMD_802_11_SNMP_MIB, &cmd); |
876c9d3a | 470 | |
39fcf7a3 DW |
471 | out: |
472 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
473 | return ret; | |
474 | } | |
876c9d3a | 475 | |
39fcf7a3 | 476 | /** |
8973a6e7 | 477 | * lbs_get_snmp_mib - Get an SNMP MIB value |
39fcf7a3 | 478 | * |
8973a6e7 RD |
479 | * @priv: A pointer to &struct lbs_private structure |
480 | * @oid: The OID to retrieve from the firmware | |
481 | * @out_val: Location for the returned value | |
39fcf7a3 | 482 | * |
8973a6e7 | 483 | * returns: 0 on success, error on failure |
39fcf7a3 DW |
484 | */ |
485 | int lbs_get_snmp_mib(struct lbs_private *priv, u32 oid, u16 *out_val) | |
486 | { | |
487 | struct cmd_ds_802_11_snmp_mib cmd; | |
488 | int ret; | |
876c9d3a | 489 | |
39fcf7a3 | 490 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 491 | |
39fcf7a3 DW |
492 | memset(&cmd, 0, sizeof (cmd)); |
493 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
494 | cmd.action = cpu_to_le16(CMD_ACT_GET); | |
495 | cmd.oid = cpu_to_le16(oid); | |
876c9d3a | 496 | |
39fcf7a3 DW |
497 | ret = lbs_cmd_with_response(priv, CMD_802_11_SNMP_MIB, &cmd); |
498 | if (ret) | |
499 | goto out; | |
876c9d3a | 500 | |
39fcf7a3 DW |
501 | switch (le16_to_cpu(cmd.bufsize)) { |
502 | case sizeof(u8): | |
fef0640e | 503 | *out_val = cmd.value[0]; |
39fcf7a3 DW |
504 | break; |
505 | case sizeof(u16): | |
506 | *out_val = le16_to_cpu(*((__le16 *)(&cmd.value))); | |
876c9d3a MT |
507 | break; |
508 | default: | |
39fcf7a3 DW |
509 | lbs_deb_cmd("SNMP_CMD: (get) unhandled OID 0x%x size %d\n", |
510 | oid, le16_to_cpu(cmd.bufsize)); | |
876c9d3a MT |
511 | break; |
512 | } | |
513 | ||
39fcf7a3 DW |
514 | out: |
515 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
516 | return ret; | |
876c9d3a MT |
517 | } |
518 | ||
87c8c72d | 519 | /** |
8973a6e7 | 520 | * lbs_get_tx_power - Get the min, max, and current TX power |
87c8c72d | 521 | * |
8973a6e7 RD |
522 | * @priv: A pointer to &struct lbs_private structure |
523 | * @curlevel: Current power level in dBm | |
524 | * @minlevel: Minimum supported power level in dBm (optional) | |
525 | * @maxlevel: Maximum supported power level in dBm (optional) | |
87c8c72d | 526 | * |
8973a6e7 | 527 | * returns: 0 on success, error on failure |
87c8c72d DW |
528 | */ |
529 | int lbs_get_tx_power(struct lbs_private *priv, s16 *curlevel, s16 *minlevel, | |
530 | s16 *maxlevel) | |
876c9d3a | 531 | { |
87c8c72d DW |
532 | struct cmd_ds_802_11_rf_tx_power cmd; |
533 | int ret; | |
876c9d3a | 534 | |
9012b28a | 535 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 536 | |
87c8c72d DW |
537 | memset(&cmd, 0, sizeof(cmd)); |
538 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
539 | cmd.action = cpu_to_le16(CMD_ACT_GET); | |
540 | ||
541 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_TX_POWER, &cmd); | |
542 | if (ret == 0) { | |
543 | *curlevel = le16_to_cpu(cmd.curlevel); | |
544 | if (minlevel) | |
87bf24f3 | 545 | *minlevel = cmd.minlevel; |
87c8c72d | 546 | if (maxlevel) |
87bf24f3 | 547 | *maxlevel = cmd.maxlevel; |
87c8c72d | 548 | } |
876c9d3a | 549 | |
87c8c72d DW |
550 | lbs_deb_leave(LBS_DEB_CMD); |
551 | return ret; | |
552 | } | |
876c9d3a | 553 | |
87c8c72d | 554 | /** |
8973a6e7 | 555 | * lbs_set_tx_power - Set the TX power |
87c8c72d | 556 | * |
8973a6e7 RD |
557 | * @priv: A pointer to &struct lbs_private structure |
558 | * @dbm: The desired power level in dBm | |
87c8c72d | 559 | * |
8973a6e7 | 560 | * returns: 0 on success, error on failure |
87c8c72d DW |
561 | */ |
562 | int lbs_set_tx_power(struct lbs_private *priv, s16 dbm) | |
563 | { | |
564 | struct cmd_ds_802_11_rf_tx_power cmd; | |
565 | int ret; | |
876c9d3a | 566 | |
87c8c72d | 567 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 568 | |
87c8c72d DW |
569 | memset(&cmd, 0, sizeof(cmd)); |
570 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
571 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
572 | cmd.curlevel = cpu_to_le16(dbm); | |
876c9d3a | 573 | |
87c8c72d DW |
574 | lbs_deb_cmd("SET_RF_TX_POWER: %d dBm\n", dbm); |
575 | ||
576 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_TX_POWER, &cmd); | |
9012b28a HS |
577 | |
578 | lbs_deb_leave(LBS_DEB_CMD); | |
87c8c72d | 579 | return ret; |
876c9d3a MT |
580 | } |
581 | ||
a45b6f4f | 582 | /** |
8973a6e7 RD |
583 | * lbs_set_monitor_mode - Enable or disable monitor mode |
584 | * (only implemented on OLPC usb8388 FW) | |
a45b6f4f | 585 | * |
8973a6e7 RD |
586 | * @priv: A pointer to &struct lbs_private structure |
587 | * @enable: 1 to enable monitor mode, 0 to disable | |
a45b6f4f | 588 | * |
8973a6e7 | 589 | * returns: 0 on success, error on failure |
a45b6f4f DW |
590 | */ |
591 | int lbs_set_monitor_mode(struct lbs_private *priv, int enable) | |
965f8bbc | 592 | { |
a45b6f4f DW |
593 | struct cmd_ds_802_11_monitor_mode cmd; |
594 | int ret; | |
965f8bbc | 595 | |
a45b6f4f DW |
596 | memset(&cmd, 0, sizeof(cmd)); |
597 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
598 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
599 | if (enable) | |
600 | cmd.mode = cpu_to_le16(0x1); | |
965f8bbc | 601 | |
a45b6f4f DW |
602 | lbs_deb_cmd("SET_MONITOR_MODE: %d\n", enable); |
603 | ||
604 | ret = lbs_cmd_with_response(priv, CMD_802_11_MONITOR_MODE, &cmd); | |
605 | if (ret == 0) { | |
606 | priv->dev->type = enable ? ARPHRD_IEEE80211_RADIOTAP : | |
607 | ARPHRD_ETHER; | |
965f8bbc LCC |
608 | } |
609 | ||
a45b6f4f DW |
610 | lbs_deb_leave(LBS_DEB_CMD); |
611 | return ret; | |
965f8bbc LCC |
612 | } |
613 | ||
2dd4b262 | 614 | /** |
8973a6e7 | 615 | * lbs_get_channel - Get the radio channel |
2dd4b262 | 616 | * |
8973a6e7 | 617 | * @priv: A pointer to &struct lbs_private structure |
2dd4b262 | 618 | * |
8973a6e7 | 619 | * returns: The channel on success, error on failure |
2dd4b262 | 620 | */ |
a3cbfb08 | 621 | static int lbs_get_channel(struct lbs_private *priv) |
876c9d3a | 622 | { |
2dd4b262 DW |
623 | struct cmd_ds_802_11_rf_channel cmd; |
624 | int ret = 0; | |
876c9d3a | 625 | |
8ff12da1 | 626 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 627 | |
8d0c7fad | 628 | memset(&cmd, 0, sizeof(cmd)); |
2dd4b262 DW |
629 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
630 | cmd.action = cpu_to_le16(CMD_OPT_802_11_RF_CHANNEL_GET); | |
876c9d3a | 631 | |
689442dc | 632 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_CHANNEL, &cmd); |
2dd4b262 DW |
633 | if (ret) |
634 | goto out; | |
876c9d3a | 635 | |
cb182a60 DW |
636 | ret = le16_to_cpu(cmd.channel); |
637 | lbs_deb_cmd("current radio channel is %d\n", ret); | |
2dd4b262 DW |
638 | |
639 | out: | |
640 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
641 | return ret; | |
642 | } | |
643 | ||
73ab1f25 HS |
644 | int lbs_update_channel(struct lbs_private *priv) |
645 | { | |
646 | int ret; | |
647 | ||
648 | /* the channel in f/w could be out of sync; get the current channel */ | |
649 | lbs_deb_enter(LBS_DEB_ASSOC); | |
650 | ||
651 | ret = lbs_get_channel(priv); | |
652 | if (ret > 0) { | |
c14951fe | 653 | priv->channel = ret; |
73ab1f25 HS |
654 | ret = 0; |
655 | } | |
656 | lbs_deb_leave_args(LBS_DEB_ASSOC, "ret %d", ret); | |
657 | return ret; | |
658 | } | |
659 | ||
2dd4b262 | 660 | /** |
8973a6e7 | 661 | * lbs_set_channel - Set the radio channel |
2dd4b262 | 662 | * |
8973a6e7 RD |
663 | * @priv: A pointer to &struct lbs_private structure |
664 | * @channel: The desired channel, or 0 to clear a locked channel | |
2dd4b262 | 665 | * |
8973a6e7 | 666 | * returns: 0 on success, error on failure |
2dd4b262 DW |
667 | */ |
668 | int lbs_set_channel(struct lbs_private *priv, u8 channel) | |
669 | { | |
670 | struct cmd_ds_802_11_rf_channel cmd; | |
96d46d5d | 671 | #ifdef DEBUG |
c14951fe | 672 | u8 old_channel = priv->channel; |
96d46d5d | 673 | #endif |
2dd4b262 DW |
674 | int ret = 0; |
675 | ||
676 | lbs_deb_enter(LBS_DEB_CMD); | |
677 | ||
8d0c7fad | 678 | memset(&cmd, 0, sizeof(cmd)); |
2dd4b262 DW |
679 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
680 | cmd.action = cpu_to_le16(CMD_OPT_802_11_RF_CHANNEL_SET); | |
681 | cmd.channel = cpu_to_le16(channel); | |
682 | ||
689442dc | 683 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_CHANNEL, &cmd); |
2dd4b262 DW |
684 | if (ret) |
685 | goto out; | |
686 | ||
c14951fe | 687 | priv->channel = (uint8_t) le16_to_cpu(cmd.channel); |
cb182a60 | 688 | lbs_deb_cmd("channel switch from %d to %d\n", old_channel, |
c14951fe | 689 | priv->channel); |
2dd4b262 DW |
690 | |
691 | out: | |
692 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
693 | return ret; | |
876c9d3a MT |
694 | } |
695 | ||
9fb7663d | 696 | /** |
8973a6e7 | 697 | * lbs_get_rssi - Get current RSSI and noise floor |
9fb7663d | 698 | * |
8973a6e7 RD |
699 | * @priv: A pointer to &struct lbs_private structure |
700 | * @rssi: On successful return, signal level in mBm | |
701 | * @nf: On successful return, Noise floor | |
9fb7663d | 702 | * |
8973a6e7 | 703 | * returns: The channel on success, error on failure |
9fb7663d DW |
704 | */ |
705 | int lbs_get_rssi(struct lbs_private *priv, s8 *rssi, s8 *nf) | |
706 | { | |
707 | struct cmd_ds_802_11_rssi cmd; | |
708 | int ret = 0; | |
709 | ||
710 | lbs_deb_enter(LBS_DEB_CMD); | |
711 | ||
712 | BUG_ON(rssi == NULL); | |
713 | BUG_ON(nf == NULL); | |
714 | ||
715 | memset(&cmd, 0, sizeof(cmd)); | |
716 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
717 | /* Average SNR over last 8 beacons */ | |
718 | cmd.n_or_snr = cpu_to_le16(8); | |
719 | ||
720 | ret = lbs_cmd_with_response(priv, CMD_802_11_RSSI, &cmd); | |
721 | if (ret == 0) { | |
722 | *nf = CAL_NF(le16_to_cpu(cmd.nf)); | |
723 | *rssi = CAL_RSSI(le16_to_cpu(cmd.n_or_snr), le16_to_cpu(cmd.nf)); | |
724 | } | |
725 | ||
726 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
727 | return ret; | |
728 | } | |
729 | ||
cc4b9d39 | 730 | /** |
8973a6e7 RD |
731 | * lbs_set_11d_domain_info - Send regulatory and 802.11d domain information |
732 | * to the firmware | |
cc4b9d39 | 733 | * |
8973a6e7 RD |
734 | * @priv: pointer to &struct lbs_private |
735 | * @request: cfg80211 regulatory request structure | |
736 | * @bands: the device's supported bands and channels | |
cc4b9d39 | 737 | * |
8973a6e7 | 738 | * returns: 0 on success, error code on failure |
cc4b9d39 DW |
739 | */ |
740 | int lbs_set_11d_domain_info(struct lbs_private *priv, | |
741 | struct regulatory_request *request, | |
742 | struct ieee80211_supported_band **bands) | |
743 | { | |
744 | struct cmd_ds_802_11d_domain_info cmd; | |
745 | struct mrvl_ie_domain_param_set *domain = &cmd.domain; | |
746 | struct ieee80211_country_ie_triplet *t; | |
747 | enum ieee80211_band band; | |
748 | struct ieee80211_channel *ch; | |
749 | u8 num_triplet = 0; | |
750 | u8 num_parsed_chan = 0; | |
751 | u8 first_channel = 0, next_chan = 0, max_pwr = 0; | |
752 | u8 i, flag = 0; | |
753 | size_t triplet_size; | |
754 | int ret; | |
755 | ||
756 | lbs_deb_enter(LBS_DEB_11D); | |
757 | ||
758 | memset(&cmd, 0, sizeof(cmd)); | |
759 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
760 | ||
761 | lbs_deb_11d("Setting country code '%c%c'\n", | |
762 | request->alpha2[0], request->alpha2[1]); | |
763 | ||
764 | domain->header.type = cpu_to_le16(TLV_TYPE_DOMAIN); | |
765 | ||
766 | /* Set country code */ | |
767 | domain->country_code[0] = request->alpha2[0]; | |
768 | domain->country_code[1] = request->alpha2[1]; | |
769 | domain->country_code[2] = ' '; | |
770 | ||
771 | /* Now set up the channel triplets; firmware is somewhat picky here | |
772 | * and doesn't validate channel numbers and spans; hence it would | |
773 | * interpret a triplet of (36, 4, 20) as channels 36, 37, 38, 39. Since | |
774 | * the last 3 aren't valid channels, the driver is responsible for | |
775 | * splitting that up into 4 triplet pairs of (36, 1, 20) + (40, 1, 20) | |
776 | * etc. | |
777 | */ | |
778 | for (band = 0; | |
779 | (band < IEEE80211_NUM_BANDS) && (num_triplet < MAX_11D_TRIPLETS); | |
780 | band++) { | |
781 | ||
782 | if (!bands[band]) | |
783 | continue; | |
784 | ||
785 | for (i = 0; | |
786 | (i < bands[band]->n_channels) && (num_triplet < MAX_11D_TRIPLETS); | |
787 | i++) { | |
788 | ch = &bands[band]->channels[i]; | |
789 | if (ch->flags & IEEE80211_CHAN_DISABLED) | |
790 | continue; | |
791 | ||
792 | if (!flag) { | |
793 | flag = 1; | |
794 | next_chan = first_channel = (u32) ch->hw_value; | |
795 | max_pwr = ch->max_power; | |
796 | num_parsed_chan = 1; | |
797 | continue; | |
798 | } | |
799 | ||
800 | if ((ch->hw_value == next_chan + 1) && | |
801 | (ch->max_power == max_pwr)) { | |
802 | /* Consolidate adjacent channels */ | |
803 | next_chan++; | |
804 | num_parsed_chan++; | |
805 | } else { | |
806 | /* Add this triplet */ | |
807 | lbs_deb_11d("11D triplet (%d, %d, %d)\n", | |
808 | first_channel, num_parsed_chan, | |
809 | max_pwr); | |
810 | t = &domain->triplet[num_triplet]; | |
811 | t->chans.first_channel = first_channel; | |
812 | t->chans.num_channels = num_parsed_chan; | |
813 | t->chans.max_power = max_pwr; | |
814 | num_triplet++; | |
815 | flag = 0; | |
816 | } | |
817 | } | |
818 | ||
819 | if (flag) { | |
820 | /* Add last triplet */ | |
821 | lbs_deb_11d("11D triplet (%d, %d, %d)\n", first_channel, | |
822 | num_parsed_chan, max_pwr); | |
823 | t = &domain->triplet[num_triplet]; | |
824 | t->chans.first_channel = first_channel; | |
825 | t->chans.num_channels = num_parsed_chan; | |
826 | t->chans.max_power = max_pwr; | |
827 | num_triplet++; | |
828 | } | |
829 | } | |
830 | ||
831 | lbs_deb_11d("# triplets %d\n", num_triplet); | |
832 | ||
833 | /* Set command header sizes */ | |
834 | triplet_size = num_triplet * sizeof(struct ieee80211_country_ie_triplet); | |
835 | domain->header.len = cpu_to_le16(sizeof(domain->country_code) + | |
836 | triplet_size); | |
837 | ||
838 | lbs_deb_hex(LBS_DEB_11D, "802.11D domain param set", | |
839 | (u8 *) &cmd.domain.country_code, | |
840 | le16_to_cpu(domain->header.len)); | |
841 | ||
842 | cmd.hdr.size = cpu_to_le16(sizeof(cmd.hdr) + | |
843 | sizeof(cmd.action) + | |
844 | sizeof(cmd.domain.header) + | |
845 | sizeof(cmd.domain.country_code) + | |
846 | triplet_size); | |
847 | ||
848 | ret = lbs_cmd_with_response(priv, CMD_802_11D_DOMAIN_INFO, &cmd); | |
849 | ||
850 | lbs_deb_leave_args(LBS_DEB_11D, "ret %d", ret); | |
851 | return ret; | |
852 | } | |
853 | ||
4c7c6e00 | 854 | /** |
8973a6e7 | 855 | * lbs_get_reg - Read a MAC, Baseband, or RF register |
4c7c6e00 | 856 | * |
8973a6e7 RD |
857 | * @priv: pointer to &struct lbs_private |
858 | * @reg: register command, one of CMD_MAC_REG_ACCESS, | |
859 | * CMD_BBP_REG_ACCESS, or CMD_RF_REG_ACCESS | |
860 | * @offset: byte offset of the register to get | |
861 | * @value: on success, the value of the register at 'offset' | |
4c7c6e00 | 862 | * |
8973a6e7 | 863 | * returns: 0 on success, error code on failure |
4c7c6e00 DW |
864 | */ |
865 | int lbs_get_reg(struct lbs_private *priv, u16 reg, u16 offset, u32 *value) | |
876c9d3a | 866 | { |
4c7c6e00 DW |
867 | struct cmd_ds_reg_access cmd; |
868 | int ret = 0; | |
876c9d3a | 869 | |
9012b28a | 870 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 871 | |
4c7c6e00 | 872 | BUG_ON(value == NULL); |
876c9d3a | 873 | |
4c7c6e00 DW |
874 | memset(&cmd, 0, sizeof(cmd)); |
875 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
876 | cmd.action = cpu_to_le16(CMD_ACT_GET); | |
876c9d3a | 877 | |
4c7c6e00 DW |
878 | if (reg != CMD_MAC_REG_ACCESS && |
879 | reg != CMD_BBP_REG_ACCESS && | |
880 | reg != CMD_RF_REG_ACCESS) { | |
881 | ret = -EINVAL; | |
882 | goto out; | |
883 | } | |
876c9d3a | 884 | |
4c7c6e00 DW |
885 | ret = lbs_cmd_with_response(priv, reg, &cmd); |
886 | if (ret) { | |
887 | if (reg == CMD_BBP_REG_ACCESS || reg == CMD_RF_REG_ACCESS) | |
888 | *value = cmd.value.bbp_rf; | |
889 | else if (reg == CMD_MAC_REG_ACCESS) | |
890 | *value = le32_to_cpu(cmd.value.mac); | |
891 | } | |
876c9d3a | 892 | |
4c7c6e00 DW |
893 | out: |
894 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
895 | return ret; | |
896 | } | |
876c9d3a | 897 | |
4c7c6e00 | 898 | /** |
8973a6e7 | 899 | * lbs_set_reg - Write a MAC, Baseband, or RF register |
4c7c6e00 | 900 | * |
8973a6e7 RD |
901 | * @priv: pointer to &struct lbs_private |
902 | * @reg: register command, one of CMD_MAC_REG_ACCESS, | |
903 | * CMD_BBP_REG_ACCESS, or CMD_RF_REG_ACCESS | |
904 | * @offset: byte offset of the register to set | |
905 | * @value: the value to write to the register at 'offset' | |
4c7c6e00 | 906 | * |
8973a6e7 | 907 | * returns: 0 on success, error code on failure |
4c7c6e00 DW |
908 | */ |
909 | int lbs_set_reg(struct lbs_private *priv, u16 reg, u16 offset, u32 value) | |
910 | { | |
911 | struct cmd_ds_reg_access cmd; | |
912 | int ret = 0; | |
876c9d3a | 913 | |
4c7c6e00 | 914 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 915 | |
4c7c6e00 DW |
916 | memset(&cmd, 0, sizeof(cmd)); |
917 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
918 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
876c9d3a | 919 | |
4c7c6e00 DW |
920 | if (reg == CMD_BBP_REG_ACCESS || reg == CMD_RF_REG_ACCESS) |
921 | cmd.value.bbp_rf = (u8) (value & 0xFF); | |
922 | else if (reg == CMD_MAC_REG_ACCESS) | |
923 | cmd.value.mac = cpu_to_le32(value); | |
924 | else { | |
925 | ret = -EINVAL; | |
926 | goto out; | |
876c9d3a MT |
927 | } |
928 | ||
4c7c6e00 DW |
929 | ret = lbs_cmd_with_response(priv, reg, &cmd); |
930 | ||
931 | out: | |
932 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
933 | return ret; | |
876c9d3a MT |
934 | } |
935 | ||
681ffbb7 DW |
936 | static void lbs_queue_cmd(struct lbs_private *priv, |
937 | struct cmd_ctrl_node *cmdnode) | |
876c9d3a MT |
938 | { |
939 | unsigned long flags; | |
681ffbb7 | 940 | int addtail = 1; |
876c9d3a | 941 | |
8ff12da1 | 942 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 943 | |
c4ab4127 DW |
944 | if (!cmdnode) { |
945 | lbs_deb_host("QUEUE_CMD: cmdnode is NULL\n"); | |
876c9d3a MT |
946 | goto done; |
947 | } | |
d9896ee1 DW |
948 | if (!cmdnode->cmdbuf->size) { |
949 | lbs_deb_host("DNLD_CMD: cmd size is zero\n"); | |
950 | goto done; | |
951 | } | |
ae125bf8 | 952 | cmdnode->result = 0; |
876c9d3a MT |
953 | |
954 | /* Exit_PS command needs to be queued in the header always. */ | |
ddac4526 | 955 | if (le16_to_cpu(cmdnode->cmdbuf->command) == CMD_802_11_PS_MODE) { |
0bb64087 | 956 | struct cmd_ds_802_11_ps_mode *psm = (void *) &cmdnode->cmdbuf; |
ddac4526 | 957 | |
0bb64087 | 958 | if (psm->action == cpu_to_le16(PS_MODE_ACTION_EXIT_PS)) { |
aa21c004 | 959 | if (priv->psstate != PS_STATE_FULL_POWER) |
876c9d3a MT |
960 | addtail = 0; |
961 | } | |
962 | } | |
963 | ||
0bb64087 | 964 | if (le16_to_cpu(cmdnode->cmdbuf->command) == CMD_802_11_WAKEUP_CONFIRM) |
66fceb69 AK |
965 | addtail = 0; |
966 | ||
aa21c004 | 967 | spin_lock_irqsave(&priv->driver_lock, flags); |
876c9d3a | 968 | |
ac47246e | 969 | if (addtail) |
aa21c004 | 970 | list_add_tail(&cmdnode->list, &priv->cmdpendingq); |
ac47246e | 971 | else |
aa21c004 | 972 | list_add(&cmdnode->list, &priv->cmdpendingq); |
876c9d3a | 973 | |
aa21c004 | 974 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 975 | |
8ff12da1 | 976 | lbs_deb_host("QUEUE_CMD: inserted command 0x%04x into cmdpendingq\n", |
c4ab4127 | 977 | le16_to_cpu(cmdnode->cmdbuf->command)); |
876c9d3a MT |
978 | |
979 | done: | |
8ff12da1 | 980 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
981 | } |
982 | ||
18c52e7c DW |
983 | static void lbs_submit_command(struct lbs_private *priv, |
984 | struct cmd_ctrl_node *cmdnode) | |
876c9d3a MT |
985 | { |
986 | unsigned long flags; | |
ddac4526 | 987 | struct cmd_header *cmd; |
18c52e7c DW |
988 | uint16_t cmdsize; |
989 | uint16_t command; | |
57962f0b | 990 | int timeo = 3 * HZ; |
18c52e7c | 991 | int ret; |
876c9d3a | 992 | |
8ff12da1 | 993 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 994 | |
ddac4526 | 995 | cmd = cmdnode->cmdbuf; |
876c9d3a | 996 | |
aa21c004 | 997 | spin_lock_irqsave(&priv->driver_lock, flags); |
71005be4 DD |
998 | priv->seqnum++; |
999 | cmd->seqnum = cpu_to_le16(priv->seqnum); | |
aa21c004 | 1000 | priv->cur_cmd = cmdnode; |
aa21c004 | 1001 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 1002 | |
ddac4526 DW |
1003 | cmdsize = le16_to_cpu(cmd->size); |
1004 | command = le16_to_cpu(cmd->command); | |
876c9d3a | 1005 | |
18c52e7c | 1006 | /* These commands take longer */ |
be0d76e4 | 1007 | if (command == CMD_802_11_SCAN || command == CMD_802_11_ASSOCIATE) |
57962f0b | 1008 | timeo = 5 * HZ; |
18c52e7c | 1009 | |
e5225b39 HS |
1010 | lbs_deb_cmd("DNLD_CMD: command 0x%04x, seq %d, size %d\n", |
1011 | command, le16_to_cpu(cmd->seqnum), cmdsize); | |
1afc09ab | 1012 | lbs_deb_hex(LBS_DEB_CMD, "DNLD_CMD", (void *) cmdnode->cmdbuf, cmdsize); |
8ff12da1 | 1013 | |
ddac4526 | 1014 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) cmd, cmdsize); |
18c52e7c | 1015 | |
d9896ee1 | 1016 | if (ret) { |
f3a57fd1 JP |
1017 | netdev_info(priv->dev, "DNLD_CMD: hw_host_to_card failed: %d\n", |
1018 | ret); | |
18c52e7c DW |
1019 | /* Let the timer kick in and retry, and potentially reset |
1020 | the whole thing if the condition persists */ | |
57962f0b | 1021 | timeo = HZ/4; |
1afc09ab | 1022 | } |
876c9d3a | 1023 | |
49125454 AK |
1024 | if (command == CMD_802_11_DEEP_SLEEP) { |
1025 | if (priv->is_auto_deep_sleep_enabled) { | |
1026 | priv->wakeup_dev_required = 1; | |
1027 | priv->dnld_sent = 0; | |
1028 | } | |
1029 | priv->is_deep_sleep = 1; | |
1030 | lbs_complete_command(priv, cmdnode, 0); | |
1031 | } else { | |
1032 | /* Setup the timer after transmit command */ | |
1033 | mod_timer(&priv->command_timer, jiffies + timeo); | |
1034 | } | |
876c9d3a | 1035 | |
18c52e7c | 1036 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
1037 | } |
1038 | ||
8973a6e7 | 1039 | /* |
876c9d3a | 1040 | * This function inserts command node to cmdfreeq |
aa21c004 | 1041 | * after cleans it. Requires priv->driver_lock held. |
876c9d3a | 1042 | */ |
183aeac1 | 1043 | static void __lbs_cleanup_and_insert_cmd(struct lbs_private *priv, |
5ba2f8a0 | 1044 | struct cmd_ctrl_node *cmdnode) |
876c9d3a | 1045 | { |
5ba2f8a0 DW |
1046 | lbs_deb_enter(LBS_DEB_HOST); |
1047 | ||
1048 | if (!cmdnode) | |
1049 | goto out; | |
1050 | ||
5ba2f8a0 DW |
1051 | cmdnode->callback = NULL; |
1052 | cmdnode->callback_arg = 0; | |
876c9d3a | 1053 | |
5ba2f8a0 | 1054 | memset(cmdnode->cmdbuf, 0, LBS_CMD_BUFFER_SIZE); |
876c9d3a | 1055 | |
5ba2f8a0 DW |
1056 | list_add_tail(&cmdnode->list, &priv->cmdfreeq); |
1057 | out: | |
1058 | lbs_deb_leave(LBS_DEB_HOST); | |
876c9d3a MT |
1059 | } |
1060 | ||
69f9032d HS |
1061 | static void lbs_cleanup_and_insert_cmd(struct lbs_private *priv, |
1062 | struct cmd_ctrl_node *ptempcmd) | |
876c9d3a MT |
1063 | { |
1064 | unsigned long flags; | |
1065 | ||
aa21c004 | 1066 | spin_lock_irqsave(&priv->driver_lock, flags); |
10078321 | 1067 | __lbs_cleanup_and_insert_cmd(priv, ptempcmd); |
aa21c004 | 1068 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1069 | } |
1070 | ||
183aeac1 DW |
1071 | void lbs_complete_command(struct lbs_private *priv, struct cmd_ctrl_node *cmd, |
1072 | int result) | |
1073 | { | |
ae125bf8 | 1074 | cmd->result = result; |
5ba2f8a0 DW |
1075 | cmd->cmdwaitqwoken = 1; |
1076 | wake_up_interruptible(&cmd->cmdwait_q); | |
1077 | ||
8db4a2b9 | 1078 | if (!cmd->callback || cmd->callback == lbs_cmd_async_callback) |
ad12d0f4 | 1079 | __lbs_cleanup_and_insert_cmd(priv, cmd); |
183aeac1 DW |
1080 | priv->cur_cmd = NULL; |
1081 | } | |
1082 | ||
d5db2dfa | 1083 | int lbs_set_radio(struct lbs_private *priv, u8 preamble, u8 radio_on) |
876c9d3a | 1084 | { |
a7c45890 | 1085 | struct cmd_ds_802_11_radio_control cmd; |
d5db2dfa | 1086 | int ret = -EINVAL; |
876c9d3a | 1087 | |
9012b28a | 1088 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 1089 | |
a7c45890 DW |
1090 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
1091 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
1092 | ||
d5db2dfa DW |
1093 | /* Only v8 and below support setting the preamble */ |
1094 | if (priv->fwrelease < 0x09000000) { | |
1095 | switch (preamble) { | |
1096 | case RADIO_PREAMBLE_SHORT: | |
d5db2dfa DW |
1097 | case RADIO_PREAMBLE_AUTO: |
1098 | case RADIO_PREAMBLE_LONG: | |
1099 | cmd.control = cpu_to_le16(preamble); | |
1100 | break; | |
1101 | default: | |
1102 | goto out; | |
1103 | } | |
1104 | } | |
a7c45890 | 1105 | |
d5db2dfa DW |
1106 | if (radio_on) |
1107 | cmd.control |= cpu_to_le16(0x1); | |
1108 | else { | |
1109 | cmd.control &= cpu_to_le16(~0x1); | |
1110 | priv->txpower_cur = 0; | |
a7c45890 | 1111 | } |
876c9d3a | 1112 | |
d5db2dfa DW |
1113 | lbs_deb_cmd("RADIO_CONTROL: radio %s, preamble %d\n", |
1114 | radio_on ? "ON" : "OFF", preamble); | |
a7c45890 | 1115 | |
d5db2dfa | 1116 | priv->radio_on = radio_on; |
a7c45890 DW |
1117 | |
1118 | ret = lbs_cmd_with_response(priv, CMD_802_11_RADIO_CONTROL, &cmd); | |
876c9d3a | 1119 | |
d5db2dfa | 1120 | out: |
9012b28a | 1121 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); |
876c9d3a MT |
1122 | return ret; |
1123 | } | |
1124 | ||
c97329e2 | 1125 | void lbs_set_mac_control(struct lbs_private *priv) |
876c9d3a | 1126 | { |
835d3ac5 | 1127 | struct cmd_ds_mac_control cmd; |
876c9d3a | 1128 | |
9012b28a | 1129 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 1130 | |
835d3ac5 | 1131 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
d9e9778c | 1132 | cmd.action = cpu_to_le16(priv->mac_control); |
835d3ac5 HS |
1133 | cmd.reserved = 0; |
1134 | ||
75bf45a7 | 1135 | lbs_cmd_async(priv, CMD_MAC_CONTROL, &cmd.hdr, sizeof(cmd)); |
876c9d3a | 1136 | |
c97329e2 | 1137 | lbs_deb_leave(LBS_DEB_CMD); |
876c9d3a MT |
1138 | } |
1139 | ||
876c9d3a | 1140 | /** |
8973a6e7 RD |
1141 | * lbs_allocate_cmd_buffer - allocates the command buffer and links |
1142 | * it to command free queue | |
1143 | * | |
1144 | * @priv: A pointer to &struct lbs_private structure | |
876c9d3a | 1145 | * |
8973a6e7 | 1146 | * returns: 0 for success or -1 on error |
876c9d3a | 1147 | */ |
69f9032d | 1148 | int lbs_allocate_cmd_buffer(struct lbs_private *priv) |
876c9d3a MT |
1149 | { |
1150 | int ret = 0; | |
ddac4526 | 1151 | u32 bufsize; |
876c9d3a | 1152 | u32 i; |
ddac4526 | 1153 | struct cmd_ctrl_node *cmdarray; |
876c9d3a | 1154 | |
8ff12da1 | 1155 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 1156 | |
ddac4526 DW |
1157 | /* Allocate and initialize the command array */ |
1158 | bufsize = sizeof(struct cmd_ctrl_node) * LBS_NUM_CMD_BUFFERS; | |
1159 | if (!(cmdarray = kzalloc(bufsize, GFP_KERNEL))) { | |
8ff12da1 | 1160 | lbs_deb_host("ALLOC_CMD_BUF: tempcmd_array is NULL\n"); |
876c9d3a MT |
1161 | ret = -1; |
1162 | goto done; | |
1163 | } | |
ddac4526 | 1164 | priv->cmd_array = cmdarray; |
876c9d3a | 1165 | |
ddac4526 DW |
1166 | /* Allocate and initialize each command buffer in the command array */ |
1167 | for (i = 0; i < LBS_NUM_CMD_BUFFERS; i++) { | |
1168 | cmdarray[i].cmdbuf = kzalloc(LBS_CMD_BUFFER_SIZE, GFP_KERNEL); | |
1169 | if (!cmdarray[i].cmdbuf) { | |
8ff12da1 | 1170 | lbs_deb_host("ALLOC_CMD_BUF: ptempvirtualaddr is NULL\n"); |
876c9d3a MT |
1171 | ret = -1; |
1172 | goto done; | |
1173 | } | |
876c9d3a MT |
1174 | } |
1175 | ||
ddac4526 DW |
1176 | for (i = 0; i < LBS_NUM_CMD_BUFFERS; i++) { |
1177 | init_waitqueue_head(&cmdarray[i].cmdwait_q); | |
1178 | lbs_cleanup_and_insert_cmd(priv, &cmdarray[i]); | |
876c9d3a | 1179 | } |
876c9d3a | 1180 | ret = 0; |
9012b28a HS |
1181 | |
1182 | done: | |
8ff12da1 | 1183 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); |
876c9d3a MT |
1184 | return ret; |
1185 | } | |
1186 | ||
1187 | /** | |
8973a6e7 | 1188 | * lbs_free_cmd_buffer - free the command buffer |
876c9d3a | 1189 | * |
8973a6e7 RD |
1190 | * @priv: A pointer to &struct lbs_private structure |
1191 | * | |
1192 | * returns: 0 for success | |
876c9d3a | 1193 | */ |
69f9032d | 1194 | int lbs_free_cmd_buffer(struct lbs_private *priv) |
876c9d3a | 1195 | { |
ddac4526 | 1196 | struct cmd_ctrl_node *cmdarray; |
876c9d3a | 1197 | unsigned int i; |
876c9d3a | 1198 | |
8ff12da1 | 1199 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a MT |
1200 | |
1201 | /* need to check if cmd array is allocated or not */ | |
aa21c004 | 1202 | if (priv->cmd_array == NULL) { |
8ff12da1 | 1203 | lbs_deb_host("FREE_CMD_BUF: cmd_array is NULL\n"); |
876c9d3a MT |
1204 | goto done; |
1205 | } | |
1206 | ||
ddac4526 | 1207 | cmdarray = priv->cmd_array; |
876c9d3a MT |
1208 | |
1209 | /* Release shared memory buffers */ | |
ddac4526 DW |
1210 | for (i = 0; i < LBS_NUM_CMD_BUFFERS; i++) { |
1211 | if (cmdarray[i].cmdbuf) { | |
1212 | kfree(cmdarray[i].cmdbuf); | |
1213 | cmdarray[i].cmdbuf = NULL; | |
876c9d3a MT |
1214 | } |
1215 | } | |
1216 | ||
1217 | /* Release cmd_ctrl_node */ | |
aa21c004 DW |
1218 | if (priv->cmd_array) { |
1219 | kfree(priv->cmd_array); | |
1220 | priv->cmd_array = NULL; | |
876c9d3a MT |
1221 | } |
1222 | ||
1223 | done: | |
8ff12da1 | 1224 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
1225 | return 0; |
1226 | } | |
1227 | ||
1228 | /** | |
8973a6e7 RD |
1229 | * lbs_get_free_cmd_node - gets a free command node if available in |
1230 | * command free queue | |
1231 | * | |
1232 | * @priv: A pointer to &struct lbs_private structure | |
876c9d3a | 1233 | * |
8973a6e7 RD |
1234 | * returns: A pointer to &cmd_ctrl_node structure on success |
1235 | * or %NULL on error | |
876c9d3a | 1236 | */ |
d06956b5 | 1237 | static struct cmd_ctrl_node *lbs_get_free_cmd_node(struct lbs_private *priv) |
876c9d3a MT |
1238 | { |
1239 | struct cmd_ctrl_node *tempnode; | |
876c9d3a MT |
1240 | unsigned long flags; |
1241 | ||
8ff12da1 HS |
1242 | lbs_deb_enter(LBS_DEB_HOST); |
1243 | ||
aa21c004 | 1244 | if (!priv) |
876c9d3a MT |
1245 | return NULL; |
1246 | ||
aa21c004 | 1247 | spin_lock_irqsave(&priv->driver_lock, flags); |
876c9d3a | 1248 | |
aa21c004 DW |
1249 | if (!list_empty(&priv->cmdfreeq)) { |
1250 | tempnode = list_first_entry(&priv->cmdfreeq, | |
abe3ed14 LZ |
1251 | struct cmd_ctrl_node, list); |
1252 | list_del(&tempnode->list); | |
876c9d3a | 1253 | } else { |
8ff12da1 | 1254 | lbs_deb_host("GET_CMD_NODE: cmd_ctrl_node is not available\n"); |
876c9d3a MT |
1255 | tempnode = NULL; |
1256 | } | |
1257 | ||
aa21c004 | 1258 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 1259 | |
8ff12da1 | 1260 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
1261 | return tempnode; |
1262 | } | |
1263 | ||
876c9d3a | 1264 | /** |
8973a6e7 RD |
1265 | * lbs_execute_next_command - execute next command in command |
1266 | * pending queue. Will put firmware back to PS mode if applicable. | |
876c9d3a | 1267 | * |
8973a6e7 RD |
1268 | * @priv: A pointer to &struct lbs_private structure |
1269 | * | |
1270 | * returns: 0 on success or -1 on error | |
876c9d3a | 1271 | */ |
69f9032d | 1272 | int lbs_execute_next_command(struct lbs_private *priv) |
876c9d3a | 1273 | { |
876c9d3a | 1274 | struct cmd_ctrl_node *cmdnode = NULL; |
ddac4526 | 1275 | struct cmd_header *cmd; |
876c9d3a MT |
1276 | unsigned long flags; |
1277 | int ret = 0; | |
1278 | ||
1afc09ab HS |
1279 | /* Debug group is LBS_DEB_THREAD and not LBS_DEB_HOST, because the |
1280 | * only caller to us is lbs_thread() and we get even when a | |
1281 | * data packet is received */ | |
8ff12da1 | 1282 | lbs_deb_enter(LBS_DEB_THREAD); |
876c9d3a | 1283 | |
aa21c004 | 1284 | spin_lock_irqsave(&priv->driver_lock, flags); |
876c9d3a | 1285 | |
aa21c004 | 1286 | if (priv->cur_cmd) { |
f3a57fd1 JP |
1287 | netdev_alert(priv->dev, |
1288 | "EXEC_NEXT_CMD: already processing command!\n"); | |
aa21c004 | 1289 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1290 | ret = -1; |
1291 | goto done; | |
1292 | } | |
1293 | ||
aa21c004 DW |
1294 | if (!list_empty(&priv->cmdpendingq)) { |
1295 | cmdnode = list_first_entry(&priv->cmdpendingq, | |
abe3ed14 | 1296 | struct cmd_ctrl_node, list); |
876c9d3a MT |
1297 | } |
1298 | ||
aa21c004 | 1299 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1300 | |
1301 | if (cmdnode) { | |
ddac4526 | 1302 | cmd = cmdnode->cmdbuf; |
876c9d3a | 1303 | |
ddac4526 | 1304 | if (is_command_allowed_in_ps(le16_to_cpu(cmd->command))) { |
aa21c004 DW |
1305 | if ((priv->psstate == PS_STATE_SLEEP) || |
1306 | (priv->psstate == PS_STATE_PRE_SLEEP)) { | |
8ff12da1 HS |
1307 | lbs_deb_host( |
1308 | "EXEC_NEXT_CMD: cannot send cmd 0x%04x in psstate %d\n", | |
ddac4526 | 1309 | le16_to_cpu(cmd->command), |
aa21c004 | 1310 | priv->psstate); |
876c9d3a MT |
1311 | ret = -1; |
1312 | goto done; | |
1313 | } | |
8ff12da1 | 1314 | lbs_deb_host("EXEC_NEXT_CMD: OK to send command " |
ddac4526 DW |
1315 | "0x%04x in psstate %d\n", |
1316 | le16_to_cpu(cmd->command), priv->psstate); | |
aa21c004 | 1317 | } else if (priv->psstate != PS_STATE_FULL_POWER) { |
876c9d3a MT |
1318 | /* |
1319 | * 1. Non-PS command: | |
1320 | * Queue it. set needtowakeup to TRUE if current state | |
0bb64087 DW |
1321 | * is SLEEP, otherwise call send EXIT_PS. |
1322 | * 2. PS command but not EXIT_PS: | |
876c9d3a | 1323 | * Ignore it. |
0bb64087 | 1324 | * 3. PS command EXIT_PS: |
876c9d3a MT |
1325 | * Set needtowakeup to TRUE if current state is SLEEP, |
1326 | * otherwise send this command down to firmware | |
1327 | * immediately. | |
1328 | */ | |
ddac4526 | 1329 | if (cmd->command != cpu_to_le16(CMD_802_11_PS_MODE)) { |
876c9d3a MT |
1330 | /* Prepare to send Exit PS, |
1331 | * this non PS command will be sent later */ | |
aa21c004 DW |
1332 | if ((priv->psstate == PS_STATE_SLEEP) |
1333 | || (priv->psstate == PS_STATE_PRE_SLEEP) | |
876c9d3a MT |
1334 | ) { |
1335 | /* w/ new scheme, it will not reach here. | |
1336 | since it is blocked in main_thread. */ | |
aa21c004 | 1337 | priv->needtowakeup = 1; |
0bb64087 DW |
1338 | } else { |
1339 | lbs_set_ps_mode(priv, | |
1340 | PS_MODE_ACTION_EXIT_PS, | |
1341 | false); | |
1342 | } | |
876c9d3a MT |
1343 | |
1344 | ret = 0; | |
1345 | goto done; | |
1346 | } else { | |
1347 | /* | |
1348 | * PS command. Ignore it if it is not Exit_PS. | |
1349 | * otherwise send it down immediately. | |
1350 | */ | |
38bfab1a | 1351 | struct cmd_ds_802_11_ps_mode *psm = (void *)&cmd[1]; |
876c9d3a | 1352 | |
8ff12da1 HS |
1353 | lbs_deb_host( |
1354 | "EXEC_NEXT_CMD: PS cmd, action 0x%02x\n", | |
876c9d3a MT |
1355 | psm->action); |
1356 | if (psm->action != | |
0bb64087 | 1357 | cpu_to_le16(PS_MODE_ACTION_EXIT_PS)) { |
8ff12da1 HS |
1358 | lbs_deb_host( |
1359 | "EXEC_NEXT_CMD: ignore ENTER_PS cmd\n"); | |
183aeac1 | 1360 | spin_lock_irqsave(&priv->driver_lock, flags); |
2ae1b8b3 | 1361 | list_del(&cmdnode->list); |
183aeac1 DW |
1362 | lbs_complete_command(priv, cmdnode, 0); |
1363 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
876c9d3a MT |
1364 | |
1365 | ret = 0; | |
1366 | goto done; | |
1367 | } | |
1368 | ||
aa21c004 DW |
1369 | if ((priv->psstate == PS_STATE_SLEEP) || |
1370 | (priv->psstate == PS_STATE_PRE_SLEEP)) { | |
8ff12da1 HS |
1371 | lbs_deb_host( |
1372 | "EXEC_NEXT_CMD: ignore EXIT_PS cmd in sleep\n"); | |
183aeac1 | 1373 | spin_lock_irqsave(&priv->driver_lock, flags); |
2ae1b8b3 | 1374 | list_del(&cmdnode->list); |
183aeac1 DW |
1375 | lbs_complete_command(priv, cmdnode, 0); |
1376 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
aa21c004 | 1377 | priv->needtowakeup = 1; |
876c9d3a MT |
1378 | |
1379 | ret = 0; | |
1380 | goto done; | |
1381 | } | |
1382 | ||
8ff12da1 HS |
1383 | lbs_deb_host( |
1384 | "EXEC_NEXT_CMD: sending EXIT_PS\n"); | |
876c9d3a MT |
1385 | } |
1386 | } | |
2ae1b8b3 | 1387 | spin_lock_irqsave(&priv->driver_lock, flags); |
abe3ed14 | 1388 | list_del(&cmdnode->list); |
2ae1b8b3 | 1389 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
8ff12da1 | 1390 | lbs_deb_host("EXEC_NEXT_CMD: sending command 0x%04x\n", |
ddac4526 | 1391 | le16_to_cpu(cmd->command)); |
d9896ee1 | 1392 | lbs_submit_command(priv, cmdnode); |
876c9d3a MT |
1393 | } else { |
1394 | /* | |
1395 | * check if in power save mode, if yes, put the device back | |
1396 | * to PS mode | |
1397 | */ | |
e86dc1ca KD |
1398 | #ifdef TODO |
1399 | /* | |
1400 | * This was the old code for libertas+wext. Someone that | |
1401 | * understands this beast should re-code it in a sane way. | |
1402 | * | |
1403 | * I actually don't understand why this is related to WPA | |
1404 | * and to connection status, shouldn't powering should be | |
1405 | * independ of such things? | |
1406 | */ | |
aa21c004 DW |
1407 | if ((priv->psmode != LBS802_11POWERMODECAM) && |
1408 | (priv->psstate == PS_STATE_FULL_POWER) && | |
1409 | ((priv->connect_status == LBS_CONNECTED) || | |
602114ae | 1410 | lbs_mesh_connected(priv))) { |
aa21c004 DW |
1411 | if (priv->secinfo.WPAenabled || |
1412 | priv->secinfo.WPA2enabled) { | |
876c9d3a | 1413 | /* check for valid WPA group keys */ |
aa21c004 DW |
1414 | if (priv->wpa_mcast_key.len || |
1415 | priv->wpa_unicast_key.len) { | |
8ff12da1 | 1416 | lbs_deb_host( |
876c9d3a MT |
1417 | "EXEC_NEXT_CMD: WPA enabled and GTK_SET" |
1418 | " go back to PS_SLEEP"); | |
0bb64087 DW |
1419 | lbs_set_ps_mode(priv, |
1420 | PS_MODE_ACTION_ENTER_PS, | |
1421 | false); | |
876c9d3a MT |
1422 | } |
1423 | } else { | |
8ff12da1 HS |
1424 | lbs_deb_host( |
1425 | "EXEC_NEXT_CMD: cmdpendingq empty, " | |
1426 | "go back to PS_SLEEP"); | |
0bb64087 DW |
1427 | lbs_set_ps_mode(priv, PS_MODE_ACTION_ENTER_PS, |
1428 | false); | |
876c9d3a MT |
1429 | } |
1430 | } | |
e86dc1ca | 1431 | #endif |
876c9d3a MT |
1432 | } |
1433 | ||
1434 | ret = 0; | |
1435 | done: | |
8ff12da1 | 1436 | lbs_deb_leave(LBS_DEB_THREAD); |
876c9d3a MT |
1437 | return ret; |
1438 | } | |
1439 | ||
f539f2ef | 1440 | static void lbs_send_confirmsleep(struct lbs_private *priv) |
876c9d3a MT |
1441 | { |
1442 | unsigned long flags; | |
f539f2ef | 1443 | int ret; |
876c9d3a | 1444 | |
8ff12da1 | 1445 | lbs_deb_enter(LBS_DEB_HOST); |
f539f2ef HS |
1446 | lbs_deb_hex(LBS_DEB_HOST, "sleep confirm", (u8 *) &confirm_sleep, |
1447 | sizeof(confirm_sleep)); | |
876c9d3a | 1448 | |
f539f2ef HS |
1449 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) &confirm_sleep, |
1450 | sizeof(confirm_sleep)); | |
876c9d3a | 1451 | if (ret) { |
f3a57fd1 | 1452 | netdev_alert(priv->dev, "confirm_sleep failed\n"); |
7919b89c | 1453 | goto out; |
876c9d3a | 1454 | } |
7919b89c HS |
1455 | |
1456 | spin_lock_irqsave(&priv->driver_lock, flags); | |
1457 | ||
a01f5450 HS |
1458 | /* We don't get a response on the sleep-confirmation */ |
1459 | priv->dnld_sent = DNLD_RES_RECEIVED; | |
1460 | ||
66fceb69 AK |
1461 | if (priv->is_host_sleep_configured) { |
1462 | priv->is_host_sleep_activated = 1; | |
1463 | wake_up_interruptible(&priv->host_sleep_q); | |
1464 | } | |
1465 | ||
7919b89c | 1466 | /* If nothing to do, go back to sleep (?) */ |
e64c026d | 1467 | if (!kfifo_len(&priv->event_fifo) && !priv->resp_len[priv->resp_idx]) |
7919b89c HS |
1468 | priv->psstate = PS_STATE_SLEEP; |
1469 | ||
1470 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
1471 | ||
1472 | out: | |
f539f2ef | 1473 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
1474 | } |
1475 | ||
876c9d3a | 1476 | /** |
8973a6e7 RD |
1477 | * lbs_ps_confirm_sleep - checks condition and prepares to |
1478 | * send sleep confirm command to firmware if ok | |
1479 | * | |
1480 | * @priv: A pointer to &struct lbs_private structure | |
876c9d3a | 1481 | * |
8973a6e7 | 1482 | * returns: n/a |
876c9d3a | 1483 | */ |
d4ff0ef6 | 1484 | void lbs_ps_confirm_sleep(struct lbs_private *priv) |
876c9d3a MT |
1485 | { |
1486 | unsigned long flags =0; | |
d4ff0ef6 | 1487 | int allowed = 1; |
876c9d3a | 1488 | |
8ff12da1 | 1489 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 1490 | |
a01f5450 | 1491 | spin_lock_irqsave(&priv->driver_lock, flags); |
634b8f49 | 1492 | if (priv->dnld_sent) { |
876c9d3a | 1493 | allowed = 0; |
23d36eec | 1494 | lbs_deb_host("dnld_sent was set\n"); |
876c9d3a MT |
1495 | } |
1496 | ||
7919b89c | 1497 | /* In-progress command? */ |
aa21c004 | 1498 | if (priv->cur_cmd) { |
876c9d3a | 1499 | allowed = 0; |
23d36eec | 1500 | lbs_deb_host("cur_cmd was set\n"); |
876c9d3a | 1501 | } |
7919b89c HS |
1502 | |
1503 | /* Pending events or command responses? */ | |
e64c026d | 1504 | if (kfifo_len(&priv->event_fifo) || priv->resp_len[priv->resp_idx]) { |
876c9d3a | 1505 | allowed = 0; |
7919b89c | 1506 | lbs_deb_host("pending events or command responses\n"); |
876c9d3a | 1507 | } |
aa21c004 | 1508 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1509 | |
1510 | if (allowed) { | |
10078321 | 1511 | lbs_deb_host("sending lbs_ps_confirm_sleep\n"); |
f539f2ef | 1512 | lbs_send_confirmsleep(priv); |
876c9d3a | 1513 | } else { |
8ff12da1 | 1514 | lbs_deb_host("sleep confirm has been delayed\n"); |
876c9d3a MT |
1515 | } |
1516 | ||
8ff12da1 | 1517 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a | 1518 | } |
675787e2 HS |
1519 | |
1520 | ||
0112c9e9 | 1521 | /** |
8973a6e7 | 1522 | * lbs_set_tpc_cfg - Configures the transmission power control functionality |
0112c9e9 | 1523 | * |
8973a6e7 RD |
1524 | * @priv: A pointer to &struct lbs_private structure |
1525 | * @enable: Transmission power control enable | |
1526 | * @p0: Power level when link quality is good (dBm). | |
1527 | * @p1: Power level when link quality is fair (dBm). | |
1528 | * @p2: Power level when link quality is poor (dBm). | |
1529 | * @usesnr: Use Signal to Noise Ratio in TPC | |
0112c9e9 | 1530 | * |
8973a6e7 | 1531 | * returns: 0 on success |
0112c9e9 AN |
1532 | */ |
1533 | int lbs_set_tpc_cfg(struct lbs_private *priv, int enable, int8_t p0, int8_t p1, | |
1534 | int8_t p2, int usesnr) | |
1535 | { | |
1536 | struct cmd_ds_802_11_tpc_cfg cmd; | |
1537 | int ret; | |
1538 | ||
1539 | memset(&cmd, 0, sizeof(cmd)); | |
1540 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
1541 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
1542 | cmd.enable = !!enable; | |
3ed6e080 | 1543 | cmd.usesnr = !!usesnr; |
0112c9e9 AN |
1544 | cmd.P0 = p0; |
1545 | cmd.P1 = p1; | |
1546 | cmd.P2 = p2; | |
1547 | ||
1548 | ret = lbs_cmd_with_response(priv, CMD_802_11_TPC_CFG, &cmd); | |
1549 | ||
1550 | return ret; | |
1551 | } | |
1552 | ||
1553 | /** | |
8973a6e7 | 1554 | * lbs_set_power_adapt_cfg - Configures the power adaptation settings |
0112c9e9 | 1555 | * |
8973a6e7 RD |
1556 | * @priv: A pointer to &struct lbs_private structure |
1557 | * @enable: Power adaptation enable | |
1558 | * @p0: Power level for 1, 2, 5.5 and 11 Mbps (dBm). | |
1559 | * @p1: Power level for 6, 9, 12, 18, 22, 24 and 36 Mbps (dBm). | |
1560 | * @p2: Power level for 48 and 54 Mbps (dBm). | |
0112c9e9 | 1561 | * |
8973a6e7 | 1562 | * returns: 0 on Success |
0112c9e9 AN |
1563 | */ |
1564 | ||
1565 | int lbs_set_power_adapt_cfg(struct lbs_private *priv, int enable, int8_t p0, | |
1566 | int8_t p1, int8_t p2) | |
1567 | { | |
1568 | struct cmd_ds_802_11_pa_cfg cmd; | |
1569 | int ret; | |
1570 | ||
1571 | memset(&cmd, 0, sizeof(cmd)); | |
1572 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
1573 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
1574 | cmd.enable = !!enable; | |
1575 | cmd.P0 = p0; | |
1576 | cmd.P1 = p1; | |
1577 | cmd.P2 = p2; | |
1578 | ||
1579 | ret = lbs_cmd_with_response(priv, CMD_802_11_PA_CFG , &cmd); | |
1580 | ||
1581 | return ret; | |
1582 | } | |
1583 | ||
1584 | ||
6d898b19 | 1585 | struct cmd_ctrl_node *__lbs_cmd_async(struct lbs_private *priv, |
8db4a2b9 HS |
1586 | uint16_t command, struct cmd_header *in_cmd, int in_cmd_size, |
1587 | int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *), | |
1588 | unsigned long callback_arg) | |
675787e2 | 1589 | { |
675787e2 | 1590 | struct cmd_ctrl_node *cmdnode; |
675787e2 HS |
1591 | |
1592 | lbs_deb_enter(LBS_DEB_HOST); | |
675787e2 | 1593 | |
aa21c004 | 1594 | if (priv->surpriseremoved) { |
675787e2 | 1595 | lbs_deb_host("PREP_CMD: card removed\n"); |
3399ea5f | 1596 | cmdnode = ERR_PTR(-ENOENT); |
675787e2 HS |
1597 | goto done; |
1598 | } | |
1599 | ||
77ccdcf2 DW |
1600 | /* No commands are allowed in Deep Sleep until we toggle the GPIO |
1601 | * to wake up the card and it has signaled that it's ready. | |
1602 | */ | |
1603 | if (!priv->is_auto_deep_sleep_enabled) { | |
1604 | if (priv->is_deep_sleep) { | |
1605 | lbs_deb_cmd("command not allowed in deep sleep\n"); | |
1606 | cmdnode = ERR_PTR(-EBUSY); | |
1607 | goto done; | |
1608 | } | |
63f275df AK |
1609 | } |
1610 | ||
d06956b5 | 1611 | cmdnode = lbs_get_free_cmd_node(priv); |
675787e2 HS |
1612 | if (cmdnode == NULL) { |
1613 | lbs_deb_host("PREP_CMD: cmdnode is NULL\n"); | |
1614 | ||
1615 | /* Wake up main thread to execute next command */ | |
1616 | wake_up_interruptible(&priv->waitq); | |
3399ea5f | 1617 | cmdnode = ERR_PTR(-ENOBUFS); |
675787e2 HS |
1618 | goto done; |
1619 | } | |
1620 | ||
448a51ae | 1621 | cmdnode->callback = callback; |
1309b55b | 1622 | cmdnode->callback_arg = callback_arg; |
675787e2 | 1623 | |
7ad994de | 1624 | /* Copy the incoming command to the buffer */ |
ddac4526 | 1625 | memcpy(cmdnode->cmdbuf, in_cmd, in_cmd_size); |
7ad994de | 1626 | |
71005be4 | 1627 | /* Set command, clean result, move to buffer */ |
ddac4526 DW |
1628 | cmdnode->cmdbuf->command = cpu_to_le16(command); |
1629 | cmdnode->cmdbuf->size = cpu_to_le16(in_cmd_size); | |
ddac4526 | 1630 | cmdnode->cmdbuf->result = 0; |
675787e2 HS |
1631 | |
1632 | lbs_deb_host("PREP_CMD: command 0x%04x\n", command); | |
1633 | ||
675787e2 | 1634 | cmdnode->cmdwaitqwoken = 0; |
681ffbb7 | 1635 | lbs_queue_cmd(priv, cmdnode); |
675787e2 HS |
1636 | wake_up_interruptible(&priv->waitq); |
1637 | ||
3399ea5f DW |
1638 | done: |
1639 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %p", cmdnode); | |
1640 | return cmdnode; | |
1641 | } | |
1642 | ||
8db4a2b9 HS |
1643 | void lbs_cmd_async(struct lbs_private *priv, uint16_t command, |
1644 | struct cmd_header *in_cmd, int in_cmd_size) | |
1645 | { | |
1646 | lbs_deb_enter(LBS_DEB_CMD); | |
1647 | __lbs_cmd_async(priv, command, in_cmd, in_cmd_size, | |
1648 | lbs_cmd_async_callback, 0); | |
1649 | lbs_deb_leave(LBS_DEB_CMD); | |
1650 | } | |
1651 | ||
3399ea5f DW |
1652 | int __lbs_cmd(struct lbs_private *priv, uint16_t command, |
1653 | struct cmd_header *in_cmd, int in_cmd_size, | |
1654 | int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *), | |
1655 | unsigned long callback_arg) | |
1656 | { | |
1657 | struct cmd_ctrl_node *cmdnode; | |
1658 | unsigned long flags; | |
1659 | int ret = 0; | |
1660 | ||
1661 | lbs_deb_enter(LBS_DEB_HOST); | |
1662 | ||
1663 | cmdnode = __lbs_cmd_async(priv, command, in_cmd, in_cmd_size, | |
1664 | callback, callback_arg); | |
1665 | if (IS_ERR(cmdnode)) { | |
1666 | ret = PTR_ERR(cmdnode); | |
1667 | goto done; | |
1668 | } | |
1669 | ||
675787e2 HS |
1670 | might_sleep(); |
1671 | wait_event_interruptible(cmdnode->cmdwait_q, cmdnode->cmdwaitqwoken); | |
1672 | ||
aa21c004 | 1673 | spin_lock_irqsave(&priv->driver_lock, flags); |
ae125bf8 DW |
1674 | ret = cmdnode->result; |
1675 | if (ret) | |
f3a57fd1 JP |
1676 | netdev_info(priv->dev, "PREP_CMD: command 0x%04x failed: %d\n", |
1677 | command, ret); | |
3399ea5f | 1678 | |
ad12d0f4 | 1679 | __lbs_cleanup_and_insert_cmd(priv, cmdnode); |
aa21c004 | 1680 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
675787e2 HS |
1681 | |
1682 | done: | |
1683 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); | |
1684 | return ret; | |
1685 | } | |
14e865ba | 1686 | EXPORT_SYMBOL_GPL(__lbs_cmd); |