Commit | Line | Data |
---|---|---|
876c9d3a MT |
1 | /** |
2 | * This header file contains global constant/enum definitions, | |
3 | * global variable declaration. | |
4 | */ | |
10078321 HS |
5 | #ifndef _LBS_DEFS_H_ |
6 | #define _LBS_DEFS_H_ | |
876c9d3a MT |
7 | |
8 | #include <linux/spinlock.h> | |
9 | ||
3a8b9a4a DW |
10 | #ifdef CONFIG_LIBERTAS_DEBUG |
11 | #define DEBUG | |
12 | #define PROC_DEBUG | |
13 | #endif | |
14 | ||
ec3eef28 HS |
15 | #ifndef DRV_NAME |
16 | #define DRV_NAME "libertas" | |
17 | #endif | |
9012b28a HS |
18 | |
19 | ||
a46c6410 HS |
20 | #define LBS_DEB_ENTER 0x00000001 |
21 | #define LBS_DEB_LEAVE 0x00000002 | |
22 | #define LBS_DEB_MAIN 0x00000004 | |
23 | #define LBS_DEB_NET 0x00000008 | |
24 | #define LBS_DEB_MESH 0x00000010 | |
25 | #define LBS_DEB_WEXT 0x00000020 | |
26 | #define LBS_DEB_IOCTL 0x00000040 | |
27 | #define LBS_DEB_SCAN 0x00000080 | |
28 | #define LBS_DEB_ASSOC 0x00000100 | |
29 | #define LBS_DEB_JOIN 0x00000200 | |
30 | #define LBS_DEB_11D 0x00000400 | |
31 | #define LBS_DEB_DEBUGFS 0x00000800 | |
32 | #define LBS_DEB_ETHTOOL 0x00001000 | |
33 | #define LBS_DEB_HOST 0x00002000 | |
34 | #define LBS_DEB_CMD 0x00004000 | |
35 | #define LBS_DEB_RX 0x00008000 | |
36 | #define LBS_DEB_TX 0x00010000 | |
37 | #define LBS_DEB_USB 0x00020000 | |
38 | #define LBS_DEB_CS 0x00040000 | |
39 | #define LBS_DEB_FW 0x00080000 | |
40 | #define LBS_DEB_THREAD 0x00100000 | |
41 | #define LBS_DEB_HEX 0x00200000 | |
727c26ed | 42 | #define LBS_DEB_SDIO 0x00400000 |
15dbaac0 | 43 | #define LBS_DEB_SYSFS 0x00800000 |
d2b21f19 | 44 | #define LBS_DEB_SPI 0x01000000 |
ff9fc791 | 45 | #define LBS_DEB_CFG80211 0x02000000 |
a46c6410 | 46 | |
10078321 | 47 | extern unsigned int lbs_debug; |
9012b28a HS |
48 | |
49 | #ifdef DEBUG | |
ece56191 | 50 | #define LBS_DEB_LL(grp, grpnam, fmt, args...) \ |
10078321 | 51 | do { if ((lbs_debug & (grp)) == (grp)) \ |
ece56191 | 52 | printk(KERN_DEBUG DRV_NAME grpnam "%s: " fmt, \ |
9012b28a HS |
53 | in_interrupt() ? " (INT)" : "", ## args); } while (0) |
54 | #else | |
ece56191 | 55 | #define LBS_DEB_LL(grp, grpnam, fmt, args...) do {} while (0) |
9012b28a HS |
56 | #endif |
57 | ||
58 | #define lbs_deb_enter(grp) \ | |
e5225b39 | 59 | LBS_DEB_LL(grp | LBS_DEB_ENTER, " enter", "%s()\n", __func__); |
9012b28a | 60 | #define lbs_deb_enter_args(grp, fmt, args...) \ |
e5225b39 | 61 | LBS_DEB_LL(grp | LBS_DEB_ENTER, " enter", "%s(" fmt ")\n", __func__, ## args); |
9012b28a | 62 | #define lbs_deb_leave(grp) \ |
e5225b39 | 63 | LBS_DEB_LL(grp | LBS_DEB_LEAVE, " leave", "%s()\n", __func__); |
9012b28a | 64 | #define lbs_deb_leave_args(grp, fmt, args...) \ |
e5225b39 HS |
65 | LBS_DEB_LL(grp | LBS_DEB_LEAVE, " leave", "%s(), " fmt "\n", \ |
66 | __func__, ##args); | |
ece56191 HS |
67 | #define lbs_deb_main(fmt, args...) LBS_DEB_LL(LBS_DEB_MAIN, " main", fmt, ##args) |
68 | #define lbs_deb_net(fmt, args...) LBS_DEB_LL(LBS_DEB_NET, " net", fmt, ##args) | |
69 | #define lbs_deb_mesh(fmt, args...) LBS_DEB_LL(LBS_DEB_MESH, " mesh", fmt, ##args) | |
70 | #define lbs_deb_wext(fmt, args...) LBS_DEB_LL(LBS_DEB_WEXT, " wext", fmt, ##args) | |
71 | #define lbs_deb_ioctl(fmt, args...) LBS_DEB_LL(LBS_DEB_IOCTL, " ioctl", fmt, ##args) | |
72 | #define lbs_deb_scan(fmt, args...) LBS_DEB_LL(LBS_DEB_SCAN, " scan", fmt, ##args) | |
73 | #define lbs_deb_assoc(fmt, args...) LBS_DEB_LL(LBS_DEB_ASSOC, " assoc", fmt, ##args) | |
74 | #define lbs_deb_join(fmt, args...) LBS_DEB_LL(LBS_DEB_JOIN, " join", fmt, ##args) | |
75 | #define lbs_deb_11d(fmt, args...) LBS_DEB_LL(LBS_DEB_11D, " 11d", fmt, ##args) | |
76 | #define lbs_deb_debugfs(fmt, args...) LBS_DEB_LL(LBS_DEB_DEBUGFS, " debugfs", fmt, ##args) | |
77 | #define lbs_deb_ethtool(fmt, args...) LBS_DEB_LL(LBS_DEB_ETHTOOL, " ethtool", fmt, ##args) | |
78 | #define lbs_deb_host(fmt, args...) LBS_DEB_LL(LBS_DEB_HOST, " host", fmt, ##args) | |
79 | #define lbs_deb_cmd(fmt, args...) LBS_DEB_LL(LBS_DEB_CMD, " cmd", fmt, ##args) | |
80 | #define lbs_deb_rx(fmt, args...) LBS_DEB_LL(LBS_DEB_RX, " rx", fmt, ##args) | |
81 | #define lbs_deb_tx(fmt, args...) LBS_DEB_LL(LBS_DEB_TX, " tx", fmt, ##args) | |
82 | #define lbs_deb_fw(fmt, args...) LBS_DEB_LL(LBS_DEB_FW, " fw", fmt, ##args) | |
83 | #define lbs_deb_usb(fmt, args...) LBS_DEB_LL(LBS_DEB_USB, " usb", fmt, ##args) | |
fb28ad35 | 84 | #define lbs_deb_usbd(dev, fmt, args...) LBS_DEB_LL(LBS_DEB_USB, " usbd", "%s:" fmt, dev_name(dev), ##args) |
ece56191 HS |
85 | #define lbs_deb_cs(fmt, args...) LBS_DEB_LL(LBS_DEB_CS, " cs", fmt, ##args) |
86 | #define lbs_deb_thread(fmt, args...) LBS_DEB_LL(LBS_DEB_THREAD, " thread", fmt, ##args) | |
15dbaac0 JC |
87 | #define lbs_deb_sdio(fmt, args...) LBS_DEB_LL(LBS_DEB_SDIO, " sdio", fmt, ##args) |
88 | #define lbs_deb_sysfs(fmt, args...) LBS_DEB_LL(LBS_DEB_SYSFS, " sysfs", fmt, ##args) | |
d2b21f19 | 89 | #define lbs_deb_spi(fmt, args...) LBS_DEB_LL(LBS_DEB_SPI, " spi", fmt, ##args) |
ff9fc791 | 90 | #define lbs_deb_cfg80211(fmt, args...) LBS_DEB_LL(LBS_DEB_CFG80211, " cfg80211", fmt, ##args) |
876c9d3a MT |
91 | |
92 | #define lbs_pr_info(format, args...) \ | |
93 | printk(KERN_INFO DRV_NAME": " format, ## args) | |
94 | #define lbs_pr_err(format, args...) \ | |
95 | printk(KERN_ERR DRV_NAME": " format, ## args) | |
96 | #define lbs_pr_alert(format, args...) \ | |
97 | printk(KERN_ALERT DRV_NAME": " format, ## args) | |
98 | ||
99 | #ifdef DEBUG | |
ece56191 | 100 | static inline void lbs_deb_hex(unsigned int grp, const char *prompt, u8 *buf, int len) |
876c9d3a MT |
101 | { |
102 | int i = 0; | |
103 | ||
ece56191 | 104 | if (len && |
10078321 HS |
105 | (lbs_debug & LBS_DEB_HEX) && |
106 | (lbs_debug & grp)) | |
ece56191 HS |
107 | { |
108 | for (i = 1; i <= len; i++) { | |
109 | if ((i & 0xf) == 1) { | |
110 | if (i != 1) | |
111 | printk("\n"); | |
112 | printk(DRV_NAME " %s: ", prompt); | |
113 | } | |
114 | printk("%02x ", (u8) * buf); | |
115 | buf++; | |
116 | } | |
117 | printk("\n"); | |
876c9d3a | 118 | } |
876c9d3a MT |
119 | } |
120 | #else | |
ece56191 | 121 | #define lbs_deb_hex(grp,prompt,buf,len) do {} while (0) |
876c9d3a MT |
122 | #endif |
123 | ||
9012b28a | 124 | |
876c9d3a MT |
125 | |
126 | /** Buffer Constants */ | |
127 | ||
128 | /* The size of SQ memory PPA, DPA are 8 DWORDs, that keep the physical | |
129 | * addresses of TxPD buffers. Station has only 8 TxPD available, Whereas | |
130 | * driver has more local TxPDs. Each TxPD on the host memory is associated | |
131 | * with a Tx control node. The driver maintains 8 RxPD descriptors for | |
132 | * station firmware to store Rx packet information. | |
133 | * | |
134 | * Current version of MAC has a 32x6 multicast address buffer. | |
135 | * | |
136 | * 802.11b can have up to 14 channels, the driver keeps the | |
137 | * BSSID(MAC address) of each APs or Ad hoc stations it has sensed. | |
138 | */ | |
139 | ||
140 | #define MRVDRV_MAX_MULTICAST_LIST_SIZE 32 | |
ddac4526 DW |
141 | #define LBS_NUM_CMD_BUFFERS 10 |
142 | #define LBS_CMD_BUFFER_SIZE (2 * 1024) | |
876c9d3a | 143 | #define MRVDRV_MAX_CHANNEL_SIZE 14 |
876c9d3a MT |
144 | #define MRVDRV_ASSOCIATION_TIME_OUT 255 |
145 | #define MRVDRV_SNAP_HEADER_LEN 8 | |
146 | ||
10078321 | 147 | #define LBS_UPLD_SIZE 2312 |
876c9d3a MT |
148 | #define DEV_NAME_LEN 32 |
149 | ||
6ce4fd2a DW |
150 | /* Wake criteria for HOST_SLEEP_CFG command */ |
151 | #define EHS_WAKE_ON_BROADCAST_DATA 0x0001 | |
152 | #define EHS_WAKE_ON_UNICAST_DATA 0x0002 | |
153 | #define EHS_WAKE_ON_MAC_EVENT 0x0004 | |
154 | #define EHS_WAKE_ON_MULTICAST_DATA 0x0008 | |
155 | #define EHS_REMOVE_WAKEUP 0xFFFFFFFF | |
582c1b53 AN |
156 | /* Wake rules for Host_Sleep_CFG command */ |
157 | #define WOL_RULE_NET_TYPE_INFRA_OR_IBSS 0x00 | |
158 | #define WOL_RULE_NET_TYPE_MESH 0x10 | |
159 | #define WOL_RULE_ADDR_TYPE_BCAST 0x01 | |
160 | #define WOL_RULE_ADDR_TYPE_MCAST 0x08 | |
161 | #define WOL_RULE_ADDR_TYPE_UCAST 0x02 | |
162 | #define WOL_RULE_OP_AND 0x01 | |
163 | #define WOL_RULE_OP_OR 0x02 | |
164 | #define WOL_RULE_OP_INVALID 0xFF | |
165 | #define WOL_RESULT_VALID_CMD 0 | |
166 | #define WOL_RESULT_NOSPC_ERR 1 | |
167 | #define WOL_RESULT_EEXIST_ERR 2 | |
6ce4fd2a | 168 | |
876c9d3a MT |
169 | /** Misc constants */ |
170 | /* This section defines 802.11 specific contants */ | |
171 | ||
172 | #define MRVDRV_MAX_BSS_DESCRIPTS 16 | |
173 | #define MRVDRV_MAX_REGION_CODE 6 | |
174 | ||
876c9d3a MT |
175 | #define MRVDRV_DEFAULT_LISTEN_INTERVAL 10 |
176 | ||
177 | #define MRVDRV_CHANNELS_PER_SCAN 4 | |
178 | #define MRVDRV_MAX_CHANNELS_PER_SCAN 14 | |
179 | ||
876c9d3a MT |
180 | #define MRVDRV_MIN_BEACON_INTERVAL 20 |
181 | #define MRVDRV_MAX_BEACON_INTERVAL 1000 | |
182 | #define MRVDRV_BEACON_INTERVAL 100 | |
183 | ||
1e838bf3 LCC |
184 | #define MARVELL_MESH_IE_LENGTH 9 |
185 | ||
edaea5ce JC |
186 | /* Values used to populate the struct mrvl_mesh_ie. The only time you need this |
187 | * is when enabling the mesh using CMD_MESH_CONFIG. | |
188 | */ | |
189 | #define MARVELL_MESH_IE_TYPE 4 | |
190 | #define MARVELL_MESH_IE_SUBTYPE 0 | |
191 | #define MARVELL_MESH_IE_VERSION 0 | |
192 | #define MARVELL_MESH_PROTO_ID_HWMP 0 | |
193 | #define MARVELL_MESH_METRIC_ID 0 | |
194 | #define MARVELL_MESH_CAPABILITY 0 | |
195 | ||
208fdd2f | 196 | /** INT status Bit Definition*/ |
c95c7f93 HS |
197 | #define MRVDRV_TX_DNLD_RDY 0x0001 |
198 | #define MRVDRV_RX_UPLD_RDY 0x0002 | |
199 | #define MRVDRV_CMD_DNLD_RDY 0x0004 | |
200 | #define MRVDRV_CMD_UPLD_RDY 0x0008 | |
201 | #define MRVDRV_CARDEVENT 0x0010 | |
208fdd2f | 202 | |
0112c9e9 AN |
203 | /* Automatic TX control default levels */ |
204 | #define POW_ADAPT_DEFAULT_P0 13 | |
205 | #define POW_ADAPT_DEFAULT_P1 15 | |
206 | #define POW_ADAPT_DEFAULT_P2 18 | |
207 | #define TPC_DEFAULT_P0 5 | |
208 | #define TPC_DEFAULT_P1 10 | |
209 | #define TPC_DEFAULT_P2 13 | |
210 | ||
876c9d3a MT |
211 | /** TxPD status */ |
212 | ||
213 | /* Station firmware use TxPD status field to report final Tx transmit | |
214 | * result, Bit masks are used to present combined situations. | |
215 | */ | |
216 | ||
217 | #define MRVDRV_TxPD_POWER_MGMT_NULL_PACKET 0x01 | |
218 | #define MRVDRV_TxPD_POWER_MGMT_LAST_PACKET 0x08 | |
219 | ||
220 | /** Tx mesh flag */ | |
221 | /* Currently we are using normal WDS flag as mesh flag. | |
222 | * TODO: change to proper mesh flag when MAC understands it. | |
223 | */ | |
224 | #define TxPD_CONTROL_WDS_FRAME (1<<17) | |
225 | #define TxPD_MESH_FRAME TxPD_CONTROL_WDS_FRAME | |
226 | ||
684d6b36 BZ |
227 | /** Mesh interface ID */ |
228 | #define MESH_IFACE_ID 0x0001 | |
229 | /** Mesh id should be in bits 14-13-12 */ | |
230 | #define MESH_IFACE_BIT_OFFSET 0x000c | |
231 | /** Mesh enable bit in FW capability */ | |
232 | #define MESH_CAPINFO_ENABLE_MASK (1<<16) | |
233 | ||
15483996 MV |
234 | /** FW definition from Marvell v4 */ |
235 | #define MRVL_FW_V4 (0x04) | |
684d6b36 BZ |
236 | /** FW definition from Marvell v5 */ |
237 | #define MRVL_FW_V5 (0x05) | |
238 | /** FW definition from Marvell v10 */ | |
239 | #define MRVL_FW_V10 (0x0a) | |
240 | /** FW major revision definition */ | |
241 | #define MRVL_FW_MAJOR_REV(x) ((x)>>24) | |
242 | ||
876c9d3a MT |
243 | /** RxPD status */ |
244 | ||
245 | #define MRVDRV_RXPD_STATUS_OK 0x0001 | |
246 | ||
247 | /** RxPD status - Received packet types */ | |
248 | /** Rx mesh flag */ | |
249 | /* Currently we are using normal WDS flag as mesh flag. | |
250 | * TODO: change to proper mesh flag when MAC understands it. | |
251 | */ | |
252 | #define RxPD_CONTROL_WDS_FRAME (0x40) | |
253 | #define RxPD_MESH_FRAME RxPD_CONTROL_WDS_FRAME | |
254 | ||
255 | /** RSSI-related defines */ | |
256 | /* RSSI constants are used to implement 802.11 RSSI threshold | |
257 | * indication. if the Rx packet signal got too weak for 5 consecutive | |
258 | * times, miniport driver (driver) will report this event to wrapper | |
259 | */ | |
260 | ||
261 | #define MRVDRV_NF_DEFAULT_SCAN_VALUE (-96) | |
262 | ||
263 | /** RTS/FRAG related defines */ | |
264 | #define MRVDRV_RTS_MIN_VALUE 0 | |
265 | #define MRVDRV_RTS_MAX_VALUE 2347 | |
266 | #define MRVDRV_FRAG_MIN_VALUE 256 | |
267 | #define MRVDRV_FRAG_MAX_VALUE 2346 | |
268 | ||
269 | /* This is for firmware specific length */ | |
270 | #define EXTRA_LEN 36 | |
271 | ||
272 | #define MRVDRV_ETH_TX_PACKET_BUFFER_SIZE \ | |
273 | (ETH_FRAME_LEN + sizeof(struct txpd) + EXTRA_LEN) | |
274 | ||
275 | #define MRVDRV_ETH_RX_PACKET_BUFFER_SIZE \ | |
276 | (ETH_FRAME_LEN + sizeof(struct rxpd) \ | |
277 | + MRVDRV_SNAP_HEADER_LEN + EXTRA_LEN) | |
278 | ||
279 | #define CMD_F_HOSTCMD (1 << 0) | |
280 | #define FW_CAPINFO_WPA (1 << 0) | |
f5ac2b9e | 281 | #define FW_CAPINFO_PS (1 << 1) |
1556c0f2 BC |
282 | #define FW_CAPINFO_FIRMWARE_UPGRADE (1 << 13) |
283 | #define FW_CAPINFO_BOOT2_UPGRADE (1<<14) | |
284 | #define FW_CAPINFO_PERSISTENT_CONFIG (1<<15) | |
876c9d3a | 285 | |
876c9d3a MT |
286 | #define KEY_LEN_WPA_AES 16 |
287 | #define KEY_LEN_WPA_TKIP 32 | |
288 | #define KEY_LEN_WEP_104 13 | |
289 | #define KEY_LEN_WEP_40 5 | |
290 | ||
291 | #define RF_ANTENNA_1 0x1 | |
292 | #define RF_ANTENNA_2 0x2 | |
293 | #define RF_ANTENNA_AUTO 0xFFFF | |
294 | ||
295 | #define BAND_B (0x01) | |
296 | #define BAND_G (0x02) | |
297 | #define ALL_802_11_BANDS (BAND_B | BAND_G) | |
298 | ||
8c512765 | 299 | #define MAX_RATES 14 |
876c9d3a MT |
300 | |
301 | #define MAX_LEDS 8 | |
302 | ||
876c9d3a | 303 | /** Global Variable Declaration */ |
10078321 HS |
304 | extern const char lbs_driver_version[]; |
305 | extern u16 lbs_region_code_to_index[MRVDRV_MAX_REGION_CODE]; | |
876c9d3a | 306 | |
876c9d3a MT |
307 | |
308 | /** ENUM definition*/ | |
309 | /** SNRNF_TYPE */ | |
310 | enum SNRNF_TYPE { | |
311 | TYPE_BEACON = 0, | |
312 | TYPE_RXPD, | |
313 | MAX_TYPE_B | |
314 | }; | |
315 | ||
316 | /** SNRNF_DATA*/ | |
317 | enum SNRNF_DATA { | |
318 | TYPE_NOAVG = 0, | |
319 | TYPE_AVG, | |
320 | MAX_TYPE_AVG | |
321 | }; | |
322 | ||
10078321 HS |
323 | /** LBS_802_11_POWER_MODE */ |
324 | enum LBS_802_11_POWER_MODE { | |
325 | LBS802_11POWERMODECAM, | |
326 | LBS802_11POWERMODEMAX_PSP, | |
327 | LBS802_11POWERMODEFAST_PSP, | |
876c9d3a | 328 | /*not a real mode, defined as an upper bound */ |
10078321 | 329 | LBS802_11POWEMODEMAX |
876c9d3a MT |
330 | }; |
331 | ||
332 | /** PS_STATE */ | |
333 | enum PS_STATE { | |
334 | PS_STATE_FULL_POWER, | |
335 | PS_STATE_AWAKE, | |
336 | PS_STATE_PRE_SLEEP, | |
337 | PS_STATE_SLEEP | |
338 | }; | |
339 | ||
340 | /** DNLD_STATE */ | |
341 | enum DNLD_STATE { | |
342 | DNLD_RES_RECEIVED, | |
343 | DNLD_DATA_SENT, | |
1556c0f2 BC |
344 | DNLD_CMD_SENT, |
345 | DNLD_BOOTCMD_SENT, | |
876c9d3a MT |
346 | }; |
347 | ||
10078321 HS |
348 | /** LBS_MEDIA_STATE */ |
349 | enum LBS_MEDIA_STATE { | |
350 | LBS_CONNECTED, | |
351 | LBS_DISCONNECTED | |
876c9d3a MT |
352 | }; |
353 | ||
10078321 HS |
354 | /** LBS_802_11_PRIVACY_FILTER */ |
355 | enum LBS_802_11_PRIVACY_FILTER { | |
356 | LBS802_11PRIVFILTERACCEPTALL, | |
357 | LBS802_11PRIVFILTER8021XWEP | |
876c9d3a MT |
358 | }; |
359 | ||
360 | /** mv_ms_type */ | |
361 | enum mv_ms_type { | |
362 | MVMS_DAT = 0, | |
363 | MVMS_CMD = 1, | |
364 | MVMS_TXDONE = 2, | |
365 | MVMS_EVENT | |
366 | }; | |
876c9d3a | 367 | |
876c9d3a MT |
368 | /** KEY_TYPE_ID */ |
369 | enum KEY_TYPE_ID { | |
370 | KEY_TYPE_ID_WEP = 0, | |
371 | KEY_TYPE_ID_TKIP, | |
372 | KEY_TYPE_ID_AES | |
373 | }; | |
374 | ||
375 | /** KEY_INFO_WPA (applies to both TKIP and AES/CCMP) */ | |
376 | enum KEY_INFO_WPA { | |
377 | KEY_INFO_WPA_MCAST = 0x01, | |
378 | KEY_INFO_WPA_UNICAST = 0x02, | |
379 | KEY_INFO_WPA_ENABLED = 0x04 | |
380 | }; | |
381 | ||
876c9d3a MT |
382 | /* Default values for fwt commands. */ |
383 | #define FWT_DEFAULT_METRIC 0 | |
384 | #define FWT_DEFAULT_DIR 1 | |
90e8eafc LCC |
385 | /* Default Rate, 11Mbps */ |
386 | #define FWT_DEFAULT_RATE 3 | |
876c9d3a MT |
387 | #define FWT_DEFAULT_SSN 0xffffffff |
388 | #define FWT_DEFAULT_DSN 0 | |
389 | #define FWT_DEFAULT_HOPCOUNT 0 | |
390 | #define FWT_DEFAULT_TTL 0 | |
391 | #define FWT_DEFAULT_EXPIRATION 0 | |
392 | #define FWT_DEFAULT_SLEEPMODE 0 | |
393 | #define FWT_DEFAULT_SNR 0 | |
394 | ||
10078321 | 395 | #endif |