Commit | Line | Data |
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10078321 HS |
1 | #ifndef _LBS_IF_USB_H |
2 | #define _LBS_IF_USB_H | |
435a1acb | 3 | |
4f82f5c8 DW |
4 | #include <linux/wait.h> |
5 | #include <linux/timer.h> | |
6 | ||
6bc822b5 DW |
7 | struct lbs_private; |
8 | ||
876c9d3a MT |
9 | /** |
10 | * This file contains definition for USB interface. | |
11 | */ | |
eae86bf3 DW |
12 | #define CMD_TYPE_REQUEST 0xF00DFACE |
13 | #define CMD_TYPE_DATA 0xBEADC0DE | |
14 | #define CMD_TYPE_INDICATION 0xBEEFFACE | |
876c9d3a | 15 | |
eae86bf3 | 16 | #define IPFIELD_ALIGN_OFFSET 2 |
876c9d3a | 17 | |
eae86bf3 DW |
18 | #define BOOT_CMD_FW_BY_USB 0x01 |
19 | #define BOOT_CMD_FW_IN_EEPROM 0x02 | |
20 | #define BOOT_CMD_UPDATE_BOOT2 0x03 | |
21 | #define BOOT_CMD_UPDATE_FW 0x04 | |
22 | #define BOOT_CMD_MAGIC_NUMBER 0x4C56524D /* LVRM */ | |
876c9d3a | 23 | |
eae86bf3 | 24 | struct bootcmd |
876c9d3a | 25 | { |
eae86bf3 DW |
26 | __le32 magic; |
27 | uint8_t cmd; | |
28 | uint8_t pad[11]; | |
876c9d3a MT |
29 | }; |
30 | ||
eae86bf3 DW |
31 | #define BOOT_CMD_RESP_OK 0x0001 |
32 | #define BOOT_CMD_RESP_FAIL 0x0000 | |
1556c0f2 | 33 | #define BOOT_CMD_RESP_NOT_SUPPORTED 0x0002 |
876c9d3a | 34 | |
eae86bf3 | 35 | struct bootcmdresp |
876c9d3a | 36 | { |
eae86bf3 DW |
37 | __le32 magic; |
38 | uint8_t cmd; | |
39 | uint8_t result; | |
40 | uint8_t pad[2]; | |
876c9d3a MT |
41 | }; |
42 | ||
43 | /** USB card description structure*/ | |
eae86bf3 | 44 | struct if_usb_card { |
876c9d3a | 45 | struct usb_device *udev; |
5cddea81 | 46 | uint32_t model; /* MODEL_* */ |
876c9d3a | 47 | struct urb *rx_urb, *tx_urb; |
6bc822b5 | 48 | struct lbs_private *priv; |
876c9d3a | 49 | |
eae86bf3 | 50 | struct sk_buff *rx_skb; |
eae86bf3 DW |
51 | |
52 | uint8_t ep_in; | |
53 | uint8_t ep_out; | |
876c9d3a | 54 | |
1556c0f2 BC |
55 | /* bootcmdresp == 0 means command is pending |
56 | * bootcmdresp < 0 means error | |
57 | * bootcmdresp > 0 is a BOOT_CMD_RESP_* from firmware | |
58 | */ | |
eae86bf3 DW |
59 | int8_t bootcmdresp; |
60 | ||
61 | int ep_in_size; | |
62 | ||
63 | void *ep_out_buf; | |
64 | int ep_out_size; | |
876c9d3a | 65 | |
954ee164 | 66 | const struct firmware *fw; |
4f82f5c8 DW |
67 | struct timer_list fw_timeout; |
68 | wait_queue_head_t fw_wq; | |
eae86bf3 DW |
69 | uint32_t fwseqnum; |
70 | uint32_t totalbytes; | |
71 | uint32_t fwlastblksent; | |
72 | uint8_t CRC_OK; | |
73 | uint8_t fwdnldover; | |
74 | uint8_t fwfinalblk; | |
75 | uint8_t surprise_removed; | |
76 | ||
4365929d | 77 | __le16 boot2_version; |
876c9d3a MT |
78 | }; |
79 | ||
80 | /** fwheader */ | |
81 | struct fwheader { | |
981f187b DW |
82 | __le32 dnldcmd; |
83 | __le32 baseaddr; | |
84 | __le32 datalength; | |
85 | __le32 CRC; | |
876c9d3a MT |
86 | }; |
87 | ||
88 | #define FW_MAX_DATA_BLK_SIZE 600 | |
89 | /** FWData */ | |
eae86bf3 DW |
90 | struct fwdata { |
91 | struct fwheader hdr; | |
981f187b | 92 | __le32 seqnum; |
eae86bf3 | 93 | uint8_t data[0]; |
876c9d3a MT |
94 | }; |
95 | ||
96 | /** fwsyncheader */ | |
97 | struct fwsyncheader { | |
981f187b DW |
98 | __le32 cmd; |
99 | __le32 seqnum; | |
876c9d3a MT |
100 | }; |
101 | ||
102 | #define FW_HAS_DATA_TO_RECV 0x00000001 | |
103 | #define FW_HAS_LAST_BLOCK 0x00000004 | |
104 | ||
876c9d3a | 105 | |
435a1acb | 106 | #endif |