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wlcore: fix error handling in wlcore_event_fw_logger
[deliverable/linux.git] / drivers / net / wireless / marvell / mwifiex / pcie.c
CommitLineData
d930faee
AK		 1/*
2 * Marvell Wireless LAN device driver: PCIE specific handling
3 *
65da33f5 4 * Copyright (C) 2011-2014, Marvell International Ltd.
d930faee
AK		 5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static u8 user_rmmod;
35
36static struct mwifiex_if_ops pcie_ops;
37
38static struct semaphore add_remove_card_sem;
d930faee 39
92c2538f
AK		 40static struct memory_type_mapping mem_type_mapping_tbl[] = {
41 {"ITCM", NULL, 0, 0xF0},
42 {"DTCM", NULL, 0, 0xF1},
43 {"SQRAM", NULL, 0, 0xF2},
44 {"IRAM", NULL, 0, 0xF3},
7e174833
AK		 45 {"APU", NULL, 0, 0xF4},
46 {"CIU", NULL, 0, 0xF5},
47 {"ICU", NULL, 0, 0xF6},
48 {"MAC", NULL, 0, 0xF7},
92c2538f
AK		 49};
50
fc331460
AP		 51static int
52mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
dbccc92b 53 size_t size, int flags)
d930faee 54{
fc331460 55 struct pcie_service_card *card = adapter->card;
dbccc92b 56 struct mwifiex_dma_mapping mapping;
d930faee 57
dbccc92b
AD		 58 mapping.addr = pci_map_single(card->dev, skb->data, size, flags);
59 if (pci_dma_mapping_error(card->dev, mapping.addr)) {
acebe8c1 60 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
fc331460
AP		 61 return -1;
62 }
dbccc92b 63 mapping.len = size;
bca463e8 64 mwifiex_store_mapping(skb, &mapping);
fc331460 65 return 0;
d930faee
AK		 66}
67
dbccc92b
AD		 68static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
69 struct sk_buff *skb, int flags)
70{
71 struct pcie_service_card *card = adapter->card;
72 struct mwifiex_dma_mapping mapping;
73
bca463e8 74 mwifiex_get_mapping(skb, &mapping);
dbccc92b
AD		 75 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags);
76}
77
d930faee
AK		 78/*
79 * This function reads sleep cookie and checks if FW is ready
80 */
81static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
82{
83 u32 *cookie_addr;
84 struct pcie_service_card *card = adapter->card;
52301a81
AP		 85 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
86
87 if (!reg->sleep_cookie)
88 return true;
d930faee 89
fc331460
AP		 90 if (card->sleep_cookie_vbase) {
91 cookie_addr = (u32 *)card->sleep_cookie_vbase;
acebe8c1
ZL		 92 mwifiex_dbg(adapter, INFO,
93 "info: ACCESS_HW: sleep cookie=0x%x\n",
94 *cookie_addr);
d930faee
AK		 95 if (*cookie_addr == FW_AWAKE_COOKIE)
96 return true;
97 }
98
99 return false;
100}
101
3266d732 102#ifdef CONFIG_PM_SLEEP
fcca8d5a
BZ		 103/*
104 * Kernel needs to suspend all functions separately. Therefore all
105 * registered functions must have drivers with suspend and resume
106 * methods. Failing that the kernel simply removes the whole card.
107 *
108 * If already not suspended, this function allocates and sends a host
109 * sleep activate request to the firmware and turns off the traffic.
110 */
3266d732 111static int mwifiex_pcie_suspend(struct device *dev)
fcca8d5a
BZ		 112{
113 struct mwifiex_adapter *adapter;
114 struct pcie_service_card *card;
115 int hs_actived;
3266d732 116 struct pci_dev *pdev = to_pci_dev(dev);
fcca8d5a
BZ		 117
118 if (pdev) {
b2a31204 119 card = pci_get_drvdata(pdev);
fcca8d5a
BZ		 120 if (!card || !card->adapter) {
121 pr_err("Card or adapter structure is not valid\n");
122 return 0;
123 }
124 } else {
125 pr_err("PCIE device is not specified\n");
126 return 0;
127 }
128
129 adapter = card->adapter;
130
131 hs_actived = mwifiex_enable_hs(adapter);
132
133 /* Indicate device suspended */
134 adapter->is_suspended = true;
c0dbba66 135 adapter->hs_enabling = false;
fcca8d5a
BZ		 136
137 return 0;
138}
139
140/*
141 * Kernel needs to suspend all functions separately. Therefore all
142 * registered functions must have drivers with suspend and resume
143 * methods. Failing that the kernel simply removes the whole card.
144 *
145 * If already not resumed, this function turns on the traffic and
146 * sends a host sleep cancel request to the firmware.
147 */
3266d732 148static int mwifiex_pcie_resume(struct device *dev)
fcca8d5a
BZ		 149{
150 struct mwifiex_adapter *adapter;
151 struct pcie_service_card *card;
3266d732 152 struct pci_dev *pdev = to_pci_dev(dev);
fcca8d5a
BZ		 153
154 if (pdev) {
b2a31204 155 card = pci_get_drvdata(pdev);
fcca8d5a
BZ		 156 if (!card || !card->adapter) {
157 pr_err("Card or adapter structure is not valid\n");
158 return 0;
159 }
160 } else {
161 pr_err("PCIE device is not specified\n");
162 return 0;
163 }
164
165 adapter = card->adapter;
166
167 if (!adapter->is_suspended) {
acebe8c1
ZL		 168 mwifiex_dbg(adapter, WARN,
169 "Device already resumed\n");
fcca8d5a
BZ		 170 return 0;
171 }
172
173 adapter->is_suspended = false;
174
175 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
176 MWIFIEX_ASYNC_CMD);
177
178 return 0;
179}
8509e820 180#endif
fcca8d5a 181
d930faee
AK		 182/*
183 * This function probes an mwifiex device and registers it. It allocates
184 * the card structure, enables PCIE function number and initiates the
185 * device registration and initialization procedure by adding a logical
186 * interface.
187 */
188static int mwifiex_pcie_probe(struct pci_dev *pdev,
189 const struct pci_device_id *ent)
190{
191 struct pcie_service_card *card;
192
193 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
f57c1edc 194 pdev->vendor, pdev->device, pdev->revision);
d930faee
AK		 195
196 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
e404decb 197 if (!card)
d930faee 198 return -ENOMEM;
d930faee
AK		 199
200 card->dev = pdev;
201
dd04e6ac
AP		 202 if (ent->driver_data) {
203 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
204 card->pcie.firmware = data->firmware;
205 card->pcie.reg = data->reg;
206 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
828cf222 207 card->pcie.tx_buf_size = data->tx_buf_size;
b4e8aebb 208 card->pcie.can_dump_fw = data->can_dump_fw;
1fe192d8 209 card->pcie.can_ext_scan = data->can_ext_scan;
dd04e6ac
AP		 210 }
211
d930faee
AK		 212 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
213 MWIFIEX_PCIE)) {
214 pr_err("%s failed\n", __func__);
215 kfree(card);
216 return -1;
217 }
218
219 return 0;
220}
221
222/*
223 * This function removes the interface and frees up the card structure.
224 */
225static void mwifiex_pcie_remove(struct pci_dev *pdev)
226{
227 struct pcie_service_card *card;
228 struct mwifiex_adapter *adapter;
f57c1edc 229 struct mwifiex_private *priv;
d930faee
AK		 230
231 card = pci_get_drvdata(pdev);
232 if (!card)
233 return;
234
235 adapter = card->adapter;
236 if (!adapter || !adapter->priv_num)
237 return;
238
239 if (user_rmmod) {
3266d732 240#ifdef CONFIG_PM_SLEEP
d930faee 241 if (adapter->is_suspended)
3266d732 242 mwifiex_pcie_resume(&pdev->dev);
d930faee
AK		 243#endif
244
848819f4 245 mwifiex_deauthenticate_all(adapter);
d930faee 246
f57c1edc 247 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
d930faee 248
f57c1edc
YAP		 249 mwifiex_disable_auto_ds(priv);
250
251 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
d930faee
AK		 252 }
253
254 mwifiex_remove_card(card->adapter, &add_remove_card_sem);
d930faee
AK		 255}
256
43ba6b9f
AK		 257static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
258{
259 user_rmmod = 1;
260 mwifiex_pcie_remove(pdev);
261
262 return;
263}
264
9baa3c34 265static const struct pci_device_id mwifiex_ids[] = {
d930faee
AK		 266 {
267 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
6d85ef00 269 .driver_data = (unsigned long)&mwifiex_pcie8766,
d930faee 270 },
ca8f2112
AP		 271 {
272 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
273 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
6d85ef00
ZL		 274 .driver_data = (unsigned long)&mwifiex_pcie8897,
275 },
276 {
277 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
278 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
279 .driver_data = (unsigned long)&mwifiex_pcie8997,
ca8f2112 280 },
d930faee
AK		 281 {},
282};
283
284MODULE_DEVICE_TABLE(pci, mwifiex_ids);
285
3266d732
SK		 286#ifdef CONFIG_PM_SLEEP
287/* Power Management Hooks */
288static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
289 mwifiex_pcie_resume);
290#endif
291
d930faee
AK		 292/* PCI Device Driver */
293static struct pci_driver __refdata mwifiex_pcie = {
294 .name = "mwifiex_pcie",
295 .id_table = mwifiex_ids,
296 .probe = mwifiex_pcie_probe,
297 .remove = mwifiex_pcie_remove,
3266d732
SK		 298#ifdef CONFIG_PM_SLEEP
299 .driver = {
300 .pm = &mwifiex_pcie_pm_ops,
301 },
d930faee 302#endif
43ba6b9f 303 .shutdown = mwifiex_pcie_shutdown,
d930faee
AK		 304};
305
306/*
307 * This function writes data into PCIE card register.
308 */
309static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
310{
311 struct pcie_service_card *card = adapter->card;
312
313 iowrite32(data, card->pci_mmap1 + reg);
314
315 return 0;
316}
317
318/*
319 * This function reads data from PCIE card register.
320 */
321static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
322{
323 struct pcie_service_card *card = adapter->card;
324
325 *data = ioread32(card->pci_mmap1 + reg);
326
327 return 0;
328}
329
92c2538f
AK		 330/* This function reads u8 data from PCIE card register. */
331static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
332 int reg, u8 *data)
333{
334 struct pcie_service_card *card = adapter->card;
335
336 *data = ioread8(card->pci_mmap1 + reg);
337
338 return 0;
339}
340
d930faee 341/*
c0880a29 342 * This function adds delay loop to ensure FW is awake before proceeding.
d930faee 343 */
c0880a29 344static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
d930faee
AK		 345{
346 int i = 0;
347
c0880a29 348 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
d930faee 349 i++;
e7891ba2 350 usleep_range(10, 20);
d930faee 351 /* 50ms max wait */
3e7a4ff7 352 if (i == 5000)
d930faee
AK		 353 break;
354 }
355
c0880a29
AP		 356 return;
357}
358
c4bc980f
AP		 359static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
360 u32 max_delay_loop_cnt)
361{
362 struct pcie_service_card *card = adapter->card;
363 u8 *buffer;
364 u32 sleep_cookie, count;
365
366 for (count = 0; count < max_delay_loop_cnt; count++) {
367 buffer = card->cmdrsp_buf->data - INTF_HEADER_LEN;
368 sleep_cookie = *(u32 *)buffer;
369
370 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
acebe8c1
ZL		 371 mwifiex_dbg(adapter, INFO,
372 "sleep cookie found at count %d\n", count);
c4bc980f
AP		 373 break;
374 }
375 usleep_range(20, 30);
376 }
377
378 if (count >= max_delay_loop_cnt)
acebe8c1
ZL		 379 mwifiex_dbg(adapter, INFO,
380 "max count reached while accessing sleep cookie\n");
c4bc980f
AP		 381}
382
c0880a29
AP		 383/* This function wakes up the card by reading fw_status register. */
384static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
385{
386 u32 fw_status;
387 struct pcie_service_card *card = adapter->card;
388 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
389
acebe8c1
ZL		 390 mwifiex_dbg(adapter, EVENT,
391 "event: Wakeup device...\n");
d930faee 392
c0880a29
AP		 393 if (reg->sleep_cookie)
394 mwifiex_pcie_dev_wakeup_delay(adapter);
395
396 /* Reading fw_status register will wakeup device */
397 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) {
acebe8c1
ZL		 398 mwifiex_dbg(adapter, ERROR,
399 "Reading fw_status register failed\n");
d930faee
AK		 400 return -1;
401 }
402
c0880a29
AP		 403 if (reg->sleep_cookie) {
404 mwifiex_pcie_dev_wakeup_delay(adapter);
acebe8c1
ZL		 405 mwifiex_dbg(adapter, INFO,
406 "PCIE wakeup: Setting PS_STATE_AWAKE\n");
c0880a29
AP		 407 adapter->ps_state = PS_STATE_AWAKE;
408 }
d930faee
AK		 409
410 return 0;
411}
412
413/*
414 * This function is called after the card has woken up.
415 *
416 * The card configuration register is reset.
417 */
418static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
419{
acebe8c1
ZL		 420 mwifiex_dbg(adapter, CMD,
421 "cmd: Wakeup device completed\n");
d930faee
AK		 422
423 return 0;
424}
425
426/*
427 * This function disables the host interrupt.
428 *
429 * The host interrupt mask is read, the disable bit is reset and
430 * written back to the card host interrupt mask register.
431 */
432static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
433{
434 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
435 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
436 0x00000000)) {
acebe8c1
ZL		 437 mwifiex_dbg(adapter, ERROR,
438 "Disable host interrupt failed\n");
d930faee
AK		 439 return -1;
440 }
441 }
442
443 return 0;
444}
445
446/*
447 * This function enables the host interrupt.
448 *
449 * The host interrupt enable mask is written to the card
450 * host interrupt mask register.
451 */
452static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
453{
454 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
455 /* Simply write the mask to the register */
456 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
457 HOST_INTR_MASK)) {
acebe8c1
ZL		 458 mwifiex_dbg(adapter, ERROR,
459 "Enable host interrupt failed\n");
d930faee
AK		 460 return -1;
461 }
462 }
463
464 return 0;
465}
466
467/*
0732484b
AP		 468 * This function initializes TX buffer ring descriptors
469 */
470static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
471{
472 struct pcie_service_card *card = adapter->card;
ca8f2112 473 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 474 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 475 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP		 476 int i;
477
478 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
479 card->tx_buf_list[i] = NULL;
ca8f2112
AP		 480 if (reg->pfu_enabled) {
481 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
482 (sizeof(*desc2) * i);
483 desc2 = card->txbd_ring[i];
484 memset(desc2, 0, sizeof(*desc2));
485 } else {
486 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
487 (sizeof(*desc) * i);
488 desc = card->txbd_ring[i];
489 memset(desc, 0, sizeof(*desc));
490 }
0732484b
AP		 491 }
492
493 return 0;
494}
495
496/* This function initializes RX buffer ring descriptors. Each SKB is allocated
497 * here and after mapping PCI memory, its physical address is assigned to
498 * PCIE Rx buffer descriptor's physical address.
499 */
500static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
501{
502 struct pcie_service_card *card = adapter->card;
ca8f2112 503 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b
AP		 504 struct sk_buff *skb;
505 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 506 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP		 507 dma_addr_t buf_pa;
508 int i;
509
510 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
511 /* Allocate skb here so that firmware can DMA data from it */
62159944
AP		 512 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
513 GFP_KERNEL | GFP_DMA);
0732484b 514 if (!skb) {
acebe8c1
ZL		 515 mwifiex_dbg(adapter, ERROR,
516 "Unable to allocate skb for RX ring.\n");
0732484b
AP		 517 kfree(card->rxbd_ring_vbase);
518 return -ENOMEM;
519 }
520
521 if (mwifiex_map_pci_memory(adapter, skb,
522 MWIFIEX_RX_DATA_BUF_SIZE,
523 PCI_DMA_FROMDEVICE))
524 return -1;
525
dbccc92b 526 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
0732484b 527
acebe8c1
ZL		 528 mwifiex_dbg(adapter, INFO,
529 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
530 skb, skb->len, skb->data, (u32)buf_pa,
531 (u32)((u64)buf_pa >> 32));
0732484b
AP		 532
533 card->rx_buf_list[i] = skb;
ca8f2112
AP		 534 if (reg->pfu_enabled) {
535 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
536 (sizeof(*desc2) * i);
537 desc2 = card->rxbd_ring[i];
538 desc2->paddr = buf_pa;
539 desc2->len = (u16)skb->len;
540 desc2->frag_len = (u16)skb->len;
541 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
542 desc2->offset = 0;
543 } else {
544 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
545 (sizeof(*desc) * i));
546 desc = card->rxbd_ring[i];
547 desc->paddr = buf_pa;
548 desc->len = (u16)skb->len;
549 desc->flags = 0;
550 }
0732484b
AP		 551 }
552
553 return 0;
554}
555
556/* This function initializes event buffer ring descriptors. Each SKB is
557 * allocated here and after mapping PCI memory, its physical address is assigned
558 * to PCIE Rx buffer descriptor's physical address
559 */
560static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
561{
562 struct pcie_service_card *card = adapter->card;
e05dc3e9 563 struct mwifiex_evt_buf_desc *desc;
0732484b
AP		 564 struct sk_buff *skb;
565 dma_addr_t buf_pa;
566 int i;
567
568 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
569 /* Allocate skb here so that firmware can DMA data from it */
570 skb = dev_alloc_skb(MAX_EVENT_SIZE);
571 if (!skb) {
acebe8c1
ZL		 572 mwifiex_dbg(adapter, ERROR,
573 "Unable to allocate skb for EVENT buf.\n");
0732484b
AP		 574 kfree(card->evtbd_ring_vbase);
575 return -ENOMEM;
576 }
577 skb_put(skb, MAX_EVENT_SIZE);
578
579 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
580 PCI_DMA_FROMDEVICE))
581 return -1;
582
dbccc92b 583 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
0732484b 584
acebe8c1
ZL		 585 mwifiex_dbg(adapter, EVENT,
586 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
587 skb, skb->len, skb->data, (u32)buf_pa,
588 (u32)((u64)buf_pa >> 32));
0732484b
AP		 589
590 card->evt_buf_list[i] = skb;
591 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
592 (sizeof(*desc) * i));
0732484b
AP		 593 desc = card->evtbd_ring[i];
594 desc->paddr = buf_pa;
595 desc->len = (u16)skb->len;
596 desc->flags = 0;
597 }
598
599 return 0;
600}
601
602/* This function cleans up TX buffer rings. If any of the buffer list has valid
603 * SKB address, associated SKB is freed.
604 */
605static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
606{
607 struct pcie_service_card *card = adapter->card;
ca8f2112 608 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b
AP		 609 struct sk_buff *skb;
610 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 611 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP		 612 int i;
613
614 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
ca8f2112
AP		 615 if (reg->pfu_enabled) {
616 desc2 = card->txbd_ring[i];
617 if (card->tx_buf_list[i]) {
618 skb = card->tx_buf_list[i];
dbccc92b
AD		 619 mwifiex_unmap_pci_memory(adapter, skb,
620 PCI_DMA_TODEVICE);
ca8f2112
AP		 621 dev_kfree_skb_any(skb);
622 }
623 memset(desc2, 0, sizeof(*desc2));
624 } else {
625 desc = card->txbd_ring[i];
626 if (card->tx_buf_list[i]) {
627 skb = card->tx_buf_list[i];
dbccc92b
AD		 628 mwifiex_unmap_pci_memory(adapter, skb,
629 PCI_DMA_TODEVICE);
ca8f2112
AP		 630 dev_kfree_skb_any(skb);
631 }
632 memset(desc, 0, sizeof(*desc));
0732484b
AP		 633 }
634 card->tx_buf_list[i] = NULL;
0732484b
AP		 635 }
636
637 return;
638}
639
640/* This function cleans up RX buffer rings. If any of the buffer list has valid
641 * SKB address, associated SKB is freed.
642 */
643static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
644{
645 struct pcie_service_card *card = adapter->card;
ca8f2112 646 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 647 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 648 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP		 649 struct sk_buff *skb;
650 int i;
651
652 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
ca8f2112
AP		 653 if (reg->pfu_enabled) {
654 desc2 = card->rxbd_ring[i];
655 if (card->rx_buf_list[i]) {
656 skb = card->rx_buf_list[i];
dbccc92b
AD		 657 mwifiex_unmap_pci_memory(adapter, skb,
658 PCI_DMA_FROMDEVICE);
ca8f2112
AP		 659 dev_kfree_skb_any(skb);
660 }
661 memset(desc2, 0, sizeof(*desc2));
662 } else {
663 desc = card->rxbd_ring[i];
664 if (card->rx_buf_list[i]) {
665 skb = card->rx_buf_list[i];
dbccc92b
AD		 666 mwifiex_unmap_pci_memory(adapter, skb,
667 PCI_DMA_FROMDEVICE);
ca8f2112
AP		 668 dev_kfree_skb_any(skb);
669 }
670 memset(desc, 0, sizeof(*desc));
0732484b 671 }
ca8f2112 672 card->rx_buf_list[i] = NULL;
0732484b
AP		 673 }
674
675 return;
676}
677
678/* This function cleans up event buffer rings. If any of the buffer list has
679 * valid SKB address, associated SKB is freed.
680 */
681static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
682{
683 struct pcie_service_card *card = adapter->card;
e05dc3e9 684 struct mwifiex_evt_buf_desc *desc;
0732484b
AP		 685 struct sk_buff *skb;
686 int i;
687
688 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
689 desc = card->evtbd_ring[i];
690 if (card->evt_buf_list[i]) {
691 skb = card->evt_buf_list[i];
dbccc92b
AD		 692 mwifiex_unmap_pci_memory(adapter, skb,
693 PCI_DMA_FROMDEVICE);
0732484b
AP		 694 dev_kfree_skb_any(skb);
695 }
696 card->evt_buf_list[i] = NULL;
697 memset(desc, 0, sizeof(*desc));
698 }
699
700 return;
701}
702
703/* This function creates buffer descriptor ring for TX
d930faee
AK		 704 */
705static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
706{
707 struct pcie_service_card *card = adapter->card;
dd04e6ac 708 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK		 709
710 /*
711 * driver maintaines the write pointer and firmware maintaines the read
712 * pointer. The write pointer starts at 0 (zero) while the read pointer
713 * starts at zero with rollover bit set
714 */
715 card->txbd_wrptr = 0;
ca8f2112
AP		 716
717 if (reg->pfu_enabled)
718 card->txbd_rdptr = 0;
719 else
720 card->txbd_rdptr |= reg->tx_rollover_ind;
d930faee
AK		 721
722 /* allocate shared memory for the BD ring and divide the same in to
723 several descriptors */
ca8f2112
AP		 724 if (reg->pfu_enabled)
725 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
726 MWIFIEX_MAX_TXRX_BD;
727 else
728 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
729 MWIFIEX_MAX_TXRX_BD;
730
acebe8c1
ZL		 731 mwifiex_dbg(adapter, INFO,
732 "info: txbd_ring: Allocating %d bytes\n",
733 card->txbd_ring_size);
fc331460
AP		 734 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
735 card->txbd_ring_size,
736 &card->txbd_ring_pbase);
d930faee 737 if (!card->txbd_ring_vbase) {
acebe8c1
ZL		 738 mwifiex_dbg(adapter, ERROR,
739 "allocate consistent memory (%d bytes) failed!\n",
740 card->txbd_ring_size);
8c53e42d 741 return -ENOMEM;
d930faee 742 }
acebe8c1
ZL		 743 mwifiex_dbg(adapter, DATA,
744 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
745 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
746 (u32)((u64)card->txbd_ring_pbase >> 32),
747 card->txbd_ring_size);
d930faee 748
0732484b 749 return mwifiex_init_txq_ring(adapter);
d930faee
AK		 750}
751
752static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
753{
754 struct pcie_service_card *card = adapter->card;
dd04e6ac 755 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 756
0732484b 757 mwifiex_cleanup_txq_ring(adapter);
d930faee 758
fc331460
AP		 759 if (card->txbd_ring_vbase)
760 pci_free_consistent(card->dev, card->txbd_ring_size,
761 card->txbd_ring_vbase,
762 card->txbd_ring_pbase);
d930faee
AK		 763 card->txbd_ring_size = 0;
764 card->txbd_wrptr = 0;
dd04e6ac 765 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
d930faee 766 card->txbd_ring_vbase = NULL;
fc331460 767 card->txbd_ring_pbase = 0;
d930faee
AK		 768
769 return 0;
770}
771
772/*
773 * This function creates buffer descriptor ring for RX
774 */
775static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
776{
777 struct pcie_service_card *card = adapter->card;
dd04e6ac 778 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK		 779
780 /*
781 * driver maintaines the read pointer and firmware maintaines the write
782 * pointer. The write pointer starts at 0 (zero) while the read pointer
783 * starts at zero with rollover bit set
784 */
785 card->rxbd_wrptr = 0;
dd04e6ac 786 card->rxbd_rdptr = reg->rx_rollover_ind;
d930faee 787
ca8f2112
AP		 788 if (reg->pfu_enabled)
789 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
790 MWIFIEX_MAX_TXRX_BD;
791 else
792 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
793 MWIFIEX_MAX_TXRX_BD;
794
acebe8c1
ZL		 795 mwifiex_dbg(adapter, INFO,
796 "info: rxbd_ring: Allocating %d bytes\n",
797 card->rxbd_ring_size);
fc331460
AP		 798 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
799 card->rxbd_ring_size,
800 &card->rxbd_ring_pbase);
d930faee 801 if (!card->rxbd_ring_vbase) {
acebe8c1
ZL		 802 mwifiex_dbg(adapter, ERROR,
803 "allocate consistent memory (%d bytes) failed!\n",
804 card->rxbd_ring_size);
8c53e42d 805 return -ENOMEM;
d930faee 806 }
d930faee 807
acebe8c1
ZL		 808 mwifiex_dbg(adapter, DATA,
809 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
810 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
811 (u32)((u64)card->rxbd_ring_pbase >> 32),
812 card->rxbd_ring_size);
d930faee 813
0732484b 814 return mwifiex_init_rxq_ring(adapter);
d930faee
AK		 815}
816
817/*
818 * This function deletes Buffer descriptor ring for RX
819 */
820static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
821{
822 struct pcie_service_card *card = adapter->card;
dd04e6ac 823 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 824
0732484b 825 mwifiex_cleanup_rxq_ring(adapter);
d930faee 826
fc331460
AP		 827 if (card->rxbd_ring_vbase)
828 pci_free_consistent(card->dev, card->rxbd_ring_size,
829 card->rxbd_ring_vbase,
830 card->rxbd_ring_pbase);
d930faee
AK		 831 card->rxbd_ring_size = 0;
832 card->rxbd_wrptr = 0;
dd04e6ac 833 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
d930faee 834 card->rxbd_ring_vbase = NULL;
fc331460 835 card->rxbd_ring_pbase = 0;
d930faee
AK		 836
837 return 0;
838}
839
840/*
841 * This function creates buffer descriptor ring for Events
842 */
843static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
844{
845 struct pcie_service_card *card = adapter->card;
dd04e6ac 846 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK		 847
848 /*
849 * driver maintaines the read pointer and firmware maintaines the write
850 * pointer. The write pointer starts at 0 (zero) while the read pointer
851 * starts at zero with rollover bit set
852 */
853 card->evtbd_wrptr = 0;
dd04e6ac 854 card->evtbd_rdptr = reg->evt_rollover_ind;
d930faee 855
e05dc3e9 856 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
ca8f2112
AP		 857 MWIFIEX_MAX_EVT_BD;
858
acebe8c1
ZL		 859 mwifiex_dbg(adapter, INFO,
860 "info: evtbd_ring: Allocating %d bytes\n",
f57c1edc 861 card->evtbd_ring_size);
fc331460
AP		 862 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
863 card->evtbd_ring_size,
864 &card->evtbd_ring_pbase);
d930faee 865 if (!card->evtbd_ring_vbase) {
acebe8c1
ZL		 866 mwifiex_dbg(adapter, ERROR,
867 "allocate consistent memory (%d bytes) failed!\n",
868 card->evtbd_ring_size);
8c53e42d 869 return -ENOMEM;
d930faee 870 }
d930faee 871
acebe8c1
ZL		 872 mwifiex_dbg(adapter, EVENT,
873 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
874 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
875 (u32)((u64)card->evtbd_ring_pbase >> 32),
876 card->evtbd_ring_size);
d930faee 877
0732484b 878 return mwifiex_pcie_init_evt_ring(adapter);
d930faee
AK		 879}
880
881/*
882 * This function deletes Buffer descriptor ring for Events
883 */
884static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
885{
886 struct pcie_service_card *card = adapter->card;
dd04e6ac 887 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 888
0732484b 889 mwifiex_cleanup_evt_ring(adapter);
d930faee 890
fc331460
AP		 891 if (card->evtbd_ring_vbase)
892 pci_free_consistent(card->dev, card->evtbd_ring_size,
893 card->evtbd_ring_vbase,
894 card->evtbd_ring_pbase);
d930faee 895 card->evtbd_wrptr = 0;
dd04e6ac 896 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
d930faee
AK		 897 card->evtbd_ring_size = 0;
898 card->evtbd_ring_vbase = NULL;
fc331460 899 card->evtbd_ring_pbase = 0;
d930faee
AK		 900
901 return 0;
902}
903
904/*
905 * This function allocates a buffer for CMDRSP
906 */
907static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
908{
909 struct pcie_service_card *card = adapter->card;
910 struct sk_buff *skb;
911
912 /* Allocate memory for receiving command response data */
913 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
914 if (!skb) {
acebe8c1
ZL		 915 mwifiex_dbg(adapter, ERROR,
916 "Unable to allocate skb for command response data.\n");
d930faee
AK		 917 return -ENOMEM;
918 }
d930faee 919 skb_put(skb, MWIFIEX_UPLD_SIZE);
fc331460
AP		 920 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
921 PCI_DMA_FROMDEVICE))
922 return -1;
d930faee 923
fc331460 924 card->cmdrsp_buf = skb;
d930faee
AK		 925
926 return 0;
927}
928
929/*
930 * This function deletes a buffer for CMDRSP
931 */
932static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
933{
934 struct pcie_service_card *card;
935
936 if (!adapter)
937 return 0;
938
939 card = adapter->card;
940
fc331460 941 if (card && card->cmdrsp_buf) {
dbccc92b
AD		 942 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
943 PCI_DMA_FROMDEVICE);
d930faee 944 dev_kfree_skb_any(card->cmdrsp_buf);
fc331460 945 }
d930faee 946
fc331460 947 if (card && card->cmd_buf) {
dbccc92b
AD		 948 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
949 PCI_DMA_TODEVICE);
fc331460 950 }
d930faee
AK		 951 return 0;
952}
953
954/*
955 * This function allocates a buffer for sleep cookie
956 */
957static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
958{
d930faee
AK		 959 struct pcie_service_card *card = adapter->card;
960
fc331460
AP		 961 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
962 &card->sleep_cookie_pbase);
963 if (!card->sleep_cookie_vbase) {
acebe8c1
ZL		 964 mwifiex_dbg(adapter, ERROR,
965 "pci_alloc_consistent failed!\n");
d930faee
AK		 966 return -ENOMEM;
967 }
d930faee 968 /* Init val of Sleep Cookie */
fc331460 969 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
d930faee 970
acebe8c1
ZL		 971 mwifiex_dbg(adapter, INFO,
972 "alloc_scook: sleep cookie=0x%x\n",
973 *((u32 *)card->sleep_cookie_vbase));
d930faee
AK		 974
975 return 0;
976}
977
978/*
979 * This function deletes buffer for sleep cookie
980 */
981static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
982{
983 struct pcie_service_card *card;
984
985 if (!adapter)
986 return 0;
987
988 card = adapter->card;
989
fc331460
AP		 990 if (card && card->sleep_cookie_vbase) {
991 pci_free_consistent(card->dev, sizeof(u32),
992 card->sleep_cookie_vbase,
993 card->sleep_cookie_pbase);
994 card->sleep_cookie_vbase = NULL;
d930faee
AK		 995 }
996
997 return 0;
998}
999
fbd7e7ac
AP		 1000/* This function flushes the TX buffer descriptor ring
1001 * This function defined as handler is also called while cleaning TXRX
1002 * during disconnect/ bss stop.
1003 */
1004static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1005{
1006 struct pcie_service_card *card = adapter->card;
fbd7e7ac 1007
48f4d916 1008 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
fbd7e7ac
AP		 1009 card->txbd_flush = 1;
1010 /* write pointer already set at last send
1011 * send dnld-rdy intr again, wait for completion.
1012 */
1013 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1014 CPU_INTR_DNLD_RDY)) {
acebe8c1
ZL		 1015 mwifiex_dbg(adapter, ERROR,
1016 "failed to assert dnld-rdy interrupt.\n");
fbd7e7ac
AP		 1017 return -1;
1018 }
1019 }
1020 return 0;
1021}
1022
d930faee 1023/*
e7f767a7 1024 * This function unmaps and frees downloaded data buffer
d930faee 1025 */
e7f767a7 1026static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
d930faee 1027{
e7f767a7 1028 struct sk_buff *skb;
ca8f2112 1029 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
e05dc3e9 1030 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 1031 struct mwifiex_pfu_buf_desc *desc2;
d930faee 1032 struct pcie_service_card *card = adapter->card;
dd04e6ac 1033 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK		 1034
1035 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1036 mwifiex_pm_wakeup_card(adapter);
1037
1038 /* Read the TX ring read pointer set by firmware */
dd04e6ac 1039 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
acebe8c1
ZL		 1040 mwifiex_dbg(adapter, ERROR,
1041 "SEND COMP: failed to read reg->tx_rdptr\n");
d930faee
AK		 1042 return -1;
1043 }
1044
acebe8c1
ZL		 1045 mwifiex_dbg(adapter, DATA,
1046 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1047 card->txbd_rdptr, rdptr);
d930faee 1048
ca8f2112 1049 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7 1050 /* free from previous txbd_rdptr to current txbd_rdptr */
dd04e6ac
AP		 1051 while (((card->txbd_rdptr & reg->tx_mask) !=
1052 (rdptr & reg->tx_mask)) ||
1053 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1054 (rdptr & reg->tx_rollover_ind))) {
ca8f2112
AP		 1055 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1056 reg->tx_start_ptr;
e7f767a7
AP		 1057
1058 skb = card->tx_buf_list[wrdoneidx];
dbccc92b 1059
e7f767a7 1060 if (skb) {
acebe8c1
ZL		 1061 mwifiex_dbg(adapter, DATA,
1062 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1063 skb, wrdoneidx);
dbccc92b
AD		 1064 mwifiex_unmap_pci_memory(adapter, skb,
1065 PCI_DMA_TODEVICE);
e7f767a7
AP		 1066
1067 unmap_count++;
1068
1069 if (card->txbd_flush)
1070 mwifiex_write_data_complete(adapter, skb, 0,
1071 -1);
1072 else
1073 mwifiex_write_data_complete(adapter, skb, 0, 0);
1074 }
1075
1076 card->tx_buf_list[wrdoneidx] = NULL;
ca8f2112
AP		 1077
1078 if (reg->pfu_enabled) {
45d18c56 1079 desc2 = card->txbd_ring[wrdoneidx];
ca8f2112
AP		 1080 memset(desc2, 0, sizeof(*desc2));
1081 } else {
1082 desc = card->txbd_ring[wrdoneidx];
1083 memset(desc, 0, sizeof(*desc));
1084 }
1085 switch (card->dev->device) {
1086 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1087 card->txbd_rdptr++;
1088 break;
1089 case PCIE_DEVICE_ID_MARVELL_88W8897:
6d85ef00 1090 case PCIE_DEVICE_ID_MARVELL_88W8997:
ca8f2112
AP		 1091 card->txbd_rdptr += reg->ring_tx_start_ptr;
1092 break;
1093 }
1094
e7f767a7 1095
dd04e6ac 1096 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
e7f767a7 1097 card->txbd_rdptr = ((card->txbd_rdptr &
dd04e6ac
AP		 1098 reg->tx_rollover_ind) ^
1099 reg->tx_rollover_ind);
e7f767a7
AP		 1100 }
1101
1102 if (unmap_count)
1103 adapter->data_sent = false;
1104
1105 if (card->txbd_flush) {
3d482038 1106 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
e7f767a7
AP		 1107 card->txbd_flush = 0;
1108 else
1109 mwifiex_clean_pcie_ring_buf(adapter);
1110 }
1111
1112 return 0;
1113}
1114
1115/* This function sends data buffer to device. First 4 bytes of payload
1116 * are filled with payload length and payload type. Then this payload
1117 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1118 * Download ready interrupt to FW is deffered if Tx ring is not full and
1119 * additional payload can be accomodated.
8d767dcb 1120 * Caller must ensure tx_param parameter to this function is not NULL.
e7f767a7
AP		 1121 */
1122static int
1123mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1124 struct mwifiex_tx_param *tx_param)
1125{
1126 struct pcie_service_card *card = adapter->card;
dd04e6ac 1127 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1128 u32 wrindx, num_tx_buffs, rx_val;
e7f767a7
AP		 1129 int ret;
1130 dma_addr_t buf_pa;
9931078e
BZ		 1131 struct mwifiex_pcie_buf_desc *desc = NULL;
1132 struct mwifiex_pfu_buf_desc *desc2 = NULL;
e7f767a7
AP		 1133 __le16 *tmp;
1134
1135 if (!(skb->data && skb->len)) {
acebe8c1
ZL		 1136 mwifiex_dbg(adapter, ERROR,
1137 "%s(): invalid parameter <%p, %#x>\n",
1138 __func__, skb->data, skb->len);
e7f767a7
AP		 1139 return -1;
1140 }
1141
1142 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1143 mwifiex_pm_wakeup_card(adapter);
1144
ca8f2112 1145 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
acebe8c1
ZL		 1146 mwifiex_dbg(adapter, DATA,
1147 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
e7f767a7
AP		 1148 card->txbd_rdptr, card->txbd_wrptr);
1149 if (mwifiex_pcie_txbd_not_full(card)) {
d930faee
AK		 1150 u8 *payload;
1151
1152 adapter->data_sent = true;
e7f767a7 1153 payload = skb->data;
d930faee
AK		 1154 tmp = (__le16 *)&payload[0];
1155 *tmp = cpu_to_le16((u16)skb->len);
1156 tmp = (__le16 *)&payload[2];
1157 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
e7f767a7 1158
dbccc92b 1159 if (mwifiex_map_pci_memory(adapter, skb, skb->len,
e7f767a7
AP		 1160 PCI_DMA_TODEVICE))
1161 return -1;
1162
ca8f2112 1163 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
dbccc92b 1164 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
e7f767a7 1165 card->tx_buf_list[wrindx] = skb;
d930faee 1166
ca8f2112 1167 if (reg->pfu_enabled) {
45d18c56 1168 desc2 = card->txbd_ring[wrindx];
ca8f2112
AP		 1169 desc2->paddr = buf_pa;
1170 desc2->len = (u16)skb->len;
1171 desc2->frag_len = (u16)skb->len;
1172 desc2->offset = 0;
1173 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1174 MWIFIEX_BD_FLAG_LAST_DESC;
1175 } else {
1176 desc = card->txbd_ring[wrindx];
1177 desc->paddr = buf_pa;
1178 desc->len = (u16)skb->len;
1179 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1180 MWIFIEX_BD_FLAG_LAST_DESC;
1181 }
1182
1183 switch (card->dev->device) {
1184 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1185 card->txbd_wrptr++;
1186 break;
1187 case PCIE_DEVICE_ID_MARVELL_88W8897:
6d85ef00 1188 case PCIE_DEVICE_ID_MARVELL_88W8997:
ca8f2112
AP		 1189 card->txbd_wrptr += reg->ring_tx_start_ptr;
1190 break;
1191 }
1192
1193 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
d930faee 1194 card->txbd_wrptr = ((card->txbd_wrptr &
dd04e6ac
AP		 1195 reg->tx_rollover_ind) ^
1196 reg->tx_rollover_ind);
d930faee 1197
ca8f2112 1198 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
dd04e6ac
AP		 1199 /* Write the TX ring write pointer in to reg->tx_wrptr */
1200 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
ca8f2112 1201 card->txbd_wrptr | rx_val)) {
acebe8c1
ZL		 1202 mwifiex_dbg(adapter, ERROR,
1203 "SEND DATA: failed to write reg->tx_wrptr\n");
e7f767a7
AP		 1204 ret = -1;
1205 goto done_unmap;
d930faee 1206 }
e7f767a7
AP		 1207 if ((mwifiex_pcie_txbd_not_full(card)) &&
1208 tx_param->next_pkt_len) {
1209 /* have more packets and TxBD still can hold more */
acebe8c1
ZL		 1210 mwifiex_dbg(adapter, DATA,
1211 "SEND DATA: delay dnld-rdy interrupt.\n");
e7f767a7
AP		 1212 adapter->data_sent = false;
1213 } else {
1214 /* Send the TX ready interrupt */
1215 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1216 CPU_INTR_DNLD_RDY)) {
acebe8c1
ZL		 1217 mwifiex_dbg(adapter, ERROR,
1218 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
e7f767a7
AP		 1219 ret = -1;
1220 goto done_unmap;
1221 }
d930faee 1222 }
acebe8c1
ZL		 1223 mwifiex_dbg(adapter, DATA,
1224 "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1225 "%#x> and sent packet to firmware successfully\n",
1226 card->txbd_rdptr, card->txbd_wrptr);
d930faee 1227 } else {
acebe8c1
ZL		 1228 mwifiex_dbg(adapter, DATA,
1229 "info: TX Ring full, can't send packets to fw\n");
d930faee
AK		 1230 adapter->data_sent = true;
1231 /* Send the TX ready interrupt */
1232 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1233 CPU_INTR_DNLD_RDY))
acebe8c1
ZL		 1234 mwifiex_dbg(adapter, ERROR,
1235 "SEND DATA: failed to assert door-bell intr\n");
d930faee
AK		 1236 return -EBUSY;
1237 }
1238
e7f767a7
AP		 1239 return -EINPROGRESS;
1240done_unmap:
dbccc92b 1241 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
e7f767a7 1242 card->tx_buf_list[wrindx] = NULL;
ca8f2112
AP		 1243 if (reg->pfu_enabled)
1244 memset(desc2, 0, sizeof(*desc2));
1245 else
1246 memset(desc, 0, sizeof(*desc));
1247
e7f767a7 1248 return ret;
d930faee
AK		 1249}
1250
1251/*
1252 * This function handles received buffer ring and
1253 * dispatches packets to upper
1254 */
1255static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1256{
1257 struct pcie_service_card *card = adapter->card;
dd04e6ac 1258 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1259 u32 wrptr, rd_index, tx_val;
e7f767a7 1260 dma_addr_t buf_pa;
d930faee
AK		 1261 int ret = 0;
1262 struct sk_buff *skb_tmp = NULL;
e05dc3e9 1263 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 1264 struct mwifiex_pfu_buf_desc *desc2;
d930faee 1265
e7f767a7
AP		 1266 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1267 mwifiex_pm_wakeup_card(adapter);
1268
d930faee 1269 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1270 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
acebe8c1
ZL		 1271 mwifiex_dbg(adapter, ERROR,
1272 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK		 1273 ret = -1;
1274 goto done;
1275 }
e7f767a7 1276 card->rxbd_wrptr = wrptr;
d930faee 1277
dd04e6ac
AP		 1278 while (((wrptr & reg->rx_mask) !=
1279 (card->rxbd_rdptr & reg->rx_mask)) ||
1280 ((wrptr & reg->rx_rollover_ind) ==
1281 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
d930faee
AK		 1282 struct sk_buff *skb_data;
1283 u16 rx_len;
e7f767a7 1284 __le16 pkt_len;
d930faee 1285
dd04e6ac 1286 rd_index = card->rxbd_rdptr & reg->rx_mask;
d930faee
AK		 1287 skb_data = card->rx_buf_list[rd_index];
1288
bb8e6a1e
AK		 1289 /* If skb allocation was failed earlier for Rx packet,
1290 * rx_buf_list[rd_index] would have been left with a NULL.
1291 */
1292 if (!skb_data)
1293 return -ENOMEM;
1294
dbccc92b 1295 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE);
e7f767a7
AP		 1296 card->rx_buf_list[rd_index] = NULL;
1297
d930faee 1298 /* Get data length from interface header -
e7f767a7
AP		 1299 * first 2 bytes for len, next 2 bytes is for type
1300 */
1301 pkt_len = *((__le16 *)skb_data->data);
1302 rx_len = le16_to_cpu(pkt_len);
42a028aa
AP		 1303 if (WARN_ON(rx_len <= INTF_HEADER_LEN ||
1304 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
acebe8c1
ZL		 1305 mwifiex_dbg(adapter, ERROR,
1306 "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1307 rx_len, card->rxbd_rdptr, wrptr);
42a028aa
AP		 1308 dev_kfree_skb_any(skb_data);
1309 } else {
1310 skb_put(skb_data, rx_len);
acebe8c1
ZL		 1311 mwifiex_dbg(adapter, DATA,
1312 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1313 card->rxbd_rdptr, wrptr, rx_len);
42a028aa 1314 skb_pull(skb_data, INTF_HEADER_LEN);
6e251174 1315 if (adapter->rx_work_enabled) {
6e251174 1316 skb_queue_tail(&adapter->rx_data_q, skb_data);
6e251174
AP		 1317 adapter->data_received = true;
1318 atomic_inc(&adapter->rx_pending);
1319 } else {
1320 mwifiex_handle_rx_packet(adapter, skb_data);
1321 }
42a028aa 1322 }
e7f767a7 1323
62159944
AP		 1324 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1325 GFP_KERNEL | GFP_DMA);
d930faee 1326 if (!skb_tmp) {
acebe8c1
ZL		 1327 mwifiex_dbg(adapter, ERROR,
1328 "Unable to allocate skb.\n");
e7f767a7 1329 return -ENOMEM;
d930faee
AK		 1330 }
1331
e7f767a7
AP		 1332 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1333 MWIFIEX_RX_DATA_BUF_SIZE,
1334 PCI_DMA_FROMDEVICE))
1335 return -1;
1336
dbccc92b 1337 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
e7f767a7 1338
acebe8c1
ZL		 1339 mwifiex_dbg(adapter, INFO,
1340 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1341 skb_tmp, rd_index);
e7f767a7 1342 card->rx_buf_list[rd_index] = skb_tmp;
ca8f2112
AP		 1343
1344 if (reg->pfu_enabled) {
45d18c56 1345 desc2 = card->rxbd_ring[rd_index];
ca8f2112
AP		 1346 desc2->paddr = buf_pa;
1347 desc2->len = skb_tmp->len;
1348 desc2->frag_len = skb_tmp->len;
1349 desc2->offset = 0;
1350 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1351 } else {
1352 desc = card->rxbd_ring[rd_index];
1353 desc->paddr = buf_pa;
1354 desc->len = skb_tmp->len;
1355 desc->flags = 0;
1356 }
d930faee 1357
dd04e6ac 1358 if ((++card->rxbd_rdptr & reg->rx_mask) ==
d930faee
AK		 1359 MWIFIEX_MAX_TXRX_BD) {
1360 card->rxbd_rdptr = ((card->rxbd_rdptr &
dd04e6ac
AP		 1361 reg->rx_rollover_ind) ^
1362 reg->rx_rollover_ind);
d930faee 1363 }
acebe8c1
ZL		 1364 mwifiex_dbg(adapter, DATA,
1365 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1366 card->rxbd_rdptr, wrptr);
d930faee 1367
ca8f2112 1368 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
dd04e6ac
AP		 1369 /* Write the RX ring read pointer in to reg->rx_rdptr */
1370 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
ca8f2112 1371 card->rxbd_rdptr | tx_val)) {
acebe8c1
ZL		 1372 mwifiex_dbg(adapter, DATA,
1373 "RECV DATA: failed to write reg->rx_rdptr\n");
d930faee
AK		 1374 ret = -1;
1375 goto done;
1376 }
1377
1378 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1379 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
acebe8c1
ZL		 1380 mwifiex_dbg(adapter, ERROR,
1381 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK		 1382 ret = -1;
1383 goto done;
1384 }
acebe8c1
ZL		 1385 mwifiex_dbg(adapter, DATA,
1386 "info: RECV DATA: Rcvd packet from fw successfully\n");
e7f767a7 1387 card->rxbd_wrptr = wrptr;
d930faee
AK		 1388 }
1389
1390done:
d930faee
AK		 1391 return ret;
1392}
1393
1394/*
1395 * This function downloads the boot command to device
1396 */
1397static int
1398mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1399{
fc331460
AP		 1400 dma_addr_t buf_pa;
1401 struct pcie_service_card *card = adapter->card;
dd04e6ac 1402 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1403
fc331460 1404 if (!(skb->data && skb->len)) {
acebe8c1
ZL		 1405 mwifiex_dbg(adapter, ERROR,
1406 "Invalid parameter in %s <%p. len %d>\n",
1407 __func__, skb->data, skb->len);
d930faee
AK		 1408 return -1;
1409 }
1410
fc331460
AP		 1411 if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE))
1412 return -1;
1413
dbccc92b 1414 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
fc331460 1415
dd04e6ac
AP		 1416 /* Write the lower 32bits of the physical address to low command
1417 * address scratch register
1418 */
1419 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
acebe8c1
ZL		 1420 mwifiex_dbg(adapter, ERROR,
1421 "%s: failed to write download command to boot code.\n",
1422 __func__);
dbccc92b 1423 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
d930faee
AK		 1424 return -1;
1425 }
1426
dd04e6ac
AP		 1427 /* Write the upper 32bits of the physical address to high command
1428 * address scratch register
1429 */
1430 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1431 (u32)((u64)buf_pa >> 32))) {
acebe8c1
ZL		 1432 mwifiex_dbg(adapter, ERROR,
1433 "%s: failed to write download command to boot code.\n",
1434 __func__);
dbccc92b 1435 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
d930faee
AK		 1436 return -1;
1437 }
1438
dd04e6ac
AP		 1439 /* Write the command length to cmd_size scratch register */
1440 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
acebe8c1
ZL		 1441 mwifiex_dbg(adapter, ERROR,
1442 "%s: failed to write command len to cmd_size scratch reg\n",
1443 __func__);
dbccc92b 1444 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
d930faee
AK		 1445 return -1;
1446 }
1447
1448 /* Ring the door bell */
1449 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1450 CPU_INTR_DOOR_BELL)) {
acebe8c1
ZL		 1451 mwifiex_dbg(adapter, ERROR,
1452 "%s: failed to assert door-bell intr\n", __func__);
dbccc92b 1453 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
d930faee
AK		 1454 return -1;
1455 }
1456
1457 return 0;
1458}
1459
c6d1d87a
AP		 1460/* This function init rx port in firmware which in turn enables to receive data
1461 * from device before transmitting any packet.
1462 */
1463static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1464{
1465 struct pcie_service_card *card = adapter->card;
dd04e6ac 1466 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1467 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
c6d1d87a 1468
dd04e6ac 1469 /* Write the RX ring read pointer in to reg->rx_rdptr */
ca8f2112
AP		 1470 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1471 tx_wrap)) {
acebe8c1
ZL		 1472 mwifiex_dbg(adapter, ERROR,
1473 "RECV DATA: failed to write reg->rx_rdptr\n");
c6d1d87a
AP		 1474 return -1;
1475 }
1476 return 0;
1477}
1478
1479/* This function downloads commands to the device
d930faee
AK		 1480 */
1481static int
1482mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1483{
1484 struct pcie_service_card *card = adapter->card;
dd04e6ac 1485 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1486 int ret = 0;
fc331460
AP		 1487 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1488 u8 *payload = (u8 *)skb->data;
d930faee
AK		 1489
1490 if (!(skb->data && skb->len)) {
acebe8c1
ZL		 1491 mwifiex_dbg(adapter, ERROR,
1492 "Invalid parameter in %s <%p, %#x>\n",
1493 __func__, skb->data, skb->len);
d930faee
AK		 1494 return -1;
1495 }
1496
1497 /* Make sure a command response buffer is available */
1498 if (!card->cmdrsp_buf) {
acebe8c1
ZL		 1499 mwifiex_dbg(adapter, ERROR,
1500 "No response buffer available, send command failed\n");
d930faee
AK		 1501 return -EBUSY;
1502 }
1503
fc331460
AP		 1504 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1505 mwifiex_pm_wakeup_card(adapter);
d930faee
AK		 1506
1507 adapter->cmd_sent = true;
fc331460
AP		 1508
1509 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
1510 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
1511
1512 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1513 return -1;
1514
1515 card->cmd_buf = skb;
d930faee
AK		 1516
1517 /* To send a command, the driver will:
1518 1. Write the 64bit physical address of the data buffer to
dd04e6ac 1519 cmd response address low + cmd response address high
d930faee
AK		 1520 2. Ring the door bell (i.e. set the door bell interrupt)
1521
1522 In response to door bell interrupt, the firmware will perform
1523 the DMA of the command packet (first header to obtain the total
1524 length and then rest of the command).
1525 */
1526
1527 if (card->cmdrsp_buf) {
dbccc92b 1528 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
d930faee
AK		 1529 /* Write the lower 32bits of the cmdrsp buffer physical
1530 address */
dd04e6ac 1531 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
fc331460 1532 (u32)cmdrsp_buf_pa)) {
acebe8c1
ZL		 1533 mwifiex_dbg(adapter, ERROR,
1534 "Failed to write download cmd to boot code.\n");
d930faee
AK		 1535 ret = -1;
1536 goto done;
1537 }
1538 /* Write the upper 32bits of the cmdrsp buffer physical
1539 address */
dd04e6ac 1540 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
fc331460 1541 (u32)((u64)cmdrsp_buf_pa >> 32))) {
acebe8c1
ZL		 1542 mwifiex_dbg(adapter, ERROR,
1543 "Failed to write download cmd to boot code.\n");
d930faee
AK		 1544 ret = -1;
1545 goto done;
1546 }
1547 }
1548
dbccc92b 1549 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
dd04e6ac
AP		 1550 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1551 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1552 (u32)cmd_buf_pa)) {
acebe8c1
ZL		 1553 mwifiex_dbg(adapter, ERROR,
1554 "Failed to write download cmd to boot code.\n");
d930faee
AK		 1555 ret = -1;
1556 goto done;
1557 }
dd04e6ac
AP		 1558 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1559 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1560 (u32)((u64)cmd_buf_pa >> 32))) {
acebe8c1
ZL		 1561 mwifiex_dbg(adapter, ERROR,
1562 "Failed to write download cmd to boot code.\n");
d930faee
AK		 1563 ret = -1;
1564 goto done;
1565 }
1566
dd04e6ac
AP		 1567 /* Write the command length to reg->cmd_size */
1568 if (mwifiex_write_reg(adapter, reg->cmd_size,
1569 card->cmd_buf->len)) {
acebe8c1
ZL		 1570 mwifiex_dbg(adapter, ERROR,
1571 "Failed to write cmd len to reg->cmd_size\n");
d930faee
AK		 1572 ret = -1;
1573 goto done;
1574 }
1575
1576 /* Ring the door bell */
1577 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1578 CPU_INTR_DOOR_BELL)) {
acebe8c1
ZL		 1579 mwifiex_dbg(adapter, ERROR,
1580 "Failed to assert door-bell intr\n");
d930faee
AK		 1581 ret = -1;
1582 goto done;
1583 }
1584
1585done:
1586 if (ret)
1587 adapter->cmd_sent = false;
1588
1589 return 0;
1590}
1591
1592/*
1593 * This function handles command complete interrupt
1594 */
1595static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1596{
1597 struct pcie_service_card *card = adapter->card;
dd04e6ac 1598 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
f57c1edc 1599 struct sk_buff *skb = card->cmdrsp_buf;
d930faee 1600 int count = 0;
fc331460
AP		 1601 u16 rx_len;
1602 __le16 pkt_len;
d930faee 1603
acebe8c1
ZL		 1604 mwifiex_dbg(adapter, CMD,
1605 "info: Rx CMD Response\n");
d930faee 1606
dbccc92b 1607 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE);
fc331460 1608
189b3299
AD		 1609 /* Unmap the command as a response has been received. */
1610 if (card->cmd_buf) {
1611 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1612 PCI_DMA_TODEVICE);
1613 card->cmd_buf = NULL;
1614 }
1615
fc331460
AP		 1616 pkt_len = *((__le16 *)skb->data);
1617 rx_len = le16_to_cpu(pkt_len);
1618 skb_trim(skb, rx_len);
1619 skb_pull(skb, INTF_HEADER_LEN);
1620
d930faee 1621 if (!adapter->curr_cmd) {
d930faee 1622 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
f57c1edc
YAP		 1623 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1624 skb->len);
1c97560f
AK		 1625 mwifiex_pcie_enable_host_int(adapter);
1626 if (mwifiex_write_reg(adapter,
1627 PCIE_CPU_INT_EVENT,
1628 CPU_INTR_SLEEP_CFM_DONE)) {
acebe8c1
ZL		 1629 mwifiex_dbg(adapter, ERROR,
1630 "Write register failed\n");
1c97560f
AK		 1631 return -1;
1632 }
c4bc980f
AP		 1633 mwifiex_delay_for_sleep_cookie(adapter,
1634 MWIFIEX_MAX_DELAY_COUNT);
52301a81
AP		 1635 while (reg->sleep_cookie && (count++ < 10) &&
1636 mwifiex_pcie_ok_to_access_hw(adapter))
e7891ba2 1637 usleep_range(50, 60);
d930faee 1638 } else {
acebe8c1
ZL		 1639 mwifiex_dbg(adapter, ERROR,
1640 "There is no command but got cmdrsp\n");
d930faee 1641 }
f57c1edc
YAP		 1642 memcpy(adapter->upld_buf, skb->data,
1643 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
0f49d64c 1644 skb_push(skb, INTF_HEADER_LEN);
fc331460
AP		 1645 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1646 PCI_DMA_FROMDEVICE))
1647 return -1;
d930faee 1648 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
f57c1edc 1649 adapter->curr_cmd->resp_skb = skb;
d930faee
AK		 1650 adapter->cmd_resp_received = true;
1651 /* Take the pointer and set it to CMD node and will
1652 return in the response complete callback */
1653 card->cmdrsp_buf = NULL;
1654
1655 /* Clear the cmd-rsp buffer address in scratch registers. This
1656 will prevent firmware from writing to the same response
1657 buffer again. */
dd04e6ac 1658 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
acebe8c1
ZL		 1659 mwifiex_dbg(adapter, ERROR,
1660 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
d930faee
AK		 1661 return -1;
1662 }
1663 /* Write the upper 32bits of the cmdrsp buffer physical
1664 address */
dd04e6ac 1665 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
acebe8c1
ZL		 1666 mwifiex_dbg(adapter, ERROR,
1667 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
d930faee
AK		 1668 return -1;
1669 }
1670 }
1671
1672 return 0;
1673}
1674
1675/*
1676 * Command Response processing complete handler
1677 */
1678static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1679 struct sk_buff *skb)
1680{
1681 struct pcie_service_card *card = adapter->card;
1682
1683 if (skb) {
1684 card->cmdrsp_buf = skb;
1685 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
fc331460
AP		 1686 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1687 PCI_DMA_FROMDEVICE))
1688 return -1;
1689 }
1690
d930faee
AK		 1691 return 0;
1692}
1693
1694/*
1695 * This function handles firmware event ready interrupt
1696 */
1697static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1698{
1699 struct pcie_service_card *card = adapter->card;
dd04e6ac 1700 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK		 1701 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1702 u32 wrptr, event;
e05dc3e9 1703 struct mwifiex_evt_buf_desc *desc;
fc331460
AP		 1704
1705 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1706 mwifiex_pm_wakeup_card(adapter);
d930faee
AK		 1707
1708 if (adapter->event_received) {
acebe8c1
ZL		 1709 mwifiex_dbg(adapter, EVENT,
1710 "info: Event being processed,\t"
1711 "do not process this interrupt just yet\n");
d930faee
AK		 1712 return 0;
1713 }
1714
1715 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
acebe8c1
ZL		 1716 mwifiex_dbg(adapter, ERROR,
1717 "info: Invalid read pointer...\n");
d930faee
AK		 1718 return -1;
1719 }
1720
1721 /* Read the event ring write pointer set by firmware */
dd04e6ac 1722 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
acebe8c1
ZL		 1723 mwifiex_dbg(adapter, ERROR,
1724 "EventReady: failed to read reg->evt_wrptr\n");
d930faee
AK		 1725 return -1;
1726 }
1727
acebe8c1
ZL		 1728 mwifiex_dbg(adapter, EVENT,
1729 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
1730 card->evtbd_rdptr, wrptr);
f57c1edc
YAP		 1731 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1732 & MWIFIEX_EVTBD_MASK)) ||
dd04e6ac
AP		 1733 ((wrptr & reg->evt_rollover_ind) ==
1734 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
d930faee
AK		 1735 struct sk_buff *skb_cmd;
1736 __le16 data_len = 0;
1737 u16 evt_len;
1738
acebe8c1
ZL		 1739 mwifiex_dbg(adapter, INFO,
1740 "info: Read Index: %d\n", rdptr);
d930faee 1741 skb_cmd = card->evt_buf_list[rdptr];
dbccc92b 1742 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE);
fc331460 1743
d930faee
AK		 1744 /* Take the pointer and set it to event pointer in adapter
1745 and will return back after event handling callback */
1746 card->evt_buf_list[rdptr] = NULL;
e05dc3e9
AP		 1747 desc = card->evtbd_ring[rdptr];
1748 memset(desc, 0, sizeof(*desc));
d930faee
AK		 1749
1750 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
1751 adapter->event_cause = event;
1752 /* The first 4bytes will be the event transfer header
1753 len is 2 bytes followed by type which is 2 bytes */
1754 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1755 evt_len = le16_to_cpu(data_len);
868093a9 1756 skb_trim(skb_cmd, evt_len);
d930faee 1757 skb_pull(skb_cmd, INTF_HEADER_LEN);
acebe8c1
ZL		 1758 mwifiex_dbg(adapter, EVENT,
1759 "info: Event length: %d\n", evt_len);
d930faee
AK		 1760
1761 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1762 memcpy(adapter->event_body, skb_cmd->data +
1763 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1764 MWIFIEX_EVENT_HEADER_LEN);
1765
1766 adapter->event_received = true;
1767 adapter->event_skb = skb_cmd;
1768
1769 /* Do not update the event read pointer here, wait till the
1770 buffer is released. This is just to make things simpler,
1771 we need to find a better method of managing these buffers.
1772 */
2703a668
AP		 1773 } else {
1774 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1775 CPU_INTR_EVENT_DONE)) {
acebe8c1
ZL		 1776 mwifiex_dbg(adapter, ERROR,
1777 "Write register failed\n");
2703a668
AP		 1778 return -1;
1779 }
d930faee
AK		 1780 }
1781
1782 return 0;
1783}
1784
1785/*
1786 * Event processing complete handler
1787 */
1788static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1789 struct sk_buff *skb)
1790{
1791 struct pcie_service_card *card = adapter->card;
dd04e6ac 1792 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK		 1793 int ret = 0;
1794 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1795 u32 wrptr;
e05dc3e9 1796 struct mwifiex_evt_buf_desc *desc;
d930faee
AK		 1797
1798 if (!skb)
1799 return 0;
1800
1eb54c8a 1801 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
acebe8c1
ZL		 1802 mwifiex_dbg(adapter, ERROR,
1803 "event_complete: Invalid rdptr 0x%x\n",
1804 rdptr);
8c53e42d 1805 return -EINVAL;
1eb54c8a 1806 }
d930faee
AK		 1807
1808 /* Read the event ring write pointer set by firmware */
dd04e6ac 1809 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
acebe8c1
ZL		 1810 mwifiex_dbg(adapter, ERROR,
1811 "event_complete: failed to read reg->evt_wrptr\n");
8c53e42d 1812 return -1;
d930faee
AK		 1813 }
1814
1815 if (!card->evt_buf_list[rdptr]) {
1816 skb_push(skb, INTF_HEADER_LEN);
2728cecd 1817 skb_put(skb, MAX_EVENT_SIZE - skb->len);
fc331460
AP		 1818 if (mwifiex_map_pci_memory(adapter, skb,
1819 MAX_EVENT_SIZE,
1820 PCI_DMA_FROMDEVICE))
1821 return -1;
d930faee 1822 card->evt_buf_list[rdptr] = skb;
e05dc3e9 1823 desc = card->evtbd_ring[rdptr];
dbccc92b 1824 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
e05dc3e9
AP		 1825 desc->len = (u16)skb->len;
1826 desc->flags = 0;
d930faee
AK		 1827 skb = NULL;
1828 } else {
acebe8c1
ZL		 1829 mwifiex_dbg(adapter, ERROR,
1830 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1831 rdptr, card->evt_buf_list[rdptr], skb);
d930faee
AK		 1832 }
1833
1834 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1835 card->evtbd_rdptr = ((card->evtbd_rdptr &
dd04e6ac
AP		 1836 reg->evt_rollover_ind) ^
1837 reg->evt_rollover_ind);
d930faee
AK		 1838 }
1839
acebe8c1
ZL		 1840 mwifiex_dbg(adapter, EVENT,
1841 "info: Updated <Rd: 0x%x, Wr: 0x%x>",
1842 card->evtbd_rdptr, wrptr);
d930faee 1843
dd04e6ac
AP		 1844 /* Write the event ring read pointer in to reg->evt_rdptr */
1845 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1846 card->evtbd_rdptr)) {
acebe8c1
ZL		 1847 mwifiex_dbg(adapter, ERROR,
1848 "event_complete: failed to read reg->evt_rdptr\n");
8c53e42d 1849 return -1;
d930faee
AK		 1850 }
1851
acebe8c1
ZL		 1852 mwifiex_dbg(adapter, EVENT,
1853 "info: Check Events Again\n");
d930faee
AK		 1854 ret = mwifiex_pcie_process_event_ready(adapter);
1855
1856 return ret;
1857}
1858
1859/*
1860 * This function downloads the firmware to the card.
1861 *
1862 * Firmware is downloaded to the card in blocks. Every block download
1863 * is tested for CRC errors, and retried a number of times before
1864 * returning failure.
1865 */
1866static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1867 struct mwifiex_fw_image *fw)
1868{
1869 int ret;
1870 u8 *firmware = fw->fw_buf;
1871 u32 firmware_len = fw->fw_len;
1872 u32 offset = 0;
1873 struct sk_buff *skb;
1874 u32 txlen, tx_blocks = 0, tries, len;
1875 u32 block_retry_cnt = 0;
fc331460 1876 struct pcie_service_card *card = adapter->card;
dd04e6ac 1877 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK		 1878
1879 if (!firmware || !firmware_len) {
acebe8c1
ZL		 1880 mwifiex_dbg(adapter, ERROR,
1881 "No firmware image found! Terminating download\n");
d930faee
AK		 1882 return -1;
1883 }
1884
acebe8c1
ZL		 1885 mwifiex_dbg(adapter, INFO,
1886 "info: Downloading FW image (%d bytes)\n",
1887 firmware_len);
d930faee
AK		 1888
1889 if (mwifiex_pcie_disable_host_int(adapter)) {
acebe8c1
ZL		 1890 mwifiex_dbg(adapter, ERROR,
1891 "%s: Disabling interrupts failed.\n", __func__);
d930faee
AK		 1892 return -1;
1893 }
1894
1895 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1896 if (!skb) {
1897 ret = -ENOMEM;
1898 goto done;
1899 }
d930faee
AK		 1900
1901 /* Perform firmware data transfer */
1902 do {
1903 u32 ireg_intr = 0;
1904
1905 /* More data? */
1906 if (offset >= firmware_len)
1907 break;
1908
1909 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
dd04e6ac 1910 ret = mwifiex_read_reg(adapter, reg->cmd_size,
d930faee
AK		 1911 &len);
1912 if (ret) {
acebe8c1
ZL		 1913 mwifiex_dbg(adapter, FATAL,
1914 "Failed reading len from boot code\n");
d930faee
AK		 1915 goto done;
1916 }
1917 if (len)
1918 break;
e7891ba2 1919 usleep_range(10, 20);
d930faee
AK		 1920 }
1921
1922 if (!len) {
1923 break;
1924 } else if (len > MWIFIEX_UPLD_SIZE) {
acebe8c1
ZL		 1925 mwifiex_dbg(adapter, ERROR,
1926 "FW download failure @ %d, invalid length %d\n",
1927 offset, len);
d930faee
AK		 1928 ret = -1;
1929 goto done;
1930 }
1931
1932 txlen = len;
1933
1934 if (len & BIT(0)) {
1935 block_retry_cnt++;
1936 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
acebe8c1
ZL		 1937 mwifiex_dbg(adapter, ERROR,
1938 "FW download failure @ %d, over max\t"
1939 "retry count\n", offset);
d930faee
AK		 1940 ret = -1;
1941 goto done;
1942 }
acebe8c1
ZL		 1943 mwifiex_dbg(adapter, ERROR,
1944 "FW CRC error indicated by the\t"
1945 "helper: len = 0x%04X, txlen = %d\n",
1946 len, txlen);
d930faee
AK		 1947 len &= ~BIT(0);
1948 /* Setting this to 0 to resend from same offset */
1949 txlen = 0;
1950 } else {
1951 block_retry_cnt = 0;
1952 /* Set blocksize to transfer - checking for
1953 last block */
1954 if (firmware_len - offset < txlen)
1955 txlen = firmware_len - offset;
1956
acebe8c1 1957 mwifiex_dbg(adapter, INFO, ".");
d930faee 1958
dd04e6ac
AP		 1959 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
1960 card->pcie.blksz_fw_dl;
d930faee
AK		 1961
1962 /* Copy payload to buffer */
1963 memmove(skb->data, &firmware[offset], txlen);
1964 }
1965
1966 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
dd04e6ac 1967 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
d930faee
AK		 1968
1969 /* Send the boot command to device */
1970 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
acebe8c1
ZL		 1971 mwifiex_dbg(adapter, ERROR,
1972 "Failed to send firmware download command\n");
d930faee
AK		 1973 ret = -1;
1974 goto done;
1975 }
fc331460 1976
d930faee
AK		 1977 /* Wait for the command done interrupt */
1978 do {
1979 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
1980 &ireg_intr)) {
acebe8c1
ZL		 1981 mwifiex_dbg(adapter, ERROR,
1982 "%s: Failed to read\t"
1983 "interrupt status during fw dnld.\n",
1984 __func__);
dbccc92b
AD		 1985 mwifiex_unmap_pci_memory(adapter, skb,
1986 PCI_DMA_TODEVICE);
d930faee
AK		 1987 ret = -1;
1988 goto done;
1989 }
1990 } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
1991 CPU_INTR_DOOR_BELL);
fc331460 1992
dbccc92b 1993 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
fc331460 1994
d930faee
AK		 1995 offset += txlen;
1996 } while (true);
1997
acebe8c1
ZL		 1998 mwifiex_dbg(adapter, MSG,
1999 "info: FW download over, size %d bytes\n", offset);
d930faee
AK		 2000
2001 ret = 0;
2002
2003done:
2004 dev_kfree_skb_any(skb);
2005 return ret;
2006}
2007
2008/*
2009 * This function checks the firmware status in card.
d930faee
AK		 2010 */
2011static int
2012mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2013{
2014 int ret = 0;
2fd5c6ed 2015 u32 firmware_stat;
dd04e6ac
AP		 2016 struct pcie_service_card *card = adapter->card;
2017 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK		 2018 u32 tries;
2019
2020 /* Mask spurios interrupts */
2021 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
f57c1edc 2022 HOST_INTR_MASK)) {
acebe8c1
ZL		 2023 mwifiex_dbg(adapter, ERROR,
2024 "Write register failed\n");
d930faee
AK		 2025 return -1;
2026 }
2027
acebe8c1
ZL		 2028 mwifiex_dbg(adapter, INFO,
2029 "Setting driver ready signature\n");
dd04e6ac
AP		 2030 if (mwifiex_write_reg(adapter, reg->drv_rdy,
2031 FIRMWARE_READY_PCIE)) {
acebe8c1
ZL		 2032 mwifiex_dbg(adapter, ERROR,
2033 "Failed to write driver ready signature\n");
d930faee
AK		 2034 return -1;
2035 }
2036
2037 /* Wait for firmware initialization event */
2038 for (tries = 0; tries < poll_num; tries++) {
dd04e6ac 2039 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK		 2040 &firmware_stat))
2041 ret = -1;
2042 else
2043 ret = 0;
2044 if (ret)
2045 continue;
2046 if (firmware_stat == FIRMWARE_READY_PCIE) {
2047 ret = 0;
2048 break;
2049 } else {
a76b20e5 2050 msleep(100);
d930faee
AK		 2051 ret = -1;
2052 }
2053 }
2054
2fd5c6ed 2055 return ret;
2056}
2057
2058/* This function checks if WLAN is the winner.
2059 */
2060static int
2061mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
2062{
2063 u32 winner = 0;
2064 int ret = 0;
2065 struct pcie_service_card *card = adapter->card;
2066 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2067
2068 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) {
2069 ret = -1;
2070 } else if (!winner) {
2071 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n");
2072 adapter->winner = 1;
2073 } else {
2074 mwifiex_dbg(adapter, ERROR,
2075 "PCI-E is not the winner <%#x,%d>, exit dnld\n",
2076 ret, adapter->winner);
d930faee
AK		 2077 }
2078
2079 return ret;
2080}
2081
2082/*
2083 * This function reads the interrupt status from card.
2084 */
2085static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
2086{
2087 u32 pcie_ireg;
2088 unsigned long flags;
2089
2090 if (!mwifiex_pcie_ok_to_access_hw(adapter))
2091 return;
2092
2093 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) {
acebe8c1 2094 mwifiex_dbg(adapter, ERROR, "Read register failed\n");
d930faee
AK		 2095 return;
2096 }
2097
2098 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2099
2100 mwifiex_pcie_disable_host_int(adapter);
2101
2102 /* Clear the pending interrupts */
2103 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2104 ~pcie_ireg)) {
acebe8c1
ZL		 2105 mwifiex_dbg(adapter, ERROR,
2106 "Write register failed\n");
d930faee
AK		 2107 return;
2108 }
2109 spin_lock_irqsave(&adapter->int_lock, flags);
2110 adapter->int_status |= pcie_ireg;
2111 spin_unlock_irqrestore(&adapter->int_lock, flags);
2112
1c97560f
AK		 2113 if (!adapter->pps_uapsd_mode &&
2114 adapter->ps_state == PS_STATE_SLEEP &&
2115 mwifiex_pcie_ok_to_access_hw(adapter)) {
d930faee
AK		 2116 /* Potentially for PCIe we could get other
2117 * interrupts like shared. Don't change power
2118 * state until cookie is set */
c24d992a
AP		 2119 adapter->ps_state = PS_STATE_AWAKE;
2120 adapter->pm_wakeup_fw_try = false;
4636187d 2121 del_timer(&adapter->wakeup_timer);
d930faee
AK		 2122 }
2123 }
2124}
2125
2126/*
2127 * Interrupt handler for PCIe root port
2128 *
2129 * This function reads the interrupt status from firmware and assigns
2130 * the main process in workqueue which will handle the interrupt.
2131 */
2132static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2133{
2134 struct pci_dev *pdev = (struct pci_dev *)context;
2135 struct pcie_service_card *card;
2136 struct mwifiex_adapter *adapter;
2137
2138 if (!pdev) {
91442431 2139 pr_err("info: %s: pdev is NULL\n", __func__);
d930faee
AK		 2140 goto exit;
2141 }
2142
b2a31204 2143 card = pci_get_drvdata(pdev);
d930faee 2144 if (!card || !card->adapter) {
91442431
XH		 2145 pr_err("info: %s: card=%p adapter=%p\n", __func__, card,
2146 card ? card->adapter : NULL);
d930faee
AK		 2147 goto exit;
2148 }
2149 adapter = card->adapter;
2150
2151 if (adapter->surprise_removed)
2152 goto exit;
2153
2154 mwifiex_interrupt_status(adapter);
b2713f67 2155 mwifiex_queue_main_work(adapter);
d930faee
AK		 2156
2157exit:
2158 return IRQ_HANDLED;
2159}
2160
2161/*
2162 * This function checks the current interrupt status.
2163 *
2164 * The following interrupts are checked and handled by this function -
2165 * - Data sent
2166 * - Command sent
2167 * - Command received
2168 * - Packets received
2169 * - Events received
2170 *
2171 * In case of Rx packets received, the packets are uploaded from card to
2172 * host and processed accordingly.
2173 */
2174static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2175{
2176 int ret;
659c4788 2177 u32 pcie_ireg;
d930faee
AK		 2178 unsigned long flags;
2179
2180 spin_lock_irqsave(&adapter->int_lock, flags);
2181 /* Clear out unused interrupts */
659c4788
AP		 2182 pcie_ireg = adapter->int_status;
2183 adapter->int_status = 0;
d930faee
AK		 2184 spin_unlock_irqrestore(&adapter->int_lock, flags);
2185
659c4788
AP		 2186 while (pcie_ireg & HOST_INTR_MASK) {
2187 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2188 pcie_ireg &= ~HOST_INTR_DNLD_DONE;
acebe8c1
ZL		 2189 mwifiex_dbg(adapter, INTR,
2190 "info: TX DNLD Done\n");
e7f767a7
AP		 2191 ret = mwifiex_pcie_send_data_complete(adapter);
2192 if (ret)
2193 return ret;
d930faee 2194 }
659c4788
AP		 2195 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2196 pcie_ireg &= ~HOST_INTR_UPLD_RDY;
acebe8c1
ZL		 2197 mwifiex_dbg(adapter, INTR,
2198 "info: Rx DATA\n");
d930faee
AK		 2199 ret = mwifiex_pcie_process_recv_data(adapter);
2200 if (ret)
2201 return ret;
2202 }
659c4788
AP		 2203 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2204 pcie_ireg &= ~HOST_INTR_EVENT_RDY;
acebe8c1
ZL		 2205 mwifiex_dbg(adapter, INTR,
2206 "info: Rx EVENT\n");
d930faee
AK		 2207 ret = mwifiex_pcie_process_event_ready(adapter);
2208 if (ret)
2209 return ret;
2210 }
2211
659c4788
AP		 2212 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2213 pcie_ireg &= ~HOST_INTR_CMD_DONE;
d930faee 2214 if (adapter->cmd_sent) {
acebe8c1
ZL		 2215 mwifiex_dbg(adapter, INTR,
2216 "info: CMD sent Interrupt\n");
d930faee
AK		 2217 adapter->cmd_sent = false;
2218 }
2219 /* Handle command response */
2220 ret = mwifiex_pcie_process_cmd_complete(adapter);
2221 if (ret)
2222 return ret;
2223 }
2224
2225 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2226 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2227 &pcie_ireg)) {
acebe8c1
ZL		 2228 mwifiex_dbg(adapter, ERROR,
2229 "Read register failed\n");
d930faee
AK		 2230 return -1;
2231 }
2232
2233 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2234 if (mwifiex_write_reg(adapter,
f57c1edc
YAP		 2235 PCIE_HOST_INT_STATUS,
2236 ~pcie_ireg)) {
acebe8c1
ZL		 2237 mwifiex_dbg(adapter, ERROR,
2238 "Write register failed\n");
d930faee
AK		 2239 return -1;
2240 }
d930faee
AK		 2241 }
2242
2243 }
2244 }
acebe8c1
ZL		 2245 mwifiex_dbg(adapter, INTR,
2246 "info: cmd_sent=%d data_sent=%d\n",
2247 adapter->cmd_sent, adapter->data_sent);
b2fda1f6
AP		 2248 if (adapter->ps_state != PS_STATE_SLEEP)
2249 mwifiex_pcie_enable_host_int(adapter);
d930faee
AK		 2250
2251 return 0;
2252}
2253
2254/*
2255 * This function downloads data from driver to card.
2256 *
2257 * Both commands and data packets are transferred to the card by this
2258 * function.
2259 *
2260 * This function adds the PCIE specific header to the front of the buffer
2261 * before transferring. The header contains the length of the packet and
2262 * the type. The firmware handles the packets based upon this set type.
2263 */
2264static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2265 struct sk_buff *skb,
2266 struct mwifiex_tx_param *tx_param)
2267{
fa161cb7 2268 if (!skb) {
acebe8c1
ZL		 2269 mwifiex_dbg(adapter, ERROR,
2270 "Passed NULL skb to %s\n", __func__);
d930faee
AK		 2271 return -1;
2272 }
2273
2274 if (type == MWIFIEX_TYPE_DATA)
e7f767a7 2275 return mwifiex_pcie_send_data(adapter, skb, tx_param);
d930faee
AK		 2276 else if (type == MWIFIEX_TYPE_CMD)
2277 return mwifiex_pcie_send_cmd(adapter, skb);
2278
2279 return 0;
2280}
2281
92c2538f
AK		 2282/* This function read/write firmware */
2283static enum rdwr_status
2284mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2285{
2286 int ret, tries;
2287 u8 ctrl_data;
2288 struct pcie_service_card *card = adapter->card;
2289 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2290
2291 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, FW_DUMP_HOST_READY);
2292 if (ret) {
acebe8c1
ZL		 2293 mwifiex_dbg(adapter, ERROR,
2294 "PCIE write err\n");
92c2538f
AK		 2295 return RDWR_STATUS_FAILURE;
2296 }
2297
2298 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2299 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2300 if (ctrl_data == FW_DUMP_DONE)
2301 return RDWR_STATUS_SUCCESS;
2302 if (doneflag && ctrl_data == doneflag)
2303 return RDWR_STATUS_DONE;
2304 if (ctrl_data != FW_DUMP_HOST_READY) {
acebe8c1
ZL		 2305 mwifiex_dbg(adapter, WARN,
2306 "The ctrl reg was changed, re-try again!\n");
24716876
AK		 2307 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2308 FW_DUMP_HOST_READY);
92c2538f 2309 if (ret) {
acebe8c1
ZL		 2310 mwifiex_dbg(adapter, ERROR,
2311 "PCIE write err\n");
92c2538f
AK		 2312 return RDWR_STATUS_FAILURE;
2313 }
2314 }
2315 usleep_range(100, 200);
2316 }
2317
acebe8c1 2318 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
92c2538f
AK		 2319 return RDWR_STATUS_FAILURE;
2320}
2321
2322/* This function dump firmware memory to file */
fc697159 2323static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
92c2538f
AK		 2324{
2325 struct pcie_service_card *card = adapter->card;
2326 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2327 unsigned int reg, reg_start, reg_end;
92c2538f
AK		 2328 u8 *dbg_ptr, *end_ptr, dump_num, idx, i, read_reg, doneflag = 0;
2329 enum rdwr_status stat;
2330 u32 memory_size;
24716876 2331 int ret;
92c2538f 2332
b4e8aebb 2333 if (!card->pcie.can_dump_fw)
92c2538f
AK		 2334 return;
2335
2336 for (idx = 0; idx < ARRAY_SIZE(mem_type_mapping_tbl); idx++) {
2337 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
2338
2339 if (entry->mem_ptr) {
2340 vfree(entry->mem_ptr);
2341 entry->mem_ptr = NULL;
2342 }
2343 entry->mem_size = 0;
2344 }
2345
acebe8c1 2346 mwifiex_dbg(adapter, DUMP, "== mwifiex firmware dump start ==\n");
92c2538f
AK		 2347
2348 /* Read the number of the memories which will dump */
2349 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2350 if (stat == RDWR_STATUS_FAILURE)
57670ee8 2351 return;
92c2538f
AK		 2352
2353 reg = creg->fw_dump_start;
2354 mwifiex_read_reg_byte(adapter, reg, &dump_num);
2355
2356 /* Read the length of every memory which will dump */
2357 for (idx = 0; idx < dump_num; idx++) {
2358 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
2359
2360 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2361 if (stat == RDWR_STATUS_FAILURE)
57670ee8 2362 return;
92c2538f
AK		 2363
2364 memory_size = 0;
2365 reg = creg->fw_dump_start;
2366 for (i = 0; i < 4; i++) {
2367 mwifiex_read_reg_byte(adapter, reg, &read_reg);
2368 memory_size |= (read_reg << (i * 8));
2369 reg++;
2370 }
2371
2372 if (memory_size == 0) {
acebe8c1 2373 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
7e174833
AK		 2374 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2375 FW_DUMP_READ_DONE);
2376 if (ret) {
acebe8c1 2377 mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
57670ee8 2378 return;
7e174833 2379 }
92c2538f
AK		 2380 break;
2381 }
2382
acebe8c1
ZL		 2383 mwifiex_dbg(adapter, DUMP,
2384 "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
92c2538f
AK		 2385 entry->mem_ptr = vmalloc(memory_size + 1);
2386 entry->mem_size = memory_size;
2387 if (!entry->mem_ptr) {
acebe8c1
ZL		 2388 mwifiex_dbg(adapter, ERROR,
2389 "Vmalloc %s failed\n", entry->mem_name);
57670ee8 2390 return;
92c2538f
AK		 2391 }
2392 dbg_ptr = entry->mem_ptr;
2393 end_ptr = dbg_ptr + memory_size;
2394
2395 doneflag = entry->done_flag;
acebe8c1
ZL		 2396 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2397 entry->mem_name);
92c2538f
AK		 2398
2399 do {
2400 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2401 if (RDWR_STATUS_FAILURE == stat)
57670ee8 2402 return;
92c2538f
AK		 2403
2404 reg_start = creg->fw_dump_start;
2405 reg_end = creg->fw_dump_end;
2406 for (reg = reg_start; reg <= reg_end; reg++) {
2407 mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
24716876 2408 if (dbg_ptr < end_ptr) {
92c2538f 2409 dbg_ptr++;
24716876 2410 } else {
acebe8c1
ZL		 2411 mwifiex_dbg(adapter, ERROR,
2412 "Allocated buf not enough\n");
57670ee8 2413 return;
24716876 2414 }
92c2538f
AK		 2415 }
2416
2417 if (stat != RDWR_STATUS_DONE)
2418 continue;
2419
acebe8c1
ZL		 2420 mwifiex_dbg(adapter, DUMP,
2421 "%s done: size=0x%tx\n",
2422 entry->mem_name, dbg_ptr - entry->mem_ptr);
92c2538f
AK		 2423 break;
2424 } while (true);
2425 }
57670ee8 2426 mwifiex_dbg(adapter, DUMP, "== mwifiex firmware dump end ==\n");
92c2538f
AK		 2427}
2428
fc697159
AK		 2429static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2430{
2431 mwifiex_drv_info_dump(adapter);
2432 mwifiex_pcie_fw_dump(adapter);
57670ee8 2433 mwifiex_upload_device_dump(adapter);
fc697159
AK		 2434}
2435
2f5872b6
MH		 2436static unsigned long iface_work_flags;
2437static struct mwifiex_adapter *save_adapter;
92c2538f
AK		 2438static void mwifiex_pcie_work(struct work_struct *work)
2439{
fc697159 2440 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2f5872b6 2441 &iface_work_flags))
fc697159 2442 mwifiex_pcie_device_dump_work(save_adapter);
92c2538f
AK		 2443}
2444
2f5872b6 2445static DECLARE_WORK(pcie_work, mwifiex_pcie_work);
92c2538f 2446/* This function dumps FW information */
fc697159 2447static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
92c2538f 2448{
2f5872b6 2449 save_adapter = adapter;
fc697159 2450 if (test_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags))
92c2538f
AK		 2451 return;
2452
fc697159 2453 set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags);
92c2538f 2454
2f5872b6 2455 schedule_work(&pcie_work);
92c2538f
AK		 2456}
2457
d930faee
AK		 2458/*
2459 * This function initializes the PCI-E host memory space, WCB rings, etc.
2460 *
2461 * The following initializations steps are followed -
2462 * - Allocate TXBD ring buffers
2463 * - Allocate RXBD ring buffers
2464 * - Allocate event BD ring buffers
2465 * - Allocate command response ring buffer
2466 * - Allocate sleep cookie buffer
2467 */
2468static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
2469{
2470 struct pcie_service_card *card = adapter->card;
2471 int ret;
2472 struct pci_dev *pdev = card->dev;
52301a81 2473 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK		 2474
2475 pci_set_drvdata(pdev, card);
2476
2477 ret = pci_enable_device(pdev);
2478 if (ret)
2479 goto err_enable_dev;
2480
2481 pci_set_master(pdev);
2482
fdb1e28e 2483 pr_notice("try set_consistent_dma_mask(32)\n");
d930faee
AK		 2484 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2485 if (ret) {
fdb1e28e 2486 pr_err("set_dma_mask(32) failed\n");
d930faee
AK		 2487 goto err_set_dma_mask;
2488 }
2489
2490 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2491 if (ret) {
fdb1e28e 2492 pr_err("set_consistent_dma_mask(64) failed\n");
d930faee
AK		 2493 goto err_set_dma_mask;
2494 }
2495
2496 ret = pci_request_region(pdev, 0, DRV_NAME);
2497 if (ret) {
fdb1e28e 2498 pr_err("req_reg(0) error\n");
d930faee
AK		 2499 goto err_req_region0;
2500 }
2501 card->pci_mmap = pci_iomap(pdev, 0, 0);
2502 if (!card->pci_mmap) {
fdb1e28e 2503 pr_err("iomap(0) error\n");
3220712d 2504 ret = -EIO;
d930faee
AK		 2505 goto err_iomap0;
2506 }
2507 ret = pci_request_region(pdev, 2, DRV_NAME);
2508 if (ret) {
fdb1e28e 2509 pr_err("req_reg(2) error\n");
d930faee
AK		 2510 goto err_req_region2;
2511 }
2512 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2513 if (!card->pci_mmap1) {
fdb1e28e 2514 pr_err("iomap(2) error\n");
3220712d 2515 ret = -EIO;
d930faee
AK		 2516 goto err_iomap2;
2517 }
2518
fdb1e28e
XH		 2519 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2520 card->pci_mmap, card->pci_mmap1);
d930faee
AK		 2521
2522 card->cmdrsp_buf = NULL;
2523 ret = mwifiex_pcie_create_txbd_ring(adapter);
2524 if (ret)
2525 goto err_cre_txbd;
2526 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2527 if (ret)
2528 goto err_cre_rxbd;
2529 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2530 if (ret)
2531 goto err_cre_evtbd;
2532 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2533 if (ret)
2534 goto err_alloc_cmdbuf;
52301a81
AP		 2535 if (reg->sleep_cookie) {
2536 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2537 if (ret)
2538 goto err_alloc_cookie;
2539 } else {
2540 card->sleep_cookie_vbase = NULL;
2541 }
d930faee
AK		 2542 return ret;
2543
2544err_alloc_cookie:
2545 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2546err_alloc_cmdbuf:
2547 mwifiex_pcie_delete_evtbd_ring(adapter);
2548err_cre_evtbd:
2549 mwifiex_pcie_delete_rxbd_ring(adapter);
2550err_cre_rxbd:
2551 mwifiex_pcie_delete_txbd_ring(adapter);
2552err_cre_txbd:
2553 pci_iounmap(pdev, card->pci_mmap1);
2554err_iomap2:
2555 pci_release_region(pdev, 2);
2556err_req_region2:
2557 pci_iounmap(pdev, card->pci_mmap);
2558err_iomap0:
2559 pci_release_region(pdev, 0);
2560err_req_region0:
2561err_set_dma_mask:
2562 pci_disable_device(pdev);
2563err_enable_dev:
2564 pci_set_drvdata(pdev, NULL);
2565 return ret;
2566}
2567
2568/*
2569 * This function cleans up the allocated card buffers.
2570 *
2571 * The following are freed by this function -
2572 * - TXBD ring buffers
2573 * - RXBD ring buffers
2574 * - Event BD ring buffers
2575 * - Command response ring buffer
2576 * - Sleep cookie buffer
2577 */
2578static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
2579{
2580 struct pcie_service_card *card = adapter->card;
2581 struct pci_dev *pdev = card->dev;
dd04e6ac 2582 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 2583
d930faee 2584 if (user_rmmod) {
acebe8c1
ZL		 2585 mwifiex_dbg(adapter, INFO,
2586 "Clearing driver ready signature\n");
dd04e6ac 2587 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
acebe8c1
ZL		 2588 mwifiex_dbg(adapter, ERROR,
2589 "Failed to write driver not-ready signature\n");
d930faee
AK		 2590 }
2591
2592 if (pdev) {
2593 pci_iounmap(pdev, card->pci_mmap);
2594 pci_iounmap(pdev, card->pci_mmap1);
5b0d9b21 2595 pci_disable_device(pdev);
c380aafb
YAP		 2596 pci_release_region(pdev, 2);
2597 pci_release_region(pdev, 0);
d930faee
AK		 2598 pci_set_drvdata(pdev, NULL);
2599 }
3c59e328 2600 kfree(card);
d930faee
AK		 2601}
2602
7be0f5b5
AP		 2603static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter)
2604{
2605 int ret;
2606 struct pcie_service_card *card = adapter->card;
2607 struct pci_dev *pdev = card->dev;
2608
2609 if (pci_enable_msi(pdev) != 0)
2610 pci_disable_msi(pdev);
2611 else
2612 card->msi_enable = 1;
2613
2614 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable);
2615
2616 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
2617 "MRVL_PCIE", pdev);
2618 if (ret) {
2619 pr_err("request_irq failed: ret=%d\n", ret);
2620 adapter->card = NULL;
2621 return -1;
2622 }
2623
2624 return 0;
2625}
2626
d930faee
AK		 2627/*
2628 * This function registers the PCIE device.
2629 *
2630 * PCIE IRQ is claimed, block size is set and driver data is initialized.
2631 */
2632static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2633{
d930faee
AK		 2634 struct pcie_service_card *card = adapter->card;
2635 struct pci_dev *pdev = card->dev;
2636
2637 /* save adapter pointer in card */
2638 card->adapter = adapter;
fdb1e28e 2639 adapter->dev = &pdev->dev;
d930faee 2640
7be0f5b5 2641 if (mwifiex_pcie_request_irq(adapter))
d930faee 2642 return -1;
d930faee 2643
828cf222 2644 adapter->tx_buf_size = card->pcie.tx_buf_size;
92c2538f
AK		 2645 adapter->mem_type_mapping_tbl = mem_type_mapping_tbl;
2646 adapter->num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl);
dd04e6ac 2647 strcpy(adapter->fw_name, card->pcie.firmware);
1fe192d8 2648 adapter->ext_scan = card->pcie.can_ext_scan;
d930faee
AK		 2649
2650 return 0;
2651}
2652
2653/*
2654 * This function unregisters the PCIE device.
2655 *
2656 * The PCIE IRQ is released, the function is disabled and driver
2657 * data is set to null.
2658 */
2659static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2660{
2661 struct pcie_service_card *card = adapter->card;
52301a81 2662 const struct mwifiex_pcie_card_reg *reg;
d930faee
AK		 2663
2664 if (card) {
acebe8c1
ZL		 2665 mwifiex_dbg(adapter, INFO,
2666 "%s(): calling free_irq()\n", __func__);
d930faee 2667 free_irq(card->dev->irq, card->dev);
fc331460 2668
52301a81
AP		 2669 reg = card->pcie.reg;
2670 if (reg->sleep_cookie)
2671 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2672
fc331460
AP		 2673 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2674 mwifiex_pcie_delete_evtbd_ring(adapter);
2675 mwifiex_pcie_delete_rxbd_ring(adapter);
2676 mwifiex_pcie_delete_txbd_ring(adapter);
2677 card->cmdrsp_buf = NULL;
d930faee
AK		 2678 }
2679}
2680
2681static struct mwifiex_if_ops pcie_ops = {
2682 .init_if = mwifiex_pcie_init,
2683 .cleanup_if = mwifiex_pcie_cleanup,
2684 .check_fw_status = mwifiex_check_fw_status,
2fd5c6ed 2685 .check_winner_status = mwifiex_check_winner_status,
d930faee
AK		 2686 .prog_fw = mwifiex_prog_fw_w_helper,
2687 .register_dev = mwifiex_register_dev,
2688 .unregister_dev = mwifiex_unregister_dev,
2689 .enable_int = mwifiex_pcie_enable_host_int,
2690 .process_int_status = mwifiex_process_int_status,
2691 .host_to_card = mwifiex_pcie_host_to_card,
2692 .wakeup = mwifiex_pm_wakeup_card,
2693 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
2694
2695 /* PCIE specific */
2696 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
2697 .event_complete = mwifiex_pcie_event_complete,
2698 .update_mp_end_port = NULL,
2699 .cleanup_mpa_buf = NULL,
c6d1d87a 2700 .init_fw_port = mwifiex_pcie_init_fw_port,
fbd7e7ac 2701 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
fc697159 2702 .device_dump = mwifiex_pcie_device_dump,
d930faee
AK		 2703};
2704
2705/*
2706 * This function initializes the PCIE driver module.
2707 *
2708 * This initiates the semaphore and registers the device with
2709 * PCIE bus.
2710 */
2711static int mwifiex_pcie_init_module(void)
2712{
2713 int ret;
2714
ca8f2112 2715 pr_debug("Marvell PCIe Driver\n");
d930faee
AK		 2716
2717 sema_init(&add_remove_card_sem, 1);
2718
2719 /* Clear the flag in case user removes the card. */
2720 user_rmmod = 0;
2721
2722 ret = pci_register_driver(&mwifiex_pcie);
2723 if (ret)
2724 pr_err("Driver register failed!\n");
2725 else
2726 pr_debug("info: Driver registered successfully!\n");
2727
2728 return ret;
2729}
2730
2731/*
2732 * This function cleans up the PCIE driver.
2733 *
2734 * The following major steps are followed for cleanup -
2735 * - Resume the device if its suspended
2736 * - Disconnect the device if connected
2737 * - Shutdown the firmware
2738 * - Unregister the device from PCIE bus.
2739 */
2740static void mwifiex_pcie_cleanup_module(void)
2741{
2742 if (!down_interruptible(&add_remove_card_sem))
2743 up(&add_remove_card_sem);
2744
2745 /* Set the flag as user is removing this module. */
2746 user_rmmod = 1;
2747
2f5872b6 2748 cancel_work_sync(&pcie_work);
d930faee
AK		 2749 pci_unregister_driver(&mwifiex_pcie);
2750}
2751
2752module_init(mwifiex_pcie_init_module);
2753module_exit(mwifiex_pcie_cleanup_module);
2754
2755MODULE_AUTHOR("Marvell International Ltd.");
2756MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
2757MODULE_VERSION(PCIE_VERSION);
2758MODULE_LICENSE("GPL v2");
ca8f2112
AP		 2759MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME);
2760MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME);
6d85ef00 2761MODULE_FIRMWARE(PCIE8997_DEFAULT_FW_NAME);
Linux kernel - Deliverables
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