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5e6e3a92 BZ |
1 | /* |
2 | * Marvell Wireless LAN device driver: 802.11n | |
3 | * | |
4 | * Copyright (C) 2011, Marvell International Ltd. | |
5 | * | |
6 | * This software file (the "File") is distributed by Marvell International | |
7 | * Ltd. under the terms of the GNU General Public License Version 2, June 1991 | |
8 | * (the "License"). You may use, redistribute and/or modify this File in | |
9 | * accordance with the terms and conditions of the License, a copy of which | |
10 | * is available by writing to the Free Software Foundation, Inc., | |
11 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the | |
12 | * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. | |
13 | * | |
14 | * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE | |
15 | * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE | |
16 | * ARE EXPRESSLY DISCLAIMED. The License provides additional details about | |
17 | * this warranty disclaimer. | |
18 | */ | |
19 | ||
20 | #include "decl.h" | |
21 | #include "ioctl.h" | |
22 | #include "util.h" | |
23 | #include "fw.h" | |
24 | #include "main.h" | |
25 | #include "wmm.h" | |
26 | #include "11n.h" | |
27 | ||
28 | /* | |
29 | * Fills HT capability information field, AMPDU Parameters field, HT extended | |
30 | * capability field, and supported MCS set fields. | |
31 | * | |
a46b7b5c AK |
32 | * HT capability information field, AMPDU Parameters field, supported MCS set |
33 | * fields are retrieved from cfg80211 stack | |
5e6e3a92 | 34 | * |
a46b7b5c | 35 | * RD responder bit to set to clear in the extended capability header. |
5e6e3a92 BZ |
36 | */ |
37 | void | |
a46b7b5c | 38 | mwifiex_fill_cap_info(struct mwifiex_private *priv, u8 radio_type, |
5e6e3a92 BZ |
39 | struct mwifiex_ie_types_htcap *ht_cap) |
40 | { | |
5e6e3a92 | 41 | uint16_t ht_ext_cap = le16_to_cpu(ht_cap->ht_cap.extended_ht_cap_info); |
a46b7b5c AK |
42 | struct ieee80211_supported_band *sband = |
43 | priv->wdev->wiphy->bands[radio_type]; | |
5e6e3a92 | 44 | |
a46b7b5c AK |
45 | ht_cap->ht_cap.ampdu_params_info = |
46 | (sband->ht_cap.ampdu_factor & | |
84266841 | 47 | IEEE80211_HT_AMPDU_PARM_FACTOR) | |
a46b7b5c AK |
48 | ((sband->ht_cap.ampdu_density << |
49 | IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT) & | |
50 | IEEE80211_HT_AMPDU_PARM_DENSITY); | |
5e6e3a92 | 51 | |
a46b7b5c | 52 | memcpy((u8 *) &ht_cap->ht_cap.mcs, &sband->ht_cap.mcs, |
84266841 | 53 | sizeof(sband->ht_cap.mcs)); |
5e6e3a92 | 54 | |
eecd8250 | 55 | if (priv->bss_mode == NL80211_IFTYPE_STATION || |
84266841 | 56 | sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40) |
5e6e3a92 BZ |
57 | /* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */ |
58 | SETHT_MCS32(ht_cap->ht_cap.mcs.rx_mask); | |
59 | ||
60 | /* Clear RD responder bit */ | |
a3731658 | 61 | ht_ext_cap &= ~IEEE80211_HT_EXT_CAP_RD_RESPONDER; |
5e6e3a92 | 62 | |
a46b7b5c | 63 | ht_cap->ht_cap.cap_info = cpu_to_le16(sband->ht_cap.cap); |
5e6e3a92 BZ |
64 | ht_cap->ht_cap.extended_ht_cap_info = cpu_to_le16(ht_ext_cap); |
65 | } | |
66 | ||
5e6e3a92 BZ |
67 | /* |
68 | * This function returns the pointer to an entry in BA Stream | |
69 | * table which matches the requested BA status. | |
70 | */ | |
71 | static struct mwifiex_tx_ba_stream_tbl * | |
3e822635 YAP |
72 | mwifiex_get_ba_status(struct mwifiex_private *priv, |
73 | enum mwifiex_ba_status ba_status) | |
5e6e3a92 BZ |
74 | { |
75 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; | |
76 | unsigned long flags; | |
77 | ||
78 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
79 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { | |
80 | if (tx_ba_tsr_tbl->ba_status == ba_status) { | |
81 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, | |
82 | flags); | |
83 | return tx_ba_tsr_tbl; | |
84 | } | |
85 | } | |
86 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
87 | return NULL; | |
88 | } | |
89 | ||
90 | /* | |
91 | * This function handles the command response of delete a block | |
92 | * ack request. | |
93 | * | |
94 | * The function checks the response success status and takes action | |
95 | * accordingly (send an add BA request in case of success, or recreate | |
96 | * the deleted stream in case of failure, if the add BA was also | |
97 | * initiated by us). | |
98 | */ | |
99 | int mwifiex_ret_11n_delba(struct mwifiex_private *priv, | |
100 | struct host_cmd_ds_command *resp) | |
101 | { | |
102 | int tid; | |
103 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl; | |
2c208890 | 104 | struct host_cmd_ds_11n_delba *del_ba = &resp->params.del_ba; |
5e6e3a92 BZ |
105 | uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set); |
106 | ||
107 | tid = del_ba_param_set >> DELBA_TID_POS; | |
108 | if (del_ba->del_result == BA_RESULT_SUCCESS) { | |
3e822635 YAP |
109 | mwifiex_del_ba_tbl(priv, tid, del_ba->peer_mac_addr, |
110 | TYPE_DELBA_SENT, | |
111 | INITIATOR_BIT(del_ba_param_set)); | |
5e6e3a92 | 112 | |
3e822635 | 113 | tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS); |
5e6e3a92 BZ |
114 | if (tx_ba_tbl) |
115 | mwifiex_send_addba(priv, tx_ba_tbl->tid, | |
116 | tx_ba_tbl->ra); | |
117 | } else { /* | |
118 | * In case of failure, recreate the deleted stream in case | |
119 | * we initiated the ADDBA | |
120 | */ | |
3e822635 YAP |
121 | if (!INITIATOR_BIT(del_ba_param_set)) |
122 | return 0; | |
123 | ||
124 | mwifiex_create_ba_tbl(priv, del_ba->peer_mac_addr, tid, | |
125 | BA_SETUP_INPROGRESS); | |
126 | ||
127 | tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS); | |
128 | ||
129 | if (tx_ba_tbl) | |
130 | mwifiex_del_ba_tbl(priv, tx_ba_tbl->tid, tx_ba_tbl->ra, | |
131 | TYPE_DELBA_SENT, true); | |
5e6e3a92 BZ |
132 | } |
133 | ||
134 | return 0; | |
135 | } | |
136 | ||
137 | /* | |
138 | * This function handles the command response of add a block | |
139 | * ack request. | |
140 | * | |
141 | * Handling includes changing the header fields to CPU formats, checking | |
142 | * the response success status and taking actions accordingly (delete the | |
143 | * BA stream table in case of failure). | |
144 | */ | |
145 | int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv, | |
146 | struct host_cmd_ds_command *resp) | |
147 | { | |
148 | int tid; | |
2c208890 | 149 | struct host_cmd_ds_11n_addba_rsp *add_ba_rsp = &resp->params.add_ba_rsp; |
5e6e3a92 BZ |
150 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl; |
151 | ||
152 | add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn)) | |
153 | & SSN_MASK); | |
154 | ||
155 | tid = (le16_to_cpu(add_ba_rsp->block_ack_param_set) | |
156 | & IEEE80211_ADDBA_PARAM_TID_MASK) | |
157 | >> BLOCKACKPARAM_TID_POS; | |
158 | if (le16_to_cpu(add_ba_rsp->status_code) == BA_RESULT_SUCCESS) { | |
3e822635 | 159 | tx_ba_tbl = mwifiex_get_ba_tbl(priv, tid, |
5e6e3a92 BZ |
160 | add_ba_rsp->peer_mac_addr); |
161 | if (tx_ba_tbl) { | |
162 | dev_dbg(priv->adapter->dev, "info: BA stream complete\n"); | |
3e822635 | 163 | tx_ba_tbl->ba_status = BA_SETUP_COMPLETE; |
5e6e3a92 BZ |
164 | } else { |
165 | dev_err(priv->adapter->dev, "BA stream not created\n"); | |
166 | } | |
167 | } else { | |
3e822635 YAP |
168 | mwifiex_del_ba_tbl(priv, tid, add_ba_rsp->peer_mac_addr, |
169 | TYPE_DELBA_SENT, true); | |
5e6e3a92 BZ |
170 | if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT) |
171 | priv->aggr_prio_tbl[tid].ampdu_ap = | |
172 | BA_STREAM_NOT_ALLOWED; | |
173 | } | |
174 | ||
175 | return 0; | |
176 | } | |
177 | ||
5e6e3a92 BZ |
178 | /* |
179 | * This function prepares command of reconfigure Tx buffer. | |
180 | * | |
181 | * Preparation includes - | |
182 | * - Setting command ID, action and proper size | |
183 | * - Setting Tx buffer size (for SET only) | |
184 | * - Ensuring correct endian-ness | |
185 | */ | |
186 | int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv, | |
187 | struct host_cmd_ds_command *cmd, int cmd_action, | |
a5ffddb7 | 188 | u16 *buf_size) |
5e6e3a92 BZ |
189 | { |
190 | struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf; | |
191 | u16 action = (u16) cmd_action; | |
5e6e3a92 BZ |
192 | |
193 | cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF); | |
194 | cmd->size = | |
195 | cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN); | |
196 | tx_buf->action = cpu_to_le16(action); | |
197 | switch (action) { | |
198 | case HostCmd_ACT_GEN_SET: | |
a5ffddb7 AK |
199 | dev_dbg(priv->adapter->dev, "cmd: set tx_buf=%d\n", *buf_size); |
200 | tx_buf->buff_size = cpu_to_le16(*buf_size); | |
5e6e3a92 BZ |
201 | break; |
202 | case HostCmd_ACT_GEN_GET: | |
203 | default: | |
204 | tx_buf->buff_size = 0; | |
205 | break; | |
206 | } | |
207 | return 0; | |
208 | } | |
209 | ||
210 | /* | |
211 | * This function prepares command of AMSDU aggregation control. | |
212 | * | |
213 | * Preparation includes - | |
214 | * - Setting command ID, action and proper size | |
215 | * - Setting AMSDU control parameters (for SET only) | |
216 | * - Ensuring correct endian-ness | |
217 | */ | |
572e8f3e | 218 | int mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command *cmd, |
a5ffddb7 AK |
219 | int cmd_action, |
220 | struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl) | |
5e6e3a92 BZ |
221 | { |
222 | struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl = | |
223 | &cmd->params.amsdu_aggr_ctrl; | |
224 | u16 action = (u16) cmd_action; | |
5e6e3a92 BZ |
225 | |
226 | cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL); | |
227 | cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl) | |
228 | + S_DS_GEN); | |
229 | amsdu_ctrl->action = cpu_to_le16(action); | |
230 | switch (action) { | |
231 | case HostCmd_ACT_GEN_SET: | |
232 | amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable); | |
233 | amsdu_ctrl->curr_buf_size = 0; | |
234 | break; | |
235 | case HostCmd_ACT_GEN_GET: | |
236 | default: | |
237 | amsdu_ctrl->curr_buf_size = 0; | |
238 | break; | |
239 | } | |
240 | return 0; | |
241 | } | |
242 | ||
5e6e3a92 BZ |
243 | /* |
244 | * This function prepares 11n configuration command. | |
245 | * | |
246 | * Preparation includes - | |
247 | * - Setting command ID, action and proper size | |
248 | * - Setting HT Tx capability and HT Tx information fields | |
249 | * - Ensuring correct endian-ness | |
250 | */ | |
a5ffddb7 AK |
251 | int mwifiex_cmd_11n_cfg(struct host_cmd_ds_command *cmd, u16 cmd_action, |
252 | struct mwifiex_ds_11n_tx_cfg *txcfg) | |
5e6e3a92 BZ |
253 | { |
254 | struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg; | |
5e6e3a92 BZ |
255 | |
256 | cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG); | |
257 | cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN); | |
258 | htcfg->action = cpu_to_le16(cmd_action); | |
259 | htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap); | |
260 | htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo); | |
261 | return 0; | |
262 | } | |
263 | ||
264 | /* | |
265 | * This function appends an 11n TLV to a buffer. | |
266 | * | |
267 | * Buffer allocation is responsibility of the calling | |
268 | * function. No size validation is made here. | |
269 | * | |
270 | * The function fills up the following sections, if applicable - | |
271 | * - HT capability IE | |
272 | * - HT information IE (with channel list) | |
273 | * - 20/40 BSS Coexistence IE | |
274 | * - HT Extended Capabilities IE | |
275 | */ | |
276 | int | |
277 | mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv, | |
278 | struct mwifiex_bssdescriptor *bss_desc, | |
279 | u8 **buffer) | |
280 | { | |
281 | struct mwifiex_ie_types_htcap *ht_cap; | |
282 | struct mwifiex_ie_types_htinfo *ht_info; | |
283 | struct mwifiex_ie_types_chan_list_param_set *chan_list; | |
284 | struct mwifiex_ie_types_2040bssco *bss_co_2040; | |
285 | struct mwifiex_ie_types_extcap *ext_cap; | |
286 | int ret_len = 0; | |
a46b7b5c AK |
287 | struct ieee80211_supported_band *sband; |
288 | u8 radio_type; | |
5e6e3a92 BZ |
289 | |
290 | if (!buffer || !*buffer) | |
291 | return ret_len; | |
292 | ||
a46b7b5c AK |
293 | radio_type = mwifiex_band_to_radio_type((u8) bss_desc->bss_band); |
294 | sband = priv->wdev->wiphy->bands[radio_type]; | |
295 | ||
5e6e3a92 BZ |
296 | if (bss_desc->bcn_ht_cap) { |
297 | ht_cap = (struct mwifiex_ie_types_htcap *) *buffer; | |
298 | memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap)); | |
299 | ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY); | |
300 | ht_cap->header.len = | |
301 | cpu_to_le16(sizeof(struct ieee80211_ht_cap)); | |
302 | memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header), | |
303 | (u8 *) bss_desc->bcn_ht_cap + | |
304 | sizeof(struct ieee_types_header), | |
305 | le16_to_cpu(ht_cap->header.len)); | |
306 | ||
a46b7b5c | 307 | mwifiex_fill_cap_info(priv, radio_type, ht_cap); |
5e6e3a92 BZ |
308 | |
309 | *buffer += sizeof(struct mwifiex_ie_types_htcap); | |
310 | ret_len += sizeof(struct mwifiex_ie_types_htcap); | |
311 | } | |
312 | ||
074d46d1 | 313 | if (bss_desc->bcn_ht_oper) { |
eecd8250 | 314 | if (priv->bss_mode == NL80211_IFTYPE_ADHOC) { |
5e6e3a92 BZ |
315 | ht_info = (struct mwifiex_ie_types_htinfo *) *buffer; |
316 | memset(ht_info, 0, | |
317 | sizeof(struct mwifiex_ie_types_htinfo)); | |
318 | ht_info->header.type = | |
074d46d1 | 319 | cpu_to_le16(WLAN_EID_HT_OPERATION); |
5e6e3a92 | 320 | ht_info->header.len = |
074d46d1 JB |
321 | cpu_to_le16( |
322 | sizeof(struct ieee80211_ht_operation)); | |
5e6e3a92 BZ |
323 | |
324 | memcpy((u8 *) ht_info + | |
325 | sizeof(struct mwifiex_ie_types_header), | |
074d46d1 | 326 | (u8 *) bss_desc->bcn_ht_oper + |
5e6e3a92 BZ |
327 | sizeof(struct ieee_types_header), |
328 | le16_to_cpu(ht_info->header.len)); | |
329 | ||
a46b7b5c AK |
330 | if (!(sband->ht_cap.cap & |
331 | IEEE80211_HT_CAP_SUP_WIDTH_20_40)) | |
074d46d1 | 332 | ht_info->ht_oper.ht_param &= |
6d2bd916 MY |
333 | ~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY | |
334 | IEEE80211_HT_PARAM_CHA_SEC_OFFSET); | |
5e6e3a92 BZ |
335 | |
336 | *buffer += sizeof(struct mwifiex_ie_types_htinfo); | |
337 | ret_len += sizeof(struct mwifiex_ie_types_htinfo); | |
338 | } | |
339 | ||
340 | chan_list = | |
341 | (struct mwifiex_ie_types_chan_list_param_set *) *buffer; | |
342 | memset(chan_list, 0, | |
343 | sizeof(struct mwifiex_ie_types_chan_list_param_set)); | |
344 | chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST); | |
345 | chan_list->header.len = cpu_to_le16( | |
346 | sizeof(struct mwifiex_ie_types_chan_list_param_set) - | |
347 | sizeof(struct mwifiex_ie_types_header)); | |
348 | chan_list->chan_scan_param[0].chan_number = | |
074d46d1 | 349 | bss_desc->bcn_ht_oper->primary_chan; |
5e6e3a92 BZ |
350 | chan_list->chan_scan_param[0].radio_type = |
351 | mwifiex_band_to_radio_type((u8) bss_desc->bss_band); | |
352 | ||
84266841 | 353 | if (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 && |
074d46d1 | 354 | bss_desc->bcn_ht_oper->ht_param & |
84266841 | 355 | IEEE80211_HT_PARAM_CHAN_WIDTH_ANY) |
5e6e3a92 BZ |
356 | SET_SECONDARYCHAN(chan_list->chan_scan_param[0]. |
357 | radio_type, | |
074d46d1 | 358 | (bss_desc->bcn_ht_oper->ht_param & |
6d2bd916 | 359 | IEEE80211_HT_PARAM_CHA_SEC_OFFSET)); |
5e6e3a92 BZ |
360 | |
361 | *buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set); | |
362 | ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set); | |
363 | } | |
364 | ||
365 | if (bss_desc->bcn_bss_co_2040) { | |
366 | bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer; | |
367 | memset(bss_co_2040, 0, | |
368 | sizeof(struct mwifiex_ie_types_2040bssco)); | |
369 | bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040); | |
370 | bss_co_2040->header.len = | |
371 | cpu_to_le16(sizeof(bss_co_2040->bss_co_2040)); | |
372 | ||
373 | memcpy((u8 *) bss_co_2040 + | |
374 | sizeof(struct mwifiex_ie_types_header), | |
2c208890 | 375 | bss_desc->bcn_bss_co_2040 + |
5e6e3a92 BZ |
376 | sizeof(struct ieee_types_header), |
377 | le16_to_cpu(bss_co_2040->header.len)); | |
378 | ||
379 | *buffer += sizeof(struct mwifiex_ie_types_2040bssco); | |
380 | ret_len += sizeof(struct mwifiex_ie_types_2040bssco); | |
381 | } | |
382 | ||
383 | if (bss_desc->bcn_ext_cap) { | |
384 | ext_cap = (struct mwifiex_ie_types_extcap *) *buffer; | |
385 | memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap)); | |
386 | ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY); | |
387 | ext_cap->header.len = cpu_to_le16(sizeof(ext_cap->ext_cap)); | |
388 | ||
2c208890 JP |
389 | memcpy((u8 *)ext_cap + sizeof(struct mwifiex_ie_types_header), |
390 | bss_desc->bcn_ext_cap + sizeof(struct ieee_types_header), | |
5e6e3a92 BZ |
391 | le16_to_cpu(ext_cap->header.len)); |
392 | ||
393 | *buffer += sizeof(struct mwifiex_ie_types_extcap); | |
394 | ret_len += sizeof(struct mwifiex_ie_types_extcap); | |
395 | } | |
396 | ||
397 | return ret_len; | |
398 | } | |
399 | ||
400 | /* | |
401 | * This function reconfigures the Tx buffer size in firmware. | |
402 | * | |
403 | * This function prepares a firmware command and issues it, if | |
404 | * the current Tx buffer size is different from the one requested. | |
405 | * Maximum configurable Tx buffer size is limited by the HT capability | |
406 | * field value. | |
407 | */ | |
408 | void | |
409 | mwifiex_cfg_tx_buf(struct mwifiex_private *priv, | |
410 | struct mwifiex_bssdescriptor *bss_desc) | |
411 | { | |
412 | u16 max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_2K; | |
270e58e8 | 413 | u16 tx_buf, curr_tx_buf_size = 0; |
5e6e3a92 BZ |
414 | |
415 | if (bss_desc->bcn_ht_cap) { | |
6d2bd916 MY |
416 | if (le16_to_cpu(bss_desc->bcn_ht_cap->cap_info) & |
417 | IEEE80211_HT_CAP_MAX_AMSDU) | |
5e6e3a92 BZ |
418 | max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_8K; |
419 | else | |
420 | max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_4K; | |
421 | } | |
422 | ||
423 | tx_buf = min(priv->adapter->max_tx_buf_size, max_amsdu); | |
424 | ||
425 | dev_dbg(priv->adapter->dev, "info: max_amsdu=%d, max_tx_buf=%d\n", | |
84266841 | 426 | max_amsdu, priv->adapter->max_tx_buf_size); |
5e6e3a92 BZ |
427 | |
428 | if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_2K) | |
429 | curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K; | |
430 | else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_4K) | |
431 | curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K; | |
432 | else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_8K) | |
433 | curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_8K; | |
434 | if (curr_tx_buf_size != tx_buf) | |
600f5d90 AK |
435 | mwifiex_send_cmd_async(priv, HostCmd_CMD_RECONFIGURE_TX_BUFF, |
436 | HostCmd_ACT_GEN_SET, 0, &tx_buf); | |
5e6e3a92 BZ |
437 | } |
438 | ||
439 | /* | |
440 | * This function checks if the given pointer is valid entry of | |
441 | * Tx BA Stream table. | |
442 | */ | |
443 | static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv, | |
444 | struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr) | |
445 | { | |
446 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; | |
447 | ||
448 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { | |
449 | if (tx_ba_tsr_tbl == tx_tbl_ptr) | |
450 | return true; | |
451 | } | |
452 | ||
453 | return false; | |
454 | } | |
455 | ||
456 | /* | |
457 | * This function deletes the given entry in Tx BA Stream table. | |
458 | * | |
459 | * The function also performs a validity check on the supplied | |
460 | * pointer before trying to delete. | |
461 | */ | |
462 | void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv, | |
463 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl) | |
464 | { | |
465 | if (!tx_ba_tsr_tbl && | |
84266841 | 466 | mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl)) |
5e6e3a92 BZ |
467 | return; |
468 | ||
469 | dev_dbg(priv->adapter->dev, "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl); | |
470 | ||
471 | list_del(&tx_ba_tsr_tbl->list); | |
472 | ||
473 | kfree(tx_ba_tsr_tbl); | |
5e6e3a92 BZ |
474 | } |
475 | ||
476 | /* | |
477 | * This function deletes all the entries in Tx BA Stream table. | |
478 | */ | |
479 | void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv) | |
480 | { | |
481 | int i; | |
482 | struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node; | |
483 | unsigned long flags; | |
484 | ||
485 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
486 | list_for_each_entry_safe(del_tbl_ptr, tmp_node, | |
487 | &priv->tx_ba_stream_tbl_ptr, list) | |
488 | mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr); | |
489 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
490 | ||
491 | INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr); | |
492 | ||
493 | for (i = 0; i < MAX_NUM_TID; ++i) | |
494 | priv->aggr_prio_tbl[i].ampdu_ap = | |
495 | priv->aggr_prio_tbl[i].ampdu_user; | |
496 | } | |
497 | ||
498 | /* | |
499 | * This function returns the pointer to an entry in BA Stream | |
500 | * table which matches the given RA/TID pair. | |
501 | */ | |
502 | struct mwifiex_tx_ba_stream_tbl * | |
3e822635 | 503 | mwifiex_get_ba_tbl(struct mwifiex_private *priv, int tid, u8 *ra) |
5e6e3a92 BZ |
504 | { |
505 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; | |
506 | unsigned long flags; | |
507 | ||
508 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
509 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { | |
84266841 YAP |
510 | if (!memcmp(tx_ba_tsr_tbl->ra, ra, ETH_ALEN) && |
511 | tx_ba_tsr_tbl->tid == tid) { | |
5e6e3a92 BZ |
512 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, |
513 | flags); | |
514 | return tx_ba_tsr_tbl; | |
515 | } | |
516 | } | |
517 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
518 | return NULL; | |
519 | } | |
520 | ||
521 | /* | |
522 | * This function creates an entry in Tx BA stream table for the | |
523 | * given RA/TID pair. | |
524 | */ | |
3e822635 YAP |
525 | void mwifiex_create_ba_tbl(struct mwifiex_private *priv, u8 *ra, int tid, |
526 | enum mwifiex_ba_status ba_status) | |
5e6e3a92 BZ |
527 | { |
528 | struct mwifiex_tx_ba_stream_tbl *new_node; | |
529 | unsigned long flags; | |
530 | ||
3e822635 | 531 | if (!mwifiex_get_ba_tbl(priv, tid, ra)) { |
5e6e3a92 BZ |
532 | new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl), |
533 | GFP_ATOMIC); | |
534 | if (!new_node) { | |
535 | dev_err(priv->adapter->dev, | |
536 | "%s: failed to alloc new_node\n", __func__); | |
537 | return; | |
538 | } | |
539 | ||
540 | INIT_LIST_HEAD(&new_node->list); | |
541 | ||
542 | new_node->tid = tid; | |
543 | new_node->ba_status = ba_status; | |
544 | memcpy(new_node->ra, ra, ETH_ALEN); | |
545 | ||
546 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
547 | list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr); | |
548 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
549 | } | |
5e6e3a92 BZ |
550 | } |
551 | ||
552 | /* | |
553 | * This function sends an add BA request to the given TID/RA pair. | |
554 | */ | |
555 | int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac) | |
556 | { | |
557 | struct host_cmd_ds_11n_addba_req add_ba_req; | |
558 | static u8 dialog_tok; | |
559 | int ret; | |
560 | ||
561 | dev_dbg(priv->adapter->dev, "cmd: %s: tid %d\n", __func__, tid); | |
562 | ||
563 | add_ba_req.block_ack_param_set = cpu_to_le16( | |
564 | (u16) ((tid << BLOCKACKPARAM_TID_POS) | | |
565 | (priv->add_ba_param. | |
566 | tx_win_size << BLOCKACKPARAM_WINSIZE_POS) | | |
567 | IMMEDIATE_BLOCK_ACK)); | |
568 | add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout); | |
569 | ||
570 | ++dialog_tok; | |
571 | ||
572 | if (dialog_tok == 0) | |
573 | dialog_tok = 1; | |
574 | ||
575 | add_ba_req.dialog_token = dialog_tok; | |
576 | memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN); | |
577 | ||
578 | /* We don't wait for the response of this command */ | |
600f5d90 AK |
579 | ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_ADDBA_REQ, |
580 | 0, 0, &add_ba_req); | |
5e6e3a92 BZ |
581 | |
582 | return ret; | |
583 | } | |
584 | ||
585 | /* | |
586 | * This function sends a delete BA request to the given TID/RA pair. | |
587 | */ | |
588 | int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac, | |
589 | int initiator) | |
590 | { | |
591 | struct host_cmd_ds_11n_delba delba; | |
592 | int ret; | |
593 | uint16_t del_ba_param_set; | |
594 | ||
595 | memset(&delba, 0, sizeof(delba)); | |
596 | delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS); | |
597 | ||
598 | del_ba_param_set = le16_to_cpu(delba.del_ba_param_set); | |
599 | if (initiator) | |
600 | del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK; | |
601 | else | |
602 | del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK; | |
603 | ||
604 | memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN); | |
605 | ||
606 | /* We don't wait for the response of this command */ | |
600f5d90 AK |
607 | ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_DELBA, |
608 | HostCmd_ACT_GEN_SET, 0, &delba); | |
5e6e3a92 BZ |
609 | |
610 | return ret; | |
611 | } | |
612 | ||
613 | /* | |
614 | * This function handles the command response of a delete BA request. | |
615 | */ | |
616 | void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba) | |
617 | { | |
618 | struct host_cmd_ds_11n_delba *cmd_del_ba = | |
619 | (struct host_cmd_ds_11n_delba *) del_ba; | |
620 | uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set); | |
621 | int tid; | |
622 | ||
623 | tid = del_ba_param_set >> DELBA_TID_POS; | |
624 | ||
3e822635 YAP |
625 | mwifiex_del_ba_tbl(priv, tid, cmd_del_ba->peer_mac_addr, |
626 | TYPE_DELBA_RECEIVE, INITIATOR_BIT(del_ba_param_set)); | |
5e6e3a92 BZ |
627 | } |
628 | ||
629 | /* | |
630 | * This function retrieves the Rx reordering table. | |
631 | */ | |
632 | int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv, | |
633 | struct mwifiex_ds_rx_reorder_tbl *buf) | |
634 | { | |
635 | int i; | |
636 | struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf; | |
637 | struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr; | |
638 | int count = 0; | |
639 | unsigned long flags; | |
640 | ||
641 | spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags); | |
642 | list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr, | |
643 | list) { | |
644 | rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid; | |
645 | memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN); | |
646 | rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win; | |
647 | rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size; | |
648 | for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) { | |
649 | if (rx_reorder_tbl_ptr->rx_reorder_ptr[i]) | |
650 | rx_reo_tbl->buffer[i] = true; | |
651 | else | |
652 | rx_reo_tbl->buffer[i] = false; | |
653 | } | |
654 | rx_reo_tbl++; | |
655 | count++; | |
656 | ||
657 | if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED) | |
658 | break; | |
659 | } | |
660 | spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags); | |
661 | ||
662 | return count; | |
663 | } | |
664 | ||
665 | /* | |
666 | * This function retrieves the Tx BA stream table. | |
667 | */ | |
668 | int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv, | |
669 | struct mwifiex_ds_tx_ba_stream_tbl *buf) | |
670 | { | |
671 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; | |
672 | struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf; | |
673 | int count = 0; | |
674 | unsigned long flags; | |
675 | ||
676 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
677 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { | |
678 | rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid; | |
679 | dev_dbg(priv->adapter->dev, "data: %s tid=%d\n", | |
84266841 | 680 | __func__, rx_reo_tbl->tid); |
5e6e3a92 BZ |
681 | memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN); |
682 | rx_reo_tbl++; | |
683 | count++; | |
684 | if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED) | |
685 | break; | |
686 | } | |
687 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
688 | ||
689 | return count; | |
690 | } | |
3e238a11 AP |
691 | |
692 | /* | |
693 | * This function retrieves the entry for specific tx BA stream table by RA and | |
694 | * deletes it. | |
695 | */ | |
696 | void mwifiex_del_tx_ba_stream_tbl_by_ra(struct mwifiex_private *priv, u8 *ra) | |
697 | { | |
698 | struct mwifiex_tx_ba_stream_tbl *tbl, *tmp; | |
699 | unsigned long flags; | |
700 | ||
701 | if (!ra) | |
702 | return; | |
703 | ||
704 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
705 | list_for_each_entry_safe(tbl, tmp, &priv->tx_ba_stream_tbl_ptr, list) { | |
706 | if (!memcmp(tbl->ra, ra, ETH_ALEN)) { | |
707 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, | |
708 | flags); | |
709 | mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, tbl); | |
710 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
711 | } | |
712 | } | |
713 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
714 | ||
715 | return; | |
716 | } |