Commit | Line | Data |
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d930faee AK |
1 | /* |
2 | * Marvell Wireless LAN device driver: PCIE specific handling | |
3 | * | |
4 | * Copyright (C) 2011, Marvell International Ltd. | |
5 | * | |
6 | * This software file (the "File") is distributed by Marvell International | |
7 | * Ltd. under the terms of the GNU General Public License Version 2, June 1991 | |
8 | * (the "License"). You may use, redistribute and/or modify this File in | |
9 | * accordance with the terms and conditions of the License, a copy of which | |
10 | * is available by writing to the Free Software Foundation, Inc., | |
11 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the | |
12 | * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. | |
13 | * | |
14 | * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE | |
15 | * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE | |
16 | * ARE EXPRESSLY DISCLAIMED. The License provides additional details about | |
17 | * this warranty disclaimer. | |
18 | */ | |
19 | ||
20 | #include <linux/firmware.h> | |
21 | ||
22 | #include "decl.h" | |
23 | #include "ioctl.h" | |
24 | #include "util.h" | |
25 | #include "fw.h" | |
26 | #include "main.h" | |
27 | #include "wmm.h" | |
28 | #include "11n.h" | |
29 | #include "pcie.h" | |
30 | ||
31 | #define PCIE_VERSION "1.0" | |
32 | #define DRV_NAME "Marvell mwifiex PCIe" | |
33 | ||
34 | static u8 user_rmmod; | |
35 | ||
36 | static struct mwifiex_if_ops pcie_ops; | |
37 | ||
38 | static struct semaphore add_remove_card_sem; | |
39 | static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter); | |
40 | static int mwifiex_pcie_resume(struct pci_dev *pdev); | |
41 | ||
42 | /* | |
43 | * This function is called after skb allocation to update | |
44 | * "skb->cb" with physical address of data pointer. | |
45 | */ | |
46 | static phys_addr_t *mwifiex_update_sk_buff_pa(struct sk_buff *skb) | |
47 | { | |
48 | phys_addr_t *buf_pa = MWIFIEX_SKB_PACB(skb); | |
49 | ||
50 | *buf_pa = (phys_addr_t)virt_to_phys(skb->data); | |
51 | ||
52 | return buf_pa; | |
53 | } | |
54 | ||
55 | /* | |
56 | * This function reads sleep cookie and checks if FW is ready | |
57 | */ | |
58 | static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) | |
59 | { | |
60 | u32 *cookie_addr; | |
61 | struct pcie_service_card *card = adapter->card; | |
62 | ||
63 | if (card->sleep_cookie) { | |
64 | cookie_addr = (u32 *)card->sleep_cookie->data; | |
65 | dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n", | |
66 | *cookie_addr); | |
67 | if (*cookie_addr == FW_AWAKE_COOKIE) | |
68 | return true; | |
69 | } | |
70 | ||
71 | return false; | |
72 | } | |
73 | ||
74 | /* | |
75 | * This function probes an mwifiex device and registers it. It allocates | |
76 | * the card structure, enables PCIE function number and initiates the | |
77 | * device registration and initialization procedure by adding a logical | |
78 | * interface. | |
79 | */ | |
80 | static int mwifiex_pcie_probe(struct pci_dev *pdev, | |
81 | const struct pci_device_id *ent) | |
82 | { | |
83 | struct pcie_service_card *card; | |
84 | ||
85 | pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", | |
f57c1edc | 86 | pdev->vendor, pdev->device, pdev->revision); |
d930faee AK |
87 | |
88 | card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL); | |
e404decb | 89 | if (!card) |
d930faee | 90 | return -ENOMEM; |
d930faee AK |
91 | |
92 | card->dev = pdev; | |
93 | ||
94 | if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops, | |
95 | MWIFIEX_PCIE)) { | |
96 | pr_err("%s failed\n", __func__); | |
97 | kfree(card); | |
98 | return -1; | |
99 | } | |
100 | ||
101 | return 0; | |
102 | } | |
103 | ||
104 | /* | |
105 | * This function removes the interface and frees up the card structure. | |
106 | */ | |
107 | static void mwifiex_pcie_remove(struct pci_dev *pdev) | |
108 | { | |
109 | struct pcie_service_card *card; | |
110 | struct mwifiex_adapter *adapter; | |
f57c1edc | 111 | struct mwifiex_private *priv; |
d930faee AK |
112 | int i; |
113 | ||
114 | card = pci_get_drvdata(pdev); | |
115 | if (!card) | |
116 | return; | |
117 | ||
118 | adapter = card->adapter; | |
119 | if (!adapter || !adapter->priv_num) | |
120 | return; | |
121 | ||
59a4cc25 AK |
122 | /* In case driver is removed when asynchronous FW load is in progress */ |
123 | wait_for_completion(&adapter->fw_load); | |
124 | ||
d930faee AK |
125 | if (user_rmmod) { |
126 | #ifdef CONFIG_PM | |
127 | if (adapter->is_suspended) | |
128 | mwifiex_pcie_resume(pdev); | |
129 | #endif | |
130 | ||
131 | for (i = 0; i < adapter->priv_num; i++) | |
132 | if ((GET_BSS_ROLE(adapter->priv[i]) == | |
f57c1edc YAP |
133 | MWIFIEX_BSS_ROLE_STA) && |
134 | adapter->priv[i]->media_connected) | |
d930faee AK |
135 | mwifiex_deauthenticate(adapter->priv[i], NULL); |
136 | ||
f57c1edc | 137 | priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); |
d930faee | 138 | |
f57c1edc YAP |
139 | mwifiex_disable_auto_ds(priv); |
140 | ||
141 | mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); | |
d930faee AK |
142 | } |
143 | ||
144 | mwifiex_remove_card(card->adapter, &add_remove_card_sem); | |
145 | kfree(card); | |
146 | } | |
147 | ||
148 | /* | |
149 | * Kernel needs to suspend all functions separately. Therefore all | |
150 | * registered functions must have drivers with suspend and resume | |
151 | * methods. Failing that the kernel simply removes the whole card. | |
152 | * | |
153 | * If already not suspended, this function allocates and sends a host | |
154 | * sleep activate request to the firmware and turns off the traffic. | |
155 | */ | |
156 | static int mwifiex_pcie_suspend(struct pci_dev *pdev, pm_message_t state) | |
157 | { | |
158 | struct mwifiex_adapter *adapter; | |
159 | struct pcie_service_card *card; | |
160 | int hs_actived, i; | |
161 | ||
162 | if (pdev) { | |
163 | card = (struct pcie_service_card *) pci_get_drvdata(pdev); | |
164 | if (!card || card->adapter) { | |
165 | pr_err("Card or adapter structure is not valid\n"); | |
166 | return 0; | |
167 | } | |
168 | } else { | |
169 | pr_err("PCIE device is not specified\n"); | |
170 | return 0; | |
171 | } | |
172 | ||
173 | adapter = card->adapter; | |
174 | ||
175 | hs_actived = mwifiex_enable_hs(adapter); | |
176 | ||
177 | /* Indicate device suspended */ | |
178 | adapter->is_suspended = true; | |
179 | ||
180 | for (i = 0; i < adapter->priv_num; i++) | |
181 | netif_carrier_off(adapter->priv[i]->netdev); | |
182 | ||
183 | return 0; | |
184 | } | |
185 | ||
186 | /* | |
187 | * Kernel needs to suspend all functions separately. Therefore all | |
188 | * registered functions must have drivers with suspend and resume | |
189 | * methods. Failing that the kernel simply removes the whole card. | |
190 | * | |
191 | * If already not resumed, this function turns on the traffic and | |
192 | * sends a host sleep cancel request to the firmware. | |
193 | */ | |
194 | static int mwifiex_pcie_resume(struct pci_dev *pdev) | |
195 | { | |
196 | struct mwifiex_adapter *adapter; | |
197 | struct pcie_service_card *card; | |
198 | int i; | |
199 | ||
200 | if (pdev) { | |
201 | card = (struct pcie_service_card *) pci_get_drvdata(pdev); | |
202 | if (!card || !card->adapter) { | |
203 | pr_err("Card or adapter structure is not valid\n"); | |
204 | return 0; | |
205 | } | |
206 | } else { | |
207 | pr_err("PCIE device is not specified\n"); | |
208 | return 0; | |
209 | } | |
210 | ||
211 | adapter = card->adapter; | |
212 | ||
213 | if (!adapter->is_suspended) { | |
214 | dev_warn(adapter->dev, "Device already resumed\n"); | |
215 | return 0; | |
216 | } | |
217 | ||
218 | adapter->is_suspended = false; | |
219 | ||
220 | for (i = 0; i < adapter->priv_num; i++) | |
221 | if (adapter->priv[i]->media_connected) | |
222 | netif_carrier_on(adapter->priv[i]->netdev); | |
223 | ||
224 | mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), | |
f57c1edc | 225 | MWIFIEX_ASYNC_CMD); |
d930faee AK |
226 | |
227 | return 0; | |
228 | } | |
229 | ||
230 | #define PCIE_VENDOR_ID_MARVELL (0x11ab) | |
231 | #define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30) | |
232 | ||
233 | static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = { | |
234 | { | |
235 | PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, | |
236 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | |
237 | }, | |
238 | {}, | |
239 | }; | |
240 | ||
241 | MODULE_DEVICE_TABLE(pci, mwifiex_ids); | |
242 | ||
243 | /* PCI Device Driver */ | |
244 | static struct pci_driver __refdata mwifiex_pcie = { | |
245 | .name = "mwifiex_pcie", | |
246 | .id_table = mwifiex_ids, | |
247 | .probe = mwifiex_pcie_probe, | |
248 | .remove = mwifiex_pcie_remove, | |
249 | #ifdef CONFIG_PM | |
250 | /* Power Management Hooks */ | |
251 | .suspend = mwifiex_pcie_suspend, | |
252 | .resume = mwifiex_pcie_resume, | |
253 | #endif | |
254 | }; | |
255 | ||
256 | /* | |
257 | * This function writes data into PCIE card register. | |
258 | */ | |
259 | static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) | |
260 | { | |
261 | struct pcie_service_card *card = adapter->card; | |
262 | ||
263 | iowrite32(data, card->pci_mmap1 + reg); | |
264 | ||
265 | return 0; | |
266 | } | |
267 | ||
268 | /* | |
269 | * This function reads data from PCIE card register. | |
270 | */ | |
271 | static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) | |
272 | { | |
273 | struct pcie_service_card *card = adapter->card; | |
274 | ||
275 | *data = ioread32(card->pci_mmap1 + reg); | |
276 | ||
277 | return 0; | |
278 | } | |
279 | ||
280 | /* | |
281 | * This function wakes up the card. | |
282 | * | |
283 | * A host power up command is written to the card configuration | |
284 | * register to wake up the card. | |
285 | */ | |
286 | static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) | |
287 | { | |
288 | int i = 0; | |
289 | ||
290 | while (mwifiex_pcie_ok_to_access_hw(adapter)) { | |
291 | i++; | |
e7891ba2 | 292 | usleep_range(10, 20); |
d930faee AK |
293 | /* 50ms max wait */ |
294 | if (i == 50000) | |
295 | break; | |
296 | } | |
297 | ||
298 | dev_dbg(adapter->dev, "event: Wakeup device...\n"); | |
299 | ||
300 | /* Enable interrupts or any chip access will wakeup device */ | |
301 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, HOST_INTR_MASK)) { | |
302 | dev_warn(adapter->dev, "Enable host interrupt failed\n"); | |
303 | return -1; | |
304 | } | |
305 | ||
306 | dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n"); | |
307 | adapter->ps_state = PS_STATE_AWAKE; | |
308 | ||
309 | return 0; | |
310 | } | |
311 | ||
312 | /* | |
313 | * This function is called after the card has woken up. | |
314 | * | |
315 | * The card configuration register is reset. | |
316 | */ | |
317 | static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) | |
318 | { | |
319 | dev_dbg(adapter->dev, "cmd: Wakeup device completed\n"); | |
320 | ||
321 | return 0; | |
322 | } | |
323 | ||
324 | /* | |
325 | * This function disables the host interrupt. | |
326 | * | |
327 | * The host interrupt mask is read, the disable bit is reset and | |
328 | * written back to the card host interrupt mask register. | |
329 | */ | |
330 | static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) | |
331 | { | |
332 | if (mwifiex_pcie_ok_to_access_hw(adapter)) { | |
333 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, | |
334 | 0x00000000)) { | |
335 | dev_warn(adapter->dev, "Disable host interrupt failed\n"); | |
336 | return -1; | |
337 | } | |
338 | } | |
339 | ||
340 | return 0; | |
341 | } | |
342 | ||
343 | /* | |
344 | * This function enables the host interrupt. | |
345 | * | |
346 | * The host interrupt enable mask is written to the card | |
347 | * host interrupt mask register. | |
348 | */ | |
349 | static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) | |
350 | { | |
351 | if (mwifiex_pcie_ok_to_access_hw(adapter)) { | |
352 | /* Simply write the mask to the register */ | |
353 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, | |
354 | HOST_INTR_MASK)) { | |
355 | dev_warn(adapter->dev, "Enable host interrupt failed\n"); | |
356 | return -1; | |
357 | } | |
358 | } | |
359 | ||
360 | return 0; | |
361 | } | |
362 | ||
363 | /* | |
364 | * This function creates buffer descriptor ring for TX | |
365 | */ | |
366 | static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) | |
367 | { | |
368 | struct pcie_service_card *card = adapter->card; | |
369 | struct sk_buff *skb; | |
370 | int i; | |
371 | phys_addr_t *buf_pa; | |
372 | ||
373 | /* | |
374 | * driver maintaines the write pointer and firmware maintaines the read | |
375 | * pointer. The write pointer starts at 0 (zero) while the read pointer | |
376 | * starts at zero with rollover bit set | |
377 | */ | |
378 | card->txbd_wrptr = 0; | |
379 | card->txbd_rdptr |= MWIFIEX_BD_FLAG_ROLLOVER_IND; | |
380 | ||
381 | /* allocate shared memory for the BD ring and divide the same in to | |
382 | several descriptors */ | |
383 | card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | |
f57c1edc | 384 | MWIFIEX_MAX_TXRX_BD; |
d930faee | 385 | dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n", |
f57c1edc | 386 | card->txbd_ring_size); |
d930faee AK |
387 | card->txbd_ring_vbase = kzalloc(card->txbd_ring_size, GFP_KERNEL); |
388 | if (!card->txbd_ring_vbase) { | |
f57c1edc | 389 | dev_err(adapter->dev, "Unable to alloc buffer for txbd ring\n"); |
8c53e42d | 390 | return -ENOMEM; |
d930faee AK |
391 | } |
392 | card->txbd_ring_pbase = virt_to_phys(card->txbd_ring_vbase); | |
393 | ||
f57c1edc YAP |
394 | dev_dbg(adapter->dev, |
395 | "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", | |
396 | card->txbd_ring_vbase, (u32)card->txbd_ring_pbase, | |
397 | (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size); | |
d930faee AK |
398 | |
399 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
400 | card->txbd_ring[i] = (struct mwifiex_pcie_buf_desc *) | |
f57c1edc YAP |
401 | (card->txbd_ring_vbase + |
402 | (sizeof(struct mwifiex_pcie_buf_desc) | |
403 | * i)); | |
d930faee AK |
404 | |
405 | /* Allocate buffer here so that firmware can DMA data from it */ | |
406 | skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE); | |
407 | if (!skb) { | |
408 | dev_err(adapter->dev, "Unable to allocate skb for TX ring.\n"); | |
409 | kfree(card->txbd_ring_vbase); | |
410 | return -ENOMEM; | |
411 | } | |
412 | buf_pa = mwifiex_update_sk_buff_pa(skb); | |
413 | ||
414 | skb_put(skb, MWIFIEX_RX_DATA_BUF_SIZE); | |
415 | dev_dbg(adapter->dev, "info: TX ring: add new skb base: %p, " | |
f57c1edc YAP |
416 | "buf_base: %p, buf_pbase: %#x:%x, buf_len: %#x\n", |
417 | skb, skb->data, (u32)*buf_pa, | |
418 | (u32)(((u64)*buf_pa >> 32)), skb->len); | |
d930faee AK |
419 | |
420 | card->tx_buf_list[i] = skb; | |
421 | card->txbd_ring[i]->paddr = *buf_pa; | |
422 | card->txbd_ring[i]->len = (u16)skb->len; | |
423 | card->txbd_ring[i]->flags = 0; | |
424 | } | |
425 | ||
426 | return 0; | |
427 | } | |
428 | ||
429 | static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) | |
430 | { | |
431 | struct pcie_service_card *card = adapter->card; | |
432 | int i; | |
433 | ||
434 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
435 | if (card->tx_buf_list[i]) | |
436 | dev_kfree_skb_any(card->tx_buf_list[i]); | |
437 | card->tx_buf_list[i] = NULL; | |
438 | card->txbd_ring[i]->paddr = 0; | |
439 | card->txbd_ring[i]->len = 0; | |
440 | card->txbd_ring[i]->flags = 0; | |
441 | card->txbd_ring[i] = NULL; | |
442 | } | |
443 | ||
444 | kfree(card->txbd_ring_vbase); | |
445 | card->txbd_ring_size = 0; | |
446 | card->txbd_wrptr = 0; | |
447 | card->txbd_rdptr = 0 | MWIFIEX_BD_FLAG_ROLLOVER_IND; | |
448 | card->txbd_ring_vbase = NULL; | |
449 | ||
450 | return 0; | |
451 | } | |
452 | ||
453 | /* | |
454 | * This function creates buffer descriptor ring for RX | |
455 | */ | |
456 | static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) | |
457 | { | |
458 | struct pcie_service_card *card = adapter->card; | |
459 | struct sk_buff *skb; | |
460 | int i; | |
461 | phys_addr_t *buf_pa; | |
462 | ||
463 | /* | |
464 | * driver maintaines the read pointer and firmware maintaines the write | |
465 | * pointer. The write pointer starts at 0 (zero) while the read pointer | |
466 | * starts at zero with rollover bit set | |
467 | */ | |
468 | card->rxbd_wrptr = 0; | |
469 | card->rxbd_rdptr |= MWIFIEX_BD_FLAG_ROLLOVER_IND; | |
470 | ||
471 | card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | |
f57c1edc | 472 | MWIFIEX_MAX_TXRX_BD; |
d930faee | 473 | dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n", |
f57c1edc | 474 | card->rxbd_ring_size); |
d930faee AK |
475 | card->rxbd_ring_vbase = kzalloc(card->rxbd_ring_size, GFP_KERNEL); |
476 | if (!card->rxbd_ring_vbase) { | |
477 | dev_err(adapter->dev, "Unable to allocate buffer for " | |
478 | "rxbd_ring.\n"); | |
8c53e42d | 479 | return -ENOMEM; |
d930faee AK |
480 | } |
481 | card->rxbd_ring_pbase = virt_to_phys(card->rxbd_ring_vbase); | |
482 | ||
f57c1edc YAP |
483 | dev_dbg(adapter->dev, |
484 | "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", | |
485 | card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, | |
486 | (u32)((u64)card->rxbd_ring_pbase >> 32), | |
487 | card->rxbd_ring_size); | |
d930faee AK |
488 | |
489 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
490 | card->rxbd_ring[i] = (struct mwifiex_pcie_buf_desc *) | |
f57c1edc YAP |
491 | (card->rxbd_ring_vbase + |
492 | (sizeof(struct mwifiex_pcie_buf_desc) | |
493 | * i)); | |
d930faee AK |
494 | |
495 | /* Allocate skb here so that firmware can DMA data from it */ | |
496 | skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE); | |
497 | if (!skb) { | |
f57c1edc YAP |
498 | dev_err(adapter->dev, |
499 | "Unable to allocate skb for RX ring.\n"); | |
d930faee AK |
500 | kfree(card->rxbd_ring_vbase); |
501 | return -ENOMEM; | |
502 | } | |
503 | buf_pa = mwifiex_update_sk_buff_pa(skb); | |
504 | skb_put(skb, MWIFIEX_RX_DATA_BUF_SIZE); | |
505 | ||
506 | dev_dbg(adapter->dev, "info: RX ring: add new skb base: %p, " | |
f57c1edc YAP |
507 | "buf_base: %p, buf_pbase: %#x:%x, buf_len: %#x\n", |
508 | skb, skb->data, (u32)*buf_pa, (u32)((u64)*buf_pa >> 32), | |
509 | skb->len); | |
d930faee AK |
510 | |
511 | card->rx_buf_list[i] = skb; | |
512 | card->rxbd_ring[i]->paddr = *buf_pa; | |
513 | card->rxbd_ring[i]->len = (u16)skb->len; | |
514 | card->rxbd_ring[i]->flags = 0; | |
515 | } | |
516 | ||
517 | return 0; | |
518 | } | |
519 | ||
520 | /* | |
521 | * This function deletes Buffer descriptor ring for RX | |
522 | */ | |
523 | static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) | |
524 | { | |
525 | struct pcie_service_card *card = adapter->card; | |
526 | int i; | |
527 | ||
528 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
529 | if (card->rx_buf_list[i]) | |
530 | dev_kfree_skb_any(card->rx_buf_list[i]); | |
531 | card->rx_buf_list[i] = NULL; | |
532 | card->rxbd_ring[i]->paddr = 0; | |
533 | card->rxbd_ring[i]->len = 0; | |
534 | card->rxbd_ring[i]->flags = 0; | |
535 | card->rxbd_ring[i] = NULL; | |
536 | } | |
537 | ||
538 | kfree(card->rxbd_ring_vbase); | |
539 | card->rxbd_ring_size = 0; | |
540 | card->rxbd_wrptr = 0; | |
541 | card->rxbd_rdptr = 0 | MWIFIEX_BD_FLAG_ROLLOVER_IND; | |
542 | card->rxbd_ring_vbase = NULL; | |
543 | ||
544 | return 0; | |
545 | } | |
546 | ||
547 | /* | |
548 | * This function creates buffer descriptor ring for Events | |
549 | */ | |
550 | static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) | |
551 | { | |
552 | struct pcie_service_card *card = adapter->card; | |
553 | struct sk_buff *skb; | |
554 | int i; | |
555 | phys_addr_t *buf_pa; | |
556 | ||
557 | /* | |
558 | * driver maintaines the read pointer and firmware maintaines the write | |
559 | * pointer. The write pointer starts at 0 (zero) while the read pointer | |
560 | * starts at zero with rollover bit set | |
561 | */ | |
562 | card->evtbd_wrptr = 0; | |
563 | card->evtbd_rdptr |= MWIFIEX_BD_FLAG_ROLLOVER_IND; | |
564 | ||
565 | card->evtbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | |
f57c1edc | 566 | MWIFIEX_MAX_EVT_BD; |
d930faee | 567 | dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n", |
f57c1edc | 568 | card->evtbd_ring_size); |
d930faee AK |
569 | card->evtbd_ring_vbase = kzalloc(card->evtbd_ring_size, GFP_KERNEL); |
570 | if (!card->evtbd_ring_vbase) { | |
f57c1edc YAP |
571 | dev_err(adapter->dev, |
572 | "Unable to allocate buffer. Terminating download\n"); | |
8c53e42d | 573 | return -ENOMEM; |
d930faee AK |
574 | } |
575 | card->evtbd_ring_pbase = virt_to_phys(card->evtbd_ring_vbase); | |
576 | ||
f57c1edc YAP |
577 | dev_dbg(adapter->dev, |
578 | "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", | |
579 | card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, | |
580 | (u32)((u64)card->evtbd_ring_pbase >> 32), | |
581 | card->evtbd_ring_size); | |
d930faee AK |
582 | |
583 | for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { | |
584 | card->evtbd_ring[i] = (struct mwifiex_pcie_buf_desc *) | |
f57c1edc YAP |
585 | (card->evtbd_ring_vbase + |
586 | (sizeof(struct mwifiex_pcie_buf_desc) | |
587 | * i)); | |
d930faee AK |
588 | |
589 | /* Allocate skb here so that firmware can DMA data from it */ | |
590 | skb = dev_alloc_skb(MAX_EVENT_SIZE); | |
591 | if (!skb) { | |
f57c1edc YAP |
592 | dev_err(adapter->dev, |
593 | "Unable to allocate skb for EVENT buf.\n"); | |
d930faee AK |
594 | kfree(card->evtbd_ring_vbase); |
595 | return -ENOMEM; | |
596 | } | |
597 | buf_pa = mwifiex_update_sk_buff_pa(skb); | |
598 | skb_put(skb, MAX_EVENT_SIZE); | |
599 | ||
600 | dev_dbg(adapter->dev, "info: Evt ring: add new skb. base: %p, " | |
f57c1edc YAP |
601 | "buf_base: %p, buf_pbase: %#x:%x, buf_len: %#x\n", |
602 | skb, skb->data, (u32)*buf_pa, (u32)((u64)*buf_pa >> 32), | |
603 | skb->len); | |
d930faee AK |
604 | |
605 | card->evt_buf_list[i] = skb; | |
606 | card->evtbd_ring[i]->paddr = *buf_pa; | |
607 | card->evtbd_ring[i]->len = (u16)skb->len; | |
608 | card->evtbd_ring[i]->flags = 0; | |
609 | } | |
610 | ||
611 | return 0; | |
612 | } | |
613 | ||
614 | /* | |
615 | * This function deletes Buffer descriptor ring for Events | |
616 | */ | |
617 | static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) | |
618 | { | |
619 | struct pcie_service_card *card = adapter->card; | |
620 | int i; | |
621 | ||
622 | for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { | |
623 | if (card->evt_buf_list[i]) | |
624 | dev_kfree_skb_any(card->evt_buf_list[i]); | |
625 | card->evt_buf_list[i] = NULL; | |
626 | card->evtbd_ring[i]->paddr = 0; | |
627 | card->evtbd_ring[i]->len = 0; | |
628 | card->evtbd_ring[i]->flags = 0; | |
629 | card->evtbd_ring[i] = NULL; | |
630 | } | |
631 | ||
632 | kfree(card->evtbd_ring_vbase); | |
633 | card->evtbd_wrptr = 0; | |
634 | card->evtbd_rdptr = 0 | MWIFIEX_BD_FLAG_ROLLOVER_IND; | |
635 | card->evtbd_ring_size = 0; | |
636 | card->evtbd_ring_vbase = NULL; | |
637 | ||
638 | return 0; | |
639 | } | |
640 | ||
641 | /* | |
642 | * This function allocates a buffer for CMDRSP | |
643 | */ | |
644 | static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) | |
645 | { | |
646 | struct pcie_service_card *card = adapter->card; | |
647 | struct sk_buff *skb; | |
648 | ||
649 | /* Allocate memory for receiving command response data */ | |
650 | skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); | |
651 | if (!skb) { | |
f57c1edc YAP |
652 | dev_err(adapter->dev, |
653 | "Unable to allocate skb for command response data.\n"); | |
d930faee AK |
654 | return -ENOMEM; |
655 | } | |
656 | mwifiex_update_sk_buff_pa(skb); | |
657 | skb_put(skb, MWIFIEX_UPLD_SIZE); | |
658 | card->cmdrsp_buf = skb; | |
659 | ||
660 | skb = NULL; | |
661 | /* Allocate memory for sending command to firmware */ | |
662 | skb = dev_alloc_skb(MWIFIEX_SIZE_OF_CMD_BUFFER); | |
663 | if (!skb) { | |
f57c1edc YAP |
664 | dev_err(adapter->dev, |
665 | "Unable to allocate skb for command data.\n"); | |
d930faee AK |
666 | return -ENOMEM; |
667 | } | |
668 | mwifiex_update_sk_buff_pa(skb); | |
669 | skb_put(skb, MWIFIEX_SIZE_OF_CMD_BUFFER); | |
670 | card->cmd_buf = skb; | |
671 | ||
672 | return 0; | |
673 | } | |
674 | ||
675 | /* | |
676 | * This function deletes a buffer for CMDRSP | |
677 | */ | |
678 | static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) | |
679 | { | |
680 | struct pcie_service_card *card; | |
681 | ||
682 | if (!adapter) | |
683 | return 0; | |
684 | ||
685 | card = adapter->card; | |
686 | ||
687 | if (card && card->cmdrsp_buf) | |
688 | dev_kfree_skb_any(card->cmdrsp_buf); | |
689 | ||
690 | if (card && card->cmd_buf) | |
691 | dev_kfree_skb_any(card->cmd_buf); | |
692 | ||
693 | return 0; | |
694 | } | |
695 | ||
696 | /* | |
697 | * This function allocates a buffer for sleep cookie | |
698 | */ | |
699 | static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) | |
700 | { | |
701 | struct sk_buff *skb; | |
702 | struct pcie_service_card *card = adapter->card; | |
703 | ||
704 | /* Allocate memory for sleep cookie */ | |
705 | skb = dev_alloc_skb(sizeof(u32)); | |
706 | if (!skb) { | |
f57c1edc YAP |
707 | dev_err(adapter->dev, |
708 | "Unable to allocate skb for sleep cookie!\n"); | |
d930faee AK |
709 | return -ENOMEM; |
710 | } | |
711 | mwifiex_update_sk_buff_pa(skb); | |
712 | skb_put(skb, sizeof(u32)); | |
713 | ||
714 | /* Init val of Sleep Cookie */ | |
715 | *(u32 *)skb->data = FW_AWAKE_COOKIE; | |
716 | ||
717 | dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n", | |
f57c1edc | 718 | *((u32 *)skb->data)); |
d930faee AK |
719 | |
720 | /* Save the sleep cookie */ | |
721 | card->sleep_cookie = skb; | |
722 | ||
723 | return 0; | |
724 | } | |
725 | ||
726 | /* | |
727 | * This function deletes buffer for sleep cookie | |
728 | */ | |
729 | static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) | |
730 | { | |
731 | struct pcie_service_card *card; | |
732 | ||
733 | if (!adapter) | |
734 | return 0; | |
735 | ||
736 | card = adapter->card; | |
737 | ||
738 | if (card && card->sleep_cookie) { | |
739 | dev_kfree_skb_any(card->sleep_cookie); | |
740 | card->sleep_cookie = NULL; | |
741 | } | |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
746 | /* | |
747 | * This function sends data buffer to device | |
748 | */ | |
749 | static int | |
750 | mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb) | |
751 | { | |
752 | struct pcie_service_card *card = adapter->card; | |
753 | u32 wrindx, rdptr; | |
754 | phys_addr_t *buf_pa; | |
755 | __le16 *tmp; | |
756 | ||
757 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | |
758 | mwifiex_pm_wakeup_card(adapter); | |
759 | ||
760 | /* Read the TX ring read pointer set by firmware */ | |
761 | if (mwifiex_read_reg(adapter, REG_TXBD_RDPTR, &rdptr)) { | |
f57c1edc YAP |
762 | dev_err(adapter->dev, |
763 | "SEND DATA: failed to read REG_TXBD_RDPTR\n"); | |
d930faee AK |
764 | return -1; |
765 | } | |
766 | ||
767 | wrindx = card->txbd_wrptr & MWIFIEX_TXBD_MASK; | |
768 | ||
769 | dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", rdptr, | |
f57c1edc | 770 | card->txbd_wrptr); |
d930faee AK |
771 | if (((card->txbd_wrptr & MWIFIEX_TXBD_MASK) != |
772 | (rdptr & MWIFIEX_TXBD_MASK)) || | |
773 | ((card->txbd_wrptr & MWIFIEX_BD_FLAG_ROLLOVER_IND) != | |
774 | (rdptr & MWIFIEX_BD_FLAG_ROLLOVER_IND))) { | |
775 | struct sk_buff *skb_data; | |
776 | u8 *payload; | |
777 | ||
778 | adapter->data_sent = true; | |
779 | skb_data = card->tx_buf_list[wrindx]; | |
780 | memcpy(skb_data->data, skb->data, skb->len); | |
781 | payload = skb_data->data; | |
782 | tmp = (__le16 *)&payload[0]; | |
783 | *tmp = cpu_to_le16((u16)skb->len); | |
784 | tmp = (__le16 *)&payload[2]; | |
785 | *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA); | |
786 | skb_put(skb_data, MWIFIEX_RX_DATA_BUF_SIZE - skb_data->len); | |
787 | skb_trim(skb_data, skb->len); | |
788 | buf_pa = MWIFIEX_SKB_PACB(skb_data); | |
789 | card->txbd_ring[wrindx]->paddr = *buf_pa; | |
790 | card->txbd_ring[wrindx]->len = (u16)skb_data->len; | |
791 | card->txbd_ring[wrindx]->flags = MWIFIEX_BD_FLAG_FIRST_DESC | | |
792 | MWIFIEX_BD_FLAG_LAST_DESC; | |
793 | ||
794 | if ((++card->txbd_wrptr & MWIFIEX_TXBD_MASK) == | |
795 | MWIFIEX_MAX_TXRX_BD) | |
796 | card->txbd_wrptr = ((card->txbd_wrptr & | |
797 | MWIFIEX_BD_FLAG_ROLLOVER_IND) ^ | |
798 | MWIFIEX_BD_FLAG_ROLLOVER_IND); | |
799 | ||
800 | /* Write the TX ring write pointer in to REG_TXBD_WRPTR */ | |
801 | if (mwifiex_write_reg(adapter, REG_TXBD_WRPTR, | |
f57c1edc YAP |
802 | card->txbd_wrptr)) { |
803 | dev_err(adapter->dev, | |
804 | "SEND DATA: failed to write REG_TXBD_WRPTR\n"); | |
d930faee AK |
805 | return 0; |
806 | } | |
807 | ||
808 | /* Send the TX ready interrupt */ | |
809 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
810 | CPU_INTR_DNLD_RDY)) { | |
f57c1edc YAP |
811 | dev_err(adapter->dev, |
812 | "SEND DATA: failed to assert door-bell intr\n"); | |
d930faee AK |
813 | return -1; |
814 | } | |
815 | dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: " | |
f57c1edc YAP |
816 | "%#x> and sent packet to firmware successfully\n", |
817 | rdptr, card->txbd_wrptr); | |
d930faee | 818 | } else { |
f57c1edc YAP |
819 | dev_dbg(adapter->dev, |
820 | "info: TX Ring full, can't send packets to fw\n"); | |
d930faee AK |
821 | adapter->data_sent = true; |
822 | /* Send the TX ready interrupt */ | |
823 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
824 | CPU_INTR_DNLD_RDY)) | |
f57c1edc YAP |
825 | dev_err(adapter->dev, |
826 | "SEND DATA: failed to assert door-bell intr\n"); | |
d930faee AK |
827 | return -EBUSY; |
828 | } | |
829 | ||
830 | return 0; | |
831 | } | |
832 | ||
833 | /* | |
834 | * This function handles received buffer ring and | |
835 | * dispatches packets to upper | |
836 | */ | |
837 | static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) | |
838 | { | |
839 | struct pcie_service_card *card = adapter->card; | |
840 | u32 wrptr, rd_index; | |
841 | int ret = 0; | |
842 | struct sk_buff *skb_tmp = NULL; | |
843 | ||
844 | /* Read the RX ring Write pointer set by firmware */ | |
845 | if (mwifiex_read_reg(adapter, REG_RXBD_WRPTR, &wrptr)) { | |
f57c1edc YAP |
846 | dev_err(adapter->dev, |
847 | "RECV DATA: failed to read REG_TXBD_RDPTR\n"); | |
d930faee AK |
848 | ret = -1; |
849 | goto done; | |
850 | } | |
851 | ||
852 | while (((wrptr & MWIFIEX_RXBD_MASK) != | |
853 | (card->rxbd_rdptr & MWIFIEX_RXBD_MASK)) || | |
854 | ((wrptr & MWIFIEX_BD_FLAG_ROLLOVER_IND) == | |
855 | (card->rxbd_rdptr & MWIFIEX_BD_FLAG_ROLLOVER_IND))) { | |
856 | struct sk_buff *skb_data; | |
857 | u16 rx_len; | |
858 | ||
859 | rd_index = card->rxbd_rdptr & MWIFIEX_RXBD_MASK; | |
860 | skb_data = card->rx_buf_list[rd_index]; | |
861 | ||
862 | /* Get data length from interface header - | |
863 | first byte is len, second byte is type */ | |
864 | rx_len = *((u16 *)skb_data->data); | |
f57c1edc YAP |
865 | dev_dbg(adapter->dev, |
866 | "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", | |
867 | card->rxbd_rdptr, wrptr, rx_len); | |
d930faee AK |
868 | skb_tmp = dev_alloc_skb(rx_len); |
869 | if (!skb_tmp) { | |
f57c1edc YAP |
870 | dev_dbg(adapter->dev, |
871 | "info: Failed to alloc skb for RX\n"); | |
d930faee AK |
872 | ret = -EBUSY; |
873 | goto done; | |
874 | } | |
875 | ||
876 | skb_put(skb_tmp, rx_len); | |
877 | ||
878 | memcpy(skb_tmp->data, skb_data->data + INTF_HEADER_LEN, rx_len); | |
879 | if ((++card->rxbd_rdptr & MWIFIEX_RXBD_MASK) == | |
880 | MWIFIEX_MAX_TXRX_BD) { | |
881 | card->rxbd_rdptr = ((card->rxbd_rdptr & | |
882 | MWIFIEX_BD_FLAG_ROLLOVER_IND) ^ | |
883 | MWIFIEX_BD_FLAG_ROLLOVER_IND); | |
884 | } | |
885 | dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", | |
f57c1edc | 886 | card->rxbd_rdptr, wrptr); |
d930faee AK |
887 | |
888 | /* Write the RX ring read pointer in to REG_RXBD_RDPTR */ | |
889 | if (mwifiex_write_reg(adapter, REG_RXBD_RDPTR, | |
890 | card->rxbd_rdptr)) { | |
f57c1edc YAP |
891 | dev_err(adapter->dev, |
892 | "RECV DATA: failed to write REG_RXBD_RDPTR\n"); | |
d930faee AK |
893 | ret = -1; |
894 | goto done; | |
895 | } | |
896 | ||
897 | /* Read the RX ring Write pointer set by firmware */ | |
898 | if (mwifiex_read_reg(adapter, REG_RXBD_WRPTR, &wrptr)) { | |
f57c1edc YAP |
899 | dev_err(adapter->dev, |
900 | "RECV DATA: failed to read REG_TXBD_RDPTR\n"); | |
d930faee AK |
901 | ret = -1; |
902 | goto done; | |
903 | } | |
f57c1edc YAP |
904 | dev_dbg(adapter->dev, |
905 | "info: RECV DATA: Rcvd packet from fw successfully\n"); | |
d930faee AK |
906 | mwifiex_handle_rx_packet(adapter, skb_tmp); |
907 | } | |
908 | ||
909 | done: | |
910 | if (ret && skb_tmp) | |
911 | dev_kfree_skb_any(skb_tmp); | |
912 | return ret; | |
913 | } | |
914 | ||
915 | /* | |
916 | * This function downloads the boot command to device | |
917 | */ | |
918 | static int | |
919 | mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) | |
920 | { | |
921 | phys_addr_t *buf_pa = MWIFIEX_SKB_PACB(skb); | |
922 | ||
923 | if (!(skb->data && skb->len && *buf_pa)) { | |
f57c1edc YAP |
924 | dev_err(adapter->dev, |
925 | "Invalid parameter in %s <%p, %#x:%x, %x>\n", | |
926 | __func__, skb->data, skb->len, | |
927 | (u32)*buf_pa, (u32)((u64)*buf_pa >> 32)); | |
d930faee AK |
928 | return -1; |
929 | } | |
930 | ||
931 | /* Write the lower 32bits of the physical address to scratch | |
932 | * register 0 */ | |
933 | if (mwifiex_write_reg(adapter, PCIE_SCRATCH_0_REG, (u32)*buf_pa)) { | |
f57c1edc YAP |
934 | dev_err(adapter->dev, |
935 | "%s: failed to write download command to boot code.\n", | |
936 | __func__); | |
d930faee AK |
937 | return -1; |
938 | } | |
939 | ||
940 | /* Write the upper 32bits of the physical address to scratch | |
941 | * register 1 */ | |
942 | if (mwifiex_write_reg(adapter, PCIE_SCRATCH_1_REG, | |
943 | (u32)((u64)*buf_pa >> 32))) { | |
f57c1edc YAP |
944 | dev_err(adapter->dev, |
945 | "%s: failed to write download command to boot code.\n", | |
946 | __func__); | |
d930faee AK |
947 | return -1; |
948 | } | |
949 | ||
950 | /* Write the command length to scratch register 2 */ | |
951 | if (mwifiex_write_reg(adapter, PCIE_SCRATCH_2_REG, skb->len)) { | |
f57c1edc YAP |
952 | dev_err(adapter->dev, |
953 | "%s: failed to write command len to scratch reg 2\n", | |
954 | __func__); | |
d930faee AK |
955 | return -1; |
956 | } | |
957 | ||
958 | /* Ring the door bell */ | |
959 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
960 | CPU_INTR_DOOR_BELL)) { | |
f57c1edc YAP |
961 | dev_err(adapter->dev, |
962 | "%s: failed to assert door-bell intr\n", __func__); | |
d930faee AK |
963 | return -1; |
964 | } | |
965 | ||
966 | return 0; | |
967 | } | |
968 | ||
969 | /* | |
970 | * This function downloads commands to the device | |
971 | */ | |
972 | static int | |
973 | mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) | |
974 | { | |
975 | struct pcie_service_card *card = adapter->card; | |
976 | int ret = 0; | |
977 | phys_addr_t *cmd_buf_pa; | |
978 | phys_addr_t *cmdrsp_buf_pa; | |
979 | ||
980 | if (!(skb->data && skb->len)) { | |
981 | dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n", | |
f57c1edc | 982 | __func__, skb->data, skb->len); |
d930faee AK |
983 | return -1; |
984 | } | |
985 | ||
986 | /* Make sure a command response buffer is available */ | |
987 | if (!card->cmdrsp_buf) { | |
f57c1edc YAP |
988 | dev_err(adapter->dev, |
989 | "No response buffer available, send command failed\n"); | |
d930faee AK |
990 | return -EBUSY; |
991 | } | |
992 | ||
993 | /* Make sure a command buffer is available */ | |
994 | if (!card->cmd_buf) { | |
995 | dev_err(adapter->dev, "Command buffer not available\n"); | |
996 | return -EBUSY; | |
997 | } | |
998 | ||
999 | adapter->cmd_sent = true; | |
1000 | /* Copy the given skb in to DMA accessable shared buffer */ | |
1001 | skb_put(card->cmd_buf, MWIFIEX_SIZE_OF_CMD_BUFFER - card->cmd_buf->len); | |
1002 | skb_trim(card->cmd_buf, skb->len); | |
1003 | memcpy(card->cmd_buf->data, skb->data, skb->len); | |
1004 | ||
1005 | /* To send a command, the driver will: | |
1006 | 1. Write the 64bit physical address of the data buffer to | |
1007 | SCRATCH1 + SCRATCH0 | |
1008 | 2. Ring the door bell (i.e. set the door bell interrupt) | |
1009 | ||
1010 | In response to door bell interrupt, the firmware will perform | |
1011 | the DMA of the command packet (first header to obtain the total | |
1012 | length and then rest of the command). | |
1013 | */ | |
1014 | ||
1015 | if (card->cmdrsp_buf) { | |
1016 | cmdrsp_buf_pa = MWIFIEX_SKB_PACB(card->cmdrsp_buf); | |
1017 | /* Write the lower 32bits of the cmdrsp buffer physical | |
1018 | address */ | |
1019 | if (mwifiex_write_reg(adapter, REG_CMDRSP_ADDR_LO, | |
f57c1edc YAP |
1020 | (u32)*cmdrsp_buf_pa)) { |
1021 | dev_err(adapter->dev, | |
1022 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1023 | ret = -1; |
1024 | goto done; | |
1025 | } | |
1026 | /* Write the upper 32bits of the cmdrsp buffer physical | |
1027 | address */ | |
1028 | if (mwifiex_write_reg(adapter, REG_CMDRSP_ADDR_HI, | |
f57c1edc YAP |
1029 | (u32)((u64)*cmdrsp_buf_pa >> 32))) { |
1030 | dev_err(adapter->dev, | |
1031 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1032 | ret = -1; |
1033 | goto done; | |
1034 | } | |
1035 | } | |
1036 | ||
1037 | cmd_buf_pa = MWIFIEX_SKB_PACB(card->cmd_buf); | |
1038 | /* Write the lower 32bits of the physical address to REG_CMD_ADDR_LO */ | |
f57c1edc YAP |
1039 | if (mwifiex_write_reg(adapter, REG_CMD_ADDR_LO, (u32)*cmd_buf_pa)) { |
1040 | dev_err(adapter->dev, | |
1041 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1042 | ret = -1; |
1043 | goto done; | |
1044 | } | |
1045 | /* Write the upper 32bits of the physical address to REG_CMD_ADDR_HI */ | |
1046 | if (mwifiex_write_reg(adapter, REG_CMD_ADDR_HI, | |
f57c1edc YAP |
1047 | (u32)((u64)*cmd_buf_pa >> 32))) { |
1048 | dev_err(adapter->dev, | |
1049 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1050 | ret = -1; |
1051 | goto done; | |
1052 | } | |
1053 | ||
1054 | /* Write the command length to REG_CMD_SIZE */ | |
f57c1edc YAP |
1055 | if (mwifiex_write_reg(adapter, REG_CMD_SIZE, card->cmd_buf->len)) { |
1056 | dev_err(adapter->dev, | |
1057 | "Failed to write cmd len to REG_CMD_SIZE\n"); | |
d930faee AK |
1058 | ret = -1; |
1059 | goto done; | |
1060 | } | |
1061 | ||
1062 | /* Ring the door bell */ | |
1063 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
1064 | CPU_INTR_DOOR_BELL)) { | |
f57c1edc YAP |
1065 | dev_err(adapter->dev, |
1066 | "Failed to assert door-bell intr\n"); | |
d930faee AK |
1067 | ret = -1; |
1068 | goto done; | |
1069 | } | |
1070 | ||
1071 | done: | |
1072 | if (ret) | |
1073 | adapter->cmd_sent = false; | |
1074 | ||
1075 | return 0; | |
1076 | } | |
1077 | ||
1078 | /* | |
1079 | * This function handles command complete interrupt | |
1080 | */ | |
1081 | static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) | |
1082 | { | |
1083 | struct pcie_service_card *card = adapter->card; | |
f57c1edc | 1084 | struct sk_buff *skb = card->cmdrsp_buf; |
d930faee AK |
1085 | int count = 0; |
1086 | ||
1087 | dev_dbg(adapter->dev, "info: Rx CMD Response\n"); | |
1088 | ||
1089 | if (!adapter->curr_cmd) { | |
f57c1edc | 1090 | skb_pull(skb, INTF_HEADER_LEN); |
d930faee | 1091 | if (adapter->ps_state == PS_STATE_SLEEP_CFM) { |
f57c1edc YAP |
1092 | mwifiex_process_sleep_confirm_resp(adapter, skb->data, |
1093 | skb->len); | |
d930faee AK |
1094 | while (mwifiex_pcie_ok_to_access_hw(adapter) && |
1095 | (count++ < 10)) | |
e7891ba2 | 1096 | usleep_range(50, 60); |
d930faee | 1097 | } else { |
f57c1edc YAP |
1098 | dev_err(adapter->dev, |
1099 | "There is no command but got cmdrsp\n"); | |
d930faee | 1100 | } |
f57c1edc YAP |
1101 | memcpy(adapter->upld_buf, skb->data, |
1102 | min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); | |
1103 | skb_push(skb, INTF_HEADER_LEN); | |
d930faee | 1104 | } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { |
f57c1edc YAP |
1105 | skb_pull(skb, INTF_HEADER_LEN); |
1106 | adapter->curr_cmd->resp_skb = skb; | |
d930faee AK |
1107 | adapter->cmd_resp_received = true; |
1108 | /* Take the pointer and set it to CMD node and will | |
1109 | return in the response complete callback */ | |
1110 | card->cmdrsp_buf = NULL; | |
1111 | ||
1112 | /* Clear the cmd-rsp buffer address in scratch registers. This | |
1113 | will prevent firmware from writing to the same response | |
1114 | buffer again. */ | |
1115 | if (mwifiex_write_reg(adapter, REG_CMDRSP_ADDR_LO, 0)) { | |
f57c1edc YAP |
1116 | dev_err(adapter->dev, |
1117 | "cmd_done: failed to clear cmd_rsp_addr_lo\n"); | |
d930faee AK |
1118 | return -1; |
1119 | } | |
1120 | /* Write the upper 32bits of the cmdrsp buffer physical | |
1121 | address */ | |
1122 | if (mwifiex_write_reg(adapter, REG_CMDRSP_ADDR_HI, 0)) { | |
f57c1edc YAP |
1123 | dev_err(adapter->dev, |
1124 | "cmd_done: failed to clear cmd_rsp_addr_hi\n"); | |
d930faee AK |
1125 | return -1; |
1126 | } | |
1127 | } | |
1128 | ||
1129 | return 0; | |
1130 | } | |
1131 | ||
1132 | /* | |
1133 | * Command Response processing complete handler | |
1134 | */ | |
1135 | static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, | |
1136 | struct sk_buff *skb) | |
1137 | { | |
1138 | struct pcie_service_card *card = adapter->card; | |
1139 | ||
1140 | if (skb) { | |
1141 | card->cmdrsp_buf = skb; | |
1142 | skb_push(card->cmdrsp_buf, INTF_HEADER_LEN); | |
1143 | } | |
1144 | ||
1145 | return 0; | |
1146 | } | |
1147 | ||
1148 | /* | |
1149 | * This function handles firmware event ready interrupt | |
1150 | */ | |
1151 | static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) | |
1152 | { | |
1153 | struct pcie_service_card *card = adapter->card; | |
1154 | u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; | |
1155 | u32 wrptr, event; | |
1156 | ||
1157 | if (adapter->event_received) { | |
f57c1edc YAP |
1158 | dev_dbg(adapter->dev, "info: Event being processed, " |
1159 | "do not process this interrupt just yet\n"); | |
d930faee AK |
1160 | return 0; |
1161 | } | |
1162 | ||
1163 | if (rdptr >= MWIFIEX_MAX_EVT_BD) { | |
1164 | dev_dbg(adapter->dev, "info: Invalid read pointer...\n"); | |
1165 | return -1; | |
1166 | } | |
1167 | ||
1168 | /* Read the event ring write pointer set by firmware */ | |
1169 | if (mwifiex_read_reg(adapter, REG_EVTBD_WRPTR, &wrptr)) { | |
f57c1edc YAP |
1170 | dev_err(adapter->dev, |
1171 | "EventReady: failed to read REG_EVTBD_WRPTR\n"); | |
d930faee AK |
1172 | return -1; |
1173 | } | |
1174 | ||
1175 | dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", | |
f57c1edc YAP |
1176 | card->evtbd_rdptr, wrptr); |
1177 | if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr | |
1178 | & MWIFIEX_EVTBD_MASK)) || | |
d930faee AK |
1179 | ((wrptr & MWIFIEX_BD_FLAG_ROLLOVER_IND) == |
1180 | (card->evtbd_rdptr & MWIFIEX_BD_FLAG_ROLLOVER_IND))) { | |
1181 | struct sk_buff *skb_cmd; | |
1182 | __le16 data_len = 0; | |
1183 | u16 evt_len; | |
1184 | ||
1185 | dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr); | |
1186 | skb_cmd = card->evt_buf_list[rdptr]; | |
1187 | /* Take the pointer and set it to event pointer in adapter | |
1188 | and will return back after event handling callback */ | |
1189 | card->evt_buf_list[rdptr] = NULL; | |
1190 | card->evtbd_ring[rdptr]->paddr = 0; | |
1191 | card->evtbd_ring[rdptr]->len = 0; | |
1192 | card->evtbd_ring[rdptr]->flags = 0; | |
1193 | ||
1194 | event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN]; | |
1195 | adapter->event_cause = event; | |
1196 | /* The first 4bytes will be the event transfer header | |
1197 | len is 2 bytes followed by type which is 2 bytes */ | |
1198 | memcpy(&data_len, skb_cmd->data, sizeof(__le16)); | |
1199 | evt_len = le16_to_cpu(data_len); | |
1200 | ||
1201 | skb_pull(skb_cmd, INTF_HEADER_LEN); | |
1202 | dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len); | |
1203 | ||
1204 | if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE)) | |
1205 | memcpy(adapter->event_body, skb_cmd->data + | |
1206 | MWIFIEX_EVENT_HEADER_LEN, evt_len - | |
1207 | MWIFIEX_EVENT_HEADER_LEN); | |
1208 | ||
1209 | adapter->event_received = true; | |
1210 | adapter->event_skb = skb_cmd; | |
1211 | ||
1212 | /* Do not update the event read pointer here, wait till the | |
1213 | buffer is released. This is just to make things simpler, | |
1214 | we need to find a better method of managing these buffers. | |
1215 | */ | |
1216 | } | |
1217 | ||
1218 | return 0; | |
1219 | } | |
1220 | ||
1221 | /* | |
1222 | * Event processing complete handler | |
1223 | */ | |
1224 | static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, | |
1225 | struct sk_buff *skb) | |
1226 | { | |
1227 | struct pcie_service_card *card = adapter->card; | |
1228 | int ret = 0; | |
1229 | u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; | |
1230 | u32 wrptr; | |
1231 | phys_addr_t *buf_pa; | |
1232 | ||
1233 | if (!skb) | |
1234 | return 0; | |
1235 | ||
1eb54c8a | 1236 | if (rdptr >= MWIFIEX_MAX_EVT_BD) { |
d930faee | 1237 | dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n", |
f57c1edc | 1238 | rdptr); |
8c53e42d | 1239 | return -EINVAL; |
1eb54c8a | 1240 | } |
d930faee AK |
1241 | |
1242 | /* Read the event ring write pointer set by firmware */ | |
1243 | if (mwifiex_read_reg(adapter, REG_EVTBD_WRPTR, &wrptr)) { | |
f57c1edc YAP |
1244 | dev_err(adapter->dev, |
1245 | "event_complete: failed to read REG_EVTBD_WRPTR\n"); | |
8c53e42d | 1246 | return -1; |
d930faee AK |
1247 | } |
1248 | ||
1249 | if (!card->evt_buf_list[rdptr]) { | |
1250 | skb_push(skb, INTF_HEADER_LEN); | |
1251 | card->evt_buf_list[rdptr] = skb; | |
1252 | buf_pa = MWIFIEX_SKB_PACB(skb); | |
1253 | card->evtbd_ring[rdptr]->paddr = *buf_pa; | |
1254 | card->evtbd_ring[rdptr]->len = (u16)skb->len; | |
1255 | card->evtbd_ring[rdptr]->flags = 0; | |
1256 | skb = NULL; | |
1257 | } else { | |
f57c1edc YAP |
1258 | dev_dbg(adapter->dev, |
1259 | "info: ERROR: buf still valid at index %d, <%p, %p>\n", | |
1260 | rdptr, card->evt_buf_list[rdptr], skb); | |
d930faee AK |
1261 | } |
1262 | ||
1263 | if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { | |
1264 | card->evtbd_rdptr = ((card->evtbd_rdptr & | |
1265 | MWIFIEX_BD_FLAG_ROLLOVER_IND) ^ | |
1266 | MWIFIEX_BD_FLAG_ROLLOVER_IND); | |
1267 | } | |
1268 | ||
1269 | dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>", | |
f57c1edc | 1270 | card->evtbd_rdptr, wrptr); |
d930faee AK |
1271 | |
1272 | /* Write the event ring read pointer in to REG_EVTBD_RDPTR */ | |
1273 | if (mwifiex_write_reg(adapter, REG_EVTBD_RDPTR, card->evtbd_rdptr)) { | |
f57c1edc YAP |
1274 | dev_err(adapter->dev, |
1275 | "event_complete: failed to read REG_EVTBD_RDPTR\n"); | |
8c53e42d | 1276 | return -1; |
d930faee AK |
1277 | } |
1278 | ||
d930faee AK |
1279 | dev_dbg(adapter->dev, "info: Check Events Again\n"); |
1280 | ret = mwifiex_pcie_process_event_ready(adapter); | |
1281 | ||
1282 | return ret; | |
1283 | } | |
1284 | ||
1285 | /* | |
1286 | * This function downloads the firmware to the card. | |
1287 | * | |
1288 | * Firmware is downloaded to the card in blocks. Every block download | |
1289 | * is tested for CRC errors, and retried a number of times before | |
1290 | * returning failure. | |
1291 | */ | |
1292 | static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, | |
1293 | struct mwifiex_fw_image *fw) | |
1294 | { | |
1295 | int ret; | |
1296 | u8 *firmware = fw->fw_buf; | |
1297 | u32 firmware_len = fw->fw_len; | |
1298 | u32 offset = 0; | |
1299 | struct sk_buff *skb; | |
1300 | u32 txlen, tx_blocks = 0, tries, len; | |
1301 | u32 block_retry_cnt = 0; | |
1302 | ||
1303 | if (!adapter) { | |
1304 | pr_err("adapter structure is not valid\n"); | |
1305 | return -1; | |
1306 | } | |
1307 | ||
1308 | if (!firmware || !firmware_len) { | |
f57c1edc YAP |
1309 | dev_err(adapter->dev, |
1310 | "No firmware image found! Terminating download\n"); | |
d930faee AK |
1311 | return -1; |
1312 | } | |
1313 | ||
1314 | dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n", | |
f57c1edc | 1315 | firmware_len); |
d930faee AK |
1316 | |
1317 | if (mwifiex_pcie_disable_host_int(adapter)) { | |
f57c1edc YAP |
1318 | dev_err(adapter->dev, |
1319 | "%s: Disabling interrupts failed.\n", __func__); | |
d930faee AK |
1320 | return -1; |
1321 | } | |
1322 | ||
1323 | skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); | |
1324 | if (!skb) { | |
1325 | ret = -ENOMEM; | |
1326 | goto done; | |
1327 | } | |
1328 | mwifiex_update_sk_buff_pa(skb); | |
1329 | ||
1330 | /* Perform firmware data transfer */ | |
1331 | do { | |
1332 | u32 ireg_intr = 0; | |
1333 | ||
1334 | /* More data? */ | |
1335 | if (offset >= firmware_len) | |
1336 | break; | |
1337 | ||
1338 | for (tries = 0; tries < MAX_POLL_TRIES; tries++) { | |
1339 | ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_2_REG, | |
1340 | &len); | |
1341 | if (ret) { | |
f57c1edc YAP |
1342 | dev_warn(adapter->dev, |
1343 | "Failed reading len from boot code\n"); | |
d930faee AK |
1344 | goto done; |
1345 | } | |
1346 | if (len) | |
1347 | break; | |
e7891ba2 | 1348 | usleep_range(10, 20); |
d930faee AK |
1349 | } |
1350 | ||
1351 | if (!len) { | |
1352 | break; | |
1353 | } else if (len > MWIFIEX_UPLD_SIZE) { | |
1354 | pr_err("FW download failure @ %d, invalid length %d\n", | |
f57c1edc | 1355 | offset, len); |
d930faee AK |
1356 | ret = -1; |
1357 | goto done; | |
1358 | } | |
1359 | ||
1360 | txlen = len; | |
1361 | ||
1362 | if (len & BIT(0)) { | |
1363 | block_retry_cnt++; | |
1364 | if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { | |
1365 | pr_err("FW download failure @ %d, over max " | |
1366 | "retry count\n", offset); | |
1367 | ret = -1; | |
1368 | goto done; | |
1369 | } | |
1370 | dev_err(adapter->dev, "FW CRC error indicated by the " | |
f57c1edc YAP |
1371 | "helper: len = 0x%04X, txlen = %d\n", |
1372 | len, txlen); | |
d930faee AK |
1373 | len &= ~BIT(0); |
1374 | /* Setting this to 0 to resend from same offset */ | |
1375 | txlen = 0; | |
1376 | } else { | |
1377 | block_retry_cnt = 0; | |
1378 | /* Set blocksize to transfer - checking for | |
1379 | last block */ | |
1380 | if (firmware_len - offset < txlen) | |
1381 | txlen = firmware_len - offset; | |
1382 | ||
1383 | dev_dbg(adapter->dev, "."); | |
1384 | ||
f57c1edc YAP |
1385 | tx_blocks = (txlen + |
1386 | MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD - 1) / | |
1387 | MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD; | |
d930faee AK |
1388 | |
1389 | /* Copy payload to buffer */ | |
1390 | memmove(skb->data, &firmware[offset], txlen); | |
1391 | } | |
1392 | ||
1393 | skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); | |
1394 | skb_trim(skb, tx_blocks * MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD); | |
1395 | ||
1396 | /* Send the boot command to device */ | |
1397 | if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { | |
f57c1edc YAP |
1398 | dev_err(adapter->dev, |
1399 | "Failed to send firmware download command\n"); | |
d930faee AK |
1400 | ret = -1; |
1401 | goto done; | |
1402 | } | |
1403 | /* Wait for the command done interrupt */ | |
1404 | do { | |
1405 | if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, | |
1406 | &ireg_intr)) { | |
1407 | dev_err(adapter->dev, "%s: Failed to read " | |
f57c1edc YAP |
1408 | "interrupt status during fw dnld.\n", |
1409 | __func__); | |
d930faee AK |
1410 | ret = -1; |
1411 | goto done; | |
1412 | } | |
1413 | } while ((ireg_intr & CPU_INTR_DOOR_BELL) == | |
1414 | CPU_INTR_DOOR_BELL); | |
1415 | offset += txlen; | |
1416 | } while (true); | |
1417 | ||
1418 | dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n", | |
f57c1edc | 1419 | offset); |
d930faee AK |
1420 | |
1421 | ret = 0; | |
1422 | ||
1423 | done: | |
1424 | dev_kfree_skb_any(skb); | |
1425 | return ret; | |
1426 | } | |
1427 | ||
1428 | /* | |
1429 | * This function checks the firmware status in card. | |
1430 | * | |
1431 | * The winner interface is also determined by this function. | |
1432 | */ | |
1433 | static int | |
1434 | mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) | |
1435 | { | |
1436 | int ret = 0; | |
1437 | u32 firmware_stat, winner_status; | |
1438 | u32 tries; | |
1439 | ||
1440 | /* Mask spurios interrupts */ | |
1441 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, | |
f57c1edc | 1442 | HOST_INTR_MASK)) { |
d930faee AK |
1443 | dev_warn(adapter->dev, "Write register failed\n"); |
1444 | return -1; | |
1445 | } | |
1446 | ||
1447 | dev_dbg(adapter->dev, "Setting driver ready signature\n"); | |
1448 | if (mwifiex_write_reg(adapter, REG_DRV_READY, FIRMWARE_READY_PCIE)) { | |
f57c1edc YAP |
1449 | dev_err(adapter->dev, |
1450 | "Failed to write driver ready signature\n"); | |
d930faee AK |
1451 | return -1; |
1452 | } | |
1453 | ||
1454 | /* Wait for firmware initialization event */ | |
1455 | for (tries = 0; tries < poll_num; tries++) { | |
1456 | if (mwifiex_read_reg(adapter, PCIE_SCRATCH_3_REG, | |
1457 | &firmware_stat)) | |
1458 | ret = -1; | |
1459 | else | |
1460 | ret = 0; | |
1461 | if (ret) | |
1462 | continue; | |
1463 | if (firmware_stat == FIRMWARE_READY_PCIE) { | |
1464 | ret = 0; | |
1465 | break; | |
1466 | } else { | |
1467 | mdelay(100); | |
1468 | ret = -1; | |
1469 | } | |
1470 | } | |
1471 | ||
1472 | if (ret) { | |
1473 | if (mwifiex_read_reg(adapter, PCIE_SCRATCH_3_REG, | |
1474 | &winner_status)) | |
1475 | ret = -1; | |
1476 | else if (!winner_status) { | |
1477 | dev_err(adapter->dev, "PCI-E is the winner\n"); | |
1478 | adapter->winner = 1; | |
1479 | ret = -1; | |
1480 | } else { | |
f57c1edc YAP |
1481 | dev_err(adapter->dev, |
1482 | "PCI-E is not the winner <%#x,%d>, exit dnld\n", | |
1483 | ret, adapter->winner); | |
d930faee AK |
1484 | ret = 0; |
1485 | } | |
1486 | } | |
1487 | ||
1488 | return ret; | |
1489 | } | |
1490 | ||
1491 | /* | |
1492 | * This function reads the interrupt status from card. | |
1493 | */ | |
1494 | static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter) | |
1495 | { | |
1496 | u32 pcie_ireg; | |
1497 | unsigned long flags; | |
1498 | ||
1499 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | |
1500 | return; | |
1501 | ||
1502 | if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) { | |
1503 | dev_warn(adapter->dev, "Read register failed\n"); | |
1504 | return; | |
1505 | } | |
1506 | ||
1507 | if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { | |
1508 | ||
1509 | mwifiex_pcie_disable_host_int(adapter); | |
1510 | ||
1511 | /* Clear the pending interrupts */ | |
1512 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, | |
1513 | ~pcie_ireg)) { | |
1514 | dev_warn(adapter->dev, "Write register failed\n"); | |
1515 | return; | |
1516 | } | |
1517 | spin_lock_irqsave(&adapter->int_lock, flags); | |
1518 | adapter->int_status |= pcie_ireg; | |
1519 | spin_unlock_irqrestore(&adapter->int_lock, flags); | |
1520 | ||
1521 | if (pcie_ireg & HOST_INTR_CMD_DONE) { | |
1522 | if ((adapter->ps_state == PS_STATE_SLEEP_CFM) || | |
1523 | (adapter->ps_state == PS_STATE_SLEEP)) { | |
1524 | mwifiex_pcie_enable_host_int(adapter); | |
1525 | if (mwifiex_write_reg(adapter, | |
f57c1edc YAP |
1526 | PCIE_CPU_INT_EVENT, |
1527 | CPU_INTR_SLEEP_CFM_DONE) | |
1528 | ) { | |
1529 | dev_warn(adapter->dev, | |
1530 | "Write register failed\n"); | |
d930faee AK |
1531 | return; |
1532 | ||
1533 | } | |
1534 | } | |
1535 | } else if (!adapter->pps_uapsd_mode && | |
1536 | adapter->ps_state == PS_STATE_SLEEP) { | |
1537 | /* Potentially for PCIe we could get other | |
1538 | * interrupts like shared. Don't change power | |
1539 | * state until cookie is set */ | |
1540 | if (mwifiex_pcie_ok_to_access_hw(adapter)) | |
1541 | adapter->ps_state = PS_STATE_AWAKE; | |
1542 | } | |
1543 | } | |
1544 | } | |
1545 | ||
1546 | /* | |
1547 | * Interrupt handler for PCIe root port | |
1548 | * | |
1549 | * This function reads the interrupt status from firmware and assigns | |
1550 | * the main process in workqueue which will handle the interrupt. | |
1551 | */ | |
1552 | static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) | |
1553 | { | |
1554 | struct pci_dev *pdev = (struct pci_dev *)context; | |
1555 | struct pcie_service_card *card; | |
1556 | struct mwifiex_adapter *adapter; | |
1557 | ||
1558 | if (!pdev) { | |
1559 | pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev); | |
1560 | goto exit; | |
1561 | } | |
1562 | ||
1563 | card = (struct pcie_service_card *) pci_get_drvdata(pdev); | |
1564 | if (!card || !card->adapter) { | |
1565 | pr_debug("info: %s: card=%p adapter=%p\n", __func__, card, | |
f57c1edc | 1566 | card ? card->adapter : NULL); |
d930faee AK |
1567 | goto exit; |
1568 | } | |
1569 | adapter = card->adapter; | |
1570 | ||
1571 | if (adapter->surprise_removed) | |
1572 | goto exit; | |
1573 | ||
1574 | mwifiex_interrupt_status(adapter); | |
1575 | queue_work(adapter->workqueue, &adapter->main_work); | |
1576 | ||
1577 | exit: | |
1578 | return IRQ_HANDLED; | |
1579 | } | |
1580 | ||
1581 | /* | |
1582 | * This function checks the current interrupt status. | |
1583 | * | |
1584 | * The following interrupts are checked and handled by this function - | |
1585 | * - Data sent | |
1586 | * - Command sent | |
1587 | * - Command received | |
1588 | * - Packets received | |
1589 | * - Events received | |
1590 | * | |
1591 | * In case of Rx packets received, the packets are uploaded from card to | |
1592 | * host and processed accordingly. | |
1593 | */ | |
1594 | static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) | |
1595 | { | |
1596 | int ret; | |
1597 | u32 pcie_ireg = 0; | |
1598 | unsigned long flags; | |
1599 | ||
1600 | spin_lock_irqsave(&adapter->int_lock, flags); | |
1601 | /* Clear out unused interrupts */ | |
1602 | adapter->int_status &= HOST_INTR_MASK; | |
1603 | spin_unlock_irqrestore(&adapter->int_lock, flags); | |
1604 | ||
1605 | while (adapter->int_status & HOST_INTR_MASK) { | |
1606 | if (adapter->int_status & HOST_INTR_DNLD_DONE) { | |
1607 | adapter->int_status &= ~HOST_INTR_DNLD_DONE; | |
1608 | if (adapter->data_sent) { | |
f57c1edc | 1609 | dev_dbg(adapter->dev, "info: DATA sent intr\n"); |
d930faee AK |
1610 | adapter->data_sent = false; |
1611 | } | |
1612 | } | |
1613 | if (adapter->int_status & HOST_INTR_UPLD_RDY) { | |
1614 | adapter->int_status &= ~HOST_INTR_UPLD_RDY; | |
1615 | dev_dbg(adapter->dev, "info: Rx DATA\n"); | |
1616 | ret = mwifiex_pcie_process_recv_data(adapter); | |
1617 | if (ret) | |
1618 | return ret; | |
1619 | } | |
1620 | if (adapter->int_status & HOST_INTR_EVENT_RDY) { | |
1621 | adapter->int_status &= ~HOST_INTR_EVENT_RDY; | |
1622 | dev_dbg(adapter->dev, "info: Rx EVENT\n"); | |
1623 | ret = mwifiex_pcie_process_event_ready(adapter); | |
1624 | if (ret) | |
1625 | return ret; | |
1626 | } | |
1627 | ||
1628 | if (adapter->int_status & HOST_INTR_CMD_DONE) { | |
1629 | adapter->int_status &= ~HOST_INTR_CMD_DONE; | |
1630 | if (adapter->cmd_sent) { | |
f57c1edc YAP |
1631 | dev_dbg(adapter->dev, |
1632 | "info: CMD sent Interrupt\n"); | |
d930faee AK |
1633 | adapter->cmd_sent = false; |
1634 | } | |
1635 | /* Handle command response */ | |
1636 | ret = mwifiex_pcie_process_cmd_complete(adapter); | |
1637 | if (ret) | |
1638 | return ret; | |
1639 | } | |
1640 | ||
1641 | if (mwifiex_pcie_ok_to_access_hw(adapter)) { | |
1642 | if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, | |
1643 | &pcie_ireg)) { | |
f57c1edc YAP |
1644 | dev_warn(adapter->dev, |
1645 | "Read register failed\n"); | |
d930faee AK |
1646 | return -1; |
1647 | } | |
1648 | ||
1649 | if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { | |
1650 | if (mwifiex_write_reg(adapter, | |
f57c1edc YAP |
1651 | PCIE_HOST_INT_STATUS, |
1652 | ~pcie_ireg)) { | |
1653 | dev_warn(adapter->dev, | |
1654 | "Write register failed\n"); | |
d930faee AK |
1655 | return -1; |
1656 | } | |
1657 | adapter->int_status |= pcie_ireg; | |
1658 | adapter->int_status &= HOST_INTR_MASK; | |
1659 | } | |
1660 | ||
1661 | } | |
1662 | } | |
1663 | dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n", | |
f57c1edc | 1664 | adapter->cmd_sent, adapter->data_sent); |
d930faee AK |
1665 | mwifiex_pcie_enable_host_int(adapter); |
1666 | ||
1667 | return 0; | |
1668 | } | |
1669 | ||
1670 | /* | |
1671 | * This function downloads data from driver to card. | |
1672 | * | |
1673 | * Both commands and data packets are transferred to the card by this | |
1674 | * function. | |
1675 | * | |
1676 | * This function adds the PCIE specific header to the front of the buffer | |
1677 | * before transferring. The header contains the length of the packet and | |
1678 | * the type. The firmware handles the packets based upon this set type. | |
1679 | */ | |
1680 | static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, | |
1681 | struct sk_buff *skb, | |
1682 | struct mwifiex_tx_param *tx_param) | |
1683 | { | |
fa161cb7 DC |
1684 | if (!skb) { |
1685 | dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__); | |
d930faee AK |
1686 | return -1; |
1687 | } | |
1688 | ||
1689 | if (type == MWIFIEX_TYPE_DATA) | |
1690 | return mwifiex_pcie_send_data(adapter, skb); | |
1691 | else if (type == MWIFIEX_TYPE_CMD) | |
1692 | return mwifiex_pcie_send_cmd(adapter, skb); | |
1693 | ||
1694 | return 0; | |
1695 | } | |
1696 | ||
1697 | /* | |
1698 | * This function initializes the PCI-E host memory space, WCB rings, etc. | |
1699 | * | |
1700 | * The following initializations steps are followed - | |
1701 | * - Allocate TXBD ring buffers | |
1702 | * - Allocate RXBD ring buffers | |
1703 | * - Allocate event BD ring buffers | |
1704 | * - Allocate command response ring buffer | |
1705 | * - Allocate sleep cookie buffer | |
1706 | */ | |
1707 | static int mwifiex_pcie_init(struct mwifiex_adapter *adapter) | |
1708 | { | |
1709 | struct pcie_service_card *card = adapter->card; | |
1710 | int ret; | |
1711 | struct pci_dev *pdev = card->dev; | |
1712 | ||
1713 | pci_set_drvdata(pdev, card); | |
1714 | ||
1715 | ret = pci_enable_device(pdev); | |
1716 | if (ret) | |
1717 | goto err_enable_dev; | |
1718 | ||
1719 | pci_set_master(pdev); | |
1720 | ||
1721 | dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n"); | |
1722 | ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | |
1723 | if (ret) { | |
1724 | dev_err(adapter->dev, "set_dma_mask(32) failed\n"); | |
1725 | goto err_set_dma_mask; | |
1726 | } | |
1727 | ||
1728 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | |
1729 | if (ret) { | |
1730 | dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n"); | |
1731 | goto err_set_dma_mask; | |
1732 | } | |
1733 | ||
1734 | ret = pci_request_region(pdev, 0, DRV_NAME); | |
1735 | if (ret) { | |
1736 | dev_err(adapter->dev, "req_reg(0) error\n"); | |
1737 | goto err_req_region0; | |
1738 | } | |
1739 | card->pci_mmap = pci_iomap(pdev, 0, 0); | |
1740 | if (!card->pci_mmap) { | |
1741 | dev_err(adapter->dev, "iomap(0) error\n"); | |
1742 | goto err_iomap0; | |
1743 | } | |
1744 | ret = pci_request_region(pdev, 2, DRV_NAME); | |
1745 | if (ret) { | |
1746 | dev_err(adapter->dev, "req_reg(2) error\n"); | |
1747 | goto err_req_region2; | |
1748 | } | |
1749 | card->pci_mmap1 = pci_iomap(pdev, 2, 0); | |
1750 | if (!card->pci_mmap1) { | |
1751 | dev_err(adapter->dev, "iomap(2) error\n"); | |
1752 | goto err_iomap2; | |
1753 | } | |
1754 | ||
f57c1edc YAP |
1755 | dev_dbg(adapter->dev, |
1756 | "PCI memory map Virt0: %p PCI memory map Virt2: %p\n", | |
1757 | card->pci_mmap, card->pci_mmap1); | |
d930faee AK |
1758 | |
1759 | card->cmdrsp_buf = NULL; | |
1760 | ret = mwifiex_pcie_create_txbd_ring(adapter); | |
1761 | if (ret) | |
1762 | goto err_cre_txbd; | |
1763 | ret = mwifiex_pcie_create_rxbd_ring(adapter); | |
1764 | if (ret) | |
1765 | goto err_cre_rxbd; | |
1766 | ret = mwifiex_pcie_create_evtbd_ring(adapter); | |
1767 | if (ret) | |
1768 | goto err_cre_evtbd; | |
1769 | ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); | |
1770 | if (ret) | |
1771 | goto err_alloc_cmdbuf; | |
1772 | ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); | |
1773 | if (ret) | |
1774 | goto err_alloc_cookie; | |
1775 | ||
1776 | return ret; | |
1777 | ||
1778 | err_alloc_cookie: | |
1779 | mwifiex_pcie_delete_cmdrsp_buf(adapter); | |
1780 | err_alloc_cmdbuf: | |
1781 | mwifiex_pcie_delete_evtbd_ring(adapter); | |
1782 | err_cre_evtbd: | |
1783 | mwifiex_pcie_delete_rxbd_ring(adapter); | |
1784 | err_cre_rxbd: | |
1785 | mwifiex_pcie_delete_txbd_ring(adapter); | |
1786 | err_cre_txbd: | |
1787 | pci_iounmap(pdev, card->pci_mmap1); | |
1788 | err_iomap2: | |
1789 | pci_release_region(pdev, 2); | |
1790 | err_req_region2: | |
1791 | pci_iounmap(pdev, card->pci_mmap); | |
1792 | err_iomap0: | |
1793 | pci_release_region(pdev, 0); | |
1794 | err_req_region0: | |
1795 | err_set_dma_mask: | |
1796 | pci_disable_device(pdev); | |
1797 | err_enable_dev: | |
1798 | pci_set_drvdata(pdev, NULL); | |
1799 | return ret; | |
1800 | } | |
1801 | ||
1802 | /* | |
1803 | * This function cleans up the allocated card buffers. | |
1804 | * | |
1805 | * The following are freed by this function - | |
1806 | * - TXBD ring buffers | |
1807 | * - RXBD ring buffers | |
1808 | * - Event BD ring buffers | |
1809 | * - Command response ring buffer | |
1810 | * - Sleep cookie buffer | |
1811 | */ | |
1812 | static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter) | |
1813 | { | |
1814 | struct pcie_service_card *card = adapter->card; | |
1815 | struct pci_dev *pdev = card->dev; | |
1816 | ||
1817 | mwifiex_pcie_delete_sleep_cookie_buf(adapter); | |
1818 | mwifiex_pcie_delete_cmdrsp_buf(adapter); | |
1819 | mwifiex_pcie_delete_evtbd_ring(adapter); | |
1820 | mwifiex_pcie_delete_rxbd_ring(adapter); | |
1821 | mwifiex_pcie_delete_txbd_ring(adapter); | |
1822 | card->cmdrsp_buf = NULL; | |
1823 | ||
1824 | dev_dbg(adapter->dev, "Clearing driver ready signature\n"); | |
1825 | if (user_rmmod) { | |
1826 | if (mwifiex_write_reg(adapter, REG_DRV_READY, 0x00000000)) | |
f57c1edc YAP |
1827 | dev_err(adapter->dev, |
1828 | "Failed to write driver not-ready signature\n"); | |
d930faee AK |
1829 | } |
1830 | ||
1831 | if (pdev) { | |
1832 | pci_iounmap(pdev, card->pci_mmap); | |
1833 | pci_iounmap(pdev, card->pci_mmap1); | |
1834 | ||
1835 | pci_release_regions(pdev); | |
1836 | pci_disable_device(pdev); | |
1837 | pci_set_drvdata(pdev, NULL); | |
1838 | } | |
1839 | } | |
1840 | ||
1841 | /* | |
1842 | * This function registers the PCIE device. | |
1843 | * | |
1844 | * PCIE IRQ is claimed, block size is set and driver data is initialized. | |
1845 | */ | |
1846 | static int mwifiex_register_dev(struct mwifiex_adapter *adapter) | |
1847 | { | |
1848 | int ret; | |
1849 | struct pcie_service_card *card = adapter->card; | |
1850 | struct pci_dev *pdev = card->dev; | |
1851 | ||
1852 | /* save adapter pointer in card */ | |
1853 | card->adapter = adapter; | |
1854 | ||
1855 | ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, | |
1856 | "MRVL_PCIE", pdev); | |
1857 | if (ret) { | |
1858 | pr_err("request_irq failed: ret=%d\n", ret); | |
1859 | adapter->card = NULL; | |
1860 | return -1; | |
1861 | } | |
1862 | ||
1863 | adapter->dev = &pdev->dev; | |
1864 | strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); | |
1865 | ||
1866 | return 0; | |
1867 | } | |
1868 | ||
1869 | /* | |
1870 | * This function unregisters the PCIE device. | |
1871 | * | |
1872 | * The PCIE IRQ is released, the function is disabled and driver | |
1873 | * data is set to null. | |
1874 | */ | |
1875 | static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) | |
1876 | { | |
1877 | struct pcie_service_card *card = adapter->card; | |
1878 | ||
1879 | if (card) { | |
1880 | dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__); | |
1881 | free_irq(card->dev->irq, card->dev); | |
1882 | } | |
1883 | } | |
1884 | ||
1885 | static struct mwifiex_if_ops pcie_ops = { | |
1886 | .init_if = mwifiex_pcie_init, | |
1887 | .cleanup_if = mwifiex_pcie_cleanup, | |
1888 | .check_fw_status = mwifiex_check_fw_status, | |
1889 | .prog_fw = mwifiex_prog_fw_w_helper, | |
1890 | .register_dev = mwifiex_register_dev, | |
1891 | .unregister_dev = mwifiex_unregister_dev, | |
1892 | .enable_int = mwifiex_pcie_enable_host_int, | |
1893 | .process_int_status = mwifiex_process_int_status, | |
1894 | .host_to_card = mwifiex_pcie_host_to_card, | |
1895 | .wakeup = mwifiex_pm_wakeup_card, | |
1896 | .wakeup_complete = mwifiex_pm_wakeup_card_complete, | |
1897 | ||
1898 | /* PCIE specific */ | |
1899 | .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, | |
1900 | .event_complete = mwifiex_pcie_event_complete, | |
1901 | .update_mp_end_port = NULL, | |
1902 | .cleanup_mpa_buf = NULL, | |
1903 | }; | |
1904 | ||
1905 | /* | |
1906 | * This function initializes the PCIE driver module. | |
1907 | * | |
1908 | * This initiates the semaphore and registers the device with | |
1909 | * PCIE bus. | |
1910 | */ | |
1911 | static int mwifiex_pcie_init_module(void) | |
1912 | { | |
1913 | int ret; | |
1914 | ||
1915 | pr_debug("Marvell 8766 PCIe Driver\n"); | |
1916 | ||
1917 | sema_init(&add_remove_card_sem, 1); | |
1918 | ||
1919 | /* Clear the flag in case user removes the card. */ | |
1920 | user_rmmod = 0; | |
1921 | ||
1922 | ret = pci_register_driver(&mwifiex_pcie); | |
1923 | if (ret) | |
1924 | pr_err("Driver register failed!\n"); | |
1925 | else | |
1926 | pr_debug("info: Driver registered successfully!\n"); | |
1927 | ||
1928 | return ret; | |
1929 | } | |
1930 | ||
1931 | /* | |
1932 | * This function cleans up the PCIE driver. | |
1933 | * | |
1934 | * The following major steps are followed for cleanup - | |
1935 | * - Resume the device if its suspended | |
1936 | * - Disconnect the device if connected | |
1937 | * - Shutdown the firmware | |
1938 | * - Unregister the device from PCIE bus. | |
1939 | */ | |
1940 | static void mwifiex_pcie_cleanup_module(void) | |
1941 | { | |
1942 | if (!down_interruptible(&add_remove_card_sem)) | |
1943 | up(&add_remove_card_sem); | |
1944 | ||
1945 | /* Set the flag as user is removing this module. */ | |
1946 | user_rmmod = 1; | |
1947 | ||
1948 | pci_unregister_driver(&mwifiex_pcie); | |
1949 | } | |
1950 | ||
1951 | module_init(mwifiex_pcie_init_module); | |
1952 | module_exit(mwifiex_pcie_cleanup_module); | |
1953 | ||
1954 | MODULE_AUTHOR("Marvell International Ltd."); | |
1955 | MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); | |
1956 | MODULE_VERSION(PCIE_VERSION); | |
1957 | MODULE_LICENSE("GPL v2"); | |
1958 | MODULE_FIRMWARE("mrvl/pcie8766_uapsta.bin"); |