mwl8k: Tell mac80211 we have rate adaptation in FW
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
CommitLineData
a66098da 1/*
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2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
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6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
3d76e82c 15#include <linux/sched.h>
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16#include <linux/spinlock.h>
17#include <linux/list.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20#include <linux/completion.h>
21#include <linux/etherdevice.h>
5a0e3ad6 22#include <linux/slab.h>
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23#include <net/mac80211.h>
24#include <linux/moduleparam.h>
25#include <linux/firmware.h>
26#include <linux/workqueue.h>
27
28#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29#define MWL8K_NAME KBUILD_MODNAME
a5fb297d 30#define MWL8K_VERSION "0.12"
a66098da 31
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32/* Module parameters */
33static unsigned ap_mode_default;
34module_param(ap_mode_default, bool, 0);
35MODULE_PARM_DESC(ap_mode_default,
36 "Set to 1 to make ap mode the default instead of sta mode");
37
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38/* Register definitions */
39#define MWL8K_HIU_GEN_PTR 0x00000c10
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40#define MWL8K_MODE_STA 0x0000005a
41#define MWL8K_MODE_AP 0x000000a5
a66098da 42#define MWL8K_HIU_INT_CODE 0x00000c14
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43#define MWL8K_FWSTA_READY 0xf0f1f2f4
44#define MWL8K_FWAP_READY 0xf1f2f4a5
45#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
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46#define MWL8K_HIU_SCRATCH 0x00000c40
47
48/* Host->device communications */
49#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
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54#define MWL8K_H2A_INT_DUMMY (1 << 20)
55#define MWL8K_H2A_INT_RESET (1 << 15)
56#define MWL8K_H2A_INT_DOORBELL (1 << 1)
57#define MWL8K_H2A_INT_PPA_READY (1 << 0)
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58
59/* Device->host communications */
60#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
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65#define MWL8K_A2H_INT_DUMMY (1 << 20)
66#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
67#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
68#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
69#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
70#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
71#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
72#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
73#define MWL8K_A2H_INT_RX_READY (1 << 1)
74#define MWL8K_A2H_INT_TX_DONE (1 << 0)
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75
76#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
77 MWL8K_A2H_INT_CHNL_SWITCHED | \
78 MWL8K_A2H_INT_QUEUE_EMPTY | \
79 MWL8K_A2H_INT_RADAR_DETECT | \
80 MWL8K_A2H_INT_RADIO_ON | \
81 MWL8K_A2H_INT_RADIO_OFF | \
82 MWL8K_A2H_INT_MAC_EVENT | \
83 MWL8K_A2H_INT_OPC_DONE | \
84 MWL8K_A2H_INT_RX_READY | \
85 MWL8K_A2H_INT_TX_DONE)
86
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87#define MWL8K_RX_QUEUES 1
88#define MWL8K_TX_QUEUES 4
89
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90struct rxd_ops {
91 int rxd_size;
92 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
93 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 94 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 95 __le16 *qos, s8 *noise);
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96};
97
45a390dd 98struct mwl8k_device_info {
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99 char *part_name;
100 char *helper_image;
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101 char *fw_image_sta;
102 char *fw_image_ap;
89a91f4f 103 struct rxd_ops *ap_rxd_ops;
952a0e96 104 u32 fw_api_ap;
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105};
106
a66098da 107struct mwl8k_rx_queue {
45eb400d 108 int rxd_count;
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109
110 /* hw receives here */
45eb400d 111 int head;
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112
113 /* refill descs here */
45eb400d 114 int tail;
a66098da 115
54bc3a0d 116 void *rxd;
45eb400d 117 dma_addr_t rxd_dma;
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118 struct {
119 struct sk_buff *skb;
53b1b3e1 120 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 121 } *buf;
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122};
123
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124struct mwl8k_tx_queue {
125 /* hw transmits here */
45eb400d 126 int head;
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127
128 /* sw appends here */
45eb400d 129 int tail;
a66098da 130
8ccbc3b8 131 unsigned int len;
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132 struct mwl8k_tx_desc *txd;
133 dma_addr_t txd_dma;
134 struct sk_buff **skb;
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135};
136
a66098da 137struct mwl8k_priv {
a66098da 138 struct ieee80211_hw *hw;
a66098da 139 struct pci_dev *pdev;
a66098da 140
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141 struct mwl8k_device_info *device_info;
142
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143 void __iomem *sram;
144 void __iomem *regs;
145
146 /* firmware */
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147 const struct firmware *fw_helper;
148 const struct firmware *fw_ucode;
a66098da 149
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150 /* hardware/firmware parameters */
151 bool ap_fw;
152 struct rxd_ops *rxd_ops;
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153 struct ieee80211_supported_band band_24;
154 struct ieee80211_channel channels_24[14];
155 struct ieee80211_rate rates_24[14];
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156 struct ieee80211_supported_band band_50;
157 struct ieee80211_channel channels_50[4];
158 struct ieee80211_rate rates_50[9];
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159 u32 ap_macids_supported;
160 u32 sta_macids_supported;
be695fc4 161
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162 /* firmware access */
163 struct mutex fw_mutex;
164 struct task_struct *fw_mutex_owner;
165 int fw_mutex_depth;
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166 struct completion *hostcmd_wait;
167
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168 /* lock held over TX and TX reap */
169 spinlock_t tx_lock;
a66098da 170
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171 /* TX quiesce completion, protected by fw_mutex and tx_lock */
172 struct completion *tx_wait;
173
f5bb87cf 174 /* List of interfaces. */
ee0ddf18 175 u32 macids_used;
f5bb87cf 176 struct list_head vif_list;
a66098da 177
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178 /* power management status cookie from firmware */
179 u32 *cookie;
180 dma_addr_t cookie_dma;
181
182 u16 num_mcaddrs;
a66098da 183 u8 hw_rev;
2aa7b01f 184 u32 fw_rev;
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185
186 /*
187 * Running count of TX packets in flight, to avoid
188 * iterating over the transmit rings each time.
189 */
190 int pending_tx_pkts;
191
192 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
193 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
194
c46563b7 195 bool radio_on;
68ce3884 196 bool radio_short_preamble;
a43c49a8 197 bool sniffer_enabled;
0439b1f5 198 bool wmm_enabled;
a66098da 199
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200 /* XXX need to convert this to handle multiple interfaces */
201 bool capture_beacon;
d89173f2 202 u8 capture_bssid[ETH_ALEN];
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203 struct sk_buff *beacon_skb;
204
205 /*
206 * This FJ worker has to be global as it is scheduled from the
207 * RX handler. At this point we don't know which interface it
208 * belongs to until the list of bssids waiting to complete join
209 * is checked.
210 */
211 struct work_struct finalize_join_worker;
212
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213 /* Tasklet to perform TX reclaim. */
214 struct tasklet_struct poll_tx_task;
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215
216 /* Tasklet to perform RX. */
217 struct tasklet_struct poll_rx_task;
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218
219 /* Most recently reported noise in dBm */
220 s8 noise;
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221
222 /*
223 * preserve the queue configurations so they can be restored if/when
224 * the firmware image is swapped.
225 */
226 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES];
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227
228 /* async firmware loading state */
229 unsigned fw_state;
230 char *fw_pref;
231 char *fw_alt;
232 struct completion firmware_loading_complete;
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233};
234
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235#define MAX_WEP_KEY_LEN 13
236#define NUM_WEP_KEYS 4
237
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238/* Per interface specific private data */
239struct mwl8k_vif {
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240 struct list_head list;
241 struct ieee80211_vif *vif;
242
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243 /* Firmware macid for this vif. */
244 int macid;
245
c2c2b12a 246 /* Non AMPDU sequence number assigned by driver. */
a680400e 247 u16 seqno;
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NS
248
249 /* Saved WEP keys */
250 struct {
251 u8 enabled;
252 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
253 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS
254
255 /* BSSID */
256 u8 bssid[ETH_ALEN];
257
258 /* A flag to indicate is HW crypto is enabled for this bssid */
259 bool is_hw_crypto_enabled;
a66098da 260};
a94cc97e 261#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 262#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 263
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264struct mwl8k_sta {
265 /* Index into station database. Returned by UPDATE_STADB. */
266 u8 peer_id;
267};
268#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
269
777ad375 270static const struct ieee80211_channel mwl8k_channels_24[] = {
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271 { .center_freq = 2412, .hw_value = 1, },
272 { .center_freq = 2417, .hw_value = 2, },
273 { .center_freq = 2422, .hw_value = 3, },
274 { .center_freq = 2427, .hw_value = 4, },
275 { .center_freq = 2432, .hw_value = 5, },
276 { .center_freq = 2437, .hw_value = 6, },
277 { .center_freq = 2442, .hw_value = 7, },
278 { .center_freq = 2447, .hw_value = 8, },
279 { .center_freq = 2452, .hw_value = 9, },
280 { .center_freq = 2457, .hw_value = 10, },
281 { .center_freq = 2462, .hw_value = 11, },
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282 { .center_freq = 2467, .hw_value = 12, },
283 { .center_freq = 2472, .hw_value = 13, },
284 { .center_freq = 2484, .hw_value = 14, },
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285};
286
777ad375 287static const struct ieee80211_rate mwl8k_rates_24[] = {
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288 { .bitrate = 10, .hw_value = 2, },
289 { .bitrate = 20, .hw_value = 4, },
290 { .bitrate = 55, .hw_value = 11, },
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291 { .bitrate = 110, .hw_value = 22, },
292 { .bitrate = 220, .hw_value = 44, },
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293 { .bitrate = 60, .hw_value = 12, },
294 { .bitrate = 90, .hw_value = 18, },
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295 { .bitrate = 120, .hw_value = 24, },
296 { .bitrate = 180, .hw_value = 36, },
297 { .bitrate = 240, .hw_value = 48, },
298 { .bitrate = 360, .hw_value = 72, },
299 { .bitrate = 480, .hw_value = 96, },
300 { .bitrate = 540, .hw_value = 108, },
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301 { .bitrate = 720, .hw_value = 144, },
302};
303
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304static const struct ieee80211_channel mwl8k_channels_50[] = {
305 { .center_freq = 5180, .hw_value = 36, },
306 { .center_freq = 5200, .hw_value = 40, },
307 { .center_freq = 5220, .hw_value = 44, },
308 { .center_freq = 5240, .hw_value = 48, },
309};
310
311static const struct ieee80211_rate mwl8k_rates_50[] = {
312 { .bitrate = 60, .hw_value = 12, },
313 { .bitrate = 90, .hw_value = 18, },
314 { .bitrate = 120, .hw_value = 24, },
315 { .bitrate = 180, .hw_value = 36, },
316 { .bitrate = 240, .hw_value = 48, },
317 { .bitrate = 360, .hw_value = 72, },
318 { .bitrate = 480, .hw_value = 96, },
319 { .bitrate = 540, .hw_value = 108, },
320 { .bitrate = 720, .hw_value = 144, },
321};
322
a66098da 323/* Set or get info from Firmware */
a66098da 324#define MWL8K_CMD_GET 0x0000
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325#define MWL8K_CMD_SET 0x0001
326#define MWL8K_CMD_SET_LIST 0x0002
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327
328/* Firmware command codes */
329#define MWL8K_CMD_CODE_DNLD 0x0001
330#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 331#define MWL8K_CMD_SET_HW_SPEC 0x0004
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332#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
333#define MWL8K_CMD_GET_STAT 0x0014
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334#define MWL8K_CMD_RADIO_CONTROL 0x001c
335#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 336#define MWL8K_CMD_TX_POWER 0x001f
08b06347 337#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 338#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
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339#define MWL8K_CMD_SET_PRE_SCAN 0x0107
340#define MWL8K_CMD_SET_POST_SCAN 0x0108
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341#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
342#define MWL8K_CMD_SET_AID 0x010d
343#define MWL8K_CMD_SET_RATE 0x0110
344#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
345#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 346#define MWL8K_CMD_SET_SLOT 0x0114
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347#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
348#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 349#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 350#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 351#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 352#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 353#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
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354#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
355#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 356#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 357#define MWL8K_CMD_UPDATE_STADB 0x1123
a66098da 358
b603742f 359static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 360{
b603742f
JL
361 u16 command = le16_to_cpu(cmd);
362
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363#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
364 snprintf(buf, bufsize, "%s", #x);\
365 return buf;\
366 } while (0)
b603742f 367 switch (command & ~0x8000) {
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368 MWL8K_CMDNAME(CODE_DNLD);
369 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 370 MWL8K_CMDNAME(SET_HW_SPEC);
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371 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
372 MWL8K_CMDNAME(GET_STAT);
373 MWL8K_CMDNAME(RADIO_CONTROL);
374 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 375 MWL8K_CMDNAME(TX_POWER);
08b06347 376 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 377 MWL8K_CMDNAME(SET_BEACON);
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378 MWL8K_CMDNAME(SET_PRE_SCAN);
379 MWL8K_CMDNAME(SET_POST_SCAN);
380 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
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381 MWL8K_CMDNAME(SET_AID);
382 MWL8K_CMDNAME(SET_RATE);
383 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
384 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 385 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
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386 MWL8K_CMDNAME(SET_EDCA_PARAMS);
387 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 388 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 389 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 390 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 391 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 392 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 393 MWL8K_CMDNAME(BSS_START);
3f5610ff 394 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 395 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 396 MWL8K_CMDNAME(UPDATE_STADB);
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397 default:
398 snprintf(buf, bufsize, "0x%x", cmd);
399 }
400#undef MWL8K_CMDNAME
401
402 return buf;
403}
404
405/* Hardware and firmware reset */
406static void mwl8k_hw_reset(struct mwl8k_priv *priv)
407{
408 iowrite32(MWL8K_H2A_INT_RESET,
409 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
410 iowrite32(MWL8K_H2A_INT_RESET,
411 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
412 msleep(20);
413}
414
415/* Release fw image */
d1f9e41d 416static void mwl8k_release_fw(const struct firmware **fw)
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LB
417{
418 if (*fw == NULL)
419 return;
420 release_firmware(*fw);
421 *fw = NULL;
422}
423
424static void mwl8k_release_firmware(struct mwl8k_priv *priv)
425{
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LB
426 mwl8k_release_fw(&priv->fw_ucode);
427 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB
428}
429
99020471
BC
430/* states for asynchronous f/w loading */
431static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
432enum {
433 FW_STATE_INIT = 0,
434 FW_STATE_LOADING_PREF,
435 FW_STATE_LOADING_ALT,
436 FW_STATE_ERROR,
437};
438
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439/* Request fw image */
440static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 441 const char *fname, const struct firmware **fw,
99020471 442 bool nowait)
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443{
444 /* release current image */
445 if (*fw != NULL)
446 mwl8k_release_fw(fw);
447
99020471
BC
448 if (nowait)
449 return request_firmware_nowait(THIS_MODULE, 1, fname,
450 &priv->pdev->dev, GFP_KERNEL,
451 priv, mwl8k_fw_state_machine);
452 else
d1f9e41d 453 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB
454}
455
99020471
BC
456static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
457 bool nowait)
a66098da 458{
a74b295e 459 struct mwl8k_device_info *di = priv->device_info;
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460 int rc;
461
a74b295e 462 if (di->helper_image != NULL) {
99020471
BC
463 if (nowait)
464 rc = mwl8k_request_fw(priv, di->helper_image,
465 &priv->fw_helper, true);
466 else
467 rc = mwl8k_request_fw(priv, di->helper_image,
468 &priv->fw_helper, false);
469 if (rc)
470 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
471 pci_name(priv->pdev), di->helper_image);
472
473 if (rc || nowait)
a74b295e 474 return rc;
a66098da
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475 }
476
99020471
BC
477 if (nowait) {
478 /*
479 * if we get here, no helper image is needed. Skip the
480 * FW_STATE_INIT state.
481 */
482 priv->fw_state = FW_STATE_LOADING_PREF;
483 rc = mwl8k_request_fw(priv, fw_image,
484 &priv->fw_ucode,
485 true);
486 } else
487 rc = mwl8k_request_fw(priv, fw_image,
488 &priv->fw_ucode, false);
a66098da 489 if (rc) {
c2c357ce 490 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 491 pci_name(priv->pdev), fw_image);
22be40d9 492 mwl8k_release_fw(&priv->fw_helper);
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493 return rc;
494 }
495
496 return 0;
497}
498
499struct mwl8k_cmd_pkt {
500 __le16 code;
501 __le16 length;
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502 __u8 seq_num;
503 __u8 macid;
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504 __le16 result;
505 char payload[0];
ba2d3587 506} __packed;
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507
508/*
509 * Firmware loading.
510 */
511static int
512mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
513{
514 void __iomem *regs = priv->regs;
515 dma_addr_t dma_addr;
a66098da
LB
516 int loops;
517
518 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
519 if (pci_dma_mapping_error(priv->pdev, dma_addr))
520 return -ENOMEM;
521
522 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
523 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
524 iowrite32(MWL8K_H2A_INT_DOORBELL,
525 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
526 iowrite32(MWL8K_H2A_INT_DUMMY,
527 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
528
a66098da
LB
529 loops = 1000;
530 do {
531 u32 int_code;
532
533 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
534 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
535 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB
536 break;
537 }
538
3d76e82c 539 cond_resched();
a66098da
LB
540 udelay(1);
541 } while (--loops);
542
543 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
544
d4b70570 545 return loops ? 0 : -ETIMEDOUT;
a66098da
LB
546}
547
548static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
549 const u8 *data, size_t length)
550{
551 struct mwl8k_cmd_pkt *cmd;
552 int done;
553 int rc = 0;
554
555 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
556 if (cmd == NULL)
557 return -ENOMEM;
558
559 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
560 cmd->seq_num = 0;
f57ca9c1 561 cmd->macid = 0;
a66098da
LB
562 cmd->result = 0;
563
564 done = 0;
565 while (length) {
566 int block_size = length > 256 ? 256 : length;
567
568 memcpy(cmd->payload, data + done, block_size);
569 cmd->length = cpu_to_le16(block_size);
570
571 rc = mwl8k_send_fw_load_cmd(priv, cmd,
572 sizeof(*cmd) + block_size);
573 if (rc)
574 break;
575
576 done += block_size;
577 length -= block_size;
578 }
579
580 if (!rc) {
581 cmd->length = 0;
582 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
583 }
584
585 kfree(cmd);
586
587 return rc;
588}
589
590static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
591 const u8 *data, size_t length)
592{
593 unsigned char *buffer;
594 int may_continue, rc = 0;
595 u32 done, prev_block_size;
596
597 buffer = kmalloc(1024, GFP_KERNEL);
598 if (buffer == NULL)
599 return -ENOMEM;
600
601 done = 0;
602 prev_block_size = 0;
603 may_continue = 1000;
604 while (may_continue > 0) {
605 u32 block_size;
606
607 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
608 if (block_size & 1) {
609 block_size &= ~1;
610 may_continue--;
611 } else {
612 done += prev_block_size;
613 length -= prev_block_size;
614 }
615
616 if (block_size > 1024 || block_size > length) {
617 rc = -EOVERFLOW;
618 break;
619 }
620
621 if (length == 0) {
622 rc = 0;
623 break;
624 }
625
626 if (block_size == 0) {
627 rc = -EPROTO;
628 may_continue--;
629 udelay(1);
630 continue;
631 }
632
633 prev_block_size = block_size;
634 memcpy(buffer, data + done, block_size);
635
636 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
637 if (rc)
638 break;
639 }
640
641 if (!rc && length != 0)
642 rc = -EREMOTEIO;
643
644 kfree(buffer);
645
646 return rc;
647}
648
c2c357ce 649static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 650{
c2c357ce 651 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 652 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB
653 int rc;
654 int loops;
655
656 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 657 const struct firmware *helper = priv->fw_helper;
a66098da 658
c2c357ce
LB
659 if (helper == NULL) {
660 printk(KERN_ERR "%s: helper image needed but none "
661 "given\n", pci_name(priv->pdev));
662 return -EINVAL;
663 }
a66098da 664
c2c357ce 665 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB
666 if (rc) {
667 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 668 "helper image\n", pci_name(priv->pdev));
a66098da
LB
669 return rc;
670 }
89b872e2 671 msleep(5);
a66098da 672
c2c357ce 673 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 674 } else {
c2c357ce 675 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB
676 }
677
678 if (rc) {
c2c357ce
LB
679 printk(KERN_ERR "%s: unable to load firmware image\n",
680 pci_name(priv->pdev));
a66098da
LB
681 return rc;
682 }
683
89a91f4f 684 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 685
89b872e2 686 loops = 500000;
a66098da 687 do {
eae74e65
LB
688 u32 ready_code;
689
690 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
691 if (ready_code == MWL8K_FWAP_READY) {
692 priv->ap_fw = 1;
693 break;
694 } else if (ready_code == MWL8K_FWSTA_READY) {
695 priv->ap_fw = 0;
a66098da 696 break;
eae74e65
LB
697 }
698
699 cond_resched();
a66098da
LB
700 udelay(1);
701 } while (--loops);
702
703 return loops ? 0 : -ETIMEDOUT;
704}
705
706
a66098da
LB
707/* DMA header used by firmware and hardware. */
708struct mwl8k_dma_data {
709 __le16 fwlen;
710 struct ieee80211_hdr wh;
20f09c3d 711 char data[0];
ba2d3587 712} __packed;
a66098da
LB
713
714/* Routines to add/remove DMA header from skb. */
20f09c3d 715static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 716{
20f09c3d
LB
717 struct mwl8k_dma_data *tr;
718 int hdrlen;
719
720 tr = (struct mwl8k_dma_data *)skb->data;
721 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
722
723 if (hdrlen != sizeof(tr->wh)) {
724 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
725 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
726 *((__le16 *)(tr->data - 2)) = qos;
727 } else {
728 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
729 }
a66098da 730 }
20f09c3d
LB
731
732 if (hdrlen != sizeof(*tr))
733 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB
734}
735
252486a1
NS
736static void
737mwl8k_add_dma_header(struct sk_buff *skb, int tail_pad)
a66098da
LB
738{
739 struct ieee80211_hdr *wh;
ca009301 740 int hdrlen;
252486a1 741 int reqd_hdrlen;
a66098da
LB
742 struct mwl8k_dma_data *tr;
743
ca009301
LB
744 /*
745 * Add a firmware DMA header; the firmware requires that we
746 * present a 2-byte payload length followed by a 4-address
747 * header (without QoS field), followed (optionally) by any
748 * WEP/ExtIV header (but only filled in for CCMP).
749 */
a66098da 750 wh = (struct ieee80211_hdr *)skb->data;
ca009301 751
a66098da 752 hdrlen = ieee80211_hdrlen(wh->frame_control);
252486a1
NS
753 reqd_hdrlen = sizeof(*tr);
754
755 if (hdrlen != reqd_hdrlen)
756 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 757
ca009301 758 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 759 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB
760
761 tr = (struct mwl8k_dma_data *)skb->data;
762 if (wh != &tr->wh)
763 memmove(&tr->wh, wh, hdrlen);
ca009301
LB
764 if (hdrlen != sizeof(tr->wh))
765 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB
766
767 /*
768 * Firmware length is the length of the fully formed "802.11
769 * payload". That is, everything except for the 802.11 header.
770 * This includes all crypto material including the MIC.
771 */
252486a1 772 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB
773}
774
e53d9b96
NS
775static void mwl8k_encapsulate_tx_frame(struct sk_buff *skb)
776{
777 struct ieee80211_hdr *wh;
778 struct ieee80211_tx_info *tx_info;
779 struct ieee80211_key_conf *key_conf;
780 int data_pad;
781
782 wh = (struct ieee80211_hdr *)skb->data;
783
784 tx_info = IEEE80211_SKB_CB(skb);
785
786 key_conf = NULL;
787 if (ieee80211_is_data(wh->frame_control))
788 key_conf = tx_info->control.hw_key;
789
790 /*
791 * Make sure the packet header is in the DMA header format (4-address
792 * without QoS), the necessary crypto padding between the header and the
793 * payload has already been provided by mac80211, but it doesn't add tail
794 * padding when HW crypto is enabled.
795 *
796 * We have the following trailer padding requirements:
797 * - WEP: 4 trailer bytes (ICV)
798 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
799 * - CCMP: 8 trailer bytes (MIC)
800 */
801 data_pad = 0;
802 if (key_conf != NULL) {
803 switch (key_conf->cipher) {
804 case WLAN_CIPHER_SUITE_WEP40:
805 case WLAN_CIPHER_SUITE_WEP104:
806 data_pad = 4;
807 break;
808 case WLAN_CIPHER_SUITE_TKIP:
809 data_pad = 12;
810 break;
811 case WLAN_CIPHER_SUITE_CCMP:
812 data_pad = 8;
813 break;
814 }
815 }
816 mwl8k_add_dma_header(skb, data_pad);
817}
a66098da
LB
818
819/*
89a91f4f 820 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 821 */
89a91f4f 822struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB
823 __le16 pkt_len;
824 __u8 sq2;
825 __u8 rate;
826 __le32 pkt_phys_addr;
827 __le32 next_rxd_phys_addr;
828 __le16 qos_control;
829 __le16 htsig2;
830 __le32 hw_rssi_info;
831 __le32 hw_noise_floor_info;
832 __u8 noise_floor;
833 __u8 pad0[3];
834 __u8 rssi;
835 __u8 rx_status;
836 __u8 channel;
837 __u8 rx_ctrl;
ba2d3587 838} __packed;
6f6d1e9a 839
89a91f4f
LB
840#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
841#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
842#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 843
89a91f4f 844#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 845
d9a07d49
NS
846/* 8366 AP rx_status bits */
847#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
848#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
849#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
850#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
851#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
852
89a91f4f 853static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 854{
89a91f4f 855 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB
856
857 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 858 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB
859}
860
89a91f4f 861static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 862{
89a91f4f 863 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB
864
865 rxd->pkt_len = cpu_to_le16(len);
866 rxd->pkt_phys_addr = cpu_to_le32(addr);
867 wmb();
868 rxd->rx_ctrl = 0;
869}
870
871static int
89a91f4f 872mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 873 __le16 *qos, s8 *noise)
6f6d1e9a 874{
89a91f4f 875 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 876
89a91f4f 877 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB
878 return -1;
879 rmb();
880
881 memset(status, 0, sizeof(*status));
882
883 status->signal = -rxd->rssi;
0d462bbb 884 *noise = -rxd->noise_floor;
6f6d1e9a 885
89a91f4f 886 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 887 status->flag |= RX_FLAG_HT;
89a91f4f 888 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 889 status->flag |= RX_FLAG_40MHZ;
89a91f4f 890 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB
891 } else {
892 int i;
893
777ad375
LB
894 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
895 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB
896 status->rate_idx = i;
897 break;
898 }
899 }
900 }
901
85478344
LB
902 if (rxd->channel > 14) {
903 status->band = IEEE80211_BAND_5GHZ;
904 if (!(status->flag & RX_FLAG_HT))
905 status->rate_idx -= 5;
906 } else {
907 status->band = IEEE80211_BAND_2GHZ;
908 }
59eb21a6
BR
909 status->freq = ieee80211_channel_to_frequency(rxd->channel,
910 status->band);
6f6d1e9a 911
20f09c3d
LB
912 *qos = rxd->qos_control;
913
d9a07d49
NS
914 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
915 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
916 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
917 status->flag |= RX_FLAG_MMIC_ERROR;
918
6f6d1e9a
LB
919 return le16_to_cpu(rxd->pkt_len);
920}
921
89a91f4f
LB
922static struct rxd_ops rxd_8366_ap_ops = {
923 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
924 .rxd_init = mwl8k_rxd_8366_ap_init,
925 .rxd_refill = mwl8k_rxd_8366_ap_refill,
926 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB
927};
928
929/*
89a91f4f 930 * Packet reception for STA firmware.
a66098da 931 */
89a91f4f 932struct mwl8k_rxd_sta {
a66098da
LB
933 __le16 pkt_len;
934 __u8 link_quality;
935 __u8 noise_level;
936 __le32 pkt_phys_addr;
45eb400d 937 __le32 next_rxd_phys_addr;
a66098da
LB
938 __le16 qos_control;
939 __le16 rate_info;
940 __le32 pad0[4];
941 __u8 rssi;
942 __u8 channel;
943 __le16 pad1;
944 __u8 rx_ctrl;
945 __u8 rx_status;
946 __u8 pad2[2];
ba2d3587 947} __packed;
a66098da 948
89a91f4f
LB
949#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
950#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
951#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
952#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
953#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
954#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 955
89a91f4f 956#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS
957#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
958/* ICV=0 or MIC=1 */
959#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
960/* Key is uploaded only in failure case */
961#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 962
89a91f4f 963static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 964{
89a91f4f 965 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB
966
967 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 968 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB
969}
970
89a91f4f 971static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 972{
89a91f4f 973 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB
974
975 rxd->pkt_len = cpu_to_le16(len);
976 rxd->pkt_phys_addr = cpu_to_le32(addr);
977 wmb();
978 rxd->rx_ctrl = 0;
979}
980
981static int
89a91f4f 982mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 983 __le16 *qos, s8 *noise)
54bc3a0d 984{
89a91f4f 985 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB
986 u16 rate_info;
987
89a91f4f 988 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB
989 return -1;
990 rmb();
991
992 rate_info = le16_to_cpu(rxd->rate_info);
993
994 memset(status, 0, sizeof(*status));
995
996 status->signal = -rxd->rssi;
0d462bbb 997 *noise = -rxd->noise_level;
89a91f4f
LB
998 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
999 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1000
89a91f4f 1001 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1002 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1003 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1004 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1005 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1006 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1007 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB
1008 status->flag |= RX_FLAG_HT;
1009
85478344
LB
1010 if (rxd->channel > 14) {
1011 status->band = IEEE80211_BAND_5GHZ;
1012 if (!(status->flag & RX_FLAG_HT))
1013 status->rate_idx -= 5;
1014 } else {
1015 status->band = IEEE80211_BAND_2GHZ;
1016 }
59eb21a6
BR
1017 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1018 status->band);
54bc3a0d 1019
20f09c3d 1020 *qos = rxd->qos_control;
d9a07d49
NS
1021 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1022 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1023 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1024
54bc3a0d
LB
1025 return le16_to_cpu(rxd->pkt_len);
1026}
1027
89a91f4f
LB
1028static struct rxd_ops rxd_sta_ops = {
1029 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1030 .rxd_init = mwl8k_rxd_sta_init,
1031 .rxd_refill = mwl8k_rxd_sta_refill,
1032 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB
1033};
1034
1035
a66098da
LB
1036#define MWL8K_RX_DESCS 256
1037#define MWL8K_RX_MAXSZ 3800
1038
1039static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1040{
1041 struct mwl8k_priv *priv = hw->priv;
1042 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1043 int size;
1044 int i;
1045
45eb400d
LB
1046 rxq->rxd_count = 0;
1047 rxq->head = 0;
1048 rxq->tail = 0;
a66098da 1049
54bc3a0d 1050 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1051
45eb400d
LB
1052 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1053 if (rxq->rxd == NULL) {
5db55844 1054 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB
1055 return -ENOMEM;
1056 }
45eb400d 1057 memset(rxq->rxd, 0, size);
a66098da 1058
788838eb
LB
1059 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
1060 if (rxq->buf == NULL) {
5db55844 1061 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1062 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB
1063 return -ENOMEM;
1064 }
788838eb 1065 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
a66098da
LB
1066
1067 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB
1068 int desc_size;
1069 void *rxd;
a66098da 1070 int nexti;
54bc3a0d
LB
1071 dma_addr_t next_dma_addr;
1072
1073 desc_size = priv->rxd_ops->rxd_size;
1074 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1075
54bc3a0d
LB
1076 nexti = i + 1;
1077 if (nexti == MWL8K_RX_DESCS)
1078 nexti = 0;
1079 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1080
54bc3a0d 1081 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB
1082 }
1083
1084 return 0;
1085}
1086
1087static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1088{
1089 struct mwl8k_priv *priv = hw->priv;
1090 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1091 int refilled;
1092
1093 refilled = 0;
45eb400d 1094 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1095 struct sk_buff *skb;
788838eb 1096 dma_addr_t addr;
a66098da 1097 int rx;
54bc3a0d 1098 void *rxd;
a66098da
LB
1099
1100 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1101 if (skb == NULL)
1102 break;
1103
788838eb
LB
1104 addr = pci_map_single(priv->pdev, skb->data,
1105 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1106
54bc3a0d
LB
1107 rxq->rxd_count++;
1108 rx = rxq->tail++;
1109 if (rxq->tail == MWL8K_RX_DESCS)
1110 rxq->tail = 0;
788838eb 1111 rxq->buf[rx].skb = skb;
53b1b3e1 1112 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB
1113
1114 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1115 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB
1116
1117 refilled++;
1118 }
1119
1120 return refilled;
1121}
1122
1123/* Must be called only when the card's reception is completely halted */
1124static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1125{
1126 struct mwl8k_priv *priv = hw->priv;
1127 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1128 int i;
1129
1130 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB
1131 if (rxq->buf[i].skb != NULL) {
1132 pci_unmap_single(priv->pdev,
53b1b3e1 1133 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1134 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1135 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB
1136
1137 kfree_skb(rxq->buf[i].skb);
1138 rxq->buf[i].skb = NULL;
a66098da
LB
1139 }
1140 }
1141
788838eb
LB
1142 kfree(rxq->buf);
1143 rxq->buf = NULL;
a66098da
LB
1144
1145 pci_free_consistent(priv->pdev,
54bc3a0d 1146 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB
1147 rxq->rxd, rxq->rxd_dma);
1148 rxq->rxd = NULL;
a66098da
LB
1149}
1150
1151
1152/*
1153 * Scan a list of BSSIDs to process for finalize join.
1154 * Allows for extension to process multiple BSSIDs.
1155 */
1156static inline int
1157mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1158{
1159 return priv->capture_beacon &&
1160 ieee80211_is_beacon(wh->frame_control) &&
1161 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1162}
1163
3779752d
LB
1164static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1165 struct sk_buff *skb)
a66098da 1166{
3779752d
LB
1167 struct mwl8k_priv *priv = hw->priv;
1168
a66098da 1169 priv->capture_beacon = false;
d89173f2 1170 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB
1171
1172 /*
1173 * Use GFP_ATOMIC as rxq_process is called from
1174 * the primary interrupt handler, memory allocation call
1175 * must not sleep.
1176 */
1177 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1178 if (priv->beacon_skb != NULL)
3779752d 1179 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB
1180}
1181
d9a07d49
NS
1182static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1183 u8 *bssid)
1184{
1185 struct mwl8k_vif *mwl8k_vif;
1186
1187 list_for_each_entry(mwl8k_vif,
1188 vif_list, list) {
1189 if (memcmp(bssid, mwl8k_vif->bssid,
1190 ETH_ALEN) == 0)
1191 return mwl8k_vif;
1192 }
1193
1194 return NULL;
1195}
1196
a66098da
LB
1197static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1198{
1199 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1200 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB
1201 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1202 int processed;
1203
1204 processed = 0;
45eb400d 1205 while (rxq->rxd_count && limit--) {
a66098da 1206 struct sk_buff *skb;
54bc3a0d
LB
1207 void *rxd;
1208 int pkt_len;
a66098da 1209 struct ieee80211_rx_status status;
d9a07d49 1210 struct ieee80211_hdr *wh;
20f09c3d 1211 __le16 qos;
a66098da 1212
788838eb 1213 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB
1214 if (skb == NULL)
1215 break;
54bc3a0d
LB
1216
1217 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1218
0d462bbb
JL
1219 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1220 &priv->noise);
54bc3a0d
LB
1221 if (pkt_len < 0)
1222 break;
1223
788838eb
LB
1224 rxq->buf[rxq->head].skb = NULL;
1225
1226 pci_unmap_single(priv->pdev,
53b1b3e1 1227 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1228 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1229 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1230
54bc3a0d
LB
1231 rxq->head++;
1232 if (rxq->head == MWL8K_RX_DESCS)
1233 rxq->head = 0;
1234
45eb400d 1235 rxq->rxd_count--;
a66098da 1236
d9a07d49 1237 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1238
a66098da 1239 /*
c2c357ce
LB
1240 * Check for a pending join operation. Save a
1241 * copy of the beacon and schedule a tasklet to
1242 * send a FINALIZE_JOIN command to the firmware.
a66098da 1243 */
54bc3a0d 1244 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1245 mwl8k_save_beacon(hw, skb);
a66098da 1246
d9a07d49
NS
1247 if (ieee80211_has_protected(wh->frame_control)) {
1248
1249 /* Check if hw crypto has been enabled for
1250 * this bss. If yes, set the status flags
1251 * accordingly
1252 */
1253 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1254 wh->addr1);
1255
1256 if (mwl8k_vif != NULL &&
1257 mwl8k_vif->is_hw_crypto_enabled == true) {
1258 /*
1259 * When MMIC ERROR is encountered
1260 * by the firmware, payload is
1261 * dropped and only 32 bytes of
1262 * mwl8k Firmware header is sent
1263 * to the host.
1264 *
1265 * We need to add four bytes of
1266 * key information. In it
1267 * MAC80211 expects keyidx set to
1268 * 0 for triggering Counter
1269 * Measure of MMIC failure.
1270 */
1271 if (status.flag & RX_FLAG_MMIC_ERROR) {
1272 struct mwl8k_dma_data *tr;
1273 tr = (struct mwl8k_dma_data *)skb->data;
1274 memset((void *)&(tr->data), 0, 4);
1275 pkt_len += 4;
1276 }
1277
1278 if (!ieee80211_is_auth(wh->frame_control))
1279 status.flag |= RX_FLAG_IV_STRIPPED |
1280 RX_FLAG_DECRYPTED |
1281 RX_FLAG_MMIC_STRIPPED;
1282 }
1283 }
1284
1285 skb_put(skb, pkt_len);
1286 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB
1287 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1288 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB
1289
1290 processed++;
1291 }
1292
1293 return processed;
1294}
1295
1296
1297/*
1298 * Packet transmission.
1299 */
1300
a66098da
LB
1301#define MWL8K_TXD_STATUS_OK 0x00000001
1302#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1303#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1304#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1305#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1306
e0493a8d
LB
1307#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1308#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1309#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1310#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1311#define MWL8K_QOS_EOSP 0x0010
1312
a66098da
LB
1313struct mwl8k_tx_desc {
1314 __le32 status;
1315 __u8 data_rate;
1316 __u8 tx_priority;
1317 __le16 qos_control;
1318 __le32 pkt_phys_addr;
1319 __le16 pkt_len;
d89173f2 1320 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1321 __le32 next_txd_phys_addr;
a66098da
LB
1322 __le32 reserved;
1323 __le16 rate_info;
1324 __u8 peer_id;
a1fe24b0 1325 __u8 tx_frag_cnt;
ba2d3587 1326} __packed;
a66098da
LB
1327
1328#define MWL8K_TX_DESCS 128
1329
1330static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1331{
1332 struct mwl8k_priv *priv = hw->priv;
1333 struct mwl8k_tx_queue *txq = priv->txq + index;
1334 int size;
1335 int i;
1336
8ccbc3b8 1337 txq->len = 0;
45eb400d
LB
1338 txq->head = 0;
1339 txq->tail = 0;
a66098da
LB
1340
1341 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1342
45eb400d
LB
1343 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1344 if (txq->txd == NULL) {
5db55844 1345 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB
1346 return -ENOMEM;
1347 }
45eb400d 1348 memset(txq->txd, 0, size);
a66098da 1349
45eb400d
LB
1350 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1351 if (txq->skb == NULL) {
5db55844 1352 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1353 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB
1354 return -ENOMEM;
1355 }
45eb400d 1356 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
a66098da
LB
1357
1358 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1359 struct mwl8k_tx_desc *tx_desc;
1360 int nexti;
1361
45eb400d 1362 tx_desc = txq->txd + i;
a66098da
LB
1363 nexti = (i + 1) % MWL8K_TX_DESCS;
1364
1365 tx_desc->status = 0;
45eb400d
LB
1366 tx_desc->next_txd_phys_addr =
1367 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB
1368 }
1369
1370 return 0;
1371}
1372
1373static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1374{
1375 iowrite32(MWL8K_H2A_INT_PPA_READY,
1376 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1377 iowrite32(MWL8K_H2A_INT_DUMMY,
1378 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1379 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1380}
1381
7e1112d3 1382static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1383{
7e1112d3
LB
1384 struct mwl8k_priv *priv = hw->priv;
1385 int i;
1386
1387 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1388 struct mwl8k_tx_queue *txq = priv->txq + i;
1389 int fw_owned = 0;
1390 int drv_owned = 0;
1391 int unused = 0;
1392 int desc;
1393
a66098da 1394 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB
1395 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1396 u32 status;
a66098da 1397
7e1112d3 1398 status = le32_to_cpu(tx_desc->status);
a66098da 1399 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1400 fw_owned++;
a66098da 1401 else
7e1112d3 1402 drv_owned++;
a66098da
LB
1403
1404 if (tx_desc->pkt_len == 0)
7e1112d3 1405 unused++;
a66098da 1406 }
a66098da 1407
c96c31e4
JP
1408 wiphy_err(hw->wiphy,
1409 "txq[%d] len=%d head=%d tail=%d "
1410 "fw_owned=%d drv_owned=%d unused=%d\n",
1411 i,
1412 txq->len, txq->head, txq->tail,
1413 fw_owned, drv_owned, unused);
7e1112d3 1414 }
a66098da
LB
1415}
1416
618952a7 1417/*
88de754a 1418 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1419 */
62abd3cf 1420#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1421
950d5b01 1422static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1423{
a66098da 1424 struct mwl8k_priv *priv = hw->priv;
88de754a 1425 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB
1426 int retry;
1427 int rc;
a66098da
LB
1428
1429 might_sleep();
1430
7e1112d3
LB
1431 /*
1432 * The TX queues are stopped at this point, so this test
1433 * doesn't need to take ->tx_lock.
1434 */
1435 if (!priv->pending_tx_pkts)
1436 return 0;
1437
1438 retry = 0;
1439 rc = 0;
1440
a66098da 1441 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB
1442 priv->tx_wait = &tx_wait;
1443 while (!rc) {
1444 int oldcount;
1445 unsigned long timeout;
a66098da 1446
7e1112d3 1447 oldcount = priv->pending_tx_pkts;
a66098da 1448
7e1112d3 1449 spin_unlock_bh(&priv->tx_lock);
88de754a 1450 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1451 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
a66098da 1452 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB
1453
1454 if (timeout) {
1455 WARN_ON(priv->pending_tx_pkts);
1456 if (retry) {
c96c31e4 1457 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB
1458 }
1459 break;
1460 }
1461
1462 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP
1463 wiphy_notice(hw->wiphy,
1464 "waiting for tx rings to drain (%d -> %d pkts)\n",
1465 oldcount, priv->pending_tx_pkts);
7e1112d3
LB
1466 retry = 1;
1467 continue;
1468 }
1469
a66098da 1470 priv->tx_wait = NULL;
a66098da 1471
c96c31e4
JP
1472 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1473 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3
LB
1474 mwl8k_dump_tx_rings(hw);
1475
1476 rc = -ETIMEDOUT;
a66098da 1477 }
7e1112d3 1478 spin_unlock_bh(&priv->tx_lock);
a66098da 1479
7e1112d3 1480 return rc;
a66098da
LB
1481}
1482
c23b5a69
LB
1483#define MWL8K_TXD_SUCCESS(status) \
1484 ((status) & (MWL8K_TXD_STATUS_OK | \
1485 MWL8K_TXD_STATUS_OK_RETRY | \
1486 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1487
efb7c49a
LB
1488static int
1489mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB
1490{
1491 struct mwl8k_priv *priv = hw->priv;
1492 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1493 int processed;
a66098da 1494
efb7c49a 1495 processed = 0;
8ccbc3b8 1496 while (txq->len > 0 && limit--) {
a66098da 1497 int tx;
a66098da
LB
1498 struct mwl8k_tx_desc *tx_desc;
1499 unsigned long addr;
ce9e2e1b 1500 int size;
a66098da
LB
1501 struct sk_buff *skb;
1502 struct ieee80211_tx_info *info;
1503 u32 status;
1504
45eb400d
LB
1505 tx = txq->head;
1506 tx_desc = txq->txd + tx;
a66098da
LB
1507
1508 status = le32_to_cpu(tx_desc->status);
1509
1510 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1511 if (!force)
1512 break;
1513 tx_desc->status &=
1514 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1515 }
1516
45eb400d 1517 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV
1518 BUG_ON(txq->len == 0);
1519 txq->len--;
a66098da
LB
1520 priv->pending_tx_pkts--;
1521
1522 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1523 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB
1524 skb = txq->skb[tx];
1525 txq->skb[tx] = NULL;
a66098da
LB
1526
1527 BUG_ON(skb == NULL);
1528 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1529
20f09c3d 1530 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da
LB
1531
1532 /* Mark descriptor as unused */
1533 tx_desc->pkt_phys_addr = 0;
1534 tx_desc->pkt_len = 0;
1535
a66098da
LB
1536 info = IEEE80211_SKB_CB(skb);
1537 ieee80211_tx_info_clear_status(info);
0bf22c37
NS
1538
1539 /* Rate control is happening in the firmware.
1540 * Ensure no tx rate is being reported.
1541 */
1542 info->status.rates[0].idx = -1;
1543 info->status.rates[0].count = 1;
1544
ce9e2e1b 1545 if (MWL8K_TXD_SUCCESS(status))
a66098da 1546 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB
1547
1548 ieee80211_tx_status_irqsafe(hw, skb);
1549
efb7c49a 1550 processed++;
a66098da
LB
1551 }
1552
efb7c49a 1553 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
a66098da 1554 ieee80211_wake_queue(hw, index);
efb7c49a
LB
1555
1556 return processed;
a66098da
LB
1557}
1558
1559/* must be called only when the card's transmit is completely halted */
1560static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1561{
1562 struct mwl8k_priv *priv = hw->priv;
1563 struct mwl8k_tx_queue *txq = priv->txq + index;
1564
efb7c49a 1565 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1566
45eb400d
LB
1567 kfree(txq->skb);
1568 txq->skb = NULL;
a66098da
LB
1569
1570 pci_free_consistent(priv->pdev,
1571 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB
1572 txq->txd, txq->txd_dma);
1573 txq->txd = NULL;
a66098da
LB
1574}
1575
1576static int
1577mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1578{
1579 struct mwl8k_priv *priv = hw->priv;
1580 struct ieee80211_tx_info *tx_info;
23b33906 1581 struct mwl8k_vif *mwl8k_vif;
a66098da
LB
1582 struct ieee80211_hdr *wh;
1583 struct mwl8k_tx_queue *txq;
1584 struct mwl8k_tx_desc *tx;
a66098da 1585 dma_addr_t dma;
23b33906
LB
1586 u32 txstatus;
1587 u8 txdatarate;
1588 u16 qos;
a66098da 1589
23b33906
LB
1590 wh = (struct ieee80211_hdr *)skb->data;
1591 if (ieee80211_is_data_qos(wh->frame_control))
1592 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1593 else
1594 qos = 0;
a66098da 1595
d9a07d49
NS
1596 if (priv->ap_fw)
1597 mwl8k_encapsulate_tx_frame(skb);
1598 else
1599 mwl8k_add_dma_header(skb, 0);
1600
23b33906 1601 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB
1602
1603 tx_info = IEEE80211_SKB_CB(skb);
1604 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB
1605
1606 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1607 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB
1608 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1609 mwl8k_vif->seqno += 0x10;
a66098da
LB
1610 }
1611
23b33906
LB
1612 /* Setup firmware control bit fields for each frame type. */
1613 txstatus = 0;
1614 txdatarate = 0;
1615 if (ieee80211_is_mgmt(wh->frame_control) ||
1616 ieee80211_is_ctl(wh->frame_control)) {
1617 txdatarate = 0;
e0493a8d 1618 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB
1619 } else if (ieee80211_is_data(wh->frame_control)) {
1620 txdatarate = 1;
1621 if (is_multicast_ether_addr(wh->addr1))
1622 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1623
e0493a8d 1624 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1625 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1626 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1627 else
e0493a8d 1628 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1629 }
a66098da
LB
1630
1631 dma = pci_map_single(priv->pdev, skb->data,
1632 skb->len, PCI_DMA_TODEVICE);
1633
1634 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP
1635 wiphy_debug(hw->wiphy,
1636 "failed to dma map skb, dropping TX frame.\n");
23b33906 1637 dev_kfree_skb(skb);
a66098da
LB
1638 return NETDEV_TX_OK;
1639 }
1640
23b33906 1641 spin_lock_bh(&priv->tx_lock);
a66098da 1642
23b33906 1643 txq = priv->txq + index;
a66098da 1644
45eb400d
LB
1645 BUG_ON(txq->skb[txq->tail] != NULL);
1646 txq->skb[txq->tail] = skb;
a66098da 1647
45eb400d 1648 tx = txq->txd + txq->tail;
23b33906
LB
1649 tx->data_rate = txdatarate;
1650 tx->tx_priority = index;
a66098da 1651 tx->qos_control = cpu_to_le16(qos);
a66098da
LB
1652 tx->pkt_phys_addr = cpu_to_le32(dma);
1653 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 1654 tx->rate_info = 0;
a680400e
LB
1655 if (!priv->ap_fw && tx_info->control.sta != NULL)
1656 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1657 else
1658 tx->peer_id = 0;
a66098da 1659 wmb();
23b33906
LB
1660 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1661
8ccbc3b8 1662 txq->len++;
a66098da 1663 priv->pending_tx_pkts++;
a66098da 1664
45eb400d
LB
1665 txq->tail++;
1666 if (txq->tail == MWL8K_TX_DESCS)
1667 txq->tail = 0;
23b33906 1668
45eb400d 1669 if (txq->head == txq->tail)
a66098da
LB
1670 ieee80211_stop_queue(hw, index);
1671
23b33906 1672 mwl8k_tx_start(priv);
a66098da
LB
1673
1674 spin_unlock_bh(&priv->tx_lock);
1675
1676 return NETDEV_TX_OK;
1677}
1678
1679
618952a7
LB
1680/*
1681 * Firmware access.
1682 *
1683 * We have the following requirements for issuing firmware commands:
1684 * - Some commands require that the packet transmit path is idle when
1685 * the command is issued. (For simplicity, we'll just quiesce the
1686 * transmit path for every command.)
1687 * - There are certain sequences of commands that need to be issued to
1688 * the hardware sequentially, with no other intervening commands.
1689 *
1690 * This leads to an implementation of a "firmware lock" as a mutex that
1691 * can be taken recursively, and which is taken by both the low-level
1692 * command submission function (mwl8k_post_cmd) as well as any users of
1693 * that function that require issuing of an atomic sequence of commands,
1694 * and quiesces the transmit path whenever it's taken.
1695 */
1696static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1697{
1698 struct mwl8k_priv *priv = hw->priv;
1699
1700 if (priv->fw_mutex_owner != current) {
1701 int rc;
1702
1703 mutex_lock(&priv->fw_mutex);
1704 ieee80211_stop_queues(hw);
1705
1706 rc = mwl8k_tx_wait_empty(hw);
1707 if (rc) {
1708 ieee80211_wake_queues(hw);
1709 mutex_unlock(&priv->fw_mutex);
1710
1711 return rc;
1712 }
1713
1714 priv->fw_mutex_owner = current;
1715 }
1716
1717 priv->fw_mutex_depth++;
1718
1719 return 0;
1720}
1721
1722static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1723{
1724 struct mwl8k_priv *priv = hw->priv;
1725
1726 if (!--priv->fw_mutex_depth) {
1727 ieee80211_wake_queues(hw);
1728 priv->fw_mutex_owner = NULL;
1729 mutex_unlock(&priv->fw_mutex);
1730 }
1731}
1732
1733
a66098da
LB
1734/*
1735 * Command processing.
1736 */
1737
0c9cc640
LB
1738/* Timeout firmware commands after 10s */
1739#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB
1740
1741static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1742{
1743 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1744 struct mwl8k_priv *priv = hw->priv;
1745 void __iomem *regs = priv->regs;
1746 dma_addr_t dma_addr;
1747 unsigned int dma_size;
1748 int rc;
a66098da
LB
1749 unsigned long timeout = 0;
1750 u8 buf[32];
1751
b603742f 1752 cmd->result = (__force __le16) 0xffff;
a66098da
LB
1753 dma_size = le16_to_cpu(cmd->length);
1754 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1755 PCI_DMA_BIDIRECTIONAL);
1756 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1757 return -ENOMEM;
1758
618952a7 1759 rc = mwl8k_fw_lock(hw);
39a1e42e
LB
1760 if (rc) {
1761 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1762 PCI_DMA_BIDIRECTIONAL);
618952a7 1763 return rc;
39a1e42e 1764 }
a66098da 1765
a66098da
LB
1766 priv->hostcmd_wait = &cmd_wait;
1767 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1768 iowrite32(MWL8K_H2A_INT_DOORBELL,
1769 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1770 iowrite32(MWL8K_H2A_INT_DUMMY,
1771 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB
1772
1773 timeout = wait_for_completion_timeout(&cmd_wait,
1774 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1775
618952a7
LB
1776 priv->hostcmd_wait = NULL;
1777
1778 mwl8k_fw_unlock(hw);
1779
37055bd4
LB
1780 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1781 PCI_DMA_BIDIRECTIONAL);
1782
a66098da 1783 if (!timeout) {
5db55844 1784 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP
1785 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1786 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB
1787 rc = -ETIMEDOUT;
1788 } else {
0c9cc640
LB
1789 int ms;
1790
1791 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1792
ce9e2e1b 1793 rc = cmd->result ? -EINVAL : 0;
a66098da 1794 if (rc)
5db55844 1795 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP
1796 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1797 le16_to_cpu(cmd->result));
0c9cc640 1798 else if (ms > 2000)
5db55844 1799 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP
1800 mwl8k_cmd_name(cmd->code,
1801 buf, sizeof(buf)),
1802 ms);
a66098da
LB
1803 }
1804
a66098da
LB
1805 return rc;
1806}
1807
f57ca9c1
LB
1808static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1809 struct ieee80211_vif *vif,
1810 struct mwl8k_cmd_pkt *cmd)
1811{
1812 if (vif != NULL)
1813 cmd->macid = MWL8K_VIF(vif)->macid;
1814 return mwl8k_post_cmd(hw, cmd);
1815}
1816
1349ad2f
LB
1817/*
1818 * Setup code shared between STA and AP firmware images.
1819 */
1820static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1821{
1822 struct mwl8k_priv *priv = hw->priv;
1823
1824 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1825 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1826
1827 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1828 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1829
1830 priv->band_24.band = IEEE80211_BAND_2GHZ;
1831 priv->band_24.channels = priv->channels_24;
1832 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1833 priv->band_24.bitrates = priv->rates_24;
1834 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1835
1836 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1837}
1838
4eae9edd
LB
1839static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1840{
1841 struct mwl8k_priv *priv = hw->priv;
1842
1843 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1844 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1845
1846 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1847 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1848
1849 priv->band_50.band = IEEE80211_BAND_5GHZ;
1850 priv->band_50.channels = priv->channels_50;
1851 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1852 priv->band_50.bitrates = priv->rates_50;
1853 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1854
1855 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1856}
1857
a66098da 1858/*
04b147b1 1859 * CMD_GET_HW_SPEC (STA version).
a66098da 1860 */
04b147b1 1861struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB
1862 struct mwl8k_cmd_pkt header;
1863 __u8 hw_rev;
1864 __u8 host_interface;
1865 __le16 num_mcaddrs;
d89173f2 1866 __u8 perm_addr[ETH_ALEN];
a66098da
LB
1867 __le16 region_code;
1868 __le32 fw_rev;
1869 __le32 ps_cookie;
1870 __le32 caps;
1871 __u8 mcs_bitmap[16];
1872 __le32 rx_queue_ptr;
1873 __le32 num_tx_queues;
1874 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1875 __le32 caps2;
1876 __le32 num_tx_desc_per_queue;
45eb400d 1877 __le32 total_rxd;
ba2d3587 1878} __packed;
a66098da 1879
341c9791
LB
1880#define MWL8K_CAP_MAX_AMSDU 0x20000000
1881#define MWL8K_CAP_GREENFIELD 0x08000000
1882#define MWL8K_CAP_AMPDU 0x04000000
1883#define MWL8K_CAP_RX_STBC 0x01000000
1884#define MWL8K_CAP_TX_STBC 0x00800000
1885#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1886#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1887#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1888#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1889#define MWL8K_CAP_DELAY_BA 0x00003000
1890#define MWL8K_CAP_MIMO 0x00000200
1891#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB
1892#define MWL8K_CAP_BAND_MASK 0x00000007
1893#define MWL8K_CAP_5GHZ 0x00000004
1894#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 1895
06953235
LB
1896static void
1897mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1898 struct ieee80211_supported_band *band, u32 cap)
341c9791 1899{
341c9791
LB
1900 int rx_streams;
1901 int tx_streams;
1902
777ad375 1903 band->ht_cap.ht_supported = 1;
341c9791
LB
1904
1905 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 1906 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 1907 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 1908 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB
1909 if (cap & MWL8K_CAP_AMPDU) {
1910 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB
1911 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1912 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB
1913 }
1914 if (cap & MWL8K_CAP_RX_STBC)
777ad375 1915 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 1916 if (cap & MWL8K_CAP_TX_STBC)
777ad375 1917 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 1918 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 1919 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 1920 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 1921 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 1922 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 1923 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 1924 if (cap & MWL8K_CAP_40MHZ)
777ad375 1925 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB
1926
1927 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1928 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1929
777ad375 1930 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 1931 if (rx_streams >= 2)
777ad375 1932 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 1933 if (rx_streams >= 3)
777ad375
LB
1934 band->ht_cap.mcs.rx_mask[2] = 0xff;
1935 band->ht_cap.mcs.rx_mask[4] = 0x01;
1936 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB
1937
1938 if (rx_streams != tx_streams) {
777ad375
LB
1939 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1940 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB
1941 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1942 }
1943}
1944
06953235
LB
1945static void
1946mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1947{
1948 struct mwl8k_priv *priv = hw->priv;
1949
1950 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1951 mwl8k_setup_2ghz_band(hw);
1952 if (caps & MWL8K_CAP_MIMO)
1953 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1954 }
1955
1956 if (caps & MWL8K_CAP_5GHZ) {
1957 mwl8k_setup_5ghz_band(hw);
1958 if (caps & MWL8K_CAP_MIMO)
1959 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1960 }
1961}
1962
04b147b1 1963static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB
1964{
1965 struct mwl8k_priv *priv = hw->priv;
04b147b1 1966 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB
1967 int rc;
1968 int i;
1969
1970 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1971 if (cmd == NULL)
1972 return -ENOMEM;
1973
1974 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1975 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1976
1977 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1978 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 1979 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
4ff6432e 1980 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
a66098da 1981 for (i = 0; i < MWL8K_TX_QUEUES; i++)
45eb400d 1982 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 1983 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 1984 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB
1985
1986 rc = mwl8k_post_cmd(hw, &cmd->header);
1987
1988 if (!rc) {
1989 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1990 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 1991 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 1992 priv->hw_rev = cmd->hw_rev;
06953235 1993 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB
1994 priv->ap_macids_supported = 0x00000000;
1995 priv->sta_macids_supported = 0x00000001;
a66098da
LB
1996 }
1997
1998 kfree(cmd);
1999 return rc;
2000}
2001
42fba21d
LB
2002/*
2003 * CMD_GET_HW_SPEC (AP version).
2004 */
2005struct mwl8k_cmd_get_hw_spec_ap {
2006 struct mwl8k_cmd_pkt header;
2007 __u8 hw_rev;
2008 __u8 host_interface;
2009 __le16 num_wcb;
2010 __le16 num_mcaddrs;
2011 __u8 perm_addr[ETH_ALEN];
2012 __le16 region_code;
2013 __le16 num_antenna;
2014 __le32 fw_rev;
2015 __le32 wcbbase0;
2016 __le32 rxwrptr;
2017 __le32 rxrdptr;
2018 __le32 ps_cookie;
2019 __le32 wcbbase1;
2020 __le32 wcbbase2;
2021 __le32 wcbbase3;
952a0e96 2022 __le32 fw_api_version;
ba2d3587 2023} __packed;
42fba21d
LB
2024
2025static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2026{
2027 struct mwl8k_priv *priv = hw->priv;
2028 struct mwl8k_cmd_get_hw_spec_ap *cmd;
2029 int rc;
952a0e96 2030 u32 api_version;
42fba21d
LB
2031
2032 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2033 if (cmd == NULL)
2034 return -ENOMEM;
2035
2036 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2037 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2038
2039 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2040 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2041
2042 rc = mwl8k_post_cmd(hw, &cmd->header);
2043
2044 if (!rc) {
2045 int off;
2046
952a0e96
BC
2047 api_version = le32_to_cpu(cmd->fw_api_version);
2048 if (priv->device_info->fw_api_ap != api_version) {
2049 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2050 " Expected %d got %d.\n", MWL8K_NAME,
2051 priv->device_info->part_name,
2052 priv->device_info->fw_api_ap,
2053 api_version);
2054 rc = -EINVAL;
2055 goto done;
2056 }
42fba21d
LB
2057 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2058 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2059 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2060 priv->hw_rev = cmd->hw_rev;
1349ad2f 2061 mwl8k_setup_2ghz_band(hw);
ee0ddf18
LB
2062 priv->ap_macids_supported = 0x000000ff;
2063 priv->sta_macids_supported = 0x00000000;
42fba21d
LB
2064
2065 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
b603742f 2066 iowrite32(priv->txq[0].txd_dma, priv->sram + off);
42fba21d
LB
2067
2068 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2069 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB
2070
2071 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2072 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB
2073
2074 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
b603742f 2075 iowrite32(priv->txq[1].txd_dma, priv->sram + off);
42fba21d
LB
2076
2077 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
b603742f 2078 iowrite32(priv->txq[2].txd_dma, priv->sram + off);
42fba21d
LB
2079
2080 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
b603742f 2081 iowrite32(priv->txq[3].txd_dma, priv->sram + off);
42fba21d
LB
2082 }
2083
952a0e96 2084done:
42fba21d
LB
2085 kfree(cmd);
2086 return rc;
2087}
2088
2089/*
2090 * CMD_SET_HW_SPEC.
2091 */
2092struct mwl8k_cmd_set_hw_spec {
2093 struct mwl8k_cmd_pkt header;
2094 __u8 hw_rev;
2095 __u8 host_interface;
2096 __le16 num_mcaddrs;
2097 __u8 perm_addr[ETH_ALEN];
2098 __le16 region_code;
2099 __le32 fw_rev;
2100 __le32 ps_cookie;
2101 __le32 caps;
2102 __le32 rx_queue_ptr;
2103 __le32 num_tx_queues;
2104 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
2105 __le32 flags;
2106 __le32 num_tx_desc_per_queue;
2107 __le32 total_rxd;
ba2d3587 2108} __packed;
42fba21d 2109
b64fe619
LB
2110#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2111#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2112#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB
2113
2114static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2115{
2116 struct mwl8k_priv *priv = hw->priv;
2117 struct mwl8k_cmd_set_hw_spec *cmd;
2118 int rc;
2119 int i;
2120
2121 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2122 if (cmd == NULL)
2123 return -ENOMEM;
2124
2125 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2126 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2127
2128 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2129 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
2130 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
2131 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2132 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
b64fe619
LB
2133 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2134 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
2135 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
42fba21d
LB
2136 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2137 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2138
2139 rc = mwl8k_post_cmd(hw, &cmd->header);
2140 kfree(cmd);
2141
2142 return rc;
2143}
2144
a66098da
LB
2145/*
2146 * CMD_MAC_MULTICAST_ADR.
2147 */
2148struct mwl8k_cmd_mac_multicast_adr {
2149 struct mwl8k_cmd_pkt header;
2150 __le16 action;
2151 __le16 numaddr;
ce9e2e1b 2152 __u8 addr[0][ETH_ALEN];
a66098da
LB
2153};
2154
d5e30845
LB
2155#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2156#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2157#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2158#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2159
e81cd2d6 2160static struct mwl8k_cmd_pkt *
447ced07 2161__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2162 struct netdev_hw_addr_list *mc_list)
a66098da 2163{
e81cd2d6 2164 struct mwl8k_priv *priv = hw->priv;
a66098da 2165 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2166 int size;
22bedad3
JP
2167 int mc_count = 0;
2168
2169 if (mc_list)
2170 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2171
447ced07 2172 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB
2173 allmulti = 1;
2174 mc_count = 0;
2175 }
e81cd2d6
LB
2176
2177 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2178
e81cd2d6 2179 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2180 if (cmd == NULL)
e81cd2d6 2181 return NULL;
a66098da
LB
2182
2183 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2184 cmd->header.length = cpu_to_le16(size);
d5e30845
LB
2185 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2186 MWL8K_ENABLE_RX_BROADCAST);
2187
2188 if (allmulti) {
2189 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2190 } else if (mc_count) {
22bedad3
JP
2191 struct netdev_hw_addr *ha;
2192 int i = 0;
d5e30845
LB
2193
2194 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2195 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP
2196 netdev_hw_addr_list_for_each(ha, mc_list) {
2197 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2198 }
a66098da
LB
2199 }
2200
e81cd2d6 2201 return &cmd->header;
a66098da
LB
2202}
2203
2204/*
55489b6e 2205 * CMD_GET_STAT.
a66098da 2206 */
55489b6e 2207struct mwl8k_cmd_get_stat {
a66098da 2208 struct mwl8k_cmd_pkt header;
a66098da 2209 __le32 stats[64];
ba2d3587 2210} __packed;
a66098da
LB
2211
2212#define MWL8K_STAT_ACK_FAILURE 9
2213#define MWL8K_STAT_RTS_FAILURE 12
2214#define MWL8K_STAT_FCS_ERROR 24
2215#define MWL8K_STAT_RTS_SUCCESS 11
2216
55489b6e
LB
2217static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2218 struct ieee80211_low_level_stats *stats)
a66098da 2219{
55489b6e 2220 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB
2221 int rc;
2222
2223 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2224 if (cmd == NULL)
2225 return -ENOMEM;
2226
2227 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2228 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB
2229
2230 rc = mwl8k_post_cmd(hw, &cmd->header);
2231 if (!rc) {
2232 stats->dot11ACKFailureCount =
2233 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2234 stats->dot11RTSFailureCount =
2235 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2236 stats->dot11FCSErrorCount =
2237 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2238 stats->dot11RTSSuccessCount =
2239 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2240 }
2241 kfree(cmd);
2242
2243 return rc;
2244}
2245
2246/*
55489b6e 2247 * CMD_RADIO_CONTROL.
a66098da 2248 */
55489b6e 2249struct mwl8k_cmd_radio_control {
a66098da
LB
2250 struct mwl8k_cmd_pkt header;
2251 __le16 action;
2252 __le16 control;
2253 __le16 radio_on;
ba2d3587 2254} __packed;
a66098da 2255
c46563b7 2256static int
55489b6e 2257mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB
2258{
2259 struct mwl8k_priv *priv = hw->priv;
55489b6e 2260 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB
2261 int rc;
2262
c46563b7 2263 if (enable == priv->radio_on && !force)
a66098da
LB
2264 return 0;
2265
a66098da
LB
2266 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2267 if (cmd == NULL)
2268 return -ENOMEM;
2269
2270 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2271 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2272 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2273 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB
2274 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2275
2276 rc = mwl8k_post_cmd(hw, &cmd->header);
2277 kfree(cmd);
2278
2279 if (!rc)
c46563b7 2280 priv->radio_on = enable;
a66098da
LB
2281
2282 return rc;
2283}
2284
55489b6e 2285static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2286{
55489b6e 2287 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB
2288}
2289
55489b6e 2290static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2291{
55489b6e 2292 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB
2293}
2294
a66098da
LB
2295static int
2296mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2297{
99200a99 2298 struct mwl8k_priv *priv = hw->priv;
a66098da 2299
68ce3884 2300 priv->radio_short_preamble = short_preamble;
a66098da 2301
55489b6e 2302 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB
2303}
2304
2305/*
55489b6e 2306 * CMD_RF_TX_POWER.
a66098da 2307 */
41fdf097 2308#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2309
55489b6e 2310struct mwl8k_cmd_rf_tx_power {
a66098da
LB
2311 struct mwl8k_cmd_pkt header;
2312 __le16 action;
2313 __le16 support_level;
2314 __le16 current_level;
2315 __le16 reserved;
41fdf097 2316 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2317} __packed;
a66098da 2318
55489b6e 2319static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2320{
55489b6e 2321 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB
2322 int rc;
2323
2324 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2325 if (cmd == NULL)
2326 return -ENOMEM;
2327
2328 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2329 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2330 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2331 cmd->support_level = cpu_to_le16(dBm);
2332
2333 rc = mwl8k_post_cmd(hw, &cmd->header);
2334 kfree(cmd);
2335
2336 return rc;
2337}
2338
41fdf097
NS
2339/*
2340 * CMD_TX_POWER.
2341 */
2342#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2343
2344struct mwl8k_cmd_tx_power {
2345 struct mwl8k_cmd_pkt header;
2346 __le16 action;
2347 __le16 band;
2348 __le16 channel;
2349 __le16 bw;
2350 __le16 sub_ch;
2351 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2352} __attribute__((packed));
2353
2354static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2355 struct ieee80211_conf *conf,
2356 unsigned short pwr)
2357{
2358 struct ieee80211_channel *channel = conf->channel;
2359 struct mwl8k_cmd_tx_power *cmd;
2360 int rc;
2361 int i;
2362
2363 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2364 if (cmd == NULL)
2365 return -ENOMEM;
2366
2367 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2368 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2369 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2370
2371 if (channel->band == IEEE80211_BAND_2GHZ)
2372 cmd->band = cpu_to_le16(0x1);
2373 else if (channel->band == IEEE80211_BAND_5GHZ)
2374 cmd->band = cpu_to_le16(0x4);
2375
2376 cmd->channel = channel->hw_value;
2377
2378 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2379 conf->channel_type == NL80211_CHAN_HT20) {
2380 cmd->bw = cpu_to_le16(0x2);
2381 } else {
2382 cmd->bw = cpu_to_le16(0x4);
2383 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2384 cmd->sub_ch = cpu_to_le16(0x3);
2385 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2386 cmd->sub_ch = cpu_to_le16(0x1);
2387 }
2388
2389 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2390 cmd->power_level_list[i] = cpu_to_le16(pwr);
2391
2392 rc = mwl8k_post_cmd(hw, &cmd->header);
2393 kfree(cmd);
2394
2395 return rc;
2396}
2397
08b06347
LB
2398/*
2399 * CMD_RF_ANTENNA.
2400 */
2401struct mwl8k_cmd_rf_antenna {
2402 struct mwl8k_cmd_pkt header;
2403 __le16 antenna;
2404 __le16 mode;
ba2d3587 2405} __packed;
08b06347
LB
2406
2407#define MWL8K_RF_ANTENNA_RX 1
2408#define MWL8K_RF_ANTENNA_TX 2
2409
2410static int
2411mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2412{
2413 struct mwl8k_cmd_rf_antenna *cmd;
2414 int rc;
2415
2416 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2417 if (cmd == NULL)
2418 return -ENOMEM;
2419
2420 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2421 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2422 cmd->antenna = cpu_to_le16(antenna);
2423 cmd->mode = cpu_to_le16(mask);
2424
2425 rc = mwl8k_post_cmd(hw, &cmd->header);
2426 kfree(cmd);
2427
2428 return rc;
2429}
2430
b64fe619
LB
2431/*
2432 * CMD_SET_BEACON.
2433 */
2434struct mwl8k_cmd_set_beacon {
2435 struct mwl8k_cmd_pkt header;
2436 __le16 beacon_len;
2437 __u8 beacon[0];
2438};
2439
aa21d0f6
LB
2440static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2441 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB
2442{
2443 struct mwl8k_cmd_set_beacon *cmd;
2444 int rc;
2445
2446 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2447 if (cmd == NULL)
2448 return -ENOMEM;
2449
2450 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2451 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2452 cmd->beacon_len = cpu_to_le16(len);
2453 memcpy(cmd->beacon, beacon, len);
2454
aa21d0f6 2455 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB
2456 kfree(cmd);
2457
2458 return rc;
2459}
2460
a66098da
LB
2461/*
2462 * CMD_SET_PRE_SCAN.
2463 */
2464struct mwl8k_cmd_set_pre_scan {
2465 struct mwl8k_cmd_pkt header;
ba2d3587 2466} __packed;
a66098da
LB
2467
2468static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2469{
2470 struct mwl8k_cmd_set_pre_scan *cmd;
2471 int rc;
2472
2473 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2474 if (cmd == NULL)
2475 return -ENOMEM;
2476
2477 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2478 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2479
2480 rc = mwl8k_post_cmd(hw, &cmd->header);
2481 kfree(cmd);
2482
2483 return rc;
2484}
2485
2486/*
2487 * CMD_SET_POST_SCAN.
2488 */
2489struct mwl8k_cmd_set_post_scan {
2490 struct mwl8k_cmd_pkt header;
2491 __le32 isibss;
d89173f2 2492 __u8 bssid[ETH_ALEN];
ba2d3587 2493} __packed;
a66098da
LB
2494
2495static int
0a11dfc3 2496mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB
2497{
2498 struct mwl8k_cmd_set_post_scan *cmd;
2499 int rc;
2500
2501 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2502 if (cmd == NULL)
2503 return -ENOMEM;
2504
2505 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2506 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2507 cmd->isibss = 0;
d89173f2 2508 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB
2509
2510 rc = mwl8k_post_cmd(hw, &cmd->header);
2511 kfree(cmd);
2512
2513 return rc;
2514}
2515
2516/*
2517 * CMD_SET_RF_CHANNEL.
2518 */
2519struct mwl8k_cmd_set_rf_channel {
2520 struct mwl8k_cmd_pkt header;
2521 __le16 action;
2522 __u8 current_channel;
2523 __le32 channel_flags;
ba2d3587 2524} __packed;
a66098da
LB
2525
2526static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2527 struct ieee80211_conf *conf)
a66098da 2528{
610677d2 2529 struct ieee80211_channel *channel = conf->channel;
a66098da
LB
2530 struct mwl8k_cmd_set_rf_channel *cmd;
2531 int rc;
2532
2533 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2534 if (cmd == NULL)
2535 return -ENOMEM;
2536
2537 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2538 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2539 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2540 cmd->current_channel = channel->hw_value;
610677d2 2541
a66098da 2542 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2543 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB
2544 else if (channel->band == IEEE80211_BAND_5GHZ)
2545 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB
2546
2547 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2548 conf->channel_type == NL80211_CHAN_HT20)
2549 cmd->channel_flags |= cpu_to_le32(0x00000080);
2550 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2551 cmd->channel_flags |= cpu_to_le32(0x000001900);
2552 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2553 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB
2554
2555 rc = mwl8k_post_cmd(hw, &cmd->header);
2556 kfree(cmd);
2557
2558 return rc;
2559}
2560
2561/*
55489b6e 2562 * CMD_SET_AID.
a66098da 2563 */
55489b6e
LB
2564#define MWL8K_FRAME_PROT_DISABLED 0x00
2565#define MWL8K_FRAME_PROT_11G 0x07
2566#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2567#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 2568
55489b6e
LB
2569struct mwl8k_cmd_update_set_aid {
2570 struct mwl8k_cmd_pkt header;
2571 __le16 aid;
a66098da 2572
55489b6e
LB
2573 /* AP's MAC address (BSSID) */
2574 __u8 bssid[ETH_ALEN];
2575 __le16 protection_mode;
2576 __u8 supp_rates[14];
ba2d3587 2577} __packed;
a66098da 2578
c6e96010
LB
2579static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2580{
2581 int i;
2582 int j;
2583
2584 /*
2585 * Clear nonstandard rates 4 and 13.
2586 */
2587 mask &= 0x1fef;
2588
2589 for (i = 0, j = 0; i < 14; i++) {
2590 if (mask & (1 << i))
777ad375 2591 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB
2592 }
2593}
2594
55489b6e 2595static int
c6e96010
LB
2596mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2597 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 2598{
55489b6e
LB
2599 struct mwl8k_cmd_update_set_aid *cmd;
2600 u16 prot_mode;
a66098da
LB
2601 int rc;
2602
2603 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2604 if (cmd == NULL)
2605 return -ENOMEM;
2606
55489b6e 2607 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 2608 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 2609 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 2610 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 2611
7dc6a7a7 2612 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB
2613 prot_mode = MWL8K_FRAME_PROT_11G;
2614 } else {
7dc6a7a7 2615 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB
2616 IEEE80211_HT_OP_MODE_PROTECTION) {
2617 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2618 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2619 break;
2620 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2621 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2622 break;
2623 default:
2624 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2625 break;
2626 }
2627 }
2628 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 2629
c6e96010 2630 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB
2631
2632 rc = mwl8k_post_cmd(hw, &cmd->header);
2633 kfree(cmd);
2634
2635 return rc;
2636}
2637
32060e1b 2638/*
55489b6e 2639 * CMD_SET_RATE.
32060e1b 2640 */
55489b6e
LB
2641struct mwl8k_cmd_set_rate {
2642 struct mwl8k_cmd_pkt header;
2643 __u8 legacy_rates[14];
2644
2645 /* Bitmap for supported MCS codes. */
2646 __u8 mcs_set[16];
2647 __u8 reserved[16];
ba2d3587 2648} __packed;
32060e1b 2649
55489b6e 2650static int
c6e96010 2651mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 2652 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 2653{
55489b6e 2654 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB
2655 int rc;
2656
2657 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2658 if (cmd == NULL)
2659 return -ENOMEM;
2660
55489b6e 2661 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 2662 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 2663 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 2664 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB
2665
2666 rc = mwl8k_post_cmd(hw, &cmd->header);
2667 kfree(cmd);
2668
2669 return rc;
2670}
2671
a66098da 2672/*
55489b6e 2673 * CMD_FINALIZE_JOIN.
a66098da 2674 */
55489b6e
LB
2675#define MWL8K_FJ_BEACON_MAXLEN 128
2676
2677struct mwl8k_cmd_finalize_join {
a66098da 2678 struct mwl8k_cmd_pkt header;
55489b6e
LB
2679 __le32 sleep_interval; /* Number of beacon periods to sleep */
2680 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 2681} __packed;
a66098da 2682
55489b6e
LB
2683static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2684 int framelen, int dtim)
a66098da 2685{
55489b6e
LB
2686 struct mwl8k_cmd_finalize_join *cmd;
2687 struct ieee80211_mgmt *payload = frame;
2688 int payload_len;
a66098da
LB
2689 int rc;
2690
2691 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2692 if (cmd == NULL)
2693 return -ENOMEM;
2694
55489b6e 2695 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 2696 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB
2697 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2698
2699 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2700 if (payload_len < 0)
2701 payload_len = 0;
2702 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2703 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2704
2705 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB
2706
2707 rc = mwl8k_post_cmd(hw, &cmd->header);
2708 kfree(cmd);
2709
2710 return rc;
2711}
2712
2713/*
55489b6e 2714 * CMD_SET_RTS_THRESHOLD.
a66098da 2715 */
55489b6e 2716struct mwl8k_cmd_set_rts_threshold {
a66098da
LB
2717 struct mwl8k_cmd_pkt header;
2718 __le16 action;
55489b6e 2719 __le16 threshold;
ba2d3587 2720} __packed;
a66098da 2721
c2c2b12a
LB
2722static int
2723mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 2724{
55489b6e 2725 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB
2726 int rc;
2727
2728 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2729 if (cmd == NULL)
2730 return -ENOMEM;
2731
55489b6e 2732 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 2733 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB
2734 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2735 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB
2736
2737 rc = mwl8k_post_cmd(hw, &cmd->header);
2738 kfree(cmd);
2739
a66098da
LB
2740 return rc;
2741}
2742
2743/*
55489b6e 2744 * CMD_SET_SLOT.
a66098da 2745 */
55489b6e 2746struct mwl8k_cmd_set_slot {
a66098da
LB
2747 struct mwl8k_cmd_pkt header;
2748 __le16 action;
55489b6e 2749 __u8 short_slot;
ba2d3587 2750} __packed;
a66098da 2751
55489b6e 2752static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 2753{
55489b6e 2754 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB
2755 int rc;
2756
2757 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2758 if (cmd == NULL)
2759 return -ENOMEM;
2760
55489b6e 2761 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 2762 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB
2763 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2764 cmd->short_slot = short_slot_time;
a66098da
LB
2765
2766 rc = mwl8k_post_cmd(hw, &cmd->header);
2767 kfree(cmd);
2768
2769 return rc;
2770}
2771
2772/*
2773 * CMD_SET_EDCA_PARAMS.
2774 */
2775struct mwl8k_cmd_set_edca_params {
2776 struct mwl8k_cmd_pkt header;
2777
2778 /* See MWL8K_SET_EDCA_XXX below */
2779 __le16 action;
2780
2781 /* TX opportunity in units of 32 us */
2782 __le16 txop;
2783
2e484c89
LB
2784 union {
2785 struct {
2786 /* Log exponent of max contention period: 0...15 */
2787 __le32 log_cw_max;
2788
2789 /* Log exponent of min contention period: 0...15 */
2790 __le32 log_cw_min;
2791
2792 /* Adaptive interframe spacing in units of 32us */
2793 __u8 aifs;
2794
2795 /* TX queue to configure */
2796 __u8 txq;
2797 } ap;
2798 struct {
2799 /* Log exponent of max contention period: 0...15 */
2800 __u8 log_cw_max;
a66098da 2801
2e484c89
LB
2802 /* Log exponent of min contention period: 0...15 */
2803 __u8 log_cw_min;
a66098da 2804
2e484c89
LB
2805 /* Adaptive interframe spacing in units of 32us */
2806 __u8 aifs;
a66098da 2807
2e484c89
LB
2808 /* TX queue to configure */
2809 __u8 txq;
2810 } sta;
2811 };
ba2d3587 2812} __packed;
a66098da 2813
a66098da
LB
2814#define MWL8K_SET_EDCA_CW 0x01
2815#define MWL8K_SET_EDCA_TXOP 0x02
2816#define MWL8K_SET_EDCA_AIFS 0x04
2817
2818#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2819 MWL8K_SET_EDCA_TXOP | \
2820 MWL8K_SET_EDCA_AIFS)
2821
2822static int
55489b6e
LB
2823mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2824 __u16 cw_min, __u16 cw_max,
2825 __u8 aifs, __u16 txop)
a66098da 2826{
2e484c89 2827 struct mwl8k_priv *priv = hw->priv;
a66098da 2828 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB
2829 int rc;
2830
2831 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2832 if (cmd == NULL)
2833 return -ENOMEM;
2834
a66098da
LB
2835 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2836 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB
2837 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2838 cmd->txop = cpu_to_le16(txop);
2e484c89
LB
2839 if (priv->ap_fw) {
2840 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2841 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2842 cmd->ap.aifs = aifs;
2843 cmd->ap.txq = qnum;
2844 } else {
2845 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2846 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2847 cmd->sta.aifs = aifs;
2848 cmd->sta.txq = qnum;
2849 }
a66098da
LB
2850
2851 rc = mwl8k_post_cmd(hw, &cmd->header);
2852 kfree(cmd);
2853
2854 return rc;
2855}
2856
2857/*
55489b6e 2858 * CMD_SET_WMM_MODE.
a66098da 2859 */
55489b6e 2860struct mwl8k_cmd_set_wmm_mode {
a66098da 2861 struct mwl8k_cmd_pkt header;
55489b6e 2862 __le16 action;
ba2d3587 2863} __packed;
a66098da 2864
55489b6e 2865static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 2866{
55489b6e
LB
2867 struct mwl8k_priv *priv = hw->priv;
2868 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB
2869 int rc;
2870
a66098da
LB
2871 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2872 if (cmd == NULL)
2873 return -ENOMEM;
2874
55489b6e 2875 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 2876 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 2877 cmd->action = cpu_to_le16(!!enable);
a66098da
LB
2878
2879 rc = mwl8k_post_cmd(hw, &cmd->header);
2880 kfree(cmd);
16cec43d 2881
55489b6e
LB
2882 if (!rc)
2883 priv->wmm_enabled = enable;
a66098da
LB
2884
2885 return rc;
2886}
2887
2888/*
55489b6e 2889 * CMD_MIMO_CONFIG.
a66098da 2890 */
55489b6e
LB
2891struct mwl8k_cmd_mimo_config {
2892 struct mwl8k_cmd_pkt header;
2893 __le32 action;
2894 __u8 rx_antenna_map;
2895 __u8 tx_antenna_map;
ba2d3587 2896} __packed;
a66098da 2897
55489b6e 2898static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 2899{
55489b6e 2900 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB
2901 int rc;
2902
2903 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2904 if (cmd == NULL)
2905 return -ENOMEM;
2906
55489b6e 2907 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 2908 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB
2909 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2910 cmd->rx_antenna_map = rx;
2911 cmd->tx_antenna_map = tx;
a66098da
LB
2912
2913 rc = mwl8k_post_cmd(hw, &cmd->header);
2914 kfree(cmd);
2915
2916 return rc;
2917}
2918
2919/*
b71ed2c6 2920 * CMD_USE_FIXED_RATE (STA version).
a66098da 2921 */
b71ed2c6
LB
2922struct mwl8k_cmd_use_fixed_rate_sta {
2923 struct mwl8k_cmd_pkt header;
2924 __le32 action;
2925 __le32 allow_rate_drop;
2926 __le32 num_rates;
2927 struct {
2928 __le32 is_ht_rate;
2929 __le32 enable_retry;
2930 __le32 rate;
2931 __le32 retry_count;
2932 } rate_entry[8];
2933 __le32 rate_type;
2934 __le32 reserved1;
2935 __le32 reserved2;
ba2d3587 2936} __packed;
a66098da 2937
b71ed2c6
LB
2938#define MWL8K_USE_AUTO_RATE 0x0002
2939#define MWL8K_UCAST_RATE 0
a66098da 2940
b71ed2c6 2941static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 2942{
b71ed2c6 2943 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB
2944 int rc;
2945
2946 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2947 if (cmd == NULL)
2948 return -ENOMEM;
2949
2950 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2951 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB
2952 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2953 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB
2954
2955 rc = mwl8k_post_cmd(hw, &cmd->header);
2956 kfree(cmd);
2957
2958 return rc;
2959}
2960
088aab8b
LB
2961/*
2962 * CMD_USE_FIXED_RATE (AP version).
2963 */
2964struct mwl8k_cmd_use_fixed_rate_ap {
2965 struct mwl8k_cmd_pkt header;
2966 __le32 action;
2967 __le32 allow_rate_drop;
2968 __le32 num_rates;
2969 struct mwl8k_rate_entry_ap {
2970 __le32 is_ht_rate;
2971 __le32 enable_retry;
2972 __le32 rate;
2973 __le32 retry_count;
2974 } rate_entry[4];
2975 u8 multicast_rate;
2976 u8 multicast_rate_type;
2977 u8 management_rate;
ba2d3587 2978} __packed;
088aab8b
LB
2979
2980static int
2981mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2982{
2983 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2984 int rc;
2985
2986 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2987 if (cmd == NULL)
2988 return -ENOMEM;
2989
2990 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2991 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2992 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2993 cmd->multicast_rate = mcast;
2994 cmd->management_rate = mgmt;
2995
2996 rc = mwl8k_post_cmd(hw, &cmd->header);
2997 kfree(cmd);
2998
2999 return rc;
3000}
3001
55489b6e
LB
3002/*
3003 * CMD_ENABLE_SNIFFER.
3004 */
3005struct mwl8k_cmd_enable_sniffer {
3006 struct mwl8k_cmd_pkt header;
3007 __le32 action;
ba2d3587 3008} __packed;
55489b6e
LB
3009
3010static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3011{
3012 struct mwl8k_cmd_enable_sniffer *cmd;
3013 int rc;
3014
3015 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3016 if (cmd == NULL)
3017 return -ENOMEM;
3018
3019 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3020 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3021 cmd->action = cpu_to_le32(!!enable);
3022
3023 rc = mwl8k_post_cmd(hw, &cmd->header);
3024 kfree(cmd);
3025
3026 return rc;
3027}
3028
3029/*
3030 * CMD_SET_MAC_ADDR.
3031 */
3032struct mwl8k_cmd_set_mac_addr {
3033 struct mwl8k_cmd_pkt header;
3034 union {
3035 struct {
3036 __le16 mac_type;
3037 __u8 mac_addr[ETH_ALEN];
3038 } mbss;
3039 __u8 mac_addr[ETH_ALEN];
3040 };
ba2d3587 3041} __packed;
55489b6e 3042
ee0ddf18
LB
3043#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3044#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3045#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3046#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3047
aa21d0f6
LB
3048static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3049 struct ieee80211_vif *vif, u8 *mac)
55489b6e
LB
3050{
3051 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3052 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
55489b6e 3053 struct mwl8k_cmd_set_mac_addr *cmd;
ee0ddf18 3054 int mac_type;
55489b6e
LB
3055 int rc;
3056
ee0ddf18
LB
3057 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3058 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3059 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3060 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3061 else
3062 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3063 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3064 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3065 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3066 else
3067 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3068 }
3069
55489b6e
LB
3070 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3071 if (cmd == NULL)
3072 return -ENOMEM;
3073
3074 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3075 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3076 if (priv->ap_fw) {
ee0ddf18 3077 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB
3078 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3079 } else {
3080 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3081 }
3082
aa21d0f6 3083 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB
3084 kfree(cmd);
3085
3086 return rc;
3087}
3088
3089/*
3090 * CMD_SET_RATEADAPT_MODE.
3091 */
3092struct mwl8k_cmd_set_rate_adapt_mode {
3093 struct mwl8k_cmd_pkt header;
3094 __le16 action;
3095 __le16 mode;
ba2d3587 3096} __packed;
55489b6e
LB
3097
3098static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3099{
3100 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3101 int rc;
3102
3103 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3104 if (cmd == NULL)
3105 return -ENOMEM;
3106
3107 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3108 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3109 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3110 cmd->mode = cpu_to_le16(mode);
3111
3112 rc = mwl8k_post_cmd(hw, &cmd->header);
3113 kfree(cmd);
3114
3115 return rc;
3116}
3117
b64fe619
LB
3118/*
3119 * CMD_BSS_START.
3120 */
3121struct mwl8k_cmd_bss_start {
3122 struct mwl8k_cmd_pkt header;
3123 __le32 enable;
ba2d3587 3124} __packed;
b64fe619 3125
aa21d0f6
LB
3126static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3127 struct ieee80211_vif *vif, int enable)
b64fe619
LB
3128{
3129 struct mwl8k_cmd_bss_start *cmd;
3130 int rc;
3131
3132 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3133 if (cmd == NULL)
3134 return -ENOMEM;
3135
3136 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3137 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3138 cmd->enable = cpu_to_le32(enable);
3139
aa21d0f6 3140 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB
3141 kfree(cmd);
3142
3143 return rc;
3144}
3145
3f5610ff
LB
3146/*
3147 * CMD_SET_NEW_STN.
3148 */
3149struct mwl8k_cmd_set_new_stn {
3150 struct mwl8k_cmd_pkt header;
3151 __le16 aid;
3152 __u8 mac_addr[6];
3153 __le16 stn_id;
3154 __le16 action;
3155 __le16 rsvd;
3156 __le32 legacy_rates;
3157 __u8 ht_rates[4];
3158 __le16 cap_info;
3159 __le16 ht_capabilities_info;
3160 __u8 mac_ht_param_info;
3161 __u8 rev;
3162 __u8 control_channel;
3163 __u8 add_channel;
3164 __le16 op_mode;
3165 __le16 stbc;
3166 __u8 add_qos_info;
3167 __u8 is_qos_sta;
3168 __le32 fw_sta_ptr;
ba2d3587 3169} __packed;
3f5610ff
LB
3170
3171#define MWL8K_STA_ACTION_ADD 0
3172#define MWL8K_STA_ACTION_REMOVE 2
3173
3174static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3175 struct ieee80211_vif *vif,
3176 struct ieee80211_sta *sta)
3177{
3178 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3179 u32 rates;
3f5610ff
LB
3180 int rc;
3181
3182 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3183 if (cmd == NULL)
3184 return -ENOMEM;
3185
3186 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3187 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3188 cmd->aid = cpu_to_le16(sta->aid);
3189 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3190 cmd->stn_id = cpu_to_le16(sta->aid);
3191 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB
3192 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3193 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3194 else
3195 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3196 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB
3197 if (sta->ht_cap.ht_supported) {
3198 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3199 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3200 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3201 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3202 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3203 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3204 ((sta->ht_cap.ampdu_density & 7) << 2);
3205 cmd->is_qos_sta = 1;
3206 }
3207
aa21d0f6 3208 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB
3209 kfree(cmd);
3210
3211 return rc;
3212}
3213
b64fe619
LB
3214static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3215 struct ieee80211_vif *vif)
3216{
3217 struct mwl8k_cmd_set_new_stn *cmd;
3218 int rc;
3219
3220 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3221 if (cmd == NULL)
3222 return -ENOMEM;
3223
3224 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3225 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3226 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3227
aa21d0f6 3228 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB
3229 kfree(cmd);
3230
3231 return rc;
3232}
3233
3f5610ff
LB
3234static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3235 struct ieee80211_vif *vif, u8 *addr)
3236{
3237 struct mwl8k_cmd_set_new_stn *cmd;
3238 int rc;
3239
3240 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3241 if (cmd == NULL)
3242 return -ENOMEM;
3243
3244 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3245 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3246 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3247 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3248
aa21d0f6 3249 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB
3250 kfree(cmd);
3251
3252 return rc;
3253}
3254
fcdc403c
NS
3255/*
3256 * CMD_UPDATE_ENCRYPTION.
3257 */
3258
3259#define MAX_ENCR_KEY_LENGTH 16
3260#define MIC_KEY_LENGTH 8
3261
3262struct mwl8k_cmd_update_encryption {
3263 struct mwl8k_cmd_pkt header;
3264
3265 __le32 action;
3266 __le32 reserved;
3267 __u8 mac_addr[6];
3268 __u8 encr_type;
3269
3270} __attribute__((packed));
3271
3272struct mwl8k_cmd_set_key {
3273 struct mwl8k_cmd_pkt header;
3274
3275 __le32 action;
3276 __le32 reserved;
3277 __le16 length;
3278 __le16 key_type_id;
3279 __le32 key_info;
3280 __le32 key_id;
3281 __le16 key_len;
3282 __u8 key_material[MAX_ENCR_KEY_LENGTH];
3283 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
3284 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
3285 __le16 tkip_rsc_low;
3286 __le32 tkip_rsc_high;
3287 __le16 tkip_tsc_low;
3288 __le32 tkip_tsc_high;
3289 __u8 mac_addr[6];
3290} __attribute__((packed));
3291
3292enum {
3293 MWL8K_ENCR_ENABLE,
3294 MWL8K_ENCR_SET_KEY,
3295 MWL8K_ENCR_REMOVE_KEY,
3296 MWL8K_ENCR_SET_GROUP_KEY,
3297};
3298
3299#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
3300#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
3301#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
3302#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
3303#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
3304
3305enum {
3306 MWL8K_ALG_WEP,
3307 MWL8K_ALG_TKIP,
3308 MWL8K_ALG_CCMP,
3309};
3310
3311#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
3312#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
3313#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
3314#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
3315#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
3316
3317static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
3318 struct ieee80211_vif *vif,
3319 u8 *addr,
3320 u8 encr_type)
3321{
3322 struct mwl8k_cmd_update_encryption *cmd;
3323 int rc;
3324
3325 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3326 if (cmd == NULL)
3327 return -ENOMEM;
3328
3329 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3330 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3331 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
3332 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3333 cmd->encr_type = encr_type;
3334
3335 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3336 kfree(cmd);
3337
3338 return rc;
3339}
3340
3341static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
3342 u8 *addr,
3343 struct ieee80211_key_conf *key)
3344{
3345 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3346 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3347 cmd->length = cpu_to_le16(sizeof(*cmd) -
3348 offsetof(struct mwl8k_cmd_set_key, length));
3349 cmd->key_id = cpu_to_le32(key->keyidx);
3350 cmd->key_len = cpu_to_le16(key->keylen);
3351 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3352
3353 switch (key->cipher) {
3354 case WLAN_CIPHER_SUITE_WEP40:
3355 case WLAN_CIPHER_SUITE_WEP104:
3356 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
3357 if (key->keyidx == 0)
3358 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
3359
3360 break;
3361 case WLAN_CIPHER_SUITE_TKIP:
3362 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
3363 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3364 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3365 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3366 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
3367 | MWL8K_KEY_FLAG_TSC_VALID);
3368 break;
3369 case WLAN_CIPHER_SUITE_CCMP:
3370 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
3371 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3372 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3373 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3374 break;
3375 default:
3376 return -ENOTSUPP;
3377 }
3378
3379 return 0;
3380}
3381
3382static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
3383 struct ieee80211_vif *vif,
3384 u8 *addr,
3385 struct ieee80211_key_conf *key)
3386{
3387 struct mwl8k_cmd_set_key *cmd;
3388 int rc;
3389 int keymlen;
3390 u32 action;
3391 u8 idx;
3392 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3393
3394 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3395 if (cmd == NULL)
3396 return -ENOMEM;
3397
3398 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
3399 if (rc < 0)
3400 goto done;
3401
3402 idx = key->keyidx;
3403
3404 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3405 action = MWL8K_ENCR_SET_KEY;
3406 else
3407 action = MWL8K_ENCR_SET_GROUP_KEY;
3408
3409 switch (key->cipher) {
3410 case WLAN_CIPHER_SUITE_WEP40:
3411 case WLAN_CIPHER_SUITE_WEP104:
3412 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
3413 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
3414 sizeof(*key) + key->keylen);
3415 mwl8k_vif->wep_key_conf[idx].enabled = 1;
3416 }
3417
3418 keymlen = 0;
3419 action = MWL8K_ENCR_SET_KEY;
3420 break;
3421 case WLAN_CIPHER_SUITE_TKIP:
3422 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
3423 break;
3424 case WLAN_CIPHER_SUITE_CCMP:
3425 keymlen = key->keylen;
3426 break;
3427 default:
3428 rc = -ENOTSUPP;
3429 goto done;
3430 }
3431
3432 memcpy(cmd->key_material, key->key, keymlen);
3433 cmd->action = cpu_to_le32(action);
3434
3435 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3436done:
3437 kfree(cmd);
3438
3439 return rc;
3440}
3441
3442static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
3443 struct ieee80211_vif *vif,
3444 u8 *addr,
3445 struct ieee80211_key_conf *key)
3446{
3447 struct mwl8k_cmd_set_key *cmd;
3448 int rc;
3449 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3450
3451 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3452 if (cmd == NULL)
3453 return -ENOMEM;
3454
3455 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
3456 if (rc < 0)
3457 goto done;
3458
3459 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3460 WLAN_CIPHER_SUITE_WEP104)
3461 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
3462
3463 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
3464
3465 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3466done:
3467 kfree(cmd);
3468
3469 return rc;
3470}
3471
3472static int mwl8k_set_key(struct ieee80211_hw *hw,
3473 enum set_key_cmd cmd_param,
3474 struct ieee80211_vif *vif,
3475 struct ieee80211_sta *sta,
3476 struct ieee80211_key_conf *key)
3477{
3478 int rc = 0;
3479 u8 encr_type;
3480 u8 *addr;
3481 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3482
3483 if (vif->type == NL80211_IFTYPE_STATION)
3484 return -EOPNOTSUPP;
3485
3486 if (sta == NULL)
3487 addr = hw->wiphy->perm_addr;
3488 else
3489 addr = sta->addr;
3490
3491 if (cmd_param == SET_KEY) {
3492 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
3493 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
3494 if (rc)
3495 goto out;
3496
3497 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
3498 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
3499 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
3500 else
3501 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
3502
3503 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
3504 encr_type);
3505 if (rc)
3506 goto out;
3507
3508 mwl8k_vif->is_hw_crypto_enabled = true;
3509
3510 } else {
3511 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
3512
3513 if (rc)
3514 goto out;
3515
3516 mwl8k_vif->is_hw_crypto_enabled = false;
3517
3518 }
3519out:
3520 return rc;
3521}
3522
55489b6e
LB
3523/*
3524 * CMD_UPDATE_STADB.
3525 */
25d81b1e
LB
3526struct ewc_ht_info {
3527 __le16 control1;
3528 __le16 control2;
3529 __le16 control3;
ba2d3587 3530} __packed;
25d81b1e
LB
3531
3532struct peer_capability_info {
3533 /* Peer type - AP vs. STA. */
3534 __u8 peer_type;
3535
3536 /* Basic 802.11 capabilities from assoc resp. */
3537 __le16 basic_caps;
3538
3539 /* Set if peer supports 802.11n high throughput (HT). */
3540 __u8 ht_support;
3541
3542 /* Valid if HT is supported. */
3543 __le16 ht_caps;
3544 __u8 extended_ht_caps;
3545 struct ewc_ht_info ewc_info;
3546
3547 /* Legacy rate table. Intersection of our rates and peer rates. */
3548 __u8 legacy_rates[12];
3549
3550 /* HT rate table. Intersection of our rates and peer rates. */
3551 __u8 ht_rates[16];
3552 __u8 pad[16];
3553
3554 /* If set, interoperability mode, no proprietary extensions. */
3555 __u8 interop;
3556 __u8 pad2;
3557 __u8 station_id;
3558 __le16 amsdu_enabled;
ba2d3587 3559} __packed;
25d81b1e 3560
55489b6e
LB
3561struct mwl8k_cmd_update_stadb {
3562 struct mwl8k_cmd_pkt header;
3563
3564 /* See STADB_ACTION_TYPE */
3565 __le32 action;
3566
3567 /* Peer MAC address */
3568 __u8 peer_addr[ETH_ALEN];
3569
3570 __le32 reserved;
3571
3572 /* Peer info - valid during add/update. */
3573 struct peer_capability_info peer_info;
ba2d3587 3574} __packed;
55489b6e 3575
a680400e
LB
3576#define MWL8K_STA_DB_MODIFY_ENTRY 1
3577#define MWL8K_STA_DB_DEL_ENTRY 2
3578
3579/* Peer Entry flags - used to define the type of the peer node */
3580#define MWL8K_PEER_TYPE_ACCESSPOINT 2
3581
3582static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 3583 struct ieee80211_vif *vif,
13935e2c 3584 struct ieee80211_sta *sta)
55489b6e 3585{
55489b6e 3586 struct mwl8k_cmd_update_stadb *cmd;
a680400e 3587 struct peer_capability_info *p;
8707d026 3588 u32 rates;
55489b6e
LB
3589 int rc;
3590
3591 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3592 if (cmd == NULL)
3593 return -ENOMEM;
3594
3595 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3596 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 3597 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 3598 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 3599
a680400e
LB
3600 p = &cmd->peer_info;
3601 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3602 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 3603 p->ht_support = sta->ht_cap.ht_supported;
b603742f 3604 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB
3605 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3606 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB
3607 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3608 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3609 else
3610 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3611 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 3612 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB
3613 p->interop = 1;
3614 p->amsdu_enabled = 0;
3615
3616 rc = mwl8k_post_cmd(hw, &cmd->header);
3617 kfree(cmd);
3618
3619 return rc ? rc : p->station_id;
3620}
3621
3622static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3623 struct ieee80211_vif *vif, u8 *addr)
3624{
3625 struct mwl8k_cmd_update_stadb *cmd;
3626 int rc;
3627
3628 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3629 if (cmd == NULL)
3630 return -ENOMEM;
3631
3632 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3633 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3634 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 3635 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 3636
a680400e 3637 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB
3638 kfree(cmd);
3639
3640 return rc;
3641}
3642
a66098da
LB
3643
3644/*
3645 * Interrupt handling.
3646 */
3647static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3648{
3649 struct ieee80211_hw *hw = dev_id;
3650 struct mwl8k_priv *priv = hw->priv;
3651 u32 status;
3652
3653 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB
3654 if (!status)
3655 return IRQ_NONE;
3656
1e9f9de3
LB
3657 if (status & MWL8K_A2H_INT_TX_DONE) {
3658 status &= ~MWL8K_A2H_INT_TX_DONE;
3659 tasklet_schedule(&priv->poll_tx_task);
3660 }
3661
a66098da 3662 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB
3663 status &= ~MWL8K_A2H_INT_RX_READY;
3664 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB
3665 }
3666
67e2eb27
LB
3667 if (status)
3668 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3669
a66098da 3670 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 3671 if (priv->hostcmd_wait != NULL)
a66098da 3672 complete(priv->hostcmd_wait);
a66098da
LB
3673 }
3674
3675 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 3676 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 3677 priv->radio_on && priv->pending_tx_pkts)
618952a7 3678 mwl8k_tx_start(priv);
a66098da
LB
3679 }
3680
3681 return IRQ_HANDLED;
3682}
3683
1e9f9de3
LB
3684static void mwl8k_tx_poll(unsigned long data)
3685{
3686 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3687 struct mwl8k_priv *priv = hw->priv;
3688 int limit;
3689 int i;
3690
3691 limit = 32;
3692
3693 spin_lock_bh(&priv->tx_lock);
3694
3695 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3696 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3697
3698 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3699 complete(priv->tx_wait);
3700 priv->tx_wait = NULL;
3701 }
3702
3703 spin_unlock_bh(&priv->tx_lock);
3704
3705 if (limit) {
3706 writel(~MWL8K_A2H_INT_TX_DONE,
3707 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3708 } else {
3709 tasklet_schedule(&priv->poll_tx_task);
3710 }
3711}
3712
67e2eb27
LB
3713static void mwl8k_rx_poll(unsigned long data)
3714{
3715 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3716 struct mwl8k_priv *priv = hw->priv;
3717 int limit;
3718
3719 limit = 32;
3720 limit -= rxq_process(hw, 0, limit);
3721 limit -= rxq_refill(hw, 0, limit);
3722
3723 if (limit) {
3724 writel(~MWL8K_A2H_INT_RX_READY,
3725 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3726 } else {
3727 tasklet_schedule(&priv->poll_rx_task);
3728 }
3729}
3730
a66098da
LB
3731
3732/*
3733 * Core driver operations.
3734 */
3735static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3736{
3737 struct mwl8k_priv *priv = hw->priv;
3738 int index = skb_get_queue_mapping(skb);
3739 int rc;
3740
9189c100 3741 if (!priv->radio_on) {
c96c31e4
JP
3742 wiphy_debug(hw->wiphy,
3743 "dropped TX frame since radio disabled\n");
a66098da
LB
3744 dev_kfree_skb(skb);
3745 return NETDEV_TX_OK;
3746 }
3747
3748 rc = mwl8k_txq_xmit(hw, index, skb);
3749
3750 return rc;
3751}
3752
a66098da
LB
3753static int mwl8k_start(struct ieee80211_hw *hw)
3754{
a66098da
LB
3755 struct mwl8k_priv *priv = hw->priv;
3756 int rc;
3757
a0607fd3 3758 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB
3759 IRQF_SHARED, MWL8K_NAME, hw);
3760 if (rc) {
5db55844 3761 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 3762 return -EIO;
a66098da
LB
3763 }
3764
67e2eb27 3765 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 3766 tasklet_enable(&priv->poll_tx_task);
67e2eb27 3767 tasklet_enable(&priv->poll_rx_task);
2ec610cb 3768
a66098da 3769 /* Enable interrupts */
c23b5a69 3770 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da 3771
2ec610cb
LB
3772 rc = mwl8k_fw_lock(hw);
3773 if (!rc) {
55489b6e 3774 rc = mwl8k_cmd_radio_enable(hw);
a66098da 3775
5e4cf166
LB
3776 if (!priv->ap_fw) {
3777 if (!rc)
55489b6e 3778 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 3779
5e4cf166
LB
3780 if (!rc)
3781 rc = mwl8k_cmd_set_pre_scan(hw);
3782
3783 if (!rc)
3784 rc = mwl8k_cmd_set_post_scan(hw,
3785 "\x00\x00\x00\x00\x00\x00");
3786 }
2ec610cb
LB
3787
3788 if (!rc)
55489b6e 3789 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 3790
2ec610cb 3791 if (!rc)
55489b6e 3792 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 3793
2ec610cb
LB
3794 mwl8k_fw_unlock(hw);
3795 }
3796
3797 if (rc) {
3798 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3799 free_irq(priv->pdev->irq, hw);
1e9f9de3 3800 tasklet_disable(&priv->poll_tx_task);
67e2eb27 3801 tasklet_disable(&priv->poll_rx_task);
2ec610cb 3802 }
a66098da
LB
3803
3804 return rc;
3805}
3806
a66098da
LB
3807static void mwl8k_stop(struct ieee80211_hw *hw)
3808{
a66098da
LB
3809 struct mwl8k_priv *priv = hw->priv;
3810 int i;
3811
55489b6e 3812 mwl8k_cmd_radio_disable(hw);
a66098da
LB
3813
3814 ieee80211_stop_queues(hw);
3815
a66098da 3816 /* Disable interrupts */
a66098da 3817 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB
3818 free_irq(priv->pdev->irq, hw);
3819
3820 /* Stop finalize join worker */
3821 cancel_work_sync(&priv->finalize_join_worker);
3822 if (priv->beacon_skb != NULL)
3823 dev_kfree_skb(priv->beacon_skb);
3824
67e2eb27 3825 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 3826 tasklet_disable(&priv->poll_tx_task);
67e2eb27 3827 tasklet_disable(&priv->poll_rx_task);
a66098da 3828
a66098da
LB
3829 /* Return all skbs to mac80211 */
3830 for (i = 0; i < MWL8K_TX_QUEUES; i++)
efb7c49a 3831 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB
3832}
3833
0863ade8
BC
3834static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
3835
a66098da 3836static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 3837 struct ieee80211_vif *vif)
a66098da
LB
3838{
3839 struct mwl8k_priv *priv = hw->priv;
3840 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 3841 u32 macids_supported;
0863ade8
BC
3842 int macid, rc;
3843 struct mwl8k_device_info *di;
a66098da 3844
a43c49a8
LB
3845 /*
3846 * Reject interface creation if sniffer mode is active, as
3847 * STA operation is mutually exclusive with hardware sniffer
b64fe619 3848 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB
3849 */
3850 if (priv->sniffer_enabled) {
c96c31e4
JP
3851 wiphy_info(hw->wiphy,
3852 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB
3853 return -EINVAL;
3854 }
3855
0863ade8 3856 di = priv->device_info;
ee0ddf18
LB
3857 switch (vif->type) {
3858 case NL80211_IFTYPE_AP:
0863ade8
BC
3859 if (!priv->ap_fw && di->fw_image_ap) {
3860 /* we must load the ap fw to meet this request */
3861 if (!list_empty(&priv->vif_list))
3862 return -EBUSY;
3863 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
3864 if (rc)
3865 return rc;
3866 }
ee0ddf18
LB
3867 macids_supported = priv->ap_macids_supported;
3868 break;
3869 case NL80211_IFTYPE_STATION:
0863ade8
BC
3870 if (priv->ap_fw && di->fw_image_sta) {
3871 /* we must load the sta fw to meet this request */
3872 if (!list_empty(&priv->vif_list))
3873 return -EBUSY;
3874 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
3875 if (rc)
3876 return rc;
3877 }
ee0ddf18
LB
3878 macids_supported = priv->sta_macids_supported;
3879 break;
3880 default:
3881 return -EINVAL;
3882 }
3883
3884 macid = ffs(macids_supported & ~priv->macids_used);
3885 if (!macid--)
3886 return -EBUSY;
3887
f5bb87cf 3888 /* Setup driver private area. */
1ed32e4f 3889 mwl8k_vif = MWL8K_VIF(vif);
a66098da 3890 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 3891 mwl8k_vif->vif = vif;
ee0ddf18 3892 mwl8k_vif->macid = macid;
a66098da 3893 mwl8k_vif->seqno = 0;
d9a07d49
NS
3894 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
3895 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 3896
aa21d0f6
LB
3897 /* Set the mac address. */
3898 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3899
3900 if (priv->ap_fw)
3901 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3902
ee0ddf18 3903 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 3904 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB
3905
3906 return 0;
3907}
3908
3909static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 3910 struct ieee80211_vif *vif)
a66098da
LB
3911{
3912 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 3913 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 3914
b64fe619
LB
3915 if (priv->ap_fw)
3916 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3917
aa21d0f6 3918 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
32060e1b 3919
ee0ddf18 3920 priv->macids_used &= ~(1 << mwl8k_vif->macid);
f5bb87cf 3921 list_del(&mwl8k_vif->list);
a66098da
LB
3922}
3923
ee03a932 3924static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 3925{
a66098da
LB
3926 struct ieee80211_conf *conf = &hw->conf;
3927 struct mwl8k_priv *priv = hw->priv;
ee03a932 3928 int rc;
a66098da 3929
7595d67a 3930 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 3931 mwl8k_cmd_radio_disable(hw);
ee03a932 3932 return 0;
7595d67a
LB
3933 }
3934
ee03a932
LB
3935 rc = mwl8k_fw_lock(hw);
3936 if (rc)
3937 return rc;
a66098da 3938
55489b6e 3939 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB
3940 if (rc)
3941 goto out;
a66098da 3942
610677d2 3943 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB
3944 if (rc)
3945 goto out;
3946
a66098da
LB
3947 if (conf->power_level > 18)
3948 conf->power_level = 18;
a66098da 3949
08b06347 3950 if (priv->ap_fw) {
41fdf097
NS
3951 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
3952 if (rc)
3953 goto out;
3954
da62b761
NS
3955 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
3956 if (rc)
3957 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
3958 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3959 if (rc)
3960 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
3961
08b06347 3962 } else {
41fdf097
NS
3963 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3964 if (rc)
3965 goto out;
08b06347
LB
3966 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3967 }
a66098da 3968
ee03a932
LB
3969out:
3970 mwl8k_fw_unlock(hw);
a66098da 3971
ee03a932 3972 return rc;
a66098da
LB
3973}
3974
b64fe619
LB
3975static void
3976mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3977 struct ieee80211_bss_conf *info, u32 changed)
a66098da 3978{
a66098da 3979 struct mwl8k_priv *priv = hw->priv;
c3cbbe8a 3980 u32 ap_legacy_rates;
13935e2c 3981 u8 ap_mcs_rates[16];
3a980d0a
LB
3982 int rc;
3983
c3cbbe8a 3984 if (mwl8k_fw_lock(hw))
3a980d0a 3985 return;
a66098da 3986
c3cbbe8a
LB
3987 /*
3988 * No need to capture a beacon if we're no longer associated.
3989 */
3990 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3991 priv->capture_beacon = false;
3a980d0a 3992
c3cbbe8a 3993 /*
13935e2c 3994 * Get the AP's legacy and MCS rates.
c3cbbe8a 3995 */
7dc6a7a7 3996 if (vif->bss_conf.assoc) {
c6e96010 3997 struct ieee80211_sta *ap;
c97470dd 3998
c6e96010 3999 rcu_read_lock();
c6e96010 4000
c3cbbe8a
LB
4001 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4002 if (ap == NULL) {
4003 rcu_read_unlock();
c6e96010 4004 goto out;
c3cbbe8a
LB
4005 }
4006
8707d026
LB
4007 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4008 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4009 } else {
4010 ap_legacy_rates =
4011 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4012 }
13935e2c 4013 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB
4014
4015 rcu_read_unlock();
4016 }
c6e96010 4017
c3cbbe8a 4018 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4019 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB
4020 if (rc)
4021 goto out;
a66098da 4022
b71ed2c6 4023 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB
4024 if (rc)
4025 goto out;
c3cbbe8a 4026 }
a66098da 4027
c3cbbe8a 4028 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB
4029 rc = mwl8k_set_radio_preamble(hw,
4030 vif->bss_conf.use_short_preamble);
3a980d0a
LB
4031 if (rc)
4032 goto out;
c3cbbe8a 4033 }
a66098da 4034
c3cbbe8a 4035 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4036 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB
4037 if (rc)
4038 goto out;
c3cbbe8a 4039 }
a66098da 4040
c97470dd
LB
4041 if (vif->bss_conf.assoc &&
4042 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4043 BSS_CHANGED_HT))) {
c3cbbe8a 4044 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB
4045 if (rc)
4046 goto out;
c3cbbe8a 4047 }
a66098da 4048
c3cbbe8a
LB
4049 if (vif->bss_conf.assoc &&
4050 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB
4051 /*
4052 * Finalize the join. Tell rx handler to process
4053 * next beacon from our BSSID.
4054 */
0a11dfc3 4055 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4056 priv->capture_beacon = true;
a66098da
LB
4057 }
4058
3a980d0a
LB
4059out:
4060 mwl8k_fw_unlock(hw);
a66098da
LB
4061}
4062
b64fe619
LB
4063static void
4064mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4065 struct ieee80211_bss_conf *info, u32 changed)
4066{
4067 int rc;
4068
4069 if (mwl8k_fw_lock(hw))
4070 return;
4071
4072 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4073 rc = mwl8k_set_radio_preamble(hw,
4074 vif->bss_conf.use_short_preamble);
4075 if (rc)
4076 goto out;
4077 }
4078
4079 if (changed & BSS_CHANGED_BASIC_RATES) {
4080 int idx;
4081 int rate;
4082
4083 /*
4084 * Use lowest supported basic rate for multicasts
4085 * and management frames (such as probe responses --
4086 * beacons will always go out at 1 Mb/s).
4087 */
4088 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB
4089 if (idx)
4090 idx--;
4091
4092 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4093 rate = mwl8k_rates_24[idx].hw_value;
4094 else
4095 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB
4096
4097 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4098 }
4099
4100 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4101 struct sk_buff *skb;
4102
4103 skb = ieee80211_beacon_get(hw, vif);
4104 if (skb != NULL) {
aa21d0f6 4105 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB
4106 kfree_skb(skb);
4107 }
4108 }
4109
4110 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4111 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB
4112
4113out:
4114 mwl8k_fw_unlock(hw);
4115}
4116
4117static void
4118mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4119 struct ieee80211_bss_conf *info, u32 changed)
4120{
4121 struct mwl8k_priv *priv = hw->priv;
4122
4123 if (!priv->ap_fw)
4124 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4125 else
4126 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4127}
4128
e81cd2d6 4129static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4130 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB
4131{
4132 struct mwl8k_cmd_pkt *cmd;
4133
447ced07
LB
4134 /*
4135 * Synthesize and return a command packet that programs the
4136 * hardware multicast address filter. At this point we don't
4137 * know whether FIF_ALLMULTI is being requested, but if it is,
4138 * we'll end up throwing this packet away and creating a new
4139 * one in mwl8k_configure_filter().
4140 */
22bedad3 4141 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB
4142
4143 return (unsigned long)cmd;
4144}
4145
a43c49a8
LB
4146static int
4147mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4148 unsigned int changed_flags,
4149 unsigned int *total_flags)
4150{
4151 struct mwl8k_priv *priv = hw->priv;
4152
4153 /*
4154 * Hardware sniffer mode is mutually exclusive with STA
4155 * operation, so refuse to enable sniffer mode if a STA
4156 * interface is active.
4157 */
f5bb87cf 4158 if (!list_empty(&priv->vif_list)) {
a43c49a8 4159 if (net_ratelimit())
c96c31e4
JP
4160 wiphy_info(hw->wiphy,
4161 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB
4162 return 0;
4163 }
4164
4165 if (!priv->sniffer_enabled) {
55489b6e 4166 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB
4167 return 0;
4168 priv->sniffer_enabled = true;
4169 }
4170
4171 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4172 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4173 FIF_OTHER_BSS;
4174
4175 return 1;
4176}
4177
f5bb87cf
LB
4178static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4179{
4180 if (!list_empty(&priv->vif_list))
4181 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4182
4183 return NULL;
4184}
4185
e6935ea1
LB
4186static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4187 unsigned int changed_flags,
4188 unsigned int *total_flags,
4189 u64 multicast)
4190{
4191 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB
4192 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4193
c0adae2c
LB
4194 /*
4195 * AP firmware doesn't allow fine-grained control over
4196 * the receive filter.
4197 */
4198 if (priv->ap_fw) {
4199 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4200 kfree(cmd);
4201 return;
4202 }
4203
a43c49a8
LB
4204 /*
4205 * Enable hardware sniffer mode if FIF_CONTROL or
4206 * FIF_OTHER_BSS is requested.
4207 */
4208 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
4209 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
4210 kfree(cmd);
4211 return;
4212 }
a66098da 4213
e6935ea1 4214 /* Clear unsupported feature flags */
447ced07 4215 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 4216
90852f7a
LB
4217 if (mwl8k_fw_lock(hw)) {
4218 kfree(cmd);
e6935ea1 4219 return;
90852f7a 4220 }
a66098da 4221
a43c49a8 4222 if (priv->sniffer_enabled) {
55489b6e 4223 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB
4224 priv->sniffer_enabled = false;
4225 }
4226
e6935ea1 4227 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB
4228 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
4229 /*
4230 * Disable the BSS filter.
4231 */
e6935ea1 4232 mwl8k_cmd_set_pre_scan(hw);
77165d88 4233 } else {
f5bb87cf 4234 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 4235 const u8 *bssid;
a94cc97e 4236
77165d88
LB
4237 /*
4238 * Enable the BSS filter.
4239 *
4240 * If there is an active STA interface, use that
4241 * interface's BSSID, otherwise use a dummy one
4242 * (where the OUI part needs to be nonzero for
4243 * the BSSID to be accepted by POST_SCAN).
4244 */
f5bb87cf
LB
4245 mwl8k_vif = mwl8k_first_vif(priv);
4246 if (mwl8k_vif != NULL)
4247 bssid = mwl8k_vif->vif->bss_conf.bssid;
4248 else
4249 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 4250
e6935ea1 4251 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB
4252 }
4253 }
4254
447ced07
LB
4255 /*
4256 * If FIF_ALLMULTI is being requested, throw away the command
4257 * packet that ->prepare_multicast() built and replace it with
4258 * a command packet that enables reception of all multicast
4259 * packets.
4260 */
4261 if (*total_flags & FIF_ALLMULTI) {
4262 kfree(cmd);
22bedad3 4263 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB
4264 }
4265
4266 if (cmd != NULL) {
4267 mwl8k_post_cmd(hw, cmd);
4268 kfree(cmd);
e6935ea1 4269 }
a66098da 4270
e6935ea1 4271 mwl8k_fw_unlock(hw);
a66098da
LB
4272}
4273
a66098da
LB
4274static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
4275{
c2c2b12a 4276 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB
4277}
4278
4a6967b8
JB
4279static int mwl8k_sta_remove(struct ieee80211_hw *hw,
4280 struct ieee80211_vif *vif,
4281 struct ieee80211_sta *sta)
3f5610ff
LB
4282{
4283 struct mwl8k_priv *priv = hw->priv;
4284
4a6967b8
JB
4285 if (priv->ap_fw)
4286 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
4287 else
4288 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB
4289}
4290
4a6967b8
JB
4291static int mwl8k_sta_add(struct ieee80211_hw *hw,
4292 struct ieee80211_vif *vif,
4293 struct ieee80211_sta *sta)
bbfd9128
LB
4294{
4295 struct mwl8k_priv *priv = hw->priv;
4a6967b8 4296 int ret;
fcdc403c
NS
4297 int i;
4298 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4299 struct ieee80211_key_conf *key;
bbfd9128 4300
4a6967b8
JB
4301 if (!priv->ap_fw) {
4302 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
4303 if (ret >= 0) {
4304 MWL8K_STA(sta)->peer_id = ret;
fcdc403c 4305 ret = 0;
4a6967b8 4306 }
bbfd9128 4307
d9a07d49
NS
4308 } else {
4309 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 4310 }
4a6967b8 4311
d9a07d49
NS
4312 for (i = 0; i < NUM_WEP_KEYS; i++) {
4313 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
4314 if (mwl8k_vif->wep_key_conf[i].enabled)
4315 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
4316 }
fcdc403c 4317 return ret;
bbfd9128
LB
4318}
4319
a66098da
LB
4320static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
4321 const struct ieee80211_tx_queue_params *params)
4322{
3e4f542c 4323 struct mwl8k_priv *priv = hw->priv;
a66098da 4324 int rc;
a66098da 4325
3e4f542c
LB
4326 rc = mwl8k_fw_lock(hw);
4327 if (!rc) {
0863ade8
BC
4328 BUG_ON(queue > MWL8K_TX_QUEUES - 1);
4329 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
4330
3e4f542c 4331 if (!priv->wmm_enabled)
55489b6e 4332 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 4333
3e4f542c 4334 if (!rc)
55489b6e
LB
4335 rc = mwl8k_cmd_set_edca_params(hw, queue,
4336 params->cw_min,
4337 params->cw_max,
4338 params->aifs,
4339 params->txop);
3e4f542c
LB
4340
4341 mwl8k_fw_unlock(hw);
a66098da 4342 }
3e4f542c 4343
a66098da
LB
4344 return rc;
4345}
4346
a66098da
LB
4347static int mwl8k_get_stats(struct ieee80211_hw *hw,
4348 struct ieee80211_low_level_stats *stats)
4349{
55489b6e 4350 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB
4351}
4352
0d462bbb
JL
4353static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
4354 struct survey_info *survey)
4355{
4356 struct mwl8k_priv *priv = hw->priv;
4357 struct ieee80211_conf *conf = &hw->conf;
4358
4359 if (idx != 0)
4360 return -ENOENT;
4361
4362 survey->channel = conf->channel;
4363 survey->filled = SURVEY_INFO_NOISE_DBM;
4364 survey->noise = priv->noise;
4365
4366 return 0;
4367}
4368
a2292d83
LB
4369static int
4370mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4371 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB
4372 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
4373 u8 buf_size)
a2292d83
LB
4374{
4375 switch (action) {
4376 case IEEE80211_AMPDU_RX_START:
4377 case IEEE80211_AMPDU_RX_STOP:
4378 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
4379 return -ENOTSUPP;
4380 return 0;
4381 default:
4382 return -ENOTSUPP;
4383 }
4384}
4385
a66098da
LB
4386static const struct ieee80211_ops mwl8k_ops = {
4387 .tx = mwl8k_tx,
4388 .start = mwl8k_start,
4389 .stop = mwl8k_stop,
4390 .add_interface = mwl8k_add_interface,
4391 .remove_interface = mwl8k_remove_interface,
4392 .config = mwl8k_config,
a66098da 4393 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 4394 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 4395 .configure_filter = mwl8k_configure_filter,
fcdc403c 4396 .set_key = mwl8k_set_key,
a66098da 4397 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB
4398 .sta_add = mwl8k_sta_add,
4399 .sta_remove = mwl8k_sta_remove,
a66098da 4400 .conf_tx = mwl8k_conf_tx,
a66098da 4401 .get_stats = mwl8k_get_stats,
0d462bbb 4402 .get_survey = mwl8k_get_survey,
a2292d83 4403 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB
4404};
4405
a66098da
LB
4406static void mwl8k_finalize_join_worker(struct work_struct *work)
4407{
4408 struct mwl8k_priv *priv =
4409 container_of(work, struct mwl8k_priv, finalize_join_worker);
4410 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB
4411 struct ieee80211_mgmt *mgmt = (void *)skb->data;
4412 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
4413 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
4414 mgmt->u.beacon.variable, len);
4415 int dtim_period = 1;
4416
4417 if (tim && tim[1] >= 2)
4418 dtim_period = tim[3];
a66098da 4419
56007a02 4420 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 4421
f5bb87cf 4422 dev_kfree_skb(skb);
a66098da
LB
4423 priv->beacon_skb = NULL;
4424}
4425
bcb628d5 4426enum {
9e1b17ea
LB
4427 MWL8363 = 0,
4428 MWL8687,
bcb628d5 4429 MWL8366,
6f6d1e9a
LB
4430};
4431
952a0e96
BC
4432#define MWL8K_8366_AP_FW_API 1
4433#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
4434#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
4435
bcb628d5 4436static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
9e1b17ea
LB
4437 [MWL8363] = {
4438 .part_name = "88w8363",
4439 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 4440 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 4441 },
49eb691c 4442 [MWL8687] = {
bcb628d5
JL
4443 .part_name = "88w8687",
4444 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 4445 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 4446 },
49eb691c 4447 [MWL8366] = {
bcb628d5
JL
4448 .part_name = "88w8366",
4449 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 4450 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC
4451 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
4452 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 4453 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 4454 },
45a390dd
LB
4455};
4456
c92d4ede
LB
4457MODULE_FIRMWARE("mwl8k/helper_8363.fw");
4458MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
4459MODULE_FIRMWARE("mwl8k/helper_8687.fw");
4460MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
4461MODULE_FIRMWARE("mwl8k/helper_8366.fw");
4462MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 4463MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 4464
45a390dd 4465static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 4466 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB
4467 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
4468 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL
4469 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
4470 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
4471 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 4472 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 4473 { },
45a390dd
LB
4474};
4475MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
4476
99020471
BC
4477static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
4478{
4479 int rc;
4480 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
4481 "Trying alternative firmware %s\n", pci_name(priv->pdev),
4482 priv->fw_pref, priv->fw_alt);
4483 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
4484 if (rc) {
4485 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
4486 pci_name(priv->pdev), priv->fw_alt);
4487 return rc;
4488 }
4489 return 0;
4490}
4491
4492static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
4493static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
4494{
4495 struct mwl8k_priv *priv = context;
4496 struct mwl8k_device_info *di = priv->device_info;
4497 int rc;
4498
4499 switch (priv->fw_state) {
4500 case FW_STATE_INIT:
4501 if (!fw) {
4502 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
4503 pci_name(priv->pdev), di->helper_image);
4504 goto fail;
4505 }
4506 priv->fw_helper = fw;
4507 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
4508 true);
4509 if (rc && priv->fw_alt) {
4510 rc = mwl8k_request_alt_fw(priv);
4511 if (rc)
4512 goto fail;
4513 priv->fw_state = FW_STATE_LOADING_ALT;
4514 } else if (rc)
4515 goto fail;
4516 else
4517 priv->fw_state = FW_STATE_LOADING_PREF;
4518 break;
4519
4520 case FW_STATE_LOADING_PREF:
4521 if (!fw) {
4522 if (priv->fw_alt) {
4523 rc = mwl8k_request_alt_fw(priv);
4524 if (rc)
4525 goto fail;
4526 priv->fw_state = FW_STATE_LOADING_ALT;
4527 } else
4528 goto fail;
4529 } else {
4530 priv->fw_ucode = fw;
4531 rc = mwl8k_firmware_load_success(priv);
4532 if (rc)
4533 goto fail;
4534 else
4535 complete(&priv->firmware_loading_complete);
4536 }
4537 break;
4538
4539 case FW_STATE_LOADING_ALT:
4540 if (!fw) {
4541 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
4542 pci_name(priv->pdev), di->helper_image);
4543 goto fail;
4544 }
4545 priv->fw_ucode = fw;
4546 rc = mwl8k_firmware_load_success(priv);
4547 if (rc)
4548 goto fail;
4549 else
4550 complete(&priv->firmware_loading_complete);
4551 break;
4552
4553 default:
4554 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
4555 MWL8K_NAME, priv->fw_state);
4556 BUG_ON(1);
4557 }
4558
4559 return;
4560
4561fail:
4562 priv->fw_state = FW_STATE_ERROR;
4563 complete(&priv->firmware_loading_complete);
4564 device_release_driver(&priv->pdev->dev);
4565 mwl8k_release_firmware(priv);
4566}
4567
4568static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
4569 bool nowait)
a66098da 4570{
3cc7772c 4571 struct mwl8k_priv *priv = hw->priv;
a66098da 4572 int rc;
be695fc4
LB
4573
4574 /* Reset firmware and hardware */
4575 mwl8k_hw_reset(priv);
4576
4577 /* Ask userland hotplug daemon for the device firmware */
99020471 4578 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 4579 if (rc) {
5db55844 4580 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 4581 return rc;
be695fc4
LB
4582 }
4583
99020471
BC
4584 if (nowait)
4585 return rc;
4586
be695fc4
LB
4587 /* Load firmware into hardware */
4588 rc = mwl8k_load_firmware(hw);
3cc7772c 4589 if (rc)
5db55844 4590 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB
4591
4592 /* Reclaim memory once firmware is successfully loaded */
4593 mwl8k_release_firmware(priv);
4594
3cc7772c
BC
4595 return rc;
4596}
4597
4598/* initialize hw after successfully loading a firmware image */
4599static int mwl8k_probe_hw(struct ieee80211_hw *hw)
4600{
4601 struct mwl8k_priv *priv = hw->priv;
4602 int rc = 0;
4603 int i;
be695fc4 4604
91942230 4605 if (priv->ap_fw) {
89a91f4f 4606 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 4607 if (priv->rxd_ops == NULL) {
c96c31e4
JP
4608 wiphy_err(hw->wiphy,
4609 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB
4610 goto err_stop_firmware;
4611 }
4612 } else {
89a91f4f 4613 priv->rxd_ops = &rxd_sta_ops;
91942230 4614 }
be695fc4
LB
4615
4616 priv->sniffer_enabled = false;
4617 priv->wmm_enabled = false;
4618 priv->pending_tx_pkts = 0;
4619
a66098da
LB
4620 rc = mwl8k_rxq_init(hw, 0);
4621 if (rc)
3cc7772c 4622 goto err_stop_firmware;
a66098da
LB
4623 rxq_refill(hw, 0, INT_MAX);
4624
a66098da
LB
4625 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4626 rc = mwl8k_txq_init(hw, i);
4627 if (rc)
4628 goto err_free_queues;
4629 }
4630
4631 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 4632 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
67e2eb27 4633 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
1e9f9de3 4634 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
a66098da
LB
4635 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4636
a0607fd3 4637 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB
4638 IRQF_SHARED, MWL8K_NAME, hw);
4639 if (rc) {
5db55844 4640 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB
4641 goto err_free_queues;
4642 }
4643
a66098da
LB
4644 /*
4645 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 4646 * commands use interrupts and avoid polling. Disable
a66098da
LB
4647 * interrupts when done.
4648 */
c23b5a69 4649 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB
4650
4651 /* Get config data, mac addrs etc */
42fba21d
LB
4652 if (priv->ap_fw) {
4653 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4654 if (!rc)
4655 rc = mwl8k_cmd_set_hw_spec(hw);
4656 } else {
4657 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4658 }
a66098da 4659 if (rc) {
5db55844 4660 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 4661 goto err_free_irq;
a66098da
LB
4662 }
4663
4664 /* Turn radio off */
55489b6e 4665 rc = mwl8k_cmd_radio_disable(hw);
a66098da 4666 if (rc) {
5db55844 4667 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 4668 goto err_free_irq;
a66098da
LB
4669 }
4670
32060e1b 4671 /* Clear MAC address */
aa21d0f6 4672 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 4673 if (rc) {
5db55844 4674 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 4675 goto err_free_irq;
32060e1b
LB
4676 }
4677
a66098da 4678 /* Disable interrupts */
a66098da 4679 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB
4680 free_irq(priv->pdev->irq, hw);
4681
c96c31e4
JP
4682 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
4683 priv->device_info->part_name,
4684 priv->hw_rev, hw->wiphy->perm_addr,
4685 priv->ap_fw ? "AP" : "STA",
4686 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4687 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB
4688
4689 return 0;
4690
a66098da 4691err_free_irq:
a66098da 4692 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB
4693 free_irq(priv->pdev->irq, hw);
4694
4695err_free_queues:
4696 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4697 mwl8k_txq_deinit(hw, i);
4698 mwl8k_rxq_deinit(hw, 0);
4699
3cc7772c
BC
4700err_stop_firmware:
4701 mwl8k_hw_reset(priv);
4702
4703 return rc;
4704}
4705
4706/*
4707 * invoke mwl8k_reload_firmware to change the firmware image after the device
4708 * has already been registered
4709 */
4710static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
4711{
4712 int i, rc = 0;
4713 struct mwl8k_priv *priv = hw->priv;
4714
4715 mwl8k_stop(hw);
4716 mwl8k_rxq_deinit(hw, 0);
4717
4718 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4719 mwl8k_txq_deinit(hw, i);
4720
99020471 4721 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC
4722 if (rc)
4723 goto fail;
4724
4725 rc = mwl8k_probe_hw(hw);
4726 if (rc)
4727 goto fail;
4728
4729 rc = mwl8k_start(hw);
4730 if (rc)
4731 goto fail;
4732
4733 rc = mwl8k_config(hw, ~0);
4734 if (rc)
4735 goto fail;
4736
4737 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4738 rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
4739 if (rc)
4740 goto fail;
4741 }
4742
4743 return rc;
4744
4745fail:
4746 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
4747 return rc;
4748}
4749
4750static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
4751{
4752 struct ieee80211_hw *hw = priv->hw;
4753 int i, rc;
4754
99020471
BC
4755 rc = mwl8k_load_firmware(hw);
4756 mwl8k_release_firmware(priv);
4757 if (rc) {
4758 wiphy_err(hw->wiphy, "Cannot start firmware\n");
4759 return rc;
4760 }
4761
3cc7772c
BC
4762 /*
4763 * Extra headroom is the size of the required DMA header
4764 * minus the size of the smallest 802.11 frame (CTS frame).
4765 */
4766 hw->extra_tx_headroom =
4767 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
4768
4769 hw->channel_change_time = 10;
4770
4771 hw->queues = MWL8K_TX_QUEUES;
4772
4773 /* Set rssi values to dBm */
0bf22c37 4774 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
3cc7772c
BC
4775 hw->vif_data_size = sizeof(struct mwl8k_vif);
4776 hw->sta_data_size = sizeof(struct mwl8k_sta);
4777
4778 priv->macids_used = 0;
4779 INIT_LIST_HEAD(&priv->vif_list);
4780
4781 /* Set default radio state and preamble */
4782 priv->radio_on = 0;
4783 priv->radio_short_preamble = 0;
4784
4785 /* Finalize join worker */
4786 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4787
4788 /* TX reclaim and RX tasklets. */
4789 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4790 tasklet_disable(&priv->poll_tx_task);
4791 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4792 tasklet_disable(&priv->poll_rx_task);
4793
4794 /* Power management cookie */
4795 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4796 if (priv->cookie == NULL)
4797 return -ENOMEM;
4798
4799 mutex_init(&priv->fw_mutex);
4800 priv->fw_mutex_owner = NULL;
4801 priv->fw_mutex_depth = 0;
4802 priv->hostcmd_wait = NULL;
4803
4804 spin_lock_init(&priv->tx_lock);
4805
4806 priv->tx_wait = NULL;
4807
4808 rc = mwl8k_probe_hw(hw);
4809 if (rc)
4810 goto err_free_cookie;
4811
4812 hw->wiphy->interface_modes = 0;
4813 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
4814 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4815 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
4816 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4817
4818 rc = ieee80211_register_hw(hw);
4819 if (rc) {
4820 wiphy_err(hw->wiphy, "Cannot register device\n");
4821 goto err_unprobe_hw;
4822 }
4823
4824 return 0;
4825
4826err_unprobe_hw:
4827 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4828 mwl8k_txq_deinit(hw, i);
4829 mwl8k_rxq_deinit(hw, 0);
4830
be695fc4 4831err_free_cookie:
a66098da
LB
4832 if (priv->cookie != NULL)
4833 pci_free_consistent(priv->pdev, 4,
4834 priv->cookie, priv->cookie_dma);
4835
3cc7772c
BC
4836 return rc;
4837}
4838static int __devinit mwl8k_probe(struct pci_dev *pdev,
4839 const struct pci_device_id *id)
4840{
4841 static int printed_version;
4842 struct ieee80211_hw *hw;
4843 struct mwl8k_priv *priv;
0863ade8 4844 struct mwl8k_device_info *di;
3cc7772c
BC
4845 int rc;
4846
4847 if (!printed_version) {
4848 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
4849 printed_version = 1;
4850 }
4851
4852
4853 rc = pci_enable_device(pdev);
4854 if (rc) {
4855 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
4856 MWL8K_NAME);
4857 return rc;
4858 }
4859
4860 rc = pci_request_regions(pdev, MWL8K_NAME);
4861 if (rc) {
4862 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
4863 MWL8K_NAME);
4864 goto err_disable_device;
4865 }
4866
4867 pci_set_master(pdev);
4868
4869
4870 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
4871 if (hw == NULL) {
4872 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
4873 rc = -ENOMEM;
4874 goto err_free_reg;
4875 }
4876
4877 SET_IEEE80211_DEV(hw, &pdev->dev);
4878 pci_set_drvdata(pdev, hw);
4879
4880 priv = hw->priv;
4881 priv->hw = hw;
4882 priv->pdev = pdev;
4883 priv->device_info = &mwl8k_info_tbl[id->driver_data];
4884
4885
4886 priv->sram = pci_iomap(pdev, 0, 0x10000);
4887 if (priv->sram == NULL) {
4888 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
4889 goto err_iounmap;
4890 }
4891
4892 /*
4893 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
4894 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
4895 */
4896 priv->regs = pci_iomap(pdev, 1, 0x10000);
4897 if (priv->regs == NULL) {
4898 priv->regs = pci_iomap(pdev, 2, 0x10000);
4899 if (priv->regs == NULL) {
4900 wiphy_err(hw->wiphy, "Cannot map device registers\n");
4901 goto err_iounmap;
4902 }
4903 }
4904
0863ade8 4905 /*
99020471
BC
4906 * Choose the initial fw image depending on user input. If a second
4907 * image is available, make it the alternative image that will be
4908 * loaded if the first one fails.
0863ade8 4909 */
99020471 4910 init_completion(&priv->firmware_loading_complete);
0863ade8 4911 di = priv->device_info;
99020471
BC
4912 if (ap_mode_default && di->fw_image_ap) {
4913 priv->fw_pref = di->fw_image_ap;
4914 priv->fw_alt = di->fw_image_sta;
4915 } else if (!ap_mode_default && di->fw_image_sta) {
4916 priv->fw_pref = di->fw_image_sta;
4917 priv->fw_alt = di->fw_image_ap;
4918 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 4919 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 4920 priv->fw_pref = di->fw_image_sta;
0863ade8
BC
4921 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
4922 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC
4923 priv->fw_pref = di->fw_image_ap;
4924 }
4925 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC
4926 if (rc)
4927 goto err_stop_firmware;
99020471 4928 return rc;
3cc7772c 4929
be695fc4
LB
4930err_stop_firmware:
4931 mwl8k_hw_reset(priv);
be695fc4
LB
4932
4933err_iounmap:
a66098da
LB
4934 if (priv->regs != NULL)
4935 pci_iounmap(pdev, priv->regs);
4936
5b9482dd
LB
4937 if (priv->sram != NULL)
4938 pci_iounmap(pdev, priv->sram);
4939
a66098da
LB
4940 pci_set_drvdata(pdev, NULL);
4941 ieee80211_free_hw(hw);
4942
4943err_free_reg:
4944 pci_release_regions(pdev);
3db95e50
LB
4945
4946err_disable_device:
a66098da
LB
4947 pci_disable_device(pdev);
4948
4949 return rc;
4950}
4951
230f7af0 4952static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
a66098da
LB
4953{
4954 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4955}
4956
230f7af0 4957static void __devexit mwl8k_remove(struct pci_dev *pdev)
a66098da
LB
4958{
4959 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4960 struct mwl8k_priv *priv;
4961 int i;
4962
4963 if (hw == NULL)
4964 return;
4965 priv = hw->priv;
4966
99020471
BC
4967 wait_for_completion(&priv->firmware_loading_complete);
4968
4969 if (priv->fw_state == FW_STATE_ERROR) {
4970 mwl8k_hw_reset(priv);
4971 goto unmap;
4972 }
4973
a66098da
LB
4974 ieee80211_stop_queues(hw);
4975
60aa569f
LB
4976 ieee80211_unregister_hw(hw);
4977
67e2eb27 4978 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 4979 tasklet_kill(&priv->poll_tx_task);
67e2eb27 4980 tasklet_kill(&priv->poll_rx_task);
a66098da 4981
a66098da
LB
4982 /* Stop hardware */
4983 mwl8k_hw_reset(priv);
4984
4985 /* Return all skbs to mac80211 */
4986 for (i = 0; i < MWL8K_TX_QUEUES; i++)
efb7c49a 4987 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 4988
a66098da
LB
4989 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4990 mwl8k_txq_deinit(hw, i);
4991
4992 mwl8k_rxq_deinit(hw, 0);
4993
c2c357ce 4994 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 4995
99020471 4996unmap:
a66098da 4997 pci_iounmap(pdev, priv->regs);
5b9482dd 4998 pci_iounmap(pdev, priv->sram);
a66098da
LB
4999 pci_set_drvdata(pdev, NULL);
5000 ieee80211_free_hw(hw);
5001 pci_release_regions(pdev);
5002 pci_disable_device(pdev);
5003}
5004
5005static struct pci_driver mwl8k_driver = {
5006 .name = MWL8K_NAME,
45a390dd 5007 .id_table = mwl8k_pci_id_table,
a66098da
LB
5008 .probe = mwl8k_probe,
5009 .remove = __devexit_p(mwl8k_remove),
5010 .shutdown = __devexit_p(mwl8k_shutdown),
5011};
5012
5013static int __init mwl8k_init(void)
5014{
5015 return pci_register_driver(&mwl8k_driver);
5016}
5017
5018static void __exit mwl8k_exit(void)
5019{
5020 pci_unregister_driver(&mwl8k_driver);
5021}
5022
5023module_init(mwl8k_init);
5024module_exit(mwl8k_exit);
c2c357ce
LB
5025
5026MODULE_DESCRIPTION(MWL8K_DESC);
5027MODULE_VERSION(MWL8K_VERSION);
5028MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
5029MODULE_LICENSE("GPL");
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