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ath9k_hw: remove unnecessary parts of the AR9380 SREV check
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
CommitLineData
a66098da 1/*
ce9e2e1b
LB		 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
a66098da
LB		 6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
3d76e82c 15#include <linux/sched.h>
a66098da
LB		 16#include <linux/spinlock.h>
17#include <linux/list.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20#include <linux/completion.h>
21#include <linux/etherdevice.h>
5a0e3ad6 22#include <linux/slab.h>
a66098da
LB		 23#include <net/mac80211.h>
24#include <linux/moduleparam.h>
25#include <linux/firmware.h>
26#include <linux/workqueue.h>
27
28#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29#define MWL8K_NAME KBUILD_MODNAME
a5fb297d 30#define MWL8K_VERSION "0.12"
a66098da 31
0863ade8
BC		 32/* Module parameters */
33static unsigned ap_mode_default;
34module_param(ap_mode_default, bool, 0);
35MODULE_PARM_DESC(ap_mode_default,
36 "Set to 1 to make ap mode the default instead of sta mode");
37
a66098da
LB		 38/* Register definitions */
39#define MWL8K_HIU_GEN_PTR 0x00000c10
ce9e2e1b
LB		 40#define MWL8K_MODE_STA 0x0000005a
41#define MWL8K_MODE_AP 0x000000a5
a66098da 42#define MWL8K_HIU_INT_CODE 0x00000c14
ce9e2e1b
LB		 43#define MWL8K_FWSTA_READY 0xf0f1f2f4
44#define MWL8K_FWAP_READY 0xf1f2f4a5
45#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
a66098da
LB		 46#define MWL8K_HIU_SCRATCH 0x00000c40
47
48/* Host->device communications */
49#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
ce9e2e1b
LB		 54#define MWL8K_H2A_INT_DUMMY (1 << 20)
55#define MWL8K_H2A_INT_RESET (1 << 15)
56#define MWL8K_H2A_INT_DOORBELL (1 << 1)
57#define MWL8K_H2A_INT_PPA_READY (1 << 0)
a66098da
LB		 58
59/* Device->host communications */
60#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
ce9e2e1b 65#define MWL8K_A2H_INT_DUMMY (1 << 20)
3aefc37e 66#define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
ce9e2e1b
LB		 67#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
68#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
69#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
70#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
71#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
72#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
73#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
74#define MWL8K_A2H_INT_RX_READY (1 << 1)
75#define MWL8K_A2H_INT_TX_DONE (1 << 0)
a66098da
LB		 76
77#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
78 MWL8K_A2H_INT_CHNL_SWITCHED | \
79 MWL8K_A2H_INT_QUEUE_EMPTY | \
80 MWL8K_A2H_INT_RADAR_DETECT | \
81 MWL8K_A2H_INT_RADIO_ON | \
82 MWL8K_A2H_INT_RADIO_OFF | \
83 MWL8K_A2H_INT_MAC_EVENT | \
84 MWL8K_A2H_INT_OPC_DONE | \
85 MWL8K_A2H_INT_RX_READY | \
3aefc37e
NS		 86 MWL8K_A2H_INT_TX_DONE | \
87 MWL8K_A2H_INT_BA_WATCHDOG)
a66098da 88
a66098da 89#define MWL8K_RX_QUEUES 1
e600707b 90#define MWL8K_TX_WMM_QUEUES 4
8a7a578c 91#define MWL8K_MAX_AMPDU_QUEUES 8
e600707b
BC		 92#define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
93#define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
a66098da 94
54bc3a0d
LB		 95struct rxd_ops {
96 int rxd_size;
97 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
98 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 99 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 100 __le16 *qos, s8 *noise);
54bc3a0d
LB		 101};
102
45a390dd 103struct mwl8k_device_info {
a74b295e
LB		 104 char *part_name;
105 char *helper_image;
0863ade8
BC		 106 char *fw_image_sta;
107 char *fw_image_ap;
89a91f4f 108 struct rxd_ops *ap_rxd_ops;
952a0e96 109 u32 fw_api_ap;
45a390dd
LB		 110};
111
a66098da 112struct mwl8k_rx_queue {
45eb400d 113 int rxd_count;
a66098da
LB		 114
115 /* hw receives here */
45eb400d 116 int head;
a66098da
LB		 117
118 /* refill descs here */
45eb400d 119 int tail;
a66098da 120
54bc3a0d 121 void *rxd;
45eb400d 122 dma_addr_t rxd_dma;
788838eb
LB		 123 struct {
124 struct sk_buff *skb;
53b1b3e1 125 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 126 } *buf;
a66098da
LB		 127};
128
a66098da
LB		 129struct mwl8k_tx_queue {
130 /* hw transmits here */
45eb400d 131 int head;
a66098da
LB		 132
133 /* sw appends here */
45eb400d 134 int tail;
a66098da 135
8ccbc3b8 136 unsigned int len;
45eb400d
LB		 137 struct mwl8k_tx_desc *txd;
138 dma_addr_t txd_dma;
139 struct sk_buff **skb;
a66098da
LB		 140};
141
ac109fd0
BC		 142enum {
143 AMPDU_NO_STREAM,
144 AMPDU_STREAM_NEW,
145 AMPDU_STREAM_IN_PROGRESS,
146 AMPDU_STREAM_ACTIVE,
147};
148
5faa1aff
NS		 149struct mwl8k_ampdu_stream {
150 struct ieee80211_sta *sta;
151 u8 tid;
152 u8 state;
153 u8 idx;
154 u8 txq_idx; /* index of this stream in priv->txq */
155};
156
a66098da 157struct mwl8k_priv {
a66098da 158 struct ieee80211_hw *hw;
a66098da 159 struct pci_dev *pdev;
bf3ca7f7 160 int irq;
a66098da 161
45a390dd
LB		 162 struct mwl8k_device_info *device_info;
163
be695fc4
LB		 164 void __iomem *sram;
165 void __iomem *regs;
166
167 /* firmware */
d1f9e41d
BC		 168 const struct firmware *fw_helper;
169 const struct firmware *fw_ucode;
a66098da 170
be695fc4
LB		 171 /* hardware/firmware parameters */
172 bool ap_fw;
173 struct rxd_ops *rxd_ops;
777ad375
LB		 174 struct ieee80211_supported_band band_24;
175 struct ieee80211_channel channels_24[14];
176 struct ieee80211_rate rates_24[14];
4eae9edd
LB		 177 struct ieee80211_supported_band band_50;
178 struct ieee80211_channel channels_50[4];
179 struct ieee80211_rate rates_50[9];
ee0ddf18
LB		 180 u32 ap_macids_supported;
181 u32 sta_macids_supported;
be695fc4 182
8a7a578c
BC		 183 /* Ampdu stream information */
184 u8 num_ampdu_queues;
ac109fd0
BC		 185 spinlock_t stream_lock;
186 struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
3aefc37e 187 struct work_struct watchdog_ba_handle;
8a7a578c 188
618952a7
LB		 189 /* firmware access */
190 struct mutex fw_mutex;
191 struct task_struct *fw_mutex_owner;
192 int fw_mutex_depth;
618952a7
LB		 193 struct completion *hostcmd_wait;
194
a66098da
LB		 195 /* lock held over TX and TX reap */
196 spinlock_t tx_lock;
a66098da 197
88de754a
LB		 198 /* TX quiesce completion, protected by fw_mutex and tx_lock */
199 struct completion *tx_wait;
200
f5bb87cf 201 /* List of interfaces. */
ee0ddf18 202 u32 macids_used;
f5bb87cf 203 struct list_head vif_list;
a66098da 204
a66098da
LB		 205 /* power management status cookie from firmware */
206 u32 *cookie;
207 dma_addr_t cookie_dma;
208
209 u16 num_mcaddrs;
a66098da 210 u8 hw_rev;
2aa7b01f 211 u32 fw_rev;
a66098da
LB		 212
213 /*
214 * Running count of TX packets in flight, to avoid
215 * iterating over the transmit rings each time.
216 */
217 int pending_tx_pkts;
218
219 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
e600707b
BC		 220 struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
221 u32 txq_offset[MWL8K_MAX_TX_QUEUES];
a66098da 222
c46563b7 223 bool radio_on;
68ce3884 224 bool radio_short_preamble;
a43c49a8 225 bool sniffer_enabled;
0439b1f5 226 bool wmm_enabled;
a66098da 227
a66098da
LB		 228 /* XXX need to convert this to handle multiple interfaces */
229 bool capture_beacon;
d89173f2 230 u8 capture_bssid[ETH_ALEN];
a66098da
LB		 231 struct sk_buff *beacon_skb;
232
233 /*
234 * This FJ worker has to be global as it is scheduled from the
235 * RX handler. At this point we don't know which interface it
236 * belongs to until the list of bssids waiting to complete join
237 * is checked.
238 */
239 struct work_struct finalize_join_worker;
240
1e9f9de3
LB		 241 /* Tasklet to perform TX reclaim. */
242 struct tasklet_struct poll_tx_task;
67e2eb27
LB		 243
244 /* Tasklet to perform RX. */
245 struct tasklet_struct poll_rx_task;
0d462bbb
JL		 246
247 /* Most recently reported noise in dBm */
248 s8 noise;
0863ade8
BC		 249
250 /*
251 * preserve the queue configurations so they can be restored if/when
252 * the firmware image is swapped.
253 */
e600707b 254 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
99020471
BC		 255
256 /* async firmware loading state */
257 unsigned fw_state;
258 char *fw_pref;
259 char *fw_alt;
260 struct completion firmware_loading_complete;
a66098da
LB		 261};
262
e53d9b96
NS		 263#define MAX_WEP_KEY_LEN 13
264#define NUM_WEP_KEYS 4
265
a66098da
LB		 266/* Per interface specific private data */
267struct mwl8k_vif {
f5bb87cf
LB		 268 struct list_head list;
269 struct ieee80211_vif *vif;
270
f57ca9c1
LB		 271 /* Firmware macid for this vif. */
272 int macid;
273
c2c2b12a 274 /* Non AMPDU sequence number assigned by driver. */
a680400e 275 u16 seqno;
e53d9b96
NS		 276
277 /* Saved WEP keys */
278 struct {
279 u8 enabled;
280 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
281 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS		 282
283 /* BSSID */
284 u8 bssid[ETH_ALEN];
285
286 /* A flag to indicate is HW crypto is enabled for this bssid */
287 bool is_hw_crypto_enabled;
a66098da 288};
a94cc97e 289#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 290#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 291
a680400e
LB		 292struct mwl8k_sta {
293 /* Index into station database. Returned by UPDATE_STADB. */
294 u8 peer_id;
17033543 295 u8 is_ampdu_allowed;
a680400e
LB		 296};
297#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
298
777ad375 299static const struct ieee80211_channel mwl8k_channels_24[] = {
a66098da
LB		 300 { .center_freq = 2412, .hw_value = 1, },
301 { .center_freq = 2417, .hw_value = 2, },
302 { .center_freq = 2422, .hw_value = 3, },
303 { .center_freq = 2427, .hw_value = 4, },
304 { .center_freq = 2432, .hw_value = 5, },
305 { .center_freq = 2437, .hw_value = 6, },
306 { .center_freq = 2442, .hw_value = 7, },
307 { .center_freq = 2447, .hw_value = 8, },
308 { .center_freq = 2452, .hw_value = 9, },
309 { .center_freq = 2457, .hw_value = 10, },
310 { .center_freq = 2462, .hw_value = 11, },
647ca6b0
LB		 311 { .center_freq = 2467, .hw_value = 12, },
312 { .center_freq = 2472, .hw_value = 13, },
313 { .center_freq = 2484, .hw_value = 14, },
a66098da
LB		 314};
315
777ad375 316static const struct ieee80211_rate mwl8k_rates_24[] = {
a66098da
LB		 317 { .bitrate = 10, .hw_value = 2, },
318 { .bitrate = 20, .hw_value = 4, },
319 { .bitrate = 55, .hw_value = 11, },
5dfd3e2c
LB		 320 { .bitrate = 110, .hw_value = 22, },
321 { .bitrate = 220, .hw_value = 44, },
a66098da
LB		 322 { .bitrate = 60, .hw_value = 12, },
323 { .bitrate = 90, .hw_value = 18, },
a66098da
LB		 324 { .bitrate = 120, .hw_value = 24, },
325 { .bitrate = 180, .hw_value = 36, },
326 { .bitrate = 240, .hw_value = 48, },
327 { .bitrate = 360, .hw_value = 72, },
328 { .bitrate = 480, .hw_value = 96, },
329 { .bitrate = 540, .hw_value = 108, },
140eb5e2
LB		 330 { .bitrate = 720, .hw_value = 144, },
331};
332
4eae9edd
LB		 333static const struct ieee80211_channel mwl8k_channels_50[] = {
334 { .center_freq = 5180, .hw_value = 36, },
335 { .center_freq = 5200, .hw_value = 40, },
336 { .center_freq = 5220, .hw_value = 44, },
337 { .center_freq = 5240, .hw_value = 48, },
338};
339
340static const struct ieee80211_rate mwl8k_rates_50[] = {
341 { .bitrate = 60, .hw_value = 12, },
342 { .bitrate = 90, .hw_value = 18, },
343 { .bitrate = 120, .hw_value = 24, },
344 { .bitrate = 180, .hw_value = 36, },
345 { .bitrate = 240, .hw_value = 48, },
346 { .bitrate = 360, .hw_value = 72, },
347 { .bitrate = 480, .hw_value = 96, },
348 { .bitrate = 540, .hw_value = 108, },
349 { .bitrate = 720, .hw_value = 144, },
350};
351
a66098da 352/* Set or get info from Firmware */
a66098da 353#define MWL8K_CMD_GET 0x0000
41fdf097
NS		 354#define MWL8K_CMD_SET 0x0001
355#define MWL8K_CMD_SET_LIST 0x0002
a66098da
LB		 356
357/* Firmware command codes */
358#define MWL8K_CMD_CODE_DNLD 0x0001
359#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 360#define MWL8K_CMD_SET_HW_SPEC 0x0004
a66098da
LB		 361#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
362#define MWL8K_CMD_GET_STAT 0x0014
ff45fc60
LB		 363#define MWL8K_CMD_RADIO_CONTROL 0x001c
364#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 365#define MWL8K_CMD_TX_POWER 0x001f
08b06347 366#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 367#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
a66098da
LB		 368#define MWL8K_CMD_SET_PRE_SCAN 0x0107
369#define MWL8K_CMD_SET_POST_SCAN 0x0108
ff45fc60
LB		 370#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
371#define MWL8K_CMD_SET_AID 0x010d
372#define MWL8K_CMD_SET_RATE 0x0110
373#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
374#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 375#define MWL8K_CMD_SET_SLOT 0x0114
ff45fc60
LB		 376#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
377#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 378#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 379#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 380#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 381#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 382#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
3aefc37e 383#define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
aa21d0f6
LB		 384#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
385#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 386#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 387#define MWL8K_CMD_UPDATE_STADB 0x1123
5faa1aff 388#define MWL8K_CMD_BASTREAM 0x1125
a66098da 389
b603742f 390static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 391{
b603742f
JL		 392 u16 command = le16_to_cpu(cmd);
393
a66098da
LB		 394#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
395 snprintf(buf, bufsize, "%s", #x);\
396 return buf;\
397 } while (0)
b603742f 398 switch (command & ~0x8000) {
a66098da
LB		 399 MWL8K_CMDNAME(CODE_DNLD);
400 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 401 MWL8K_CMDNAME(SET_HW_SPEC);
a66098da
LB		 402 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
403 MWL8K_CMDNAME(GET_STAT);
404 MWL8K_CMDNAME(RADIO_CONTROL);
405 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 406 MWL8K_CMDNAME(TX_POWER);
08b06347 407 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 408 MWL8K_CMDNAME(SET_BEACON);
a66098da
LB		 409 MWL8K_CMDNAME(SET_PRE_SCAN);
410 MWL8K_CMDNAME(SET_POST_SCAN);
411 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
LB		 412 MWL8K_CMDNAME(SET_AID);
413 MWL8K_CMDNAME(SET_RATE);
414 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
415 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 416 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
LB		 417 MWL8K_CMDNAME(SET_EDCA_PARAMS);
418 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 419 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 420 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 421 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 422 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 423 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 424 MWL8K_CMDNAME(BSS_START);
3f5610ff 425 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 426 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 427 MWL8K_CMDNAME(UPDATE_STADB);
5faa1aff 428 MWL8K_CMDNAME(BASTREAM);
3aefc37e 429 MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
a66098da
LB		 430 default:
431 snprintf(buf, bufsize, "0x%x", cmd);
432 }
433#undef MWL8K_CMDNAME
434
435 return buf;
436}
437
438/* Hardware and firmware reset */
439static void mwl8k_hw_reset(struct mwl8k_priv *priv)
440{
441 iowrite32(MWL8K_H2A_INT_RESET,
442 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
443 iowrite32(MWL8K_H2A_INT_RESET,
444 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
445 msleep(20);
446}
447
448/* Release fw image */
d1f9e41d 449static void mwl8k_release_fw(const struct firmware **fw)
a66098da
LB		 450{
451 if (*fw == NULL)
452 return;
453 release_firmware(*fw);
454 *fw = NULL;
455}
456
457static void mwl8k_release_firmware(struct mwl8k_priv *priv)
458{
22be40d9
LB		 459 mwl8k_release_fw(&priv->fw_ucode);
460 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 461}
462
99020471
BC		 463/* states for asynchronous f/w loading */
464static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
465enum {
466 FW_STATE_INIT = 0,
467 FW_STATE_LOADING_PREF,
468 FW_STATE_LOADING_ALT,
469 FW_STATE_ERROR,
470};
471
a66098da
LB		 472/* Request fw image */
473static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 474 const char *fname, const struct firmware **fw,
99020471 475 bool nowait)
a66098da
LB		 476{
477 /* release current image */
478 if (*fw != NULL)
479 mwl8k_release_fw(fw);
480
99020471
BC		 481 if (nowait)
482 return request_firmware_nowait(THIS_MODULE, 1, fname,
483 &priv->pdev->dev, GFP_KERNEL,
484 priv, mwl8k_fw_state_machine);
485 else
d1f9e41d 486 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB		 487}
488
99020471
BC		 489static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
490 bool nowait)
a66098da 491{
a74b295e 492 struct mwl8k_device_info *di = priv->device_info;
a66098da
LB		 493 int rc;
494
a74b295e 495 if (di->helper_image != NULL) {
99020471
BC		 496 if (nowait)
497 rc = mwl8k_request_fw(priv, di->helper_image,
498 &priv->fw_helper, true);
499 else
500 rc = mwl8k_request_fw(priv, di->helper_image,
501 &priv->fw_helper, false);
502 if (rc)
503 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
504 pci_name(priv->pdev), di->helper_image);
505
506 if (rc || nowait)
a74b295e 507 return rc;
a66098da
LB		 508 }
509
99020471
BC		 510 if (nowait) {
511 /*
512 * if we get here, no helper image is needed. Skip the
513 * FW_STATE_INIT state.
514 */
515 priv->fw_state = FW_STATE_LOADING_PREF;
516 rc = mwl8k_request_fw(priv, fw_image,
517 &priv->fw_ucode,
518 true);
519 } else
520 rc = mwl8k_request_fw(priv, fw_image,
521 &priv->fw_ucode, false);
a66098da 522 if (rc) {
c2c357ce 523 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 524 pci_name(priv->pdev), fw_image);
22be40d9 525 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 526 return rc;
527 }
528
529 return 0;
530}
531
532struct mwl8k_cmd_pkt {
533 __le16 code;
534 __le16 length;
f57ca9c1
LB		 535 __u8 seq_num;
536 __u8 macid;
a66098da
LB		 537 __le16 result;
538 char payload[0];
ba2d3587 539} __packed;
a66098da
LB		 540
541/*
542 * Firmware loading.
543 */
544static int
545mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
546{
547 void __iomem *regs = priv->regs;
548 dma_addr_t dma_addr;
a66098da
LB		 549 int loops;
550
551 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
552 if (pci_dma_mapping_error(priv->pdev, dma_addr))
553 return -ENOMEM;
554
555 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
556 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
557 iowrite32(MWL8K_H2A_INT_DOORBELL,
558 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
559 iowrite32(MWL8K_H2A_INT_DUMMY,
560 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
561
a66098da
LB		 562 loops = 1000;
563 do {
564 u32 int_code;
565
566 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
567 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
568 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB		 569 break;
570 }
571
3d76e82c 572 cond_resched();
a66098da
LB		 573 udelay(1);
574 } while (--loops);
575
576 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
577
d4b70570 578 return loops ? 0 : -ETIMEDOUT;
a66098da
LB		 579}
580
581static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
582 const u8 *data, size_t length)
583{
584 struct mwl8k_cmd_pkt *cmd;
585 int done;
586 int rc = 0;
587
588 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
589 if (cmd == NULL)
590 return -ENOMEM;
591
592 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
593 cmd->seq_num = 0;
f57ca9c1 594 cmd->macid = 0;
a66098da
LB		 595 cmd->result = 0;
596
597 done = 0;
598 while (length) {
599 int block_size = length > 256 ? 256 : length;
600
601 memcpy(cmd->payload, data + done, block_size);
602 cmd->length = cpu_to_le16(block_size);
603
604 rc = mwl8k_send_fw_load_cmd(priv, cmd,
605 sizeof(*cmd) + block_size);
606 if (rc)
607 break;
608
609 done += block_size;
610 length -= block_size;
611 }
612
613 if (!rc) {
614 cmd->length = 0;
615 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
616 }
617
618 kfree(cmd);
619
620 return rc;
621}
622
623static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
624 const u8 *data, size_t length)
625{
626 unsigned char *buffer;
627 int may_continue, rc = 0;
628 u32 done, prev_block_size;
629
630 buffer = kmalloc(1024, GFP_KERNEL);
631 if (buffer == NULL)
632 return -ENOMEM;
633
634 done = 0;
635 prev_block_size = 0;
636 may_continue = 1000;
637 while (may_continue > 0) {
638 u32 block_size;
639
640 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
641 if (block_size & 1) {
642 block_size &= ~1;
643 may_continue--;
644 } else {
645 done += prev_block_size;
646 length -= prev_block_size;
647 }
648
649 if (block_size > 1024 || block_size > length) {
650 rc = -EOVERFLOW;
651 break;
652 }
653
654 if (length == 0) {
655 rc = 0;
656 break;
657 }
658
659 if (block_size == 0) {
660 rc = -EPROTO;
661 may_continue--;
662 udelay(1);
663 continue;
664 }
665
666 prev_block_size = block_size;
667 memcpy(buffer, data + done, block_size);
668
669 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
670 if (rc)
671 break;
672 }
673
674 if (!rc && length != 0)
675 rc = -EREMOTEIO;
676
677 kfree(buffer);
678
679 return rc;
680}
681
c2c357ce 682static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 683{
c2c357ce 684 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 685 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB		 686 int rc;
687 int loops;
688
689 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 690 const struct firmware *helper = priv->fw_helper;
a66098da 691
c2c357ce
LB		 692 if (helper == NULL) {
693 printk(KERN_ERR "%s: helper image needed but none "
694 "given\n", pci_name(priv->pdev));
695 return -EINVAL;
696 }
a66098da 697
c2c357ce 698 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB		 699 if (rc) {
700 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 701 "helper image\n", pci_name(priv->pdev));
a66098da
LB		 702 return rc;
703 }
89b872e2 704 msleep(5);
a66098da 705
c2c357ce 706 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 707 } else {
c2c357ce 708 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB		 709 }
710
711 if (rc) {
c2c357ce
LB		 712 printk(KERN_ERR "%s: unable to load firmware image\n",
713 pci_name(priv->pdev));
a66098da
LB		 714 return rc;
715 }
716
89a91f4f 717 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 718
89b872e2 719 loops = 500000;
a66098da 720 do {
eae74e65
LB		 721 u32 ready_code;
722
723 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
724 if (ready_code == MWL8K_FWAP_READY) {
725 priv->ap_fw = 1;
726 break;
727 } else if (ready_code == MWL8K_FWSTA_READY) {
728 priv->ap_fw = 0;
a66098da 729 break;
eae74e65
LB		 730 }
731
732 cond_resched();
a66098da
LB		 733 udelay(1);
734 } while (--loops);
735
736 return loops ? 0 : -ETIMEDOUT;
737}
738
739
a66098da
LB		 740/* DMA header used by firmware and hardware. */
741struct mwl8k_dma_data {
742 __le16 fwlen;
743 struct ieee80211_hdr wh;
20f09c3d 744 char data[0];
ba2d3587 745} __packed;
a66098da
LB		 746
747/* Routines to add/remove DMA header from skb. */
20f09c3d 748static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 749{
20f09c3d
LB		 750 struct mwl8k_dma_data *tr;
751 int hdrlen;
752
753 tr = (struct mwl8k_dma_data *)skb->data;
754 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
755
756 if (hdrlen != sizeof(tr->wh)) {
757 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
758 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
759 *((__le16 *)(tr->data - 2)) = qos;
760 } else {
761 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
762 }
a66098da 763 }
20f09c3d
LB		 764
765 if (hdrlen != sizeof(*tr))
766 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB		 767}
768
252486a1
NS		 769static void
770mwl8k_add_dma_header(struct sk_buff *skb, int tail_pad)
a66098da
LB		 771{
772 struct ieee80211_hdr *wh;
ca009301 773 int hdrlen;
252486a1 774 int reqd_hdrlen;
a66098da
LB		 775 struct mwl8k_dma_data *tr;
776
ca009301
LB		 777 /*
778 * Add a firmware DMA header; the firmware requires that we
779 * present a 2-byte payload length followed by a 4-address
780 * header (without QoS field), followed (optionally) by any
781 * WEP/ExtIV header (but only filled in for CCMP).
782 */
a66098da 783 wh = (struct ieee80211_hdr *)skb->data;
ca009301 784
a66098da 785 hdrlen = ieee80211_hdrlen(wh->frame_control);
252486a1
NS		 786 reqd_hdrlen = sizeof(*tr);
787
788 if (hdrlen != reqd_hdrlen)
789 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 790
ca009301 791 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 792 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB		 793
794 tr = (struct mwl8k_dma_data *)skb->data;
795 if (wh != &tr->wh)
796 memmove(&tr->wh, wh, hdrlen);
ca009301
LB		 797 if (hdrlen != sizeof(tr->wh))
798 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB		 799
800 /*
801 * Firmware length is the length of the fully formed "802.11
802 * payload". That is, everything except for the 802.11 header.
803 * This includes all crypto material including the MIC.
804 */
252486a1 805 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB		 806}
807
e53d9b96
NS		 808static void mwl8k_encapsulate_tx_frame(struct sk_buff *skb)
809{
810 struct ieee80211_hdr *wh;
811 struct ieee80211_tx_info *tx_info;
812 struct ieee80211_key_conf *key_conf;
813 int data_pad;
814
815 wh = (struct ieee80211_hdr *)skb->data;
816
817 tx_info = IEEE80211_SKB_CB(skb);
818
819 key_conf = NULL;
820 if (ieee80211_is_data(wh->frame_control))
821 key_conf = tx_info->control.hw_key;
822
823 /*
824 * Make sure the packet header is in the DMA header format (4-address
825 * without QoS), the necessary crypto padding between the header and the
826 * payload has already been provided by mac80211, but it doesn't add tail
827 * padding when HW crypto is enabled.
828 *
829 * We have the following trailer padding requirements:
830 * - WEP: 4 trailer bytes (ICV)
831 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
832 * - CCMP: 8 trailer bytes (MIC)
833 */
834 data_pad = 0;
835 if (key_conf != NULL) {
836 switch (key_conf->cipher) {
837 case WLAN_CIPHER_SUITE_WEP40:
838 case WLAN_CIPHER_SUITE_WEP104:
839 data_pad = 4;
840 break;
841 case WLAN_CIPHER_SUITE_TKIP:
842 data_pad = 12;
843 break;
844 case WLAN_CIPHER_SUITE_CCMP:
845 data_pad = 8;
846 break;
847 }
848 }
849 mwl8k_add_dma_header(skb, data_pad);
850}
a66098da
LB		 851
852/*
89a91f4f 853 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 854 */
89a91f4f 855struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB		 856 __le16 pkt_len;
857 __u8 sq2;
858 __u8 rate;
859 __le32 pkt_phys_addr;
860 __le32 next_rxd_phys_addr;
861 __le16 qos_control;
862 __le16 htsig2;
863 __le32 hw_rssi_info;
864 __le32 hw_noise_floor_info;
865 __u8 noise_floor;
866 __u8 pad0[3];
867 __u8 rssi;
868 __u8 rx_status;
869 __u8 channel;
870 __u8 rx_ctrl;
ba2d3587 871} __packed;
6f6d1e9a 872
89a91f4f
LB		 873#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
874#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
875#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 876
89a91f4f 877#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 878
d9a07d49
NS		 879/* 8366 AP rx_status bits */
880#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
881#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
882#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
883#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
884#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
885
89a91f4f 886static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 887{
89a91f4f 888 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 889
890 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 891 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB		 892}
893
89a91f4f 894static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 895{
89a91f4f 896 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 897
898 rxd->pkt_len = cpu_to_le16(len);
899 rxd->pkt_phys_addr = cpu_to_le32(addr);
900 wmb();
901 rxd->rx_ctrl = 0;
902}
903
904static int
89a91f4f 905mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 906 __le16 *qos, s8 *noise)
6f6d1e9a 907{
89a91f4f 908 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 909
89a91f4f 910 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB		 911 return -1;
912 rmb();
913
914 memset(status, 0, sizeof(*status));
915
916 status->signal = -rxd->rssi;
0d462bbb 917 *noise = -rxd->noise_floor;
6f6d1e9a 918
89a91f4f 919 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 920 status->flag |= RX_FLAG_HT;
89a91f4f 921 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 922 status->flag |= RX_FLAG_40MHZ;
89a91f4f 923 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB		 924 } else {
925 int i;
926
777ad375
LB		 927 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
928 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB		 929 status->rate_idx = i;
930 break;
931 }
932 }
933 }
934
85478344
LB		 935 if (rxd->channel > 14) {
936 status->band = IEEE80211_BAND_5GHZ;
937 if (!(status->flag & RX_FLAG_HT))
938 status->rate_idx -= 5;
939 } else {
940 status->band = IEEE80211_BAND_2GHZ;
941 }
59eb21a6
BR		 942 status->freq = ieee80211_channel_to_frequency(rxd->channel,
943 status->band);
6f6d1e9a 944
20f09c3d
LB		 945 *qos = rxd->qos_control;
946
d9a07d49
NS		 947 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
948 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
949 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
950 status->flag |= RX_FLAG_MMIC_ERROR;
951
6f6d1e9a
LB		 952 return le16_to_cpu(rxd->pkt_len);
953}
954
89a91f4f
LB		 955static struct rxd_ops rxd_8366_ap_ops = {
956 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
957 .rxd_init = mwl8k_rxd_8366_ap_init,
958 .rxd_refill = mwl8k_rxd_8366_ap_refill,
959 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB		 960};
961
962/*
89a91f4f 963 * Packet reception for STA firmware.
a66098da 964 */
89a91f4f 965struct mwl8k_rxd_sta {
a66098da
LB		 966 __le16 pkt_len;
967 __u8 link_quality;
968 __u8 noise_level;
969 __le32 pkt_phys_addr;
45eb400d 970 __le32 next_rxd_phys_addr;
a66098da
LB		 971 __le16 qos_control;
972 __le16 rate_info;
973 __le32 pad0[4];
974 __u8 rssi;
975 __u8 channel;
976 __le16 pad1;
977 __u8 rx_ctrl;
978 __u8 rx_status;
979 __u8 pad2[2];
ba2d3587 980} __packed;
a66098da 981
89a91f4f
LB		 982#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
983#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
984#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
985#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
986#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
987#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 988
89a91f4f 989#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS		 990#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
991/* ICV=0 or MIC=1 */
992#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
993/* Key is uploaded only in failure case */
994#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 995
89a91f4f 996static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 997{
89a91f4f 998 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 999
1000 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 1001 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB		 1002}
1003
89a91f4f 1004static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 1005{
89a91f4f 1006 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1007
1008 rxd->pkt_len = cpu_to_le16(len);
1009 rxd->pkt_phys_addr = cpu_to_le32(addr);
1010 wmb();
1011 rxd->rx_ctrl = 0;
1012}
1013
1014static int
89a91f4f 1015mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 1016 __le16 *qos, s8 *noise)
54bc3a0d 1017{
89a91f4f 1018 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1019 u16 rate_info;
1020
89a91f4f 1021 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB		 1022 return -1;
1023 rmb();
1024
1025 rate_info = le16_to_cpu(rxd->rate_info);
1026
1027 memset(status, 0, sizeof(*status));
1028
1029 status->signal = -rxd->rssi;
0d462bbb 1030 *noise = -rxd->noise_level;
89a91f4f
LB		 1031 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1032 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1033
89a91f4f 1034 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1035 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1036 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1037 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1038 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1039 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1040 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB		 1041 status->flag |= RX_FLAG_HT;
1042
85478344
LB		 1043 if (rxd->channel > 14) {
1044 status->band = IEEE80211_BAND_5GHZ;
1045 if (!(status->flag & RX_FLAG_HT))
1046 status->rate_idx -= 5;
1047 } else {
1048 status->band = IEEE80211_BAND_2GHZ;
1049 }
59eb21a6
BR		 1050 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1051 status->band);
54bc3a0d 1052
20f09c3d 1053 *qos = rxd->qos_control;
d9a07d49
NS		 1054 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1055 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1056 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1057
54bc3a0d
LB		 1058 return le16_to_cpu(rxd->pkt_len);
1059}
1060
89a91f4f
LB		 1061static struct rxd_ops rxd_sta_ops = {
1062 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1063 .rxd_init = mwl8k_rxd_sta_init,
1064 .rxd_refill = mwl8k_rxd_sta_refill,
1065 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB		 1066};
1067
1068
a66098da
LB		 1069#define MWL8K_RX_DESCS 256
1070#define MWL8K_RX_MAXSZ 3800
1071
1072static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1073{
1074 struct mwl8k_priv *priv = hw->priv;
1075 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1076 int size;
1077 int i;
1078
45eb400d
LB		 1079 rxq->rxd_count = 0;
1080 rxq->head = 0;
1081 rxq->tail = 0;
a66098da 1082
54bc3a0d 1083 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1084
45eb400d
LB		 1085 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1086 if (rxq->rxd == NULL) {
5db55844 1087 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB		 1088 return -ENOMEM;
1089 }
45eb400d 1090 memset(rxq->rxd, 0, size);
a66098da 1091
b9ede5f1 1092 rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
788838eb 1093 if (rxq->buf == NULL) {
5db55844 1094 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1095 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB		 1096 return -ENOMEM;
1097 }
a66098da
LB		 1098
1099 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB		 1100 int desc_size;
1101 void *rxd;
a66098da 1102 int nexti;
54bc3a0d
LB		 1103 dma_addr_t next_dma_addr;
1104
1105 desc_size = priv->rxd_ops->rxd_size;
1106 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1107
54bc3a0d
LB		 1108 nexti = i + 1;
1109 if (nexti == MWL8K_RX_DESCS)
1110 nexti = 0;
1111 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1112
54bc3a0d 1113 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB		 1114 }
1115
1116 return 0;
1117}
1118
1119static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1120{
1121 struct mwl8k_priv *priv = hw->priv;
1122 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1123 int refilled;
1124
1125 refilled = 0;
45eb400d 1126 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1127 struct sk_buff *skb;
788838eb 1128 dma_addr_t addr;
a66098da 1129 int rx;
54bc3a0d 1130 void *rxd;
a66098da
LB		 1131
1132 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1133 if (skb == NULL)
1134 break;
1135
788838eb
LB		 1136 addr = pci_map_single(priv->pdev, skb->data,
1137 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1138
54bc3a0d
LB		 1139 rxq->rxd_count++;
1140 rx = rxq->tail++;
1141 if (rxq->tail == MWL8K_RX_DESCS)
1142 rxq->tail = 0;
788838eb 1143 rxq->buf[rx].skb = skb;
53b1b3e1 1144 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB		 1145
1146 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1147 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB		 1148
1149 refilled++;
1150 }
1151
1152 return refilled;
1153}
1154
1155/* Must be called only when the card's reception is completely halted */
1156static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1157{
1158 struct mwl8k_priv *priv = hw->priv;
1159 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1160 int i;
1161
73b46320
BC		 1162 if (rxq->rxd == NULL)
1163 return;
1164
a66098da 1165 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB		 1166 if (rxq->buf[i].skb != NULL) {
1167 pci_unmap_single(priv->pdev,
53b1b3e1 1168 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1169 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1170 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB		 1171
1172 kfree_skb(rxq->buf[i].skb);
1173 rxq->buf[i].skb = NULL;
a66098da
LB		 1174 }
1175 }
1176
788838eb
LB		 1177 kfree(rxq->buf);
1178 rxq->buf = NULL;
a66098da
LB		 1179
1180 pci_free_consistent(priv->pdev,
54bc3a0d 1181 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB		 1182 rxq->rxd, rxq->rxd_dma);
1183 rxq->rxd = NULL;
a66098da
LB		 1184}
1185
1186
1187/*
1188 * Scan a list of BSSIDs to process for finalize join.
1189 * Allows for extension to process multiple BSSIDs.
1190 */
1191static inline int
1192mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1193{
1194 return priv->capture_beacon &&
1195 ieee80211_is_beacon(wh->frame_control) &&
1196 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1197}
1198
3779752d
LB		 1199static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1200 struct sk_buff *skb)
a66098da 1201{
3779752d
LB		 1202 struct mwl8k_priv *priv = hw->priv;
1203
a66098da 1204 priv->capture_beacon = false;
d89173f2 1205 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB		 1206
1207 /*
1208 * Use GFP_ATOMIC as rxq_process is called from
1209 * the primary interrupt handler, memory allocation call
1210 * must not sleep.
1211 */
1212 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1213 if (priv->beacon_skb != NULL)
3779752d 1214 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB		 1215}
1216
d9a07d49
NS		 1217static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1218 u8 *bssid)
1219{
1220 struct mwl8k_vif *mwl8k_vif;
1221
1222 list_for_each_entry(mwl8k_vif,
1223 vif_list, list) {
1224 if (memcmp(bssid, mwl8k_vif->bssid,
1225 ETH_ALEN) == 0)
1226 return mwl8k_vif;
1227 }
1228
1229 return NULL;
1230}
1231
a66098da
LB		 1232static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1233{
1234 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1235 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB		 1236 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1237 int processed;
1238
1239 processed = 0;
45eb400d 1240 while (rxq->rxd_count && limit--) {
a66098da 1241 struct sk_buff *skb;
54bc3a0d
LB		 1242 void *rxd;
1243 int pkt_len;
a66098da 1244 struct ieee80211_rx_status status;
d9a07d49 1245 struct ieee80211_hdr *wh;
20f09c3d 1246 __le16 qos;
a66098da 1247
788838eb 1248 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB		 1249 if (skb == NULL)
1250 break;
54bc3a0d
LB		 1251
1252 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1253
0d462bbb
JL		 1254 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1255 &priv->noise);
54bc3a0d
LB		 1256 if (pkt_len < 0)
1257 break;
1258
788838eb
LB		 1259 rxq->buf[rxq->head].skb = NULL;
1260
1261 pci_unmap_single(priv->pdev,
53b1b3e1 1262 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1263 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1264 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1265
54bc3a0d
LB		 1266 rxq->head++;
1267 if (rxq->head == MWL8K_RX_DESCS)
1268 rxq->head = 0;
1269
45eb400d 1270 rxq->rxd_count--;
a66098da 1271
d9a07d49 1272 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1273
a66098da 1274 /*
c2c357ce
LB		 1275 * Check for a pending join operation. Save a
1276 * copy of the beacon and schedule a tasklet to
1277 * send a FINALIZE_JOIN command to the firmware.
a66098da 1278 */
54bc3a0d 1279 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1280 mwl8k_save_beacon(hw, skb);
a66098da 1281
d9a07d49
NS		 1282 if (ieee80211_has_protected(wh->frame_control)) {
1283
1284 /* Check if hw crypto has been enabled for
1285 * this bss. If yes, set the status flags
1286 * accordingly
1287 */
1288 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1289 wh->addr1);
1290
1291 if (mwl8k_vif != NULL &&
1292 mwl8k_vif->is_hw_crypto_enabled == true) {
1293 /*
1294 * When MMIC ERROR is encountered
1295 * by the firmware, payload is
1296 * dropped and only 32 bytes of
1297 * mwl8k Firmware header is sent
1298 * to the host.
1299 *
1300 * We need to add four bytes of
1301 * key information. In it
1302 * MAC80211 expects keyidx set to
1303 * 0 for triggering Counter
1304 * Measure of MMIC failure.
1305 */
1306 if (status.flag & RX_FLAG_MMIC_ERROR) {
1307 struct mwl8k_dma_data *tr;
1308 tr = (struct mwl8k_dma_data *)skb->data;
1309 memset((void *)&(tr->data), 0, 4);
1310 pkt_len += 4;
1311 }
1312
1313 if (!ieee80211_is_auth(wh->frame_control))
1314 status.flag |= RX_FLAG_IV_STRIPPED |
1315 RX_FLAG_DECRYPTED |
1316 RX_FLAG_MMIC_STRIPPED;
1317 }
1318 }
1319
1320 skb_put(skb, pkt_len);
1321 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB		 1322 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1323 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1324
1325 processed++;
1326 }
1327
1328 return processed;
1329}
1330
1331
1332/*
1333 * Packet transmission.
1334 */
1335
a66098da
LB		 1336#define MWL8K_TXD_STATUS_OK 0x00000001
1337#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1338#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1339#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1340#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1341
e0493a8d
LB		 1342#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1343#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1344#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1345#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1346#define MWL8K_QOS_EOSP 0x0010
1347
a66098da
LB		 1348struct mwl8k_tx_desc {
1349 __le32 status;
1350 __u8 data_rate;
1351 __u8 tx_priority;
1352 __le16 qos_control;
1353 __le32 pkt_phys_addr;
1354 __le16 pkt_len;
d89173f2 1355 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1356 __le32 next_txd_phys_addr;
8a7a578c 1357 __le32 timestamp;
a66098da
LB		 1358 __le16 rate_info;
1359 __u8 peer_id;
a1fe24b0 1360 __u8 tx_frag_cnt;
ba2d3587 1361} __packed;
a66098da
LB		 1362
1363#define MWL8K_TX_DESCS 128
1364
1365static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1366{
1367 struct mwl8k_priv *priv = hw->priv;
1368 struct mwl8k_tx_queue *txq = priv->txq + index;
1369 int size;
1370 int i;
1371
8ccbc3b8 1372 txq->len = 0;
45eb400d
LB		 1373 txq->head = 0;
1374 txq->tail = 0;
a66098da
LB		 1375
1376 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1377
45eb400d
LB		 1378 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1379 if (txq->txd == NULL) {
5db55844 1380 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB		 1381 return -ENOMEM;
1382 }
45eb400d 1383 memset(txq->txd, 0, size);
a66098da 1384
b9ede5f1 1385 txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
45eb400d 1386 if (txq->skb == NULL) {
5db55844 1387 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1388 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB		 1389 return -ENOMEM;
1390 }
a66098da
LB		 1391
1392 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1393 struct mwl8k_tx_desc *tx_desc;
1394 int nexti;
1395
45eb400d 1396 tx_desc = txq->txd + i;
a66098da
LB		 1397 nexti = (i + 1) % MWL8K_TX_DESCS;
1398
1399 tx_desc->status = 0;
45eb400d
LB		 1400 tx_desc->next_txd_phys_addr =
1401 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB		 1402 }
1403
1404 return 0;
1405}
1406
1407static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1408{
1409 iowrite32(MWL8K_H2A_INT_PPA_READY,
1410 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1411 iowrite32(MWL8K_H2A_INT_DUMMY,
1412 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1413 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1414}
1415
7e1112d3 1416static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1417{
7e1112d3
LB		 1418 struct mwl8k_priv *priv = hw->priv;
1419 int i;
1420
e600707b 1421 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
7e1112d3
LB		 1422 struct mwl8k_tx_queue *txq = priv->txq + i;
1423 int fw_owned = 0;
1424 int drv_owned = 0;
1425 int unused = 0;
1426 int desc;
1427
a66098da 1428 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB		 1429 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1430 u32 status;
a66098da 1431
7e1112d3 1432 status = le32_to_cpu(tx_desc->status);
a66098da 1433 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1434 fw_owned++;
a66098da 1435 else
7e1112d3 1436 drv_owned++;
a66098da
LB		 1437
1438 if (tx_desc->pkt_len == 0)
7e1112d3 1439 unused++;
a66098da 1440 }
a66098da 1441
c96c31e4
JP		 1442 wiphy_err(hw->wiphy,
1443 "txq[%d] len=%d head=%d tail=%d "
1444 "fw_owned=%d drv_owned=%d unused=%d\n",
1445 i,
1446 txq->len, txq->head, txq->tail,
1447 fw_owned, drv_owned, unused);
7e1112d3 1448 }
a66098da
LB		 1449}
1450
618952a7 1451/*
88de754a 1452 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1453 */
62abd3cf 1454#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1455
950d5b01 1456static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1457{
a66098da 1458 struct mwl8k_priv *priv = hw->priv;
88de754a 1459 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB		 1460 int retry;
1461 int rc;
a66098da
LB		 1462
1463 might_sleep();
1464
7e1112d3
LB		 1465 /*
1466 * The TX queues are stopped at this point, so this test
1467 * doesn't need to take ->tx_lock.
1468 */
1469 if (!priv->pending_tx_pkts)
1470 return 0;
1471
1472 retry = 0;
1473 rc = 0;
1474
a66098da 1475 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1476 priv->tx_wait = &tx_wait;
1477 while (!rc) {
1478 int oldcount;
1479 unsigned long timeout;
a66098da 1480
7e1112d3 1481 oldcount = priv->pending_tx_pkts;
a66098da 1482
7e1112d3 1483 spin_unlock_bh(&priv->tx_lock);
88de754a 1484 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1485 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
a66098da 1486 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1487
1488 if (timeout) {
1489 WARN_ON(priv->pending_tx_pkts);
1490 if (retry) {
c96c31e4 1491 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB		 1492 }
1493 break;
1494 }
1495
1496 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP		 1497 wiphy_notice(hw->wiphy,
1498 "waiting for tx rings to drain (%d -> %d pkts)\n",
1499 oldcount, priv->pending_tx_pkts);
7e1112d3
LB		 1500 retry = 1;
1501 continue;
1502 }
1503
a66098da 1504 priv->tx_wait = NULL;
a66098da 1505
c96c31e4
JP		 1506 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1507 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3
LB		 1508 mwl8k_dump_tx_rings(hw);
1509
1510 rc = -ETIMEDOUT;
a66098da 1511 }
7e1112d3 1512 spin_unlock_bh(&priv->tx_lock);
a66098da 1513
7e1112d3 1514 return rc;
a66098da
LB		 1515}
1516
c23b5a69
LB		 1517#define MWL8K_TXD_SUCCESS(status) \
1518 ((status) & (MWL8K_TXD_STATUS_OK | \
1519 MWL8K_TXD_STATUS_OK_RETRY | \
1520 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1521
a0e7c6cf
NS		 1522static int mwl8k_tid_queue_mapping(u8 tid)
1523{
1524 BUG_ON(tid > 7);
1525
1526 switch (tid) {
1527 case 0:
1528 case 3:
1529 return IEEE80211_AC_BE;
1530 break;
1531 case 1:
1532 case 2:
1533 return IEEE80211_AC_BK;
1534 break;
1535 case 4:
1536 case 5:
1537 return IEEE80211_AC_VI;
1538 break;
1539 case 6:
1540 case 7:
1541 return IEEE80211_AC_VO;
1542 break;
1543 default:
1544 return -1;
1545 break;
1546 }
1547}
1548
17033543
NS		 1549/* The firmware will fill in the rate information
1550 * for each packet that gets queued in the hardware
1551 * in this structure
1552 */
1553
1554struct rateinfo {
1555 __le16 format:1;
1556 __le16 short_gi:1;
1557 __le16 band_width:1;
1558 __le16 rate_id_mcs:6;
1559 __le16 adv_coding:2;
1560 __le16 antenna:2;
1561 __le16 act_sub_chan:2;
1562 __le16 preamble_type:1;
1563 __le16 power_id:4;
1564 __le16 antenna2:1;
1565 __le16 reserved:1;
1566 __le16 tx_bf_frame:1;
1567 __le16 green_field:1;
1568} __packed;
1569
efb7c49a
LB		 1570static int
1571mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB		 1572{
1573 struct mwl8k_priv *priv = hw->priv;
1574 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1575 int processed;
a66098da 1576
efb7c49a 1577 processed = 0;
8ccbc3b8 1578 while (txq->len > 0 && limit--) {
a66098da 1579 int tx;
a66098da
LB		 1580 struct mwl8k_tx_desc *tx_desc;
1581 unsigned long addr;
ce9e2e1b 1582 int size;
a66098da
LB		 1583 struct sk_buff *skb;
1584 struct ieee80211_tx_info *info;
1585 u32 status;
17033543
NS		 1586 struct ieee80211_sta *sta;
1587 struct mwl8k_sta *sta_info = NULL;
1588 u16 rate_info;
1589 struct rateinfo *rate;
1590 struct ieee80211_hdr *wh;
a66098da 1591
45eb400d
LB		 1592 tx = txq->head;
1593 tx_desc = txq->txd + tx;
a66098da
LB		 1594
1595 status = le32_to_cpu(tx_desc->status);
1596
1597 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1598 if (!force)
1599 break;
1600 tx_desc->status &=
1601 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1602 }
1603
45eb400d 1604 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV		 1605 BUG_ON(txq->len == 0);
1606 txq->len--;
a66098da
LB		 1607 priv->pending_tx_pkts--;
1608
1609 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1610 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB		 1611 skb = txq->skb[tx];
1612 txq->skb[tx] = NULL;
a66098da
LB		 1613
1614 BUG_ON(skb == NULL);
1615 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1616
20f09c3d 1617 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da 1618
17033543
NS		 1619 wh = (struct ieee80211_hdr *) skb->data;
1620
a66098da
LB		 1621 /* Mark descriptor as unused */
1622 tx_desc->pkt_phys_addr = 0;
1623 tx_desc->pkt_len = 0;
1624
a66098da 1625 info = IEEE80211_SKB_CB(skb);
17033543
NS		 1626 if (ieee80211_is_data(wh->frame_control)) {
1627 sta = info->control.sta;
1628 if (sta) {
1629 sta_info = MWL8K_STA(sta);
1630 BUG_ON(sta_info == NULL);
1631 rate_info = le16_to_cpu(tx_desc->rate_info);
1632 rate = (struct rateinfo *)&rate_info;
1633 /* If rate is < 6.5 Mpbs for an ht station
1634 * do not form an ampdu. If the station is a
1635 * legacy station (format = 0), do not form an
1636 * ampdu
1637 */
1638 if (rate->rate_id_mcs < 1 ||
1639 rate->format == 0) {
1640 sta_info->is_ampdu_allowed = false;
1641 } else {
1642 sta_info->is_ampdu_allowed = true;
1643 }
1644 }
1645 }
1646
a66098da 1647 ieee80211_tx_info_clear_status(info);
0bf22c37
NS		 1648
1649 /* Rate control is happening in the firmware.
1650 * Ensure no tx rate is being reported.
1651 */
1652 info->status.rates[0].idx = -1;
1653 info->status.rates[0].count = 1;
1654
ce9e2e1b 1655 if (MWL8K_TXD_SUCCESS(status))
a66098da 1656 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB		 1657
1658 ieee80211_tx_status_irqsafe(hw, skb);
1659
efb7c49a 1660 processed++;
a66098da
LB		 1661 }
1662
65f3ddcd
NS		 1663 if (index < MWL8K_TX_WMM_QUEUES && processed && priv->radio_on &&
1664 !mutex_is_locked(&priv->fw_mutex))
a66098da 1665 ieee80211_wake_queue(hw, index);
efb7c49a
LB		 1666
1667 return processed;
a66098da
LB		 1668}
1669
1670/* must be called only when the card's transmit is completely halted */
1671static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1672{
1673 struct mwl8k_priv *priv = hw->priv;
1674 struct mwl8k_tx_queue *txq = priv->txq + index;
1675
73b46320
BC		 1676 if (txq->txd == NULL)
1677 return;
1678
efb7c49a 1679 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1680
45eb400d
LB		 1681 kfree(txq->skb);
1682 txq->skb = NULL;
a66098da
LB		 1683
1684 pci_free_consistent(priv->pdev,
1685 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB		 1686 txq->txd, txq->txd_dma);
1687 txq->txd = NULL;
a66098da
LB		 1688}
1689
ac109fd0
BC		 1690/* caller must hold priv->stream_lock when calling the stream functions */
1691struct mwl8k_ampdu_stream *
1692mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
1693{
1694 struct mwl8k_ampdu_stream *stream;
1695 struct mwl8k_priv *priv = hw->priv;
1696 int i;
1697
1698 for (i = 0; i < priv->num_ampdu_queues; i++) {
1699 stream = &priv->ampdu[i];
1700 if (stream->state == AMPDU_NO_STREAM) {
1701 stream->sta = sta;
1702 stream->state = AMPDU_STREAM_NEW;
1703 stream->tid = tid;
1704 stream->idx = i;
1705 stream->txq_idx = MWL8K_TX_WMM_QUEUES + i;
1706 wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
1707 sta->addr, tid);
1708 return stream;
1709 }
1710 }
1711 return NULL;
1712}
1713
1714static int
1715mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1716{
1717 int ret;
1718
1719 /* if the stream has already been started, don't start it again */
1720 if (stream->state != AMPDU_STREAM_NEW)
1721 return 0;
1722 ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
1723 if (ret)
1724 wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
1725 "%d\n", stream->sta->addr, stream->tid, ret);
1726 else
1727 wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
1728 stream->sta->addr, stream->tid);
1729 return ret;
1730}
1731
1732static void
1733mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1734{
1735 wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
1736 stream->tid);
1737 memset(stream, 0, sizeof(*stream));
1738}
1739
1740static struct mwl8k_ampdu_stream *
1741mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
1742{
1743 struct mwl8k_priv *priv = hw->priv;
1744 int i;
1745
1746 for (i = 0 ; i < priv->num_ampdu_queues; i++) {
1747 struct mwl8k_ampdu_stream *stream;
1748 stream = &priv->ampdu[i];
1749 if (stream->state == AMPDU_NO_STREAM)
1750 continue;
1751 if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
1752 stream->tid == tid)
1753 return stream;
1754 }
1755 return NULL;
1756}
1757
7bb45683 1758static void
a66098da
LB		 1759mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1760{
1761 struct mwl8k_priv *priv = hw->priv;
1762 struct ieee80211_tx_info *tx_info;
23b33906 1763 struct mwl8k_vif *mwl8k_vif;
65f3ddcd 1764 struct ieee80211_sta *sta;
a66098da
LB		 1765 struct ieee80211_hdr *wh;
1766 struct mwl8k_tx_queue *txq;
1767 struct mwl8k_tx_desc *tx;
a66098da 1768 dma_addr_t dma;
23b33906
LB		 1769 u32 txstatus;
1770 u8 txdatarate;
1771 u16 qos;
65f3ddcd
NS		 1772 int txpriority;
1773 u8 tid = 0;
1774 struct mwl8k_ampdu_stream *stream = NULL;
1775 bool start_ba_session = false;
a0e7c6cf 1776 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
a66098da 1777
23b33906
LB		 1778 wh = (struct ieee80211_hdr *)skb->data;
1779 if (ieee80211_is_data_qos(wh->frame_control))
1780 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1781 else
1782 qos = 0;
a66098da 1783
d9a07d49
NS		 1784 if (priv->ap_fw)
1785 mwl8k_encapsulate_tx_frame(skb);
1786 else
1787 mwl8k_add_dma_header(skb, 0);
1788
23b33906 1789 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB		 1790
1791 tx_info = IEEE80211_SKB_CB(skb);
65f3ddcd 1792 sta = tx_info->control.sta;
a66098da 1793 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB		 1794
1795 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1796 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB		 1797 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1798 mwl8k_vif->seqno += 0x10;
a66098da
LB		 1799 }
1800
23b33906
LB		 1801 /* Setup firmware control bit fields for each frame type. */
1802 txstatus = 0;
1803 txdatarate = 0;
1804 if (ieee80211_is_mgmt(wh->frame_control) ||
1805 ieee80211_is_ctl(wh->frame_control)) {
1806 txdatarate = 0;
e0493a8d 1807 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB		 1808 } else if (ieee80211_is_data(wh->frame_control)) {
1809 txdatarate = 1;
1810 if (is_multicast_ether_addr(wh->addr1))
1811 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1812
e0493a8d 1813 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1814 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1815 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1816 else
e0493a8d 1817 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1818 }
a66098da 1819
a0e7c6cf
NS		 1820 /* Queue ADDBA request in the respective data queue. While setting up
1821 * the ampdu stream, mac80211 queues further packets for that
1822 * particular ra/tid pair. However, packets piled up in the hardware
1823 * for that ra/tid pair will still go out. ADDBA request and the
1824 * related data packets going out from different queues asynchronously
1825 * will cause a shift in the receiver window which might result in
1826 * ampdu packets getting dropped at the receiver after the stream has
1827 * been setup.
1828 */
1829 if (unlikely(ieee80211_is_action(wh->frame_control) &&
1830 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
1831 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
1832 priv->ap_fw)) {
1833 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
1834 tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
1835 index = mwl8k_tid_queue_mapping(tid);
1836 }
1837
65f3ddcd
NS		 1838 txpriority = index;
1839
1840 if (ieee80211_is_data_qos(wh->frame_control) &&
1841 skb->protocol != cpu_to_be16(ETH_P_PAE) &&
1842 sta->ht_cap.ht_supported && priv->ap_fw) {
1843 tid = qos & 0xf;
1844 spin_lock(&priv->stream_lock);
1845 stream = mwl8k_lookup_stream(hw, sta->addr, tid);
1846 if (stream != NULL) {
1847 if (stream->state == AMPDU_STREAM_ACTIVE) {
1848 txpriority = stream->txq_idx;
1849 index = stream->txq_idx;
1850 } else if (stream->state == AMPDU_STREAM_NEW) {
1851 /* We get here if the driver sends us packets
1852 * after we've initiated a stream, but before
1853 * our ampdu_action routine has been called
1854 * with IEEE80211_AMPDU_TX_START to get the SSN
1855 * for the ADDBA request. So this packet can
1856 * go out with no risk of sequence number
1857 * mismatch. No special handling is required.
1858 */
1859 } else {
1860 /* Drop packets that would go out after the
1861 * ADDBA request was sent but before the ADDBA
1862 * response is received. If we don't do this,
1863 * the recipient would probably receive it
1864 * after the ADDBA request with SSN 0. This
1865 * will cause the recipient's BA receive window
1866 * to shift, which would cause the subsequent
1867 * packets in the BA stream to be discarded.
1868 * mac80211 queues our packets for us in this
1869 * case, so this is really just a safety check.
1870 */
1871 wiphy_warn(hw->wiphy,
1872 "Cannot send packet while ADDBA "
1873 "dialog is underway.\n");
1874 spin_unlock(&priv->stream_lock);
1875 dev_kfree_skb(skb);
1876 return;
1877 }
1878 } else {
1879 /* Defer calling mwl8k_start_stream so that the current
1880 * skb can go out before the ADDBA request. This
1881 * prevents sequence number mismatch at the recepient
1882 * as described above.
1883 */
17033543
NS		 1884 if (MWL8K_STA(sta)->is_ampdu_allowed) {
1885 stream = mwl8k_add_stream(hw, sta, tid);
1886 if (stream != NULL)
1887 start_ba_session = true;
1888 }
65f3ddcd
NS		 1889 }
1890 spin_unlock(&priv->stream_lock);
1891 }
1892
a66098da
LB		 1893 dma = pci_map_single(priv->pdev, skb->data,
1894 skb->len, PCI_DMA_TODEVICE);
1895
1896 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP		 1897 wiphy_debug(hw->wiphy,
1898 "failed to dma map skb, dropping TX frame.\n");
65f3ddcd
NS		 1899 if (start_ba_session) {
1900 spin_lock(&priv->stream_lock);
1901 mwl8k_remove_stream(hw, stream);
1902 spin_unlock(&priv->stream_lock);
1903 }
23b33906 1904 dev_kfree_skb(skb);
7bb45683 1905 return;
a66098da
LB		 1906 }
1907
23b33906 1908 spin_lock_bh(&priv->tx_lock);
a66098da 1909
23b33906 1910 txq = priv->txq + index;
a66098da 1911
65f3ddcd
NS		 1912 if (index >= MWL8K_TX_WMM_QUEUES && txq->len >= MWL8K_TX_DESCS) {
1913 /* This is the case in which the tx packet is destined for an
1914 * AMPDU queue and that AMPDU queue is full. Because we don't
1915 * start and stop the AMPDU queues, we must drop these packets.
1916 */
1917 dev_kfree_skb(skb);
1918 spin_unlock_bh(&priv->tx_lock);
1919 return;
1920 }
1921
45eb400d
LB		 1922 BUG_ON(txq->skb[txq->tail] != NULL);
1923 txq->skb[txq->tail] = skb;
a66098da 1924
45eb400d 1925 tx = txq->txd + txq->tail;
23b33906 1926 tx->data_rate = txdatarate;
65f3ddcd 1927 tx->tx_priority = txpriority;
a66098da 1928 tx->qos_control = cpu_to_le16(qos);
a66098da
LB		 1929 tx->pkt_phys_addr = cpu_to_le32(dma);
1930 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 1931 tx->rate_info = 0;
a680400e
LB		 1932 if (!priv->ap_fw && tx_info->control.sta != NULL)
1933 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1934 else
1935 tx->peer_id = 0;
a66098da 1936 wmb();
23b33906
LB		 1937 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1938
8ccbc3b8 1939 txq->len++;
a66098da 1940 priv->pending_tx_pkts++;
a66098da 1941
45eb400d
LB		 1942 txq->tail++;
1943 if (txq->tail == MWL8K_TX_DESCS)
1944 txq->tail = 0;
23b33906 1945
65f3ddcd 1946 if (txq->head == txq->tail && index < MWL8K_TX_WMM_QUEUES)
a66098da
LB		 1947 ieee80211_stop_queue(hw, index);
1948
23b33906 1949 mwl8k_tx_start(priv);
a66098da
LB		 1950
1951 spin_unlock_bh(&priv->tx_lock);
65f3ddcd
NS		 1952
1953 /* Initiate the ampdu session here */
1954 if (start_ba_session) {
1955 spin_lock(&priv->stream_lock);
1956 if (mwl8k_start_stream(hw, stream))
1957 mwl8k_remove_stream(hw, stream);
1958 spin_unlock(&priv->stream_lock);
1959 }
a66098da
LB		 1960}
1961
1962
618952a7
LB		 1963/*
1964 * Firmware access.
1965 *
1966 * We have the following requirements for issuing firmware commands:
1967 * - Some commands require that the packet transmit path is idle when
1968 * the command is issued. (For simplicity, we'll just quiesce the
1969 * transmit path for every command.)
1970 * - There are certain sequences of commands that need to be issued to
1971 * the hardware sequentially, with no other intervening commands.
1972 *
1973 * This leads to an implementation of a "firmware lock" as a mutex that
1974 * can be taken recursively, and which is taken by both the low-level
1975 * command submission function (mwl8k_post_cmd) as well as any users of
1976 * that function that require issuing of an atomic sequence of commands,
1977 * and quiesces the transmit path whenever it's taken.
1978 */
1979static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1980{
1981 struct mwl8k_priv *priv = hw->priv;
1982
1983 if (priv->fw_mutex_owner != current) {
1984 int rc;
1985
1986 mutex_lock(&priv->fw_mutex);
1987 ieee80211_stop_queues(hw);
1988
1989 rc = mwl8k_tx_wait_empty(hw);
1990 if (rc) {
1991 ieee80211_wake_queues(hw);
1992 mutex_unlock(&priv->fw_mutex);
1993
1994 return rc;
1995 }
1996
1997 priv->fw_mutex_owner = current;
1998 }
1999
2000 priv->fw_mutex_depth++;
2001
2002 return 0;
2003}
2004
2005static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
2006{
2007 struct mwl8k_priv *priv = hw->priv;
2008
2009 if (!--priv->fw_mutex_depth) {
2010 ieee80211_wake_queues(hw);
2011 priv->fw_mutex_owner = NULL;
2012 mutex_unlock(&priv->fw_mutex);
2013 }
2014}
2015
2016
a66098da
LB		 2017/*
2018 * Command processing.
2019 */
2020
0c9cc640
LB		 2021/* Timeout firmware commands after 10s */
2022#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB		 2023
2024static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
2025{
2026 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2027 struct mwl8k_priv *priv = hw->priv;
2028 void __iomem *regs = priv->regs;
2029 dma_addr_t dma_addr;
2030 unsigned int dma_size;
2031 int rc;
a66098da
LB		 2032 unsigned long timeout = 0;
2033 u8 buf[32];
2034
b603742f 2035 cmd->result = (__force __le16) 0xffff;
a66098da
LB		 2036 dma_size = le16_to_cpu(cmd->length);
2037 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
2038 PCI_DMA_BIDIRECTIONAL);
2039 if (pci_dma_mapping_error(priv->pdev, dma_addr))
2040 return -ENOMEM;
2041
618952a7 2042 rc = mwl8k_fw_lock(hw);
39a1e42e
LB		 2043 if (rc) {
2044 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2045 PCI_DMA_BIDIRECTIONAL);
618952a7 2046 return rc;
39a1e42e 2047 }
a66098da 2048
a66098da
LB		 2049 priv->hostcmd_wait = &cmd_wait;
2050 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
2051 iowrite32(MWL8K_H2A_INT_DOORBELL,
2052 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2053 iowrite32(MWL8K_H2A_INT_DUMMY,
2054 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB		 2055
2056 timeout = wait_for_completion_timeout(&cmd_wait,
2057 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
2058
618952a7
LB		 2059 priv->hostcmd_wait = NULL;
2060
2061 mwl8k_fw_unlock(hw);
2062
37055bd4
LB		 2063 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2064 PCI_DMA_BIDIRECTIONAL);
2065
a66098da 2066 if (!timeout) {
5db55844 2067 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP		 2068 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2069 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB		 2070 rc = -ETIMEDOUT;
2071 } else {
0c9cc640
LB		 2072 int ms;
2073
2074 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
2075
ce9e2e1b 2076 rc = cmd->result ? -EINVAL : 0;
a66098da 2077 if (rc)
5db55844 2078 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP		 2079 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2080 le16_to_cpu(cmd->result));
0c9cc640 2081 else if (ms > 2000)
5db55844 2082 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP		 2083 mwl8k_cmd_name(cmd->code,
2084 buf, sizeof(buf)),
2085 ms);
a66098da
LB		 2086 }
2087
a66098da
LB		 2088 return rc;
2089}
2090
f57ca9c1
LB		 2091static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
2092 struct ieee80211_vif *vif,
2093 struct mwl8k_cmd_pkt *cmd)
2094{
2095 if (vif != NULL)
2096 cmd->macid = MWL8K_VIF(vif)->macid;
2097 return mwl8k_post_cmd(hw, cmd);
2098}
2099
1349ad2f
LB		 2100/*
2101 * Setup code shared between STA and AP firmware images.
2102 */
2103static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
2104{
2105 struct mwl8k_priv *priv = hw->priv;
2106
2107 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
2108 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
2109
2110 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
2111 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
2112
2113 priv->band_24.band = IEEE80211_BAND_2GHZ;
2114 priv->band_24.channels = priv->channels_24;
2115 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
2116 priv->band_24.bitrates = priv->rates_24;
2117 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
2118
2119 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
2120}
2121
4eae9edd
LB		 2122static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
2123{
2124 struct mwl8k_priv *priv = hw->priv;
2125
2126 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
2127 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
2128
2129 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
2130 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
2131
2132 priv->band_50.band = IEEE80211_BAND_5GHZ;
2133 priv->band_50.channels = priv->channels_50;
2134 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
2135 priv->band_50.bitrates = priv->rates_50;
2136 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
2137
2138 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
2139}
2140
a66098da 2141/*
04b147b1 2142 * CMD_GET_HW_SPEC (STA version).
a66098da 2143 */
04b147b1 2144struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB		 2145 struct mwl8k_cmd_pkt header;
2146 __u8 hw_rev;
2147 __u8 host_interface;
2148 __le16 num_mcaddrs;
d89173f2 2149 __u8 perm_addr[ETH_ALEN];
a66098da
LB		 2150 __le16 region_code;
2151 __le32 fw_rev;
2152 __le32 ps_cookie;
2153 __le32 caps;
2154 __u8 mcs_bitmap[16];
2155 __le32 rx_queue_ptr;
2156 __le32 num_tx_queues;
e600707b 2157 __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
a66098da
LB		 2158 __le32 caps2;
2159 __le32 num_tx_desc_per_queue;
45eb400d 2160 __le32 total_rxd;
ba2d3587 2161} __packed;
a66098da 2162
341c9791
LB		 2163#define MWL8K_CAP_MAX_AMSDU 0x20000000
2164#define MWL8K_CAP_GREENFIELD 0x08000000
2165#define MWL8K_CAP_AMPDU 0x04000000
2166#define MWL8K_CAP_RX_STBC 0x01000000
2167#define MWL8K_CAP_TX_STBC 0x00800000
2168#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
2169#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
2170#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
2171#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
2172#define MWL8K_CAP_DELAY_BA 0x00003000
2173#define MWL8K_CAP_MIMO 0x00000200
2174#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB		 2175#define MWL8K_CAP_BAND_MASK 0x00000007
2176#define MWL8K_CAP_5GHZ 0x00000004
2177#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 2178
06953235
LB		 2179static void
2180mwl8k_set_ht_caps(struct ieee80211_hw *hw,
2181 struct ieee80211_supported_band *band, u32 cap)
341c9791 2182{
341c9791
LB		 2183 int rx_streams;
2184 int tx_streams;
2185
777ad375 2186 band->ht_cap.ht_supported = 1;
341c9791
LB		 2187
2188 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 2189 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 2190 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 2191 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB		 2192 if (cap & MWL8K_CAP_AMPDU) {
2193 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB		 2194 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2195 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB		 2196 }
2197 if (cap & MWL8K_CAP_RX_STBC)
777ad375 2198 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 2199 if (cap & MWL8K_CAP_TX_STBC)
777ad375 2200 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 2201 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 2202 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 2203 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 2204 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 2205 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 2206 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 2207 if (cap & MWL8K_CAP_40MHZ)
777ad375 2208 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB		 2209
2210 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
2211 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
2212
777ad375 2213 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 2214 if (rx_streams >= 2)
777ad375 2215 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 2216 if (rx_streams >= 3)
777ad375
LB		 2217 band->ht_cap.mcs.rx_mask[2] = 0xff;
2218 band->ht_cap.mcs.rx_mask[4] = 0x01;
2219 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB		 2220
2221 if (rx_streams != tx_streams) {
777ad375
LB		 2222 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
2223 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB		 2224 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2225 }
2226}
2227
06953235
LB		 2228static void
2229mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
2230{
2231 struct mwl8k_priv *priv = hw->priv;
2232
2233 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
2234 mwl8k_setup_2ghz_band(hw);
2235 if (caps & MWL8K_CAP_MIMO)
2236 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
2237 }
2238
2239 if (caps & MWL8K_CAP_5GHZ) {
2240 mwl8k_setup_5ghz_band(hw);
2241 if (caps & MWL8K_CAP_MIMO)
2242 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
2243 }
2244}
2245
04b147b1 2246static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB		 2247{
2248 struct mwl8k_priv *priv = hw->priv;
04b147b1 2249 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB		 2250 int rc;
2251 int i;
2252
2253 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2254 if (cmd == NULL)
2255 return -ENOMEM;
2256
2257 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2258 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2259
2260 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2261 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 2262 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b
BC		 2263 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2264 for (i = 0; i < mwl8k_tx_queues(priv); i++)
45eb400d 2265 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 2266 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 2267 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 2268
2269 rc = mwl8k_post_cmd(hw, &cmd->header);
2270
2271 if (!rc) {
2272 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2273 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 2274 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 2275 priv->hw_rev = cmd->hw_rev;
06953235 2276 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2277 priv->ap_macids_supported = 0x00000000;
2278 priv->sta_macids_supported = 0x00000001;
a66098da
LB		 2279 }
2280
2281 kfree(cmd);
2282 return rc;
2283}
2284
42fba21d
LB		 2285/*
2286 * CMD_GET_HW_SPEC (AP version).
2287 */
2288struct mwl8k_cmd_get_hw_spec_ap {
2289 struct mwl8k_cmd_pkt header;
2290 __u8 hw_rev;
2291 __u8 host_interface;
2292 __le16 num_wcb;
2293 __le16 num_mcaddrs;
2294 __u8 perm_addr[ETH_ALEN];
2295 __le16 region_code;
2296 __le16 num_antenna;
2297 __le32 fw_rev;
2298 __le32 wcbbase0;
2299 __le32 rxwrptr;
2300 __le32 rxrdptr;
2301 __le32 ps_cookie;
2302 __le32 wcbbase1;
2303 __le32 wcbbase2;
2304 __le32 wcbbase3;
952a0e96 2305 __le32 fw_api_version;
8a7a578c
BC		 2306 __le32 caps;
2307 __le32 num_of_ampdu_queues;
2308 __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
ba2d3587 2309} __packed;
42fba21d
LB		 2310
2311static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2312{
2313 struct mwl8k_priv *priv = hw->priv;
2314 struct mwl8k_cmd_get_hw_spec_ap *cmd;
8a7a578c 2315 int rc, i;
952a0e96 2316 u32 api_version;
42fba21d
LB		 2317
2318 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2319 if (cmd == NULL)
2320 return -ENOMEM;
2321
2322 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2323 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2324
2325 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2326 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2327
2328 rc = mwl8k_post_cmd(hw, &cmd->header);
2329
2330 if (!rc) {
2331 int off;
2332
952a0e96
BC		 2333 api_version = le32_to_cpu(cmd->fw_api_version);
2334 if (priv->device_info->fw_api_ap != api_version) {
2335 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2336 " Expected %d got %d.\n", MWL8K_NAME,
2337 priv->device_info->part_name,
2338 priv->device_info->fw_api_ap,
2339 api_version);
2340 rc = -EINVAL;
2341 goto done;
2342 }
42fba21d
LB		 2343 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2344 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2345 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2346 priv->hw_rev = cmd->hw_rev;
8a7a578c 2347 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2348 priv->ap_macids_supported = 0x000000ff;
2349 priv->sta_macids_supported = 0x00000000;
8a7a578c
BC		 2350 priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
2351 if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
2352 wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
2353 " but we only support %d.\n",
2354 priv->num_ampdu_queues,
2355 MWL8K_MAX_AMPDU_QUEUES);
2356 priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
2357 }
42fba21d 2358 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2359 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2360
2361 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2362 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d 2363
73b46320
BC		 2364 priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
2365 priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
2366 priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
2367 priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
8a7a578c
BC		 2368
2369 for (i = 0; i < priv->num_ampdu_queues; i++)
e600707b 2370 priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
8a7a578c 2371 le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
42fba21d
LB		 2372 }
2373
952a0e96 2374done:
42fba21d
LB		 2375 kfree(cmd);
2376 return rc;
2377}
2378
2379/*
2380 * CMD_SET_HW_SPEC.
2381 */
2382struct mwl8k_cmd_set_hw_spec {
2383 struct mwl8k_cmd_pkt header;
2384 __u8 hw_rev;
2385 __u8 host_interface;
2386 __le16 num_mcaddrs;
2387 __u8 perm_addr[ETH_ALEN];
2388 __le16 region_code;
2389 __le32 fw_rev;
2390 __le32 ps_cookie;
2391 __le32 caps;
2392 __le32 rx_queue_ptr;
2393 __le32 num_tx_queues;
e600707b 2394 __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
42fba21d
LB		 2395 __le32 flags;
2396 __le32 num_tx_desc_per_queue;
2397 __le32 total_rxd;
ba2d3587 2398} __packed;
42fba21d 2399
8a7a578c
BC		 2400/* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
2401 * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
2402 * the packets that are queued for more than 500ms, will be dropped in the
2403 * hardware. This helps minimizing the issues caused due to head-of-line
2404 * blocking where a slow client can hog the bandwidth and affect traffic to a
2405 * faster client.
2406 */
2407#define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
b64fe619
LB		 2408#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2409#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2410#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB		 2411
2412static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2413{
2414 struct mwl8k_priv *priv = hw->priv;
2415 struct mwl8k_cmd_set_hw_spec *cmd;
2416 int rc;
2417 int i;
2418
2419 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2420 if (cmd == NULL)
2421 return -ENOMEM;
2422
2423 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2424 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2425
2426 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2427 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b 2428 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
85c9205c
NS		 2429
2430 /*
2431 * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
2432 * that order. Firmware has Q3 as highest priority and Q0 as lowest
2433 * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
2434 * priority is interpreted the right way in firmware.
2435 */
e600707b
BC		 2436 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
2437 int j = mwl8k_tx_queues(priv) - 1 - i;
85c9205c
NS		 2438 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
2439 }
2440
b64fe619
LB		 2441 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2442 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
2443 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
42fba21d
LB		 2444 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2445 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2446
2447 rc = mwl8k_post_cmd(hw, &cmd->header);
2448 kfree(cmd);
2449
2450 return rc;
2451}
2452
a66098da
LB		 2453/*
2454 * CMD_MAC_MULTICAST_ADR.
2455 */
2456struct mwl8k_cmd_mac_multicast_adr {
2457 struct mwl8k_cmd_pkt header;
2458 __le16 action;
2459 __le16 numaddr;
ce9e2e1b 2460 __u8 addr[0][ETH_ALEN];
a66098da
LB		 2461};
2462
d5e30845
LB		 2463#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2464#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2465#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2466#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2467
e81cd2d6 2468static struct mwl8k_cmd_pkt *
447ced07 2469__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2470 struct netdev_hw_addr_list *mc_list)
a66098da 2471{
e81cd2d6 2472 struct mwl8k_priv *priv = hw->priv;
a66098da 2473 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2474 int size;
22bedad3
JP		 2475 int mc_count = 0;
2476
2477 if (mc_list)
2478 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2479
447ced07 2480 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB		 2481 allmulti = 1;
2482 mc_count = 0;
2483 }
e81cd2d6
LB		 2484
2485 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2486
e81cd2d6 2487 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2488 if (cmd == NULL)
e81cd2d6 2489 return NULL;
a66098da
LB		 2490
2491 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2492 cmd->header.length = cpu_to_le16(size);
d5e30845
LB		 2493 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2494 MWL8K_ENABLE_RX_BROADCAST);
2495
2496 if (allmulti) {
2497 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2498 } else if (mc_count) {
22bedad3
JP		 2499 struct netdev_hw_addr *ha;
2500 int i = 0;
d5e30845
LB		 2501
2502 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2503 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP		 2504 netdev_hw_addr_list_for_each(ha, mc_list) {
2505 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2506 }
a66098da
LB		 2507 }
2508
e81cd2d6 2509 return &cmd->header;
a66098da
LB		 2510}
2511
2512/*
55489b6e 2513 * CMD_GET_STAT.
a66098da 2514 */
55489b6e 2515struct mwl8k_cmd_get_stat {
a66098da 2516 struct mwl8k_cmd_pkt header;
a66098da 2517 __le32 stats[64];
ba2d3587 2518} __packed;
a66098da
LB		 2519
2520#define MWL8K_STAT_ACK_FAILURE 9
2521#define MWL8K_STAT_RTS_FAILURE 12
2522#define MWL8K_STAT_FCS_ERROR 24
2523#define MWL8K_STAT_RTS_SUCCESS 11
2524
55489b6e
LB		 2525static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2526 struct ieee80211_low_level_stats *stats)
a66098da 2527{
55489b6e 2528 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB		 2529 int rc;
2530
2531 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2532 if (cmd == NULL)
2533 return -ENOMEM;
2534
2535 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2536 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2537
2538 rc = mwl8k_post_cmd(hw, &cmd->header);
2539 if (!rc) {
2540 stats->dot11ACKFailureCount =
2541 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2542 stats->dot11RTSFailureCount =
2543 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2544 stats->dot11FCSErrorCount =
2545 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2546 stats->dot11RTSSuccessCount =
2547 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2548 }
2549 kfree(cmd);
2550
2551 return rc;
2552}
2553
2554/*
55489b6e 2555 * CMD_RADIO_CONTROL.
a66098da 2556 */
55489b6e 2557struct mwl8k_cmd_radio_control {
a66098da
LB		 2558 struct mwl8k_cmd_pkt header;
2559 __le16 action;
2560 __le16 control;
2561 __le16 radio_on;
ba2d3587 2562} __packed;
a66098da 2563
c46563b7 2564static int
55489b6e 2565mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB		 2566{
2567 struct mwl8k_priv *priv = hw->priv;
55489b6e 2568 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB		 2569 int rc;
2570
c46563b7 2571 if (enable == priv->radio_on && !force)
a66098da
LB		 2572 return 0;
2573
a66098da
LB		 2574 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2575 if (cmd == NULL)
2576 return -ENOMEM;
2577
2578 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2579 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2580 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2581 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB		 2582 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2583
2584 rc = mwl8k_post_cmd(hw, &cmd->header);
2585 kfree(cmd);
2586
2587 if (!rc)
c46563b7 2588 priv->radio_on = enable;
a66098da
LB		 2589
2590 return rc;
2591}
2592
55489b6e 2593static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2594{
55489b6e 2595 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB		 2596}
2597
55489b6e 2598static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2599{
55489b6e 2600 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB		 2601}
2602
a66098da
LB		 2603static int
2604mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2605{
99200a99 2606 struct mwl8k_priv *priv = hw->priv;
a66098da 2607
68ce3884 2608 priv->radio_short_preamble = short_preamble;
a66098da 2609
55489b6e 2610 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB		 2611}
2612
2613/*
55489b6e 2614 * CMD_RF_TX_POWER.
a66098da 2615 */
41fdf097 2616#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2617
55489b6e 2618struct mwl8k_cmd_rf_tx_power {
a66098da
LB		 2619 struct mwl8k_cmd_pkt header;
2620 __le16 action;
2621 __le16 support_level;
2622 __le16 current_level;
2623 __le16 reserved;
41fdf097 2624 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2625} __packed;
a66098da 2626
55489b6e 2627static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2628{
55489b6e 2629 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB		 2630 int rc;
2631
2632 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2633 if (cmd == NULL)
2634 return -ENOMEM;
2635
2636 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2637 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2638 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2639 cmd->support_level = cpu_to_le16(dBm);
2640
2641 rc = mwl8k_post_cmd(hw, &cmd->header);
2642 kfree(cmd);
2643
2644 return rc;
2645}
2646
41fdf097
NS		 2647/*
2648 * CMD_TX_POWER.
2649 */
2650#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2651
2652struct mwl8k_cmd_tx_power {
2653 struct mwl8k_cmd_pkt header;
2654 __le16 action;
2655 __le16 band;
2656 __le16 channel;
2657 __le16 bw;
2658 __le16 sub_ch;
2659 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2660} __attribute__((packed));
2661
2662static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2663 struct ieee80211_conf *conf,
2664 unsigned short pwr)
2665{
2666 struct ieee80211_channel *channel = conf->channel;
2667 struct mwl8k_cmd_tx_power *cmd;
2668 int rc;
2669 int i;
2670
2671 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2672 if (cmd == NULL)
2673 return -ENOMEM;
2674
2675 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2676 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2677 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2678
2679 if (channel->band == IEEE80211_BAND_2GHZ)
2680 cmd->band = cpu_to_le16(0x1);
2681 else if (channel->band == IEEE80211_BAND_5GHZ)
2682 cmd->band = cpu_to_le16(0x4);
2683
2684 cmd->channel = channel->hw_value;
2685
2686 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2687 conf->channel_type == NL80211_CHAN_HT20) {
2688 cmd->bw = cpu_to_le16(0x2);
2689 } else {
2690 cmd->bw = cpu_to_le16(0x4);
2691 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2692 cmd->sub_ch = cpu_to_le16(0x3);
2693 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2694 cmd->sub_ch = cpu_to_le16(0x1);
2695 }
2696
2697 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2698 cmd->power_level_list[i] = cpu_to_le16(pwr);
2699
2700 rc = mwl8k_post_cmd(hw, &cmd->header);
2701 kfree(cmd);
2702
2703 return rc;
2704}
2705
08b06347
LB		 2706/*
2707 * CMD_RF_ANTENNA.
2708 */
2709struct mwl8k_cmd_rf_antenna {
2710 struct mwl8k_cmd_pkt header;
2711 __le16 antenna;
2712 __le16 mode;
ba2d3587 2713} __packed;
08b06347
LB		 2714
2715#define MWL8K_RF_ANTENNA_RX 1
2716#define MWL8K_RF_ANTENNA_TX 2
2717
2718static int
2719mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2720{
2721 struct mwl8k_cmd_rf_antenna *cmd;
2722 int rc;
2723
2724 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2725 if (cmd == NULL)
2726 return -ENOMEM;
2727
2728 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2729 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2730 cmd->antenna = cpu_to_le16(antenna);
2731 cmd->mode = cpu_to_le16(mask);
2732
2733 rc = mwl8k_post_cmd(hw, &cmd->header);
2734 kfree(cmd);
2735
2736 return rc;
2737}
2738
b64fe619
LB		 2739/*
2740 * CMD_SET_BEACON.
2741 */
2742struct mwl8k_cmd_set_beacon {
2743 struct mwl8k_cmd_pkt header;
2744 __le16 beacon_len;
2745 __u8 beacon[0];
2746};
2747
aa21d0f6
LB		 2748static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2749 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB		 2750{
2751 struct mwl8k_cmd_set_beacon *cmd;
2752 int rc;
2753
2754 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2755 if (cmd == NULL)
2756 return -ENOMEM;
2757
2758 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2759 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2760 cmd->beacon_len = cpu_to_le16(len);
2761 memcpy(cmd->beacon, beacon, len);
2762
aa21d0f6 2763 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 2764 kfree(cmd);
2765
2766 return rc;
2767}
2768
a66098da
LB		 2769/*
2770 * CMD_SET_PRE_SCAN.
2771 */
2772struct mwl8k_cmd_set_pre_scan {
2773 struct mwl8k_cmd_pkt header;
ba2d3587 2774} __packed;
a66098da
LB		 2775
2776static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2777{
2778 struct mwl8k_cmd_set_pre_scan *cmd;
2779 int rc;
2780
2781 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2782 if (cmd == NULL)
2783 return -ENOMEM;
2784
2785 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2786 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2787
2788 rc = mwl8k_post_cmd(hw, &cmd->header);
2789 kfree(cmd);
2790
2791 return rc;
2792}
2793
2794/*
2795 * CMD_SET_POST_SCAN.
2796 */
2797struct mwl8k_cmd_set_post_scan {
2798 struct mwl8k_cmd_pkt header;
2799 __le32 isibss;
d89173f2 2800 __u8 bssid[ETH_ALEN];
ba2d3587 2801} __packed;
a66098da
LB		 2802
2803static int
0a11dfc3 2804mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB		 2805{
2806 struct mwl8k_cmd_set_post_scan *cmd;
2807 int rc;
2808
2809 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2810 if (cmd == NULL)
2811 return -ENOMEM;
2812
2813 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2814 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2815 cmd->isibss = 0;
d89173f2 2816 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB		 2817
2818 rc = mwl8k_post_cmd(hw, &cmd->header);
2819 kfree(cmd);
2820
2821 return rc;
2822}
2823
2824/*
2825 * CMD_SET_RF_CHANNEL.
2826 */
2827struct mwl8k_cmd_set_rf_channel {
2828 struct mwl8k_cmd_pkt header;
2829 __le16 action;
2830 __u8 current_channel;
2831 __le32 channel_flags;
ba2d3587 2832} __packed;
a66098da
LB		 2833
2834static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2835 struct ieee80211_conf *conf)
a66098da 2836{
610677d2 2837 struct ieee80211_channel *channel = conf->channel;
a66098da
LB		 2838 struct mwl8k_cmd_set_rf_channel *cmd;
2839 int rc;
2840
2841 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2842 if (cmd == NULL)
2843 return -ENOMEM;
2844
2845 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2846 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2847 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2848 cmd->current_channel = channel->hw_value;
610677d2 2849
a66098da 2850 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2851 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB		 2852 else if (channel->band == IEEE80211_BAND_5GHZ)
2853 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB		 2854
2855 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2856 conf->channel_type == NL80211_CHAN_HT20)
2857 cmd->channel_flags |= cpu_to_le32(0x00000080);
2858 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2859 cmd->channel_flags |= cpu_to_le32(0x000001900);
2860 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2861 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB		 2862
2863 rc = mwl8k_post_cmd(hw, &cmd->header);
2864 kfree(cmd);
2865
2866 return rc;
2867}
2868
2869/*
55489b6e 2870 * CMD_SET_AID.
a66098da 2871 */
55489b6e
LB		 2872#define MWL8K_FRAME_PROT_DISABLED 0x00
2873#define MWL8K_FRAME_PROT_11G 0x07
2874#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2875#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 2876
55489b6e
LB		 2877struct mwl8k_cmd_update_set_aid {
2878 struct mwl8k_cmd_pkt header;
2879 __le16 aid;
a66098da 2880
55489b6e
LB		 2881 /* AP's MAC address (BSSID) */
2882 __u8 bssid[ETH_ALEN];
2883 __le16 protection_mode;
2884 __u8 supp_rates[14];
ba2d3587 2885} __packed;
a66098da 2886
c6e96010
LB		 2887static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2888{
2889 int i;
2890 int j;
2891
2892 /*
2893 * Clear nonstandard rates 4 and 13.
2894 */
2895 mask &= 0x1fef;
2896
2897 for (i = 0, j = 0; i < 14; i++) {
2898 if (mask & (1 << i))
777ad375 2899 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB		 2900 }
2901}
2902
55489b6e 2903static int
c6e96010
LB		 2904mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2905 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 2906{
55489b6e
LB		 2907 struct mwl8k_cmd_update_set_aid *cmd;
2908 u16 prot_mode;
a66098da
LB		 2909 int rc;
2910
2911 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2912 if (cmd == NULL)
2913 return -ENOMEM;
2914
55489b6e 2915 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 2916 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 2917 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 2918 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 2919
7dc6a7a7 2920 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB		 2921 prot_mode = MWL8K_FRAME_PROT_11G;
2922 } else {
7dc6a7a7 2923 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB		 2924 IEEE80211_HT_OP_MODE_PROTECTION) {
2925 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2926 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2927 break;
2928 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2929 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2930 break;
2931 default:
2932 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2933 break;
2934 }
2935 }
2936 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 2937
c6e96010 2938 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB		 2939
2940 rc = mwl8k_post_cmd(hw, &cmd->header);
2941 kfree(cmd);
2942
2943 return rc;
2944}
2945
32060e1b 2946/*
55489b6e 2947 * CMD_SET_RATE.
32060e1b 2948 */
55489b6e
LB		 2949struct mwl8k_cmd_set_rate {
2950 struct mwl8k_cmd_pkt header;
2951 __u8 legacy_rates[14];
2952
2953 /* Bitmap for supported MCS codes. */
2954 __u8 mcs_set[16];
2955 __u8 reserved[16];
ba2d3587 2956} __packed;
32060e1b 2957
55489b6e 2958static int
c6e96010 2959mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 2960 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 2961{
55489b6e 2962 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB		 2963 int rc;
2964
2965 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2966 if (cmd == NULL)
2967 return -ENOMEM;
2968
55489b6e 2969 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 2970 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 2971 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 2972 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB		 2973
2974 rc = mwl8k_post_cmd(hw, &cmd->header);
2975 kfree(cmd);
2976
2977 return rc;
2978}
2979
a66098da 2980/*
55489b6e 2981 * CMD_FINALIZE_JOIN.
a66098da 2982 */
55489b6e
LB		 2983#define MWL8K_FJ_BEACON_MAXLEN 128
2984
2985struct mwl8k_cmd_finalize_join {
a66098da 2986 struct mwl8k_cmd_pkt header;
55489b6e
LB		 2987 __le32 sleep_interval; /* Number of beacon periods to sleep */
2988 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 2989} __packed;
a66098da 2990
55489b6e
LB		 2991static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2992 int framelen, int dtim)
a66098da 2993{
55489b6e
LB		 2994 struct mwl8k_cmd_finalize_join *cmd;
2995 struct ieee80211_mgmt *payload = frame;
2996 int payload_len;
a66098da
LB		 2997 int rc;
2998
2999 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3000 if (cmd == NULL)
3001 return -ENOMEM;
3002
55489b6e 3003 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 3004 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3005 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
3006
3007 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
3008 if (payload_len < 0)
3009 payload_len = 0;
3010 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
3011 payload_len = MWL8K_FJ_BEACON_MAXLEN;
3012
3013 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB		 3014
3015 rc = mwl8k_post_cmd(hw, &cmd->header);
3016 kfree(cmd);
3017
3018 return rc;
3019}
3020
3021/*
55489b6e 3022 * CMD_SET_RTS_THRESHOLD.
a66098da 3023 */
55489b6e 3024struct mwl8k_cmd_set_rts_threshold {
a66098da
LB		 3025 struct mwl8k_cmd_pkt header;
3026 __le16 action;
55489b6e 3027 __le16 threshold;
ba2d3587 3028} __packed;
a66098da 3029
c2c2b12a
LB		 3030static int
3031mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 3032{
55489b6e 3033 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB		 3034 int rc;
3035
3036 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3037 if (cmd == NULL)
3038 return -ENOMEM;
3039
55489b6e 3040 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 3041 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB		 3042 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3043 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB		 3044
3045 rc = mwl8k_post_cmd(hw, &cmd->header);
3046 kfree(cmd);
3047
a66098da
LB		 3048 return rc;
3049}
3050
3051/*
55489b6e 3052 * CMD_SET_SLOT.
a66098da 3053 */
55489b6e 3054struct mwl8k_cmd_set_slot {
a66098da
LB		 3055 struct mwl8k_cmd_pkt header;
3056 __le16 action;
55489b6e 3057 __u8 short_slot;
ba2d3587 3058} __packed;
a66098da 3059
55489b6e 3060static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 3061{
55489b6e 3062 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB		 3063 int rc;
3064
3065 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3066 if (cmd == NULL)
3067 return -ENOMEM;
3068
55489b6e 3069 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 3070 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3071 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3072 cmd->short_slot = short_slot_time;
a66098da
LB		 3073
3074 rc = mwl8k_post_cmd(hw, &cmd->header);
3075 kfree(cmd);
3076
3077 return rc;
3078}
3079
3080/*
3081 * CMD_SET_EDCA_PARAMS.
3082 */
3083struct mwl8k_cmd_set_edca_params {
3084 struct mwl8k_cmd_pkt header;
3085
3086 /* See MWL8K_SET_EDCA_XXX below */
3087 __le16 action;
3088
3089 /* TX opportunity in units of 32 us */
3090 __le16 txop;
3091
2e484c89
LB		 3092 union {
3093 struct {
3094 /* Log exponent of max contention period: 0...15 */
3095 __le32 log_cw_max;
3096
3097 /* Log exponent of min contention period: 0...15 */
3098 __le32 log_cw_min;
3099
3100 /* Adaptive interframe spacing in units of 32us */
3101 __u8 aifs;
3102
3103 /* TX queue to configure */
3104 __u8 txq;
3105 } ap;
3106 struct {
3107 /* Log exponent of max contention period: 0...15 */
3108 __u8 log_cw_max;
a66098da 3109
2e484c89
LB		 3110 /* Log exponent of min contention period: 0...15 */
3111 __u8 log_cw_min;
a66098da 3112
2e484c89
LB		 3113 /* Adaptive interframe spacing in units of 32us */
3114 __u8 aifs;
a66098da 3115
2e484c89
LB		 3116 /* TX queue to configure */
3117 __u8 txq;
3118 } sta;
3119 };
ba2d3587 3120} __packed;
a66098da 3121
a66098da
LB		 3122#define MWL8K_SET_EDCA_CW 0x01
3123#define MWL8K_SET_EDCA_TXOP 0x02
3124#define MWL8K_SET_EDCA_AIFS 0x04
3125
3126#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
3127 MWL8K_SET_EDCA_TXOP | \
3128 MWL8K_SET_EDCA_AIFS)
3129
3130static int
55489b6e
LB		 3131mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
3132 __u16 cw_min, __u16 cw_max,
3133 __u8 aifs, __u16 txop)
a66098da 3134{
2e484c89 3135 struct mwl8k_priv *priv = hw->priv;
a66098da 3136 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB		 3137 int rc;
3138
3139 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3140 if (cmd == NULL)
3141 return -ENOMEM;
3142
a66098da
LB		 3143 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
3144 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 3145 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
3146 cmd->txop = cpu_to_le16(txop);
2e484c89
LB		 3147 if (priv->ap_fw) {
3148 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
3149 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
3150 cmd->ap.aifs = aifs;
3151 cmd->ap.txq = qnum;
3152 } else {
3153 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
3154 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
3155 cmd->sta.aifs = aifs;
3156 cmd->sta.txq = qnum;
3157 }
a66098da
LB		 3158
3159 rc = mwl8k_post_cmd(hw, &cmd->header);
3160 kfree(cmd);
3161
3162 return rc;
3163}
3164
3165/*
55489b6e 3166 * CMD_SET_WMM_MODE.
a66098da 3167 */
55489b6e 3168struct mwl8k_cmd_set_wmm_mode {
a66098da 3169 struct mwl8k_cmd_pkt header;
55489b6e 3170 __le16 action;
ba2d3587 3171} __packed;
a66098da 3172
55489b6e 3173static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 3174{
55489b6e
LB		 3175 struct mwl8k_priv *priv = hw->priv;
3176 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB		 3177 int rc;
3178
a66098da
LB		 3179 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3180 if (cmd == NULL)
3181 return -ENOMEM;
3182
55489b6e 3183 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 3184 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 3185 cmd->action = cpu_to_le16(!!enable);
a66098da
LB		 3186
3187 rc = mwl8k_post_cmd(hw, &cmd->header);
3188 kfree(cmd);
16cec43d 3189
55489b6e
LB		 3190 if (!rc)
3191 priv->wmm_enabled = enable;
a66098da
LB		 3192
3193 return rc;
3194}
3195
3196/*
55489b6e 3197 * CMD_MIMO_CONFIG.
a66098da 3198 */
55489b6e
LB		 3199struct mwl8k_cmd_mimo_config {
3200 struct mwl8k_cmd_pkt header;
3201 __le32 action;
3202 __u8 rx_antenna_map;
3203 __u8 tx_antenna_map;
ba2d3587 3204} __packed;
a66098da 3205
55489b6e 3206static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 3207{
55489b6e 3208 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB		 3209 int rc;
3210
3211 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3212 if (cmd == NULL)
3213 return -ENOMEM;
3214
55489b6e 3215 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 3216 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3217 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
3218 cmd->rx_antenna_map = rx;
3219 cmd->tx_antenna_map = tx;
a66098da
LB		 3220
3221 rc = mwl8k_post_cmd(hw, &cmd->header);
3222 kfree(cmd);
3223
3224 return rc;
3225}
3226
3227/*
b71ed2c6 3228 * CMD_USE_FIXED_RATE (STA version).
a66098da 3229 */
b71ed2c6
LB		 3230struct mwl8k_cmd_use_fixed_rate_sta {
3231 struct mwl8k_cmd_pkt header;
3232 __le32 action;
3233 __le32 allow_rate_drop;
3234 __le32 num_rates;
3235 struct {
3236 __le32 is_ht_rate;
3237 __le32 enable_retry;
3238 __le32 rate;
3239 __le32 retry_count;
3240 } rate_entry[8];
3241 __le32 rate_type;
3242 __le32 reserved1;
3243 __le32 reserved2;
ba2d3587 3244} __packed;
a66098da 3245
b71ed2c6
LB		 3246#define MWL8K_USE_AUTO_RATE 0x0002
3247#define MWL8K_UCAST_RATE 0
a66098da 3248
b71ed2c6 3249static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 3250{
b71ed2c6 3251 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB		 3252 int rc;
3253
3254 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3255 if (cmd == NULL)
3256 return -ENOMEM;
3257
3258 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3259 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB		 3260 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3261 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB		 3262
3263 rc = mwl8k_post_cmd(hw, &cmd->header);
3264 kfree(cmd);
3265
3266 return rc;
3267}
3268
088aab8b
LB		 3269/*
3270 * CMD_USE_FIXED_RATE (AP version).
3271 */
3272struct mwl8k_cmd_use_fixed_rate_ap {
3273 struct mwl8k_cmd_pkt header;
3274 __le32 action;
3275 __le32 allow_rate_drop;
3276 __le32 num_rates;
3277 struct mwl8k_rate_entry_ap {
3278 __le32 is_ht_rate;
3279 __le32 enable_retry;
3280 __le32 rate;
3281 __le32 retry_count;
3282 } rate_entry[4];
3283 u8 multicast_rate;
3284 u8 multicast_rate_type;
3285 u8 management_rate;
ba2d3587 3286} __packed;
088aab8b
LB		 3287
3288static int
3289mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
3290{
3291 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
3292 int rc;
3293
3294 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3295 if (cmd == NULL)
3296 return -ENOMEM;
3297
3298 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3299 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3300 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3301 cmd->multicast_rate = mcast;
3302 cmd->management_rate = mgmt;
3303
3304 rc = mwl8k_post_cmd(hw, &cmd->header);
3305 kfree(cmd);
3306
3307 return rc;
3308}
3309
55489b6e
LB		 3310/*
3311 * CMD_ENABLE_SNIFFER.
3312 */
3313struct mwl8k_cmd_enable_sniffer {
3314 struct mwl8k_cmd_pkt header;
3315 __le32 action;
ba2d3587 3316} __packed;
55489b6e
LB		 3317
3318static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3319{
3320 struct mwl8k_cmd_enable_sniffer *cmd;
3321 int rc;
3322
3323 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3324 if (cmd == NULL)
3325 return -ENOMEM;
3326
3327 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3328 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3329 cmd->action = cpu_to_le32(!!enable);
3330
3331 rc = mwl8k_post_cmd(hw, &cmd->header);
3332 kfree(cmd);
3333
3334 return rc;
3335}
3336
3337/*
3338 * CMD_SET_MAC_ADDR.
3339 */
3340struct mwl8k_cmd_set_mac_addr {
3341 struct mwl8k_cmd_pkt header;
3342 union {
3343 struct {
3344 __le16 mac_type;
3345 __u8 mac_addr[ETH_ALEN];
3346 } mbss;
3347 __u8 mac_addr[ETH_ALEN];
3348 };
ba2d3587 3349} __packed;
55489b6e 3350
ee0ddf18
LB		 3351#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3352#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3353#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3354#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3355
aa21d0f6
LB		 3356static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3357 struct ieee80211_vif *vif, u8 *mac)
55489b6e
LB		 3358{
3359 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3360 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
55489b6e 3361 struct mwl8k_cmd_set_mac_addr *cmd;
ee0ddf18 3362 int mac_type;
55489b6e
LB		 3363 int rc;
3364
ee0ddf18
LB		 3365 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3366 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3367 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3368 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3369 else
3370 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3371 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3372 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3373 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3374 else
3375 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3376 }
3377
55489b6e
LB		 3378 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3379 if (cmd == NULL)
3380 return -ENOMEM;
3381
3382 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3383 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3384 if (priv->ap_fw) {
ee0ddf18 3385 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB		 3386 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3387 } else {
3388 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3389 }
3390
aa21d0f6 3391 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB		 3392 kfree(cmd);
3393
3394 return rc;
3395}
3396
3397/*
3398 * CMD_SET_RATEADAPT_MODE.
3399 */
3400struct mwl8k_cmd_set_rate_adapt_mode {
3401 struct mwl8k_cmd_pkt header;
3402 __le16 action;
3403 __le16 mode;
ba2d3587 3404} __packed;
55489b6e
LB		 3405
3406static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3407{
3408 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3409 int rc;
3410
3411 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3412 if (cmd == NULL)
3413 return -ENOMEM;
3414
3415 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3416 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3417 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3418 cmd->mode = cpu_to_le16(mode);
3419
3420 rc = mwl8k_post_cmd(hw, &cmd->header);
3421 kfree(cmd);
3422
3423 return rc;
3424}
3425
3aefc37e
NS		 3426/*
3427 * CMD_GET_WATCHDOG_BITMAP.
3428 */
3429struct mwl8k_cmd_get_watchdog_bitmap {
3430 struct mwl8k_cmd_pkt header;
3431 u8 bitmap;
3432} __packed;
3433
3434static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
3435{
3436 struct mwl8k_cmd_get_watchdog_bitmap *cmd;
3437 int rc;
3438
3439 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3440 if (cmd == NULL)
3441 return -ENOMEM;
3442
3443 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
3444 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3445
3446 rc = mwl8k_post_cmd(hw, &cmd->header);
3447 if (!rc)
3448 *bitmap = cmd->bitmap;
3449
3450 kfree(cmd);
3451
3452 return rc;
3453}
3454
3455#define INVALID_BA 0xAA
3456static void mwl8k_watchdog_ba_events(struct work_struct *work)
3457{
3458 int rc;
3459 u8 bitmap = 0, stream_index;
3460 struct mwl8k_ampdu_stream *streams;
3461 struct mwl8k_priv *priv =
3462 container_of(work, struct mwl8k_priv, watchdog_ba_handle);
3463
3464 rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
3465 if (rc)
3466 return;
3467
3468 if (bitmap == INVALID_BA)
3469 return;
3470
3471 /* the bitmap is the hw queue number. Map it to the ampdu queue. */
3472 stream_index = bitmap - MWL8K_TX_WMM_QUEUES;
3473
3474 BUG_ON(stream_index >= priv->num_ampdu_queues);
3475
3476 streams = &priv->ampdu[stream_index];
3477
3478 if (streams->state == AMPDU_STREAM_ACTIVE)
3479 ieee80211_stop_tx_ba_session(streams->sta, streams->tid);
3480
3481 return;
3482}
3483
3484
b64fe619
LB		 3485/*
3486 * CMD_BSS_START.
3487 */
3488struct mwl8k_cmd_bss_start {
3489 struct mwl8k_cmd_pkt header;
3490 __le32 enable;
ba2d3587 3491} __packed;
b64fe619 3492
aa21d0f6
LB		 3493static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3494 struct ieee80211_vif *vif, int enable)
b64fe619
LB		 3495{
3496 struct mwl8k_cmd_bss_start *cmd;
3497 int rc;
3498
3499 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3500 if (cmd == NULL)
3501 return -ENOMEM;
3502
3503 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3504 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3505 cmd->enable = cpu_to_le32(enable);
3506
aa21d0f6 3507 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3508 kfree(cmd);
3509
3510 return rc;
3511}
3512
5faa1aff
NS		 3513/*
3514 * CMD_BASTREAM.
3515 */
3516
3517/*
3518 * UPSTREAM is tx direction
3519 */
3520#define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
3521#define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
3522
3523enum {
3524 MWL8K_BA_CREATE,
3525 MWL8K_BA_UPDATE,
3526 MWL8K_BA_DESTROY,
3527 MWL8K_BA_FLUSH,
3528 MWL8K_BA_CHECK,
3529} ba_stream_action_type;
3530
3531
3532struct mwl8k_create_ba_stream {
3533 __le32 flags;
3534 __le32 idle_thrs;
3535 __le32 bar_thrs;
3536 __le32 window_size;
3537 u8 peer_mac_addr[6];
3538 u8 dialog_token;
3539 u8 tid;
3540 u8 queue_id;
3541 u8 param_info;
3542 __le32 ba_context;
3543 u8 reset_seq_no_flag;
3544 __le16 curr_seq_no;
3545 u8 sta_src_mac_addr[6];
3546} __packed;
3547
3548struct mwl8k_destroy_ba_stream {
3549 __le32 flags;
3550 __le32 ba_context;
3551} __packed;
3552
3553struct mwl8k_cmd_bastream {
3554 struct mwl8k_cmd_pkt header;
3555 __le32 action;
3556 union {
3557 struct mwl8k_create_ba_stream create_params;
3558 struct mwl8k_destroy_ba_stream destroy_params;
3559 };
3560} __packed;
3561
3562static int
3563mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
3564{
3565 struct mwl8k_cmd_bastream *cmd;
3566 int rc;
3567
3568 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3569 if (cmd == NULL)
3570 return -ENOMEM;
3571
3572 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3573 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3574
3575 cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
3576
3577 cmd->create_params.queue_id = stream->idx;
3578 memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
3579 ETH_ALEN);
3580 cmd->create_params.tid = stream->tid;
3581
3582 cmd->create_params.flags =
3583 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
3584 cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
3585
3586 rc = mwl8k_post_cmd(hw, &cmd->header);
3587
3588 kfree(cmd);
3589
3590 return rc;
3591}
3592
3593static int
3594mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3595 u8 buf_size)
3596{
3597 struct mwl8k_cmd_bastream *cmd;
3598 int rc;
3599
3600 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3601 if (cmd == NULL)
3602 return -ENOMEM;
3603
3604
3605 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3606 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3607
3608 cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
3609
3610 cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
3611 cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
3612 cmd->create_params.queue_id = stream->idx;
3613
3614 memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
3615 cmd->create_params.tid = stream->tid;
3616 cmd->create_params.curr_seq_no = cpu_to_le16(0);
3617 cmd->create_params.reset_seq_no_flag = 1;
3618
3619 cmd->create_params.param_info =
3620 (stream->sta->ht_cap.ampdu_factor &
3621 IEEE80211_HT_AMPDU_PARM_FACTOR) |
3622 ((stream->sta->ht_cap.ampdu_density << 2) &
3623 IEEE80211_HT_AMPDU_PARM_DENSITY);
3624
3625 cmd->create_params.flags =
3626 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
3627 BASTREAM_FLAG_DIRECTION_UPSTREAM);
3628
3629 rc = mwl8k_post_cmd(hw, &cmd->header);
3630
3631 wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
3632 stream->sta->addr, stream->tid);
3633 kfree(cmd);
3634
3635 return rc;
3636}
3637
3638static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3639 struct mwl8k_ampdu_stream *stream)
3640{
3641 struct mwl8k_cmd_bastream *cmd;
3642
3643 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3644 if (cmd == NULL)
3645 return;
3646
3647 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3648 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3649 cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
3650
3651 cmd->destroy_params.ba_context = cpu_to_le32(stream->idx);
3652 mwl8k_post_cmd(hw, &cmd->header);
3653
3654 wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx);
3655
3656 kfree(cmd);
3657}
3658
3f5610ff
LB		 3659/*
3660 * CMD_SET_NEW_STN.
3661 */
3662struct mwl8k_cmd_set_new_stn {
3663 struct mwl8k_cmd_pkt header;
3664 __le16 aid;
3665 __u8 mac_addr[6];
3666 __le16 stn_id;
3667 __le16 action;
3668 __le16 rsvd;
3669 __le32 legacy_rates;
3670 __u8 ht_rates[4];
3671 __le16 cap_info;
3672 __le16 ht_capabilities_info;
3673 __u8 mac_ht_param_info;
3674 __u8 rev;
3675 __u8 control_channel;
3676 __u8 add_channel;
3677 __le16 op_mode;
3678 __le16 stbc;
3679 __u8 add_qos_info;
3680 __u8 is_qos_sta;
3681 __le32 fw_sta_ptr;
ba2d3587 3682} __packed;
3f5610ff
LB		 3683
3684#define MWL8K_STA_ACTION_ADD 0
3685#define MWL8K_STA_ACTION_REMOVE 2
3686
3687static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3688 struct ieee80211_vif *vif,
3689 struct ieee80211_sta *sta)
3690{
3691 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3692 u32 rates;
3f5610ff
LB		 3693 int rc;
3694
3695 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3696 if (cmd == NULL)
3697 return -ENOMEM;
3698
3699 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3700 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3701 cmd->aid = cpu_to_le16(sta->aid);
3702 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3703 cmd->stn_id = cpu_to_le16(sta->aid);
3704 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB		 3705 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3706 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3707 else
3708 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3709 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB		 3710 if (sta->ht_cap.ht_supported) {
3711 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3712 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3713 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3714 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3715 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3716 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3717 ((sta->ht_cap.ampdu_density & 7) << 2);
3718 cmd->is_qos_sta = 1;
3719 }
3720
aa21d0f6 3721 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3722 kfree(cmd);
3723
3724 return rc;
3725}
3726
b64fe619
LB		 3727static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3728 struct ieee80211_vif *vif)
3729{
3730 struct mwl8k_cmd_set_new_stn *cmd;
3731 int rc;
3732
3733 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3734 if (cmd == NULL)
3735 return -ENOMEM;
3736
3737 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3738 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3739 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3740
aa21d0f6 3741 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3742 kfree(cmd);
3743
3744 return rc;
3745}
3746
3f5610ff
LB		 3747static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3748 struct ieee80211_vif *vif, u8 *addr)
3749{
3750 struct mwl8k_cmd_set_new_stn *cmd;
3751 int rc;
3752
3753 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3754 if (cmd == NULL)
3755 return -ENOMEM;
3756
3757 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3758 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3759 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3760 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3761
aa21d0f6 3762 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3763 kfree(cmd);
3764
3765 return rc;
3766}
3767
fcdc403c
NS		 3768/*
3769 * CMD_UPDATE_ENCRYPTION.
3770 */
3771
3772#define MAX_ENCR_KEY_LENGTH 16
3773#define MIC_KEY_LENGTH 8
3774
3775struct mwl8k_cmd_update_encryption {
3776 struct mwl8k_cmd_pkt header;
3777
3778 __le32 action;
3779 __le32 reserved;
3780 __u8 mac_addr[6];
3781 __u8 encr_type;
3782
3783} __attribute__((packed));
3784
3785struct mwl8k_cmd_set_key {
3786 struct mwl8k_cmd_pkt header;
3787
3788 __le32 action;
3789 __le32 reserved;
3790 __le16 length;
3791 __le16 key_type_id;
3792 __le32 key_info;
3793 __le32 key_id;
3794 __le16 key_len;
3795 __u8 key_material[MAX_ENCR_KEY_LENGTH];
3796 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
3797 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
3798 __le16 tkip_rsc_low;
3799 __le32 tkip_rsc_high;
3800 __le16 tkip_tsc_low;
3801 __le32 tkip_tsc_high;
3802 __u8 mac_addr[6];
3803} __attribute__((packed));
3804
3805enum {
3806 MWL8K_ENCR_ENABLE,
3807 MWL8K_ENCR_SET_KEY,
3808 MWL8K_ENCR_REMOVE_KEY,
3809 MWL8K_ENCR_SET_GROUP_KEY,
3810};
3811
3812#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
3813#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
3814#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
3815#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
3816#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
3817
3818enum {
3819 MWL8K_ALG_WEP,
3820 MWL8K_ALG_TKIP,
3821 MWL8K_ALG_CCMP,
3822};
3823
3824#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
3825#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
3826#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
3827#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
3828#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
3829
3830static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
3831 struct ieee80211_vif *vif,
3832 u8 *addr,
3833 u8 encr_type)
3834{
3835 struct mwl8k_cmd_update_encryption *cmd;
3836 int rc;
3837
3838 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3839 if (cmd == NULL)
3840 return -ENOMEM;
3841
3842 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3843 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3844 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
3845 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3846 cmd->encr_type = encr_type;
3847
3848 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3849 kfree(cmd);
3850
3851 return rc;
3852}
3853
3854static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
3855 u8 *addr,
3856 struct ieee80211_key_conf *key)
3857{
3858 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3859 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3860 cmd->length = cpu_to_le16(sizeof(*cmd) -
3861 offsetof(struct mwl8k_cmd_set_key, length));
3862 cmd->key_id = cpu_to_le32(key->keyidx);
3863 cmd->key_len = cpu_to_le16(key->keylen);
3864 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3865
3866 switch (key->cipher) {
3867 case WLAN_CIPHER_SUITE_WEP40:
3868 case WLAN_CIPHER_SUITE_WEP104:
3869 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
3870 if (key->keyidx == 0)
3871 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
3872
3873 break;
3874 case WLAN_CIPHER_SUITE_TKIP:
3875 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
3876 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3877 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3878 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3879 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
3880 | MWL8K_KEY_FLAG_TSC_VALID);
3881 break;
3882 case WLAN_CIPHER_SUITE_CCMP:
3883 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
3884 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3885 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3886 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3887 break;
3888 default:
3889 return -ENOTSUPP;
3890 }
3891
3892 return 0;
3893}
3894
3895static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
3896 struct ieee80211_vif *vif,
3897 u8 *addr,
3898 struct ieee80211_key_conf *key)
3899{
3900 struct mwl8k_cmd_set_key *cmd;
3901 int rc;
3902 int keymlen;
3903 u32 action;
3904 u8 idx;
3905 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3906
3907 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3908 if (cmd == NULL)
3909 return -ENOMEM;
3910
3911 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
3912 if (rc < 0)
3913 goto done;
3914
3915 idx = key->keyidx;
3916
3917 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3918 action = MWL8K_ENCR_SET_KEY;
3919 else
3920 action = MWL8K_ENCR_SET_GROUP_KEY;
3921
3922 switch (key->cipher) {
3923 case WLAN_CIPHER_SUITE_WEP40:
3924 case WLAN_CIPHER_SUITE_WEP104:
3925 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
3926 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
3927 sizeof(*key) + key->keylen);
3928 mwl8k_vif->wep_key_conf[idx].enabled = 1;
3929 }
3930
3931 keymlen = 0;
3932 action = MWL8K_ENCR_SET_KEY;
3933 break;
3934 case WLAN_CIPHER_SUITE_TKIP:
3935 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
3936 break;
3937 case WLAN_CIPHER_SUITE_CCMP:
3938 keymlen = key->keylen;
3939 break;
3940 default:
3941 rc = -ENOTSUPP;
3942 goto done;
3943 }
3944
3945 memcpy(cmd->key_material, key->key, keymlen);
3946 cmd->action = cpu_to_le32(action);
3947
3948 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3949done:
3950 kfree(cmd);
3951
3952 return rc;
3953}
3954
3955static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
3956 struct ieee80211_vif *vif,
3957 u8 *addr,
3958 struct ieee80211_key_conf *key)
3959{
3960 struct mwl8k_cmd_set_key *cmd;
3961 int rc;
3962 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3963
3964 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3965 if (cmd == NULL)
3966 return -ENOMEM;
3967
3968 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
3969 if (rc < 0)
3970 goto done;
3971
3972 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3973 WLAN_CIPHER_SUITE_WEP104)
3974 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
3975
3976 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
3977
3978 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3979done:
3980 kfree(cmd);
3981
3982 return rc;
3983}
3984
3985static int mwl8k_set_key(struct ieee80211_hw *hw,
3986 enum set_key_cmd cmd_param,
3987 struct ieee80211_vif *vif,
3988 struct ieee80211_sta *sta,
3989 struct ieee80211_key_conf *key)
3990{
3991 int rc = 0;
3992 u8 encr_type;
3993 u8 *addr;
3994 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3995
3996 if (vif->type == NL80211_IFTYPE_STATION)
3997 return -EOPNOTSUPP;
3998
3999 if (sta == NULL)
4000 addr = hw->wiphy->perm_addr;
4001 else
4002 addr = sta->addr;
4003
4004 if (cmd_param == SET_KEY) {
4005 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
4006 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
4007 if (rc)
4008 goto out;
4009
4010 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
4011 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
4012 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
4013 else
4014 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
4015
4016 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
4017 encr_type);
4018 if (rc)
4019 goto out;
4020
4021 mwl8k_vif->is_hw_crypto_enabled = true;
4022
4023 } else {
4024 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
4025
4026 if (rc)
4027 goto out;
4028
4029 mwl8k_vif->is_hw_crypto_enabled = false;
4030
4031 }
4032out:
4033 return rc;
4034}
4035
55489b6e
LB		 4036/*
4037 * CMD_UPDATE_STADB.
4038 */
25d81b1e
LB		 4039struct ewc_ht_info {
4040 __le16 control1;
4041 __le16 control2;
4042 __le16 control3;
ba2d3587 4043} __packed;
25d81b1e
LB		 4044
4045struct peer_capability_info {
4046 /* Peer type - AP vs. STA. */
4047 __u8 peer_type;
4048
4049 /* Basic 802.11 capabilities from assoc resp. */
4050 __le16 basic_caps;
4051
4052 /* Set if peer supports 802.11n high throughput (HT). */
4053 __u8 ht_support;
4054
4055 /* Valid if HT is supported. */
4056 __le16 ht_caps;
4057 __u8 extended_ht_caps;
4058 struct ewc_ht_info ewc_info;
4059
4060 /* Legacy rate table. Intersection of our rates and peer rates. */
4061 __u8 legacy_rates[12];
4062
4063 /* HT rate table. Intersection of our rates and peer rates. */
4064 __u8 ht_rates[16];
4065 __u8 pad[16];
4066
4067 /* If set, interoperability mode, no proprietary extensions. */
4068 __u8 interop;
4069 __u8 pad2;
4070 __u8 station_id;
4071 __le16 amsdu_enabled;
ba2d3587 4072} __packed;
25d81b1e 4073
55489b6e
LB		 4074struct mwl8k_cmd_update_stadb {
4075 struct mwl8k_cmd_pkt header;
4076
4077 /* See STADB_ACTION_TYPE */
4078 __le32 action;
4079
4080 /* Peer MAC address */
4081 __u8 peer_addr[ETH_ALEN];
4082
4083 __le32 reserved;
4084
4085 /* Peer info - valid during add/update. */
4086 struct peer_capability_info peer_info;
ba2d3587 4087} __packed;
55489b6e 4088
a680400e
LB		 4089#define MWL8K_STA_DB_MODIFY_ENTRY 1
4090#define MWL8K_STA_DB_DEL_ENTRY 2
4091
4092/* Peer Entry flags - used to define the type of the peer node */
4093#define MWL8K_PEER_TYPE_ACCESSPOINT 2
4094
4095static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 4096 struct ieee80211_vif *vif,
13935e2c 4097 struct ieee80211_sta *sta)
55489b6e 4098{
55489b6e 4099 struct mwl8k_cmd_update_stadb *cmd;
a680400e 4100 struct peer_capability_info *p;
8707d026 4101 u32 rates;
55489b6e
LB		 4102 int rc;
4103
4104 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4105 if (cmd == NULL)
4106 return -ENOMEM;
4107
4108 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4109 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 4110 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 4111 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 4112
a680400e
LB		 4113 p = &cmd->peer_info;
4114 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
4115 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 4116 p->ht_support = sta->ht_cap.ht_supported;
b603742f 4117 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB		 4118 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
4119 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB		 4120 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4121 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
4122 else
4123 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4124 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 4125 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB		 4126 p->interop = 1;
4127 p->amsdu_enabled = 0;
4128
4129 rc = mwl8k_post_cmd(hw, &cmd->header);
4130 kfree(cmd);
4131
4132 return rc ? rc : p->station_id;
4133}
4134
4135static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
4136 struct ieee80211_vif *vif, u8 *addr)
4137{
4138 struct mwl8k_cmd_update_stadb *cmd;
4139 int rc;
4140
4141 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4142 if (cmd == NULL)
4143 return -ENOMEM;
4144
4145 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4146 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4147 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 4148 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 4149
a680400e 4150 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB		 4151 kfree(cmd);
4152
4153 return rc;
4154}
4155
a66098da
LB		 4156
4157/*
4158 * Interrupt handling.
4159 */
4160static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
4161{
4162 struct ieee80211_hw *hw = dev_id;
4163 struct mwl8k_priv *priv = hw->priv;
4164 u32 status;
4165
4166 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB		 4167 if (!status)
4168 return IRQ_NONE;
4169
1e9f9de3
LB		 4170 if (status & MWL8K_A2H_INT_TX_DONE) {
4171 status &= ~MWL8K_A2H_INT_TX_DONE;
4172 tasklet_schedule(&priv->poll_tx_task);
4173 }
4174
a66098da 4175 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB		 4176 status &= ~MWL8K_A2H_INT_RX_READY;
4177 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB		 4178 }
4179
3aefc37e
NS		 4180 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4181 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4182 ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
4183 }
4184
67e2eb27
LB		 4185 if (status)
4186 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4187
a66098da 4188 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 4189 if (priv->hostcmd_wait != NULL)
a66098da 4190 complete(priv->hostcmd_wait);
a66098da
LB		 4191 }
4192
4193 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 4194 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 4195 priv->radio_on && priv->pending_tx_pkts)
618952a7 4196 mwl8k_tx_start(priv);
a66098da
LB		 4197 }
4198
4199 return IRQ_HANDLED;
4200}
4201
1e9f9de3
LB		 4202static void mwl8k_tx_poll(unsigned long data)
4203{
4204 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4205 struct mwl8k_priv *priv = hw->priv;
4206 int limit;
4207 int i;
4208
4209 limit = 32;
4210
4211 spin_lock_bh(&priv->tx_lock);
4212
e600707b 4213 for (i = 0; i < mwl8k_tx_queues(priv); i++)
1e9f9de3
LB		 4214 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
4215
4216 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
4217 complete(priv->tx_wait);
4218 priv->tx_wait = NULL;
4219 }
4220
4221 spin_unlock_bh(&priv->tx_lock);
4222
4223 if (limit) {
4224 writel(~MWL8K_A2H_INT_TX_DONE,
4225 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4226 } else {
4227 tasklet_schedule(&priv->poll_tx_task);
4228 }
4229}
4230
67e2eb27
LB		 4231static void mwl8k_rx_poll(unsigned long data)
4232{
4233 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4234 struct mwl8k_priv *priv = hw->priv;
4235 int limit;
4236
4237 limit = 32;
4238 limit -= rxq_process(hw, 0, limit);
4239 limit -= rxq_refill(hw, 0, limit);
4240
4241 if (limit) {
4242 writel(~MWL8K_A2H_INT_RX_READY,
4243 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4244 } else {
4245 tasklet_schedule(&priv->poll_rx_task);
4246 }
4247}
4248
a66098da
LB		 4249
4250/*
4251 * Core driver operations.
4252 */
7bb45683 4253static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
a66098da
LB		 4254{
4255 struct mwl8k_priv *priv = hw->priv;
4256 int index = skb_get_queue_mapping(skb);
a66098da 4257
9189c100 4258 if (!priv->radio_on) {
c96c31e4
JP		 4259 wiphy_debug(hw->wiphy,
4260 "dropped TX frame since radio disabled\n");
a66098da 4261 dev_kfree_skb(skb);
7bb45683 4262 return;
a66098da
LB		 4263 }
4264
7bb45683 4265 mwl8k_txq_xmit(hw, index, skb);
a66098da
LB		 4266}
4267
a66098da
LB		 4268static int mwl8k_start(struct ieee80211_hw *hw)
4269{
a66098da
LB		 4270 struct mwl8k_priv *priv = hw->priv;
4271 int rc;
4272
a0607fd3 4273 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 4274 IRQF_SHARED, MWL8K_NAME, hw);
4275 if (rc) {
bf3ca7f7 4276 priv->irq = -1;
5db55844 4277 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 4278 return -EIO;
a66098da 4279 }
bf3ca7f7 4280 priv->irq = priv->pdev->irq;
a66098da 4281
67e2eb27 4282 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 4283 tasklet_enable(&priv->poll_tx_task);
67e2eb27 4284 tasklet_enable(&priv->poll_rx_task);
2ec610cb 4285
a66098da 4286 /* Enable interrupts */
c23b5a69 4287 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da 4288
2ec610cb
LB		 4289 rc = mwl8k_fw_lock(hw);
4290 if (!rc) {
55489b6e 4291 rc = mwl8k_cmd_radio_enable(hw);
a66098da 4292
5e4cf166
LB		 4293 if (!priv->ap_fw) {
4294 if (!rc)
55489b6e 4295 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 4296
5e4cf166
LB		 4297 if (!rc)
4298 rc = mwl8k_cmd_set_pre_scan(hw);
4299
4300 if (!rc)
4301 rc = mwl8k_cmd_set_post_scan(hw,
4302 "\x00\x00\x00\x00\x00\x00");
4303 }
2ec610cb
LB		 4304
4305 if (!rc)
55489b6e 4306 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 4307
2ec610cb 4308 if (!rc)
55489b6e 4309 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 4310
2ec610cb
LB		 4311 mwl8k_fw_unlock(hw);
4312 }
4313
4314 if (rc) {
4315 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4316 free_irq(priv->pdev->irq, hw);
bf3ca7f7 4317 priv->irq = -1;
1e9f9de3 4318 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4319 tasklet_disable(&priv->poll_rx_task);
2ec610cb 4320 }
a66098da
LB		 4321
4322 return rc;
4323}
4324
a66098da
LB		 4325static void mwl8k_stop(struct ieee80211_hw *hw)
4326{
a66098da
LB		 4327 struct mwl8k_priv *priv = hw->priv;
4328 int i;
4329
55489b6e 4330 mwl8k_cmd_radio_disable(hw);
a66098da
LB		 4331
4332 ieee80211_stop_queues(hw);
4333
a66098da 4334 /* Disable interrupts */
a66098da 4335 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
bf3ca7f7
BC		 4336 if (priv->irq != -1) {
4337 free_irq(priv->pdev->irq, hw);
4338 priv->irq = -1;
4339 }
a66098da
LB		 4340
4341 /* Stop finalize join worker */
4342 cancel_work_sync(&priv->finalize_join_worker);
3aefc37e 4343 cancel_work_sync(&priv->watchdog_ba_handle);
a66098da
LB		 4344 if (priv->beacon_skb != NULL)
4345 dev_kfree_skb(priv->beacon_skb);
4346
67e2eb27 4347 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 4348 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4349 tasklet_disable(&priv->poll_rx_task);
a66098da 4350
a66098da 4351 /* Return all skbs to mac80211 */
e600707b 4352 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 4353 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB		 4354}
4355
0863ade8
BC		 4356static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
4357
a66098da 4358static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 4359 struct ieee80211_vif *vif)
a66098da
LB		 4360{
4361 struct mwl8k_priv *priv = hw->priv;
4362 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 4363 u32 macids_supported;
0863ade8
BC		 4364 int macid, rc;
4365 struct mwl8k_device_info *di;
a66098da 4366
a43c49a8
LB		 4367 /*
4368 * Reject interface creation if sniffer mode is active, as
4369 * STA operation is mutually exclusive with hardware sniffer
b64fe619 4370 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB		 4371 */
4372 if (priv->sniffer_enabled) {
c96c31e4
JP		 4373 wiphy_info(hw->wiphy,
4374 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB		 4375 return -EINVAL;
4376 }
4377
0863ade8 4378 di = priv->device_info;
ee0ddf18
LB		 4379 switch (vif->type) {
4380 case NL80211_IFTYPE_AP:
0863ade8
BC		 4381 if (!priv->ap_fw && di->fw_image_ap) {
4382 /* we must load the ap fw to meet this request */
4383 if (!list_empty(&priv->vif_list))
4384 return -EBUSY;
4385 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4386 if (rc)
4387 return rc;
4388 }
ee0ddf18
LB		 4389 macids_supported = priv->ap_macids_supported;
4390 break;
4391 case NL80211_IFTYPE_STATION:
0863ade8
BC		 4392 if (priv->ap_fw && di->fw_image_sta) {
4393 /* we must load the sta fw to meet this request */
4394 if (!list_empty(&priv->vif_list))
4395 return -EBUSY;
4396 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4397 if (rc)
4398 return rc;
4399 }
ee0ddf18
LB		 4400 macids_supported = priv->sta_macids_supported;
4401 break;
4402 default:
4403 return -EINVAL;
4404 }
4405
4406 macid = ffs(macids_supported & ~priv->macids_used);
4407 if (!macid--)
4408 return -EBUSY;
4409
f5bb87cf 4410 /* Setup driver private area. */
1ed32e4f 4411 mwl8k_vif = MWL8K_VIF(vif);
a66098da 4412 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 4413 mwl8k_vif->vif = vif;
ee0ddf18 4414 mwl8k_vif->macid = macid;
a66098da 4415 mwl8k_vif->seqno = 0;
d9a07d49
NS		 4416 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
4417 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 4418
aa21d0f6
LB		 4419 /* Set the mac address. */
4420 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
4421
4422 if (priv->ap_fw)
4423 mwl8k_cmd_set_new_stn_add_self(hw, vif);
4424
ee0ddf18 4425 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 4426 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB		 4427
4428 return 0;
4429}
4430
4431static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 4432 struct ieee80211_vif *vif)
a66098da
LB		 4433{
4434 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 4435 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 4436
b64fe619
LB		 4437 if (priv->ap_fw)
4438 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
4439
aa21d0f6 4440 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
32060e1b 4441
ee0ddf18 4442 priv->macids_used &= ~(1 << mwl8k_vif->macid);
f5bb87cf 4443 list_del(&mwl8k_vif->list);
a66098da
LB		 4444}
4445
ee03a932 4446static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 4447{
a66098da
LB		 4448 struct ieee80211_conf *conf = &hw->conf;
4449 struct mwl8k_priv *priv = hw->priv;
ee03a932 4450 int rc;
a66098da 4451
7595d67a 4452 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 4453 mwl8k_cmd_radio_disable(hw);
ee03a932 4454 return 0;
7595d67a
LB		 4455 }
4456
ee03a932
LB		 4457 rc = mwl8k_fw_lock(hw);
4458 if (rc)
4459 return rc;
a66098da 4460
55489b6e 4461 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB		 4462 if (rc)
4463 goto out;
a66098da 4464
610677d2 4465 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB		 4466 if (rc)
4467 goto out;
4468
a66098da
LB		 4469 if (conf->power_level > 18)
4470 conf->power_level = 18;
a66098da 4471
08b06347 4472 if (priv->ap_fw) {
03217087
NS		 4473
4474 if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
4475 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
4476 if (rc)
4477 goto out;
4478 }
41fdf097 4479
da62b761
NS		 4480 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
4481 if (rc)
4482 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
4483 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
4484 if (rc)
4485 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
4486
08b06347 4487 } else {
41fdf097
NS		 4488 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
4489 if (rc)
4490 goto out;
08b06347
LB		 4491 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
4492 }
a66098da 4493
ee03a932
LB		 4494out:
4495 mwl8k_fw_unlock(hw);
a66098da 4496
ee03a932 4497 return rc;
a66098da
LB		 4498}
4499
b64fe619
LB		 4500static void
4501mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4502 struct ieee80211_bss_conf *info, u32 changed)
a66098da 4503{
a66098da 4504 struct mwl8k_priv *priv = hw->priv;
c3cbbe8a 4505 u32 ap_legacy_rates;
13935e2c 4506 u8 ap_mcs_rates[16];
3a980d0a
LB		 4507 int rc;
4508
c3cbbe8a 4509 if (mwl8k_fw_lock(hw))
3a980d0a 4510 return;
a66098da 4511
c3cbbe8a
LB		 4512 /*
4513 * No need to capture a beacon if we're no longer associated.
4514 */
4515 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
4516 priv->capture_beacon = false;
3a980d0a 4517
c3cbbe8a 4518 /*
13935e2c 4519 * Get the AP's legacy and MCS rates.
c3cbbe8a 4520 */
7dc6a7a7 4521 if (vif->bss_conf.assoc) {
c6e96010 4522 struct ieee80211_sta *ap;
c97470dd 4523
c6e96010 4524 rcu_read_lock();
c6e96010 4525
c3cbbe8a
LB		 4526 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4527 if (ap == NULL) {
4528 rcu_read_unlock();
c6e96010 4529 goto out;
c3cbbe8a
LB		 4530 }
4531
8707d026
LB		 4532 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4533 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4534 } else {
4535 ap_legacy_rates =
4536 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4537 }
13935e2c 4538 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB		 4539
4540 rcu_read_unlock();
4541 }
c6e96010 4542
c3cbbe8a 4543 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4544 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB		 4545 if (rc)
4546 goto out;
a66098da 4547
b71ed2c6 4548 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB		 4549 if (rc)
4550 goto out;
c3cbbe8a 4551 }
a66098da 4552
c3cbbe8a 4553 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB		 4554 rc = mwl8k_set_radio_preamble(hw,
4555 vif->bss_conf.use_short_preamble);
3a980d0a
LB		 4556 if (rc)
4557 goto out;
c3cbbe8a 4558 }
a66098da 4559
c3cbbe8a 4560 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4561 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB		 4562 if (rc)
4563 goto out;
c3cbbe8a 4564 }
a66098da 4565
c97470dd
LB		 4566 if (vif->bss_conf.assoc &&
4567 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4568 BSS_CHANGED_HT))) {
c3cbbe8a 4569 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB		 4570 if (rc)
4571 goto out;
c3cbbe8a 4572 }
a66098da 4573
c3cbbe8a
LB		 4574 if (vif->bss_conf.assoc &&
4575 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB		 4576 /*
4577 * Finalize the join. Tell rx handler to process
4578 * next beacon from our BSSID.
4579 */
0a11dfc3 4580 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4581 priv->capture_beacon = true;
a66098da
LB		 4582 }
4583
3a980d0a
LB		 4584out:
4585 mwl8k_fw_unlock(hw);
a66098da
LB		 4586}
4587
b64fe619
LB		 4588static void
4589mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4590 struct ieee80211_bss_conf *info, u32 changed)
4591{
4592 int rc;
4593
4594 if (mwl8k_fw_lock(hw))
4595 return;
4596
4597 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4598 rc = mwl8k_set_radio_preamble(hw,
4599 vif->bss_conf.use_short_preamble);
4600 if (rc)
4601 goto out;
4602 }
4603
4604 if (changed & BSS_CHANGED_BASIC_RATES) {
4605 int idx;
4606 int rate;
4607
4608 /*
4609 * Use lowest supported basic rate for multicasts
4610 * and management frames (such as probe responses --
4611 * beacons will always go out at 1 Mb/s).
4612 */
4613 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB		 4614 if (idx)
4615 idx--;
4616
4617 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4618 rate = mwl8k_rates_24[idx].hw_value;
4619 else
4620 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB		 4621
4622 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4623 }
4624
4625 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4626 struct sk_buff *skb;
4627
4628 skb = ieee80211_beacon_get(hw, vif);
4629 if (skb != NULL) {
aa21d0f6 4630 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB		 4631 kfree_skb(skb);
4632 }
4633 }
4634
4635 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4636 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB		 4637
4638out:
4639 mwl8k_fw_unlock(hw);
4640}
4641
4642static void
4643mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4644 struct ieee80211_bss_conf *info, u32 changed)
4645{
4646 struct mwl8k_priv *priv = hw->priv;
4647
4648 if (!priv->ap_fw)
4649 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4650 else
4651 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4652}
4653
e81cd2d6 4654static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4655 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB		 4656{
4657 struct mwl8k_cmd_pkt *cmd;
4658
447ced07
LB		 4659 /*
4660 * Synthesize and return a command packet that programs the
4661 * hardware multicast address filter. At this point we don't
4662 * know whether FIF_ALLMULTI is being requested, but if it is,
4663 * we'll end up throwing this packet away and creating a new
4664 * one in mwl8k_configure_filter().
4665 */
22bedad3 4666 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB		 4667
4668 return (unsigned long)cmd;
4669}
4670
a43c49a8
LB		 4671static int
4672mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4673 unsigned int changed_flags,
4674 unsigned int *total_flags)
4675{
4676 struct mwl8k_priv *priv = hw->priv;
4677
4678 /*
4679 * Hardware sniffer mode is mutually exclusive with STA
4680 * operation, so refuse to enable sniffer mode if a STA
4681 * interface is active.
4682 */
f5bb87cf 4683 if (!list_empty(&priv->vif_list)) {
a43c49a8 4684 if (net_ratelimit())
c96c31e4
JP		 4685 wiphy_info(hw->wiphy,
4686 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB		 4687 return 0;
4688 }
4689
4690 if (!priv->sniffer_enabled) {
55489b6e 4691 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB		 4692 return 0;
4693 priv->sniffer_enabled = true;
4694 }
4695
4696 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4697 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4698 FIF_OTHER_BSS;
4699
4700 return 1;
4701}
4702
f5bb87cf
LB		 4703static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4704{
4705 if (!list_empty(&priv->vif_list))
4706 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4707
4708 return NULL;
4709}
4710
e6935ea1
LB		 4711static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4712 unsigned int changed_flags,
4713 unsigned int *total_flags,
4714 u64 multicast)
4715{
4716 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB		 4717 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4718
c0adae2c
LB		 4719 /*
4720 * AP firmware doesn't allow fine-grained control over
4721 * the receive filter.
4722 */
4723 if (priv->ap_fw) {
4724 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4725 kfree(cmd);
4726 return;
4727 }
4728
a43c49a8
LB		 4729 /*
4730 * Enable hardware sniffer mode if FIF_CONTROL or
4731 * FIF_OTHER_BSS is requested.
4732 */
4733 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
4734 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
4735 kfree(cmd);
4736 return;
4737 }
a66098da 4738
e6935ea1 4739 /* Clear unsupported feature flags */
447ced07 4740 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 4741
90852f7a
LB		 4742 if (mwl8k_fw_lock(hw)) {
4743 kfree(cmd);
e6935ea1 4744 return;
90852f7a 4745 }
a66098da 4746
a43c49a8 4747 if (priv->sniffer_enabled) {
55489b6e 4748 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB		 4749 priv->sniffer_enabled = false;
4750 }
4751
e6935ea1 4752 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB		 4753 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
4754 /*
4755 * Disable the BSS filter.
4756 */
e6935ea1 4757 mwl8k_cmd_set_pre_scan(hw);
77165d88 4758 } else {
f5bb87cf 4759 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 4760 const u8 *bssid;
a94cc97e 4761
77165d88
LB		 4762 /*
4763 * Enable the BSS filter.
4764 *
4765 * If there is an active STA interface, use that
4766 * interface's BSSID, otherwise use a dummy one
4767 * (where the OUI part needs to be nonzero for
4768 * the BSSID to be accepted by POST_SCAN).
4769 */
f5bb87cf
LB		 4770 mwl8k_vif = mwl8k_first_vif(priv);
4771 if (mwl8k_vif != NULL)
4772 bssid = mwl8k_vif->vif->bss_conf.bssid;
4773 else
4774 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 4775
e6935ea1 4776 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 4777 }
4778 }
4779
447ced07
LB		 4780 /*
4781 * If FIF_ALLMULTI is being requested, throw away the command
4782 * packet that ->prepare_multicast() built and replace it with
4783 * a command packet that enables reception of all multicast
4784 * packets.
4785 */
4786 if (*total_flags & FIF_ALLMULTI) {
4787 kfree(cmd);
22bedad3 4788 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB		 4789 }
4790
4791 if (cmd != NULL) {
4792 mwl8k_post_cmd(hw, cmd);
4793 kfree(cmd);
e6935ea1 4794 }
a66098da 4795
e6935ea1 4796 mwl8k_fw_unlock(hw);
a66098da
LB		 4797}
4798
a66098da
LB		 4799static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
4800{
c2c2b12a 4801 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB		 4802}
4803
4a6967b8
JB		 4804static int mwl8k_sta_remove(struct ieee80211_hw *hw,
4805 struct ieee80211_vif *vif,
4806 struct ieee80211_sta *sta)
3f5610ff
LB		 4807{
4808 struct mwl8k_priv *priv = hw->priv;
4809
4a6967b8
JB		 4810 if (priv->ap_fw)
4811 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
4812 else
4813 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB		 4814}
4815
4a6967b8
JB		 4816static int mwl8k_sta_add(struct ieee80211_hw *hw,
4817 struct ieee80211_vif *vif,
4818 struct ieee80211_sta *sta)
bbfd9128
LB		 4819{
4820 struct mwl8k_priv *priv = hw->priv;
4a6967b8 4821 int ret;
fcdc403c
NS		 4822 int i;
4823 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4824 struct ieee80211_key_conf *key;
bbfd9128 4825
4a6967b8
JB		 4826 if (!priv->ap_fw) {
4827 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
4828 if (ret >= 0) {
4829 MWL8K_STA(sta)->peer_id = ret;
17033543
NS		 4830 if (sta->ht_cap.ht_supported)
4831 MWL8K_STA(sta)->is_ampdu_allowed = true;
fcdc403c 4832 ret = 0;
4a6967b8 4833 }
bbfd9128 4834
d9a07d49
NS		 4835 } else {
4836 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 4837 }
4a6967b8 4838
d9a07d49
NS		 4839 for (i = 0; i < NUM_WEP_KEYS; i++) {
4840 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
4841 if (mwl8k_vif->wep_key_conf[i].enabled)
4842 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
4843 }
fcdc403c 4844 return ret;
bbfd9128
LB		 4845}
4846
a66098da
LB		 4847static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
4848 const struct ieee80211_tx_queue_params *params)
4849{
3e4f542c 4850 struct mwl8k_priv *priv = hw->priv;
a66098da 4851 int rc;
a66098da 4852
3e4f542c
LB		 4853 rc = mwl8k_fw_lock(hw);
4854 if (!rc) {
e600707b 4855 BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
0863ade8
BC		 4856 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
4857
3e4f542c 4858 if (!priv->wmm_enabled)
55489b6e 4859 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 4860
85c9205c 4861 if (!rc) {
e600707b 4862 int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
85c9205c 4863 rc = mwl8k_cmd_set_edca_params(hw, q,
55489b6e
LB		 4864 params->cw_min,
4865 params->cw_max,
4866 params->aifs,
4867 params->txop);
85c9205c 4868 }
3e4f542c
LB		 4869
4870 mwl8k_fw_unlock(hw);
a66098da 4871 }
3e4f542c 4872
a66098da
LB		 4873 return rc;
4874}
4875
a66098da
LB		 4876static int mwl8k_get_stats(struct ieee80211_hw *hw,
4877 struct ieee80211_low_level_stats *stats)
4878{
55489b6e 4879 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB		 4880}
4881
0d462bbb
JL		 4882static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
4883 struct survey_info *survey)
4884{
4885 struct mwl8k_priv *priv = hw->priv;
4886 struct ieee80211_conf *conf = &hw->conf;
4887
4888 if (idx != 0)
4889 return -ENOENT;
4890
4891 survey->channel = conf->channel;
4892 survey->filled = SURVEY_INFO_NOISE_DBM;
4893 survey->noise = priv->noise;
4894
4895 return 0;
4896}
4897
65f3ddcd
NS		 4898#define MAX_AMPDU_ATTEMPTS 5
4899
a2292d83
LB		 4900static int
4901mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4902 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB		 4903 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
4904 u8 buf_size)
a2292d83 4905{
65f3ddcd
NS		 4906
4907 int i, rc = 0;
4908 struct mwl8k_priv *priv = hw->priv;
4909 struct mwl8k_ampdu_stream *stream;
4910 u8 *addr = sta->addr;
4911
4912 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
4913 return -ENOTSUPP;
4914
4915 spin_lock(&priv->stream_lock);
4916 stream = mwl8k_lookup_stream(hw, addr, tid);
4917
a2292d83
LB		 4918 switch (action) {
4919 case IEEE80211_AMPDU_RX_START:
4920 case IEEE80211_AMPDU_RX_STOP:
65f3ddcd
NS		 4921 break;
4922 case IEEE80211_AMPDU_TX_START:
4923 /* By the time we get here the hw queues may contain outgoing
4924 * packets for this RA/TID that are not part of this BA
4925 * session. The hw will assign sequence numbers to these
4926 * packets as they go out. So if we query the hw for its next
4927 * sequence number and use that for the SSN here, it may end up
4928 * being wrong, which will lead to sequence number mismatch at
4929 * the recipient. To avoid this, we reset the sequence number
4930 * to O for the first MPDU in this BA stream.
4931 */
4932 *ssn = 0;
4933 if (stream == NULL) {
4934 /* This means that somebody outside this driver called
4935 * ieee80211_start_tx_ba_session. This is unexpected
4936 * because we do our own rate control. Just warn and
4937 * move on.
4938 */
4939 wiphy_warn(hw->wiphy, "Unexpected call to %s. "
4940 "Proceeding anyway.\n", __func__);
4941 stream = mwl8k_add_stream(hw, sta, tid);
4942 }
4943 if (stream == NULL) {
4944 wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
4945 rc = -EBUSY;
4946 break;
4947 }
4948 stream->state = AMPDU_STREAM_IN_PROGRESS;
4949
4950 /* Release the lock before we do the time consuming stuff */
4951 spin_unlock(&priv->stream_lock);
4952 for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
4953 rc = mwl8k_check_ba(hw, stream);
4954
4955 if (!rc)
4956 break;
4957 /*
4958 * HW queues take time to be flushed, give them
4959 * sufficient time
4960 */
4961
4962 msleep(1000);
4963 }
4964 spin_lock(&priv->stream_lock);
4965 if (rc) {
4966 wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
4967 " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
4968 mwl8k_remove_stream(hw, stream);
4969 rc = -EBUSY;
4970 break;
4971 }
4972 ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
4973 break;
4974 case IEEE80211_AMPDU_TX_STOP:
4975 if (stream == NULL)
4976 break;
4977 if (stream->state == AMPDU_STREAM_ACTIVE) {
4978 spin_unlock(&priv->stream_lock);
4979 mwl8k_destroy_ba(hw, stream);
4980 spin_lock(&priv->stream_lock);
4981 }
4982 mwl8k_remove_stream(hw, stream);
4983 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
4984 break;
4985 case IEEE80211_AMPDU_TX_OPERATIONAL:
4986 BUG_ON(stream == NULL);
4987 BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
4988 spin_unlock(&priv->stream_lock);
4989 rc = mwl8k_create_ba(hw, stream, buf_size);
4990 spin_lock(&priv->stream_lock);
4991 if (!rc)
4992 stream->state = AMPDU_STREAM_ACTIVE;
4993 else {
4994 spin_unlock(&priv->stream_lock);
4995 mwl8k_destroy_ba(hw, stream);
4996 spin_lock(&priv->stream_lock);
4997 wiphy_debug(hw->wiphy,
4998 "Failed adding stream for sta %pM tid %d\n",
4999 addr, tid);
5000 mwl8k_remove_stream(hw, stream);
5001 }
5002 break;
5003
a2292d83 5004 default:
65f3ddcd 5005 rc = -ENOTSUPP;
a2292d83 5006 }
65f3ddcd
NS		 5007
5008 spin_unlock(&priv->stream_lock);
5009 return rc;
a2292d83
LB		 5010}
5011
a66098da
LB		 5012static const struct ieee80211_ops mwl8k_ops = {
5013 .tx = mwl8k_tx,
5014 .start = mwl8k_start,
5015 .stop = mwl8k_stop,
5016 .add_interface = mwl8k_add_interface,
5017 .remove_interface = mwl8k_remove_interface,
5018 .config = mwl8k_config,
a66098da 5019 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 5020 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 5021 .configure_filter = mwl8k_configure_filter,
fcdc403c 5022 .set_key = mwl8k_set_key,
a66098da 5023 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB		 5024 .sta_add = mwl8k_sta_add,
5025 .sta_remove = mwl8k_sta_remove,
a66098da 5026 .conf_tx = mwl8k_conf_tx,
a66098da 5027 .get_stats = mwl8k_get_stats,
0d462bbb 5028 .get_survey = mwl8k_get_survey,
a2292d83 5029 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB		 5030};
5031
a66098da
LB		 5032static void mwl8k_finalize_join_worker(struct work_struct *work)
5033{
5034 struct mwl8k_priv *priv =
5035 container_of(work, struct mwl8k_priv, finalize_join_worker);
5036 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB		 5037 struct ieee80211_mgmt *mgmt = (void *)skb->data;
5038 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
5039 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
5040 mgmt->u.beacon.variable, len);
5041 int dtim_period = 1;
5042
5043 if (tim && tim[1] >= 2)
5044 dtim_period = tim[3];
a66098da 5045
56007a02 5046 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 5047
f5bb87cf 5048 dev_kfree_skb(skb);
a66098da
LB		 5049 priv->beacon_skb = NULL;
5050}
5051
bcb628d5 5052enum {
9e1b17ea
LB		 5053 MWL8363 = 0,
5054 MWL8687,
bcb628d5 5055 MWL8366,
6f6d1e9a
LB		 5056};
5057
8a7a578c 5058#define MWL8K_8366_AP_FW_API 2
952a0e96
BC		 5059#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
5060#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
5061
bcb628d5 5062static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
9e1b17ea
LB		 5063 [MWL8363] = {
5064 .part_name = "88w8363",
5065 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 5066 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 5067 },
49eb691c 5068 [MWL8687] = {
bcb628d5
JL		 5069 .part_name = "88w8687",
5070 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 5071 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 5072 },
49eb691c 5073 [MWL8366] = {
bcb628d5
JL		 5074 .part_name = "88w8366",
5075 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 5076 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC		 5077 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
5078 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 5079 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 5080 },
45a390dd
LB		 5081};
5082
c92d4ede
LB		 5083MODULE_FIRMWARE("mwl8k/helper_8363.fw");
5084MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
5085MODULE_FIRMWARE("mwl8k/helper_8687.fw");
5086MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
5087MODULE_FIRMWARE("mwl8k/helper_8366.fw");
5088MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 5089MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 5090
45a390dd 5091static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 5092 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB		 5093 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
5094 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL		 5095 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
5096 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
5097 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 5098 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 5099 { },
45a390dd
LB		 5100};
5101MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
5102
99020471
BC		 5103static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
5104{
5105 int rc;
5106 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
5107 "Trying alternative firmware %s\n", pci_name(priv->pdev),
5108 priv->fw_pref, priv->fw_alt);
5109 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
5110 if (rc) {
5111 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5112 pci_name(priv->pdev), priv->fw_alt);
5113 return rc;
5114 }
5115 return 0;
5116}
5117
5118static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
5119static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
5120{
5121 struct mwl8k_priv *priv = context;
5122 struct mwl8k_device_info *di = priv->device_info;
5123 int rc;
5124
5125 switch (priv->fw_state) {
5126 case FW_STATE_INIT:
5127 if (!fw) {
5128 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
5129 pci_name(priv->pdev), di->helper_image);
5130 goto fail;
5131 }
5132 priv->fw_helper = fw;
5133 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
5134 true);
5135 if (rc && priv->fw_alt) {
5136 rc = mwl8k_request_alt_fw(priv);
5137 if (rc)
5138 goto fail;
5139 priv->fw_state = FW_STATE_LOADING_ALT;
5140 } else if (rc)
5141 goto fail;
5142 else
5143 priv->fw_state = FW_STATE_LOADING_PREF;
5144 break;
5145
5146 case FW_STATE_LOADING_PREF:
5147 if (!fw) {
5148 if (priv->fw_alt) {
5149 rc = mwl8k_request_alt_fw(priv);
5150 if (rc)
5151 goto fail;
5152 priv->fw_state = FW_STATE_LOADING_ALT;
5153 } else
5154 goto fail;
5155 } else {
5156 priv->fw_ucode = fw;
5157 rc = mwl8k_firmware_load_success(priv);
5158 if (rc)
5159 goto fail;
5160 else
5161 complete(&priv->firmware_loading_complete);
5162 }
5163 break;
5164
5165 case FW_STATE_LOADING_ALT:
5166 if (!fw) {
5167 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5168 pci_name(priv->pdev), di->helper_image);
5169 goto fail;
5170 }
5171 priv->fw_ucode = fw;
5172 rc = mwl8k_firmware_load_success(priv);
5173 if (rc)
5174 goto fail;
5175 else
5176 complete(&priv->firmware_loading_complete);
5177 break;
5178
5179 default:
5180 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
5181 MWL8K_NAME, priv->fw_state);
5182 BUG_ON(1);
5183 }
5184
5185 return;
5186
5187fail:
5188 priv->fw_state = FW_STATE_ERROR;
5189 complete(&priv->firmware_loading_complete);
5190 device_release_driver(&priv->pdev->dev);
5191 mwl8k_release_firmware(priv);
5192}
5193
5194static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
5195 bool nowait)
a66098da 5196{
3cc7772c 5197 struct mwl8k_priv *priv = hw->priv;
a66098da 5198 int rc;
be695fc4
LB		 5199
5200 /* Reset firmware and hardware */
5201 mwl8k_hw_reset(priv);
5202
5203 /* Ask userland hotplug daemon for the device firmware */
99020471 5204 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 5205 if (rc) {
5db55844 5206 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 5207 return rc;
be695fc4
LB		 5208 }
5209
99020471
BC		 5210 if (nowait)
5211 return rc;
5212
be695fc4
LB		 5213 /* Load firmware into hardware */
5214 rc = mwl8k_load_firmware(hw);
3cc7772c 5215 if (rc)
5db55844 5216 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB		 5217
5218 /* Reclaim memory once firmware is successfully loaded */
5219 mwl8k_release_firmware(priv);
5220
3cc7772c
BC		 5221 return rc;
5222}
5223
73b46320
BC		 5224static int mwl8k_init_txqs(struct ieee80211_hw *hw)
5225{
5226 struct mwl8k_priv *priv = hw->priv;
5227 int rc = 0;
5228 int i;
5229
e600707b 5230 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
73b46320
BC		 5231 rc = mwl8k_txq_init(hw, i);
5232 if (rc)
5233 break;
5234 if (priv->ap_fw)
5235 iowrite32(priv->txq[i].txd_dma,
5236 priv->sram + priv->txq_offset[i]);
5237 }
5238 return rc;
5239}
5240
3cc7772c
BC		 5241/* initialize hw after successfully loading a firmware image */
5242static int mwl8k_probe_hw(struct ieee80211_hw *hw)
5243{
5244 struct mwl8k_priv *priv = hw->priv;
5245 int rc = 0;
5246 int i;
be695fc4 5247
91942230 5248 if (priv->ap_fw) {
89a91f4f 5249 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 5250 if (priv->rxd_ops == NULL) {
c96c31e4
JP		 5251 wiphy_err(hw->wiphy,
5252 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB		 5253 goto err_stop_firmware;
5254 }
5255 } else {
89a91f4f 5256 priv->rxd_ops = &rxd_sta_ops;
91942230 5257 }
be695fc4
LB		 5258
5259 priv->sniffer_enabled = false;
5260 priv->wmm_enabled = false;
5261 priv->pending_tx_pkts = 0;
5262
a66098da
LB		 5263 rc = mwl8k_rxq_init(hw, 0);
5264 if (rc)
3cc7772c 5265 goto err_stop_firmware;
a66098da
LB		 5266 rxq_refill(hw, 0, INT_MAX);
5267
73b46320
BC		 5268 /* For the sta firmware, we need to know the dma addresses of tx queues
5269 * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
5270 * prior to issuing this command. But for the AP case, we learn the
5271 * total number of queues from the result CMD_GET_HW_SPEC, so for this
5272 * case we must initialize the tx queues after.
5273 */
8a7a578c 5274 priv->num_ampdu_queues = 0;
73b46320
BC		 5275 if (!priv->ap_fw) {
5276 rc = mwl8k_init_txqs(hw);
a66098da
LB		 5277 if (rc)
5278 goto err_free_queues;
5279 }
5280
5281 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 5282 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3aefc37e
NS		 5283 iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
5284 MWL8K_A2H_INT_BA_WATCHDOG,
1e9f9de3 5285 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
a66098da
LB		 5286 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
5287
a0607fd3 5288 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 5289 IRQF_SHARED, MWL8K_NAME, hw);
5290 if (rc) {
5db55844 5291 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB		 5292 goto err_free_queues;
5293 }
5294
ac109fd0
BC		 5295 memset(priv->ampdu, 0, sizeof(priv->ampdu));
5296
a66098da
LB		 5297 /*
5298 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 5299 * commands use interrupts and avoid polling. Disable
a66098da
LB		 5300 * interrupts when done.
5301 */
c23b5a69 5302 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5303
5304 /* Get config data, mac addrs etc */
42fba21d
LB		 5305 if (priv->ap_fw) {
5306 rc = mwl8k_cmd_get_hw_spec_ap(hw);
73b46320
BC		 5307 if (!rc)
5308 rc = mwl8k_init_txqs(hw);
42fba21d
LB		 5309 if (!rc)
5310 rc = mwl8k_cmd_set_hw_spec(hw);
5311 } else {
5312 rc = mwl8k_cmd_get_hw_spec_sta(hw);
5313 }
a66098da 5314 if (rc) {
5db55844 5315 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 5316 goto err_free_irq;
a66098da
LB		 5317 }
5318
5319 /* Turn radio off */
55489b6e 5320 rc = mwl8k_cmd_radio_disable(hw);
a66098da 5321 if (rc) {
5db55844 5322 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 5323 goto err_free_irq;
a66098da
LB		 5324 }
5325
32060e1b 5326 /* Clear MAC address */
aa21d0f6 5327 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 5328 if (rc) {
5db55844 5329 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 5330 goto err_free_irq;
32060e1b
LB		 5331 }
5332
a66098da 5333 /* Disable interrupts */
a66098da 5334 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5335 free_irq(priv->pdev->irq, hw);
5336
c96c31e4
JP		 5337 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
5338 priv->device_info->part_name,
5339 priv->hw_rev, hw->wiphy->perm_addr,
5340 priv->ap_fw ? "AP" : "STA",
5341 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
5342 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB		 5343
5344 return 0;
5345
a66098da 5346err_free_irq:
a66098da 5347 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5348 free_irq(priv->pdev->irq, hw);
5349
5350err_free_queues:
e600707b 5351 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5352 mwl8k_txq_deinit(hw, i);
5353 mwl8k_rxq_deinit(hw, 0);
5354
3cc7772c
BC		 5355err_stop_firmware:
5356 mwl8k_hw_reset(priv);
5357
5358 return rc;
5359}
5360
5361/*
5362 * invoke mwl8k_reload_firmware to change the firmware image after the device
5363 * has already been registered
5364 */
5365static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
5366{
5367 int i, rc = 0;
5368 struct mwl8k_priv *priv = hw->priv;
5369
5370 mwl8k_stop(hw);
5371 mwl8k_rxq_deinit(hw, 0);
5372
e600707b 5373 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5374 mwl8k_txq_deinit(hw, i);
5375
99020471 5376 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC		 5377 if (rc)
5378 goto fail;
5379
5380 rc = mwl8k_probe_hw(hw);
5381 if (rc)
5382 goto fail;
5383
5384 rc = mwl8k_start(hw);
5385 if (rc)
5386 goto fail;
5387
5388 rc = mwl8k_config(hw, ~0);
5389 if (rc)
5390 goto fail;
5391
e600707b 5392 for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
3cc7772c
BC		 5393 rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
5394 if (rc)
5395 goto fail;
5396 }
5397
5398 return rc;
5399
5400fail:
5401 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
5402 return rc;
5403}
5404
5405static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5406{
5407 struct ieee80211_hw *hw = priv->hw;
5408 int i, rc;
5409
99020471
BC		 5410 rc = mwl8k_load_firmware(hw);
5411 mwl8k_release_firmware(priv);
5412 if (rc) {
5413 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5414 return rc;
5415 }
5416
3cc7772c
BC		 5417 /*
5418 * Extra headroom is the size of the required DMA header
5419 * minus the size of the smallest 802.11 frame (CTS frame).
5420 */
5421 hw->extra_tx_headroom =
5422 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
5423
5424 hw->channel_change_time = 10;
5425
e600707b 5426 hw->queues = MWL8K_TX_WMM_QUEUES;
3cc7772c
BC		 5427
5428 /* Set rssi values to dBm */
0bf22c37 5429 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
3cc7772c
BC		 5430 hw->vif_data_size = sizeof(struct mwl8k_vif);
5431 hw->sta_data_size = sizeof(struct mwl8k_sta);
5432
5433 priv->macids_used = 0;
5434 INIT_LIST_HEAD(&priv->vif_list);
5435
5436 /* Set default radio state and preamble */
5437 priv->radio_on = 0;
5438 priv->radio_short_preamble = 0;
5439
5440 /* Finalize join worker */
5441 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3aefc37e
NS		 5442 /* Handle watchdog ba events */
5443 INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
3cc7772c
BC		 5444
5445 /* TX reclaim and RX tasklets. */
5446 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
5447 tasklet_disable(&priv->poll_tx_task);
5448 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
5449 tasklet_disable(&priv->poll_rx_task);
5450
5451 /* Power management cookie */
5452 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
5453 if (priv->cookie == NULL)
5454 return -ENOMEM;
5455
5456 mutex_init(&priv->fw_mutex);
5457 priv->fw_mutex_owner = NULL;
5458 priv->fw_mutex_depth = 0;
5459 priv->hostcmd_wait = NULL;
5460
5461 spin_lock_init(&priv->tx_lock);
5462
ac109fd0
BC		 5463 spin_lock_init(&priv->stream_lock);
5464
3cc7772c
BC		 5465 priv->tx_wait = NULL;
5466
5467 rc = mwl8k_probe_hw(hw);
5468 if (rc)
5469 goto err_free_cookie;
5470
5471 hw->wiphy->interface_modes = 0;
5472 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
5473 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
5474 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
5475 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
5476
5477 rc = ieee80211_register_hw(hw);
5478 if (rc) {
5479 wiphy_err(hw->wiphy, "Cannot register device\n");
5480 goto err_unprobe_hw;
5481 }
5482
5483 return 0;
5484
5485err_unprobe_hw:
e600707b 5486 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5487 mwl8k_txq_deinit(hw, i);
5488 mwl8k_rxq_deinit(hw, 0);
5489
be695fc4 5490err_free_cookie:
a66098da
LB		 5491 if (priv->cookie != NULL)
5492 pci_free_consistent(priv->pdev, 4,
5493 priv->cookie, priv->cookie_dma);
5494
3cc7772c
BC		 5495 return rc;
5496}
5497static int __devinit mwl8k_probe(struct pci_dev *pdev,
5498 const struct pci_device_id *id)
5499{
5500 static int printed_version;
5501 struct ieee80211_hw *hw;
5502 struct mwl8k_priv *priv;
0863ade8 5503 struct mwl8k_device_info *di;
3cc7772c
BC		 5504 int rc;
5505
5506 if (!printed_version) {
5507 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
5508 printed_version = 1;
5509 }
5510
5511
5512 rc = pci_enable_device(pdev);
5513 if (rc) {
5514 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
5515 MWL8K_NAME);
5516 return rc;
5517 }
5518
5519 rc = pci_request_regions(pdev, MWL8K_NAME);
5520 if (rc) {
5521 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
5522 MWL8K_NAME);
5523 goto err_disable_device;
5524 }
5525
5526 pci_set_master(pdev);
5527
5528
5529 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
5530 if (hw == NULL) {
5531 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
5532 rc = -ENOMEM;
5533 goto err_free_reg;
5534 }
5535
5536 SET_IEEE80211_DEV(hw, &pdev->dev);
5537 pci_set_drvdata(pdev, hw);
5538
5539 priv = hw->priv;
5540 priv->hw = hw;
5541 priv->pdev = pdev;
5542 priv->device_info = &mwl8k_info_tbl[id->driver_data];
5543
5544
5545 priv->sram = pci_iomap(pdev, 0, 0x10000);
5546 if (priv->sram == NULL) {
5547 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
5548 goto err_iounmap;
5549 }
5550
5551 /*
5552 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
5553 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
5554 */
5555 priv->regs = pci_iomap(pdev, 1, 0x10000);
5556 if (priv->regs == NULL) {
5557 priv->regs = pci_iomap(pdev, 2, 0x10000);
5558 if (priv->regs == NULL) {
5559 wiphy_err(hw->wiphy, "Cannot map device registers\n");
5560 goto err_iounmap;
5561 }
5562 }
5563
0863ade8 5564 /*
99020471
BC		 5565 * Choose the initial fw image depending on user input. If a second
5566 * image is available, make it the alternative image that will be
5567 * loaded if the first one fails.
0863ade8 5568 */
99020471 5569 init_completion(&priv->firmware_loading_complete);
0863ade8 5570 di = priv->device_info;
99020471
BC		 5571 if (ap_mode_default && di->fw_image_ap) {
5572 priv->fw_pref = di->fw_image_ap;
5573 priv->fw_alt = di->fw_image_sta;
5574 } else if (!ap_mode_default && di->fw_image_sta) {
5575 priv->fw_pref = di->fw_image_sta;
5576 priv->fw_alt = di->fw_image_ap;
5577 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 5578 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 5579 priv->fw_pref = di->fw_image_sta;
0863ade8
BC		 5580 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
5581 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC		 5582 priv->fw_pref = di->fw_image_ap;
5583 }
5584 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC		 5585 if (rc)
5586 goto err_stop_firmware;
99020471 5587 return rc;
3cc7772c 5588
be695fc4
LB		 5589err_stop_firmware:
5590 mwl8k_hw_reset(priv);
be695fc4
LB		 5591
5592err_iounmap:
a66098da
LB		 5593 if (priv->regs != NULL)
5594 pci_iounmap(pdev, priv->regs);
5595
5b9482dd
LB		 5596 if (priv->sram != NULL)
5597 pci_iounmap(pdev, priv->sram);
5598
a66098da
LB		 5599 pci_set_drvdata(pdev, NULL);
5600 ieee80211_free_hw(hw);
5601
5602err_free_reg:
5603 pci_release_regions(pdev);
3db95e50
LB		 5604
5605err_disable_device:
a66098da
LB		 5606 pci_disable_device(pdev);
5607
5608 return rc;
5609}
5610
230f7af0 5611static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
a66098da
LB		 5612{
5613 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
5614}
5615
230f7af0 5616static void __devexit mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 5617{
5618 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
5619 struct mwl8k_priv *priv;
5620 int i;
5621
5622 if (hw == NULL)
5623 return;
5624 priv = hw->priv;
5625
99020471
BC		 5626 wait_for_completion(&priv->firmware_loading_complete);
5627
5628 if (priv->fw_state == FW_STATE_ERROR) {
5629 mwl8k_hw_reset(priv);
5630 goto unmap;
5631 }
5632
a66098da
LB		 5633 ieee80211_stop_queues(hw);
5634
60aa569f
LB		 5635 ieee80211_unregister_hw(hw);
5636
67e2eb27 5637 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 5638 tasklet_kill(&priv->poll_tx_task);
67e2eb27 5639 tasklet_kill(&priv->poll_rx_task);
a66098da 5640
a66098da
LB		 5641 /* Stop hardware */
5642 mwl8k_hw_reset(priv);
5643
5644 /* Return all skbs to mac80211 */
e600707b 5645 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 5646 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 5647
e600707b 5648 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5649 mwl8k_txq_deinit(hw, i);
5650
5651 mwl8k_rxq_deinit(hw, 0);
5652
c2c357ce 5653 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 5654
99020471 5655unmap:
a66098da 5656 pci_iounmap(pdev, priv->regs);
5b9482dd 5657 pci_iounmap(pdev, priv->sram);
a66098da
LB		 5658 pci_set_drvdata(pdev, NULL);
5659 ieee80211_free_hw(hw);
5660 pci_release_regions(pdev);
5661 pci_disable_device(pdev);
5662}
5663
5664static struct pci_driver mwl8k_driver = {
5665 .name = MWL8K_NAME,
45a390dd 5666 .id_table = mwl8k_pci_id_table,
a66098da
LB		 5667 .probe = mwl8k_probe,
5668 .remove = __devexit_p(mwl8k_remove),
5669 .shutdown = __devexit_p(mwl8k_shutdown),
5670};
5671
5672static int __init mwl8k_init(void)
5673{
5674 return pci_register_driver(&mwl8k_driver);
5675}
5676
5677static void __exit mwl8k_exit(void)
5678{
5679 pci_unregister_driver(&mwl8k_driver);
5680}
5681
5682module_init(mwl8k_init);
5683module_exit(mwl8k_exit);
c2c357ce
LB		 5684
5685MODULE_DESCRIPTION(MWL8K_DESC);
5686MODULE_VERSION(MWL8K_VERSION);
5687MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
5688MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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