Commit | Line | Data |
---|---|---|
a66098da | 1 | /* |
ce9e2e1b LB |
2 | * drivers/net/wireless/mwl8k.c |
3 | * Driver for Marvell TOPDOG 802.11 Wireless cards | |
a66098da | 4 | * |
a5fb297d | 5 | * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc. |
a66098da LB |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/kernel.h> | |
3d76e82c | 15 | #include <linux/sched.h> |
a66098da LB |
16 | #include <linux/spinlock.h> |
17 | #include <linux/list.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/completion.h> | |
21 | #include <linux/etherdevice.h> | |
22 | #include <net/mac80211.h> | |
23 | #include <linux/moduleparam.h> | |
24 | #include <linux/firmware.h> | |
25 | #include <linux/workqueue.h> | |
26 | ||
27 | #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" | |
28 | #define MWL8K_NAME KBUILD_MODNAME | |
a5fb297d | 29 | #define MWL8K_VERSION "0.12" |
a66098da | 30 | |
a66098da LB |
31 | /* Register definitions */ |
32 | #define MWL8K_HIU_GEN_PTR 0x00000c10 | |
ce9e2e1b LB |
33 | #define MWL8K_MODE_STA 0x0000005a |
34 | #define MWL8K_MODE_AP 0x000000a5 | |
a66098da | 35 | #define MWL8K_HIU_INT_CODE 0x00000c14 |
ce9e2e1b LB |
36 | #define MWL8K_FWSTA_READY 0xf0f1f2f4 |
37 | #define MWL8K_FWAP_READY 0xf1f2f4a5 | |
38 | #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005 | |
a66098da LB |
39 | #define MWL8K_HIU_SCRATCH 0x00000c40 |
40 | ||
41 | /* Host->device communications */ | |
42 | #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18 | |
43 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c | |
44 | #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20 | |
45 | #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24 | |
46 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 | |
ce9e2e1b LB |
47 | #define MWL8K_H2A_INT_DUMMY (1 << 20) |
48 | #define MWL8K_H2A_INT_RESET (1 << 15) | |
49 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) | |
50 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) | |
a66098da LB |
51 | |
52 | /* Device->host communications */ | |
53 | #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c | |
54 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30 | |
55 | #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34 | |
56 | #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38 | |
57 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c | |
ce9e2e1b LB |
58 | #define MWL8K_A2H_INT_DUMMY (1 << 20) |
59 | #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11) | |
60 | #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10) | |
61 | #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7) | |
62 | #define MWL8K_A2H_INT_RADIO_ON (1 << 6) | |
63 | #define MWL8K_A2H_INT_RADIO_OFF (1 << 5) | |
64 | #define MWL8K_A2H_INT_MAC_EVENT (1 << 3) | |
65 | #define MWL8K_A2H_INT_OPC_DONE (1 << 2) | |
66 | #define MWL8K_A2H_INT_RX_READY (1 << 1) | |
67 | #define MWL8K_A2H_INT_TX_DONE (1 << 0) | |
a66098da LB |
68 | |
69 | #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \ | |
70 | MWL8K_A2H_INT_CHNL_SWITCHED | \ | |
71 | MWL8K_A2H_INT_QUEUE_EMPTY | \ | |
72 | MWL8K_A2H_INT_RADAR_DETECT | \ | |
73 | MWL8K_A2H_INT_RADIO_ON | \ | |
74 | MWL8K_A2H_INT_RADIO_OFF | \ | |
75 | MWL8K_A2H_INT_MAC_EVENT | \ | |
76 | MWL8K_A2H_INT_OPC_DONE | \ | |
77 | MWL8K_A2H_INT_RX_READY | \ | |
78 | MWL8K_A2H_INT_TX_DONE) | |
79 | ||
a66098da LB |
80 | #define MWL8K_RX_QUEUES 1 |
81 | #define MWL8K_TX_QUEUES 4 | |
82 | ||
54bc3a0d LB |
83 | struct rxd_ops { |
84 | int rxd_size; | |
85 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); | |
86 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); | |
20f09c3d LB |
87 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status, |
88 | __le16 *qos); | |
54bc3a0d LB |
89 | }; |
90 | ||
45a390dd | 91 | struct mwl8k_device_info { |
a74b295e LB |
92 | char *part_name; |
93 | char *helper_image; | |
94 | char *fw_image; | |
89a91f4f | 95 | struct rxd_ops *ap_rxd_ops; |
45a390dd LB |
96 | }; |
97 | ||
a66098da | 98 | struct mwl8k_rx_queue { |
45eb400d | 99 | int rxd_count; |
a66098da LB |
100 | |
101 | /* hw receives here */ | |
45eb400d | 102 | int head; |
a66098da LB |
103 | |
104 | /* refill descs here */ | |
45eb400d | 105 | int tail; |
a66098da | 106 | |
54bc3a0d | 107 | void *rxd; |
45eb400d | 108 | dma_addr_t rxd_dma; |
788838eb LB |
109 | struct { |
110 | struct sk_buff *skb; | |
111 | DECLARE_PCI_UNMAP_ADDR(dma) | |
112 | } *buf; | |
a66098da LB |
113 | }; |
114 | ||
a66098da LB |
115 | struct mwl8k_tx_queue { |
116 | /* hw transmits here */ | |
45eb400d | 117 | int head; |
a66098da LB |
118 | |
119 | /* sw appends here */ | |
45eb400d | 120 | int tail; |
a66098da | 121 | |
45eb400d LB |
122 | struct ieee80211_tx_queue_stats stats; |
123 | struct mwl8k_tx_desc *txd; | |
124 | dma_addr_t txd_dma; | |
125 | struct sk_buff **skb; | |
a66098da LB |
126 | }; |
127 | ||
a66098da | 128 | struct mwl8k_priv { |
a66098da | 129 | struct ieee80211_hw *hw; |
a66098da | 130 | struct pci_dev *pdev; |
a66098da | 131 | |
45a390dd LB |
132 | struct mwl8k_device_info *device_info; |
133 | ||
be695fc4 LB |
134 | void __iomem *sram; |
135 | void __iomem *regs; | |
136 | ||
137 | /* firmware */ | |
22be40d9 LB |
138 | struct firmware *fw_helper; |
139 | struct firmware *fw_ucode; | |
a66098da | 140 | |
be695fc4 LB |
141 | /* hardware/firmware parameters */ |
142 | bool ap_fw; | |
143 | struct rxd_ops *rxd_ops; | |
777ad375 LB |
144 | struct ieee80211_supported_band band_24; |
145 | struct ieee80211_channel channels_24[14]; | |
146 | struct ieee80211_rate rates_24[14]; | |
4eae9edd LB |
147 | struct ieee80211_supported_band band_50; |
148 | struct ieee80211_channel channels_50[4]; | |
149 | struct ieee80211_rate rates_50[9]; | |
ee0ddf18 LB |
150 | u32 ap_macids_supported; |
151 | u32 sta_macids_supported; | |
be695fc4 | 152 | |
618952a7 LB |
153 | /* firmware access */ |
154 | struct mutex fw_mutex; | |
155 | struct task_struct *fw_mutex_owner; | |
156 | int fw_mutex_depth; | |
618952a7 LB |
157 | struct completion *hostcmd_wait; |
158 | ||
a66098da LB |
159 | /* lock held over TX and TX reap */ |
160 | spinlock_t tx_lock; | |
a66098da | 161 | |
88de754a LB |
162 | /* TX quiesce completion, protected by fw_mutex and tx_lock */ |
163 | struct completion *tx_wait; | |
164 | ||
f5bb87cf | 165 | /* List of interfaces. */ |
ee0ddf18 | 166 | u32 macids_used; |
f5bb87cf | 167 | struct list_head vif_list; |
a66098da | 168 | |
a66098da LB |
169 | /* power management status cookie from firmware */ |
170 | u32 *cookie; | |
171 | dma_addr_t cookie_dma; | |
172 | ||
173 | u16 num_mcaddrs; | |
a66098da | 174 | u8 hw_rev; |
2aa7b01f | 175 | u32 fw_rev; |
a66098da LB |
176 | |
177 | /* | |
178 | * Running count of TX packets in flight, to avoid | |
179 | * iterating over the transmit rings each time. | |
180 | */ | |
181 | int pending_tx_pkts; | |
182 | ||
183 | struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES]; | |
184 | struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES]; | |
185 | ||
c46563b7 | 186 | bool radio_on; |
68ce3884 | 187 | bool radio_short_preamble; |
a43c49a8 | 188 | bool sniffer_enabled; |
0439b1f5 | 189 | bool wmm_enabled; |
a66098da | 190 | |
bbfd9128 LB |
191 | struct work_struct sta_notify_worker; |
192 | spinlock_t sta_notify_list_lock; | |
193 | struct list_head sta_notify_list; | |
194 | ||
a66098da LB |
195 | /* XXX need to convert this to handle multiple interfaces */ |
196 | bool capture_beacon; | |
d89173f2 | 197 | u8 capture_bssid[ETH_ALEN]; |
a66098da LB |
198 | struct sk_buff *beacon_skb; |
199 | ||
200 | /* | |
201 | * This FJ worker has to be global as it is scheduled from the | |
202 | * RX handler. At this point we don't know which interface it | |
203 | * belongs to until the list of bssids waiting to complete join | |
204 | * is checked. | |
205 | */ | |
206 | struct work_struct finalize_join_worker; | |
207 | ||
1e9f9de3 LB |
208 | /* Tasklet to perform TX reclaim. */ |
209 | struct tasklet_struct poll_tx_task; | |
67e2eb27 LB |
210 | |
211 | /* Tasklet to perform RX. */ | |
212 | struct tasklet_struct poll_rx_task; | |
a66098da LB |
213 | }; |
214 | ||
215 | /* Per interface specific private data */ | |
216 | struct mwl8k_vif { | |
f5bb87cf LB |
217 | struct list_head list; |
218 | struct ieee80211_vif *vif; | |
219 | ||
f57ca9c1 LB |
220 | /* Firmware macid for this vif. */ |
221 | int macid; | |
222 | ||
c2c2b12a | 223 | /* Non AMPDU sequence number assigned by driver. */ |
a680400e | 224 | u16 seqno; |
a66098da | 225 | }; |
a94cc97e | 226 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) |
a66098da | 227 | |
a680400e LB |
228 | struct mwl8k_sta { |
229 | /* Index into station database. Returned by UPDATE_STADB. */ | |
230 | u8 peer_id; | |
231 | }; | |
232 | #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv)) | |
233 | ||
777ad375 | 234 | static const struct ieee80211_channel mwl8k_channels_24[] = { |
a66098da LB |
235 | { .center_freq = 2412, .hw_value = 1, }, |
236 | { .center_freq = 2417, .hw_value = 2, }, | |
237 | { .center_freq = 2422, .hw_value = 3, }, | |
238 | { .center_freq = 2427, .hw_value = 4, }, | |
239 | { .center_freq = 2432, .hw_value = 5, }, | |
240 | { .center_freq = 2437, .hw_value = 6, }, | |
241 | { .center_freq = 2442, .hw_value = 7, }, | |
242 | { .center_freq = 2447, .hw_value = 8, }, | |
243 | { .center_freq = 2452, .hw_value = 9, }, | |
244 | { .center_freq = 2457, .hw_value = 10, }, | |
245 | { .center_freq = 2462, .hw_value = 11, }, | |
647ca6b0 LB |
246 | { .center_freq = 2467, .hw_value = 12, }, |
247 | { .center_freq = 2472, .hw_value = 13, }, | |
248 | { .center_freq = 2484, .hw_value = 14, }, | |
a66098da LB |
249 | }; |
250 | ||
777ad375 | 251 | static const struct ieee80211_rate mwl8k_rates_24[] = { |
a66098da LB |
252 | { .bitrate = 10, .hw_value = 2, }, |
253 | { .bitrate = 20, .hw_value = 4, }, | |
254 | { .bitrate = 55, .hw_value = 11, }, | |
5dfd3e2c LB |
255 | { .bitrate = 110, .hw_value = 22, }, |
256 | { .bitrate = 220, .hw_value = 44, }, | |
a66098da LB |
257 | { .bitrate = 60, .hw_value = 12, }, |
258 | { .bitrate = 90, .hw_value = 18, }, | |
a66098da LB |
259 | { .bitrate = 120, .hw_value = 24, }, |
260 | { .bitrate = 180, .hw_value = 36, }, | |
261 | { .bitrate = 240, .hw_value = 48, }, | |
262 | { .bitrate = 360, .hw_value = 72, }, | |
263 | { .bitrate = 480, .hw_value = 96, }, | |
264 | { .bitrate = 540, .hw_value = 108, }, | |
140eb5e2 LB |
265 | { .bitrate = 720, .hw_value = 144, }, |
266 | }; | |
267 | ||
4eae9edd LB |
268 | static const struct ieee80211_channel mwl8k_channels_50[] = { |
269 | { .center_freq = 5180, .hw_value = 36, }, | |
270 | { .center_freq = 5200, .hw_value = 40, }, | |
271 | { .center_freq = 5220, .hw_value = 44, }, | |
272 | { .center_freq = 5240, .hw_value = 48, }, | |
273 | }; | |
274 | ||
275 | static const struct ieee80211_rate mwl8k_rates_50[] = { | |
276 | { .bitrate = 60, .hw_value = 12, }, | |
277 | { .bitrate = 90, .hw_value = 18, }, | |
278 | { .bitrate = 120, .hw_value = 24, }, | |
279 | { .bitrate = 180, .hw_value = 36, }, | |
280 | { .bitrate = 240, .hw_value = 48, }, | |
281 | { .bitrate = 360, .hw_value = 72, }, | |
282 | { .bitrate = 480, .hw_value = 96, }, | |
283 | { .bitrate = 540, .hw_value = 108, }, | |
284 | { .bitrate = 720, .hw_value = 144, }, | |
285 | }; | |
286 | ||
a66098da LB |
287 | /* Set or get info from Firmware */ |
288 | #define MWL8K_CMD_SET 0x0001 | |
289 | #define MWL8K_CMD_GET 0x0000 | |
290 | ||
291 | /* Firmware command codes */ | |
292 | #define MWL8K_CMD_CODE_DNLD 0x0001 | |
293 | #define MWL8K_CMD_GET_HW_SPEC 0x0003 | |
42fba21d | 294 | #define MWL8K_CMD_SET_HW_SPEC 0x0004 |
a66098da LB |
295 | #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010 |
296 | #define MWL8K_CMD_GET_STAT 0x0014 | |
ff45fc60 LB |
297 | #define MWL8K_CMD_RADIO_CONTROL 0x001c |
298 | #define MWL8K_CMD_RF_TX_POWER 0x001e | |
08b06347 | 299 | #define MWL8K_CMD_RF_ANTENNA 0x0020 |
aa21d0f6 | 300 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ |
a66098da LB |
301 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 |
302 | #define MWL8K_CMD_SET_POST_SCAN 0x0108 | |
ff45fc60 LB |
303 | #define MWL8K_CMD_SET_RF_CHANNEL 0x010a |
304 | #define MWL8K_CMD_SET_AID 0x010d | |
305 | #define MWL8K_CMD_SET_RATE 0x0110 | |
306 | #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111 | |
307 | #define MWL8K_CMD_RTS_THRESHOLD 0x0113 | |
a66098da | 308 | #define MWL8K_CMD_SET_SLOT 0x0114 |
ff45fc60 LB |
309 | #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115 |
310 | #define MWL8K_CMD_SET_WMM_MODE 0x0123 | |
a66098da | 311 | #define MWL8K_CMD_MIMO_CONFIG 0x0125 |
ff45fc60 | 312 | #define MWL8K_CMD_USE_FIXED_RATE 0x0126 |
a66098da | 313 | #define MWL8K_CMD_ENABLE_SNIFFER 0x0150 |
aa21d0f6 | 314 | #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */ |
a66098da | 315 | #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203 |
aa21d0f6 LB |
316 | #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */ |
317 | #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */ | |
ff45fc60 | 318 | #define MWL8K_CMD_UPDATE_STADB 0x1123 |
a66098da LB |
319 | |
320 | static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize) | |
321 | { | |
322 | #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\ | |
323 | snprintf(buf, bufsize, "%s", #x);\ | |
324 | return buf;\ | |
325 | } while (0) | |
ce9e2e1b | 326 | switch (cmd & ~0x8000) { |
a66098da LB |
327 | MWL8K_CMDNAME(CODE_DNLD); |
328 | MWL8K_CMDNAME(GET_HW_SPEC); | |
42fba21d | 329 | MWL8K_CMDNAME(SET_HW_SPEC); |
a66098da LB |
330 | MWL8K_CMDNAME(MAC_MULTICAST_ADR); |
331 | MWL8K_CMDNAME(GET_STAT); | |
332 | MWL8K_CMDNAME(RADIO_CONTROL); | |
333 | MWL8K_CMDNAME(RF_TX_POWER); | |
08b06347 | 334 | MWL8K_CMDNAME(RF_ANTENNA); |
b64fe619 | 335 | MWL8K_CMDNAME(SET_BEACON); |
a66098da LB |
336 | MWL8K_CMDNAME(SET_PRE_SCAN); |
337 | MWL8K_CMDNAME(SET_POST_SCAN); | |
338 | MWL8K_CMDNAME(SET_RF_CHANNEL); | |
ff45fc60 LB |
339 | MWL8K_CMDNAME(SET_AID); |
340 | MWL8K_CMDNAME(SET_RATE); | |
341 | MWL8K_CMDNAME(SET_FINALIZE_JOIN); | |
342 | MWL8K_CMDNAME(RTS_THRESHOLD); | |
a66098da | 343 | MWL8K_CMDNAME(SET_SLOT); |
ff45fc60 LB |
344 | MWL8K_CMDNAME(SET_EDCA_PARAMS); |
345 | MWL8K_CMDNAME(SET_WMM_MODE); | |
a66098da | 346 | MWL8K_CMDNAME(MIMO_CONFIG); |
ff45fc60 | 347 | MWL8K_CMDNAME(USE_FIXED_RATE); |
a66098da | 348 | MWL8K_CMDNAME(ENABLE_SNIFFER); |
32060e1b | 349 | MWL8K_CMDNAME(SET_MAC_ADDR); |
a66098da | 350 | MWL8K_CMDNAME(SET_RATEADAPT_MODE); |
b64fe619 | 351 | MWL8K_CMDNAME(BSS_START); |
3f5610ff | 352 | MWL8K_CMDNAME(SET_NEW_STN); |
ff45fc60 | 353 | MWL8K_CMDNAME(UPDATE_STADB); |
a66098da LB |
354 | default: |
355 | snprintf(buf, bufsize, "0x%x", cmd); | |
356 | } | |
357 | #undef MWL8K_CMDNAME | |
358 | ||
359 | return buf; | |
360 | } | |
361 | ||
362 | /* Hardware and firmware reset */ | |
363 | static void mwl8k_hw_reset(struct mwl8k_priv *priv) | |
364 | { | |
365 | iowrite32(MWL8K_H2A_INT_RESET, | |
366 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
367 | iowrite32(MWL8K_H2A_INT_RESET, | |
368 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
369 | msleep(20); | |
370 | } | |
371 | ||
372 | /* Release fw image */ | |
373 | static void mwl8k_release_fw(struct firmware **fw) | |
374 | { | |
375 | if (*fw == NULL) | |
376 | return; | |
377 | release_firmware(*fw); | |
378 | *fw = NULL; | |
379 | } | |
380 | ||
381 | static void mwl8k_release_firmware(struct mwl8k_priv *priv) | |
382 | { | |
22be40d9 LB |
383 | mwl8k_release_fw(&priv->fw_ucode); |
384 | mwl8k_release_fw(&priv->fw_helper); | |
a66098da LB |
385 | } |
386 | ||
387 | /* Request fw image */ | |
388 | static int mwl8k_request_fw(struct mwl8k_priv *priv, | |
c2c357ce | 389 | const char *fname, struct firmware **fw) |
a66098da LB |
390 | { |
391 | /* release current image */ | |
392 | if (*fw != NULL) | |
393 | mwl8k_release_fw(fw); | |
394 | ||
395 | return request_firmware((const struct firmware **)fw, | |
c2c357ce | 396 | fname, &priv->pdev->dev); |
a66098da LB |
397 | } |
398 | ||
45a390dd | 399 | static int mwl8k_request_firmware(struct mwl8k_priv *priv) |
a66098da | 400 | { |
a74b295e | 401 | struct mwl8k_device_info *di = priv->device_info; |
a66098da LB |
402 | int rc; |
403 | ||
a74b295e | 404 | if (di->helper_image != NULL) { |
22be40d9 | 405 | rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper); |
a74b295e LB |
406 | if (rc) { |
407 | printk(KERN_ERR "%s: Error requesting helper " | |
408 | "firmware file %s\n", pci_name(priv->pdev), | |
409 | di->helper_image); | |
410 | return rc; | |
411 | } | |
a66098da LB |
412 | } |
413 | ||
22be40d9 | 414 | rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode); |
a66098da | 415 | if (rc) { |
c2c357ce | 416 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", |
a74b295e | 417 | pci_name(priv->pdev), di->fw_image); |
22be40d9 | 418 | mwl8k_release_fw(&priv->fw_helper); |
a66098da LB |
419 | return rc; |
420 | } | |
421 | ||
422 | return 0; | |
423 | } | |
424 | ||
425 | struct mwl8k_cmd_pkt { | |
426 | __le16 code; | |
427 | __le16 length; | |
f57ca9c1 LB |
428 | __u8 seq_num; |
429 | __u8 macid; | |
a66098da LB |
430 | __le16 result; |
431 | char payload[0]; | |
432 | } __attribute__((packed)); | |
433 | ||
434 | /* | |
435 | * Firmware loading. | |
436 | */ | |
437 | static int | |
438 | mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length) | |
439 | { | |
440 | void __iomem *regs = priv->regs; | |
441 | dma_addr_t dma_addr; | |
a66098da LB |
442 | int loops; |
443 | ||
444 | dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE); | |
445 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
446 | return -ENOMEM; | |
447 | ||
448 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
449 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
450 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
451 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
452 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
453 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
454 | ||
a66098da LB |
455 | loops = 1000; |
456 | do { | |
457 | u32 int_code; | |
458 | ||
459 | int_code = ioread32(regs + MWL8K_HIU_INT_CODE); | |
460 | if (int_code == MWL8K_INT_CODE_CMD_FINISHED) { | |
461 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
a66098da LB |
462 | break; |
463 | } | |
464 | ||
3d76e82c | 465 | cond_resched(); |
a66098da LB |
466 | udelay(1); |
467 | } while (--loops); | |
468 | ||
469 | pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE); | |
470 | ||
d4b70570 | 471 | return loops ? 0 : -ETIMEDOUT; |
a66098da LB |
472 | } |
473 | ||
474 | static int mwl8k_load_fw_image(struct mwl8k_priv *priv, | |
475 | const u8 *data, size_t length) | |
476 | { | |
477 | struct mwl8k_cmd_pkt *cmd; | |
478 | int done; | |
479 | int rc = 0; | |
480 | ||
481 | cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL); | |
482 | if (cmd == NULL) | |
483 | return -ENOMEM; | |
484 | ||
485 | cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD); | |
486 | cmd->seq_num = 0; | |
f57ca9c1 | 487 | cmd->macid = 0; |
a66098da LB |
488 | cmd->result = 0; |
489 | ||
490 | done = 0; | |
491 | while (length) { | |
492 | int block_size = length > 256 ? 256 : length; | |
493 | ||
494 | memcpy(cmd->payload, data + done, block_size); | |
495 | cmd->length = cpu_to_le16(block_size); | |
496 | ||
497 | rc = mwl8k_send_fw_load_cmd(priv, cmd, | |
498 | sizeof(*cmd) + block_size); | |
499 | if (rc) | |
500 | break; | |
501 | ||
502 | done += block_size; | |
503 | length -= block_size; | |
504 | } | |
505 | ||
506 | if (!rc) { | |
507 | cmd->length = 0; | |
508 | rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd)); | |
509 | } | |
510 | ||
511 | kfree(cmd); | |
512 | ||
513 | return rc; | |
514 | } | |
515 | ||
516 | static int mwl8k_feed_fw_image(struct mwl8k_priv *priv, | |
517 | const u8 *data, size_t length) | |
518 | { | |
519 | unsigned char *buffer; | |
520 | int may_continue, rc = 0; | |
521 | u32 done, prev_block_size; | |
522 | ||
523 | buffer = kmalloc(1024, GFP_KERNEL); | |
524 | if (buffer == NULL) | |
525 | return -ENOMEM; | |
526 | ||
527 | done = 0; | |
528 | prev_block_size = 0; | |
529 | may_continue = 1000; | |
530 | while (may_continue > 0) { | |
531 | u32 block_size; | |
532 | ||
533 | block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH); | |
534 | if (block_size & 1) { | |
535 | block_size &= ~1; | |
536 | may_continue--; | |
537 | } else { | |
538 | done += prev_block_size; | |
539 | length -= prev_block_size; | |
540 | } | |
541 | ||
542 | if (block_size > 1024 || block_size > length) { | |
543 | rc = -EOVERFLOW; | |
544 | break; | |
545 | } | |
546 | ||
547 | if (length == 0) { | |
548 | rc = 0; | |
549 | break; | |
550 | } | |
551 | ||
552 | if (block_size == 0) { | |
553 | rc = -EPROTO; | |
554 | may_continue--; | |
555 | udelay(1); | |
556 | continue; | |
557 | } | |
558 | ||
559 | prev_block_size = block_size; | |
560 | memcpy(buffer, data + done, block_size); | |
561 | ||
562 | rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size); | |
563 | if (rc) | |
564 | break; | |
565 | } | |
566 | ||
567 | if (!rc && length != 0) | |
568 | rc = -EREMOTEIO; | |
569 | ||
570 | kfree(buffer); | |
571 | ||
572 | return rc; | |
573 | } | |
574 | ||
c2c357ce | 575 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) |
a66098da | 576 | { |
c2c357ce | 577 | struct mwl8k_priv *priv = hw->priv; |
22be40d9 | 578 | struct firmware *fw = priv->fw_ucode; |
c2c357ce LB |
579 | int rc; |
580 | int loops; | |
581 | ||
582 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) { | |
22be40d9 | 583 | struct firmware *helper = priv->fw_helper; |
a66098da | 584 | |
c2c357ce LB |
585 | if (helper == NULL) { |
586 | printk(KERN_ERR "%s: helper image needed but none " | |
587 | "given\n", pci_name(priv->pdev)); | |
588 | return -EINVAL; | |
589 | } | |
a66098da | 590 | |
c2c357ce | 591 | rc = mwl8k_load_fw_image(priv, helper->data, helper->size); |
a66098da LB |
592 | if (rc) { |
593 | printk(KERN_ERR "%s: unable to load firmware " | |
c2c357ce | 594 | "helper image\n", pci_name(priv->pdev)); |
a66098da LB |
595 | return rc; |
596 | } | |
89b872e2 | 597 | msleep(5); |
a66098da | 598 | |
c2c357ce | 599 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); |
a66098da | 600 | } else { |
c2c357ce | 601 | rc = mwl8k_load_fw_image(priv, fw->data, fw->size); |
a66098da LB |
602 | } |
603 | ||
604 | if (rc) { | |
c2c357ce LB |
605 | printk(KERN_ERR "%s: unable to load firmware image\n", |
606 | pci_name(priv->pdev)); | |
a66098da LB |
607 | return rc; |
608 | } | |
609 | ||
89a91f4f | 610 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); |
a66098da | 611 | |
89b872e2 | 612 | loops = 500000; |
a66098da | 613 | do { |
eae74e65 LB |
614 | u32 ready_code; |
615 | ||
616 | ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
617 | if (ready_code == MWL8K_FWAP_READY) { | |
618 | priv->ap_fw = 1; | |
619 | break; | |
620 | } else if (ready_code == MWL8K_FWSTA_READY) { | |
621 | priv->ap_fw = 0; | |
a66098da | 622 | break; |
eae74e65 LB |
623 | } |
624 | ||
625 | cond_resched(); | |
a66098da LB |
626 | udelay(1); |
627 | } while (--loops); | |
628 | ||
629 | return loops ? 0 : -ETIMEDOUT; | |
630 | } | |
631 | ||
632 | ||
a66098da LB |
633 | /* DMA header used by firmware and hardware. */ |
634 | struct mwl8k_dma_data { | |
635 | __le16 fwlen; | |
636 | struct ieee80211_hdr wh; | |
20f09c3d | 637 | char data[0]; |
a66098da LB |
638 | } __attribute__((packed)); |
639 | ||
640 | /* Routines to add/remove DMA header from skb. */ | |
20f09c3d | 641 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
a66098da | 642 | { |
20f09c3d LB |
643 | struct mwl8k_dma_data *tr; |
644 | int hdrlen; | |
645 | ||
646 | tr = (struct mwl8k_dma_data *)skb->data; | |
647 | hdrlen = ieee80211_hdrlen(tr->wh.frame_control); | |
648 | ||
649 | if (hdrlen != sizeof(tr->wh)) { | |
650 | if (ieee80211_is_data_qos(tr->wh.frame_control)) { | |
651 | memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2); | |
652 | *((__le16 *)(tr->data - 2)) = qos; | |
653 | } else { | |
654 | memmove(tr->data - hdrlen, &tr->wh, hdrlen); | |
655 | } | |
a66098da | 656 | } |
20f09c3d LB |
657 | |
658 | if (hdrlen != sizeof(*tr)) | |
659 | skb_pull(skb, sizeof(*tr) - hdrlen); | |
a66098da LB |
660 | } |
661 | ||
76266b2a | 662 | static inline void mwl8k_add_dma_header(struct sk_buff *skb) |
a66098da LB |
663 | { |
664 | struct ieee80211_hdr *wh; | |
ca009301 | 665 | int hdrlen; |
a66098da LB |
666 | struct mwl8k_dma_data *tr; |
667 | ||
ca009301 LB |
668 | /* |
669 | * Add a firmware DMA header; the firmware requires that we | |
670 | * present a 2-byte payload length followed by a 4-address | |
671 | * header (without QoS field), followed (optionally) by any | |
672 | * WEP/ExtIV header (but only filled in for CCMP). | |
673 | */ | |
a66098da | 674 | wh = (struct ieee80211_hdr *)skb->data; |
ca009301 | 675 | |
a66098da | 676 | hdrlen = ieee80211_hdrlen(wh->frame_control); |
ca009301 LB |
677 | if (hdrlen != sizeof(*tr)) |
678 | skb_push(skb, sizeof(*tr) - hdrlen); | |
a66098da | 679 | |
ca009301 LB |
680 | if (ieee80211_is_data_qos(wh->frame_control)) |
681 | hdrlen -= 2; | |
a66098da LB |
682 | |
683 | tr = (struct mwl8k_dma_data *)skb->data; | |
684 | if (wh != &tr->wh) | |
685 | memmove(&tr->wh, wh, hdrlen); | |
ca009301 LB |
686 | if (hdrlen != sizeof(tr->wh)) |
687 | memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen); | |
a66098da LB |
688 | |
689 | /* | |
690 | * Firmware length is the length of the fully formed "802.11 | |
691 | * payload". That is, everything except for the 802.11 header. | |
692 | * This includes all crypto material including the MIC. | |
693 | */ | |
ca009301 | 694 | tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr)); |
a66098da LB |
695 | } |
696 | ||
697 | ||
698 | /* | |
89a91f4f | 699 | * Packet reception for 88w8366 AP firmware. |
6f6d1e9a | 700 | */ |
89a91f4f | 701 | struct mwl8k_rxd_8366_ap { |
6f6d1e9a LB |
702 | __le16 pkt_len; |
703 | __u8 sq2; | |
704 | __u8 rate; | |
705 | __le32 pkt_phys_addr; | |
706 | __le32 next_rxd_phys_addr; | |
707 | __le16 qos_control; | |
708 | __le16 htsig2; | |
709 | __le32 hw_rssi_info; | |
710 | __le32 hw_noise_floor_info; | |
711 | __u8 noise_floor; | |
712 | __u8 pad0[3]; | |
713 | __u8 rssi; | |
714 | __u8 rx_status; | |
715 | __u8 channel; | |
716 | __u8 rx_ctrl; | |
717 | } __attribute__((packed)); | |
718 | ||
89a91f4f LB |
719 | #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80 |
720 | #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40 | |
721 | #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f) | |
8e9f33f0 | 722 | |
89a91f4f | 723 | #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80 |
6f6d1e9a | 724 | |
89a91f4f | 725 | static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr) |
6f6d1e9a | 726 | { |
89a91f4f | 727 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
728 | |
729 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 730 | rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST; |
6f6d1e9a LB |
731 | } |
732 | ||
89a91f4f | 733 | static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len) |
6f6d1e9a | 734 | { |
89a91f4f | 735 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
736 | |
737 | rxd->pkt_len = cpu_to_le16(len); | |
738 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
739 | wmb(); | |
740 | rxd->rx_ctrl = 0; | |
741 | } | |
742 | ||
743 | static int | |
89a91f4f LB |
744 | mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status, |
745 | __le16 *qos) | |
6f6d1e9a | 746 | { |
89a91f4f | 747 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a | 748 | |
89a91f4f | 749 | if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST)) |
6f6d1e9a LB |
750 | return -1; |
751 | rmb(); | |
752 | ||
753 | memset(status, 0, sizeof(*status)); | |
754 | ||
755 | status->signal = -rxd->rssi; | |
756 | status->noise = -rxd->noise_floor; | |
757 | ||
89a91f4f | 758 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) { |
6f6d1e9a | 759 | status->flag |= RX_FLAG_HT; |
89a91f4f | 760 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ) |
8e9f33f0 | 761 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 762 | status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate); |
6f6d1e9a LB |
763 | } else { |
764 | int i; | |
765 | ||
777ad375 LB |
766 | for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) { |
767 | if (mwl8k_rates_24[i].hw_value == rxd->rate) { | |
6f6d1e9a LB |
768 | status->rate_idx = i; |
769 | break; | |
770 | } | |
771 | } | |
772 | } | |
773 | ||
85478344 LB |
774 | if (rxd->channel > 14) { |
775 | status->band = IEEE80211_BAND_5GHZ; | |
776 | if (!(status->flag & RX_FLAG_HT)) | |
777 | status->rate_idx -= 5; | |
778 | } else { | |
779 | status->band = IEEE80211_BAND_2GHZ; | |
780 | } | |
6f6d1e9a LB |
781 | status->freq = ieee80211_channel_to_frequency(rxd->channel); |
782 | ||
20f09c3d LB |
783 | *qos = rxd->qos_control; |
784 | ||
6f6d1e9a LB |
785 | return le16_to_cpu(rxd->pkt_len); |
786 | } | |
787 | ||
89a91f4f LB |
788 | static struct rxd_ops rxd_8366_ap_ops = { |
789 | .rxd_size = sizeof(struct mwl8k_rxd_8366_ap), | |
790 | .rxd_init = mwl8k_rxd_8366_ap_init, | |
791 | .rxd_refill = mwl8k_rxd_8366_ap_refill, | |
792 | .rxd_process = mwl8k_rxd_8366_ap_process, | |
6f6d1e9a LB |
793 | }; |
794 | ||
795 | /* | |
89a91f4f | 796 | * Packet reception for STA firmware. |
a66098da | 797 | */ |
89a91f4f | 798 | struct mwl8k_rxd_sta { |
a66098da LB |
799 | __le16 pkt_len; |
800 | __u8 link_quality; | |
801 | __u8 noise_level; | |
802 | __le32 pkt_phys_addr; | |
45eb400d | 803 | __le32 next_rxd_phys_addr; |
a66098da LB |
804 | __le16 qos_control; |
805 | __le16 rate_info; | |
806 | __le32 pad0[4]; | |
807 | __u8 rssi; | |
808 | __u8 channel; | |
809 | __le16 pad1; | |
810 | __u8 rx_ctrl; | |
811 | __u8 rx_status; | |
812 | __u8 pad2[2]; | |
813 | } __attribute__((packed)); | |
814 | ||
89a91f4f LB |
815 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 |
816 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) | |
817 | #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f) | |
818 | #define MWL8K_STA_RATE_INFO_40MHZ 0x0004 | |
819 | #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002 | |
820 | #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001 | |
54bc3a0d | 821 | |
89a91f4f | 822 | #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02 |
54bc3a0d | 823 | |
89a91f4f | 824 | static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr) |
54bc3a0d | 825 | { |
89a91f4f | 826 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
827 | |
828 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 829 | rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST; |
54bc3a0d LB |
830 | } |
831 | ||
89a91f4f | 832 | static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len) |
54bc3a0d | 833 | { |
89a91f4f | 834 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
835 | |
836 | rxd->pkt_len = cpu_to_le16(len); | |
837 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
838 | wmb(); | |
839 | rxd->rx_ctrl = 0; | |
840 | } | |
841 | ||
842 | static int | |
89a91f4f | 843 | mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status, |
20f09c3d | 844 | __le16 *qos) |
54bc3a0d | 845 | { |
89a91f4f | 846 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
847 | u16 rate_info; |
848 | ||
89a91f4f | 849 | if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST)) |
54bc3a0d LB |
850 | return -1; |
851 | rmb(); | |
852 | ||
853 | rate_info = le16_to_cpu(rxd->rate_info); | |
854 | ||
855 | memset(status, 0, sizeof(*status)); | |
856 | ||
857 | status->signal = -rxd->rssi; | |
858 | status->noise = -rxd->noise_level; | |
89a91f4f LB |
859 | status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info); |
860 | status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info); | |
54bc3a0d | 861 | |
89a91f4f | 862 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE) |
54bc3a0d | 863 | status->flag |= RX_FLAG_SHORTPRE; |
89a91f4f | 864 | if (rate_info & MWL8K_STA_RATE_INFO_40MHZ) |
54bc3a0d | 865 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 866 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI) |
54bc3a0d | 867 | status->flag |= RX_FLAG_SHORT_GI; |
89a91f4f | 868 | if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT) |
54bc3a0d LB |
869 | status->flag |= RX_FLAG_HT; |
870 | ||
85478344 LB |
871 | if (rxd->channel > 14) { |
872 | status->band = IEEE80211_BAND_5GHZ; | |
873 | if (!(status->flag & RX_FLAG_HT)) | |
874 | status->rate_idx -= 5; | |
875 | } else { | |
876 | status->band = IEEE80211_BAND_2GHZ; | |
877 | } | |
54bc3a0d LB |
878 | status->freq = ieee80211_channel_to_frequency(rxd->channel); |
879 | ||
20f09c3d LB |
880 | *qos = rxd->qos_control; |
881 | ||
54bc3a0d LB |
882 | return le16_to_cpu(rxd->pkt_len); |
883 | } | |
884 | ||
89a91f4f LB |
885 | static struct rxd_ops rxd_sta_ops = { |
886 | .rxd_size = sizeof(struct mwl8k_rxd_sta), | |
887 | .rxd_init = mwl8k_rxd_sta_init, | |
888 | .rxd_refill = mwl8k_rxd_sta_refill, | |
889 | .rxd_process = mwl8k_rxd_sta_process, | |
54bc3a0d LB |
890 | }; |
891 | ||
892 | ||
a66098da LB |
893 | #define MWL8K_RX_DESCS 256 |
894 | #define MWL8K_RX_MAXSZ 3800 | |
895 | ||
896 | static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index) | |
897 | { | |
898 | struct mwl8k_priv *priv = hw->priv; | |
899 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
900 | int size; | |
901 | int i; | |
902 | ||
45eb400d LB |
903 | rxq->rxd_count = 0; |
904 | rxq->head = 0; | |
905 | rxq->tail = 0; | |
a66098da | 906 | |
54bc3a0d | 907 | size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size; |
a66098da | 908 | |
45eb400d LB |
909 | rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma); |
910 | if (rxq->rxd == NULL) { | |
a66098da | 911 | printk(KERN_ERR "%s: failed to alloc RX descriptors\n", |
c2c357ce | 912 | wiphy_name(hw->wiphy)); |
a66098da LB |
913 | return -ENOMEM; |
914 | } | |
45eb400d | 915 | memset(rxq->rxd, 0, size); |
a66098da | 916 | |
788838eb LB |
917 | rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL); |
918 | if (rxq->buf == NULL) { | |
a66098da | 919 | printk(KERN_ERR "%s: failed to alloc RX skbuff list\n", |
c2c357ce | 920 | wiphy_name(hw->wiphy)); |
45eb400d | 921 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); |
a66098da LB |
922 | return -ENOMEM; |
923 | } | |
788838eb | 924 | memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf)); |
a66098da LB |
925 | |
926 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
54bc3a0d LB |
927 | int desc_size; |
928 | void *rxd; | |
a66098da | 929 | int nexti; |
54bc3a0d LB |
930 | dma_addr_t next_dma_addr; |
931 | ||
932 | desc_size = priv->rxd_ops->rxd_size; | |
933 | rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size); | |
a66098da | 934 | |
54bc3a0d LB |
935 | nexti = i + 1; |
936 | if (nexti == MWL8K_RX_DESCS) | |
937 | nexti = 0; | |
938 | next_dma_addr = rxq->rxd_dma + (nexti * desc_size); | |
a66098da | 939 | |
54bc3a0d | 940 | priv->rxd_ops->rxd_init(rxd, next_dma_addr); |
a66098da LB |
941 | } |
942 | ||
943 | return 0; | |
944 | } | |
945 | ||
946 | static int rxq_refill(struct ieee80211_hw *hw, int index, int limit) | |
947 | { | |
948 | struct mwl8k_priv *priv = hw->priv; | |
949 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
950 | int refilled; | |
951 | ||
952 | refilled = 0; | |
45eb400d | 953 | while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) { |
a66098da | 954 | struct sk_buff *skb; |
788838eb | 955 | dma_addr_t addr; |
a66098da | 956 | int rx; |
54bc3a0d | 957 | void *rxd; |
a66098da LB |
958 | |
959 | skb = dev_alloc_skb(MWL8K_RX_MAXSZ); | |
960 | if (skb == NULL) | |
961 | break; | |
962 | ||
788838eb LB |
963 | addr = pci_map_single(priv->pdev, skb->data, |
964 | MWL8K_RX_MAXSZ, DMA_FROM_DEVICE); | |
a66098da | 965 | |
54bc3a0d LB |
966 | rxq->rxd_count++; |
967 | rx = rxq->tail++; | |
968 | if (rxq->tail == MWL8K_RX_DESCS) | |
969 | rxq->tail = 0; | |
788838eb LB |
970 | rxq->buf[rx].skb = skb; |
971 | pci_unmap_addr_set(&rxq->buf[rx], dma, addr); | |
54bc3a0d LB |
972 | |
973 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); | |
974 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); | |
a66098da LB |
975 | |
976 | refilled++; | |
977 | } | |
978 | ||
979 | return refilled; | |
980 | } | |
981 | ||
982 | /* Must be called only when the card's reception is completely halted */ | |
983 | static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index) | |
984 | { | |
985 | struct mwl8k_priv *priv = hw->priv; | |
986 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
987 | int i; | |
988 | ||
989 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
788838eb LB |
990 | if (rxq->buf[i].skb != NULL) { |
991 | pci_unmap_single(priv->pdev, | |
992 | pci_unmap_addr(&rxq->buf[i], dma), | |
993 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); | |
994 | pci_unmap_addr_set(&rxq->buf[i], dma, 0); | |
995 | ||
996 | kfree_skb(rxq->buf[i].skb); | |
997 | rxq->buf[i].skb = NULL; | |
a66098da LB |
998 | } |
999 | } | |
1000 | ||
788838eb LB |
1001 | kfree(rxq->buf); |
1002 | rxq->buf = NULL; | |
a66098da LB |
1003 | |
1004 | pci_free_consistent(priv->pdev, | |
54bc3a0d | 1005 | MWL8K_RX_DESCS * priv->rxd_ops->rxd_size, |
45eb400d LB |
1006 | rxq->rxd, rxq->rxd_dma); |
1007 | rxq->rxd = NULL; | |
a66098da LB |
1008 | } |
1009 | ||
1010 | ||
1011 | /* | |
1012 | * Scan a list of BSSIDs to process for finalize join. | |
1013 | * Allows for extension to process multiple BSSIDs. | |
1014 | */ | |
1015 | static inline int | |
1016 | mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh) | |
1017 | { | |
1018 | return priv->capture_beacon && | |
1019 | ieee80211_is_beacon(wh->frame_control) && | |
1020 | !compare_ether_addr(wh->addr3, priv->capture_bssid); | |
1021 | } | |
1022 | ||
3779752d LB |
1023 | static inline void mwl8k_save_beacon(struct ieee80211_hw *hw, |
1024 | struct sk_buff *skb) | |
a66098da | 1025 | { |
3779752d LB |
1026 | struct mwl8k_priv *priv = hw->priv; |
1027 | ||
a66098da | 1028 | priv->capture_beacon = false; |
d89173f2 | 1029 | memset(priv->capture_bssid, 0, ETH_ALEN); |
a66098da LB |
1030 | |
1031 | /* | |
1032 | * Use GFP_ATOMIC as rxq_process is called from | |
1033 | * the primary interrupt handler, memory allocation call | |
1034 | * must not sleep. | |
1035 | */ | |
1036 | priv->beacon_skb = skb_copy(skb, GFP_ATOMIC); | |
1037 | if (priv->beacon_skb != NULL) | |
3779752d | 1038 | ieee80211_queue_work(hw, &priv->finalize_join_worker); |
a66098da LB |
1039 | } |
1040 | ||
1041 | static int rxq_process(struct ieee80211_hw *hw, int index, int limit) | |
1042 | { | |
1043 | struct mwl8k_priv *priv = hw->priv; | |
1044 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1045 | int processed; | |
1046 | ||
1047 | processed = 0; | |
45eb400d | 1048 | while (rxq->rxd_count && limit--) { |
a66098da | 1049 | struct sk_buff *skb; |
54bc3a0d LB |
1050 | void *rxd; |
1051 | int pkt_len; | |
a66098da | 1052 | struct ieee80211_rx_status status; |
20f09c3d | 1053 | __le16 qos; |
a66098da | 1054 | |
788838eb | 1055 | skb = rxq->buf[rxq->head].skb; |
d25f9f13 LB |
1056 | if (skb == NULL) |
1057 | break; | |
54bc3a0d LB |
1058 | |
1059 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); | |
1060 | ||
20f09c3d | 1061 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos); |
54bc3a0d LB |
1062 | if (pkt_len < 0) |
1063 | break; | |
1064 | ||
788838eb LB |
1065 | rxq->buf[rxq->head].skb = NULL; |
1066 | ||
1067 | pci_unmap_single(priv->pdev, | |
1068 | pci_unmap_addr(&rxq->buf[rxq->head], dma), | |
1069 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); | |
1070 | pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); | |
a66098da | 1071 | |
54bc3a0d LB |
1072 | rxq->head++; |
1073 | if (rxq->head == MWL8K_RX_DESCS) | |
1074 | rxq->head = 0; | |
1075 | ||
45eb400d | 1076 | rxq->rxd_count--; |
a66098da | 1077 | |
54bc3a0d | 1078 | skb_put(skb, pkt_len); |
20f09c3d | 1079 | mwl8k_remove_dma_header(skb, qos); |
a66098da | 1080 | |
a66098da | 1081 | /* |
c2c357ce LB |
1082 | * Check for a pending join operation. Save a |
1083 | * copy of the beacon and schedule a tasklet to | |
1084 | * send a FINALIZE_JOIN command to the firmware. | |
a66098da | 1085 | */ |
54bc3a0d | 1086 | if (mwl8k_capture_bssid(priv, (void *)skb->data)) |
3779752d | 1087 | mwl8k_save_beacon(hw, skb); |
a66098da | 1088 | |
f1d58c25 JB |
1089 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
1090 | ieee80211_rx_irqsafe(hw, skb); | |
a66098da LB |
1091 | |
1092 | processed++; | |
1093 | } | |
1094 | ||
1095 | return processed; | |
1096 | } | |
1097 | ||
1098 | ||
1099 | /* | |
1100 | * Packet transmission. | |
1101 | */ | |
1102 | ||
a66098da LB |
1103 | #define MWL8K_TXD_STATUS_OK 0x00000001 |
1104 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 | |
1105 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 | |
1106 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 | |
a66098da | 1107 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 |
a66098da | 1108 | |
e0493a8d LB |
1109 | #define MWL8K_QOS_QLEN_UNSPEC 0xff00 |
1110 | #define MWL8K_QOS_ACK_POLICY_MASK 0x0060 | |
1111 | #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000 | |
1112 | #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060 | |
1113 | #define MWL8K_QOS_EOSP 0x0010 | |
1114 | ||
a66098da LB |
1115 | struct mwl8k_tx_desc { |
1116 | __le32 status; | |
1117 | __u8 data_rate; | |
1118 | __u8 tx_priority; | |
1119 | __le16 qos_control; | |
1120 | __le32 pkt_phys_addr; | |
1121 | __le16 pkt_len; | |
d89173f2 | 1122 | __u8 dest_MAC_addr[ETH_ALEN]; |
45eb400d | 1123 | __le32 next_txd_phys_addr; |
a66098da LB |
1124 | __le32 reserved; |
1125 | __le16 rate_info; | |
1126 | __u8 peer_id; | |
1127 | __u8 tx_frag_cnt; | |
1128 | } __attribute__((packed)); | |
1129 | ||
1130 | #define MWL8K_TX_DESCS 128 | |
1131 | ||
1132 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | |
1133 | { | |
1134 | struct mwl8k_priv *priv = hw->priv; | |
1135 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1136 | int size; | |
1137 | int i; | |
1138 | ||
45eb400d LB |
1139 | memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats)); |
1140 | txq->stats.limit = MWL8K_TX_DESCS; | |
1141 | txq->head = 0; | |
1142 | txq->tail = 0; | |
a66098da LB |
1143 | |
1144 | size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc); | |
1145 | ||
45eb400d LB |
1146 | txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma); |
1147 | if (txq->txd == NULL) { | |
a66098da | 1148 | printk(KERN_ERR "%s: failed to alloc TX descriptors\n", |
c2c357ce | 1149 | wiphy_name(hw->wiphy)); |
a66098da LB |
1150 | return -ENOMEM; |
1151 | } | |
45eb400d | 1152 | memset(txq->txd, 0, size); |
a66098da | 1153 | |
45eb400d LB |
1154 | txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL); |
1155 | if (txq->skb == NULL) { | |
a66098da | 1156 | printk(KERN_ERR "%s: failed to alloc TX skbuff list\n", |
c2c357ce | 1157 | wiphy_name(hw->wiphy)); |
45eb400d | 1158 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); |
a66098da LB |
1159 | return -ENOMEM; |
1160 | } | |
45eb400d | 1161 | memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb)); |
a66098da LB |
1162 | |
1163 | for (i = 0; i < MWL8K_TX_DESCS; i++) { | |
1164 | struct mwl8k_tx_desc *tx_desc; | |
1165 | int nexti; | |
1166 | ||
45eb400d | 1167 | tx_desc = txq->txd + i; |
a66098da LB |
1168 | nexti = (i + 1) % MWL8K_TX_DESCS; |
1169 | ||
1170 | tx_desc->status = 0; | |
45eb400d LB |
1171 | tx_desc->next_txd_phys_addr = |
1172 | cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc)); | |
a66098da LB |
1173 | } |
1174 | ||
1175 | return 0; | |
1176 | } | |
1177 | ||
1178 | static inline void mwl8k_tx_start(struct mwl8k_priv *priv) | |
1179 | { | |
1180 | iowrite32(MWL8K_H2A_INT_PPA_READY, | |
1181 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1182 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1183 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1184 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
1185 | } | |
1186 | ||
7e1112d3 | 1187 | static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw) |
a66098da | 1188 | { |
7e1112d3 LB |
1189 | struct mwl8k_priv *priv = hw->priv; |
1190 | int i; | |
1191 | ||
1192 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { | |
1193 | struct mwl8k_tx_queue *txq = priv->txq + i; | |
1194 | int fw_owned = 0; | |
1195 | int drv_owned = 0; | |
1196 | int unused = 0; | |
1197 | int desc; | |
1198 | ||
a66098da | 1199 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { |
7e1112d3 LB |
1200 | struct mwl8k_tx_desc *tx_desc = txq->txd + desc; |
1201 | u32 status; | |
a66098da | 1202 | |
7e1112d3 | 1203 | status = le32_to_cpu(tx_desc->status); |
a66098da | 1204 | if (status & MWL8K_TXD_STATUS_FW_OWNED) |
7e1112d3 | 1205 | fw_owned++; |
a66098da | 1206 | else |
7e1112d3 | 1207 | drv_owned++; |
a66098da LB |
1208 | |
1209 | if (tx_desc->pkt_len == 0) | |
7e1112d3 | 1210 | unused++; |
a66098da | 1211 | } |
a66098da | 1212 | |
7e1112d3 LB |
1213 | printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d " |
1214 | "fw_owned=%d drv_owned=%d unused=%d\n", | |
1215 | wiphy_name(hw->wiphy), i, | |
1216 | txq->stats.len, txq->head, txq->tail, | |
1217 | fw_owned, drv_owned, unused); | |
1218 | } | |
a66098da LB |
1219 | } |
1220 | ||
618952a7 | 1221 | /* |
88de754a | 1222 | * Must be called with priv->fw_mutex held and tx queues stopped. |
618952a7 | 1223 | */ |
62abd3cf | 1224 | #define MWL8K_TX_WAIT_TIMEOUT_MS 5000 |
7e1112d3 | 1225 | |
950d5b01 | 1226 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) |
a66098da | 1227 | { |
a66098da | 1228 | struct mwl8k_priv *priv = hw->priv; |
88de754a | 1229 | DECLARE_COMPLETION_ONSTACK(tx_wait); |
7e1112d3 LB |
1230 | int retry; |
1231 | int rc; | |
a66098da LB |
1232 | |
1233 | might_sleep(); | |
1234 | ||
7e1112d3 LB |
1235 | /* |
1236 | * The TX queues are stopped at this point, so this test | |
1237 | * doesn't need to take ->tx_lock. | |
1238 | */ | |
1239 | if (!priv->pending_tx_pkts) | |
1240 | return 0; | |
1241 | ||
1242 | retry = 0; | |
1243 | rc = 0; | |
1244 | ||
a66098da | 1245 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1246 | priv->tx_wait = &tx_wait; |
1247 | while (!rc) { | |
1248 | int oldcount; | |
1249 | unsigned long timeout; | |
a66098da | 1250 | |
7e1112d3 | 1251 | oldcount = priv->pending_tx_pkts; |
a66098da | 1252 | |
7e1112d3 | 1253 | spin_unlock_bh(&priv->tx_lock); |
88de754a | 1254 | timeout = wait_for_completion_timeout(&tx_wait, |
7e1112d3 | 1255 | msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS)); |
a66098da | 1256 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1257 | |
1258 | if (timeout) { | |
1259 | WARN_ON(priv->pending_tx_pkts); | |
1260 | if (retry) { | |
1261 | printk(KERN_NOTICE "%s: tx rings drained\n", | |
1262 | wiphy_name(hw->wiphy)); | |
1263 | } | |
1264 | break; | |
1265 | } | |
1266 | ||
1267 | if (priv->pending_tx_pkts < oldcount) { | |
9a2303b9 LB |
1268 | printk(KERN_NOTICE "%s: waiting for tx rings " |
1269 | "to drain (%d -> %d pkts)\n", | |
7e1112d3 LB |
1270 | wiphy_name(hw->wiphy), oldcount, |
1271 | priv->pending_tx_pkts); | |
1272 | retry = 1; | |
1273 | continue; | |
1274 | } | |
1275 | ||
a66098da | 1276 | priv->tx_wait = NULL; |
a66098da | 1277 | |
7e1112d3 LB |
1278 | printk(KERN_ERR "%s: tx rings stuck for %d ms\n", |
1279 | wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS); | |
1280 | mwl8k_dump_tx_rings(hw); | |
1281 | ||
1282 | rc = -ETIMEDOUT; | |
a66098da | 1283 | } |
7e1112d3 | 1284 | spin_unlock_bh(&priv->tx_lock); |
a66098da | 1285 | |
7e1112d3 | 1286 | return rc; |
a66098da LB |
1287 | } |
1288 | ||
c23b5a69 LB |
1289 | #define MWL8K_TXD_SUCCESS(status) \ |
1290 | ((status) & (MWL8K_TXD_STATUS_OK | \ | |
1291 | MWL8K_TXD_STATUS_OK_RETRY | \ | |
1292 | MWL8K_TXD_STATUS_OK_MORE_RETRY)) | |
a66098da | 1293 | |
efb7c49a LB |
1294 | static int |
1295 | mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force) | |
a66098da LB |
1296 | { |
1297 | struct mwl8k_priv *priv = hw->priv; | |
1298 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
efb7c49a | 1299 | int processed; |
a66098da | 1300 | |
efb7c49a LB |
1301 | processed = 0; |
1302 | while (txq->stats.len > 0 && limit--) { | |
a66098da | 1303 | int tx; |
a66098da LB |
1304 | struct mwl8k_tx_desc *tx_desc; |
1305 | unsigned long addr; | |
ce9e2e1b | 1306 | int size; |
a66098da LB |
1307 | struct sk_buff *skb; |
1308 | struct ieee80211_tx_info *info; | |
1309 | u32 status; | |
1310 | ||
45eb400d LB |
1311 | tx = txq->head; |
1312 | tx_desc = txq->txd + tx; | |
a66098da LB |
1313 | |
1314 | status = le32_to_cpu(tx_desc->status); | |
1315 | ||
1316 | if (status & MWL8K_TXD_STATUS_FW_OWNED) { | |
1317 | if (!force) | |
1318 | break; | |
1319 | tx_desc->status &= | |
1320 | ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED); | |
1321 | } | |
1322 | ||
45eb400d LB |
1323 | txq->head = (tx + 1) % MWL8K_TX_DESCS; |
1324 | BUG_ON(txq->stats.len == 0); | |
1325 | txq->stats.len--; | |
a66098da LB |
1326 | priv->pending_tx_pkts--; |
1327 | ||
1328 | addr = le32_to_cpu(tx_desc->pkt_phys_addr); | |
ce9e2e1b | 1329 | size = le16_to_cpu(tx_desc->pkt_len); |
45eb400d LB |
1330 | skb = txq->skb[tx]; |
1331 | txq->skb[tx] = NULL; | |
a66098da LB |
1332 | |
1333 | BUG_ON(skb == NULL); | |
1334 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); | |
1335 | ||
20f09c3d | 1336 | mwl8k_remove_dma_header(skb, tx_desc->qos_control); |
a66098da LB |
1337 | |
1338 | /* Mark descriptor as unused */ | |
1339 | tx_desc->pkt_phys_addr = 0; | |
1340 | tx_desc->pkt_len = 0; | |
1341 | ||
a66098da LB |
1342 | info = IEEE80211_SKB_CB(skb); |
1343 | ieee80211_tx_info_clear_status(info); | |
ce9e2e1b | 1344 | if (MWL8K_TXD_SUCCESS(status)) |
a66098da | 1345 | info->flags |= IEEE80211_TX_STAT_ACK; |
a66098da LB |
1346 | |
1347 | ieee80211_tx_status_irqsafe(hw, skb); | |
1348 | ||
efb7c49a | 1349 | processed++; |
a66098da LB |
1350 | } |
1351 | ||
efb7c49a | 1352 | if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex)) |
a66098da | 1353 | ieee80211_wake_queue(hw, index); |
efb7c49a LB |
1354 | |
1355 | return processed; | |
a66098da LB |
1356 | } |
1357 | ||
1358 | /* must be called only when the card's transmit is completely halted */ | |
1359 | static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index) | |
1360 | { | |
1361 | struct mwl8k_priv *priv = hw->priv; | |
1362 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1363 | ||
efb7c49a | 1364 | mwl8k_txq_reclaim(hw, index, INT_MAX, 1); |
a66098da | 1365 | |
45eb400d LB |
1366 | kfree(txq->skb); |
1367 | txq->skb = NULL; | |
a66098da LB |
1368 | |
1369 | pci_free_consistent(priv->pdev, | |
1370 | MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc), | |
45eb400d LB |
1371 | txq->txd, txq->txd_dma); |
1372 | txq->txd = NULL; | |
a66098da LB |
1373 | } |
1374 | ||
1375 | static int | |
1376 | mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb) | |
1377 | { | |
1378 | struct mwl8k_priv *priv = hw->priv; | |
1379 | struct ieee80211_tx_info *tx_info; | |
23b33906 | 1380 | struct mwl8k_vif *mwl8k_vif; |
a66098da LB |
1381 | struct ieee80211_hdr *wh; |
1382 | struct mwl8k_tx_queue *txq; | |
1383 | struct mwl8k_tx_desc *tx; | |
a66098da | 1384 | dma_addr_t dma; |
23b33906 LB |
1385 | u32 txstatus; |
1386 | u8 txdatarate; | |
1387 | u16 qos; | |
a66098da | 1388 | |
23b33906 LB |
1389 | wh = (struct ieee80211_hdr *)skb->data; |
1390 | if (ieee80211_is_data_qos(wh->frame_control)) | |
1391 | qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh))); | |
1392 | else | |
1393 | qos = 0; | |
a66098da | 1394 | |
76266b2a | 1395 | mwl8k_add_dma_header(skb); |
23b33906 | 1396 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da LB |
1397 | |
1398 | tx_info = IEEE80211_SKB_CB(skb); | |
1399 | mwl8k_vif = MWL8K_VIF(tx_info->control.vif); | |
a66098da LB |
1400 | |
1401 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
a66098da | 1402 | wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
657232b6 LB |
1403 | wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno); |
1404 | mwl8k_vif->seqno += 0x10; | |
a66098da LB |
1405 | } |
1406 | ||
23b33906 LB |
1407 | /* Setup firmware control bit fields for each frame type. */ |
1408 | txstatus = 0; | |
1409 | txdatarate = 0; | |
1410 | if (ieee80211_is_mgmt(wh->frame_control) || | |
1411 | ieee80211_is_ctl(wh->frame_control)) { | |
1412 | txdatarate = 0; | |
e0493a8d | 1413 | qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP; |
23b33906 LB |
1414 | } else if (ieee80211_is_data(wh->frame_control)) { |
1415 | txdatarate = 1; | |
1416 | if (is_multicast_ether_addr(wh->addr1)) | |
1417 | txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX; | |
1418 | ||
e0493a8d | 1419 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; |
23b33906 | 1420 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) |
e0493a8d | 1421 | qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK; |
23b33906 | 1422 | else |
e0493a8d | 1423 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; |
23b33906 | 1424 | } |
a66098da LB |
1425 | |
1426 | dma = pci_map_single(priv->pdev, skb->data, | |
1427 | skb->len, PCI_DMA_TODEVICE); | |
1428 | ||
1429 | if (pci_dma_mapping_error(priv->pdev, dma)) { | |
1430 | printk(KERN_DEBUG "%s: failed to dma map skb, " | |
c2c357ce | 1431 | "dropping TX frame.\n", wiphy_name(hw->wiphy)); |
23b33906 | 1432 | dev_kfree_skb(skb); |
a66098da LB |
1433 | return NETDEV_TX_OK; |
1434 | } | |
1435 | ||
23b33906 | 1436 | spin_lock_bh(&priv->tx_lock); |
a66098da | 1437 | |
23b33906 | 1438 | txq = priv->txq + index; |
a66098da | 1439 | |
45eb400d LB |
1440 | BUG_ON(txq->skb[txq->tail] != NULL); |
1441 | txq->skb[txq->tail] = skb; | |
a66098da | 1442 | |
45eb400d | 1443 | tx = txq->txd + txq->tail; |
23b33906 LB |
1444 | tx->data_rate = txdatarate; |
1445 | tx->tx_priority = index; | |
a66098da | 1446 | tx->qos_control = cpu_to_le16(qos); |
a66098da LB |
1447 | tx->pkt_phys_addr = cpu_to_le32(dma); |
1448 | tx->pkt_len = cpu_to_le16(skb->len); | |
23b33906 | 1449 | tx->rate_info = 0; |
a680400e LB |
1450 | if (!priv->ap_fw && tx_info->control.sta != NULL) |
1451 | tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id; | |
1452 | else | |
1453 | tx->peer_id = 0; | |
a66098da | 1454 | wmb(); |
23b33906 LB |
1455 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); |
1456 | ||
45eb400d LB |
1457 | txq->stats.count++; |
1458 | txq->stats.len++; | |
a66098da | 1459 | priv->pending_tx_pkts++; |
a66098da | 1460 | |
45eb400d LB |
1461 | txq->tail++; |
1462 | if (txq->tail == MWL8K_TX_DESCS) | |
1463 | txq->tail = 0; | |
23b33906 | 1464 | |
45eb400d | 1465 | if (txq->head == txq->tail) |
a66098da LB |
1466 | ieee80211_stop_queue(hw, index); |
1467 | ||
23b33906 | 1468 | mwl8k_tx_start(priv); |
a66098da LB |
1469 | |
1470 | spin_unlock_bh(&priv->tx_lock); | |
1471 | ||
1472 | return NETDEV_TX_OK; | |
1473 | } | |
1474 | ||
1475 | ||
618952a7 LB |
1476 | /* |
1477 | * Firmware access. | |
1478 | * | |
1479 | * We have the following requirements for issuing firmware commands: | |
1480 | * - Some commands require that the packet transmit path is idle when | |
1481 | * the command is issued. (For simplicity, we'll just quiesce the | |
1482 | * transmit path for every command.) | |
1483 | * - There are certain sequences of commands that need to be issued to | |
1484 | * the hardware sequentially, with no other intervening commands. | |
1485 | * | |
1486 | * This leads to an implementation of a "firmware lock" as a mutex that | |
1487 | * can be taken recursively, and which is taken by both the low-level | |
1488 | * command submission function (mwl8k_post_cmd) as well as any users of | |
1489 | * that function that require issuing of an atomic sequence of commands, | |
1490 | * and quiesces the transmit path whenever it's taken. | |
1491 | */ | |
1492 | static int mwl8k_fw_lock(struct ieee80211_hw *hw) | |
1493 | { | |
1494 | struct mwl8k_priv *priv = hw->priv; | |
1495 | ||
1496 | if (priv->fw_mutex_owner != current) { | |
1497 | int rc; | |
1498 | ||
1499 | mutex_lock(&priv->fw_mutex); | |
1500 | ieee80211_stop_queues(hw); | |
1501 | ||
1502 | rc = mwl8k_tx_wait_empty(hw); | |
1503 | if (rc) { | |
1504 | ieee80211_wake_queues(hw); | |
1505 | mutex_unlock(&priv->fw_mutex); | |
1506 | ||
1507 | return rc; | |
1508 | } | |
1509 | ||
1510 | priv->fw_mutex_owner = current; | |
1511 | } | |
1512 | ||
1513 | priv->fw_mutex_depth++; | |
1514 | ||
1515 | return 0; | |
1516 | } | |
1517 | ||
1518 | static void mwl8k_fw_unlock(struct ieee80211_hw *hw) | |
1519 | { | |
1520 | struct mwl8k_priv *priv = hw->priv; | |
1521 | ||
1522 | if (!--priv->fw_mutex_depth) { | |
1523 | ieee80211_wake_queues(hw); | |
1524 | priv->fw_mutex_owner = NULL; | |
1525 | mutex_unlock(&priv->fw_mutex); | |
1526 | } | |
1527 | } | |
1528 | ||
1529 | ||
a66098da LB |
1530 | /* |
1531 | * Command processing. | |
1532 | */ | |
1533 | ||
0c9cc640 LB |
1534 | /* Timeout firmware commands after 10s */ |
1535 | #define MWL8K_CMD_TIMEOUT_MS 10000 | |
a66098da LB |
1536 | |
1537 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |
1538 | { | |
1539 | DECLARE_COMPLETION_ONSTACK(cmd_wait); | |
1540 | struct mwl8k_priv *priv = hw->priv; | |
1541 | void __iomem *regs = priv->regs; | |
1542 | dma_addr_t dma_addr; | |
1543 | unsigned int dma_size; | |
1544 | int rc; | |
a66098da LB |
1545 | unsigned long timeout = 0; |
1546 | u8 buf[32]; | |
1547 | ||
c2c357ce | 1548 | cmd->result = 0xffff; |
a66098da LB |
1549 | dma_size = le16_to_cpu(cmd->length); |
1550 | dma_addr = pci_map_single(priv->pdev, cmd, dma_size, | |
1551 | PCI_DMA_BIDIRECTIONAL); | |
1552 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
1553 | return -ENOMEM; | |
1554 | ||
618952a7 | 1555 | rc = mwl8k_fw_lock(hw); |
39a1e42e LB |
1556 | if (rc) { |
1557 | pci_unmap_single(priv->pdev, dma_addr, dma_size, | |
1558 | PCI_DMA_BIDIRECTIONAL); | |
618952a7 | 1559 | return rc; |
39a1e42e | 1560 | } |
a66098da | 1561 | |
a66098da LB |
1562 | priv->hostcmd_wait = &cmd_wait; |
1563 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
1564 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
1565 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1566 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1567 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
a66098da LB |
1568 | |
1569 | timeout = wait_for_completion_timeout(&cmd_wait, | |
1570 | msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS)); | |
1571 | ||
618952a7 LB |
1572 | priv->hostcmd_wait = NULL; |
1573 | ||
1574 | mwl8k_fw_unlock(hw); | |
1575 | ||
37055bd4 LB |
1576 | pci_unmap_single(priv->pdev, dma_addr, dma_size, |
1577 | PCI_DMA_BIDIRECTIONAL); | |
1578 | ||
a66098da | 1579 | if (!timeout) { |
a66098da | 1580 | printk(KERN_ERR "%s: Command %s timeout after %u ms\n", |
c2c357ce | 1581 | wiphy_name(hw->wiphy), |
a66098da LB |
1582 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
1583 | MWL8K_CMD_TIMEOUT_MS); | |
1584 | rc = -ETIMEDOUT; | |
1585 | } else { | |
0c9cc640 LB |
1586 | int ms; |
1587 | ||
1588 | ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout); | |
1589 | ||
ce9e2e1b | 1590 | rc = cmd->result ? -EINVAL : 0; |
a66098da LB |
1591 | if (rc) |
1592 | printk(KERN_ERR "%s: Command %s error 0x%x\n", | |
c2c357ce | 1593 | wiphy_name(hw->wiphy), |
a66098da | 1594 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
76c962a2 | 1595 | le16_to_cpu(cmd->result)); |
0c9cc640 LB |
1596 | else if (ms > 2000) |
1597 | printk(KERN_NOTICE "%s: Command %s took %d ms\n", | |
1598 | wiphy_name(hw->wiphy), | |
1599 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), | |
1600 | ms); | |
a66098da LB |
1601 | } |
1602 | ||
a66098da LB |
1603 | return rc; |
1604 | } | |
1605 | ||
f57ca9c1 LB |
1606 | static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw, |
1607 | struct ieee80211_vif *vif, | |
1608 | struct mwl8k_cmd_pkt *cmd) | |
1609 | { | |
1610 | if (vif != NULL) | |
1611 | cmd->macid = MWL8K_VIF(vif)->macid; | |
1612 | return mwl8k_post_cmd(hw, cmd); | |
1613 | } | |
1614 | ||
1349ad2f LB |
1615 | /* |
1616 | * Setup code shared between STA and AP firmware images. | |
1617 | */ | |
1618 | static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw) | |
1619 | { | |
1620 | struct mwl8k_priv *priv = hw->priv; | |
1621 | ||
1622 | BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24)); | |
1623 | memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24)); | |
1624 | ||
1625 | BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24)); | |
1626 | memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24)); | |
1627 | ||
1628 | priv->band_24.band = IEEE80211_BAND_2GHZ; | |
1629 | priv->band_24.channels = priv->channels_24; | |
1630 | priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24); | |
1631 | priv->band_24.bitrates = priv->rates_24; | |
1632 | priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24); | |
1633 | ||
1634 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24; | |
1635 | } | |
1636 | ||
4eae9edd LB |
1637 | static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw) |
1638 | { | |
1639 | struct mwl8k_priv *priv = hw->priv; | |
1640 | ||
1641 | BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50)); | |
1642 | memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50)); | |
1643 | ||
1644 | BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50)); | |
1645 | memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50)); | |
1646 | ||
1647 | priv->band_50.band = IEEE80211_BAND_5GHZ; | |
1648 | priv->band_50.channels = priv->channels_50; | |
1649 | priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50); | |
1650 | priv->band_50.bitrates = priv->rates_50; | |
1651 | priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50); | |
1652 | ||
1653 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50; | |
1654 | } | |
1655 | ||
a66098da | 1656 | /* |
04b147b1 | 1657 | * CMD_GET_HW_SPEC (STA version). |
a66098da | 1658 | */ |
04b147b1 | 1659 | struct mwl8k_cmd_get_hw_spec_sta { |
a66098da LB |
1660 | struct mwl8k_cmd_pkt header; |
1661 | __u8 hw_rev; | |
1662 | __u8 host_interface; | |
1663 | __le16 num_mcaddrs; | |
d89173f2 | 1664 | __u8 perm_addr[ETH_ALEN]; |
a66098da LB |
1665 | __le16 region_code; |
1666 | __le32 fw_rev; | |
1667 | __le32 ps_cookie; | |
1668 | __le32 caps; | |
1669 | __u8 mcs_bitmap[16]; | |
1670 | __le32 rx_queue_ptr; | |
1671 | __le32 num_tx_queues; | |
1672 | __le32 tx_queue_ptrs[MWL8K_TX_QUEUES]; | |
1673 | __le32 caps2; | |
1674 | __le32 num_tx_desc_per_queue; | |
45eb400d | 1675 | __le32 total_rxd; |
a66098da LB |
1676 | } __attribute__((packed)); |
1677 | ||
341c9791 LB |
1678 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 |
1679 | #define MWL8K_CAP_GREENFIELD 0x08000000 | |
1680 | #define MWL8K_CAP_AMPDU 0x04000000 | |
1681 | #define MWL8K_CAP_RX_STBC 0x01000000 | |
1682 | #define MWL8K_CAP_TX_STBC 0x00800000 | |
1683 | #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000 | |
1684 | #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000 | |
1685 | #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000 | |
1686 | #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000 | |
1687 | #define MWL8K_CAP_DELAY_BA 0x00003000 | |
1688 | #define MWL8K_CAP_MIMO 0x00000200 | |
1689 | #define MWL8K_CAP_40MHZ 0x00000100 | |
06953235 LB |
1690 | #define MWL8K_CAP_BAND_MASK 0x00000007 |
1691 | #define MWL8K_CAP_5GHZ 0x00000004 | |
1692 | #define MWL8K_CAP_2GHZ4 0x00000001 | |
341c9791 | 1693 | |
06953235 LB |
1694 | static void |
1695 | mwl8k_set_ht_caps(struct ieee80211_hw *hw, | |
1696 | struct ieee80211_supported_band *band, u32 cap) | |
341c9791 | 1697 | { |
341c9791 LB |
1698 | int rx_streams; |
1699 | int tx_streams; | |
1700 | ||
777ad375 | 1701 | band->ht_cap.ht_supported = 1; |
341c9791 LB |
1702 | |
1703 | if (cap & MWL8K_CAP_MAX_AMSDU) | |
777ad375 | 1704 | band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
341c9791 | 1705 | if (cap & MWL8K_CAP_GREENFIELD) |
777ad375 | 1706 | band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD; |
341c9791 LB |
1707 | if (cap & MWL8K_CAP_AMPDU) { |
1708 | hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; | |
777ad375 LB |
1709 | band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
1710 | band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; | |
341c9791 LB |
1711 | } |
1712 | if (cap & MWL8K_CAP_RX_STBC) | |
777ad375 | 1713 | band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC; |
341c9791 | 1714 | if (cap & MWL8K_CAP_TX_STBC) |
777ad375 | 1715 | band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; |
341c9791 | 1716 | if (cap & MWL8K_CAP_SHORTGI_40MHZ) |
777ad375 | 1717 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; |
341c9791 | 1718 | if (cap & MWL8K_CAP_SHORTGI_20MHZ) |
777ad375 | 1719 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; |
341c9791 | 1720 | if (cap & MWL8K_CAP_DELAY_BA) |
777ad375 | 1721 | band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA; |
341c9791 | 1722 | if (cap & MWL8K_CAP_40MHZ) |
777ad375 | 1723 | band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
341c9791 LB |
1724 | |
1725 | rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK); | |
1726 | tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK); | |
1727 | ||
777ad375 | 1728 | band->ht_cap.mcs.rx_mask[0] = 0xff; |
341c9791 | 1729 | if (rx_streams >= 2) |
777ad375 | 1730 | band->ht_cap.mcs.rx_mask[1] = 0xff; |
341c9791 | 1731 | if (rx_streams >= 3) |
777ad375 LB |
1732 | band->ht_cap.mcs.rx_mask[2] = 0xff; |
1733 | band->ht_cap.mcs.rx_mask[4] = 0x01; | |
1734 | band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; | |
341c9791 LB |
1735 | |
1736 | if (rx_streams != tx_streams) { | |
777ad375 LB |
1737 | band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
1738 | band->ht_cap.mcs.tx_params |= (tx_streams - 1) << | |
341c9791 LB |
1739 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; |
1740 | } | |
1741 | } | |
1742 | ||
06953235 LB |
1743 | static void |
1744 | mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps) | |
1745 | { | |
1746 | struct mwl8k_priv *priv = hw->priv; | |
1747 | ||
1748 | if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) { | |
1749 | mwl8k_setup_2ghz_band(hw); | |
1750 | if (caps & MWL8K_CAP_MIMO) | |
1751 | mwl8k_set_ht_caps(hw, &priv->band_24, caps); | |
1752 | } | |
1753 | ||
1754 | if (caps & MWL8K_CAP_5GHZ) { | |
1755 | mwl8k_setup_5ghz_band(hw); | |
1756 | if (caps & MWL8K_CAP_MIMO) | |
1757 | mwl8k_set_ht_caps(hw, &priv->band_50, caps); | |
1758 | } | |
1759 | } | |
1760 | ||
04b147b1 | 1761 | static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw) |
a66098da LB |
1762 | { |
1763 | struct mwl8k_priv *priv = hw->priv; | |
04b147b1 | 1764 | struct mwl8k_cmd_get_hw_spec_sta *cmd; |
a66098da LB |
1765 | int rc; |
1766 | int i; | |
1767 | ||
1768 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
1769 | if (cmd == NULL) | |
1770 | return -ENOMEM; | |
1771 | ||
1772 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
1773 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
1774 | ||
1775 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
1776 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
45eb400d | 1777 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); |
4ff6432e | 1778 | cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES); |
a66098da | 1779 | for (i = 0; i < MWL8K_TX_QUEUES; i++) |
45eb400d | 1780 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma); |
4ff6432e | 1781 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
45eb400d | 1782 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); |
a66098da LB |
1783 | |
1784 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
1785 | ||
1786 | if (!rc) { | |
1787 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | |
1788 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
4ff6432e | 1789 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
a66098da | 1790 | priv->hw_rev = cmd->hw_rev; |
06953235 | 1791 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
1792 | priv->ap_macids_supported = 0x00000000; |
1793 | priv->sta_macids_supported = 0x00000001; | |
a66098da LB |
1794 | } |
1795 | ||
1796 | kfree(cmd); | |
1797 | return rc; | |
1798 | } | |
1799 | ||
42fba21d LB |
1800 | /* |
1801 | * CMD_GET_HW_SPEC (AP version). | |
1802 | */ | |
1803 | struct mwl8k_cmd_get_hw_spec_ap { | |
1804 | struct mwl8k_cmd_pkt header; | |
1805 | __u8 hw_rev; | |
1806 | __u8 host_interface; | |
1807 | __le16 num_wcb; | |
1808 | __le16 num_mcaddrs; | |
1809 | __u8 perm_addr[ETH_ALEN]; | |
1810 | __le16 region_code; | |
1811 | __le16 num_antenna; | |
1812 | __le32 fw_rev; | |
1813 | __le32 wcbbase0; | |
1814 | __le32 rxwrptr; | |
1815 | __le32 rxrdptr; | |
1816 | __le32 ps_cookie; | |
1817 | __le32 wcbbase1; | |
1818 | __le32 wcbbase2; | |
1819 | __le32 wcbbase3; | |
1820 | } __attribute__((packed)); | |
1821 | ||
1822 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |
1823 | { | |
1824 | struct mwl8k_priv *priv = hw->priv; | |
1825 | struct mwl8k_cmd_get_hw_spec_ap *cmd; | |
1826 | int rc; | |
1827 | ||
1828 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
1829 | if (cmd == NULL) | |
1830 | return -ENOMEM; | |
1831 | ||
1832 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
1833 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
1834 | ||
1835 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
1836 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
1837 | ||
1838 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
1839 | ||
1840 | if (!rc) { | |
1841 | int off; | |
1842 | ||
1843 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | |
1844 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
1845 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | |
1846 | priv->hw_rev = cmd->hw_rev; | |
1349ad2f | 1847 | mwl8k_setup_2ghz_band(hw); |
ee0ddf18 LB |
1848 | priv->ap_macids_supported = 0x000000ff; |
1849 | priv->sta_macids_supported = 0x00000000; | |
42fba21d LB |
1850 | |
1851 | off = le32_to_cpu(cmd->wcbbase0) & 0xffff; | |
1852 | iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off); | |
1853 | ||
1854 | off = le32_to_cpu(cmd->rxwrptr) & 0xffff; | |
1855 | iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off); | |
1856 | ||
1857 | off = le32_to_cpu(cmd->rxrdptr) & 0xffff; | |
1858 | iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off); | |
1859 | ||
1860 | off = le32_to_cpu(cmd->wcbbase1) & 0xffff; | |
1861 | iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off); | |
1862 | ||
1863 | off = le32_to_cpu(cmd->wcbbase2) & 0xffff; | |
1864 | iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off); | |
1865 | ||
1866 | off = le32_to_cpu(cmd->wcbbase3) & 0xffff; | |
1867 | iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off); | |
1868 | } | |
1869 | ||
1870 | kfree(cmd); | |
1871 | return rc; | |
1872 | } | |
1873 | ||
1874 | /* | |
1875 | * CMD_SET_HW_SPEC. | |
1876 | */ | |
1877 | struct mwl8k_cmd_set_hw_spec { | |
1878 | struct mwl8k_cmd_pkt header; | |
1879 | __u8 hw_rev; | |
1880 | __u8 host_interface; | |
1881 | __le16 num_mcaddrs; | |
1882 | __u8 perm_addr[ETH_ALEN]; | |
1883 | __le16 region_code; | |
1884 | __le32 fw_rev; | |
1885 | __le32 ps_cookie; | |
1886 | __le32 caps; | |
1887 | __le32 rx_queue_ptr; | |
1888 | __le32 num_tx_queues; | |
1889 | __le32 tx_queue_ptrs[MWL8K_TX_QUEUES]; | |
1890 | __le32 flags; | |
1891 | __le32 num_tx_desc_per_queue; | |
1892 | __le32 total_rxd; | |
1893 | } __attribute__((packed)); | |
1894 | ||
b64fe619 LB |
1895 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 |
1896 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 | |
1897 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010 | |
42fba21d LB |
1898 | |
1899 | static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw) | |
1900 | { | |
1901 | struct mwl8k_priv *priv = hw->priv; | |
1902 | struct mwl8k_cmd_set_hw_spec *cmd; | |
1903 | int rc; | |
1904 | int i; | |
1905 | ||
1906 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
1907 | if (cmd == NULL) | |
1908 | return -ENOMEM; | |
1909 | ||
1910 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC); | |
1911 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
1912 | ||
1913 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
1914 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); | |
1915 | cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES); | |
1916 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
1917 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma); | |
b64fe619 LB |
1918 | cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT | |
1919 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP | | |
1920 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON); | |
42fba21d LB |
1921 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
1922 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); | |
1923 | ||
1924 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
1925 | kfree(cmd); | |
1926 | ||
1927 | return rc; | |
1928 | } | |
1929 | ||
a66098da LB |
1930 | /* |
1931 | * CMD_MAC_MULTICAST_ADR. | |
1932 | */ | |
1933 | struct mwl8k_cmd_mac_multicast_adr { | |
1934 | struct mwl8k_cmd_pkt header; | |
1935 | __le16 action; | |
1936 | __le16 numaddr; | |
ce9e2e1b | 1937 | __u8 addr[0][ETH_ALEN]; |
a66098da LB |
1938 | }; |
1939 | ||
d5e30845 LB |
1940 | #define MWL8K_ENABLE_RX_DIRECTED 0x0001 |
1941 | #define MWL8K_ENABLE_RX_MULTICAST 0x0002 | |
1942 | #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004 | |
1943 | #define MWL8K_ENABLE_RX_BROADCAST 0x0008 | |
ce9e2e1b | 1944 | |
e81cd2d6 | 1945 | static struct mwl8k_cmd_pkt * |
447ced07 | 1946 | __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti, |
e81cd2d6 | 1947 | int mc_count, struct dev_addr_list *mclist) |
a66098da | 1948 | { |
e81cd2d6 | 1949 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 1950 | struct mwl8k_cmd_mac_multicast_adr *cmd; |
e81cd2d6 | 1951 | int size; |
e81cd2d6 | 1952 | |
447ced07 | 1953 | if (allmulti || mc_count > priv->num_mcaddrs) { |
d5e30845 LB |
1954 | allmulti = 1; |
1955 | mc_count = 0; | |
1956 | } | |
e81cd2d6 LB |
1957 | |
1958 | size = sizeof(*cmd) + mc_count * ETH_ALEN; | |
ce9e2e1b | 1959 | |
e81cd2d6 | 1960 | cmd = kzalloc(size, GFP_ATOMIC); |
a66098da | 1961 | if (cmd == NULL) |
e81cd2d6 | 1962 | return NULL; |
a66098da LB |
1963 | |
1964 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR); | |
1965 | cmd->header.length = cpu_to_le16(size); | |
d5e30845 LB |
1966 | cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED | |
1967 | MWL8K_ENABLE_RX_BROADCAST); | |
1968 | ||
1969 | if (allmulti) { | |
1970 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST); | |
1971 | } else if (mc_count) { | |
1972 | int i; | |
1973 | ||
1974 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST); | |
1975 | cmd->numaddr = cpu_to_le16(mc_count); | |
1976 | for (i = 0; i < mc_count && mclist; i++) { | |
1977 | if (mclist->da_addrlen != ETH_ALEN) { | |
1978 | kfree(cmd); | |
1979 | return NULL; | |
1980 | } | |
1981 | memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN); | |
1982 | mclist = mclist->next; | |
a66098da | 1983 | } |
a66098da LB |
1984 | } |
1985 | ||
e81cd2d6 | 1986 | return &cmd->header; |
a66098da LB |
1987 | } |
1988 | ||
1989 | /* | |
55489b6e | 1990 | * CMD_GET_STAT. |
a66098da | 1991 | */ |
55489b6e | 1992 | struct mwl8k_cmd_get_stat { |
a66098da | 1993 | struct mwl8k_cmd_pkt header; |
a66098da LB |
1994 | __le32 stats[64]; |
1995 | } __attribute__((packed)); | |
1996 | ||
1997 | #define MWL8K_STAT_ACK_FAILURE 9 | |
1998 | #define MWL8K_STAT_RTS_FAILURE 12 | |
1999 | #define MWL8K_STAT_FCS_ERROR 24 | |
2000 | #define MWL8K_STAT_RTS_SUCCESS 11 | |
2001 | ||
55489b6e LB |
2002 | static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw, |
2003 | struct ieee80211_low_level_stats *stats) | |
a66098da | 2004 | { |
55489b6e | 2005 | struct mwl8k_cmd_get_stat *cmd; |
a66098da LB |
2006 | int rc; |
2007 | ||
2008 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2009 | if (cmd == NULL) | |
2010 | return -ENOMEM; | |
2011 | ||
2012 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT); | |
2013 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2014 | |
2015 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2016 | if (!rc) { | |
2017 | stats->dot11ACKFailureCount = | |
2018 | le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]); | |
2019 | stats->dot11RTSFailureCount = | |
2020 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]); | |
2021 | stats->dot11FCSErrorCount = | |
2022 | le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]); | |
2023 | stats->dot11RTSSuccessCount = | |
2024 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]); | |
2025 | } | |
2026 | kfree(cmd); | |
2027 | ||
2028 | return rc; | |
2029 | } | |
2030 | ||
2031 | /* | |
55489b6e | 2032 | * CMD_RADIO_CONTROL. |
a66098da | 2033 | */ |
55489b6e | 2034 | struct mwl8k_cmd_radio_control { |
a66098da LB |
2035 | struct mwl8k_cmd_pkt header; |
2036 | __le16 action; | |
2037 | __le16 control; | |
2038 | __le16 radio_on; | |
2039 | } __attribute__((packed)); | |
2040 | ||
c46563b7 | 2041 | static int |
55489b6e | 2042 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) |
a66098da LB |
2043 | { |
2044 | struct mwl8k_priv *priv = hw->priv; | |
55489b6e | 2045 | struct mwl8k_cmd_radio_control *cmd; |
a66098da LB |
2046 | int rc; |
2047 | ||
c46563b7 | 2048 | if (enable == priv->radio_on && !force) |
a66098da LB |
2049 | return 0; |
2050 | ||
a66098da LB |
2051 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2052 | if (cmd == NULL) | |
2053 | return -ENOMEM; | |
2054 | ||
2055 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL); | |
2056 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2057 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
68ce3884 | 2058 | cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1); |
a66098da LB |
2059 | cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000); |
2060 | ||
2061 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2062 | kfree(cmd); | |
2063 | ||
2064 | if (!rc) | |
c46563b7 | 2065 | priv->radio_on = enable; |
a66098da LB |
2066 | |
2067 | return rc; | |
2068 | } | |
2069 | ||
55489b6e | 2070 | static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw) |
c46563b7 | 2071 | { |
55489b6e | 2072 | return mwl8k_cmd_radio_control(hw, 0, 0); |
c46563b7 LB |
2073 | } |
2074 | ||
55489b6e | 2075 | static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw) |
c46563b7 | 2076 | { |
55489b6e | 2077 | return mwl8k_cmd_radio_control(hw, 1, 0); |
c46563b7 LB |
2078 | } |
2079 | ||
a66098da LB |
2080 | static int |
2081 | mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) | |
2082 | { | |
99200a99 | 2083 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2084 | |
68ce3884 | 2085 | priv->radio_short_preamble = short_preamble; |
a66098da | 2086 | |
55489b6e | 2087 | return mwl8k_cmd_radio_control(hw, 1, 1); |
a66098da LB |
2088 | } |
2089 | ||
2090 | /* | |
55489b6e | 2091 | * CMD_RF_TX_POWER. |
a66098da LB |
2092 | */ |
2093 | #define MWL8K_TX_POWER_LEVEL_TOTAL 8 | |
2094 | ||
55489b6e | 2095 | struct mwl8k_cmd_rf_tx_power { |
a66098da LB |
2096 | struct mwl8k_cmd_pkt header; |
2097 | __le16 action; | |
2098 | __le16 support_level; | |
2099 | __le16 current_level; | |
2100 | __le16 reserved; | |
2101 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | |
2102 | } __attribute__((packed)); | |
2103 | ||
55489b6e | 2104 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
a66098da | 2105 | { |
55489b6e | 2106 | struct mwl8k_cmd_rf_tx_power *cmd; |
a66098da LB |
2107 | int rc; |
2108 | ||
2109 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2110 | if (cmd == NULL) | |
2111 | return -ENOMEM; | |
2112 | ||
2113 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER); | |
2114 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2115 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2116 | cmd->support_level = cpu_to_le16(dBm); | |
2117 | ||
2118 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2119 | kfree(cmd); | |
2120 | ||
2121 | return rc; | |
2122 | } | |
2123 | ||
08b06347 LB |
2124 | /* |
2125 | * CMD_RF_ANTENNA. | |
2126 | */ | |
2127 | struct mwl8k_cmd_rf_antenna { | |
2128 | struct mwl8k_cmd_pkt header; | |
2129 | __le16 antenna; | |
2130 | __le16 mode; | |
2131 | } __attribute__((packed)); | |
2132 | ||
2133 | #define MWL8K_RF_ANTENNA_RX 1 | |
2134 | #define MWL8K_RF_ANTENNA_TX 2 | |
2135 | ||
2136 | static int | |
2137 | mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask) | |
2138 | { | |
2139 | struct mwl8k_cmd_rf_antenna *cmd; | |
2140 | int rc; | |
2141 | ||
2142 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2143 | if (cmd == NULL) | |
2144 | return -ENOMEM; | |
2145 | ||
2146 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA); | |
2147 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2148 | cmd->antenna = cpu_to_le16(antenna); | |
2149 | cmd->mode = cpu_to_le16(mask); | |
2150 | ||
2151 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2152 | kfree(cmd); | |
2153 | ||
2154 | return rc; | |
2155 | } | |
2156 | ||
b64fe619 LB |
2157 | /* |
2158 | * CMD_SET_BEACON. | |
2159 | */ | |
2160 | struct mwl8k_cmd_set_beacon { | |
2161 | struct mwl8k_cmd_pkt header; | |
2162 | __le16 beacon_len; | |
2163 | __u8 beacon[0]; | |
2164 | }; | |
2165 | ||
aa21d0f6 LB |
2166 | static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, |
2167 | struct ieee80211_vif *vif, u8 *beacon, int len) | |
b64fe619 LB |
2168 | { |
2169 | struct mwl8k_cmd_set_beacon *cmd; | |
2170 | int rc; | |
2171 | ||
2172 | cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL); | |
2173 | if (cmd == NULL) | |
2174 | return -ENOMEM; | |
2175 | ||
2176 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON); | |
2177 | cmd->header.length = cpu_to_le16(sizeof(*cmd) + len); | |
2178 | cmd->beacon_len = cpu_to_le16(len); | |
2179 | memcpy(cmd->beacon, beacon, len); | |
2180 | ||
aa21d0f6 | 2181 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2182 | kfree(cmd); |
2183 | ||
2184 | return rc; | |
2185 | } | |
2186 | ||
a66098da LB |
2187 | /* |
2188 | * CMD_SET_PRE_SCAN. | |
2189 | */ | |
2190 | struct mwl8k_cmd_set_pre_scan { | |
2191 | struct mwl8k_cmd_pkt header; | |
2192 | } __attribute__((packed)); | |
2193 | ||
2194 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) | |
2195 | { | |
2196 | struct mwl8k_cmd_set_pre_scan *cmd; | |
2197 | int rc; | |
2198 | ||
2199 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2200 | if (cmd == NULL) | |
2201 | return -ENOMEM; | |
2202 | ||
2203 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN); | |
2204 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2205 | ||
2206 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2207 | kfree(cmd); | |
2208 | ||
2209 | return rc; | |
2210 | } | |
2211 | ||
2212 | /* | |
2213 | * CMD_SET_POST_SCAN. | |
2214 | */ | |
2215 | struct mwl8k_cmd_set_post_scan { | |
2216 | struct mwl8k_cmd_pkt header; | |
2217 | __le32 isibss; | |
d89173f2 | 2218 | __u8 bssid[ETH_ALEN]; |
a66098da LB |
2219 | } __attribute__((packed)); |
2220 | ||
2221 | static int | |
0a11dfc3 | 2222 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) |
a66098da LB |
2223 | { |
2224 | struct mwl8k_cmd_set_post_scan *cmd; | |
2225 | int rc; | |
2226 | ||
2227 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2228 | if (cmd == NULL) | |
2229 | return -ENOMEM; | |
2230 | ||
2231 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN); | |
2232 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2233 | cmd->isibss = 0; | |
d89173f2 | 2234 | memcpy(cmd->bssid, mac, ETH_ALEN); |
a66098da LB |
2235 | |
2236 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2237 | kfree(cmd); | |
2238 | ||
2239 | return rc; | |
2240 | } | |
2241 | ||
2242 | /* | |
2243 | * CMD_SET_RF_CHANNEL. | |
2244 | */ | |
2245 | struct mwl8k_cmd_set_rf_channel { | |
2246 | struct mwl8k_cmd_pkt header; | |
2247 | __le16 action; | |
2248 | __u8 current_channel; | |
2249 | __le32 channel_flags; | |
2250 | } __attribute__((packed)); | |
2251 | ||
2252 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, | |
610677d2 | 2253 | struct ieee80211_conf *conf) |
a66098da | 2254 | { |
610677d2 | 2255 | struct ieee80211_channel *channel = conf->channel; |
a66098da LB |
2256 | struct mwl8k_cmd_set_rf_channel *cmd; |
2257 | int rc; | |
2258 | ||
2259 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2260 | if (cmd == NULL) | |
2261 | return -ENOMEM; | |
2262 | ||
2263 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL); | |
2264 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2265 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2266 | cmd->current_channel = channel->hw_value; | |
610677d2 | 2267 | |
a66098da | 2268 | if (channel->band == IEEE80211_BAND_2GHZ) |
610677d2 | 2269 | cmd->channel_flags |= cpu_to_le32(0x00000001); |
42574ea2 LB |
2270 | else if (channel->band == IEEE80211_BAND_5GHZ) |
2271 | cmd->channel_flags |= cpu_to_le32(0x00000004); | |
610677d2 LB |
2272 | |
2273 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2274 | conf->channel_type == NL80211_CHAN_HT20) | |
2275 | cmd->channel_flags |= cpu_to_le32(0x00000080); | |
2276 | else if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2277 | cmd->channel_flags |= cpu_to_le32(0x000001900); | |
2278 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2279 | cmd->channel_flags |= cpu_to_le32(0x000000900); | |
a66098da LB |
2280 | |
2281 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2282 | kfree(cmd); | |
2283 | ||
2284 | return rc; | |
2285 | } | |
2286 | ||
2287 | /* | |
55489b6e | 2288 | * CMD_SET_AID. |
a66098da | 2289 | */ |
55489b6e LB |
2290 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
2291 | #define MWL8K_FRAME_PROT_11G 0x07 | |
2292 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | |
2293 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 | |
a66098da | 2294 | |
55489b6e LB |
2295 | struct mwl8k_cmd_update_set_aid { |
2296 | struct mwl8k_cmd_pkt header; | |
2297 | __le16 aid; | |
a66098da | 2298 | |
55489b6e LB |
2299 | /* AP's MAC address (BSSID) */ |
2300 | __u8 bssid[ETH_ALEN]; | |
2301 | __le16 protection_mode; | |
2302 | __u8 supp_rates[14]; | |
a66098da LB |
2303 | } __attribute__((packed)); |
2304 | ||
c6e96010 LB |
2305 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) |
2306 | { | |
2307 | int i; | |
2308 | int j; | |
2309 | ||
2310 | /* | |
2311 | * Clear nonstandard rates 4 and 13. | |
2312 | */ | |
2313 | mask &= 0x1fef; | |
2314 | ||
2315 | for (i = 0, j = 0; i < 14; i++) { | |
2316 | if (mask & (1 << i)) | |
777ad375 | 2317 | rates[j++] = mwl8k_rates_24[i].hw_value; |
c6e96010 LB |
2318 | } |
2319 | } | |
2320 | ||
55489b6e | 2321 | static int |
c6e96010 LB |
2322 | mwl8k_cmd_set_aid(struct ieee80211_hw *hw, |
2323 | struct ieee80211_vif *vif, u32 legacy_rate_mask) | |
a66098da | 2324 | { |
55489b6e LB |
2325 | struct mwl8k_cmd_update_set_aid *cmd; |
2326 | u16 prot_mode; | |
a66098da LB |
2327 | int rc; |
2328 | ||
2329 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2330 | if (cmd == NULL) | |
2331 | return -ENOMEM; | |
2332 | ||
55489b6e | 2333 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID); |
a66098da | 2334 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
7dc6a7a7 | 2335 | cmd->aid = cpu_to_le16(vif->bss_conf.aid); |
0a11dfc3 | 2336 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 2337 | |
7dc6a7a7 | 2338 | if (vif->bss_conf.use_cts_prot) { |
55489b6e LB |
2339 | prot_mode = MWL8K_FRAME_PROT_11G; |
2340 | } else { | |
7dc6a7a7 | 2341 | switch (vif->bss_conf.ht_operation_mode & |
55489b6e LB |
2342 | IEEE80211_HT_OP_MODE_PROTECTION) { |
2343 | case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: | |
2344 | prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY; | |
2345 | break; | |
2346 | case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: | |
2347 | prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL; | |
2348 | break; | |
2349 | default: | |
2350 | prot_mode = MWL8K_FRAME_PROT_DISABLED; | |
2351 | break; | |
2352 | } | |
2353 | } | |
2354 | cmd->protection_mode = cpu_to_le16(prot_mode); | |
a66098da | 2355 | |
c6e96010 | 2356 | legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask); |
a66098da LB |
2357 | |
2358 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2359 | kfree(cmd); | |
2360 | ||
2361 | return rc; | |
2362 | } | |
2363 | ||
32060e1b | 2364 | /* |
55489b6e | 2365 | * CMD_SET_RATE. |
32060e1b | 2366 | */ |
55489b6e LB |
2367 | struct mwl8k_cmd_set_rate { |
2368 | struct mwl8k_cmd_pkt header; | |
2369 | __u8 legacy_rates[14]; | |
2370 | ||
2371 | /* Bitmap for supported MCS codes. */ | |
2372 | __u8 mcs_set[16]; | |
2373 | __u8 reserved[16]; | |
32060e1b LB |
2374 | } __attribute__((packed)); |
2375 | ||
55489b6e | 2376 | static int |
c6e96010 | 2377 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
13935e2c | 2378 | u32 legacy_rate_mask, u8 *mcs_rates) |
32060e1b | 2379 | { |
55489b6e | 2380 | struct mwl8k_cmd_set_rate *cmd; |
32060e1b LB |
2381 | int rc; |
2382 | ||
2383 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2384 | if (cmd == NULL) | |
2385 | return -ENOMEM; | |
2386 | ||
55489b6e | 2387 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); |
32060e1b | 2388 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c6e96010 | 2389 | legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask); |
13935e2c | 2390 | memcpy(cmd->mcs_set, mcs_rates, 16); |
32060e1b LB |
2391 | |
2392 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2393 | kfree(cmd); | |
2394 | ||
2395 | return rc; | |
2396 | } | |
2397 | ||
a66098da | 2398 | /* |
55489b6e | 2399 | * CMD_FINALIZE_JOIN. |
a66098da | 2400 | */ |
55489b6e LB |
2401 | #define MWL8K_FJ_BEACON_MAXLEN 128 |
2402 | ||
2403 | struct mwl8k_cmd_finalize_join { | |
a66098da | 2404 | struct mwl8k_cmd_pkt header; |
55489b6e LB |
2405 | __le32 sleep_interval; /* Number of beacon periods to sleep */ |
2406 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; | |
a66098da LB |
2407 | } __attribute__((packed)); |
2408 | ||
55489b6e LB |
2409 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, |
2410 | int framelen, int dtim) | |
a66098da | 2411 | { |
55489b6e LB |
2412 | struct mwl8k_cmd_finalize_join *cmd; |
2413 | struct ieee80211_mgmt *payload = frame; | |
2414 | int payload_len; | |
a66098da LB |
2415 | int rc; |
2416 | ||
2417 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2418 | if (cmd == NULL) | |
2419 | return -ENOMEM; | |
2420 | ||
55489b6e | 2421 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN); |
a66098da | 2422 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2423 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); |
2424 | ||
2425 | payload_len = framelen - ieee80211_hdrlen(payload->frame_control); | |
2426 | if (payload_len < 0) | |
2427 | payload_len = 0; | |
2428 | else if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | |
2429 | payload_len = MWL8K_FJ_BEACON_MAXLEN; | |
2430 | ||
2431 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); | |
a66098da LB |
2432 | |
2433 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2434 | kfree(cmd); | |
2435 | ||
2436 | return rc; | |
2437 | } | |
2438 | ||
2439 | /* | |
55489b6e | 2440 | * CMD_SET_RTS_THRESHOLD. |
a66098da | 2441 | */ |
55489b6e | 2442 | struct mwl8k_cmd_set_rts_threshold { |
a66098da LB |
2443 | struct mwl8k_cmd_pkt header; |
2444 | __le16 action; | |
55489b6e | 2445 | __le16 threshold; |
a66098da LB |
2446 | } __attribute__((packed)); |
2447 | ||
c2c2b12a LB |
2448 | static int |
2449 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) | |
a66098da | 2450 | { |
55489b6e | 2451 | struct mwl8k_cmd_set_rts_threshold *cmd; |
a66098da LB |
2452 | int rc; |
2453 | ||
2454 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2455 | if (cmd == NULL) | |
2456 | return -ENOMEM; | |
2457 | ||
55489b6e | 2458 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD); |
a66098da | 2459 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c2c2b12a LB |
2460 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
2461 | cmd->threshold = cpu_to_le16(rts_thresh); | |
a66098da LB |
2462 | |
2463 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2464 | kfree(cmd); | |
2465 | ||
a66098da LB |
2466 | return rc; |
2467 | } | |
2468 | ||
2469 | /* | |
55489b6e | 2470 | * CMD_SET_SLOT. |
a66098da | 2471 | */ |
55489b6e | 2472 | struct mwl8k_cmd_set_slot { |
a66098da LB |
2473 | struct mwl8k_cmd_pkt header; |
2474 | __le16 action; | |
55489b6e | 2475 | __u8 short_slot; |
a66098da LB |
2476 | } __attribute__((packed)); |
2477 | ||
55489b6e | 2478 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) |
a66098da | 2479 | { |
55489b6e | 2480 | struct mwl8k_cmd_set_slot *cmd; |
a66098da LB |
2481 | int rc; |
2482 | ||
2483 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2484 | if (cmd == NULL) | |
2485 | return -ENOMEM; | |
2486 | ||
55489b6e | 2487 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT); |
a66098da | 2488 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2489 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
2490 | cmd->short_slot = short_slot_time; | |
a66098da LB |
2491 | |
2492 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2493 | kfree(cmd); | |
2494 | ||
2495 | return rc; | |
2496 | } | |
2497 | ||
2498 | /* | |
2499 | * CMD_SET_EDCA_PARAMS. | |
2500 | */ | |
2501 | struct mwl8k_cmd_set_edca_params { | |
2502 | struct mwl8k_cmd_pkt header; | |
2503 | ||
2504 | /* See MWL8K_SET_EDCA_XXX below */ | |
2505 | __le16 action; | |
2506 | ||
2507 | /* TX opportunity in units of 32 us */ | |
2508 | __le16 txop; | |
2509 | ||
2e484c89 LB |
2510 | union { |
2511 | struct { | |
2512 | /* Log exponent of max contention period: 0...15 */ | |
2513 | __le32 log_cw_max; | |
2514 | ||
2515 | /* Log exponent of min contention period: 0...15 */ | |
2516 | __le32 log_cw_min; | |
2517 | ||
2518 | /* Adaptive interframe spacing in units of 32us */ | |
2519 | __u8 aifs; | |
2520 | ||
2521 | /* TX queue to configure */ | |
2522 | __u8 txq; | |
2523 | } ap; | |
2524 | struct { | |
2525 | /* Log exponent of max contention period: 0...15 */ | |
2526 | __u8 log_cw_max; | |
a66098da | 2527 | |
2e484c89 LB |
2528 | /* Log exponent of min contention period: 0...15 */ |
2529 | __u8 log_cw_min; | |
a66098da | 2530 | |
2e484c89 LB |
2531 | /* Adaptive interframe spacing in units of 32us */ |
2532 | __u8 aifs; | |
a66098da | 2533 | |
2e484c89 LB |
2534 | /* TX queue to configure */ |
2535 | __u8 txq; | |
2536 | } sta; | |
2537 | }; | |
a66098da LB |
2538 | } __attribute__((packed)); |
2539 | ||
a66098da LB |
2540 | #define MWL8K_SET_EDCA_CW 0x01 |
2541 | #define MWL8K_SET_EDCA_TXOP 0x02 | |
2542 | #define MWL8K_SET_EDCA_AIFS 0x04 | |
2543 | ||
2544 | #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \ | |
2545 | MWL8K_SET_EDCA_TXOP | \ | |
2546 | MWL8K_SET_EDCA_AIFS) | |
2547 | ||
2548 | static int | |
55489b6e LB |
2549 | mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, |
2550 | __u16 cw_min, __u16 cw_max, | |
2551 | __u8 aifs, __u16 txop) | |
a66098da | 2552 | { |
2e484c89 | 2553 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2554 | struct mwl8k_cmd_set_edca_params *cmd; |
a66098da LB |
2555 | int rc; |
2556 | ||
2557 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2558 | if (cmd == NULL) | |
2559 | return -ENOMEM; | |
2560 | ||
a66098da LB |
2561 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS); |
2562 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2563 | cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL); |
2564 | cmd->txop = cpu_to_le16(txop); | |
2e484c89 LB |
2565 | if (priv->ap_fw) { |
2566 | cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1)); | |
2567 | cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1)); | |
2568 | cmd->ap.aifs = aifs; | |
2569 | cmd->ap.txq = qnum; | |
2570 | } else { | |
2571 | cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1); | |
2572 | cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1); | |
2573 | cmd->sta.aifs = aifs; | |
2574 | cmd->sta.txq = qnum; | |
2575 | } | |
a66098da LB |
2576 | |
2577 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2578 | kfree(cmd); | |
2579 | ||
2580 | return rc; | |
2581 | } | |
2582 | ||
2583 | /* | |
55489b6e | 2584 | * CMD_SET_WMM_MODE. |
a66098da | 2585 | */ |
55489b6e | 2586 | struct mwl8k_cmd_set_wmm_mode { |
a66098da | 2587 | struct mwl8k_cmd_pkt header; |
55489b6e | 2588 | __le16 action; |
a66098da LB |
2589 | } __attribute__((packed)); |
2590 | ||
55489b6e | 2591 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) |
a66098da | 2592 | { |
55489b6e LB |
2593 | struct mwl8k_priv *priv = hw->priv; |
2594 | struct mwl8k_cmd_set_wmm_mode *cmd; | |
a66098da LB |
2595 | int rc; |
2596 | ||
a66098da LB |
2597 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2598 | if (cmd == NULL) | |
2599 | return -ENOMEM; | |
2600 | ||
55489b6e | 2601 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE); |
a66098da | 2602 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e | 2603 | cmd->action = cpu_to_le16(!!enable); |
a66098da LB |
2604 | |
2605 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2606 | kfree(cmd); | |
16cec43d | 2607 | |
55489b6e LB |
2608 | if (!rc) |
2609 | priv->wmm_enabled = enable; | |
a66098da LB |
2610 | |
2611 | return rc; | |
2612 | } | |
2613 | ||
2614 | /* | |
55489b6e | 2615 | * CMD_MIMO_CONFIG. |
a66098da | 2616 | */ |
55489b6e LB |
2617 | struct mwl8k_cmd_mimo_config { |
2618 | struct mwl8k_cmd_pkt header; | |
2619 | __le32 action; | |
2620 | __u8 rx_antenna_map; | |
2621 | __u8 tx_antenna_map; | |
a66098da LB |
2622 | } __attribute__((packed)); |
2623 | ||
55489b6e | 2624 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) |
a66098da | 2625 | { |
55489b6e | 2626 | struct mwl8k_cmd_mimo_config *cmd; |
a66098da LB |
2627 | int rc; |
2628 | ||
2629 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2630 | if (cmd == NULL) | |
2631 | return -ENOMEM; | |
2632 | ||
55489b6e | 2633 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG); |
a66098da | 2634 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2635 | cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET); |
2636 | cmd->rx_antenna_map = rx; | |
2637 | cmd->tx_antenna_map = tx; | |
a66098da LB |
2638 | |
2639 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2640 | kfree(cmd); | |
2641 | ||
2642 | return rc; | |
2643 | } | |
2644 | ||
2645 | /* | |
b71ed2c6 | 2646 | * CMD_USE_FIXED_RATE (STA version). |
a66098da | 2647 | */ |
b71ed2c6 LB |
2648 | struct mwl8k_cmd_use_fixed_rate_sta { |
2649 | struct mwl8k_cmd_pkt header; | |
2650 | __le32 action; | |
2651 | __le32 allow_rate_drop; | |
2652 | __le32 num_rates; | |
2653 | struct { | |
2654 | __le32 is_ht_rate; | |
2655 | __le32 enable_retry; | |
2656 | __le32 rate; | |
2657 | __le32 retry_count; | |
2658 | } rate_entry[8]; | |
2659 | __le32 rate_type; | |
2660 | __le32 reserved1; | |
2661 | __le32 reserved2; | |
a66098da LB |
2662 | } __attribute__((packed)); |
2663 | ||
b71ed2c6 LB |
2664 | #define MWL8K_USE_AUTO_RATE 0x0002 |
2665 | #define MWL8K_UCAST_RATE 0 | |
a66098da | 2666 | |
b71ed2c6 | 2667 | static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw) |
a66098da | 2668 | { |
b71ed2c6 | 2669 | struct mwl8k_cmd_use_fixed_rate_sta *cmd; |
a66098da LB |
2670 | int rc; |
2671 | ||
2672 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2673 | if (cmd == NULL) | |
2674 | return -ENOMEM; | |
2675 | ||
2676 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
2677 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
b71ed2c6 LB |
2678 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); |
2679 | cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE); | |
a66098da LB |
2680 | |
2681 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2682 | kfree(cmd); | |
2683 | ||
2684 | return rc; | |
2685 | } | |
2686 | ||
088aab8b LB |
2687 | /* |
2688 | * CMD_USE_FIXED_RATE (AP version). | |
2689 | */ | |
2690 | struct mwl8k_cmd_use_fixed_rate_ap { | |
2691 | struct mwl8k_cmd_pkt header; | |
2692 | __le32 action; | |
2693 | __le32 allow_rate_drop; | |
2694 | __le32 num_rates; | |
2695 | struct mwl8k_rate_entry_ap { | |
2696 | __le32 is_ht_rate; | |
2697 | __le32 enable_retry; | |
2698 | __le32 rate; | |
2699 | __le32 retry_count; | |
2700 | } rate_entry[4]; | |
2701 | u8 multicast_rate; | |
2702 | u8 multicast_rate_type; | |
2703 | u8 management_rate; | |
2704 | } __attribute__((packed)); | |
2705 | ||
2706 | static int | |
2707 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | |
2708 | { | |
2709 | struct mwl8k_cmd_use_fixed_rate_ap *cmd; | |
2710 | int rc; | |
2711 | ||
2712 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2713 | if (cmd == NULL) | |
2714 | return -ENOMEM; | |
2715 | ||
2716 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
2717 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2718 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); | |
2719 | cmd->multicast_rate = mcast; | |
2720 | cmd->management_rate = mgmt; | |
2721 | ||
2722 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2723 | kfree(cmd); | |
2724 | ||
2725 | return rc; | |
2726 | } | |
2727 | ||
55489b6e LB |
2728 | /* |
2729 | * CMD_ENABLE_SNIFFER. | |
2730 | */ | |
2731 | struct mwl8k_cmd_enable_sniffer { | |
2732 | struct mwl8k_cmd_pkt header; | |
2733 | __le32 action; | |
2734 | } __attribute__((packed)); | |
2735 | ||
2736 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) | |
2737 | { | |
2738 | struct mwl8k_cmd_enable_sniffer *cmd; | |
2739 | int rc; | |
2740 | ||
2741 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2742 | if (cmd == NULL) | |
2743 | return -ENOMEM; | |
2744 | ||
2745 | cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER); | |
2746 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2747 | cmd->action = cpu_to_le32(!!enable); | |
2748 | ||
2749 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2750 | kfree(cmd); | |
2751 | ||
2752 | return rc; | |
2753 | } | |
2754 | ||
2755 | /* | |
2756 | * CMD_SET_MAC_ADDR. | |
2757 | */ | |
2758 | struct mwl8k_cmd_set_mac_addr { | |
2759 | struct mwl8k_cmd_pkt header; | |
2760 | union { | |
2761 | struct { | |
2762 | __le16 mac_type; | |
2763 | __u8 mac_addr[ETH_ALEN]; | |
2764 | } mbss; | |
2765 | __u8 mac_addr[ETH_ALEN]; | |
2766 | }; | |
2767 | } __attribute__((packed)); | |
2768 | ||
ee0ddf18 LB |
2769 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 |
2770 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 | |
2771 | #define MWL8K_MAC_TYPE_PRIMARY_AP 2 | |
2772 | #define MWL8K_MAC_TYPE_SECONDARY_AP 3 | |
a9e00b15 | 2773 | |
aa21d0f6 LB |
2774 | static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, |
2775 | struct ieee80211_vif *vif, u8 *mac) | |
55489b6e LB |
2776 | { |
2777 | struct mwl8k_priv *priv = hw->priv; | |
ee0ddf18 | 2778 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
55489b6e | 2779 | struct mwl8k_cmd_set_mac_addr *cmd; |
ee0ddf18 | 2780 | int mac_type; |
55489b6e LB |
2781 | int rc; |
2782 | ||
ee0ddf18 LB |
2783 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; |
2784 | if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) { | |
2785 | if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported)) | |
2786 | mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT; | |
2787 | else | |
2788 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
2789 | } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) { | |
2790 | if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported)) | |
2791 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; | |
2792 | else | |
2793 | mac_type = MWL8K_MAC_TYPE_SECONDARY_AP; | |
2794 | } | |
2795 | ||
55489b6e LB |
2796 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2797 | if (cmd == NULL) | |
2798 | return -ENOMEM; | |
2799 | ||
2800 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR); | |
2801 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2802 | if (priv->ap_fw) { | |
ee0ddf18 | 2803 | cmd->mbss.mac_type = cpu_to_le16(mac_type); |
55489b6e LB |
2804 | memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN); |
2805 | } else { | |
2806 | memcpy(cmd->mac_addr, mac, ETH_ALEN); | |
2807 | } | |
2808 | ||
aa21d0f6 | 2809 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
55489b6e LB |
2810 | kfree(cmd); |
2811 | ||
2812 | return rc; | |
2813 | } | |
2814 | ||
2815 | /* | |
2816 | * CMD_SET_RATEADAPT_MODE. | |
2817 | */ | |
2818 | struct mwl8k_cmd_set_rate_adapt_mode { | |
2819 | struct mwl8k_cmd_pkt header; | |
2820 | __le16 action; | |
2821 | __le16 mode; | |
2822 | } __attribute__((packed)); | |
2823 | ||
2824 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | |
2825 | { | |
2826 | struct mwl8k_cmd_set_rate_adapt_mode *cmd; | |
2827 | int rc; | |
2828 | ||
2829 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2830 | if (cmd == NULL) | |
2831 | return -ENOMEM; | |
2832 | ||
2833 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE); | |
2834 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2835 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2836 | cmd->mode = cpu_to_le16(mode); | |
2837 | ||
2838 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2839 | kfree(cmd); | |
2840 | ||
2841 | return rc; | |
2842 | } | |
2843 | ||
b64fe619 LB |
2844 | /* |
2845 | * CMD_BSS_START. | |
2846 | */ | |
2847 | struct mwl8k_cmd_bss_start { | |
2848 | struct mwl8k_cmd_pkt header; | |
2849 | __le32 enable; | |
2850 | } __attribute__((packed)); | |
2851 | ||
aa21d0f6 LB |
2852 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, |
2853 | struct ieee80211_vif *vif, int enable) | |
b64fe619 LB |
2854 | { |
2855 | struct mwl8k_cmd_bss_start *cmd; | |
2856 | int rc; | |
2857 | ||
2858 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2859 | if (cmd == NULL) | |
2860 | return -ENOMEM; | |
2861 | ||
2862 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START); | |
2863 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2864 | cmd->enable = cpu_to_le32(enable); | |
2865 | ||
aa21d0f6 | 2866 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2867 | kfree(cmd); |
2868 | ||
2869 | return rc; | |
2870 | } | |
2871 | ||
3f5610ff LB |
2872 | /* |
2873 | * CMD_SET_NEW_STN. | |
2874 | */ | |
2875 | struct mwl8k_cmd_set_new_stn { | |
2876 | struct mwl8k_cmd_pkt header; | |
2877 | __le16 aid; | |
2878 | __u8 mac_addr[6]; | |
2879 | __le16 stn_id; | |
2880 | __le16 action; | |
2881 | __le16 rsvd; | |
2882 | __le32 legacy_rates; | |
2883 | __u8 ht_rates[4]; | |
2884 | __le16 cap_info; | |
2885 | __le16 ht_capabilities_info; | |
2886 | __u8 mac_ht_param_info; | |
2887 | __u8 rev; | |
2888 | __u8 control_channel; | |
2889 | __u8 add_channel; | |
2890 | __le16 op_mode; | |
2891 | __le16 stbc; | |
2892 | __u8 add_qos_info; | |
2893 | __u8 is_qos_sta; | |
2894 | __le32 fw_sta_ptr; | |
2895 | } __attribute__((packed)); | |
2896 | ||
2897 | #define MWL8K_STA_ACTION_ADD 0 | |
2898 | #define MWL8K_STA_ACTION_REMOVE 2 | |
2899 | ||
2900 | static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw, | |
2901 | struct ieee80211_vif *vif, | |
2902 | struct ieee80211_sta *sta) | |
2903 | { | |
2904 | struct mwl8k_cmd_set_new_stn *cmd; | |
8707d026 | 2905 | u32 rates; |
3f5610ff LB |
2906 | int rc; |
2907 | ||
2908 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2909 | if (cmd == NULL) | |
2910 | return -ENOMEM; | |
2911 | ||
2912 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
2913 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2914 | cmd->aid = cpu_to_le16(sta->aid); | |
2915 | memcpy(cmd->mac_addr, sta->addr, ETH_ALEN); | |
2916 | cmd->stn_id = cpu_to_le16(sta->aid); | |
2917 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD); | |
8707d026 LB |
2918 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
2919 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
2920 | else | |
2921 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
2922 | cmd->legacy_rates = cpu_to_le32(rates); | |
3f5610ff LB |
2923 | if (sta->ht_cap.ht_supported) { |
2924 | cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0]; | |
2925 | cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1]; | |
2926 | cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2]; | |
2927 | cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3]; | |
2928 | cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap); | |
2929 | cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) | | |
2930 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
2931 | cmd->is_qos_sta = 1; | |
2932 | } | |
2933 | ||
aa21d0f6 | 2934 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
2935 | kfree(cmd); |
2936 | ||
2937 | return rc; | |
2938 | } | |
2939 | ||
b64fe619 LB |
2940 | static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw, |
2941 | struct ieee80211_vif *vif) | |
2942 | { | |
2943 | struct mwl8k_cmd_set_new_stn *cmd; | |
2944 | int rc; | |
2945 | ||
2946 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2947 | if (cmd == NULL) | |
2948 | return -ENOMEM; | |
2949 | ||
2950 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
2951 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2952 | memcpy(cmd->mac_addr, vif->addr, ETH_ALEN); | |
2953 | ||
aa21d0f6 | 2954 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2955 | kfree(cmd); |
2956 | ||
2957 | return rc; | |
2958 | } | |
2959 | ||
3f5610ff LB |
2960 | static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw, |
2961 | struct ieee80211_vif *vif, u8 *addr) | |
2962 | { | |
2963 | struct mwl8k_cmd_set_new_stn *cmd; | |
2964 | int rc; | |
2965 | ||
2966 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2967 | if (cmd == NULL) | |
2968 | return -ENOMEM; | |
2969 | ||
2970 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
2971 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2972 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
2973 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE); | |
2974 | ||
aa21d0f6 | 2975 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
2976 | kfree(cmd); |
2977 | ||
2978 | return rc; | |
2979 | } | |
2980 | ||
55489b6e LB |
2981 | /* |
2982 | * CMD_UPDATE_STADB. | |
2983 | */ | |
25d81b1e LB |
2984 | struct ewc_ht_info { |
2985 | __le16 control1; | |
2986 | __le16 control2; | |
2987 | __le16 control3; | |
2988 | } __attribute__((packed)); | |
2989 | ||
2990 | struct peer_capability_info { | |
2991 | /* Peer type - AP vs. STA. */ | |
2992 | __u8 peer_type; | |
2993 | ||
2994 | /* Basic 802.11 capabilities from assoc resp. */ | |
2995 | __le16 basic_caps; | |
2996 | ||
2997 | /* Set if peer supports 802.11n high throughput (HT). */ | |
2998 | __u8 ht_support; | |
2999 | ||
3000 | /* Valid if HT is supported. */ | |
3001 | __le16 ht_caps; | |
3002 | __u8 extended_ht_caps; | |
3003 | struct ewc_ht_info ewc_info; | |
3004 | ||
3005 | /* Legacy rate table. Intersection of our rates and peer rates. */ | |
3006 | __u8 legacy_rates[12]; | |
3007 | ||
3008 | /* HT rate table. Intersection of our rates and peer rates. */ | |
3009 | __u8 ht_rates[16]; | |
3010 | __u8 pad[16]; | |
3011 | ||
3012 | /* If set, interoperability mode, no proprietary extensions. */ | |
3013 | __u8 interop; | |
3014 | __u8 pad2; | |
3015 | __u8 station_id; | |
3016 | __le16 amsdu_enabled; | |
3017 | } __attribute__((packed)); | |
3018 | ||
55489b6e LB |
3019 | struct mwl8k_cmd_update_stadb { |
3020 | struct mwl8k_cmd_pkt header; | |
3021 | ||
3022 | /* See STADB_ACTION_TYPE */ | |
3023 | __le32 action; | |
3024 | ||
3025 | /* Peer MAC address */ | |
3026 | __u8 peer_addr[ETH_ALEN]; | |
3027 | ||
3028 | __le32 reserved; | |
3029 | ||
3030 | /* Peer info - valid during add/update. */ | |
3031 | struct peer_capability_info peer_info; | |
3032 | } __attribute__((packed)); | |
3033 | ||
a680400e LB |
3034 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 |
3035 | #define MWL8K_STA_DB_DEL_ENTRY 2 | |
3036 | ||
3037 | /* Peer Entry flags - used to define the type of the peer node */ | |
3038 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | |
3039 | ||
3040 | static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw, | |
c6e96010 | 3041 | struct ieee80211_vif *vif, |
13935e2c | 3042 | struct ieee80211_sta *sta) |
55489b6e | 3043 | { |
55489b6e | 3044 | struct mwl8k_cmd_update_stadb *cmd; |
a680400e | 3045 | struct peer_capability_info *p; |
8707d026 | 3046 | u32 rates; |
55489b6e LB |
3047 | int rc; |
3048 | ||
3049 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3050 | if (cmd == NULL) | |
3051 | return -ENOMEM; | |
3052 | ||
3053 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
3054 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a680400e | 3055 | cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY); |
13935e2c | 3056 | memcpy(cmd->peer_addr, sta->addr, ETH_ALEN); |
55489b6e | 3057 | |
a680400e LB |
3058 | p = &cmd->peer_info; |
3059 | p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; | |
3060 | p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability); | |
13935e2c LB |
3061 | p->ht_support = sta->ht_cap.ht_supported; |
3062 | p->ht_caps = sta->ht_cap.cap; | |
3063 | p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) | | |
3064 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
8707d026 LB |
3065 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
3066 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
3067 | else | |
3068 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3069 | legacy_rate_mask_to_array(p->legacy_rates, rates); | |
13935e2c | 3070 | memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16); |
a680400e LB |
3071 | p->interop = 1; |
3072 | p->amsdu_enabled = 0; | |
3073 | ||
3074 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3075 | kfree(cmd); | |
3076 | ||
3077 | return rc ? rc : p->station_id; | |
3078 | } | |
3079 | ||
3080 | static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw, | |
3081 | struct ieee80211_vif *vif, u8 *addr) | |
3082 | { | |
3083 | struct mwl8k_cmd_update_stadb *cmd; | |
3084 | int rc; | |
3085 | ||
3086 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3087 | if (cmd == NULL) | |
3088 | return -ENOMEM; | |
3089 | ||
3090 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
3091 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3092 | cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY); | |
bbfd9128 | 3093 | memcpy(cmd->peer_addr, addr, ETH_ALEN); |
55489b6e | 3094 | |
a680400e | 3095 | rc = mwl8k_post_cmd(hw, &cmd->header); |
55489b6e LB |
3096 | kfree(cmd); |
3097 | ||
3098 | return rc; | |
3099 | } | |
3100 | ||
a66098da LB |
3101 | |
3102 | /* | |
3103 | * Interrupt handling. | |
3104 | */ | |
3105 | static irqreturn_t mwl8k_interrupt(int irq, void *dev_id) | |
3106 | { | |
3107 | struct ieee80211_hw *hw = dev_id; | |
3108 | struct mwl8k_priv *priv = hw->priv; | |
3109 | u32 status; | |
3110 | ||
3111 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
a66098da LB |
3112 | if (!status) |
3113 | return IRQ_NONE; | |
3114 | ||
1e9f9de3 LB |
3115 | if (status & MWL8K_A2H_INT_TX_DONE) { |
3116 | status &= ~MWL8K_A2H_INT_TX_DONE; | |
3117 | tasklet_schedule(&priv->poll_tx_task); | |
3118 | } | |
3119 | ||
a66098da | 3120 | if (status & MWL8K_A2H_INT_RX_READY) { |
67e2eb27 LB |
3121 | status &= ~MWL8K_A2H_INT_RX_READY; |
3122 | tasklet_schedule(&priv->poll_rx_task); | |
a66098da LB |
3123 | } |
3124 | ||
67e2eb27 LB |
3125 | if (status) |
3126 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
3127 | ||
a66098da | 3128 | if (status & MWL8K_A2H_INT_OPC_DONE) { |
618952a7 | 3129 | if (priv->hostcmd_wait != NULL) |
a66098da | 3130 | complete(priv->hostcmd_wait); |
a66098da LB |
3131 | } |
3132 | ||
3133 | if (status & MWL8K_A2H_INT_QUEUE_EMPTY) { | |
618952a7 | 3134 | if (!mutex_is_locked(&priv->fw_mutex) && |
88de754a | 3135 | priv->radio_on && priv->pending_tx_pkts) |
618952a7 | 3136 | mwl8k_tx_start(priv); |
a66098da LB |
3137 | } |
3138 | ||
3139 | return IRQ_HANDLED; | |
3140 | } | |
3141 | ||
1e9f9de3 LB |
3142 | static void mwl8k_tx_poll(unsigned long data) |
3143 | { | |
3144 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
3145 | struct mwl8k_priv *priv = hw->priv; | |
3146 | int limit; | |
3147 | int i; | |
3148 | ||
3149 | limit = 32; | |
3150 | ||
3151 | spin_lock_bh(&priv->tx_lock); | |
3152 | ||
3153 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
3154 | limit -= mwl8k_txq_reclaim(hw, i, limit, 0); | |
3155 | ||
3156 | if (!priv->pending_tx_pkts && priv->tx_wait != NULL) { | |
3157 | complete(priv->tx_wait); | |
3158 | priv->tx_wait = NULL; | |
3159 | } | |
3160 | ||
3161 | spin_unlock_bh(&priv->tx_lock); | |
3162 | ||
3163 | if (limit) { | |
3164 | writel(~MWL8K_A2H_INT_TX_DONE, | |
3165 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
3166 | } else { | |
3167 | tasklet_schedule(&priv->poll_tx_task); | |
3168 | } | |
3169 | } | |
3170 | ||
67e2eb27 LB |
3171 | static void mwl8k_rx_poll(unsigned long data) |
3172 | { | |
3173 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
3174 | struct mwl8k_priv *priv = hw->priv; | |
3175 | int limit; | |
3176 | ||
3177 | limit = 32; | |
3178 | limit -= rxq_process(hw, 0, limit); | |
3179 | limit -= rxq_refill(hw, 0, limit); | |
3180 | ||
3181 | if (limit) { | |
3182 | writel(~MWL8K_A2H_INT_RX_READY, | |
3183 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
3184 | } else { | |
3185 | tasklet_schedule(&priv->poll_rx_task); | |
3186 | } | |
3187 | } | |
3188 | ||
a66098da LB |
3189 | |
3190 | /* | |
3191 | * Core driver operations. | |
3192 | */ | |
3193 | static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | |
3194 | { | |
3195 | struct mwl8k_priv *priv = hw->priv; | |
3196 | int index = skb_get_queue_mapping(skb); | |
3197 | int rc; | |
3198 | ||
9189c100 | 3199 | if (!priv->radio_on) { |
a66098da | 3200 | printk(KERN_DEBUG "%s: dropped TX frame since radio " |
c2c357ce | 3201 | "disabled\n", wiphy_name(hw->wiphy)); |
a66098da LB |
3202 | dev_kfree_skb(skb); |
3203 | return NETDEV_TX_OK; | |
3204 | } | |
3205 | ||
3206 | rc = mwl8k_txq_xmit(hw, index, skb); | |
3207 | ||
3208 | return rc; | |
3209 | } | |
3210 | ||
a66098da LB |
3211 | static int mwl8k_start(struct ieee80211_hw *hw) |
3212 | { | |
a66098da LB |
3213 | struct mwl8k_priv *priv = hw->priv; |
3214 | int rc; | |
3215 | ||
a0607fd3 | 3216 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
3217 | IRQF_SHARED, MWL8K_NAME, hw); |
3218 | if (rc) { | |
3219 | printk(KERN_ERR "%s: failed to register IRQ handler\n", | |
c2c357ce | 3220 | wiphy_name(hw->wiphy)); |
2ec610cb | 3221 | return -EIO; |
a66098da LB |
3222 | } |
3223 | ||
67e2eb27 | 3224 | /* Enable TX reclaim and RX tasklets. */ |
1e9f9de3 | 3225 | tasklet_enable(&priv->poll_tx_task); |
67e2eb27 | 3226 | tasklet_enable(&priv->poll_rx_task); |
2ec610cb | 3227 | |
a66098da | 3228 | /* Enable interrupts */ |
c23b5a69 | 3229 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da | 3230 | |
2ec610cb LB |
3231 | rc = mwl8k_fw_lock(hw); |
3232 | if (!rc) { | |
55489b6e | 3233 | rc = mwl8k_cmd_radio_enable(hw); |
a66098da | 3234 | |
5e4cf166 LB |
3235 | if (!priv->ap_fw) { |
3236 | if (!rc) | |
55489b6e | 3237 | rc = mwl8k_cmd_enable_sniffer(hw, 0); |
a66098da | 3238 | |
5e4cf166 LB |
3239 | if (!rc) |
3240 | rc = mwl8k_cmd_set_pre_scan(hw); | |
3241 | ||
3242 | if (!rc) | |
3243 | rc = mwl8k_cmd_set_post_scan(hw, | |
3244 | "\x00\x00\x00\x00\x00\x00"); | |
3245 | } | |
2ec610cb LB |
3246 | |
3247 | if (!rc) | |
55489b6e | 3248 | rc = mwl8k_cmd_set_rateadapt_mode(hw, 0); |
a66098da | 3249 | |
2ec610cb | 3250 | if (!rc) |
55489b6e | 3251 | rc = mwl8k_cmd_set_wmm_mode(hw, 0); |
a66098da | 3252 | |
2ec610cb LB |
3253 | mwl8k_fw_unlock(hw); |
3254 | } | |
3255 | ||
3256 | if (rc) { | |
3257 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | |
3258 | free_irq(priv->pdev->irq, hw); | |
1e9f9de3 | 3259 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 3260 | tasklet_disable(&priv->poll_rx_task); |
2ec610cb | 3261 | } |
a66098da LB |
3262 | |
3263 | return rc; | |
3264 | } | |
3265 | ||
a66098da LB |
3266 | static void mwl8k_stop(struct ieee80211_hw *hw) |
3267 | { | |
a66098da LB |
3268 | struct mwl8k_priv *priv = hw->priv; |
3269 | int i; | |
3270 | ||
55489b6e | 3271 | mwl8k_cmd_radio_disable(hw); |
a66098da LB |
3272 | |
3273 | ieee80211_stop_queues(hw); | |
3274 | ||
a66098da | 3275 | /* Disable interrupts */ |
a66098da | 3276 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
3277 | free_irq(priv->pdev->irq, hw); |
3278 | ||
3279 | /* Stop finalize join worker */ | |
3280 | cancel_work_sync(&priv->finalize_join_worker); | |
3281 | if (priv->beacon_skb != NULL) | |
3282 | dev_kfree_skb(priv->beacon_skb); | |
3283 | ||
67e2eb27 | 3284 | /* Stop TX reclaim and RX tasklets. */ |
1e9f9de3 | 3285 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 3286 | tasklet_disable(&priv->poll_rx_task); |
a66098da | 3287 | |
a66098da LB |
3288 | /* Return all skbs to mac80211 */ |
3289 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
efb7c49a | 3290 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da LB |
3291 | } |
3292 | ||
3293 | static int mwl8k_add_interface(struct ieee80211_hw *hw, | |
f5bb87cf | 3294 | struct ieee80211_vif *vif) |
a66098da LB |
3295 | { |
3296 | struct mwl8k_priv *priv = hw->priv; | |
3297 | struct mwl8k_vif *mwl8k_vif; | |
ee0ddf18 LB |
3298 | u32 macids_supported; |
3299 | int macid; | |
a66098da | 3300 | |
a43c49a8 LB |
3301 | /* |
3302 | * Reject interface creation if sniffer mode is active, as | |
3303 | * STA operation is mutually exclusive with hardware sniffer | |
b64fe619 | 3304 | * mode. (Sniffer mode is only used on STA firmware.) |
a43c49a8 LB |
3305 | */ |
3306 | if (priv->sniffer_enabled) { | |
3307 | printk(KERN_INFO "%s: unable to create STA " | |
3308 | "interface due to sniffer mode being enabled\n", | |
3309 | wiphy_name(hw->wiphy)); | |
3310 | return -EINVAL; | |
3311 | } | |
3312 | ||
ee0ddf18 LB |
3313 | |
3314 | switch (vif->type) { | |
3315 | case NL80211_IFTYPE_AP: | |
3316 | macids_supported = priv->ap_macids_supported; | |
3317 | break; | |
3318 | case NL80211_IFTYPE_STATION: | |
3319 | macids_supported = priv->sta_macids_supported; | |
3320 | break; | |
3321 | default: | |
3322 | return -EINVAL; | |
3323 | } | |
3324 | ||
3325 | macid = ffs(macids_supported & ~priv->macids_used); | |
3326 | if (!macid--) | |
3327 | return -EBUSY; | |
3328 | ||
f5bb87cf | 3329 | /* Setup driver private area. */ |
1ed32e4f | 3330 | mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 3331 | memset(mwl8k_vif, 0, sizeof(*mwl8k_vif)); |
f5bb87cf | 3332 | mwl8k_vif->vif = vif; |
ee0ddf18 | 3333 | mwl8k_vif->macid = macid; |
a66098da LB |
3334 | mwl8k_vif->seqno = 0; |
3335 | ||
aa21d0f6 LB |
3336 | /* Set the mac address. */ |
3337 | mwl8k_cmd_set_mac_addr(hw, vif, vif->addr); | |
3338 | ||
3339 | if (priv->ap_fw) | |
3340 | mwl8k_cmd_set_new_stn_add_self(hw, vif); | |
3341 | ||
ee0ddf18 | 3342 | priv->macids_used |= 1 << mwl8k_vif->macid; |
f5bb87cf | 3343 | list_add_tail(&mwl8k_vif->list, &priv->vif_list); |
a66098da LB |
3344 | |
3345 | return 0; | |
3346 | } | |
3347 | ||
3348 | static void mwl8k_remove_interface(struct ieee80211_hw *hw, | |
1ed32e4f | 3349 | struct ieee80211_vif *vif) |
a66098da LB |
3350 | { |
3351 | struct mwl8k_priv *priv = hw->priv; | |
f5bb87cf | 3352 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 3353 | |
b64fe619 LB |
3354 | if (priv->ap_fw) |
3355 | mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr); | |
3356 | ||
aa21d0f6 | 3357 | mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 3358 | |
ee0ddf18 | 3359 | priv->macids_used &= ~(1 << mwl8k_vif->macid); |
f5bb87cf | 3360 | list_del(&mwl8k_vif->list); |
a66098da LB |
3361 | } |
3362 | ||
ee03a932 | 3363 | static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) |
a66098da | 3364 | { |
a66098da LB |
3365 | struct ieee80211_conf *conf = &hw->conf; |
3366 | struct mwl8k_priv *priv = hw->priv; | |
ee03a932 | 3367 | int rc; |
a66098da | 3368 | |
7595d67a | 3369 | if (conf->flags & IEEE80211_CONF_IDLE) { |
55489b6e | 3370 | mwl8k_cmd_radio_disable(hw); |
ee03a932 | 3371 | return 0; |
7595d67a LB |
3372 | } |
3373 | ||
ee03a932 LB |
3374 | rc = mwl8k_fw_lock(hw); |
3375 | if (rc) | |
3376 | return rc; | |
a66098da | 3377 | |
55489b6e | 3378 | rc = mwl8k_cmd_radio_enable(hw); |
ee03a932 LB |
3379 | if (rc) |
3380 | goto out; | |
a66098da | 3381 | |
610677d2 | 3382 | rc = mwl8k_cmd_set_rf_channel(hw, conf); |
ee03a932 LB |
3383 | if (rc) |
3384 | goto out; | |
3385 | ||
a66098da LB |
3386 | if (conf->power_level > 18) |
3387 | conf->power_level = 18; | |
55489b6e | 3388 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); |
ee03a932 LB |
3389 | if (rc) |
3390 | goto out; | |
a66098da | 3391 | |
08b06347 LB |
3392 | if (priv->ap_fw) { |
3393 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7); | |
3394 | if (!rc) | |
3395 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); | |
3396 | } else { | |
3397 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); | |
3398 | } | |
a66098da | 3399 | |
ee03a932 LB |
3400 | out: |
3401 | mwl8k_fw_unlock(hw); | |
a66098da | 3402 | |
ee03a932 | 3403 | return rc; |
a66098da LB |
3404 | } |
3405 | ||
b64fe619 LB |
3406 | static void |
3407 | mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
3408 | struct ieee80211_bss_conf *info, u32 changed) | |
a66098da | 3409 | { |
a66098da | 3410 | struct mwl8k_priv *priv = hw->priv; |
c3cbbe8a | 3411 | u32 ap_legacy_rates; |
13935e2c | 3412 | u8 ap_mcs_rates[16]; |
3a980d0a LB |
3413 | int rc; |
3414 | ||
c3cbbe8a | 3415 | if (mwl8k_fw_lock(hw)) |
3a980d0a | 3416 | return; |
a66098da | 3417 | |
c3cbbe8a LB |
3418 | /* |
3419 | * No need to capture a beacon if we're no longer associated. | |
3420 | */ | |
3421 | if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc) | |
3422 | priv->capture_beacon = false; | |
3a980d0a | 3423 | |
c3cbbe8a | 3424 | /* |
13935e2c | 3425 | * Get the AP's legacy and MCS rates. |
c3cbbe8a | 3426 | */ |
7dc6a7a7 | 3427 | if (vif->bss_conf.assoc) { |
c6e96010 | 3428 | struct ieee80211_sta *ap; |
c97470dd | 3429 | |
c6e96010 | 3430 | rcu_read_lock(); |
c6e96010 | 3431 | |
c3cbbe8a LB |
3432 | ap = ieee80211_find_sta(vif, vif->bss_conf.bssid); |
3433 | if (ap == NULL) { | |
3434 | rcu_read_unlock(); | |
c6e96010 | 3435 | goto out; |
c3cbbe8a LB |
3436 | } |
3437 | ||
8707d026 LB |
3438 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) { |
3439 | ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ]; | |
3440 | } else { | |
3441 | ap_legacy_rates = | |
3442 | ap->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3443 | } | |
13935e2c | 3444 | memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16); |
c3cbbe8a LB |
3445 | |
3446 | rcu_read_unlock(); | |
3447 | } | |
c6e96010 | 3448 | |
c3cbbe8a | 3449 | if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) { |
13935e2c | 3450 | rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates); |
3a980d0a LB |
3451 | if (rc) |
3452 | goto out; | |
a66098da | 3453 | |
b71ed2c6 | 3454 | rc = mwl8k_cmd_use_fixed_rate_sta(hw); |
3a980d0a LB |
3455 | if (rc) |
3456 | goto out; | |
c3cbbe8a | 3457 | } |
a66098da | 3458 | |
c3cbbe8a | 3459 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
7dc6a7a7 LB |
3460 | rc = mwl8k_set_radio_preamble(hw, |
3461 | vif->bss_conf.use_short_preamble); | |
3a980d0a LB |
3462 | if (rc) |
3463 | goto out; | |
c3cbbe8a | 3464 | } |
a66098da | 3465 | |
c3cbbe8a | 3466 | if (changed & BSS_CHANGED_ERP_SLOT) { |
7dc6a7a7 | 3467 | rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot); |
3a980d0a LB |
3468 | if (rc) |
3469 | goto out; | |
c3cbbe8a | 3470 | } |
a66098da | 3471 | |
c97470dd LB |
3472 | if (vif->bss_conf.assoc && |
3473 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT | | |
3474 | BSS_CHANGED_HT))) { | |
c3cbbe8a | 3475 | rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates); |
3a980d0a LB |
3476 | if (rc) |
3477 | goto out; | |
c3cbbe8a | 3478 | } |
a66098da | 3479 | |
c3cbbe8a LB |
3480 | if (vif->bss_conf.assoc && |
3481 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) { | |
a66098da LB |
3482 | /* |
3483 | * Finalize the join. Tell rx handler to process | |
3484 | * next beacon from our BSSID. | |
3485 | */ | |
0a11dfc3 | 3486 | memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 3487 | priv->capture_beacon = true; |
a66098da LB |
3488 | } |
3489 | ||
3a980d0a LB |
3490 | out: |
3491 | mwl8k_fw_unlock(hw); | |
a66098da LB |
3492 | } |
3493 | ||
b64fe619 LB |
3494 | static void |
3495 | mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
3496 | struct ieee80211_bss_conf *info, u32 changed) | |
3497 | { | |
3498 | int rc; | |
3499 | ||
3500 | if (mwl8k_fw_lock(hw)) | |
3501 | return; | |
3502 | ||
3503 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | |
3504 | rc = mwl8k_set_radio_preamble(hw, | |
3505 | vif->bss_conf.use_short_preamble); | |
3506 | if (rc) | |
3507 | goto out; | |
3508 | } | |
3509 | ||
3510 | if (changed & BSS_CHANGED_BASIC_RATES) { | |
3511 | int idx; | |
3512 | int rate; | |
3513 | ||
3514 | /* | |
3515 | * Use lowest supported basic rate for multicasts | |
3516 | * and management frames (such as probe responses -- | |
3517 | * beacons will always go out at 1 Mb/s). | |
3518 | */ | |
3519 | idx = ffs(vif->bss_conf.basic_rates); | |
8707d026 LB |
3520 | if (idx) |
3521 | idx--; | |
3522 | ||
3523 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) | |
3524 | rate = mwl8k_rates_24[idx].hw_value; | |
3525 | else | |
3526 | rate = mwl8k_rates_50[idx].hw_value; | |
b64fe619 LB |
3527 | |
3528 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); | |
3529 | } | |
3530 | ||
3531 | if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) { | |
3532 | struct sk_buff *skb; | |
3533 | ||
3534 | skb = ieee80211_beacon_get(hw, vif); | |
3535 | if (skb != NULL) { | |
aa21d0f6 | 3536 | mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); |
b64fe619 LB |
3537 | kfree_skb(skb); |
3538 | } | |
3539 | } | |
3540 | ||
3541 | if (changed & BSS_CHANGED_BEACON_ENABLED) | |
aa21d0f6 | 3542 | mwl8k_cmd_bss_start(hw, vif, info->enable_beacon); |
b64fe619 LB |
3543 | |
3544 | out: | |
3545 | mwl8k_fw_unlock(hw); | |
3546 | } | |
3547 | ||
3548 | static void | |
3549 | mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
3550 | struct ieee80211_bss_conf *info, u32 changed) | |
3551 | { | |
3552 | struct mwl8k_priv *priv = hw->priv; | |
3553 | ||
3554 | if (!priv->ap_fw) | |
3555 | mwl8k_bss_info_changed_sta(hw, vif, info, changed); | |
3556 | else | |
3557 | mwl8k_bss_info_changed_ap(hw, vif, info, changed); | |
3558 | } | |
3559 | ||
e81cd2d6 LB |
3560 | static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw, |
3561 | int mc_count, struct dev_addr_list *mclist) | |
3562 | { | |
3563 | struct mwl8k_cmd_pkt *cmd; | |
3564 | ||
447ced07 LB |
3565 | /* |
3566 | * Synthesize and return a command packet that programs the | |
3567 | * hardware multicast address filter. At this point we don't | |
3568 | * know whether FIF_ALLMULTI is being requested, but if it is, | |
3569 | * we'll end up throwing this packet away and creating a new | |
3570 | * one in mwl8k_configure_filter(). | |
3571 | */ | |
3572 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist); | |
e81cd2d6 LB |
3573 | |
3574 | return (unsigned long)cmd; | |
3575 | } | |
3576 | ||
a43c49a8 LB |
3577 | static int |
3578 | mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw, | |
3579 | unsigned int changed_flags, | |
3580 | unsigned int *total_flags) | |
3581 | { | |
3582 | struct mwl8k_priv *priv = hw->priv; | |
3583 | ||
3584 | /* | |
3585 | * Hardware sniffer mode is mutually exclusive with STA | |
3586 | * operation, so refuse to enable sniffer mode if a STA | |
3587 | * interface is active. | |
3588 | */ | |
f5bb87cf | 3589 | if (!list_empty(&priv->vif_list)) { |
a43c49a8 LB |
3590 | if (net_ratelimit()) |
3591 | printk(KERN_INFO "%s: not enabling sniffer " | |
3592 | "mode because STA interface is active\n", | |
3593 | wiphy_name(hw->wiphy)); | |
3594 | return 0; | |
3595 | } | |
3596 | ||
3597 | if (!priv->sniffer_enabled) { | |
55489b6e | 3598 | if (mwl8k_cmd_enable_sniffer(hw, 1)) |
a43c49a8 LB |
3599 | return 0; |
3600 | priv->sniffer_enabled = true; | |
3601 | } | |
3602 | ||
3603 | *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI | | |
3604 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL | | |
3605 | FIF_OTHER_BSS; | |
3606 | ||
3607 | return 1; | |
3608 | } | |
3609 | ||
f5bb87cf LB |
3610 | static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv) |
3611 | { | |
3612 | if (!list_empty(&priv->vif_list)) | |
3613 | return list_entry(priv->vif_list.next, struct mwl8k_vif, list); | |
3614 | ||
3615 | return NULL; | |
3616 | } | |
3617 | ||
e6935ea1 LB |
3618 | static void mwl8k_configure_filter(struct ieee80211_hw *hw, |
3619 | unsigned int changed_flags, | |
3620 | unsigned int *total_flags, | |
3621 | u64 multicast) | |
3622 | { | |
3623 | struct mwl8k_priv *priv = hw->priv; | |
a43c49a8 LB |
3624 | struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast; |
3625 | ||
c0adae2c LB |
3626 | /* |
3627 | * AP firmware doesn't allow fine-grained control over | |
3628 | * the receive filter. | |
3629 | */ | |
3630 | if (priv->ap_fw) { | |
3631 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; | |
3632 | kfree(cmd); | |
3633 | return; | |
3634 | } | |
3635 | ||
a43c49a8 LB |
3636 | /* |
3637 | * Enable hardware sniffer mode if FIF_CONTROL or | |
3638 | * FIF_OTHER_BSS is requested. | |
3639 | */ | |
3640 | if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) && | |
3641 | mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) { | |
3642 | kfree(cmd); | |
3643 | return; | |
3644 | } | |
a66098da | 3645 | |
e6935ea1 | 3646 | /* Clear unsupported feature flags */ |
447ced07 | 3647 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; |
a66098da | 3648 | |
90852f7a LB |
3649 | if (mwl8k_fw_lock(hw)) { |
3650 | kfree(cmd); | |
e6935ea1 | 3651 | return; |
90852f7a | 3652 | } |
a66098da | 3653 | |
a43c49a8 | 3654 | if (priv->sniffer_enabled) { |
55489b6e | 3655 | mwl8k_cmd_enable_sniffer(hw, 0); |
a43c49a8 LB |
3656 | priv->sniffer_enabled = false; |
3657 | } | |
3658 | ||
e6935ea1 | 3659 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { |
77165d88 LB |
3660 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { |
3661 | /* | |
3662 | * Disable the BSS filter. | |
3663 | */ | |
e6935ea1 | 3664 | mwl8k_cmd_set_pre_scan(hw); |
77165d88 | 3665 | } else { |
f5bb87cf | 3666 | struct mwl8k_vif *mwl8k_vif; |
0a11dfc3 | 3667 | const u8 *bssid; |
a94cc97e | 3668 | |
77165d88 LB |
3669 | /* |
3670 | * Enable the BSS filter. | |
3671 | * | |
3672 | * If there is an active STA interface, use that | |
3673 | * interface's BSSID, otherwise use a dummy one | |
3674 | * (where the OUI part needs to be nonzero for | |
3675 | * the BSSID to be accepted by POST_SCAN). | |
3676 | */ | |
f5bb87cf LB |
3677 | mwl8k_vif = mwl8k_first_vif(priv); |
3678 | if (mwl8k_vif != NULL) | |
3679 | bssid = mwl8k_vif->vif->bss_conf.bssid; | |
3680 | else | |
3681 | bssid = "\x01\x00\x00\x00\x00\x00"; | |
a94cc97e | 3682 | |
e6935ea1 | 3683 | mwl8k_cmd_set_post_scan(hw, bssid); |
a66098da LB |
3684 | } |
3685 | } | |
3686 | ||
447ced07 LB |
3687 | /* |
3688 | * If FIF_ALLMULTI is being requested, throw away the command | |
3689 | * packet that ->prepare_multicast() built and replace it with | |
3690 | * a command packet that enables reception of all multicast | |
3691 | * packets. | |
3692 | */ | |
3693 | if (*total_flags & FIF_ALLMULTI) { | |
3694 | kfree(cmd); | |
3695 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL); | |
3696 | } | |
3697 | ||
3698 | if (cmd != NULL) { | |
3699 | mwl8k_post_cmd(hw, cmd); | |
3700 | kfree(cmd); | |
e6935ea1 | 3701 | } |
a66098da | 3702 | |
e6935ea1 | 3703 | mwl8k_fw_unlock(hw); |
a66098da LB |
3704 | } |
3705 | ||
a66098da LB |
3706 | static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
3707 | { | |
c2c2b12a | 3708 | return mwl8k_cmd_set_rts_threshold(hw, value); |
a66098da LB |
3709 | } |
3710 | ||
bbfd9128 LB |
3711 | struct mwl8k_sta_notify_item |
3712 | { | |
3713 | struct list_head list; | |
3714 | struct ieee80211_vif *vif; | |
3715 | enum sta_notify_cmd cmd; | |
13935e2c | 3716 | struct ieee80211_sta sta; |
bbfd9128 LB |
3717 | }; |
3718 | ||
3f5610ff LB |
3719 | static void |
3720 | mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s) | |
3721 | { | |
3722 | struct mwl8k_priv *priv = hw->priv; | |
3723 | ||
3724 | /* | |
3725 | * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN. | |
3726 | */ | |
3727 | if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) { | |
3728 | int rc; | |
3729 | ||
3730 | rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta); | |
3731 | if (rc >= 0) { | |
3732 | struct ieee80211_sta *sta; | |
3733 | ||
3734 | rcu_read_lock(); | |
3735 | sta = ieee80211_find_sta(s->vif, s->sta.addr); | |
3736 | if (sta != NULL) | |
3737 | MWL8K_STA(sta)->peer_id = rc; | |
3738 | rcu_read_unlock(); | |
3739 | } | |
3740 | } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) { | |
3741 | mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr); | |
3742 | } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) { | |
3743 | mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta); | |
3744 | } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) { | |
3745 | mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr); | |
3746 | } | |
3747 | } | |
3748 | ||
bbfd9128 LB |
3749 | static void mwl8k_sta_notify_worker(struct work_struct *work) |
3750 | { | |
3751 | struct mwl8k_priv *priv = | |
3752 | container_of(work, struct mwl8k_priv, sta_notify_worker); | |
a680400e | 3753 | struct ieee80211_hw *hw = priv->hw; |
bbfd9128 LB |
3754 | |
3755 | spin_lock_bh(&priv->sta_notify_list_lock); | |
3756 | while (!list_empty(&priv->sta_notify_list)) { | |
3757 | struct mwl8k_sta_notify_item *s; | |
bbfd9128 LB |
3758 | |
3759 | s = list_entry(priv->sta_notify_list.next, | |
3760 | struct mwl8k_sta_notify_item, list); | |
3761 | list_del(&s->list); | |
3762 | ||
3763 | spin_unlock_bh(&priv->sta_notify_list_lock); | |
3764 | ||
3f5610ff | 3765 | mwl8k_do_sta_notify(hw, s); |
bbfd9128 LB |
3766 | kfree(s); |
3767 | ||
3768 | spin_lock_bh(&priv->sta_notify_list_lock); | |
3769 | } | |
3770 | spin_unlock_bh(&priv->sta_notify_list_lock); | |
3771 | } | |
3772 | ||
3773 | static void | |
3774 | mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
3775 | enum sta_notify_cmd cmd, struct ieee80211_sta *sta) | |
3776 | { | |
3777 | struct mwl8k_priv *priv = hw->priv; | |
3778 | struct mwl8k_sta_notify_item *s; | |
3779 | ||
3780 | if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE) | |
3781 | return; | |
3782 | ||
3783 | s = kmalloc(sizeof(*s), GFP_ATOMIC); | |
3784 | if (s != NULL) { | |
3785 | s->vif = vif; | |
3786 | s->cmd = cmd; | |
13935e2c | 3787 | s->sta = *sta; |
bbfd9128 LB |
3788 | |
3789 | spin_lock(&priv->sta_notify_list_lock); | |
3790 | list_add_tail(&s->list, &priv->sta_notify_list); | |
3791 | spin_unlock(&priv->sta_notify_list_lock); | |
3792 | ||
3793 | ieee80211_queue_work(hw, &priv->sta_notify_worker); | |
3794 | } | |
3795 | } | |
3796 | ||
a66098da LB |
3797 | static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue, |
3798 | const struct ieee80211_tx_queue_params *params) | |
3799 | { | |
3e4f542c | 3800 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 3801 | int rc; |
a66098da | 3802 | |
3e4f542c LB |
3803 | rc = mwl8k_fw_lock(hw); |
3804 | if (!rc) { | |
3805 | if (!priv->wmm_enabled) | |
55489b6e | 3806 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); |
a66098da | 3807 | |
3e4f542c | 3808 | if (!rc) |
55489b6e LB |
3809 | rc = mwl8k_cmd_set_edca_params(hw, queue, |
3810 | params->cw_min, | |
3811 | params->cw_max, | |
3812 | params->aifs, | |
3813 | params->txop); | |
3e4f542c LB |
3814 | |
3815 | mwl8k_fw_unlock(hw); | |
a66098da | 3816 | } |
3e4f542c | 3817 | |
a66098da LB |
3818 | return rc; |
3819 | } | |
3820 | ||
3821 | static int mwl8k_get_tx_stats(struct ieee80211_hw *hw, | |
3822 | struct ieee80211_tx_queue_stats *stats) | |
3823 | { | |
3824 | struct mwl8k_priv *priv = hw->priv; | |
3825 | struct mwl8k_tx_queue *txq; | |
3826 | int index; | |
3827 | ||
3828 | spin_lock_bh(&priv->tx_lock); | |
3829 | for (index = 0; index < MWL8K_TX_QUEUES; index++) { | |
3830 | txq = priv->txq + index; | |
45eb400d | 3831 | memcpy(&stats[index], &txq->stats, |
a66098da LB |
3832 | sizeof(struct ieee80211_tx_queue_stats)); |
3833 | } | |
3834 | spin_unlock_bh(&priv->tx_lock); | |
a66098da | 3835 | |
954ef509 | 3836 | return 0; |
a66098da LB |
3837 | } |
3838 | ||
3839 | static int mwl8k_get_stats(struct ieee80211_hw *hw, | |
3840 | struct ieee80211_low_level_stats *stats) | |
3841 | { | |
55489b6e | 3842 | return mwl8k_cmd_get_stat(hw, stats); |
a66098da LB |
3843 | } |
3844 | ||
a2292d83 LB |
3845 | static int |
3846 | mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
3847 | enum ieee80211_ampdu_mlme_action action, | |
3848 | struct ieee80211_sta *sta, u16 tid, u16 *ssn) | |
3849 | { | |
3850 | switch (action) { | |
3851 | case IEEE80211_AMPDU_RX_START: | |
3852 | case IEEE80211_AMPDU_RX_STOP: | |
3853 | if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION)) | |
3854 | return -ENOTSUPP; | |
3855 | return 0; | |
3856 | default: | |
3857 | return -ENOTSUPP; | |
3858 | } | |
3859 | } | |
3860 | ||
a66098da LB |
3861 | static const struct ieee80211_ops mwl8k_ops = { |
3862 | .tx = mwl8k_tx, | |
3863 | .start = mwl8k_start, | |
3864 | .stop = mwl8k_stop, | |
3865 | .add_interface = mwl8k_add_interface, | |
3866 | .remove_interface = mwl8k_remove_interface, | |
3867 | .config = mwl8k_config, | |
a66098da | 3868 | .bss_info_changed = mwl8k_bss_info_changed, |
3ac64bee | 3869 | .prepare_multicast = mwl8k_prepare_multicast, |
a66098da LB |
3870 | .configure_filter = mwl8k_configure_filter, |
3871 | .set_rts_threshold = mwl8k_set_rts_threshold, | |
bbfd9128 | 3872 | .sta_notify = mwl8k_sta_notify, |
a66098da LB |
3873 | .conf_tx = mwl8k_conf_tx, |
3874 | .get_tx_stats = mwl8k_get_tx_stats, | |
3875 | .get_stats = mwl8k_get_stats, | |
a2292d83 | 3876 | .ampdu_action = mwl8k_ampdu_action, |
a66098da LB |
3877 | }; |
3878 | ||
a66098da LB |
3879 | static void mwl8k_finalize_join_worker(struct work_struct *work) |
3880 | { | |
3881 | struct mwl8k_priv *priv = | |
3882 | container_of(work, struct mwl8k_priv, finalize_join_worker); | |
3883 | struct sk_buff *skb = priv->beacon_skb; | |
56007a02 JB |
3884 | struct ieee80211_mgmt *mgmt = (void *)skb->data; |
3885 | int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable); | |
3886 | const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM, | |
3887 | mgmt->u.beacon.variable, len); | |
3888 | int dtim_period = 1; | |
3889 | ||
3890 | if (tim && tim[1] >= 2) | |
3891 | dtim_period = tim[3]; | |
a66098da | 3892 | |
56007a02 | 3893 | mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period); |
a66098da | 3894 | |
f5bb87cf | 3895 | dev_kfree_skb(skb); |
a66098da LB |
3896 | priv->beacon_skb = NULL; |
3897 | } | |
3898 | ||
bcb628d5 | 3899 | enum { |
9e1b17ea LB |
3900 | MWL8363 = 0, |
3901 | MWL8687, | |
bcb628d5 | 3902 | MWL8366, |
6f6d1e9a LB |
3903 | }; |
3904 | ||
bcb628d5 | 3905 | static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = { |
9e1b17ea LB |
3906 | [MWL8363] = { |
3907 | .part_name = "88w8363", | |
3908 | .helper_image = "mwl8k/helper_8363.fw", | |
3909 | .fw_image = "mwl8k/fmimage_8363.fw", | |
3910 | }, | |
49eb691c | 3911 | [MWL8687] = { |
bcb628d5 JL |
3912 | .part_name = "88w8687", |
3913 | .helper_image = "mwl8k/helper_8687.fw", | |
3914 | .fw_image = "mwl8k/fmimage_8687.fw", | |
bcb628d5 | 3915 | }, |
49eb691c | 3916 | [MWL8366] = { |
bcb628d5 JL |
3917 | .part_name = "88w8366", |
3918 | .helper_image = "mwl8k/helper_8366.fw", | |
3919 | .fw_image = "mwl8k/fmimage_8366.fw", | |
89a91f4f | 3920 | .ap_rxd_ops = &rxd_8366_ap_ops, |
bcb628d5 | 3921 | }, |
45a390dd LB |
3922 | }; |
3923 | ||
c92d4ede LB |
3924 | MODULE_FIRMWARE("mwl8k/helper_8363.fw"); |
3925 | MODULE_FIRMWARE("mwl8k/fmimage_8363.fw"); | |
3926 | MODULE_FIRMWARE("mwl8k/helper_8687.fw"); | |
3927 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); | |
3928 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); | |
3929 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); | |
3930 | ||
45a390dd | 3931 | static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { |
9e1b17ea LB |
3932 | { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, }, |
3933 | { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, }, | |
bcb628d5 JL |
3934 | { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, }, |
3935 | { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, }, | |
3936 | { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, }, | |
ca66527c | 3937 | { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, }, |
bcb628d5 | 3938 | { }, |
45a390dd LB |
3939 | }; |
3940 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); | |
3941 | ||
a66098da LB |
3942 | static int __devinit mwl8k_probe(struct pci_dev *pdev, |
3943 | const struct pci_device_id *id) | |
3944 | { | |
2aa7b01f | 3945 | static int printed_version = 0; |
a66098da LB |
3946 | struct ieee80211_hw *hw; |
3947 | struct mwl8k_priv *priv; | |
a66098da LB |
3948 | int rc; |
3949 | int i; | |
2aa7b01f LB |
3950 | |
3951 | if (!printed_version) { | |
3952 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | |
3953 | printed_version = 1; | |
3954 | } | |
a66098da | 3955 | |
be695fc4 | 3956 | |
a66098da LB |
3957 | rc = pci_enable_device(pdev); |
3958 | if (rc) { | |
3959 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | |
3960 | MWL8K_NAME); | |
3961 | return rc; | |
3962 | } | |
3963 | ||
3964 | rc = pci_request_regions(pdev, MWL8K_NAME); | |
3965 | if (rc) { | |
3966 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | |
3967 | MWL8K_NAME); | |
3db95e50 | 3968 | goto err_disable_device; |
a66098da LB |
3969 | } |
3970 | ||
3971 | pci_set_master(pdev); | |
3972 | ||
be695fc4 | 3973 | |
a66098da LB |
3974 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); |
3975 | if (hw == NULL) { | |
3976 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | |
3977 | rc = -ENOMEM; | |
3978 | goto err_free_reg; | |
3979 | } | |
3980 | ||
be695fc4 LB |
3981 | SET_IEEE80211_DEV(hw, &pdev->dev); |
3982 | pci_set_drvdata(pdev, hw); | |
3983 | ||
a66098da LB |
3984 | priv = hw->priv; |
3985 | priv->hw = hw; | |
3986 | priv->pdev = pdev; | |
bcb628d5 | 3987 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; |
a66098da | 3988 | |
a66098da | 3989 | |
5b9482dd LB |
3990 | priv->sram = pci_iomap(pdev, 0, 0x10000); |
3991 | if (priv->sram == NULL) { | |
3992 | printk(KERN_ERR "%s: Cannot map device SRAM\n", | |
c2c357ce | 3993 | wiphy_name(hw->wiphy)); |
a66098da LB |
3994 | goto err_iounmap; |
3995 | } | |
3996 | ||
5b9482dd LB |
3997 | /* |
3998 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | |
3999 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | |
4000 | */ | |
4001 | priv->regs = pci_iomap(pdev, 1, 0x10000); | |
4002 | if (priv->regs == NULL) { | |
4003 | priv->regs = pci_iomap(pdev, 2, 0x10000); | |
4004 | if (priv->regs == NULL) { | |
4005 | printk(KERN_ERR "%s: Cannot map device registers\n", | |
4006 | wiphy_name(hw->wiphy)); | |
4007 | goto err_iounmap; | |
4008 | } | |
4009 | } | |
4010 | ||
be695fc4 LB |
4011 | |
4012 | /* Reset firmware and hardware */ | |
4013 | mwl8k_hw_reset(priv); | |
4014 | ||
4015 | /* Ask userland hotplug daemon for the device firmware */ | |
4016 | rc = mwl8k_request_firmware(priv); | |
4017 | if (rc) { | |
4018 | printk(KERN_ERR "%s: Firmware files not found\n", | |
4019 | wiphy_name(hw->wiphy)); | |
4020 | goto err_stop_firmware; | |
4021 | } | |
4022 | ||
4023 | /* Load firmware into hardware */ | |
4024 | rc = mwl8k_load_firmware(hw); | |
4025 | if (rc) { | |
4026 | printk(KERN_ERR "%s: Cannot start firmware\n", | |
4027 | wiphy_name(hw->wiphy)); | |
4028 | goto err_stop_firmware; | |
4029 | } | |
4030 | ||
4031 | /* Reclaim memory once firmware is successfully loaded */ | |
4032 | mwl8k_release_firmware(priv); | |
4033 | ||
4034 | ||
91942230 | 4035 | if (priv->ap_fw) { |
89a91f4f | 4036 | priv->rxd_ops = priv->device_info->ap_rxd_ops; |
91942230 LB |
4037 | if (priv->rxd_ops == NULL) { |
4038 | printk(KERN_ERR "%s: Driver does not have AP " | |
4039 | "firmware image support for this hardware\n", | |
4040 | wiphy_name(hw->wiphy)); | |
4041 | goto err_stop_firmware; | |
4042 | } | |
4043 | } else { | |
89a91f4f | 4044 | priv->rxd_ops = &rxd_sta_ops; |
91942230 | 4045 | } |
be695fc4 LB |
4046 | |
4047 | priv->sniffer_enabled = false; | |
4048 | priv->wmm_enabled = false; | |
4049 | priv->pending_tx_pkts = 0; | |
4050 | ||
4051 | ||
a66098da LB |
4052 | /* |
4053 | * Extra headroom is the size of the required DMA header | |
4054 | * minus the size of the smallest 802.11 frame (CTS frame). | |
4055 | */ | |
4056 | hw->extra_tx_headroom = | |
4057 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | |
4058 | ||
4059 | hw->channel_change_time = 10; | |
4060 | ||
4061 | hw->queues = MWL8K_TX_QUEUES; | |
4062 | ||
a66098da | 4063 | /* Set rssi and noise values to dBm */ |
ce9e2e1b | 4064 | hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM; |
a66098da | 4065 | hw->vif_data_size = sizeof(struct mwl8k_vif); |
a680400e | 4066 | hw->sta_data_size = sizeof(struct mwl8k_sta); |
f5bb87cf | 4067 | |
ee0ddf18 | 4068 | priv->macids_used = 0; |
f5bb87cf | 4069 | INIT_LIST_HEAD(&priv->vif_list); |
a66098da LB |
4070 | |
4071 | /* Set default radio state and preamble */ | |
c46563b7 | 4072 | priv->radio_on = 0; |
68ce3884 | 4073 | priv->radio_short_preamble = 0; |
a66098da | 4074 | |
bbfd9128 LB |
4075 | /* Station database handling */ |
4076 | INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker); | |
4077 | spin_lock_init(&priv->sta_notify_list_lock); | |
4078 | INIT_LIST_HEAD(&priv->sta_notify_list); | |
4079 | ||
a66098da LB |
4080 | /* Finalize join worker */ |
4081 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | |
4082 | ||
67e2eb27 | 4083 | /* TX reclaim and RX tasklets. */ |
1e9f9de3 LB |
4084 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); |
4085 | tasklet_disable(&priv->poll_tx_task); | |
67e2eb27 LB |
4086 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); |
4087 | tasklet_disable(&priv->poll_rx_task); | |
a66098da | 4088 | |
a66098da LB |
4089 | /* Power management cookie */ |
4090 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | |
4091 | if (priv->cookie == NULL) | |
be695fc4 | 4092 | goto err_stop_firmware; |
a66098da LB |
4093 | |
4094 | rc = mwl8k_rxq_init(hw, 0); | |
4095 | if (rc) | |
be695fc4 | 4096 | goto err_free_cookie; |
a66098da LB |
4097 | rxq_refill(hw, 0, INT_MAX); |
4098 | ||
618952a7 LB |
4099 | mutex_init(&priv->fw_mutex); |
4100 | priv->fw_mutex_owner = NULL; | |
4101 | priv->fw_mutex_depth = 0; | |
618952a7 LB |
4102 | priv->hostcmd_wait = NULL; |
4103 | ||
a66098da LB |
4104 | spin_lock_init(&priv->tx_lock); |
4105 | ||
88de754a LB |
4106 | priv->tx_wait = NULL; |
4107 | ||
a66098da LB |
4108 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { |
4109 | rc = mwl8k_txq_init(hw, i); | |
4110 | if (rc) | |
4111 | goto err_free_queues; | |
4112 | } | |
4113 | ||
4114 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
c23b5a69 | 4115 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
67e2eb27 | 4116 | iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY, |
1e9f9de3 | 4117 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); |
a66098da LB |
4118 | iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); |
4119 | ||
a0607fd3 | 4120 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
4121 | IRQF_SHARED, MWL8K_NAME, hw); |
4122 | if (rc) { | |
4123 | printk(KERN_ERR "%s: failed to register IRQ handler\n", | |
c2c357ce | 4124 | wiphy_name(hw->wiphy)); |
a66098da LB |
4125 | goto err_free_queues; |
4126 | } | |
4127 | ||
a66098da LB |
4128 | /* |
4129 | * Temporarily enable interrupts. Initial firmware host | |
c2c2b12a | 4130 | * commands use interrupts and avoid polling. Disable |
a66098da LB |
4131 | * interrupts when done. |
4132 | */ | |
c23b5a69 | 4133 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4134 | |
4135 | /* Get config data, mac addrs etc */ | |
42fba21d LB |
4136 | if (priv->ap_fw) { |
4137 | rc = mwl8k_cmd_get_hw_spec_ap(hw); | |
4138 | if (!rc) | |
4139 | rc = mwl8k_cmd_set_hw_spec(hw); | |
4140 | } else { | |
4141 | rc = mwl8k_cmd_get_hw_spec_sta(hw); | |
4142 | } | |
a66098da | 4143 | if (rc) { |
c2c357ce LB |
4144 | printk(KERN_ERR "%s: Cannot initialise firmware\n", |
4145 | wiphy_name(hw->wiphy)); | |
be695fc4 | 4146 | goto err_free_irq; |
a66098da LB |
4147 | } |
4148 | ||
ee0ddf18 LB |
4149 | hw->wiphy->interface_modes = 0; |
4150 | if (priv->ap_macids_supported) | |
4151 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); | |
4152 | if (priv->sta_macids_supported) | |
4153 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | |
4154 | ||
4155 | ||
a66098da | 4156 | /* Turn radio off */ |
55489b6e | 4157 | rc = mwl8k_cmd_radio_disable(hw); |
a66098da | 4158 | if (rc) { |
c2c357ce | 4159 | printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy)); |
be695fc4 | 4160 | goto err_free_irq; |
a66098da LB |
4161 | } |
4162 | ||
32060e1b | 4163 | /* Clear MAC address */ |
aa21d0f6 | 4164 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); |
32060e1b LB |
4165 | if (rc) { |
4166 | printk(KERN_ERR "%s: Cannot clear MAC address\n", | |
4167 | wiphy_name(hw->wiphy)); | |
be695fc4 | 4168 | goto err_free_irq; |
32060e1b LB |
4169 | } |
4170 | ||
a66098da | 4171 | /* Disable interrupts */ |
a66098da | 4172 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4173 | free_irq(priv->pdev->irq, hw); |
4174 | ||
4175 | rc = ieee80211_register_hw(hw); | |
4176 | if (rc) { | |
c2c357ce LB |
4177 | printk(KERN_ERR "%s: Cannot register device\n", |
4178 | wiphy_name(hw->wiphy)); | |
153458ff | 4179 | goto err_free_queues; |
a66098da LB |
4180 | } |
4181 | ||
eae74e65 | 4182 | printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n", |
a74b295e | 4183 | wiphy_name(hw->wiphy), priv->device_info->part_name, |
45a390dd | 4184 | priv->hw_rev, hw->wiphy->perm_addr, |
eae74e65 | 4185 | priv->ap_fw ? "AP" : "STA", |
2aa7b01f LB |
4186 | (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff, |
4187 | (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff); | |
a66098da LB |
4188 | |
4189 | return 0; | |
4190 | ||
a66098da | 4191 | err_free_irq: |
a66098da | 4192 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4193 | free_irq(priv->pdev->irq, hw); |
4194 | ||
4195 | err_free_queues: | |
4196 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
4197 | mwl8k_txq_deinit(hw, i); | |
4198 | mwl8k_rxq_deinit(hw, 0); | |
4199 | ||
be695fc4 | 4200 | err_free_cookie: |
a66098da LB |
4201 | if (priv->cookie != NULL) |
4202 | pci_free_consistent(priv->pdev, 4, | |
4203 | priv->cookie, priv->cookie_dma); | |
4204 | ||
be695fc4 LB |
4205 | err_stop_firmware: |
4206 | mwl8k_hw_reset(priv); | |
4207 | mwl8k_release_firmware(priv); | |
4208 | ||
4209 | err_iounmap: | |
a66098da LB |
4210 | if (priv->regs != NULL) |
4211 | pci_iounmap(pdev, priv->regs); | |
4212 | ||
5b9482dd LB |
4213 | if (priv->sram != NULL) |
4214 | pci_iounmap(pdev, priv->sram); | |
4215 | ||
a66098da LB |
4216 | pci_set_drvdata(pdev, NULL); |
4217 | ieee80211_free_hw(hw); | |
4218 | ||
4219 | err_free_reg: | |
4220 | pci_release_regions(pdev); | |
3db95e50 LB |
4221 | |
4222 | err_disable_device: | |
a66098da LB |
4223 | pci_disable_device(pdev); |
4224 | ||
4225 | return rc; | |
4226 | } | |
4227 | ||
230f7af0 | 4228 | static void __devexit mwl8k_shutdown(struct pci_dev *pdev) |
a66098da LB |
4229 | { |
4230 | printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__); | |
4231 | } | |
4232 | ||
230f7af0 | 4233 | static void __devexit mwl8k_remove(struct pci_dev *pdev) |
a66098da LB |
4234 | { |
4235 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | |
4236 | struct mwl8k_priv *priv; | |
4237 | int i; | |
4238 | ||
4239 | if (hw == NULL) | |
4240 | return; | |
4241 | priv = hw->priv; | |
4242 | ||
4243 | ieee80211_stop_queues(hw); | |
4244 | ||
60aa569f LB |
4245 | ieee80211_unregister_hw(hw); |
4246 | ||
67e2eb27 | 4247 | /* Remove TX reclaim and RX tasklets. */ |
1e9f9de3 | 4248 | tasklet_kill(&priv->poll_tx_task); |
67e2eb27 | 4249 | tasklet_kill(&priv->poll_rx_task); |
a66098da | 4250 | |
a66098da LB |
4251 | /* Stop hardware */ |
4252 | mwl8k_hw_reset(priv); | |
4253 | ||
4254 | /* Return all skbs to mac80211 */ | |
4255 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
efb7c49a | 4256 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da | 4257 | |
a66098da LB |
4258 | for (i = 0; i < MWL8K_TX_QUEUES; i++) |
4259 | mwl8k_txq_deinit(hw, i); | |
4260 | ||
4261 | mwl8k_rxq_deinit(hw, 0); | |
4262 | ||
c2c357ce | 4263 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); |
a66098da LB |
4264 | |
4265 | pci_iounmap(pdev, priv->regs); | |
5b9482dd | 4266 | pci_iounmap(pdev, priv->sram); |
a66098da LB |
4267 | pci_set_drvdata(pdev, NULL); |
4268 | ieee80211_free_hw(hw); | |
4269 | pci_release_regions(pdev); | |
4270 | pci_disable_device(pdev); | |
4271 | } | |
4272 | ||
4273 | static struct pci_driver mwl8k_driver = { | |
4274 | .name = MWL8K_NAME, | |
45a390dd | 4275 | .id_table = mwl8k_pci_id_table, |
a66098da LB |
4276 | .probe = mwl8k_probe, |
4277 | .remove = __devexit_p(mwl8k_remove), | |
4278 | .shutdown = __devexit_p(mwl8k_shutdown), | |
4279 | }; | |
4280 | ||
4281 | static int __init mwl8k_init(void) | |
4282 | { | |
4283 | return pci_register_driver(&mwl8k_driver); | |
4284 | } | |
4285 | ||
4286 | static void __exit mwl8k_exit(void) | |
4287 | { | |
4288 | pci_unregister_driver(&mwl8k_driver); | |
4289 | } | |
4290 | ||
4291 | module_init(mwl8k_init); | |
4292 | module_exit(mwl8k_exit); | |
c2c357ce LB |
4293 | |
4294 | MODULE_DESCRIPTION(MWL8K_DESC); | |
4295 | MODULE_VERSION(MWL8K_VERSION); | |
4296 | MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>"); | |
4297 | MODULE_LICENSE("GPL"); |