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mwl8k: set ack policy to normal
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
CommitLineData
a66098da 1/*
ce9e2e1b
LB		 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
a66098da
LB		 6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
a6b7a407 13#include <linux/interrupt.h>
a66098da
LB		 14#include <linux/module.h>
15#include <linux/kernel.h>
3d76e82c 16#include <linux/sched.h>
a66098da
LB		 17#include <linux/spinlock.h>
18#include <linux/list.h>
19#include <linux/pci.h>
20#include <linux/delay.h>
21#include <linux/completion.h>
22#include <linux/etherdevice.h>
5a0e3ad6 23#include <linux/slab.h>
a66098da
LB		 24#include <net/mac80211.h>
25#include <linux/moduleparam.h>
26#include <linux/firmware.h>
27#include <linux/workqueue.h>
28
29#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
30#define MWL8K_NAME KBUILD_MODNAME
00e8e692 31#define MWL8K_VERSION "0.13"
a66098da 32
0863ade8 33/* Module parameters */
eb939922 34static bool ap_mode_default;
0863ade8
BC		 35module_param(ap_mode_default, bool, 0);
36MODULE_PARM_DESC(ap_mode_default,
37 "Set to 1 to make ap mode the default instead of sta mode");
38
a66098da
LB		 39/* Register definitions */
40#define MWL8K_HIU_GEN_PTR 0x00000c10
ce9e2e1b
LB		 41#define MWL8K_MODE_STA 0x0000005a
42#define MWL8K_MODE_AP 0x000000a5
a66098da 43#define MWL8K_HIU_INT_CODE 0x00000c14
ce9e2e1b
LB		 44#define MWL8K_FWSTA_READY 0xf0f1f2f4
45#define MWL8K_FWAP_READY 0xf1f2f4a5
46#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
a66098da
LB		 47#define MWL8K_HIU_SCRATCH 0x00000c40
48
49/* Host->device communications */
50#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
51#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
52#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
53#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
54#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
ce9e2e1b
LB		 55#define MWL8K_H2A_INT_DUMMY (1 << 20)
56#define MWL8K_H2A_INT_RESET (1 << 15)
57#define MWL8K_H2A_INT_DOORBELL (1 << 1)
58#define MWL8K_H2A_INT_PPA_READY (1 << 0)
a66098da
LB		 59
60/* Device->host communications */
61#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
62#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
63#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
64#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
65#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
ce9e2e1b 66#define MWL8K_A2H_INT_DUMMY (1 << 20)
3aefc37e 67#define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
ce9e2e1b
LB		 68#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
69#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
70#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
71#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
72#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
73#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
74#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
75#define MWL8K_A2H_INT_RX_READY (1 << 1)
76#define MWL8K_A2H_INT_TX_DONE (1 << 0)
a66098da 77
566875db
PN		 78/* HW micro second timer register
79 * located at offset 0xA600. This
80 * will be used to timestamp tx
81 * packets.
82 */
83
84#define MWL8K_HW_TIMER_REGISTER 0x0000a600
85
a66098da
LB		 86#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
87 MWL8K_A2H_INT_CHNL_SWITCHED | \
88 MWL8K_A2H_INT_QUEUE_EMPTY | \
89 MWL8K_A2H_INT_RADAR_DETECT | \
90 MWL8K_A2H_INT_RADIO_ON | \
91 MWL8K_A2H_INT_RADIO_OFF | \
92 MWL8K_A2H_INT_MAC_EVENT | \
93 MWL8K_A2H_INT_OPC_DONE | \
94 MWL8K_A2H_INT_RX_READY | \
3aefc37e
NS		 95 MWL8K_A2H_INT_TX_DONE | \
96 MWL8K_A2H_INT_BA_WATCHDOG)
a66098da 97
a66098da 98#define MWL8K_RX_QUEUES 1
e600707b 99#define MWL8K_TX_WMM_QUEUES 4
8a7a578c 100#define MWL8K_MAX_AMPDU_QUEUES 8
e600707b
BC		 101#define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
102#define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
a66098da 103
54bc3a0d
LB		 104struct rxd_ops {
105 int rxd_size;
106 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
107 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 108 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 109 __le16 *qos, s8 *noise);
54bc3a0d
LB		 110};
111
45a390dd 112struct mwl8k_device_info {
a74b295e
LB		 113 char *part_name;
114 char *helper_image;
0863ade8
BC		 115 char *fw_image_sta;
116 char *fw_image_ap;
89a91f4f 117 struct rxd_ops *ap_rxd_ops;
952a0e96 118 u32 fw_api_ap;
45a390dd
LB		 119};
120
a66098da 121struct mwl8k_rx_queue {
45eb400d 122 int rxd_count;
a66098da
LB		 123
124 /* hw receives here */
45eb400d 125 int head;
a66098da
LB		 126
127 /* refill descs here */
45eb400d 128 int tail;
a66098da 129
54bc3a0d 130 void *rxd;
45eb400d 131 dma_addr_t rxd_dma;
788838eb
LB		 132 struct {
133 struct sk_buff *skb;
53b1b3e1 134 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 135 } *buf;
a66098da
LB		 136};
137
a66098da
LB		 138struct mwl8k_tx_queue {
139 /* hw transmits here */
45eb400d 140 int head;
a66098da
LB		 141
142 /* sw appends here */
45eb400d 143 int tail;
a66098da 144
8ccbc3b8 145 unsigned int len;
45eb400d
LB		 146 struct mwl8k_tx_desc *txd;
147 dma_addr_t txd_dma;
148 struct sk_buff **skb;
a66098da
LB		 149};
150
ac109fd0
BC		 151enum {
152 AMPDU_NO_STREAM,
153 AMPDU_STREAM_NEW,
154 AMPDU_STREAM_IN_PROGRESS,
155 AMPDU_STREAM_ACTIVE,
156};
157
5faa1aff
NS		 158struct mwl8k_ampdu_stream {
159 struct ieee80211_sta *sta;
160 u8 tid;
161 u8 state;
162 u8 idx;
5faa1aff
NS		 163};
164
a66098da 165struct mwl8k_priv {
a66098da 166 struct ieee80211_hw *hw;
a66098da 167 struct pci_dev *pdev;
bf3ca7f7 168 int irq;
a66098da 169
45a390dd
LB		 170 struct mwl8k_device_info *device_info;
171
be695fc4
LB		 172 void __iomem *sram;
173 void __iomem *regs;
174
175 /* firmware */
d1f9e41d
BC		 176 const struct firmware *fw_helper;
177 const struct firmware *fw_ucode;
a66098da 178
be695fc4
LB		 179 /* hardware/firmware parameters */
180 bool ap_fw;
181 struct rxd_ops *rxd_ops;
777ad375
LB		 182 struct ieee80211_supported_band band_24;
183 struct ieee80211_channel channels_24[14];
184 struct ieee80211_rate rates_24[14];
4eae9edd
LB		 185 struct ieee80211_supported_band band_50;
186 struct ieee80211_channel channels_50[4];
187 struct ieee80211_rate rates_50[9];
ee0ddf18
LB		 188 u32 ap_macids_supported;
189 u32 sta_macids_supported;
be695fc4 190
8a7a578c
BC		 191 /* Ampdu stream information */
192 u8 num_ampdu_queues;
ac109fd0
BC		 193 spinlock_t stream_lock;
194 struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
3aefc37e 195 struct work_struct watchdog_ba_handle;
8a7a578c 196
618952a7
LB		 197 /* firmware access */
198 struct mutex fw_mutex;
199 struct task_struct *fw_mutex_owner;
6b6accc3 200 struct task_struct *hw_restart_owner;
618952a7 201 int fw_mutex_depth;
618952a7
LB		 202 struct completion *hostcmd_wait;
203
a66098da
LB		 204 /* lock held over TX and TX reap */
205 spinlock_t tx_lock;
a66098da 206
88de754a
LB		 207 /* TX quiesce completion, protected by fw_mutex and tx_lock */
208 struct completion *tx_wait;
209
f5bb87cf 210 /* List of interfaces. */
ee0ddf18 211 u32 macids_used;
f5bb87cf 212 struct list_head vif_list;
a66098da 213
a66098da
LB		 214 /* power management status cookie from firmware */
215 u32 *cookie;
216 dma_addr_t cookie_dma;
217
218 u16 num_mcaddrs;
a66098da 219 u8 hw_rev;
2aa7b01f 220 u32 fw_rev;
a66098da
LB		 221
222 /*
223 * Running count of TX packets in flight, to avoid
224 * iterating over the transmit rings each time.
225 */
226 int pending_tx_pkts;
227
228 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
e600707b
BC		 229 struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
230 u32 txq_offset[MWL8K_MAX_TX_QUEUES];
a66098da 231
c46563b7 232 bool radio_on;
68ce3884 233 bool radio_short_preamble;
a43c49a8 234 bool sniffer_enabled;
0439b1f5 235 bool wmm_enabled;
a66098da 236
a66098da
LB		 237 /* XXX need to convert this to handle multiple interfaces */
238 bool capture_beacon;
d89173f2 239 u8 capture_bssid[ETH_ALEN];
a66098da
LB		 240 struct sk_buff *beacon_skb;
241
242 /*
243 * This FJ worker has to be global as it is scheduled from the
244 * RX handler. At this point we don't know which interface it
245 * belongs to until the list of bssids waiting to complete join
246 * is checked.
247 */
248 struct work_struct finalize_join_worker;
249
1e9f9de3
LB		 250 /* Tasklet to perform TX reclaim. */
251 struct tasklet_struct poll_tx_task;
67e2eb27
LB		 252
253 /* Tasklet to perform RX. */
254 struct tasklet_struct poll_rx_task;
0d462bbb
JL		 255
256 /* Most recently reported noise in dBm */
257 s8 noise;
0863ade8
BC		 258
259 /*
260 * preserve the queue configurations so they can be restored if/when
261 * the firmware image is swapped.
262 */
e600707b 263 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
99020471 264
6b6accc3
YAP		 265 /* To perform the task of reloading the firmware */
266 struct work_struct fw_reload;
267 bool hw_restart_in_progress;
268
99020471
BC		 269 /* async firmware loading state */
270 unsigned fw_state;
271 char *fw_pref;
272 char *fw_alt;
273 struct completion firmware_loading_complete;
a66098da
LB		 274};
275
e53d9b96
NS		 276#define MAX_WEP_KEY_LEN 13
277#define NUM_WEP_KEYS 4
278
a66098da
LB		 279/* Per interface specific private data */
280struct mwl8k_vif {
f5bb87cf
LB		 281 struct list_head list;
282 struct ieee80211_vif *vif;
283
f57ca9c1
LB		 284 /* Firmware macid for this vif. */
285 int macid;
286
c2c2b12a 287 /* Non AMPDU sequence number assigned by driver. */
a680400e 288 u16 seqno;
e53d9b96
NS		 289
290 /* Saved WEP keys */
291 struct {
292 u8 enabled;
293 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
294 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS		 295
296 /* BSSID */
297 u8 bssid[ETH_ALEN];
298
299 /* A flag to indicate is HW crypto is enabled for this bssid */
300 bool is_hw_crypto_enabled;
a66098da 301};
a94cc97e 302#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 303#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 304
d0805c1c
BC		 305struct tx_traffic_info {
306 u32 start_time;
307 u32 pkts;
308};
309
310#define MWL8K_MAX_TID 8
a680400e
LB		 311struct mwl8k_sta {
312 /* Index into station database. Returned by UPDATE_STADB. */
313 u8 peer_id;
17033543 314 u8 is_ampdu_allowed;
d0805c1c 315 struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
a680400e
LB		 316};
317#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
318
777ad375 319static const struct ieee80211_channel mwl8k_channels_24[] = {
a66098da
LB		 320 { .center_freq = 2412, .hw_value = 1, },
321 { .center_freq = 2417, .hw_value = 2, },
322 { .center_freq = 2422, .hw_value = 3, },
323 { .center_freq = 2427, .hw_value = 4, },
324 { .center_freq = 2432, .hw_value = 5, },
325 { .center_freq = 2437, .hw_value = 6, },
326 { .center_freq = 2442, .hw_value = 7, },
327 { .center_freq = 2447, .hw_value = 8, },
328 { .center_freq = 2452, .hw_value = 9, },
329 { .center_freq = 2457, .hw_value = 10, },
330 { .center_freq = 2462, .hw_value = 11, },
647ca6b0
LB		 331 { .center_freq = 2467, .hw_value = 12, },
332 { .center_freq = 2472, .hw_value = 13, },
333 { .center_freq = 2484, .hw_value = 14, },
a66098da
LB		 334};
335
777ad375 336static const struct ieee80211_rate mwl8k_rates_24[] = {
a66098da
LB		 337 { .bitrate = 10, .hw_value = 2, },
338 { .bitrate = 20, .hw_value = 4, },
339 { .bitrate = 55, .hw_value = 11, },
5dfd3e2c
LB		 340 { .bitrate = 110, .hw_value = 22, },
341 { .bitrate = 220, .hw_value = 44, },
a66098da
LB		 342 { .bitrate = 60, .hw_value = 12, },
343 { .bitrate = 90, .hw_value = 18, },
a66098da
LB		 344 { .bitrate = 120, .hw_value = 24, },
345 { .bitrate = 180, .hw_value = 36, },
346 { .bitrate = 240, .hw_value = 48, },
347 { .bitrate = 360, .hw_value = 72, },
348 { .bitrate = 480, .hw_value = 96, },
349 { .bitrate = 540, .hw_value = 108, },
140eb5e2
LB		 350 { .bitrate = 720, .hw_value = 144, },
351};
352
4eae9edd
LB		 353static const struct ieee80211_channel mwl8k_channels_50[] = {
354 { .center_freq = 5180, .hw_value = 36, },
355 { .center_freq = 5200, .hw_value = 40, },
356 { .center_freq = 5220, .hw_value = 44, },
357 { .center_freq = 5240, .hw_value = 48, },
358};
359
360static const struct ieee80211_rate mwl8k_rates_50[] = {
361 { .bitrate = 60, .hw_value = 12, },
362 { .bitrate = 90, .hw_value = 18, },
363 { .bitrate = 120, .hw_value = 24, },
364 { .bitrate = 180, .hw_value = 36, },
365 { .bitrate = 240, .hw_value = 48, },
366 { .bitrate = 360, .hw_value = 72, },
367 { .bitrate = 480, .hw_value = 96, },
368 { .bitrate = 540, .hw_value = 108, },
369 { .bitrate = 720, .hw_value = 144, },
370};
371
a66098da 372/* Set or get info from Firmware */
a66098da 373#define MWL8K_CMD_GET 0x0000
41fdf097
NS		 374#define MWL8K_CMD_SET 0x0001
375#define MWL8K_CMD_SET_LIST 0x0002
a66098da
LB		 376
377/* Firmware command codes */
378#define MWL8K_CMD_CODE_DNLD 0x0001
379#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 380#define MWL8K_CMD_SET_HW_SPEC 0x0004
a66098da
LB		 381#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
382#define MWL8K_CMD_GET_STAT 0x0014
ff45fc60
LB		 383#define MWL8K_CMD_RADIO_CONTROL 0x001c
384#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 385#define MWL8K_CMD_TX_POWER 0x001f
08b06347 386#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 387#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
a66098da
LB		 388#define MWL8K_CMD_SET_PRE_SCAN 0x0107
389#define MWL8K_CMD_SET_POST_SCAN 0x0108
ff45fc60
LB		 390#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
391#define MWL8K_CMD_SET_AID 0x010d
392#define MWL8K_CMD_SET_RATE 0x0110
393#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
394#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 395#define MWL8K_CMD_SET_SLOT 0x0114
ff45fc60
LB		 396#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
397#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 398#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 399#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 400#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 401#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 402#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
3aefc37e 403#define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
197a4e4e 404#define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */
aa21d0f6
LB		 405#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
406#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 407#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 408#define MWL8K_CMD_UPDATE_STADB 0x1123
5faa1aff 409#define MWL8K_CMD_BASTREAM 0x1125
a66098da 410
b603742f 411static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 412{
b603742f
JL		 413 u16 command = le16_to_cpu(cmd);
414
a66098da
LB		 415#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
416 snprintf(buf, bufsize, "%s", #x);\
417 return buf;\
418 } while (0)
b603742f 419 switch (command & ~0x8000) {
a66098da
LB		 420 MWL8K_CMDNAME(CODE_DNLD);
421 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 422 MWL8K_CMDNAME(SET_HW_SPEC);
a66098da
LB		 423 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
424 MWL8K_CMDNAME(GET_STAT);
425 MWL8K_CMDNAME(RADIO_CONTROL);
426 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 427 MWL8K_CMDNAME(TX_POWER);
08b06347 428 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 429 MWL8K_CMDNAME(SET_BEACON);
a66098da
LB		 430 MWL8K_CMDNAME(SET_PRE_SCAN);
431 MWL8K_CMDNAME(SET_POST_SCAN);
432 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
LB		 433 MWL8K_CMDNAME(SET_AID);
434 MWL8K_CMDNAME(SET_RATE);
435 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
436 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 437 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
LB		 438 MWL8K_CMDNAME(SET_EDCA_PARAMS);
439 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 440 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 441 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 442 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 443 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 444 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 445 MWL8K_CMDNAME(BSS_START);
3f5610ff 446 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 447 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 448 MWL8K_CMDNAME(UPDATE_STADB);
5faa1aff 449 MWL8K_CMDNAME(BASTREAM);
3aefc37e 450 MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
a66098da
LB		 451 default:
452 snprintf(buf, bufsize, "0x%x", cmd);
453 }
454#undef MWL8K_CMDNAME
455
456 return buf;
457}
458
459/* Hardware and firmware reset */
460static void mwl8k_hw_reset(struct mwl8k_priv *priv)
461{
462 iowrite32(MWL8K_H2A_INT_RESET,
463 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
464 iowrite32(MWL8K_H2A_INT_RESET,
465 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
466 msleep(20);
467}
468
469/* Release fw image */
d1f9e41d 470static void mwl8k_release_fw(const struct firmware **fw)
a66098da
LB		 471{
472 if (*fw == NULL)
473 return;
474 release_firmware(*fw);
475 *fw = NULL;
476}
477
478static void mwl8k_release_firmware(struct mwl8k_priv *priv)
479{
22be40d9
LB		 480 mwl8k_release_fw(&priv->fw_ucode);
481 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 482}
483
99020471
BC		 484/* states for asynchronous f/w loading */
485static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
486enum {
487 FW_STATE_INIT = 0,
488 FW_STATE_LOADING_PREF,
489 FW_STATE_LOADING_ALT,
490 FW_STATE_ERROR,
491};
492
a66098da
LB		 493/* Request fw image */
494static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 495 const char *fname, const struct firmware **fw,
99020471 496 bool nowait)
a66098da
LB		 497{
498 /* release current image */
499 if (*fw != NULL)
500 mwl8k_release_fw(fw);
501
99020471
BC		 502 if (nowait)
503 return request_firmware_nowait(THIS_MODULE, 1, fname,
504 &priv->pdev->dev, GFP_KERNEL,
505 priv, mwl8k_fw_state_machine);
506 else
d1f9e41d 507 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB		 508}
509
99020471
BC		 510static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
511 bool nowait)
a66098da 512{
a74b295e 513 struct mwl8k_device_info *di = priv->device_info;
a66098da
LB		 514 int rc;
515
a74b295e 516 if (di->helper_image != NULL) {
99020471
BC		 517 if (nowait)
518 rc = mwl8k_request_fw(priv, di->helper_image,
519 &priv->fw_helper, true);
520 else
521 rc = mwl8k_request_fw(priv, di->helper_image,
522 &priv->fw_helper, false);
523 if (rc)
524 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
525 pci_name(priv->pdev), di->helper_image);
526
527 if (rc || nowait)
a74b295e 528 return rc;
a66098da
LB		 529 }
530
99020471
BC		 531 if (nowait) {
532 /*
533 * if we get here, no helper image is needed. Skip the
534 * FW_STATE_INIT state.
535 */
536 priv->fw_state = FW_STATE_LOADING_PREF;
537 rc = mwl8k_request_fw(priv, fw_image,
538 &priv->fw_ucode,
539 true);
540 } else
541 rc = mwl8k_request_fw(priv, fw_image,
542 &priv->fw_ucode, false);
a66098da 543 if (rc) {
c2c357ce 544 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 545 pci_name(priv->pdev), fw_image);
22be40d9 546 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 547 return rc;
548 }
549
550 return 0;
551}
552
553struct mwl8k_cmd_pkt {
554 __le16 code;
555 __le16 length;
f57ca9c1
LB		 556 __u8 seq_num;
557 __u8 macid;
a66098da
LB		 558 __le16 result;
559 char payload[0];
ba2d3587 560} __packed;
a66098da
LB		 561
562/*
563 * Firmware loading.
564 */
565static int
566mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
567{
568 void __iomem *regs = priv->regs;
569 dma_addr_t dma_addr;
a66098da
LB		 570 int loops;
571
572 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
573 if (pci_dma_mapping_error(priv->pdev, dma_addr))
574 return -ENOMEM;
575
576 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
577 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
578 iowrite32(MWL8K_H2A_INT_DOORBELL,
579 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
580 iowrite32(MWL8K_H2A_INT_DUMMY,
581 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
582
a66098da
LB		 583 loops = 1000;
584 do {
585 u32 int_code;
586
587 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
588 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
589 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB		 590 break;
591 }
592
3d76e82c 593 cond_resched();
a66098da
LB		 594 udelay(1);
595 } while (--loops);
596
597 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
598
d4b70570 599 return loops ? 0 : -ETIMEDOUT;
a66098da
LB		 600}
601
602static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
603 const u8 *data, size_t length)
604{
605 struct mwl8k_cmd_pkt *cmd;
606 int done;
607 int rc = 0;
608
609 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
610 if (cmd == NULL)
611 return -ENOMEM;
612
613 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
614 cmd->seq_num = 0;
f57ca9c1 615 cmd->macid = 0;
a66098da
LB		 616 cmd->result = 0;
617
618 done = 0;
619 while (length) {
620 int block_size = length > 256 ? 256 : length;
621
622 memcpy(cmd->payload, data + done, block_size);
623 cmd->length = cpu_to_le16(block_size);
624
625 rc = mwl8k_send_fw_load_cmd(priv, cmd,
626 sizeof(*cmd) + block_size);
627 if (rc)
628 break;
629
630 done += block_size;
631 length -= block_size;
632 }
633
634 if (!rc) {
635 cmd->length = 0;
636 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
637 }
638
639 kfree(cmd);
640
641 return rc;
642}
643
644static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
645 const u8 *data, size_t length)
646{
647 unsigned char *buffer;
648 int may_continue, rc = 0;
649 u32 done, prev_block_size;
650
651 buffer = kmalloc(1024, GFP_KERNEL);
652 if (buffer == NULL)
653 return -ENOMEM;
654
655 done = 0;
656 prev_block_size = 0;
657 may_continue = 1000;
658 while (may_continue > 0) {
659 u32 block_size;
660
661 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
662 if (block_size & 1) {
663 block_size &= ~1;
664 may_continue--;
665 } else {
666 done += prev_block_size;
667 length -= prev_block_size;
668 }
669
670 if (block_size > 1024 || block_size > length) {
671 rc = -EOVERFLOW;
672 break;
673 }
674
675 if (length == 0) {
676 rc = 0;
677 break;
678 }
679
680 if (block_size == 0) {
681 rc = -EPROTO;
682 may_continue--;
683 udelay(1);
684 continue;
685 }
686
687 prev_block_size = block_size;
688 memcpy(buffer, data + done, block_size);
689
690 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
691 if (rc)
692 break;
693 }
694
695 if (!rc && length != 0)
696 rc = -EREMOTEIO;
697
698 kfree(buffer);
699
700 return rc;
701}
702
c2c357ce 703static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 704{
c2c357ce 705 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 706 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB		 707 int rc;
708 int loops;
709
710 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 711 const struct firmware *helper = priv->fw_helper;
a66098da 712
c2c357ce
LB		 713 if (helper == NULL) {
714 printk(KERN_ERR "%s: helper image needed but none "
715 "given\n", pci_name(priv->pdev));
716 return -EINVAL;
717 }
a66098da 718
c2c357ce 719 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB		 720 if (rc) {
721 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 722 "helper image\n", pci_name(priv->pdev));
a66098da
LB		 723 return rc;
724 }
ba30c4a5 725 msleep(20);
a66098da 726
c2c357ce 727 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 728 } else {
c2c357ce 729 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB		 730 }
731
732 if (rc) {
c2c357ce
LB		 733 printk(KERN_ERR "%s: unable to load firmware image\n",
734 pci_name(priv->pdev));
a66098da
LB		 735 return rc;
736 }
737
89a91f4f 738 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 739
89b872e2 740 loops = 500000;
a66098da 741 do {
eae74e65
LB		 742 u32 ready_code;
743
744 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
745 if (ready_code == MWL8K_FWAP_READY) {
3db1cd5c 746 priv->ap_fw = true;
eae74e65
LB		 747 break;
748 } else if (ready_code == MWL8K_FWSTA_READY) {
3db1cd5c 749 priv->ap_fw = false;
a66098da 750 break;
eae74e65
LB		 751 }
752
753 cond_resched();
a66098da
LB		 754 udelay(1);
755 } while (--loops);
756
757 return loops ? 0 : -ETIMEDOUT;
758}
759
760
a66098da
LB		 761/* DMA header used by firmware and hardware. */
762struct mwl8k_dma_data {
763 __le16 fwlen;
764 struct ieee80211_hdr wh;
20f09c3d 765 char data[0];
ba2d3587 766} __packed;
a66098da
LB		 767
768/* Routines to add/remove DMA header from skb. */
20f09c3d 769static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 770{
20f09c3d
LB		 771 struct mwl8k_dma_data *tr;
772 int hdrlen;
773
774 tr = (struct mwl8k_dma_data *)skb->data;
775 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
776
777 if (hdrlen != sizeof(tr->wh)) {
778 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
779 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
780 *((__le16 *)(tr->data - 2)) = qos;
781 } else {
782 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
783 }
a66098da 784 }
20f09c3d
LB		 785
786 if (hdrlen != sizeof(*tr))
787 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB		 788}
789
ff776cec
YAP		 790#define REDUCED_TX_HEADROOM 8
791
252486a1 792static void
e4eefec7
YAP		 793mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
794 int head_pad, int tail_pad)
a66098da
LB		 795{
796 struct ieee80211_hdr *wh;
ca009301 797 int hdrlen;
252486a1 798 int reqd_hdrlen;
a66098da
LB		 799 struct mwl8k_dma_data *tr;
800
ca009301
LB		 801 /*
802 * Add a firmware DMA header; the firmware requires that we
803 * present a 2-byte payload length followed by a 4-address
804 * header (without QoS field), followed (optionally) by any
805 * WEP/ExtIV header (but only filled in for CCMP).
806 */
a66098da 807 wh = (struct ieee80211_hdr *)skb->data;
ca009301 808
a66098da 809 hdrlen = ieee80211_hdrlen(wh->frame_control);
ff776cec
YAP		 810
811 /*
812 * Check if skb_resize is required because of
813 * tx_headroom adjustment.
814 */
815 if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
816 + REDUCED_TX_HEADROOM))) {
817 if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
818
819 wiphy_err(priv->hw->wiphy,
820 "Failed to reallocate TX buffer\n");
821 return;
822 }
823 skb->truesize += REDUCED_TX_HEADROOM;
824 }
825
e4eefec7 826 reqd_hdrlen = sizeof(*tr) + head_pad;
252486a1
NS		 827
828 if (hdrlen != reqd_hdrlen)
829 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 830
ca009301 831 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 832 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB		 833
834 tr = (struct mwl8k_dma_data *)skb->data;
835 if (wh != &tr->wh)
836 memmove(&tr->wh, wh, hdrlen);
ca009301
LB		 837 if (hdrlen != sizeof(tr->wh))
838 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB		 839
840 /*
841 * Firmware length is the length of the fully formed "802.11
842 * payload". That is, everything except for the 802.11 header.
843 * This includes all crypto material including the MIC.
844 */
252486a1 845 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB		 846}
847
ff776cec
YAP		 848static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
849 struct sk_buff *skb)
e53d9b96
NS		 850{
851 struct ieee80211_hdr *wh;
852 struct ieee80211_tx_info *tx_info;
853 struct ieee80211_key_conf *key_conf;
854 int data_pad;
e4eefec7 855 int head_pad = 0;
e53d9b96
NS		 856
857 wh = (struct ieee80211_hdr *)skb->data;
858
859 tx_info = IEEE80211_SKB_CB(skb);
860
861 key_conf = NULL;
862 if (ieee80211_is_data(wh->frame_control))
863 key_conf = tx_info->control.hw_key;
864
865 /*
866 * Make sure the packet header is in the DMA header format (4-address
e4eefec7 867 * without QoS), and add head & tail padding when HW crypto is enabled.
e53d9b96
NS		 868 *
869 * We have the following trailer padding requirements:
870 * - WEP: 4 trailer bytes (ICV)
871 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
872 * - CCMP: 8 trailer bytes (MIC)
873 */
874 data_pad = 0;
875 if (key_conf != NULL) {
e4eefec7 876 head_pad = key_conf->iv_len;
e53d9b96
NS		 877 switch (key_conf->cipher) {
878 case WLAN_CIPHER_SUITE_WEP40:
879 case WLAN_CIPHER_SUITE_WEP104:
880 data_pad = 4;
881 break;
882 case WLAN_CIPHER_SUITE_TKIP:
883 data_pad = 12;
884 break;
885 case WLAN_CIPHER_SUITE_CCMP:
886 data_pad = 8;
887 break;
888 }
889 }
e4eefec7 890 mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
e53d9b96 891}
a66098da
LB		 892
893/*
89a91f4f 894 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 895 */
89a91f4f 896struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB		 897 __le16 pkt_len;
898 __u8 sq2;
899 __u8 rate;
900 __le32 pkt_phys_addr;
901 __le32 next_rxd_phys_addr;
902 __le16 qos_control;
903 __le16 htsig2;
904 __le32 hw_rssi_info;
905 __le32 hw_noise_floor_info;
906 __u8 noise_floor;
907 __u8 pad0[3];
908 __u8 rssi;
909 __u8 rx_status;
910 __u8 channel;
911 __u8 rx_ctrl;
ba2d3587 912} __packed;
6f6d1e9a 913
89a91f4f
LB		 914#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
915#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
916#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 917
89a91f4f 918#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 919
d9a07d49
NS		 920/* 8366 AP rx_status bits */
921#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
922#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
923#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
924#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
925#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
926
89a91f4f 927static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 928{
89a91f4f 929 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 930
931 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 932 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB		 933}
934
89a91f4f 935static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 936{
89a91f4f 937 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 938
939 rxd->pkt_len = cpu_to_le16(len);
940 rxd->pkt_phys_addr = cpu_to_le32(addr);
941 wmb();
942 rxd->rx_ctrl = 0;
943}
944
945static int
89a91f4f 946mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 947 __le16 *qos, s8 *noise)
6f6d1e9a 948{
89a91f4f 949 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 950
89a91f4f 951 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB		 952 return -1;
953 rmb();
954
955 memset(status, 0, sizeof(*status));
956
957 status->signal = -rxd->rssi;
0d462bbb 958 *noise = -rxd->noise_floor;
6f6d1e9a 959
89a91f4f 960 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 961 status->flag |= RX_FLAG_HT;
89a91f4f 962 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 963 status->flag |= RX_FLAG_40MHZ;
89a91f4f 964 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB		 965 } else {
966 int i;
967
777ad375
LB		 968 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
969 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB		 970 status->rate_idx = i;
971 break;
972 }
973 }
974 }
975
85478344
LB		 976 if (rxd->channel > 14) {
977 status->band = IEEE80211_BAND_5GHZ;
978 if (!(status->flag & RX_FLAG_HT))
979 status->rate_idx -= 5;
980 } else {
981 status->band = IEEE80211_BAND_2GHZ;
982 }
59eb21a6
BR		 983 status->freq = ieee80211_channel_to_frequency(rxd->channel,
984 status->band);
6f6d1e9a 985
20f09c3d
LB		 986 *qos = rxd->qos_control;
987
d9a07d49
NS		 988 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
989 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
990 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
991 status->flag |= RX_FLAG_MMIC_ERROR;
992
6f6d1e9a
LB		 993 return le16_to_cpu(rxd->pkt_len);
994}
995
89a91f4f
LB		 996static struct rxd_ops rxd_8366_ap_ops = {
997 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
998 .rxd_init = mwl8k_rxd_8366_ap_init,
999 .rxd_refill = mwl8k_rxd_8366_ap_refill,
1000 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB		 1001};
1002
1003/*
89a91f4f 1004 * Packet reception for STA firmware.
a66098da 1005 */
89a91f4f 1006struct mwl8k_rxd_sta {
a66098da
LB		 1007 __le16 pkt_len;
1008 __u8 link_quality;
1009 __u8 noise_level;
1010 __le32 pkt_phys_addr;
45eb400d 1011 __le32 next_rxd_phys_addr;
a66098da
LB		 1012 __le16 qos_control;
1013 __le16 rate_info;
1014 __le32 pad0[4];
1015 __u8 rssi;
1016 __u8 channel;
1017 __le16 pad1;
1018 __u8 rx_ctrl;
1019 __u8 rx_status;
1020 __u8 pad2[2];
ba2d3587 1021} __packed;
a66098da 1022
89a91f4f
LB		 1023#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
1024#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
1025#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
1026#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
1027#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
1028#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 1029
89a91f4f 1030#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS		 1031#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
1032/* ICV=0 or MIC=1 */
1033#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
1034/* Key is uploaded only in failure case */
1035#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 1036
89a91f4f 1037static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 1038{
89a91f4f 1039 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1040
1041 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 1042 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB		 1043}
1044
89a91f4f 1045static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 1046{
89a91f4f 1047 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1048
1049 rxd->pkt_len = cpu_to_le16(len);
1050 rxd->pkt_phys_addr = cpu_to_le32(addr);
1051 wmb();
1052 rxd->rx_ctrl = 0;
1053}
1054
1055static int
89a91f4f 1056mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 1057 __le16 *qos, s8 *noise)
54bc3a0d 1058{
89a91f4f 1059 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1060 u16 rate_info;
1061
89a91f4f 1062 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB		 1063 return -1;
1064 rmb();
1065
1066 rate_info = le16_to_cpu(rxd->rate_info);
1067
1068 memset(status, 0, sizeof(*status));
1069
1070 status->signal = -rxd->rssi;
0d462bbb 1071 *noise = -rxd->noise_level;
89a91f4f
LB		 1072 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1073 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1074
89a91f4f 1075 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1076 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1077 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1078 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1079 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1080 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1081 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB		 1082 status->flag |= RX_FLAG_HT;
1083
85478344
LB		 1084 if (rxd->channel > 14) {
1085 status->band = IEEE80211_BAND_5GHZ;
1086 if (!(status->flag & RX_FLAG_HT))
1087 status->rate_idx -= 5;
1088 } else {
1089 status->band = IEEE80211_BAND_2GHZ;
1090 }
59eb21a6
BR		 1091 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1092 status->band);
54bc3a0d 1093
20f09c3d 1094 *qos = rxd->qos_control;
d9a07d49
NS		 1095 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1096 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1097 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1098
54bc3a0d
LB		 1099 return le16_to_cpu(rxd->pkt_len);
1100}
1101
89a91f4f
LB		 1102static struct rxd_ops rxd_sta_ops = {
1103 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1104 .rxd_init = mwl8k_rxd_sta_init,
1105 .rxd_refill = mwl8k_rxd_sta_refill,
1106 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB		 1107};
1108
1109
a66098da
LB		 1110#define MWL8K_RX_DESCS 256
1111#define MWL8K_RX_MAXSZ 3800
1112
1113static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1114{
1115 struct mwl8k_priv *priv = hw->priv;
1116 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1117 int size;
1118 int i;
1119
45eb400d
LB		 1120 rxq->rxd_count = 0;
1121 rxq->head = 0;
1122 rxq->tail = 0;
a66098da 1123
54bc3a0d 1124 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1125
45eb400d
LB		 1126 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1127 if (rxq->rxd == NULL) {
5db55844 1128 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB		 1129 return -ENOMEM;
1130 }
45eb400d 1131 memset(rxq->rxd, 0, size);
a66098da 1132
b9ede5f1 1133 rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
788838eb 1134 if (rxq->buf == NULL) {
5db55844 1135 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1136 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB		 1137 return -ENOMEM;
1138 }
a66098da
LB		 1139
1140 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB		 1141 int desc_size;
1142 void *rxd;
a66098da 1143 int nexti;
54bc3a0d
LB		 1144 dma_addr_t next_dma_addr;
1145
1146 desc_size = priv->rxd_ops->rxd_size;
1147 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1148
54bc3a0d
LB		 1149 nexti = i + 1;
1150 if (nexti == MWL8K_RX_DESCS)
1151 nexti = 0;
1152 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1153
54bc3a0d 1154 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB		 1155 }
1156
1157 return 0;
1158}
1159
1160static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1161{
1162 struct mwl8k_priv *priv = hw->priv;
1163 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1164 int refilled;
1165
1166 refilled = 0;
45eb400d 1167 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1168 struct sk_buff *skb;
788838eb 1169 dma_addr_t addr;
a66098da 1170 int rx;
54bc3a0d 1171 void *rxd;
a66098da
LB		 1172
1173 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1174 if (skb == NULL)
1175 break;
1176
788838eb
LB		 1177 addr = pci_map_single(priv->pdev, skb->data,
1178 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1179
54bc3a0d
LB		 1180 rxq->rxd_count++;
1181 rx = rxq->tail++;
1182 if (rxq->tail == MWL8K_RX_DESCS)
1183 rxq->tail = 0;
788838eb 1184 rxq->buf[rx].skb = skb;
53b1b3e1 1185 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB		 1186
1187 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1188 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB		 1189
1190 refilled++;
1191 }
1192
1193 return refilled;
1194}
1195
1196/* Must be called only when the card's reception is completely halted */
1197static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1198{
1199 struct mwl8k_priv *priv = hw->priv;
1200 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1201 int i;
1202
73b46320
BC		 1203 if (rxq->rxd == NULL)
1204 return;
1205
a66098da 1206 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB		 1207 if (rxq->buf[i].skb != NULL) {
1208 pci_unmap_single(priv->pdev,
53b1b3e1 1209 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1210 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1211 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB		 1212
1213 kfree_skb(rxq->buf[i].skb);
1214 rxq->buf[i].skb = NULL;
a66098da
LB		 1215 }
1216 }
1217
788838eb
LB		 1218 kfree(rxq->buf);
1219 rxq->buf = NULL;
a66098da
LB		 1220
1221 pci_free_consistent(priv->pdev,
54bc3a0d 1222 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB		 1223 rxq->rxd, rxq->rxd_dma);
1224 rxq->rxd = NULL;
a66098da
LB		 1225}
1226
1227
1228/*
1229 * Scan a list of BSSIDs to process for finalize join.
1230 * Allows for extension to process multiple BSSIDs.
1231 */
1232static inline int
1233mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1234{
1235 return priv->capture_beacon &&
1236 ieee80211_is_beacon(wh->frame_control) &&
2e42e474 1237 ether_addr_equal(wh->addr3, priv->capture_bssid);
a66098da
LB		 1238}
1239
3779752d
LB		 1240static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1241 struct sk_buff *skb)
a66098da 1242{
3779752d
LB		 1243 struct mwl8k_priv *priv = hw->priv;
1244
a66098da 1245 priv->capture_beacon = false;
d89173f2 1246 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB		 1247
1248 /*
1249 * Use GFP_ATOMIC as rxq_process is called from
1250 * the primary interrupt handler, memory allocation call
1251 * must not sleep.
1252 */
1253 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1254 if (priv->beacon_skb != NULL)
3779752d 1255 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB		 1256}
1257
d9a07d49
NS		 1258static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1259 u8 *bssid)
1260{
1261 struct mwl8k_vif *mwl8k_vif;
1262
1263 list_for_each_entry(mwl8k_vif,
1264 vif_list, list) {
1265 if (memcmp(bssid, mwl8k_vif->bssid,
1266 ETH_ALEN) == 0)
1267 return mwl8k_vif;
1268 }
1269
1270 return NULL;
1271}
1272
a66098da
LB		 1273static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1274{
1275 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1276 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB		 1277 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1278 int processed;
1279
1280 processed = 0;
45eb400d 1281 while (rxq->rxd_count && limit--) {
a66098da 1282 struct sk_buff *skb;
54bc3a0d
LB		 1283 void *rxd;
1284 int pkt_len;
a66098da 1285 struct ieee80211_rx_status status;
d9a07d49 1286 struct ieee80211_hdr *wh;
20f09c3d 1287 __le16 qos;
a66098da 1288
788838eb 1289 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB		 1290 if (skb == NULL)
1291 break;
54bc3a0d
LB		 1292
1293 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1294
0d462bbb
JL		 1295 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1296 &priv->noise);
54bc3a0d
LB		 1297 if (pkt_len < 0)
1298 break;
1299
788838eb
LB		 1300 rxq->buf[rxq->head].skb = NULL;
1301
1302 pci_unmap_single(priv->pdev,
53b1b3e1 1303 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1304 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1305 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1306
54bc3a0d
LB		 1307 rxq->head++;
1308 if (rxq->head == MWL8K_RX_DESCS)
1309 rxq->head = 0;
1310
45eb400d 1311 rxq->rxd_count--;
a66098da 1312
d9a07d49 1313 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1314
a66098da 1315 /*
c2c357ce
LB		 1316 * Check for a pending join operation. Save a
1317 * copy of the beacon and schedule a tasklet to
1318 * send a FINALIZE_JOIN command to the firmware.
a66098da 1319 */
54bc3a0d 1320 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1321 mwl8k_save_beacon(hw, skb);
a66098da 1322
d9a07d49
NS		 1323 if (ieee80211_has_protected(wh->frame_control)) {
1324
1325 /* Check if hw crypto has been enabled for
1326 * this bss. If yes, set the status flags
1327 * accordingly
1328 */
1329 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1330 wh->addr1);
1331
1332 if (mwl8k_vif != NULL &&
23677ce3 1333 mwl8k_vif->is_hw_crypto_enabled) {
d9a07d49
NS		 1334 /*
1335 * When MMIC ERROR is encountered
1336 * by the firmware, payload is
1337 * dropped and only 32 bytes of
1338 * mwl8k Firmware header is sent
1339 * to the host.
1340 *
1341 * We need to add four bytes of
1342 * key information. In it
1343 * MAC80211 expects keyidx set to
1344 * 0 for triggering Counter
1345 * Measure of MMIC failure.
1346 */
1347 if (status.flag & RX_FLAG_MMIC_ERROR) {
1348 struct mwl8k_dma_data *tr;
1349 tr = (struct mwl8k_dma_data *)skb->data;
1350 memset((void *)&(tr->data), 0, 4);
1351 pkt_len += 4;
1352 }
1353
1354 if (!ieee80211_is_auth(wh->frame_control))
1355 status.flag |= RX_FLAG_IV_STRIPPED |
1356 RX_FLAG_DECRYPTED |
1357 RX_FLAG_MMIC_STRIPPED;
1358 }
1359 }
1360
1361 skb_put(skb, pkt_len);
1362 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB		 1363 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1364 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1365
1366 processed++;
1367 }
1368
1369 return processed;
1370}
1371
1372
1373/*
1374 * Packet transmission.
1375 */
1376
a66098da
LB		 1377#define MWL8K_TXD_STATUS_OK 0x00000001
1378#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1379#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1380#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1381#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1382
e0493a8d
LB		 1383#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1384#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1385#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1386#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1387#define MWL8K_QOS_EOSP 0x0010
1388
a66098da
LB		 1389struct mwl8k_tx_desc {
1390 __le32 status;
1391 __u8 data_rate;
1392 __u8 tx_priority;
1393 __le16 qos_control;
1394 __le32 pkt_phys_addr;
1395 __le16 pkt_len;
d89173f2 1396 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1397 __le32 next_txd_phys_addr;
8a7a578c 1398 __le32 timestamp;
a66098da
LB		 1399 __le16 rate_info;
1400 __u8 peer_id;
a1fe24b0 1401 __u8 tx_frag_cnt;
ba2d3587 1402} __packed;
a66098da
LB		 1403
1404#define MWL8K_TX_DESCS 128
1405
1406static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1407{
1408 struct mwl8k_priv *priv = hw->priv;
1409 struct mwl8k_tx_queue *txq = priv->txq + index;
1410 int size;
1411 int i;
1412
8ccbc3b8 1413 txq->len = 0;
45eb400d
LB		 1414 txq->head = 0;
1415 txq->tail = 0;
a66098da
LB		 1416
1417 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1418
45eb400d
LB		 1419 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1420 if (txq->txd == NULL) {
5db55844 1421 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB		 1422 return -ENOMEM;
1423 }
45eb400d 1424 memset(txq->txd, 0, size);
a66098da 1425
b9ede5f1 1426 txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
45eb400d 1427 if (txq->skb == NULL) {
5db55844 1428 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1429 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB		 1430 return -ENOMEM;
1431 }
a66098da
LB		 1432
1433 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1434 struct mwl8k_tx_desc *tx_desc;
1435 int nexti;
1436
45eb400d 1437 tx_desc = txq->txd + i;
a66098da
LB		 1438 nexti = (i + 1) % MWL8K_TX_DESCS;
1439
1440 tx_desc->status = 0;
45eb400d
LB		 1441 tx_desc->next_txd_phys_addr =
1442 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB		 1443 }
1444
1445 return 0;
1446}
1447
1448static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1449{
1450 iowrite32(MWL8K_H2A_INT_PPA_READY,
1451 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1452 iowrite32(MWL8K_H2A_INT_DUMMY,
1453 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1454 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1455}
1456
7e1112d3 1457static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1458{
7e1112d3
LB		 1459 struct mwl8k_priv *priv = hw->priv;
1460 int i;
1461
e600707b 1462 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
7e1112d3
LB		 1463 struct mwl8k_tx_queue *txq = priv->txq + i;
1464 int fw_owned = 0;
1465 int drv_owned = 0;
1466 int unused = 0;
1467 int desc;
1468
a66098da 1469 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB		 1470 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1471 u32 status;
a66098da 1472
7e1112d3 1473 status = le32_to_cpu(tx_desc->status);
a66098da 1474 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1475 fw_owned++;
a66098da 1476 else
7e1112d3 1477 drv_owned++;
a66098da
LB		 1478
1479 if (tx_desc->pkt_len == 0)
7e1112d3 1480 unused++;
a66098da 1481 }
a66098da 1482
c96c31e4
JP		 1483 wiphy_err(hw->wiphy,
1484 "txq[%d] len=%d head=%d tail=%d "
1485 "fw_owned=%d drv_owned=%d unused=%d\n",
1486 i,
1487 txq->len, txq->head, txq->tail,
1488 fw_owned, drv_owned, unused);
7e1112d3 1489 }
a66098da
LB		 1490}
1491
618952a7 1492/*
88de754a 1493 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1494 */
62abd3cf 1495#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1496
950d5b01 1497static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1498{
a66098da 1499 struct mwl8k_priv *priv = hw->priv;
88de754a 1500 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB		 1501 int retry;
1502 int rc;
a66098da
LB		 1503
1504 might_sleep();
1505
6b6accc3
YAP		 1506 /* Since fw restart is in progress, allow only the firmware
1507 * commands from the restart code and block the other
1508 * commands since they are going to fail in any case since
1509 * the firmware has crashed
1510 */
1511 if (priv->hw_restart_in_progress) {
1512 if (priv->hw_restart_owner == current)
1513 return 0;
1514 else
1515 return -EBUSY;
1516 }
1517
7e1112d3
LB		 1518 /*
1519 * The TX queues are stopped at this point, so this test
1520 * doesn't need to take ->tx_lock.
1521 */
1522 if (!priv->pending_tx_pkts)
1523 return 0;
1524
1525 retry = 0;
1526 rc = 0;
1527
a66098da 1528 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1529 priv->tx_wait = &tx_wait;
1530 while (!rc) {
1531 int oldcount;
1532 unsigned long timeout;
a66098da 1533
7e1112d3 1534 oldcount = priv->pending_tx_pkts;
a66098da 1535
7e1112d3 1536 spin_unlock_bh(&priv->tx_lock);
88de754a 1537 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1538 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
a66098da 1539 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1540
1541 if (timeout) {
1542 WARN_ON(priv->pending_tx_pkts);
ba30c4a5 1543 if (retry)
c96c31e4 1544 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB		 1545 break;
1546 }
1547
1548 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP		 1549 wiphy_notice(hw->wiphy,
1550 "waiting for tx rings to drain (%d -> %d pkts)\n",
1551 oldcount, priv->pending_tx_pkts);
7e1112d3
LB		 1552 retry = 1;
1553 continue;
1554 }
1555
a66098da 1556 priv->tx_wait = NULL;
a66098da 1557
c96c31e4
JP		 1558 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1559 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3 1560 mwl8k_dump_tx_rings(hw);
6b6accc3
YAP		 1561 priv->hw_restart_in_progress = true;
1562 ieee80211_queue_work(hw, &priv->fw_reload);
7e1112d3
LB		 1563
1564 rc = -ETIMEDOUT;
a66098da 1565 }
7e1112d3 1566 spin_unlock_bh(&priv->tx_lock);
a66098da 1567
7e1112d3 1568 return rc;
a66098da
LB		 1569}
1570
c23b5a69
LB		 1571#define MWL8K_TXD_SUCCESS(status) \
1572 ((status) & (MWL8K_TXD_STATUS_OK | \
1573 MWL8K_TXD_STATUS_OK_RETRY | \
1574 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1575
a0e7c6cf
NS		 1576static int mwl8k_tid_queue_mapping(u8 tid)
1577{
1578 BUG_ON(tid > 7);
1579
1580 switch (tid) {
1581 case 0:
1582 case 3:
1583 return IEEE80211_AC_BE;
1584 break;
1585 case 1:
1586 case 2:
1587 return IEEE80211_AC_BK;
1588 break;
1589 case 4:
1590 case 5:
1591 return IEEE80211_AC_VI;
1592 break;
1593 case 6:
1594 case 7:
1595 return IEEE80211_AC_VO;
1596 break;
1597 default:
1598 return -1;
1599 break;
1600 }
1601}
1602
17033543
NS		 1603/* The firmware will fill in the rate information
1604 * for each packet that gets queued in the hardware
49adc5ce 1605 * and these macros will interpret that info.
17033543
NS		 1606 */
1607
49adc5ce
JL		 1608#define RI_FORMAT(a) (a & 0x0001)
1609#define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
17033543 1610
efb7c49a
LB		 1611static int
1612mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB		 1613{
1614 struct mwl8k_priv *priv = hw->priv;
1615 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1616 int processed;
a66098da 1617
efb7c49a 1618 processed = 0;
8ccbc3b8 1619 while (txq->len > 0 && limit--) {
a66098da 1620 int tx;
a66098da
LB		 1621 struct mwl8k_tx_desc *tx_desc;
1622 unsigned long addr;
ce9e2e1b 1623 int size;
a66098da
LB		 1624 struct sk_buff *skb;
1625 struct ieee80211_tx_info *info;
1626 u32 status;
17033543
NS		 1627 struct ieee80211_sta *sta;
1628 struct mwl8k_sta *sta_info = NULL;
1629 u16 rate_info;
17033543 1630 struct ieee80211_hdr *wh;
a66098da 1631
45eb400d
LB		 1632 tx = txq->head;
1633 tx_desc = txq->txd + tx;
a66098da
LB		 1634
1635 status = le32_to_cpu(tx_desc->status);
1636
1637 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1638 if (!force)
1639 break;
1640 tx_desc->status &=
1641 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1642 }
1643
45eb400d 1644 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV		 1645 BUG_ON(txq->len == 0);
1646 txq->len--;
a66098da
LB		 1647 priv->pending_tx_pkts--;
1648
1649 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1650 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB		 1651 skb = txq->skb[tx];
1652 txq->skb[tx] = NULL;
a66098da
LB		 1653
1654 BUG_ON(skb == NULL);
1655 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1656
20f09c3d 1657 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da 1658
17033543
NS		 1659 wh = (struct ieee80211_hdr *) skb->data;
1660
a66098da
LB		 1661 /* Mark descriptor as unused */
1662 tx_desc->pkt_phys_addr = 0;
1663 tx_desc->pkt_len = 0;
1664
a66098da 1665 info = IEEE80211_SKB_CB(skb);
17033543 1666 if (ieee80211_is_data(wh->frame_control)) {
89e11801
TH		 1667 rcu_read_lock();
1668 sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1,
1669 wh->addr2);
17033543
NS		 1670 if (sta) {
1671 sta_info = MWL8K_STA(sta);
1672 BUG_ON(sta_info == NULL);
1673 rate_info = le16_to_cpu(tx_desc->rate_info);
17033543
NS		 1674 /* If rate is < 6.5 Mpbs for an ht station
1675 * do not form an ampdu. If the station is a
1676 * legacy station (format = 0), do not form an
1677 * ampdu
1678 */
49adc5ce
JL		 1679 if (RI_RATE_ID_MCS(rate_info) < 1 ||
1680 RI_FORMAT(rate_info) == 0) {
17033543
NS		 1681 sta_info->is_ampdu_allowed = false;
1682 } else {
1683 sta_info->is_ampdu_allowed = true;
1684 }
1685 }
89e11801 1686 rcu_read_unlock();
17033543
NS		 1687 }
1688
a66098da 1689 ieee80211_tx_info_clear_status(info);
0bf22c37
NS		 1690
1691 /* Rate control is happening in the firmware.
1692 * Ensure no tx rate is being reported.
1693 */
ba30c4a5
YAP		 1694 info->status.rates[0].idx = -1;
1695 info->status.rates[0].count = 1;
0bf22c37 1696
ce9e2e1b 1697 if (MWL8K_TXD_SUCCESS(status))
a66098da 1698 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB		 1699
1700 ieee80211_tx_status_irqsafe(hw, skb);
1701
efb7c49a 1702 processed++;
a66098da
LB		 1703 }
1704
efb7c49a 1705 return processed;
a66098da
LB		 1706}
1707
1708/* must be called only when the card's transmit is completely halted */
1709static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1710{
1711 struct mwl8k_priv *priv = hw->priv;
1712 struct mwl8k_tx_queue *txq = priv->txq + index;
1713
73b46320
BC		 1714 if (txq->txd == NULL)
1715 return;
1716
efb7c49a 1717 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1718
45eb400d
LB		 1719 kfree(txq->skb);
1720 txq->skb = NULL;
a66098da
LB		 1721
1722 pci_free_consistent(priv->pdev,
1723 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB		 1724 txq->txd, txq->txd_dma);
1725 txq->txd = NULL;
a66098da
LB		 1726}
1727
ac109fd0 1728/* caller must hold priv->stream_lock when calling the stream functions */
ba30c4a5 1729static struct mwl8k_ampdu_stream *
ac109fd0
BC		 1730mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
1731{
1732 struct mwl8k_ampdu_stream *stream;
1733 struct mwl8k_priv *priv = hw->priv;
1734 int i;
1735
1736 for (i = 0; i < priv->num_ampdu_queues; i++) {
1737 stream = &priv->ampdu[i];
1738 if (stream->state == AMPDU_NO_STREAM) {
1739 stream->sta = sta;
1740 stream->state = AMPDU_STREAM_NEW;
1741 stream->tid = tid;
1742 stream->idx = i;
ac109fd0
BC		 1743 wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
1744 sta->addr, tid);
1745 return stream;
1746 }
1747 }
1748 return NULL;
1749}
1750
1751static int
1752mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1753{
1754 int ret;
1755
1756 /* if the stream has already been started, don't start it again */
1757 if (stream->state != AMPDU_STREAM_NEW)
1758 return 0;
1759 ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
1760 if (ret)
1761 wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
1762 "%d\n", stream->sta->addr, stream->tid, ret);
1763 else
1764 wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
1765 stream->sta->addr, stream->tid);
1766 return ret;
1767}
1768
1769static void
1770mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1771{
1772 wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
1773 stream->tid);
1774 memset(stream, 0, sizeof(*stream));
1775}
1776
1777static struct mwl8k_ampdu_stream *
1778mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
1779{
1780 struct mwl8k_priv *priv = hw->priv;
1781 int i;
1782
1783 for (i = 0 ; i < priv->num_ampdu_queues; i++) {
1784 struct mwl8k_ampdu_stream *stream;
1785 stream = &priv->ampdu[i];
1786 if (stream->state == AMPDU_NO_STREAM)
1787 continue;
1788 if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
1789 stream->tid == tid)
1790 return stream;
1791 }
1792 return NULL;
1793}
1794
d0805c1c
BC		 1795#define MWL8K_AMPDU_PACKET_THRESHOLD 64
1796static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
1797{
1798 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1799 struct tx_traffic_info *tx_stats;
1800
1801 BUG_ON(tid >= MWL8K_MAX_TID);
1802 tx_stats = &sta_info->tx_stats[tid];
1803
1804 return sta_info->is_ampdu_allowed &&
1805 tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
1806}
1807
1808static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
1809{
1810 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1811 struct tx_traffic_info *tx_stats;
1812
1813 BUG_ON(tid >= MWL8K_MAX_TID);
1814 tx_stats = &sta_info->tx_stats[tid];
1815
1816 if (tx_stats->start_time == 0)
1817 tx_stats->start_time = jiffies;
1818
1819 /* reset the packet count after each second elapses. If the number of
1820 * packets ever exceeds the ampdu_min_traffic threshold, we will allow
1821 * an ampdu stream to be started.
1822 */
1823 if (jiffies - tx_stats->start_time > HZ) {
1824 tx_stats->pkts = 0;
1825 tx_stats->start_time = 0;
1826 } else
1827 tx_stats->pkts++;
1828}
1829
7bb45683 1830static void
36323f81
TH		 1831mwl8k_txq_xmit(struct ieee80211_hw *hw,
1832 int index,
1833 struct ieee80211_sta *sta,
1834 struct sk_buff *skb)
a66098da
LB		 1835{
1836 struct mwl8k_priv *priv = hw->priv;
1837 struct ieee80211_tx_info *tx_info;
23b33906 1838 struct mwl8k_vif *mwl8k_vif;
a66098da
LB		 1839 struct ieee80211_hdr *wh;
1840 struct mwl8k_tx_queue *txq;
1841 struct mwl8k_tx_desc *tx;
a66098da 1842 dma_addr_t dma;
23b33906
LB		 1843 u32 txstatus;
1844 u8 txdatarate;
1845 u16 qos;
65f3ddcd
NS		 1846 int txpriority;
1847 u8 tid = 0;
1848 struct mwl8k_ampdu_stream *stream = NULL;
1849 bool start_ba_session = false;
3a769888 1850 bool mgmtframe = false;
a0e7c6cf 1851 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
e1f4d69b 1852 bool eapol_frame = false;
a66098da 1853
23b33906
LB		 1854 wh = (struct ieee80211_hdr *)skb->data;
1855 if (ieee80211_is_data_qos(wh->frame_control))
1856 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1857 else
1858 qos = 0;
a66098da 1859
e1f4d69b
NS		 1860 if (skb->protocol == cpu_to_be16(ETH_P_PAE))
1861 eapol_frame = true;
1862
3a769888
NS		 1863 if (ieee80211_is_mgmt(wh->frame_control))
1864 mgmtframe = true;
1865
d9a07d49 1866 if (priv->ap_fw)
ff776cec 1867 mwl8k_encapsulate_tx_frame(priv, skb);
d9a07d49 1868 else
e4eefec7 1869 mwl8k_add_dma_header(priv, skb, 0, 0);
d9a07d49 1870
23b33906 1871 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB		 1872
1873 tx_info = IEEE80211_SKB_CB(skb);
1874 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB		 1875
1876 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1877 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB		 1878 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1879 mwl8k_vif->seqno += 0x10;
a66098da
LB		 1880 }
1881
23b33906
LB		 1882 /* Setup firmware control bit fields for each frame type. */
1883 txstatus = 0;
1884 txdatarate = 0;
1885 if (ieee80211_is_mgmt(wh->frame_control) ||
1886 ieee80211_is_ctl(wh->frame_control)) {
1887 txdatarate = 0;
e0493a8d 1888 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB		 1889 } else if (ieee80211_is_data(wh->frame_control)) {
1890 txdatarate = 1;
1891 if (is_multicast_ether_addr(wh->addr1))
1892 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1893
e0493a8d 1894 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1895 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1896 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1897 else
e0493a8d 1898 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1899 }
a66098da 1900
a0e7c6cf
NS		 1901 /* Queue ADDBA request in the respective data queue. While setting up
1902 * the ampdu stream, mac80211 queues further packets for that
1903 * particular ra/tid pair. However, packets piled up in the hardware
1904 * for that ra/tid pair will still go out. ADDBA request and the
1905 * related data packets going out from different queues asynchronously
1906 * will cause a shift in the receiver window which might result in
1907 * ampdu packets getting dropped at the receiver after the stream has
1908 * been setup.
1909 */
1910 if (unlikely(ieee80211_is_action(wh->frame_control) &&
1911 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
1912 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
1913 priv->ap_fw)) {
1914 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
1915 tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
1916 index = mwl8k_tid_queue_mapping(tid);
1917 }
1918
65f3ddcd
NS		 1919 txpriority = index;
1920
e1f4d69b
NS		 1921 if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame &&
1922 ieee80211_is_data_qos(wh->frame_control)) {
65f3ddcd 1923 tid = qos & 0xf;
d0805c1c 1924 mwl8k_tx_count_packet(sta, tid);
65f3ddcd
NS		 1925 spin_lock(&priv->stream_lock);
1926 stream = mwl8k_lookup_stream(hw, sta->addr, tid);
1927 if (stream != NULL) {
1928 if (stream->state == AMPDU_STREAM_ACTIVE) {
5f2a1494 1929 WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK));
96769caf
YAP		 1930 txpriority = stream->idx + MWL8K_TX_WMM_QUEUES;
1931 index = stream->idx + MWL8K_TX_WMM_QUEUES;
65f3ddcd
NS		 1932 } else if (stream->state == AMPDU_STREAM_NEW) {
1933 /* We get here if the driver sends us packets
1934 * after we've initiated a stream, but before
1935 * our ampdu_action routine has been called
1936 * with IEEE80211_AMPDU_TX_START to get the SSN
1937 * for the ADDBA request. So this packet can
1938 * go out with no risk of sequence number
1939 * mismatch. No special handling is required.
1940 */
1941 } else {
1942 /* Drop packets that would go out after the
1943 * ADDBA request was sent but before the ADDBA
1944 * response is received. If we don't do this,
1945 * the recipient would probably receive it
1946 * after the ADDBA request with SSN 0. This
1947 * will cause the recipient's BA receive window
1948 * to shift, which would cause the subsequent
1949 * packets in the BA stream to be discarded.
1950 * mac80211 queues our packets for us in this
1951 * case, so this is really just a safety check.
1952 */
1953 wiphy_warn(hw->wiphy,
1954 "Cannot send packet while ADDBA "
1955 "dialog is underway.\n");
1956 spin_unlock(&priv->stream_lock);
1957 dev_kfree_skb(skb);
1958 return;
1959 }
1960 } else {
1961 /* Defer calling mwl8k_start_stream so that the current
1962 * skb can go out before the ADDBA request. This
1963 * prevents sequence number mismatch at the recepient
1964 * as described above.
1965 */
d0805c1c 1966 if (mwl8k_ampdu_allowed(sta, tid)) {
17033543
NS		 1967 stream = mwl8k_add_stream(hw, sta, tid);
1968 if (stream != NULL)
1969 start_ba_session = true;
1970 }
65f3ddcd
NS		 1971 }
1972 spin_unlock(&priv->stream_lock);
5f2a1494
YAP		 1973 } else {
1974 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1975 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
65f3ddcd
NS		 1976 }
1977
a66098da
LB		 1978 dma = pci_map_single(priv->pdev, skb->data,
1979 skb->len, PCI_DMA_TODEVICE);
1980
1981 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP		 1982 wiphy_debug(hw->wiphy,
1983 "failed to dma map skb, dropping TX frame.\n");
65f3ddcd
NS		 1984 if (start_ba_session) {
1985 spin_lock(&priv->stream_lock);
1986 mwl8k_remove_stream(hw, stream);
1987 spin_unlock(&priv->stream_lock);
1988 }
23b33906 1989 dev_kfree_skb(skb);
7bb45683 1990 return;
a66098da
LB		 1991 }
1992
23b33906 1993 spin_lock_bh(&priv->tx_lock);
a66098da 1994
23b33906 1995 txq = priv->txq + index;
a66098da 1996
3a769888
NS		 1997 /* Mgmt frames that go out frequently are probe
1998 * responses. Other mgmt frames got out relatively
1999 * infrequently. Hence reserve 2 buffers so that
2000 * other mgmt frames do not get dropped due to an
2001 * already queued probe response in one of the
2002 * reserved buffers.
2003 */
2004
2005 if (txq->len >= MWL8K_TX_DESCS - 2) {
23677ce3 2006 if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
3a769888
NS		 2007 if (start_ba_session) {
2008 spin_lock(&priv->stream_lock);
2009 mwl8k_remove_stream(hw, stream);
2010 spin_unlock(&priv->stream_lock);
2011 }
2012 spin_unlock_bh(&priv->tx_lock);
ff7aa96f
NS		 2013 pci_unmap_single(priv->pdev, dma, skb->len,
2014 PCI_DMA_TODEVICE);
3a769888
NS		 2015 dev_kfree_skb(skb);
2016 return;
3a7dbc3b 2017 }
65f3ddcd
NS		 2018 }
2019
45eb400d
LB		 2020 BUG_ON(txq->skb[txq->tail] != NULL);
2021 txq->skb[txq->tail] = skb;
a66098da 2022
45eb400d 2023 tx = txq->txd + txq->tail;
23b33906 2024 tx->data_rate = txdatarate;
65f3ddcd 2025 tx->tx_priority = txpriority;
a66098da 2026 tx->qos_control = cpu_to_le16(qos);
a66098da
LB		 2027 tx->pkt_phys_addr = cpu_to_le32(dma);
2028 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 2029 tx->rate_info = 0;
36323f81
TH		 2030 if (!priv->ap_fw && sta != NULL)
2031 tx->peer_id = MWL8K_STA(sta)->peer_id;
a680400e
LB		 2032 else
2033 tx->peer_id = 0;
566875db 2034
e1f4d69b 2035 if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame)
566875db
PN		 2036 tx->timestamp = cpu_to_le32(ioread32(priv->regs +
2037 MWL8K_HW_TIMER_REGISTER));
b8d9e572
NS		 2038 else
2039 tx->timestamp = 0;
566875db 2040
a66098da 2041 wmb();
23b33906
LB		 2042 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
2043
8ccbc3b8 2044 txq->len++;
a66098da 2045 priv->pending_tx_pkts++;
a66098da 2046
45eb400d
LB		 2047 txq->tail++;
2048 if (txq->tail == MWL8K_TX_DESCS)
2049 txq->tail = 0;
23b33906 2050
23b33906 2051 mwl8k_tx_start(priv);
a66098da
LB		 2052
2053 spin_unlock_bh(&priv->tx_lock);
65f3ddcd
NS		 2054
2055 /* Initiate the ampdu session here */
2056 if (start_ba_session) {
2057 spin_lock(&priv->stream_lock);
2058 if (mwl8k_start_stream(hw, stream))
2059 mwl8k_remove_stream(hw, stream);
2060 spin_unlock(&priv->stream_lock);
2061 }
a66098da
LB		 2062}
2063
2064
618952a7
LB		 2065/*
2066 * Firmware access.
2067 *
2068 * We have the following requirements for issuing firmware commands:
2069 * - Some commands require that the packet transmit path is idle when
2070 * the command is issued. (For simplicity, we'll just quiesce the
2071 * transmit path for every command.)
2072 * - There are certain sequences of commands that need to be issued to
2073 * the hardware sequentially, with no other intervening commands.
2074 *
2075 * This leads to an implementation of a "firmware lock" as a mutex that
2076 * can be taken recursively, and which is taken by both the low-level
2077 * command submission function (mwl8k_post_cmd) as well as any users of
2078 * that function that require issuing of an atomic sequence of commands,
2079 * and quiesces the transmit path whenever it's taken.
2080 */
2081static int mwl8k_fw_lock(struct ieee80211_hw *hw)
2082{
2083 struct mwl8k_priv *priv = hw->priv;
2084
2085 if (priv->fw_mutex_owner != current) {
2086 int rc;
2087
2088 mutex_lock(&priv->fw_mutex);
2089 ieee80211_stop_queues(hw);
2090
2091 rc = mwl8k_tx_wait_empty(hw);
2092 if (rc) {
6b6accc3
YAP		 2093 if (!priv->hw_restart_in_progress)
2094 ieee80211_wake_queues(hw);
2095
618952a7
LB		 2096 mutex_unlock(&priv->fw_mutex);
2097
2098 return rc;
2099 }
2100
2101 priv->fw_mutex_owner = current;
2102 }
2103
2104 priv->fw_mutex_depth++;
2105
2106 return 0;
2107}
2108
2109static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
2110{
2111 struct mwl8k_priv *priv = hw->priv;
2112
2113 if (!--priv->fw_mutex_depth) {
6b6accc3
YAP		 2114 if (!priv->hw_restart_in_progress)
2115 ieee80211_wake_queues(hw);
2116
618952a7
LB		 2117 priv->fw_mutex_owner = NULL;
2118 mutex_unlock(&priv->fw_mutex);
2119 }
2120}
2121
2122
a66098da
LB		 2123/*
2124 * Command processing.
2125 */
2126
0c9cc640
LB		 2127/* Timeout firmware commands after 10s */
2128#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB		 2129
2130static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
2131{
2132 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2133 struct mwl8k_priv *priv = hw->priv;
2134 void __iomem *regs = priv->regs;
2135 dma_addr_t dma_addr;
2136 unsigned int dma_size;
2137 int rc;
a66098da
LB		 2138 unsigned long timeout = 0;
2139 u8 buf[32];
2140
b603742f 2141 cmd->result = (__force __le16) 0xffff;
a66098da
LB		 2142 dma_size = le16_to_cpu(cmd->length);
2143 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
2144 PCI_DMA_BIDIRECTIONAL);
2145 if (pci_dma_mapping_error(priv->pdev, dma_addr))
2146 return -ENOMEM;
2147
618952a7 2148 rc = mwl8k_fw_lock(hw);
39a1e42e
LB		 2149 if (rc) {
2150 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2151 PCI_DMA_BIDIRECTIONAL);
618952a7 2152 return rc;
39a1e42e 2153 }
a66098da 2154
a66098da
LB		 2155 priv->hostcmd_wait = &cmd_wait;
2156 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
2157 iowrite32(MWL8K_H2A_INT_DOORBELL,
2158 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2159 iowrite32(MWL8K_H2A_INT_DUMMY,
2160 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB		 2161
2162 timeout = wait_for_completion_timeout(&cmd_wait,
2163 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
2164
618952a7
LB		 2165 priv->hostcmd_wait = NULL;
2166
2167 mwl8k_fw_unlock(hw);
2168
37055bd4
LB		 2169 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2170 PCI_DMA_BIDIRECTIONAL);
2171
a66098da 2172 if (!timeout) {
5db55844 2173 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP		 2174 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2175 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB		 2176 rc = -ETIMEDOUT;
2177 } else {
0c9cc640
LB		 2178 int ms;
2179
2180 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
2181
ce9e2e1b 2182 rc = cmd->result ? -EINVAL : 0;
a66098da 2183 if (rc)
5db55844 2184 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP		 2185 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2186 le16_to_cpu(cmd->result));
0c9cc640 2187 else if (ms > 2000)
5db55844 2188 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP		 2189 mwl8k_cmd_name(cmd->code,
2190 buf, sizeof(buf)),
2191 ms);
a66098da
LB		 2192 }
2193
a66098da
LB		 2194 return rc;
2195}
2196
f57ca9c1
LB		 2197static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
2198 struct ieee80211_vif *vif,
2199 struct mwl8k_cmd_pkt *cmd)
2200{
2201 if (vif != NULL)
2202 cmd->macid = MWL8K_VIF(vif)->macid;
2203 return mwl8k_post_cmd(hw, cmd);
2204}
2205
1349ad2f
LB		 2206/*
2207 * Setup code shared between STA and AP firmware images.
2208 */
2209static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
2210{
2211 struct mwl8k_priv *priv = hw->priv;
2212
2213 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
2214 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
2215
2216 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
2217 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
2218
2219 priv->band_24.band = IEEE80211_BAND_2GHZ;
2220 priv->band_24.channels = priv->channels_24;
2221 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
2222 priv->band_24.bitrates = priv->rates_24;
2223 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
2224
2225 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
2226}
2227
4eae9edd
LB		 2228static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
2229{
2230 struct mwl8k_priv *priv = hw->priv;
2231
2232 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
2233 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
2234
2235 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
2236 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
2237
2238 priv->band_50.band = IEEE80211_BAND_5GHZ;
2239 priv->band_50.channels = priv->channels_50;
2240 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
2241 priv->band_50.bitrates = priv->rates_50;
2242 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
2243
2244 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
2245}
2246
a66098da 2247/*
04b147b1 2248 * CMD_GET_HW_SPEC (STA version).
a66098da 2249 */
04b147b1 2250struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB		 2251 struct mwl8k_cmd_pkt header;
2252 __u8 hw_rev;
2253 __u8 host_interface;
2254 __le16 num_mcaddrs;
d89173f2 2255 __u8 perm_addr[ETH_ALEN];
a66098da
LB		 2256 __le16 region_code;
2257 __le32 fw_rev;
2258 __le32 ps_cookie;
2259 __le32 caps;
2260 __u8 mcs_bitmap[16];
2261 __le32 rx_queue_ptr;
2262 __le32 num_tx_queues;
e600707b 2263 __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
a66098da
LB		 2264 __le32 caps2;
2265 __le32 num_tx_desc_per_queue;
45eb400d 2266 __le32 total_rxd;
ba2d3587 2267} __packed;
a66098da 2268
341c9791
LB		 2269#define MWL8K_CAP_MAX_AMSDU 0x20000000
2270#define MWL8K_CAP_GREENFIELD 0x08000000
2271#define MWL8K_CAP_AMPDU 0x04000000
2272#define MWL8K_CAP_RX_STBC 0x01000000
2273#define MWL8K_CAP_TX_STBC 0x00800000
2274#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
2275#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
2276#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
2277#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
2278#define MWL8K_CAP_DELAY_BA 0x00003000
2279#define MWL8K_CAP_MIMO 0x00000200
2280#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB		 2281#define MWL8K_CAP_BAND_MASK 0x00000007
2282#define MWL8K_CAP_5GHZ 0x00000004
2283#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 2284
06953235
LB		 2285static void
2286mwl8k_set_ht_caps(struct ieee80211_hw *hw,
2287 struct ieee80211_supported_band *band, u32 cap)
341c9791 2288{
341c9791
LB		 2289 int rx_streams;
2290 int tx_streams;
2291
777ad375 2292 band->ht_cap.ht_supported = 1;
341c9791
LB		 2293
2294 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 2295 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 2296 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 2297 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB		 2298 if (cap & MWL8K_CAP_AMPDU) {
2299 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB		 2300 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2301 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB		 2302 }
2303 if (cap & MWL8K_CAP_RX_STBC)
777ad375 2304 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 2305 if (cap & MWL8K_CAP_TX_STBC)
777ad375 2306 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 2307 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 2308 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 2309 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 2310 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 2311 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 2312 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 2313 if (cap & MWL8K_CAP_40MHZ)
777ad375 2314 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB		 2315
2316 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
2317 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
2318
777ad375 2319 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 2320 if (rx_streams >= 2)
777ad375 2321 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 2322 if (rx_streams >= 3)
777ad375
LB		 2323 band->ht_cap.mcs.rx_mask[2] = 0xff;
2324 band->ht_cap.mcs.rx_mask[4] = 0x01;
2325 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB		 2326
2327 if (rx_streams != tx_streams) {
777ad375
LB		 2328 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
2329 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB		 2330 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2331 }
2332}
2333
06953235
LB		 2334static void
2335mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
2336{
2337 struct mwl8k_priv *priv = hw->priv;
2338
2339 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
2340 mwl8k_setup_2ghz_band(hw);
2341 if (caps & MWL8K_CAP_MIMO)
2342 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
2343 }
2344
2345 if (caps & MWL8K_CAP_5GHZ) {
2346 mwl8k_setup_5ghz_band(hw);
2347 if (caps & MWL8K_CAP_MIMO)
2348 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
2349 }
2350}
2351
04b147b1 2352static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB		 2353{
2354 struct mwl8k_priv *priv = hw->priv;
04b147b1 2355 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB		 2356 int rc;
2357 int i;
2358
2359 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2360 if (cmd == NULL)
2361 return -ENOMEM;
2362
2363 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2364 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2365
2366 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2367 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 2368 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b
BC		 2369 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2370 for (i = 0; i < mwl8k_tx_queues(priv); i++)
45eb400d 2371 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 2372 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 2373 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 2374
2375 rc = mwl8k_post_cmd(hw, &cmd->header);
2376
2377 if (!rc) {
2378 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2379 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 2380 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 2381 priv->hw_rev = cmd->hw_rev;
06953235 2382 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2383 priv->ap_macids_supported = 0x00000000;
2384 priv->sta_macids_supported = 0x00000001;
a66098da
LB		 2385 }
2386
2387 kfree(cmd);
2388 return rc;
2389}
2390
42fba21d
LB		 2391/*
2392 * CMD_GET_HW_SPEC (AP version).
2393 */
2394struct mwl8k_cmd_get_hw_spec_ap {
2395 struct mwl8k_cmd_pkt header;
2396 __u8 hw_rev;
2397 __u8 host_interface;
2398 __le16 num_wcb;
2399 __le16 num_mcaddrs;
2400 __u8 perm_addr[ETH_ALEN];
2401 __le16 region_code;
2402 __le16 num_antenna;
2403 __le32 fw_rev;
2404 __le32 wcbbase0;
2405 __le32 rxwrptr;
2406 __le32 rxrdptr;
2407 __le32 ps_cookie;
2408 __le32 wcbbase1;
2409 __le32 wcbbase2;
2410 __le32 wcbbase3;
952a0e96 2411 __le32 fw_api_version;
8a7a578c
BC		 2412 __le32 caps;
2413 __le32 num_of_ampdu_queues;
2414 __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
ba2d3587 2415} __packed;
42fba21d
LB		 2416
2417static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2418{
2419 struct mwl8k_priv *priv = hw->priv;
2420 struct mwl8k_cmd_get_hw_spec_ap *cmd;
8a7a578c 2421 int rc, i;
952a0e96 2422 u32 api_version;
42fba21d
LB		 2423
2424 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2425 if (cmd == NULL)
2426 return -ENOMEM;
2427
2428 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2429 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2430
2431 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2432 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2433
2434 rc = mwl8k_post_cmd(hw, &cmd->header);
2435
2436 if (!rc) {
2437 int off;
2438
952a0e96
BC		 2439 api_version = le32_to_cpu(cmd->fw_api_version);
2440 if (priv->device_info->fw_api_ap != api_version) {
2441 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2442 " Expected %d got %d.\n", MWL8K_NAME,
2443 priv->device_info->part_name,
2444 priv->device_info->fw_api_ap,
2445 api_version);
2446 rc = -EINVAL;
2447 goto done;
2448 }
42fba21d
LB		 2449 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2450 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2451 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2452 priv->hw_rev = cmd->hw_rev;
8a7a578c 2453 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2454 priv->ap_macids_supported = 0x000000ff;
2455 priv->sta_macids_supported = 0x00000000;
8a7a578c
BC		 2456 priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
2457 if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
2458 wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
2459 " but we only support %d.\n",
2460 priv->num_ampdu_queues,
2461 MWL8K_MAX_AMPDU_QUEUES);
2462 priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
2463 }
42fba21d 2464 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2465 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2466
2467 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2468 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d 2469
73b46320
BC		 2470 priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
2471 priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
2472 priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
2473 priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
8a7a578c
BC		 2474
2475 for (i = 0; i < priv->num_ampdu_queues; i++)
e600707b 2476 priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
8a7a578c 2477 le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
42fba21d
LB		 2478 }
2479
952a0e96 2480done:
42fba21d
LB		 2481 kfree(cmd);
2482 return rc;
2483}
2484
2485/*
2486 * CMD_SET_HW_SPEC.
2487 */
2488struct mwl8k_cmd_set_hw_spec {
2489 struct mwl8k_cmd_pkt header;
2490 __u8 hw_rev;
2491 __u8 host_interface;
2492 __le16 num_mcaddrs;
2493 __u8 perm_addr[ETH_ALEN];
2494 __le16 region_code;
2495 __le32 fw_rev;
2496 __le32 ps_cookie;
2497 __le32 caps;
2498 __le32 rx_queue_ptr;
2499 __le32 num_tx_queues;
e600707b 2500 __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
42fba21d
LB		 2501 __le32 flags;
2502 __le32 num_tx_desc_per_queue;
2503 __le32 total_rxd;
ba2d3587 2504} __packed;
42fba21d 2505
8a7a578c
BC		 2506/* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
2507 * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
2508 * the packets that are queued for more than 500ms, will be dropped in the
2509 * hardware. This helps minimizing the issues caused due to head-of-line
2510 * blocking where a slow client can hog the bandwidth and affect traffic to a
2511 * faster client.
2512 */
2513#define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
3373b28e 2514#define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
b64fe619
LB		 2515#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2516#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2517#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB		 2518
2519static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2520{
2521 struct mwl8k_priv *priv = hw->priv;
2522 struct mwl8k_cmd_set_hw_spec *cmd;
2523 int rc;
2524 int i;
2525
2526 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2527 if (cmd == NULL)
2528 return -ENOMEM;
2529
2530 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2531 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2532
2533 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2534 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b 2535 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
85c9205c
NS		 2536
2537 /*
2538 * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
2539 * that order. Firmware has Q3 as highest priority and Q0 as lowest
2540 * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
2541 * priority is interpreted the right way in firmware.
2542 */
e600707b
BC		 2543 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
2544 int j = mwl8k_tx_queues(priv) - 1 - i;
85c9205c
NS		 2545 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
2546 }
2547
b64fe619
LB		 2548 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2549 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
31d291a7 2550 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
3373b28e
NS		 2551 MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
2552 MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
42fba21d
LB		 2553 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2554 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2555
2556 rc = mwl8k_post_cmd(hw, &cmd->header);
2557 kfree(cmd);
2558
2559 return rc;
2560}
2561
a66098da
LB		 2562/*
2563 * CMD_MAC_MULTICAST_ADR.
2564 */
2565struct mwl8k_cmd_mac_multicast_adr {
2566 struct mwl8k_cmd_pkt header;
2567 __le16 action;
2568 __le16 numaddr;
ce9e2e1b 2569 __u8 addr[0][ETH_ALEN];
a66098da
LB		 2570};
2571
d5e30845
LB		 2572#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2573#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2574#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2575#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2576
e81cd2d6 2577static struct mwl8k_cmd_pkt *
447ced07 2578__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2579 struct netdev_hw_addr_list *mc_list)
a66098da 2580{
e81cd2d6 2581 struct mwl8k_priv *priv = hw->priv;
a66098da 2582 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2583 int size;
22bedad3
JP		 2584 int mc_count = 0;
2585
2586 if (mc_list)
2587 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2588
447ced07 2589 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB		 2590 allmulti = 1;
2591 mc_count = 0;
2592 }
e81cd2d6
LB		 2593
2594 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2595
e81cd2d6 2596 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2597 if (cmd == NULL)
e81cd2d6 2598 return NULL;
a66098da
LB		 2599
2600 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2601 cmd->header.length = cpu_to_le16(size);
d5e30845
LB		 2602 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2603 MWL8K_ENABLE_RX_BROADCAST);
2604
2605 if (allmulti) {
2606 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2607 } else if (mc_count) {
22bedad3
JP		 2608 struct netdev_hw_addr *ha;
2609 int i = 0;
d5e30845
LB		 2610
2611 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2612 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP		 2613 netdev_hw_addr_list_for_each(ha, mc_list) {
2614 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2615 }
a66098da
LB		 2616 }
2617
e81cd2d6 2618 return &cmd->header;
a66098da
LB		 2619}
2620
2621/*
55489b6e 2622 * CMD_GET_STAT.
a66098da 2623 */
55489b6e 2624struct mwl8k_cmd_get_stat {
a66098da 2625 struct mwl8k_cmd_pkt header;
a66098da 2626 __le32 stats[64];
ba2d3587 2627} __packed;
a66098da
LB		 2628
2629#define MWL8K_STAT_ACK_FAILURE 9
2630#define MWL8K_STAT_RTS_FAILURE 12
2631#define MWL8K_STAT_FCS_ERROR 24
2632#define MWL8K_STAT_RTS_SUCCESS 11
2633
55489b6e
LB		 2634static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2635 struct ieee80211_low_level_stats *stats)
a66098da 2636{
55489b6e 2637 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB		 2638 int rc;
2639
2640 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2641 if (cmd == NULL)
2642 return -ENOMEM;
2643
2644 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2645 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2646
2647 rc = mwl8k_post_cmd(hw, &cmd->header);
2648 if (!rc) {
2649 stats->dot11ACKFailureCount =
2650 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2651 stats->dot11RTSFailureCount =
2652 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2653 stats->dot11FCSErrorCount =
2654 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2655 stats->dot11RTSSuccessCount =
2656 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2657 }
2658 kfree(cmd);
2659
2660 return rc;
2661}
2662
2663/*
55489b6e 2664 * CMD_RADIO_CONTROL.
a66098da 2665 */
55489b6e 2666struct mwl8k_cmd_radio_control {
a66098da
LB		 2667 struct mwl8k_cmd_pkt header;
2668 __le16 action;
2669 __le16 control;
2670 __le16 radio_on;
ba2d3587 2671} __packed;
a66098da 2672
c46563b7 2673static int
55489b6e 2674mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB		 2675{
2676 struct mwl8k_priv *priv = hw->priv;
55489b6e 2677 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB		 2678 int rc;
2679
c46563b7 2680 if (enable == priv->radio_on && !force)
a66098da
LB		 2681 return 0;
2682
a66098da
LB		 2683 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2684 if (cmd == NULL)
2685 return -ENOMEM;
2686
2687 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2688 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2689 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2690 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB		 2691 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2692
2693 rc = mwl8k_post_cmd(hw, &cmd->header);
2694 kfree(cmd);
2695
2696 if (!rc)
c46563b7 2697 priv->radio_on = enable;
a66098da
LB		 2698
2699 return rc;
2700}
2701
55489b6e 2702static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2703{
55489b6e 2704 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB		 2705}
2706
55489b6e 2707static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2708{
55489b6e 2709 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB		 2710}
2711
a66098da
LB		 2712static int
2713mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2714{
99200a99 2715 struct mwl8k_priv *priv = hw->priv;
a66098da 2716
68ce3884 2717 priv->radio_short_preamble = short_preamble;
a66098da 2718
55489b6e 2719 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB		 2720}
2721
2722/*
55489b6e 2723 * CMD_RF_TX_POWER.
a66098da 2724 */
41fdf097 2725#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2726
55489b6e 2727struct mwl8k_cmd_rf_tx_power {
a66098da
LB		 2728 struct mwl8k_cmd_pkt header;
2729 __le16 action;
2730 __le16 support_level;
2731 __le16 current_level;
2732 __le16 reserved;
41fdf097 2733 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2734} __packed;
a66098da 2735
55489b6e 2736static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2737{
55489b6e 2738 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB		 2739 int rc;
2740
2741 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2742 if (cmd == NULL)
2743 return -ENOMEM;
2744
2745 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2746 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2747 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2748 cmd->support_level = cpu_to_le16(dBm);
2749
2750 rc = mwl8k_post_cmd(hw, &cmd->header);
2751 kfree(cmd);
2752
2753 return rc;
2754}
2755
41fdf097
NS		 2756/*
2757 * CMD_TX_POWER.
2758 */
2759#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2760
2761struct mwl8k_cmd_tx_power {
2762 struct mwl8k_cmd_pkt header;
2763 __le16 action;
2764 __le16 band;
2765 __le16 channel;
2766 __le16 bw;
2767 __le16 sub_ch;
2768 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
ba30c4a5 2769} __packed;
41fdf097
NS		 2770
2771static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2772 struct ieee80211_conf *conf,
2773 unsigned short pwr)
2774{
2775 struct ieee80211_channel *channel = conf->channel;
2776 struct mwl8k_cmd_tx_power *cmd;
2777 int rc;
2778 int i;
2779
2780 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2781 if (cmd == NULL)
2782 return -ENOMEM;
2783
2784 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2785 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2786 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2787
2788 if (channel->band == IEEE80211_BAND_2GHZ)
2789 cmd->band = cpu_to_le16(0x1);
2790 else if (channel->band == IEEE80211_BAND_5GHZ)
2791 cmd->band = cpu_to_le16(0x4);
2792
604c4ef1 2793 cmd->channel = cpu_to_le16(channel->hw_value);
41fdf097
NS		 2794
2795 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2796 conf->channel_type == NL80211_CHAN_HT20) {
2797 cmd->bw = cpu_to_le16(0x2);
2798 } else {
2799 cmd->bw = cpu_to_le16(0x4);
2800 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2801 cmd->sub_ch = cpu_to_le16(0x3);
2802 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2803 cmd->sub_ch = cpu_to_le16(0x1);
2804 }
2805
2806 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2807 cmd->power_level_list[i] = cpu_to_le16(pwr);
2808
2809 rc = mwl8k_post_cmd(hw, &cmd->header);
2810 kfree(cmd);
2811
2812 return rc;
2813}
2814
08b06347
LB		 2815/*
2816 * CMD_RF_ANTENNA.
2817 */
2818struct mwl8k_cmd_rf_antenna {
2819 struct mwl8k_cmd_pkt header;
2820 __le16 antenna;
2821 __le16 mode;
ba2d3587 2822} __packed;
08b06347
LB		 2823
2824#define MWL8K_RF_ANTENNA_RX 1
2825#define MWL8K_RF_ANTENNA_TX 2
2826
2827static int
2828mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2829{
2830 struct mwl8k_cmd_rf_antenna *cmd;
2831 int rc;
2832
2833 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2834 if (cmd == NULL)
2835 return -ENOMEM;
2836
2837 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2838 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2839 cmd->antenna = cpu_to_le16(antenna);
2840 cmd->mode = cpu_to_le16(mask);
2841
2842 rc = mwl8k_post_cmd(hw, &cmd->header);
2843 kfree(cmd);
2844
2845 return rc;
2846}
2847
b64fe619
LB		 2848/*
2849 * CMD_SET_BEACON.
2850 */
2851struct mwl8k_cmd_set_beacon {
2852 struct mwl8k_cmd_pkt header;
2853 __le16 beacon_len;
2854 __u8 beacon[0];
2855};
2856
aa21d0f6
LB		 2857static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2858 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB		 2859{
2860 struct mwl8k_cmd_set_beacon *cmd;
2861 int rc;
2862
2863 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2864 if (cmd == NULL)
2865 return -ENOMEM;
2866
2867 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2868 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2869 cmd->beacon_len = cpu_to_le16(len);
2870 memcpy(cmd->beacon, beacon, len);
2871
aa21d0f6 2872 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 2873 kfree(cmd);
2874
2875 return rc;
2876}
2877
a66098da
LB		 2878/*
2879 * CMD_SET_PRE_SCAN.
2880 */
2881struct mwl8k_cmd_set_pre_scan {
2882 struct mwl8k_cmd_pkt header;
ba2d3587 2883} __packed;
a66098da
LB		 2884
2885static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2886{
2887 struct mwl8k_cmd_set_pre_scan *cmd;
2888 int rc;
2889
2890 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2891 if (cmd == NULL)
2892 return -ENOMEM;
2893
2894 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2895 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2896
2897 rc = mwl8k_post_cmd(hw, &cmd->header);
2898 kfree(cmd);
2899
2900 return rc;
2901}
2902
2903/*
2904 * CMD_SET_POST_SCAN.
2905 */
2906struct mwl8k_cmd_set_post_scan {
2907 struct mwl8k_cmd_pkt header;
2908 __le32 isibss;
d89173f2 2909 __u8 bssid[ETH_ALEN];
ba2d3587 2910} __packed;
a66098da
LB		 2911
2912static int
0a11dfc3 2913mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB		 2914{
2915 struct mwl8k_cmd_set_post_scan *cmd;
2916 int rc;
2917
2918 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2919 if (cmd == NULL)
2920 return -ENOMEM;
2921
2922 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2923 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2924 cmd->isibss = 0;
d89173f2 2925 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB		 2926
2927 rc = mwl8k_post_cmd(hw, &cmd->header);
2928 kfree(cmd);
2929
2930 return rc;
2931}
2932
2933/*
2934 * CMD_SET_RF_CHANNEL.
2935 */
2936struct mwl8k_cmd_set_rf_channel {
2937 struct mwl8k_cmd_pkt header;
2938 __le16 action;
2939 __u8 current_channel;
2940 __le32 channel_flags;
ba2d3587 2941} __packed;
a66098da
LB		 2942
2943static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2944 struct ieee80211_conf *conf)
a66098da 2945{
610677d2 2946 struct ieee80211_channel *channel = conf->channel;
a66098da
LB		 2947 struct mwl8k_cmd_set_rf_channel *cmd;
2948 int rc;
2949
2950 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2951 if (cmd == NULL)
2952 return -ENOMEM;
2953
2954 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2955 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2956 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2957 cmd->current_channel = channel->hw_value;
610677d2 2958
a66098da 2959 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2960 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB		 2961 else if (channel->band == IEEE80211_BAND_5GHZ)
2962 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB		 2963
2964 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2965 conf->channel_type == NL80211_CHAN_HT20)
2966 cmd->channel_flags |= cpu_to_le32(0x00000080);
2967 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2968 cmd->channel_flags |= cpu_to_le32(0x000001900);
2969 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2970 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB		 2971
2972 rc = mwl8k_post_cmd(hw, &cmd->header);
2973 kfree(cmd);
2974
2975 return rc;
2976}
2977
2978/*
55489b6e 2979 * CMD_SET_AID.
a66098da 2980 */
55489b6e
LB		 2981#define MWL8K_FRAME_PROT_DISABLED 0x00
2982#define MWL8K_FRAME_PROT_11G 0x07
2983#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2984#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 2985
55489b6e
LB		 2986struct mwl8k_cmd_update_set_aid {
2987 struct mwl8k_cmd_pkt header;
2988 __le16 aid;
a66098da 2989
55489b6e
LB		 2990 /* AP's MAC address (BSSID) */
2991 __u8 bssid[ETH_ALEN];
2992 __le16 protection_mode;
2993 __u8 supp_rates[14];
ba2d3587 2994} __packed;
a66098da 2995
c6e96010
LB		 2996static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2997{
2998 int i;
2999 int j;
3000
3001 /*
3002 * Clear nonstandard rates 4 and 13.
3003 */
3004 mask &= 0x1fef;
3005
3006 for (i = 0, j = 0; i < 14; i++) {
3007 if (mask & (1 << i))
777ad375 3008 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB		 3009 }
3010}
3011
55489b6e 3012static int
c6e96010
LB		 3013mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
3014 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 3015{
55489b6e
LB		 3016 struct mwl8k_cmd_update_set_aid *cmd;
3017 u16 prot_mode;
a66098da
LB		 3018 int rc;
3019
3020 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3021 if (cmd == NULL)
3022 return -ENOMEM;
3023
55489b6e 3024 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 3025 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 3026 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 3027 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 3028
7dc6a7a7 3029 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB		 3030 prot_mode = MWL8K_FRAME_PROT_11G;
3031 } else {
7dc6a7a7 3032 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB		 3033 IEEE80211_HT_OP_MODE_PROTECTION) {
3034 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
3035 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
3036 break;
3037 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
3038 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
3039 break;
3040 default:
3041 prot_mode = MWL8K_FRAME_PROT_DISABLED;
3042 break;
3043 }
3044 }
3045 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 3046
c6e96010 3047 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB		 3048
3049 rc = mwl8k_post_cmd(hw, &cmd->header);
3050 kfree(cmd);
3051
3052 return rc;
3053}
3054
32060e1b 3055/*
55489b6e 3056 * CMD_SET_RATE.
32060e1b 3057 */
55489b6e
LB		 3058struct mwl8k_cmd_set_rate {
3059 struct mwl8k_cmd_pkt header;
3060 __u8 legacy_rates[14];
3061
3062 /* Bitmap for supported MCS codes. */
3063 __u8 mcs_set[16];
3064 __u8 reserved[16];
ba2d3587 3065} __packed;
32060e1b 3066
55489b6e 3067static int
c6e96010 3068mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 3069 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 3070{
55489b6e 3071 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB		 3072 int rc;
3073
3074 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3075 if (cmd == NULL)
3076 return -ENOMEM;
3077
55489b6e 3078 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 3079 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 3080 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 3081 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB		 3082
3083 rc = mwl8k_post_cmd(hw, &cmd->header);
3084 kfree(cmd);
3085
3086 return rc;
3087}
3088
a66098da 3089/*
55489b6e 3090 * CMD_FINALIZE_JOIN.
a66098da 3091 */
55489b6e
LB		 3092#define MWL8K_FJ_BEACON_MAXLEN 128
3093
3094struct mwl8k_cmd_finalize_join {
a66098da 3095 struct mwl8k_cmd_pkt header;
55489b6e
LB		 3096 __le32 sleep_interval; /* Number of beacon periods to sleep */
3097 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 3098} __packed;
a66098da 3099
55489b6e
LB		 3100static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
3101 int framelen, int dtim)
a66098da 3102{
55489b6e
LB		 3103 struct mwl8k_cmd_finalize_join *cmd;
3104 struct ieee80211_mgmt *payload = frame;
3105 int payload_len;
a66098da
LB		 3106 int rc;
3107
3108 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3109 if (cmd == NULL)
3110 return -ENOMEM;
3111
55489b6e 3112 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 3113 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3114 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
3115
3116 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
3117 if (payload_len < 0)
3118 payload_len = 0;
3119 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
3120 payload_len = MWL8K_FJ_BEACON_MAXLEN;
3121
3122 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB		 3123
3124 rc = mwl8k_post_cmd(hw, &cmd->header);
3125 kfree(cmd);
3126
3127 return rc;
3128}
3129
3130/*
55489b6e 3131 * CMD_SET_RTS_THRESHOLD.
a66098da 3132 */
55489b6e 3133struct mwl8k_cmd_set_rts_threshold {
a66098da
LB		 3134 struct mwl8k_cmd_pkt header;
3135 __le16 action;
55489b6e 3136 __le16 threshold;
ba2d3587 3137} __packed;
a66098da 3138
c2c2b12a
LB		 3139static int
3140mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 3141{
55489b6e 3142 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB		 3143 int rc;
3144
3145 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3146 if (cmd == NULL)
3147 return -ENOMEM;
3148
55489b6e 3149 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 3150 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB		 3151 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3152 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB		 3153
3154 rc = mwl8k_post_cmd(hw, &cmd->header);
3155 kfree(cmd);
3156
a66098da
LB		 3157 return rc;
3158}
3159
3160/*
55489b6e 3161 * CMD_SET_SLOT.
a66098da 3162 */
55489b6e 3163struct mwl8k_cmd_set_slot {
a66098da
LB		 3164 struct mwl8k_cmd_pkt header;
3165 __le16 action;
55489b6e 3166 __u8 short_slot;
ba2d3587 3167} __packed;
a66098da 3168
55489b6e 3169static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 3170{
55489b6e 3171 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB		 3172 int rc;
3173
3174 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3175 if (cmd == NULL)
3176 return -ENOMEM;
3177
55489b6e 3178 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 3179 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3180 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3181 cmd->short_slot = short_slot_time;
a66098da
LB		 3182
3183 rc = mwl8k_post_cmd(hw, &cmd->header);
3184 kfree(cmd);
3185
3186 return rc;
3187}
3188
3189/*
3190 * CMD_SET_EDCA_PARAMS.
3191 */
3192struct mwl8k_cmd_set_edca_params {
3193 struct mwl8k_cmd_pkt header;
3194
3195 /* See MWL8K_SET_EDCA_XXX below */
3196 __le16 action;
3197
3198 /* TX opportunity in units of 32 us */
3199 __le16 txop;
3200
2e484c89
LB		 3201 union {
3202 struct {
3203 /* Log exponent of max contention period: 0...15 */
3204 __le32 log_cw_max;
3205
3206 /* Log exponent of min contention period: 0...15 */
3207 __le32 log_cw_min;
3208
3209 /* Adaptive interframe spacing in units of 32us */
3210 __u8 aifs;
3211
3212 /* TX queue to configure */
3213 __u8 txq;
3214 } ap;
3215 struct {
3216 /* Log exponent of max contention period: 0...15 */
3217 __u8 log_cw_max;
a66098da 3218
2e484c89
LB		 3219 /* Log exponent of min contention period: 0...15 */
3220 __u8 log_cw_min;
a66098da 3221
2e484c89
LB		 3222 /* Adaptive interframe spacing in units of 32us */
3223 __u8 aifs;
a66098da 3224
2e484c89
LB		 3225 /* TX queue to configure */
3226 __u8 txq;
3227 } sta;
3228 };
ba2d3587 3229} __packed;
a66098da 3230
a66098da
LB		 3231#define MWL8K_SET_EDCA_CW 0x01
3232#define MWL8K_SET_EDCA_TXOP 0x02
3233#define MWL8K_SET_EDCA_AIFS 0x04
3234
3235#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
3236 MWL8K_SET_EDCA_TXOP | \
3237 MWL8K_SET_EDCA_AIFS)
3238
3239static int
55489b6e
LB		 3240mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
3241 __u16 cw_min, __u16 cw_max,
3242 __u8 aifs, __u16 txop)
a66098da 3243{
2e484c89 3244 struct mwl8k_priv *priv = hw->priv;
a66098da 3245 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB		 3246 int rc;
3247
3248 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3249 if (cmd == NULL)
3250 return -ENOMEM;
3251
a66098da
LB		 3252 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
3253 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 3254 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
3255 cmd->txop = cpu_to_le16(txop);
2e484c89
LB		 3256 if (priv->ap_fw) {
3257 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
3258 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
3259 cmd->ap.aifs = aifs;
3260 cmd->ap.txq = qnum;
3261 } else {
3262 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
3263 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
3264 cmd->sta.aifs = aifs;
3265 cmd->sta.txq = qnum;
3266 }
a66098da
LB		 3267
3268 rc = mwl8k_post_cmd(hw, &cmd->header);
3269 kfree(cmd);
3270
3271 return rc;
3272}
3273
3274/*
55489b6e 3275 * CMD_SET_WMM_MODE.
a66098da 3276 */
55489b6e 3277struct mwl8k_cmd_set_wmm_mode {
a66098da 3278 struct mwl8k_cmd_pkt header;
55489b6e 3279 __le16 action;
ba2d3587 3280} __packed;
a66098da 3281
55489b6e 3282static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 3283{
55489b6e
LB		 3284 struct mwl8k_priv *priv = hw->priv;
3285 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB		 3286 int rc;
3287
a66098da
LB		 3288 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3289 if (cmd == NULL)
3290 return -ENOMEM;
3291
55489b6e 3292 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 3293 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 3294 cmd->action = cpu_to_le16(!!enable);
a66098da
LB		 3295
3296 rc = mwl8k_post_cmd(hw, &cmd->header);
3297 kfree(cmd);
16cec43d 3298
55489b6e
LB		 3299 if (!rc)
3300 priv->wmm_enabled = enable;
a66098da
LB		 3301
3302 return rc;
3303}
3304
3305/*
55489b6e 3306 * CMD_MIMO_CONFIG.
a66098da 3307 */
55489b6e
LB		 3308struct mwl8k_cmd_mimo_config {
3309 struct mwl8k_cmd_pkt header;
3310 __le32 action;
3311 __u8 rx_antenna_map;
3312 __u8 tx_antenna_map;
ba2d3587 3313} __packed;
a66098da 3314
55489b6e 3315static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 3316{
55489b6e 3317 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB		 3318 int rc;
3319
3320 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3321 if (cmd == NULL)
3322 return -ENOMEM;
3323
55489b6e 3324 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 3325 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3326 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
3327 cmd->rx_antenna_map = rx;
3328 cmd->tx_antenna_map = tx;
a66098da
LB		 3329
3330 rc = mwl8k_post_cmd(hw, &cmd->header);
3331 kfree(cmd);
3332
3333 return rc;
3334}
3335
3336/*
b71ed2c6 3337 * CMD_USE_FIXED_RATE (STA version).
a66098da 3338 */
b71ed2c6
LB		 3339struct mwl8k_cmd_use_fixed_rate_sta {
3340 struct mwl8k_cmd_pkt header;
3341 __le32 action;
3342 __le32 allow_rate_drop;
3343 __le32 num_rates;
3344 struct {
3345 __le32 is_ht_rate;
3346 __le32 enable_retry;
3347 __le32 rate;
3348 __le32 retry_count;
3349 } rate_entry[8];
3350 __le32 rate_type;
3351 __le32 reserved1;
3352 __le32 reserved2;
ba2d3587 3353} __packed;
a66098da 3354
b71ed2c6
LB		 3355#define MWL8K_USE_AUTO_RATE 0x0002
3356#define MWL8K_UCAST_RATE 0
a66098da 3357
b71ed2c6 3358static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 3359{
b71ed2c6 3360 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB		 3361 int rc;
3362
3363 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3364 if (cmd == NULL)
3365 return -ENOMEM;
3366
3367 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3368 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB		 3369 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3370 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB		 3371
3372 rc = mwl8k_post_cmd(hw, &cmd->header);
3373 kfree(cmd);
3374
3375 return rc;
3376}
3377
088aab8b
LB		 3378/*
3379 * CMD_USE_FIXED_RATE (AP version).
3380 */
3381struct mwl8k_cmd_use_fixed_rate_ap {
3382 struct mwl8k_cmd_pkt header;
3383 __le32 action;
3384 __le32 allow_rate_drop;
3385 __le32 num_rates;
3386 struct mwl8k_rate_entry_ap {
3387 __le32 is_ht_rate;
3388 __le32 enable_retry;
3389 __le32 rate;
3390 __le32 retry_count;
3391 } rate_entry[4];
3392 u8 multicast_rate;
3393 u8 multicast_rate_type;
3394 u8 management_rate;
ba2d3587 3395} __packed;
088aab8b
LB		 3396
3397static int
3398mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
3399{
3400 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
3401 int rc;
3402
3403 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3404 if (cmd == NULL)
3405 return -ENOMEM;
3406
3407 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3408 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3409 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3410 cmd->multicast_rate = mcast;
3411 cmd->management_rate = mgmt;
3412
3413 rc = mwl8k_post_cmd(hw, &cmd->header);
3414 kfree(cmd);
3415
3416 return rc;
3417}
3418
55489b6e
LB		 3419/*
3420 * CMD_ENABLE_SNIFFER.
3421 */
3422struct mwl8k_cmd_enable_sniffer {
3423 struct mwl8k_cmd_pkt header;
3424 __le32 action;
ba2d3587 3425} __packed;
55489b6e
LB		 3426
3427static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3428{
3429 struct mwl8k_cmd_enable_sniffer *cmd;
3430 int rc;
3431
3432 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3433 if (cmd == NULL)
3434 return -ENOMEM;
3435
3436 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3437 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3438 cmd->action = cpu_to_le32(!!enable);
3439
3440 rc = mwl8k_post_cmd(hw, &cmd->header);
3441 kfree(cmd);
3442
3443 return rc;
3444}
3445
197a4e4e 3446struct mwl8k_cmd_update_mac_addr {
55489b6e
LB		 3447 struct mwl8k_cmd_pkt header;
3448 union {
3449 struct {
3450 __le16 mac_type;
3451 __u8 mac_addr[ETH_ALEN];
3452 } mbss;
3453 __u8 mac_addr[ETH_ALEN];
3454 };
ba2d3587 3455} __packed;
55489b6e 3456
ee0ddf18
LB		 3457#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3458#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3459#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3460#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3461
197a4e4e
YAP		 3462static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw,
3463 struct ieee80211_vif *vif, u8 *mac, bool set)
55489b6e
LB		 3464{
3465 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3466 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
197a4e4e 3467 struct mwl8k_cmd_update_mac_addr *cmd;
ee0ddf18 3468 int mac_type;
55489b6e
LB		 3469 int rc;
3470
ee0ddf18
LB		 3471 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3472 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3473 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3474 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3475 else
3476 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3477 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3478 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3479 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3480 else
3481 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3482 }
3483
55489b6e
LB		 3484 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3485 if (cmd == NULL)
3486 return -ENOMEM;
3487
197a4e4e
YAP		 3488 if (set)
3489 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3490 else
3491 cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR);
3492
55489b6e
LB		 3493 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3494 if (priv->ap_fw) {
ee0ddf18 3495 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB		 3496 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3497 } else {
3498 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3499 }
3500
aa21d0f6 3501 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB		 3502 kfree(cmd);
3503
3504 return rc;
3505}
3506
197a4e4e
YAP		 3507/*
3508 * MWL8K_CMD_SET_MAC_ADDR.
3509 */
3510static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3511 struct ieee80211_vif *vif, u8 *mac)
3512{
3513 return mwl8k_cmd_update_mac_addr(hw, vif, mac, true);
3514}
3515
3516/*
3517 * MWL8K_CMD_DEL_MAC_ADDR.
3518 */
3519static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw,
3520 struct ieee80211_vif *vif, u8 *mac)
3521{
3522 return mwl8k_cmd_update_mac_addr(hw, vif, mac, false);
3523}
3524
55489b6e
LB		 3525/*
3526 * CMD_SET_RATEADAPT_MODE.
3527 */
3528struct mwl8k_cmd_set_rate_adapt_mode {
3529 struct mwl8k_cmd_pkt header;
3530 __le16 action;
3531 __le16 mode;
ba2d3587 3532} __packed;
55489b6e
LB		 3533
3534static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3535{
3536 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3537 int rc;
3538
3539 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3540 if (cmd == NULL)
3541 return -ENOMEM;
3542
3543 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3544 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3545 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3546 cmd->mode = cpu_to_le16(mode);
3547
3548 rc = mwl8k_post_cmd(hw, &cmd->header);
3549 kfree(cmd);
3550
3551 return rc;
3552}
3553
3aefc37e
NS		 3554/*
3555 * CMD_GET_WATCHDOG_BITMAP.
3556 */
3557struct mwl8k_cmd_get_watchdog_bitmap {
3558 struct mwl8k_cmd_pkt header;
3559 u8 bitmap;
3560} __packed;
3561
3562static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
3563{
3564 struct mwl8k_cmd_get_watchdog_bitmap *cmd;
3565 int rc;
3566
3567 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3568 if (cmd == NULL)
3569 return -ENOMEM;
3570
3571 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
3572 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3573
3574 rc = mwl8k_post_cmd(hw, &cmd->header);
3575 if (!rc)
3576 *bitmap = cmd->bitmap;
3577
3578 kfree(cmd);
3579
3580 return rc;
3581}
3582
3583#define INVALID_BA 0xAA
3584static void mwl8k_watchdog_ba_events(struct work_struct *work)
3585{
3586 int rc;
3587 u8 bitmap = 0, stream_index;
3588 struct mwl8k_ampdu_stream *streams;
3589 struct mwl8k_priv *priv =
3590 container_of(work, struct mwl8k_priv, watchdog_ba_handle);
3591
3592 rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
3593 if (rc)
3594 return;
3595
3596 if (bitmap == INVALID_BA)
3597 return;
3598
3599 /* the bitmap is the hw queue number. Map it to the ampdu queue. */
3600 stream_index = bitmap - MWL8K_TX_WMM_QUEUES;
3601
3602 BUG_ON(stream_index >= priv->num_ampdu_queues);
3603
3604 streams = &priv->ampdu[stream_index];
3605
3606 if (streams->state == AMPDU_STREAM_ACTIVE)
3607 ieee80211_stop_tx_ba_session(streams->sta, streams->tid);
3608
3609 return;
3610}
3611
3612
b64fe619
LB		 3613/*
3614 * CMD_BSS_START.
3615 */
3616struct mwl8k_cmd_bss_start {
3617 struct mwl8k_cmd_pkt header;
3618 __le32 enable;
ba2d3587 3619} __packed;
b64fe619 3620
aa21d0f6
LB		 3621static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3622 struct ieee80211_vif *vif, int enable)
b64fe619
LB		 3623{
3624 struct mwl8k_cmd_bss_start *cmd;
3625 int rc;
3626
3627 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3628 if (cmd == NULL)
3629 return -ENOMEM;
3630
3631 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3632 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3633 cmd->enable = cpu_to_le32(enable);
3634
aa21d0f6 3635 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3636 kfree(cmd);
3637
3638 return rc;
3639}
3640
5faa1aff
NS		 3641/*
3642 * CMD_BASTREAM.
3643 */
3644
3645/*
3646 * UPSTREAM is tx direction
3647 */
3648#define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
3649#define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
3650
ba30c4a5 3651enum ba_stream_action_type {
5faa1aff
NS		 3652 MWL8K_BA_CREATE,
3653 MWL8K_BA_UPDATE,
3654 MWL8K_BA_DESTROY,
3655 MWL8K_BA_FLUSH,
3656 MWL8K_BA_CHECK,
ba30c4a5 3657};
5faa1aff
NS		 3658
3659
3660struct mwl8k_create_ba_stream {
3661 __le32 flags;
3662 __le32 idle_thrs;
3663 __le32 bar_thrs;
3664 __le32 window_size;
3665 u8 peer_mac_addr[6];
3666 u8 dialog_token;
3667 u8 tid;
3668 u8 queue_id;
3669 u8 param_info;
3670 __le32 ba_context;
3671 u8 reset_seq_no_flag;
3672 __le16 curr_seq_no;
3673 u8 sta_src_mac_addr[6];
3674} __packed;
3675
3676struct mwl8k_destroy_ba_stream {
3677 __le32 flags;
3678 __le32 ba_context;
3679} __packed;
3680
3681struct mwl8k_cmd_bastream {
3682 struct mwl8k_cmd_pkt header;
3683 __le32 action;
3684 union {
3685 struct mwl8k_create_ba_stream create_params;
3686 struct mwl8k_destroy_ba_stream destroy_params;
3687 };
3688} __packed;
3689
3690static int
f95275c4
YAP		 3691mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3692 struct ieee80211_vif *vif)
5faa1aff
NS		 3693{
3694 struct mwl8k_cmd_bastream *cmd;
3695 int rc;
3696
3697 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3698 if (cmd == NULL)
3699 return -ENOMEM;
3700
3701 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3702 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3703
3704 cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
3705
3706 cmd->create_params.queue_id = stream->idx;
3707 memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
3708 ETH_ALEN);
3709 cmd->create_params.tid = stream->tid;
3710
3711 cmd->create_params.flags =
3712 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
3713 cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
3714
f95275c4 3715 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
5faa1aff
NS		 3716
3717 kfree(cmd);
3718
3719 return rc;
3720}
3721
3722static int
3723mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
f95275c4 3724 u8 buf_size, struct ieee80211_vif *vif)
5faa1aff
NS		 3725{
3726 struct mwl8k_cmd_bastream *cmd;
3727 int rc;
3728
3729 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3730 if (cmd == NULL)
3731 return -ENOMEM;
3732
3733
3734 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3735 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3736
3737 cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
3738
3739 cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
3740 cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
3741 cmd->create_params.queue_id = stream->idx;
3742
3743 memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
3744 cmd->create_params.tid = stream->tid;
3745 cmd->create_params.curr_seq_no = cpu_to_le16(0);
3746 cmd->create_params.reset_seq_no_flag = 1;
3747
3748 cmd->create_params.param_info =
3749 (stream->sta->ht_cap.ampdu_factor &
3750 IEEE80211_HT_AMPDU_PARM_FACTOR) |
3751 ((stream->sta->ht_cap.ampdu_density << 2) &
3752 IEEE80211_HT_AMPDU_PARM_DENSITY);
3753
3754 cmd->create_params.flags =
3755 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
3756 BASTREAM_FLAG_DIRECTION_UPSTREAM);
3757
f95275c4 3758 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
5faa1aff
NS		 3759
3760 wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
3761 stream->sta->addr, stream->tid);
3762 kfree(cmd);
3763
3764 return rc;
3765}
3766
3767static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3768 struct mwl8k_ampdu_stream *stream)
3769{
3770 struct mwl8k_cmd_bastream *cmd;
3771
3772 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3773 if (cmd == NULL)
3774 return;
3775
3776 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3777 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3778 cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
3779
3780 cmd->destroy_params.ba_context = cpu_to_le32(stream->idx);
3781 mwl8k_post_cmd(hw, &cmd->header);
3782
3783 wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx);
3784
3785 kfree(cmd);
3786}
3787
3f5610ff
LB		 3788/*
3789 * CMD_SET_NEW_STN.
3790 */
3791struct mwl8k_cmd_set_new_stn {
3792 struct mwl8k_cmd_pkt header;
3793 __le16 aid;
3794 __u8 mac_addr[6];
3795 __le16 stn_id;
3796 __le16 action;
3797 __le16 rsvd;
3798 __le32 legacy_rates;
3799 __u8 ht_rates[4];
3800 __le16 cap_info;
3801 __le16 ht_capabilities_info;
3802 __u8 mac_ht_param_info;
3803 __u8 rev;
3804 __u8 control_channel;
3805 __u8 add_channel;
3806 __le16 op_mode;
3807 __le16 stbc;
3808 __u8 add_qos_info;
3809 __u8 is_qos_sta;
3810 __le32 fw_sta_ptr;
ba2d3587 3811} __packed;
3f5610ff
LB		 3812
3813#define MWL8K_STA_ACTION_ADD 0
3814#define MWL8K_STA_ACTION_REMOVE 2
3815
3816static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3817 struct ieee80211_vif *vif,
3818 struct ieee80211_sta *sta)
3819{
3820 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3821 u32 rates;
3f5610ff
LB		 3822 int rc;
3823
3824 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3825 if (cmd == NULL)
3826 return -ENOMEM;
3827
3828 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3829 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3830 cmd->aid = cpu_to_le16(sta->aid);
3831 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3832 cmd->stn_id = cpu_to_le16(sta->aid);
3833 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB		 3834 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3835 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3836 else
3837 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3838 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB		 3839 if (sta->ht_cap.ht_supported) {
3840 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3841 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3842 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3843 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3844 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3845 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3846 ((sta->ht_cap.ampdu_density & 7) << 2);
3847 cmd->is_qos_sta = 1;
3848 }
3849
aa21d0f6 3850 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3851 kfree(cmd);
3852
3853 return rc;
3854}
3855
b64fe619
LB		 3856static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3857 struct ieee80211_vif *vif)
3858{
3859 struct mwl8k_cmd_set_new_stn *cmd;
3860 int rc;
3861
3862 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3863 if (cmd == NULL)
3864 return -ENOMEM;
3865
3866 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3867 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3868 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3869
aa21d0f6 3870 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3871 kfree(cmd);
3872
3873 return rc;
3874}
3875
3f5610ff
LB		 3876static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3877 struct ieee80211_vif *vif, u8 *addr)
3878{
3879 struct mwl8k_cmd_set_new_stn *cmd;
3880 int rc;
3881
3882 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3883 if (cmd == NULL)
3884 return -ENOMEM;
3885
3886 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3887 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3888 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3889 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3890
aa21d0f6 3891 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3892 kfree(cmd);
3893
3894 return rc;
3895}
3896
fcdc403c
NS		 3897/*
3898 * CMD_UPDATE_ENCRYPTION.
3899 */
3900
3901#define MAX_ENCR_KEY_LENGTH 16
3902#define MIC_KEY_LENGTH 8
3903
3904struct mwl8k_cmd_update_encryption {
3905 struct mwl8k_cmd_pkt header;
3906
3907 __le32 action;
3908 __le32 reserved;
3909 __u8 mac_addr[6];
3910 __u8 encr_type;
3911
ba30c4a5 3912} __packed;
fcdc403c
NS		 3913
3914struct mwl8k_cmd_set_key {
3915 struct mwl8k_cmd_pkt header;
3916
3917 __le32 action;
3918 __le32 reserved;
3919 __le16 length;
3920 __le16 key_type_id;
3921 __le32 key_info;
3922 __le32 key_id;
3923 __le16 key_len;
3924 __u8 key_material[MAX_ENCR_KEY_LENGTH];
3925 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
3926 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
3927 __le16 tkip_rsc_low;
3928 __le32 tkip_rsc_high;
3929 __le16 tkip_tsc_low;
3930 __le32 tkip_tsc_high;
3931 __u8 mac_addr[6];
ba30c4a5 3932} __packed;
fcdc403c
NS		 3933
3934enum {
3935 MWL8K_ENCR_ENABLE,
3936 MWL8K_ENCR_SET_KEY,
3937 MWL8K_ENCR_REMOVE_KEY,
3938 MWL8K_ENCR_SET_GROUP_KEY,
3939};
3940
3941#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
3942#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
3943#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
3944#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
3945#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
3946
3947enum {
3948 MWL8K_ALG_WEP,
3949 MWL8K_ALG_TKIP,
3950 MWL8K_ALG_CCMP,
3951};
3952
3953#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
3954#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
3955#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
3956#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
3957#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
3958
3959static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
3960 struct ieee80211_vif *vif,
3961 u8 *addr,
3962 u8 encr_type)
3963{
3964 struct mwl8k_cmd_update_encryption *cmd;
3965 int rc;
3966
3967 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3968 if (cmd == NULL)
3969 return -ENOMEM;
3970
3971 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3972 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3973 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
3974 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3975 cmd->encr_type = encr_type;
3976
3977 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3978 kfree(cmd);
3979
3980 return rc;
3981}
3982
3983static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
3984 u8 *addr,
3985 struct ieee80211_key_conf *key)
3986{
3987 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3988 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3989 cmd->length = cpu_to_le16(sizeof(*cmd) -
3990 offsetof(struct mwl8k_cmd_set_key, length));
3991 cmd->key_id = cpu_to_le32(key->keyidx);
3992 cmd->key_len = cpu_to_le16(key->keylen);
3993 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3994
3995 switch (key->cipher) {
3996 case WLAN_CIPHER_SUITE_WEP40:
3997 case WLAN_CIPHER_SUITE_WEP104:
3998 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
3999 if (key->keyidx == 0)
4000 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
4001
4002 break;
4003 case WLAN_CIPHER_SUITE_TKIP:
4004 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
4005 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4006 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
4007 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
4008 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
4009 | MWL8K_KEY_FLAG_TSC_VALID);
4010 break;
4011 case WLAN_CIPHER_SUITE_CCMP:
4012 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
4013 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4014 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
4015 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
4016 break;
4017 default:
4018 return -ENOTSUPP;
4019 }
4020
4021 return 0;
4022}
4023
4024static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
4025 struct ieee80211_vif *vif,
4026 u8 *addr,
4027 struct ieee80211_key_conf *key)
4028{
4029 struct mwl8k_cmd_set_key *cmd;
4030 int rc;
4031 int keymlen;
4032 u32 action;
4033 u8 idx;
4034 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4035
4036 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4037 if (cmd == NULL)
4038 return -ENOMEM;
4039
4040 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4041 if (rc < 0)
4042 goto done;
4043
4044 idx = key->keyidx;
4045
4046 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4047 action = MWL8K_ENCR_SET_KEY;
4048 else
4049 action = MWL8K_ENCR_SET_GROUP_KEY;
4050
4051 switch (key->cipher) {
4052 case WLAN_CIPHER_SUITE_WEP40:
4053 case WLAN_CIPHER_SUITE_WEP104:
4054 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
4055 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
4056 sizeof(*key) + key->keylen);
4057 mwl8k_vif->wep_key_conf[idx].enabled = 1;
4058 }
4059
9b571e24 4060 keymlen = key->keylen;
fcdc403c
NS		 4061 action = MWL8K_ENCR_SET_KEY;
4062 break;
4063 case WLAN_CIPHER_SUITE_TKIP:
4064 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
4065 break;
4066 case WLAN_CIPHER_SUITE_CCMP:
4067 keymlen = key->keylen;
4068 break;
4069 default:
4070 rc = -ENOTSUPP;
4071 goto done;
4072 }
4073
4074 memcpy(cmd->key_material, key->key, keymlen);
4075 cmd->action = cpu_to_le32(action);
4076
4077 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4078done:
4079 kfree(cmd);
4080
4081 return rc;
4082}
4083
4084static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
4085 struct ieee80211_vif *vif,
4086 u8 *addr,
4087 struct ieee80211_key_conf *key)
4088{
4089 struct mwl8k_cmd_set_key *cmd;
4090 int rc;
4091 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4092
4093 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4094 if (cmd == NULL)
4095 return -ENOMEM;
4096
4097 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4098 if (rc < 0)
4099 goto done;
4100
4101 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
d981e059 4102 key->cipher == WLAN_CIPHER_SUITE_WEP104)
fcdc403c
NS		 4103 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
4104
4105 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
4106
4107 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4108done:
4109 kfree(cmd);
4110
4111 return rc;
4112}
4113
4114static int mwl8k_set_key(struct ieee80211_hw *hw,
4115 enum set_key_cmd cmd_param,
4116 struct ieee80211_vif *vif,
4117 struct ieee80211_sta *sta,
4118 struct ieee80211_key_conf *key)
4119{
4120 int rc = 0;
4121 u8 encr_type;
4122 u8 *addr;
4123 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4124
4125 if (vif->type == NL80211_IFTYPE_STATION)
4126 return -EOPNOTSUPP;
4127
4128 if (sta == NULL)
ff7e9f99 4129 addr = vif->addr;
fcdc403c
NS		 4130 else
4131 addr = sta->addr;
4132
4133 if (cmd_param == SET_KEY) {
fcdc403c
NS		 4134 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
4135 if (rc)
4136 goto out;
4137
4138 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
4139 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
4140 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
4141 else
4142 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
4143
4144 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
4145 encr_type);
4146 if (rc)
4147 goto out;
4148
4149 mwl8k_vif->is_hw_crypto_enabled = true;
4150
4151 } else {
4152 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
4153
4154 if (rc)
4155 goto out;
fcdc403c
NS		 4156 }
4157out:
4158 return rc;
4159}
4160
55489b6e
LB		 4161/*
4162 * CMD_UPDATE_STADB.
4163 */
25d81b1e
LB		 4164struct ewc_ht_info {
4165 __le16 control1;
4166 __le16 control2;
4167 __le16 control3;
ba2d3587 4168} __packed;
25d81b1e
LB		 4169
4170struct peer_capability_info {
4171 /* Peer type - AP vs. STA. */
4172 __u8 peer_type;
4173
4174 /* Basic 802.11 capabilities from assoc resp. */
4175 __le16 basic_caps;
4176
4177 /* Set if peer supports 802.11n high throughput (HT). */
4178 __u8 ht_support;
4179
4180 /* Valid if HT is supported. */
4181 __le16 ht_caps;
4182 __u8 extended_ht_caps;
4183 struct ewc_ht_info ewc_info;
4184
4185 /* Legacy rate table. Intersection of our rates and peer rates. */
4186 __u8 legacy_rates[12];
4187
4188 /* HT rate table. Intersection of our rates and peer rates. */
4189 __u8 ht_rates[16];
4190 __u8 pad[16];
4191
4192 /* If set, interoperability mode, no proprietary extensions. */
4193 __u8 interop;
4194 __u8 pad2;
4195 __u8 station_id;
4196 __le16 amsdu_enabled;
ba2d3587 4197} __packed;
25d81b1e 4198
55489b6e
LB		 4199struct mwl8k_cmd_update_stadb {
4200 struct mwl8k_cmd_pkt header;
4201
4202 /* See STADB_ACTION_TYPE */
4203 __le32 action;
4204
4205 /* Peer MAC address */
4206 __u8 peer_addr[ETH_ALEN];
4207
4208 __le32 reserved;
4209
4210 /* Peer info - valid during add/update. */
4211 struct peer_capability_info peer_info;
ba2d3587 4212} __packed;
55489b6e 4213
a680400e
LB		 4214#define MWL8K_STA_DB_MODIFY_ENTRY 1
4215#define MWL8K_STA_DB_DEL_ENTRY 2
4216
4217/* Peer Entry flags - used to define the type of the peer node */
4218#define MWL8K_PEER_TYPE_ACCESSPOINT 2
4219
4220static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 4221 struct ieee80211_vif *vif,
13935e2c 4222 struct ieee80211_sta *sta)
55489b6e 4223{
55489b6e 4224 struct mwl8k_cmd_update_stadb *cmd;
a680400e 4225 struct peer_capability_info *p;
8707d026 4226 u32 rates;
55489b6e
LB		 4227 int rc;
4228
4229 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4230 if (cmd == NULL)
4231 return -ENOMEM;
4232
4233 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4234 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 4235 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 4236 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 4237
a680400e
LB		 4238 p = &cmd->peer_info;
4239 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
4240 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 4241 p->ht_support = sta->ht_cap.ht_supported;
b603742f 4242 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB		 4243 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
4244 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB		 4245 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4246 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
4247 else
4248 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4249 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 4250 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB		 4251 p->interop = 1;
4252 p->amsdu_enabled = 0;
4253
4254 rc = mwl8k_post_cmd(hw, &cmd->header);
4255 kfree(cmd);
4256
4257 return rc ? rc : p->station_id;
4258}
4259
4260static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
4261 struct ieee80211_vif *vif, u8 *addr)
4262{
4263 struct mwl8k_cmd_update_stadb *cmd;
4264 int rc;
4265
4266 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4267 if (cmd == NULL)
4268 return -ENOMEM;
4269
4270 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4271 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4272 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 4273 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 4274
a680400e 4275 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB		 4276 kfree(cmd);
4277
4278 return rc;
4279}
4280
a66098da
LB		 4281
4282/*
4283 * Interrupt handling.
4284 */
4285static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
4286{
4287 struct ieee80211_hw *hw = dev_id;
4288 struct mwl8k_priv *priv = hw->priv;
4289 u32 status;
4290
4291 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB		 4292 if (!status)
4293 return IRQ_NONE;
4294
1e9f9de3
LB		 4295 if (status & MWL8K_A2H_INT_TX_DONE) {
4296 status &= ~MWL8K_A2H_INT_TX_DONE;
4297 tasklet_schedule(&priv->poll_tx_task);
4298 }
4299
a66098da 4300 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB		 4301 status &= ~MWL8K_A2H_INT_RX_READY;
4302 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB		 4303 }
4304
3aefc37e
NS		 4305 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4306 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4307 ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
4308 }
4309
67e2eb27
LB		 4310 if (status)
4311 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4312
a66098da 4313 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 4314 if (priv->hostcmd_wait != NULL)
a66098da 4315 complete(priv->hostcmd_wait);
a66098da
LB		 4316 }
4317
4318 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 4319 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 4320 priv->radio_on && priv->pending_tx_pkts)
618952a7 4321 mwl8k_tx_start(priv);
a66098da
LB		 4322 }
4323
4324 return IRQ_HANDLED;
4325}
4326
1e9f9de3
LB		 4327static void mwl8k_tx_poll(unsigned long data)
4328{
4329 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4330 struct mwl8k_priv *priv = hw->priv;
4331 int limit;
4332 int i;
4333
4334 limit = 32;
4335
4336 spin_lock_bh(&priv->tx_lock);
4337
e600707b 4338 for (i = 0; i < mwl8k_tx_queues(priv); i++)
1e9f9de3
LB		 4339 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
4340
4341 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
4342 complete(priv->tx_wait);
4343 priv->tx_wait = NULL;
4344 }
4345
4346 spin_unlock_bh(&priv->tx_lock);
4347
4348 if (limit) {
4349 writel(~MWL8K_A2H_INT_TX_DONE,
4350 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4351 } else {
4352 tasklet_schedule(&priv->poll_tx_task);
4353 }
4354}
4355
67e2eb27
LB		 4356static void mwl8k_rx_poll(unsigned long data)
4357{
4358 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4359 struct mwl8k_priv *priv = hw->priv;
4360 int limit;
4361
4362 limit = 32;
4363 limit -= rxq_process(hw, 0, limit);
4364 limit -= rxq_refill(hw, 0, limit);
4365
4366 if (limit) {
4367 writel(~MWL8K_A2H_INT_RX_READY,
4368 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4369 } else {
4370 tasklet_schedule(&priv->poll_rx_task);
4371 }
4372}
4373
a66098da
LB		 4374
4375/*
4376 * Core driver operations.
4377 */
36323f81
TH		 4378static void mwl8k_tx(struct ieee80211_hw *hw,
4379 struct ieee80211_tx_control *control,
4380 struct sk_buff *skb)
a66098da
LB		 4381{
4382 struct mwl8k_priv *priv = hw->priv;
4383 int index = skb_get_queue_mapping(skb);
a66098da 4384
9189c100 4385 if (!priv->radio_on) {
c96c31e4
JP		 4386 wiphy_debug(hw->wiphy,
4387 "dropped TX frame since radio disabled\n");
a66098da 4388 dev_kfree_skb(skb);
7bb45683 4389 return;
a66098da
LB		 4390 }
4391
36323f81 4392 mwl8k_txq_xmit(hw, index, control->sta, skb);
a66098da
LB		 4393}
4394
a66098da
LB		 4395static int mwl8k_start(struct ieee80211_hw *hw)
4396{
a66098da
LB		 4397 struct mwl8k_priv *priv = hw->priv;
4398 int rc;
4399
a0607fd3 4400 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 4401 IRQF_SHARED, MWL8K_NAME, hw);
4402 if (rc) {
bf3ca7f7 4403 priv->irq = -1;
5db55844 4404 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 4405 return -EIO;
a66098da 4406 }
bf3ca7f7 4407 priv->irq = priv->pdev->irq;
a66098da 4408
67e2eb27 4409 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 4410 tasklet_enable(&priv->poll_tx_task);
67e2eb27 4411 tasklet_enable(&priv->poll_rx_task);
2ec610cb 4412
a66098da 4413 /* Enable interrupts */
c23b5a69 4414 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
12488e01
NS		 4415 iowrite32(MWL8K_A2H_EVENTS,
4416 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 4417
2ec610cb
LB		 4418 rc = mwl8k_fw_lock(hw);
4419 if (!rc) {
55489b6e 4420 rc = mwl8k_cmd_radio_enable(hw);
a66098da 4421
5e4cf166
LB		 4422 if (!priv->ap_fw) {
4423 if (!rc)
55489b6e 4424 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 4425
5e4cf166
LB		 4426 if (!rc)
4427 rc = mwl8k_cmd_set_pre_scan(hw);
4428
4429 if (!rc)
4430 rc = mwl8k_cmd_set_post_scan(hw,
4431 "\x00\x00\x00\x00\x00\x00");
4432 }
2ec610cb
LB		 4433
4434 if (!rc)
55489b6e 4435 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 4436
2ec610cb 4437 if (!rc)
55489b6e 4438 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 4439
2ec610cb
LB		 4440 mwl8k_fw_unlock(hw);
4441 }
4442
4443 if (rc) {
4444 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4445 free_irq(priv->pdev->irq, hw);
bf3ca7f7 4446 priv->irq = -1;
1e9f9de3 4447 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4448 tasklet_disable(&priv->poll_rx_task);
2ec610cb 4449 }
a66098da
LB		 4450
4451 return rc;
4452}
4453
a66098da
LB		 4454static void mwl8k_stop(struct ieee80211_hw *hw)
4455{
a66098da
LB		 4456 struct mwl8k_priv *priv = hw->priv;
4457 int i;
4458
6b6accc3
YAP		 4459 if (!priv->hw_restart_in_progress)
4460 mwl8k_cmd_radio_disable(hw);
a66098da
LB		 4461
4462 ieee80211_stop_queues(hw);
4463
a66098da 4464 /* Disable interrupts */
a66098da 4465 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
bf3ca7f7
BC		 4466 if (priv->irq != -1) {
4467 free_irq(priv->pdev->irq, hw);
4468 priv->irq = -1;
4469 }
a66098da
LB		 4470
4471 /* Stop finalize join worker */
4472 cancel_work_sync(&priv->finalize_join_worker);
3aefc37e 4473 cancel_work_sync(&priv->watchdog_ba_handle);
a66098da
LB		 4474 if (priv->beacon_skb != NULL)
4475 dev_kfree_skb(priv->beacon_skb);
4476
67e2eb27 4477 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 4478 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4479 tasklet_disable(&priv->poll_rx_task);
a66098da 4480
a66098da 4481 /* Return all skbs to mac80211 */
e600707b 4482 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 4483 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB		 4484}
4485
0863ade8
BC		 4486static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
4487
a66098da 4488static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 4489 struct ieee80211_vif *vif)
a66098da
LB		 4490{
4491 struct mwl8k_priv *priv = hw->priv;
4492 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 4493 u32 macids_supported;
0863ade8
BC		 4494 int macid, rc;
4495 struct mwl8k_device_info *di;
a66098da 4496
a43c49a8
LB		 4497 /*
4498 * Reject interface creation if sniffer mode is active, as
4499 * STA operation is mutually exclusive with hardware sniffer
b64fe619 4500 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB		 4501 */
4502 if (priv->sniffer_enabled) {
c96c31e4
JP		 4503 wiphy_info(hw->wiphy,
4504 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB		 4505 return -EINVAL;
4506 }
4507
0863ade8 4508 di = priv->device_info;
ee0ddf18
LB		 4509 switch (vif->type) {
4510 case NL80211_IFTYPE_AP:
0863ade8
BC		 4511 if (!priv->ap_fw && di->fw_image_ap) {
4512 /* we must load the ap fw to meet this request */
4513 if (!list_empty(&priv->vif_list))
4514 return -EBUSY;
4515 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4516 if (rc)
4517 return rc;
4518 }
ee0ddf18
LB		 4519 macids_supported = priv->ap_macids_supported;
4520 break;
4521 case NL80211_IFTYPE_STATION:
0863ade8
BC		 4522 if (priv->ap_fw && di->fw_image_sta) {
4523 /* we must load the sta fw to meet this request */
4524 if (!list_empty(&priv->vif_list))
4525 return -EBUSY;
4526 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4527 if (rc)
4528 return rc;
4529 }
ee0ddf18
LB		 4530 macids_supported = priv->sta_macids_supported;
4531 break;
4532 default:
4533 return -EINVAL;
4534 }
4535
4536 macid = ffs(macids_supported & ~priv->macids_used);
4537 if (!macid--)
4538 return -EBUSY;
4539
f5bb87cf 4540 /* Setup driver private area. */
1ed32e4f 4541 mwl8k_vif = MWL8K_VIF(vif);
a66098da 4542 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 4543 mwl8k_vif->vif = vif;
ee0ddf18 4544 mwl8k_vif->macid = macid;
a66098da 4545 mwl8k_vif->seqno = 0;
d9a07d49
NS		 4546 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
4547 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 4548
aa21d0f6
LB		 4549 /* Set the mac address. */
4550 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
4551
4552 if (priv->ap_fw)
4553 mwl8k_cmd_set_new_stn_add_self(hw, vif);
4554
ee0ddf18 4555 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 4556 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB		 4557
4558 return 0;
4559}
4560
6b6accc3
YAP		 4561static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif)
4562{
4563 /* Has ieee80211_restart_hw re-added the removed interfaces? */
4564 if (!priv->macids_used)
4565 return;
4566
4567 priv->macids_used &= ~(1 << vif->macid);
4568 list_del(&vif->list);
4569}
4570
a66098da 4571static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 4572 struct ieee80211_vif *vif)
a66098da
LB		 4573{
4574 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 4575 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 4576
b64fe619
LB		 4577 if (priv->ap_fw)
4578 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
4579
197a4e4e 4580 mwl8k_cmd_del_mac_addr(hw, vif, vif->addr);
32060e1b 4581
6b6accc3
YAP		 4582 mwl8k_remove_vif(priv, mwl8k_vif);
4583}
4584
4585static void mwl8k_hw_restart_work(struct work_struct *work)
4586{
4587 struct mwl8k_priv *priv =
4588 container_of(work, struct mwl8k_priv, fw_reload);
4589 struct ieee80211_hw *hw = priv->hw;
4590 struct mwl8k_device_info *di;
4591 int rc;
4592
4593 /* If some command is waiting for a response, clear it */
4594 if (priv->hostcmd_wait != NULL) {
4595 complete(priv->hostcmd_wait);
4596 priv->hostcmd_wait = NULL;
4597 }
4598
4599 priv->hw_restart_owner = current;
4600 di = priv->device_info;
4601 mwl8k_fw_lock(hw);
4602
4603 if (priv->ap_fw)
4604 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4605 else
4606 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4607
4608 if (rc)
4609 goto fail;
4610
4611 priv->hw_restart_owner = NULL;
4612 priv->hw_restart_in_progress = false;
4613
4614 /*
4615 * This unlock will wake up the queues and
4616 * also opens the command path for other
4617 * commands
4618 */
4619 mwl8k_fw_unlock(hw);
4620
4621 ieee80211_restart_hw(hw);
4622
4623 wiphy_err(hw->wiphy, "Firmware restarted successfully\n");
4624
4625 return;
4626fail:
4627 mwl8k_fw_unlock(hw);
4628
4629 wiphy_err(hw->wiphy, "Firmware restart failed\n");
a66098da
LB		 4630}
4631
ee03a932 4632static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 4633{
a66098da
LB		 4634 struct ieee80211_conf *conf = &hw->conf;
4635 struct mwl8k_priv *priv = hw->priv;
ee03a932 4636 int rc;
a66098da 4637
7595d67a 4638 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 4639 mwl8k_cmd_radio_disable(hw);
ee03a932 4640 return 0;
7595d67a
LB		 4641 }
4642
ee03a932
LB		 4643 rc = mwl8k_fw_lock(hw);
4644 if (rc)
4645 return rc;
a66098da 4646
55489b6e 4647 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB		 4648 if (rc)
4649 goto out;
a66098da 4650
610677d2 4651 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB		 4652 if (rc)
4653 goto out;
4654
a66098da
LB		 4655 if (conf->power_level > 18)
4656 conf->power_level = 18;
a66098da 4657
08b06347 4658 if (priv->ap_fw) {
03217087
NS		 4659
4660 if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
4661 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
4662 if (rc)
4663 goto out;
4664 }
41fdf097 4665
da62b761
NS		 4666 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
4667 if (rc)
4668 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
4669 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
4670 if (rc)
4671 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
4672
08b06347 4673 } else {
41fdf097
NS		 4674 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
4675 if (rc)
4676 goto out;
08b06347
LB		 4677 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
4678 }
a66098da 4679
ee03a932
LB		 4680out:
4681 mwl8k_fw_unlock(hw);
a66098da 4682
ee03a932 4683 return rc;
a66098da
LB		 4684}
4685
b64fe619
LB		 4686static void
4687mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4688 struct ieee80211_bss_conf *info, u32 changed)
a66098da 4689{
a66098da 4690 struct mwl8k_priv *priv = hw->priv;
ba30c4a5 4691 u32 ap_legacy_rates = 0;
13935e2c 4692 u8 ap_mcs_rates[16];
3a980d0a
LB		 4693 int rc;
4694
c3cbbe8a 4695 if (mwl8k_fw_lock(hw))
3a980d0a 4696 return;
a66098da 4697
c3cbbe8a
LB		 4698 /*
4699 * No need to capture a beacon if we're no longer associated.
4700 */
4701 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
4702 priv->capture_beacon = false;
3a980d0a 4703
c3cbbe8a 4704 /*
13935e2c 4705 * Get the AP's legacy and MCS rates.
c3cbbe8a 4706 */
7dc6a7a7 4707 if (vif->bss_conf.assoc) {
c6e96010 4708 struct ieee80211_sta *ap;
c97470dd 4709
c6e96010 4710 rcu_read_lock();
c6e96010 4711
c3cbbe8a
LB		 4712 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4713 if (ap == NULL) {
4714 rcu_read_unlock();
c6e96010 4715 goto out;
c3cbbe8a
LB		 4716 }
4717
8707d026
LB		 4718 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4719 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4720 } else {
4721 ap_legacy_rates =
4722 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4723 }
13935e2c 4724 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB		 4725
4726 rcu_read_unlock();
4727 }
c6e96010 4728
c3cbbe8a 4729 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4730 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB		 4731 if (rc)
4732 goto out;
a66098da 4733
b71ed2c6 4734 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB		 4735 if (rc)
4736 goto out;
c3cbbe8a 4737 }
a66098da 4738
c3cbbe8a 4739 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB		 4740 rc = mwl8k_set_radio_preamble(hw,
4741 vif->bss_conf.use_short_preamble);
3a980d0a
LB		 4742 if (rc)
4743 goto out;
c3cbbe8a 4744 }
a66098da 4745
c3cbbe8a 4746 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4747 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB		 4748 if (rc)
4749 goto out;
c3cbbe8a 4750 }
a66098da 4751
c97470dd
LB		 4752 if (vif->bss_conf.assoc &&
4753 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4754 BSS_CHANGED_HT))) {
c3cbbe8a 4755 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB		 4756 if (rc)
4757 goto out;
c3cbbe8a 4758 }
a66098da 4759
c3cbbe8a
LB		 4760 if (vif->bss_conf.assoc &&
4761 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB		 4762 /*
4763 * Finalize the join. Tell rx handler to process
4764 * next beacon from our BSSID.
4765 */
0a11dfc3 4766 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4767 priv->capture_beacon = true;
a66098da
LB		 4768 }
4769
3a980d0a
LB		 4770out:
4771 mwl8k_fw_unlock(hw);
a66098da
LB		 4772}
4773
b64fe619
LB		 4774static void
4775mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4776 struct ieee80211_bss_conf *info, u32 changed)
4777{
4778 int rc;
4779
4780 if (mwl8k_fw_lock(hw))
4781 return;
4782
4783 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4784 rc = mwl8k_set_radio_preamble(hw,
4785 vif->bss_conf.use_short_preamble);
4786 if (rc)
4787 goto out;
4788 }
4789
4790 if (changed & BSS_CHANGED_BASIC_RATES) {
4791 int idx;
4792 int rate;
4793
4794 /*
4795 * Use lowest supported basic rate for multicasts
4796 * and management frames (such as probe responses --
4797 * beacons will always go out at 1 Mb/s).
4798 */
4799 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB		 4800 if (idx)
4801 idx--;
4802
4803 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4804 rate = mwl8k_rates_24[idx].hw_value;
4805 else
4806 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB		 4807
4808 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4809 }
4810
4811 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4812 struct sk_buff *skb;
4813
4814 skb = ieee80211_beacon_get(hw, vif);
4815 if (skb != NULL) {
aa21d0f6 4816 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB		 4817 kfree_skb(skb);
4818 }
4819 }
4820
4821 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4822 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB		 4823
4824out:
4825 mwl8k_fw_unlock(hw);
4826}
4827
4828static void
4829mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4830 struct ieee80211_bss_conf *info, u32 changed)
4831{
4832 struct mwl8k_priv *priv = hw->priv;
4833
4834 if (!priv->ap_fw)
4835 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4836 else
4837 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4838}
4839
e81cd2d6 4840static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4841 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB		 4842{
4843 struct mwl8k_cmd_pkt *cmd;
4844
447ced07
LB		 4845 /*
4846 * Synthesize and return a command packet that programs the
4847 * hardware multicast address filter. At this point we don't
4848 * know whether FIF_ALLMULTI is being requested, but if it is,
4849 * we'll end up throwing this packet away and creating a new
4850 * one in mwl8k_configure_filter().
4851 */
22bedad3 4852 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB		 4853
4854 return (unsigned long)cmd;
4855}
4856
a43c49a8
LB		 4857static int
4858mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4859 unsigned int changed_flags,
4860 unsigned int *total_flags)
4861{
4862 struct mwl8k_priv *priv = hw->priv;
4863
4864 /*
4865 * Hardware sniffer mode is mutually exclusive with STA
4866 * operation, so refuse to enable sniffer mode if a STA
4867 * interface is active.
4868 */
f5bb87cf 4869 if (!list_empty(&priv->vif_list)) {
a43c49a8 4870 if (net_ratelimit())
c96c31e4
JP		 4871 wiphy_info(hw->wiphy,
4872 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB		 4873 return 0;
4874 }
4875
4876 if (!priv->sniffer_enabled) {
55489b6e 4877 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB		 4878 return 0;
4879 priv->sniffer_enabled = true;
4880 }
4881
4882 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4883 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4884 FIF_OTHER_BSS;
4885
4886 return 1;
4887}
4888
f5bb87cf
LB		 4889static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4890{
4891 if (!list_empty(&priv->vif_list))
4892 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4893
4894 return NULL;
4895}
4896
e6935ea1
LB		 4897static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4898 unsigned int changed_flags,
4899 unsigned int *total_flags,
4900 u64 multicast)
4901{
4902 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB		 4903 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4904
c0adae2c
LB		 4905 /*
4906 * AP firmware doesn't allow fine-grained control over
4907 * the receive filter.
4908 */
4909 if (priv->ap_fw) {
4910 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4911 kfree(cmd);
4912 return;
4913 }
4914
a43c49a8
LB		 4915 /*
4916 * Enable hardware sniffer mode if FIF_CONTROL or
4917 * FIF_OTHER_BSS is requested.
4918 */
4919 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
4920 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
4921 kfree(cmd);
4922 return;
4923 }
a66098da 4924
e6935ea1 4925 /* Clear unsupported feature flags */
447ced07 4926 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 4927
90852f7a
LB		 4928 if (mwl8k_fw_lock(hw)) {
4929 kfree(cmd);
e6935ea1 4930 return;
90852f7a 4931 }
a66098da 4932
a43c49a8 4933 if (priv->sniffer_enabled) {
55489b6e 4934 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB		 4935 priv->sniffer_enabled = false;
4936 }
4937
e6935ea1 4938 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB		 4939 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
4940 /*
4941 * Disable the BSS filter.
4942 */
e6935ea1 4943 mwl8k_cmd_set_pre_scan(hw);
77165d88 4944 } else {
f5bb87cf 4945 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 4946 const u8 *bssid;
a94cc97e 4947
77165d88
LB		 4948 /*
4949 * Enable the BSS filter.
4950 *
4951 * If there is an active STA interface, use that
4952 * interface's BSSID, otherwise use a dummy one
4953 * (where the OUI part needs to be nonzero for
4954 * the BSSID to be accepted by POST_SCAN).
4955 */
f5bb87cf
LB		 4956 mwl8k_vif = mwl8k_first_vif(priv);
4957 if (mwl8k_vif != NULL)
4958 bssid = mwl8k_vif->vif->bss_conf.bssid;
4959 else
4960 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 4961
e6935ea1 4962 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 4963 }
4964 }
4965
447ced07
LB		 4966 /*
4967 * If FIF_ALLMULTI is being requested, throw away the command
4968 * packet that ->prepare_multicast() built and replace it with
4969 * a command packet that enables reception of all multicast
4970 * packets.
4971 */
4972 if (*total_flags & FIF_ALLMULTI) {
4973 kfree(cmd);
22bedad3 4974 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB		 4975 }
4976
4977 if (cmd != NULL) {
4978 mwl8k_post_cmd(hw, cmd);
4979 kfree(cmd);
e6935ea1 4980 }
a66098da 4981
e6935ea1 4982 mwl8k_fw_unlock(hw);
a66098da
LB		 4983}
4984
a66098da
LB		 4985static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
4986{
c2c2b12a 4987 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB		 4988}
4989
4a6967b8
JB		 4990static int mwl8k_sta_remove(struct ieee80211_hw *hw,
4991 struct ieee80211_vif *vif,
4992 struct ieee80211_sta *sta)
3f5610ff
LB		 4993{
4994 struct mwl8k_priv *priv = hw->priv;
4995
4a6967b8
JB		 4996 if (priv->ap_fw)
4997 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
4998 else
4999 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB		 5000}
5001
4a6967b8
JB		 5002static int mwl8k_sta_add(struct ieee80211_hw *hw,
5003 struct ieee80211_vif *vif,
5004 struct ieee80211_sta *sta)
bbfd9128
LB		 5005{
5006 struct mwl8k_priv *priv = hw->priv;
4a6967b8 5007 int ret;
fcdc403c
NS		 5008 int i;
5009 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
5010 struct ieee80211_key_conf *key;
bbfd9128 5011
4a6967b8
JB		 5012 if (!priv->ap_fw) {
5013 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
5014 if (ret >= 0) {
5015 MWL8K_STA(sta)->peer_id = ret;
17033543
NS		 5016 if (sta->ht_cap.ht_supported)
5017 MWL8K_STA(sta)->is_ampdu_allowed = true;
fcdc403c 5018 ret = 0;
4a6967b8 5019 }
bbfd9128 5020
d9a07d49
NS		 5021 } else {
5022 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 5023 }
4a6967b8 5024
d9a07d49
NS		 5025 for (i = 0; i < NUM_WEP_KEYS; i++) {
5026 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
5027 if (mwl8k_vif->wep_key_conf[i].enabled)
5028 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
5029 }
fcdc403c 5030 return ret;
bbfd9128
LB		 5031}
5032
8a3a3c85
EP		 5033static int mwl8k_conf_tx(struct ieee80211_hw *hw,
5034 struct ieee80211_vif *vif, u16 queue,
a66098da
LB		 5035 const struct ieee80211_tx_queue_params *params)
5036{
3e4f542c 5037 struct mwl8k_priv *priv = hw->priv;
a66098da 5038 int rc;
a66098da 5039
3e4f542c
LB		 5040 rc = mwl8k_fw_lock(hw);
5041 if (!rc) {
e600707b 5042 BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
0863ade8
BC		 5043 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
5044
3e4f542c 5045 if (!priv->wmm_enabled)
55489b6e 5046 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 5047
85c9205c 5048 if (!rc) {
e600707b 5049 int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
85c9205c 5050 rc = mwl8k_cmd_set_edca_params(hw, q,
55489b6e
LB		 5051 params->cw_min,
5052 params->cw_max,
5053 params->aifs,
5054 params->txop);
85c9205c 5055 }
3e4f542c
LB		 5056
5057 mwl8k_fw_unlock(hw);
a66098da 5058 }
3e4f542c 5059
a66098da
LB		 5060 return rc;
5061}
5062
a66098da
LB		 5063static int mwl8k_get_stats(struct ieee80211_hw *hw,
5064 struct ieee80211_low_level_stats *stats)
5065{
55489b6e 5066 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB		 5067}
5068
0d462bbb
JL		 5069static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
5070 struct survey_info *survey)
5071{
5072 struct mwl8k_priv *priv = hw->priv;
5073 struct ieee80211_conf *conf = &hw->conf;
5074
5075 if (idx != 0)
5076 return -ENOENT;
5077
5078 survey->channel = conf->channel;
5079 survey->filled = SURVEY_INFO_NOISE_DBM;
5080 survey->noise = priv->noise;
5081
5082 return 0;
5083}
5084
65f3ddcd
NS		 5085#define MAX_AMPDU_ATTEMPTS 5
5086
a2292d83
LB		 5087static int
5088mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5089 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB		 5090 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
5091 u8 buf_size)
a2292d83 5092{
65f3ddcd
NS		 5093
5094 int i, rc = 0;
5095 struct mwl8k_priv *priv = hw->priv;
5096 struct mwl8k_ampdu_stream *stream;
5097 u8 *addr = sta->addr;
fd712f5f 5098 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
65f3ddcd
NS		 5099
5100 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
5101 return -ENOTSUPP;
5102
5103 spin_lock(&priv->stream_lock);
5104 stream = mwl8k_lookup_stream(hw, addr, tid);
5105
a2292d83
LB		 5106 switch (action) {
5107 case IEEE80211_AMPDU_RX_START:
5108 case IEEE80211_AMPDU_RX_STOP:
65f3ddcd
NS		 5109 break;
5110 case IEEE80211_AMPDU_TX_START:
5111 /* By the time we get here the hw queues may contain outgoing
5112 * packets for this RA/TID that are not part of this BA
5113 * session. The hw will assign sequence numbers to these
5114 * packets as they go out. So if we query the hw for its next
5115 * sequence number and use that for the SSN here, it may end up
5116 * being wrong, which will lead to sequence number mismatch at
5117 * the recipient. To avoid this, we reset the sequence number
5118 * to O for the first MPDU in this BA stream.
5119 */
5120 *ssn = 0;
5121 if (stream == NULL) {
5122 /* This means that somebody outside this driver called
5123 * ieee80211_start_tx_ba_session. This is unexpected
5124 * because we do our own rate control. Just warn and
5125 * move on.
5126 */
5127 wiphy_warn(hw->wiphy, "Unexpected call to %s. "
5128 "Proceeding anyway.\n", __func__);
5129 stream = mwl8k_add_stream(hw, sta, tid);
5130 }
5131 if (stream == NULL) {
5132 wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
5133 rc = -EBUSY;
5134 break;
5135 }
5136 stream->state = AMPDU_STREAM_IN_PROGRESS;
5137
5138 /* Release the lock before we do the time consuming stuff */
5139 spin_unlock(&priv->stream_lock);
5140 for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
fd712f5f
YAP		 5141
5142 /* Check if link is still valid */
5143 if (!sta_info->is_ampdu_allowed) {
5144 spin_lock(&priv->stream_lock);
5145 mwl8k_remove_stream(hw, stream);
5146 spin_unlock(&priv->stream_lock);
5147 return -EBUSY;
5148 }
5149
f95275c4 5150 rc = mwl8k_check_ba(hw, stream, vif);
65f3ddcd 5151
6b6accc3
YAP		 5152 /* If HW restart is in progress mwl8k_post_cmd will
5153 * return -EBUSY. Avoid retrying mwl8k_check_ba in
5154 * such cases
5155 */
5156 if (!rc || rc == -EBUSY)
65f3ddcd
NS		 5157 break;
5158 /*
5159 * HW queues take time to be flushed, give them
5160 * sufficient time
5161 */
5162
5163 msleep(1000);
5164 }
5165 spin_lock(&priv->stream_lock);
5166 if (rc) {
5167 wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
5168 " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
5169 mwl8k_remove_stream(hw, stream);
5170 rc = -EBUSY;
5171 break;
5172 }
5173 ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
5174 break;
18b559d5
JB		 5175 case IEEE80211_AMPDU_TX_STOP_CONT:
5176 case IEEE80211_AMPDU_TX_STOP_FLUSH:
5177 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
eca107ff
YAP		 5178 if (stream) {
5179 if (stream->state == AMPDU_STREAM_ACTIVE) {
5180 spin_unlock(&priv->stream_lock);
5181 mwl8k_destroy_ba(hw, stream);
5182 spin_lock(&priv->stream_lock);
5183 }
5184 mwl8k_remove_stream(hw, stream);
65f3ddcd 5185 }
65f3ddcd
NS		 5186 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
5187 break;
5188 case IEEE80211_AMPDU_TX_OPERATIONAL:
5189 BUG_ON(stream == NULL);
5190 BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
5191 spin_unlock(&priv->stream_lock);
f95275c4 5192 rc = mwl8k_create_ba(hw, stream, buf_size, vif);
65f3ddcd
NS		 5193 spin_lock(&priv->stream_lock);
5194 if (!rc)
5195 stream->state = AMPDU_STREAM_ACTIVE;
5196 else {
5197 spin_unlock(&priv->stream_lock);
5198 mwl8k_destroy_ba(hw, stream);
5199 spin_lock(&priv->stream_lock);
5200 wiphy_debug(hw->wiphy,
5201 "Failed adding stream for sta %pM tid %d\n",
5202 addr, tid);
5203 mwl8k_remove_stream(hw, stream);
5204 }
5205 break;
5206
a2292d83 5207 default:
65f3ddcd 5208 rc = -ENOTSUPP;
a2292d83 5209 }
65f3ddcd
NS		 5210
5211 spin_unlock(&priv->stream_lock);
5212 return rc;
a2292d83
LB		 5213}
5214
a66098da
LB		 5215static const struct ieee80211_ops mwl8k_ops = {
5216 .tx = mwl8k_tx,
5217 .start = mwl8k_start,
5218 .stop = mwl8k_stop,
5219 .add_interface = mwl8k_add_interface,
5220 .remove_interface = mwl8k_remove_interface,
5221 .config = mwl8k_config,
a66098da 5222 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 5223 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 5224 .configure_filter = mwl8k_configure_filter,
fcdc403c 5225 .set_key = mwl8k_set_key,
a66098da 5226 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB		 5227 .sta_add = mwl8k_sta_add,
5228 .sta_remove = mwl8k_sta_remove,
a66098da 5229 .conf_tx = mwl8k_conf_tx,
a66098da 5230 .get_stats = mwl8k_get_stats,
0d462bbb 5231 .get_survey = mwl8k_get_survey,
a2292d83 5232 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB		 5233};
5234
a66098da
LB		 5235static void mwl8k_finalize_join_worker(struct work_struct *work)
5236{
5237 struct mwl8k_priv *priv =
5238 container_of(work, struct mwl8k_priv, finalize_join_worker);
5239 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB		 5240 struct ieee80211_mgmt *mgmt = (void *)skb->data;
5241 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
5242 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
5243 mgmt->u.beacon.variable, len);
5244 int dtim_period = 1;
5245
5246 if (tim && tim[1] >= 2)
5247 dtim_period = tim[3];
a66098da 5248
56007a02 5249 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 5250
f5bb87cf 5251 dev_kfree_skb(skb);
a66098da
LB		 5252 priv->beacon_skb = NULL;
5253}
5254
bcb628d5 5255enum {
9e1b17ea
LB		 5256 MWL8363 = 0,
5257 MWL8687,
bcb628d5 5258 MWL8366,
6f6d1e9a
LB		 5259};
5260
8a7a578c 5261#define MWL8K_8366_AP_FW_API 2
952a0e96
BC		 5262#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
5263#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
5264
8dee5eef 5265static struct mwl8k_device_info mwl8k_info_tbl[] = {
9e1b17ea
LB		 5266 [MWL8363] = {
5267 .part_name = "88w8363",
5268 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 5269 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 5270 },
49eb691c 5271 [MWL8687] = {
bcb628d5
JL		 5272 .part_name = "88w8687",
5273 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 5274 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 5275 },
49eb691c 5276 [MWL8366] = {
bcb628d5
JL		 5277 .part_name = "88w8366",
5278 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 5279 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC		 5280 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
5281 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 5282 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 5283 },
45a390dd
LB		 5284};
5285
c92d4ede
LB		 5286MODULE_FIRMWARE("mwl8k/helper_8363.fw");
5287MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
5288MODULE_FIRMWARE("mwl8k/helper_8687.fw");
5289MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
5290MODULE_FIRMWARE("mwl8k/helper_8366.fw");
5291MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 5292MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 5293
45a390dd 5294static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 5295 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB		 5296 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
5297 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL		 5298 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
5299 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
5300 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 5301 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 5302 { },
45a390dd
LB		 5303};
5304MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
5305
99020471
BC		 5306static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
5307{
5308 int rc;
5309 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
5310 "Trying alternative firmware %s\n", pci_name(priv->pdev),
5311 priv->fw_pref, priv->fw_alt);
5312 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
5313 if (rc) {
5314 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5315 pci_name(priv->pdev), priv->fw_alt);
5316 return rc;
5317 }
5318 return 0;
5319}
5320
5321static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
5322static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
5323{
5324 struct mwl8k_priv *priv = context;
5325 struct mwl8k_device_info *di = priv->device_info;
5326 int rc;
5327
5328 switch (priv->fw_state) {
5329 case FW_STATE_INIT:
5330 if (!fw) {
5331 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
5332 pci_name(priv->pdev), di->helper_image);
5333 goto fail;
5334 }
5335 priv->fw_helper = fw;
5336 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
5337 true);
5338 if (rc && priv->fw_alt) {
5339 rc = mwl8k_request_alt_fw(priv);
5340 if (rc)
5341 goto fail;
5342 priv->fw_state = FW_STATE_LOADING_ALT;
5343 } else if (rc)
5344 goto fail;
5345 else
5346 priv->fw_state = FW_STATE_LOADING_PREF;
5347 break;
5348
5349 case FW_STATE_LOADING_PREF:
5350 if (!fw) {
5351 if (priv->fw_alt) {
5352 rc = mwl8k_request_alt_fw(priv);
5353 if (rc)
5354 goto fail;
5355 priv->fw_state = FW_STATE_LOADING_ALT;
5356 } else
5357 goto fail;
5358 } else {
5359 priv->fw_ucode = fw;
5360 rc = mwl8k_firmware_load_success(priv);
5361 if (rc)
5362 goto fail;
5363 else
5364 complete(&priv->firmware_loading_complete);
5365 }
5366 break;
5367
5368 case FW_STATE_LOADING_ALT:
5369 if (!fw) {
5370 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5371 pci_name(priv->pdev), di->helper_image);
5372 goto fail;
5373 }
5374 priv->fw_ucode = fw;
5375 rc = mwl8k_firmware_load_success(priv);
5376 if (rc)
5377 goto fail;
5378 else
5379 complete(&priv->firmware_loading_complete);
5380 break;
5381
5382 default:
5383 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
5384 MWL8K_NAME, priv->fw_state);
5385 BUG_ON(1);
5386 }
5387
5388 return;
5389
5390fail:
5391 priv->fw_state = FW_STATE_ERROR;
5392 complete(&priv->firmware_loading_complete);
5393 device_release_driver(&priv->pdev->dev);
5394 mwl8k_release_firmware(priv);
5395}
5396
6b6accc3 5397#define MAX_RESTART_ATTEMPTS 1
99020471
BC		 5398static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
5399 bool nowait)
a66098da 5400{
3cc7772c 5401 struct mwl8k_priv *priv = hw->priv;
a66098da 5402 int rc;
6b6accc3 5403 int count = MAX_RESTART_ATTEMPTS;
be695fc4 5404
6b6accc3 5405retry:
be695fc4
LB		 5406 /* Reset firmware and hardware */
5407 mwl8k_hw_reset(priv);
5408
5409 /* Ask userland hotplug daemon for the device firmware */
99020471 5410 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 5411 if (rc) {
5db55844 5412 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 5413 return rc;
be695fc4
LB		 5414 }
5415
99020471
BC		 5416 if (nowait)
5417 return rc;
5418
be695fc4
LB		 5419 /* Load firmware into hardware */
5420 rc = mwl8k_load_firmware(hw);
3cc7772c 5421 if (rc)
5db55844 5422 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB		 5423
5424 /* Reclaim memory once firmware is successfully loaded */
5425 mwl8k_release_firmware(priv);
5426
6b6accc3
YAP		 5427 if (rc && count) {
5428 /* FW did not start successfully;
5429 * lets try one more time
5430 */
5431 count--;
5432 wiphy_err(hw->wiphy, "Trying to reload the firmware again\n");
5433 msleep(20);
5434 goto retry;
5435 }
5436
3cc7772c
BC		 5437 return rc;
5438}
5439
73b46320
BC		 5440static int mwl8k_init_txqs(struct ieee80211_hw *hw)
5441{
5442 struct mwl8k_priv *priv = hw->priv;
5443 int rc = 0;
5444 int i;
5445
e600707b 5446 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
73b46320
BC		 5447 rc = mwl8k_txq_init(hw, i);
5448 if (rc)
5449 break;
5450 if (priv->ap_fw)
5451 iowrite32(priv->txq[i].txd_dma,
5452 priv->sram + priv->txq_offset[i]);
5453 }
5454 return rc;
5455}
5456
3cc7772c
BC		 5457/* initialize hw after successfully loading a firmware image */
5458static int mwl8k_probe_hw(struct ieee80211_hw *hw)
5459{
5460 struct mwl8k_priv *priv = hw->priv;
5461 int rc = 0;
5462 int i;
be695fc4 5463
91942230 5464 if (priv->ap_fw) {
89a91f4f 5465 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 5466 if (priv->rxd_ops == NULL) {
c96c31e4
JP		 5467 wiphy_err(hw->wiphy,
5468 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB		 5469 goto err_stop_firmware;
5470 }
5471 } else {
89a91f4f 5472 priv->rxd_ops = &rxd_sta_ops;
91942230 5473 }
be695fc4
LB		 5474
5475 priv->sniffer_enabled = false;
5476 priv->wmm_enabled = false;
5477 priv->pending_tx_pkts = 0;
5478
a66098da
LB		 5479 rc = mwl8k_rxq_init(hw, 0);
5480 if (rc)
3cc7772c 5481 goto err_stop_firmware;
a66098da
LB		 5482 rxq_refill(hw, 0, INT_MAX);
5483
73b46320
BC		 5484 /* For the sta firmware, we need to know the dma addresses of tx queues
5485 * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
5486 * prior to issuing this command. But for the AP case, we learn the
5487 * total number of queues from the result CMD_GET_HW_SPEC, so for this
5488 * case we must initialize the tx queues after.
5489 */
8a7a578c 5490 priv->num_ampdu_queues = 0;
73b46320
BC		 5491 if (!priv->ap_fw) {
5492 rc = mwl8k_init_txqs(hw);
a66098da
LB		 5493 if (rc)
5494 goto err_free_queues;
5495 }
5496
5497 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 5498 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3aefc37e
NS		 5499 iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
5500 MWL8K_A2H_INT_BA_WATCHDOG,
1e9f9de3 5501 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
12488e01
NS		 5502 iowrite32(MWL8K_A2H_INT_OPC_DONE,
5503 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 5504
a0607fd3 5505 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 5506 IRQF_SHARED, MWL8K_NAME, hw);
5507 if (rc) {
5db55844 5508 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB		 5509 goto err_free_queues;
5510 }
5511
6b6accc3
YAP		 5512 /*
5513 * When hw restart is requested,
5514 * mac80211 will take care of clearing
5515 * the ampdu streams, so do not clear
5516 * the ampdu state here
5517 */
5518 if (!priv->hw_restart_in_progress)
5519 memset(priv->ampdu, 0, sizeof(priv->ampdu));
ac109fd0 5520
a66098da
LB		 5521 /*
5522 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 5523 * commands use interrupts and avoid polling. Disable
a66098da
LB		 5524 * interrupts when done.
5525 */
c23b5a69 5526 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5527
5528 /* Get config data, mac addrs etc */
42fba21d
LB		 5529 if (priv->ap_fw) {
5530 rc = mwl8k_cmd_get_hw_spec_ap(hw);
73b46320
BC		 5531 if (!rc)
5532 rc = mwl8k_init_txqs(hw);
42fba21d
LB		 5533 if (!rc)
5534 rc = mwl8k_cmd_set_hw_spec(hw);
5535 } else {
5536 rc = mwl8k_cmd_get_hw_spec_sta(hw);
5537 }
a66098da 5538 if (rc) {
5db55844 5539 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 5540 goto err_free_irq;
a66098da
LB		 5541 }
5542
5543 /* Turn radio off */
55489b6e 5544 rc = mwl8k_cmd_radio_disable(hw);
a66098da 5545 if (rc) {
5db55844 5546 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 5547 goto err_free_irq;
a66098da
LB		 5548 }
5549
32060e1b 5550 /* Clear MAC address */
aa21d0f6 5551 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 5552 if (rc) {
5db55844 5553 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 5554 goto err_free_irq;
32060e1b
LB		 5555 }
5556
a66098da 5557 /* Disable interrupts */
a66098da 5558 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5559 free_irq(priv->pdev->irq, hw);
5560
c96c31e4
JP		 5561 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
5562 priv->device_info->part_name,
5563 priv->hw_rev, hw->wiphy->perm_addr,
5564 priv->ap_fw ? "AP" : "STA",
5565 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
5566 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB		 5567
5568 return 0;
5569
a66098da 5570err_free_irq:
a66098da 5571 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5572 free_irq(priv->pdev->irq, hw);
5573
5574err_free_queues:
e600707b 5575 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5576 mwl8k_txq_deinit(hw, i);
5577 mwl8k_rxq_deinit(hw, 0);
5578
3cc7772c
BC		 5579err_stop_firmware:
5580 mwl8k_hw_reset(priv);
5581
5582 return rc;
5583}
5584
5585/*
5586 * invoke mwl8k_reload_firmware to change the firmware image after the device
5587 * has already been registered
5588 */
5589static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
5590{
5591 int i, rc = 0;
5592 struct mwl8k_priv *priv = hw->priv;
6b6accc3 5593 struct mwl8k_vif *vif, *tmp_vif;
3cc7772c
BC		 5594
5595 mwl8k_stop(hw);
5596 mwl8k_rxq_deinit(hw, 0);
5597
6b6accc3
YAP		 5598 /*
5599 * All the existing interfaces are re-added by the ieee80211_reconfig;
5600 * which means driver should remove existing interfaces before calling
5601 * ieee80211_restart_hw
5602 */
5603 if (priv->hw_restart_in_progress)
5604 list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list)
5605 mwl8k_remove_vif(priv, vif);
5606
e600707b 5607 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5608 mwl8k_txq_deinit(hw, i);
5609
99020471 5610 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC		 5611 if (rc)
5612 goto fail;
5613
5614 rc = mwl8k_probe_hw(hw);
5615 if (rc)
5616 goto fail;
5617
6b6accc3
YAP		 5618 if (priv->hw_restart_in_progress)
5619 return rc;
5620
3cc7772c
BC		 5621 rc = mwl8k_start(hw);
5622 if (rc)
5623 goto fail;
5624
5625 rc = mwl8k_config(hw, ~0);
5626 if (rc)
5627 goto fail;
5628
e600707b 5629 for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
8a3a3c85 5630 rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]);
3cc7772c
BC		 5631 if (rc)
5632 goto fail;
5633 }
5634
5635 return rc;
5636
5637fail:
5638 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
5639 return rc;
5640}
5641
5d377fca
YAP		 5642static const struct ieee80211_iface_limit ap_if_limits[] = {
5643 { .max = 8, .types = BIT(NL80211_IFTYPE_AP) },
5644};
5645
5646static const struct ieee80211_iface_combination ap_if_comb = {
5647 .limits = ap_if_limits,
5648 .n_limits = ARRAY_SIZE(ap_if_limits),
5649 .max_interfaces = 8,
5650 .num_different_channels = 1,
5651};
5652
5653
3cc7772c
BC		 5654static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5655{
5656 struct ieee80211_hw *hw = priv->hw;
5657 int i, rc;
5658
99020471
BC		 5659 rc = mwl8k_load_firmware(hw);
5660 mwl8k_release_firmware(priv);
5661 if (rc) {
5662 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5663 return rc;
5664 }
5665
3cc7772c
BC		 5666 /*
5667 * Extra headroom is the size of the required DMA header
5668 * minus the size of the smallest 802.11 frame (CTS frame).
5669 */
5670 hw->extra_tx_headroom =
5671 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
5672
ff776cec
YAP		 5673 hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
5674
3cc7772c
BC		 5675 hw->channel_change_time = 10;
5676
e600707b 5677 hw->queues = MWL8K_TX_WMM_QUEUES;
3cc7772c
BC		 5678
5679 /* Set rssi values to dBm */
0bf22c37 5680 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
2a36a0ec
YAP		 5681
5682 /*
5683 * Ask mac80211 to not to trigger PS mode
5684 * based on PM bit of incoming frames.
5685 */
5686 if (priv->ap_fw)
5687 hw->flags |= IEEE80211_HW_AP_LINK_PS;
5688
3cc7772c
BC		 5689 hw->vif_data_size = sizeof(struct mwl8k_vif);
5690 hw->sta_data_size = sizeof(struct mwl8k_sta);
5691
5692 priv->macids_used = 0;
5693 INIT_LIST_HEAD(&priv->vif_list);
5694
5695 /* Set default radio state and preamble */
3db1cd5c
RR		 5696 priv->radio_on = false;
5697 priv->radio_short_preamble = false;
3cc7772c
BC		 5698
5699 /* Finalize join worker */
5700 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3aefc37e
NS		 5701 /* Handle watchdog ba events */
5702 INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
6b6accc3
YAP		 5703 /* To reload the firmware if it crashes */
5704 INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work);
3cc7772c
BC		 5705
5706 /* TX reclaim and RX tasklets. */
5707 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
5708 tasklet_disable(&priv->poll_tx_task);
5709 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
5710 tasklet_disable(&priv->poll_rx_task);
5711
5712 /* Power management cookie */
5713 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
5714 if (priv->cookie == NULL)
5715 return -ENOMEM;
5716
5717 mutex_init(&priv->fw_mutex);
5718 priv->fw_mutex_owner = NULL;
5719 priv->fw_mutex_depth = 0;
5720 priv->hostcmd_wait = NULL;
5721
5722 spin_lock_init(&priv->tx_lock);
5723
ac109fd0
BC		 5724 spin_lock_init(&priv->stream_lock);
5725
3cc7772c
BC		 5726 priv->tx_wait = NULL;
5727
5728 rc = mwl8k_probe_hw(hw);
5729 if (rc)
5730 goto err_free_cookie;
5731
5732 hw->wiphy->interface_modes = 0;
5d377fca
YAP		 5733
5734 if (priv->ap_macids_supported || priv->device_info->fw_image_ap) {
3cc7772c 5735 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
5d377fca
YAP		 5736 hw->wiphy->iface_combinations = &ap_if_comb;
5737 hw->wiphy->n_iface_combinations = 1;
5738 }
5739
3cc7772c
BC		 5740 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
5741 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
5742
5743 rc = ieee80211_register_hw(hw);
5744 if (rc) {
5745 wiphy_err(hw->wiphy, "Cannot register device\n");
5746 goto err_unprobe_hw;
5747 }
5748
5749 return 0;
5750
5751err_unprobe_hw:
e600707b 5752 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5753 mwl8k_txq_deinit(hw, i);
5754 mwl8k_rxq_deinit(hw, 0);
5755
be695fc4 5756err_free_cookie:
a66098da
LB		 5757 if (priv->cookie != NULL)
5758 pci_free_consistent(priv->pdev, 4,
5759 priv->cookie, priv->cookie_dma);
5760
3cc7772c
BC		 5761 return rc;
5762}
8dee5eef 5763static int mwl8k_probe(struct pci_dev *pdev,
3cc7772c
BC		 5764 const struct pci_device_id *id)
5765{
5766 static int printed_version;
5767 struct ieee80211_hw *hw;
5768 struct mwl8k_priv *priv;
0863ade8 5769 struct mwl8k_device_info *di;
3cc7772c
BC		 5770 int rc;
5771
5772 if (!printed_version) {
5773 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
5774 printed_version = 1;
5775 }
5776
5777
5778 rc = pci_enable_device(pdev);
5779 if (rc) {
5780 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
5781 MWL8K_NAME);
5782 return rc;
5783 }
5784
5785 rc = pci_request_regions(pdev, MWL8K_NAME);
5786 if (rc) {
5787 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
5788 MWL8K_NAME);
5789 goto err_disable_device;
5790 }
5791
5792 pci_set_master(pdev);
5793
5794
5795 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
5796 if (hw == NULL) {
5797 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
5798 rc = -ENOMEM;
5799 goto err_free_reg;
5800 }
5801
5802 SET_IEEE80211_DEV(hw, &pdev->dev);
5803 pci_set_drvdata(pdev, hw);
5804
5805 priv = hw->priv;
5806 priv->hw = hw;
5807 priv->pdev = pdev;
5808 priv->device_info = &mwl8k_info_tbl[id->driver_data];
5809
5810
5811 priv->sram = pci_iomap(pdev, 0, 0x10000);
5812 if (priv->sram == NULL) {
5813 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
5814 goto err_iounmap;
5815 }
5816
5817 /*
5818 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
5819 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
5820 */
5821 priv->regs = pci_iomap(pdev, 1, 0x10000);
5822 if (priv->regs == NULL) {
5823 priv->regs = pci_iomap(pdev, 2, 0x10000);
5824 if (priv->regs == NULL) {
5825 wiphy_err(hw->wiphy, "Cannot map device registers\n");
5826 goto err_iounmap;
5827 }
5828 }
5829
0863ade8 5830 /*
99020471
BC		 5831 * Choose the initial fw image depending on user input. If a second
5832 * image is available, make it the alternative image that will be
5833 * loaded if the first one fails.
0863ade8 5834 */
99020471 5835 init_completion(&priv->firmware_loading_complete);
0863ade8 5836 di = priv->device_info;
99020471
BC		 5837 if (ap_mode_default && di->fw_image_ap) {
5838 priv->fw_pref = di->fw_image_ap;
5839 priv->fw_alt = di->fw_image_sta;
5840 } else if (!ap_mode_default && di->fw_image_sta) {
5841 priv->fw_pref = di->fw_image_sta;
5842 priv->fw_alt = di->fw_image_ap;
5843 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 5844 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 5845 priv->fw_pref = di->fw_image_sta;
0863ade8
BC		 5846 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
5847 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC		 5848 priv->fw_pref = di->fw_image_ap;
5849 }
5850 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC		 5851 if (rc)
5852 goto err_stop_firmware;
6b6accc3
YAP		 5853
5854 priv->hw_restart_in_progress = false;
5855
99020471 5856 return rc;
3cc7772c 5857
be695fc4
LB		 5858err_stop_firmware:
5859 mwl8k_hw_reset(priv);
be695fc4
LB		 5860
5861err_iounmap:
a66098da
LB		 5862 if (priv->regs != NULL)
5863 pci_iounmap(pdev, priv->regs);
5864
5b9482dd
LB		 5865 if (priv->sram != NULL)
5866 pci_iounmap(pdev, priv->sram);
5867
a66098da
LB		 5868 pci_set_drvdata(pdev, NULL);
5869 ieee80211_free_hw(hw);
5870
5871err_free_reg:
5872 pci_release_regions(pdev);
3db95e50
LB		 5873
5874err_disable_device:
a66098da
LB		 5875 pci_disable_device(pdev);
5876
5877 return rc;
5878}
5879
8dee5eef 5880static void mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 5881{
5882 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
5883 struct mwl8k_priv *priv;
5884 int i;
5885
5886 if (hw == NULL)
5887 return;
5888 priv = hw->priv;
5889
99020471
BC		 5890 wait_for_completion(&priv->firmware_loading_complete);
5891
5892 if (priv->fw_state == FW_STATE_ERROR) {
5893 mwl8k_hw_reset(priv);
5894 goto unmap;
5895 }
5896
a66098da
LB		 5897 ieee80211_stop_queues(hw);
5898
60aa569f
LB		 5899 ieee80211_unregister_hw(hw);
5900
67e2eb27 5901 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 5902 tasklet_kill(&priv->poll_tx_task);
67e2eb27 5903 tasklet_kill(&priv->poll_rx_task);
a66098da 5904
a66098da
LB		 5905 /* Stop hardware */
5906 mwl8k_hw_reset(priv);
5907
5908 /* Return all skbs to mac80211 */
e600707b 5909 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 5910 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 5911
e600707b 5912 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5913 mwl8k_txq_deinit(hw, i);
5914
5915 mwl8k_rxq_deinit(hw, 0);
5916
c2c357ce 5917 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 5918
99020471 5919unmap:
a66098da 5920 pci_iounmap(pdev, priv->regs);
5b9482dd 5921 pci_iounmap(pdev, priv->sram);
a66098da
LB		 5922 pci_set_drvdata(pdev, NULL);
5923 ieee80211_free_hw(hw);
5924 pci_release_regions(pdev);
5925 pci_disable_device(pdev);
5926}
5927
5928static struct pci_driver mwl8k_driver = {
5929 .name = MWL8K_NAME,
45a390dd 5930 .id_table = mwl8k_pci_id_table,
a66098da 5931 .probe = mwl8k_probe,
8dee5eef 5932 .remove = mwl8k_remove,
a66098da
LB		 5933};
5934
5b0a3b7e 5935module_pci_driver(mwl8k_driver);
c2c357ce
LB		 5936
5937MODULE_DESCRIPTION(MWL8K_DESC);
5938MODULE_VERSION(MWL8K_VERSION);
5939MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
5940MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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