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ath9k: configure beacons based on hw opmode
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
CommitLineData
a66098da 1/*
ce9e2e1b
LB		 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
a66098da
LB		 6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
3d76e82c 15#include <linux/sched.h>
a66098da
LB		 16#include <linux/spinlock.h>
17#include <linux/list.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20#include <linux/completion.h>
21#include <linux/etherdevice.h>
5a0e3ad6 22#include <linux/slab.h>
a66098da
LB		 23#include <net/mac80211.h>
24#include <linux/moduleparam.h>
25#include <linux/firmware.h>
26#include <linux/workqueue.h>
27
28#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29#define MWL8K_NAME KBUILD_MODNAME
a5fb297d 30#define MWL8K_VERSION "0.12"
a66098da 31
0863ade8
BC		 32/* Module parameters */
33static unsigned ap_mode_default;
34module_param(ap_mode_default, bool, 0);
35MODULE_PARM_DESC(ap_mode_default,
36 "Set to 1 to make ap mode the default instead of sta mode");
37
a66098da
LB		 38/* Register definitions */
39#define MWL8K_HIU_GEN_PTR 0x00000c10
ce9e2e1b
LB		 40#define MWL8K_MODE_STA 0x0000005a
41#define MWL8K_MODE_AP 0x000000a5
a66098da 42#define MWL8K_HIU_INT_CODE 0x00000c14
ce9e2e1b
LB		 43#define MWL8K_FWSTA_READY 0xf0f1f2f4
44#define MWL8K_FWAP_READY 0xf1f2f4a5
45#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
a66098da
LB		 46#define MWL8K_HIU_SCRATCH 0x00000c40
47
48/* Host->device communications */
49#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
ce9e2e1b
LB		 54#define MWL8K_H2A_INT_DUMMY (1 << 20)
55#define MWL8K_H2A_INT_RESET (1 << 15)
56#define MWL8K_H2A_INT_DOORBELL (1 << 1)
57#define MWL8K_H2A_INT_PPA_READY (1 << 0)
a66098da
LB		 58
59/* Device->host communications */
60#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
ce9e2e1b 65#define MWL8K_A2H_INT_DUMMY (1 << 20)
3aefc37e 66#define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
ce9e2e1b
LB		 67#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
68#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
69#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
70#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
71#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
72#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
73#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
74#define MWL8K_A2H_INT_RX_READY (1 << 1)
75#define MWL8K_A2H_INT_TX_DONE (1 << 0)
a66098da
LB		 76
77#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
78 MWL8K_A2H_INT_CHNL_SWITCHED | \
79 MWL8K_A2H_INT_QUEUE_EMPTY | \
80 MWL8K_A2H_INT_RADAR_DETECT | \
81 MWL8K_A2H_INT_RADIO_ON | \
82 MWL8K_A2H_INT_RADIO_OFF | \
83 MWL8K_A2H_INT_MAC_EVENT | \
84 MWL8K_A2H_INT_OPC_DONE | \
85 MWL8K_A2H_INT_RX_READY | \
3aefc37e
NS		 86 MWL8K_A2H_INT_TX_DONE | \
87 MWL8K_A2H_INT_BA_WATCHDOG)
a66098da 88
a66098da 89#define MWL8K_RX_QUEUES 1
e600707b 90#define MWL8K_TX_WMM_QUEUES 4
8a7a578c 91#define MWL8K_MAX_AMPDU_QUEUES 8
e600707b
BC		 92#define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
93#define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
a66098da 94
54bc3a0d
LB		 95struct rxd_ops {
96 int rxd_size;
97 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
98 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 99 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 100 __le16 *qos, s8 *noise);
54bc3a0d
LB		 101};
102
45a390dd 103struct mwl8k_device_info {
a74b295e
LB		 104 char *part_name;
105 char *helper_image;
0863ade8
BC		 106 char *fw_image_sta;
107 char *fw_image_ap;
89a91f4f 108 struct rxd_ops *ap_rxd_ops;
952a0e96 109 u32 fw_api_ap;
45a390dd
LB		 110};
111
a66098da 112struct mwl8k_rx_queue {
45eb400d 113 int rxd_count;
a66098da
LB		 114
115 /* hw receives here */
45eb400d 116 int head;
a66098da
LB		 117
118 /* refill descs here */
45eb400d 119 int tail;
a66098da 120
54bc3a0d 121 void *rxd;
45eb400d 122 dma_addr_t rxd_dma;
788838eb
LB		 123 struct {
124 struct sk_buff *skb;
53b1b3e1 125 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 126 } *buf;
a66098da
LB		 127};
128
a66098da
LB		 129struct mwl8k_tx_queue {
130 /* hw transmits here */
45eb400d 131 int head;
a66098da
LB		 132
133 /* sw appends here */
45eb400d 134 int tail;
a66098da 135
8ccbc3b8 136 unsigned int len;
45eb400d
LB		 137 struct mwl8k_tx_desc *txd;
138 dma_addr_t txd_dma;
139 struct sk_buff **skb;
a66098da
LB		 140};
141
ac109fd0
BC		 142enum {
143 AMPDU_NO_STREAM,
144 AMPDU_STREAM_NEW,
145 AMPDU_STREAM_IN_PROGRESS,
146 AMPDU_STREAM_ACTIVE,
147};
148
5faa1aff
NS		 149struct mwl8k_ampdu_stream {
150 struct ieee80211_sta *sta;
151 u8 tid;
152 u8 state;
153 u8 idx;
154 u8 txq_idx; /* index of this stream in priv->txq */
155};
156
a66098da 157struct mwl8k_priv {
a66098da 158 struct ieee80211_hw *hw;
a66098da 159 struct pci_dev *pdev;
a66098da 160
45a390dd
LB		 161 struct mwl8k_device_info *device_info;
162
be695fc4
LB		 163 void __iomem *sram;
164 void __iomem *regs;
165
166 /* firmware */
d1f9e41d
BC		 167 const struct firmware *fw_helper;
168 const struct firmware *fw_ucode;
a66098da 169
be695fc4
LB		 170 /* hardware/firmware parameters */
171 bool ap_fw;
172 struct rxd_ops *rxd_ops;
777ad375
LB		 173 struct ieee80211_supported_band band_24;
174 struct ieee80211_channel channels_24[14];
175 struct ieee80211_rate rates_24[14];
4eae9edd
LB		 176 struct ieee80211_supported_band band_50;
177 struct ieee80211_channel channels_50[4];
178 struct ieee80211_rate rates_50[9];
ee0ddf18
LB		 179 u32 ap_macids_supported;
180 u32 sta_macids_supported;
be695fc4 181
8a7a578c
BC		 182 /* Ampdu stream information */
183 u8 num_ampdu_queues;
ac109fd0
BC		 184 spinlock_t stream_lock;
185 struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
3aefc37e 186 struct work_struct watchdog_ba_handle;
8a7a578c 187
618952a7
LB		 188 /* firmware access */
189 struct mutex fw_mutex;
190 struct task_struct *fw_mutex_owner;
191 int fw_mutex_depth;
618952a7
LB		 192 struct completion *hostcmd_wait;
193
a66098da
LB		 194 /* lock held over TX and TX reap */
195 spinlock_t tx_lock;
a66098da 196
88de754a
LB		 197 /* TX quiesce completion, protected by fw_mutex and tx_lock */
198 struct completion *tx_wait;
199
f5bb87cf 200 /* List of interfaces. */
ee0ddf18 201 u32 macids_used;
f5bb87cf 202 struct list_head vif_list;
a66098da 203
a66098da
LB		 204 /* power management status cookie from firmware */
205 u32 *cookie;
206 dma_addr_t cookie_dma;
207
208 u16 num_mcaddrs;
a66098da 209 u8 hw_rev;
2aa7b01f 210 u32 fw_rev;
a66098da
LB		 211
212 /*
213 * Running count of TX packets in flight, to avoid
214 * iterating over the transmit rings each time.
215 */
216 int pending_tx_pkts;
217
218 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
e600707b
BC		 219 struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
220 u32 txq_offset[MWL8K_MAX_TX_QUEUES];
a66098da 221
c46563b7 222 bool radio_on;
68ce3884 223 bool radio_short_preamble;
a43c49a8 224 bool sniffer_enabled;
0439b1f5 225 bool wmm_enabled;
a66098da 226
a66098da
LB		 227 /* XXX need to convert this to handle multiple interfaces */
228 bool capture_beacon;
d89173f2 229 u8 capture_bssid[ETH_ALEN];
a66098da
LB		 230 struct sk_buff *beacon_skb;
231
232 /*
233 * This FJ worker has to be global as it is scheduled from the
234 * RX handler. At this point we don't know which interface it
235 * belongs to until the list of bssids waiting to complete join
236 * is checked.
237 */
238 struct work_struct finalize_join_worker;
239
1e9f9de3
LB		 240 /* Tasklet to perform TX reclaim. */
241 struct tasklet_struct poll_tx_task;
67e2eb27
LB		 242
243 /* Tasklet to perform RX. */
244 struct tasklet_struct poll_rx_task;
0d462bbb
JL		 245
246 /* Most recently reported noise in dBm */
247 s8 noise;
0863ade8
BC		 248
249 /*
250 * preserve the queue configurations so they can be restored if/when
251 * the firmware image is swapped.
252 */
e600707b 253 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
99020471
BC		 254
255 /* async firmware loading state */
256 unsigned fw_state;
257 char *fw_pref;
258 char *fw_alt;
259 struct completion firmware_loading_complete;
a66098da
LB		 260};
261
e53d9b96
NS		 262#define MAX_WEP_KEY_LEN 13
263#define NUM_WEP_KEYS 4
264
a66098da
LB		 265/* Per interface specific private data */
266struct mwl8k_vif {
f5bb87cf
LB		 267 struct list_head list;
268 struct ieee80211_vif *vif;
269
f57ca9c1
LB		 270 /* Firmware macid for this vif. */
271 int macid;
272
c2c2b12a 273 /* Non AMPDU sequence number assigned by driver. */
a680400e 274 u16 seqno;
e53d9b96
NS		 275
276 /* Saved WEP keys */
277 struct {
278 u8 enabled;
279 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
280 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS		 281
282 /* BSSID */
283 u8 bssid[ETH_ALEN];
284
285 /* A flag to indicate is HW crypto is enabled for this bssid */
286 bool is_hw_crypto_enabled;
a66098da 287};
a94cc97e 288#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 289#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 290
a680400e
LB		 291struct mwl8k_sta {
292 /* Index into station database. Returned by UPDATE_STADB. */
293 u8 peer_id;
17033543 294 u8 is_ampdu_allowed;
a680400e
LB		 295};
296#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
297
777ad375 298static const struct ieee80211_channel mwl8k_channels_24[] = {
a66098da
LB		 299 { .center_freq = 2412, .hw_value = 1, },
300 { .center_freq = 2417, .hw_value = 2, },
301 { .center_freq = 2422, .hw_value = 3, },
302 { .center_freq = 2427, .hw_value = 4, },
303 { .center_freq = 2432, .hw_value = 5, },
304 { .center_freq = 2437, .hw_value = 6, },
305 { .center_freq = 2442, .hw_value = 7, },
306 { .center_freq = 2447, .hw_value = 8, },
307 { .center_freq = 2452, .hw_value = 9, },
308 { .center_freq = 2457, .hw_value = 10, },
309 { .center_freq = 2462, .hw_value = 11, },
647ca6b0
LB		 310 { .center_freq = 2467, .hw_value = 12, },
311 { .center_freq = 2472, .hw_value = 13, },
312 { .center_freq = 2484, .hw_value = 14, },
a66098da
LB		 313};
314
777ad375 315static const struct ieee80211_rate mwl8k_rates_24[] = {
a66098da
LB		 316 { .bitrate = 10, .hw_value = 2, },
317 { .bitrate = 20, .hw_value = 4, },
318 { .bitrate = 55, .hw_value = 11, },
5dfd3e2c
LB		 319 { .bitrate = 110, .hw_value = 22, },
320 { .bitrate = 220, .hw_value = 44, },
a66098da
LB		 321 { .bitrate = 60, .hw_value = 12, },
322 { .bitrate = 90, .hw_value = 18, },
a66098da
LB		 323 { .bitrate = 120, .hw_value = 24, },
324 { .bitrate = 180, .hw_value = 36, },
325 { .bitrate = 240, .hw_value = 48, },
326 { .bitrate = 360, .hw_value = 72, },
327 { .bitrate = 480, .hw_value = 96, },
328 { .bitrate = 540, .hw_value = 108, },
140eb5e2
LB		 329 { .bitrate = 720, .hw_value = 144, },
330};
331
4eae9edd
LB		 332static const struct ieee80211_channel mwl8k_channels_50[] = {
333 { .center_freq = 5180, .hw_value = 36, },
334 { .center_freq = 5200, .hw_value = 40, },
335 { .center_freq = 5220, .hw_value = 44, },
336 { .center_freq = 5240, .hw_value = 48, },
337};
338
339static const struct ieee80211_rate mwl8k_rates_50[] = {
340 { .bitrate = 60, .hw_value = 12, },
341 { .bitrate = 90, .hw_value = 18, },
342 { .bitrate = 120, .hw_value = 24, },
343 { .bitrate = 180, .hw_value = 36, },
344 { .bitrate = 240, .hw_value = 48, },
345 { .bitrate = 360, .hw_value = 72, },
346 { .bitrate = 480, .hw_value = 96, },
347 { .bitrate = 540, .hw_value = 108, },
348 { .bitrate = 720, .hw_value = 144, },
349};
350
a66098da 351/* Set or get info from Firmware */
a66098da 352#define MWL8K_CMD_GET 0x0000
41fdf097
NS		 353#define MWL8K_CMD_SET 0x0001
354#define MWL8K_CMD_SET_LIST 0x0002
a66098da
LB		 355
356/* Firmware command codes */
357#define MWL8K_CMD_CODE_DNLD 0x0001
358#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 359#define MWL8K_CMD_SET_HW_SPEC 0x0004
a66098da
LB		 360#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
361#define MWL8K_CMD_GET_STAT 0x0014
ff45fc60
LB		 362#define MWL8K_CMD_RADIO_CONTROL 0x001c
363#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 364#define MWL8K_CMD_TX_POWER 0x001f
08b06347 365#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 366#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
a66098da
LB		 367#define MWL8K_CMD_SET_PRE_SCAN 0x0107
368#define MWL8K_CMD_SET_POST_SCAN 0x0108
ff45fc60
LB		 369#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
370#define MWL8K_CMD_SET_AID 0x010d
371#define MWL8K_CMD_SET_RATE 0x0110
372#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
373#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 374#define MWL8K_CMD_SET_SLOT 0x0114
ff45fc60
LB		 375#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
376#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 377#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 378#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 379#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 380#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 381#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
3aefc37e 382#define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
aa21d0f6
LB		 383#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
384#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 385#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 386#define MWL8K_CMD_UPDATE_STADB 0x1123
5faa1aff 387#define MWL8K_CMD_BASTREAM 0x1125
a66098da 388
b603742f 389static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 390{
b603742f
JL		 391 u16 command = le16_to_cpu(cmd);
392
a66098da
LB		 393#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
394 snprintf(buf, bufsize, "%s", #x);\
395 return buf;\
396 } while (0)
b603742f 397 switch (command & ~0x8000) {
a66098da
LB		 398 MWL8K_CMDNAME(CODE_DNLD);
399 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 400 MWL8K_CMDNAME(SET_HW_SPEC);
a66098da
LB		 401 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
402 MWL8K_CMDNAME(GET_STAT);
403 MWL8K_CMDNAME(RADIO_CONTROL);
404 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 405 MWL8K_CMDNAME(TX_POWER);
08b06347 406 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 407 MWL8K_CMDNAME(SET_BEACON);
a66098da
LB		 408 MWL8K_CMDNAME(SET_PRE_SCAN);
409 MWL8K_CMDNAME(SET_POST_SCAN);
410 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
LB		 411 MWL8K_CMDNAME(SET_AID);
412 MWL8K_CMDNAME(SET_RATE);
413 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
414 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 415 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
LB		 416 MWL8K_CMDNAME(SET_EDCA_PARAMS);
417 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 418 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 419 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 420 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 421 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 422 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 423 MWL8K_CMDNAME(BSS_START);
3f5610ff 424 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 425 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 426 MWL8K_CMDNAME(UPDATE_STADB);
5faa1aff 427 MWL8K_CMDNAME(BASTREAM);
3aefc37e 428 MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
a66098da
LB		 429 default:
430 snprintf(buf, bufsize, "0x%x", cmd);
431 }
432#undef MWL8K_CMDNAME
433
434 return buf;
435}
436
437/* Hardware and firmware reset */
438static void mwl8k_hw_reset(struct mwl8k_priv *priv)
439{
440 iowrite32(MWL8K_H2A_INT_RESET,
441 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
442 iowrite32(MWL8K_H2A_INT_RESET,
443 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
444 msleep(20);
445}
446
447/* Release fw image */
d1f9e41d 448static void mwl8k_release_fw(const struct firmware **fw)
a66098da
LB		 449{
450 if (*fw == NULL)
451 return;
452 release_firmware(*fw);
453 *fw = NULL;
454}
455
456static void mwl8k_release_firmware(struct mwl8k_priv *priv)
457{
22be40d9
LB		 458 mwl8k_release_fw(&priv->fw_ucode);
459 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 460}
461
99020471
BC		 462/* states for asynchronous f/w loading */
463static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
464enum {
465 FW_STATE_INIT = 0,
466 FW_STATE_LOADING_PREF,
467 FW_STATE_LOADING_ALT,
468 FW_STATE_ERROR,
469};
470
a66098da
LB		 471/* Request fw image */
472static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 473 const char *fname, const struct firmware **fw,
99020471 474 bool nowait)
a66098da
LB		 475{
476 /* release current image */
477 if (*fw != NULL)
478 mwl8k_release_fw(fw);
479
99020471
BC		 480 if (nowait)
481 return request_firmware_nowait(THIS_MODULE, 1, fname,
482 &priv->pdev->dev, GFP_KERNEL,
483 priv, mwl8k_fw_state_machine);
484 else
d1f9e41d 485 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB		 486}
487
99020471
BC		 488static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
489 bool nowait)
a66098da 490{
a74b295e 491 struct mwl8k_device_info *di = priv->device_info;
a66098da
LB		 492 int rc;
493
a74b295e 494 if (di->helper_image != NULL) {
99020471
BC		 495 if (nowait)
496 rc = mwl8k_request_fw(priv, di->helper_image,
497 &priv->fw_helper, true);
498 else
499 rc = mwl8k_request_fw(priv, di->helper_image,
500 &priv->fw_helper, false);
501 if (rc)
502 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
503 pci_name(priv->pdev), di->helper_image);
504
505 if (rc || nowait)
a74b295e 506 return rc;
a66098da
LB		 507 }
508
99020471
BC		 509 if (nowait) {
510 /*
511 * if we get here, no helper image is needed. Skip the
512 * FW_STATE_INIT state.
513 */
514 priv->fw_state = FW_STATE_LOADING_PREF;
515 rc = mwl8k_request_fw(priv, fw_image,
516 &priv->fw_ucode,
517 true);
518 } else
519 rc = mwl8k_request_fw(priv, fw_image,
520 &priv->fw_ucode, false);
a66098da 521 if (rc) {
c2c357ce 522 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 523 pci_name(priv->pdev), fw_image);
22be40d9 524 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 525 return rc;
526 }
527
528 return 0;
529}
530
531struct mwl8k_cmd_pkt {
532 __le16 code;
533 __le16 length;
f57ca9c1
LB		 534 __u8 seq_num;
535 __u8 macid;
a66098da
LB		 536 __le16 result;
537 char payload[0];
ba2d3587 538} __packed;
a66098da
LB		 539
540/*
541 * Firmware loading.
542 */
543static int
544mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
545{
546 void __iomem *regs = priv->regs;
547 dma_addr_t dma_addr;
a66098da
LB		 548 int loops;
549
550 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
551 if (pci_dma_mapping_error(priv->pdev, dma_addr))
552 return -ENOMEM;
553
554 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
555 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
556 iowrite32(MWL8K_H2A_INT_DOORBELL,
557 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
558 iowrite32(MWL8K_H2A_INT_DUMMY,
559 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
560
a66098da
LB		 561 loops = 1000;
562 do {
563 u32 int_code;
564
565 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
566 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
567 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB		 568 break;
569 }
570
3d76e82c 571 cond_resched();
a66098da
LB		 572 udelay(1);
573 } while (--loops);
574
575 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
576
d4b70570 577 return loops ? 0 : -ETIMEDOUT;
a66098da
LB		 578}
579
580static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
581 const u8 *data, size_t length)
582{
583 struct mwl8k_cmd_pkt *cmd;
584 int done;
585 int rc = 0;
586
587 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
588 if (cmd == NULL)
589 return -ENOMEM;
590
591 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
592 cmd->seq_num = 0;
f57ca9c1 593 cmd->macid = 0;
a66098da
LB		 594 cmd->result = 0;
595
596 done = 0;
597 while (length) {
598 int block_size = length > 256 ? 256 : length;
599
600 memcpy(cmd->payload, data + done, block_size);
601 cmd->length = cpu_to_le16(block_size);
602
603 rc = mwl8k_send_fw_load_cmd(priv, cmd,
604 sizeof(*cmd) + block_size);
605 if (rc)
606 break;
607
608 done += block_size;
609 length -= block_size;
610 }
611
612 if (!rc) {
613 cmd->length = 0;
614 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
615 }
616
617 kfree(cmd);
618
619 return rc;
620}
621
622static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
623 const u8 *data, size_t length)
624{
625 unsigned char *buffer;
626 int may_continue, rc = 0;
627 u32 done, prev_block_size;
628
629 buffer = kmalloc(1024, GFP_KERNEL);
630 if (buffer == NULL)
631 return -ENOMEM;
632
633 done = 0;
634 prev_block_size = 0;
635 may_continue = 1000;
636 while (may_continue > 0) {
637 u32 block_size;
638
639 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
640 if (block_size & 1) {
641 block_size &= ~1;
642 may_continue--;
643 } else {
644 done += prev_block_size;
645 length -= prev_block_size;
646 }
647
648 if (block_size > 1024 || block_size > length) {
649 rc = -EOVERFLOW;
650 break;
651 }
652
653 if (length == 0) {
654 rc = 0;
655 break;
656 }
657
658 if (block_size == 0) {
659 rc = -EPROTO;
660 may_continue--;
661 udelay(1);
662 continue;
663 }
664
665 prev_block_size = block_size;
666 memcpy(buffer, data + done, block_size);
667
668 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
669 if (rc)
670 break;
671 }
672
673 if (!rc && length != 0)
674 rc = -EREMOTEIO;
675
676 kfree(buffer);
677
678 return rc;
679}
680
c2c357ce 681static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 682{
c2c357ce 683 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 684 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB		 685 int rc;
686 int loops;
687
688 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 689 const struct firmware *helper = priv->fw_helper;
a66098da 690
c2c357ce
LB		 691 if (helper == NULL) {
692 printk(KERN_ERR "%s: helper image needed but none "
693 "given\n", pci_name(priv->pdev));
694 return -EINVAL;
695 }
a66098da 696
c2c357ce 697 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB		 698 if (rc) {
699 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 700 "helper image\n", pci_name(priv->pdev));
a66098da
LB		 701 return rc;
702 }
89b872e2 703 msleep(5);
a66098da 704
c2c357ce 705 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 706 } else {
c2c357ce 707 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB		 708 }
709
710 if (rc) {
c2c357ce
LB		 711 printk(KERN_ERR "%s: unable to load firmware image\n",
712 pci_name(priv->pdev));
a66098da
LB		 713 return rc;
714 }
715
89a91f4f 716 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 717
89b872e2 718 loops = 500000;
a66098da 719 do {
eae74e65
LB		 720 u32 ready_code;
721
722 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
723 if (ready_code == MWL8K_FWAP_READY) {
724 priv->ap_fw = 1;
725 break;
726 } else if (ready_code == MWL8K_FWSTA_READY) {
727 priv->ap_fw = 0;
a66098da 728 break;
eae74e65
LB		 729 }
730
731 cond_resched();
a66098da
LB		 732 udelay(1);
733 } while (--loops);
734
735 return loops ? 0 : -ETIMEDOUT;
736}
737
738
a66098da
LB		 739/* DMA header used by firmware and hardware. */
740struct mwl8k_dma_data {
741 __le16 fwlen;
742 struct ieee80211_hdr wh;
20f09c3d 743 char data[0];
ba2d3587 744} __packed;
a66098da
LB		 745
746/* Routines to add/remove DMA header from skb. */
20f09c3d 747static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 748{
20f09c3d
LB		 749 struct mwl8k_dma_data *tr;
750 int hdrlen;
751
752 tr = (struct mwl8k_dma_data *)skb->data;
753 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
754
755 if (hdrlen != sizeof(tr->wh)) {
756 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
757 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
758 *((__le16 *)(tr->data - 2)) = qos;
759 } else {
760 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
761 }
a66098da 762 }
20f09c3d
LB		 763
764 if (hdrlen != sizeof(*tr))
765 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB		 766}
767
252486a1
NS		 768static void
769mwl8k_add_dma_header(struct sk_buff *skb, int tail_pad)
a66098da
LB		 770{
771 struct ieee80211_hdr *wh;
ca009301 772 int hdrlen;
252486a1 773 int reqd_hdrlen;
a66098da
LB		 774 struct mwl8k_dma_data *tr;
775
ca009301
LB		 776 /*
777 * Add a firmware DMA header; the firmware requires that we
778 * present a 2-byte payload length followed by a 4-address
779 * header (without QoS field), followed (optionally) by any
780 * WEP/ExtIV header (but only filled in for CCMP).
781 */
a66098da 782 wh = (struct ieee80211_hdr *)skb->data;
ca009301 783
a66098da 784 hdrlen = ieee80211_hdrlen(wh->frame_control);
252486a1
NS		 785 reqd_hdrlen = sizeof(*tr);
786
787 if (hdrlen != reqd_hdrlen)
788 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 789
ca009301 790 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 791 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB		 792
793 tr = (struct mwl8k_dma_data *)skb->data;
794 if (wh != &tr->wh)
795 memmove(&tr->wh, wh, hdrlen);
ca009301
LB		 796 if (hdrlen != sizeof(tr->wh))
797 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB		 798
799 /*
800 * Firmware length is the length of the fully formed "802.11
801 * payload". That is, everything except for the 802.11 header.
802 * This includes all crypto material including the MIC.
803 */
252486a1 804 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB		 805}
806
e53d9b96
NS		 807static void mwl8k_encapsulate_tx_frame(struct sk_buff *skb)
808{
809 struct ieee80211_hdr *wh;
810 struct ieee80211_tx_info *tx_info;
811 struct ieee80211_key_conf *key_conf;
812 int data_pad;
813
814 wh = (struct ieee80211_hdr *)skb->data;
815
816 tx_info = IEEE80211_SKB_CB(skb);
817
818 key_conf = NULL;
819 if (ieee80211_is_data(wh->frame_control))
820 key_conf = tx_info->control.hw_key;
821
822 /*
823 * Make sure the packet header is in the DMA header format (4-address
824 * without QoS), the necessary crypto padding between the header and the
825 * payload has already been provided by mac80211, but it doesn't add tail
826 * padding when HW crypto is enabled.
827 *
828 * We have the following trailer padding requirements:
829 * - WEP: 4 trailer bytes (ICV)
830 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
831 * - CCMP: 8 trailer bytes (MIC)
832 */
833 data_pad = 0;
834 if (key_conf != NULL) {
835 switch (key_conf->cipher) {
836 case WLAN_CIPHER_SUITE_WEP40:
837 case WLAN_CIPHER_SUITE_WEP104:
838 data_pad = 4;
839 break;
840 case WLAN_CIPHER_SUITE_TKIP:
841 data_pad = 12;
842 break;
843 case WLAN_CIPHER_SUITE_CCMP:
844 data_pad = 8;
845 break;
846 }
847 }
848 mwl8k_add_dma_header(skb, data_pad);
849}
a66098da
LB		 850
851/*
89a91f4f 852 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 853 */
89a91f4f 854struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB		 855 __le16 pkt_len;
856 __u8 sq2;
857 __u8 rate;
858 __le32 pkt_phys_addr;
859 __le32 next_rxd_phys_addr;
860 __le16 qos_control;
861 __le16 htsig2;
862 __le32 hw_rssi_info;
863 __le32 hw_noise_floor_info;
864 __u8 noise_floor;
865 __u8 pad0[3];
866 __u8 rssi;
867 __u8 rx_status;
868 __u8 channel;
869 __u8 rx_ctrl;
ba2d3587 870} __packed;
6f6d1e9a 871
89a91f4f
LB		 872#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
873#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
874#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 875
89a91f4f 876#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 877
d9a07d49
NS		 878/* 8366 AP rx_status bits */
879#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
880#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
881#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
882#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
883#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
884
89a91f4f 885static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 886{
89a91f4f 887 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 888
889 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 890 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB		 891}
892
89a91f4f 893static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 894{
89a91f4f 895 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 896
897 rxd->pkt_len = cpu_to_le16(len);
898 rxd->pkt_phys_addr = cpu_to_le32(addr);
899 wmb();
900 rxd->rx_ctrl = 0;
901}
902
903static int
89a91f4f 904mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 905 __le16 *qos, s8 *noise)
6f6d1e9a 906{
89a91f4f 907 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 908
89a91f4f 909 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB		 910 return -1;
911 rmb();
912
913 memset(status, 0, sizeof(*status));
914
915 status->signal = -rxd->rssi;
0d462bbb 916 *noise = -rxd->noise_floor;
6f6d1e9a 917
89a91f4f 918 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 919 status->flag |= RX_FLAG_HT;
89a91f4f 920 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 921 status->flag |= RX_FLAG_40MHZ;
89a91f4f 922 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB		 923 } else {
924 int i;
925
777ad375
LB		 926 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
927 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB		 928 status->rate_idx = i;
929 break;
930 }
931 }
932 }
933
85478344
LB		 934 if (rxd->channel > 14) {
935 status->band = IEEE80211_BAND_5GHZ;
936 if (!(status->flag & RX_FLAG_HT))
937 status->rate_idx -= 5;
938 } else {
939 status->band = IEEE80211_BAND_2GHZ;
940 }
59eb21a6
BR		 941 status->freq = ieee80211_channel_to_frequency(rxd->channel,
942 status->band);
6f6d1e9a 943
20f09c3d
LB		 944 *qos = rxd->qos_control;
945
d9a07d49
NS		 946 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
947 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
948 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
949 status->flag |= RX_FLAG_MMIC_ERROR;
950
6f6d1e9a
LB		 951 return le16_to_cpu(rxd->pkt_len);
952}
953
89a91f4f
LB		 954static struct rxd_ops rxd_8366_ap_ops = {
955 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
956 .rxd_init = mwl8k_rxd_8366_ap_init,
957 .rxd_refill = mwl8k_rxd_8366_ap_refill,
958 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB		 959};
960
961/*
89a91f4f 962 * Packet reception for STA firmware.
a66098da 963 */
89a91f4f 964struct mwl8k_rxd_sta {
a66098da
LB		 965 __le16 pkt_len;
966 __u8 link_quality;
967 __u8 noise_level;
968 __le32 pkt_phys_addr;
45eb400d 969 __le32 next_rxd_phys_addr;
a66098da
LB		 970 __le16 qos_control;
971 __le16 rate_info;
972 __le32 pad0[4];
973 __u8 rssi;
974 __u8 channel;
975 __le16 pad1;
976 __u8 rx_ctrl;
977 __u8 rx_status;
978 __u8 pad2[2];
ba2d3587 979} __packed;
a66098da 980
89a91f4f
LB		 981#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
982#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
983#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
984#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
985#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
986#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 987
89a91f4f 988#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS		 989#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
990/* ICV=0 or MIC=1 */
991#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
992/* Key is uploaded only in failure case */
993#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 994
89a91f4f 995static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 996{
89a91f4f 997 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 998
999 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 1000 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB		 1001}
1002
89a91f4f 1003static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 1004{
89a91f4f 1005 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1006
1007 rxd->pkt_len = cpu_to_le16(len);
1008 rxd->pkt_phys_addr = cpu_to_le32(addr);
1009 wmb();
1010 rxd->rx_ctrl = 0;
1011}
1012
1013static int
89a91f4f 1014mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 1015 __le16 *qos, s8 *noise)
54bc3a0d 1016{
89a91f4f 1017 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1018 u16 rate_info;
1019
89a91f4f 1020 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB		 1021 return -1;
1022 rmb();
1023
1024 rate_info = le16_to_cpu(rxd->rate_info);
1025
1026 memset(status, 0, sizeof(*status));
1027
1028 status->signal = -rxd->rssi;
0d462bbb 1029 *noise = -rxd->noise_level;
89a91f4f
LB		 1030 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1031 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1032
89a91f4f 1033 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1034 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1035 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1036 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1037 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1038 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1039 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB		 1040 status->flag |= RX_FLAG_HT;
1041
85478344
LB		 1042 if (rxd->channel > 14) {
1043 status->band = IEEE80211_BAND_5GHZ;
1044 if (!(status->flag & RX_FLAG_HT))
1045 status->rate_idx -= 5;
1046 } else {
1047 status->band = IEEE80211_BAND_2GHZ;
1048 }
59eb21a6
BR		 1049 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1050 status->band);
54bc3a0d 1051
20f09c3d 1052 *qos = rxd->qos_control;
d9a07d49
NS		 1053 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1054 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1055 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1056
54bc3a0d
LB		 1057 return le16_to_cpu(rxd->pkt_len);
1058}
1059
89a91f4f
LB		 1060static struct rxd_ops rxd_sta_ops = {
1061 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1062 .rxd_init = mwl8k_rxd_sta_init,
1063 .rxd_refill = mwl8k_rxd_sta_refill,
1064 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB		 1065};
1066
1067
a66098da
LB		 1068#define MWL8K_RX_DESCS 256
1069#define MWL8K_RX_MAXSZ 3800
1070
1071static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1072{
1073 struct mwl8k_priv *priv = hw->priv;
1074 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1075 int size;
1076 int i;
1077
45eb400d
LB		 1078 rxq->rxd_count = 0;
1079 rxq->head = 0;
1080 rxq->tail = 0;
a66098da 1081
54bc3a0d 1082 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1083
45eb400d
LB		 1084 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1085 if (rxq->rxd == NULL) {
5db55844 1086 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB		 1087 return -ENOMEM;
1088 }
45eb400d 1089 memset(rxq->rxd, 0, size);
a66098da 1090
b9ede5f1 1091 rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
788838eb 1092 if (rxq->buf == NULL) {
5db55844 1093 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1094 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB		 1095 return -ENOMEM;
1096 }
a66098da
LB		 1097
1098 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB		 1099 int desc_size;
1100 void *rxd;
a66098da 1101 int nexti;
54bc3a0d
LB		 1102 dma_addr_t next_dma_addr;
1103
1104 desc_size = priv->rxd_ops->rxd_size;
1105 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1106
54bc3a0d
LB		 1107 nexti = i + 1;
1108 if (nexti == MWL8K_RX_DESCS)
1109 nexti = 0;
1110 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1111
54bc3a0d 1112 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB		 1113 }
1114
1115 return 0;
1116}
1117
1118static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1119{
1120 struct mwl8k_priv *priv = hw->priv;
1121 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1122 int refilled;
1123
1124 refilled = 0;
45eb400d 1125 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1126 struct sk_buff *skb;
788838eb 1127 dma_addr_t addr;
a66098da 1128 int rx;
54bc3a0d 1129 void *rxd;
a66098da
LB		 1130
1131 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1132 if (skb == NULL)
1133 break;
1134
788838eb
LB		 1135 addr = pci_map_single(priv->pdev, skb->data,
1136 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1137
54bc3a0d
LB		 1138 rxq->rxd_count++;
1139 rx = rxq->tail++;
1140 if (rxq->tail == MWL8K_RX_DESCS)
1141 rxq->tail = 0;
788838eb 1142 rxq->buf[rx].skb = skb;
53b1b3e1 1143 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB		 1144
1145 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1146 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB		 1147
1148 refilled++;
1149 }
1150
1151 return refilled;
1152}
1153
1154/* Must be called only when the card's reception is completely halted */
1155static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1156{
1157 struct mwl8k_priv *priv = hw->priv;
1158 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1159 int i;
1160
73b46320
BC		 1161 if (rxq->rxd == NULL)
1162 return;
1163
a66098da 1164 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB		 1165 if (rxq->buf[i].skb != NULL) {
1166 pci_unmap_single(priv->pdev,
53b1b3e1 1167 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1168 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1169 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB		 1170
1171 kfree_skb(rxq->buf[i].skb);
1172 rxq->buf[i].skb = NULL;
a66098da
LB		 1173 }
1174 }
1175
788838eb
LB		 1176 kfree(rxq->buf);
1177 rxq->buf = NULL;
a66098da
LB		 1178
1179 pci_free_consistent(priv->pdev,
54bc3a0d 1180 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB		 1181 rxq->rxd, rxq->rxd_dma);
1182 rxq->rxd = NULL;
a66098da
LB		 1183}
1184
1185
1186/*
1187 * Scan a list of BSSIDs to process for finalize join.
1188 * Allows for extension to process multiple BSSIDs.
1189 */
1190static inline int
1191mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1192{
1193 return priv->capture_beacon &&
1194 ieee80211_is_beacon(wh->frame_control) &&
1195 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1196}
1197
3779752d
LB		 1198static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1199 struct sk_buff *skb)
a66098da 1200{
3779752d
LB		 1201 struct mwl8k_priv *priv = hw->priv;
1202
a66098da 1203 priv->capture_beacon = false;
d89173f2 1204 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB		 1205
1206 /*
1207 * Use GFP_ATOMIC as rxq_process is called from
1208 * the primary interrupt handler, memory allocation call
1209 * must not sleep.
1210 */
1211 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1212 if (priv->beacon_skb != NULL)
3779752d 1213 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB		 1214}
1215
d9a07d49
NS		 1216static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1217 u8 *bssid)
1218{
1219 struct mwl8k_vif *mwl8k_vif;
1220
1221 list_for_each_entry(mwl8k_vif,
1222 vif_list, list) {
1223 if (memcmp(bssid, mwl8k_vif->bssid,
1224 ETH_ALEN) == 0)
1225 return mwl8k_vif;
1226 }
1227
1228 return NULL;
1229}
1230
a66098da
LB		 1231static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1232{
1233 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1234 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB		 1235 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1236 int processed;
1237
1238 processed = 0;
45eb400d 1239 while (rxq->rxd_count && limit--) {
a66098da 1240 struct sk_buff *skb;
54bc3a0d
LB		 1241 void *rxd;
1242 int pkt_len;
a66098da 1243 struct ieee80211_rx_status status;
d9a07d49 1244 struct ieee80211_hdr *wh;
20f09c3d 1245 __le16 qos;
a66098da 1246
788838eb 1247 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB		 1248 if (skb == NULL)
1249 break;
54bc3a0d
LB		 1250
1251 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1252
0d462bbb
JL		 1253 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1254 &priv->noise);
54bc3a0d
LB		 1255 if (pkt_len < 0)
1256 break;
1257
788838eb
LB		 1258 rxq->buf[rxq->head].skb = NULL;
1259
1260 pci_unmap_single(priv->pdev,
53b1b3e1 1261 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1262 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1263 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1264
54bc3a0d
LB		 1265 rxq->head++;
1266 if (rxq->head == MWL8K_RX_DESCS)
1267 rxq->head = 0;
1268
45eb400d 1269 rxq->rxd_count--;
a66098da 1270
d9a07d49 1271 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1272
a66098da 1273 /*
c2c357ce
LB		 1274 * Check for a pending join operation. Save a
1275 * copy of the beacon and schedule a tasklet to
1276 * send a FINALIZE_JOIN command to the firmware.
a66098da 1277 */
54bc3a0d 1278 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1279 mwl8k_save_beacon(hw, skb);
a66098da 1280
d9a07d49
NS		 1281 if (ieee80211_has_protected(wh->frame_control)) {
1282
1283 /* Check if hw crypto has been enabled for
1284 * this bss. If yes, set the status flags
1285 * accordingly
1286 */
1287 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1288 wh->addr1);
1289
1290 if (mwl8k_vif != NULL &&
1291 mwl8k_vif->is_hw_crypto_enabled == true) {
1292 /*
1293 * When MMIC ERROR is encountered
1294 * by the firmware, payload is
1295 * dropped and only 32 bytes of
1296 * mwl8k Firmware header is sent
1297 * to the host.
1298 *
1299 * We need to add four bytes of
1300 * key information. In it
1301 * MAC80211 expects keyidx set to
1302 * 0 for triggering Counter
1303 * Measure of MMIC failure.
1304 */
1305 if (status.flag & RX_FLAG_MMIC_ERROR) {
1306 struct mwl8k_dma_data *tr;
1307 tr = (struct mwl8k_dma_data *)skb->data;
1308 memset((void *)&(tr->data), 0, 4);
1309 pkt_len += 4;
1310 }
1311
1312 if (!ieee80211_is_auth(wh->frame_control))
1313 status.flag |= RX_FLAG_IV_STRIPPED |
1314 RX_FLAG_DECRYPTED |
1315 RX_FLAG_MMIC_STRIPPED;
1316 }
1317 }
1318
1319 skb_put(skb, pkt_len);
1320 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB		 1321 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1322 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1323
1324 processed++;
1325 }
1326
1327 return processed;
1328}
1329
1330
1331/*
1332 * Packet transmission.
1333 */
1334
a66098da
LB		 1335#define MWL8K_TXD_STATUS_OK 0x00000001
1336#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1337#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1338#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1339#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1340
e0493a8d
LB		 1341#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1342#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1343#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1344#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1345#define MWL8K_QOS_EOSP 0x0010
1346
a66098da
LB		 1347struct mwl8k_tx_desc {
1348 __le32 status;
1349 __u8 data_rate;
1350 __u8 tx_priority;
1351 __le16 qos_control;
1352 __le32 pkt_phys_addr;
1353 __le16 pkt_len;
d89173f2 1354 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1355 __le32 next_txd_phys_addr;
8a7a578c 1356 __le32 timestamp;
a66098da
LB		 1357 __le16 rate_info;
1358 __u8 peer_id;
a1fe24b0 1359 __u8 tx_frag_cnt;
ba2d3587 1360} __packed;
a66098da
LB		 1361
1362#define MWL8K_TX_DESCS 128
1363
1364static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1365{
1366 struct mwl8k_priv *priv = hw->priv;
1367 struct mwl8k_tx_queue *txq = priv->txq + index;
1368 int size;
1369 int i;
1370
8ccbc3b8 1371 txq->len = 0;
45eb400d
LB		 1372 txq->head = 0;
1373 txq->tail = 0;
a66098da
LB		 1374
1375 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1376
45eb400d
LB		 1377 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1378 if (txq->txd == NULL) {
5db55844 1379 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB		 1380 return -ENOMEM;
1381 }
45eb400d 1382 memset(txq->txd, 0, size);
a66098da 1383
b9ede5f1 1384 txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
45eb400d 1385 if (txq->skb == NULL) {
5db55844 1386 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1387 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB		 1388 return -ENOMEM;
1389 }
a66098da
LB		 1390
1391 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1392 struct mwl8k_tx_desc *tx_desc;
1393 int nexti;
1394
45eb400d 1395 tx_desc = txq->txd + i;
a66098da
LB		 1396 nexti = (i + 1) % MWL8K_TX_DESCS;
1397
1398 tx_desc->status = 0;
45eb400d
LB		 1399 tx_desc->next_txd_phys_addr =
1400 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB		 1401 }
1402
1403 return 0;
1404}
1405
1406static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1407{
1408 iowrite32(MWL8K_H2A_INT_PPA_READY,
1409 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1410 iowrite32(MWL8K_H2A_INT_DUMMY,
1411 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1412 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1413}
1414
7e1112d3 1415static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1416{
7e1112d3
LB		 1417 struct mwl8k_priv *priv = hw->priv;
1418 int i;
1419
e600707b 1420 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
7e1112d3
LB		 1421 struct mwl8k_tx_queue *txq = priv->txq + i;
1422 int fw_owned = 0;
1423 int drv_owned = 0;
1424 int unused = 0;
1425 int desc;
1426
a66098da 1427 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB		 1428 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1429 u32 status;
a66098da 1430
7e1112d3 1431 status = le32_to_cpu(tx_desc->status);
a66098da 1432 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1433 fw_owned++;
a66098da 1434 else
7e1112d3 1435 drv_owned++;
a66098da
LB		 1436
1437 if (tx_desc->pkt_len == 0)
7e1112d3 1438 unused++;
a66098da 1439 }
a66098da 1440
c96c31e4
JP		 1441 wiphy_err(hw->wiphy,
1442 "txq[%d] len=%d head=%d tail=%d "
1443 "fw_owned=%d drv_owned=%d unused=%d\n",
1444 i,
1445 txq->len, txq->head, txq->tail,
1446 fw_owned, drv_owned, unused);
7e1112d3 1447 }
a66098da
LB		 1448}
1449
618952a7 1450/*
88de754a 1451 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1452 */
62abd3cf 1453#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1454
950d5b01 1455static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1456{
a66098da 1457 struct mwl8k_priv *priv = hw->priv;
88de754a 1458 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB		 1459 int retry;
1460 int rc;
a66098da
LB		 1461
1462 might_sleep();
1463
7e1112d3
LB		 1464 /*
1465 * The TX queues are stopped at this point, so this test
1466 * doesn't need to take ->tx_lock.
1467 */
1468 if (!priv->pending_tx_pkts)
1469 return 0;
1470
1471 retry = 0;
1472 rc = 0;
1473
a66098da 1474 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1475 priv->tx_wait = &tx_wait;
1476 while (!rc) {
1477 int oldcount;
1478 unsigned long timeout;
a66098da 1479
7e1112d3 1480 oldcount = priv->pending_tx_pkts;
a66098da 1481
7e1112d3 1482 spin_unlock_bh(&priv->tx_lock);
88de754a 1483 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1484 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
a66098da 1485 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1486
1487 if (timeout) {
1488 WARN_ON(priv->pending_tx_pkts);
1489 if (retry) {
c96c31e4 1490 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB		 1491 }
1492 break;
1493 }
1494
1495 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP		 1496 wiphy_notice(hw->wiphy,
1497 "waiting for tx rings to drain (%d -> %d pkts)\n",
1498 oldcount, priv->pending_tx_pkts);
7e1112d3
LB		 1499 retry = 1;
1500 continue;
1501 }
1502
a66098da 1503 priv->tx_wait = NULL;
a66098da 1504
c96c31e4
JP		 1505 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1506 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3
LB		 1507 mwl8k_dump_tx_rings(hw);
1508
1509 rc = -ETIMEDOUT;
a66098da 1510 }
7e1112d3 1511 spin_unlock_bh(&priv->tx_lock);
a66098da 1512
7e1112d3 1513 return rc;
a66098da
LB		 1514}
1515
c23b5a69
LB		 1516#define MWL8K_TXD_SUCCESS(status) \
1517 ((status) & (MWL8K_TXD_STATUS_OK | \
1518 MWL8K_TXD_STATUS_OK_RETRY | \
1519 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1520
a0e7c6cf
NS		 1521static int mwl8k_tid_queue_mapping(u8 tid)
1522{
1523 BUG_ON(tid > 7);
1524
1525 switch (tid) {
1526 case 0:
1527 case 3:
1528 return IEEE80211_AC_BE;
1529 break;
1530 case 1:
1531 case 2:
1532 return IEEE80211_AC_BK;
1533 break;
1534 case 4:
1535 case 5:
1536 return IEEE80211_AC_VI;
1537 break;
1538 case 6:
1539 case 7:
1540 return IEEE80211_AC_VO;
1541 break;
1542 default:
1543 return -1;
1544 break;
1545 }
1546}
1547
17033543
NS		 1548/* The firmware will fill in the rate information
1549 * for each packet that gets queued in the hardware
1550 * in this structure
1551 */
1552
1553struct rateinfo {
1554 __le16 format:1;
1555 __le16 short_gi:1;
1556 __le16 band_width:1;
1557 __le16 rate_id_mcs:6;
1558 __le16 adv_coding:2;
1559 __le16 antenna:2;
1560 __le16 act_sub_chan:2;
1561 __le16 preamble_type:1;
1562 __le16 power_id:4;
1563 __le16 antenna2:1;
1564 __le16 reserved:1;
1565 __le16 tx_bf_frame:1;
1566 __le16 green_field:1;
1567} __packed;
1568
efb7c49a
LB		 1569static int
1570mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB		 1571{
1572 struct mwl8k_priv *priv = hw->priv;
1573 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1574 int processed;
a66098da 1575
efb7c49a 1576 processed = 0;
8ccbc3b8 1577 while (txq->len > 0 && limit--) {
a66098da 1578 int tx;
a66098da
LB		 1579 struct mwl8k_tx_desc *tx_desc;
1580 unsigned long addr;
ce9e2e1b 1581 int size;
a66098da
LB		 1582 struct sk_buff *skb;
1583 struct ieee80211_tx_info *info;
1584 u32 status;
17033543
NS		 1585 struct ieee80211_sta *sta;
1586 struct mwl8k_sta *sta_info = NULL;
1587 u16 rate_info;
1588 struct rateinfo *rate;
1589 struct ieee80211_hdr *wh;
a66098da 1590
45eb400d
LB		 1591 tx = txq->head;
1592 tx_desc = txq->txd + tx;
a66098da
LB		 1593
1594 status = le32_to_cpu(tx_desc->status);
1595
1596 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1597 if (!force)
1598 break;
1599 tx_desc->status &=
1600 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1601 }
1602
45eb400d 1603 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV		 1604 BUG_ON(txq->len == 0);
1605 txq->len--;
a66098da
LB		 1606 priv->pending_tx_pkts--;
1607
1608 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1609 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB		 1610 skb = txq->skb[tx];
1611 txq->skb[tx] = NULL;
a66098da
LB		 1612
1613 BUG_ON(skb == NULL);
1614 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1615
20f09c3d 1616 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da 1617
17033543
NS		 1618 wh = (struct ieee80211_hdr *) skb->data;
1619
a66098da
LB		 1620 /* Mark descriptor as unused */
1621 tx_desc->pkt_phys_addr = 0;
1622 tx_desc->pkt_len = 0;
1623
a66098da 1624 info = IEEE80211_SKB_CB(skb);
17033543
NS		 1625 if (ieee80211_is_data(wh->frame_control)) {
1626 sta = info->control.sta;
1627 if (sta) {
1628 sta_info = MWL8K_STA(sta);
1629 BUG_ON(sta_info == NULL);
1630 rate_info = le16_to_cpu(tx_desc->rate_info);
1631 rate = (struct rateinfo *)&rate_info;
1632 /* If rate is < 6.5 Mpbs for an ht station
1633 * do not form an ampdu. If the station is a
1634 * legacy station (format = 0), do not form an
1635 * ampdu
1636 */
1637 if (rate->rate_id_mcs < 1 ||
1638 rate->format == 0) {
1639 sta_info->is_ampdu_allowed = false;
1640 } else {
1641 sta_info->is_ampdu_allowed = true;
1642 }
1643 }
1644 }
1645
a66098da 1646 ieee80211_tx_info_clear_status(info);
0bf22c37
NS		 1647
1648 /* Rate control is happening in the firmware.
1649 * Ensure no tx rate is being reported.
1650 */
1651 info->status.rates[0].idx = -1;
1652 info->status.rates[0].count = 1;
1653
ce9e2e1b 1654 if (MWL8K_TXD_SUCCESS(status))
a66098da 1655 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB		 1656
1657 ieee80211_tx_status_irqsafe(hw, skb);
1658
efb7c49a 1659 processed++;
a66098da
LB		 1660 }
1661
65f3ddcd
NS		 1662 if (index < MWL8K_TX_WMM_QUEUES && processed && priv->radio_on &&
1663 !mutex_is_locked(&priv->fw_mutex))
a66098da 1664 ieee80211_wake_queue(hw, index);
efb7c49a
LB		 1665
1666 return processed;
a66098da
LB		 1667}
1668
1669/* must be called only when the card's transmit is completely halted */
1670static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1671{
1672 struct mwl8k_priv *priv = hw->priv;
1673 struct mwl8k_tx_queue *txq = priv->txq + index;
1674
73b46320
BC		 1675 if (txq->txd == NULL)
1676 return;
1677
efb7c49a 1678 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1679
45eb400d
LB		 1680 kfree(txq->skb);
1681 txq->skb = NULL;
a66098da
LB		 1682
1683 pci_free_consistent(priv->pdev,
1684 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB		 1685 txq->txd, txq->txd_dma);
1686 txq->txd = NULL;
a66098da
LB		 1687}
1688
ac109fd0
BC		 1689/* caller must hold priv->stream_lock when calling the stream functions */
1690struct mwl8k_ampdu_stream *
1691mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
1692{
1693 struct mwl8k_ampdu_stream *stream;
1694 struct mwl8k_priv *priv = hw->priv;
1695 int i;
1696
1697 for (i = 0; i < priv->num_ampdu_queues; i++) {
1698 stream = &priv->ampdu[i];
1699 if (stream->state == AMPDU_NO_STREAM) {
1700 stream->sta = sta;
1701 stream->state = AMPDU_STREAM_NEW;
1702 stream->tid = tid;
1703 stream->idx = i;
1704 stream->txq_idx = MWL8K_TX_WMM_QUEUES + i;
1705 wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
1706 sta->addr, tid);
1707 return stream;
1708 }
1709 }
1710 return NULL;
1711}
1712
1713static int
1714mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1715{
1716 int ret;
1717
1718 /* if the stream has already been started, don't start it again */
1719 if (stream->state != AMPDU_STREAM_NEW)
1720 return 0;
1721 ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
1722 if (ret)
1723 wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
1724 "%d\n", stream->sta->addr, stream->tid, ret);
1725 else
1726 wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
1727 stream->sta->addr, stream->tid);
1728 return ret;
1729}
1730
1731static void
1732mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1733{
1734 wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
1735 stream->tid);
1736 memset(stream, 0, sizeof(*stream));
1737}
1738
1739static struct mwl8k_ampdu_stream *
1740mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
1741{
1742 struct mwl8k_priv *priv = hw->priv;
1743 int i;
1744
1745 for (i = 0 ; i < priv->num_ampdu_queues; i++) {
1746 struct mwl8k_ampdu_stream *stream;
1747 stream = &priv->ampdu[i];
1748 if (stream->state == AMPDU_NO_STREAM)
1749 continue;
1750 if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
1751 stream->tid == tid)
1752 return stream;
1753 }
1754 return NULL;
1755}
1756
7bb45683 1757static void
a66098da
LB		 1758mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1759{
1760 struct mwl8k_priv *priv = hw->priv;
1761 struct ieee80211_tx_info *tx_info;
23b33906 1762 struct mwl8k_vif *mwl8k_vif;
65f3ddcd 1763 struct ieee80211_sta *sta;
a66098da
LB		 1764 struct ieee80211_hdr *wh;
1765 struct mwl8k_tx_queue *txq;
1766 struct mwl8k_tx_desc *tx;
a66098da 1767 dma_addr_t dma;
23b33906
LB		 1768 u32 txstatus;
1769 u8 txdatarate;
1770 u16 qos;
65f3ddcd
NS		 1771 int txpriority;
1772 u8 tid = 0;
1773 struct mwl8k_ampdu_stream *stream = NULL;
1774 bool start_ba_session = false;
a0e7c6cf 1775 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
a66098da 1776
23b33906
LB		 1777 wh = (struct ieee80211_hdr *)skb->data;
1778 if (ieee80211_is_data_qos(wh->frame_control))
1779 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1780 else
1781 qos = 0;
a66098da 1782
d9a07d49
NS		 1783 if (priv->ap_fw)
1784 mwl8k_encapsulate_tx_frame(skb);
1785 else
1786 mwl8k_add_dma_header(skb, 0);
1787
23b33906 1788 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB		 1789
1790 tx_info = IEEE80211_SKB_CB(skb);
65f3ddcd 1791 sta = tx_info->control.sta;
a66098da 1792 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB		 1793
1794 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1795 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB		 1796 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1797 mwl8k_vif->seqno += 0x10;
a66098da
LB		 1798 }
1799
23b33906
LB		 1800 /* Setup firmware control bit fields for each frame type. */
1801 txstatus = 0;
1802 txdatarate = 0;
1803 if (ieee80211_is_mgmt(wh->frame_control) ||
1804 ieee80211_is_ctl(wh->frame_control)) {
1805 txdatarate = 0;
e0493a8d 1806 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB		 1807 } else if (ieee80211_is_data(wh->frame_control)) {
1808 txdatarate = 1;
1809 if (is_multicast_ether_addr(wh->addr1))
1810 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1811
e0493a8d 1812 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1813 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1814 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1815 else
e0493a8d 1816 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1817 }
a66098da 1818
a0e7c6cf
NS		 1819 /* Queue ADDBA request in the respective data queue. While setting up
1820 * the ampdu stream, mac80211 queues further packets for that
1821 * particular ra/tid pair. However, packets piled up in the hardware
1822 * for that ra/tid pair will still go out. ADDBA request and the
1823 * related data packets going out from different queues asynchronously
1824 * will cause a shift in the receiver window which might result in
1825 * ampdu packets getting dropped at the receiver after the stream has
1826 * been setup.
1827 */
1828 if (unlikely(ieee80211_is_action(wh->frame_control) &&
1829 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
1830 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
1831 priv->ap_fw)) {
1832 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
1833 tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
1834 index = mwl8k_tid_queue_mapping(tid);
1835 }
1836
65f3ddcd
NS		 1837 txpriority = index;
1838
1839 if (ieee80211_is_data_qos(wh->frame_control) &&
1840 skb->protocol != cpu_to_be16(ETH_P_PAE) &&
1841 sta->ht_cap.ht_supported && priv->ap_fw) {
1842 tid = qos & 0xf;
1843 spin_lock(&priv->stream_lock);
1844 stream = mwl8k_lookup_stream(hw, sta->addr, tid);
1845 if (stream != NULL) {
1846 if (stream->state == AMPDU_STREAM_ACTIVE) {
1847 txpriority = stream->txq_idx;
1848 index = stream->txq_idx;
1849 } else if (stream->state == AMPDU_STREAM_NEW) {
1850 /* We get here if the driver sends us packets
1851 * after we've initiated a stream, but before
1852 * our ampdu_action routine has been called
1853 * with IEEE80211_AMPDU_TX_START to get the SSN
1854 * for the ADDBA request. So this packet can
1855 * go out with no risk of sequence number
1856 * mismatch. No special handling is required.
1857 */
1858 } else {
1859 /* Drop packets that would go out after the
1860 * ADDBA request was sent but before the ADDBA
1861 * response is received. If we don't do this,
1862 * the recipient would probably receive it
1863 * after the ADDBA request with SSN 0. This
1864 * will cause the recipient's BA receive window
1865 * to shift, which would cause the subsequent
1866 * packets in the BA stream to be discarded.
1867 * mac80211 queues our packets for us in this
1868 * case, so this is really just a safety check.
1869 */
1870 wiphy_warn(hw->wiphy,
1871 "Cannot send packet while ADDBA "
1872 "dialog is underway.\n");
1873 spin_unlock(&priv->stream_lock);
1874 dev_kfree_skb(skb);
1875 return;
1876 }
1877 } else {
1878 /* Defer calling mwl8k_start_stream so that the current
1879 * skb can go out before the ADDBA request. This
1880 * prevents sequence number mismatch at the recepient
1881 * as described above.
1882 */
17033543
NS		 1883 if (MWL8K_STA(sta)->is_ampdu_allowed) {
1884 stream = mwl8k_add_stream(hw, sta, tid);
1885 if (stream != NULL)
1886 start_ba_session = true;
1887 }
65f3ddcd
NS		 1888 }
1889 spin_unlock(&priv->stream_lock);
1890 }
1891
a66098da
LB		 1892 dma = pci_map_single(priv->pdev, skb->data,
1893 skb->len, PCI_DMA_TODEVICE);
1894
1895 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP		 1896 wiphy_debug(hw->wiphy,
1897 "failed to dma map skb, dropping TX frame.\n");
65f3ddcd
NS		 1898 if (start_ba_session) {
1899 spin_lock(&priv->stream_lock);
1900 mwl8k_remove_stream(hw, stream);
1901 spin_unlock(&priv->stream_lock);
1902 }
23b33906 1903 dev_kfree_skb(skb);
7bb45683 1904 return;
a66098da
LB		 1905 }
1906
23b33906 1907 spin_lock_bh(&priv->tx_lock);
a66098da 1908
23b33906 1909 txq = priv->txq + index;
a66098da 1910
65f3ddcd
NS		 1911 if (index >= MWL8K_TX_WMM_QUEUES && txq->len >= MWL8K_TX_DESCS) {
1912 /* This is the case in which the tx packet is destined for an
1913 * AMPDU queue and that AMPDU queue is full. Because we don't
1914 * start and stop the AMPDU queues, we must drop these packets.
1915 */
1916 dev_kfree_skb(skb);
1917 spin_unlock_bh(&priv->tx_lock);
1918 return;
1919 }
1920
45eb400d
LB		 1921 BUG_ON(txq->skb[txq->tail] != NULL);
1922 txq->skb[txq->tail] = skb;
a66098da 1923
45eb400d 1924 tx = txq->txd + txq->tail;
23b33906 1925 tx->data_rate = txdatarate;
65f3ddcd 1926 tx->tx_priority = txpriority;
a66098da 1927 tx->qos_control = cpu_to_le16(qos);
a66098da
LB		 1928 tx->pkt_phys_addr = cpu_to_le32(dma);
1929 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 1930 tx->rate_info = 0;
a680400e
LB		 1931 if (!priv->ap_fw && tx_info->control.sta != NULL)
1932 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1933 else
1934 tx->peer_id = 0;
a66098da 1935 wmb();
23b33906
LB		 1936 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1937
8ccbc3b8 1938 txq->len++;
a66098da 1939 priv->pending_tx_pkts++;
a66098da 1940
45eb400d
LB		 1941 txq->tail++;
1942 if (txq->tail == MWL8K_TX_DESCS)
1943 txq->tail = 0;
23b33906 1944
65f3ddcd 1945 if (txq->head == txq->tail && index < MWL8K_TX_WMM_QUEUES)
a66098da
LB		 1946 ieee80211_stop_queue(hw, index);
1947
23b33906 1948 mwl8k_tx_start(priv);
a66098da
LB		 1949
1950 spin_unlock_bh(&priv->tx_lock);
65f3ddcd
NS		 1951
1952 /* Initiate the ampdu session here */
1953 if (start_ba_session) {
1954 spin_lock(&priv->stream_lock);
1955 if (mwl8k_start_stream(hw, stream))
1956 mwl8k_remove_stream(hw, stream);
1957 spin_unlock(&priv->stream_lock);
1958 }
a66098da
LB		 1959}
1960
1961
618952a7
LB		 1962/*
1963 * Firmware access.
1964 *
1965 * We have the following requirements for issuing firmware commands:
1966 * - Some commands require that the packet transmit path is idle when
1967 * the command is issued. (For simplicity, we'll just quiesce the
1968 * transmit path for every command.)
1969 * - There are certain sequences of commands that need to be issued to
1970 * the hardware sequentially, with no other intervening commands.
1971 *
1972 * This leads to an implementation of a "firmware lock" as a mutex that
1973 * can be taken recursively, and which is taken by both the low-level
1974 * command submission function (mwl8k_post_cmd) as well as any users of
1975 * that function that require issuing of an atomic sequence of commands,
1976 * and quiesces the transmit path whenever it's taken.
1977 */
1978static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1979{
1980 struct mwl8k_priv *priv = hw->priv;
1981
1982 if (priv->fw_mutex_owner != current) {
1983 int rc;
1984
1985 mutex_lock(&priv->fw_mutex);
1986 ieee80211_stop_queues(hw);
1987
1988 rc = mwl8k_tx_wait_empty(hw);
1989 if (rc) {
1990 ieee80211_wake_queues(hw);
1991 mutex_unlock(&priv->fw_mutex);
1992
1993 return rc;
1994 }
1995
1996 priv->fw_mutex_owner = current;
1997 }
1998
1999 priv->fw_mutex_depth++;
2000
2001 return 0;
2002}
2003
2004static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
2005{
2006 struct mwl8k_priv *priv = hw->priv;
2007
2008 if (!--priv->fw_mutex_depth) {
2009 ieee80211_wake_queues(hw);
2010 priv->fw_mutex_owner = NULL;
2011 mutex_unlock(&priv->fw_mutex);
2012 }
2013}
2014
2015
a66098da
LB		 2016/*
2017 * Command processing.
2018 */
2019
0c9cc640
LB		 2020/* Timeout firmware commands after 10s */
2021#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB		 2022
2023static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
2024{
2025 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2026 struct mwl8k_priv *priv = hw->priv;
2027 void __iomem *regs = priv->regs;
2028 dma_addr_t dma_addr;
2029 unsigned int dma_size;
2030 int rc;
a66098da
LB		 2031 unsigned long timeout = 0;
2032 u8 buf[32];
2033
b603742f 2034 cmd->result = (__force __le16) 0xffff;
a66098da
LB		 2035 dma_size = le16_to_cpu(cmd->length);
2036 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
2037 PCI_DMA_BIDIRECTIONAL);
2038 if (pci_dma_mapping_error(priv->pdev, dma_addr))
2039 return -ENOMEM;
2040
618952a7 2041 rc = mwl8k_fw_lock(hw);
39a1e42e
LB		 2042 if (rc) {
2043 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2044 PCI_DMA_BIDIRECTIONAL);
618952a7 2045 return rc;
39a1e42e 2046 }
a66098da 2047
a66098da
LB		 2048 priv->hostcmd_wait = &cmd_wait;
2049 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
2050 iowrite32(MWL8K_H2A_INT_DOORBELL,
2051 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2052 iowrite32(MWL8K_H2A_INT_DUMMY,
2053 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB		 2054
2055 timeout = wait_for_completion_timeout(&cmd_wait,
2056 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
2057
618952a7
LB		 2058 priv->hostcmd_wait = NULL;
2059
2060 mwl8k_fw_unlock(hw);
2061
37055bd4
LB		 2062 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2063 PCI_DMA_BIDIRECTIONAL);
2064
a66098da 2065 if (!timeout) {
5db55844 2066 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP		 2067 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2068 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB		 2069 rc = -ETIMEDOUT;
2070 } else {
0c9cc640
LB		 2071 int ms;
2072
2073 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
2074
ce9e2e1b 2075 rc = cmd->result ? -EINVAL : 0;
a66098da 2076 if (rc)
5db55844 2077 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP		 2078 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2079 le16_to_cpu(cmd->result));
0c9cc640 2080 else if (ms > 2000)
5db55844 2081 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP		 2082 mwl8k_cmd_name(cmd->code,
2083 buf, sizeof(buf)),
2084 ms);
a66098da
LB		 2085 }
2086
a66098da
LB		 2087 return rc;
2088}
2089
f57ca9c1
LB		 2090static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
2091 struct ieee80211_vif *vif,
2092 struct mwl8k_cmd_pkt *cmd)
2093{
2094 if (vif != NULL)
2095 cmd->macid = MWL8K_VIF(vif)->macid;
2096 return mwl8k_post_cmd(hw, cmd);
2097}
2098
1349ad2f
LB		 2099/*
2100 * Setup code shared between STA and AP firmware images.
2101 */
2102static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
2103{
2104 struct mwl8k_priv *priv = hw->priv;
2105
2106 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
2107 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
2108
2109 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
2110 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
2111
2112 priv->band_24.band = IEEE80211_BAND_2GHZ;
2113 priv->band_24.channels = priv->channels_24;
2114 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
2115 priv->band_24.bitrates = priv->rates_24;
2116 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
2117
2118 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
2119}
2120
4eae9edd
LB		 2121static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
2122{
2123 struct mwl8k_priv *priv = hw->priv;
2124
2125 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
2126 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
2127
2128 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
2129 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
2130
2131 priv->band_50.band = IEEE80211_BAND_5GHZ;
2132 priv->band_50.channels = priv->channels_50;
2133 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
2134 priv->band_50.bitrates = priv->rates_50;
2135 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
2136
2137 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
2138}
2139
a66098da 2140/*
04b147b1 2141 * CMD_GET_HW_SPEC (STA version).
a66098da 2142 */
04b147b1 2143struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB		 2144 struct mwl8k_cmd_pkt header;
2145 __u8 hw_rev;
2146 __u8 host_interface;
2147 __le16 num_mcaddrs;
d89173f2 2148 __u8 perm_addr[ETH_ALEN];
a66098da
LB		 2149 __le16 region_code;
2150 __le32 fw_rev;
2151 __le32 ps_cookie;
2152 __le32 caps;
2153 __u8 mcs_bitmap[16];
2154 __le32 rx_queue_ptr;
2155 __le32 num_tx_queues;
e600707b 2156 __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
a66098da
LB		 2157 __le32 caps2;
2158 __le32 num_tx_desc_per_queue;
45eb400d 2159 __le32 total_rxd;
ba2d3587 2160} __packed;
a66098da 2161
341c9791
LB		 2162#define MWL8K_CAP_MAX_AMSDU 0x20000000
2163#define MWL8K_CAP_GREENFIELD 0x08000000
2164#define MWL8K_CAP_AMPDU 0x04000000
2165#define MWL8K_CAP_RX_STBC 0x01000000
2166#define MWL8K_CAP_TX_STBC 0x00800000
2167#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
2168#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
2169#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
2170#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
2171#define MWL8K_CAP_DELAY_BA 0x00003000
2172#define MWL8K_CAP_MIMO 0x00000200
2173#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB		 2174#define MWL8K_CAP_BAND_MASK 0x00000007
2175#define MWL8K_CAP_5GHZ 0x00000004
2176#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 2177
06953235
LB		 2178static void
2179mwl8k_set_ht_caps(struct ieee80211_hw *hw,
2180 struct ieee80211_supported_band *band, u32 cap)
341c9791 2181{
341c9791
LB		 2182 int rx_streams;
2183 int tx_streams;
2184
777ad375 2185 band->ht_cap.ht_supported = 1;
341c9791
LB		 2186
2187 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 2188 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 2189 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 2190 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB		 2191 if (cap & MWL8K_CAP_AMPDU) {
2192 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB		 2193 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2194 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB		 2195 }
2196 if (cap & MWL8K_CAP_RX_STBC)
777ad375 2197 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 2198 if (cap & MWL8K_CAP_TX_STBC)
777ad375 2199 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 2200 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 2201 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 2202 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 2203 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 2204 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 2205 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 2206 if (cap & MWL8K_CAP_40MHZ)
777ad375 2207 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB		 2208
2209 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
2210 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
2211
777ad375 2212 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 2213 if (rx_streams >= 2)
777ad375 2214 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 2215 if (rx_streams >= 3)
777ad375
LB		 2216 band->ht_cap.mcs.rx_mask[2] = 0xff;
2217 band->ht_cap.mcs.rx_mask[4] = 0x01;
2218 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB		 2219
2220 if (rx_streams != tx_streams) {
777ad375
LB		 2221 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
2222 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB		 2223 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2224 }
2225}
2226
06953235
LB		 2227static void
2228mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
2229{
2230 struct mwl8k_priv *priv = hw->priv;
2231
2232 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
2233 mwl8k_setup_2ghz_band(hw);
2234 if (caps & MWL8K_CAP_MIMO)
2235 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
2236 }
2237
2238 if (caps & MWL8K_CAP_5GHZ) {
2239 mwl8k_setup_5ghz_band(hw);
2240 if (caps & MWL8K_CAP_MIMO)
2241 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
2242 }
2243}
2244
04b147b1 2245static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB		 2246{
2247 struct mwl8k_priv *priv = hw->priv;
04b147b1 2248 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB		 2249 int rc;
2250 int i;
2251
2252 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2253 if (cmd == NULL)
2254 return -ENOMEM;
2255
2256 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2257 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2258
2259 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2260 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 2261 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b
BC		 2262 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2263 for (i = 0; i < mwl8k_tx_queues(priv); i++)
45eb400d 2264 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 2265 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 2266 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 2267
2268 rc = mwl8k_post_cmd(hw, &cmd->header);
2269
2270 if (!rc) {
2271 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2272 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 2273 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 2274 priv->hw_rev = cmd->hw_rev;
06953235 2275 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2276 priv->ap_macids_supported = 0x00000000;
2277 priv->sta_macids_supported = 0x00000001;
a66098da
LB		 2278 }
2279
2280 kfree(cmd);
2281 return rc;
2282}
2283
42fba21d
LB		 2284/*
2285 * CMD_GET_HW_SPEC (AP version).
2286 */
2287struct mwl8k_cmd_get_hw_spec_ap {
2288 struct mwl8k_cmd_pkt header;
2289 __u8 hw_rev;
2290 __u8 host_interface;
2291 __le16 num_wcb;
2292 __le16 num_mcaddrs;
2293 __u8 perm_addr[ETH_ALEN];
2294 __le16 region_code;
2295 __le16 num_antenna;
2296 __le32 fw_rev;
2297 __le32 wcbbase0;
2298 __le32 rxwrptr;
2299 __le32 rxrdptr;
2300 __le32 ps_cookie;
2301 __le32 wcbbase1;
2302 __le32 wcbbase2;
2303 __le32 wcbbase3;
952a0e96 2304 __le32 fw_api_version;
8a7a578c
BC		 2305 __le32 caps;
2306 __le32 num_of_ampdu_queues;
2307 __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
ba2d3587 2308} __packed;
42fba21d
LB		 2309
2310static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2311{
2312 struct mwl8k_priv *priv = hw->priv;
2313 struct mwl8k_cmd_get_hw_spec_ap *cmd;
8a7a578c 2314 int rc, i;
952a0e96 2315 u32 api_version;
42fba21d
LB		 2316
2317 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2318 if (cmd == NULL)
2319 return -ENOMEM;
2320
2321 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2322 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2323
2324 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2325 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2326
2327 rc = mwl8k_post_cmd(hw, &cmd->header);
2328
2329 if (!rc) {
2330 int off;
2331
952a0e96
BC		 2332 api_version = le32_to_cpu(cmd->fw_api_version);
2333 if (priv->device_info->fw_api_ap != api_version) {
2334 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2335 " Expected %d got %d.\n", MWL8K_NAME,
2336 priv->device_info->part_name,
2337 priv->device_info->fw_api_ap,
2338 api_version);
2339 rc = -EINVAL;
2340 goto done;
2341 }
42fba21d
LB		 2342 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2343 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2344 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2345 priv->hw_rev = cmd->hw_rev;
8a7a578c 2346 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2347 priv->ap_macids_supported = 0x000000ff;
2348 priv->sta_macids_supported = 0x00000000;
8a7a578c
BC		 2349 priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
2350 if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
2351 wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
2352 " but we only support %d.\n",
2353 priv->num_ampdu_queues,
2354 MWL8K_MAX_AMPDU_QUEUES);
2355 priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
2356 }
42fba21d 2357 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2358 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2359
2360 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2361 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d 2362
73b46320
BC		 2363 priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
2364 priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
2365 priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
2366 priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
8a7a578c
BC		 2367
2368 for (i = 0; i < priv->num_ampdu_queues; i++)
e600707b 2369 priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
8a7a578c 2370 le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
42fba21d
LB		 2371 }
2372
952a0e96 2373done:
42fba21d
LB		 2374 kfree(cmd);
2375 return rc;
2376}
2377
2378/*
2379 * CMD_SET_HW_SPEC.
2380 */
2381struct mwl8k_cmd_set_hw_spec {
2382 struct mwl8k_cmd_pkt header;
2383 __u8 hw_rev;
2384 __u8 host_interface;
2385 __le16 num_mcaddrs;
2386 __u8 perm_addr[ETH_ALEN];
2387 __le16 region_code;
2388 __le32 fw_rev;
2389 __le32 ps_cookie;
2390 __le32 caps;
2391 __le32 rx_queue_ptr;
2392 __le32 num_tx_queues;
e600707b 2393 __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
42fba21d
LB		 2394 __le32 flags;
2395 __le32 num_tx_desc_per_queue;
2396 __le32 total_rxd;
ba2d3587 2397} __packed;
42fba21d 2398
8a7a578c
BC		 2399/* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
2400 * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
2401 * the packets that are queued for more than 500ms, will be dropped in the
2402 * hardware. This helps minimizing the issues caused due to head-of-line
2403 * blocking where a slow client can hog the bandwidth and affect traffic to a
2404 * faster client.
2405 */
2406#define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
b64fe619
LB		 2407#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2408#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2409#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB		 2410
2411static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2412{
2413 struct mwl8k_priv *priv = hw->priv;
2414 struct mwl8k_cmd_set_hw_spec *cmd;
2415 int rc;
2416 int i;
2417
2418 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2419 if (cmd == NULL)
2420 return -ENOMEM;
2421
2422 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2423 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2424
2425 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2426 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b 2427 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
85c9205c
NS		 2428
2429 /*
2430 * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
2431 * that order. Firmware has Q3 as highest priority and Q0 as lowest
2432 * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
2433 * priority is interpreted the right way in firmware.
2434 */
e600707b
BC		 2435 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
2436 int j = mwl8k_tx_queues(priv) - 1 - i;
85c9205c
NS		 2437 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
2438 }
2439
b64fe619
LB		 2440 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2441 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
2442 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
42fba21d
LB		 2443 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2444 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2445
2446 rc = mwl8k_post_cmd(hw, &cmd->header);
2447 kfree(cmd);
2448
2449 return rc;
2450}
2451
a66098da
LB		 2452/*
2453 * CMD_MAC_MULTICAST_ADR.
2454 */
2455struct mwl8k_cmd_mac_multicast_adr {
2456 struct mwl8k_cmd_pkt header;
2457 __le16 action;
2458 __le16 numaddr;
ce9e2e1b 2459 __u8 addr[0][ETH_ALEN];
a66098da
LB		 2460};
2461
d5e30845
LB		 2462#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2463#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2464#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2465#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2466
e81cd2d6 2467static struct mwl8k_cmd_pkt *
447ced07 2468__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2469 struct netdev_hw_addr_list *mc_list)
a66098da 2470{
e81cd2d6 2471 struct mwl8k_priv *priv = hw->priv;
a66098da 2472 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2473 int size;
22bedad3
JP		 2474 int mc_count = 0;
2475
2476 if (mc_list)
2477 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2478
447ced07 2479 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB		 2480 allmulti = 1;
2481 mc_count = 0;
2482 }
e81cd2d6
LB		 2483
2484 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2485
e81cd2d6 2486 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2487 if (cmd == NULL)
e81cd2d6 2488 return NULL;
a66098da
LB		 2489
2490 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2491 cmd->header.length = cpu_to_le16(size);
d5e30845
LB		 2492 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2493 MWL8K_ENABLE_RX_BROADCAST);
2494
2495 if (allmulti) {
2496 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2497 } else if (mc_count) {
22bedad3
JP		 2498 struct netdev_hw_addr *ha;
2499 int i = 0;
d5e30845
LB		 2500
2501 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2502 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP		 2503 netdev_hw_addr_list_for_each(ha, mc_list) {
2504 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2505 }
a66098da
LB		 2506 }
2507
e81cd2d6 2508 return &cmd->header;
a66098da
LB		 2509}
2510
2511/*
55489b6e 2512 * CMD_GET_STAT.
a66098da 2513 */
55489b6e 2514struct mwl8k_cmd_get_stat {
a66098da 2515 struct mwl8k_cmd_pkt header;
a66098da 2516 __le32 stats[64];
ba2d3587 2517} __packed;
a66098da
LB		 2518
2519#define MWL8K_STAT_ACK_FAILURE 9
2520#define MWL8K_STAT_RTS_FAILURE 12
2521#define MWL8K_STAT_FCS_ERROR 24
2522#define MWL8K_STAT_RTS_SUCCESS 11
2523
55489b6e
LB		 2524static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2525 struct ieee80211_low_level_stats *stats)
a66098da 2526{
55489b6e 2527 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB		 2528 int rc;
2529
2530 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2531 if (cmd == NULL)
2532 return -ENOMEM;
2533
2534 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2535 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2536
2537 rc = mwl8k_post_cmd(hw, &cmd->header);
2538 if (!rc) {
2539 stats->dot11ACKFailureCount =
2540 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2541 stats->dot11RTSFailureCount =
2542 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2543 stats->dot11FCSErrorCount =
2544 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2545 stats->dot11RTSSuccessCount =
2546 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2547 }
2548 kfree(cmd);
2549
2550 return rc;
2551}
2552
2553/*
55489b6e 2554 * CMD_RADIO_CONTROL.
a66098da 2555 */
55489b6e 2556struct mwl8k_cmd_radio_control {
a66098da
LB		 2557 struct mwl8k_cmd_pkt header;
2558 __le16 action;
2559 __le16 control;
2560 __le16 radio_on;
ba2d3587 2561} __packed;
a66098da 2562
c46563b7 2563static int
55489b6e 2564mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB		 2565{
2566 struct mwl8k_priv *priv = hw->priv;
55489b6e 2567 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB		 2568 int rc;
2569
c46563b7 2570 if (enable == priv->radio_on && !force)
a66098da
LB		 2571 return 0;
2572
a66098da
LB		 2573 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2574 if (cmd == NULL)
2575 return -ENOMEM;
2576
2577 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2578 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2579 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2580 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB		 2581 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2582
2583 rc = mwl8k_post_cmd(hw, &cmd->header);
2584 kfree(cmd);
2585
2586 if (!rc)
c46563b7 2587 priv->radio_on = enable;
a66098da
LB		 2588
2589 return rc;
2590}
2591
55489b6e 2592static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2593{
55489b6e 2594 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB		 2595}
2596
55489b6e 2597static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2598{
55489b6e 2599 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB		 2600}
2601
a66098da
LB		 2602static int
2603mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2604{
99200a99 2605 struct mwl8k_priv *priv = hw->priv;
a66098da 2606
68ce3884 2607 priv->radio_short_preamble = short_preamble;
a66098da 2608
55489b6e 2609 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB		 2610}
2611
2612/*
55489b6e 2613 * CMD_RF_TX_POWER.
a66098da 2614 */
41fdf097 2615#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2616
55489b6e 2617struct mwl8k_cmd_rf_tx_power {
a66098da
LB		 2618 struct mwl8k_cmd_pkt header;
2619 __le16 action;
2620 __le16 support_level;
2621 __le16 current_level;
2622 __le16 reserved;
41fdf097 2623 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2624} __packed;
a66098da 2625
55489b6e 2626static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2627{
55489b6e 2628 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB		 2629 int rc;
2630
2631 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2632 if (cmd == NULL)
2633 return -ENOMEM;
2634
2635 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2636 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2637 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2638 cmd->support_level = cpu_to_le16(dBm);
2639
2640 rc = mwl8k_post_cmd(hw, &cmd->header);
2641 kfree(cmd);
2642
2643 return rc;
2644}
2645
41fdf097
NS		 2646/*
2647 * CMD_TX_POWER.
2648 */
2649#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2650
2651struct mwl8k_cmd_tx_power {
2652 struct mwl8k_cmd_pkt header;
2653 __le16 action;
2654 __le16 band;
2655 __le16 channel;
2656 __le16 bw;
2657 __le16 sub_ch;
2658 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2659} __attribute__((packed));
2660
2661static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2662 struct ieee80211_conf *conf,
2663 unsigned short pwr)
2664{
2665 struct ieee80211_channel *channel = conf->channel;
2666 struct mwl8k_cmd_tx_power *cmd;
2667 int rc;
2668 int i;
2669
2670 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2671 if (cmd == NULL)
2672 return -ENOMEM;
2673
2674 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2675 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2676 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2677
2678 if (channel->band == IEEE80211_BAND_2GHZ)
2679 cmd->band = cpu_to_le16(0x1);
2680 else if (channel->band == IEEE80211_BAND_5GHZ)
2681 cmd->band = cpu_to_le16(0x4);
2682
2683 cmd->channel = channel->hw_value;
2684
2685 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2686 conf->channel_type == NL80211_CHAN_HT20) {
2687 cmd->bw = cpu_to_le16(0x2);
2688 } else {
2689 cmd->bw = cpu_to_le16(0x4);
2690 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2691 cmd->sub_ch = cpu_to_le16(0x3);
2692 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2693 cmd->sub_ch = cpu_to_le16(0x1);
2694 }
2695
2696 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2697 cmd->power_level_list[i] = cpu_to_le16(pwr);
2698
2699 rc = mwl8k_post_cmd(hw, &cmd->header);
2700 kfree(cmd);
2701
2702 return rc;
2703}
2704
08b06347
LB		 2705/*
2706 * CMD_RF_ANTENNA.
2707 */
2708struct mwl8k_cmd_rf_antenna {
2709 struct mwl8k_cmd_pkt header;
2710 __le16 antenna;
2711 __le16 mode;
ba2d3587 2712} __packed;
08b06347
LB		 2713
2714#define MWL8K_RF_ANTENNA_RX 1
2715#define MWL8K_RF_ANTENNA_TX 2
2716
2717static int
2718mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2719{
2720 struct mwl8k_cmd_rf_antenna *cmd;
2721 int rc;
2722
2723 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2724 if (cmd == NULL)
2725 return -ENOMEM;
2726
2727 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2728 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2729 cmd->antenna = cpu_to_le16(antenna);
2730 cmd->mode = cpu_to_le16(mask);
2731
2732 rc = mwl8k_post_cmd(hw, &cmd->header);
2733 kfree(cmd);
2734
2735 return rc;
2736}
2737
b64fe619
LB		 2738/*
2739 * CMD_SET_BEACON.
2740 */
2741struct mwl8k_cmd_set_beacon {
2742 struct mwl8k_cmd_pkt header;
2743 __le16 beacon_len;
2744 __u8 beacon[0];
2745};
2746
aa21d0f6
LB		 2747static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2748 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB		 2749{
2750 struct mwl8k_cmd_set_beacon *cmd;
2751 int rc;
2752
2753 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2754 if (cmd == NULL)
2755 return -ENOMEM;
2756
2757 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2758 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2759 cmd->beacon_len = cpu_to_le16(len);
2760 memcpy(cmd->beacon, beacon, len);
2761
aa21d0f6 2762 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 2763 kfree(cmd);
2764
2765 return rc;
2766}
2767
a66098da
LB		 2768/*
2769 * CMD_SET_PRE_SCAN.
2770 */
2771struct mwl8k_cmd_set_pre_scan {
2772 struct mwl8k_cmd_pkt header;
ba2d3587 2773} __packed;
a66098da
LB		 2774
2775static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2776{
2777 struct mwl8k_cmd_set_pre_scan *cmd;
2778 int rc;
2779
2780 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2781 if (cmd == NULL)
2782 return -ENOMEM;
2783
2784 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2785 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2786
2787 rc = mwl8k_post_cmd(hw, &cmd->header);
2788 kfree(cmd);
2789
2790 return rc;
2791}
2792
2793/*
2794 * CMD_SET_POST_SCAN.
2795 */
2796struct mwl8k_cmd_set_post_scan {
2797 struct mwl8k_cmd_pkt header;
2798 __le32 isibss;
d89173f2 2799 __u8 bssid[ETH_ALEN];
ba2d3587 2800} __packed;
a66098da
LB		 2801
2802static int
0a11dfc3 2803mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB		 2804{
2805 struct mwl8k_cmd_set_post_scan *cmd;
2806 int rc;
2807
2808 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2809 if (cmd == NULL)
2810 return -ENOMEM;
2811
2812 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2813 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2814 cmd->isibss = 0;
d89173f2 2815 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB		 2816
2817 rc = mwl8k_post_cmd(hw, &cmd->header);
2818 kfree(cmd);
2819
2820 return rc;
2821}
2822
2823/*
2824 * CMD_SET_RF_CHANNEL.
2825 */
2826struct mwl8k_cmd_set_rf_channel {
2827 struct mwl8k_cmd_pkt header;
2828 __le16 action;
2829 __u8 current_channel;
2830 __le32 channel_flags;
ba2d3587 2831} __packed;
a66098da
LB		 2832
2833static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2834 struct ieee80211_conf *conf)
a66098da 2835{
610677d2 2836 struct ieee80211_channel *channel = conf->channel;
a66098da
LB		 2837 struct mwl8k_cmd_set_rf_channel *cmd;
2838 int rc;
2839
2840 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2841 if (cmd == NULL)
2842 return -ENOMEM;
2843
2844 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2845 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2846 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2847 cmd->current_channel = channel->hw_value;
610677d2 2848
a66098da 2849 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2850 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB		 2851 else if (channel->band == IEEE80211_BAND_5GHZ)
2852 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB		 2853
2854 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2855 conf->channel_type == NL80211_CHAN_HT20)
2856 cmd->channel_flags |= cpu_to_le32(0x00000080);
2857 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2858 cmd->channel_flags |= cpu_to_le32(0x000001900);
2859 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2860 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB		 2861
2862 rc = mwl8k_post_cmd(hw, &cmd->header);
2863 kfree(cmd);
2864
2865 return rc;
2866}
2867
2868/*
55489b6e 2869 * CMD_SET_AID.
a66098da 2870 */
55489b6e
LB		 2871#define MWL8K_FRAME_PROT_DISABLED 0x00
2872#define MWL8K_FRAME_PROT_11G 0x07
2873#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2874#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 2875
55489b6e
LB		 2876struct mwl8k_cmd_update_set_aid {
2877 struct mwl8k_cmd_pkt header;
2878 __le16 aid;
a66098da 2879
55489b6e
LB		 2880 /* AP's MAC address (BSSID) */
2881 __u8 bssid[ETH_ALEN];
2882 __le16 protection_mode;
2883 __u8 supp_rates[14];
ba2d3587 2884} __packed;
a66098da 2885
c6e96010
LB		 2886static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2887{
2888 int i;
2889 int j;
2890
2891 /*
2892 * Clear nonstandard rates 4 and 13.
2893 */
2894 mask &= 0x1fef;
2895
2896 for (i = 0, j = 0; i < 14; i++) {
2897 if (mask & (1 << i))
777ad375 2898 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB		 2899 }
2900}
2901
55489b6e 2902static int
c6e96010
LB		 2903mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2904 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 2905{
55489b6e
LB		 2906 struct mwl8k_cmd_update_set_aid *cmd;
2907 u16 prot_mode;
a66098da
LB		 2908 int rc;
2909
2910 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2911 if (cmd == NULL)
2912 return -ENOMEM;
2913
55489b6e 2914 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 2915 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 2916 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 2917 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 2918
7dc6a7a7 2919 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB		 2920 prot_mode = MWL8K_FRAME_PROT_11G;
2921 } else {
7dc6a7a7 2922 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB		 2923 IEEE80211_HT_OP_MODE_PROTECTION) {
2924 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2925 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2926 break;
2927 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2928 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2929 break;
2930 default:
2931 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2932 break;
2933 }
2934 }
2935 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 2936
c6e96010 2937 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB		 2938
2939 rc = mwl8k_post_cmd(hw, &cmd->header);
2940 kfree(cmd);
2941
2942 return rc;
2943}
2944
32060e1b 2945/*
55489b6e 2946 * CMD_SET_RATE.
32060e1b 2947 */
55489b6e
LB		 2948struct mwl8k_cmd_set_rate {
2949 struct mwl8k_cmd_pkt header;
2950 __u8 legacy_rates[14];
2951
2952 /* Bitmap for supported MCS codes. */
2953 __u8 mcs_set[16];
2954 __u8 reserved[16];
ba2d3587 2955} __packed;
32060e1b 2956
55489b6e 2957static int
c6e96010 2958mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 2959 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 2960{
55489b6e 2961 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB		 2962 int rc;
2963
2964 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2965 if (cmd == NULL)
2966 return -ENOMEM;
2967
55489b6e 2968 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 2969 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 2970 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 2971 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB		 2972
2973 rc = mwl8k_post_cmd(hw, &cmd->header);
2974 kfree(cmd);
2975
2976 return rc;
2977}
2978
a66098da 2979/*
55489b6e 2980 * CMD_FINALIZE_JOIN.
a66098da 2981 */
55489b6e
LB		 2982#define MWL8K_FJ_BEACON_MAXLEN 128
2983
2984struct mwl8k_cmd_finalize_join {
a66098da 2985 struct mwl8k_cmd_pkt header;
55489b6e
LB		 2986 __le32 sleep_interval; /* Number of beacon periods to sleep */
2987 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 2988} __packed;
a66098da 2989
55489b6e
LB		 2990static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2991 int framelen, int dtim)
a66098da 2992{
55489b6e
LB		 2993 struct mwl8k_cmd_finalize_join *cmd;
2994 struct ieee80211_mgmt *payload = frame;
2995 int payload_len;
a66098da
LB		 2996 int rc;
2997
2998 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2999 if (cmd == NULL)
3000 return -ENOMEM;
3001
55489b6e 3002 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 3003 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3004 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
3005
3006 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
3007 if (payload_len < 0)
3008 payload_len = 0;
3009 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
3010 payload_len = MWL8K_FJ_BEACON_MAXLEN;
3011
3012 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB		 3013
3014 rc = mwl8k_post_cmd(hw, &cmd->header);
3015 kfree(cmd);
3016
3017 return rc;
3018}
3019
3020/*
55489b6e 3021 * CMD_SET_RTS_THRESHOLD.
a66098da 3022 */
55489b6e 3023struct mwl8k_cmd_set_rts_threshold {
a66098da
LB		 3024 struct mwl8k_cmd_pkt header;
3025 __le16 action;
55489b6e 3026 __le16 threshold;
ba2d3587 3027} __packed;
a66098da 3028
c2c2b12a
LB		 3029static int
3030mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 3031{
55489b6e 3032 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB		 3033 int rc;
3034
3035 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3036 if (cmd == NULL)
3037 return -ENOMEM;
3038
55489b6e 3039 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 3040 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB		 3041 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3042 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB		 3043
3044 rc = mwl8k_post_cmd(hw, &cmd->header);
3045 kfree(cmd);
3046
a66098da
LB		 3047 return rc;
3048}
3049
3050/*
55489b6e 3051 * CMD_SET_SLOT.
a66098da 3052 */
55489b6e 3053struct mwl8k_cmd_set_slot {
a66098da
LB		 3054 struct mwl8k_cmd_pkt header;
3055 __le16 action;
55489b6e 3056 __u8 short_slot;
ba2d3587 3057} __packed;
a66098da 3058
55489b6e 3059static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 3060{
55489b6e 3061 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB		 3062 int rc;
3063
3064 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3065 if (cmd == NULL)
3066 return -ENOMEM;
3067
55489b6e 3068 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 3069 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3070 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3071 cmd->short_slot = short_slot_time;
a66098da
LB		 3072
3073 rc = mwl8k_post_cmd(hw, &cmd->header);
3074 kfree(cmd);
3075
3076 return rc;
3077}
3078
3079/*
3080 * CMD_SET_EDCA_PARAMS.
3081 */
3082struct mwl8k_cmd_set_edca_params {
3083 struct mwl8k_cmd_pkt header;
3084
3085 /* See MWL8K_SET_EDCA_XXX below */
3086 __le16 action;
3087
3088 /* TX opportunity in units of 32 us */
3089 __le16 txop;
3090
2e484c89
LB		 3091 union {
3092 struct {
3093 /* Log exponent of max contention period: 0...15 */
3094 __le32 log_cw_max;
3095
3096 /* Log exponent of min contention period: 0...15 */
3097 __le32 log_cw_min;
3098
3099 /* Adaptive interframe spacing in units of 32us */
3100 __u8 aifs;
3101
3102 /* TX queue to configure */
3103 __u8 txq;
3104 } ap;
3105 struct {
3106 /* Log exponent of max contention period: 0...15 */
3107 __u8 log_cw_max;
a66098da 3108
2e484c89
LB		 3109 /* Log exponent of min contention period: 0...15 */
3110 __u8 log_cw_min;
a66098da 3111
2e484c89
LB		 3112 /* Adaptive interframe spacing in units of 32us */
3113 __u8 aifs;
a66098da 3114
2e484c89
LB		 3115 /* TX queue to configure */
3116 __u8 txq;
3117 } sta;
3118 };
ba2d3587 3119} __packed;
a66098da 3120
a66098da
LB		 3121#define MWL8K_SET_EDCA_CW 0x01
3122#define MWL8K_SET_EDCA_TXOP 0x02
3123#define MWL8K_SET_EDCA_AIFS 0x04
3124
3125#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
3126 MWL8K_SET_EDCA_TXOP | \
3127 MWL8K_SET_EDCA_AIFS)
3128
3129static int
55489b6e
LB		 3130mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
3131 __u16 cw_min, __u16 cw_max,
3132 __u8 aifs, __u16 txop)
a66098da 3133{
2e484c89 3134 struct mwl8k_priv *priv = hw->priv;
a66098da 3135 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB		 3136 int rc;
3137
3138 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3139 if (cmd == NULL)
3140 return -ENOMEM;
3141
a66098da
LB		 3142 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
3143 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 3144 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
3145 cmd->txop = cpu_to_le16(txop);
2e484c89
LB		 3146 if (priv->ap_fw) {
3147 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
3148 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
3149 cmd->ap.aifs = aifs;
3150 cmd->ap.txq = qnum;
3151 } else {
3152 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
3153 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
3154 cmd->sta.aifs = aifs;
3155 cmd->sta.txq = qnum;
3156 }
a66098da
LB		 3157
3158 rc = mwl8k_post_cmd(hw, &cmd->header);
3159 kfree(cmd);
3160
3161 return rc;
3162}
3163
3164/*
55489b6e 3165 * CMD_SET_WMM_MODE.
a66098da 3166 */
55489b6e 3167struct mwl8k_cmd_set_wmm_mode {
a66098da 3168 struct mwl8k_cmd_pkt header;
55489b6e 3169 __le16 action;
ba2d3587 3170} __packed;
a66098da 3171
55489b6e 3172static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 3173{
55489b6e
LB		 3174 struct mwl8k_priv *priv = hw->priv;
3175 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB		 3176 int rc;
3177
a66098da
LB		 3178 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3179 if (cmd == NULL)
3180 return -ENOMEM;
3181
55489b6e 3182 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 3183 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 3184 cmd->action = cpu_to_le16(!!enable);
a66098da
LB		 3185
3186 rc = mwl8k_post_cmd(hw, &cmd->header);
3187 kfree(cmd);
16cec43d 3188
55489b6e
LB		 3189 if (!rc)
3190 priv->wmm_enabled = enable;
a66098da
LB		 3191
3192 return rc;
3193}
3194
3195/*
55489b6e 3196 * CMD_MIMO_CONFIG.
a66098da 3197 */
55489b6e
LB		 3198struct mwl8k_cmd_mimo_config {
3199 struct mwl8k_cmd_pkt header;
3200 __le32 action;
3201 __u8 rx_antenna_map;
3202 __u8 tx_antenna_map;
ba2d3587 3203} __packed;
a66098da 3204
55489b6e 3205static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 3206{
55489b6e 3207 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB		 3208 int rc;
3209
3210 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3211 if (cmd == NULL)
3212 return -ENOMEM;
3213
55489b6e 3214 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 3215 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3216 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
3217 cmd->rx_antenna_map = rx;
3218 cmd->tx_antenna_map = tx;
a66098da
LB		 3219
3220 rc = mwl8k_post_cmd(hw, &cmd->header);
3221 kfree(cmd);
3222
3223 return rc;
3224}
3225
3226/*
b71ed2c6 3227 * CMD_USE_FIXED_RATE (STA version).
a66098da 3228 */
b71ed2c6
LB		 3229struct mwl8k_cmd_use_fixed_rate_sta {
3230 struct mwl8k_cmd_pkt header;
3231 __le32 action;
3232 __le32 allow_rate_drop;
3233 __le32 num_rates;
3234 struct {
3235 __le32 is_ht_rate;
3236 __le32 enable_retry;
3237 __le32 rate;
3238 __le32 retry_count;
3239 } rate_entry[8];
3240 __le32 rate_type;
3241 __le32 reserved1;
3242 __le32 reserved2;
ba2d3587 3243} __packed;
a66098da 3244
b71ed2c6
LB		 3245#define MWL8K_USE_AUTO_RATE 0x0002
3246#define MWL8K_UCAST_RATE 0
a66098da 3247
b71ed2c6 3248static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 3249{
b71ed2c6 3250 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB		 3251 int rc;
3252
3253 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3254 if (cmd == NULL)
3255 return -ENOMEM;
3256
3257 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3258 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB		 3259 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3260 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB		 3261
3262 rc = mwl8k_post_cmd(hw, &cmd->header);
3263 kfree(cmd);
3264
3265 return rc;
3266}
3267
088aab8b
LB		 3268/*
3269 * CMD_USE_FIXED_RATE (AP version).
3270 */
3271struct mwl8k_cmd_use_fixed_rate_ap {
3272 struct mwl8k_cmd_pkt header;
3273 __le32 action;
3274 __le32 allow_rate_drop;
3275 __le32 num_rates;
3276 struct mwl8k_rate_entry_ap {
3277 __le32 is_ht_rate;
3278 __le32 enable_retry;
3279 __le32 rate;
3280 __le32 retry_count;
3281 } rate_entry[4];
3282 u8 multicast_rate;
3283 u8 multicast_rate_type;
3284 u8 management_rate;
ba2d3587 3285} __packed;
088aab8b
LB		 3286
3287static int
3288mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
3289{
3290 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
3291 int rc;
3292
3293 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3294 if (cmd == NULL)
3295 return -ENOMEM;
3296
3297 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3298 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3299 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3300 cmd->multicast_rate = mcast;
3301 cmd->management_rate = mgmt;
3302
3303 rc = mwl8k_post_cmd(hw, &cmd->header);
3304 kfree(cmd);
3305
3306 return rc;
3307}
3308
55489b6e
LB		 3309/*
3310 * CMD_ENABLE_SNIFFER.
3311 */
3312struct mwl8k_cmd_enable_sniffer {
3313 struct mwl8k_cmd_pkt header;
3314 __le32 action;
ba2d3587 3315} __packed;
55489b6e
LB		 3316
3317static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3318{
3319 struct mwl8k_cmd_enable_sniffer *cmd;
3320 int rc;
3321
3322 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3323 if (cmd == NULL)
3324 return -ENOMEM;
3325
3326 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3327 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3328 cmd->action = cpu_to_le32(!!enable);
3329
3330 rc = mwl8k_post_cmd(hw, &cmd->header);
3331 kfree(cmd);
3332
3333 return rc;
3334}
3335
3336/*
3337 * CMD_SET_MAC_ADDR.
3338 */
3339struct mwl8k_cmd_set_mac_addr {
3340 struct mwl8k_cmd_pkt header;
3341 union {
3342 struct {
3343 __le16 mac_type;
3344 __u8 mac_addr[ETH_ALEN];
3345 } mbss;
3346 __u8 mac_addr[ETH_ALEN];
3347 };
ba2d3587 3348} __packed;
55489b6e 3349
ee0ddf18
LB		 3350#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3351#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3352#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3353#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3354
aa21d0f6
LB		 3355static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3356 struct ieee80211_vif *vif, u8 *mac)
55489b6e
LB		 3357{
3358 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3359 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
55489b6e 3360 struct mwl8k_cmd_set_mac_addr *cmd;
ee0ddf18 3361 int mac_type;
55489b6e
LB		 3362 int rc;
3363
ee0ddf18
LB		 3364 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3365 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3366 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3367 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3368 else
3369 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3370 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3371 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3372 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3373 else
3374 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3375 }
3376
55489b6e
LB		 3377 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3378 if (cmd == NULL)
3379 return -ENOMEM;
3380
3381 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3382 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3383 if (priv->ap_fw) {
ee0ddf18 3384 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB		 3385 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3386 } else {
3387 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3388 }
3389
aa21d0f6 3390 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB		 3391 kfree(cmd);
3392
3393 return rc;
3394}
3395
3396/*
3397 * CMD_SET_RATEADAPT_MODE.
3398 */
3399struct mwl8k_cmd_set_rate_adapt_mode {
3400 struct mwl8k_cmd_pkt header;
3401 __le16 action;
3402 __le16 mode;
ba2d3587 3403} __packed;
55489b6e
LB		 3404
3405static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3406{
3407 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3408 int rc;
3409
3410 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3411 if (cmd == NULL)
3412 return -ENOMEM;
3413
3414 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3415 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3416 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3417 cmd->mode = cpu_to_le16(mode);
3418
3419 rc = mwl8k_post_cmd(hw, &cmd->header);
3420 kfree(cmd);
3421
3422 return rc;
3423}
3424
3aefc37e
NS		 3425/*
3426 * CMD_GET_WATCHDOG_BITMAP.
3427 */
3428struct mwl8k_cmd_get_watchdog_bitmap {
3429 struct mwl8k_cmd_pkt header;
3430 u8 bitmap;
3431} __packed;
3432
3433static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
3434{
3435 struct mwl8k_cmd_get_watchdog_bitmap *cmd;
3436 int rc;
3437
3438 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3439 if (cmd == NULL)
3440 return -ENOMEM;
3441
3442 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
3443 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3444
3445 rc = mwl8k_post_cmd(hw, &cmd->header);
3446 if (!rc)
3447 *bitmap = cmd->bitmap;
3448
3449 kfree(cmd);
3450
3451 return rc;
3452}
3453
3454#define INVALID_BA 0xAA
3455static void mwl8k_watchdog_ba_events(struct work_struct *work)
3456{
3457 int rc;
3458 u8 bitmap = 0, stream_index;
3459 struct mwl8k_ampdu_stream *streams;
3460 struct mwl8k_priv *priv =
3461 container_of(work, struct mwl8k_priv, watchdog_ba_handle);
3462
3463 rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
3464 if (rc)
3465 return;
3466
3467 if (bitmap == INVALID_BA)
3468 return;
3469
3470 /* the bitmap is the hw queue number. Map it to the ampdu queue. */
3471 stream_index = bitmap - MWL8K_TX_WMM_QUEUES;
3472
3473 BUG_ON(stream_index >= priv->num_ampdu_queues);
3474
3475 streams = &priv->ampdu[stream_index];
3476
3477 if (streams->state == AMPDU_STREAM_ACTIVE)
3478 ieee80211_stop_tx_ba_session(streams->sta, streams->tid);
3479
3480 return;
3481}
3482
3483
b64fe619
LB		 3484/*
3485 * CMD_BSS_START.
3486 */
3487struct mwl8k_cmd_bss_start {
3488 struct mwl8k_cmd_pkt header;
3489 __le32 enable;
ba2d3587 3490} __packed;
b64fe619 3491
aa21d0f6
LB		 3492static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3493 struct ieee80211_vif *vif, int enable)
b64fe619
LB		 3494{
3495 struct mwl8k_cmd_bss_start *cmd;
3496 int rc;
3497
3498 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3499 if (cmd == NULL)
3500 return -ENOMEM;
3501
3502 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3503 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3504 cmd->enable = cpu_to_le32(enable);
3505
aa21d0f6 3506 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3507 kfree(cmd);
3508
3509 return rc;
3510}
3511
5faa1aff
NS		 3512/*
3513 * CMD_BASTREAM.
3514 */
3515
3516/*
3517 * UPSTREAM is tx direction
3518 */
3519#define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
3520#define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
3521
3522enum {
3523 MWL8K_BA_CREATE,
3524 MWL8K_BA_UPDATE,
3525 MWL8K_BA_DESTROY,
3526 MWL8K_BA_FLUSH,
3527 MWL8K_BA_CHECK,
3528} ba_stream_action_type;
3529
3530
3531struct mwl8k_create_ba_stream {
3532 __le32 flags;
3533 __le32 idle_thrs;
3534 __le32 bar_thrs;
3535 __le32 window_size;
3536 u8 peer_mac_addr[6];
3537 u8 dialog_token;
3538 u8 tid;
3539 u8 queue_id;
3540 u8 param_info;
3541 __le32 ba_context;
3542 u8 reset_seq_no_flag;
3543 __le16 curr_seq_no;
3544 u8 sta_src_mac_addr[6];
3545} __packed;
3546
3547struct mwl8k_destroy_ba_stream {
3548 __le32 flags;
3549 __le32 ba_context;
3550} __packed;
3551
3552struct mwl8k_cmd_bastream {
3553 struct mwl8k_cmd_pkt header;
3554 __le32 action;
3555 union {
3556 struct mwl8k_create_ba_stream create_params;
3557 struct mwl8k_destroy_ba_stream destroy_params;
3558 };
3559} __packed;
3560
3561static int
3562mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
3563{
3564 struct mwl8k_cmd_bastream *cmd;
3565 int rc;
3566
3567 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3568 if (cmd == NULL)
3569 return -ENOMEM;
3570
3571 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3572 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3573
3574 cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
3575
3576 cmd->create_params.queue_id = stream->idx;
3577 memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
3578 ETH_ALEN);
3579 cmd->create_params.tid = stream->tid;
3580
3581 cmd->create_params.flags =
3582 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
3583 cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
3584
3585 rc = mwl8k_post_cmd(hw, &cmd->header);
3586
3587 kfree(cmd);
3588
3589 return rc;
3590}
3591
3592static int
3593mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3594 u8 buf_size)
3595{
3596 struct mwl8k_cmd_bastream *cmd;
3597 int rc;
3598
3599 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3600 if (cmd == NULL)
3601 return -ENOMEM;
3602
3603
3604 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3605 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3606
3607 cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
3608
3609 cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
3610 cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
3611 cmd->create_params.queue_id = stream->idx;
3612
3613 memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
3614 cmd->create_params.tid = stream->tid;
3615 cmd->create_params.curr_seq_no = cpu_to_le16(0);
3616 cmd->create_params.reset_seq_no_flag = 1;
3617
3618 cmd->create_params.param_info =
3619 (stream->sta->ht_cap.ampdu_factor &
3620 IEEE80211_HT_AMPDU_PARM_FACTOR) |
3621 ((stream->sta->ht_cap.ampdu_density << 2) &
3622 IEEE80211_HT_AMPDU_PARM_DENSITY);
3623
3624 cmd->create_params.flags =
3625 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
3626 BASTREAM_FLAG_DIRECTION_UPSTREAM);
3627
3628 rc = mwl8k_post_cmd(hw, &cmd->header);
3629
3630 wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
3631 stream->sta->addr, stream->tid);
3632 kfree(cmd);
3633
3634 return rc;
3635}
3636
3637static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3638 struct mwl8k_ampdu_stream *stream)
3639{
3640 struct mwl8k_cmd_bastream *cmd;
3641
3642 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3643 if (cmd == NULL)
3644 return;
3645
3646 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3647 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3648 cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
3649
3650 cmd->destroy_params.ba_context = cpu_to_le32(stream->idx);
3651 mwl8k_post_cmd(hw, &cmd->header);
3652
3653 wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx);
3654
3655 kfree(cmd);
3656}
3657
3f5610ff
LB		 3658/*
3659 * CMD_SET_NEW_STN.
3660 */
3661struct mwl8k_cmd_set_new_stn {
3662 struct mwl8k_cmd_pkt header;
3663 __le16 aid;
3664 __u8 mac_addr[6];
3665 __le16 stn_id;
3666 __le16 action;
3667 __le16 rsvd;
3668 __le32 legacy_rates;
3669 __u8 ht_rates[4];
3670 __le16 cap_info;
3671 __le16 ht_capabilities_info;
3672 __u8 mac_ht_param_info;
3673 __u8 rev;
3674 __u8 control_channel;
3675 __u8 add_channel;
3676 __le16 op_mode;
3677 __le16 stbc;
3678 __u8 add_qos_info;
3679 __u8 is_qos_sta;
3680 __le32 fw_sta_ptr;
ba2d3587 3681} __packed;
3f5610ff
LB		 3682
3683#define MWL8K_STA_ACTION_ADD 0
3684#define MWL8K_STA_ACTION_REMOVE 2
3685
3686static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3687 struct ieee80211_vif *vif,
3688 struct ieee80211_sta *sta)
3689{
3690 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3691 u32 rates;
3f5610ff
LB		 3692 int rc;
3693
3694 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3695 if (cmd == NULL)
3696 return -ENOMEM;
3697
3698 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3699 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3700 cmd->aid = cpu_to_le16(sta->aid);
3701 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3702 cmd->stn_id = cpu_to_le16(sta->aid);
3703 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB		 3704 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3705 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3706 else
3707 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3708 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB		 3709 if (sta->ht_cap.ht_supported) {
3710 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3711 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3712 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3713 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3714 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3715 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3716 ((sta->ht_cap.ampdu_density & 7) << 2);
3717 cmd->is_qos_sta = 1;
3718 }
3719
aa21d0f6 3720 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3721 kfree(cmd);
3722
3723 return rc;
3724}
3725
b64fe619
LB		 3726static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3727 struct ieee80211_vif *vif)
3728{
3729 struct mwl8k_cmd_set_new_stn *cmd;
3730 int rc;
3731
3732 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3733 if (cmd == NULL)
3734 return -ENOMEM;
3735
3736 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3737 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3738 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3739
aa21d0f6 3740 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3741 kfree(cmd);
3742
3743 return rc;
3744}
3745
3f5610ff
LB		 3746static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3747 struct ieee80211_vif *vif, u8 *addr)
3748{
3749 struct mwl8k_cmd_set_new_stn *cmd;
3750 int rc;
3751
3752 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3753 if (cmd == NULL)
3754 return -ENOMEM;
3755
3756 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3757 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3758 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3759 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3760
aa21d0f6 3761 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3762 kfree(cmd);
3763
3764 return rc;
3765}
3766
fcdc403c
NS		 3767/*
3768 * CMD_UPDATE_ENCRYPTION.
3769 */
3770
3771#define MAX_ENCR_KEY_LENGTH 16
3772#define MIC_KEY_LENGTH 8
3773
3774struct mwl8k_cmd_update_encryption {
3775 struct mwl8k_cmd_pkt header;
3776
3777 __le32 action;
3778 __le32 reserved;
3779 __u8 mac_addr[6];
3780 __u8 encr_type;
3781
3782} __attribute__((packed));
3783
3784struct mwl8k_cmd_set_key {
3785 struct mwl8k_cmd_pkt header;
3786
3787 __le32 action;
3788 __le32 reserved;
3789 __le16 length;
3790 __le16 key_type_id;
3791 __le32 key_info;
3792 __le32 key_id;
3793 __le16 key_len;
3794 __u8 key_material[MAX_ENCR_KEY_LENGTH];
3795 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
3796 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
3797 __le16 tkip_rsc_low;
3798 __le32 tkip_rsc_high;
3799 __le16 tkip_tsc_low;
3800 __le32 tkip_tsc_high;
3801 __u8 mac_addr[6];
3802} __attribute__((packed));
3803
3804enum {
3805 MWL8K_ENCR_ENABLE,
3806 MWL8K_ENCR_SET_KEY,
3807 MWL8K_ENCR_REMOVE_KEY,
3808 MWL8K_ENCR_SET_GROUP_KEY,
3809};
3810
3811#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
3812#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
3813#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
3814#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
3815#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
3816
3817enum {
3818 MWL8K_ALG_WEP,
3819 MWL8K_ALG_TKIP,
3820 MWL8K_ALG_CCMP,
3821};
3822
3823#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
3824#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
3825#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
3826#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
3827#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
3828
3829static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
3830 struct ieee80211_vif *vif,
3831 u8 *addr,
3832 u8 encr_type)
3833{
3834 struct mwl8k_cmd_update_encryption *cmd;
3835 int rc;
3836
3837 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3838 if (cmd == NULL)
3839 return -ENOMEM;
3840
3841 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3842 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3843 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
3844 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3845 cmd->encr_type = encr_type;
3846
3847 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3848 kfree(cmd);
3849
3850 return rc;
3851}
3852
3853static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
3854 u8 *addr,
3855 struct ieee80211_key_conf *key)
3856{
3857 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3858 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3859 cmd->length = cpu_to_le16(sizeof(*cmd) -
3860 offsetof(struct mwl8k_cmd_set_key, length));
3861 cmd->key_id = cpu_to_le32(key->keyidx);
3862 cmd->key_len = cpu_to_le16(key->keylen);
3863 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3864
3865 switch (key->cipher) {
3866 case WLAN_CIPHER_SUITE_WEP40:
3867 case WLAN_CIPHER_SUITE_WEP104:
3868 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
3869 if (key->keyidx == 0)
3870 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
3871
3872 break;
3873 case WLAN_CIPHER_SUITE_TKIP:
3874 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
3875 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3876 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3877 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3878 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
3879 | MWL8K_KEY_FLAG_TSC_VALID);
3880 break;
3881 case WLAN_CIPHER_SUITE_CCMP:
3882 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
3883 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3884 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3885 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3886 break;
3887 default:
3888 return -ENOTSUPP;
3889 }
3890
3891 return 0;
3892}
3893
3894static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
3895 struct ieee80211_vif *vif,
3896 u8 *addr,
3897 struct ieee80211_key_conf *key)
3898{
3899 struct mwl8k_cmd_set_key *cmd;
3900 int rc;
3901 int keymlen;
3902 u32 action;
3903 u8 idx;
3904 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3905
3906 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3907 if (cmd == NULL)
3908 return -ENOMEM;
3909
3910 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
3911 if (rc < 0)
3912 goto done;
3913
3914 idx = key->keyidx;
3915
3916 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3917 action = MWL8K_ENCR_SET_KEY;
3918 else
3919 action = MWL8K_ENCR_SET_GROUP_KEY;
3920
3921 switch (key->cipher) {
3922 case WLAN_CIPHER_SUITE_WEP40:
3923 case WLAN_CIPHER_SUITE_WEP104:
3924 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
3925 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
3926 sizeof(*key) + key->keylen);
3927 mwl8k_vif->wep_key_conf[idx].enabled = 1;
3928 }
3929
3930 keymlen = 0;
3931 action = MWL8K_ENCR_SET_KEY;
3932 break;
3933 case WLAN_CIPHER_SUITE_TKIP:
3934 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
3935 break;
3936 case WLAN_CIPHER_SUITE_CCMP:
3937 keymlen = key->keylen;
3938 break;
3939 default:
3940 rc = -ENOTSUPP;
3941 goto done;
3942 }
3943
3944 memcpy(cmd->key_material, key->key, keymlen);
3945 cmd->action = cpu_to_le32(action);
3946
3947 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3948done:
3949 kfree(cmd);
3950
3951 return rc;
3952}
3953
3954static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
3955 struct ieee80211_vif *vif,
3956 u8 *addr,
3957 struct ieee80211_key_conf *key)
3958{
3959 struct mwl8k_cmd_set_key *cmd;
3960 int rc;
3961 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3962
3963 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3964 if (cmd == NULL)
3965 return -ENOMEM;
3966
3967 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
3968 if (rc < 0)
3969 goto done;
3970
3971 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3972 WLAN_CIPHER_SUITE_WEP104)
3973 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
3974
3975 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
3976
3977 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3978done:
3979 kfree(cmd);
3980
3981 return rc;
3982}
3983
3984static int mwl8k_set_key(struct ieee80211_hw *hw,
3985 enum set_key_cmd cmd_param,
3986 struct ieee80211_vif *vif,
3987 struct ieee80211_sta *sta,
3988 struct ieee80211_key_conf *key)
3989{
3990 int rc = 0;
3991 u8 encr_type;
3992 u8 *addr;
3993 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3994
3995 if (vif->type == NL80211_IFTYPE_STATION)
3996 return -EOPNOTSUPP;
3997
3998 if (sta == NULL)
3999 addr = hw->wiphy->perm_addr;
4000 else
4001 addr = sta->addr;
4002
4003 if (cmd_param == SET_KEY) {
4004 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
4005 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
4006 if (rc)
4007 goto out;
4008
4009 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
4010 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
4011 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
4012 else
4013 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
4014
4015 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
4016 encr_type);
4017 if (rc)
4018 goto out;
4019
4020 mwl8k_vif->is_hw_crypto_enabled = true;
4021
4022 } else {
4023 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
4024
4025 if (rc)
4026 goto out;
4027
4028 mwl8k_vif->is_hw_crypto_enabled = false;
4029
4030 }
4031out:
4032 return rc;
4033}
4034
55489b6e
LB		 4035/*
4036 * CMD_UPDATE_STADB.
4037 */
25d81b1e
LB		 4038struct ewc_ht_info {
4039 __le16 control1;
4040 __le16 control2;
4041 __le16 control3;
ba2d3587 4042} __packed;
25d81b1e
LB		 4043
4044struct peer_capability_info {
4045 /* Peer type - AP vs. STA. */
4046 __u8 peer_type;
4047
4048 /* Basic 802.11 capabilities from assoc resp. */
4049 __le16 basic_caps;
4050
4051 /* Set if peer supports 802.11n high throughput (HT). */
4052 __u8 ht_support;
4053
4054 /* Valid if HT is supported. */
4055 __le16 ht_caps;
4056 __u8 extended_ht_caps;
4057 struct ewc_ht_info ewc_info;
4058
4059 /* Legacy rate table. Intersection of our rates and peer rates. */
4060 __u8 legacy_rates[12];
4061
4062 /* HT rate table. Intersection of our rates and peer rates. */
4063 __u8 ht_rates[16];
4064 __u8 pad[16];
4065
4066 /* If set, interoperability mode, no proprietary extensions. */
4067 __u8 interop;
4068 __u8 pad2;
4069 __u8 station_id;
4070 __le16 amsdu_enabled;
ba2d3587 4071} __packed;
25d81b1e 4072
55489b6e
LB		 4073struct mwl8k_cmd_update_stadb {
4074 struct mwl8k_cmd_pkt header;
4075
4076 /* See STADB_ACTION_TYPE */
4077 __le32 action;
4078
4079 /* Peer MAC address */
4080 __u8 peer_addr[ETH_ALEN];
4081
4082 __le32 reserved;
4083
4084 /* Peer info - valid during add/update. */
4085 struct peer_capability_info peer_info;
ba2d3587 4086} __packed;
55489b6e 4087
a680400e
LB		 4088#define MWL8K_STA_DB_MODIFY_ENTRY 1
4089#define MWL8K_STA_DB_DEL_ENTRY 2
4090
4091/* Peer Entry flags - used to define the type of the peer node */
4092#define MWL8K_PEER_TYPE_ACCESSPOINT 2
4093
4094static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 4095 struct ieee80211_vif *vif,
13935e2c 4096 struct ieee80211_sta *sta)
55489b6e 4097{
55489b6e 4098 struct mwl8k_cmd_update_stadb *cmd;
a680400e 4099 struct peer_capability_info *p;
8707d026 4100 u32 rates;
55489b6e
LB		 4101 int rc;
4102
4103 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4104 if (cmd == NULL)
4105 return -ENOMEM;
4106
4107 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4108 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 4109 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 4110 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 4111
a680400e
LB		 4112 p = &cmd->peer_info;
4113 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
4114 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 4115 p->ht_support = sta->ht_cap.ht_supported;
b603742f 4116 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB		 4117 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
4118 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB		 4119 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4120 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
4121 else
4122 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4123 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 4124 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB		 4125 p->interop = 1;
4126 p->amsdu_enabled = 0;
4127
4128 rc = mwl8k_post_cmd(hw, &cmd->header);
4129 kfree(cmd);
4130
4131 return rc ? rc : p->station_id;
4132}
4133
4134static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
4135 struct ieee80211_vif *vif, u8 *addr)
4136{
4137 struct mwl8k_cmd_update_stadb *cmd;
4138 int rc;
4139
4140 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4141 if (cmd == NULL)
4142 return -ENOMEM;
4143
4144 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4145 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4146 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 4147 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 4148
a680400e 4149 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB		 4150 kfree(cmd);
4151
4152 return rc;
4153}
4154
a66098da
LB		 4155
4156/*
4157 * Interrupt handling.
4158 */
4159static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
4160{
4161 struct ieee80211_hw *hw = dev_id;
4162 struct mwl8k_priv *priv = hw->priv;
4163 u32 status;
4164
4165 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB		 4166 if (!status)
4167 return IRQ_NONE;
4168
1e9f9de3
LB		 4169 if (status & MWL8K_A2H_INT_TX_DONE) {
4170 status &= ~MWL8K_A2H_INT_TX_DONE;
4171 tasklet_schedule(&priv->poll_tx_task);
4172 }
4173
a66098da 4174 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB		 4175 status &= ~MWL8K_A2H_INT_RX_READY;
4176 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB		 4177 }
4178
3aefc37e
NS		 4179 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4180 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4181 ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
4182 }
4183
67e2eb27
LB		 4184 if (status)
4185 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4186
a66098da 4187 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 4188 if (priv->hostcmd_wait != NULL)
a66098da 4189 complete(priv->hostcmd_wait);
a66098da
LB		 4190 }
4191
4192 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 4193 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 4194 priv->radio_on && priv->pending_tx_pkts)
618952a7 4195 mwl8k_tx_start(priv);
a66098da
LB		 4196 }
4197
4198 return IRQ_HANDLED;
4199}
4200
1e9f9de3
LB		 4201static void mwl8k_tx_poll(unsigned long data)
4202{
4203 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4204 struct mwl8k_priv *priv = hw->priv;
4205 int limit;
4206 int i;
4207
4208 limit = 32;
4209
4210 spin_lock_bh(&priv->tx_lock);
4211
e600707b 4212 for (i = 0; i < mwl8k_tx_queues(priv); i++)
1e9f9de3
LB		 4213 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
4214
4215 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
4216 complete(priv->tx_wait);
4217 priv->tx_wait = NULL;
4218 }
4219
4220 spin_unlock_bh(&priv->tx_lock);
4221
4222 if (limit) {
4223 writel(~MWL8K_A2H_INT_TX_DONE,
4224 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4225 } else {
4226 tasklet_schedule(&priv->poll_tx_task);
4227 }
4228}
4229
67e2eb27
LB		 4230static void mwl8k_rx_poll(unsigned long data)
4231{
4232 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4233 struct mwl8k_priv *priv = hw->priv;
4234 int limit;
4235
4236 limit = 32;
4237 limit -= rxq_process(hw, 0, limit);
4238 limit -= rxq_refill(hw, 0, limit);
4239
4240 if (limit) {
4241 writel(~MWL8K_A2H_INT_RX_READY,
4242 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4243 } else {
4244 tasklet_schedule(&priv->poll_rx_task);
4245 }
4246}
4247
a66098da
LB		 4248
4249/*
4250 * Core driver operations.
4251 */
7bb45683 4252static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
a66098da
LB		 4253{
4254 struct mwl8k_priv *priv = hw->priv;
4255 int index = skb_get_queue_mapping(skb);
a66098da 4256
9189c100 4257 if (!priv->radio_on) {
c96c31e4
JP		 4258 wiphy_debug(hw->wiphy,
4259 "dropped TX frame since radio disabled\n");
a66098da 4260 dev_kfree_skb(skb);
7bb45683 4261 return;
a66098da
LB		 4262 }
4263
7bb45683 4264 mwl8k_txq_xmit(hw, index, skb);
a66098da
LB		 4265}
4266
a66098da
LB		 4267static int mwl8k_start(struct ieee80211_hw *hw)
4268{
a66098da
LB		 4269 struct mwl8k_priv *priv = hw->priv;
4270 int rc;
4271
a0607fd3 4272 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 4273 IRQF_SHARED, MWL8K_NAME, hw);
4274 if (rc) {
5db55844 4275 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 4276 return -EIO;
a66098da
LB		 4277 }
4278
67e2eb27 4279 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 4280 tasklet_enable(&priv->poll_tx_task);
67e2eb27 4281 tasklet_enable(&priv->poll_rx_task);
2ec610cb 4282
a66098da 4283 /* Enable interrupts */
c23b5a69 4284 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da 4285
2ec610cb
LB		 4286 rc = mwl8k_fw_lock(hw);
4287 if (!rc) {
55489b6e 4288 rc = mwl8k_cmd_radio_enable(hw);
a66098da 4289
5e4cf166
LB		 4290 if (!priv->ap_fw) {
4291 if (!rc)
55489b6e 4292 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 4293
5e4cf166
LB		 4294 if (!rc)
4295 rc = mwl8k_cmd_set_pre_scan(hw);
4296
4297 if (!rc)
4298 rc = mwl8k_cmd_set_post_scan(hw,
4299 "\x00\x00\x00\x00\x00\x00");
4300 }
2ec610cb
LB		 4301
4302 if (!rc)
55489b6e 4303 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 4304
2ec610cb 4305 if (!rc)
55489b6e 4306 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 4307
2ec610cb
LB		 4308 mwl8k_fw_unlock(hw);
4309 }
4310
4311 if (rc) {
4312 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4313 free_irq(priv->pdev->irq, hw);
1e9f9de3 4314 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4315 tasklet_disable(&priv->poll_rx_task);
2ec610cb 4316 }
a66098da
LB		 4317
4318 return rc;
4319}
4320
a66098da
LB		 4321static void mwl8k_stop(struct ieee80211_hw *hw)
4322{
a66098da
LB		 4323 struct mwl8k_priv *priv = hw->priv;
4324 int i;
4325
55489b6e 4326 mwl8k_cmd_radio_disable(hw);
a66098da
LB		 4327
4328 ieee80211_stop_queues(hw);
4329
a66098da 4330 /* Disable interrupts */
a66098da 4331 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 4332 free_irq(priv->pdev->irq, hw);
4333
4334 /* Stop finalize join worker */
4335 cancel_work_sync(&priv->finalize_join_worker);
3aefc37e 4336 cancel_work_sync(&priv->watchdog_ba_handle);
a66098da
LB		 4337 if (priv->beacon_skb != NULL)
4338 dev_kfree_skb(priv->beacon_skb);
4339
67e2eb27 4340 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 4341 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4342 tasklet_disable(&priv->poll_rx_task);
a66098da 4343
a66098da 4344 /* Return all skbs to mac80211 */
e600707b 4345 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 4346 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB		 4347}
4348
0863ade8
BC		 4349static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
4350
a66098da 4351static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 4352 struct ieee80211_vif *vif)
a66098da
LB		 4353{
4354 struct mwl8k_priv *priv = hw->priv;
4355 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 4356 u32 macids_supported;
0863ade8
BC		 4357 int macid, rc;
4358 struct mwl8k_device_info *di;
a66098da 4359
a43c49a8
LB		 4360 /*
4361 * Reject interface creation if sniffer mode is active, as
4362 * STA operation is mutually exclusive with hardware sniffer
b64fe619 4363 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB		 4364 */
4365 if (priv->sniffer_enabled) {
c96c31e4
JP		 4366 wiphy_info(hw->wiphy,
4367 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB		 4368 return -EINVAL;
4369 }
4370
0863ade8 4371 di = priv->device_info;
ee0ddf18
LB		 4372 switch (vif->type) {
4373 case NL80211_IFTYPE_AP:
0863ade8
BC		 4374 if (!priv->ap_fw && di->fw_image_ap) {
4375 /* we must load the ap fw to meet this request */
4376 if (!list_empty(&priv->vif_list))
4377 return -EBUSY;
4378 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4379 if (rc)
4380 return rc;
4381 }
ee0ddf18
LB		 4382 macids_supported = priv->ap_macids_supported;
4383 break;
4384 case NL80211_IFTYPE_STATION:
0863ade8
BC		 4385 if (priv->ap_fw && di->fw_image_sta) {
4386 /* we must load the sta fw to meet this request */
4387 if (!list_empty(&priv->vif_list))
4388 return -EBUSY;
4389 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4390 if (rc)
4391 return rc;
4392 }
ee0ddf18
LB		 4393 macids_supported = priv->sta_macids_supported;
4394 break;
4395 default:
4396 return -EINVAL;
4397 }
4398
4399 macid = ffs(macids_supported & ~priv->macids_used);
4400 if (!macid--)
4401 return -EBUSY;
4402
f5bb87cf 4403 /* Setup driver private area. */
1ed32e4f 4404 mwl8k_vif = MWL8K_VIF(vif);
a66098da 4405 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 4406 mwl8k_vif->vif = vif;
ee0ddf18 4407 mwl8k_vif->macid = macid;
a66098da 4408 mwl8k_vif->seqno = 0;
d9a07d49
NS		 4409 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
4410 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 4411
aa21d0f6
LB		 4412 /* Set the mac address. */
4413 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
4414
4415 if (priv->ap_fw)
4416 mwl8k_cmd_set_new_stn_add_self(hw, vif);
4417
ee0ddf18 4418 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 4419 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB		 4420
4421 return 0;
4422}
4423
4424static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 4425 struct ieee80211_vif *vif)
a66098da
LB		 4426{
4427 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 4428 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 4429
b64fe619
LB		 4430 if (priv->ap_fw)
4431 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
4432
aa21d0f6 4433 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
32060e1b 4434
ee0ddf18 4435 priv->macids_used &= ~(1 << mwl8k_vif->macid);
f5bb87cf 4436 list_del(&mwl8k_vif->list);
a66098da
LB		 4437}
4438
ee03a932 4439static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 4440{
a66098da
LB		 4441 struct ieee80211_conf *conf = &hw->conf;
4442 struct mwl8k_priv *priv = hw->priv;
ee03a932 4443 int rc;
a66098da 4444
7595d67a 4445 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 4446 mwl8k_cmd_radio_disable(hw);
ee03a932 4447 return 0;
7595d67a
LB		 4448 }
4449
ee03a932
LB		 4450 rc = mwl8k_fw_lock(hw);
4451 if (rc)
4452 return rc;
a66098da 4453
55489b6e 4454 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB		 4455 if (rc)
4456 goto out;
a66098da 4457
610677d2 4458 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB		 4459 if (rc)
4460 goto out;
4461
a66098da
LB		 4462 if (conf->power_level > 18)
4463 conf->power_level = 18;
a66098da 4464
08b06347 4465 if (priv->ap_fw) {
41fdf097
NS		 4466 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
4467 if (rc)
4468 goto out;
4469
da62b761
NS		 4470 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
4471 if (rc)
4472 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
4473 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
4474 if (rc)
4475 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
4476
08b06347 4477 } else {
41fdf097
NS		 4478 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
4479 if (rc)
4480 goto out;
08b06347
LB		 4481 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
4482 }
a66098da 4483
ee03a932
LB		 4484out:
4485 mwl8k_fw_unlock(hw);
a66098da 4486
ee03a932 4487 return rc;
a66098da
LB		 4488}
4489
b64fe619
LB		 4490static void
4491mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4492 struct ieee80211_bss_conf *info, u32 changed)
a66098da 4493{
a66098da 4494 struct mwl8k_priv *priv = hw->priv;
c3cbbe8a 4495 u32 ap_legacy_rates;
13935e2c 4496 u8 ap_mcs_rates[16];
3a980d0a
LB		 4497 int rc;
4498
c3cbbe8a 4499 if (mwl8k_fw_lock(hw))
3a980d0a 4500 return;
a66098da 4501
c3cbbe8a
LB		 4502 /*
4503 * No need to capture a beacon if we're no longer associated.
4504 */
4505 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
4506 priv->capture_beacon = false;
3a980d0a 4507
c3cbbe8a 4508 /*
13935e2c 4509 * Get the AP's legacy and MCS rates.
c3cbbe8a 4510 */
7dc6a7a7 4511 if (vif->bss_conf.assoc) {
c6e96010 4512 struct ieee80211_sta *ap;
c97470dd 4513
c6e96010 4514 rcu_read_lock();
c6e96010 4515
c3cbbe8a
LB		 4516 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4517 if (ap == NULL) {
4518 rcu_read_unlock();
c6e96010 4519 goto out;
c3cbbe8a
LB		 4520 }
4521
8707d026
LB		 4522 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4523 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4524 } else {
4525 ap_legacy_rates =
4526 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4527 }
13935e2c 4528 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB		 4529
4530 rcu_read_unlock();
4531 }
c6e96010 4532
c3cbbe8a 4533 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4534 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB		 4535 if (rc)
4536 goto out;
a66098da 4537
b71ed2c6 4538 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB		 4539 if (rc)
4540 goto out;
c3cbbe8a 4541 }
a66098da 4542
c3cbbe8a 4543 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB		 4544 rc = mwl8k_set_radio_preamble(hw,
4545 vif->bss_conf.use_short_preamble);
3a980d0a
LB		 4546 if (rc)
4547 goto out;
c3cbbe8a 4548 }
a66098da 4549
c3cbbe8a 4550 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4551 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB		 4552 if (rc)
4553 goto out;
c3cbbe8a 4554 }
a66098da 4555
c97470dd
LB		 4556 if (vif->bss_conf.assoc &&
4557 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4558 BSS_CHANGED_HT))) {
c3cbbe8a 4559 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB		 4560 if (rc)
4561 goto out;
c3cbbe8a 4562 }
a66098da 4563
c3cbbe8a
LB		 4564 if (vif->bss_conf.assoc &&
4565 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB		 4566 /*
4567 * Finalize the join. Tell rx handler to process
4568 * next beacon from our BSSID.
4569 */
0a11dfc3 4570 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4571 priv->capture_beacon = true;
a66098da
LB		 4572 }
4573
3a980d0a
LB		 4574out:
4575 mwl8k_fw_unlock(hw);
a66098da
LB		 4576}
4577
b64fe619
LB		 4578static void
4579mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4580 struct ieee80211_bss_conf *info, u32 changed)
4581{
4582 int rc;
4583
4584 if (mwl8k_fw_lock(hw))
4585 return;
4586
4587 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4588 rc = mwl8k_set_radio_preamble(hw,
4589 vif->bss_conf.use_short_preamble);
4590 if (rc)
4591 goto out;
4592 }
4593
4594 if (changed & BSS_CHANGED_BASIC_RATES) {
4595 int idx;
4596 int rate;
4597
4598 /*
4599 * Use lowest supported basic rate for multicasts
4600 * and management frames (such as probe responses --
4601 * beacons will always go out at 1 Mb/s).
4602 */
4603 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB		 4604 if (idx)
4605 idx--;
4606
4607 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4608 rate = mwl8k_rates_24[idx].hw_value;
4609 else
4610 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB		 4611
4612 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4613 }
4614
4615 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4616 struct sk_buff *skb;
4617
4618 skb = ieee80211_beacon_get(hw, vif);
4619 if (skb != NULL) {
aa21d0f6 4620 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB		 4621 kfree_skb(skb);
4622 }
4623 }
4624
4625 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4626 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB		 4627
4628out:
4629 mwl8k_fw_unlock(hw);
4630}
4631
4632static void
4633mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4634 struct ieee80211_bss_conf *info, u32 changed)
4635{
4636 struct mwl8k_priv *priv = hw->priv;
4637
4638 if (!priv->ap_fw)
4639 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4640 else
4641 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4642}
4643
e81cd2d6 4644static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4645 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB		 4646{
4647 struct mwl8k_cmd_pkt *cmd;
4648
447ced07
LB		 4649 /*
4650 * Synthesize and return a command packet that programs the
4651 * hardware multicast address filter. At this point we don't
4652 * know whether FIF_ALLMULTI is being requested, but if it is,
4653 * we'll end up throwing this packet away and creating a new
4654 * one in mwl8k_configure_filter().
4655 */
22bedad3 4656 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB		 4657
4658 return (unsigned long)cmd;
4659}
4660
a43c49a8
LB		 4661static int
4662mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4663 unsigned int changed_flags,
4664 unsigned int *total_flags)
4665{
4666 struct mwl8k_priv *priv = hw->priv;
4667
4668 /*
4669 * Hardware sniffer mode is mutually exclusive with STA
4670 * operation, so refuse to enable sniffer mode if a STA
4671 * interface is active.
4672 */
f5bb87cf 4673 if (!list_empty(&priv->vif_list)) {
a43c49a8 4674 if (net_ratelimit())
c96c31e4
JP		 4675 wiphy_info(hw->wiphy,
4676 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB		 4677 return 0;
4678 }
4679
4680 if (!priv->sniffer_enabled) {
55489b6e 4681 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB		 4682 return 0;
4683 priv->sniffer_enabled = true;
4684 }
4685
4686 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4687 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4688 FIF_OTHER_BSS;
4689
4690 return 1;
4691}
4692
f5bb87cf
LB		 4693static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4694{
4695 if (!list_empty(&priv->vif_list))
4696 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4697
4698 return NULL;
4699}
4700
e6935ea1
LB		 4701static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4702 unsigned int changed_flags,
4703 unsigned int *total_flags,
4704 u64 multicast)
4705{
4706 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB		 4707 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4708
c0adae2c
LB		 4709 /*
4710 * AP firmware doesn't allow fine-grained control over
4711 * the receive filter.
4712 */
4713 if (priv->ap_fw) {
4714 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4715 kfree(cmd);
4716 return;
4717 }
4718
a43c49a8
LB		 4719 /*
4720 * Enable hardware sniffer mode if FIF_CONTROL or
4721 * FIF_OTHER_BSS is requested.
4722 */
4723 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
4724 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
4725 kfree(cmd);
4726 return;
4727 }
a66098da 4728
e6935ea1 4729 /* Clear unsupported feature flags */
447ced07 4730 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 4731
90852f7a
LB		 4732 if (mwl8k_fw_lock(hw)) {
4733 kfree(cmd);
e6935ea1 4734 return;
90852f7a 4735 }
a66098da 4736
a43c49a8 4737 if (priv->sniffer_enabled) {
55489b6e 4738 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB		 4739 priv->sniffer_enabled = false;
4740 }
4741
e6935ea1 4742 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB		 4743 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
4744 /*
4745 * Disable the BSS filter.
4746 */
e6935ea1 4747 mwl8k_cmd_set_pre_scan(hw);
77165d88 4748 } else {
f5bb87cf 4749 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 4750 const u8 *bssid;
a94cc97e 4751
77165d88
LB		 4752 /*
4753 * Enable the BSS filter.
4754 *
4755 * If there is an active STA interface, use that
4756 * interface's BSSID, otherwise use a dummy one
4757 * (where the OUI part needs to be nonzero for
4758 * the BSSID to be accepted by POST_SCAN).
4759 */
f5bb87cf
LB		 4760 mwl8k_vif = mwl8k_first_vif(priv);
4761 if (mwl8k_vif != NULL)
4762 bssid = mwl8k_vif->vif->bss_conf.bssid;
4763 else
4764 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 4765
e6935ea1 4766 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 4767 }
4768 }
4769
447ced07
LB		 4770 /*
4771 * If FIF_ALLMULTI is being requested, throw away the command
4772 * packet that ->prepare_multicast() built and replace it with
4773 * a command packet that enables reception of all multicast
4774 * packets.
4775 */
4776 if (*total_flags & FIF_ALLMULTI) {
4777 kfree(cmd);
22bedad3 4778 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB		 4779 }
4780
4781 if (cmd != NULL) {
4782 mwl8k_post_cmd(hw, cmd);
4783 kfree(cmd);
e6935ea1 4784 }
a66098da 4785
e6935ea1 4786 mwl8k_fw_unlock(hw);
a66098da
LB		 4787}
4788
a66098da
LB		 4789static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
4790{
c2c2b12a 4791 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB		 4792}
4793
4a6967b8
JB		 4794static int mwl8k_sta_remove(struct ieee80211_hw *hw,
4795 struct ieee80211_vif *vif,
4796 struct ieee80211_sta *sta)
3f5610ff
LB		 4797{
4798 struct mwl8k_priv *priv = hw->priv;
4799
4a6967b8
JB		 4800 if (priv->ap_fw)
4801 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
4802 else
4803 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB		 4804}
4805
4a6967b8
JB		 4806static int mwl8k_sta_add(struct ieee80211_hw *hw,
4807 struct ieee80211_vif *vif,
4808 struct ieee80211_sta *sta)
bbfd9128
LB		 4809{
4810 struct mwl8k_priv *priv = hw->priv;
4a6967b8 4811 int ret;
fcdc403c
NS		 4812 int i;
4813 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4814 struct ieee80211_key_conf *key;
bbfd9128 4815
4a6967b8
JB		 4816 if (!priv->ap_fw) {
4817 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
4818 if (ret >= 0) {
4819 MWL8K_STA(sta)->peer_id = ret;
17033543
NS		 4820 if (sta->ht_cap.ht_supported)
4821 MWL8K_STA(sta)->is_ampdu_allowed = true;
fcdc403c 4822 ret = 0;
4a6967b8 4823 }
bbfd9128 4824
d9a07d49
NS		 4825 } else {
4826 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 4827 }
4a6967b8 4828
d9a07d49
NS		 4829 for (i = 0; i < NUM_WEP_KEYS; i++) {
4830 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
4831 if (mwl8k_vif->wep_key_conf[i].enabled)
4832 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
4833 }
fcdc403c 4834 return ret;
bbfd9128
LB		 4835}
4836
a66098da
LB		 4837static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
4838 const struct ieee80211_tx_queue_params *params)
4839{
3e4f542c 4840 struct mwl8k_priv *priv = hw->priv;
a66098da 4841 int rc;
a66098da 4842
3e4f542c
LB		 4843 rc = mwl8k_fw_lock(hw);
4844 if (!rc) {
e600707b 4845 BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
0863ade8
BC		 4846 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
4847
3e4f542c 4848 if (!priv->wmm_enabled)
55489b6e 4849 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 4850
85c9205c 4851 if (!rc) {
e600707b 4852 int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
85c9205c 4853 rc = mwl8k_cmd_set_edca_params(hw, q,
55489b6e
LB		 4854 params->cw_min,
4855 params->cw_max,
4856 params->aifs,
4857 params->txop);
85c9205c 4858 }
3e4f542c
LB		 4859
4860 mwl8k_fw_unlock(hw);
a66098da 4861 }
3e4f542c 4862
a66098da
LB		 4863 return rc;
4864}
4865
a66098da
LB		 4866static int mwl8k_get_stats(struct ieee80211_hw *hw,
4867 struct ieee80211_low_level_stats *stats)
4868{
55489b6e 4869 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB		 4870}
4871
0d462bbb
JL		 4872static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
4873 struct survey_info *survey)
4874{
4875 struct mwl8k_priv *priv = hw->priv;
4876 struct ieee80211_conf *conf = &hw->conf;
4877
4878 if (idx != 0)
4879 return -ENOENT;
4880
4881 survey->channel = conf->channel;
4882 survey->filled = SURVEY_INFO_NOISE_DBM;
4883 survey->noise = priv->noise;
4884
4885 return 0;
4886}
4887
65f3ddcd
NS		 4888#define MAX_AMPDU_ATTEMPTS 5
4889
a2292d83
LB		 4890static int
4891mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4892 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB		 4893 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
4894 u8 buf_size)
a2292d83 4895{
65f3ddcd
NS		 4896
4897 int i, rc = 0;
4898 struct mwl8k_priv *priv = hw->priv;
4899 struct mwl8k_ampdu_stream *stream;
4900 u8 *addr = sta->addr;
4901
4902 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
4903 return -ENOTSUPP;
4904
4905 spin_lock(&priv->stream_lock);
4906 stream = mwl8k_lookup_stream(hw, addr, tid);
4907
a2292d83
LB		 4908 switch (action) {
4909 case IEEE80211_AMPDU_RX_START:
4910 case IEEE80211_AMPDU_RX_STOP:
65f3ddcd
NS		 4911 break;
4912 case IEEE80211_AMPDU_TX_START:
4913 /* By the time we get here the hw queues may contain outgoing
4914 * packets for this RA/TID that are not part of this BA
4915 * session. The hw will assign sequence numbers to these
4916 * packets as they go out. So if we query the hw for its next
4917 * sequence number and use that for the SSN here, it may end up
4918 * being wrong, which will lead to sequence number mismatch at
4919 * the recipient. To avoid this, we reset the sequence number
4920 * to O for the first MPDU in this BA stream.
4921 */
4922 *ssn = 0;
4923 if (stream == NULL) {
4924 /* This means that somebody outside this driver called
4925 * ieee80211_start_tx_ba_session. This is unexpected
4926 * because we do our own rate control. Just warn and
4927 * move on.
4928 */
4929 wiphy_warn(hw->wiphy, "Unexpected call to %s. "
4930 "Proceeding anyway.\n", __func__);
4931 stream = mwl8k_add_stream(hw, sta, tid);
4932 }
4933 if (stream == NULL) {
4934 wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
4935 rc = -EBUSY;
4936 break;
4937 }
4938 stream->state = AMPDU_STREAM_IN_PROGRESS;
4939
4940 /* Release the lock before we do the time consuming stuff */
4941 spin_unlock(&priv->stream_lock);
4942 for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
4943 rc = mwl8k_check_ba(hw, stream);
4944
4945 if (!rc)
4946 break;
4947 /*
4948 * HW queues take time to be flushed, give them
4949 * sufficient time
4950 */
4951
4952 msleep(1000);
4953 }
4954 spin_lock(&priv->stream_lock);
4955 if (rc) {
4956 wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
4957 " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
4958 mwl8k_remove_stream(hw, stream);
4959 rc = -EBUSY;
4960 break;
4961 }
4962 ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
4963 break;
4964 case IEEE80211_AMPDU_TX_STOP:
4965 if (stream == NULL)
4966 break;
4967 if (stream->state == AMPDU_STREAM_ACTIVE) {
4968 spin_unlock(&priv->stream_lock);
4969 mwl8k_destroy_ba(hw, stream);
4970 spin_lock(&priv->stream_lock);
4971 }
4972 mwl8k_remove_stream(hw, stream);
4973 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
4974 break;
4975 case IEEE80211_AMPDU_TX_OPERATIONAL:
4976 BUG_ON(stream == NULL);
4977 BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
4978 spin_unlock(&priv->stream_lock);
4979 rc = mwl8k_create_ba(hw, stream, buf_size);
4980 spin_lock(&priv->stream_lock);
4981 if (!rc)
4982 stream->state = AMPDU_STREAM_ACTIVE;
4983 else {
4984 spin_unlock(&priv->stream_lock);
4985 mwl8k_destroy_ba(hw, stream);
4986 spin_lock(&priv->stream_lock);
4987 wiphy_debug(hw->wiphy,
4988 "Failed adding stream for sta %pM tid %d\n",
4989 addr, tid);
4990 mwl8k_remove_stream(hw, stream);
4991 }
4992 break;
4993
a2292d83 4994 default:
65f3ddcd 4995 rc = -ENOTSUPP;
a2292d83 4996 }
65f3ddcd
NS		 4997
4998 spin_unlock(&priv->stream_lock);
4999 return rc;
a2292d83
LB		 5000}
5001
a66098da
LB		 5002static const struct ieee80211_ops mwl8k_ops = {
5003 .tx = mwl8k_tx,
5004 .start = mwl8k_start,
5005 .stop = mwl8k_stop,
5006 .add_interface = mwl8k_add_interface,
5007 .remove_interface = mwl8k_remove_interface,
5008 .config = mwl8k_config,
a66098da 5009 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 5010 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 5011 .configure_filter = mwl8k_configure_filter,
fcdc403c 5012 .set_key = mwl8k_set_key,
a66098da 5013 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB		 5014 .sta_add = mwl8k_sta_add,
5015 .sta_remove = mwl8k_sta_remove,
a66098da 5016 .conf_tx = mwl8k_conf_tx,
a66098da 5017 .get_stats = mwl8k_get_stats,
0d462bbb 5018 .get_survey = mwl8k_get_survey,
a2292d83 5019 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB		 5020};
5021
a66098da
LB		 5022static void mwl8k_finalize_join_worker(struct work_struct *work)
5023{
5024 struct mwl8k_priv *priv =
5025 container_of(work, struct mwl8k_priv, finalize_join_worker);
5026 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB		 5027 struct ieee80211_mgmt *mgmt = (void *)skb->data;
5028 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
5029 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
5030 mgmt->u.beacon.variable, len);
5031 int dtim_period = 1;
5032
5033 if (tim && tim[1] >= 2)
5034 dtim_period = tim[3];
a66098da 5035
56007a02 5036 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 5037
f5bb87cf 5038 dev_kfree_skb(skb);
a66098da
LB		 5039 priv->beacon_skb = NULL;
5040}
5041
bcb628d5 5042enum {
9e1b17ea
LB		 5043 MWL8363 = 0,
5044 MWL8687,
bcb628d5 5045 MWL8366,
6f6d1e9a
LB		 5046};
5047
8a7a578c 5048#define MWL8K_8366_AP_FW_API 2
952a0e96
BC		 5049#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
5050#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
5051
bcb628d5 5052static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
9e1b17ea
LB		 5053 [MWL8363] = {
5054 .part_name = "88w8363",
5055 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 5056 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 5057 },
49eb691c 5058 [MWL8687] = {
bcb628d5
JL		 5059 .part_name = "88w8687",
5060 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 5061 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 5062 },
49eb691c 5063 [MWL8366] = {
bcb628d5
JL		 5064 .part_name = "88w8366",
5065 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 5066 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC		 5067 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
5068 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 5069 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 5070 },
45a390dd
LB		 5071};
5072
c92d4ede
LB		 5073MODULE_FIRMWARE("mwl8k/helper_8363.fw");
5074MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
5075MODULE_FIRMWARE("mwl8k/helper_8687.fw");
5076MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
5077MODULE_FIRMWARE("mwl8k/helper_8366.fw");
5078MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 5079MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 5080
45a390dd 5081static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 5082 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB		 5083 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
5084 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL		 5085 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
5086 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
5087 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 5088 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 5089 { },
45a390dd
LB		 5090};
5091MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
5092
99020471
BC		 5093static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
5094{
5095 int rc;
5096 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
5097 "Trying alternative firmware %s\n", pci_name(priv->pdev),
5098 priv->fw_pref, priv->fw_alt);
5099 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
5100 if (rc) {
5101 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5102 pci_name(priv->pdev), priv->fw_alt);
5103 return rc;
5104 }
5105 return 0;
5106}
5107
5108static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
5109static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
5110{
5111 struct mwl8k_priv *priv = context;
5112 struct mwl8k_device_info *di = priv->device_info;
5113 int rc;
5114
5115 switch (priv->fw_state) {
5116 case FW_STATE_INIT:
5117 if (!fw) {
5118 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
5119 pci_name(priv->pdev), di->helper_image);
5120 goto fail;
5121 }
5122 priv->fw_helper = fw;
5123 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
5124 true);
5125 if (rc && priv->fw_alt) {
5126 rc = mwl8k_request_alt_fw(priv);
5127 if (rc)
5128 goto fail;
5129 priv->fw_state = FW_STATE_LOADING_ALT;
5130 } else if (rc)
5131 goto fail;
5132 else
5133 priv->fw_state = FW_STATE_LOADING_PREF;
5134 break;
5135
5136 case FW_STATE_LOADING_PREF:
5137 if (!fw) {
5138 if (priv->fw_alt) {
5139 rc = mwl8k_request_alt_fw(priv);
5140 if (rc)
5141 goto fail;
5142 priv->fw_state = FW_STATE_LOADING_ALT;
5143 } else
5144 goto fail;
5145 } else {
5146 priv->fw_ucode = fw;
5147 rc = mwl8k_firmware_load_success(priv);
5148 if (rc)
5149 goto fail;
5150 else
5151 complete(&priv->firmware_loading_complete);
5152 }
5153 break;
5154
5155 case FW_STATE_LOADING_ALT:
5156 if (!fw) {
5157 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5158 pci_name(priv->pdev), di->helper_image);
5159 goto fail;
5160 }
5161 priv->fw_ucode = fw;
5162 rc = mwl8k_firmware_load_success(priv);
5163 if (rc)
5164 goto fail;
5165 else
5166 complete(&priv->firmware_loading_complete);
5167 break;
5168
5169 default:
5170 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
5171 MWL8K_NAME, priv->fw_state);
5172 BUG_ON(1);
5173 }
5174
5175 return;
5176
5177fail:
5178 priv->fw_state = FW_STATE_ERROR;
5179 complete(&priv->firmware_loading_complete);
5180 device_release_driver(&priv->pdev->dev);
5181 mwl8k_release_firmware(priv);
5182}
5183
5184static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
5185 bool nowait)
a66098da 5186{
3cc7772c 5187 struct mwl8k_priv *priv = hw->priv;
a66098da 5188 int rc;
be695fc4
LB		 5189
5190 /* Reset firmware and hardware */
5191 mwl8k_hw_reset(priv);
5192
5193 /* Ask userland hotplug daemon for the device firmware */
99020471 5194 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 5195 if (rc) {
5db55844 5196 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 5197 return rc;
be695fc4
LB		 5198 }
5199
99020471
BC		 5200 if (nowait)
5201 return rc;
5202
be695fc4
LB		 5203 /* Load firmware into hardware */
5204 rc = mwl8k_load_firmware(hw);
3cc7772c 5205 if (rc)
5db55844 5206 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB		 5207
5208 /* Reclaim memory once firmware is successfully loaded */
5209 mwl8k_release_firmware(priv);
5210
3cc7772c
BC		 5211 return rc;
5212}
5213
73b46320
BC		 5214static int mwl8k_init_txqs(struct ieee80211_hw *hw)
5215{
5216 struct mwl8k_priv *priv = hw->priv;
5217 int rc = 0;
5218 int i;
5219
e600707b 5220 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
73b46320
BC		 5221 rc = mwl8k_txq_init(hw, i);
5222 if (rc)
5223 break;
5224 if (priv->ap_fw)
5225 iowrite32(priv->txq[i].txd_dma,
5226 priv->sram + priv->txq_offset[i]);
5227 }
5228 return rc;
5229}
5230
3cc7772c
BC		 5231/* initialize hw after successfully loading a firmware image */
5232static int mwl8k_probe_hw(struct ieee80211_hw *hw)
5233{
5234 struct mwl8k_priv *priv = hw->priv;
5235 int rc = 0;
5236 int i;
be695fc4 5237
91942230 5238 if (priv->ap_fw) {
89a91f4f 5239 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 5240 if (priv->rxd_ops == NULL) {
c96c31e4
JP		 5241 wiphy_err(hw->wiphy,
5242 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB		 5243 goto err_stop_firmware;
5244 }
5245 } else {
89a91f4f 5246 priv->rxd_ops = &rxd_sta_ops;
91942230 5247 }
be695fc4
LB		 5248
5249 priv->sniffer_enabled = false;
5250 priv->wmm_enabled = false;
5251 priv->pending_tx_pkts = 0;
5252
a66098da
LB		 5253 rc = mwl8k_rxq_init(hw, 0);
5254 if (rc)
3cc7772c 5255 goto err_stop_firmware;
a66098da
LB		 5256 rxq_refill(hw, 0, INT_MAX);
5257
73b46320
BC		 5258 /* For the sta firmware, we need to know the dma addresses of tx queues
5259 * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
5260 * prior to issuing this command. But for the AP case, we learn the
5261 * total number of queues from the result CMD_GET_HW_SPEC, so for this
5262 * case we must initialize the tx queues after.
5263 */
8a7a578c 5264 priv->num_ampdu_queues = 0;
73b46320
BC		 5265 if (!priv->ap_fw) {
5266 rc = mwl8k_init_txqs(hw);
a66098da
LB		 5267 if (rc)
5268 goto err_free_queues;
5269 }
5270
5271 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 5272 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3aefc37e
NS		 5273 iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
5274 MWL8K_A2H_INT_BA_WATCHDOG,
1e9f9de3 5275 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
a66098da
LB		 5276 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
5277
a0607fd3 5278 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 5279 IRQF_SHARED, MWL8K_NAME, hw);
5280 if (rc) {
5db55844 5281 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB		 5282 goto err_free_queues;
5283 }
5284
ac109fd0
BC		 5285 memset(priv->ampdu, 0, sizeof(priv->ampdu));
5286
a66098da
LB		 5287 /*
5288 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 5289 * commands use interrupts and avoid polling. Disable
a66098da
LB		 5290 * interrupts when done.
5291 */
c23b5a69 5292 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5293
5294 /* Get config data, mac addrs etc */
42fba21d
LB		 5295 if (priv->ap_fw) {
5296 rc = mwl8k_cmd_get_hw_spec_ap(hw);
73b46320
BC		 5297 if (!rc)
5298 rc = mwl8k_init_txqs(hw);
42fba21d
LB		 5299 if (!rc)
5300 rc = mwl8k_cmd_set_hw_spec(hw);
5301 } else {
5302 rc = mwl8k_cmd_get_hw_spec_sta(hw);
5303 }
a66098da 5304 if (rc) {
5db55844 5305 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 5306 goto err_free_irq;
a66098da
LB		 5307 }
5308
5309 /* Turn radio off */
55489b6e 5310 rc = mwl8k_cmd_radio_disable(hw);
a66098da 5311 if (rc) {
5db55844 5312 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 5313 goto err_free_irq;
a66098da
LB		 5314 }
5315
32060e1b 5316 /* Clear MAC address */
aa21d0f6 5317 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 5318 if (rc) {
5db55844 5319 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 5320 goto err_free_irq;
32060e1b
LB		 5321 }
5322
a66098da 5323 /* Disable interrupts */
a66098da 5324 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5325 free_irq(priv->pdev->irq, hw);
5326
c96c31e4
JP		 5327 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
5328 priv->device_info->part_name,
5329 priv->hw_rev, hw->wiphy->perm_addr,
5330 priv->ap_fw ? "AP" : "STA",
5331 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
5332 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB		 5333
5334 return 0;
5335
a66098da 5336err_free_irq:
a66098da 5337 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5338 free_irq(priv->pdev->irq, hw);
5339
5340err_free_queues:
e600707b 5341 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5342 mwl8k_txq_deinit(hw, i);
5343 mwl8k_rxq_deinit(hw, 0);
5344
3cc7772c
BC		 5345err_stop_firmware:
5346 mwl8k_hw_reset(priv);
5347
5348 return rc;
5349}
5350
5351/*
5352 * invoke mwl8k_reload_firmware to change the firmware image after the device
5353 * has already been registered
5354 */
5355static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
5356{
5357 int i, rc = 0;
5358 struct mwl8k_priv *priv = hw->priv;
5359
5360 mwl8k_stop(hw);
5361 mwl8k_rxq_deinit(hw, 0);
5362
e600707b 5363 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5364 mwl8k_txq_deinit(hw, i);
5365
99020471 5366 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC		 5367 if (rc)
5368 goto fail;
5369
5370 rc = mwl8k_probe_hw(hw);
5371 if (rc)
5372 goto fail;
5373
5374 rc = mwl8k_start(hw);
5375 if (rc)
5376 goto fail;
5377
5378 rc = mwl8k_config(hw, ~0);
5379 if (rc)
5380 goto fail;
5381
e600707b 5382 for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
3cc7772c
BC		 5383 rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
5384 if (rc)
5385 goto fail;
5386 }
5387
5388 return rc;
5389
5390fail:
5391 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
5392 return rc;
5393}
5394
5395static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5396{
5397 struct ieee80211_hw *hw = priv->hw;
5398 int i, rc;
5399
99020471
BC		 5400 rc = mwl8k_load_firmware(hw);
5401 mwl8k_release_firmware(priv);
5402 if (rc) {
5403 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5404 return rc;
5405 }
5406
3cc7772c
BC		 5407 /*
5408 * Extra headroom is the size of the required DMA header
5409 * minus the size of the smallest 802.11 frame (CTS frame).
5410 */
5411 hw->extra_tx_headroom =
5412 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
5413
5414 hw->channel_change_time = 10;
5415
e600707b 5416 hw->queues = MWL8K_TX_WMM_QUEUES;
3cc7772c
BC		 5417
5418 /* Set rssi values to dBm */
0bf22c37 5419 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
3cc7772c
BC		 5420 hw->vif_data_size = sizeof(struct mwl8k_vif);
5421 hw->sta_data_size = sizeof(struct mwl8k_sta);
5422
5423 priv->macids_used = 0;
5424 INIT_LIST_HEAD(&priv->vif_list);
5425
5426 /* Set default radio state and preamble */
5427 priv->radio_on = 0;
5428 priv->radio_short_preamble = 0;
5429
5430 /* Finalize join worker */
5431 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3aefc37e
NS		 5432 /* Handle watchdog ba events */
5433 INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
3cc7772c
BC		 5434
5435 /* TX reclaim and RX tasklets. */
5436 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
5437 tasklet_disable(&priv->poll_tx_task);
5438 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
5439 tasklet_disable(&priv->poll_rx_task);
5440
5441 /* Power management cookie */
5442 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
5443 if (priv->cookie == NULL)
5444 return -ENOMEM;
5445
5446 mutex_init(&priv->fw_mutex);
5447 priv->fw_mutex_owner = NULL;
5448 priv->fw_mutex_depth = 0;
5449 priv->hostcmd_wait = NULL;
5450
5451 spin_lock_init(&priv->tx_lock);
5452
ac109fd0
BC		 5453 spin_lock_init(&priv->stream_lock);
5454
3cc7772c
BC		 5455 priv->tx_wait = NULL;
5456
5457 rc = mwl8k_probe_hw(hw);
5458 if (rc)
5459 goto err_free_cookie;
5460
5461 hw->wiphy->interface_modes = 0;
5462 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
5463 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
5464 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
5465 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
5466
5467 rc = ieee80211_register_hw(hw);
5468 if (rc) {
5469 wiphy_err(hw->wiphy, "Cannot register device\n");
5470 goto err_unprobe_hw;
5471 }
5472
5473 return 0;
5474
5475err_unprobe_hw:
e600707b 5476 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5477 mwl8k_txq_deinit(hw, i);
5478 mwl8k_rxq_deinit(hw, 0);
5479
be695fc4 5480err_free_cookie:
a66098da
LB		 5481 if (priv->cookie != NULL)
5482 pci_free_consistent(priv->pdev, 4,
5483 priv->cookie, priv->cookie_dma);
5484
3cc7772c
BC		 5485 return rc;
5486}
5487static int __devinit mwl8k_probe(struct pci_dev *pdev,
5488 const struct pci_device_id *id)
5489{
5490 static int printed_version;
5491 struct ieee80211_hw *hw;
5492 struct mwl8k_priv *priv;
0863ade8 5493 struct mwl8k_device_info *di;
3cc7772c
BC		 5494 int rc;
5495
5496 if (!printed_version) {
5497 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
5498 printed_version = 1;
5499 }
5500
5501
5502 rc = pci_enable_device(pdev);
5503 if (rc) {
5504 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
5505 MWL8K_NAME);
5506 return rc;
5507 }
5508
5509 rc = pci_request_regions(pdev, MWL8K_NAME);
5510 if (rc) {
5511 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
5512 MWL8K_NAME);
5513 goto err_disable_device;
5514 }
5515
5516 pci_set_master(pdev);
5517
5518
5519 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
5520 if (hw == NULL) {
5521 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
5522 rc = -ENOMEM;
5523 goto err_free_reg;
5524 }
5525
5526 SET_IEEE80211_DEV(hw, &pdev->dev);
5527 pci_set_drvdata(pdev, hw);
5528
5529 priv = hw->priv;
5530 priv->hw = hw;
5531 priv->pdev = pdev;
5532 priv->device_info = &mwl8k_info_tbl[id->driver_data];
5533
5534
5535 priv->sram = pci_iomap(pdev, 0, 0x10000);
5536 if (priv->sram == NULL) {
5537 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
5538 goto err_iounmap;
5539 }
5540
5541 /*
5542 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
5543 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
5544 */
5545 priv->regs = pci_iomap(pdev, 1, 0x10000);
5546 if (priv->regs == NULL) {
5547 priv->regs = pci_iomap(pdev, 2, 0x10000);
5548 if (priv->regs == NULL) {
5549 wiphy_err(hw->wiphy, "Cannot map device registers\n");
5550 goto err_iounmap;
5551 }
5552 }
5553
0863ade8 5554 /*
99020471
BC		 5555 * Choose the initial fw image depending on user input. If a second
5556 * image is available, make it the alternative image that will be
5557 * loaded if the first one fails.
0863ade8 5558 */
99020471 5559 init_completion(&priv->firmware_loading_complete);
0863ade8 5560 di = priv->device_info;
99020471
BC		 5561 if (ap_mode_default && di->fw_image_ap) {
5562 priv->fw_pref = di->fw_image_ap;
5563 priv->fw_alt = di->fw_image_sta;
5564 } else if (!ap_mode_default && di->fw_image_sta) {
5565 priv->fw_pref = di->fw_image_sta;
5566 priv->fw_alt = di->fw_image_ap;
5567 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 5568 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 5569 priv->fw_pref = di->fw_image_sta;
0863ade8
BC		 5570 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
5571 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC		 5572 priv->fw_pref = di->fw_image_ap;
5573 }
5574 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC		 5575 if (rc)
5576 goto err_stop_firmware;
99020471 5577 return rc;
3cc7772c 5578
be695fc4
LB		 5579err_stop_firmware:
5580 mwl8k_hw_reset(priv);
be695fc4
LB		 5581
5582err_iounmap:
a66098da
LB		 5583 if (priv->regs != NULL)
5584 pci_iounmap(pdev, priv->regs);
5585
5b9482dd
LB		 5586 if (priv->sram != NULL)
5587 pci_iounmap(pdev, priv->sram);
5588
a66098da
LB		 5589 pci_set_drvdata(pdev, NULL);
5590 ieee80211_free_hw(hw);
5591
5592err_free_reg:
5593 pci_release_regions(pdev);
3db95e50
LB		 5594
5595err_disable_device:
a66098da
LB		 5596 pci_disable_device(pdev);
5597
5598 return rc;
5599}
5600
230f7af0 5601static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
a66098da
LB		 5602{
5603 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
5604}
5605
230f7af0 5606static void __devexit mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 5607{
5608 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
5609 struct mwl8k_priv *priv;
5610 int i;
5611
5612 if (hw == NULL)
5613 return;
5614 priv = hw->priv;
5615
99020471
BC		 5616 wait_for_completion(&priv->firmware_loading_complete);
5617
5618 if (priv->fw_state == FW_STATE_ERROR) {
5619 mwl8k_hw_reset(priv);
5620 goto unmap;
5621 }
5622
a66098da
LB		 5623 ieee80211_stop_queues(hw);
5624
60aa569f
LB		 5625 ieee80211_unregister_hw(hw);
5626
67e2eb27 5627 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 5628 tasklet_kill(&priv->poll_tx_task);
67e2eb27 5629 tasklet_kill(&priv->poll_rx_task);
a66098da 5630
a66098da
LB		 5631 /* Stop hardware */
5632 mwl8k_hw_reset(priv);
5633
5634 /* Return all skbs to mac80211 */
e600707b 5635 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 5636 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 5637
e600707b 5638 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5639 mwl8k_txq_deinit(hw, i);
5640
5641 mwl8k_rxq_deinit(hw, 0);
5642
c2c357ce 5643 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 5644
99020471 5645unmap:
a66098da 5646 pci_iounmap(pdev, priv->regs);
5b9482dd 5647 pci_iounmap(pdev, priv->sram);
a66098da
LB		 5648 pci_set_drvdata(pdev, NULL);
5649 ieee80211_free_hw(hw);
5650 pci_release_regions(pdev);
5651 pci_disable_device(pdev);
5652}
5653
5654static struct pci_driver mwl8k_driver = {
5655 .name = MWL8K_NAME,
45a390dd 5656 .id_table = mwl8k_pci_id_table,
a66098da
LB		 5657 .probe = mwl8k_probe,
5658 .remove = __devexit_p(mwl8k_remove),
5659 .shutdown = __devexit_p(mwl8k_shutdown),
5660};
5661
5662static int __init mwl8k_init(void)
5663{
5664 return pci_register_driver(&mwl8k_driver);
5665}
5666
5667static void __exit mwl8k_exit(void)
5668{
5669 pci_unregister_driver(&mwl8k_driver);
5670}
5671
5672module_init(mwl8k_init);
5673module_exit(mwl8k_exit);
c2c357ce
LB		 5674
5675MODULE_DESCRIPTION(MWL8K_DESC);
5676MODULE_VERSION(MWL8K_VERSION);
5677MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
5678MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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